diff --git a/.mxproject b/.mxproject index e795889..95b5290 100644 --- a/.mxproject +++ b/.mxproject @@ -1,3 +1,11 @@ +[PreviousLibFiles] +LibFiles=Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h;Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_bus.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_crs.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_system.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_utils.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h;Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_bus.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_crs.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_system.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_utils.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h;Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h;Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h;Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_sc300.h; + +[PreviousUsedMakefileFiles] +SourceFiles=Core/Src/main.c;Core/Src/stm32f3xx_it.c;Core/Src/stm32f3xx_hal_msp.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c;Core/Src/system_stm32f3xx.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c;Core/Src/system_stm32f3xx.c;;; +HeaderPath=Drivers/STM32F3xx_HAL_Driver/Inc;Drivers/STM32F3xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F3xx/Include;Drivers/CMSIS/Include;Core/Inc; +CDefines=USE_HAL_DRIVER;STM32F302xC;USE_HAL_DRIVER;USE_HAL_DRIVER; + [PreviousGenFiles] AdvancedFolderStructure=true HeaderFileListSize=3 @@ -15,11 +23,3 @@ SourceFolderListSize=1 SourcePath#0=../Core/Src SourceFiles=; -[PreviousLibFiles] -LibFiles=Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h;Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_bus.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_crs.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_system.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_utils.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h;Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_bus.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_rcc.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_crs.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_system.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_utils.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_gpio.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_dma.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_cortex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_pwr.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_exti.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_i2c.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_spi.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_tim.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_usart.h;Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h;Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h;Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h;Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_sc300.h; - -[PreviousUsedMakefileFiles] -SourceFiles=Core/Src/main.c;Core/Src/stm32f3xx_it.c;Core/Src/stm32f3xx_hal_msp.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c;Core/Src/system_stm32f3xx.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c;Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c;Core/Src/system_stm32f3xx.c;;; -HeaderPath=Drivers/STM32F3xx_HAL_Driver/Inc;Drivers/STM32F3xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F3xx/Include;Drivers/CMSIS/Include;Core/Inc; -CDefines=USE_HAL_DRIVER;STM32F302xC;USE_HAL_DRIVER;USE_HAL_DRIVER; - diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json new file mode 100644 index 0000000..d01136b --- /dev/null +++ b/.vscode/c_cpp_properties.json @@ -0,0 +1,20 @@ +{ + "configurations": [ + { + "name": "STM32", + "includePath": [ + "Core/Inc", + "Drivers/CMSIS/Device/ST/STM32F3xx/Include", + "Drivers/CMSIS/Include", + "Drivers/STM32F3xx_HAL_Driver/Inc", + "Drivers/STM32F3xx_HAL_Driver/Inc/Legacy" + ], + "defines": [ + "STM32F302xC", + "USE_HAL_DRIVER" + ], + "compilerPath": "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/arm-none-eabi-gcc" + } + ], + "version": 4 +} \ No newline at end of file diff --git a/.vscode/extensions.json b/.vscode/extensions.json new file mode 100644 index 0000000..bd4431e --- /dev/null +++ b/.vscode/extensions.json @@ -0,0 +1,5 @@ +{ + "recommendations": [ + "bmd.stm32-for-vscode" + ] +} \ No newline at end of file diff --git a/.vscode/launch.json b/.vscode/launch.json new file mode 100644 index 0000000..1598d15 --- /dev/null +++ b/.vscode/launch.json @@ -0,0 +1,32 @@ +{ + "configurations": [ + { + "showDevDebugOutput": "parsed", + "cwd": "${workspaceRoot}", + "executable": "./build/mvbms-test-24.elf", + "name": "Debug STM32", + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "preLaunchTask": "Build STM", + "device": "stm32f302xc.s", + "configFiles": [ + "openocd.cfg" + ] + }, + { + "showDevDebugOutput": "parsed", + "cwd": "${workspaceRoot}", + "executable": "./build/mvbms-test-24.elf", + "name": "Attach STM32", + "request": "attach", + "type": "cortex-debug", + "servertype": "openocd", + "preLaunchTask": "Build STM", + "device": "stm32f302xc.s", + "configFiles": [ + "openocd.cfg" + ] + } + ] +} \ No newline at end of file diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..5eeaa3f --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,5 @@ +{ + "cortex-debug.armToolchainPath": "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin", + "cortex-debug.openocdPath": "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-3.1/.content/bin/openocd", + "makefile.makefilePath": "/home/h/FASTTUBE/mvbms-test-24/STM32Make.make" +} \ No newline at end of file diff --git a/.vscode/tasks.json b/.vscode/tasks.json new file mode 100644 index 0000000..39d8d34 --- /dev/null +++ b/.vscode/tasks.json @@ -0,0 +1,50 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "label": "Build STM", + "type": "process", + "command": "${command:stm32-for-vscode.build}", + "options": { + "cwd": "${workspaceRoot}" + }, + "group": { + "kind": "build", + "isDefault": true + }, + "problemMatcher": [ + "$gcc" + ] + }, + { + "label": "Build Clean STM", + "type": "process", + "command": "${command:stm32-for-vscode.cleanBuild}", + "options": { + "cwd": "${workspaceRoot}" + }, + "group": { + "kind": "build", + "isDefault": true + }, + "problemMatcher": [ + "$gcc" + ] + }, + { + "label": "Flash STM", + "type": "process", + "command": "${command:stm32-for-vscode.flash}", + "options": { + "cwd": "${workspaceRoot}" + }, + "group": { + "kind": "build", + "isDefault": true + }, + "problemMatcher": [ + "$gcc" + ] + } + ] +} \ No newline at end of file diff --git a/Makefile b/Makefile index bd34126..1e911dc 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Thu May 09 23:24:58 EEST 2024] +# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Thu May 09 23:34:20 EEST 2024] ########################################################################################################################## # ------------------------------------------------ @@ -35,36 +35,36 @@ BUILD_DIR = build # source ###################################### # C sources -C_SOURCES = \ -Core/Src/main.c \ -Core/Src/stm32f3xx_it.c \ -Core/Src/stm32f3xx_hal_msp.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c \ -Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c \ -Core/Src/system_stm32f3xx.c \ -Core/Src/sysmem.c \ -Core/Src/syscalls.c +C_SOURCES = \ +Core/Src/main.c \ +Core/Src/stm32f3xx_it.c \ +Core/Src/stm32f3xx_hal_msp.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c \ +Core/Src/system_stm32f3xx.c \ +Core/Src/sysmem.c \ +Core/Src/syscalls.c # ASM sources -ASM_SOURCES = \ +ASM_SOURCES = \ startup_stm32f302xc.s # ASM sources @@ -111,8 +111,8 @@ MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) AS_DEFS = # C defines -C_DEFS = \ --DUSE_HAL_DRIVER \ +C_DEFS = \ +-DUSE_HAL_DRIVER \ -DSTM32F302xC @@ -120,11 +120,11 @@ C_DEFS = \ AS_INCLUDES = # C includes -C_INCLUDES = \ --ICore/Inc \ --IDrivers/STM32F3xx_HAL_Driver/Inc \ --IDrivers/STM32F3xx_HAL_Driver/Inc/Legacy \ --IDrivers/CMSIS/Device/ST/STM32F3xx/Include \ +C_INCLUDES = \ +-ICore/Inc \ +-IDrivers/STM32F3xx_HAL_Driver/Inc \ +-IDrivers/STM32F3xx_HAL_Driver/Inc/Legacy \ +-IDrivers/CMSIS/Device/ST/STM32F3xx/Include \ -IDrivers/CMSIS/Include @@ -201,4 +201,4 @@ clean: ####################################### -include $(wildcard $(BUILD_DIR)/*.d) -# *** EOF *** \ No newline at end of file +# *** EOF *** diff --git a/STM32-for-VSCode.config.yaml b/STM32-for-VSCode.config.yaml new file mode 100644 index 0000000..0ea660c --- /dev/null +++ b/STM32-for-VSCode.config.yaml @@ -0,0 +1,109 @@ +# Configuration file for the STM32 for VSCode extension +# Arrays can be inputted in two ways. One is: [entry_1, entry_2, ..., entry_final] +# or by adding an indented list below the variable name e.g.: +# VARIABLE: +# - entry_1 +# - entry_2 + +# The project name +target: mvbms-test-24 +# Can be C or C++ +language: C + +optimization: Og + +# MCU settings +targetMCU: stm32f3x +cpu: cortex-m4 # type of cpu e.g. cortex-m4 +fpu: fpv4-sp-d16 # Defines how floating points are defined. Can be left empty. +floatAbi: -mfloat-abi=hard +ldscript: STM32F302CBTx_FLASH.ld # linker script + +# Compiler definitions. The -D prefix for the compiler will be automatically added. +cDefinitions: [] +cxxDefinitions: [] +asDefinitions: [] + +# Compiler definition files. you can add a single files or an array of files for different definitions. +# The file is expected to have a definition each new line. +# This allows to include for example a .definition file which can be ignored in git and can contain +# This can be convenient for passing along secrets at compile time, or generating a file for per device setup. +cDefinitionsFile: +cxxDefinitionsFile: +asDefinitionsFile: + +# Compiler flags +cFlags: + - -Wall + - -fdata-sections + - -ffunction-sections + +cxxFlags: [] +assemblyFlags: + - -Wall + - -fdata-sections + - -ffunction-sections + +linkerFlags: + - -Wl,--print-memory-usage + + +# libraries to be included. The -l prefix to the library will be automatically added. +libraries: + - c + - m + +# Library directories. Folders can be added here that contain custom libraries. +libraryDirectories: [] + +# Files or folders that will be excluded from compilation. +# Glob patterns (https://www.wikiwand.com/en/Glob_(programming)) can be used. +# Do mind that double stars are reserved in yaml +# these should be escaped with a: \ or the name should be in double quotes e.g. "**.test.**" +excludes: + - "**/Examples/**" + - "**/examples/**" + - "**/Example/**" + - "**/example/**" + - "**_template.*" + + +# Include directories (directories containing .h or .hpp files) +# If a CubeMX makefile is present it will automatically include the include directories from that makefile. +includeDirectories: + - Inc/** + - Core/Inc/** + - Core/Lib/** + - Src/** + - Core/Src/** + - Core/Lib/** + + +# Files that should be included in the compilation. +# If a CubeMX makefile is present it will automatically include the c and cpp/cxx files from that makefile. +# Glob patterns (https://www.wikiwand.com/en/Glob_(programming)) can be used. +# Do mind that double stars are reserved in yaml +# these should be escaped with a: \ or the name should be in double quotes e.g. "HARDWARE_DRIVER*.c" +sourceFiles: + - Src/** + - Core/Src/** + - Core/Lib/** + + +# When no makefile is present it will show a warning pop-up. +# However when compilation without the CubeMX Makefile is desired, this can be turned of. +suppressMakefileWarning: false + +# Custom makefile rules +# Here custom makefile rules can be added to the STM32Make.make file +# an example of how this can be used is commented out below. +customMakefileRules: +# - command: sayhello +# rule: echo "hello" +# dependsOn: $(BUILD_DIR)/$(TARGET).elf # can be left out + +# Additional flags which will be used when invoking the make command +makeFlags: +# - -O # use this option when the output of make is mixed up only works for make version 4.0 and upwards +# - --silent # use this option to silence the output of the build + \ No newline at end of file diff --git a/STM32Make.make b/STM32Make.make new file mode 100644 index 0000000..7576be3 --- /dev/null +++ b/STM32Make.make @@ -0,0 +1,261 @@ +########################################################################################################################## +# File automatically-generated by STM32forVSCode +########################################################################################################################## + +# ------------------------------------------------ +# Generic Makefile (based on gcc) +# +# ChangeLog : +# 2017-02-10 - Several enhancements + project update mode +# 2015-07-22 - first version +# ------------------------------------------------ + +###################################### +# target +###################################### +TARGET = mvbms-test-24 + + +###################################### +# building variables +###################################### +# debug build? +DEBUG = 1 +# optimization +OPT = -Og + + +####################################### +# paths +####################################### +# Build path +BUILD_DIR = build + +###################################### +# source +###################################### +# C sources +C_SOURCES = \ +Core/Src/main.c \ +Core/Src/stm32f3xx_hal_msp.c \ +Core/Src/stm32f3xx_it.c \ +Core/Src/syscalls.c \ +Core/Src/sysmem.c \ +Core/Src/system_stm32f3xx.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c \ +Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c + + +CPP_SOURCES = \ + + +# ASM sources +ASM_SOURCES = \ +startup_stm32f302xc.s + + + +####################################### +# binaries +####################################### +PREFIX = arm-none-eabi- +POSTFIX = " +# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) +# either it can be added to the PATH environment variable. +GCC_PATH="/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin +ifdef GCC_PATH +CXX = $(GCC_PATH)/$(PREFIX)g++$(POSTFIX) +CC = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) +AS = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) -x assembler-with-cpp +CP = $(GCC_PATH)/$(PREFIX)objcopy$(POSTFIX) +SZ = $(GCC_PATH)/$(PREFIX)size$(POSTFIX) +else +CXX = $(PREFIX)g++ +CC = $(PREFIX)gcc +AS = $(PREFIX)gcc -x assembler-with-cpp +CP = $(PREFIX)objcopy +SZ = $(PREFIX)size +endif +HEX = $(CP) -O ihex +BIN = $(CP) -O binary -S + +####################################### +# CFLAGS +####################################### +# cpu +CPU = -mcpu=cortex-m4 + +# fpu +FPU = -mfpu=fpv4-sp-d16 + +# float-abi +FLOAT-ABI = -mfloat-abi=hard + +# mcu +MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) + +# macros for gcc +# AS defines +AS_DEFS = + +# C defines +C_DEFS = \ +-DSTM32F302xC \ +-DUSE_HAL_DRIVER + + +# CXX defines +CXX_DEFS = \ +-DSTM32F302xC \ +-DUSE_HAL_DRIVER + + +# AS includes +AS_INCLUDES = \ + +# C includes +C_INCLUDES = \ +-ICore/Inc \ +-IDrivers/CMSIS/Device/ST/STM32F3xx/Include \ +-IDrivers/CMSIS/Include \ +-IDrivers/STM32F3xx_HAL_Driver/Inc \ +-IDrivers/STM32F3xx_HAL_Driver/Inc/Legacy + + + +# compile gcc flags +ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections + +CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections + +CXXFLAGS = $(MCU) $(CXX_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections -feliminate-unused-debug-types + +ifeq ($(DEBUG), 1) +CFLAGS += -g -gdwarf -ggdb +CXXFLAGS += -g -gdwarf -ggdb +endif + +# Add additional flags +CFLAGS += -Wall -fdata-sections -ffunction-sections +ASFLAGS += -Wall -fdata-sections -ffunction-sections +CXXFLAGS += + +# Generate dependency information +CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" +CXXFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" + +####################################### +# LDFLAGS +####################################### +# link script +LDSCRIPT = STM32F302CBTx_FLASH.ld + +# libraries +LIBS = -lc -lm -lnosys +LIBDIR = \ + + +# Additional LD Flags from config file +ADDITIONALLDFLAGS = -Wl,--print-memory-usage -specs=nano.specs + +LDFLAGS = $(MCU) $(ADDITIONALLDFLAGS) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections + +# default action: build all +all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin + + +####################################### +# build the application +####################################### +# list of cpp program objects +OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(CPP_SOURCES:.cpp=.o))) +vpath %.cpp $(sort $(dir $(CPP_SOURCES))) + +# list of C objects +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) +vpath %.c $(sort $(dir $(C_SOURCES))) + +# list of ASM program objects +UPPER_CASE_ASM_SOURCES = $(filter %.S,$(ASM_SOURCES)) +LOWER_CASE_ASM_SOURCES = $(filter %.s,$(ASM_SOURCES)) + +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(UPPER_CASE_ASM_SOURCES:.S=.o))) +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(LOWER_CASE_ASM_SOURCES:.s=.o))) +vpath %.s $(sort $(dir $(ASM_SOURCES))) + +$(BUILD_DIR)/%.o: %.cpp STM32Make.make | $(BUILD_DIR) + $(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cpp=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.cxx STM32Make.make | $(BUILD_DIR) + $(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cxx=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.c STM32Make.make | $(BUILD_DIR) + $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.s STM32Make.make | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/%.o: %.S STM32Make.make | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) STM32Make.make + $(CC) $(OBJECTS) $(LDFLAGS) -o $@ + $(SZ) $@ + +$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(HEX) $< $@ + +$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(BIN) $< $@ + +$(BUILD_DIR): + mkdir $@ + +####################################### +# flash +####################################### +flash: $(BUILD_DIR)/$(TARGET).elf + "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-3.1/.content/bin/openocd" -f ./openocd.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit" + +####################################### +# erase +####################################### +erase: $(BUILD_DIR)/$(TARGET).elf + "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-3.1/.content/bin/openocd" -f ./openocd.cfg -c "init; reset halt; stm32f3x mass_erase 0; exit" + +####################################### +# clean up +####################################### +clean: + -rm -fR $(BUILD_DIR) + +####################################### +# custom makefile rules +####################################### + + + +####################################### +# dependencies +####################################### +-include $(wildcard $(BUILD_DIR)/*.d) + +# *** EOF *** \ No newline at end of file diff --git a/build/main.d b/build/main.d new file mode 100644 index 0000000..bfbb16a --- /dev/null +++ b/build/main.d @@ -0,0 +1,66 @@ +build/main.o: Core/Src/main.c Core/Inc/main.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Core/Inc/main.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/main.lst b/build/main.lst new file mode 100644 index 0000000..d5b0cf1 --- /dev/null +++ b/build/main.lst @@ -0,0 +1,2453 @@ +ARM GAS /tmp/ccBZCjHD.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "main.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/main.c" + 20 .section .text.MX_GPIO_Init,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 MX_GPIO_Init: + 27 .LFB138: + 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/main.c **** /** + 3:Core/Src/main.c **** ****************************************************************************** + 4:Core/Src/main.c **** * @file : main.c + 5:Core/Src/main.c **** * @brief : Main program body + 6:Core/Src/main.c **** ****************************************************************************** + 7:Core/Src/main.c **** * @attention + 8:Core/Src/main.c **** * + 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. + 10:Core/Src/main.c **** * All rights reserved. + 11:Core/Src/main.c **** * + 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file + 13:Core/Src/main.c **** * in the root directory of this software component. + 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 15:Core/Src/main.c **** * + 16:Core/Src/main.c **** ****************************************************************************** + 17:Core/Src/main.c **** */ + 18:Core/Src/main.c **** /* USER CODE END Header */ + 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ + 20:Core/Src/main.c **** #include "main.h" + 21:Core/Src/main.c **** + 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ + 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ + 24:Core/Src/main.c **** + 25:Core/Src/main.c **** /* USER CODE END Includes */ + 26:Core/Src/main.c **** + 27:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/main.c **** /* USER CODE BEGIN PTD */ + 29:Core/Src/main.c **** + 30:Core/Src/main.c **** /* USER CODE END PTD */ + 31:Core/Src/main.c **** + ARM GAS /tmp/ccBZCjHD.s page 2 + + + 32:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ + 33:Core/Src/main.c **** /* USER CODE BEGIN PD */ + 34:Core/Src/main.c **** + 35:Core/Src/main.c **** /* USER CODE END PD */ + 36:Core/Src/main.c **** + 37:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/main.c **** /* USER CODE BEGIN PM */ + 39:Core/Src/main.c **** + 40:Core/Src/main.c **** /* USER CODE END PM */ + 41:Core/Src/main.c **** + 42:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/main.c **** CAN_HandleTypeDef hcan; + 44:Core/Src/main.c **** + 45:Core/Src/main.c **** I2C_HandleTypeDef hi2c1; + 46:Core/Src/main.c **** + 47:Core/Src/main.c **** SPI_HandleTypeDef hspi1; + 48:Core/Src/main.c **** + 49:Core/Src/main.c **** TIM_HandleTypeDef htim1; + 50:Core/Src/main.c **** TIM_HandleTypeDef htim15; + 51:Core/Src/main.c **** + 52:Core/Src/main.c **** UART_HandleTypeDef huart1; + 53:Core/Src/main.c **** + 54:Core/Src/main.c **** /* USER CODE BEGIN PV */ + 55:Core/Src/main.c **** + 56:Core/Src/main.c **** /* USER CODE END PV */ + 57:Core/Src/main.c **** + 58:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 59:Core/Src/main.c **** void SystemClock_Config(void); + 60:Core/Src/main.c **** static void MX_GPIO_Init(void); + 61:Core/Src/main.c **** static void MX_CAN_Init(void); + 62:Core/Src/main.c **** static void MX_I2C1_Init(void); + 63:Core/Src/main.c **** static void MX_SPI1_Init(void); + 64:Core/Src/main.c **** static void MX_TIM15_Init(void); + 65:Core/Src/main.c **** static void MX_USART1_UART_Init(void); + 66:Core/Src/main.c **** static void MX_TIM1_Init(void); + 67:Core/Src/main.c **** /* USER CODE BEGIN PFP */ + 68:Core/Src/main.c **** + 69:Core/Src/main.c **** /* USER CODE END PFP */ + 70:Core/Src/main.c **** + 71:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 72:Core/Src/main.c **** /* USER CODE BEGIN 0 */ + 73:Core/Src/main.c **** + 74:Core/Src/main.c **** /* USER CODE END 0 */ + 75:Core/Src/main.c **** + 76:Core/Src/main.c **** /** + 77:Core/Src/main.c **** * @brief The application entry point. + 78:Core/Src/main.c **** * @retval int + 79:Core/Src/main.c **** */ + 80:Core/Src/main.c **** int main(void) + 81:Core/Src/main.c **** { + 82:Core/Src/main.c **** + 83:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 84:Core/Src/main.c **** + 85:Core/Src/main.c **** /* USER CODE END 1 */ + 86:Core/Src/main.c **** + 87:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 88:Core/Src/main.c **** + ARM GAS /tmp/ccBZCjHD.s page 3 + + + 89:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 90:Core/Src/main.c **** HAL_Init(); + 91:Core/Src/main.c **** + 92:Core/Src/main.c **** /* USER CODE BEGIN Init */ + 93:Core/Src/main.c **** + 94:Core/Src/main.c **** /* USER CODE END Init */ + 95:Core/Src/main.c **** + 96:Core/Src/main.c **** /* Configure the system clock */ + 97:Core/Src/main.c **** SystemClock_Config(); + 98:Core/Src/main.c **** + 99:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ + 100:Core/Src/main.c **** + 101:Core/Src/main.c **** /* USER CODE END SysInit */ + 102:Core/Src/main.c **** + 103:Core/Src/main.c **** /* Initialize all configured peripherals */ + 104:Core/Src/main.c **** MX_GPIO_Init(); + 105:Core/Src/main.c **** MX_CAN_Init(); + 106:Core/Src/main.c **** MX_I2C1_Init(); + 107:Core/Src/main.c **** MX_SPI1_Init(); + 108:Core/Src/main.c **** MX_TIM15_Init(); + 109:Core/Src/main.c **** MX_USART1_UART_Init(); + 110:Core/Src/main.c **** MX_TIM1_Init(); + 111:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 112:Core/Src/main.c **** + 113:Core/Src/main.c **** /* USER CODE END 2 */ + 114:Core/Src/main.c **** + 115:Core/Src/main.c **** /* Infinite loop */ + 116:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ + 117:Core/Src/main.c **** while (1) + 118:Core/Src/main.c **** { + 119:Core/Src/main.c **** /* USER CODE END WHILE */ + 120:Core/Src/main.c **** + 121:Core/Src/main.c **** /* USER CODE BEGIN 3 */ + 122:Core/Src/main.c **** } + 123:Core/Src/main.c **** /* USER CODE END 3 */ + 124:Core/Src/main.c **** } + 125:Core/Src/main.c **** + 126:Core/Src/main.c **** /** + 127:Core/Src/main.c **** * @brief System Clock Configuration + 128:Core/Src/main.c **** * @retval None + 129:Core/Src/main.c **** */ + 130:Core/Src/main.c **** void SystemClock_Config(void) + 131:Core/Src/main.c **** { + 132:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 133:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 134:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 135:Core/Src/main.c **** + 136:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 137:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 138:Core/Src/main.c **** */ + 139:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + 140:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 141:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 142:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 143:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 144:Core/Src/main.c **** { + 145:Core/Src/main.c **** Error_Handler(); + ARM GAS /tmp/ccBZCjHD.s page 4 + + + 146:Core/Src/main.c **** } + 147:Core/Src/main.c **** + 148:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 149:Core/Src/main.c **** */ + 150:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 151:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 152:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + 153:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 154:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 155:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 156:Core/Src/main.c **** + 157:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + 158:Core/Src/main.c **** { + 159:Core/Src/main.c **** Error_Handler(); + 160:Core/Src/main.c **** } + 161:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_I2C1 + 162:Core/Src/main.c **** |RCC_PERIPHCLK_TIM1; + 163:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 164:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; + 165:Core/Src/main.c **** PeriphClkInit.Tim1ClockSelection = RCC_TIM1CLK_HCLK; + 166:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + 167:Core/Src/main.c **** { + 168:Core/Src/main.c **** Error_Handler(); + 169:Core/Src/main.c **** } + 170:Core/Src/main.c **** } + 171:Core/Src/main.c **** + 172:Core/Src/main.c **** /** + 173:Core/Src/main.c **** * @brief CAN Initialization Function + 174:Core/Src/main.c **** * @param None + 175:Core/Src/main.c **** * @retval None + 176:Core/Src/main.c **** */ + 177:Core/Src/main.c **** static void MX_CAN_Init(void) + 178:Core/Src/main.c **** { + 179:Core/Src/main.c **** + 180:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */ + 181:Core/Src/main.c **** + 182:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */ + 183:Core/Src/main.c **** + 184:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */ + 185:Core/Src/main.c **** + 186:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */ + 187:Core/Src/main.c **** hcan.Instance = CAN; + 188:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 189:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 190:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 191:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 192:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 193:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 194:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 195:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 196:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 197:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 198:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 199:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 200:Core/Src/main.c **** { + 201:Core/Src/main.c **** Error_Handler(); + 202:Core/Src/main.c **** } + ARM GAS /tmp/ccBZCjHD.s page 5 + + + 203:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */ + 204:Core/Src/main.c **** + 205:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */ + 206:Core/Src/main.c **** + 207:Core/Src/main.c **** } + 208:Core/Src/main.c **** + 209:Core/Src/main.c **** /** + 210:Core/Src/main.c **** * @brief I2C1 Initialization Function + 211:Core/Src/main.c **** * @param None + 212:Core/Src/main.c **** * @retval None + 213:Core/Src/main.c **** */ + 214:Core/Src/main.c **** static void MX_I2C1_Init(void) + 215:Core/Src/main.c **** { + 216:Core/Src/main.c **** + 217:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 0 */ + 218:Core/Src/main.c **** + 219:Core/Src/main.c **** /* USER CODE END I2C1_Init 0 */ + 220:Core/Src/main.c **** + 221:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 1 */ + 222:Core/Src/main.c **** + 223:Core/Src/main.c **** /* USER CODE END I2C1_Init 1 */ + 224:Core/Src/main.c **** hi2c1.Instance = I2C1; + 225:Core/Src/main.c **** hi2c1.Init.Timing = 0x2000090E; + 226:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; + 227:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + 228:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + 229:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; + 230:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + 231:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + 232:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + 233:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) + 234:Core/Src/main.c **** { + 235:Core/Src/main.c **** Error_Handler(); + 236:Core/Src/main.c **** } + 237:Core/Src/main.c **** + 238:Core/Src/main.c **** /** Configure Analogue filter + 239:Core/Src/main.c **** */ + 240:Core/Src/main.c **** if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) + 241:Core/Src/main.c **** { + 242:Core/Src/main.c **** Error_Handler(); + 243:Core/Src/main.c **** } + 244:Core/Src/main.c **** + 245:Core/Src/main.c **** /** Configure Digital filter + 246:Core/Src/main.c **** */ + 247:Core/Src/main.c **** if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) + 248:Core/Src/main.c **** { + 249:Core/Src/main.c **** Error_Handler(); + 250:Core/Src/main.c **** } + 251:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 2 */ + 252:Core/Src/main.c **** + 253:Core/Src/main.c **** /* USER CODE END I2C1_Init 2 */ + 254:Core/Src/main.c **** + 255:Core/Src/main.c **** } + 256:Core/Src/main.c **** + 257:Core/Src/main.c **** /** + 258:Core/Src/main.c **** * @brief SPI1 Initialization Function + 259:Core/Src/main.c **** * @param None + ARM GAS /tmp/ccBZCjHD.s page 6 + + + 260:Core/Src/main.c **** * @retval None + 261:Core/Src/main.c **** */ + 262:Core/Src/main.c **** static void MX_SPI1_Init(void) + 263:Core/Src/main.c **** { + 264:Core/Src/main.c **** + 265:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 0 */ + 266:Core/Src/main.c **** + 267:Core/Src/main.c **** /* USER CODE END SPI1_Init 0 */ + 268:Core/Src/main.c **** + 269:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 1 */ + 270:Core/Src/main.c **** + 271:Core/Src/main.c **** /* USER CODE END SPI1_Init 1 */ + 272:Core/Src/main.c **** /* SPI1 parameter configuration*/ + 273:Core/Src/main.c **** hspi1.Instance = SPI1; + 274:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER; + 275:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_2LINES; + 276:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + 277:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + 278:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + 279:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_HARD_INPUT; + 280:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + 281:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + 282:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + 283:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 284:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 7; + 285:Core/Src/main.c **** hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + 286:Core/Src/main.c **** hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + 287:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK) + 288:Core/Src/main.c **** { + 289:Core/Src/main.c **** Error_Handler(); + 290:Core/Src/main.c **** } + 291:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 2 */ + 292:Core/Src/main.c **** + 293:Core/Src/main.c **** /* USER CODE END SPI1_Init 2 */ + 294:Core/Src/main.c **** + 295:Core/Src/main.c **** } + 296:Core/Src/main.c **** + 297:Core/Src/main.c **** /** + 298:Core/Src/main.c **** * @brief TIM1 Initialization Function + 299:Core/Src/main.c **** * @param None + 300:Core/Src/main.c **** * @retval None + 301:Core/Src/main.c **** */ + 302:Core/Src/main.c **** static void MX_TIM1_Init(void) + 303:Core/Src/main.c **** { + 304:Core/Src/main.c **** + 305:Core/Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */ + 306:Core/Src/main.c **** + 307:Core/Src/main.c **** /* USER CODE END TIM1_Init 0 */ + 308:Core/Src/main.c **** + 309:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 310:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 311:Core/Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 312:Core/Src/main.c **** + 313:Core/Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */ + 314:Core/Src/main.c **** + 315:Core/Src/main.c **** /* USER CODE END TIM1_Init 1 */ + 316:Core/Src/main.c **** htim1.Instance = TIM1; + ARM GAS /tmp/ccBZCjHD.s page 7 + + + 317:Core/Src/main.c **** htim1.Init.Prescaler = 0; + 318:Core/Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 319:Core/Src/main.c **** htim1.Init.Period = 65535; + 320:Core/Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 321:Core/Src/main.c **** htim1.Init.RepetitionCounter = 0; + 322:Core/Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 323:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) + 324:Core/Src/main.c **** { + 325:Core/Src/main.c **** Error_Handler(); + 326:Core/Src/main.c **** } + 327:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 328:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 329:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 330:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) + 331:Core/Src/main.c **** { + 332:Core/Src/main.c **** Error_Handler(); + 333:Core/Src/main.c **** } + 334:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; + 335:Core/Src/main.c **** sConfigOC.Pulse = 0; + 336:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 337:Core/Src/main.c **** sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 338:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 339:Core/Src/main.c **** sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + 340:Core/Src/main.c **** sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 341:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 342:Core/Src/main.c **** { + 343:Core/Src/main.c **** Error_Handler(); + 344:Core/Src/main.c **** } + 345:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; + 346:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 347:Core/Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 348:Core/Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 349:Core/Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 350:Core/Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 351:Core/Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 352:Core/Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 353:Core/Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 354:Core/Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 355:Core/Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 356:Core/Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 357:Core/Src/main.c **** { + 358:Core/Src/main.c **** Error_Handler(); + 359:Core/Src/main.c **** } + 360:Core/Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */ + 361:Core/Src/main.c **** + 362:Core/Src/main.c **** /* USER CODE END TIM1_Init 2 */ + 363:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim1); + 364:Core/Src/main.c **** + 365:Core/Src/main.c **** } + 366:Core/Src/main.c **** + 367:Core/Src/main.c **** /** + 368:Core/Src/main.c **** * @brief TIM15 Initialization Function + 369:Core/Src/main.c **** * @param None + 370:Core/Src/main.c **** * @retval None + 371:Core/Src/main.c **** */ + 372:Core/Src/main.c **** static void MX_TIM15_Init(void) + 373:Core/Src/main.c **** { + ARM GAS /tmp/ccBZCjHD.s page 8 + + + 374:Core/Src/main.c **** + 375:Core/Src/main.c **** /* USER CODE BEGIN TIM15_Init 0 */ + 376:Core/Src/main.c **** + 377:Core/Src/main.c **** /* USER CODE END TIM15_Init 0 */ + 378:Core/Src/main.c **** + 379:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 380:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 381:Core/Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 382:Core/Src/main.c **** + 383:Core/Src/main.c **** /* USER CODE BEGIN TIM15_Init 1 */ + 384:Core/Src/main.c **** + 385:Core/Src/main.c **** /* USER CODE END TIM15_Init 1 */ + 386:Core/Src/main.c **** htim15.Instance = TIM15; + 387:Core/Src/main.c **** htim15.Init.Prescaler = 0; + 388:Core/Src/main.c **** htim15.Init.CounterMode = TIM_COUNTERMODE_UP; + 389:Core/Src/main.c **** htim15.Init.Period = 65535; + 390:Core/Src/main.c **** htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 391:Core/Src/main.c **** htim15.Init.RepetitionCounter = 0; + 392:Core/Src/main.c **** htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 393:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim15) != HAL_OK) + 394:Core/Src/main.c **** { + 395:Core/Src/main.c **** Error_Handler(); + 396:Core/Src/main.c **** } + 397:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 398:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 399:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK) + 400:Core/Src/main.c **** { + 401:Core/Src/main.c **** Error_Handler(); + 402:Core/Src/main.c **** } + 403:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; + 404:Core/Src/main.c **** sConfigOC.Pulse = 0; + 405:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 406:Core/Src/main.c **** sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 407:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 408:Core/Src/main.c **** sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + 409:Core/Src/main.c **** sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 410:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim15, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 411:Core/Src/main.c **** { + 412:Core/Src/main.c **** Error_Handler(); + 413:Core/Src/main.c **** } + 414:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim15, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + 415:Core/Src/main.c **** { + 416:Core/Src/main.c **** Error_Handler(); + 417:Core/Src/main.c **** } + 418:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; + 419:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 420:Core/Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 421:Core/Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 422:Core/Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 423:Core/Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 424:Core/Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 425:Core/Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 426:Core/Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim15, &sBreakDeadTimeConfig) != HAL_OK) + 427:Core/Src/main.c **** { + 428:Core/Src/main.c **** Error_Handler(); + 429:Core/Src/main.c **** } + 430:Core/Src/main.c **** /* USER CODE BEGIN TIM15_Init 2 */ + ARM GAS /tmp/ccBZCjHD.s page 9 + + + 431:Core/Src/main.c **** + 432:Core/Src/main.c **** /* USER CODE END TIM15_Init 2 */ + 433:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim15); + 434:Core/Src/main.c **** + 435:Core/Src/main.c **** } + 436:Core/Src/main.c **** + 437:Core/Src/main.c **** /** + 438:Core/Src/main.c **** * @brief USART1 Initialization Function + 439:Core/Src/main.c **** * @param None + 440:Core/Src/main.c **** * @retval None + 441:Core/Src/main.c **** */ + 442:Core/Src/main.c **** static void MX_USART1_UART_Init(void) + 443:Core/Src/main.c **** { + 444:Core/Src/main.c **** + 445:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ + 446:Core/Src/main.c **** + 447:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */ + 448:Core/Src/main.c **** + 449:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ + 450:Core/Src/main.c **** + 451:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */ + 452:Core/Src/main.c **** huart1.Instance = USART1; + 453:Core/Src/main.c **** huart1.Init.BaudRate = 38400; + 454:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; + 455:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; + 456:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; + 457:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; + 458:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 459:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; + 460:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 461:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 462:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) + 463:Core/Src/main.c **** { + 464:Core/Src/main.c **** Error_Handler(); + 465:Core/Src/main.c **** } + 466:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ + 467:Core/Src/main.c **** + 468:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */ + 469:Core/Src/main.c **** + 470:Core/Src/main.c **** } + 471:Core/Src/main.c **** + 472:Core/Src/main.c **** /** + 473:Core/Src/main.c **** * @brief GPIO Initialization Function + 474:Core/Src/main.c **** * @param None + 475:Core/Src/main.c **** * @retval None + 476:Core/Src/main.c **** */ + 477:Core/Src/main.c **** static void MX_GPIO_Init(void) + 478:Core/Src/main.c **** { + 28 .loc 1 478 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 40 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 0000 F0B5 push {r4, r5, r6, r7, lr} + 33 .cfi_def_cfa_offset 20 + 34 .cfi_offset 4, -20 + 35 .cfi_offset 5, -16 + 36 .cfi_offset 6, -12 + ARM GAS /tmp/ccBZCjHD.s page 10 + + + 37 .cfi_offset 7, -8 + 38 .cfi_offset 14, -4 + 39 0002 8BB0 sub sp, sp, #44 + 40 .cfi_def_cfa_offset 64 + 479:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 41 .loc 1 479 3 view .LVU1 + 42 .loc 1 479 20 is_stmt 0 view .LVU2 + 43 0004 0024 movs r4, #0 + 44 0006 0594 str r4, [sp, #20] + 45 0008 0694 str r4, [sp, #24] + 46 000a 0794 str r4, [sp, #28] + 47 000c 0894 str r4, [sp, #32] + 48 000e 0994 str r4, [sp, #36] + 480:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ + 481:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ + 482:Core/Src/main.c **** + 483:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 484:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); + 49 .loc 1 484 3 is_stmt 1 view .LVU3 + 50 .LBB4: + 51 .loc 1 484 3 view .LVU4 + 52 .loc 1 484 3 view .LVU5 + 53 0010 364B ldr r3, .L3 + 54 0012 5A69 ldr r2, [r3, #20] + 55 0014 42F40022 orr r2, r2, #524288 + 56 0018 5A61 str r2, [r3, #20] + 57 .loc 1 484 3 view .LVU6 + 58 001a 5A69 ldr r2, [r3, #20] + 59 001c 02F40022 and r2, r2, #524288 + 60 0020 0192 str r2, [sp, #4] + 61 .loc 1 484 3 view .LVU7 + 62 0022 019A ldr r2, [sp, #4] + 63 .LBE4: + 64 .loc 1 484 3 view .LVU8 + 485:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); + 65 .loc 1 485 3 view .LVU9 + 66 .LBB5: + 67 .loc 1 485 3 view .LVU10 + 68 .loc 1 485 3 view .LVU11 + 69 0024 5A69 ldr r2, [r3, #20] + 70 0026 42F48002 orr r2, r2, #4194304 + 71 002a 5A61 str r2, [r3, #20] + 72 .loc 1 485 3 view .LVU12 + 73 002c 5A69 ldr r2, [r3, #20] + 74 002e 02F48002 and r2, r2, #4194304 + 75 0032 0292 str r2, [sp, #8] + 76 .loc 1 485 3 view .LVU13 + 77 0034 029A ldr r2, [sp, #8] + 78 .LBE5: + 79 .loc 1 485 3 view .LVU14 + 486:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 80 .loc 1 486 3 view .LVU15 + 81 .LBB6: + 82 .loc 1 486 3 view .LVU16 + 83 .loc 1 486 3 view .LVU17 + 84 0036 5A69 ldr r2, [r3, #20] + 85 0038 42F40032 orr r2, r2, #131072 + ARM GAS /tmp/ccBZCjHD.s page 11 + + + 86 003c 5A61 str r2, [r3, #20] + 87 .loc 1 486 3 view .LVU18 + 88 003e 5A69 ldr r2, [r3, #20] + 89 0040 02F40032 and r2, r2, #131072 + 90 0044 0392 str r2, [sp, #12] + 91 .loc 1 486 3 view .LVU19 + 92 0046 039A ldr r2, [sp, #12] + 93 .LBE6: + 94 .loc 1 486 3 view .LVU20 + 487:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 95 .loc 1 487 3 view .LVU21 + 96 .LBB7: + 97 .loc 1 487 3 view .LVU22 + 98 .loc 1 487 3 view .LVU23 + 99 0048 5A69 ldr r2, [r3, #20] + 100 004a 42F48022 orr r2, r2, #262144 + 101 004e 5A61 str r2, [r3, #20] + 102 .loc 1 487 3 view .LVU24 + 103 0050 5B69 ldr r3, [r3, #20] + 104 0052 03F48023 and r3, r3, #262144 + 105 0056 0493 str r3, [sp, #16] + 106 .loc 1 487 3 view .LVU25 + 107 0058 049B ldr r3, [sp, #16] + 108 .LBE7: + 109 .loc 1 487 3 view .LVU26 + 488:Core/Src/main.c **** + 489:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 490:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, RELAY_EN_Pin|_60V_EN_Pin, GPIO_PIN_RESET); + 110 .loc 1 490 3 view .LVU27 + 111 005a 2246 mov r2, r4 + 112 005c 0321 movs r1, #3 + 113 005e 4FF09040 mov r0, #1207959552 + 114 0062 FFF7FEFF bl HAL_GPIO_WritePin + 115 .LVL0: + 491:Core/Src/main.c **** + 492:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 493:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, PRECHARGE_EN_Pin|AUX_IN_Pin, GPIO_PIN_RESET); + 116 .loc 1 493 3 view .LVU28 + 117 0066 224D ldr r5, .L3+4 + 118 0068 2246 mov r2, r4 + 119 006a 4FF42051 mov r1, #10240 + 120 006e 2846 mov r0, r5 + 121 0070 FFF7FEFF bl HAL_GPIO_WritePin + 122 .LVL1: + 494:Core/Src/main.c **** + 495:Core/Src/main.c **** /*Configure GPIO pins : PC13 PC14 PC15 */ + 496:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; + 123 .loc 1 496 3 view .LVU29 + 124 .loc 1 496 23 is_stmt 0 view .LVU30 + 125 0074 4FF46043 mov r3, #57344 + 126 0078 0593 str r3, [sp, #20] + 497:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 127 .loc 1 497 3 is_stmt 1 view .LVU31 + 128 .loc 1 497 24 is_stmt 0 view .LVU32 + 129 007a 0326 movs r6, #3 + 130 007c 0696 str r6, [sp, #24] + 498:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + ARM GAS /tmp/ccBZCjHD.s page 12 + + + 131 .loc 1 498 3 is_stmt 1 view .LVU33 + 132 .loc 1 498 24 is_stmt 0 view .LVU34 + 133 007e 0794 str r4, [sp, #28] + 499:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + 134 .loc 1 499 3 is_stmt 1 view .LVU35 + 135 0080 05A9 add r1, sp, #20 + 136 0082 1C48 ldr r0, .L3+8 + 137 0084 FFF7FEFF bl HAL_GPIO_Init + 138 .LVL2: + 500:Core/Src/main.c **** + 501:Core/Src/main.c **** /*Configure GPIO pins : RELAY_EN_Pin _60V_EN_Pin */ + 502:Core/Src/main.c **** GPIO_InitStruct.Pin = RELAY_EN_Pin|_60V_EN_Pin; + 139 .loc 1 502 3 view .LVU36 + 140 .loc 1 502 23 is_stmt 0 view .LVU37 + 141 0088 0596 str r6, [sp, #20] + 503:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 142 .loc 1 503 3 is_stmt 1 view .LVU38 + 143 .loc 1 503 24 is_stmt 0 view .LVU39 + 144 008a 0127 movs r7, #1 + 145 008c 0697 str r7, [sp, #24] + 504:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 146 .loc 1 504 3 is_stmt 1 view .LVU40 + 147 .loc 1 504 24 is_stmt 0 view .LVU41 + 148 008e 0794 str r4, [sp, #28] + 505:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 149 .loc 1 505 3 is_stmt 1 view .LVU42 + 150 .loc 1 505 25 is_stmt 0 view .LVU43 + 151 0090 0894 str r4, [sp, #32] + 506:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 152 .loc 1 506 3 is_stmt 1 view .LVU44 + 153 0092 05A9 add r1, sp, #20 + 154 0094 4FF09040 mov r0, #1207959552 + 155 0098 FFF7FEFF bl HAL_GPIO_Init + 156 .LVL3: + 507:Core/Src/main.c **** + 508:Core/Src/main.c **** /*Configure GPIO pins : STATUS_LED_R_Pin STATUS_LED_B_Pin STATUS_LED_G_Pin AUX_OUT_Pin */ + 509:Core/Src/main.c **** GPIO_InitStruct.Pin = STATUS_LED_R_Pin|STATUS_LED_B_Pin|STATUS_LED_G_Pin|AUX_OUT_Pin; + 157 .loc 1 509 3 view .LVU45 + 158 .loc 1 509 23 is_stmt 0 view .LVU46 + 159 009c 44F20703 movw r3, #16391 + 160 00a0 0593 str r3, [sp, #20] + 510:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 161 .loc 1 510 3 is_stmt 1 view .LVU47 + 162 .loc 1 510 24 is_stmt 0 view .LVU48 + 163 00a2 0694 str r4, [sp, #24] + 511:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 164 .loc 1 511 3 is_stmt 1 view .LVU49 + 165 .loc 1 511 24 is_stmt 0 view .LVU50 + 166 00a4 0794 str r4, [sp, #28] + 512:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 167 .loc 1 512 3 is_stmt 1 view .LVU51 + 168 00a6 05A9 add r1, sp, #20 + 169 00a8 2846 mov r0, r5 + 170 00aa FFF7FEFF bl HAL_GPIO_Init + 171 .LVL4: + 513:Core/Src/main.c **** + 514:Core/Src/main.c **** /*Configure GPIO pins : PB10 PB12 PB4 PB5 + ARM GAS /tmp/ccBZCjHD.s page 13 + + + 515:Core/Src/main.c **** PB8 */ + 516:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_12|GPIO_PIN_4|GPIO_PIN_5 + 172 .loc 1 516 3 view .LVU52 + 173 .loc 1 516 23 is_stmt 0 view .LVU53 + 174 00ae 41F23053 movw r3, #5424 + 175 00b2 0593 str r3, [sp, #20] + 517:Core/Src/main.c **** |GPIO_PIN_8; + 518:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 176 .loc 1 518 3 is_stmt 1 view .LVU54 + 177 .loc 1 518 24 is_stmt 0 view .LVU55 + 178 00b4 0696 str r6, [sp, #24] + 519:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 179 .loc 1 519 3 is_stmt 1 view .LVU56 + 180 .loc 1 519 24 is_stmt 0 view .LVU57 + 181 00b6 0794 str r4, [sp, #28] + 520:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 182 .loc 1 520 3 is_stmt 1 view .LVU58 + 183 00b8 05A9 add r1, sp, #20 + 184 00ba 2846 mov r0, r5 + 185 00bc FFF7FEFF bl HAL_GPIO_Init + 186 .LVL5: + 521:Core/Src/main.c **** + 522:Core/Src/main.c **** /*Configure GPIO pins : PRECHARGE_EN_Pin AUX_IN_Pin */ + 523:Core/Src/main.c **** GPIO_InitStruct.Pin = PRECHARGE_EN_Pin|AUX_IN_Pin; + 187 .loc 1 523 3 view .LVU59 + 188 .loc 1 523 23 is_stmt 0 view .LVU60 + 189 00c0 4FF42053 mov r3, #10240 + 190 00c4 0593 str r3, [sp, #20] + 524:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 191 .loc 1 524 3 is_stmt 1 view .LVU61 + 192 .loc 1 524 24 is_stmt 0 view .LVU62 + 193 00c6 0697 str r7, [sp, #24] + 525:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 194 .loc 1 525 3 is_stmt 1 view .LVU63 + 195 .loc 1 525 24 is_stmt 0 view .LVU64 + 196 00c8 0794 str r4, [sp, #28] + 526:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 197 .loc 1 526 3 is_stmt 1 view .LVU65 + 198 .loc 1 526 25 is_stmt 0 view .LVU66 + 199 00ca 0894 str r4, [sp, #32] + 527:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 200 .loc 1 527 3 is_stmt 1 view .LVU67 + 201 00cc 05A9 add r1, sp, #20 + 202 00ce 2846 mov r0, r5 + 203 00d0 FFF7FEFF bl HAL_GPIO_Init + 204 .LVL6: + 528:Core/Src/main.c **** + 529:Core/Src/main.c **** /*Configure GPIO pins : RELAY_BATT_SIDE_ON_Pin RELAY_ESC_SIDE_ON_Pin CURRENT_SENSOR_ON_Pin */ + 530:Core/Src/main.c **** GPIO_InitStruct.Pin = RELAY_BATT_SIDE_ON_Pin|RELAY_ESC_SIDE_ON_Pin|CURRENT_SENSOR_ON_Pin; + 205 .loc 1 530 3 view .LVU68 + 206 .loc 1 530 23 is_stmt 0 view .LVU69 + 207 00d4 4FF4E063 mov r3, #1792 + 208 00d8 0593 str r3, [sp, #20] + 531:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 209 .loc 1 531 3 is_stmt 1 view .LVU70 + 210 .loc 1 531 24 is_stmt 0 view .LVU71 + 211 00da 0694 str r4, [sp, #24] + ARM GAS /tmp/ccBZCjHD.s page 14 + + + 532:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 212 .loc 1 532 3 is_stmt 1 view .LVU72 + 213 .loc 1 532 24 is_stmt 0 view .LVU73 + 214 00dc 0794 str r4, [sp, #28] + 533:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 215 .loc 1 533 3 is_stmt 1 view .LVU74 + 216 00de 05A9 add r1, sp, #20 + 217 00e0 4FF09040 mov r0, #1207959552 + 218 00e4 FFF7FEFF bl HAL_GPIO_Init + 219 .LVL7: + 534:Core/Src/main.c **** + 535:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ + 536:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + 537:Core/Src/main.c **** } + 220 .loc 1 537 1 is_stmt 0 view .LVU75 + 221 00e8 0BB0 add sp, sp, #44 + 222 .cfi_def_cfa_offset 20 + 223 @ sp needed + 224 00ea F0BD pop {r4, r5, r6, r7, pc} + 225 .L4: + 226 .align 2 + 227 .L3: + 228 00ec 00100240 .word 1073876992 + 229 00f0 00040048 .word 1207960576 + 230 00f4 00080048 .word 1207961600 + 231 .cfi_endproc + 232 .LFE138: + 234 .section .text.Error_Handler,"ax",%progbits + 235 .align 1 + 236 .global Error_Handler + 237 .syntax unified + 238 .thumb + 239 .thumb_func + 241 Error_Handler: + 242 .LFB139: + 538:Core/Src/main.c **** + 539:Core/Src/main.c **** /* USER CODE BEGIN 4 */ + 540:Core/Src/main.c **** + 541:Core/Src/main.c **** /* USER CODE END 4 */ + 542:Core/Src/main.c **** + 543:Core/Src/main.c **** /** + 544:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 545:Core/Src/main.c **** * @retval None + 546:Core/Src/main.c **** */ + 547:Core/Src/main.c **** void Error_Handler(void) + 548:Core/Src/main.c **** { + 243 .loc 1 548 1 is_stmt 1 view -0 + 244 .cfi_startproc + 245 @ Volatile: function does not return. + 246 @ args = 0, pretend = 0, frame = 0 + 247 @ frame_needed = 0, uses_anonymous_args = 0 + 248 @ link register save eliminated. + 549:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 550:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 551:Core/Src/main.c **** __disable_irq(); + 249 .loc 1 551 3 view .LVU77 + 250 .LBB8: + ARM GAS /tmp/ccBZCjHD.s page 15 + + + 251 .LBI8: + 252 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + ARM GAS /tmp/ccBZCjHD.s page 16 + + + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccBZCjHD.s page 17 + + + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 253 .loc 2 140 27 view .LVU78 + 254 .LBB9: + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 255 .loc 2 142 3 view .LVU79 + 256 .syntax unified + 257 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 258 0000 72B6 cpsid i + 259 @ 0 "" 2 + 260 .thumb + 261 .syntax unified + 262 .L6: + 263 .LBE9: + 264 .LBE8: + 552:Core/Src/main.c **** while (1) + 265 .loc 1 552 3 view .LVU80 + 553:Core/Src/main.c **** { + 554:Core/Src/main.c **** } + 266 .loc 1 554 3 view .LVU81 + 552:Core/Src/main.c **** while (1) + 267 .loc 1 552 9 view .LVU82 + 268 0002 FEE7 b .L6 + 269 .cfi_endproc + 270 .LFE139: + 272 .section .text.MX_CAN_Init,"ax",%progbits + 273 .align 1 + 274 .syntax unified + 275 .thumb + 276 .thumb_func + ARM GAS /tmp/ccBZCjHD.s page 18 + + + 278 MX_CAN_Init: + 279 .LFB132: + 178:Core/Src/main.c **** + 280 .loc 1 178 1 view -0 + 281 .cfi_startproc + 282 @ args = 0, pretend = 0, frame = 0 + 283 @ frame_needed = 0, uses_anonymous_args = 0 + 284 0000 08B5 push {r3, lr} + 285 .cfi_def_cfa_offset 8 + 286 .cfi_offset 3, -8 + 287 .cfi_offset 14, -4 + 187:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 288 .loc 1 187 3 view .LVU84 + 187:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 289 .loc 1 187 17 is_stmt 0 view .LVU85 + 290 0002 0B48 ldr r0, .L11 + 291 0004 0B4B ldr r3, .L11+4 + 292 0006 0360 str r3, [r0] + 188:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 293 .loc 1 188 3 is_stmt 1 view .LVU86 + 188:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 294 .loc 1 188 23 is_stmt 0 view .LVU87 + 295 0008 1023 movs r3, #16 + 296 000a 4360 str r3, [r0, #4] + 189:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 297 .loc 1 189 3 is_stmt 1 view .LVU88 + 189:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 298 .loc 1 189 18 is_stmt 0 view .LVU89 + 299 000c 0023 movs r3, #0 + 300 000e 8360 str r3, [r0, #8] + 190:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 301 .loc 1 190 3 is_stmt 1 view .LVU90 + 190:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 302 .loc 1 190 27 is_stmt 0 view .LVU91 + 303 0010 C360 str r3, [r0, #12] + 191:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 304 .loc 1 191 3 is_stmt 1 view .LVU92 + 191:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 305 .loc 1 191 22 is_stmt 0 view .LVU93 + 306 0012 0361 str r3, [r0, #16] + 192:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 307 .loc 1 192 3 is_stmt 1 view .LVU94 + 192:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 308 .loc 1 192 22 is_stmt 0 view .LVU95 + 309 0014 4361 str r3, [r0, #20] + 193:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 310 .loc 1 193 3 is_stmt 1 view .LVU96 + 193:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 311 .loc 1 193 31 is_stmt 0 view .LVU97 + 312 0016 0376 strb r3, [r0, #24] + 194:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 313 .loc 1 194 3 is_stmt 1 view .LVU98 + 194:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 314 .loc 1 194 24 is_stmt 0 view .LVU99 + 315 0018 4376 strb r3, [r0, #25] + 195:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 316 .loc 1 195 3 is_stmt 1 view .LVU100 + ARM GAS /tmp/ccBZCjHD.s page 19 + + + 195:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 317 .loc 1 195 24 is_stmt 0 view .LVU101 + 318 001a 8376 strb r3, [r0, #26] + 196:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 319 .loc 1 196 3 is_stmt 1 view .LVU102 + 196:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 320 .loc 1 196 32 is_stmt 0 view .LVU103 + 321 001c C376 strb r3, [r0, #27] + 197:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 322 .loc 1 197 3 is_stmt 1 view .LVU104 + 197:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 323 .loc 1 197 31 is_stmt 0 view .LVU105 + 324 001e 0377 strb r3, [r0, #28] + 198:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 325 .loc 1 198 3 is_stmt 1 view .LVU106 + 198:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 326 .loc 1 198 34 is_stmt 0 view .LVU107 + 327 0020 4377 strb r3, [r0, #29] + 199:Core/Src/main.c **** { + 328 .loc 1 199 3 is_stmt 1 view .LVU108 + 199:Core/Src/main.c **** { + 329 .loc 1 199 7 is_stmt 0 view .LVU109 + 330 0022 FFF7FEFF bl HAL_CAN_Init + 331 .LVL8: + 199:Core/Src/main.c **** { + 332 .loc 1 199 6 discriminator 1 view .LVU110 + 333 0026 00B9 cbnz r0, .L10 + 207:Core/Src/main.c **** + 334 .loc 1 207 1 view .LVU111 + 335 0028 08BD pop {r3, pc} + 336 .L10: + 201:Core/Src/main.c **** } + 337 .loc 1 201 5 is_stmt 1 view .LVU112 + 338 002a FFF7FEFF bl Error_Handler + 339 .LVL9: + 340 .L12: + 341 002e 00BF .align 2 + 342 .L11: + 343 0030 00000000 .word hcan + 344 0034 00640040 .word 1073767424 + 345 .cfi_endproc + 346 .LFE132: + 348 .section .text.MX_I2C1_Init,"ax",%progbits + 349 .align 1 + 350 .syntax unified + 351 .thumb + 352 .thumb_func + 354 MX_I2C1_Init: + 355 .LFB133: + 215:Core/Src/main.c **** + 356 .loc 1 215 1 view -0 + 357 .cfi_startproc + 358 @ args = 0, pretend = 0, frame = 0 + 359 @ frame_needed = 0, uses_anonymous_args = 0 + 360 0000 08B5 push {r3, lr} + 361 .cfi_def_cfa_offset 8 + 362 .cfi_offset 3, -8 + ARM GAS /tmp/ccBZCjHD.s page 20 + + + 363 .cfi_offset 14, -4 + 224:Core/Src/main.c **** hi2c1.Init.Timing = 0x2000090E; + 364 .loc 1 224 3 view .LVU114 + 224:Core/Src/main.c **** hi2c1.Init.Timing = 0x2000090E; + 365 .loc 1 224 18 is_stmt 0 view .LVU115 + 366 0002 1148 ldr r0, .L21 + 367 0004 114B ldr r3, .L21+4 + 368 0006 0360 str r3, [r0] + 225:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; + 369 .loc 1 225 3 is_stmt 1 view .LVU116 + 225:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; + 370 .loc 1 225 21 is_stmt 0 view .LVU117 + 371 0008 114B ldr r3, .L21+8 + 372 000a 4360 str r3, [r0, #4] + 226:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + 373 .loc 1 226 3 is_stmt 1 view .LVU118 + 226:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + 374 .loc 1 226 26 is_stmt 0 view .LVU119 + 375 000c 0023 movs r3, #0 + 376 000e 8360 str r3, [r0, #8] + 227:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + 377 .loc 1 227 3 is_stmt 1 view .LVU120 + 227:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + 378 .loc 1 227 29 is_stmt 0 view .LVU121 + 379 0010 0122 movs r2, #1 + 380 0012 C260 str r2, [r0, #12] + 228:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; + 381 .loc 1 228 3 is_stmt 1 view .LVU122 + 228:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; + 382 .loc 1 228 30 is_stmt 0 view .LVU123 + 383 0014 0361 str r3, [r0, #16] + 229:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + 384 .loc 1 229 3 is_stmt 1 view .LVU124 + 229:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + 385 .loc 1 229 26 is_stmt 0 view .LVU125 + 386 0016 4361 str r3, [r0, #20] + 230:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + 387 .loc 1 230 3 is_stmt 1 view .LVU126 + 230:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + 388 .loc 1 230 31 is_stmt 0 view .LVU127 + 389 0018 8361 str r3, [r0, #24] + 231:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + 390 .loc 1 231 3 is_stmt 1 view .LVU128 + 231:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + 391 .loc 1 231 30 is_stmt 0 view .LVU129 + 392 001a C361 str r3, [r0, #28] + 232:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) + 393 .loc 1 232 3 is_stmt 1 view .LVU130 + 232:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) + 394 .loc 1 232 28 is_stmt 0 view .LVU131 + 395 001c 0362 str r3, [r0, #32] + 233:Core/Src/main.c **** { + 396 .loc 1 233 3 is_stmt 1 view .LVU132 + 233:Core/Src/main.c **** { + 397 .loc 1 233 7 is_stmt 0 view .LVU133 + 398 001e FFF7FEFF bl HAL_I2C_Init + 399 .LVL10: + ARM GAS /tmp/ccBZCjHD.s page 21 + + + 233:Core/Src/main.c **** { + 400 .loc 1 233 6 discriminator 1 view .LVU134 + 401 0022 50B9 cbnz r0, .L18 + 240:Core/Src/main.c **** { + 402 .loc 1 240 3 is_stmt 1 view .LVU135 + 240:Core/Src/main.c **** { + 403 .loc 1 240 7 is_stmt 0 view .LVU136 + 404 0024 0021 movs r1, #0 + 405 0026 0848 ldr r0, .L21 + 406 0028 FFF7FEFF bl HAL_I2CEx_ConfigAnalogFilter + 407 .LVL11: + 240:Core/Src/main.c **** { + 408 .loc 1 240 6 discriminator 1 view .LVU137 + 409 002c 38B9 cbnz r0, .L19 + 247:Core/Src/main.c **** { + 410 .loc 1 247 3 is_stmt 1 view .LVU138 + 247:Core/Src/main.c **** { + 411 .loc 1 247 7 is_stmt 0 view .LVU139 + 412 002e 0021 movs r1, #0 + 413 0030 0548 ldr r0, .L21 + 414 0032 FFF7FEFF bl HAL_I2CEx_ConfigDigitalFilter + 415 .LVL12: + 247:Core/Src/main.c **** { + 416 .loc 1 247 6 discriminator 1 view .LVU140 + 417 0036 20B9 cbnz r0, .L20 + 255:Core/Src/main.c **** + 418 .loc 1 255 1 view .LVU141 + 419 0038 08BD pop {r3, pc} + 420 .L18: + 235:Core/Src/main.c **** } + 421 .loc 1 235 5 is_stmt 1 view .LVU142 + 422 003a FFF7FEFF bl Error_Handler + 423 .LVL13: + 424 .L19: + 242:Core/Src/main.c **** } + 425 .loc 1 242 5 view .LVU143 + 426 003e FFF7FEFF bl Error_Handler + 427 .LVL14: + 428 .L20: + 249:Core/Src/main.c **** } + 429 .loc 1 249 5 view .LVU144 + 430 0042 FFF7FEFF bl Error_Handler + 431 .LVL15: + 432 .L22: + 433 0046 00BF .align 2 + 434 .L21: + 435 0048 00000000 .word hi2c1 + 436 004c 00540040 .word 1073763328 + 437 0050 0E090020 .word 536873230 + 438 .cfi_endproc + 439 .LFE133: + 441 .section .text.MX_SPI1_Init,"ax",%progbits + 442 .align 1 + 443 .syntax unified + 444 .thumb + 445 .thumb_func + 447 MX_SPI1_Init: + ARM GAS /tmp/ccBZCjHD.s page 22 + + + 448 .LFB134: + 263:Core/Src/main.c **** + 449 .loc 1 263 1 view -0 + 450 .cfi_startproc + 451 @ args = 0, pretend = 0, frame = 0 + 452 @ frame_needed = 0, uses_anonymous_args = 0 + 453 0000 08B5 push {r3, lr} + 454 .cfi_def_cfa_offset 8 + 455 .cfi_offset 3, -8 + 456 .cfi_offset 14, -4 + 273:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER; + 457 .loc 1 273 3 view .LVU146 + 273:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER; + 458 .loc 1 273 18 is_stmt 0 view .LVU147 + 459 0002 0E48 ldr r0, .L27 + 460 0004 0E4B ldr r3, .L27+4 + 461 0006 0360 str r3, [r0] + 274:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_2LINES; + 462 .loc 1 274 3 is_stmt 1 view .LVU148 + 274:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_2LINES; + 463 .loc 1 274 19 is_stmt 0 view .LVU149 + 464 0008 4FF48273 mov r3, #260 + 465 000c 4360 str r3, [r0, #4] + 275:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + 466 .loc 1 275 3 is_stmt 1 view .LVU150 + 275:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + 467 .loc 1 275 24 is_stmt 0 view .LVU151 + 468 000e 0023 movs r3, #0 + 469 0010 8360 str r3, [r0, #8] + 276:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + 470 .loc 1 276 3 is_stmt 1 view .LVU152 + 276:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + 471 .loc 1 276 23 is_stmt 0 view .LVU153 + 472 0012 4FF44072 mov r2, #768 + 473 0016 C260 str r2, [r0, #12] + 277:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + 474 .loc 1 277 3 is_stmt 1 view .LVU154 + 277:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + 475 .loc 1 277 26 is_stmt 0 view .LVU155 + 476 0018 0361 str r3, [r0, #16] + 278:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_HARD_INPUT; + 477 .loc 1 278 3 is_stmt 1 view .LVU156 + 278:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_HARD_INPUT; + 478 .loc 1 278 23 is_stmt 0 view .LVU157 + 479 001a 4361 str r3, [r0, #20] + 279:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + 480 .loc 1 279 3 is_stmt 1 view .LVU158 + 279:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + 481 .loc 1 279 18 is_stmt 0 view .LVU159 + 482 001c 8361 str r3, [r0, #24] + 280:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + 483 .loc 1 280 3 is_stmt 1 view .LVU160 + 280:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + 484 .loc 1 280 32 is_stmt 0 view .LVU161 + 485 001e C361 str r3, [r0, #28] + 281:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + 486 .loc 1 281 3 is_stmt 1 view .LVU162 + ARM GAS /tmp/ccBZCjHD.s page 23 + + + 281:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + 487 .loc 1 281 23 is_stmt 0 view .LVU163 + 488 0020 0362 str r3, [r0, #32] + 282:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 489 .loc 1 282 3 is_stmt 1 view .LVU164 + 282:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 490 .loc 1 282 21 is_stmt 0 view .LVU165 + 491 0022 4362 str r3, [r0, #36] + 283:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 7; + 492 .loc 1 283 3 is_stmt 1 view .LVU166 + 283:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 7; + 493 .loc 1 283 29 is_stmt 0 view .LVU167 + 494 0024 8362 str r3, [r0, #40] + 284:Core/Src/main.c **** hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + 495 .loc 1 284 3 is_stmt 1 view .LVU168 + 284:Core/Src/main.c **** hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + 496 .loc 1 284 28 is_stmt 0 view .LVU169 + 497 0026 0722 movs r2, #7 + 498 0028 C262 str r2, [r0, #44] + 285:Core/Src/main.c **** hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + 499 .loc 1 285 3 is_stmt 1 view .LVU170 + 285:Core/Src/main.c **** hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + 500 .loc 1 285 24 is_stmt 0 view .LVU171 + 501 002a 0363 str r3, [r0, #48] + 286:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK) + 502 .loc 1 286 3 is_stmt 1 view .LVU172 + 286:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK) + 503 .loc 1 286 23 is_stmt 0 view .LVU173 + 504 002c 0823 movs r3, #8 + 505 002e 4363 str r3, [r0, #52] + 287:Core/Src/main.c **** { + 506 .loc 1 287 3 is_stmt 1 view .LVU174 + 287:Core/Src/main.c **** { + 507 .loc 1 287 7 is_stmt 0 view .LVU175 + 508 0030 FFF7FEFF bl HAL_SPI_Init + 509 .LVL16: + 287:Core/Src/main.c **** { + 510 .loc 1 287 6 discriminator 1 view .LVU176 + 511 0034 00B9 cbnz r0, .L26 + 295:Core/Src/main.c **** + 512 .loc 1 295 1 view .LVU177 + 513 0036 08BD pop {r3, pc} + 514 .L26: + 289:Core/Src/main.c **** } + 515 .loc 1 289 5 is_stmt 1 view .LVU178 + 516 0038 FFF7FEFF bl Error_Handler + 517 .LVL17: + 518 .L28: + 519 .align 2 + 520 .L27: + 521 003c 00000000 .word hspi1 + 522 0040 00300140 .word 1073819648 + 523 .cfi_endproc + 524 .LFE134: + 526 .section .text.MX_TIM15_Init,"ax",%progbits + 527 .align 1 + 528 .syntax unified + ARM GAS /tmp/ccBZCjHD.s page 24 + + + 529 .thumb + 530 .thumb_func + 532 MX_TIM15_Init: + 533 .LFB136: + 373:Core/Src/main.c **** + 534 .loc 1 373 1 view -0 + 535 .cfi_startproc + 536 @ args = 0, pretend = 0, frame = 88 + 537 @ frame_needed = 0, uses_anonymous_args = 0 + 538 0000 10B5 push {r4, lr} + 539 .cfi_def_cfa_offset 8 + 540 .cfi_offset 4, -8 + 541 .cfi_offset 14, -4 + 542 0002 96B0 sub sp, sp, #88 + 543 .cfi_def_cfa_offset 96 + 379:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 544 .loc 1 379 3 view .LVU180 + 379:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 545 .loc 1 379 27 is_stmt 0 view .LVU181 + 546 0004 0024 movs r4, #0 + 547 0006 1394 str r4, [sp, #76] + 548 0008 1494 str r4, [sp, #80] + 549 000a 1594 str r4, [sp, #84] + 380:Core/Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 550 .loc 1 380 3 is_stmt 1 view .LVU182 + 380:Core/Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 551 .loc 1 380 22 is_stmt 0 view .LVU183 + 552 000c 0C94 str r4, [sp, #48] + 553 000e 0D94 str r4, [sp, #52] + 554 0010 0E94 str r4, [sp, #56] + 555 0012 0F94 str r4, [sp, #60] + 556 0014 1094 str r4, [sp, #64] + 557 0016 1194 str r4, [sp, #68] + 558 0018 1294 str r4, [sp, #72] + 381:Core/Src/main.c **** + 559 .loc 1 381 3 is_stmt 1 view .LVU184 + 381:Core/Src/main.c **** + 560 .loc 1 381 34 is_stmt 0 view .LVU185 + 561 001a 2C22 movs r2, #44 + 562 001c 2146 mov r1, r4 + 563 001e 01A8 add r0, sp, #4 + 564 0020 FFF7FEFF bl memset + 565 .LVL18: + 386:Core/Src/main.c **** htim15.Init.Prescaler = 0; + 566 .loc 1 386 3 is_stmt 1 view .LVU186 + 386:Core/Src/main.c **** htim15.Init.Prescaler = 0; + 567 .loc 1 386 19 is_stmt 0 view .LVU187 + 568 0024 2548 ldr r0, .L41 + 569 0026 264B ldr r3, .L41+4 + 570 0028 0360 str r3, [r0] + 387:Core/Src/main.c **** htim15.Init.CounterMode = TIM_COUNTERMODE_UP; + 571 .loc 1 387 3 is_stmt 1 view .LVU188 + 387:Core/Src/main.c **** htim15.Init.CounterMode = TIM_COUNTERMODE_UP; + 572 .loc 1 387 25 is_stmt 0 view .LVU189 + 573 002a 4460 str r4, [r0, #4] + 388:Core/Src/main.c **** htim15.Init.Period = 65535; + 574 .loc 1 388 3 is_stmt 1 view .LVU190 + ARM GAS /tmp/ccBZCjHD.s page 25 + + + 388:Core/Src/main.c **** htim15.Init.Period = 65535; + 575 .loc 1 388 27 is_stmt 0 view .LVU191 + 576 002c 8460 str r4, [r0, #8] + 389:Core/Src/main.c **** htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 577 .loc 1 389 3 is_stmt 1 view .LVU192 + 389:Core/Src/main.c **** htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 578 .loc 1 389 22 is_stmt 0 view .LVU193 + 579 002e 4FF6FF73 movw r3, #65535 + 580 0032 C360 str r3, [r0, #12] + 390:Core/Src/main.c **** htim15.Init.RepetitionCounter = 0; + 581 .loc 1 390 3 is_stmt 1 view .LVU194 + 390:Core/Src/main.c **** htim15.Init.RepetitionCounter = 0; + 582 .loc 1 390 29 is_stmt 0 view .LVU195 + 583 0034 0461 str r4, [r0, #16] + 391:Core/Src/main.c **** htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 584 .loc 1 391 3 is_stmt 1 view .LVU196 + 391:Core/Src/main.c **** htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 585 .loc 1 391 33 is_stmt 0 view .LVU197 + 586 0036 4461 str r4, [r0, #20] + 392:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim15) != HAL_OK) + 587 .loc 1 392 3 is_stmt 1 view .LVU198 + 392:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim15) != HAL_OK) + 588 .loc 1 392 33 is_stmt 0 view .LVU199 + 589 0038 8461 str r4, [r0, #24] + 393:Core/Src/main.c **** { + 590 .loc 1 393 3 is_stmt 1 view .LVU200 + 393:Core/Src/main.c **** { + 591 .loc 1 393 7 is_stmt 0 view .LVU201 + 592 003a FFF7FEFF bl HAL_TIM_PWM_Init + 593 .LVL19: + 393:Core/Src/main.c **** { + 594 .loc 1 393 6 discriminator 1 view .LVU202 + 595 003e 0028 cmp r0, #0 + 596 0040 31D1 bne .L36 + 397:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 597 .loc 1 397 3 is_stmt 1 view .LVU203 + 397:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 598 .loc 1 397 37 is_stmt 0 view .LVU204 + 599 0042 0023 movs r3, #0 + 600 0044 1393 str r3, [sp, #76] + 398:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK) + 601 .loc 1 398 3 is_stmt 1 view .LVU205 + 398:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK) + 602 .loc 1 398 33 is_stmt 0 view .LVU206 + 603 0046 1593 str r3, [sp, #84] + 399:Core/Src/main.c **** { + 604 .loc 1 399 3 is_stmt 1 view .LVU207 + 399:Core/Src/main.c **** { + 605 .loc 1 399 7 is_stmt 0 view .LVU208 + 606 0048 13A9 add r1, sp, #76 + 607 004a 1C48 ldr r0, .L41 + 608 004c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 609 .LVL20: + 399:Core/Src/main.c **** { + 610 .loc 1 399 6 discriminator 1 view .LVU209 + 611 0050 0028 cmp r0, #0 + 612 0052 2AD1 bne .L37 + ARM GAS /tmp/ccBZCjHD.s page 26 + + + 403:Core/Src/main.c **** sConfigOC.Pulse = 0; + 613 .loc 1 403 3 is_stmt 1 view .LVU210 + 403:Core/Src/main.c **** sConfigOC.Pulse = 0; + 614 .loc 1 403 20 is_stmt 0 view .LVU211 + 615 0054 6023 movs r3, #96 + 616 0056 0C93 str r3, [sp, #48] + 404:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 617 .loc 1 404 3 is_stmt 1 view .LVU212 + 404:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 618 .loc 1 404 19 is_stmt 0 view .LVU213 + 619 0058 0022 movs r2, #0 + 620 005a 0D92 str r2, [sp, #52] + 405:Core/Src/main.c **** sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 621 .loc 1 405 3 is_stmt 1 view .LVU214 + 405:Core/Src/main.c **** sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 622 .loc 1 405 24 is_stmt 0 view .LVU215 + 623 005c 0E92 str r2, [sp, #56] + 406:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 624 .loc 1 406 3 is_stmt 1 view .LVU216 + 406:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 625 .loc 1 406 25 is_stmt 0 view .LVU217 + 626 005e 0F92 str r2, [sp, #60] + 407:Core/Src/main.c **** sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + 627 .loc 1 407 3 is_stmt 1 view .LVU218 + 407:Core/Src/main.c **** sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + 628 .loc 1 407 24 is_stmt 0 view .LVU219 + 629 0060 1092 str r2, [sp, #64] + 408:Core/Src/main.c **** sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 630 .loc 1 408 3 is_stmt 1 view .LVU220 + 408:Core/Src/main.c **** sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 631 .loc 1 408 25 is_stmt 0 view .LVU221 + 632 0062 1192 str r2, [sp, #68] + 409:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim15, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 633 .loc 1 409 3 is_stmt 1 view .LVU222 + 409:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim15, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 634 .loc 1 409 26 is_stmt 0 view .LVU223 + 635 0064 1292 str r2, [sp, #72] + 410:Core/Src/main.c **** { + 636 .loc 1 410 3 is_stmt 1 view .LVU224 + 410:Core/Src/main.c **** { + 637 .loc 1 410 7 is_stmt 0 view .LVU225 + 638 0066 0CA9 add r1, sp, #48 + 639 0068 1448 ldr r0, .L41 + 640 006a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 641 .LVL21: + 410:Core/Src/main.c **** { + 642 .loc 1 410 6 discriminator 1 view .LVU226 + 643 006e F0B9 cbnz r0, .L38 + 414:Core/Src/main.c **** { + 644 .loc 1 414 3 is_stmt 1 view .LVU227 + 414:Core/Src/main.c **** { + 645 .loc 1 414 7 is_stmt 0 view .LVU228 + 646 0070 0422 movs r2, #4 + 647 0072 0CA9 add r1, sp, #48 + 648 0074 1148 ldr r0, .L41 + 649 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 650 .LVL22: + ARM GAS /tmp/ccBZCjHD.s page 27 + + + 414:Core/Src/main.c **** { + 651 .loc 1 414 6 discriminator 1 view .LVU229 + 652 007a D0B9 cbnz r0, .L39 + 418:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 653 .loc 1 418 3 is_stmt 1 view .LVU230 + 418:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 654 .loc 1 418 40 is_stmt 0 view .LVU231 + 655 007c 0023 movs r3, #0 + 656 007e 0193 str r3, [sp, #4] + 419:Core/Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 657 .loc 1 419 3 is_stmt 1 view .LVU232 + 419:Core/Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 658 .loc 1 419 41 is_stmt 0 view .LVU233 + 659 0080 0293 str r3, [sp, #8] + 420:Core/Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 660 .loc 1 420 3 is_stmt 1 view .LVU234 + 420:Core/Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 661 .loc 1 420 34 is_stmt 0 view .LVU235 + 662 0082 0393 str r3, [sp, #12] + 421:Core/Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 663 .loc 1 421 3 is_stmt 1 view .LVU236 + 421:Core/Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 664 .loc 1 421 33 is_stmt 0 view .LVU237 + 665 0084 0493 str r3, [sp, #16] + 422:Core/Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 666 .loc 1 422 3 is_stmt 1 view .LVU238 + 422:Core/Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 667 .loc 1 422 35 is_stmt 0 view .LVU239 + 668 0086 0593 str r3, [sp, #20] + 423:Core/Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 669 .loc 1 423 3 is_stmt 1 view .LVU240 + 423:Core/Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 670 .loc 1 423 38 is_stmt 0 view .LVU241 + 671 0088 4FF40052 mov r2, #8192 + 672 008c 0692 str r2, [sp, #24] + 424:Core/Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 673 .loc 1 424 3 is_stmt 1 view .LVU242 + 424:Core/Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 674 .loc 1 424 36 is_stmt 0 view .LVU243 + 675 008e 0793 str r3, [sp, #28] + 425:Core/Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim15, &sBreakDeadTimeConfig) != HAL_OK) + 676 .loc 1 425 3 is_stmt 1 view .LVU244 + 425:Core/Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim15, &sBreakDeadTimeConfig) != HAL_OK) + 677 .loc 1 425 40 is_stmt 0 view .LVU245 + 678 0090 0B93 str r3, [sp, #44] + 426:Core/Src/main.c **** { + 679 .loc 1 426 3 is_stmt 1 view .LVU246 + 426:Core/Src/main.c **** { + 680 .loc 1 426 7 is_stmt 0 view .LVU247 + 681 0092 01A9 add r1, sp, #4 + 682 0094 0948 ldr r0, .L41 + 683 0096 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime + 684 .LVL23: + 426:Core/Src/main.c **** { + 685 .loc 1 426 6 discriminator 1 view .LVU248 + 686 009a 60B9 cbnz r0, .L40 + 433:Core/Src/main.c **** + ARM GAS /tmp/ccBZCjHD.s page 28 + + + 687 .loc 1 433 3 is_stmt 1 view .LVU249 + 688 009c 0748 ldr r0, .L41 + 689 009e FFF7FEFF bl HAL_TIM_MspPostInit + 690 .LVL24: + 435:Core/Src/main.c **** + 691 .loc 1 435 1 is_stmt 0 view .LVU250 + 692 00a2 16B0 add sp, sp, #88 + 693 .cfi_remember_state + 694 .cfi_def_cfa_offset 8 + 695 @ sp needed + 696 00a4 10BD pop {r4, pc} + 697 .L36: + 698 .cfi_restore_state + 395:Core/Src/main.c **** } + 699 .loc 1 395 5 is_stmt 1 view .LVU251 + 700 00a6 FFF7FEFF bl Error_Handler + 701 .LVL25: + 702 .L37: + 401:Core/Src/main.c **** } + 703 .loc 1 401 5 view .LVU252 + 704 00aa FFF7FEFF bl Error_Handler + 705 .LVL26: + 706 .L38: + 412:Core/Src/main.c **** } + 707 .loc 1 412 5 view .LVU253 + 708 00ae FFF7FEFF bl Error_Handler + 709 .LVL27: + 710 .L39: + 416:Core/Src/main.c **** } + 711 .loc 1 416 5 view .LVU254 + 712 00b2 FFF7FEFF bl Error_Handler + 713 .LVL28: + 714 .L40: + 428:Core/Src/main.c **** } + 715 .loc 1 428 5 view .LVU255 + 716 00b6 FFF7FEFF bl Error_Handler + 717 .LVL29: + 718 .L42: + 719 00ba 00BF .align 2 + 720 .L41: + 721 00bc 00000000 .word htim15 + 722 00c0 00400140 .word 1073823744 + 723 .cfi_endproc + 724 .LFE136: + 726 .section .text.MX_USART1_UART_Init,"ax",%progbits + 727 .align 1 + 728 .syntax unified + 729 .thumb + 730 .thumb_func + 732 MX_USART1_UART_Init: + 733 .LFB137: + 443:Core/Src/main.c **** + 734 .loc 1 443 1 view -0 + 735 .cfi_startproc + 736 @ args = 0, pretend = 0, frame = 0 + 737 @ frame_needed = 0, uses_anonymous_args = 0 + 738 0000 08B5 push {r3, lr} + ARM GAS /tmp/ccBZCjHD.s page 29 + + + 739 .cfi_def_cfa_offset 8 + 740 .cfi_offset 3, -8 + 741 .cfi_offset 14, -4 + 452:Core/Src/main.c **** huart1.Init.BaudRate = 38400; + 742 .loc 1 452 3 view .LVU257 + 452:Core/Src/main.c **** huart1.Init.BaudRate = 38400; + 743 .loc 1 452 19 is_stmt 0 view .LVU258 + 744 0002 0B48 ldr r0, .L47 + 745 0004 0B4B ldr r3, .L47+4 + 746 0006 0360 str r3, [r0] + 453:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; + 747 .loc 1 453 3 is_stmt 1 view .LVU259 + 453:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; + 748 .loc 1 453 24 is_stmt 0 view .LVU260 + 749 0008 4FF41643 mov r3, #38400 + 750 000c 4360 str r3, [r0, #4] + 454:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; + 751 .loc 1 454 3 is_stmt 1 view .LVU261 + 454:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; + 752 .loc 1 454 26 is_stmt 0 view .LVU262 + 753 000e 0023 movs r3, #0 + 754 0010 8360 str r3, [r0, #8] + 455:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; + 755 .loc 1 455 3 is_stmt 1 view .LVU263 + 455:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; + 756 .loc 1 455 24 is_stmt 0 view .LVU264 + 757 0012 C360 str r3, [r0, #12] + 456:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; + 758 .loc 1 456 3 is_stmt 1 view .LVU265 + 456:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; + 759 .loc 1 456 22 is_stmt 0 view .LVU266 + 760 0014 0361 str r3, [r0, #16] + 457:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 761 .loc 1 457 3 is_stmt 1 view .LVU267 + 457:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 762 .loc 1 457 20 is_stmt 0 view .LVU268 + 763 0016 0C22 movs r2, #12 + 764 0018 4261 str r2, [r0, #20] + 458:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; + 765 .loc 1 458 3 is_stmt 1 view .LVU269 + 458:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; + 766 .loc 1 458 25 is_stmt 0 view .LVU270 + 767 001a 8361 str r3, [r0, #24] + 459:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 768 .loc 1 459 3 is_stmt 1 view .LVU271 + 459:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 769 .loc 1 459 28 is_stmt 0 view .LVU272 + 770 001c C361 str r3, [r0, #28] + 460:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 771 .loc 1 460 3 is_stmt 1 view .LVU273 + 460:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 772 .loc 1 460 30 is_stmt 0 view .LVU274 + 773 001e 0362 str r3, [r0, #32] + 461:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) + 774 .loc 1 461 3 is_stmt 1 view .LVU275 + 461:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) + 775 .loc 1 461 38 is_stmt 0 view .LVU276 + ARM GAS /tmp/ccBZCjHD.s page 30 + + + 776 0020 4362 str r3, [r0, #36] + 462:Core/Src/main.c **** { + 777 .loc 1 462 3 is_stmt 1 view .LVU277 + 462:Core/Src/main.c **** { + 778 .loc 1 462 7 is_stmt 0 view .LVU278 + 779 0022 FFF7FEFF bl HAL_UART_Init + 780 .LVL30: + 462:Core/Src/main.c **** { + 781 .loc 1 462 6 discriminator 1 view .LVU279 + 782 0026 00B9 cbnz r0, .L46 + 470:Core/Src/main.c **** + 783 .loc 1 470 1 view .LVU280 + 784 0028 08BD pop {r3, pc} + 785 .L46: + 464:Core/Src/main.c **** } + 786 .loc 1 464 5 is_stmt 1 view .LVU281 + 787 002a FFF7FEFF bl Error_Handler + 788 .LVL31: + 789 .L48: + 790 002e 00BF .align 2 + 791 .L47: + 792 0030 00000000 .word huart1 + 793 0034 00380140 .word 1073821696 + 794 .cfi_endproc + 795 .LFE137: + 797 .section .text.MX_TIM1_Init,"ax",%progbits + 798 .align 1 + 799 .syntax unified + 800 .thumb + 801 .thumb_func + 803 MX_TIM1_Init: + 804 .LFB135: + 303:Core/Src/main.c **** + 805 .loc 1 303 1 view -0 + 806 .cfi_startproc + 807 @ args = 0, pretend = 0, frame = 88 + 808 @ frame_needed = 0, uses_anonymous_args = 0 + 809 0000 10B5 push {r4, lr} + 810 .cfi_def_cfa_offset 8 + 811 .cfi_offset 4, -8 + 812 .cfi_offset 14, -4 + 813 0002 96B0 sub sp, sp, #88 + 814 .cfi_def_cfa_offset 96 + 309:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 815 .loc 1 309 3 view .LVU283 + 309:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 816 .loc 1 309 27 is_stmt 0 view .LVU284 + 817 0004 0024 movs r4, #0 + 818 0006 1394 str r4, [sp, #76] + 819 0008 1494 str r4, [sp, #80] + 820 000a 1594 str r4, [sp, #84] + 310:Core/Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 821 .loc 1 310 3 is_stmt 1 view .LVU285 + 310:Core/Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 822 .loc 1 310 22 is_stmt 0 view .LVU286 + 823 000c 0C94 str r4, [sp, #48] + 824 000e 0D94 str r4, [sp, #52] + ARM GAS /tmp/ccBZCjHD.s page 31 + + + 825 0010 0E94 str r4, [sp, #56] + 826 0012 0F94 str r4, [sp, #60] + 827 0014 1094 str r4, [sp, #64] + 828 0016 1194 str r4, [sp, #68] + 829 0018 1294 str r4, [sp, #72] + 311:Core/Src/main.c **** + 830 .loc 1 311 3 is_stmt 1 view .LVU287 + 311:Core/Src/main.c **** + 831 .loc 1 311 34 is_stmt 0 view .LVU288 + 832 001a 2C22 movs r2, #44 + 833 001c 2146 mov r1, r4 + 834 001e 01A8 add r0, sp, #4 + 835 0020 FFF7FEFF bl memset + 836 .LVL32: + 316:Core/Src/main.c **** htim1.Init.Prescaler = 0; + 837 .loc 1 316 3 is_stmt 1 view .LVU289 + 316:Core/Src/main.c **** htim1.Init.Prescaler = 0; + 838 .loc 1 316 18 is_stmt 0 view .LVU290 + 839 0024 2448 ldr r0, .L59 + 840 0026 254B ldr r3, .L59+4 + 841 0028 0360 str r3, [r0] + 317:Core/Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 842 .loc 1 317 3 is_stmt 1 view .LVU291 + 317:Core/Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 843 .loc 1 317 24 is_stmt 0 view .LVU292 + 844 002a 4460 str r4, [r0, #4] + 318:Core/Src/main.c **** htim1.Init.Period = 65535; + 845 .loc 1 318 3 is_stmt 1 view .LVU293 + 318:Core/Src/main.c **** htim1.Init.Period = 65535; + 846 .loc 1 318 26 is_stmt 0 view .LVU294 + 847 002c 8460 str r4, [r0, #8] + 319:Core/Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 848 .loc 1 319 3 is_stmt 1 view .LVU295 + 319:Core/Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 849 .loc 1 319 21 is_stmt 0 view .LVU296 + 850 002e 4FF6FF73 movw r3, #65535 + 851 0032 C360 str r3, [r0, #12] + 320:Core/Src/main.c **** htim1.Init.RepetitionCounter = 0; + 852 .loc 1 320 3 is_stmt 1 view .LVU297 + 320:Core/Src/main.c **** htim1.Init.RepetitionCounter = 0; + 853 .loc 1 320 28 is_stmt 0 view .LVU298 + 854 0034 0461 str r4, [r0, #16] + 321:Core/Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 855 .loc 1 321 3 is_stmt 1 view .LVU299 + 321:Core/Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 856 .loc 1 321 32 is_stmt 0 view .LVU300 + 857 0036 4461 str r4, [r0, #20] + 322:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) + 858 .loc 1 322 3 is_stmt 1 view .LVU301 + 322:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) + 859 .loc 1 322 32 is_stmt 0 view .LVU302 + 860 0038 8461 str r4, [r0, #24] + 323:Core/Src/main.c **** { + 861 .loc 1 323 3 is_stmt 1 view .LVU303 + 323:Core/Src/main.c **** { + 862 .loc 1 323 7 is_stmt 0 view .LVU304 + 863 003a FFF7FEFF bl HAL_TIM_PWM_Init + ARM GAS /tmp/ccBZCjHD.s page 32 + + + 864 .LVL33: + 323:Core/Src/main.c **** { + 865 .loc 1 323 6 discriminator 1 view .LVU305 + 866 003e 0028 cmp r0, #0 + 867 0040 32D1 bne .L55 + 327:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 868 .loc 1 327 3 is_stmt 1 view .LVU306 + 327:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 869 .loc 1 327 37 is_stmt 0 view .LVU307 + 870 0042 0023 movs r3, #0 + 871 0044 1393 str r3, [sp, #76] + 328:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 872 .loc 1 328 3 is_stmt 1 view .LVU308 + 328:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 873 .loc 1 328 38 is_stmt 0 view .LVU309 + 874 0046 1493 str r3, [sp, #80] + 329:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) + 875 .loc 1 329 3 is_stmt 1 view .LVU310 + 329:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) + 876 .loc 1 329 33 is_stmt 0 view .LVU311 + 877 0048 1593 str r3, [sp, #84] + 330:Core/Src/main.c **** { + 878 .loc 1 330 3 is_stmt 1 view .LVU312 + 330:Core/Src/main.c **** { + 879 .loc 1 330 7 is_stmt 0 view .LVU313 + 880 004a 13A9 add r1, sp, #76 + 881 004c 1A48 ldr r0, .L59 + 882 004e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 883 .LVL34: + 330:Core/Src/main.c **** { + 884 .loc 1 330 6 discriminator 1 view .LVU314 + 885 0052 0028 cmp r0, #0 + 886 0054 2AD1 bne .L56 + 334:Core/Src/main.c **** sConfigOC.Pulse = 0; + 887 .loc 1 334 3 is_stmt 1 view .LVU315 + 334:Core/Src/main.c **** sConfigOC.Pulse = 0; + 888 .loc 1 334 20 is_stmt 0 view .LVU316 + 889 0056 6023 movs r3, #96 + 890 0058 0C93 str r3, [sp, #48] + 335:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 891 .loc 1 335 3 is_stmt 1 view .LVU317 + 335:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 892 .loc 1 335 19 is_stmt 0 view .LVU318 + 893 005a 0023 movs r3, #0 + 894 005c 0D93 str r3, [sp, #52] + 336:Core/Src/main.c **** sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 895 .loc 1 336 3 is_stmt 1 view .LVU319 + 336:Core/Src/main.c **** sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 896 .loc 1 336 24 is_stmt 0 view .LVU320 + 897 005e 0E93 str r3, [sp, #56] + 337:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 898 .loc 1 337 3 is_stmt 1 view .LVU321 + 337:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 899 .loc 1 337 25 is_stmt 0 view .LVU322 + 900 0060 0F93 str r3, [sp, #60] + 338:Core/Src/main.c **** sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + 901 .loc 1 338 3 is_stmt 1 view .LVU323 + ARM GAS /tmp/ccBZCjHD.s page 33 + + + 338:Core/Src/main.c **** sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + 902 .loc 1 338 24 is_stmt 0 view .LVU324 + 903 0062 1093 str r3, [sp, #64] + 339:Core/Src/main.c **** sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 904 .loc 1 339 3 is_stmt 1 view .LVU325 + 339:Core/Src/main.c **** sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 905 .loc 1 339 25 is_stmt 0 view .LVU326 + 906 0064 1193 str r3, [sp, #68] + 340:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 907 .loc 1 340 3 is_stmt 1 view .LVU327 + 340:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 908 .loc 1 340 26 is_stmt 0 view .LVU328 + 909 0066 1293 str r3, [sp, #72] + 341:Core/Src/main.c **** { + 910 .loc 1 341 3 is_stmt 1 view .LVU329 + 341:Core/Src/main.c **** { + 911 .loc 1 341 7 is_stmt 0 view .LVU330 + 912 0068 0822 movs r2, #8 + 913 006a 0CA9 add r1, sp, #48 + 914 006c 1248 ldr r0, .L59 + 915 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 916 .LVL35: + 341:Core/Src/main.c **** { + 917 .loc 1 341 6 discriminator 1 view .LVU331 + 918 0072 E8B9 cbnz r0, .L57 + 345:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 919 .loc 1 345 3 is_stmt 1 view .LVU332 + 345:Core/Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 920 .loc 1 345 40 is_stmt 0 view .LVU333 + 921 0074 0023 movs r3, #0 + 922 0076 0193 str r3, [sp, #4] + 346:Core/Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 923 .loc 1 346 3 is_stmt 1 view .LVU334 + 346:Core/Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 924 .loc 1 346 41 is_stmt 0 view .LVU335 + 925 0078 0293 str r3, [sp, #8] + 347:Core/Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 926 .loc 1 347 3 is_stmt 1 view .LVU336 + 347:Core/Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 927 .loc 1 347 34 is_stmt 0 view .LVU337 + 928 007a 0393 str r3, [sp, #12] + 348:Core/Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 929 .loc 1 348 3 is_stmt 1 view .LVU338 + 348:Core/Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 930 .loc 1 348 33 is_stmt 0 view .LVU339 + 931 007c 0493 str r3, [sp, #16] + 349:Core/Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 932 .loc 1 349 3 is_stmt 1 view .LVU340 + 349:Core/Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 933 .loc 1 349 35 is_stmt 0 view .LVU341 + 934 007e 0593 str r3, [sp, #20] + 350:Core/Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 935 .loc 1 350 3 is_stmt 1 view .LVU342 + 350:Core/Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 936 .loc 1 350 38 is_stmt 0 view .LVU343 + 937 0080 4FF40052 mov r2, #8192 + 938 0084 0692 str r2, [sp, #24] + ARM GAS /tmp/ccBZCjHD.s page 34 + + + 351:Core/Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 939 .loc 1 351 3 is_stmt 1 view .LVU344 + 351:Core/Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 940 .loc 1 351 36 is_stmt 0 view .LVU345 + 941 0086 0793 str r3, [sp, #28] + 352:Core/Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 942 .loc 1 352 3 is_stmt 1 view .LVU346 + 352:Core/Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 943 .loc 1 352 36 is_stmt 0 view .LVU347 + 944 0088 0893 str r3, [sp, #32] + 353:Core/Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 945 .loc 1 353 3 is_stmt 1 view .LVU348 + 353:Core/Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 946 .loc 1 353 39 is_stmt 0 view .LVU349 + 947 008a 4FF00072 mov r2, #33554432 + 948 008e 0992 str r2, [sp, #36] + 354:Core/Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 949 .loc 1 354 3 is_stmt 1 view .LVU350 + 354:Core/Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 950 .loc 1 354 37 is_stmt 0 view .LVU351 + 951 0090 0A93 str r3, [sp, #40] + 355:Core/Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 952 .loc 1 355 3 is_stmt 1 view .LVU352 + 355:Core/Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 953 .loc 1 355 40 is_stmt 0 view .LVU353 + 954 0092 0B93 str r3, [sp, #44] + 356:Core/Src/main.c **** { + 955 .loc 1 356 3 is_stmt 1 view .LVU354 + 356:Core/Src/main.c **** { + 956 .loc 1 356 7 is_stmt 0 view .LVU355 + 957 0094 01A9 add r1, sp, #4 + 958 0096 0848 ldr r0, .L59 + 959 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime + 960 .LVL36: + 356:Core/Src/main.c **** { + 961 .loc 1 356 6 discriminator 1 view .LVU356 + 962 009c 50B9 cbnz r0, .L58 + 363:Core/Src/main.c **** + 963 .loc 1 363 3 is_stmt 1 view .LVU357 + 964 009e 0648 ldr r0, .L59 + 965 00a0 FFF7FEFF bl HAL_TIM_MspPostInit + 966 .LVL37: + 365:Core/Src/main.c **** + 967 .loc 1 365 1 is_stmt 0 view .LVU358 + 968 00a4 16B0 add sp, sp, #88 + 969 .cfi_remember_state + 970 .cfi_def_cfa_offset 8 + 971 @ sp needed + 972 00a6 10BD pop {r4, pc} + 973 .L55: + 974 .cfi_restore_state + 325:Core/Src/main.c **** } + 975 .loc 1 325 5 is_stmt 1 view .LVU359 + 976 00a8 FFF7FEFF bl Error_Handler + 977 .LVL38: + 978 .L56: + 332:Core/Src/main.c **** } + ARM GAS /tmp/ccBZCjHD.s page 35 + + + 979 .loc 1 332 5 view .LVU360 + 980 00ac FFF7FEFF bl Error_Handler + 981 .LVL39: + 982 .L57: + 343:Core/Src/main.c **** } + 983 .loc 1 343 5 view .LVU361 + 984 00b0 FFF7FEFF bl Error_Handler + 985 .LVL40: + 986 .L58: + 358:Core/Src/main.c **** } + 987 .loc 1 358 5 view .LVU362 + 988 00b4 FFF7FEFF bl Error_Handler + 989 .LVL41: + 990 .L60: + 991 .align 2 + 992 .L59: + 993 00b8 00000000 .word htim1 + 994 00bc 002C0140 .word 1073818624 + 995 .cfi_endproc + 996 .LFE135: + 998 .section .text.SystemClock_Config,"ax",%progbits + 999 .align 1 + 1000 .global SystemClock_Config + 1001 .syntax unified + 1002 .thumb + 1003 .thumb_func + 1005 SystemClock_Config: + 1006 .LFB131: + 131:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 1007 .loc 1 131 1 view -0 + 1008 .cfi_startproc + 1009 @ args = 0, pretend = 0, frame = 112 + 1010 @ frame_needed = 0, uses_anonymous_args = 0 + 1011 0000 00B5 push {lr} + 1012 .cfi_def_cfa_offset 4 + 1013 .cfi_offset 14, -4 + 1014 0002 9DB0 sub sp, sp, #116 + 1015 .cfi_def_cfa_offset 120 + 132:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 1016 .loc 1 132 3 view .LVU364 + 132:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 1017 .loc 1 132 22 is_stmt 0 view .LVU365 + 1018 0004 2822 movs r2, #40 + 1019 0006 0021 movs r1, #0 + 1020 0008 12A8 add r0, sp, #72 + 1021 000a FFF7FEFF bl memset + 1022 .LVL42: + 133:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 1023 .loc 1 133 3 is_stmt 1 view .LVU366 + 133:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 1024 .loc 1 133 22 is_stmt 0 view .LVU367 + 1025 000e 0021 movs r1, #0 + 1026 0010 0D91 str r1, [sp, #52] + 1027 0012 0E91 str r1, [sp, #56] + 1028 0014 0F91 str r1, [sp, #60] + 1029 0016 1091 str r1, [sp, #64] + 1030 0018 1191 str r1, [sp, #68] + ARM GAS /tmp/ccBZCjHD.s page 36 + + + 134:Core/Src/main.c **** + 1031 .loc 1 134 3 is_stmt 1 view .LVU368 + 134:Core/Src/main.c **** + 1032 .loc 1 134 28 is_stmt 0 view .LVU369 + 1033 001a 3422 movs r2, #52 + 1034 001c 6846 mov r0, sp + 1035 001e FFF7FEFF bl memset + 1036 .LVL43: + 139:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 1037 .loc 1 139 3 is_stmt 1 view .LVU370 + 139:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 1038 .loc 1 139 36 is_stmt 0 view .LVU371 + 1039 0022 0223 movs r3, #2 + 1040 0024 1293 str r3, [sp, #72] + 140:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 1041 .loc 1 140 3 is_stmt 1 view .LVU372 + 140:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 1042 .loc 1 140 30 is_stmt 0 view .LVU373 + 1043 0026 0123 movs r3, #1 + 1044 0028 1693 str r3, [sp, #88] + 141:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 1045 .loc 1 141 3 is_stmt 1 view .LVU374 + 141:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 1046 .loc 1 141 41 is_stmt 0 view .LVU375 + 1047 002a 1023 movs r3, #16 + 1048 002c 1793 str r3, [sp, #92] + 142:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 1049 .loc 1 142 3 is_stmt 1 view .LVU376 + 143:Core/Src/main.c **** { + 1050 .loc 1 143 3 view .LVU377 + 143:Core/Src/main.c **** { + 1051 .loc 1 143 7 is_stmt 0 view .LVU378 + 1052 002e 12A8 add r0, sp, #72 + 1053 0030 FFF7FEFF bl HAL_RCC_OscConfig + 1054 .LVL44: + 143:Core/Src/main.c **** { + 1055 .loc 1 143 6 discriminator 1 view .LVU379 + 1056 0034 C0B9 cbnz r0, .L66 + 150:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 1057 .loc 1 150 3 is_stmt 1 view .LVU380 + 150:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 1058 .loc 1 150 31 is_stmt 0 view .LVU381 + 1059 0036 0F23 movs r3, #15 + 1060 0038 0D93 str r3, [sp, #52] + 152:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 1061 .loc 1 152 3 is_stmt 1 view .LVU382 + 152:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 1062 .loc 1 152 34 is_stmt 0 view .LVU383 + 1063 003a 0021 movs r1, #0 + 1064 003c 0E91 str r1, [sp, #56] + 153:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 1065 .loc 1 153 3 is_stmt 1 view .LVU384 + 153:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 1066 .loc 1 153 35 is_stmt 0 view .LVU385 + 1067 003e 0F91 str r1, [sp, #60] + 154:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 1068 .loc 1 154 3 is_stmt 1 view .LVU386 + ARM GAS /tmp/ccBZCjHD.s page 37 + + + 154:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 1069 .loc 1 154 36 is_stmt 0 view .LVU387 + 1070 0040 1091 str r1, [sp, #64] + 155:Core/Src/main.c **** + 1071 .loc 1 155 3 is_stmt 1 view .LVU388 + 155:Core/Src/main.c **** + 1072 .loc 1 155 36 is_stmt 0 view .LVU389 + 1073 0042 1191 str r1, [sp, #68] + 157:Core/Src/main.c **** { + 1074 .loc 1 157 3 is_stmt 1 view .LVU390 + 157:Core/Src/main.c **** { + 1075 .loc 1 157 7 is_stmt 0 view .LVU391 + 1076 0044 0DA8 add r0, sp, #52 + 1077 0046 FFF7FEFF bl HAL_RCC_ClockConfig + 1078 .LVL45: + 157:Core/Src/main.c **** { + 1079 .loc 1 157 6 discriminator 1 view .LVU392 + 1080 004a 78B9 cbnz r0, .L67 + 161:Core/Src/main.c **** |RCC_PERIPHCLK_TIM1; + 1081 .loc 1 161 3 is_stmt 1 view .LVU393 + 161:Core/Src/main.c **** |RCC_PERIPHCLK_TIM1; + 1082 .loc 1 161 38 is_stmt 0 view .LVU394 + 1083 004c 41F22103 movw r3, #4129 + 1084 0050 0093 str r3, [sp] + 163:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; + 1085 .loc 1 163 3 is_stmt 1 view .LVU395 + 163:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; + 1086 .loc 1 163 38 is_stmt 0 view .LVU396 + 1087 0052 0023 movs r3, #0 + 1088 0054 0293 str r3, [sp, #8] + 164:Core/Src/main.c **** PeriphClkInit.Tim1ClockSelection = RCC_TIM1CLK_HCLK; + 1089 .loc 1 164 3 is_stmt 1 view .LVU397 + 164:Core/Src/main.c **** PeriphClkInit.Tim1ClockSelection = RCC_TIM1CLK_HCLK; + 1090 .loc 1 164 36 is_stmt 0 view .LVU398 + 1091 0056 0793 str r3, [sp, #28] + 165:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + 1092 .loc 1 165 3 is_stmt 1 view .LVU399 + 165:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + 1093 .loc 1 165 36 is_stmt 0 view .LVU400 + 1094 0058 0B93 str r3, [sp, #44] + 166:Core/Src/main.c **** { + 1095 .loc 1 166 3 is_stmt 1 view .LVU401 + 166:Core/Src/main.c **** { + 1096 .loc 1 166 7 is_stmt 0 view .LVU402 + 1097 005a 6846 mov r0, sp + 1098 005c FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig + 1099 .LVL46: + 166:Core/Src/main.c **** { + 1100 .loc 1 166 6 discriminator 1 view .LVU403 + 1101 0060 30B9 cbnz r0, .L68 + 170:Core/Src/main.c **** + 1102 .loc 1 170 1 view .LVU404 + 1103 0062 1DB0 add sp, sp, #116 + 1104 .cfi_remember_state + 1105 .cfi_def_cfa_offset 4 + 1106 @ sp needed + 1107 0064 5DF804FB ldr pc, [sp], #4 + ARM GAS /tmp/ccBZCjHD.s page 38 + + + 1108 .L66: + 1109 .cfi_restore_state + 145:Core/Src/main.c **** } + 1110 .loc 1 145 5 is_stmt 1 view .LVU405 + 1111 0068 FFF7FEFF bl Error_Handler + 1112 .LVL47: + 1113 .L67: + 159:Core/Src/main.c **** } + 1114 .loc 1 159 5 view .LVU406 + 1115 006c FFF7FEFF bl Error_Handler + 1116 .LVL48: + 1117 .L68: + 168:Core/Src/main.c **** } + 1118 .loc 1 168 5 view .LVU407 + 1119 0070 FFF7FEFF bl Error_Handler + 1120 .LVL49: + 1121 .cfi_endproc + 1122 .LFE131: + 1124 .section .text.main,"ax",%progbits + 1125 .align 1 + 1126 .global main + 1127 .syntax unified + 1128 .thumb + 1129 .thumb_func + 1131 main: + 1132 .LFB130: + 81:Core/Src/main.c **** + 1133 .loc 1 81 1 view -0 + 1134 .cfi_startproc + 1135 @ Volatile: function does not return. + 1136 @ args = 0, pretend = 0, frame = 0 + 1137 @ frame_needed = 0, uses_anonymous_args = 0 + 1138 0000 08B5 push {r3, lr} + 1139 .cfi_def_cfa_offset 8 + 1140 .cfi_offset 3, -8 + 1141 .cfi_offset 14, -4 + 90:Core/Src/main.c **** + 1142 .loc 1 90 3 view .LVU409 + 1143 0002 FFF7FEFF bl HAL_Init + 1144 .LVL50: + 97:Core/Src/main.c **** + 1145 .loc 1 97 3 view .LVU410 + 1146 0006 FFF7FEFF bl SystemClock_Config + 1147 .LVL51: + 104:Core/Src/main.c **** MX_CAN_Init(); + 1148 .loc 1 104 3 view .LVU411 + 1149 000a FFF7FEFF bl MX_GPIO_Init + 1150 .LVL52: + 105:Core/Src/main.c **** MX_I2C1_Init(); + 1151 .loc 1 105 3 view .LVU412 + 1152 000e FFF7FEFF bl MX_CAN_Init + 1153 .LVL53: + 106:Core/Src/main.c **** MX_SPI1_Init(); + 1154 .loc 1 106 3 view .LVU413 + 1155 0012 FFF7FEFF bl MX_I2C1_Init + 1156 .LVL54: + 107:Core/Src/main.c **** MX_TIM15_Init(); + ARM GAS /tmp/ccBZCjHD.s page 39 + + + 1157 .loc 1 107 3 view .LVU414 + 1158 0016 FFF7FEFF bl MX_SPI1_Init + 1159 .LVL55: + 108:Core/Src/main.c **** MX_USART1_UART_Init(); + 1160 .loc 1 108 3 view .LVU415 + 1161 001a FFF7FEFF bl MX_TIM15_Init + 1162 .LVL56: + 109:Core/Src/main.c **** MX_TIM1_Init(); + 1163 .loc 1 109 3 view .LVU416 + 1164 001e FFF7FEFF bl MX_USART1_UART_Init + 1165 .LVL57: + 110:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 1166 .loc 1 110 3 view .LVU417 + 1167 0022 FFF7FEFF bl MX_TIM1_Init + 1168 .LVL58: + 1169 .L70: + 117:Core/Src/main.c **** { + 1170 .loc 1 117 3 view .LVU418 + 122:Core/Src/main.c **** /* USER CODE END 3 */ + 1171 .loc 1 122 3 view .LVU419 + 117:Core/Src/main.c **** { + 1172 .loc 1 117 9 view .LVU420 + 1173 0026 FEE7 b .L70 + 1174 .cfi_endproc + 1175 .LFE130: + 1177 .global huart1 + 1178 .section .bss.huart1,"aw",%nobits + 1179 .align 2 + 1182 huart1: + 1183 0000 00000000 .space 136 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1184 .global htim15 + 1185 .section .bss.htim15,"aw",%nobits + 1186 .align 2 + 1189 htim15: + 1190 0000 00000000 .space 76 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1191 .global htim1 + 1192 .section .bss.htim1,"aw",%nobits + 1193 .align 2 + 1196 htim1: + 1197 0000 00000000 .space 76 + 1197 00000000 + 1197 00000000 + 1197 00000000 + 1197 00000000 + 1198 .global hspi1 + 1199 .section .bss.hspi1,"aw",%nobits + 1200 .align 2 + 1203 hspi1: + 1204 0000 00000000 .space 100 + ARM GAS /tmp/ccBZCjHD.s page 40 + + + 1204 00000000 + 1204 00000000 + 1204 00000000 + 1204 00000000 + 1205 .global hi2c1 + 1206 .section .bss.hi2c1,"aw",%nobits + 1207 .align 2 + 1210 hi2c1: + 1211 0000 00000000 .space 84 + 1211 00000000 + 1211 00000000 + 1211 00000000 + 1211 00000000 + 1212 .global hcan + 1213 .section .bss.hcan,"aw",%nobits + 1214 .align 2 + 1217 hcan: + 1218 0000 00000000 .space 40 + 1218 00000000 + 1218 00000000 + 1218 00000000 + 1218 00000000 + 1219 .text + 1220 .Letext0: + 1221 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1222 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1223 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1224 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1225 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1226 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 1227 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h" + 1228 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 1229 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 1230 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" + 1231 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + 1232 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 1233 .file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" + 1234 .file 16 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" + 1235 .file 17 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h" + 1236 .file 18 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h" + 1237 .file 19 "Core/Inc/main.h" + 1238 .file 20 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 1239 .file 21 "" + ARM GAS /tmp/ccBZCjHD.s page 41 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c + /tmp/ccBZCjHD.s:21 .text.MX_GPIO_Init:00000000 $t + /tmp/ccBZCjHD.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccBZCjHD.s:228 .text.MX_GPIO_Init:000000ec $d + /tmp/ccBZCjHD.s:235 .text.Error_Handler:00000000 $t + /tmp/ccBZCjHD.s:241 .text.Error_Handler:00000000 Error_Handler + /tmp/ccBZCjHD.s:273 .text.MX_CAN_Init:00000000 $t + /tmp/ccBZCjHD.s:278 .text.MX_CAN_Init:00000000 MX_CAN_Init + /tmp/ccBZCjHD.s:343 .text.MX_CAN_Init:00000030 $d + /tmp/ccBZCjHD.s:1217 .bss.hcan:00000000 hcan + /tmp/ccBZCjHD.s:349 .text.MX_I2C1_Init:00000000 $t + /tmp/ccBZCjHD.s:354 .text.MX_I2C1_Init:00000000 MX_I2C1_Init + /tmp/ccBZCjHD.s:435 .text.MX_I2C1_Init:00000048 $d + /tmp/ccBZCjHD.s:1210 .bss.hi2c1:00000000 hi2c1 + /tmp/ccBZCjHD.s:442 .text.MX_SPI1_Init:00000000 $t + /tmp/ccBZCjHD.s:447 .text.MX_SPI1_Init:00000000 MX_SPI1_Init + /tmp/ccBZCjHD.s:521 .text.MX_SPI1_Init:0000003c $d + /tmp/ccBZCjHD.s:1203 .bss.hspi1:00000000 hspi1 + /tmp/ccBZCjHD.s:527 .text.MX_TIM15_Init:00000000 $t + /tmp/ccBZCjHD.s:532 .text.MX_TIM15_Init:00000000 MX_TIM15_Init + /tmp/ccBZCjHD.s:721 .text.MX_TIM15_Init:000000bc $d + /tmp/ccBZCjHD.s:1189 .bss.htim15:00000000 htim15 + /tmp/ccBZCjHD.s:727 .text.MX_USART1_UART_Init:00000000 $t + /tmp/ccBZCjHD.s:732 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init + /tmp/ccBZCjHD.s:792 .text.MX_USART1_UART_Init:00000030 $d + /tmp/ccBZCjHD.s:1182 .bss.huart1:00000000 huart1 + /tmp/ccBZCjHD.s:798 .text.MX_TIM1_Init:00000000 $t + /tmp/ccBZCjHD.s:803 .text.MX_TIM1_Init:00000000 MX_TIM1_Init + /tmp/ccBZCjHD.s:993 .text.MX_TIM1_Init:000000b8 $d + /tmp/ccBZCjHD.s:1196 .bss.htim1:00000000 htim1 + /tmp/ccBZCjHD.s:999 .text.SystemClock_Config:00000000 $t + /tmp/ccBZCjHD.s:1005 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccBZCjHD.s:1125 .text.main:00000000 $t + /tmp/ccBZCjHD.s:1131 .text.main:00000000 main + /tmp/ccBZCjHD.s:1179 .bss.huart1:00000000 $d + /tmp/ccBZCjHD.s:1186 .bss.htim15:00000000 $d + /tmp/ccBZCjHD.s:1193 .bss.htim1:00000000 $d + /tmp/ccBZCjHD.s:1200 .bss.hspi1:00000000 $d + /tmp/ccBZCjHD.s:1207 .bss.hi2c1:00000000 $d + /tmp/ccBZCjHD.s:1214 .bss.hcan:00000000 $d + +UNDEFINED SYMBOLS +HAL_GPIO_WritePin +HAL_GPIO_Init +HAL_CAN_Init +HAL_I2C_Init +HAL_I2CEx_ConfigAnalogFilter +HAL_I2CEx_ConfigDigitalFilter +HAL_SPI_Init +memset +HAL_TIM_PWM_Init +HAL_TIMEx_MasterConfigSynchronization +HAL_TIM_PWM_ConfigChannel +HAL_TIMEx_ConfigBreakDeadTime +HAL_TIM_MspPostInit +HAL_UART_Init + ARM GAS /tmp/ccBZCjHD.s page 42 + + +HAL_RCC_OscConfig +HAL_RCC_ClockConfig +HAL_RCCEx_PeriphCLKConfig +HAL_Init diff --git a/build/main.o b/build/main.o new file mode 100644 index 0000000..e31e4aa Binary files /dev/null and b/build/main.o differ diff --git a/build/mvbms-test-24.bin b/build/mvbms-test-24.bin new file mode 100755 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build/stm32f3xx_it.o + 0x080008c8 MemManage_Handler + .text.BusFault_Handler + 0x080008ca 0x2 build/stm32f3xx_it.o + 0x080008ca BusFault_Handler + .text.UsageFault_Handler + 0x080008cc 0x2 build/stm32f3xx_it.o + 0x080008cc UsageFault_Handler + .text.SVC_Handler + 0x080008ce 0x2 build/stm32f3xx_it.o + 0x080008ce SVC_Handler + .text.DebugMon_Handler + 0x080008d0 0x2 build/stm32f3xx_it.o + 0x080008d0 DebugMon_Handler + .text.PendSV_Handler + 0x080008d2 0x2 build/stm32f3xx_it.o + 0x080008d2 PendSV_Handler + .text.SysTick_Handler + 0x080008d4 0x8 build/stm32f3xx_it.o + 0x080008d4 SysTick_Handler + .text.SystemInit + 0x080008dc 0x14 build/system_stm32f3xx.o + 0x080008dc SystemInit + .text.HAL_InitTick + 0x080008f0 0x4c build/stm32f3xx_hal.o + 0x080008f0 HAL_InitTick + .text.HAL_Init + 0x0800093c 0x24 build/stm32f3xx_hal.o + 0x0800093c HAL_Init + .text.HAL_IncTick + 0x08000960 0x18 build/stm32f3xx_hal.o + 0x08000960 HAL_IncTick + .text.HAL_GetTick + 0x08000978 0xc build/stm32f3xx_hal.o + 0x08000978 HAL_GetTick + .text.HAL_CAN_Init + 0x08000984 0x14c build/stm32f3xx_hal_can.o + 0x08000984 HAL_CAN_Init + .text.__NVIC_SetPriority + 0x08000ad0 0x28 build/stm32f3xx_hal_cortex.o + .text.NVIC_EncodePriority + 0x08000af8 0x3e build/stm32f3xx_hal_cortex.o + *fill* 0x08000b36 0x2 + .text.HAL_NVIC_SetPriorityGrouping + 0x08000b38 0x24 build/stm32f3xx_hal_cortex.o + 0x08000b38 HAL_NVIC_SetPriorityGrouping + .text.HAL_NVIC_SetPriority + 0x08000b5c 0x20 build/stm32f3xx_hal_cortex.o + 0x08000b5c HAL_NVIC_SetPriority + .text.HAL_SYSTICK_Config + 0x08000b7c 0x28 build/stm32f3xx_hal_cortex.o + 0x08000b7c HAL_SYSTICK_Config + .text.HAL_GPIO_Init + 0x08000ba4 0x1c8 build/stm32f3xx_hal_gpio.o + 0x08000ba4 HAL_GPIO_Init + .text.HAL_GPIO_WritePin + 0x08000d6c 0xa build/stm32f3xx_hal_gpio.o + 0x08000d6c HAL_GPIO_WritePin + .text.HAL_I2C_Init + 0x08000d76 0xbc build/stm32f3xx_hal_i2c.o + 0x08000d76 HAL_I2C_Init + .text.HAL_I2CEx_ConfigAnalogFilter + 0x08000e32 0x5c build/stm32f3xx_hal_i2c_ex.o + 0x08000e32 HAL_I2CEx_ConfigAnalogFilter + .text.HAL_I2CEx_ConfigDigitalFilter + 0x08000e8e 0x58 build/stm32f3xx_hal_i2c_ex.o + 0x08000e8e HAL_I2CEx_ConfigDigitalFilter + *fill* 0x08000ee6 0x2 + .text.HAL_RCC_OscConfig + 0x08000ee8 0x630 build/stm32f3xx_hal_rcc.o + 0x08000ee8 HAL_RCC_OscConfig + .text.HAL_RCC_GetSysClockFreq + 0x08001518 0x70 build/stm32f3xx_hal_rcc.o + 0x08001518 HAL_RCC_GetSysClockFreq + .text.HAL_RCC_ClockConfig + 0x08001588 0x1a8 build/stm32f3xx_hal_rcc.o + 0x08001588 HAL_RCC_ClockConfig + .text.HAL_RCC_GetHCLKFreq + 0x08001730 0xc build/stm32f3xx_hal_rcc.o + 0x08001730 HAL_RCC_GetHCLKFreq + .text.HAL_RCC_GetPCLK1Freq + 0x0800173c 0x2c build/stm32f3xx_hal_rcc.o + 0x0800173c HAL_RCC_GetPCLK1Freq + .text.HAL_RCC_GetPCLK2Freq + 0x08001768 0x2c build/stm32f3xx_hal_rcc.o + 0x08001768 HAL_RCC_GetPCLK2Freq + .text.HAL_RCCEx_PeriphCLKConfig + 0x08001794 0x234 build/stm32f3xx_hal_rcc_ex.o + 0x08001794 HAL_RCCEx_PeriphCLKConfig + .text.HAL_SPI_Init + 0x080019c8 0xe8 build/stm32f3xx_hal_spi.o + 0x080019c8 HAL_SPI_Init + .text.TIM_OC1_SetConfig + 0x08001ab0 0x8c build/stm32f3xx_hal_tim.o + .text.TIM_OC3_SetConfig + 0x08001b3c 0x7c build/stm32f3xx_hal_tim.o + .text.TIM_OC4_SetConfig + 0x08001bb8 0x64 build/stm32f3xx_hal_tim.o + .text.TIM_OC5_SetConfig + 0x08001c1c 0x60 build/stm32f3xx_hal_tim.o + .text.TIM_OC6_SetConfig + 0x08001c7c 0x64 build/stm32f3xx_hal_tim.o + .text.TIM_Base_SetConfig + 0x08001ce0 0xa0 build/stm32f3xx_hal_tim.o + 0x08001ce0 TIM_Base_SetConfig + .text.HAL_TIM_PWM_Init + 0x08001d80 0x60 build/stm32f3xx_hal_tim.o + 0x08001d80 HAL_TIM_PWM_Init + .text.TIM_OC2_SetConfig + 0x08001de0 0x7c build/stm32f3xx_hal_tim.o + 0x08001de0 TIM_OC2_SetConfig + .text.HAL_TIM_PWM_ConfigChannel + 0x08001e5c 0x13a build/stm32f3xx_hal_tim.o + 0x08001e5c HAL_TIM_PWM_ConfigChannel + *fill* 0x08001f96 0x2 + .text.HAL_TIMEx_MasterConfigSynchronization + 0x08001f98 0x80 build/stm32f3xx_hal_tim_ex.o + 0x08001f98 HAL_TIMEx_MasterConfigSynchronization + .text.HAL_TIMEx_ConfigBreakDeadTime + 0x08002018 0x88 build/stm32f3xx_hal_tim_ex.o + 0x08002018 HAL_TIMEx_ConfigBreakDeadTime + .text.UART_EndRxTransfer + 0x080020a0 0x52 build/stm32f3xx_hal_uart.o + *fill* 0x080020f2 0x2 + .text.UART_SetConfig + 0x080020f4 0x250 build/stm32f3xx_hal_uart.o + 0x080020f4 UART_SetConfig + .text.UART_AdvFeatureConfig + 0x08002344 0xca build/stm32f3xx_hal_uart.o + 0x08002344 UART_AdvFeatureConfig + .text.UART_WaitOnFlagUntilTimeout + 0x0800240e 0x96 build/stm32f3xx_hal_uart.o + 0x0800240e UART_WaitOnFlagUntilTimeout + .text.UART_CheckIdleState + 0x080024a4 0xc6 build/stm32f3xx_hal_uart.o + 0x080024a4 UART_CheckIdleState + .text.HAL_UART_Init + 0x0800256a 0x62 build/stm32f3xx_hal_uart.o + 0x0800256a HAL_UART_Init + .text.Reset_Handler + 0x080025cc 0x50 build/startup_stm32f302xc.o + 0x080025cc Reset_Handler + .text.Default_Handler + 0x0800261c 0x2 build/startup_stm32f302xc.o + 0x0800261c RTC_Alarm_IRQHandler + 0x0800261c TIM1_CC_IRQHandler + 0x0800261c USB_HP_IRQHandler + 0x0800261c PVD_IRQHandler + 0x0800261c TAMP_STAMP_IRQHandler + 0x0800261c EXTI3_IRQHandler + 0x0800261c USB_HP_CAN_TX_IRQHandler + 0x0800261c EXTI0_IRQHandler + 0x0800261c I2C2_EV_IRQHandler + 0x0800261c FPU_IRQHandler + 0x0800261c TIM1_UP_TIM16_IRQHandler + 0x0800261c ADC1_2_IRQHandler + 0x0800261c SPI1_IRQHandler + 0x0800261c CAN_SCE_IRQHandler + 0x0800261c TIM6_DAC_IRQHandler + 0x0800261c DMA2_Channel2_IRQHandler + 0x0800261c DMA1_Channel4_IRQHandler + 0x0800261c USART3_IRQHandler + 0x0800261c DMA1_Channel7_IRQHandler + 0x0800261c UART5_IRQHandler + 0x0800261c TIM4_IRQHandler + 0x0800261c CAN_RX1_IRQHandler + 0x0800261c DMA2_Channel1_IRQHandler + 0x0800261c I2C1_EV_IRQHandler + 0x0800261c DMA1_Channel6_IRQHandler + 0x0800261c UART4_IRQHandler + 0x0800261c DMA2_Channel4_IRQHandler + 0x0800261c TIM3_IRQHandler + 0x0800261c RCC_IRQHandler + 0x0800261c DMA1_Channel1_IRQHandler + 0x0800261c Default_Handler + 0x0800261c USBWakeUp_RMP_IRQHandler + 0x0800261c EXTI15_10_IRQHandler + 0x0800261c EXTI9_5_IRQHandler + 0x0800261c RTC_WKUP_IRQHandler + 0x0800261c SPI2_IRQHandler + 0x0800261c USB_LP_CAN_RX0_IRQHandler + 0x0800261c DMA2_Channel5_IRQHandler + 0x0800261c DMA1_Channel5_IRQHandler + 0x0800261c USB_LP_IRQHandler + 0x0800261c EXTI4_IRQHandler + 0x0800261c COMP1_2_IRQHandler + 0x0800261c TIM1_TRG_COM_TIM17_IRQHandler + 0x0800261c DMA1_Channel3_IRQHandler + 0x0800261c WWDG_IRQHandler + 0x0800261c TIM2_IRQHandler + 0x0800261c EXTI1_IRQHandler + 0x0800261c COMP4_6_IRQHandler + 0x0800261c USART2_IRQHandler + 0x0800261c I2C2_ER_IRQHandler + 0x0800261c DMA1_Channel2_IRQHandler + 0x0800261c FLASH_IRQHandler + 0x0800261c USART1_IRQHandler + 0x0800261c SPI3_IRQHandler + 0x0800261c I2C1_ER_IRQHandler + 0x0800261c USBWakeUp_IRQHandler + 0x0800261c DMA2_Channel3_IRQHandler + 0x0800261c EXTI2_TSC_IRQHandler + 0x0800261c TIM1_BRK_TIM15_IRQHandler + .text.memset 0x0800261e 0x10 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + 0x0800261e memset + *fill* 0x0800262e 0x2 + .text.__libc_init_array + 0x08002630 0x48 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + 0x08002630 __libc_init_array + *(.glue_7) + .glue_7 0x08002678 0x0 linker stubs + *(.glue_7t) + .glue_7t 0x08002678 0x0 linker stubs + *(.eh_frame) + .eh_frame 0x08002678 0x0 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + *(.init) + .init 0x08002678 0x4 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x08002678 _init + .init 0x0800267c 0x8 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + *(.fini) + .fini 0x08002684 0x4 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x08002684 _fini + .fini 0x08002688 0x8 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + 0x08002690 . = ALIGN (0x4) + 0x08002690 _etext = . + +.vfp11_veneer 0x08002690 0x0 + .vfp11_veneer 0x08002690 0x0 linker stubs + +.v4_bx 0x08002690 0x0 + .v4_bx 0x08002690 0x0 linker stubs + +.iplt 0x08002690 0x0 + .iplt 0x08002690 0x0 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + +.rodata 0x08002690 0x38 + 0x08002690 . = ALIGN (0x4) + *(.rodata) + *(.rodata*) + .rodata.APBPrescTable + 0x08002690 0x8 build/system_stm32f3xx.o + 0x08002690 APBPrescTable + .rodata.AHBPrescTable + 0x08002698 0x10 build/system_stm32f3xx.o + 0x08002698 AHBPrescTable + .rodata.aPredivFactorTable + 0x080026a8 0x10 build/stm32f3xx_hal_rcc.o + .rodata.aPLLMULFactorTable + 0x080026b8 0x10 build/stm32f3xx_hal_rcc.o + 0x080026c8 . = ALIGN (0x4) + +.rel.dyn 0x080026c8 0x0 + .rel.iplt 0x080026c8 0x0 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + +.ARM.extab + *(.ARM.extab* .gnu.linkonce.armextab.*) + +.ARM 0x080026c8 0x0 + 0x080026c8 __exidx_start = . + *(.ARM.exidx*) + 0x080026c8 __exidx_end = . + +.preinit_array 0x080026c8 0x0 + 0x080026c8 PROVIDE (__preinit_array_start = .) + *(.preinit_array*) + 0x080026c8 PROVIDE (__preinit_array_end = .) + +.init_array 0x080026c8 0x4 + 0x080026c8 PROVIDE (__init_array_start = .) + *(SORT_BY_NAME(.init_array.*)) + *(.init_array*) + .init_array 0x080026c8 0x4 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x080026cc PROVIDE (__init_array_end = .) + +.fini_array 0x080026cc 0x4 + 0x080026cc PROVIDE (__fini_array_start = .) + *(SORT_BY_NAME(.fini_array.*)) + *(.fini_array*) + .fini_array 0x080026cc 0x4 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x080026d0 PROVIDE (__fini_array_end = .) + 0x080026d0 _sidata = LOADADDR (.data) + +.data 0x20000000 0xc load address 0x080026d0 + 0x20000000 . = ALIGN (0x4) + 0x20000000 _sdata = . + *(.data) + *(.data*) + .data.SystemCoreClock + 0x20000000 0x4 build/system_stm32f3xx.o + 0x20000000 SystemCoreClock + .data.uwTickFreq + 0x20000004 0x1 build/stm32f3xx_hal.o + 0x20000004 uwTickFreq + *fill* 0x20000005 0x3 + .data.uwTickPrio + 0x20000008 0x4 build/stm32f3xx_hal.o + 0x20000008 uwTickPrio + 0x2000000c . = ALIGN (0x4) + 0x2000000c _edata = . + +.igot.plt 0x2000000c 0x0 load address 0x080026dc + .igot.plt 0x2000000c 0x0 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x2000000c . = ALIGN (0x4) + +.bss 0x2000000c 0x220 load address 0x080026dc + 0x2000000c _sbss = . + 0x2000000c __bss_start__ = _sbss + *(.bss) + *(.bss*) + .bss.completed.1 + 0x2000000c 0x1 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + *fill* 0x2000000d 0x3 + .bss.object.0 0x20000010 0x18 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + .bss.huart1 0x20000028 0x88 build/main.o + 0x20000028 huart1 + .bss.htim15 0x200000b0 0x4c build/main.o + 0x200000b0 htim15 + .bss.htim1 0x200000fc 0x4c build/main.o + 0x200000fc htim1 + .bss.hspi1 0x20000148 0x64 build/main.o + 0x20000148 hspi1 + .bss.hi2c1 0x200001ac 0x54 build/main.o + 0x200001ac hi2c1 + .bss.hcan 0x20000200 0x28 build/main.o + 0x20000200 hcan + .bss.uwTick 0x20000228 0x4 build/stm32f3xx_hal.o + 0x20000228 uwTick + *(COMMON) + 0x2000022c . = ALIGN (0x4) + 0x2000022c _ebss = . + 0x2000022c __bss_end__ = _ebss + +._user_heap_stack + 0x2000022c 0x604 load address 0x080026dc + 0x20000230 . = ALIGN (0x8) + *fill* 0x2000022c 0x4 + [!provide] PROVIDE (end = .) + 0x20000230 PROVIDE (_end = .) + 0x20000430 . = (. + _Min_Heap_Size) + *fill* 0x20000230 0x200 + 0x20000830 . = (. + _Min_Stack_Size) + *fill* 0x20000430 0x400 + 0x20000830 . = ALIGN (0x8) + +/DISCARD/ + libc.a(*) + libm.a(*) + libgcc.a(*) + +.ARM.attributes + 0x00000000 0x30 + *(.ARM.attributes) + .ARM.attributes + 0x00000000 0x22 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + .ARM.attributes + 0x00000022 0x34 /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + .ARM.attributes + 0x00000056 0x34 build/main.o + .ARM.attributes + 0x0000008a 0x34 build/stm32f3xx_hal_msp.o + .ARM.attributes + 0x000000be 0x34 build/stm32f3xx_it.o + .ARM.attributes + 0x000000f2 0x34 build/system_stm32f3xx.o + .ARM.attributes + 0x00000126 0x34 build/stm32f3xx_hal.o + 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build/stm32f3xx_hal_can.o +HAL_CAN_TxMailbox0AbortCallback build/stm32f3xx_hal_can.o +HAL_CAN_TxMailbox0CompleteCallback build/stm32f3xx_hal_can.o +HAL_CAN_TxMailbox1AbortCallback build/stm32f3xx_hal_can.o +HAL_CAN_TxMailbox1CompleteCallback build/stm32f3xx_hal_can.o +HAL_CAN_TxMailbox2AbortCallback build/stm32f3xx_hal_can.o +HAL_CAN_TxMailbox2CompleteCallback build/stm32f3xx_hal_can.o +HAL_CAN_WakeUp build/stm32f3xx_hal_can.o +HAL_CAN_WakeUpFromRxMsgCallback build/stm32f3xx_hal_can.o +HAL_DBGMCU_DisableDBGSleepMode build/stm32f3xx_hal.o +HAL_DBGMCU_DisableDBGStandbyMode build/stm32f3xx_hal.o +HAL_DBGMCU_DisableDBGStopMode build/stm32f3xx_hal.o +HAL_DBGMCU_EnableDBGSleepMode build/stm32f3xx_hal.o +HAL_DBGMCU_EnableDBGStandbyMode build/stm32f3xx_hal.o +HAL_DBGMCU_EnableDBGStopMode build/stm32f3xx_hal.o +HAL_DMA_Abort build/stm32f3xx_hal_dma.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_spi.o +HAL_DMA_Abort_IT build/stm32f3xx_hal_dma.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_spi.o + build/stm32f3xx_hal_i2c.o +HAL_DMA_DeInit build/stm32f3xx_hal_dma.o +HAL_DMA_GetError build/stm32f3xx_hal_dma.o + build/stm32f3xx_hal_uart.o +HAL_DMA_GetState build/stm32f3xx_hal_dma.o + build/stm32f3xx_hal_i2c.o +HAL_DMA_IRQHandler build/stm32f3xx_hal_dma.o +HAL_DMA_Init build/stm32f3xx_hal_dma.o +HAL_DMA_PollForTransfer build/stm32f3xx_hal_dma.o +HAL_DMA_RegisterCallback build/stm32f3xx_hal_dma.o +HAL_DMA_Start build/stm32f3xx_hal_dma.o +HAL_DMA_Start_IT build/stm32f3xx_hal_dma.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_spi.o + build/stm32f3xx_hal_i2c.o +HAL_DMA_UnRegisterCallback build/stm32f3xx_hal_dma.o +HAL_DeInit build/stm32f3xx_hal.o +HAL_Delay build/stm32f3xx_hal.o +HAL_EXTI_ClearConfigLine build/stm32f3xx_hal_exti.o +HAL_EXTI_ClearPending build/stm32f3xx_hal_exti.o +HAL_EXTI_GenerateSWI build/stm32f3xx_hal_exti.o +HAL_EXTI_GetConfigLine build/stm32f3xx_hal_exti.o +HAL_EXTI_GetHandle build/stm32f3xx_hal_exti.o +HAL_EXTI_GetPending build/stm32f3xx_hal_exti.o +HAL_EXTI_IRQHandler build/stm32f3xx_hal_exti.o +HAL_EXTI_RegisterCallback build/stm32f3xx_hal_exti.o +HAL_EXTI_SetConfigLine build/stm32f3xx_hal_exti.o +HAL_FLASHEx_Erase build/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_Erase_IT build/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBErase build/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBGetConfig build/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBGetUserData build/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBProgram build/stm32f3xx_hal_flash_ex.o +HAL_FLASH_EndOfOperationCallback build/stm32f3xx_hal_flash.o +HAL_FLASH_GetError build/stm32f3xx_hal_flash.o +HAL_FLASH_IRQHandler build/stm32f3xx_hal_flash.o +HAL_FLASH_Lock build/stm32f3xx_hal_flash.o +HAL_FLASH_OB_Launch build/stm32f3xx_hal_flash.o +HAL_FLASH_OB_Lock build/stm32f3xx_hal_flash.o +HAL_FLASH_OB_Unlock build/stm32f3xx_hal_flash.o +HAL_FLASH_OperationErrorCallback build/stm32f3xx_hal_flash.o +HAL_FLASH_Program build/stm32f3xx_hal_flash.o +HAL_FLASH_Program_IT build/stm32f3xx_hal_flash.o +HAL_FLASH_Unlock build/stm32f3xx_hal_flash.o +HAL_GPIO_DeInit build/stm32f3xx_hal_gpio.o + build/stm32f3xx_hal_msp.o +HAL_GPIO_EXTI_Callback build/stm32f3xx_hal_gpio.o +HAL_GPIO_EXTI_IRQHandler build/stm32f3xx_hal_gpio.o +HAL_GPIO_Init build/stm32f3xx_hal_gpio.o + build/stm32f3xx_hal_rcc.o + build/stm32f3xx_hal_msp.o + build/main.o +HAL_GPIO_LockPin build/stm32f3xx_hal_gpio.o +HAL_GPIO_ReadPin build/stm32f3xx_hal_gpio.o +HAL_GPIO_TogglePin build/stm32f3xx_hal_gpio.o +HAL_GPIO_WritePin build/stm32f3xx_hal_gpio.o + build/main.o +HAL_GetDEVID build/stm32f3xx_hal.o +HAL_GetHalVersion build/stm32f3xx_hal.o +HAL_GetREVID build/stm32f3xx_hal.o +HAL_GetTick build/stm32f3xx_hal.o + build/stm32f3xx_hal_uart_ex.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_spi.o + build/stm32f3xx_hal_rcc_ex.o + build/stm32f3xx_hal_rcc.o + build/stm32f3xx_hal_i2c.o + build/stm32f3xx_hal_flash.o + build/stm32f3xx_hal_dma.o + build/stm32f3xx_hal_can.o +HAL_GetTickFreq build/stm32f3xx_hal.o +HAL_GetTickPrio build/stm32f3xx_hal.o +HAL_GetUIDw0 build/stm32f3xx_hal.o +HAL_GetUIDw1 build/stm32f3xx_hal.o +HAL_GetUIDw2 build/stm32f3xx_hal.o +HAL_HalfDuplex_EnableReceiver build/stm32f3xx_hal_uart.o +HAL_HalfDuplex_EnableTransmitter build/stm32f3xx_hal_uart.o +HAL_HalfDuplex_Init build/stm32f3xx_hal_uart.o +HAL_I2CEx_ConfigAnalogFilter build/stm32f3xx_hal_i2c_ex.o + build/main.o +HAL_I2CEx_ConfigDigitalFilter build/stm32f3xx_hal_i2c_ex.o + build/main.o +HAL_I2CEx_DisableFastModePlus build/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_DisableWakeUp build/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_EnableFastModePlus build/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_EnableWakeUp build/stm32f3xx_hal_i2c_ex.o +HAL_I2C_AbortCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_AddrCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_DeInit build/stm32f3xx_hal_i2c.o +HAL_I2C_DisableListen_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_ER_IRQHandler build/stm32f3xx_hal_i2c.o +HAL_I2C_EV_IRQHandler build/stm32f3xx_hal_i2c.o +HAL_I2C_EnableListen_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_ErrorCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_GetError build/stm32f3xx_hal_i2c.o +HAL_I2C_GetMode build/stm32f3xx_hal_i2c.o +HAL_I2C_GetState build/stm32f3xx_hal_i2c.o +HAL_I2C_Init build/stm32f3xx_hal_i2c.o + build/main.o +HAL_I2C_IsDeviceReady build/stm32f3xx_hal_i2c.o +HAL_I2C_ListenCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_MasterRxCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_MasterTxCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Abort_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Receive build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Receive_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Receive_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Transmit build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Transmit_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Transmit_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_MemRxCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_MemTxCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Read build/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Read_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Read_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Write build/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Write_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Write_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_MspDeInit build/stm32f3xx_hal_msp.o +HAL_I2C_MspInit build/stm32f3xx_hal_msp.o +HAL_I2C_SlaveRxCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_SlaveTxCpltCallback build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Receive build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Receive_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Receive_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_IT build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Transmit build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Transmit_DMA build/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Transmit_IT build/stm32f3xx_hal_i2c.o +HAL_IncTick build/stm32f3xx_hal.o + build/stm32f3xx_it.o +HAL_Init build/stm32f3xx_hal.o + build/main.o +HAL_InitTick build/stm32f3xx_hal.o + build/stm32f3xx_hal_rcc.o +HAL_LIN_Init build/stm32f3xx_hal_uart.o +HAL_LIN_SendBreak build/stm32f3xx_hal_uart.o +HAL_MPU_ConfigRegion build/stm32f3xx_hal_cortex.o +HAL_MPU_Disable build/stm32f3xx_hal_cortex.o +HAL_MPU_Enable build/stm32f3xx_hal_cortex.o +HAL_MspDeInit build/stm32f3xx_hal.o +HAL_MspInit build/stm32f3xx_hal_msp.o +HAL_MultiProcessorEx_AddressLength_Set build/stm32f3xx_hal_uart_ex.o +HAL_MultiProcessor_DisableMuteMode build/stm32f3xx_hal_uart.o +HAL_MultiProcessor_EnableMuteMode build/stm32f3xx_hal_uart.o +HAL_MultiProcessor_EnterMuteMode build/stm32f3xx_hal_uart.o +HAL_MultiProcessor_Init build/stm32f3xx_hal_uart.o +HAL_NVIC_ClearPendingIRQ build/stm32f3xx_hal_cortex.o +HAL_NVIC_DisableIRQ build/stm32f3xx_hal_cortex.o +HAL_NVIC_EnableIRQ build/stm32f3xx_hal_cortex.o +HAL_NVIC_GetActive build/stm32f3xx_hal_cortex.o +HAL_NVIC_GetPendingIRQ build/stm32f3xx_hal_cortex.o +HAL_NVIC_GetPriority build/stm32f3xx_hal_cortex.o +HAL_NVIC_GetPriorityGrouping build/stm32f3xx_hal_cortex.o +HAL_NVIC_SetPendingIRQ build/stm32f3xx_hal_cortex.o +HAL_NVIC_SetPriority build/stm32f3xx_hal_cortex.o + build/stm32f3xx_hal.o +HAL_NVIC_SetPriorityGrouping build/stm32f3xx_hal_cortex.o + build/stm32f3xx_hal.o +HAL_NVIC_SystemReset build/stm32f3xx_hal_cortex.o +HAL_PWR_ConfigPVD build/stm32f3xx_hal_pwr_ex.o +HAL_PWR_DeInit build/stm32f3xx_hal_pwr.o +HAL_PWR_DisableBkUpAccess build/stm32f3xx_hal_pwr.o +HAL_PWR_DisablePVD build/stm32f3xx_hal_pwr_ex.o +HAL_PWR_DisableSEVOnPend build/stm32f3xx_hal_pwr.o +HAL_PWR_DisableSleepOnExit build/stm32f3xx_hal_pwr.o +HAL_PWR_DisableWakeUpPin build/stm32f3xx_hal_pwr.o +HAL_PWR_EnableBkUpAccess build/stm32f3xx_hal_pwr.o +HAL_PWR_EnablePVD build/stm32f3xx_hal_pwr_ex.o +HAL_PWR_EnableSEVOnPend build/stm32f3xx_hal_pwr.o +HAL_PWR_EnableSleepOnExit build/stm32f3xx_hal_pwr.o +HAL_PWR_EnableWakeUpPin build/stm32f3xx_hal_pwr.o +HAL_PWR_EnterSLEEPMode build/stm32f3xx_hal_pwr.o +HAL_PWR_EnterSTANDBYMode build/stm32f3xx_hal_pwr.o +HAL_PWR_EnterSTOPMode build/stm32f3xx_hal_pwr.o +HAL_PWR_PVDCallback build/stm32f3xx_hal_pwr_ex.o +HAL_PWR_PVD_IRQHandler build/stm32f3xx_hal_pwr_ex.o +HAL_RCCEx_GetPeriphCLKConfig build/stm32f3xx_hal_rcc_ex.o +HAL_RCCEx_GetPeriphCLKFreq build/stm32f3xx_hal_rcc_ex.o +HAL_RCCEx_PeriphCLKConfig build/stm32f3xx_hal_rcc_ex.o + build/main.o +HAL_RCC_CSSCallback build/stm32f3xx_hal_rcc.o +HAL_RCC_ClockConfig build/stm32f3xx_hal_rcc.o + build/main.o +HAL_RCC_DeInit build/stm32f3xx_hal_rcc.o +HAL_RCC_DisableCSS build/stm32f3xx_hal_rcc.o +HAL_RCC_EnableCSS build/stm32f3xx_hal_rcc.o +HAL_RCC_GetClockConfig build/stm32f3xx_hal_rcc.o +HAL_RCC_GetHCLKFreq build/stm32f3xx_hal_rcc.o +HAL_RCC_GetOscConfig build/stm32f3xx_hal_rcc.o +HAL_RCC_GetPCLK1Freq build/stm32f3xx_hal_rcc.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_rcc_ex.o +HAL_RCC_GetPCLK2Freq build/stm32f3xx_hal_rcc.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_rcc_ex.o +HAL_RCC_GetSysClockFreq build/stm32f3xx_hal_rcc.o + build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_rcc_ex.o +HAL_RCC_MCOConfig build/stm32f3xx_hal_rcc.o +HAL_RCC_NMI_IRQHandler build/stm32f3xx_hal_rcc.o +HAL_RCC_OscConfig build/stm32f3xx_hal_rcc.o + build/main.o +HAL_RS485Ex_Init build/stm32f3xx_hal_uart_ex.o +HAL_ResumeTick build/stm32f3xx_hal.o +HAL_SPIEx_FlushRxFifo build/stm32f3xx_hal_spi_ex.o +HAL_SPI_Abort build/stm32f3xx_hal_spi.o +HAL_SPI_AbortCpltCallback build/stm32f3xx_hal_spi.o +HAL_SPI_Abort_IT build/stm32f3xx_hal_spi.o +HAL_SPI_DMAPause build/stm32f3xx_hal_spi.o +HAL_SPI_DMAResume build/stm32f3xx_hal_spi.o +HAL_SPI_DMAStop build/stm32f3xx_hal_spi.o +HAL_SPI_DeInit build/stm32f3xx_hal_spi.o +HAL_SPI_ErrorCallback build/stm32f3xx_hal_spi.o +HAL_SPI_GetError build/stm32f3xx_hal_spi.o +HAL_SPI_GetState build/stm32f3xx_hal_spi.o +HAL_SPI_IRQHandler build/stm32f3xx_hal_spi.o +HAL_SPI_Init build/stm32f3xx_hal_spi.o + build/main.o +HAL_SPI_MspDeInit build/stm32f3xx_hal_msp.o +HAL_SPI_MspInit build/stm32f3xx_hal_msp.o +HAL_SPI_Receive build/stm32f3xx_hal_spi.o +HAL_SPI_Receive_DMA build/stm32f3xx_hal_spi.o +HAL_SPI_Receive_IT build/stm32f3xx_hal_spi.o +HAL_SPI_RxCpltCallback build/stm32f3xx_hal_spi.o +HAL_SPI_RxHalfCpltCallback build/stm32f3xx_hal_spi.o +HAL_SPI_Transmit build/stm32f3xx_hal_spi.o +HAL_SPI_TransmitReceive build/stm32f3xx_hal_spi.o +HAL_SPI_TransmitReceive_DMA build/stm32f3xx_hal_spi.o +HAL_SPI_TransmitReceive_IT build/stm32f3xx_hal_spi.o +HAL_SPI_Transmit_DMA build/stm32f3xx_hal_spi.o +HAL_SPI_Transmit_IT build/stm32f3xx_hal_spi.o +HAL_SPI_TxCpltCallback build/stm32f3xx_hal_spi.o +HAL_SPI_TxHalfCpltCallback build/stm32f3xx_hal_spi.o +HAL_SPI_TxRxCpltCallback build/stm32f3xx_hal_spi.o +HAL_SPI_TxRxHalfCpltCallback build/stm32f3xx_hal_spi.o +HAL_SYSTICK_CLKSourceConfig build/stm32f3xx_hal_cortex.o +HAL_SYSTICK_Callback build/stm32f3xx_hal_cortex.o +HAL_SYSTICK_Config build/stm32f3xx_hal_cortex.o + build/stm32f3xx_hal.o +HAL_SYSTICK_IRQHandler build/stm32f3xx_hal_cortex.o +HAL_SetTickFreq build/stm32f3xx_hal.o +HAL_SuspendTick build/stm32f3xx_hal.o +HAL_TIMEx_Break2Callback build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o +HAL_TIMEx_BreakCallback build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o +HAL_TIMEx_CommutCallback build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o +HAL_TIMEx_CommutHalfCpltCallback build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_ConfigBreakDeadTime build/stm32f3xx_hal_tim_ex.o + build/main.o +HAL_TIMEx_ConfigCommutEvent build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_ConfigCommutEvent_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_ConfigCommutEvent_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_GetChannelNState build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_GroupChannel5 build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_DeInit build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_GetState build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Init build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_MspDeInit build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_MspInit build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Start build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Start_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Start_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Stop build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Stop_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Stop_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_MasterConfigSynchronization build/stm32f3xx_hal_tim_ex.o + build/main.o +HAL_TIMEx_OCN_Start build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OCN_Start_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OCN_Start_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OCN_Stop build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OCN_Stop_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OCN_Stop_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OnePulseN_Start build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OnePulseN_Start_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OnePulseN_Stop build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_OnePulseN_Stop_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_PWMN_Start build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_PWMN_Start_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_PWMN_Start_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_PWMN_Stop build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_PWMN_Stop_DMA build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_PWMN_Stop_IT build/stm32f3xx_hal_tim_ex.o +HAL_TIMEx_RemapConfig build/stm32f3xx_hal_tim_ex.o +HAL_TIM_Base_DeInit build/stm32f3xx_hal_tim.o +HAL_TIM_Base_GetState build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Init build/stm32f3xx_hal_tim.o +HAL_TIM_Base_MspDeInit build/stm32f3xx_hal_tim.o +HAL_TIM_Base_MspInit build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Start build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Start_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Start_IT build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Stop build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Stop_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_Base_Stop_IT build/stm32f3xx_hal_tim.o +HAL_TIM_ConfigClockSource build/stm32f3xx_hal_tim.o +HAL_TIM_ConfigOCrefClear build/stm32f3xx_hal_tim.o +HAL_TIM_ConfigTI1Input build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurstState build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurst_MultiReadStart build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurst_MultiWriteStart build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurst_ReadStart build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurst_ReadStop build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurst_WriteStart build/stm32f3xx_hal_tim.o +HAL_TIM_DMABurst_WriteStop build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_DeInit build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_GetState build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Init build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_MspDeInit build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_MspInit build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Start build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Start_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Start_IT build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Stop build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Stop_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_Encoder_Stop_IT build/stm32f3xx_hal_tim.o +HAL_TIM_ErrorCallback build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +HAL_TIM_GenerateEvent build/stm32f3xx_hal_tim.o +HAL_TIM_GetActiveChannel build/stm32f3xx_hal_tim.o +HAL_TIM_GetChannelState build/stm32f3xx_hal_tim.o +HAL_TIM_IC_CaptureCallback build/stm32f3xx_hal_tim.o +HAL_TIM_IC_CaptureHalfCpltCallback build/stm32f3xx_hal_tim.o +HAL_TIM_IC_ConfigChannel build/stm32f3xx_hal_tim.o +HAL_TIM_IC_DeInit build/stm32f3xx_hal_tim.o +HAL_TIM_IC_GetState build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Init build/stm32f3xx_hal_tim.o +HAL_TIM_IC_MspDeInit build/stm32f3xx_hal_tim.o +HAL_TIM_IC_MspInit build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Start build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Start_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Start_IT build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Stop build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Stop_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_IC_Stop_IT build/stm32f3xx_hal_tim.o +HAL_TIM_IRQHandler build/stm32f3xx_hal_tim.o +HAL_TIM_MspPostInit build/stm32f3xx_hal_msp.o + build/main.o +HAL_TIM_OC_ConfigChannel build/stm32f3xx_hal_tim.o +HAL_TIM_OC_DeInit build/stm32f3xx_hal_tim.o +HAL_TIM_OC_DelayElapsedCallback build/stm32f3xx_hal_tim.o +HAL_TIM_OC_GetState build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Init build/stm32f3xx_hal_tim.o +HAL_TIM_OC_MspDeInit build/stm32f3xx_hal_tim.o +HAL_TIM_OC_MspInit build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Start build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Start_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Start_IT build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Stop build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Stop_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_OC_Stop_IT build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_ConfigChannel build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_DeInit build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_GetState build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_Init build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_MspDeInit build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_MspInit build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_Start build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_Start_IT build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_Stop build/stm32f3xx_hal_tim.o +HAL_TIM_OnePulse_Stop_IT build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_ConfigChannel build/stm32f3xx_hal_tim.o + build/main.o +HAL_TIM_PWM_DeInit build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_GetState build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Init build/stm32f3xx_hal_tim.o + build/main.o +HAL_TIM_PWM_MspDeInit build/stm32f3xx_hal_msp.o +HAL_TIM_PWM_MspInit build/stm32f3xx_hal_msp.o +HAL_TIM_PWM_PulseFinishedCallback build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +HAL_TIM_PWM_PulseFinishedHalfCpltCallback build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Start build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Start_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Start_IT build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Stop build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Stop_DMA build/stm32f3xx_hal_tim.o +HAL_TIM_PWM_Stop_IT build/stm32f3xx_hal_tim.o +HAL_TIM_PeriodElapsedCallback build/stm32f3xx_hal_tim.o +HAL_TIM_PeriodElapsedHalfCpltCallback build/stm32f3xx_hal_tim.o +HAL_TIM_ReadCapturedValue build/stm32f3xx_hal_tim.o +HAL_TIM_SlaveConfigSynchro build/stm32f3xx_hal_tim.o +HAL_TIM_SlaveConfigSynchro_IT build/stm32f3xx_hal_tim.o +HAL_TIM_TriggerCallback build/stm32f3xx_hal_tim.o +HAL_TIM_TriggerHalfCpltCallback build/stm32f3xx_hal_tim.o +HAL_UARTEx_DisableStopMode build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_EnableStopMode build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_GetRxEventType build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_ReceiveToIdle build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_ReceiveToIdle_DMA build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_ReceiveToIdle_IT build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_RxEventCallback build/stm32f3xx_hal_uart.o +HAL_UARTEx_StopModeWakeUpSourceConfig build/stm32f3xx_hal_uart_ex.o +HAL_UARTEx_WakeupCallback build/stm32f3xx_hal_uart_ex.o + build/stm32f3xx_hal_uart.o +HAL_UART_Abort build/stm32f3xx_hal_uart.o +HAL_UART_AbortCpltCallback build/stm32f3xx_hal_uart.o +HAL_UART_AbortReceive build/stm32f3xx_hal_uart.o +HAL_UART_AbortReceiveCpltCallback build/stm32f3xx_hal_uart.o +HAL_UART_AbortReceive_IT build/stm32f3xx_hal_uart.o +HAL_UART_AbortTransmit build/stm32f3xx_hal_uart.o +HAL_UART_AbortTransmitCpltCallback build/stm32f3xx_hal_uart.o +HAL_UART_AbortTransmit_IT build/stm32f3xx_hal_uart.o +HAL_UART_Abort_IT build/stm32f3xx_hal_uart.o +HAL_UART_DMAPause build/stm32f3xx_hal_uart.o +HAL_UART_DMAResume build/stm32f3xx_hal_uart.o +HAL_UART_DMAStop build/stm32f3xx_hal_uart.o +HAL_UART_DeInit build/stm32f3xx_hal_uart.o +HAL_UART_DisableReceiverTimeout build/stm32f3xx_hal_uart.o +HAL_UART_EnableReceiverTimeout build/stm32f3xx_hal_uart.o +HAL_UART_ErrorCallback build/stm32f3xx_hal_uart.o +HAL_UART_GetError build/stm32f3xx_hal_uart.o +HAL_UART_GetState build/stm32f3xx_hal_uart.o +HAL_UART_IRQHandler build/stm32f3xx_hal_uart.o +HAL_UART_Init build/stm32f3xx_hal_uart.o + build/main.o +HAL_UART_MspDeInit build/stm32f3xx_hal_msp.o +HAL_UART_MspInit build/stm32f3xx_hal_msp.o + build/stm32f3xx_hal_uart_ex.o +HAL_UART_Receive build/stm32f3xx_hal_uart.o +HAL_UART_Receive_DMA build/stm32f3xx_hal_uart.o +HAL_UART_Receive_IT build/stm32f3xx_hal_uart.o +HAL_UART_ReceiverTimeout_Config build/stm32f3xx_hal_uart.o +HAL_UART_RxCpltCallback build/stm32f3xx_hal_uart.o +HAL_UART_RxHalfCpltCallback build/stm32f3xx_hal_uart.o +HAL_UART_Transmit build/stm32f3xx_hal_uart.o +HAL_UART_Transmit_DMA build/stm32f3xx_hal_uart.o +HAL_UART_Transmit_IT build/stm32f3xx_hal_uart.o +HAL_UART_TxCpltCallback build/stm32f3xx_hal_uart.o +HAL_UART_TxHalfCpltCallback build/stm32f3xx_hal_uart.o +HardFault_Handler build/stm32f3xx_it.o +I2C1_ER_IRQHandler build/startup_stm32f302xc.o +I2C1_EV_IRQHandler build/startup_stm32f302xc.o +I2C2_ER_IRQHandler build/startup_stm32f302xc.o +I2C2_EV_IRQHandler build/startup_stm32f302xc.o +MemManage_Handler build/stm32f3xx_it.o +NMI_Handler build/stm32f3xx_it.o +PVD_IRQHandler build/startup_stm32f302xc.o +PendSV_Handler build/stm32f3xx_it.o +RCC_IRQHandler build/startup_stm32f302xc.o +RTC_Alarm_IRQHandler build/startup_stm32f302xc.o +RTC_WKUP_IRQHandler build/startup_stm32f302xc.o +Reset_Handler build/startup_stm32f302xc.o +SPI1_IRQHandler build/startup_stm32f302xc.o +SPI2_IRQHandler build/startup_stm32f302xc.o +SPI3_IRQHandler build/startup_stm32f302xc.o +SVC_Handler build/stm32f3xx_it.o +SysTick_Handler build/stm32f3xx_it.o +SystemClock_Config build/main.o +SystemCoreClock build/system_stm32f3xx.o + build/stm32f3xx_hal_spi.o + build/stm32f3xx_hal_rcc_ex.o + build/stm32f3xx_hal_rcc.o + build/stm32f3xx_hal.o +SystemCoreClockUpdate build/system_stm32f3xx.o +SystemInit build/system_stm32f3xx.o + build/startup_stm32f302xc.o +TAMP_STAMP_IRQHandler build/startup_stm32f302xc.o +TIM1_BRK_TIM15_IRQHandler build/startup_stm32f302xc.o +TIM1_CC_IRQHandler build/startup_stm32f302xc.o +TIM1_TRG_COM_TIM17_IRQHandler build/startup_stm32f302xc.o +TIM1_UP_TIM16_IRQHandler build/startup_stm32f302xc.o +TIM2_IRQHandler build/startup_stm32f302xc.o +TIM3_IRQHandler build/startup_stm32f302xc.o +TIM4_IRQHandler build/startup_stm32f302xc.o +TIM6_DAC_IRQHandler build/startup_stm32f302xc.o +TIMEx_DMACommutationCplt build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o +TIMEx_DMACommutationHalfCplt build/stm32f3xx_hal_tim_ex.o + build/stm32f3xx_hal_tim.o +TIM_Base_SetConfig build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_CCxChannelCmd build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_DMACaptureCplt build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_DMACaptureHalfCplt build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_DMADelayPulseHalfCplt build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_DMAError build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_ETR_SetConfig build/stm32f3xx_hal_tim.o +TIM_OC2_SetConfig build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +TIM_TI1_SetConfig build/stm32f3xx_hal_tim.o + build/stm32f3xx_hal_tim_ex.o +UART4_IRQHandler build/startup_stm32f302xc.o +UART5_IRQHandler build/startup_stm32f302xc.o +UART_AdvFeatureConfig build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_uart_ex.o +UART_CheckIdleState build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_uart_ex.o +UART_SetConfig build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_uart_ex.o +UART_Start_Receive_DMA build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_uart_ex.o +UART_Start_Receive_IT build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_uart_ex.o +UART_WaitOnFlagUntilTimeout build/stm32f3xx_hal_uart.o + build/stm32f3xx_hal_uart_ex.o +USART1_IRQHandler build/startup_stm32f302xc.o +USART2_IRQHandler build/startup_stm32f302xc.o +USART3_IRQHandler build/startup_stm32f302xc.o +USBWakeUp_IRQHandler build/startup_stm32f302xc.o +USBWakeUp_RMP_IRQHandler build/startup_stm32f302xc.o +USB_HP_CAN_TX_IRQHandler build/startup_stm32f302xc.o +USB_HP_IRQHandler build/startup_stm32f302xc.o +USB_LP_CAN_RX0_IRQHandler build/startup_stm32f302xc.o +USB_LP_IRQHandler build/startup_stm32f302xc.o +UsageFault_Handler build/stm32f3xx_it.o +WWDG_IRQHandler build/startup_stm32f302xc.o +_Min_Stack_Size build/sysmem.o +__atexit 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/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +_stat build/syscalls.o +_times build/syscalls.o +_unlink build/syscalls.o +_wait build/syscalls.o +_write build/syscalls.o + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-writer.o) +_write_r /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-writer.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-stdio.o) +atexit /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-atexit.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +environ build/syscalls.o +errno /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-reent.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-writer.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-readr.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-lseekr.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-closer.o) +exit /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +fflush /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o) +g_pfnVectors build/startup_stm32f302xc.o +hardware_init_hook /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +hcan build/main.o +hi2c1 build/main.o +hspi1 build/main.o +htim1 build/main.o +htim15 build/main.o +huart1 build/main.o +initialise_monitor_handles build/syscalls.o +main build/main.o + build/startup_stm32f302xc.o + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +malloc /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-__atexit.o) +memset /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o) + build/main.o + /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +pFlash build/stm32f3xx_hal_flash.o + build/stm32f3xx_hal_flash_ex.o +software_init_hook /home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +uwTick build/stm32f3xx_hal.o +uwTickFreq build/stm32f3xx_hal.o +uwTickPrio build/stm32f3xx_hal.o + build/stm32f3xx_hal_rcc.o diff --git a/build/startup_stm32f302xc.d b/build/startup_stm32f302xc.d new file mode 100644 index 0000000..3a580d3 --- /dev/null +++ b/build/startup_stm32f302xc.d @@ -0,0 +1 @@ +build/startup_stm32f302xc.o: startup_stm32f302xc.s diff --git a/build/startup_stm32f302xc.o b/build/startup_stm32f302xc.o new file mode 100644 index 0000000..5ddde99 Binary files /dev/null and b/build/startup_stm32f302xc.o differ diff --git a/build/stm32f3xx_hal.d b/build/stm32f3xx_hal.d new file mode 100644 index 0000000..852befb --- /dev/null +++ b/build/stm32f3xx_hal.d @@ -0,0 +1,65 @@ +build/stm32f3xx_hal.o: Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal.lst b/build/stm32f3xx_hal.lst new file mode 100644 index 0000000..887d50e --- /dev/null +++ b/build/stm32f3xx_hal.lst @@ -0,0 +1,1528 @@ +ARM GAS /tmp/ccN11lH4.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c" + 20 .section .text.HAL_MspInit,"ax",%progbits + 21 .align 1 + 22 .weak HAL_MspInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_MspInit: + 28 .LFB132: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @file stm32f3xx_hal.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * This is the common part of the HAL initialization + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ****************************************************************************** + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @attention + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Copyright (c) 2016 STMicroelectronics. + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * All rights reserved. + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * This software is licensed under terms that can be found in the LICENSE file + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * in the root directory of this software component. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ****************************************************************************** + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @verbatim + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ============================================================================== + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ##### How to use this driver ##### + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ============================================================================== + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** [..] + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** The common HAL driver contains a set of generic and common APIs that can be + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** used by the PPP peripheral drivers and the user to start using the HAL. + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** [..] + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** The HAL contains two APIs categories: + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) HAL Initialization and de-initialization functions + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) HAL Control functions + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + ARM GAS /tmp/ccN11lH4.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @endverbatim + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ****************************************************************************** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Includes ------------------------------------------------------------------*/ + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #include "stm32f3xx_hal.h" + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @addtogroup STM32F3xx_HAL_Driver + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL HAL + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief HAL module driver. + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #ifdef HAL_MODULE_ENABLED + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Private typedef -----------------------------------------------------------*/ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Private define ------------------------------------------------------------*/ + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL_Private Constants + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief STM32F3xx HAL Driver version number V1.5.7 + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #define __STM32F3xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #define __STM32F3xx_HAL_VERSION_SUB1 (0x05U) /*!< [23:16] sub1 version */ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #define __STM32F3xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */ + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #define __STM32F3xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #define __STM32F3xx_HAL_VERSION ((__STM32F3xx_HAL_VERSION_MAIN << 24U)\ + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** |(__STM32F3xx_HAL_VERSION_SUB1 << 16U)\ + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** |(__STM32F3xx_HAL_VERSION_SUB2 << 8U )\ + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** |(__STM32F3xx_HAL_VERSION_RC)) + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #define IDCODE_DEVID_MASK (0x00000FFFU) + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @} + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Private macro -------------------------------------------------------------*/ + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Exported variables --------------------------------------------------------*/ + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL_Exported_Variables HAL Exported Variables + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __IO uint32_t uwTick; + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */ + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */ + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @} + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Private function prototypes -----------------------------------------------*/ + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Exported functions ---------------------------------------------------------*/ + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL_Exported_Functions HAL Exported Functions + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + ARM GAS /tmp/ccN11lH4.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Initialization and de-initialization functions + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @verbatim + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** =============================================================================== + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ##### Initialization and de-initialization functions ##### + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** =============================================================================== + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** [..] This section provides functions allowing to: + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Initializes the Flash interface, the NVIC allocation and initial clock + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** configuration. It initializes the systick also when timeout is needed + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** and the backup domain when enabled. + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) de-Initializes common part of the HAL. + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Configure The time base source to have 1ms time base with a dedicated + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** Tick interrupt priority. + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (++) SysTick timer is used by default as source of time base, but user + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** can eventually implement his proper time base source (a general purpose + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** timer for example or other time source), keeping in mind that Time base + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** handled in milliseconds basis. + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (++) Time base configuration function (HAL_InitTick ()) is called automatically + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** at the beginning of the program after reset by HAL_Init() or at any time + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** when clock is configured, by HAL_RCC_ClockConfig(). + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (++) Source of time base is configured to generate interrupts at regular + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** time intervals. Care must be taken if HAL_Delay() is called from a + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** peripheral ISR process, the Tick interrupt line must have higher priority + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (numerically lower) than the peripheral interrupt. Otherwise the caller + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ISR process will be blocked. + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (++) functions affecting time base configurations are declared as __Weak + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** to make override possible in case of other implementations in user file. + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @endverbatim + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function configures the Flash prefetch, + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Configures time base source, NVIC and Low level hardware + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is called at the beginning of program after reset and before + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * the clock configuration + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note The Systick configuration is based on HSI clock, as HSI is the clock + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used after a system Reset and the NVIC configuration is set to Priority group 4 + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note The time base configuration is based on MSI clock when exiting from Reset. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Once done, time base tick start incrementing. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * In the default implementation,Systick is used as source of time base. + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The tick variable is incremented each 1ms in its ISR. + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval HAL status + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_StatusTypeDef HAL_Init(void) + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Configure Flash prefetch */ + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #if (PREFETCH_ENABLE != 0U) + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + ARM GAS /tmp/ccN11lH4.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Set Interrupt Group Priority */ + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Enable systick and configure 1ms tick (default clock after Reset is HSI) */ + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_InitTick(TICK_INT_PRIORITY); + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Init the low level hardware */ + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_MspInit(); + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Return function status */ + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_OK; + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function de-Initializes common part of the HAL and stops the systick. + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is optional. + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval HAL status + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_StatusTypeDef HAL_DeInit(void) + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Reset of all peripherals */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_APB1_FORCE_RESET(); + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_APB2_FORCE_RESET(); + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_AHB_FORCE_RESET(); + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* De-Init the low level hardware */ + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_MspDeInit(); + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Return function status */ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_OK; + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Initialize the MSP. + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_MspInit(void) + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 29 .loc 1 187 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** the HAL_MspInit could be implemented in the user file + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 34 .loc 1 191 1 view .LVU1 + 35 0000 7047 bx lr + 36 .cfi_endproc + 37 .LFE132: + 39 .section .text.HAL_MspDeInit,"ax",%progbits + ARM GAS /tmp/ccN11lH4.s page 5 + + + 40 .align 1 + 41 .weak HAL_MspDeInit + 42 .syntax unified + 43 .thumb + 44 .thumb_func + 46 HAL_MspDeInit: + 47 .LFB133: + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief DeInitialize the MSP. + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_MspDeInit(void) + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 48 .loc 1 198 1 view -0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 @ link register save eliminated. + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** the HAL_MspDeInit could be implemented in the user file + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 53 .loc 1 202 1 view .LVU3 + 54 0000 7047 bx lr + 55 .cfi_endproc + 56 .LFE133: + 58 .section .text.HAL_DeInit,"ax",%progbits + 59 .align 1 + 60 .global HAL_DeInit + 61 .syntax unified + 62 .thumb + 63 .thumb_func + 65 HAL_DeInit: + 66 .LFB131: + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Reset of all peripherals */ + 67 .loc 1 164 1 view -0 + 68 .cfi_startproc + 69 @ args = 0, pretend = 0, frame = 0 + 70 @ frame_needed = 0, uses_anonymous_args = 0 + 71 0000 10B5 push {r4, lr} + 72 .cfi_def_cfa_offset 8 + 73 .cfi_offset 4, -8 + 74 .cfi_offset 14, -4 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 75 .loc 1 166 3 view .LVU5 + 76 0002 074B ldr r3, .L5 + 77 0004 4FF0FF32 mov r2, #-1 + 78 0008 1A61 str r2, [r3, #16] + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 79 .loc 1 167 3 view .LVU6 + 80 000a 0024 movs r4, #0 + 81 000c 1C61 str r4, [r3, #16] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + 82 .loc 1 169 3 view .LVU7 + 83 000e DA60 str r2, [r3, #12] + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + ARM GAS /tmp/ccN11lH4.s page 6 + + + 84 .loc 1 170 3 view .LVU8 + 85 0010 DC60 str r4, [r3, #12] + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 86 .loc 1 172 3 view .LVU9 + 87 0012 9A62 str r2, [r3, #40] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 88 .loc 1 173 3 view .LVU10 + 89 0014 9C62 str r4, [r3, #40] + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 90 .loc 1 176 3 view .LVU11 + 91 0016 FFF7FEFF bl HAL_MspDeInit + 92 .LVL0: + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 93 .loc 1 179 3 view .LVU12 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 94 .loc 1 180 1 is_stmt 0 view .LVU13 + 95 001a 2046 mov r0, r4 + 96 001c 10BD pop {r4, pc} + 97 .L6: + 98 001e 00BF .align 2 + 99 .L5: + 100 0020 00100240 .word 1073876992 + 101 .cfi_endproc + 102 .LFE131: + 104 .section .text.HAL_InitTick,"ax",%progbits + 105 .align 1 + 106 .weak HAL_InitTick + 107 .syntax unified + 108 .thumb + 109 .thumb_func + 111 HAL_InitTick: + 112 .LVL1: + 113 .LFB134: + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function configures the source of the time base. + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The time source is configured to have 1ms time base with a dedicated + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Tick interrupt priority. + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is called automatically at the beginning of program after + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig() + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * It is used to generate interrupts at regular time intervals. + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Care must be taken if HAL_Delay() is called from a peripheral ISR process, + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The SysTick interrupt must have higher priority (numerically lower) + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementation in user file. + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @param TickPriority Tick interrupt priority. + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval HAL status + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 114 .loc 1 221 1 is_stmt 1 view -0 + 115 .cfi_startproc + 116 @ args = 0, pretend = 0, frame = 0 + 117 @ frame_needed = 0, uses_anonymous_args = 0 + 118 .loc 1 221 1 is_stmt 0 view .LVU15 + ARM GAS /tmp/ccN11lH4.s page 7 + + + 119 0000 10B5 push {r4, lr} + 120 .cfi_def_cfa_offset 8 + 121 .cfi_offset 4, -8 + 122 .cfi_offset 14, -4 + 123 0002 0446 mov r4, r0 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Configure the SysTick to have interrupt in 1ms time basis*/ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 124 .loc 1 223 3 is_stmt 1 view .LVU16 + 125 .loc 1 223 51 is_stmt 0 view .LVU17 + 126 0004 0E4B ldr r3, .L13 + 127 0006 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 128 0008 4FF47A73 mov r3, #1000 + 129 000c B3FBF2F3 udiv r3, r3, r2 + 130 .loc 1 223 7 view .LVU18 + 131 0010 0C4A ldr r2, .L13+4 + 132 0012 1068 ldr r0, [r2] + 133 .LVL2: + 134 .loc 1 223 7 view .LVU19 + 135 0014 B0FBF3F0 udiv r0, r0, r3 + 136 0018 FFF7FEFF bl HAL_SYSTICK_Config + 137 .LVL3: + 138 .loc 1 223 6 discriminator 1 view .LVU20 + 139 001c 68B9 cbnz r0, .L9 + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_ERROR; + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Configure the SysTick IRQ priority */ + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 140 .loc 1 229 3 is_stmt 1 view .LVU21 + 141 .loc 1 229 6 is_stmt 0 view .LVU22 + 142 001e 0F2C cmp r4, #15 + 143 0020 01D9 bls .L12 + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickPrio = TickPriority; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** else + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_ERROR; + 144 .loc 1 236 12 view .LVU23 + 145 0022 0120 movs r0, #1 + 146 0024 0AE0 b .L8 + 147 .L12: + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickPrio = TickPriority; + 148 .loc 1 231 5 is_stmt 1 view .LVU24 + 149 0026 0022 movs r2, #0 + 150 0028 2146 mov r1, r4 + 151 002a 4FF0FF30 mov r0, #-1 + 152 002e FFF7FEFF bl HAL_NVIC_SetPriority + 153 .LVL4: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 154 .loc 1 232 5 view .LVU25 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 155 .loc 1 232 16 is_stmt 0 view .LVU26 + 156 0032 054B ldr r3, .L13+8 + 157 0034 1C60 str r4, [r3] + ARM GAS /tmp/ccN11lH4.s page 8 + + + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Return function status */ + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_OK; + 158 .loc 1 239 3 is_stmt 1 view .LVU27 + 159 .loc 1 239 10 is_stmt 0 view .LVU28 + 160 0036 0020 movs r0, #0 + 161 0038 00E0 b .L8 + 162 .L9: + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 163 .loc 1 225 12 view .LVU29 + 164 003a 0120 movs r0, #1 + 165 .L8: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 166 .loc 1 240 1 view .LVU30 + 167 003c 10BD pop {r4, pc} + 168 .LVL5: + 169 .L14: + 170 .loc 1 240 1 view .LVU31 + 171 003e 00BF .align 2 + 172 .L13: + 173 0040 00000000 .word uwTickFreq + 174 0044 00000000 .word SystemCoreClock + 175 0048 00000000 .word uwTickPrio + 176 .cfi_endproc + 177 .LFE134: + 179 .section .text.HAL_Init,"ax",%progbits + 180 .align 1 + 181 .global HAL_Init + 182 .syntax unified + 183 .thumb + 184 .thumb_func + 186 HAL_Init: + 187 .LFB130: + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Configure Flash prefetch */ + 188 .loc 1 139 1 is_stmt 1 view -0 + 189 .cfi_startproc + 190 @ args = 0, pretend = 0, frame = 0 + 191 @ frame_needed = 0, uses_anonymous_args = 0 + 192 0000 08B5 push {r3, lr} + 193 .cfi_def_cfa_offset 8 + 194 .cfi_offset 3, -8 + 195 .cfi_offset 14, -4 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 196 .loc 1 142 3 view .LVU33 + 197 0002 074A ldr r2, .L17 + 198 0004 1368 ldr r3, [r2] + 199 0006 43F01003 orr r3, r3, #16 + 200 000a 1360 str r3, [r2] + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 201 .loc 1 146 3 view .LVU34 + 202 000c 0320 movs r0, #3 + 203 000e FFF7FEFF bl HAL_NVIC_SetPriorityGrouping + 204 .LVL6: + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 205 .loc 1 149 3 view .LVU35 + 206 0012 0F20 movs r0, #15 + 207 0014 FFF7FEFF bl HAL_InitTick + ARM GAS /tmp/ccN11lH4.s page 9 + + + 208 .LVL7: + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 209 .loc 1 152 3 view .LVU36 + 210 0018 FFF7FEFF bl HAL_MspInit + 211 .LVL8: + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 212 .loc 1 155 3 view .LVU37 + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 213 .loc 1 156 1 is_stmt 0 view .LVU38 + 214 001c 0020 movs r0, #0 + 215 001e 08BD pop {r3, pc} + 216 .L18: + 217 .align 2 + 218 .L17: + 219 0020 00200240 .word 1073881088 + 220 .cfi_endproc + 221 .LFE130: + 223 .section .text.HAL_IncTick,"ax",%progbits + 224 .align 1 + 225 .weak HAL_IncTick + 226 .syntax unified + 227 .thumb + 228 .thumb_func + 230 HAL_IncTick: + 231 .LFB135: + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @} + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief HAL Control functions + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @verbatim + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** =============================================================================== + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ##### HAL Control functions ##### + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** =============================================================================== + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** [..] This section provides functions allowing to: + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Provide a tick value in millisecond + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Provide a blocking delay in millisecond + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Suspend the time base source interrupt + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Resume the time base source interrupt + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Get the HAL API driver version + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Get the device identifier + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Get the device revision identifier + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Enable/Disable Debug module during Sleep mode + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Enable/Disable Debug module during STOP mode + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Enable/Disable Debug module during STANDBY mode + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @endverbatim + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function is called to increment a global variable "uwTick" + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used as application time base. + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms + ARM GAS /tmp/ccN11lH4.s page 10 + + + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * in SysTick ISR. + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_IncTick(void) + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 232 .loc 1 279 1 is_stmt 1 view -0 + 233 .cfi_startproc + 234 @ args = 0, pretend = 0, frame = 0 + 235 @ frame_needed = 0, uses_anonymous_args = 0 + 236 @ link register save eliminated. + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTick += uwTickFreq; + 237 .loc 1 280 3 view .LVU40 + 238 .loc 1 280 10 is_stmt 0 view .LVU41 + 239 0000 034A ldr r2, .L20 + 240 0002 1168 ldr r1, [r2] + 241 0004 034B ldr r3, .L20+4 + 242 0006 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 243 0008 0B44 add r3, r3, r1 + 244 000a 1360 str r3, [r2] + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 245 .loc 1 281 1 view .LVU42 + 246 000c 7047 bx lr + 247 .L21: + 248 000e 00BF .align 2 + 249 .L20: + 250 0010 00000000 .word uwTick + 251 0014 00000000 .word uwTickFreq + 252 .cfi_endproc + 253 .LFE135: + 255 .section .text.HAL_GetTick,"ax",%progbits + 256 .align 1 + 257 .weak HAL_GetTick + 258 .syntax unified + 259 .thumb + 260 .thumb_func + 262 HAL_GetTick: + 263 .LFB136: + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Povides a tick value in millisecond. + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note The function is declared as __Weak to be overwritten in case of other + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval tick value + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak uint32_t HAL_GetTick(void) + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 264 .loc 1 290 1 is_stmt 1 view -0 + 265 .cfi_startproc + 266 @ args = 0, pretend = 0, frame = 0 + 267 @ frame_needed = 0, uses_anonymous_args = 0 + 268 @ link register save eliminated. + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return uwTick; + 269 .loc 1 291 3 view .LVU44 + 270 .loc 1 291 10 is_stmt 0 view .LVU45 + 271 0000 014B ldr r3, .L23 + ARM GAS /tmp/ccN11lH4.s page 11 + + + 272 0002 1868 ldr r0, [r3] + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 273 .loc 1 292 1 view .LVU46 + 274 0004 7047 bx lr + 275 .L24: + 276 0006 00BF .align 2 + 277 .L23: + 278 0008 00000000 .word uwTick + 279 .cfi_endproc + 280 .LFE136: + 282 .section .text.HAL_GetTickPrio,"ax",%progbits + 283 .align 1 + 284 .global HAL_GetTickPrio + 285 .syntax unified + 286 .thumb + 287 .thumb_func + 289 HAL_GetTickPrio: + 290 .LFB137: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function returns a tick priority. + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval tick priority + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetTickPrio(void) + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 291 .loc 1 299 1 is_stmt 1 view -0 + 292 .cfi_startproc + 293 @ args = 0, pretend = 0, frame = 0 + 294 @ frame_needed = 0, uses_anonymous_args = 0 + 295 @ link register save eliminated. + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return uwTickPrio; + 296 .loc 1 300 3 view .LVU48 + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 297 .loc 1 301 1 is_stmt 0 view .LVU49 + 298 0000 014B ldr r3, .L26 + 299 0002 1868 ldr r0, [r3] + 300 0004 7047 bx lr + 301 .L27: + 302 0006 00BF .align 2 + 303 .L26: + 304 0008 00000000 .word uwTickPrio + 305 .cfi_endproc + 306 .LFE137: + 308 .section .text.HAL_SetTickFreq,"ax",%progbits + 309 .align 1 + 310 .global HAL_SetTickFreq + 311 .syntax unified + 312 .thumb + 313 .thumb_func + 315 HAL_SetTickFreq: + 316 .LVL9: + 317 .LFB138: + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Set new tick Freq. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval status + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + ARM GAS /tmp/ccN11lH4.s page 12 + + + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq) + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 318 .loc 1 308 1 is_stmt 1 view -0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 0 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 .loc 1 308 1 is_stmt 0 view .LVU51 + 323 0000 10B5 push {r4, lr} + 324 .cfi_def_cfa_offset 8 + 325 .cfi_offset 4, -8 + 326 .cfi_offset 14, -4 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_StatusTypeDef status = HAL_OK; + 327 .loc 1 309 3 is_stmt 1 view .LVU52 + 328 .LVL10: + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 329 .loc 1 310 3 view .LVU53 + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** assert_param(IS_TICKFREQ(Freq)); + 330 .loc 1 312 3 view .LVU54 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (uwTickFreq != Freq) + 331 .loc 1 314 3 view .LVU55 + 332 .loc 1 314 18 is_stmt 0 view .LVU56 + 333 0002 084B ldr r3, .L33 + 334 0004 1C78 ldrb r4, [r3] @ zero_extendqisi2 + 335 .loc 1 314 6 view .LVU57 + 336 0006 8442 cmp r4, r0 + 337 0008 01D1 bne .L32 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 338 .loc 1 309 21 view .LVU58 + 339 000a 0020 movs r0, #0 + 340 .LVL11: + 341 .L29: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Back up uwTickFreq frequency */ + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** prevTickFreq = uwTickFreq; + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickFreq = Freq; + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Apply the new tick Freq */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** status = HAL_InitTick(uwTickPrio); + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (status != HAL_OK) + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Restore previous tick frequency */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickFreq = prevTickFreq; + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return status; + 342 .loc 1 332 3 is_stmt 1 view .LVU59 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 343 .loc 1 333 1 is_stmt 0 view .LVU60 + 344 000c 10BD pop {r4, pc} + 345 .LVL12: + 346 .L32: + ARM GAS /tmp/ccN11lH4.s page 13 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 347 .loc 1 317 5 is_stmt 1 view .LVU61 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 348 .loc 1 320 5 view .LVU62 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 349 .loc 1 320 16 is_stmt 0 view .LVU63 + 350 000e 1870 strb r0, [r3] + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 351 .loc 1 323 5 is_stmt 1 view .LVU64 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 352 .loc 1 323 14 is_stmt 0 view .LVU65 + 353 0010 054B ldr r3, .L33+4 + 354 0012 1868 ldr r0, [r3] + 355 .LVL13: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 356 .loc 1 323 14 view .LVU66 + 357 0014 FFF7FEFF bl HAL_InitTick + 358 .LVL14: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 359 .loc 1 325 5 is_stmt 1 view .LVU67 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 360 .loc 1 325 8 is_stmt 0 view .LVU68 + 361 0018 0028 cmp r0, #0 + 362 001a F7D0 beq .L29 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 363 .loc 1 328 7 is_stmt 1 view .LVU69 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 364 .loc 1 328 18 is_stmt 0 view .LVU70 + 365 001c 014B ldr r3, .L33 + 366 001e 1C70 strb r4, [r3] + 367 0020 F4E7 b .L29 + 368 .L34: + 369 0022 00BF .align 2 + 370 .L33: + 371 0024 00000000 .word uwTickFreq + 372 0028 00000000 .word uwTickPrio + 373 .cfi_endproc + 374 .LFE138: + 376 .section .text.HAL_GetTickFreq,"ax",%progbits + 377 .align 1 + 378 .global HAL_GetTickFreq + 379 .syntax unified + 380 .thumb + 381 .thumb_func + 383 HAL_GetTickFreq: + 384 .LFB139: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Return tick frequency. + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Tick frequency. + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Value of @ref HAL_TickFreqTypeDef. + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef HAL_GetTickFreq(void) + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 385 .loc 1 341 1 is_stmt 1 view -0 + 386 .cfi_startproc + 387 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccN11lH4.s page 14 + + + 388 @ frame_needed = 0, uses_anonymous_args = 0 + 389 @ link register save eliminated. + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return uwTickFreq; + 390 .loc 1 342 3 view .LVU72 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 391 .loc 1 343 1 is_stmt 0 view .LVU73 + 392 0000 014B ldr r3, .L36 + 393 0002 1878 ldrb r0, [r3] @ zero_extendqisi2 + 394 0004 7047 bx lr + 395 .L37: + 396 0006 00BF .align 2 + 397 .L36: + 398 0008 00000000 .word uwTickFreq + 399 .cfi_endproc + 400 .LFE139: + 402 .section .text.HAL_Delay,"ax",%progbits + 403 .align 1 + 404 .weak HAL_Delay + 405 .syntax unified + 406 .thumb + 407 .thumb_func + 409 HAL_Delay: + 410 .LVL15: + 411 .LFB140: + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function provides accurate delay (in milliseconds) based + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * on variable incremented. + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is incremented. + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @param Delay specifies the delay time length, in milliseconds. + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_Delay(uint32_t Delay) + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 412 .loc 1 357 1 is_stmt 1 view -0 + 413 .cfi_startproc + 414 @ args = 0, pretend = 0, frame = 0 + 415 @ frame_needed = 0, uses_anonymous_args = 0 + 416 .loc 1 357 1 is_stmt 0 view .LVU75 + 417 0000 38B5 push {r3, r4, r5, lr} + 418 .cfi_def_cfa_offset 16 + 419 .cfi_offset 3, -16 + 420 .cfi_offset 4, -12 + 421 .cfi_offset 5, -8 + 422 .cfi_offset 14, -4 + 423 0002 0446 mov r4, r0 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t tickstart = HAL_GetTick(); + 424 .loc 1 358 3 is_stmt 1 view .LVU76 + 425 .loc 1 358 24 is_stmt 0 view .LVU77 + 426 0004 FFF7FEFF bl HAL_GetTick + 427 .LVL16: + 428 .loc 1 358 24 view .LVU78 + 429 0008 0546 mov r5, r0 + ARM GAS /tmp/ccN11lH4.s page 15 + + + 430 .LVL17: + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t wait = Delay; + 431 .loc 1 359 3 is_stmt 1 view .LVU79 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Add freq to guarantee minimum wait */ + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (wait < HAL_MAX_DELAY) + 432 .loc 1 362 3 view .LVU80 + 433 .loc 1 362 6 is_stmt 0 view .LVU81 + 434 000a B4F1FF3F cmp r4, #-1 + 435 000e 02D0 beq .L40 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** wait += (uint32_t)(uwTickFreq); + 436 .loc 1 364 5 is_stmt 1 view .LVU82 + 437 .loc 1 364 13 is_stmt 0 view .LVU83 + 438 0010 044B ldr r3, .L42 + 439 0012 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 440 .loc 1 364 10 view .LVU84 + 441 0014 1C44 add r4, r4, r3 + 442 .LVL18: + 443 .L40: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** while((HAL_GetTick() - tickstart) < wait) + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 444 .loc 1 369 3 is_stmt 1 view .LVU85 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 445 .loc 1 367 37 discriminator 1 view .LVU86 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 446 .loc 1 367 10 is_stmt 0 discriminator 1 view .LVU87 + 447 0016 FFF7FEFF bl HAL_GetTick + 448 .LVL19: + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 449 .loc 1 367 24 discriminator 1 view .LVU88 + 450 001a 401B subs r0, r0, r5 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 451 .loc 1 367 37 discriminator 1 view .LVU89 + 452 001c A042 cmp r0, r4 + 453 001e FAD3 bcc .L40 + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 454 .loc 1 370 1 view .LVU90 + 455 0020 38BD pop {r3, r4, r5, pc} + 456 .LVL20: + 457 .L43: + 458 .loc 1 370 1 view .LVU91 + 459 0022 00BF .align 2 + 460 .L42: + 461 0024 00000000 .word uwTickFreq + 462 .cfi_endproc + 463 .LFE140: + 465 .section .text.HAL_SuspendTick,"ax",%progbits + 466 .align 1 + 467 .weak HAL_SuspendTick + 468 .syntax unified + 469 .thumb + 470 .thumb_func + 472 HAL_SuspendTick: + ARM GAS /tmp/ccN11lH4.s page 16 + + + 473 .LFB141: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Suspend Tick increment. + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is called, the the SysTick interrupt will be disabled and so Tick increment + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is suspended. + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_SuspendTick(void) + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 474 .loc 1 384 1 is_stmt 1 view -0 + 475 .cfi_startproc + 476 @ args = 0, pretend = 0, frame = 0 + 477 @ frame_needed = 0, uses_anonymous_args = 0 + 478 @ link register save eliminated. + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Disable SysTick Interrupt */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; + 479 .loc 1 386 3 view .LVU93 + 480 .loc 1 386 10 is_stmt 0 view .LVU94 + 481 0000 4FF0E022 mov r2, #-536813568 + 482 0004 1369 ldr r3, [r2, #16] + 483 .loc 1 386 17 view .LVU95 + 484 0006 23F00203 bic r3, r3, #2 + 485 000a 1361 str r3, [r2, #16] + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 486 .loc 1 388 1 view .LVU96 + 487 000c 7047 bx lr + 488 .cfi_endproc + 489 .LFE141: + 491 .section .text.HAL_ResumeTick,"ax",%progbits + 492 .align 1 + 493 .weak HAL_ResumeTick + 494 .syntax unified + 495 .thumb + 496 .thumb_func + 498 HAL_ResumeTick: + 499 .LFB142: + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Resume Tick increment. + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is called, the the SysTick interrupt will be enabled and so Tick increment + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is resumed. + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_ResumeTick(void) + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 500 .loc 1 401 1 is_stmt 1 view -0 + ARM GAS /tmp/ccN11lH4.s page 17 + + + 501 .cfi_startproc + 502 @ args = 0, pretend = 0, frame = 0 + 503 @ frame_needed = 0, uses_anonymous_args = 0 + 504 @ link register save eliminated. + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Enable SysTick Interrupt */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; + 505 .loc 1 403 3 view .LVU98 + 506 .loc 1 403 10 is_stmt 0 view .LVU99 + 507 0000 4FF0E022 mov r2, #-536813568 + 508 0004 1369 ldr r3, [r2, #16] + 509 .loc 1 403 18 view .LVU100 + 510 0006 43F00203 orr r3, r3, #2 + 511 000a 1361 str r3, [r2, #16] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 512 .loc 1 405 1 view .LVU101 + 513 000c 7047 bx lr + 514 .cfi_endproc + 515 .LFE142: + 517 .section .text.HAL_GetHalVersion,"ax",%progbits + 518 .align 1 + 519 .global HAL_GetHalVersion + 520 .syntax unified + 521 .thumb + 522 .thumb_func + 524 HAL_GetHalVersion: + 525 .LFB143: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function returns the HAL revision + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval version 0xXYZR (8bits for each decimal, R for RC) + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetHalVersion(void) + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 526 .loc 1 412 1 is_stmt 1 view -0 + 527 .cfi_startproc + 528 @ args = 0, pretend = 0, frame = 0 + 529 @ frame_needed = 0, uses_anonymous_args = 0 + 530 @ link register save eliminated. + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return __STM32F3xx_HAL_VERSION; + 531 .loc 1 413 2 view .LVU103 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 532 .loc 1 414 1 is_stmt 0 view .LVU104 + 533 0000 0048 ldr r0, .L47 + 534 0002 7047 bx lr + 535 .L48: + 536 .align 2 + 537 .L47: + 538 0004 00070501 .word 17106688 + 539 .cfi_endproc + 540 .LFE143: + 542 .section .text.HAL_GetREVID,"ax",%progbits + 543 .align 1 + 544 .global HAL_GetREVID + 545 .syntax unified + 546 .thumb + 547 .thumb_func + ARM GAS /tmp/ccN11lH4.s page 18 + + + 549 HAL_GetREVID: + 550 .LFB144: + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns the device revision identifier. + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device revision identifier + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetREVID(void) + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 551 .loc 1 421 1 is_stmt 1 view -0 + 552 .cfi_startproc + 553 @ args = 0, pretend = 0, frame = 0 + 554 @ frame_needed = 0, uses_anonymous_args = 0 + 555 @ link register save eliminated. + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return((DBGMCU->IDCODE) >> 16U); + 556 .loc 1 422 3 view .LVU106 + 557 .loc 1 422 17 is_stmt 0 view .LVU107 + 558 0000 014B ldr r3, .L50 + 559 0002 1868 ldr r0, [r3] + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 560 .loc 1 423 1 view .LVU108 + 561 0004 000C lsrs r0, r0, #16 + 562 0006 7047 bx lr + 563 .L51: + 564 .align 2 + 565 .L50: + 566 0008 002004E0 .word -536600576 + 567 .cfi_endproc + 568 .LFE144: + 570 .section .text.HAL_GetDEVID,"ax",%progbits + 571 .align 1 + 572 .global HAL_GetDEVID + 573 .syntax unified + 574 .thumb + 575 .thumb_func + 577 HAL_GetDEVID: + 578 .LFB145: + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns the device identifier. + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetDEVID(void) + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 579 .loc 1 430 1 is_stmt 1 view -0 + 580 .cfi_startproc + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 @ link register save eliminated. + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK); + 584 .loc 1 431 3 view .LVU110 + 585 .loc 1 431 17 is_stmt 0 view .LVU111 + 586 0000 024B ldr r3, .L53 + 587 0002 1868 ldr r0, [r3] + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 588 .loc 1 432 1 view .LVU112 + 589 0004 C0F30B00 ubfx r0, r0, #0, #12 + ARM GAS /tmp/ccN11lH4.s page 19 + + + 590 0008 7047 bx lr + 591 .L54: + 592 000a 00BF .align 2 + 593 .L53: + 594 000c 002004E0 .word -536600576 + 595 .cfi_endproc + 596 .LFE145: + 598 .section .text.HAL_GetUIDw0,"ax",%progbits + 599 .align 1 + 600 .global HAL_GetUIDw0 + 601 .syntax unified + 602 .thumb + 603 .thumb_func + 605 HAL_GetUIDw0: + 606 .LFB146: + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns first word of the unique device identifier (UID based on 96 bits) + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetUIDw0(void) + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 607 .loc 1 439 1 is_stmt 1 view -0 + 608 .cfi_startproc + 609 @ args = 0, pretend = 0, frame = 0 + 610 @ frame_needed = 0, uses_anonymous_args = 0 + 611 @ link register save eliminated. + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return(READ_REG(*((uint32_t *)UID_BASE))); + 612 .loc 1 440 4 view .LVU114 + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 613 .loc 1 441 1 is_stmt 0 view .LVU115 + 614 0000 014B ldr r3, .L56 + 615 0002 D3F8AC07 ldr r0, [r3, #1964] + 616 0006 7047 bx lr + 617 .L57: + 618 .align 2 + 619 .L56: + 620 0008 00F0FF1F .word 536866816 + 621 .cfi_endproc + 622 .LFE146: + 624 .section .text.HAL_GetUIDw1,"ax",%progbits + 625 .align 1 + 626 .global HAL_GetUIDw1 + 627 .syntax unified + 628 .thumb + 629 .thumb_func + 631 HAL_GetUIDw1: + 632 .LFB147: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns second word of the unique device identifier (UID based on 96 bits) + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetUIDw1(void) + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 633 .loc 1 448 1 is_stmt 1 view -0 + 634 .cfi_startproc + ARM GAS /tmp/ccN11lH4.s page 20 + + + 635 @ args = 0, pretend = 0, frame = 0 + 636 @ frame_needed = 0, uses_anonymous_args = 0 + 637 @ link register save eliminated. + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); + 638 .loc 1 449 4 view .LVU117 + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 639 .loc 1 450 1 is_stmt 0 view .LVU118 + 640 0000 014B ldr r3, .L59 + 641 0002 D3F8B007 ldr r0, [r3, #1968] + 642 0006 7047 bx lr + 643 .L60: + 644 .align 2 + 645 .L59: + 646 0008 00F0FF1F .word 536866816 + 647 .cfi_endproc + 648 .LFE147: + 650 .section .text.HAL_GetUIDw2,"ax",%progbits + 651 .align 1 + 652 .global HAL_GetUIDw2 + 653 .syntax unified + 654 .thumb + 655 .thumb_func + 657 HAL_GetUIDw2: + 658 .LFB148: + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns third word of the unique device identifier (UID based on 96 bits) + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetUIDw2(void) + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 659 .loc 1 457 1 is_stmt 1 view -0 + 660 .cfi_startproc + 661 @ args = 0, pretend = 0, frame = 0 + 662 @ frame_needed = 0, uses_anonymous_args = 0 + 663 @ link register save eliminated. + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); + 664 .loc 1 458 4 view .LVU120 + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 665 .loc 1 459 1 is_stmt 0 view .LVU121 + 666 0000 014B ldr r3, .L62 + 667 0002 D3F8B407 ldr r0, [r3, #1972] + 668 0006 7047 bx lr + 669 .L63: + 670 .align 2 + 671 .L62: + 672 0008 00F0FF1F .word 536866816 + 673 .cfi_endproc + 674 .LFE148: + 676 .section .text.HAL_DBGMCU_EnableDBGSleepMode,"ax",%progbits + 677 .align 1 + 678 .global HAL_DBGMCU_EnableDBGSleepMode + 679 .syntax unified + 680 .thumb + 681 .thumb_func + 683 HAL_DBGMCU_EnableDBGSleepMode: + 684 .LFB149: + ARM GAS /tmp/ccN11lH4.s page 21 + + + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Enable the Debug Module during SLEEP mode + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_EnableDBGSleepMode(void) + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 685 .loc 1 466 1 is_stmt 1 view -0 + 686 .cfi_startproc + 687 @ args = 0, pretend = 0, frame = 0 + 688 @ frame_needed = 0, uses_anonymous_args = 0 + 689 @ link register save eliminated. + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); + 690 .loc 1 467 3 view .LVU123 + 691 0000 024A ldr r2, .L65 + 692 0002 5368 ldr r3, [r2, #4] + 693 0004 43F00103 orr r3, r3, #1 + 694 0008 5360 str r3, [r2, #4] + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 695 .loc 1 468 1 is_stmt 0 view .LVU124 + 696 000a 7047 bx lr + 697 .L66: + 698 .align 2 + 699 .L65: + 700 000c 002004E0 .word -536600576 + 701 .cfi_endproc + 702 .LFE149: + 704 .section .text.HAL_DBGMCU_DisableDBGSleepMode,"ax",%progbits + 705 .align 1 + 706 .global HAL_DBGMCU_DisableDBGSleepMode + 707 .syntax unified + 708 .thumb + 709 .thumb_func + 711 HAL_DBGMCU_DisableDBGSleepMode: + 712 .LFB150: + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Disable the Debug Module during SLEEP mode + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_DisableDBGSleepMode(void) + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 713 .loc 1 475 1 is_stmt 1 view -0 + 714 .cfi_startproc + 715 @ args = 0, pretend = 0, frame = 0 + 716 @ frame_needed = 0, uses_anonymous_args = 0 + 717 @ link register save eliminated. + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); + 718 .loc 1 476 3 view .LVU126 + 719 0000 024A ldr r2, .L68 + 720 0002 5368 ldr r3, [r2, #4] + 721 0004 23F00103 bic r3, r3, #1 + 722 0008 5360 str r3, [r2, #4] + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 723 .loc 1 477 1 is_stmt 0 view .LVU127 + 724 000a 7047 bx lr + 725 .L69: + ARM GAS /tmp/ccN11lH4.s page 22 + + + 726 .align 2 + 727 .L68: + 728 000c 002004E0 .word -536600576 + 729 .cfi_endproc + 730 .LFE150: + 732 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits + 733 .align 1 + 734 .global HAL_DBGMCU_EnableDBGStopMode + 735 .syntax unified + 736 .thumb + 737 .thumb_func + 739 HAL_DBGMCU_EnableDBGStopMode: + 740 .LFB151: + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Enable the Debug Module during STOP mode + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void) + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 741 .loc 1 484 1 is_stmt 1 view -0 + 742 .cfi_startproc + 743 @ args = 0, pretend = 0, frame = 0 + 744 @ frame_needed = 0, uses_anonymous_args = 0 + 745 @ link register save eliminated. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 746 .loc 1 485 3 view .LVU129 + 747 0000 024A ldr r2, .L71 + 748 0002 5368 ldr r3, [r2, #4] + 749 0004 43F00203 orr r3, r3, #2 + 750 0008 5360 str r3, [r2, #4] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 751 .loc 1 486 1 is_stmt 0 view .LVU130 + 752 000a 7047 bx lr + 753 .L72: + 754 .align 2 + 755 .L71: + 756 000c 002004E0 .word -536600576 + 757 .cfi_endproc + 758 .LFE151: + 760 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits + 761 .align 1 + 762 .global HAL_DBGMCU_DisableDBGStopMode + 763 .syntax unified + 764 .thumb + 765 .thumb_func + 767 HAL_DBGMCU_DisableDBGStopMode: + 768 .LFB152: + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Disable the Debug Module during STOP mode + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void) + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 769 .loc 1 493 1 is_stmt 1 view -0 + 770 .cfi_startproc + ARM GAS /tmp/ccN11lH4.s page 23 + + + 771 @ args = 0, pretend = 0, frame = 0 + 772 @ frame_needed = 0, uses_anonymous_args = 0 + 773 @ link register save eliminated. + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 774 .loc 1 494 3 view .LVU132 + 775 0000 024A ldr r2, .L74 + 776 0002 5368 ldr r3, [r2, #4] + 777 0004 23F00203 bic r3, r3, #2 + 778 0008 5360 str r3, [r2, #4] + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 779 .loc 1 495 1 is_stmt 0 view .LVU133 + 780 000a 7047 bx lr + 781 .L75: + 782 .align 2 + 783 .L74: + 784 000c 002004E0 .word -536600576 + 785 .cfi_endproc + 786 .LFE152: + 788 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits + 789 .align 1 + 790 .global HAL_DBGMCU_EnableDBGStandbyMode + 791 .syntax unified + 792 .thumb + 793 .thumb_func + 795 HAL_DBGMCU_EnableDBGStandbyMode: + 796 .LFB153: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Enable the Debug Module during STANDBY mode + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void) + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 797 .loc 1 502 1 is_stmt 1 view -0 + 798 .cfi_startproc + 799 @ args = 0, pretend = 0, frame = 0 + 800 @ frame_needed = 0, uses_anonymous_args = 0 + 801 @ link register save eliminated. + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 802 .loc 1 503 3 view .LVU135 + 803 0000 024A ldr r2, .L77 + 804 0002 5368 ldr r3, [r2, #4] + 805 0004 43F00403 orr r3, r3, #4 + 806 0008 5360 str r3, [r2, #4] + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 807 .loc 1 504 1 is_stmt 0 view .LVU136 + 808 000a 7047 bx lr + 809 .L78: + 810 .align 2 + 811 .L77: + 812 000c 002004E0 .word -536600576 + 813 .cfi_endproc + 814 .LFE153: + 816 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits + 817 .align 1 + 818 .global HAL_DBGMCU_DisableDBGStandbyMode + 819 .syntax unified + ARM GAS /tmp/ccN11lH4.s page 24 + + + 820 .thumb + 821 .thumb_func + 823 HAL_DBGMCU_DisableDBGStandbyMode: + 824 .LFB154: + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void) + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 825 .loc 1 511 1 is_stmt 1 view -0 + 826 .cfi_startproc + 827 @ args = 0, pretend = 0, frame = 0 + 828 @ frame_needed = 0, uses_anonymous_args = 0 + 829 @ link register save eliminated. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 830 .loc 1 512 3 view .LVU138 + 831 0000 024A ldr r2, .L80 + 832 0002 5368 ldr r3, [r2, #4] + 833 0004 23F00403 bic r3, r3, #4 + 834 0008 5360 str r3, [r2, #4] + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 835 .loc 1 513 1 is_stmt 0 view .LVU139 + 836 000a 7047 bx lr + 837 .L81: + 838 .align 2 + 839 .L80: + 840 000c 002004E0 .word -536600576 + 841 .cfi_endproc + 842 .LFE154: + 844 .global uwTickFreq + 845 .section .data.uwTickFreq,"aw" + 848 uwTickFreq: + 849 0000 01 .byte 1 + 850 .global uwTickPrio + 851 .section .data.uwTickPrio,"aw" + 852 .align 2 + 855 uwTickPrio: + 856 0000 10000000 .word 16 + 857 .global uwTick + 858 .section .bss.uwTick,"aw",%nobits + 859 .align 2 + 862 uwTick: + 863 0000 00000000 .space 4 + 864 .text + 865 .Letext0: + 866 .file 2 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 867 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 868 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 869 .file 5 "Drivers/CMSIS/Include/core_cm4.h" + 870 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 871 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 872 .file 8 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 873 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" + ARM GAS /tmp/ccN11lH4.s page 25 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal.c + /tmp/ccN11lH4.s:21 .text.HAL_MspInit:00000000 $t + /tmp/ccN11lH4.s:27 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccN11lH4.s:40 .text.HAL_MspDeInit:00000000 $t + /tmp/ccN11lH4.s:46 .text.HAL_MspDeInit:00000000 HAL_MspDeInit + /tmp/ccN11lH4.s:59 .text.HAL_DeInit:00000000 $t + /tmp/ccN11lH4.s:65 .text.HAL_DeInit:00000000 HAL_DeInit + /tmp/ccN11lH4.s:100 .text.HAL_DeInit:00000020 $d + /tmp/ccN11lH4.s:105 .text.HAL_InitTick:00000000 $t + /tmp/ccN11lH4.s:111 .text.HAL_InitTick:00000000 HAL_InitTick + /tmp/ccN11lH4.s:173 .text.HAL_InitTick:00000040 $d + /tmp/ccN11lH4.s:848 .data.uwTickFreq:00000000 uwTickFreq + /tmp/ccN11lH4.s:855 .data.uwTickPrio:00000000 uwTickPrio + /tmp/ccN11lH4.s:180 .text.HAL_Init:00000000 $t + /tmp/ccN11lH4.s:186 .text.HAL_Init:00000000 HAL_Init + /tmp/ccN11lH4.s:219 .text.HAL_Init:00000020 $d + /tmp/ccN11lH4.s:224 .text.HAL_IncTick:00000000 $t + /tmp/ccN11lH4.s:230 .text.HAL_IncTick:00000000 HAL_IncTick + /tmp/ccN11lH4.s:250 .text.HAL_IncTick:00000010 $d + /tmp/ccN11lH4.s:862 .bss.uwTick:00000000 uwTick + /tmp/ccN11lH4.s:256 .text.HAL_GetTick:00000000 $t + /tmp/ccN11lH4.s:262 .text.HAL_GetTick:00000000 HAL_GetTick + /tmp/ccN11lH4.s:278 .text.HAL_GetTick:00000008 $d + /tmp/ccN11lH4.s:283 .text.HAL_GetTickPrio:00000000 $t + /tmp/ccN11lH4.s:289 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio + /tmp/ccN11lH4.s:304 .text.HAL_GetTickPrio:00000008 $d + /tmp/ccN11lH4.s:309 .text.HAL_SetTickFreq:00000000 $t + /tmp/ccN11lH4.s:315 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq + /tmp/ccN11lH4.s:371 .text.HAL_SetTickFreq:00000024 $d + /tmp/ccN11lH4.s:377 .text.HAL_GetTickFreq:00000000 $t + /tmp/ccN11lH4.s:383 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq + /tmp/ccN11lH4.s:398 .text.HAL_GetTickFreq:00000008 $d + /tmp/ccN11lH4.s:403 .text.HAL_Delay:00000000 $t + /tmp/ccN11lH4.s:409 .text.HAL_Delay:00000000 HAL_Delay + /tmp/ccN11lH4.s:461 .text.HAL_Delay:00000024 $d + /tmp/ccN11lH4.s:466 .text.HAL_SuspendTick:00000000 $t + /tmp/ccN11lH4.s:472 .text.HAL_SuspendTick:00000000 HAL_SuspendTick + /tmp/ccN11lH4.s:492 .text.HAL_ResumeTick:00000000 $t + /tmp/ccN11lH4.s:498 .text.HAL_ResumeTick:00000000 HAL_ResumeTick + /tmp/ccN11lH4.s:518 .text.HAL_GetHalVersion:00000000 $t + /tmp/ccN11lH4.s:524 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion + /tmp/ccN11lH4.s:538 .text.HAL_GetHalVersion:00000004 $d + /tmp/ccN11lH4.s:543 .text.HAL_GetREVID:00000000 $t + /tmp/ccN11lH4.s:549 .text.HAL_GetREVID:00000000 HAL_GetREVID + /tmp/ccN11lH4.s:566 .text.HAL_GetREVID:00000008 $d + /tmp/ccN11lH4.s:571 .text.HAL_GetDEVID:00000000 $t + /tmp/ccN11lH4.s:577 .text.HAL_GetDEVID:00000000 HAL_GetDEVID + /tmp/ccN11lH4.s:594 .text.HAL_GetDEVID:0000000c $d + /tmp/ccN11lH4.s:599 .text.HAL_GetUIDw0:00000000 $t + /tmp/ccN11lH4.s:605 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0 + /tmp/ccN11lH4.s:620 .text.HAL_GetUIDw0:00000008 $d + /tmp/ccN11lH4.s:625 .text.HAL_GetUIDw1:00000000 $t + /tmp/ccN11lH4.s:631 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1 + /tmp/ccN11lH4.s:646 .text.HAL_GetUIDw1:00000008 $d + /tmp/ccN11lH4.s:651 .text.HAL_GetUIDw2:00000000 $t + /tmp/ccN11lH4.s:657 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2 + ARM GAS /tmp/ccN11lH4.s page 26 + + + /tmp/ccN11lH4.s:672 .text.HAL_GetUIDw2:00000008 $d + /tmp/ccN11lH4.s:677 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t + /tmp/ccN11lH4.s:683 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode + /tmp/ccN11lH4.s:700 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d + /tmp/ccN11lH4.s:705 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t + /tmp/ccN11lH4.s:711 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode + /tmp/ccN11lH4.s:728 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d + /tmp/ccN11lH4.s:733 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t + /tmp/ccN11lH4.s:739 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode + /tmp/ccN11lH4.s:756 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d + /tmp/ccN11lH4.s:761 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t + /tmp/ccN11lH4.s:767 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode + /tmp/ccN11lH4.s:784 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d + /tmp/ccN11lH4.s:789 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t + /tmp/ccN11lH4.s:795 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode + /tmp/ccN11lH4.s:812 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d + /tmp/ccN11lH4.s:817 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t + /tmp/ccN11lH4.s:823 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode + /tmp/ccN11lH4.s:840 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d + /tmp/ccN11lH4.s:852 .data.uwTickPrio:00000000 $d + /tmp/ccN11lH4.s:859 .bss.uwTick:00000000 $d + +UNDEFINED SYMBOLS +HAL_SYSTICK_Config +HAL_NVIC_SetPriority +SystemCoreClock +HAL_NVIC_SetPriorityGrouping diff --git a/build/stm32f3xx_hal.o b/build/stm32f3xx_hal.o new file mode 100644 index 0000000..0ae476c Binary files /dev/null and b/build/stm32f3xx_hal.o differ diff --git a/build/stm32f3xx_hal_can.d b/build/stm32f3xx_hal_can.d new file mode 100644 index 0000000..3eda678 --- /dev/null +++ b/build/stm32f3xx_hal_can.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_can.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_can.lst b/build/stm32f3xx_hal_can.lst new file mode 100644 index 0000000..a5b86e7 --- /dev/null +++ b/build/stm32f3xx_hal_can.lst @@ -0,0 +1,7288 @@ +ARM GAS /tmp/cciHzaOX.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_can.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c" + 20 .section .text.HAL_CAN_MspInit,"ax",%progbits + 21 .align 1 + 22 .weak HAL_CAN_MspInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_CAN_MspInit: + 28 .LVL0: + 29 .LFB132: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @file stm32f3xx_hal_can.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * functionalities of the Controller Area Network (CAN) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Configuration functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Control functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Interrupts management + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Callbacks functions + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + Peripheral State and Error functions + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @attention + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Copyright (c) 2016 STMicroelectronics. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * All rights reserved. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This software is licensed under terms that can be found in the LICENSE file + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * in the root directory of this software component. + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### How to use this driver ##### + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + ARM GAS /tmp/cciHzaOX.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Initialize the CAN low level resources by implementing the + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspInit(): + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Configure CAN pins + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Enable the clock for the CAN GPIOs + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Configure CAN pins as alternate function open-drain + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Configure the CAN interrupt priority using + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_NVIC_SetPriority() + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** function resorts to HAL_CAN_MspInit() for low-level initialization. + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Configure the reception filters using the following configuration + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** functions: + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_ConfigFilter() + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Start the CAN module using HAL_CAN_Start() function. At this level + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the node is active on the bus: it receive messages, and can send + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** messages. + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) To manage messages transmission, the following Tx control functions + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can be used: + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_AddTxMessage() to request transmission of a new + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** message. + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** message. + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mailboxes. + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_IsTxMessagePending() to check if a message is pending + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** in a Tx mailbox. + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** sent, if time triggered communication mode is enabled. + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) When a message is received into the CAN Rx FIFOs, it can be retrieved + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using the HAL_CAN_GetRxMessage() function. The function + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** stored in the Rx Fifo. + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Calling the HAL_CAN_Stop() function stops the CAN module. + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The deinitialization is achieved with HAL_CAN_DeInit() function. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Polling mode operation *** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================== + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Reception: + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** until at least one message is received. + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Then get the message using HAL_CAN_GetRxMessage(). + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Transmission: + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Monitor the Tx mailboxes availability until at least one Tx + ARM GAS /tmp/cciHzaOX.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Then request transmission of a message using + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_AddTxMessage(). + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Interrupt mode operation *** + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ================================ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Notifications are activated using HAL_CAN_ActivateNotification() + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** function. Then, the process can be controlled through the + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** available user callbacks: HAL_CAN_xxxCallback(), using same APIs + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Notifications can be deactivated using + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_DeactivateNotification() function. + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** here. + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Directly get the Rx message in the callback, using + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_GetRxMessage(). + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Or deactivate the notification in the callback without + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** getting the Rx message. The Rx message can then be got later + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using HAL_CAN_GetRxMessage(). Once the Rx message have been + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** read, the notification can be activated again. + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Sleep mode *** + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ================== + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The CAN peripheral can be put in sleep mode (low power), using + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** current CAN activity (transmission or reception of a CAN frame) will + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** be completed. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) A notification can be activated to be informed when the sleep mode + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** will be entered. + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) It can be checked if the sleep mode is entered using + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_IsSleepActive(). + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Note that the CAN state (accessible from the API HAL_CAN_GetState()) + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** submitted (the sleep mode is not yet entered), and become + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (#) The wake-up from sleep mode can be triggered by two ways: + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) Using HAL_CAN_WakeUp(). When returning from this function, + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the sleep mode is exited (if return status is HAL_OK). + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (++) When a start of Rx CAN frame is detected by the CAN peripheral, + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if automatic wake up mode is enabled. + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *** Callback registration *** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================= + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1 + ARM GAS /tmp/cciHzaOX.s page 4 + + + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** allows the user to configure dynamically the driver callbacks. + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Use Function HAL_CAN_RegisterCallback() to register an interrupt callback. + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Function HAL_CAN_RegisterCallback() allows to register following callbacks: + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) SleepCallback : Sleep Callback. + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) ErrorCallback : Error Callback. + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and a pointer to the user callback function. + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** weak function. + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle, + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and the Callback ID. + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This function allows to reset following callbacks: + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) SleepCallback : Sleep Callback. + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) ErrorCallback : Error Callback. + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET, + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** all callbacks are set to the corresponding weak functions: + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** example HAL_CAN_ErrorCallback(). + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Exception done for MspInit and MspDeInit functions that are + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** these callbacks are null (not registered beforehand). + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit() + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only. + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** Exception done MspInit/MspDeInit that can be registered/unregistered + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state, + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** In that case first register the MspInit/MspDeInit user callbacks + ARM GAS /tmp/cciHzaOX.s page 5 + + + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit() + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** or HAL_CAN_Init() function. + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** not defined, the callback registration feature is not available and all callbacks + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** are set to the corresponding weak functions. + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ****************************************************************************** + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Includes ------------------------------------------------------------------*/ + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #include "stm32f3xx_hal.h" + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @addtogroup STM32F3xx_HAL_Driver + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if defined(CAN) + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN CAN + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN driver modules + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #ifdef HAL_CAN_MODULE_ENABLED + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #ifdef HAL_CAN_LEGACY_MODULE_ENABLED + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private typedef -----------------------------------------------------------*/ + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private define ------------------------------------------------------------*/ + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Private_Constants CAN Private Constants + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #define CAN_TIMEOUT_VALUE 10U + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private macro -------------------------------------------------------------*/ + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private variables ---------------------------------------------------------*/ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Private function prototypes -----------------------------------------------*/ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exported functions --------------------------------------------------------*/ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions CAN Exported Functions + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initialization and Configuration functions + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Initialization and de-initialization functions ##### + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: + ARM GAS /tmp/cciHzaOX.s page 6 + + + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Init : Initialize and configure the CAN. + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_DeInit : De-initialize the CAN. + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_MspInit : Initialize the CAN MSP. + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initializes the CAN peripheral according to the specified + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * parameters in the CAN_InitStruct. + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */ + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan == NULL) + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset callbacks to legacy functions */ + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0M + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0F + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1M + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1F + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbo + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbo + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbo + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbo + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbo + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbo + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCal + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFr + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCal + ARM GAS /tmp/cciHzaOX.s page 7 + + + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->MspInitCallback == NULL) + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback(hcan); + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspInit(hcan); + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request initialisation */ + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait initialisation acknowledge */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exit from sleep mode */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Sleep mode leave acknowledge */ + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + ARM GAS /tmp/cciHzaOX.s page 8 + + + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the time triggered communication mode */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.TimeTriggeredMode == ENABLE) + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic bus-off management */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoBusOff == ENABLE) + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic wake-up mode */ + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoWakeUp == ENABLE) + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the automatic retransmission */ + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.AutoRetransmission == ENABLE) + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the receive FIFO locked mode */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.ReceiveFifoLocked == ENABLE) + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the transmit FIFO priority */ + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->Init.TransmitFifoPriority == ENABLE) + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + ARM GAS /tmp/cciHzaOX.s page 9 + + + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set the bit timing register */ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.SyncJumpWidth | + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.TimeSeg1 | + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.TimeSeg2 | + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (hcan->Init.Prescaler - 1U))); + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialize the error code */ + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialize the CAN state */ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Deinitializes the CAN peripheral registers to their default + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * reset values. + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */ + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan == NULL) + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Stop the CAN module */ + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (void)HAL_CAN_Stop(hcan); + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->MspDeInitCallback == NULL) + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */ + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback(hcan); + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_MspDeInit(hcan); + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ + ARM GAS /tmp/cciHzaOX.s page 10 + + + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN peripheral */ + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN ErrorCode */ + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_RESET; + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Initializes the CAN MSP. + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 30 .loc 1 507 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 35 .loc 1 509 3 view .LVU1 + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_MspInit could be implemented in the user file + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 36 .loc 1 514 1 is_stmt 0 view .LVU2 + 37 0000 7047 bx lr + 38 .cfi_endproc + 39 .LFE132: + 41 .section .text.HAL_CAN_Init,"ax",%progbits + 42 .align 1 + 43 .global HAL_CAN_Init + 44 .syntax unified + 45 .thumb + 46 .thumb_func + 48 HAL_CAN_Init: + 49 .LVL1: + 50 .LFB130: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; + 51 .loc 1 275 1 is_stmt 1 view -0 + 52 .cfi_startproc + 53 @ args = 0, pretend = 0, frame = 0 + 54 @ frame_needed = 0, uses_anonymous_args = 0 + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 55 .loc 1 276 3 view .LVU4 + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 56 .loc 1 279 3 view .LVU5 + ARM GAS /tmp/cciHzaOX.s page 11 + + + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 57 .loc 1 279 6 is_stmt 0 view .LVU6 + 58 0000 0028 cmp r0, #0 + 59 0002 00F0A180 beq .L21 + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; + 60 .loc 1 275 1 view .LVU7 + 61 0006 38B5 push {r3, r4, r5, lr} + 62 .cfi_def_cfa_offset 16 + 63 .cfi_offset 3, -16 + 64 .cfi_offset 4, -12 + 65 .cfi_offset 5, -8 + 66 .cfi_offset 14, -4 + 67 0008 0446 mov r4, r0 + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); + 68 .loc 1 285 3 is_stmt 1 view .LVU8 + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); + 69 .loc 1 286 3 view .LVU9 + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); + 70 .loc 1 287 3 view .LVU10 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); + 71 .loc 1 288 3 view .LVU11 + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); + 72 .loc 1 289 3 view .LVU12 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); + 73 .loc 1 290 3 view .LVU13 + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); + 74 .loc 1 291 3 view .LVU14 + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); + 75 .loc 1 292 3 view .LVU15 + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); + 76 .loc 1 293 3 view .LVU16 + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); + 77 .loc 1 294 3 view .LVU17 + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); + 78 .loc 1 295 3 view .LVU18 + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 79 .loc 1 296 3 view .LVU19 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 80 .loc 1 326 3 view .LVU20 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 81 .loc 1 326 11 is_stmt 0 view .LVU21 + 82 000a 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 83 .loc 1 326 6 view .LVU22 + 84 000e D3B1 cbz r3, .L26 + 85 .LVL2: + 86 .L4: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 87 .loc 1 334 3 is_stmt 1 view .LVU23 + 88 0010 2268 ldr r2, [r4] + 89 0012 1368 ldr r3, [r2] + 90 0014 43F00103 orr r3, r3, #1 + 91 0018 1360 str r3, [r2] + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 92 .loc 1 337 3 view .LVU24 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 93 .loc 1 337 15 is_stmt 0 view .LVU25 + ARM GAS /tmp/cciHzaOX.s page 12 + + + 94 001a FFF7FEFF bl HAL_GetTick + 95 .LVL3: + 96 001e 0546 mov r5, r0 + 97 .LVL4: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 98 .loc 1 340 3 is_stmt 1 view .LVU26 + 99 .L5: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 100 .loc 1 340 47 view .LVU27 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 101 .loc 1 340 15 is_stmt 0 view .LVU28 + 102 0020 2368 ldr r3, [r4] + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 103 .loc 1 340 25 view .LVU29 + 104 0022 5A68 ldr r2, [r3, #4] + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 105 .loc 1 340 47 view .LVU30 + 106 0024 12F0010F tst r2, #1 + 107 0028 10D1 bne .L27 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 108 .loc 1 342 5 is_stmt 1 view .LVU31 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 109 .loc 1 342 10 is_stmt 0 view .LVU32 + 110 002a FFF7FEFF bl HAL_GetTick + 111 .LVL5: + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 112 .loc 1 342 24 discriminator 1 view .LVU33 + 113 002e 401B subs r0, r0, r5 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 114 .loc 1 342 8 discriminator 1 view .LVU34 + 115 0030 0A28 cmp r0, #10 + 116 0032 F5D9 bls .L5 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 117 .loc 1 345 7 is_stmt 1 view .LVU35 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 118 .loc 1 345 11 is_stmt 0 view .LVU36 + 119 0034 636A ldr r3, [r4, #36] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 120 .loc 1 345 23 view .LVU37 + 121 0036 43F40033 orr r3, r3, #131072 + 122 003a 6362 str r3, [r4, #36] + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 123 .loc 1 348 7 is_stmt 1 view .LVU38 + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 124 .loc 1 348 19 is_stmt 0 view .LVU39 + 125 003c 0523 movs r3, #5 + 126 003e 84F82030 strb r3, [r4, #32] + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 127 .loc 1 350 7 is_stmt 1 view .LVU40 + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 128 .loc 1 350 14 is_stmt 0 view .LVU41 + 129 0042 0120 movs r0, #1 + 130 .L3: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 131 .loc 1 450 1 view .LVU42 + 132 0044 38BD pop {r3, r4, r5, pc} + 133 .LVL6: + ARM GAS /tmp/cciHzaOX.s page 13 + + + 134 .L26: + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 135 .loc 1 329 5 is_stmt 1 view .LVU43 + 136 0046 FFF7FEFF bl HAL_CAN_MspInit + 137 .LVL7: + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 138 .loc 1 329 5 is_stmt 0 view .LVU44 + 139 004a E1E7 b .L4 + 140 .LVL8: + 141 .L27: + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 142 .loc 1 355 3 is_stmt 1 view .LVU45 + 143 004c 1A68 ldr r2, [r3] + 144 004e 22F00202 bic r2, r2, #2 + 145 0052 1A60 str r2, [r3] + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 146 .loc 1 358 3 view .LVU46 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 147 .loc 1 358 15 is_stmt 0 view .LVU47 + 148 0054 FFF7FEFF bl HAL_GetTick + 149 .LVL9: + 150 0058 0546 mov r5, r0 + 151 .LVL10: + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 152 .loc 1 361 3 is_stmt 1 view .LVU48 + 153 .L7: + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 154 .loc 1 361 47 view .LVU49 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 155 .loc 1 361 15 is_stmt 0 view .LVU50 + 156 005a 2368 ldr r3, [r4] + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 157 .loc 1 361 25 view .LVU51 + 158 005c 5A68 ldr r2, [r3, #4] + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 159 .loc 1 361 47 view .LVU52 + 160 005e 12F0020F tst r2, #2 + 161 0062 0DD0 beq .L28 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 162 .loc 1 363 5 is_stmt 1 view .LVU53 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 163 .loc 1 363 10 is_stmt 0 view .LVU54 + 164 0064 FFF7FEFF bl HAL_GetTick + 165 .LVL11: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 166 .loc 1 363 24 discriminator 1 view .LVU55 + 167 0068 401B subs r0, r0, r5 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 168 .loc 1 363 8 discriminator 1 view .LVU56 + 169 006a 0A28 cmp r0, #10 + 170 006c F5D9 bls .L7 + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 171 .loc 1 366 7 is_stmt 1 view .LVU57 + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 172 .loc 1 366 11 is_stmt 0 view .LVU58 + 173 006e 636A ldr r3, [r4, #36] + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + ARM GAS /tmp/cciHzaOX.s page 14 + + + 174 .loc 1 366 23 view .LVU59 + 175 0070 43F40033 orr r3, r3, #131072 + 176 0074 6362 str r3, [r4, #36] + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 177 .loc 1 369 7 is_stmt 1 view .LVU60 + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 178 .loc 1 369 19 is_stmt 0 view .LVU61 + 179 0076 0523 movs r3, #5 + 180 0078 84F82030 strb r3, [r4, #32] + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 181 .loc 1 371 7 is_stmt 1 view .LVU62 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 182 .loc 1 371 14 is_stmt 0 view .LVU63 + 183 007c 0120 movs r0, #1 + 184 007e E1E7 b .L3 + 185 .L28: + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 186 .loc 1 376 3 is_stmt 1 view .LVU64 + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 187 .loc 1 376 17 is_stmt 0 view .LVU65 + 188 0080 227E ldrb r2, [r4, #24] @ zero_extendqisi2 + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 189 .loc 1 376 6 view .LVU66 + 190 0082 012A cmp r2, #1 + 191 0084 3DD0 beq .L29 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 192 .loc 1 382 5 is_stmt 1 view .LVU67 + 193 0086 1A68 ldr r2, [r3] + 194 0088 22F08002 bic r2, r2, #128 + 195 008c 1A60 str r2, [r3] + 196 .L10: + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 197 .loc 1 386 3 view .LVU68 + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 198 .loc 1 386 17 is_stmt 0 view .LVU69 + 199 008e 637E ldrb r3, [r4, #25] @ zero_extendqisi2 + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 200 .loc 1 386 6 view .LVU70 + 201 0090 012B cmp r3, #1 + 202 0092 3BD0 beq .L30 + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 203 .loc 1 392 5 is_stmt 1 view .LVU71 + 204 0094 2268 ldr r2, [r4] + 205 0096 1368 ldr r3, [r2] + 206 0098 23F04003 bic r3, r3, #64 + 207 009c 1360 str r3, [r2] + 208 .L12: + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 209 .loc 1 396 3 view .LVU72 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 210 .loc 1 396 17 is_stmt 0 view .LVU73 + 211 009e A37E ldrb r3, [r4, #26] @ zero_extendqisi2 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 212 .loc 1 396 6 view .LVU74 + 213 00a0 012B cmp r3, #1 + 214 00a2 39D0 beq .L31 + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + ARM GAS /tmp/cciHzaOX.s page 15 + + + 215 .loc 1 402 5 is_stmt 1 view .LVU75 + 216 00a4 2268 ldr r2, [r4] + 217 00a6 1368 ldr r3, [r2] + 218 00a8 23F02003 bic r3, r3, #32 + 219 00ac 1360 str r3, [r2] + 220 .L14: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 221 .loc 1 406 3 view .LVU76 + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 222 .loc 1 406 17 is_stmt 0 view .LVU77 + 223 00ae E37E ldrb r3, [r4, #27] @ zero_extendqisi2 + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 224 .loc 1 406 6 view .LVU78 + 225 00b0 012B cmp r3, #1 + 226 00b2 37D0 beq .L32 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 227 .loc 1 412 5 is_stmt 1 view .LVU79 + 228 00b4 2268 ldr r2, [r4] + 229 00b6 1368 ldr r3, [r2] + 230 00b8 43F01003 orr r3, r3, #16 + 231 00bc 1360 str r3, [r2] + 232 .L16: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 233 .loc 1 416 3 view .LVU80 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 234 .loc 1 416 17 is_stmt 0 view .LVU81 + 235 00be 237F ldrb r3, [r4, #28] @ zero_extendqisi2 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 236 .loc 1 416 6 view .LVU82 + 237 00c0 012B cmp r3, #1 + 238 00c2 35D0 beq .L33 + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 239 .loc 1 422 5 is_stmt 1 view .LVU83 + 240 00c4 2268 ldr r2, [r4] + 241 00c6 1368 ldr r3, [r2] + 242 00c8 23F00803 bic r3, r3, #8 + 243 00cc 1360 str r3, [r2] + 244 .L18: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 245 .loc 1 426 3 view .LVU84 + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 246 .loc 1 426 17 is_stmt 0 view .LVU85 + 247 00ce 637F ldrb r3, [r4, #29] @ zero_extendqisi2 + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 248 .loc 1 426 6 view .LVU86 + 249 00d0 012B cmp r3, #1 + 250 00d2 33D0 beq .L34 + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 251 .loc 1 432 5 is_stmt 1 view .LVU87 + 252 00d4 2268 ldr r2, [r4] + 253 00d6 1368 ldr r3, [r2] + 254 00d8 23F00403 bic r3, r3, #4 + 255 00dc 1360 str r3, [r2] + 256 .L20: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Init.SyncJumpWidth | + 257 .loc 1 436 3 view .LVU88 + 258 00de A368 ldr r3, [r4, #8] + ARM GAS /tmp/cciHzaOX.s page 16 + + + 259 00e0 E268 ldr r2, [r4, #12] + 260 00e2 1343 orrs r3, r3, r2 + 261 00e4 2269 ldr r2, [r4, #16] + 262 00e6 1343 orrs r3, r3, r2 + 263 00e8 6269 ldr r2, [r4, #20] + 264 00ea 1343 orrs r3, r3, r2 + 265 00ec 6268 ldr r2, [r4, #4] + 266 00ee 013A subs r2, r2, #1 + 267 00f0 2168 ldr r1, [r4] + 268 00f2 1343 orrs r3, r3, r2 + 269 00f4 CB61 str r3, [r1, #28] + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 270 .loc 1 443 3 view .LVU89 + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 271 .loc 1 443 19 is_stmt 0 view .LVU90 + 272 00f6 0020 movs r0, #0 + 273 00f8 6062 str r0, [r4, #36] + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 274 .loc 1 446 3 is_stmt 1 view .LVU91 + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 275 .loc 1 446 15 is_stmt 0 view .LVU92 + 276 00fa 0123 movs r3, #1 + 277 00fc 84F82030 strb r3, [r4, #32] + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 278 .loc 1 449 3 is_stmt 1 view .LVU93 + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 279 .loc 1 449 10 is_stmt 0 view .LVU94 + 280 0100 A0E7 b .L3 + 281 .L29: + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 282 .loc 1 378 5 is_stmt 1 view .LVU95 + 283 0102 1A68 ldr r2, [r3] + 284 0104 42F08002 orr r2, r2, #128 + 285 0108 1A60 str r2, [r3] + 286 010a C0E7 b .L10 + 287 .L30: + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 288 .loc 1 388 5 view .LVU96 + 289 010c 2268 ldr r2, [r4] + 290 010e 1368 ldr r3, [r2] + 291 0110 43F04003 orr r3, r3, #64 + 292 0114 1360 str r3, [r2] + 293 0116 C2E7 b .L12 + 294 .L31: + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 295 .loc 1 398 5 view .LVU97 + 296 0118 2268 ldr r2, [r4] + 297 011a 1368 ldr r3, [r2] + 298 011c 43F02003 orr r3, r3, #32 + 299 0120 1360 str r3, [r2] + 300 0122 C4E7 b .L14 + 301 .L32: + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 302 .loc 1 408 5 view .LVU98 + 303 0124 2268 ldr r2, [r4] + 304 0126 1368 ldr r3, [r2] + 305 0128 23F01003 bic r3, r3, #16 + ARM GAS /tmp/cciHzaOX.s page 17 + + + 306 012c 1360 str r3, [r2] + 307 012e C6E7 b .L16 + 308 .L33: + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 309 .loc 1 418 5 view .LVU99 + 310 0130 2268 ldr r2, [r4] + 311 0132 1368 ldr r3, [r2] + 312 0134 43F00803 orr r3, r3, #8 + 313 0138 1360 str r3, [r2] + 314 013a C8E7 b .L18 + 315 .L34: + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 316 .loc 1 428 5 view .LVU100 + 317 013c 2268 ldr r2, [r4] + 318 013e 1368 ldr r3, [r2] + 319 0140 43F00403 orr r3, r3, #4 + 320 0144 1360 str r3, [r2] + 321 0146 CAE7 b .L20 + 322 .LVL12: + 323 .L21: + 324 .cfi_def_cfa_offset 0 + 325 .cfi_restore 3 + 326 .cfi_restore 4 + 327 .cfi_restore 5 + 328 .cfi_restore 14 + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 329 .loc 1 281 12 is_stmt 0 view .LVU101 + 330 0148 0120 movs r0, #1 + 331 .LVL13: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 332 .loc 1 450 1 view .LVU102 + 333 014a 7047 bx lr + 334 .cfi_endproc + 335 .LFE130: + 337 .section .text.HAL_CAN_MspDeInit,"ax",%progbits + 338 .align 1 + 339 .weak HAL_CAN_MspDeInit + 340 .syntax unified + 341 .thumb + 342 .thumb_func + 344 HAL_CAN_MspDeInit: + 345 .LVL14: + 346 .LFB133: + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief DeInitializes the CAN MSP. + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 347 .loc 1 523 1 is_stmt 1 view -0 + 348 .cfi_startproc + 349 @ args = 0, pretend = 0, frame = 0 + 350 @ frame_needed = 0, uses_anonymous_args = 0 + 351 @ link register save eliminated. + ARM GAS /tmp/cciHzaOX.s page 18 + + + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 352 .loc 1 525 3 view .LVU104 + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_MspDeInit could be implemented in the user file + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 353 .loc 1 530 1 is_stmt 0 view .LVU105 + 354 0000 7047 bx lr + 355 .cfi_endproc + 356 .LFE133: + 358 .section .text.HAL_CAN_ConfigFilter,"ax",%progbits + 359 .align 1 + 360 .global HAL_CAN_ConfigFilter + 361 .syntax unified + 362 .thumb + 363 .thumb_func + 365 HAL_CAN_ConfigFilter: + 366 .LVL15: + 367 .LFB134: + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Register a CAN CallBack. + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * To be used instead of the weak predefined callback + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for CAN module + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param CallbackID ID of the callback to be registered + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one of the following values: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pCallback pointer to the Callback function + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Callb + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** void (* pCallback)(CAN_HandleTypeDef *_hcan)) + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pCallback == NULL) + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + ARM GAS /tmp/cciHzaOX.s page 19 + + + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = pCallback; + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = pCallback; + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = pCallback; + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = pCallback; + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = pCallback; + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = pCallback; + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = pCallback; + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = pCallback; + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = pCallback; + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = pCallback; + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = pCallback; + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = pCallback; + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : + ARM GAS /tmp/cciHzaOX.s page 20 + + + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = pCallback; + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = pCallback; + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = pCallback; + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Unregister a CAN CallBack. + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * CAN callback is redirected to the weak predefined callback + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + ARM GAS /tmp/cciHzaOX.s page 21 + + + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for CAN module + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param CallbackID ID of the callback to be unregistered + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one of the following values: + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Cal + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : + ARM GAS /tmp/cciHzaOX.s page 22 + + + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (CallbackID) + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default : + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ + ARM GAS /tmp/cciHzaOX.s page 23 + + + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update the error code */ + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return error status */ + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group2 Configuration functions + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Configuration functions. + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Configuration functions ##### + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Configures the CAN reception filter according to the specified + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * parameters in the CAN_FilterInitStruct. + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * contains the filter configuration information. + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterCon + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 368 .loc 1 840 1 is_stmt 1 view -0 + 369 .cfi_startproc + 370 @ args = 0, pretend = 0, frame = 0 + 371 @ frame_needed = 0, uses_anonymous_args = 0 + 372 @ link register save eliminated. + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filternbrbitpos; + 373 .loc 1 841 3 view .LVU107 + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_TypeDef *can_ip = hcan->Instance; + 374 .loc 1 842 3 view .LVU108 + 375 .loc 1 842 16 is_stmt 0 view .LVU109 + 376 0000 0268 ldr r2, [r0] + ARM GAS /tmp/cciHzaOX.s page 24 + + + 377 .LVL16: + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 378 .loc 1 843 3 is_stmt 1 view .LVU110 + 379 .loc 1 843 24 is_stmt 0 view .LVU111 + 380 0002 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 381 .LVL17: + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 382 .loc 1 845 3 is_stmt 1 view .LVU112 + 383 .loc 1 845 38 is_stmt 0 view .LVU113 + 384 0006 013B subs r3, r3, #1 + 385 .LVL18: + 386 .loc 1 845 38 view .LVU114 + 387 0008 DBB2 uxtb r3, r3 + 388 .LVL19: + 389 .loc 1 845 6 view .LVU115 + 390 000a 012B cmp r3, #1 + 391 000c 05D9 bls .L50 + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* CAN is single instance with 14 dedicated filters banks */ + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Initialisation mode for the filter */ + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FMR, CAN_FMR_FINIT); + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Convert filter number into bit position */ + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Deactivation */ + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FA1R, filternbrbitpos); + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Scale */ + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 16-bit scale for the filter */ + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FS1R, filternbrbitpos); + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* First 16-bit identifier and First 16-bit mask */ + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Or First 16-bit identifier and Second 16-bit identifier */ + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Second 16-bit identifier and Second 16-bit mask */ + ARM GAS /tmp/cciHzaOX.s page 25 + + + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Or Third 16-bit identifier and Fourth 16-bit identifier */ + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit scale for the filter */ + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FS1R, filternbrbitpos); + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit identifier or First 32-bit identifier */ + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* 32-bit mask or Second 32-bit identifier */ + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter Mode */ + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Id/Mask mode for the filter*/ + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FM1R, filternbrbitpos); + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Identifier list mode for the filter*/ + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FM1R, filternbrbitpos); + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter FIFO assignment */ + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* FIFO 0 assignation for the filter */ + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* FIFO 1 assignation for the filter */ + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FFA1R, filternbrbitpos); + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Filter activation */ + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(can_ip->FA1R, filternbrbitpos); + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Leave the initialisation mode for the filter */ + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; + ARM GAS /tmp/cciHzaOX.s page 26 + + + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 392 .loc 1 946 5 is_stmt 1 view .LVU116 + 393 .loc 1 946 9 is_stmt 0 view .LVU117 + 394 000e 436A ldr r3, [r0, #36] + 395 .loc 1 946 21 view .LVU118 + 396 0010 43F48023 orr r3, r3, #262144 + 397 0014 4362 str r3, [r0, #36] + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 398 .loc 1 948 5 is_stmt 1 view .LVU119 + 399 .loc 1 948 12 is_stmt 0 view .LVU120 + 400 0016 0120 movs r0, #1 + 401 .LVL20: + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 402 .loc 1 950 1 view .LVU121 + 403 0018 7047 bx lr + 404 .LVL21: + 405 .L50: + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filternbrbitpos; + 406 .loc 1 840 1 view .LVU122 + 407 001a 30B4 push {r4, r5} + 408 .cfi_def_cfa_offset 8 + 409 .cfi_offset 4, -8 + 410 .cfi_offset 5, -4 + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); + 411 .loc 1 849 5 is_stmt 1 view .LVU123 + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); + 412 .loc 1 850 5 view .LVU124 + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); + 413 .loc 1 851 5 view .LVU125 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); + 414 .loc 1 852 5 view .LVU126 + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); + 415 .loc 1 853 5 view .LVU127 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); + 416 .loc 1 854 5 view .LVU128 + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); + 417 .loc 1 855 5 view .LVU129 + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 418 .loc 1 856 5 view .LVU130 + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 419 .loc 1 861 5 view .LVU131 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 420 .loc 1 864 5 view .LVU132 + 421 001c D2F80032 ldr r3, [r2, #512] + 422 0020 43F00103 orr r3, r3, #1 + 423 0024 C2F80032 str r3, [r2, #512] + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 424 .loc 1 867 5 view .LVU133 + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 425 .loc 1 867 52 is_stmt 0 view .LVU134 + 426 0028 4B69 ldr r3, [r1, #20] + ARM GAS /tmp/cciHzaOX.s page 27 + + + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 427 .loc 1 867 65 view .LVU135 + 428 002a 03F01F03 and r3, r3, #31 + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 429 .loc 1 867 21 view .LVU136 + 430 002e 0120 movs r0, #1 + 431 .LVL22: + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 432 .loc 1 867 21 view .LVU137 + 433 0030 00FA03F3 lsl r3, r0, r3 + 434 .LVL23: + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 435 .loc 1 870 5 is_stmt 1 view .LVU138 + 436 0034 D2F81C02 ldr r0, [r2, #540] + 437 0038 6FEA030C mvn ip, r3 + 438 003c 20EA0300 bic r0, r0, r3 + 439 0040 C2F81C02 str r0, [r2, #540] + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 440 .loc 1 873 5 view .LVU139 + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 441 .loc 1 873 22 is_stmt 0 view .LVU140 + 442 0044 C869 ldr r0, [r1, #28] + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 443 .loc 1 873 8 view .LVU141 + 444 0046 B0B9 cbnz r0, .L38 + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 445 .loc 1 876 7 is_stmt 1 view .LVU142 + 446 0048 D2F80C02 ldr r0, [r2, #524] + 447 004c 0CEA0000 and r0, ip, r0 + 448 0050 C2F80C02 str r0, [r2, #524] + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 449 .loc 1 880 7 view .LVU143 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 450 .loc 1 882 22 is_stmt 0 view .LVU144 + 451 0054 8C88 ldrh r4, [r1, #4] + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 452 .loc 1 880 44 view .LVU145 + 453 0056 4869 ldr r0, [r1, #20] + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 454 .loc 1 881 75 view .LVU146 + 455 0058 CD68 ldr r5, [r1, #12] + 456 005a 44EA0544 orr r4, r4, r5, lsl #16 + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 457 .loc 1 880 62 view .LVU147 + 458 005e 4830 adds r0, r0, #72 + 459 0060 42F83040 str r4, [r2, r0, lsl #3] + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 460 .loc 1 886 7 is_stmt 1 view .LVU148 + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 461 .loc 1 888 22 is_stmt 0 view .LVU149 + 462 0064 0C88 ldrh r4, [r1] + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 463 .loc 1 886 44 view .LVU150 + 464 0066 4869 ldr r0, [r1, #20] + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 465 .loc 1 887 76 view .LVU151 + 466 0068 8D68 ldr r5, [r1, #8] + ARM GAS /tmp/cciHzaOX.s page 28 + + + 467 006a 44EA0544 orr r4, r4, r5, lsl #16 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 468 .loc 1 886 62 view .LVU152 + 469 006e 4830 adds r0, r0, #72 + 470 0070 02EBC000 add r0, r2, r0, lsl #3 + 471 0074 4460 str r4, [r0, #4] + 472 .L38: + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 473 .loc 1 891 5 is_stmt 1 view .LVU153 + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 474 .loc 1 891 22 is_stmt 0 view .LVU154 + 475 0076 C869 ldr r0, [r1, #28] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 476 .loc 1 891 8 view .LVU155 + 477 0078 0128 cmp r0, #1 + 478 007a 1BD0 beq .L51 + 479 .L39: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 480 .loc 1 908 5 is_stmt 1 view .LVU156 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 481 .loc 1 908 22 is_stmt 0 view .LVU157 + 482 007c 8869 ldr r0, [r1, #24] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 483 .loc 1 908 8 view .LVU158 + 484 007e 80BB cbnz r0, .L40 + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 485 .loc 1 911 7 is_stmt 1 view .LVU159 + 486 0080 D2F80402 ldr r0, [r2, #516] + 487 0084 0CEA0000 and r0, ip, r0 + 488 0088 C2F80402 str r0, [r2, #516] + 489 .L41: + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 490 .loc 1 920 5 view .LVU160 + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 491 .loc 1 920 22 is_stmt 0 view .LVU161 + 492 008c 0869 ldr r0, [r1, #16] + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 493 .loc 1 920 8 view .LVU162 + 494 008e 70BB cbnz r0, .L42 + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 495 .loc 1 923 7 is_stmt 1 view .LVU163 + 496 0090 D2F81402 ldr r0, [r2, #532] + 497 0094 0CEA0000 and r0, ip, r0 + 498 0098 C2F81402 str r0, [r2, #532] + 499 .L43: + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 500 .loc 1 932 5 view .LVU164 + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 501 .loc 1 932 22 is_stmt 0 view .LVU165 + 502 009c 096A ldr r1, [r1, #32] + 503 .LVL24: + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 504 .loc 1 932 8 view .LVU166 + 505 009e 0129 cmp r1, #1 + 506 00a0 2BD0 beq .L52 + 507 .LVL25: + 508 .L44: + ARM GAS /tmp/cciHzaOX.s page 29 + + + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 509 .loc 1 938 5 is_stmt 1 view .LVU167 + 510 00a2 D2F80032 ldr r3, [r2, #512] + 511 00a6 23F00103 bic r3, r3, #1 + 512 00aa C2F80032 str r3, [r2, #512] + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 513 .loc 1 941 5 view .LVU168 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 514 .loc 1 941 12 is_stmt 0 view .LVU169 + 515 00ae 0020 movs r0, #0 + 516 .loc 1 950 1 view .LVU170 + 517 00b0 30BC pop {r4, r5} + 518 .cfi_remember_state + 519 .cfi_restore 5 + 520 .cfi_restore 4 + 521 .cfi_def_cfa_offset 0 + 522 00b2 7047 bx lr + 523 .LVL26: + 524 .L51: + 525 .cfi_restore_state + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 526 .loc 1 894 7 is_stmt 1 view .LVU171 + 527 00b4 D2F80C02 ldr r0, [r2, #524] + 528 00b8 1843 orrs r0, r0, r3 + 529 00ba C2F80C02 str r0, [r2, #524] + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 530 .loc 1 897 7 view .LVU172 + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 531 .loc 1 899 22 is_stmt 0 view .LVU173 + 532 00be 8C88 ldrh r4, [r1, #4] + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 533 .loc 1 897 44 view .LVU174 + 534 00c0 4869 ldr r0, [r1, #20] + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 535 .loc 1 898 72 view .LVU175 + 536 00c2 0D68 ldr r5, [r1] + 537 00c4 44EA0544 orr r4, r4, r5, lsl #16 + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 538 .loc 1 897 62 view .LVU176 + 539 00c8 4830 adds r0, r0, #72 + 540 00ca 42F83040 str r4, [r2, r0, lsl #3] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 541 .loc 1 902 7 is_stmt 1 view .LVU177 + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 542 .loc 1 904 22 is_stmt 0 view .LVU178 + 543 00ce 8C89 ldrh r4, [r1, #12] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 544 .loc 1 902 44 view .LVU179 + 545 00d0 4869 ldr r0, [r1, #20] + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 546 .loc 1 903 76 view .LVU180 + 547 00d2 8D68 ldr r5, [r1, #8] + 548 00d4 44EA0544 orr r4, r4, r5, lsl #16 + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 549 .loc 1 902 62 view .LVU181 + 550 00d8 4830 adds r0, r0, #72 + 551 00da 02EBC000 add r0, r2, r0, lsl #3 + ARM GAS /tmp/cciHzaOX.s page 30 + + + 552 00de 4460 str r4, [r0, #4] + 553 00e0 CCE7 b .L39 + 554 .L40: + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 555 .loc 1 916 7 is_stmt 1 view .LVU182 + 556 00e2 D2F80402 ldr r0, [r2, #516] + 557 00e6 1843 orrs r0, r0, r3 + 558 00e8 C2F80402 str r0, [r2, #516] + 559 00ec CEE7 b .L41 + 560 .L42: + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 561 .loc 1 928 7 view .LVU183 + 562 00ee D2F81402 ldr r0, [r2, #532] + 563 00f2 1843 orrs r0, r0, r3 + 564 00f4 C2F81402 str r0, [r2, #532] + 565 00f8 D0E7 b .L43 + 566 .LVL27: + 567 .L52: + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 568 .loc 1 934 7 view .LVU184 + 569 00fa D2F81C12 ldr r1, [r2, #540] + 570 00fe 0B43 orrs r3, r3, r1 + 571 .LVL28: + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 572 .loc 1 934 7 is_stmt 0 view .LVU185 + 573 0100 C2F81C32 str r3, [r2, #540] + 574 0104 CDE7 b .L44 + 575 .cfi_endproc + 576 .LFE134: + 578 .section .text.HAL_CAN_Start,"ax",%progbits + 579 .align 1 + 580 .global HAL_CAN_Start + 581 .syntax unified + 582 .thumb + 583 .thumb_func + 585 HAL_CAN_Start: + 586 .LVL29: + 587 .LFB135: + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group3 Control functions + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Control functions + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Control functions ##### + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Start : Start the CAN module + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_Stop : Stop the CAN module + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RequestSleep : Request sleep mode entry. + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_WakeUp : Wake up from sleep mode. + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes + ARM GAS /tmp/cciHzaOX.s page 31 + + + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** and activate the corresponding + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmission request + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_AbortTxRequest : Abort transmission request + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pending on the selected Tx mailbox + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Start the CAN module. + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 588 .loc 1 990 1 is_stmt 1 view -0 + 589 .cfi_startproc + 590 @ args = 0, pretend = 0, frame = 0 + 591 @ frame_needed = 0, uses_anonymous_args = 0 + 592 .loc 1 990 1 is_stmt 0 view .LVU187 + 593 0000 70B5 push {r4, r5, r6, lr} + 594 .cfi_def_cfa_offset 16 + 595 .cfi_offset 4, -16 + 596 .cfi_offset 5, -12 + 597 .cfi_offset 6, -8 + 598 .cfi_offset 14, -4 + 599 0002 0446 mov r4, r0 + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; + 600 .loc 1 991 3 is_stmt 1 view .LVU188 + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 601 .loc 1 993 3 view .LVU189 + 602 .loc 1 993 11 is_stmt 0 view .LVU190 + 603 0004 90F82050 ldrb r5, [r0, #32] @ zero_extendqisi2 + 604 0008 EDB2 uxtb r5, r5 + 605 .loc 1 993 6 view .LVU191 + 606 000a 012D cmp r5, #1 + 607 000c 06D0 beq .L59 + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN peripheral state */ + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_LISTENING; + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request leave initialisation */ + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait the acknowledge */ +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + ARM GAS /tmp/cciHzaOX.s page 32 + + +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check for the Timeout */ +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset the CAN ErrorCode */ +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; + 608 .loc 1 1029 5 is_stmt 1 view .LVU192 + 609 .loc 1 1029 9 is_stmt 0 view .LVU193 + 610 000e 436A ldr r3, [r0, #36] + 611 .loc 1 1029 21 view .LVU194 + 612 0010 43F40023 orr r3, r3, #524288 + 613 0014 4362 str r3, [r0, #36] +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 614 .loc 1 1031 5 is_stmt 1 view .LVU195 + 615 .loc 1 1031 12 is_stmt 0 view .LVU196 + 616 0016 0125 movs r5, #1 + 617 .LVL30: + 618 .L56: +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 619 .loc 1 1033 1 view .LVU197 + 620 0018 2846 mov r0, r5 + 621 001a 70BD pop {r4, r5, r6, pc} + 622 .LVL31: + 623 .L59: + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 624 .loc 1 996 5 is_stmt 1 view .LVU198 + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 625 .loc 1 996 17 is_stmt 0 view .LVU199 + 626 001c 0223 movs r3, #2 + 627 001e 80F82030 strb r3, [r0, #32] + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 628 .loc 1 999 5 is_stmt 1 view .LVU200 + 629 0022 0268 ldr r2, [r0] + 630 0024 1368 ldr r3, [r2] + 631 0026 23F00103 bic r3, r3, #1 + 632 002a 1360 str r3, [r2] +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 633 .loc 1 1002 5 view .LVU201 + ARM GAS /tmp/cciHzaOX.s page 33 + + +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 634 .loc 1 1002 17 is_stmt 0 view .LVU202 + 635 002c FFF7FEFF bl HAL_GetTick + 636 .LVL32: +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 637 .loc 1 1002 17 view .LVU203 + 638 0030 0646 mov r6, r0 + 639 .LVL33: +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 640 .loc 1 1005 5 is_stmt 1 view .LVU204 + 641 .L55: +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 642 .loc 1 1005 49 view .LVU205 +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 643 .loc 1 1005 17 is_stmt 0 view .LVU206 + 644 0032 2368 ldr r3, [r4] +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 645 .loc 1 1005 27 view .LVU207 + 646 0034 5B68 ldr r3, [r3, #4] +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 647 .loc 1 1005 49 view .LVU208 + 648 0036 13F0010F tst r3, #1 + 649 003a 0CD0 beq .L60 +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 650 .loc 1 1008 7 is_stmt 1 view .LVU209 +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 651 .loc 1 1008 12 is_stmt 0 view .LVU210 + 652 003c FFF7FEFF bl HAL_GetTick + 653 .LVL34: +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 654 .loc 1 1008 26 discriminator 1 view .LVU211 + 655 0040 831B subs r3, r0, r6 +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 656 .loc 1 1008 10 discriminator 1 view .LVU212 + 657 0042 0A2B cmp r3, #10 + 658 0044 F5D9 bls .L55 +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 659 .loc 1 1011 9 is_stmt 1 view .LVU213 +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 660 .loc 1 1011 13 is_stmt 0 view .LVU214 + 661 0046 636A ldr r3, [r4, #36] +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 662 .loc 1 1011 25 view .LVU215 + 663 0048 43F40033 orr r3, r3, #131072 + 664 004c 6362 str r3, [r4, #36] +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 665 .loc 1 1014 9 is_stmt 1 view .LVU216 +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 666 .loc 1 1014 21 is_stmt 0 view .LVU217 + 667 004e 0523 movs r3, #5 + 668 0050 84F82030 strb r3, [r4, #32] +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 669 .loc 1 1016 9 is_stmt 1 view .LVU218 +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 670 .loc 1 1016 16 is_stmt 0 view .LVU219 + 671 0054 E0E7 b .L56 + 672 .L60: + ARM GAS /tmp/cciHzaOX.s page 34 + + +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 673 .loc 1 1021 5 is_stmt 1 view .LVU220 +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 674 .loc 1 1021 21 is_stmt 0 view .LVU221 + 675 0056 0025 movs r5, #0 + 676 0058 6562 str r5, [r4, #36] +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 677 .loc 1 1024 5 is_stmt 1 view .LVU222 +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 678 .loc 1 1024 12 is_stmt 0 view .LVU223 + 679 005a DDE7 b .L56 + 680 .cfi_endproc + 681 .LFE135: + 683 .section .text.HAL_CAN_Stop,"ax",%progbits + 684 .align 1 + 685 .global HAL_CAN_Stop + 686 .syntax unified + 687 .thumb + 688 .thumb_func + 690 HAL_CAN_Stop: + 691 .LVL35: + 692 .LFB136: +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Stop the CAN module and enable access to configuration registers. +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 693 .loc 1 1042 1 is_stmt 1 view -0 + 694 .cfi_startproc + 695 @ args = 0, pretend = 0, frame = 0 + 696 @ frame_needed = 0, uses_anonymous_args = 0 + 697 .loc 1 1042 1 is_stmt 0 view .LVU225 + 698 0000 38B5 push {r3, r4, r5, lr} + 699 .cfi_def_cfa_offset 16 + 700 .cfi_offset 3, -16 + 701 .cfi_offset 4, -12 + 702 .cfi_offset 5, -8 + 703 .cfi_offset 14, -4 + 704 0002 0446 mov r4, r0 +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tickstart; + 705 .loc 1 1043 3 is_stmt 1 view .LVU226 +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_LISTENING) + 706 .loc 1 1045 3 view .LVU227 + 707 .loc 1 1045 11 is_stmt 0 view .LVU228 + 708 0004 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 709 0008 DBB2 uxtb r3, r3 + 710 .loc 1 1045 6 view .LVU229 + 711 000a 022B cmp r3, #2 + 712 000c 05D0 beq .L67 +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request initialisation */ +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); + ARM GAS /tmp/cciHzaOX.s page 35 + + +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get tick */ +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** tickstart = HAL_GetTick(); +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait the acknowledge */ +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check for the Timeout */ +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN state */ +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Exit from sleep mode */ +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Change CAN peripheral state */ +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; + 713 .loc 1 1081 5 is_stmt 1 view .LVU230 + 714 .loc 1 1081 9 is_stmt 0 view .LVU231 + 715 000e 436A ldr r3, [r0, #36] + 716 .loc 1 1081 21 view .LVU232 + 717 0010 43F48013 orr r3, r3, #1048576 + 718 0014 4362 str r3, [r0, #36] +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 719 .loc 1 1083 5 is_stmt 1 view .LVU233 + 720 .loc 1 1083 12 is_stmt 0 view .LVU234 + 721 0016 0120 movs r0, #1 + 722 .LVL36: + 723 .L64: +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 724 .loc 1 1085 1 view .LVU235 + 725 0018 38BD pop {r3, r4, r5, pc} + 726 .LVL37: + 727 .L67: +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 728 .loc 1 1048 5 is_stmt 1 view .LVU236 + 729 001a 0268 ldr r2, [r0] + 730 001c 1368 ldr r3, [r2] + 731 001e 43F00103 orr r3, r3, #1 + ARM GAS /tmp/cciHzaOX.s page 36 + + + 732 0022 1360 str r3, [r2] +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 733 .loc 1 1051 5 view .LVU237 +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 734 .loc 1 1051 17 is_stmt 0 view .LVU238 + 735 0024 FFF7FEFF bl HAL_GetTick + 736 .LVL38: +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 737 .loc 1 1051 17 view .LVU239 + 738 0028 0546 mov r5, r0 + 739 .LVL39: +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 740 .loc 1 1054 5 is_stmt 1 view .LVU240 + 741 .L63: +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 742 .loc 1 1054 49 view .LVU241 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 743 .loc 1 1054 17 is_stmt 0 view .LVU242 + 744 002a 2368 ldr r3, [r4] +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 745 .loc 1 1054 27 view .LVU243 + 746 002c 5A68 ldr r2, [r3, #4] +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 747 .loc 1 1054 49 view .LVU244 + 748 002e 12F0010F tst r2, #1 + 749 0032 0DD1 bne .L68 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 750 .loc 1 1057 7 is_stmt 1 view .LVU245 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 751 .loc 1 1057 12 is_stmt 0 view .LVU246 + 752 0034 FFF7FEFF bl HAL_GetTick + 753 .LVL40: +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 754 .loc 1 1057 26 discriminator 1 view .LVU247 + 755 0038 431B subs r3, r0, r5 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 756 .loc 1 1057 10 discriminator 1 view .LVU248 + 757 003a 0A2B cmp r3, #10 + 758 003c F5D9 bls .L63 +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 759 .loc 1 1060 9 is_stmt 1 view .LVU249 +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 760 .loc 1 1060 13 is_stmt 0 view .LVU250 + 761 003e 636A ldr r3, [r4, #36] +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 762 .loc 1 1060 25 view .LVU251 + 763 0040 43F40033 orr r3, r3, #131072 + 764 0044 6362 str r3, [r4, #36] +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 765 .loc 1 1063 9 is_stmt 1 view .LVU252 +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 766 .loc 1 1063 21 is_stmt 0 view .LVU253 + 767 0046 0523 movs r3, #5 + 768 0048 84F82030 strb r3, [r4, #32] +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 769 .loc 1 1065 9 is_stmt 1 view .LVU254 +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + ARM GAS /tmp/cciHzaOX.s page 37 + + + 770 .loc 1 1065 16 is_stmt 0 view .LVU255 + 771 004c 0120 movs r0, #1 + 772 004e E3E7 b .L64 + 773 .L68: +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 774 .loc 1 1070 5 is_stmt 1 view .LVU256 + 775 0050 1A68 ldr r2, [r3] + 776 0052 22F00202 bic r2, r2, #2 + 777 0056 1A60 str r2, [r3] +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 778 .loc 1 1073 5 view .LVU257 +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 779 .loc 1 1073 17 is_stmt 0 view .LVU258 + 780 0058 0123 movs r3, #1 + 781 005a 84F82030 strb r3, [r4, #32] +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 782 .loc 1 1076 5 is_stmt 1 view .LVU259 +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 783 .loc 1 1076 12 is_stmt 0 view .LVU260 + 784 005e 0020 movs r0, #0 + 785 0060 DAE7 b .L64 + 786 .cfi_endproc + 787 .LFE136: + 789 .section .text.HAL_CAN_DeInit,"ax",%progbits + 790 .align 1 + 791 .global HAL_CAN_DeInit + 792 .syntax unified + 793 .thumb + 794 .thumb_func + 796 HAL_CAN_DeInit: + 797 .LVL41: + 798 .LFB131: + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */ + 799 .loc 1 460 1 is_stmt 1 view -0 + 800 .cfi_startproc + 801 @ args = 0, pretend = 0, frame = 0 + 802 @ frame_needed = 0, uses_anonymous_args = 0 + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 803 .loc 1 462 3 view .LVU262 + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 804 .loc 1 462 6 is_stmt 0 view .LVU263 + 805 0000 80B1 cbz r0, .L71 + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check CAN handle */ + 806 .loc 1 460 1 view .LVU264 + 807 0002 10B5 push {r4, lr} + 808 .cfi_def_cfa_offset 8 + 809 .cfi_offset 4, -8 + 810 .cfi_offset 14, -4 + 811 0004 0446 mov r4, r0 + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 812 .loc 1 468 3 is_stmt 1 view .LVU265 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 813 .loc 1 471 3 view .LVU266 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 814 .loc 1 471 9 is_stmt 0 view .LVU267 + 815 0006 FFF7FEFF bl HAL_CAN_Stop + 816 .LVL42: + ARM GAS /tmp/cciHzaOX.s page 38 + + + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ + 817 .loc 1 484 3 is_stmt 1 view .LVU268 + 818 000a 2046 mov r0, r4 + 819 000c FFF7FEFF bl HAL_CAN_MspDeInit + 820 .LVL43: + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 821 .loc 1 488 3 view .LVU269 + 822 0010 2268 ldr r2, [r4] + 823 0012 1368 ldr r3, [r2] + 824 0014 43F40043 orr r3, r3, #32768 + 825 0018 1360 str r3, [r2] + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 826 .loc 1 491 3 view .LVU270 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 827 .loc 1 491 19 is_stmt 0 view .LVU271 + 828 001a 0020 movs r0, #0 + 829 001c 6062 str r0, [r4, #36] + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 830 .loc 1 494 3 is_stmt 1 view .LVU272 + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 831 .loc 1 494 15 is_stmt 0 view .LVU273 + 832 001e 84F82000 strb r0, [r4, #32] + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 833 .loc 1 497 3 is_stmt 1 view .LVU274 + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 834 .loc 1 498 1 is_stmt 0 view .LVU275 + 835 0022 10BD pop {r4, pc} + 836 .LVL44: + 837 .L71: + 838 .cfi_def_cfa_offset 0 + 839 .cfi_restore 4 + 840 .cfi_restore 14 + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 841 .loc 1 464 12 view .LVU276 + 842 0024 0120 movs r0, #1 + 843 .LVL45: + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 844 .loc 1 498 1 view .LVU277 + 845 0026 7047 bx lr + 846 .cfi_endproc + 847 .LFE131: + 849 .section .text.HAL_CAN_RequestSleep,"ax",%progbits + 850 .align 1 + 851 .global HAL_CAN_RequestSleep + 852 .syntax unified + 853 .thumb + 854 .thumb_func + 856 HAL_CAN_RequestSleep: + 857 .LVL46: + 858 .LFB137: +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Request the sleep mode (low power) entry. +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * When returning from this function, Sleep mode will be entered +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * as soon as the current CAN activity (transmission or reception +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * of a CAN frame) has been completed. +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + ARM GAS /tmp/cciHzaOX.s page 39 + + +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status. +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 859 .loc 1 1097 1 is_stmt 1 view -0 + 860 .cfi_startproc + 861 @ args = 0, pretend = 0, frame = 0 + 862 @ frame_needed = 0, uses_anonymous_args = 0 + 863 @ link register save eliminated. +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 864 .loc 1 1098 3 view .LVU279 + 865 .loc 1 1098 24 is_stmt 0 view .LVU280 + 866 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 867 .LVL47: +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 868 .loc 1 1100 3 is_stmt 1 view .LVU281 + 869 .loc 1 1100 38 is_stmt 0 view .LVU282 + 870 0004 013B subs r3, r3, #1 + 871 .LVL48: + 872 .loc 1 1100 38 view .LVU283 + 873 0006 DBB2 uxtb r3, r3 + 874 .LVL49: + 875 .loc 1 1100 6 view .LVU284 + 876 0008 012B cmp r3, #1 + 877 000a 05D9 bls .L79 +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request Sleep mode */ +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 878 .loc 1 1112 5 is_stmt 1 view .LVU285 + 879 .loc 1 1112 9 is_stmt 0 view .LVU286 + 880 000c 436A ldr r3, [r0, #36] + 881 .loc 1 1112 21 view .LVU287 + 882 000e 43F48023 orr r3, r3, #262144 + 883 0012 4362 str r3, [r0, #36] +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 884 .loc 1 1115 5 is_stmt 1 view .LVU288 + 885 .loc 1 1115 12 is_stmt 0 view .LVU289 + 886 0014 0120 movs r0, #1 + 887 .LVL50: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 888 .loc 1 1117 1 view .LVU290 + 889 0016 7047 bx lr + 890 .LVL51: + ARM GAS /tmp/cciHzaOX.s page 40 + + + 891 .L79: +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 892 .loc 1 1104 5 is_stmt 1 view .LVU291 + 893 0018 0268 ldr r2, [r0] + 894 001a 1368 ldr r3, [r2] + 895 001c 43F00203 orr r3, r3, #2 + 896 0020 1360 str r3, [r2] +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 897 .loc 1 1107 5 view .LVU292 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 898 .loc 1 1107 12 is_stmt 0 view .LVU293 + 899 0022 0020 movs r0, #0 + 900 .LVL52: +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 901 .loc 1 1107 12 view .LVU294 + 902 0024 7047 bx lr + 903 .cfi_endproc + 904 .LFE137: + 906 .section .text.HAL_CAN_WakeUp,"ax",%progbits + 907 .align 1 + 908 .global HAL_CAN_WakeUp + 909 .syntax unified + 910 .thumb + 911 .thumb_func + 913 HAL_CAN_WakeUp: + 914 .LVL53: + 915 .LFB138: +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Wake up from sleep mode. +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * When returning with HAL_OK status from this function, Sleep mode +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * is exited. +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status. +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 916 .loc 1 1128 1 is_stmt 1 view -0 + 917 .cfi_startproc + 918 @ args = 0, pretend = 0, frame = 8 + 919 @ frame_needed = 0, uses_anonymous_args = 0 + 920 @ link register save eliminated. + 921 .loc 1 1128 1 is_stmt 0 view .LVU296 + 922 0000 82B0 sub sp, sp, #8 + 923 .cfi_def_cfa_offset 8 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __IO uint32_t count = 0; + 924 .loc 1 1129 3 is_stmt 1 view .LVU297 + 925 .loc 1 1129 17 is_stmt 0 view .LVU298 + 926 0002 0023 movs r3, #0 + 927 0004 0193 str r3, [sp, #4] +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t timeout = 1000000U; + 928 .loc 1 1130 3 is_stmt 1 view .LVU299 + 929 .LVL54: +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 930 .loc 1 1131 3 view .LVU300 + 931 .loc 1 1131 24 is_stmt 0 view .LVU301 + ARM GAS /tmp/cciHzaOX.s page 41 + + + 932 0006 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 933 .LVL55: +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 934 .loc 1 1133 3 is_stmt 1 view .LVU302 + 935 .loc 1 1133 38 is_stmt 0 view .LVU303 + 936 000a 013B subs r3, r3, #1 + 937 .LVL56: + 938 .loc 1 1133 38 view .LVU304 + 939 000c DBB2 uxtb r3, r3 + 940 .LVL57: + 941 .loc 1 1133 6 view .LVU305 + 942 000e 012B cmp r3, #1 + 943 0010 18D8 bhi .L81 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wake up request */ +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 944 .loc 1 1137 5 is_stmt 1 view .LVU306 + 945 0012 0268 ldr r2, [r0] + 946 0014 1368 ldr r3, [r2] + 947 0016 23F00203 bic r3, r3, #2 + 948 001a 1360 str r3, [r2] + 949 .L84: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Wait sleep mode is exited */ +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** do + 950 .loc 1 1140 5 view .LVU307 +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Increment counter */ +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** count++; + 951 .loc 1 1143 7 view .LVU308 + 952 .loc 1 1143 12 is_stmt 0 view .LVU309 + 953 001c 019B ldr r3, [sp, #4] + 954 001e 0133 adds r3, r3, #1 + 955 0020 0193 str r3, [sp, #4] +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if timeout is reached */ +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (count > timeout) + 956 .loc 1 1146 7 is_stmt 1 view .LVU310 + 957 .loc 1 1146 17 is_stmt 0 view .LVU311 + 958 0022 019A ldr r2, [sp, #4] + 959 .loc 1 1146 10 view .LVU312 + 960 0024 0B4B ldr r3, .L87 + 961 0026 9A42 cmp r2, r3 + 962 0028 06D8 bhi .L86 +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); + 963 .loc 1 1154 49 is_stmt 1 view .LVU313 + 964 .loc 1 1154 17 is_stmt 0 view .LVU314 + 965 002a 0368 ldr r3, [r0] + ARM GAS /tmp/cciHzaOX.s page 42 + + + 966 .loc 1 1154 27 view .LVU315 + 967 002c 5B68 ldr r3, [r3, #4] + 968 .loc 1 1154 49 view .LVU316 + 969 002e 13F0020F tst r3, #2 + 970 0032 F3D1 bne .L84 +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; + 971 .loc 1 1157 12 view .LVU317 + 972 0034 0020 movs r0, #0 + 973 .LVL58: + 974 .loc 1 1157 12 view .LVU318 + 975 0036 0AE0 b .L83 + 976 .LVL59: + 977 .L86: +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 978 .loc 1 1149 9 is_stmt 1 view .LVU319 +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 979 .loc 1 1149 13 is_stmt 0 view .LVU320 + 980 0038 436A ldr r3, [r0, #36] +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 981 .loc 1 1149 25 view .LVU321 + 982 003a 43F40033 orr r3, r3, #131072 + 983 003e 4362 str r3, [r0, #36] +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 984 .loc 1 1151 9 is_stmt 1 view .LVU322 +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 985 .loc 1 1151 16 is_stmt 0 view .LVU323 + 986 0040 0120 movs r0, #1 + 987 .LVL60: +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 988 .loc 1 1151 16 view .LVU324 + 989 0042 04E0 b .L83 + 990 .LVL61: + 991 .L81: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 992 .loc 1 1162 5 is_stmt 1 view .LVU325 + 993 .loc 1 1162 9 is_stmt 0 view .LVU326 + 994 0044 436A ldr r3, [r0, #36] + 995 .loc 1 1162 21 view .LVU327 + 996 0046 43F48023 orr r3, r3, #262144 + 997 004a 4362 str r3, [r0, #36] +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 998 .loc 1 1164 5 is_stmt 1 view .LVU328 + 999 .loc 1 1164 12 is_stmt 0 view .LVU329 + 1000 004c 0120 movs r0, #1 + 1001 .LVL62: + 1002 .L83: +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1003 .loc 1 1166 1 view .LVU330 + 1004 004e 02B0 add sp, sp, #8 + ARM GAS /tmp/cciHzaOX.s page 43 + + + 1005 .cfi_def_cfa_offset 0 + 1006 @ sp needed + 1007 0050 7047 bx lr + 1008 .L88: + 1009 0052 00BF .align 2 + 1010 .L87: + 1011 0054 40420F00 .word 1000000 + 1012 .cfi_endproc + 1013 .LFE138: + 1015 .section .text.HAL_CAN_IsSleepActive,"ax",%progbits + 1016 .align 1 + 1017 .global HAL_CAN_IsSleepActive + 1018 .syntax unified + 1019 .thumb + 1020 .thumb_func + 1022 HAL_CAN_IsSleepActive: + 1023 .LVL63: + 1024 .LFB139: +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Check is sleep mode is active. +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Status +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 0 : Sleep mode is not active. +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 1 : Sleep mode is active. +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan) +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1025 .loc 1 1177 1 is_stmt 1 view -0 + 1026 .cfi_startproc + 1027 @ args = 0, pretend = 0, frame = 0 + 1028 @ frame_needed = 0, uses_anonymous_args = 0 + 1029 @ link register save eliminated. +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t status = 0U; + 1030 .loc 1 1178 3 view .LVU332 +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1031 .loc 1 1179 3 view .LVU333 + 1032 .loc 1 1179 24 is_stmt 0 view .LVU334 + 1033 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1034 .LVL64: +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1035 .loc 1 1181 3 is_stmt 1 view .LVU335 + 1036 .loc 1 1181 38 is_stmt 0 view .LVU336 + 1037 0004 013B subs r3, r3, #1 + 1038 .LVL65: + 1039 .loc 1 1181 38 view .LVU337 + 1040 0006 DBB2 uxtb r3, r3 + 1041 .LVL66: + 1042 .loc 1 1181 6 view .LVU338 + 1043 0008 012B cmp r3, #1 + 1044 000a 01D9 bls .L93 +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1045 .loc 1 1178 12 view .LVU339 + 1046 000c 0020 movs r0, #0 + 1047 .LVL67: + ARM GAS /tmp/cciHzaOX.s page 44 + + +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1048 .loc 1 1178 12 view .LVU340 + 1049 000e 7047 bx lr + 1050 .LVL68: + 1051 .L93: +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Sleep mode */ +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) + 1052 .loc 1 1185 5 is_stmt 1 view .LVU341 + 1053 .loc 1 1185 14 is_stmt 0 view .LVU342 + 1054 0010 0368 ldr r3, [r0] + 1055 .loc 1 1185 24 view .LVU343 + 1056 0012 5868 ldr r0, [r3, #4] + 1057 .LVL69: + 1058 .loc 1 1185 8 view .LVU344 + 1059 0014 10F00200 ands r0, r0, #2 + 1060 0018 00D1 bne .L92 + 1061 001a 7047 bx lr + 1062 .L92: +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = 1U; + 1063 .loc 1 1187 14 view .LVU345 + 1064 001c 0120 movs r0, #1 + 1065 .LVL70: +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; + 1066 .loc 1 1192 3 is_stmt 1 view .LVU346 +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1067 .loc 1 1193 1 is_stmt 0 view .LVU347 + 1068 001e 7047 bx lr + 1069 .cfi_endproc + 1070 .LFE139: + 1072 .section .text.HAL_CAN_AddTxMessage,"ax",%progbits + 1073 .align 1 + 1074 .global HAL_CAN_AddTxMessage + 1075 .syntax unified + 1076 .thumb + 1077 .thumb_func + 1079 HAL_CAN_AddTxMessage: + 1080 .LVL71: + 1081 .LFB140: +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Add a message to the first free Tx mailbox and activate the +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * corresponding transmission request. +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param aData array containing the payload of the Tx frame. +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pTxMailbox pointer to a variable where the function will return +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the TxMailbox used to store the Tx message. +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_Tx_Mailboxes. +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status + ARM GAS /tmp/cciHzaOX.s page 45 + + +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** const uint8_t aData[], uint32_t *pTxMailbox) +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1082 .loc 1 1209 1 is_stmt 1 view -0 + 1083 .cfi_startproc + 1084 @ args = 0, pretend = 0, frame = 0 + 1085 @ frame_needed = 0, uses_anonymous_args = 0 + 1086 .loc 1 1209 1 is_stmt 0 view .LVU349 + 1087 0000 30B5 push {r4, r5, lr} + 1088 .cfi_def_cfa_offset 12 + 1089 .cfi_offset 4, -12 + 1090 .cfi_offset 5, -8 + 1091 .cfi_offset 14, -4 +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox; + 1092 .loc 1 1210 3 is_stmt 1 view .LVU350 +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1093 .loc 1 1211 3 view .LVU351 + 1094 .loc 1 1211 24 is_stmt 0 view .LVU352 + 1095 0002 90F820C0 ldrb ip, [r0, #32] @ zero_extendqisi2 + 1096 .LVL72: +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsr = READ_REG(hcan->Instance->TSR); + 1097 .loc 1 1212 3 is_stmt 1 view .LVU353 + 1098 .loc 1 1212 12 is_stmt 0 view .LVU354 + 1099 0006 0468 ldr r4, [r0] + 1100 0008 A468 ldr r4, [r4, #8] + 1101 .LVL73: +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the parameters */ +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IDTYPE(pHeader->IDE)); + 1102 .loc 1 1215 3 is_stmt 1 view .LVU355 +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RTR(pHeader->RTR)); + 1103 .loc 1 1216 3 view .LVU356 +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_DLC(pHeader->DLC)); + 1104 .loc 1 1217 3 view .LVU357 +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1105 .loc 1 1218 3 view .LVU358 +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_STDID(pHeader->StdId)); + 1106 .loc 1 1220 5 view .LVU359 +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_EXTID(pHeader->ExtId)); + 1107 .loc 1 1224 5 view .LVU360 +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); + 1108 .loc 1 1226 3 view .LVU361 +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1109 .loc 1 1228 3 view .LVU362 + 1110 .loc 1 1228 38 is_stmt 0 view .LVU363 + 1111 000a 0CF1FF3C add ip, ip, #-1 + 1112 .LVL74: + 1113 .loc 1 1228 38 view .LVU364 + 1114 000e 5FFA8CFC uxtb ip, ip + 1115 .LVL75: + ARM GAS /tmp/cciHzaOX.s page 46 + + + 1116 .loc 1 1228 6 view .LVU365 + 1117 0012 BCF1010F cmp ip, #1 + 1118 0016 62D8 bhi .L95 +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that all the Tx mailboxes are not full */ +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((tsr & CAN_TSR_TME0) != 0U) || + 1119 .loc 1 1232 5 is_stmt 1 view .LVU366 + 1120 .loc 1 1232 8 is_stmt 0 view .LVU367 + 1121 0018 14F0E05F tst r4, #469762048 + 1122 001c 59D0 beq .L96 +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((tsr & CAN_TSR_TME2) != 0U)) +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Select an empty transmit mailbox */ +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; + 1123 .loc 1 1237 7 is_stmt 1 view .LVU368 + 1124 .loc 1 1237 23 is_stmt 0 view .LVU369 + 1125 001e C4F3016C ubfx ip, r4, #24, #2 + 1126 .LVL76: +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Store the Tx mailbox */ +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** *pTxMailbox = (uint32_t)1 << transmitmailbox; + 1127 .loc 1 1240 7 is_stmt 1 view .LVU370 + 1128 .loc 1 1240 33 is_stmt 0 view .LVU371 + 1129 0022 0124 movs r4, #1 + 1130 .LVL77: + 1131 .loc 1 1240 33 view .LVU372 + 1132 0024 04FA0CF4 lsl r4, r4, ip + 1133 .loc 1 1240 19 view .LVU373 + 1134 0028 1C60 str r4, [r3] +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the Id */ +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1135 .loc 1 1243 7 is_stmt 1 view .LVU374 + 1136 .loc 1 1243 18 is_stmt 0 view .LVU375 + 1137 002a 8B68 ldr r3, [r1, #8] + 1138 .LVL78: + 1139 .loc 1 1243 10 view .LVU376 + 1140 002c 002B cmp r3, #0 + 1141 002e 3DD1 bne .L97 +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | + 1142 .loc 1 1245 9 is_stmt 1 view .LVU377 + 1143 .loc 1 1245 68 is_stmt 0 view .LVU378 + 1144 0030 0D68 ldr r5, [r1] +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); + 1145 .loc 1 1246 67 view .LVU379 + 1146 0032 CB68 ldr r3, [r1, #12] +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); + 1147 .loc 1 1245 13 view .LVU380 + 1148 0034 0468 ldr r4, [r0] +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); + 1149 .loc 1 1245 98 view .LVU381 + 1150 0036 43EA4555 orr r5, r3, r5, lsl #21 +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); + 1151 .loc 1 1245 57 view .LVU382 + ARM GAS /tmp/cciHzaOX.s page 47 + + + 1152 003a 0CF11803 add r3, ip, #24 + 1153 003e 1B01 lsls r3, r3, #4 + 1154 0040 E550 str r5, [r4, r3] + 1155 .L98: +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the DLC */ +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); + 1156 .loc 1 1256 7 is_stmt 1 view .LVU383 + 1157 .loc 1 1256 11 is_stmt 0 view .LVU384 + 1158 0042 0368 ldr r3, [r0] + 1159 .loc 1 1256 66 view .LVU385 + 1160 0044 0C69 ldr r4, [r1, #16] + 1161 .loc 1 1256 56 view .LVU386 + 1162 0046 0CF1180E add lr, ip, #24 + 1163 004a 03EB0E13 add r3, r3, lr, lsl #4 + 1164 004e 5C60 str r4, [r3, #4] +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the Transmit Global Time mode */ +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->TransmitGlobalTime == ENABLE) + 1165 .loc 1 1259 7 is_stmt 1 view .LVU387 + 1166 .loc 1 1259 18 is_stmt 0 view .LVU388 + 1167 0050 0B7D ldrb r3, [r1, #20] @ zero_extendqisi2 + 1168 .loc 1 1259 10 view .LVU389 + 1169 0052 012B cmp r3, #1 + 1170 0054 35D0 beq .L102 + 1171 .LVL79: + 1172 .L99: +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set up the data field */ +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, + 1173 .loc 1 1265 7 is_stmt 1 view .LVU390 + 1174 0056 D179 ldrb r1, [r2, #7] @ zero_extendqisi2 + 1175 0058 9379 ldrb r3, [r2, #6] @ zero_extendqisi2 + 1176 005a 1B04 lsls r3, r3, #16 + 1177 005c 43EA0163 orr r3, r3, r1, lsl #24 + 1178 0060 5179 ldrb r1, [r2, #5] @ zero_extendqisi2 + 1179 0062 43EA0123 orr r3, r3, r1, lsl #8 + 1180 0066 1479 ldrb r4, [r2, #4] @ zero_extendqisi2 + 1181 0068 0168 ldr r1, [r0] + 1182 006a 2343 orrs r3, r3, r4 + 1183 006c 01EB0C11 add r1, r1, ip, lsl #4 + 1184 0070 C1F88C31 str r3, [r1, #396] +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, + ARM GAS /tmp/cciHzaOX.s page 48 + + + 1185 .loc 1 1270 7 view .LVU391 + 1186 0074 D178 ldrb r1, [r2, #3] @ zero_extendqisi2 + 1187 0076 9378 ldrb r3, [r2, #2] @ zero_extendqisi2 + 1188 0078 1B04 lsls r3, r3, #16 + 1189 007a 43EA0163 orr r3, r3, r1, lsl #24 + 1190 007e 5178 ldrb r1, [r2, #1] @ zero_extendqisi2 + 1191 0080 43EA0123 orr r3, r3, r1, lsl #8 + 1192 0084 1178 ldrb r1, [r2] @ zero_extendqisi2 + 1193 0086 0268 ldr r2, [r0] + 1194 .LVL80: + 1195 .loc 1 1270 7 is_stmt 0 view .LVU392 + 1196 0088 0B43 orrs r3, r3, r1 + 1197 008a 02EB0C12 add r2, r2, ip, lsl #4 + 1198 008e C2F88831 str r3, [r2, #392] +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Request transmission */ +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); + 1199 .loc 1 1277 7 is_stmt 1 view .LVU393 + 1200 0092 0268 ldr r2, [r0] + 1201 0094 0CF1180C add ip, ip, #24 + 1202 .LVL81: + 1203 .loc 1 1277 7 is_stmt 0 view .LVU394 + 1204 0098 4FEA0C1C lsl ip, ip, #4 + 1205 009c 52F80C30 ldr r3, [r2, ip] + 1206 00a0 43F00103 orr r3, r3, #1 + 1207 00a4 42F80C30 str r3, [r2, ip] +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; + 1208 .loc 1 1280 7 is_stmt 1 view .LVU395 + 1209 .loc 1 1280 14 is_stmt 0 view .LVU396 + 1210 00a8 0020 movs r0, #0 + 1211 .LVL82: + 1212 .loc 1 1280 14 view .LVU397 + 1213 00aa 1DE0 b .L100 + 1214 .LVL83: + 1215 .L97: +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | + 1216 .loc 1 1250 9 is_stmt 1 view .LVU398 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | + 1217 .loc 1 1250 68 is_stmt 0 view .LVU399 + 1218 00ac 4C68 ldr r4, [r1, #4] +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | + 1219 .loc 1 1250 98 view .LVU400 + 1220 00ae 43EAC403 orr r3, r3, r4, lsl #3 +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1221 .loc 1 1252 67 view .LVU401 + 1222 00b2 CC68 ldr r4, [r1, #12] +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR); + 1223 .loc 1 1251 73 view .LVU402 + 1224 00b4 2343 orrs r3, r3, r4 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE | + 1225 .loc 1 1250 57 view .LVU403 + ARM GAS /tmp/cciHzaOX.s page 49 + + + 1226 00b6 0CF11804 add r4, ip, #24 + 1227 00ba 2401 lsls r4, r4, #4 + 1228 00bc 0568 ldr r5, [r0] + 1229 00be 2B51 str r3, [r5, r4] + 1230 00c0 BFE7 b .L98 + 1231 .L102: +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1232 .loc 1 1261 9 is_stmt 1 view .LVU404 + 1233 00c2 0368 ldr r3, [r0] + 1234 00c4 03EB0E13 add r3, r3, lr, lsl #4 + 1235 00c8 5968 ldr r1, [r3, #4] + 1236 .LVL84: +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1237 .loc 1 1261 9 is_stmt 0 view .LVU405 + 1238 00ca 41F48071 orr r1, r1, #256 + 1239 00ce 5960 str r1, [r3, #4] + 1240 00d0 C1E7 b .L99 + 1241 .LVL85: + 1242 .L96: +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1243 .loc 1 1285 7 is_stmt 1 view .LVU406 + 1244 .loc 1 1285 11 is_stmt 0 view .LVU407 + 1245 00d2 436A ldr r3, [r0, #36] + 1246 .LVL86: + 1247 .loc 1 1285 23 view .LVU408 + 1248 00d4 43F40013 orr r3, r3, #2097152 + 1249 00d8 4362 str r3, [r0, #36] +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 1250 .loc 1 1287 7 is_stmt 1 view .LVU409 + 1251 .loc 1 1287 14 is_stmt 0 view .LVU410 + 1252 00da 0120 movs r0, #1 + 1253 .LVL87: + 1254 .loc 1 1287 14 view .LVU411 + 1255 00dc 04E0 b .L100 + 1256 .LVL88: + 1257 .L95: +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1258 .loc 1 1293 5 is_stmt 1 view .LVU412 + 1259 .loc 1 1293 9 is_stmt 0 view .LVU413 + 1260 00de 436A ldr r3, [r0, #36] + 1261 .LVL89: + 1262 .loc 1 1293 21 view .LVU414 + 1263 00e0 43F48023 orr r3, r3, #262144 + 1264 00e4 4362 str r3, [r0, #36] +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 1265 .loc 1 1295 5 is_stmt 1 view .LVU415 + ARM GAS /tmp/cciHzaOX.s page 50 + + + 1266 .loc 1 1295 12 is_stmt 0 view .LVU416 + 1267 00e6 0120 movs r0, #1 + 1268 .LVL90: + 1269 .L100: +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1270 .loc 1 1297 1 view .LVU417 + 1271 00e8 30BD pop {r4, r5, pc} + 1272 .cfi_endproc + 1273 .LFE140: + 1275 .section .text.HAL_CAN_AbortTxRequest,"ax",%progbits + 1276 .align 1 + 1277 .global HAL_CAN_AbortTxRequest + 1278 .syntax unified + 1279 .thumb + 1280 .thumb_func + 1282 HAL_CAN_AbortTxRequest: + 1283 .LVL91: + 1284 .LFB141: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Abort transmission requests +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailboxes List of the Tx Mailboxes to abort. +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1285 .loc 1 1308 1 is_stmt 1 view -0 + 1286 .cfi_startproc + 1287 @ args = 0, pretend = 0, frame = 0 + 1288 @ frame_needed = 0, uses_anonymous_args = 0 + 1289 @ link register save eliminated. +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1290 .loc 1 1309 3 view .LVU419 + 1291 .loc 1 1309 24 is_stmt 0 view .LVU420 + 1292 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1293 .LVL92: +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); + 1294 .loc 1 1312 3 is_stmt 1 view .LVU421 +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1295 .loc 1 1314 3 view .LVU422 + 1296 .loc 1 1314 38 is_stmt 0 view .LVU423 + 1297 0004 013B subs r3, r3, #1 + 1298 .LVL93: + 1299 .loc 1 1314 38 view .LVU424 + 1300 0006 DBB2 uxtb r3, r3 + 1301 .LVL94: + 1302 .loc 1 1314 6 view .LVU425 + 1303 0008 012B cmp r3, #1 + 1304 000a 05D9 bls .L109 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) + ARM GAS /tmp/cciHzaOX.s page 51 + + +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 0 */ +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 0 */ +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 1 */ +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 1 */ +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 2 */ +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 2 */ +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1305 .loc 1 1344 5 is_stmt 1 view .LVU426 + 1306 .loc 1 1344 9 is_stmt 0 view .LVU427 + 1307 000c 436A ldr r3, [r0, #36] + 1308 .loc 1 1344 21 view .LVU428 + 1309 000e 43F48023 orr r3, r3, #262144 + 1310 0012 4362 str r3, [r0, #36] +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 1311 .loc 1 1346 5 is_stmt 1 view .LVU429 + 1312 .loc 1 1346 12 is_stmt 0 view .LVU430 + 1313 0014 0120 movs r0, #1 + 1314 .LVL95: +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1315 .loc 1 1348 1 view .LVU431 + 1316 0016 7047 bx lr + 1317 .LVL96: + 1318 .L109: +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1319 .loc 1 1318 5 is_stmt 1 view .LVU432 +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1320 .loc 1 1318 8 is_stmt 0 view .LVU433 + 1321 0018 11F0010F tst r1, #1 + 1322 001c 04D0 beq .L105 +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1323 .loc 1 1321 7 is_stmt 1 view .LVU434 + 1324 001e 0268 ldr r2, [r0] + 1325 0020 9368 ldr r3, [r2, #8] + ARM GAS /tmp/cciHzaOX.s page 52 + + + 1326 0022 43F08003 orr r3, r3, #128 + 1327 0026 9360 str r3, [r2, #8] + 1328 .L105: +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1329 .loc 1 1325 5 view .LVU435 +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1330 .loc 1 1325 8 is_stmt 0 view .LVU436 + 1331 0028 11F0020F tst r1, #2 + 1332 002c 04D0 beq .L106 +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1333 .loc 1 1328 7 is_stmt 1 view .LVU437 + 1334 002e 0268 ldr r2, [r0] + 1335 0030 9368 ldr r3, [r2, #8] + 1336 0032 43F40043 orr r3, r3, #32768 + 1337 0036 9360 str r3, [r2, #8] + 1338 .L106: +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1339 .loc 1 1332 5 view .LVU438 +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1340 .loc 1 1332 8 is_stmt 0 view .LVU439 + 1341 0038 11F0040F tst r1, #4 + 1342 003c 04D0 beq .L107 +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1343 .loc 1 1335 7 is_stmt 1 view .LVU440 + 1344 003e 0268 ldr r2, [r0] + 1345 0040 9368 ldr r3, [r2, #8] + 1346 0042 43F40003 orr r3, r3, #8388608 + 1347 0046 9360 str r3, [r2, #8] + 1348 .L107: +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1349 .loc 1 1339 5 view .LVU441 +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1350 .loc 1 1339 12 is_stmt 0 view .LVU442 + 1351 0048 0020 movs r0, #0 + 1352 .LVL97: +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1353 .loc 1 1339 12 view .LVU443 + 1354 004a 7047 bx lr + 1355 .cfi_endproc + 1356 .LFE141: + 1358 .section .text.HAL_CAN_GetTxMailboxesFreeLevel,"ax",%progbits + 1359 .align 1 + 1360 .global HAL_CAN_GetTxMailboxesFreeLevel + 1361 .syntax unified + 1362 .thumb + 1363 .thumb_func + 1365 HAL_CAN_GetTxMailboxesFreeLevel: + 1366 .LVL98: + 1367 .LFB142: +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Number of free Tx Mailboxes. +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) + ARM GAS /tmp/cciHzaOX.s page 53 + + +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1368 .loc 1 1357 1 is_stmt 1 view -0 + 1369 .cfi_startproc + 1370 @ args = 0, pretend = 0, frame = 0 + 1371 @ frame_needed = 0, uses_anonymous_args = 0 + 1372 @ link register save eliminated. +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t freelevel = 0U; + 1373 .loc 1 1358 3 view .LVU445 +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1374 .loc 1 1359 3 view .LVU446 + 1375 .loc 1 1359 24 is_stmt 0 view .LVU447 + 1376 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1377 .LVL99: +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1378 .loc 1 1361 3 is_stmt 1 view .LVU448 + 1379 .loc 1 1361 38 is_stmt 0 view .LVU449 + 1380 0004 013B subs r3, r3, #1 + 1381 .LVL100: + 1382 .loc 1 1361 38 view .LVU450 + 1383 0006 DBB2 uxtb r3, r3 + 1384 .LVL101: + 1385 .loc 1 1361 6 view .LVU451 + 1386 0008 012B cmp r3, #1 + 1387 000a 01D9 bls .L116 +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1388 .loc 1 1358 12 view .LVU452 + 1389 000c 0020 movs r0, #0 + 1390 .LVL102: +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 0 status */ +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++; +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 1 status */ +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++; +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Tx Mailbox 2 status */ +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** freelevel++; +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return Tx Mailboxes free level */ +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return freelevel; + 1391 .loc 1 1384 3 is_stmt 1 view .LVU453 + 1392 .L110: +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1393 .loc 1 1385 1 is_stmt 0 view .LVU454 + 1394 000e 7047 bx lr + ARM GAS /tmp/cciHzaOX.s page 54 + + + 1395 .LVL103: + 1396 .L116: +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1397 .loc 1 1365 5 is_stmt 1 view .LVU455 +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1398 .loc 1 1365 14 is_stmt 0 view .LVU456 + 1399 0010 0368 ldr r3, [r0] +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1400 .loc 1 1365 24 view .LVU457 + 1401 0012 9868 ldr r0, [r3, #8] + 1402 .LVL104: +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1403 .loc 1 1365 8 view .LVU458 + 1404 0014 10F08060 ands r0, r0, #67108864 + 1405 0018 00D0 beq .L112 +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1406 .loc 1 1367 16 view .LVU459 + 1407 001a 0120 movs r0, #1 + 1408 .L112: + 1409 .LVL105: +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1410 .loc 1 1371 5 is_stmt 1 view .LVU460 +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1411 .loc 1 1371 24 is_stmt 0 view .LVU461 + 1412 001c 9A68 ldr r2, [r3, #8] +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1413 .loc 1 1371 8 view .LVU462 + 1414 001e 12F0006F tst r2, #134217728 + 1415 0022 00D0 beq .L113 +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1416 .loc 1 1373 7 is_stmt 1 view .LVU463 +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1417 .loc 1 1373 16 is_stmt 0 view .LVU464 + 1418 0024 0130 adds r0, r0, #1 + 1419 .LVL106: + 1420 .L113: +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1421 .loc 1 1377 5 is_stmt 1 view .LVU465 +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1422 .loc 1 1377 24 is_stmt 0 view .LVU466 + 1423 0026 9B68 ldr r3, [r3, #8] +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1424 .loc 1 1377 8 view .LVU467 + 1425 0028 13F0805F tst r3, #268435456 + 1426 002c EFD0 beq .L110 +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1427 .loc 1 1379 7 is_stmt 1 view .LVU468 +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1428 .loc 1 1379 16 is_stmt 0 view .LVU469 + 1429 002e 0130 adds r0, r0, #1 + 1430 .LVL107: +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1431 .loc 1 1379 16 view .LVU470 + 1432 0030 7047 bx lr + 1433 .cfi_endproc + 1434 .LFE142: + 1436 .section .text.HAL_CAN_IsTxMessagePending,"ax",%progbits + ARM GAS /tmp/cciHzaOX.s page 55 + + + 1437 .align 1 + 1438 .global HAL_CAN_IsTxMessagePending + 1439 .syntax unified + 1440 .thumb + 1441 .thumb_func + 1443 HAL_CAN_IsTxMessagePending: + 1444 .LVL108: + 1445 .LFB143: +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Check if a transmission request is pending on the selected Tx +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Mailboxes. +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailboxes List of Tx Mailboxes to check. +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Status +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 0 : No pending transmission request on any selected Tx Mailboxes. +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * - 1 : Pending transmission request on at least one of the selected +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * Tx Mailbox. +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1446 .loc 1 1400 1 is_stmt 1 view -0 + 1447 .cfi_startproc + 1448 @ args = 0, pretend = 0, frame = 0 + 1449 @ frame_needed = 0, uses_anonymous_args = 0 + 1450 @ link register save eliminated. +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t status = 0U; + 1451 .loc 1 1401 3 view .LVU472 +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1452 .loc 1 1402 3 view .LVU473 + 1453 .loc 1 1402 24 is_stmt 0 view .LVU474 + 1454 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1455 .LVL109: +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); + 1456 .loc 1 1405 3 is_stmt 1 view .LVU475 +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1457 .loc 1 1407 3 view .LVU476 + 1458 .loc 1 1407 38 is_stmt 0 view .LVU477 + 1459 0004 013B subs r3, r3, #1 + 1460 .LVL110: + 1461 .loc 1 1407 38 view .LVU478 + 1462 0006 DBB2 uxtb r3, r3 + 1463 .LVL111: + 1464 .loc 1 1407 6 view .LVU479 + 1465 0008 012B cmp r3, #1 + 1466 000a 01D9 bls .L121 +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1467 .loc 1 1401 12 view .LVU480 + 1468 000c 0020 movs r0, #0 + 1469 .LVL112: +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1470 .loc 1 1401 12 view .LVU481 + ARM GAS /tmp/cciHzaOX.s page 56 + + + 1471 000e 7047 bx lr + 1472 .LVL113: + 1473 .L121: +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check pending transmission request on the selected Tx Mailboxes */ +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_P + 1474 .loc 1 1411 5 is_stmt 1 view .LVU482 + 1475 .loc 1 1411 14 is_stmt 0 view .LVU483 + 1476 0010 0368 ldr r3, [r0] + 1477 .loc 1 1411 24 view .LVU484 + 1478 0012 9B68 ldr r3, [r3, #8] + 1479 .loc 1 1411 30 view .LVU485 + 1480 0014 03EA8163 and r3, r3, r1, lsl #26 + 1481 .loc 1 1411 8 view .LVU486 + 1482 0018 B3EB816F cmp r3, r1, lsl #26 + 1483 001c 01D0 beq .L122 +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = 1U; + 1484 .loc 1 1413 14 view .LVU487 + 1485 001e 0120 movs r0, #1 + 1486 .LVL114: +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return status */ +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; + 1487 .loc 1 1418 3 is_stmt 1 view .LVU488 +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1488 .loc 1 1419 1 is_stmt 0 view .LVU489 + 1489 0020 7047 bx lr + 1490 .LVL115: + 1491 .L122: +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1492 .loc 1 1401 12 view .LVU490 + 1493 0022 0020 movs r0, #0 + 1494 .LVL116: +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1495 .loc 1 1401 12 view .LVU491 + 1496 0024 7047 bx lr + 1497 .cfi_endproc + 1498 .LFE143: + 1500 .section .text.HAL_CAN_GetTxTimestamp,"ax",%progbits + 1501 .align 1 + 1502 .global HAL_CAN_GetTxTimestamp + 1503 .syntax unified + 1504 .thumb + 1505 .thumb_func + 1507 HAL_CAN_GetTxTimestamp: + 1508 .LVL117: + 1509 .LFB144: +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return timestamp of Tx message sent, if time triggered communication +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** mode is enabled. +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + ARM GAS /tmp/cciHzaOX.s page 57 + + +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param TxMailbox Tx Mailbox where the timestamp of message sent will be +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * read. +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be one value of @arg CAN_Tx_Mailboxes. +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Timestamp of message sent from Tx Mailbox. +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox) +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1510 .loc 1 1432 1 is_stmt 1 view -0 + 1511 .cfi_startproc + 1512 @ args = 0, pretend = 0, frame = 0 + 1513 @ frame_needed = 0, uses_anonymous_args = 0 + 1514 @ link register save eliminated. +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t timestamp = 0U; + 1515 .loc 1 1433 3 view .LVU493 +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox; + 1516 .loc 1 1434 3 view .LVU494 +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1517 .loc 1 1435 3 view .LVU495 + 1518 .loc 1 1435 24 is_stmt 0 view .LVU496 + 1519 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1520 .LVL118: +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); + 1521 .loc 1 1438 3 is_stmt 1 view .LVU497 +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1522 .loc 1 1440 3 view .LVU498 + 1523 .loc 1 1440 38 is_stmt 0 view .LVU499 + 1524 0004 013B subs r3, r3, #1 + 1525 .LVL119: + 1526 .loc 1 1440 38 view .LVU500 + 1527 0006 DBB2 uxtb r3, r3 + 1528 .LVL120: + 1529 .loc 1 1440 6 view .LVU501 + 1530 0008 012B cmp r3, #1 + 1531 000a 01D9 bls .L126 +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t transmitmailbox; + 1532 .loc 1 1433 12 view .LVU502 + 1533 000c 0020 movs r0, #0 + 1534 .LVL121: +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Select the Tx mailbox */ +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** transmitmailbox = POSITION_VAL(TxMailbox); +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get timestamp */ +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TI +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return the timestamp */ +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return timestamp; + 1535 .loc 1 1451 3 is_stmt 1 view .LVU503 +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1536 .loc 1 1452 1 is_stmt 0 view .LVU504 + 1537 000e 7047 bx lr + 1538 .LVL122: + ARM GAS /tmp/cciHzaOX.s page 58 + + + 1539 .L126: +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 1540 .loc 1 1444 5 is_stmt 1 view .LVU505 + 1541 .LBB4: + 1542 .LBI4: + 1543 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/cciHzaOX.s page 59 + + + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + ARM GAS /tmp/cciHzaOX.s page 60 + + + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/cciHzaOX.s page 61 + + + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cciHzaOX.s page 62 + + + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + ARM GAS /tmp/cciHzaOX.s page 63 + + + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cciHzaOX.s page 64 + + + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + ARM GAS /tmp/cciHzaOX.s page 65 + + + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + ARM GAS /tmp/cciHzaOX.s page 66 + + + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/cciHzaOX.s page 67 + + + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cciHzaOX.s page 68 + + + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + ARM GAS /tmp/cciHzaOX.s page 69 + + + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/cciHzaOX.s page 70 + + + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cciHzaOX.s page 71 + + + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + ARM GAS /tmp/cciHzaOX.s page 72 + + + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/cciHzaOX.s page 73 + + + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cciHzaOX.s page 74 + + + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cciHzaOX.s page 75 + + + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 1544 .loc 2 981 31 view .LVU506 + 1545 .LBB5: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 1546 .loc 2 983 3 view .LVU507 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 1547 .loc 2 988 4 view .LVU508 + 1548 .syntax unified + 1549 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1550 0010 91FAA1F1 rbit r1, r1 + 1551 @ 0 "" 2 + 1552 .LVL123: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 1553 .loc 2 1001 3 view .LVU509 + 1554 .loc 2 1001 3 is_stmt 0 view .LVU510 + 1555 .thumb + 1556 .syntax unified + 1557 .LBE5: + 1558 .LBE4: +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 1559 .loc 1 1444 21 discriminator 2 view .LVU511 + 1560 0014 B1FA81F1 clz r1, r1 + 1561 .LVL124: + ARM GAS /tmp/cciHzaOX.s page 76 + + +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1562 .loc 1 1447 5 is_stmt 1 view .LVU512 +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1563 .loc 1 1447 22 is_stmt 0 view .LVU513 + 1564 0018 0368 ldr r3, [r0] +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1565 .loc 1 1447 61 view .LVU514 + 1566 001a 1831 adds r1, r1, #24 + 1567 .LVL125: +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1568 .loc 1 1447 61 view .LVU515 + 1569 001c 03EB0113 add r3, r3, r1, lsl #4 + 1570 0020 5868 ldr r0, [r3, #4] + 1571 .LVL126: +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1572 .loc 1 1447 85 view .LVU516 + 1573 0022 000C lsrs r0, r0, #16 + 1574 .LVL127: +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1575 .loc 1 1447 85 view .LVU517 + 1576 0024 7047 bx lr + 1577 .cfi_endproc + 1578 .LFE144: + 1580 .section .text.HAL_CAN_GetRxMessage,"ax",%progbits + 1581 .align 1 + 1582 .global HAL_CAN_GetRxMessage + 1583 .syntax unified + 1584 .thumb + 1585 .thumb_func + 1587 HAL_CAN_GetRxMessage: + 1588 .LVL128: + 1589 .LFB145: +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param RxFifo Fifo number of the received message to be read. +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * of the Rx frame will be stored. +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param aData array where the payload of the Rx frame will be stored. +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1590 .loc 1 1467 1 is_stmt 1 view -0 + 1591 .cfi_startproc + 1592 @ args = 0, pretend = 0, frame = 0 + 1593 @ frame_needed = 0, uses_anonymous_args = 0 + 1594 @ link register save eliminated. +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1595 .loc 1 1468 3 view .LVU519 + 1596 .loc 1 1468 24 is_stmt 0 view .LVU520 + 1597 0000 90F820C0 ldrb ip, [r0, #32] @ zero_extendqisi2 + 1598 .LVL129: + ARM GAS /tmp/cciHzaOX.s page 77 + + +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); + 1599 .loc 1 1470 3 is_stmt 1 view .LVU521 +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1600 .loc 1 1472 3 view .LVU522 + 1601 .loc 1 1472 38 is_stmt 0 view .LVU523 + 1602 0004 0CF1FF3C add ip, ip, #-1 + 1603 .LVL130: + 1604 .loc 1 1472 38 view .LVU524 + 1605 0008 5FFA8CFC uxtb ip, ip + 1606 .LVL131: + 1607 .loc 1 1472 6 view .LVU525 + 1608 000c BCF1010F cmp ip, #1 + 1609 0010 00F2A580 bhi .L128 +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1610 .loc 1 1467 1 view .LVU526 + 1611 0014 30B4 push {r4, r5} + 1612 .cfi_def_cfa_offset 8 + 1613 .cfi_offset 4, -8 + 1614 .cfi_offset 5, -4 +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check the Rx FIFO */ +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + 1615 .loc 1 1476 5 is_stmt 1 view .LVU527 + 1616 .loc 1 1476 8 is_stmt 0 view .LVU528 + 1617 0016 51B9 cbnz r1, .L129 +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that the Rx FIFO 0 is not empty */ +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) + 1618 .loc 1 1479 7 is_stmt 1 view .LVU529 + 1619 .loc 1 1479 16 is_stmt 0 view .LVU530 + 1620 0018 0468 ldr r4, [r0] + 1621 .loc 1 1479 26 view .LVU531 + 1622 001a E468 ldr r4, [r4, #12] + 1623 .loc 1 1479 10 view .LVU532 + 1624 001c 14F0030F tst r4, #3 + 1625 0020 10D1 bne .L130 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1626 .loc 1 1482 9 is_stmt 1 view .LVU533 + 1627 .loc 1 1482 13 is_stmt 0 view .LVU534 + 1628 0022 436A ldr r3, [r0, #36] + 1629 .LVL132: + 1630 .loc 1 1482 25 view .LVU535 + 1631 0024 43F40013 orr r3, r3, #2097152 + 1632 0028 4362 str r3, [r0, #36] +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 1633 .loc 1 1484 9 is_stmt 1 view .LVU536 + 1634 .loc 1 1484 16 is_stmt 0 view .LVU537 + 1635 002a 0120 movs r0, #1 + 1636 .LVL133: + 1637 .loc 1 1484 16 view .LVU538 + 1638 002c 7EE0 b .L131 + ARM GAS /tmp/cciHzaOX.s page 78 + + + 1639 .LVL134: + 1640 .L129: +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check that the Rx FIFO 1 is not empty */ +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) + 1641 .loc 1 1490 7 is_stmt 1 view .LVU539 + 1642 .loc 1 1490 16 is_stmt 0 view .LVU540 + 1643 002e 0468 ldr r4, [r0] + 1644 .loc 1 1490 26 view .LVU541 + 1645 0030 2469 ldr r4, [r4, #16] + 1646 .loc 1 1490 10 view .LVU542 + 1647 0032 14F0030F tst r4, #3 + 1648 0036 05D1 bne .L130 +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1649 .loc 1 1493 9 is_stmt 1 view .LVU543 + 1650 .loc 1 1493 13 is_stmt 0 view .LVU544 + 1651 0038 436A ldr r3, [r0, #36] + 1652 .LVL135: + 1653 .loc 1 1493 25 view .LVU545 + 1654 003a 43F40013 orr r3, r3, #2097152 + 1655 003e 4362 str r3, [r0, #36] +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 1656 .loc 1 1495 9 is_stmt 1 view .LVU546 + 1657 .loc 1 1495 16 is_stmt 0 view .LVU547 + 1658 0040 0120 movs r0, #1 + 1659 .LVL136: + 1660 .loc 1 1495 16 view .LVU548 + 1661 0042 73E0 b .L131 + 1662 .LVL137: + 1663 .L130: +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get the header */ +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; + 1664 .loc 1 1500 5 is_stmt 1 view .LVU549 + 1665 .loc 1 1500 39 is_stmt 0 view .LVU550 + 1666 0044 0568 ldr r5, [r0] + 1667 .loc 1 1500 71 view .LVU551 + 1668 0046 01F11B04 add r4, r1, #27 + 1669 004a 2401 lsls r4, r4, #4 + 1670 004c 2C59 ldr r4, [r5, r4] + 1671 .loc 1 1500 33 view .LVU552 + 1672 004e 04F00404 and r4, r4, #4 + 1673 .loc 1 1500 18 view .LVU553 + 1674 0052 9460 str r4, [r2, #8] +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1675 .loc 1 1501 5 is_stmt 1 view .LVU554 + 1676 .loc 1 1501 8 is_stmt 0 view .LVU555 + 1677 0054 002C cmp r4, #0 + 1678 0056 6BD1 bne .L132 + ARM GAS /tmp/cciHzaOX.s page 79 + + +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_ + 1679 .loc 1 1503 7 is_stmt 1 view .LVU556 + 1680 .loc 1 1503 45 is_stmt 0 view .LVU557 + 1681 0058 0568 ldr r5, [r0] + 1682 .loc 1 1503 77 view .LVU558 + 1683 005a 01F11B04 add r4, r1, #27 + 1684 005e 2401 lsls r4, r4, #4 + 1685 0060 2C59 ldr r4, [r5, r4] + 1686 .loc 1 1503 83 view .LVU559 + 1687 0062 640D lsrs r4, r4, #21 + 1688 .loc 1 1503 22 view .LVU560 + 1689 0064 1460 str r4, [r2] + 1690 .L133: +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); + 1691 .loc 1 1510 5 is_stmt 1 view .LVU561 + 1692 .loc 1 1510 40 is_stmt 0 view .LVU562 + 1693 0066 0468 ldr r4, [r0] + 1694 .loc 1 1510 72 view .LVU563 + 1695 0068 01F11B0C add ip, r1, #27 + 1696 006c 4FEA0C1C lsl ip, ip, #4 + 1697 0070 54F80C40 ldr r4, [r4, ip] + 1698 .loc 1 1510 34 view .LVU564 + 1699 0074 04F00204 and r4, r4, #2 + 1700 .loc 1 1510 18 view .LVU565 + 1701 0078 D460 str r4, [r2, #12] +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) + 1702 .loc 1 1511 5 is_stmt 1 view .LVU566 + 1703 .loc 1 1511 31 is_stmt 0 view .LVU567 + 1704 007a 0468 ldr r4, [r0] + 1705 .loc 1 1511 63 view .LVU568 + 1706 007c A444 add ip, ip, r4 + 1707 007e DCF80450 ldr r5, [ip, #4] + 1708 .loc 1 1511 8 view .LVU569 + 1709 0082 15F0080F tst r5, #8 + 1710 0086 5BD0 beq .L134 +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Truncate DLC to 8 if received field is over range */ +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->DLC = 8U; + 1711 .loc 1 1514 7 is_stmt 1 view .LVU570 + 1712 .loc 1 1514 20 is_stmt 0 view .LVU571 + 1713 0088 0824 movs r4, #8 + 1714 008a 1461 str r4, [r2, #16] + 1715 .L135: +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_P +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_ + 1716 .loc 1 1520 5 is_stmt 1 view .LVU572 + ARM GAS /tmp/cciHzaOX.s page 80 + + + 1717 .loc 1 1520 54 is_stmt 0 view .LVU573 + 1718 008c 0468 ldr r4, [r0] + 1719 .loc 1 1520 86 view .LVU574 + 1720 008e 01F11B0C add ip, r1, #27 + 1721 0092 04EB0C14 add r4, r4, ip, lsl #4 + 1722 0096 6468 ldr r4, [r4, #4] + 1723 .loc 1 1520 93 view .LVU575 + 1724 0098 C4F30724 ubfx r4, r4, #8, #8 + 1725 .loc 1 1520 31 view .LVU576 + 1726 009c 9461 str r4, [r2, #24] +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_ + 1727 .loc 1 1521 5 is_stmt 1 view .LVU577 + 1728 .loc 1 1521 48 is_stmt 0 view .LVU578 + 1729 009e 0468 ldr r4, [r0] + 1730 .loc 1 1521 80 view .LVU579 + 1731 00a0 04EB0C14 add r4, r4, ip, lsl #4 + 1732 00a4 6468 ldr r4, [r4, #4] + 1733 .loc 1 1521 87 view .LVU580 + 1734 00a6 240C lsrs r4, r4, #16 + 1735 .loc 1 1521 24 view .LVU581 + 1736 00a8 5461 str r4, [r2, #20] +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Get the data */ +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1737 .loc 1 1524 5 is_stmt 1 view .LVU582 + 1738 .loc 1 1524 49 is_stmt 0 view .LVU583 + 1739 00aa 0268 ldr r2, [r0] + 1740 .LVL138: + 1741 .loc 1 1524 81 view .LVU584 + 1742 00ac 02EB0112 add r2, r2, r1, lsl #4 + 1743 00b0 D2F8B821 ldr r2, [r2, #440] + 1744 .loc 1 1524 14 view .LVU585 + 1745 00b4 1A70 strb r2, [r3] +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1746 .loc 1 1525 5 is_stmt 1 view .LVU586 + 1747 .loc 1 1525 49 is_stmt 0 view .LVU587 + 1748 00b6 0268 ldr r2, [r0] + 1749 .loc 1 1525 81 view .LVU588 + 1750 00b8 02EB0112 add r2, r2, r1, lsl #4 + 1751 00bc D2F8B821 ldr r2, [r2, #440] + 1752 .loc 1 1525 16 view .LVU589 + 1753 00c0 C2F30722 ubfx r2, r2, #8, #8 + 1754 .loc 1 1525 14 view .LVU590 + 1755 00c4 5A70 strb r2, [r3, #1] +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1756 .loc 1 1526 5 is_stmt 1 view .LVU591 + 1757 .loc 1 1526 49 is_stmt 0 view .LVU592 + 1758 00c6 0268 ldr r2, [r0] + 1759 .loc 1 1526 81 view .LVU593 + 1760 00c8 02EB0112 add r2, r2, r1, lsl #4 + 1761 00cc D2F8B821 ldr r2, [r2, #440] + 1762 .loc 1 1526 16 view .LVU594 + 1763 00d0 C2F30742 ubfx r2, r2, #16, #8 + 1764 .loc 1 1526 14 view .LVU595 + 1765 00d4 9A70 strb r2, [r3, #2] +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1766 .loc 1 1527 5 is_stmt 1 view .LVU596 + ARM GAS /tmp/cciHzaOX.s page 81 + + + 1767 .loc 1 1527 49 is_stmt 0 view .LVU597 + 1768 00d6 0268 ldr r2, [r0] + 1769 .loc 1 1527 81 view .LVU598 + 1770 00d8 02EB0112 add r2, r2, r1, lsl #4 + 1771 00dc D2F8B821 ldr r2, [r2, #440] + 1772 .loc 1 1527 16 view .LVU599 + 1773 00e0 120E lsrs r2, r2, #24 + 1774 .loc 1 1527 14 view .LVU600 + 1775 00e2 DA70 strb r2, [r3, #3] +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 1776 .loc 1 1528 5 is_stmt 1 view .LVU601 + 1777 .loc 1 1528 49 is_stmt 0 view .LVU602 + 1778 00e4 0268 ldr r2, [r0] + 1779 .loc 1 1528 81 view .LVU603 + 1780 00e6 02EB0112 add r2, r2, r1, lsl #4 + 1781 00ea D2F8BC21 ldr r2, [r2, #444] + 1782 .loc 1 1528 14 view .LVU604 + 1783 00ee 1A71 strb r2, [r3, #4] +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 1784 .loc 1 1529 5 is_stmt 1 view .LVU605 + 1785 .loc 1 1529 49 is_stmt 0 view .LVU606 + 1786 00f0 0268 ldr r2, [r0] + 1787 .loc 1 1529 81 view .LVU607 + 1788 00f2 02EB0112 add r2, r2, r1, lsl #4 + 1789 00f6 D2F8BC21 ldr r2, [r2, #444] + 1790 .loc 1 1529 16 view .LVU608 + 1791 00fa C2F30722 ubfx r2, r2, #8, #8 + 1792 .loc 1 1529 14 view .LVU609 + 1793 00fe 5A71 strb r2, [r3, #5] +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 1794 .loc 1 1530 5 is_stmt 1 view .LVU610 + 1795 .loc 1 1530 49 is_stmt 0 view .LVU611 + 1796 0100 0268 ldr r2, [r0] + 1797 .loc 1 1530 81 view .LVU612 + 1798 0102 02EB0112 add r2, r2, r1, lsl #4 + 1799 0106 D2F8BC21 ldr r2, [r2, #444] + 1800 .loc 1 1530 16 view .LVU613 + 1801 010a C2F30742 ubfx r2, r2, #16, #8 + 1802 .loc 1 1530 14 view .LVU614 + 1803 010e 9A71 strb r2, [r3, #6] +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 1804 .loc 1 1531 5 is_stmt 1 view .LVU615 + 1805 .loc 1 1531 49 is_stmt 0 view .LVU616 + 1806 0110 0268 ldr r2, [r0] + 1807 .loc 1 1531 81 view .LVU617 + 1808 0112 02EB0112 add r2, r2, r1, lsl #4 + 1809 0116 D2F8BC21 ldr r2, [r2, #444] + 1810 .loc 1 1531 16 view .LVU618 + 1811 011a 120E lsrs r2, r2, #24 + 1812 .loc 1 1531 14 view .LVU619 + 1813 011c DA71 strb r2, [r3, #7] +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release the FIFO */ +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + 1814 .loc 1 1534 5 is_stmt 1 view .LVU620 + 1815 .loc 1 1534 8 is_stmt 0 view .LVU621 + 1816 011e C1B9 cbnz r1, .L136 + ARM GAS /tmp/cciHzaOX.s page 82 + + +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release RX FIFO 0 */ +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); + 1817 .loc 1 1537 7 is_stmt 1 view .LVU622 + 1818 0120 0268 ldr r2, [r0] + 1819 0122 D368 ldr r3, [r2, #12] + 1820 .LVL139: + 1821 .loc 1 1537 7 is_stmt 0 view .LVU623 + 1822 0124 43F02003 orr r3, r3, #32 + 1823 0128 D360 str r3, [r2, #12] + 1824 .L137: +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Release RX FIFO 1 */ +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; + 1825 .loc 1 1546 5 is_stmt 1 view .LVU624 + 1826 .loc 1 1546 12 is_stmt 0 view .LVU625 + 1827 012a 0020 movs r0, #0 + 1828 .LVL140: + 1829 .L131: +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1830 .loc 1 1555 1 view .LVU626 + 1831 012c 30BC pop {r4, r5} + 1832 .cfi_remember_state + 1833 .cfi_restore 5 + 1834 .cfi_restore 4 + 1835 .cfi_def_cfa_offset 0 + 1836 012e 7047 bx lr + 1837 .LVL141: + 1838 .L132: + 1839 .cfi_restore_state +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; + 1840 .loc 1 1507 7 is_stmt 1 view .LVU627 +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1841 .loc 1 1508 29 is_stmt 0 view .LVU628 + 1842 0130 0568 ldr r5, [r0] +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1843 .loc 1 1508 61 view .LVU629 + 1844 0132 01F11B04 add r4, r1, #27 + 1845 0136 2401 lsls r4, r4, #4 + 1846 0138 2C59 ldr r4, [r5, r4] +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1847 .loc 1 1508 67 view .LVU630 + 1848 013a E408 lsrs r4, r4, #3 + ARM GAS /tmp/cciHzaOX.s page 83 + + +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; + 1849 .loc 1 1507 22 view .LVU631 + 1850 013c 5460 str r4, [r2, #4] + 1851 013e 92E7 b .L133 + 1852 .L134: +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1853 .loc 1 1518 7 is_stmt 1 view .LVU632 +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1854 .loc 1 1518 75 is_stmt 0 view .LVU633 + 1855 0140 01F11B05 add r5, r1, #27 + 1856 0144 04EB0514 add r4, r4, r5, lsl #4 + 1857 0148 6468 ldr r4, [r4, #4] +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1858 .loc 1 1518 82 view .LVU634 + 1859 014a 04F00F04 and r4, r4, #15 +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1860 .loc 1 1518 20 view .LVU635 + 1861 014e 1461 str r4, [r2, #16] + 1862 0150 9CE7 b .L135 + 1863 .LVL142: + 1864 .L136: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1865 .loc 1 1542 7 is_stmt 1 view .LVU636 + 1866 0152 0268 ldr r2, [r0] + 1867 0154 1369 ldr r3, [r2, #16] + 1868 .LVL143: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1869 .loc 1 1542 7 is_stmt 0 view .LVU637 + 1870 0156 43F02003 orr r3, r3, #32 + 1871 015a 1361 str r3, [r2, #16] + 1872 015c E5E7 b .L137 + 1873 .LVL144: + 1874 .L128: + 1875 .cfi_def_cfa_offset 0 + 1876 .cfi_restore 4 + 1877 .cfi_restore 5 +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 1878 .loc 1 1551 5 is_stmt 1 view .LVU638 +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 1879 .loc 1 1551 9 is_stmt 0 view .LVU639 + 1880 015e 436A ldr r3, [r0, #36] + 1881 .LVL145: +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 1882 .loc 1 1551 21 view .LVU640 + 1883 0160 43F48023 orr r3, r3, #262144 + 1884 0164 4362 str r3, [r0, #36] +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1885 .loc 1 1553 5 is_stmt 1 view .LVU641 +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1886 .loc 1 1553 12 is_stmt 0 view .LVU642 + 1887 0166 0120 movs r0, #1 + 1888 .LVL146: + 1889 .loc 1 1555 1 view .LVU643 + 1890 0168 7047 bx lr + 1891 .cfi_endproc + 1892 .LFE145: + 1894 .section .text.HAL_CAN_GetRxFifoFillLevel,"ax",%progbits + ARM GAS /tmp/cciHzaOX.s page 84 + + + 1895 .align 1 + 1896 .global HAL_CAN_GetRxFifoFillLevel + 1897 .syntax unified + 1898 .thumb + 1899 .thumb_func + 1901 HAL_CAN_GetRxFifoFillLevel: + 1902 .LVL147: + 1903 .LFB146: +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return Rx FIFO fill level. +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param RxFifo Rx FIFO. +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval Number of messages available in Rx FIFO. +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo) +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1904 .loc 1 1566 1 is_stmt 1 view -0 + 1905 .cfi_startproc + 1906 @ args = 0, pretend = 0, frame = 0 + 1907 @ frame_needed = 0, uses_anonymous_args = 0 + 1908 @ link register save eliminated. +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t filllevel = 0U; + 1909 .loc 1 1567 3 view .LVU645 +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1910 .loc 1 1568 3 view .LVU646 + 1911 .loc 1 1568 24 is_stmt 0 view .LVU647 + 1912 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1913 .LVL148: +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); + 1914 .loc 1 1571 3 is_stmt 1 view .LVU648 +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1915 .loc 1 1573 3 view .LVU649 + 1916 .loc 1 1573 38 is_stmt 0 view .LVU650 + 1917 0004 013B subs r3, r3, #1 + 1918 .LVL149: + 1919 .loc 1 1573 38 view .LVU651 + 1920 0006 DBB2 uxtb r3, r3 + 1921 .LVL150: + 1922 .loc 1 1573 6 view .LVU652 + 1923 0008 012B cmp r3, #1 + 1924 000a 01D9 bls .L146 +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1925 .loc 1 1567 12 view .LVU653 + 1926 000c 0020 movs r0, #0 + 1927 .LVL151: +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + ARM GAS /tmp/cciHzaOX.s page 85 + + +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else /* RxFifo == CAN_RX_FIFO1 */ +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return Rx FIFO fill level */ +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return filllevel; + 1928 .loc 1 1587 3 is_stmt 1 view .LVU654 +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1929 .loc 1 1588 1 is_stmt 0 view .LVU655 + 1930 000e 7047 bx lr + 1931 .LVL152: + 1932 .L146: +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1933 .loc 1 1576 5 is_stmt 1 view .LVU656 +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1934 .loc 1 1576 8 is_stmt 0 view .LVU657 + 1935 0010 21B9 cbnz r1, .L144 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1936 .loc 1 1578 7 is_stmt 1 view .LVU658 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1937 .loc 1 1578 23 is_stmt 0 view .LVU659 + 1938 0012 0368 ldr r3, [r0] +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1939 .loc 1 1578 33 view .LVU660 + 1940 0014 D868 ldr r0, [r3, #12] + 1941 .LVL153: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1942 .loc 1 1578 17 view .LVU661 + 1943 0016 00F00300 and r0, r0, #3 + 1944 .LVL154: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1945 .loc 1 1578 17 view .LVU662 + 1946 001a 7047 bx lr + 1947 .LVL155: + 1948 .L144: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1949 .loc 1 1582 7 is_stmt 1 view .LVU663 +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1950 .loc 1 1582 23 is_stmt 0 view .LVU664 + 1951 001c 0368 ldr r3, [r0] +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1952 .loc 1 1582 33 view .LVU665 + 1953 001e 1869 ldr r0, [r3, #16] + 1954 .LVL156: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1955 .loc 1 1582 17 view .LVU666 + 1956 0020 00F00300 and r0, r0, #3 + 1957 .LVL157: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 1958 .loc 1 1582 17 view .LVU667 + 1959 0024 7047 bx lr + 1960 .cfi_endproc + 1961 .LFE146: + 1963 .section .text.HAL_CAN_ActivateNotification,"ax",%progbits + 1964 .align 1 + ARM GAS /tmp/cciHzaOX.s page 86 + + + 1965 .global HAL_CAN_ActivateNotification + 1966 .syntax unified + 1967 .thumb + 1968 .thumb_func + 1970 HAL_CAN_ActivateNotification: + 1971 .LVL158: + 1972 .LFB147: +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group4 Interrupts management +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Interrupts management +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Interrupts management ##### +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] This section provides functions allowing to: +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ActivateNotification : Enable interrupts +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_DeactivateNotification : Disable interrupts +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_IRQHandler : Handles CAN interrupt request +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Enable interrupts. +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param ActiveITs indicates which interrupts will be enabled. +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 1973 .loc 1 1619 1 is_stmt 1 view -0 + 1974 .cfi_startproc + 1975 @ args = 0, pretend = 0, frame = 0 + 1976 @ frame_needed = 0, uses_anonymous_args = 0 + 1977 @ link register save eliminated. +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1978 .loc 1 1620 3 view .LVU669 + 1979 .loc 1 1620 24 is_stmt 0 view .LVU670 + 1980 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 1981 .LVL159: +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IT(ActiveITs)); + 1982 .loc 1 1623 3 is_stmt 1 view .LVU671 +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1983 .loc 1 1625 3 view .LVU672 + 1984 .loc 1 1625 38 is_stmt 0 view .LVU673 + 1985 0004 013B subs r3, r3, #1 + ARM GAS /tmp/cciHzaOX.s page 87 + + + 1986 .LVL160: + 1987 .loc 1 1625 38 view .LVU674 + 1988 0006 DBB2 uxtb r3, r3 + 1989 .LVL161: + 1990 .loc 1 1625 6 view .LVU675 + 1991 0008 012B cmp r3, #1 + 1992 000a 05D9 bls .L150 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Enable the selected interrupts */ +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_ENABLE_IT(hcan, ActiveITs); +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1993 .loc 1 1637 5 is_stmt 1 view .LVU676 + 1994 .loc 1 1637 9 is_stmt 0 view .LVU677 + 1995 000c 436A ldr r3, [r0, #36] + 1996 .loc 1 1637 21 view .LVU678 + 1997 000e 43F48023 orr r3, r3, #262144 + 1998 0012 4362 str r3, [r0, #36] +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 1999 .loc 1 1639 5 is_stmt 1 view .LVU679 + 2000 .loc 1 1639 12 is_stmt 0 view .LVU680 + 2001 0014 0120 movs r0, #1 + 2002 .LVL162: +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2003 .loc 1 1641 1 view .LVU681 + 2004 0016 7047 bx lr + 2005 .LVL163: + 2006 .L150: +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2007 .loc 1 1629 5 is_stmt 1 view .LVU682 + 2008 0018 0268 ldr r2, [r0] + 2009 001a 5369 ldr r3, [r2, #20] + 2010 001c 0B43 orrs r3, r3, r1 + 2011 001e 5361 str r3, [r2, #20] +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2012 .loc 1 1632 5 view .LVU683 +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2013 .loc 1 1632 12 is_stmt 0 view .LVU684 + 2014 0020 0020 movs r0, #0 + 2015 .LVL164: +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2016 .loc 1 1632 12 view .LVU685 + 2017 0022 7047 bx lr + 2018 .cfi_endproc + 2019 .LFE147: + 2021 .section .text.HAL_CAN_DeactivateNotification,"ax",%progbits + 2022 .align 1 + 2023 .global HAL_CAN_DeactivateNotification + ARM GAS /tmp/cciHzaOX.s page 88 + + + 2024 .syntax unified + 2025 .thumb + 2026 .thumb_func + 2028 HAL_CAN_DeactivateNotification: + 2029 .LVL165: + 2030 .LFB148: +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Disable interrupts. +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param InactiveITs indicates which interrupts will be disabled. +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2031 .loc 1 1652 1 is_stmt 1 view -0 + 2032 .cfi_startproc + 2033 @ args = 0, pretend = 0, frame = 0 + 2034 @ frame_needed = 0, uses_anonymous_args = 0 + 2035 @ link register save eliminated. +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2036 .loc 1 1653 3 view .LVU687 + 2037 .loc 1 1653 24 is_stmt 0 view .LVU688 + 2038 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 2039 .LVL166: +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check function parameters */ +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** assert_param(IS_CAN_IT(InactiveITs)); + 2040 .loc 1 1656 3 is_stmt 1 view .LVU689 +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2041 .loc 1 1658 3 view .LVU690 + 2042 .loc 1 1658 38 is_stmt 0 view .LVU691 + 2043 0004 013B subs r3, r3, #1 + 2044 .LVL167: + 2045 .loc 1 1658 38 view .LVU692 + 2046 0006 DBB2 uxtb r3, r3 + 2047 .LVL168: + 2048 .loc 1 1658 6 view .LVU693 + 2049 0008 012B cmp r3, #1 + 2050 000a 05D9 bls .L154 +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Disable the selected interrupts */ +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_DISABLE_IT(hcan, InactiveITs); +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return function status */ +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_OK; +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2051 .loc 1 1670 5 is_stmt 1 view .LVU694 + 2052 .loc 1 1670 9 is_stmt 0 view .LVU695 + ARM GAS /tmp/cciHzaOX.s page 89 + + + 2053 000c 436A ldr r3, [r0, #36] + 2054 .loc 1 1670 21 view .LVU696 + 2055 000e 43F48023 orr r3, r3, #262144 + 2056 0012 4362 str r3, [r0, #36] +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return HAL_ERROR; + 2057 .loc 1 1672 5 is_stmt 1 view .LVU697 + 2058 .loc 1 1672 12 is_stmt 0 view .LVU698 + 2059 0014 0120 movs r0, #1 + 2060 .LVL169: +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2061 .loc 1 1674 1 view .LVU699 + 2062 0016 7047 bx lr + 2063 .LVL170: + 2064 .L154: +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2065 .loc 1 1662 5 is_stmt 1 view .LVU700 + 2066 0018 0268 ldr r2, [r0] + 2067 001a 5369 ldr r3, [r2, #20] + 2068 001c 23EA0103 bic r3, r3, r1 + 2069 0020 5361 str r3, [r2, #20] +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2070 .loc 1 1665 5 view .LVU701 +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2071 .loc 1 1665 12 is_stmt 0 view .LVU702 + 2072 0022 0020 movs r0, #0 + 2073 .LVL171: +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2074 .loc 1 1665 12 view .LVU703 + 2075 0024 7047 bx lr + 2076 .cfi_endproc + 2077 .LFE148: + 2079 .section .text.HAL_CAN_TxMailbox0CompleteCallback,"ax",%progbits + 2080 .align 1 + 2081 .weak HAL_CAN_TxMailbox0CompleteCallback + 2082 .syntax unified + 2083 .thumb + 2084 .thumb_func + 2086 HAL_CAN_TxMailbox0CompleteCallback: + 2087 .LVL172: + 2088 .LFB150: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Handles CAN interrupt request +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + ARM GAS /tmp/cciHzaOX.s page 90 + + +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox empty interrupt management *****************************/ +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 0 management *****************************************/ +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP0) != 0U) +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK0) != 0U) +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 0 complete callback */ +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0CompleteCallback(hcan); +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox0CompleteCallback(hcan); +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST0) != 0U) +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST0; +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR0) != 0U) +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR0; +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 0 abort callback */ +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox0AbortCallback(hcan); +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox0AbortCallback(hcan); +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 1 management *****************************************/ +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP1) != 0U) +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK1) != 0U) +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 1 complete callback */ + ARM GAS /tmp/cciHzaOX.s page 91 + + +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1CompleteCallback(hcan); +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox1CompleteCallback(hcan); +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST1) != 0U) +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST1; +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR1) != 0U) +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR1; +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 1 abort callback */ +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox1AbortCallback(hcan); +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox1AbortCallback(hcan); +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmit Mailbox 2 management *****************************************/ +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP2) != 0U) +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK2) != 0U) +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 2 complete callback */ +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2CompleteCallback(hcan); +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox2CompleteCallback(hcan); +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST2) != 0U) +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST2; + ARM GAS /tmp/cciHzaOX.s page 92 + + +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR2) != 0U) +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR2; +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Transmission Mailbox 2 abort callback */ +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->TxMailbox2AbortCallback(hcan); +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_TxMailbox2AbortCallback(hcan); +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 overrun interrupt management *****************************/ +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Rx Fifo 0 overrun error */ +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV0; +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO0 Overrun Flag */ +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 full interrupt management ********************************/ +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FULL0) != 0U) +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO 0 full Flag */ +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 full Callback */ +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0FullCallback(hcan); +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo0FullCallback(hcan); +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 message pending interrupt management *********************/ +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if message is still pending */ + ARM GAS /tmp/cciHzaOX.s page 93 + + +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 0 message pending Callback */ +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback(hcan); +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo0MsgPendingCallback(hcan); +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 overrun interrupt management *****************************/ +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Rx Fifo 1 overrun error */ +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV1; +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO1 Overrun Flag */ +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 full interrupt management ********************************/ +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FULL1) != 0U) +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear FIFO 1 full Flag */ +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 full Callback */ +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1FullCallback(hcan); +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo1FullCallback(hcan); +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 message pending interrupt management *********************/ +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check if message is still pending */ +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Receive FIFO 1 message pending Callback */ +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback(hcan); +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ + ARM GAS /tmp/cciHzaOX.s page 94 + + +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_RxFifo1MsgPendingCallback(hcan); +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep interrupt management *********************************************/ +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_SLAKI) != 0U) +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear Sleep interrupt Flag */ +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep Callback */ +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->SleepCallback(hcan); +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_SleepCallback(hcan); +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* WakeUp interrupt management *********************************************/ +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_WAKEUP) != 0U) +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_WKUI) != 0U) +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear WakeUp Flag */ +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* WakeUp Callback */ +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback(hcan); +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_WakeUpFromRxMsgCallback(hcan); +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Error interrupts management *********************************************/ +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((interrupts & CAN_IT_ERROR) != 0U) +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((msrflags & CAN_MSR_ERRI) != 0U) +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Error Warning Flag */ +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Error Warning */ +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EWG; +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Warning Flag as read-only */ +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + ARM GAS /tmp/cciHzaOX.s page 95 + + +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Error Passive Flag */ +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Error Passive */ +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EPV; +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Passive Flag as read-only */ +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Bus-off Flag */ +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_BUSOFF) != 0U) && +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bus-Off */ +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BOF; +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* No need for clear of Error Bus-Off as read-only */ +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check Last Error Code Flag */ +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** switch (esrflags & CAN_ESR_LEC) +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_0): +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Stuff error */ +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_STF; +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1): +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Form error */ +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_FOR; +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Acknowledgement error */ +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_ACK; +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2): +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bit recessive error */ +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BR; +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to Bit Dominant error */ +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BD; +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Set CAN error code to CRC error */ +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_CRC; +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default: +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear Last error code Flag */ +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); + ARM GAS /tmp/cciHzaOX.s page 96 + + +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Clear ERRI Flag */ +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call the Error call Back in case of Errors */ +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if (errorcode != HAL_CAN_ERROR_NONE) +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code in handle */ +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= errorcode; +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call Error callback function */ +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call registered callback*/ +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCallback(hcan); +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #else +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Call weak (surcharged) callback */ +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_ErrorCallback(hcan); +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group5 Callback functions +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN Callback functions +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Callback functions ##### +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This subsection provides the following callback functions: +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox0CompleteCallback +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox1CompleteCallback +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox2CompleteCallback +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox0AbortCallback +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox1AbortCallback +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_TxMailbox2AbortCallback +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo0MsgPendingCallback +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo0FullCallback +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo1MsgPendingCallback +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_RxFifo1FullCallback +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_SleepCallback +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_WakeUpFromRxMsgCallback +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ErrorCallback +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 0 complete callback. + ARM GAS /tmp/cciHzaOX.s page 97 + + +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2089 .loc 1 2094 1 is_stmt 1 view -0 + 2090 .cfi_startproc + 2091 @ args = 0, pretend = 0, frame = 0 + 2092 @ frame_needed = 0, uses_anonymous_args = 0 + 2093 @ link register save eliminated. +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2094 .loc 1 2096 3 view .LVU705 +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2095 .loc 1 2102 1 is_stmt 0 view .LVU706 + 2096 0000 7047 bx lr + 2097 .cfi_endproc + 2098 .LFE150: + 2100 .section .text.HAL_CAN_TxMailbox1CompleteCallback,"ax",%progbits + 2101 .align 1 + 2102 .weak HAL_CAN_TxMailbox1CompleteCallback + 2103 .syntax unified + 2104 .thumb + 2105 .thumb_func + 2107 HAL_CAN_TxMailbox1CompleteCallback: + 2108 .LVL173: + 2109 .LFB151: +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 1 complete callback. +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2110 .loc 1 2111 1 is_stmt 1 view -0 + 2111 .cfi_startproc + 2112 @ args = 0, pretend = 0, frame = 0 + 2113 @ frame_needed = 0, uses_anonymous_args = 0 + 2114 @ link register save eliminated. +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2115 .loc 1 2113 3 view .LVU708 +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2116 .loc 1 2119 1 is_stmt 0 view .LVU709 + ARM GAS /tmp/cciHzaOX.s page 98 + + + 2117 0000 7047 bx lr + 2118 .cfi_endproc + 2119 .LFE151: + 2121 .section .text.HAL_CAN_TxMailbox2CompleteCallback,"ax",%progbits + 2122 .align 1 + 2123 .weak HAL_CAN_TxMailbox2CompleteCallback + 2124 .syntax unified + 2125 .thumb + 2126 .thumb_func + 2128 HAL_CAN_TxMailbox2CompleteCallback: + 2129 .LVL174: + 2130 .LFB152: +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 2 complete callback. +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2131 .loc 1 2128 1 is_stmt 1 view -0 + 2132 .cfi_startproc + 2133 @ args = 0, pretend = 0, frame = 0 + 2134 @ frame_needed = 0, uses_anonymous_args = 0 + 2135 @ link register save eliminated. +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2136 .loc 1 2130 3 view .LVU711 +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2137 .loc 1 2136 1 is_stmt 0 view .LVU712 + 2138 0000 7047 bx lr + 2139 .cfi_endproc + 2140 .LFE152: + 2142 .section .text.HAL_CAN_TxMailbox0AbortCallback,"ax",%progbits + 2143 .align 1 + 2144 .weak HAL_CAN_TxMailbox0AbortCallback + 2145 .syntax unified + 2146 .thumb + 2147 .thumb_func + 2149 HAL_CAN_TxMailbox0AbortCallback: + 2150 .LVL175: + 2151 .LFB153: +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 0 Cancellation callback. +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + ARM GAS /tmp/cciHzaOX.s page 99 + + + 2152 .loc 1 2145 1 is_stmt 1 view -0 + 2153 .cfi_startproc + 2154 @ args = 0, pretend = 0, frame = 0 + 2155 @ frame_needed = 0, uses_anonymous_args = 0 + 2156 @ link register save eliminated. +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2157 .loc 1 2147 3 view .LVU714 +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox0AbortCallback could be implemented in the +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2158 .loc 1 2153 1 is_stmt 0 view .LVU715 + 2159 0000 7047 bx lr + 2160 .cfi_endproc + 2161 .LFE153: + 2163 .section .text.HAL_CAN_TxMailbox1AbortCallback,"ax",%progbits + 2164 .align 1 + 2165 .weak HAL_CAN_TxMailbox1AbortCallback + 2166 .syntax unified + 2167 .thumb + 2168 .thumb_func + 2170 HAL_CAN_TxMailbox1AbortCallback: + 2171 .LVL176: + 2172 .LFB154: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 1 Cancellation callback. +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2173 .loc 1 2162 1 is_stmt 1 view -0 + 2174 .cfi_startproc + 2175 @ args = 0, pretend = 0, frame = 0 + 2176 @ frame_needed = 0, uses_anonymous_args = 0 + 2177 @ link register save eliminated. +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2178 .loc 1 2164 3 view .LVU717 +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox1AbortCallback could be implemented in the +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2179 .loc 1 2170 1 is_stmt 0 view .LVU718 + 2180 0000 7047 bx lr + 2181 .cfi_endproc + 2182 .LFE154: + 2184 .section .text.HAL_CAN_TxMailbox2AbortCallback,"ax",%progbits + 2185 .align 1 + 2186 .weak HAL_CAN_TxMailbox2AbortCallback + ARM GAS /tmp/cciHzaOX.s page 100 + + + 2187 .syntax unified + 2188 .thumb + 2189 .thumb_func + 2191 HAL_CAN_TxMailbox2AbortCallback: + 2192 .LVL177: + 2193 .LFB155: +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Transmission Mailbox 2 Cancellation callback. +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2194 .loc 1 2179 1 is_stmt 1 view -0 + 2195 .cfi_startproc + 2196 @ args = 0, pretend = 0, frame = 0 + 2197 @ frame_needed = 0, uses_anonymous_args = 0 + 2198 @ link register save eliminated. +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2199 .loc 1 2181 3 view .LVU720 +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_TxMailbox2AbortCallback could be implemented in the +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2200 .loc 1 2187 1 is_stmt 0 view .LVU721 + 2201 0000 7047 bx lr + 2202 .cfi_endproc + 2203 .LFE155: + 2205 .section .text.HAL_CAN_RxFifo0MsgPendingCallback,"ax",%progbits + 2206 .align 1 + 2207 .weak HAL_CAN_RxFifo0MsgPendingCallback + 2208 .syntax unified + 2209 .thumb + 2210 .thumb_func + 2212 HAL_CAN_RxFifo0MsgPendingCallback: + 2213 .LVL178: + 2214 .LFB156: +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 0 message pending callback. +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2215 .loc 1 2196 1 is_stmt 1 view -0 + 2216 .cfi_startproc + 2217 @ args = 0, pretend = 0, frame = 0 + 2218 @ frame_needed = 0, uses_anonymous_args = 0 + 2219 @ link register save eliminated. +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/cciHzaOX.s page 101 + + +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2220 .loc 1 2198 3 view .LVU723 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2221 .loc 1 2204 1 is_stmt 0 view .LVU724 + 2222 0000 7047 bx lr + 2223 .cfi_endproc + 2224 .LFE156: + 2226 .section .text.HAL_CAN_RxFifo0FullCallback,"ax",%progbits + 2227 .align 1 + 2228 .weak HAL_CAN_RxFifo0FullCallback + 2229 .syntax unified + 2230 .thumb + 2231 .thumb_func + 2233 HAL_CAN_RxFifo0FullCallback: + 2234 .LVL179: + 2235 .LFB157: +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 0 full callback. +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2236 .loc 1 2213 1 is_stmt 1 view -0 + 2237 .cfi_startproc + 2238 @ args = 0, pretend = 0, frame = 0 + 2239 @ frame_needed = 0, uses_anonymous_args = 0 + 2240 @ link register save eliminated. +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2241 .loc 1 2215 3 view .LVU726 +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo0FullCallback could be implemented in the user +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** file +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2242 .loc 1 2221 1 is_stmt 0 view .LVU727 + 2243 0000 7047 bx lr + 2244 .cfi_endproc + 2245 .LFE157: + 2247 .section .text.HAL_CAN_RxFifo1MsgPendingCallback,"ax",%progbits + 2248 .align 1 + 2249 .weak HAL_CAN_RxFifo1MsgPendingCallback + 2250 .syntax unified + 2251 .thumb + 2252 .thumb_func + 2254 HAL_CAN_RxFifo1MsgPendingCallback: + 2255 .LVL180: + 2256 .LFB158: + ARM GAS /tmp/cciHzaOX.s page 102 + + +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 1 message pending callback. +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2257 .loc 1 2230 1 is_stmt 1 view -0 + 2258 .cfi_startproc + 2259 @ args = 0, pretend = 0, frame = 0 + 2260 @ frame_needed = 0, uses_anonymous_args = 0 + 2261 @ link register save eliminated. +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2262 .loc 1 2232 3 view .LVU729 +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2263 .loc 1 2238 1 is_stmt 0 view .LVU730 + 2264 0000 7047 bx lr + 2265 .cfi_endproc + 2266 .LFE158: + 2268 .section .text.HAL_CAN_RxFifo1FullCallback,"ax",%progbits + 2269 .align 1 + 2270 .weak HAL_CAN_RxFifo1FullCallback + 2271 .syntax unified + 2272 .thumb + 2273 .thumb_func + 2275 HAL_CAN_RxFifo1FullCallback: + 2276 .LVL181: + 2277 .LFB159: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Rx FIFO 1 full callback. +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2278 .loc 1 2247 1 is_stmt 1 view -0 + 2279 .cfi_startproc + 2280 @ args = 0, pretend = 0, frame = 0 + 2281 @ frame_needed = 0, uses_anonymous_args = 0 + 2282 @ link register save eliminated. +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2283 .loc 1 2249 3 view .LVU732 +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_RxFifo1FullCallback could be implemented in the user +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** file + ARM GAS /tmp/cciHzaOX.s page 103 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2284 .loc 1 2255 1 is_stmt 0 view .LVU733 + 2285 0000 7047 bx lr + 2286 .cfi_endproc + 2287 .LFE159: + 2289 .section .text.HAL_CAN_SleepCallback,"ax",%progbits + 2290 .align 1 + 2291 .weak HAL_CAN_SleepCallback + 2292 .syntax unified + 2293 .thumb + 2294 .thumb_func + 2296 HAL_CAN_SleepCallback: + 2297 .LVL182: + 2298 .LFB160: +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Sleep callback. +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2299 .loc 1 2264 1 is_stmt 1 view -0 + 2300 .cfi_startproc + 2301 @ args = 0, pretend = 0, frame = 0 + 2302 @ frame_needed = 0, uses_anonymous_args = 0 + 2303 @ link register save eliminated. +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2304 .loc 1 2266 3 view .LVU735 +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_SleepCallback could be implemented in the user file +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2305 .loc 1 2271 1 is_stmt 0 view .LVU736 + 2306 0000 7047 bx lr + 2307 .cfi_endproc + 2308 .LFE160: + 2310 .section .text.HAL_CAN_WakeUpFromRxMsgCallback,"ax",%progbits + 2311 .align 1 + 2312 .weak HAL_CAN_WakeUpFromRxMsgCallback + 2313 .syntax unified + 2314 .thumb + 2315 .thumb_func + 2317 HAL_CAN_WakeUpFromRxMsgCallback: + 2318 .LVL183: + 2319 .LFB161: +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief WakeUp from Rx message callback. +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ + ARM GAS /tmp/cciHzaOX.s page 104 + + +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2320 .loc 1 2280 1 is_stmt 1 view -0 + 2321 .cfi_startproc + 2322 @ args = 0, pretend = 0, frame = 0 + 2323 @ frame_needed = 0, uses_anonymous_args = 0 + 2324 @ link register save eliminated. +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2325 .loc 1 2282 3 view .LVU738 +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** user file +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2326 .loc 1 2288 1 is_stmt 0 view .LVU739 + 2327 0000 7047 bx lr + 2328 .cfi_endproc + 2329 .LFE161: + 2331 .section .text.HAL_CAN_ErrorCallback,"ax",%progbits + 2332 .align 1 + 2333 .weak HAL_CAN_ErrorCallback + 2334 .syntax unified + 2335 .thumb + 2336 .thumb_func + 2338 HAL_CAN_ErrorCallback: + 2339 .LVL184: + 2340 .LFB162: +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Error CAN callback. +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval None +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2341 .loc 1 2297 1 is_stmt 1 view -0 + 2342 .cfi_startproc + 2343 @ args = 0, pretend = 0, frame = 0 + 2344 @ frame_needed = 0, uses_anonymous_args = 0 + 2345 @ link register save eliminated. +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** UNUSED(hcan); + 2346 .loc 1 2299 3 view .LVU741 +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** the HAL_CAN_ErrorCallback could be implemented in the user file +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2347 .loc 1 2304 1 is_stmt 0 view .LVU742 + 2348 0000 7047 bx lr + 2349 .cfi_endproc + 2350 .LFE162: + 2352 .section .text.HAL_CAN_IRQHandler,"ax",%progbits + 2353 .align 1 + ARM GAS /tmp/cciHzaOX.s page 105 + + + 2354 .global HAL_CAN_IRQHandler + 2355 .syntax unified + 2356 .thumb + 2357 .thumb_func + 2359 HAL_CAN_IRQHandler: + 2360 .LVL185: + 2361 .LFB149: +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; + 2362 .loc 1 1683 1 is_stmt 1 view -0 + 2363 .cfi_startproc + 2364 @ args = 0, pretend = 0, frame = 0 + 2365 @ frame_needed = 0, uses_anonymous_args = 0 +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; + 2366 .loc 1 1683 1 is_stmt 0 view .LVU744 + 2367 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2368 .cfi_def_cfa_offset 40 + 2369 .cfi_offset 3, -40 + 2370 .cfi_offset 4, -36 + 2371 .cfi_offset 5, -32 + 2372 .cfi_offset 6, -28 + 2373 .cfi_offset 7, -24 + 2374 .cfi_offset 8, -20 + 2375 .cfi_offset 9, -16 + 2376 .cfi_offset 10, -12 + 2377 .cfi_offset 11, -8 + 2378 .cfi_offset 14, -4 + 2379 0004 0546 mov r5, r0 +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); + 2380 .loc 1 1684 3 is_stmt 1 view .LVU745 + 2381 .LVL186: +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2382 .loc 1 1685 3 view .LVU746 +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2383 .loc 1 1685 25 is_stmt 0 view .LVU747 + 2384 0006 0368 ldr r3, [r0] +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2385 .loc 1 1685 12 view .LVU748 + 2386 0008 5C69 ldr r4, [r3, #20] + 2387 .LVL187: +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); + 2388 .loc 1 1686 3 is_stmt 1 view .LVU749 +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); + 2389 .loc 1 1686 12 is_stmt 0 view .LVU750 + 2390 000a D3F80480 ldr r8, [r3, #4] + 2391 .LVL188: +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); + 2392 .loc 1 1687 3 is_stmt 1 view .LVU751 +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); + 2393 .loc 1 1687 12 is_stmt 0 view .LVU752 + 2394 000e 9F68 ldr r7, [r3, #8] + 2395 .LVL189: +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2396 .loc 1 1688 3 is_stmt 1 view .LVU753 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2397 .loc 1 1688 12 is_stmt 0 view .LVU754 + 2398 0010 D3F80CA0 ldr r10, [r3, #12] + 2399 .LVL190: + ARM GAS /tmp/cciHzaOX.s page 106 + + +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2400 .loc 1 1689 3 is_stmt 1 view .LVU755 +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2401 .loc 1 1689 12 is_stmt 0 view .LVU756 + 2402 0014 D3F81090 ldr r9, [r3, #16] + 2403 .LVL191: +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2404 .loc 1 1690 3 is_stmt 1 view .LVU757 +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2405 .loc 1 1690 12 is_stmt 0 view .LVU758 + 2406 0018 D3F818B0 ldr fp, [r3, #24] + 2407 .LVL192: +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2408 .loc 1 1693 3 is_stmt 1 view .LVU759 +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2409 .loc 1 1693 6 is_stmt 0 view .LVU760 + 2410 001c 14F00106 ands r6, r4, #1 + 2411 0020 3BD0 beq .L169 +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2412 .loc 1 1696 5 is_stmt 1 view .LVU761 +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2413 .loc 1 1696 8 is_stmt 0 view .LVU762 + 2414 0022 17F00106 ands r6, r7, #1 + 2415 0026 16D0 beq .L170 +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2416 .loc 1 1699 7 is_stmt 1 view .LVU763 + 2417 0028 0122 movs r2, #1 + 2418 002a 9A60 str r2, [r3, #8] +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2419 .loc 1 1701 7 view .LVU764 +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2420 .loc 1 1701 10 is_stmt 0 view .LVU765 + 2421 002c 17F0020F tst r7, #2 + 2422 0030 08D1 bne .L204 +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2423 .loc 1 1714 9 is_stmt 1 view .LVU766 +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2424 .loc 1 1714 12 is_stmt 0 view .LVU767 + 2425 0032 17F0040F tst r7, #4 + 2426 0036 0CD1 bne .L201 +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2427 .loc 1 1719 14 is_stmt 1 view .LVU768 +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2428 .loc 1 1719 17 is_stmt 0 view .LVU769 + 2429 0038 17F00806 ands r6, r7, #8 + 2430 003c 06D0 beq .L205 +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2431 .loc 1 1722 21 view .LVU770 + 2432 003e 4FF48056 mov r6, #4096 + 2433 0042 08E0 b .L170 + 2434 .L204: +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2435 .loc 1 1709 9 is_stmt 1 view .LVU771 + 2436 0044 FFF7FEFF bl HAL_CAN_TxMailbox0CompleteCallback + 2437 .LVL193: +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); + 2438 .loc 1 1684 12 is_stmt 0 view .LVU772 + ARM GAS /tmp/cciHzaOX.s page 107 + + + 2439 0048 0026 movs r6, #0 + 2440 004a 04E0 b .L170 + 2441 .LVL194: + 2442 .L205: +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2443 .loc 1 1732 11 is_stmt 1 view .LVU773 + 2444 004c FFF7FEFF bl HAL_CAN_TxMailbox0AbortCallback + 2445 .LVL195: +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2446 .loc 1 1732 11 is_stmt 0 view .LVU774 + 2447 0050 01E0 b .L170 + 2448 .LVL196: + 2449 .L201: +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2450 .loc 1 1717 21 view .LVU775 + 2451 0052 4FF40066 mov r6, #2048 + 2452 .LVL197: + 2453 .L170: +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2454 .loc 1 1739 5 is_stmt 1 view .LVU776 +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2455 .loc 1 1739 8 is_stmt 0 view .LVU777 + 2456 0056 17F4807F tst r7, #256 + 2457 005a 0DD0 beq .L172 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2458 .loc 1 1742 7 is_stmt 1 view .LVU778 + 2459 005c 2B68 ldr r3, [r5] + 2460 005e 4FF48072 mov r2, #256 + 2461 0062 9A60 str r2, [r3, #8] +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2462 .loc 1 1744 7 view .LVU779 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2463 .loc 1 1744 10 is_stmt 0 view .LVU780 + 2464 0064 17F4007F tst r7, #512 + 2465 0068 40F09680 bne .L206 +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2466 .loc 1 1757 9 is_stmt 1 view .LVU781 +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2467 .loc 1 1757 12 is_stmt 0 view .LVU782 + 2468 006c 17F4806F tst r7, #1024 + 2469 0070 00F09680 beq .L174 +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2470 .loc 1 1760 11 is_stmt 1 view .LVU783 +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2471 .loc 1 1760 21 is_stmt 0 view .LVU784 + 2472 0074 46F40056 orr r6, r6, #8192 + 2473 .LVL198: + 2474 .L172: +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2475 .loc 1 1782 5 is_stmt 1 view .LVU785 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2476 .loc 1 1782 8 is_stmt 0 view .LVU786 + 2477 0078 17F4803F tst r7, #65536 + 2478 007c 0DD0 beq .L169 +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2479 .loc 1 1785 7 is_stmt 1 view .LVU787 + 2480 007e 2B68 ldr r3, [r5] + ARM GAS /tmp/cciHzaOX.s page 108 + + + 2481 0080 4FF48032 mov r2, #65536 + 2482 0084 9A60 str r2, [r3, #8] +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2483 .loc 1 1787 7 view .LVU788 +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2484 .loc 1 1787 10 is_stmt 0 view .LVU789 + 2485 0086 17F4003F tst r7, #131072 + 2486 008a 40F09380 bne .L207 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2487 .loc 1 1800 9 is_stmt 1 view .LVU790 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2488 .loc 1 1800 12 is_stmt 0 view .LVU791 + 2489 008e 17F4802F tst r7, #262144 + 2490 0092 00F09380 beq .L177 +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2491 .loc 1 1803 11 is_stmt 1 view .LVU792 +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2492 .loc 1 1803 21 is_stmt 0 view .LVU793 + 2493 0096 46F40046 orr r6, r6, #32768 + 2494 .LVL199: + 2495 .L169: +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2496 .loc 1 1826 3 is_stmt 1 view .LVU794 +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2497 .loc 1 1826 6 is_stmt 0 view .LVU795 + 2498 009a 14F0080F tst r4, #8 + 2499 009e 07D0 beq .L179 +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2500 .loc 1 1828 5 is_stmt 1 view .LVU796 +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2501 .loc 1 1828 8 is_stmt 0 view .LVU797 + 2502 00a0 1AF0100F tst r10, #16 + 2503 00a4 04D0 beq .L179 +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2504 .loc 1 1831 7 is_stmt 1 view .LVU798 +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2505 .loc 1 1831 17 is_stmt 0 view .LVU799 + 2506 00a6 46F40076 orr r6, r6, #512 + 2507 .LVL200: +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2508 .loc 1 1834 7 is_stmt 1 view .LVU800 + 2509 00aa 2B68 ldr r3, [r5] + 2510 00ac 1022 movs r2, #16 + 2511 00ae DA60 str r2, [r3, #12] + 2512 .L179: +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2513 .loc 1 1839 3 view .LVU801 +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2514 .loc 1 1839 6 is_stmt 0 view .LVU802 + 2515 00b0 14F0040F tst r4, #4 + 2516 00b4 03D0 beq .L180 +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2517 .loc 1 1841 5 is_stmt 1 view .LVU803 +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2518 .loc 1 1841 8 is_stmt 0 view .LVU804 + 2519 00b6 1AF0080F tst r10, #8 + 2520 00ba 40F08980 bne .L208 + ARM GAS /tmp/cciHzaOX.s page 109 + + + 2521 .L180: +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2522 .loc 1 1858 3 is_stmt 1 view .LVU805 +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2523 .loc 1 1858 6 is_stmt 0 view .LVU806 + 2524 00be 14F0020F tst r4, #2 + 2525 00c2 05D0 beq .L181 +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2526 .loc 1 1861 5 is_stmt 1 view .LVU807 +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2527 .loc 1 1861 14 is_stmt 0 view .LVU808 + 2528 00c4 2B68 ldr r3, [r5] +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2529 .loc 1 1861 24 view .LVU809 + 2530 00c6 DB68 ldr r3, [r3, #12] +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2531 .loc 1 1861 8 view .LVU810 + 2532 00c8 13F0030F tst r3, #3 + 2533 00cc 40F08780 bne .L209 + 2534 .L181: +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2535 .loc 1 1875 3 is_stmt 1 view .LVU811 +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2536 .loc 1 1875 6 is_stmt 0 view .LVU812 + 2537 00d0 14F0400F tst r4, #64 + 2538 00d4 07D0 beq .L182 +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2539 .loc 1 1877 5 is_stmt 1 view .LVU813 +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2540 .loc 1 1877 8 is_stmt 0 view .LVU814 + 2541 00d6 19F0100F tst r9, #16 + 2542 00da 04D0 beq .L182 +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2543 .loc 1 1880 7 is_stmt 1 view .LVU815 +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2544 .loc 1 1880 17 is_stmt 0 view .LVU816 + 2545 00dc 46F48066 orr r6, r6, #1024 + 2546 .LVL201: +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2547 .loc 1 1883 7 is_stmt 1 view .LVU817 + 2548 00e0 2B68 ldr r3, [r5] + 2549 00e2 1022 movs r2, #16 + 2550 00e4 1A61 str r2, [r3, #16] + 2551 .L182: +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2552 .loc 1 1888 3 view .LVU818 +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2553 .loc 1 1888 6 is_stmt 0 view .LVU819 + 2554 00e6 14F0200F tst r4, #32 + 2555 00ea 02D0 beq .L183 +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2556 .loc 1 1890 5 is_stmt 1 view .LVU820 +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2557 .loc 1 1890 8 is_stmt 0 view .LVU821 + 2558 00ec 19F0080F tst r9, #8 + 2559 00f0 79D1 bne .L210 + 2560 .L183: + ARM GAS /tmp/cciHzaOX.s page 110 + + +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2561 .loc 1 1907 3 is_stmt 1 view .LVU822 +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2562 .loc 1 1907 6 is_stmt 0 view .LVU823 + 2563 00f2 14F0100F tst r4, #16 + 2564 00f6 04D0 beq .L184 +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2565 .loc 1 1910 5 is_stmt 1 view .LVU824 +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2566 .loc 1 1910 14 is_stmt 0 view .LVU825 + 2567 00f8 2B68 ldr r3, [r5] +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2568 .loc 1 1910 24 view .LVU826 + 2569 00fa 1B69 ldr r3, [r3, #16] +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2570 .loc 1 1910 8 view .LVU827 + 2571 00fc 13F0030F tst r3, #3 + 2572 0100 78D1 bne .L211 + 2573 .L184: +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2574 .loc 1 1924 3 is_stmt 1 view .LVU828 +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2575 .loc 1 1924 6 is_stmt 0 view .LVU829 + 2576 0102 14F4003F tst r4, #131072 + 2577 0106 02D0 beq .L185 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2578 .loc 1 1926 5 is_stmt 1 view .LVU830 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2579 .loc 1 1926 8 is_stmt 0 view .LVU831 + 2580 0108 18F0100F tst r8, #16 + 2581 010c 76D1 bne .L212 + 2582 .L185: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2583 .loc 1 1943 3 is_stmt 1 view .LVU832 +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2584 .loc 1 1943 6 is_stmt 0 view .LVU833 + 2585 010e 14F4803F tst r4, #65536 + 2586 0112 02D0 beq .L186 +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2587 .loc 1 1945 5 is_stmt 1 view .LVU834 +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2588 .loc 1 1945 8 is_stmt 0 view .LVU835 + 2589 0114 18F0080F tst r8, #8 + 2590 0118 77D1 bne .L213 + 2591 .L186: +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2592 .loc 1 1962 3 is_stmt 1 view .LVU836 +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2593 .loc 1 1962 6 is_stmt 0 view .LVU837 + 2594 011a 14F4004F tst r4, #32768 + 2595 011e 37D0 beq .L187 +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2596 .loc 1 1964 5 is_stmt 1 view .LVU838 +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2597 .loc 1 1964 8 is_stmt 0 view .LVU839 + 2598 0120 18F0040F tst r8, #4 + 2599 0124 31D0 beq .L188 + ARM GAS /tmp/cciHzaOX.s page 111 + + +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2600 .loc 1 1967 7 is_stmt 1 view .LVU840 +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2601 .loc 1 1967 10 is_stmt 0 view .LVU841 + 2602 0126 14F4807F tst r4, #256 + 2603 012a 04D0 beq .L189 +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2604 .loc 1 1967 55 discriminator 1 view .LVU842 + 2605 012c 1BF0010F tst fp, #1 + 2606 0130 01D0 beq .L189 +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2607 .loc 1 1971 9 is_stmt 1 view .LVU843 +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2608 .loc 1 1971 19 is_stmt 0 view .LVU844 + 2609 0132 46F00106 orr r6, r6, #1 + 2610 .LVL202: + 2611 .L189: +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2612 .loc 1 1977 7 is_stmt 1 view .LVU845 +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2613 .loc 1 1977 10 is_stmt 0 view .LVU846 + 2614 0136 14F4007F tst r4, #512 + 2615 013a 04D0 beq .L190 +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2616 .loc 1 1977 55 discriminator 1 view .LVU847 + 2617 013c 1BF0020F tst fp, #2 + 2618 0140 01D0 beq .L190 +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2619 .loc 1 1981 9 is_stmt 1 view .LVU848 +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2620 .loc 1 1981 19 is_stmt 0 view .LVU849 + 2621 0142 46F00206 orr r6, r6, #2 + 2622 .LVL203: + 2623 .L190: +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2624 .loc 1 1987 7 is_stmt 1 view .LVU850 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2625 .loc 1 1987 10 is_stmt 0 view .LVU851 + 2626 0146 14F4806F tst r4, #1024 + 2627 014a 04D0 beq .L191 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2628 .loc 1 1987 48 discriminator 1 view .LVU852 + 2629 014c 1BF0040F tst fp, #4 + 2630 0150 01D0 beq .L191 +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2631 .loc 1 1991 9 is_stmt 1 view .LVU853 +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2632 .loc 1 1991 19 is_stmt 0 view .LVU854 + 2633 0152 46F00406 orr r6, r6, #4 + 2634 .LVL204: + 2635 .L191: +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2636 .loc 1 1997 7 is_stmt 1 view .LVU855 +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2637 .loc 1 1997 10 is_stmt 0 view .LVU856 + 2638 0156 14F4006F tst r4, #2048 + 2639 015a 16D0 beq .L188 + ARM GAS /tmp/cciHzaOX.s page 112 + + +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2640 .loc 1 1997 57 discriminator 1 view .LVU857 + 2641 015c 1BF0700B ands fp, fp, #112 + 2642 .LVL205: +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2643 .loc 1 1997 57 discriminator 1 view .LVU858 + 2644 0160 13D0 beq .L188 +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2645 .loc 1 2000 9 is_stmt 1 view .LVU859 + 2646 0162 BBF1400F cmp fp, #64 + 2647 0166 66D0 beq .L192 + 2648 0168 56D8 bhi .L193 + 2649 016a BBF1200F cmp fp, #32 + 2650 016e 5CD0 beq .L194 + 2651 0170 BBF1300F cmp fp, #48 + 2652 0174 5CD0 beq .L195 + 2653 0176 BBF1100F cmp fp, #16 + 2654 017a 01D1 bne .L197 +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2655 .loc 1 2004 13 view .LVU860 +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2656 .loc 1 2004 23 is_stmt 0 view .LVU861 + 2657 017c 46F00806 orr r6, r6, #8 + 2658 .LVL206: +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1): + 2659 .loc 1 2005 13 is_stmt 1 view .LVU862 + 2660 .L197: +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2661 .loc 1 2031 9 view .LVU863 + 2662 0180 2A68 ldr r2, [r5] + 2663 0182 9369 ldr r3, [r2, #24] + 2664 0184 23F07003 bic r3, r3, #112 + 2665 0188 9361 str r3, [r2, #24] + 2666 .L188: +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2667 .loc 1 2036 5 view .LVU864 + 2668 018a 2B68 ldr r3, [r5] + 2669 018c 0422 movs r2, #4 + 2670 018e 5A60 str r2, [r3, #4] + 2671 .L187: +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2672 .loc 1 2040 3 view .LVU865 +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2673 .loc 1 2040 6 is_stmt 0 view .LVU866 + 2674 0190 002E cmp r6, #0 + 2675 0192 56D1 bne .L214 + 2676 .L168: +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2677 .loc 1 2054 1 view .LVU867 + 2678 0194 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2679 .LVL207: + 2680 .L206: +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2681 .loc 1 1752 9 is_stmt 1 view .LVU868 + 2682 0198 2846 mov r0, r5 + 2683 019a FFF7FEFF bl HAL_CAN_TxMailbox1CompleteCallback + 2684 .LVL208: + ARM GAS /tmp/cciHzaOX.s page 113 + + + 2685 019e 6BE7 b .L172 + 2686 .L174: +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2687 .loc 1 1762 14 view .LVU869 +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2688 .loc 1 1762 17 is_stmt 0 view .LVU870 + 2689 01a0 17F4006F tst r7, #2048 + 2690 01a4 02D0 beq .L175 +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2691 .loc 1 1765 11 is_stmt 1 view .LVU871 +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2692 .loc 1 1765 21 is_stmt 0 view .LVU872 + 2693 01a6 46F48046 orr r6, r6, #16384 + 2694 .LVL209: +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2695 .loc 1 1765 21 view .LVU873 + 2696 01aa 65E7 b .L172 + 2697 .L175: +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2698 .loc 1 1775 11 is_stmt 1 view .LVU874 + 2699 01ac 2846 mov r0, r5 + 2700 01ae FFF7FEFF bl HAL_CAN_TxMailbox1AbortCallback + 2701 .LVL210: + 2702 01b2 61E7 b .L172 + 2703 .L207: +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2704 .loc 1 1795 9 view .LVU875 + 2705 01b4 2846 mov r0, r5 + 2706 01b6 FFF7FEFF bl HAL_CAN_TxMailbox2CompleteCallback + 2707 .LVL211: + 2708 01ba 6EE7 b .L169 + 2709 .L177: +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2710 .loc 1 1805 14 view .LVU876 +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2711 .loc 1 1805 17 is_stmt 0 view .LVU877 + 2712 01bc 17F4002F tst r7, #524288 + 2713 01c0 02D0 beq .L178 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2714 .loc 1 1808 11 is_stmt 1 view .LVU878 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2715 .loc 1 1808 21 is_stmt 0 view .LVU879 + 2716 01c2 46F48036 orr r6, r6, #65536 + 2717 .LVL212: +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2718 .loc 1 1808 21 view .LVU880 + 2719 01c6 68E7 b .L169 + 2720 .L178: +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2721 .loc 1 1818 11 is_stmt 1 view .LVU881 + 2722 01c8 2846 mov r0, r5 + 2723 01ca FFF7FEFF bl HAL_CAN_TxMailbox2AbortCallback + 2724 .LVL213: + 2725 01ce 64E7 b .L169 + 2726 .L208: +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2727 .loc 1 1844 7 view .LVU882 + ARM GAS /tmp/cciHzaOX.s page 114 + + + 2728 01d0 2B68 ldr r3, [r5] + 2729 01d2 0822 movs r2, #8 + 2730 01d4 DA60 str r2, [r3, #12] +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2731 .loc 1 1852 7 view .LVU883 + 2732 01d6 2846 mov r0, r5 + 2733 01d8 FFF7FEFF bl HAL_CAN_RxFifo0FullCallback + 2734 .LVL214: + 2735 01dc 6FE7 b .L180 + 2736 .L209: +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2737 .loc 1 1869 7 view .LVU884 + 2738 01de 2846 mov r0, r5 + 2739 01e0 FFF7FEFF bl HAL_CAN_RxFifo0MsgPendingCallback + 2740 .LVL215: + 2741 01e4 74E7 b .L181 + 2742 .L210: +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2743 .loc 1 1893 7 view .LVU885 + 2744 01e6 2B68 ldr r3, [r5] + 2745 01e8 0822 movs r2, #8 + 2746 01ea 1A61 str r2, [r3, #16] +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2747 .loc 1 1901 7 view .LVU886 + 2748 01ec 2846 mov r0, r5 + 2749 01ee FFF7FEFF bl HAL_CAN_RxFifo1FullCallback + 2750 .LVL216: + 2751 01f2 7EE7 b .L183 + 2752 .L211: +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2753 .loc 1 1918 7 view .LVU887 + 2754 01f4 2846 mov r0, r5 + 2755 01f6 FFF7FEFF bl HAL_CAN_RxFifo1MsgPendingCallback + 2756 .LVL217: + 2757 01fa 82E7 b .L184 + 2758 .L212: +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2759 .loc 1 1929 7 view .LVU888 + 2760 01fc 2B68 ldr r3, [r5] + 2761 01fe 1022 movs r2, #16 + 2762 0200 5A60 str r2, [r3, #4] +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2763 .loc 1 1937 7 view .LVU889 + 2764 0202 2846 mov r0, r5 + 2765 0204 FFF7FEFF bl HAL_CAN_SleepCallback + 2766 .LVL218: + 2767 0208 81E7 b .L185 + 2768 .L213: +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2769 .loc 1 1948 7 view .LVU890 + 2770 020a 2B68 ldr r3, [r5] + 2771 020c 0822 movs r2, #8 + 2772 020e 5A60 str r2, [r3, #4] +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2773 .loc 1 1956 7 view .LVU891 + 2774 0210 2846 mov r0, r5 + 2775 0212 FFF7FEFF bl HAL_CAN_WakeUpFromRxMsgCallback + ARM GAS /tmp/cciHzaOX.s page 115 + + + 2776 .LVL219: + 2777 0216 80E7 b .L186 + 2778 .LVL220: + 2779 .L193: +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2780 .loc 1 2000 9 is_stmt 0 view .LVU892 + 2781 0218 BBF1500F cmp fp, #80 + 2782 021c 0ED0 beq .L198 + 2783 021e BBF1600F cmp fp, #96 + 2784 0222 ADD1 bne .L197 +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2785 .loc 1 2024 13 is_stmt 1 view .LVU893 +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2786 .loc 1 2024 23 is_stmt 0 view .LVU894 + 2787 0224 46F48076 orr r6, r6, #256 + 2788 .LVL221: +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** default: + 2789 .loc 1 2025 13 is_stmt 1 view .LVU895 + 2790 0228 AAE7 b .L197 + 2791 .L194: +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2792 .loc 1 2008 13 view .LVU896 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2793 .loc 1 2008 23 is_stmt 0 view .LVU897 + 2794 022a 46F01006 orr r6, r6, #16 + 2795 .LVL222: +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): + 2796 .loc 1 2009 13 is_stmt 1 view .LVU898 + 2797 022e A7E7 b .L197 + 2798 .L195: +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2799 .loc 1 2012 13 view .LVU899 +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2800 .loc 1 2012 23 is_stmt 0 view .LVU900 + 2801 0230 46F02006 orr r6, r6, #32 + 2802 .LVL223: +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2): + 2803 .loc 1 2013 13 is_stmt 1 view .LVU901 + 2804 0234 A4E7 b .L197 + 2805 .L192: +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2806 .loc 1 2016 13 view .LVU902 +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2807 .loc 1 2016 23 is_stmt 0 view .LVU903 + 2808 0236 46F04006 orr r6, r6, #64 + 2809 .LVL224: +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): + 2810 .loc 1 2017 13 is_stmt 1 view .LVU904 + 2811 023a A1E7 b .L197 + 2812 .L198: +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2813 .loc 1 2020 13 view .LVU905 +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** break; + 2814 .loc 1 2020 23 is_stmt 0 view .LVU906 + 2815 023c 46F08006 orr r6, r6, #128 + 2816 .LVL225: +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): + ARM GAS /tmp/cciHzaOX.s page 116 + + + 2817 .loc 1 2021 13 is_stmt 1 view .LVU907 + 2818 0240 9EE7 b .L197 + 2819 .L214: +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2820 .loc 1 2043 5 view .LVU908 +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2821 .loc 1 2043 9 is_stmt 0 view .LVU909 + 2822 0242 6B6A ldr r3, [r5, #36] +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2823 .loc 1 2043 21 view .LVU910 + 2824 0244 3343 orrs r3, r3, r6 + 2825 0246 6B62 str r3, [r5, #36] +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2826 .loc 1 2051 5 is_stmt 1 view .LVU911 + 2827 0248 2846 mov r0, r5 + 2828 024a FFF7FEFF bl HAL_CAN_ErrorCallback + 2829 .LVL226: +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** + 2830 .loc 1 2054 1 is_stmt 0 view .LVU912 + 2831 024e A1E7 b .L168 + 2832 .cfi_endproc + 2833 .LFE149: + 2835 .section .text.HAL_CAN_GetState,"ax",%progbits + 2836 .align 1 + 2837 .global HAL_CAN_GetState + 2838 .syntax unified + 2839 .thumb + 2840 .thumb_func + 2842 HAL_CAN_GetState: + 2843 .LVL227: + 2844 .LFB163: +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @} +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief CAN Peripheral State functions +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @verbatim +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ##### Peripheral State and Error functions ##### +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** ============================================================================== +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** [..] +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** This subsection provides functions allowing to : +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetState() : Return the CAN state. +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_GetError() : Return the CAN error codes if any. +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** @endverbatim +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @{ +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return the CAN state. +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. + ARM GAS /tmp/cciHzaOX.s page 117 + + +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL state +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan) +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2845 .loc 1 2334 1 is_stmt 1 view -0 + 2846 .cfi_startproc + 2847 @ args = 0, pretend = 0, frame = 0 + 2848 @ frame_needed = 0, uses_anonymous_args = 0 + 2849 @ link register save eliminated. + 2850 .loc 1 2334 1 is_stmt 0 view .LVU914 + 2851 0000 0246 mov r2, r0 +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2852 .loc 1 2335 3 is_stmt 1 view .LVU915 + 2853 .loc 1 2335 24 is_stmt 0 view .LVU916 + 2854 0002 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 2855 0006 D8B2 uxtb r0, r3 + 2856 .LVL228: +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2857 .loc 1 2337 3 is_stmt 1 view .LVU917 + 2858 .loc 1 2337 38 is_stmt 0 view .LVU918 + 2859 0008 013B subs r3, r3, #1 + 2860 000a DBB2 uxtb r3, r3 + 2861 .loc 1 2337 6 view .LVU919 + 2862 000c 012B cmp r3, #1 + 2863 000e 00D9 bls .L219 + 2864 .LVL229: + 2865 .L216: +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check sleep mode acknowledge flag */ +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep mode is active */ +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_ACTIVE; +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Check sleep mode request flag */ +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Sleep mode request is pending */ +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_PENDING; +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Neither sleep mode request nor sleep mode acknowledge */ +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2866 .loc 1 2355 5 is_stmt 1 view .LVU920 +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return CAN state */ +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return state; + 2867 .loc 1 2359 3 view .LVU921 +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2868 .loc 1 2360 1 is_stmt 0 view .LVU922 + 2869 0010 7047 bx lr + 2870 .LVL230: + 2871 .L219: + ARM GAS /tmp/cciHzaOX.s page 118 + + +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2872 .loc 1 2341 5 is_stmt 1 view .LVU923 +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2873 .loc 1 2341 14 is_stmt 0 view .LVU924 + 2874 0012 1368 ldr r3, [r2] +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2875 .loc 1 2341 24 view .LVU925 + 2876 0014 5A68 ldr r2, [r3, #4] + 2877 .LVL231: +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2878 .loc 1 2341 8 view .LVU926 + 2879 0016 12F0020F tst r2, #2 + 2880 001a 05D1 bne .L217 +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2881 .loc 1 2347 10 is_stmt 1 view .LVU927 +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2882 .loc 1 2347 29 is_stmt 0 view .LVU928 + 2883 001c 1B68 ldr r3, [r3] +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2884 .loc 1 2347 13 view .LVU929 + 2885 001e 13F0020F tst r3, #2 + 2886 0022 F5D0 beq .L216 +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2887 .loc 1 2350 13 view .LVU930 + 2888 0024 0320 movs r0, #3 + 2889 .LVL232: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2890 .loc 1 2350 13 view .LVU931 + 2891 0026 F3E7 b .L216 + 2892 .LVL233: + 2893 .L217: +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2894 .loc 1 2344 13 view .LVU932 + 2895 0028 0420 movs r0, #4 + 2896 .LVL234: +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2897 .loc 1 2344 13 view .LVU933 + 2898 002a 7047 bx lr + 2899 .cfi_endproc + 2900 .LFE163: + 2902 .section .text.HAL_CAN_GetError,"ax",%progbits + 2903 .align 1 + 2904 .global HAL_CAN_GetError + 2905 .syntax unified + 2906 .thumb + 2907 .thumb_func + 2909 HAL_CAN_GetError: + 2910 .LVL235: + 2911 .LFB164: +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Return the CAN error code. +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval CAN Error Code +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan) + ARM GAS /tmp/cciHzaOX.s page 119 + + +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2912 .loc 1 2369 1 is_stmt 1 view -0 + 2913 .cfi_startproc + 2914 @ args = 0, pretend = 0, frame = 0 + 2915 @ frame_needed = 0, uses_anonymous_args = 0 + 2916 @ link register save eliminated. +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return CAN error code */ +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return hcan->ErrorCode; + 2917 .loc 1 2371 3 view .LVU935 + 2918 .loc 1 2371 14 is_stmt 0 view .LVU936 + 2919 0000 406A ldr r0, [r0, #36] + 2920 .LVL236: +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2921 .loc 1 2372 1 view .LVU937 + 2922 0002 7047 bx lr + 2923 .cfi_endproc + 2924 .LFE164: + 2926 .section .text.HAL_CAN_ResetError,"ax",%progbits + 2927 .align 1 + 2928 .global HAL_CAN_ResetError + 2929 .syntax unified + 2930 .thumb + 2931 .thumb_func + 2933 HAL_CAN_ResetError: + 2934 .LVL237: + 2935 .LFB165: +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /** +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @brief Reset the CAN error code. +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * the configuration information for the specified CAN. +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** * @retval HAL status +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** */ +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { + 2936 .loc 1 2381 1 is_stmt 1 view -0 + 2937 .cfi_startproc + 2938 @ args = 0, pretend = 0, frame = 0 + 2939 @ frame_needed = 0, uses_anonymous_args = 0 + 2940 @ link register save eliminated. +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 2941 .loc 1 2382 3 view .LVU939 +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2942 .loc 1 2383 3 view .LVU940 + 2943 .loc 1 2383 24 is_stmt 0 view .LVU941 + 2944 0000 90F82030 ldrb r3, [r0, #32] @ zero_extendqisi2 + 2945 .LVL238: +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2946 .loc 1 2385 3 is_stmt 1 view .LVU942 + 2947 .loc 1 2385 38 is_stmt 0 view .LVU943 + 2948 0004 013B subs r3, r3, #1 + 2949 .LVL239: + 2950 .loc 1 2385 38 view .LVU944 + 2951 0006 DBB2 uxtb r3, r3 + 2952 .LVL240: + 2953 .loc 1 2385 6 view .LVU945 + ARM GAS /tmp/cciHzaOX.s page 120 + + + 2954 0008 012B cmp r3, #1 + 2955 000a 05D9 bls .L224 +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Reset CAN error code */ +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode = 0U; +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** else +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** { +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Update error code */ +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2956 .loc 1 2394 5 is_stmt 1 view .LVU946 + 2957 .loc 1 2394 9 is_stmt 0 view .LVU947 + 2958 000c 436A ldr r3, [r0, #36] + 2959 .loc 1 2394 21 view .LVU948 + 2960 000e 43F48023 orr r3, r3, #262144 + 2961 0012 4362 str r3, [r0, #36] +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** status = HAL_ERROR; + 2962 .loc 1 2396 5 is_stmt 1 view .LVU949 + 2963 .LVL241: + 2964 .loc 1 2396 12 is_stmt 0 view .LVU950 + 2965 0014 0120 movs r0, #1 + 2966 .LVL242: +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** /* Return the status */ +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** return status; + 2967 .loc 1 2400 3 is_stmt 1 view .LVU951 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2968 .loc 1 2401 1 is_stmt 0 view .LVU952 + 2969 0016 7047 bx lr + 2970 .LVL243: + 2971 .L224: +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2972 .loc 1 2389 5 is_stmt 1 view .LVU953 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** } + 2973 .loc 1 2389 21 is_stmt 0 view .LVU954 + 2974 0018 0023 movs r3, #0 + 2975 001a 4362 str r3, [r0, #36] +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2976 .loc 1 2382 21 view .LVU955 + 2977 001c 1846 mov r0, r3 + 2978 .LVL244: +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2979 .loc 1 2382 21 view .LVU956 + 2980 001e 7047 bx lr + 2981 .cfi_endproc + 2982 .LFE165: + 2984 .text + 2985 .Letext0: + 2986 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 2987 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 2988 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 2989 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 2990 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 2991 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" + ARM GAS /tmp/cciHzaOX.s page 121 + + + 2992 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/cciHzaOX.s page 122 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_can.c + /tmp/cciHzaOX.s:21 .text.HAL_CAN_MspInit:00000000 $t + /tmp/cciHzaOX.s:27 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit + /tmp/cciHzaOX.s:42 .text.HAL_CAN_Init:00000000 $t + /tmp/cciHzaOX.s:48 .text.HAL_CAN_Init:00000000 HAL_CAN_Init + /tmp/cciHzaOX.s:338 .text.HAL_CAN_MspDeInit:00000000 $t + /tmp/cciHzaOX.s:344 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit + /tmp/cciHzaOX.s:359 .text.HAL_CAN_ConfigFilter:00000000 $t + /tmp/cciHzaOX.s:365 .text.HAL_CAN_ConfigFilter:00000000 HAL_CAN_ConfigFilter + /tmp/cciHzaOX.s:579 .text.HAL_CAN_Start:00000000 $t + /tmp/cciHzaOX.s:585 .text.HAL_CAN_Start:00000000 HAL_CAN_Start + /tmp/cciHzaOX.s:684 .text.HAL_CAN_Stop:00000000 $t + /tmp/cciHzaOX.s:690 .text.HAL_CAN_Stop:00000000 HAL_CAN_Stop + /tmp/cciHzaOX.s:790 .text.HAL_CAN_DeInit:00000000 $t + /tmp/cciHzaOX.s:796 .text.HAL_CAN_DeInit:00000000 HAL_CAN_DeInit + /tmp/cciHzaOX.s:850 .text.HAL_CAN_RequestSleep:00000000 $t + /tmp/cciHzaOX.s:856 .text.HAL_CAN_RequestSleep:00000000 HAL_CAN_RequestSleep + /tmp/cciHzaOX.s:907 .text.HAL_CAN_WakeUp:00000000 $t + /tmp/cciHzaOX.s:913 .text.HAL_CAN_WakeUp:00000000 HAL_CAN_WakeUp + /tmp/cciHzaOX.s:1011 .text.HAL_CAN_WakeUp:00000054 $d + /tmp/cciHzaOX.s:1016 .text.HAL_CAN_IsSleepActive:00000000 $t + /tmp/cciHzaOX.s:1022 .text.HAL_CAN_IsSleepActive:00000000 HAL_CAN_IsSleepActive + /tmp/cciHzaOX.s:1073 .text.HAL_CAN_AddTxMessage:00000000 $t + /tmp/cciHzaOX.s:1079 .text.HAL_CAN_AddTxMessage:00000000 HAL_CAN_AddTxMessage + /tmp/cciHzaOX.s:1276 .text.HAL_CAN_AbortTxRequest:00000000 $t + /tmp/cciHzaOX.s:1282 .text.HAL_CAN_AbortTxRequest:00000000 HAL_CAN_AbortTxRequest + /tmp/cciHzaOX.s:1359 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 $t + /tmp/cciHzaOX.s:1365 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 HAL_CAN_GetTxMailboxesFreeLevel + /tmp/cciHzaOX.s:1437 .text.HAL_CAN_IsTxMessagePending:00000000 $t + /tmp/cciHzaOX.s:1443 .text.HAL_CAN_IsTxMessagePending:00000000 HAL_CAN_IsTxMessagePending + /tmp/cciHzaOX.s:1501 .text.HAL_CAN_GetTxTimestamp:00000000 $t + /tmp/cciHzaOX.s:1507 .text.HAL_CAN_GetTxTimestamp:00000000 HAL_CAN_GetTxTimestamp + /tmp/cciHzaOX.s:1581 .text.HAL_CAN_GetRxMessage:00000000 $t + /tmp/cciHzaOX.s:1587 .text.HAL_CAN_GetRxMessage:00000000 HAL_CAN_GetRxMessage + /tmp/cciHzaOX.s:1895 .text.HAL_CAN_GetRxFifoFillLevel:00000000 $t + /tmp/cciHzaOX.s:1901 .text.HAL_CAN_GetRxFifoFillLevel:00000000 HAL_CAN_GetRxFifoFillLevel + /tmp/cciHzaOX.s:1964 .text.HAL_CAN_ActivateNotification:00000000 $t + /tmp/cciHzaOX.s:1970 .text.HAL_CAN_ActivateNotification:00000000 HAL_CAN_ActivateNotification + /tmp/cciHzaOX.s:2022 .text.HAL_CAN_DeactivateNotification:00000000 $t + /tmp/cciHzaOX.s:2028 .text.HAL_CAN_DeactivateNotification:00000000 HAL_CAN_DeactivateNotification + /tmp/cciHzaOX.s:2080 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 $t + /tmp/cciHzaOX.s:2086 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 HAL_CAN_TxMailbox0CompleteCallback + /tmp/cciHzaOX.s:2101 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 $t + /tmp/cciHzaOX.s:2107 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 HAL_CAN_TxMailbox1CompleteCallback + /tmp/cciHzaOX.s:2122 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 $t + /tmp/cciHzaOX.s:2128 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 HAL_CAN_TxMailbox2CompleteCallback + /tmp/cciHzaOX.s:2143 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 $t + /tmp/cciHzaOX.s:2149 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 HAL_CAN_TxMailbox0AbortCallback + /tmp/cciHzaOX.s:2164 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 $t + /tmp/cciHzaOX.s:2170 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 HAL_CAN_TxMailbox1AbortCallback + /tmp/cciHzaOX.s:2185 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 $t + /tmp/cciHzaOX.s:2191 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 HAL_CAN_TxMailbox2AbortCallback + /tmp/cciHzaOX.s:2206 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 $t + /tmp/cciHzaOX.s:2212 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 HAL_CAN_RxFifo0MsgPendingCallback + /tmp/cciHzaOX.s:2227 .text.HAL_CAN_RxFifo0FullCallback:00000000 $t + /tmp/cciHzaOX.s:2233 .text.HAL_CAN_RxFifo0FullCallback:00000000 HAL_CAN_RxFifo0FullCallback + ARM GAS /tmp/cciHzaOX.s page 123 + + + /tmp/cciHzaOX.s:2248 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 $t + /tmp/cciHzaOX.s:2254 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 HAL_CAN_RxFifo1MsgPendingCallback + /tmp/cciHzaOX.s:2269 .text.HAL_CAN_RxFifo1FullCallback:00000000 $t + /tmp/cciHzaOX.s:2275 .text.HAL_CAN_RxFifo1FullCallback:00000000 HAL_CAN_RxFifo1FullCallback + /tmp/cciHzaOX.s:2290 .text.HAL_CAN_SleepCallback:00000000 $t + /tmp/cciHzaOX.s:2296 .text.HAL_CAN_SleepCallback:00000000 HAL_CAN_SleepCallback + /tmp/cciHzaOX.s:2311 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 $t + /tmp/cciHzaOX.s:2317 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 HAL_CAN_WakeUpFromRxMsgCallback + /tmp/cciHzaOX.s:2332 .text.HAL_CAN_ErrorCallback:00000000 $t + /tmp/cciHzaOX.s:2338 .text.HAL_CAN_ErrorCallback:00000000 HAL_CAN_ErrorCallback + /tmp/cciHzaOX.s:2353 .text.HAL_CAN_IRQHandler:00000000 $t + /tmp/cciHzaOX.s:2359 .text.HAL_CAN_IRQHandler:00000000 HAL_CAN_IRQHandler + /tmp/cciHzaOX.s:2836 .text.HAL_CAN_GetState:00000000 $t + /tmp/cciHzaOX.s:2842 .text.HAL_CAN_GetState:00000000 HAL_CAN_GetState + /tmp/cciHzaOX.s:2903 .text.HAL_CAN_GetError:00000000 $t + /tmp/cciHzaOX.s:2909 .text.HAL_CAN_GetError:00000000 HAL_CAN_GetError + /tmp/cciHzaOX.s:2927 .text.HAL_CAN_ResetError:00000000 $t + /tmp/cciHzaOX.s:2933 .text.HAL_CAN_ResetError:00000000 HAL_CAN_ResetError + +UNDEFINED SYMBOLS +HAL_GetTick diff --git a/build/stm32f3xx_hal_can.o b/build/stm32f3xx_hal_can.o new file mode 100644 index 0000000..47e81ab Binary files /dev/null and b/build/stm32f3xx_hal_can.o differ diff --git a/build/stm32f3xx_hal_cortex.d b/build/stm32f3xx_hal_cortex.d new file mode 100644 index 0000000..90e0703 --- /dev/null +++ b/build/stm32f3xx_hal_cortex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_cortex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_cortex.lst b/build/stm32f3xx_hal_cortex.lst new file mode 100644 index 0000000..7f03827 --- /dev/null +++ b/build/stm32f3xx_hal_cortex.lst @@ -0,0 +1,5062 @@ +ARM GAS /tmp/ccGGrCD0.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_cortex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c" + 20 .section .text.__NVIC_DisableIRQ,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 __NVIC_DisableIRQ: + 27 .LVL0: + 28 .LFB106: + 29 .file 2 "Drivers/CMSIS/Include/core_cm4.h" + 1:Drivers/CMSIS/Include/core_cm4.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/core_cm4.h **** * @file core_cm4.h + 3:Drivers/CMSIS/Include/core_cm4.h **** * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File + 4:Drivers/CMSIS/Include/core_cm4.h **** * @version V5.0.8 + 5:Drivers/CMSIS/Include/core_cm4.h **** * @date 04. June 2018 + 6:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/core_cm4.h **** /* + 8:Drivers/CMSIS/Include/core_cm4.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/core_cm4.h **** * + 10:Drivers/CMSIS/Include/core_cm4.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/core_cm4.h **** * + 12:Drivers/CMSIS/Include/core_cm4.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/core_cm4.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/core_cm4.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/core_cm4.h **** * + 16:Drivers/CMSIS/Include/core_cm4.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/core_cm4.h **** * + 18:Drivers/CMSIS/Include/core_cm4.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/core_cm4.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/core_cm4.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/core_cm4.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/core_cm4.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/core_cm4.h **** */ + 24:Drivers/CMSIS/Include/core_cm4.h **** + 25:Drivers/CMSIS/Include/core_cm4.h **** #if defined ( __ICCARM__ ) + 26:Drivers/CMSIS/Include/core_cm4.h **** #pragma system_include /* treat file as system include file for MISRA check */ + 27:Drivers/CMSIS/Include/core_cm4.h **** #elif defined (__clang__) + 28:Drivers/CMSIS/Include/core_cm4.h **** #pragma clang system_header /* treat file as system include file */ + 29:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccGGrCD0.s page 2 + + + 30:Drivers/CMSIS/Include/core_cm4.h **** + 31:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CORE_CM4_H_GENERIC + 32:Drivers/CMSIS/Include/core_cm4.h **** #define __CORE_CM4_H_GENERIC + 33:Drivers/CMSIS/Include/core_cm4.h **** + 34:Drivers/CMSIS/Include/core_cm4.h **** #include + 35:Drivers/CMSIS/Include/core_cm4.h **** + 36:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 37:Drivers/CMSIS/Include/core_cm4.h **** extern "C" { + 38:Drivers/CMSIS/Include/core_cm4.h **** #endif + 39:Drivers/CMSIS/Include/core_cm4.h **** + 40:Drivers/CMSIS/Include/core_cm4.h **** /** + 41:Drivers/CMSIS/Include/core_cm4.h **** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + 42:Drivers/CMSIS/Include/core_cm4.h **** CMSIS violates the following MISRA-C:2004 rules: + 43:Drivers/CMSIS/Include/core_cm4.h **** + 44:Drivers/CMSIS/Include/core_cm4.h **** \li Required Rule 8.5, object/function definition in header file.
+ 45:Drivers/CMSIS/Include/core_cm4.h **** Function definitions in header files are used to allow 'inlining'. + 46:Drivers/CMSIS/Include/core_cm4.h **** + 47:Drivers/CMSIS/Include/core_cm4.h **** \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ 48:Drivers/CMSIS/Include/core_cm4.h **** Unions are used for effective representation of core registers. + 49:Drivers/CMSIS/Include/core_cm4.h **** + 50:Drivers/CMSIS/Include/core_cm4.h **** \li Advisory Rule 19.7, Function-like macro defined.
+ 51:Drivers/CMSIS/Include/core_cm4.h **** Function-like macros are used to allow more efficient code. + 52:Drivers/CMSIS/Include/core_cm4.h **** */ + 53:Drivers/CMSIS/Include/core_cm4.h **** + 54:Drivers/CMSIS/Include/core_cm4.h **** + 55:Drivers/CMSIS/Include/core_cm4.h **** /******************************************************************************* + 56:Drivers/CMSIS/Include/core_cm4.h **** * CMSIS definitions + 57:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ + 58:Drivers/CMSIS/Include/core_cm4.h **** /** + 59:Drivers/CMSIS/Include/core_cm4.h **** \ingroup Cortex_M4 + 60:Drivers/CMSIS/Include/core_cm4.h **** @{ + 61:Drivers/CMSIS/Include/core_cm4.h **** */ + 62:Drivers/CMSIS/Include/core_cm4.h **** + 63:Drivers/CMSIS/Include/core_cm4.h **** #include "cmsis_version.h" + 64:Drivers/CMSIS/Include/core_cm4.h **** + 65:Drivers/CMSIS/Include/core_cm4.h **** /* CMSIS CM4 definitions */ + 66:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] C + 67:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] C + 68:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ + 69:Drivers/CMSIS/Include/core_cm4.h **** __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL + 70:Drivers/CMSIS/Include/core_cm4.h **** + 71:Drivers/CMSIS/Include/core_cm4.h **** #define __CORTEX_M (4U) /*!< Cortex-M Core */ + 72:Drivers/CMSIS/Include/core_cm4.h **** + 73:Drivers/CMSIS/Include/core_cm4.h **** /** __FPU_USED indicates whether an FPU is used or not. + 74:Drivers/CMSIS/Include/core_cm4.h **** For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and fun + 75:Drivers/CMSIS/Include/core_cm4.h **** */ + 76:Drivers/CMSIS/Include/core_cm4.h **** #if defined ( __CC_ARM ) + 77:Drivers/CMSIS/Include/core_cm4.h **** #if defined __TARGET_FPU_VFP + 78:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 79:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 80:Drivers/CMSIS/Include/core_cm4.h **** #else + 81:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 82:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 83:Drivers/CMSIS/Include/core_cm4.h **** #endif + 84:Drivers/CMSIS/Include/core_cm4.h **** #else + 85:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 86:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccGGrCD0.s page 3 + + + 87:Drivers/CMSIS/Include/core_cm4.h **** + 88:Drivers/CMSIS/Include/core_cm4.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + 89:Drivers/CMSIS/Include/core_cm4.h **** #if defined __ARM_PCS_VFP + 90:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 91:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 92:Drivers/CMSIS/Include/core_cm4.h **** #else + 93:Drivers/CMSIS/Include/core_cm4.h **** #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESEN + 94:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 95:Drivers/CMSIS/Include/core_cm4.h **** #endif + 96:Drivers/CMSIS/Include/core_cm4.h **** #else + 97:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 98:Drivers/CMSIS/Include/core_cm4.h **** #endif + 99:Drivers/CMSIS/Include/core_cm4.h **** + 100:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __GNUC__ ) + 101:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__VFP_FP__) && !defined(__SOFTFP__) + 102:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 103:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 104:Drivers/CMSIS/Include/core_cm4.h **** #else + 105:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 106:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 107:Drivers/CMSIS/Include/core_cm4.h **** #endif + 108:Drivers/CMSIS/Include/core_cm4.h **** #else + 109:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 110:Drivers/CMSIS/Include/core_cm4.h **** #endif + 111:Drivers/CMSIS/Include/core_cm4.h **** + 112:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __ICCARM__ ) + 113:Drivers/CMSIS/Include/core_cm4.h **** #if defined __ARMVFP__ + 114:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 115:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 116:Drivers/CMSIS/Include/core_cm4.h **** #else + 117:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 118:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 119:Drivers/CMSIS/Include/core_cm4.h **** #endif + 120:Drivers/CMSIS/Include/core_cm4.h **** #else + 121:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 122:Drivers/CMSIS/Include/core_cm4.h **** #endif + 123:Drivers/CMSIS/Include/core_cm4.h **** + 124:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __TI_ARM__ ) + 125:Drivers/CMSIS/Include/core_cm4.h **** #if defined __TI_VFP_SUPPORT__ + 126:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 127:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 128:Drivers/CMSIS/Include/core_cm4.h **** #else + 129:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 130:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 131:Drivers/CMSIS/Include/core_cm4.h **** #endif + 132:Drivers/CMSIS/Include/core_cm4.h **** #else + 133:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 134:Drivers/CMSIS/Include/core_cm4.h **** #endif + 135:Drivers/CMSIS/Include/core_cm4.h **** + 136:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __TASKING__ ) + 137:Drivers/CMSIS/Include/core_cm4.h **** #if defined __FPU_VFP__ + 138:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 139:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 140:Drivers/CMSIS/Include/core_cm4.h **** #else + 141:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 142:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 143:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccGGrCD0.s page 4 + + + 144:Drivers/CMSIS/Include/core_cm4.h **** #else + 145:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 146:Drivers/CMSIS/Include/core_cm4.h **** #endif + 147:Drivers/CMSIS/Include/core_cm4.h **** + 148:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __CSMC__ ) + 149:Drivers/CMSIS/Include/core_cm4.h **** #if ( __CSMC__ & 0x400U) + 150:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 151:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 152:Drivers/CMSIS/Include/core_cm4.h **** #else + 153:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 154:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 155:Drivers/CMSIS/Include/core_cm4.h **** #endif + 156:Drivers/CMSIS/Include/core_cm4.h **** #else + 157:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 158:Drivers/CMSIS/Include/core_cm4.h **** #endif + 159:Drivers/CMSIS/Include/core_cm4.h **** + 160:Drivers/CMSIS/Include/core_cm4.h **** #endif + 161:Drivers/CMSIS/Include/core_cm4.h **** + 162:Drivers/CMSIS/Include/core_cm4.h **** #include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + 163:Drivers/CMSIS/Include/core_cm4.h **** + 164:Drivers/CMSIS/Include/core_cm4.h **** + 165:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 166:Drivers/CMSIS/Include/core_cm4.h **** } + 167:Drivers/CMSIS/Include/core_cm4.h **** #endif + 168:Drivers/CMSIS/Include/core_cm4.h **** + 169:Drivers/CMSIS/Include/core_cm4.h **** #endif /* __CORE_CM4_H_GENERIC */ + 170:Drivers/CMSIS/Include/core_cm4.h **** + 171:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CMSIS_GENERIC + 172:Drivers/CMSIS/Include/core_cm4.h **** + 173:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CORE_CM4_H_DEPENDANT + 174:Drivers/CMSIS/Include/core_cm4.h **** #define __CORE_CM4_H_DEPENDANT + 175:Drivers/CMSIS/Include/core_cm4.h **** + 176:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 177:Drivers/CMSIS/Include/core_cm4.h **** extern "C" { + 178:Drivers/CMSIS/Include/core_cm4.h **** #endif + 179:Drivers/CMSIS/Include/core_cm4.h **** + 180:Drivers/CMSIS/Include/core_cm4.h **** /* check device defines and use defaults */ + 181:Drivers/CMSIS/Include/core_cm4.h **** #if defined __CHECK_DEVICE_DEFINES + 182:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CM4_REV + 183:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_REV 0x0000U + 184:Drivers/CMSIS/Include/core_cm4.h **** #warning "__CM4_REV not defined in device header file; using default!" + 185:Drivers/CMSIS/Include/core_cm4.h **** #endif + 186:Drivers/CMSIS/Include/core_cm4.h **** + 187:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __FPU_PRESENT + 188:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_PRESENT 0U + 189:Drivers/CMSIS/Include/core_cm4.h **** #warning "__FPU_PRESENT not defined in device header file; using default!" + 190:Drivers/CMSIS/Include/core_cm4.h **** #endif + 191:Drivers/CMSIS/Include/core_cm4.h **** + 192:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __MPU_PRESENT + 193:Drivers/CMSIS/Include/core_cm4.h **** #define __MPU_PRESENT 0U + 194:Drivers/CMSIS/Include/core_cm4.h **** #warning "__MPU_PRESENT not defined in device header file; using default!" + 195:Drivers/CMSIS/Include/core_cm4.h **** #endif + 196:Drivers/CMSIS/Include/core_cm4.h **** + 197:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __NVIC_PRIO_BITS + 198:Drivers/CMSIS/Include/core_cm4.h **** #define __NVIC_PRIO_BITS 3U + 199:Drivers/CMSIS/Include/core_cm4.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + 200:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccGGrCD0.s page 5 + + + 201:Drivers/CMSIS/Include/core_cm4.h **** + 202:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __Vendor_SysTickConfig + 203:Drivers/CMSIS/Include/core_cm4.h **** #define __Vendor_SysTickConfig 0U + 204:Drivers/CMSIS/Include/core_cm4.h **** #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + 205:Drivers/CMSIS/Include/core_cm4.h **** #endif + 206:Drivers/CMSIS/Include/core_cm4.h **** #endif + 207:Drivers/CMSIS/Include/core_cm4.h **** + 208:Drivers/CMSIS/Include/core_cm4.h **** /* IO definitions (access restrictions to peripheral registers) */ + 209:Drivers/CMSIS/Include/core_cm4.h **** /** + 210:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_glob_defs CMSIS Global Defines + 211:Drivers/CMSIS/Include/core_cm4.h **** + 212:Drivers/CMSIS/Include/core_cm4.h **** IO Type Qualifiers are used + 213:Drivers/CMSIS/Include/core_cm4.h **** \li to specify the access to peripheral variables. + 214:Drivers/CMSIS/Include/core_cm4.h **** \li for automatic generation of peripheral register debug information. + 215:Drivers/CMSIS/Include/core_cm4.h **** */ + 216:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 217:Drivers/CMSIS/Include/core_cm4.h **** #define __I volatile /*!< Defines 'read only' permissions */ + 218:Drivers/CMSIS/Include/core_cm4.h **** #else + 219:Drivers/CMSIS/Include/core_cm4.h **** #define __I volatile const /*!< Defines 'read only' permissions */ + 220:Drivers/CMSIS/Include/core_cm4.h **** #endif + 221:Drivers/CMSIS/Include/core_cm4.h **** #define __O volatile /*!< Defines 'write only' permissions */ + 222:Drivers/CMSIS/Include/core_cm4.h **** #define __IO volatile /*!< Defines 'read / write' permissions */ + 223:Drivers/CMSIS/Include/core_cm4.h **** + 224:Drivers/CMSIS/Include/core_cm4.h **** /* following defines should be used for structure members */ + 225:Drivers/CMSIS/Include/core_cm4.h **** #define __IM volatile const /*! Defines 'read only' structure member permissions */ + 226:Drivers/CMSIS/Include/core_cm4.h **** #define __OM volatile /*! Defines 'write only' structure member permissions */ + 227:Drivers/CMSIS/Include/core_cm4.h **** #define __IOM volatile /*! Defines 'read / write' structure member permissions */ + 228:Drivers/CMSIS/Include/core_cm4.h **** + 229:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group Cortex_M4 */ + 230:Drivers/CMSIS/Include/core_cm4.h **** + 231:Drivers/CMSIS/Include/core_cm4.h **** + 232:Drivers/CMSIS/Include/core_cm4.h **** + 233:Drivers/CMSIS/Include/core_cm4.h **** /******************************************************************************* + 234:Drivers/CMSIS/Include/core_cm4.h **** * Register Abstraction + 235:Drivers/CMSIS/Include/core_cm4.h **** Core Register contain: + 236:Drivers/CMSIS/Include/core_cm4.h **** - Core Register + 237:Drivers/CMSIS/Include/core_cm4.h **** - Core NVIC Register + 238:Drivers/CMSIS/Include/core_cm4.h **** - Core SCB Register + 239:Drivers/CMSIS/Include/core_cm4.h **** - Core SysTick Register + 240:Drivers/CMSIS/Include/core_cm4.h **** - Core Debug Register + 241:Drivers/CMSIS/Include/core_cm4.h **** - Core MPU Register + 242:Drivers/CMSIS/Include/core_cm4.h **** - Core FPU Register + 243:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ + 244:Drivers/CMSIS/Include/core_cm4.h **** /** + 245:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_core_register Defines and Type Definitions + 246:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions and defines for Cortex-M processor based devices. + 247:Drivers/CMSIS/Include/core_cm4.h **** */ + 248:Drivers/CMSIS/Include/core_cm4.h **** + 249:Drivers/CMSIS/Include/core_cm4.h **** /** + 250:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 251:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_CORE Status and Control Registers + 252:Drivers/CMSIS/Include/core_cm4.h **** \brief Core Register type definitions. + 253:Drivers/CMSIS/Include/core_cm4.h **** @{ + 254:Drivers/CMSIS/Include/core_cm4.h **** */ + 255:Drivers/CMSIS/Include/core_cm4.h **** + 256:Drivers/CMSIS/Include/core_cm4.h **** /** + 257:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Application Program Status Register (APSR). + ARM GAS /tmp/ccGGrCD0.s page 6 + + + 258:Drivers/CMSIS/Include/core_cm4.h **** */ + 259:Drivers/CMSIS/Include/core_cm4.h **** typedef union + 260:Drivers/CMSIS/Include/core_cm4.h **** { + 261:Drivers/CMSIS/Include/core_cm4.h **** struct + 262:Drivers/CMSIS/Include/core_cm4.h **** { + 263:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + 264:Drivers/CMSIS/Include/core_cm4.h **** uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + 265:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + 266:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + 267:Drivers/CMSIS/Include/core_cm4.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 268:Drivers/CMSIS/Include/core_cm4.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 269:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 270:Drivers/CMSIS/Include/core_cm4.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 271:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 272:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 273:Drivers/CMSIS/Include/core_cm4.h **** } APSR_Type; + 274:Drivers/CMSIS/Include/core_cm4.h **** + 275:Drivers/CMSIS/Include/core_cm4.h **** /* APSR Register Definitions */ + 276:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_N_Pos 31U /*!< APSR + 277:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR + 278:Drivers/CMSIS/Include/core_cm4.h **** + 279:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Z_Pos 30U /*!< APSR + 280:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR + 281:Drivers/CMSIS/Include/core_cm4.h **** + 282:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_C_Pos 29U /*!< APSR + 283:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR + 284:Drivers/CMSIS/Include/core_cm4.h **** + 285:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_V_Pos 28U /*!< APSR + 286:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR + 287:Drivers/CMSIS/Include/core_cm4.h **** + 288:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Q_Pos 27U /*!< APSR + 289:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR + 290:Drivers/CMSIS/Include/core_cm4.h **** + 291:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_GE_Pos 16U /*!< APSR + 292:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR + 293:Drivers/CMSIS/Include/core_cm4.h **** + 294:Drivers/CMSIS/Include/core_cm4.h **** + 295:Drivers/CMSIS/Include/core_cm4.h **** /** + 296:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Interrupt Program Status Register (IPSR). + 297:Drivers/CMSIS/Include/core_cm4.h **** */ + 298:Drivers/CMSIS/Include/core_cm4.h **** typedef union + 299:Drivers/CMSIS/Include/core_cm4.h **** { + 300:Drivers/CMSIS/Include/core_cm4.h **** struct + 301:Drivers/CMSIS/Include/core_cm4.h **** { + 302:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 303:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + 304:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 305:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 306:Drivers/CMSIS/Include/core_cm4.h **** } IPSR_Type; + 307:Drivers/CMSIS/Include/core_cm4.h **** + 308:Drivers/CMSIS/Include/core_cm4.h **** /* IPSR Register Definitions */ + 309:Drivers/CMSIS/Include/core_cm4.h **** #define IPSR_ISR_Pos 0U /*!< IPSR + 310:Drivers/CMSIS/Include/core_cm4.h **** #define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR + 311:Drivers/CMSIS/Include/core_cm4.h **** + 312:Drivers/CMSIS/Include/core_cm4.h **** + 313:Drivers/CMSIS/Include/core_cm4.h **** /** + 314:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + ARM GAS /tmp/ccGGrCD0.s page 7 + + + 315:Drivers/CMSIS/Include/core_cm4.h **** */ + 316:Drivers/CMSIS/Include/core_cm4.h **** typedef union + 317:Drivers/CMSIS/Include/core_cm4.h **** { + 318:Drivers/CMSIS/Include/core_cm4.h **** struct + 319:Drivers/CMSIS/Include/core_cm4.h **** { + 320:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 321:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + 322:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + 323:Drivers/CMSIS/Include/core_cm4.h **** uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + 324:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + 325:Drivers/CMSIS/Include/core_cm4.h **** uint32_t T:1; /*!< bit: 24 Thumb bit */ + 326:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + 327:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + 328:Drivers/CMSIS/Include/core_cm4.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 329:Drivers/CMSIS/Include/core_cm4.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 330:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 331:Drivers/CMSIS/Include/core_cm4.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 332:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 333:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 334:Drivers/CMSIS/Include/core_cm4.h **** } xPSR_Type; + 335:Drivers/CMSIS/Include/core_cm4.h **** + 336:Drivers/CMSIS/Include/core_cm4.h **** /* xPSR Register Definitions */ + 337:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_N_Pos 31U /*!< xPSR + 338:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR + 339:Drivers/CMSIS/Include/core_cm4.h **** + 340:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Z_Pos 30U /*!< xPSR + 341:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR + 342:Drivers/CMSIS/Include/core_cm4.h **** + 343:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_C_Pos 29U /*!< xPSR + 344:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR + 345:Drivers/CMSIS/Include/core_cm4.h **** + 346:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_V_Pos 28U /*!< xPSR + 347:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR + 348:Drivers/CMSIS/Include/core_cm4.h **** + 349:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Q_Pos 27U /*!< xPSR + 350:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR + 351:Drivers/CMSIS/Include/core_cm4.h **** + 352:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_2_Pos 25U /*!< xPSR + 353:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR + 354:Drivers/CMSIS/Include/core_cm4.h **** + 355:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_T_Pos 24U /*!< xPSR + 356:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR + 357:Drivers/CMSIS/Include/core_cm4.h **** + 358:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_GE_Pos 16U /*!< xPSR + 359:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR + 360:Drivers/CMSIS/Include/core_cm4.h **** + 361:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_1_Pos 10U /*!< xPSR + 362:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR + 363:Drivers/CMSIS/Include/core_cm4.h **** + 364:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ISR_Pos 0U /*!< xPSR + 365:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR + 366:Drivers/CMSIS/Include/core_cm4.h **** + 367:Drivers/CMSIS/Include/core_cm4.h **** + 368:Drivers/CMSIS/Include/core_cm4.h **** /** + 369:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Control Registers (CONTROL). + 370:Drivers/CMSIS/Include/core_cm4.h **** */ + 371:Drivers/CMSIS/Include/core_cm4.h **** typedef union + ARM GAS /tmp/ccGGrCD0.s page 8 + + + 372:Drivers/CMSIS/Include/core_cm4.h **** { + 373:Drivers/CMSIS/Include/core_cm4.h **** struct + 374:Drivers/CMSIS/Include/core_cm4.h **** { + 375:Drivers/CMSIS/Include/core_cm4.h **** uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + 376:Drivers/CMSIS/Include/core_cm4.h **** uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + 377:Drivers/CMSIS/Include/core_cm4.h **** uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + 378:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + 379:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 380:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 381:Drivers/CMSIS/Include/core_cm4.h **** } CONTROL_Type; + 382:Drivers/CMSIS/Include/core_cm4.h **** + 383:Drivers/CMSIS/Include/core_cm4.h **** /* CONTROL Register Definitions */ + 384:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_FPCA_Pos 2U /*!< CONT + 385:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONT + 386:Drivers/CMSIS/Include/core_cm4.h **** + 387:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_SPSEL_Pos 1U /*!< CONT + 388:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONT + 389:Drivers/CMSIS/Include/core_cm4.h **** + 390:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_nPRIV_Pos 0U /*!< CONT + 391:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONT + 392:Drivers/CMSIS/Include/core_cm4.h **** + 393:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_CORE */ + 394:Drivers/CMSIS/Include/core_cm4.h **** + 395:Drivers/CMSIS/Include/core_cm4.h **** + 396:Drivers/CMSIS/Include/core_cm4.h **** /** + 397:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 398:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + 399:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the NVIC Registers + 400:Drivers/CMSIS/Include/core_cm4.h **** @{ + 401:Drivers/CMSIS/Include/core_cm4.h **** */ + 402:Drivers/CMSIS/Include/core_cm4.h **** + 403:Drivers/CMSIS/Include/core_cm4.h **** /** + 404:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + 405:Drivers/CMSIS/Include/core_cm4.h **** */ + 406:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 407:Drivers/CMSIS/Include/core_cm4.h **** { + 408:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + 409:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[24U]; + 410:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register + 411:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RSERVED1[24U]; + 412:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * + 413:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[24U]; + 414:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register + 415:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[24U]; + 416:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + 417:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[56U]; + 418:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bi + 419:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED5[644U]; + 420:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Regis + 421:Drivers/CMSIS/Include/core_cm4.h **** } NVIC_Type; + 422:Drivers/CMSIS/Include/core_cm4.h **** + 423:Drivers/CMSIS/Include/core_cm4.h **** /* Software Triggered Interrupt Register Definitions */ + 424:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_STIR_INTID_Pos 0U /*!< STIR: I + 425:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: I + 426:Drivers/CMSIS/Include/core_cm4.h **** + 427:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_NVIC */ + 428:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccGGrCD0.s page 9 + + + 429:Drivers/CMSIS/Include/core_cm4.h **** + 430:Drivers/CMSIS/Include/core_cm4.h **** /** + 431:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 432:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SCB System Control Block (SCB) + 433:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Control Block Registers + 434:Drivers/CMSIS/Include/core_cm4.h **** @{ + 435:Drivers/CMSIS/Include/core_cm4.h **** */ + 436:Drivers/CMSIS/Include/core_cm4.h **** + 437:Drivers/CMSIS/Include/core_cm4.h **** /** + 438:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the System Control Block (SCB). + 439:Drivers/CMSIS/Include/core_cm4.h **** */ + 440:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 441:Drivers/CMSIS/Include/core_cm4.h **** { + 442:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + 443:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regi + 444:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + 445:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset + 446:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + 447:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register * + 448:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registe + 449:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State + 450:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Regist + 451:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + 452:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + 453:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register + 454:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + 455:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register + 456:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + 457:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + 458:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + 459:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + 460:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Regis + 461:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[5U]; + 462:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Regis + 463:Drivers/CMSIS/Include/core_cm4.h **** } SCB_Type; + 464:Drivers/CMSIS/Include/core_cm4.h **** + 465:Drivers/CMSIS/Include/core_cm4.h **** /* SCB CPUID Register Definitions */ + 466:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB + 467:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB + 468:Drivers/CMSIS/Include/core_cm4.h **** + 469:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_VARIANT_Pos 20U /*!< SCB + 470:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB + 471:Drivers/CMSIS/Include/core_cm4.h **** + 472:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB + 473:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB + 474:Drivers/CMSIS/Include/core_cm4.h **** + 475:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_PARTNO_Pos 4U /*!< SCB + 476:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB + 477:Drivers/CMSIS/Include/core_cm4.h **** + 478:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_REVISION_Pos 0U /*!< SCB + 479:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB + 480:Drivers/CMSIS/Include/core_cm4.h **** + 481:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Interrupt Control State Register Definitions */ + 482:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB + 483:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB + 484:Drivers/CMSIS/Include/core_cm4.h **** + 485:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB + ARM GAS /tmp/ccGGrCD0.s page 10 + + + 486:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB + 487:Drivers/CMSIS/Include/core_cm4.h **** + 488:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB + 489:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB + 490:Drivers/CMSIS/Include/core_cm4.h **** + 491:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB + 492:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB + 493:Drivers/CMSIS/Include/core_cm4.h **** + 494:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB + 495:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB + 496:Drivers/CMSIS/Include/core_cm4.h **** + 497:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB + 498:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB + 499:Drivers/CMSIS/Include/core_cm4.h **** + 500:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB + 501:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB + 502:Drivers/CMSIS/Include/core_cm4.h **** + 503:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB + 504:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB + 505:Drivers/CMSIS/Include/core_cm4.h **** + 506:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB + 507:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB + 508:Drivers/CMSIS/Include/core_cm4.h **** + 509:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB + 510:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB + 511:Drivers/CMSIS/Include/core_cm4.h **** + 512:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Vector Table Offset Register Definitions */ + 513:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB + 514:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB + 515:Drivers/CMSIS/Include/core_cm4.h **** + 516:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Application Interrupt and Reset Control Register Definitions */ + 517:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB + 518:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB + 519:Drivers/CMSIS/Include/core_cm4.h **** + 520:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB + 521:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB + 522:Drivers/CMSIS/Include/core_cm4.h **** + 523:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB + 524:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB + 525:Drivers/CMSIS/Include/core_cm4.h **** + 526:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB + 527:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB + 528:Drivers/CMSIS/Include/core_cm4.h **** + 529:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB + 530:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB + 531:Drivers/CMSIS/Include/core_cm4.h **** + 532:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB + 533:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB + 534:Drivers/CMSIS/Include/core_cm4.h **** + 535:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB + 536:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB + 537:Drivers/CMSIS/Include/core_cm4.h **** + 538:Drivers/CMSIS/Include/core_cm4.h **** /* SCB System Control Register Definitions */ + 539:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB + 540:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB + 541:Drivers/CMSIS/Include/core_cm4.h **** + 542:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB + ARM GAS /tmp/ccGGrCD0.s page 11 + + + 543:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB + 544:Drivers/CMSIS/Include/core_cm4.h **** + 545:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB + 546:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB + 547:Drivers/CMSIS/Include/core_cm4.h **** + 548:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Configuration Control Register Definitions */ + 549:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_STKALIGN_Pos 9U /*!< SCB + 550:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB + 551:Drivers/CMSIS/Include/core_cm4.h **** + 552:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB + 553:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB + 554:Drivers/CMSIS/Include/core_cm4.h **** + 555:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB + 556:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB + 557:Drivers/CMSIS/Include/core_cm4.h **** + 558:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB + 559:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB + 560:Drivers/CMSIS/Include/core_cm4.h **** + 561:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB + 562:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB + 563:Drivers/CMSIS/Include/core_cm4.h **** + 564:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB + 565:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB + 566:Drivers/CMSIS/Include/core_cm4.h **** + 567:Drivers/CMSIS/Include/core_cm4.h **** /* SCB System Handler Control and State Register Definitions */ + 568:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB + 569:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB + 570:Drivers/CMSIS/Include/core_cm4.h **** + 571:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB + 572:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB + 573:Drivers/CMSIS/Include/core_cm4.h **** + 574:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB + 575:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB + 576:Drivers/CMSIS/Include/core_cm4.h **** + 577:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB + 578:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB + 579:Drivers/CMSIS/Include/core_cm4.h **** + 580:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB + 581:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB + 582:Drivers/CMSIS/Include/core_cm4.h **** + 583:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB + 584:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB + 585:Drivers/CMSIS/Include/core_cm4.h **** + 586:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB + 587:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB + 588:Drivers/CMSIS/Include/core_cm4.h **** + 589:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB + 590:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB + 591:Drivers/CMSIS/Include/core_cm4.h **** + 592:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB + 593:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB + 594:Drivers/CMSIS/Include/core_cm4.h **** + 595:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB + 596:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB + 597:Drivers/CMSIS/Include/core_cm4.h **** + 598:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB + 599:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB + ARM GAS /tmp/ccGGrCD0.s page 12 + + + 600:Drivers/CMSIS/Include/core_cm4.h **** + 601:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB + 602:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB + 603:Drivers/CMSIS/Include/core_cm4.h **** + 604:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB + 605:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB + 606:Drivers/CMSIS/Include/core_cm4.h **** + 607:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB + 608:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB + 609:Drivers/CMSIS/Include/core_cm4.h **** + 610:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Configurable Fault Status Register Definitions */ + 611:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB + 612:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB + 613:Drivers/CMSIS/Include/core_cm4.h **** + 614:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB + 615:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB + 616:Drivers/CMSIS/Include/core_cm4.h **** + 617:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB + 618:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB + 619:Drivers/CMSIS/Include/core_cm4.h **** + 620:Drivers/CMSIS/Include/core_cm4.h **** /* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ + 621:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB + 622:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB + 623:Drivers/CMSIS/Include/core_cm4.h **** + 624:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB + 625:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB + 626:Drivers/CMSIS/Include/core_cm4.h **** + 627:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB + 628:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB + 629:Drivers/CMSIS/Include/core_cm4.h **** + 630:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB + 631:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB + 632:Drivers/CMSIS/Include/core_cm4.h **** + 633:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB + 634:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB + 635:Drivers/CMSIS/Include/core_cm4.h **** + 636:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB + 637:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB + 638:Drivers/CMSIS/Include/core_cm4.h **** + 639:Drivers/CMSIS/Include/core_cm4.h **** /* BusFault Status Register (part of SCB Configurable Fault Status Register) */ + 640:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB + 641:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB + 642:Drivers/CMSIS/Include/core_cm4.h **** + 643:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB + 644:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB + 645:Drivers/CMSIS/Include/core_cm4.h **** + 646:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB + 647:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB + 648:Drivers/CMSIS/Include/core_cm4.h **** + 649:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB + 650:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB + 651:Drivers/CMSIS/Include/core_cm4.h **** + 652:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB + 653:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB + 654:Drivers/CMSIS/Include/core_cm4.h **** + 655:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB + 656:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB + ARM GAS /tmp/ccGGrCD0.s page 13 + + + 657:Drivers/CMSIS/Include/core_cm4.h **** + 658:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB + 659:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB + 660:Drivers/CMSIS/Include/core_cm4.h **** + 661:Drivers/CMSIS/Include/core_cm4.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ + 662:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB + 663:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB + 664:Drivers/CMSIS/Include/core_cm4.h **** + 665:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB + 666:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB + 667:Drivers/CMSIS/Include/core_cm4.h **** + 668:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB + 669:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB + 670:Drivers/CMSIS/Include/core_cm4.h **** + 671:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB + 672:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB + 673:Drivers/CMSIS/Include/core_cm4.h **** + 674:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB + 675:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB + 676:Drivers/CMSIS/Include/core_cm4.h **** + 677:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB + 678:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB + 679:Drivers/CMSIS/Include/core_cm4.h **** + 680:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Hard Fault Status Register Definitions */ + 681:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB + 682:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB + 683:Drivers/CMSIS/Include/core_cm4.h **** + 684:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_FORCED_Pos 30U /*!< SCB + 685:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB + 686:Drivers/CMSIS/Include/core_cm4.h **** + 687:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB + 688:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB + 689:Drivers/CMSIS/Include/core_cm4.h **** + 690:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Debug Fault Status Register Definitions */ + 691:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB + 692:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB + 693:Drivers/CMSIS/Include/core_cm4.h **** + 694:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_VCATCH_Pos 3U /*!< SCB + 695:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB + 696:Drivers/CMSIS/Include/core_cm4.h **** + 697:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB + 698:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB + 699:Drivers/CMSIS/Include/core_cm4.h **** + 700:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_BKPT_Pos 1U /*!< SCB + 701:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB + 702:Drivers/CMSIS/Include/core_cm4.h **** + 703:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_HALTED_Pos 0U /*!< SCB + 704:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB + 705:Drivers/CMSIS/Include/core_cm4.h **** + 706:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_SCB */ + 707:Drivers/CMSIS/Include/core_cm4.h **** + 708:Drivers/CMSIS/Include/core_cm4.h **** + 709:Drivers/CMSIS/Include/core_cm4.h **** /** + 710:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 711:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + 712:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Control and ID Register not in the SCB + 713:Drivers/CMSIS/Include/core_cm4.h **** @{ + ARM GAS /tmp/ccGGrCD0.s page 14 + + + 714:Drivers/CMSIS/Include/core_cm4.h **** */ + 715:Drivers/CMSIS/Include/core_cm4.h **** + 716:Drivers/CMSIS/Include/core_cm4.h **** /** + 717:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the System Control and ID Register not in the SCB. + 718:Drivers/CMSIS/Include/core_cm4.h **** */ + 719:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 720:Drivers/CMSIS/Include/core_cm4.h **** { + 721:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[1U]; + 722:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Regist + 723:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + 724:Drivers/CMSIS/Include/core_cm4.h **** } SCnSCB_Type; + 725:Drivers/CMSIS/Include/core_cm4.h **** + 726:Drivers/CMSIS/Include/core_cm4.h **** /* Interrupt Controller Type Register Definitions */ + 727:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: I + 728:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: I + 729:Drivers/CMSIS/Include/core_cm4.h **** + 730:Drivers/CMSIS/Include/core_cm4.h **** /* Auxiliary Control Register Definitions */ + 731:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: + 732:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: + 733:Drivers/CMSIS/Include/core_cm4.h **** + 734:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: + 735:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: + 736:Drivers/CMSIS/Include/core_cm4.h **** + 737:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: + 738:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: + 739:Drivers/CMSIS/Include/core_cm4.h **** + 740:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: + 741:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: + 742:Drivers/CMSIS/Include/core_cm4.h **** + 743:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: + 744:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: + 745:Drivers/CMSIS/Include/core_cm4.h **** + 746:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_SCnotSCB */ + 747:Drivers/CMSIS/Include/core_cm4.h **** + 748:Drivers/CMSIS/Include/core_cm4.h **** + 749:Drivers/CMSIS/Include/core_cm4.h **** /** + 750:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 751:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SysTick System Tick Timer (SysTick) + 752:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Timer Registers. + 753:Drivers/CMSIS/Include/core_cm4.h **** @{ + 754:Drivers/CMSIS/Include/core_cm4.h **** */ + 755:Drivers/CMSIS/Include/core_cm4.h **** + 756:Drivers/CMSIS/Include/core_cm4.h **** /** + 757:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the System Timer (SysTick). + 758:Drivers/CMSIS/Include/core_cm4.h **** */ + 759:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 760:Drivers/CMSIS/Include/core_cm4.h **** { + 761:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regis + 762:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + 763:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register * + 764:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ + 765:Drivers/CMSIS/Include/core_cm4.h **** } SysTick_Type; + 766:Drivers/CMSIS/Include/core_cm4.h **** + 767:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Control / Status Register Definitions */ + 768:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT + 769:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT + 770:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccGGrCD0.s page 15 + + + 771:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT + 772:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysT + 773:Drivers/CMSIS/Include/core_cm4.h **** + 774:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_TICKINT_Pos 1U /*!< SysT + 775:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysT + 776:Drivers/CMSIS/Include/core_cm4.h **** + 777:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_ENABLE_Pos 0U /*!< SysT + 778:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysT + 779:Drivers/CMSIS/Include/core_cm4.h **** + 780:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Reload Register Definitions */ + 781:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_LOAD_RELOAD_Pos 0U /*!< SysT + 782:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysT + 783:Drivers/CMSIS/Include/core_cm4.h **** + 784:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Current Register Definitions */ + 785:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_VAL_CURRENT_Pos 0U /*!< SysT + 786:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysT + 787:Drivers/CMSIS/Include/core_cm4.h **** + 788:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Calibration Register Definitions */ + 789:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_NOREF_Pos 31U /*!< SysT + 790:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysT + 791:Drivers/CMSIS/Include/core_cm4.h **** + 792:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_SKEW_Pos 30U /*!< SysT + 793:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysT + 794:Drivers/CMSIS/Include/core_cm4.h **** + 795:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT + 796:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT + 797:Drivers/CMSIS/Include/core_cm4.h **** + 798:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_SysTick */ + 799:Drivers/CMSIS/Include/core_cm4.h **** + 800:Drivers/CMSIS/Include/core_cm4.h **** + 801:Drivers/CMSIS/Include/core_cm4.h **** /** + 802:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 803:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + 804:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + 805:Drivers/CMSIS/Include/core_cm4.h **** @{ + 806:Drivers/CMSIS/Include/core_cm4.h **** */ + 807:Drivers/CMSIS/Include/core_cm4.h **** + 808:Drivers/CMSIS/Include/core_cm4.h **** /** + 809:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + 810:Drivers/CMSIS/Include/core_cm4.h **** */ + 811:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 812:Drivers/CMSIS/Include/core_cm4.h **** { + 813:Drivers/CMSIS/Include/core_cm4.h **** __OM union + 814:Drivers/CMSIS/Include/core_cm4.h **** { + 815:Drivers/CMSIS/Include/core_cm4.h **** __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + 816:Drivers/CMSIS/Include/core_cm4.h **** __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + 817:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + 818:Drivers/CMSIS/Include/core_cm4.h **** } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + 819:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[864U]; + 820:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + 821:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED1[15U]; + 822:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + 823:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[15U]; + 824:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + 825:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[29U]; + 826:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register * + 827:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + ARM GAS /tmp/ccGGrCD0.s page 16 + + + 828:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Reg + 829:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[43U]; + 830:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + 831:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + 832:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED5[6U]; + 833:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Re + 834:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Re + 835:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Re + 836:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Re + 837:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Re + 838:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Re + 839:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Re + 840:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Re + 841:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Re + 842:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Re + 843:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Re + 844:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Re + 845:Drivers/CMSIS/Include/core_cm4.h **** } ITM_Type; + 846:Drivers/CMSIS/Include/core_cm4.h **** + 847:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Trace Privilege Register Definitions */ + 848:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM + 849:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM + 850:Drivers/CMSIS/Include/core_cm4.h **** + 851:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Trace Control Register Definitions */ + 852:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM + 853:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM + 854:Drivers/CMSIS/Include/core_cm4.h **** + 855:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM + 856:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM + 857:Drivers/CMSIS/Include/core_cm4.h **** + 858:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM + 859:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM + 860:Drivers/CMSIS/Include/core_cm4.h **** + 861:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSPrescale_Pos 8U /*!< ITM + 862:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM + 863:Drivers/CMSIS/Include/core_cm4.h **** + 864:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SWOENA_Pos 4U /*!< ITM + 865:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM + 866:Drivers/CMSIS/Include/core_cm4.h **** + 867:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_DWTENA_Pos 3U /*!< ITM + 868:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM + 869:Drivers/CMSIS/Include/core_cm4.h **** + 870:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SYNCENA_Pos 2U /*!< ITM + 871:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM + 872:Drivers/CMSIS/Include/core_cm4.h **** + 873:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSENA_Pos 1U /*!< ITM + 874:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM + 875:Drivers/CMSIS/Include/core_cm4.h **** + 876:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_ITMENA_Pos 0U /*!< ITM + 877:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM + 878:Drivers/CMSIS/Include/core_cm4.h **** + 879:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Integration Write Register Definitions */ + 880:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM + 881:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM + 882:Drivers/CMSIS/Include/core_cm4.h **** + 883:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Integration Read Register Definitions */ + 884:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IRR_ATREADYM_Pos 0U /*!< ITM + ARM GAS /tmp/ccGGrCD0.s page 17 + + + 885:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM + 886:Drivers/CMSIS/Include/core_cm4.h **** + 887:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Integration Mode Control Register Definitions */ + 888:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM + 889:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM + 890:Drivers/CMSIS/Include/core_cm4.h **** + 891:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Lock Status Register Definitions */ + 892:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_ByteAcc_Pos 2U /*!< ITM + 893:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM + 894:Drivers/CMSIS/Include/core_cm4.h **** + 895:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Access_Pos 1U /*!< ITM + 896:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM + 897:Drivers/CMSIS/Include/core_cm4.h **** + 898:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Present_Pos 0U /*!< ITM + 899:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM + 900:Drivers/CMSIS/Include/core_cm4.h **** + 901:Drivers/CMSIS/Include/core_cm4.h **** /*@}*/ /* end of group CMSIS_ITM */ + 902:Drivers/CMSIS/Include/core_cm4.h **** + 903:Drivers/CMSIS/Include/core_cm4.h **** + 904:Drivers/CMSIS/Include/core_cm4.h **** /** + 905:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 906:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + 907:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Data Watchpoint and Trace (DWT) + 908:Drivers/CMSIS/Include/core_cm4.h **** @{ + 909:Drivers/CMSIS/Include/core_cm4.h **** */ + 910:Drivers/CMSIS/Include/core_cm4.h **** + 911:Drivers/CMSIS/Include/core_cm4.h **** /** + 912:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + 913:Drivers/CMSIS/Include/core_cm4.h **** */ + 914:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 915:Drivers/CMSIS/Include/core_cm4.h **** { + 916:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + 917:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + 918:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + 919:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Registe + 920:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + 921:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + 922:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Registe + 923:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register + 924:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + 925:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + 926:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + 927:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[1U]; + 928:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + 929:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + 930:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + 931:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED1[1U]; + 932:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + 933:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + 934:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + 935:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[1U]; + 936:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + 937:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + 938:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + 939:Drivers/CMSIS/Include/core_cm4.h **** } DWT_Type; + 940:Drivers/CMSIS/Include/core_cm4.h **** + 941:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Control Register Definitions */ + ARM GAS /tmp/ccGGrCD0.s page 18 + + + 942:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTR + 943:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTR + 944:Drivers/CMSIS/Include/core_cm4.h **** + 945:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTR + 946:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTR + 947:Drivers/CMSIS/Include/core_cm4.h **** + 948:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTR + 949:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTR + 950:Drivers/CMSIS/Include/core_cm4.h **** + 951:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTR + 952:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTR + 953:Drivers/CMSIS/Include/core_cm4.h **** + 954:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTR + 955:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTR + 956:Drivers/CMSIS/Include/core_cm4.h **** + 957:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTR + 958:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTR + 959:Drivers/CMSIS/Include/core_cm4.h **** + 960:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTR + 961:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTR + 962:Drivers/CMSIS/Include/core_cm4.h **** + 963:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR + 964:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR + 965:Drivers/CMSIS/Include/core_cm4.h **** + 966:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR + 967:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTR + 968:Drivers/CMSIS/Include/core_cm4.h **** + 969:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTR + 970:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTR + 971:Drivers/CMSIS/Include/core_cm4.h **** + 972:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTR + 973:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTR + 974:Drivers/CMSIS/Include/core_cm4.h **** + 975:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTR + 976:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTR + 977:Drivers/CMSIS/Include/core_cm4.h **** + 978:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTR + 979:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTR + 980:Drivers/CMSIS/Include/core_cm4.h **** + 981:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTR + 982:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTR + 983:Drivers/CMSIS/Include/core_cm4.h **** + 984:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTR + 985:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTR + 986:Drivers/CMSIS/Include/core_cm4.h **** + 987:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTR + 988:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTR + 989:Drivers/CMSIS/Include/core_cm4.h **** + 990:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTR + 991:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTR + 992:Drivers/CMSIS/Include/core_cm4.h **** + 993:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTR + 994:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTR + 995:Drivers/CMSIS/Include/core_cm4.h **** + 996:Drivers/CMSIS/Include/core_cm4.h **** /* DWT CPI Count Register Definitions */ + 997:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPI + 998:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPI + ARM GAS /tmp/ccGGrCD0.s page 19 + + + 999:Drivers/CMSIS/Include/core_cm4.h **** +1000:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Exception Overhead Count Register Definitions */ +1001:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXC +1002:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXC +1003:Drivers/CMSIS/Include/core_cm4.h **** +1004:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Sleep Count Register Definitions */ +1005:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLE +1006:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLE +1007:Drivers/CMSIS/Include/core_cm4.h **** +1008:Drivers/CMSIS/Include/core_cm4.h **** /* DWT LSU Count Register Definitions */ +1009:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSU +1010:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSU +1011:Drivers/CMSIS/Include/core_cm4.h **** +1012:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Folded-instruction Count Register Definitions */ +1013:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOL +1014:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOL +1015:Drivers/CMSIS/Include/core_cm4.h **** +1016:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Comparator Mask Register Definitions */ +1017:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_MASK_MASK_Pos 0U /*!< DWT MAS +1018:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MAS +1019:Drivers/CMSIS/Include/core_cm4.h **** +1020:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Comparator Function Register Definitions */ +1021:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN +1022:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN +1023:Drivers/CMSIS/Include/core_cm4.h **** +1024:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUN +1025:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUN +1026:Drivers/CMSIS/Include/core_cm4.h **** +1027:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUN +1028:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUN +1029:Drivers/CMSIS/Include/core_cm4.h **** +1030:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUN +1031:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUN +1032:Drivers/CMSIS/Include/core_cm4.h **** +1033:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUN +1034:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUN +1035:Drivers/CMSIS/Include/core_cm4.h **** +1036:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUN +1037:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUN +1038:Drivers/CMSIS/Include/core_cm4.h **** +1039:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUN +1040:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUN +1041:Drivers/CMSIS/Include/core_cm4.h **** +1042:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUN +1043:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUN +1044:Drivers/CMSIS/Include/core_cm4.h **** +1045:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUN +1046:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUN +1047:Drivers/CMSIS/Include/core_cm4.h **** +1048:Drivers/CMSIS/Include/core_cm4.h **** /*@}*/ /* end of group CMSIS_DWT */ +1049:Drivers/CMSIS/Include/core_cm4.h **** +1050:Drivers/CMSIS/Include/core_cm4.h **** +1051:Drivers/CMSIS/Include/core_cm4.h **** /** +1052:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1053:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_TPI Trace Port Interface (TPI) +1054:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Trace Port Interface (TPI) +1055:Drivers/CMSIS/Include/core_cm4.h **** @{ + ARM GAS /tmp/ccGGrCD0.s page 20 + + +1056:Drivers/CMSIS/Include/core_cm4.h **** */ +1057:Drivers/CMSIS/Include/core_cm4.h **** +1058:Drivers/CMSIS/Include/core_cm4.h **** /** +1059:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Trace Port Interface Register (TPI). +1060:Drivers/CMSIS/Include/core_cm4.h **** */ +1061:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1062:Drivers/CMSIS/Include/core_cm4.h **** { +1063:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Reg +1064:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Regis +1065:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[2U]; +1066:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Reg +1067:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED1[55U]; +1068:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register * +1069:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[131U]; +1070:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Regis +1071:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Regi +1072:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counte +1073:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[759U]; +1074:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ +1075:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ +1076:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ +1077:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[1U]; +1078:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ +1079:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ +1080:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ +1081:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED5[39U]; +1082:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ +1083:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ +1084:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED7[8U]; +1085:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ +1086:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +1087:Drivers/CMSIS/Include/core_cm4.h **** } TPI_Type; +1088:Drivers/CMSIS/Include/core_cm4.h **** +1089:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Asynchronous Clock Prescaler Register Definitions */ +1090:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACP +1091:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACP +1092:Drivers/CMSIS/Include/core_cm4.h **** +1093:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Selected Pin Protocol Register Definitions */ +1094:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPP +1095:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPP +1096:Drivers/CMSIS/Include/core_cm4.h **** +1097:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Formatter and Flush Status Register Definitions */ +1098:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFS +1099:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFS +1100:Drivers/CMSIS/Include/core_cm4.h **** +1101:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFS +1102:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFS +1103:Drivers/CMSIS/Include/core_cm4.h **** +1104:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFS +1105:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFS +1106:Drivers/CMSIS/Include/core_cm4.h **** +1107:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFS +1108:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFS +1109:Drivers/CMSIS/Include/core_cm4.h **** +1110:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Formatter and Flush Control Register Definitions */ +1111:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFC +1112:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFC + ARM GAS /tmp/ccGGrCD0.s page 21 + + +1113:Drivers/CMSIS/Include/core_cm4.h **** +1114:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFC +1115:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFC +1116:Drivers/CMSIS/Include/core_cm4.h **** +1117:Drivers/CMSIS/Include/core_cm4.h **** /* TPI TRIGGER Register Definitions */ +1118:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRI +1119:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRI +1120:Drivers/CMSIS/Include/core_cm4.h **** +1121:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Integration ETM Data Register Definitions (FIFO0) */ +1122:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIF +1123:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIF +1124:Drivers/CMSIS/Include/core_cm4.h **** +1125:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIF +1126:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIF +1127:Drivers/CMSIS/Include/core_cm4.h **** +1128:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIF +1129:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIF +1130:Drivers/CMSIS/Include/core_cm4.h **** +1131:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIF +1132:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIF +1133:Drivers/CMSIS/Include/core_cm4.h **** +1134:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF +1135:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF +1136:Drivers/CMSIS/Include/core_cm4.h **** +1137:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF +1138:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIF +1139:Drivers/CMSIS/Include/core_cm4.h **** +1140:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIF +1141:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIF +1142:Drivers/CMSIS/Include/core_cm4.h **** +1143:Drivers/CMSIS/Include/core_cm4.h **** /* TPI ITATBCTR2 Register Definitions */ +1144:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITA +1145:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITA +1146:Drivers/CMSIS/Include/core_cm4.h **** +1147:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITA +1148:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITA +1149:Drivers/CMSIS/Include/core_cm4.h **** +1150:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Integration ITM Data Register Definitions (FIFO1) */ +1151:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIF +1152:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIF +1153:Drivers/CMSIS/Include/core_cm4.h **** +1154:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIF +1155:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIF +1156:Drivers/CMSIS/Include/core_cm4.h **** +1157:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIF +1158:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIF +1159:Drivers/CMSIS/Include/core_cm4.h **** +1160:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIF +1161:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIF +1162:Drivers/CMSIS/Include/core_cm4.h **** +1163:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIF +1164:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIF +1165:Drivers/CMSIS/Include/core_cm4.h **** +1166:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIF +1167:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIF +1168:Drivers/CMSIS/Include/core_cm4.h **** +1169:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIF + ARM GAS /tmp/ccGGrCD0.s page 22 + + +1170:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIF +1171:Drivers/CMSIS/Include/core_cm4.h **** +1172:Drivers/CMSIS/Include/core_cm4.h **** /* TPI ITATBCTR0 Register Definitions */ +1173:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITA +1174:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITA +1175:Drivers/CMSIS/Include/core_cm4.h **** +1176:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITA +1177:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITA +1178:Drivers/CMSIS/Include/core_cm4.h **** +1179:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Integration Mode Control Register Definitions */ +1180:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITC +1181:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITC +1182:Drivers/CMSIS/Include/core_cm4.h **** +1183:Drivers/CMSIS/Include/core_cm4.h **** /* TPI DEVID Register Definitions */ +1184:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEV +1185:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEV +1186:Drivers/CMSIS/Include/core_cm4.h **** +1187:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEV +1188:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEV +1189:Drivers/CMSIS/Include/core_cm4.h **** +1190:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEV +1191:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV +1192:Drivers/CMSIS/Include/core_cm4.h **** +1193:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV +1194:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV +1195:Drivers/CMSIS/Include/core_cm4.h **** +1196:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEV +1197:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEV +1198:Drivers/CMSIS/Include/core_cm4.h **** +1199:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEV +1200:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEV +1201:Drivers/CMSIS/Include/core_cm4.h **** +1202:Drivers/CMSIS/Include/core_cm4.h **** /* TPI DEVTYPE Register Definitions */ +1203:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEV +1204:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEV +1205:Drivers/CMSIS/Include/core_cm4.h **** +1206:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEV +1207:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEV +1208:Drivers/CMSIS/Include/core_cm4.h **** +1209:Drivers/CMSIS/Include/core_cm4.h **** /*@}*/ /* end of group CMSIS_TPI */ +1210:Drivers/CMSIS/Include/core_cm4.h **** +1211:Drivers/CMSIS/Include/core_cm4.h **** +1212:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +1213:Drivers/CMSIS/Include/core_cm4.h **** /** +1214:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1215:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_MPU Memory Protection Unit (MPU) +1216:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Memory Protection Unit (MPU) +1217:Drivers/CMSIS/Include/core_cm4.h **** @{ +1218:Drivers/CMSIS/Include/core_cm4.h **** */ +1219:Drivers/CMSIS/Include/core_cm4.h **** +1220:Drivers/CMSIS/Include/core_cm4.h **** /** +1221:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Memory Protection Unit (MPU). +1222:Drivers/CMSIS/Include/core_cm4.h **** */ +1223:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1224:Drivers/CMSIS/Include/core_cm4.h **** { +1225:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ +1226:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + ARM GAS /tmp/ccGGrCD0.s page 23 + + +1227:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ +1228:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register +1229:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Re +1230:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address +1231:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and +1232:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address +1233:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and +1234:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address +1235:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and +1236:Drivers/CMSIS/Include/core_cm4.h **** } MPU_Type; +1237:Drivers/CMSIS/Include/core_cm4.h **** +1238:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_RALIASES 4U +1239:Drivers/CMSIS/Include/core_cm4.h **** +1240:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Type Register Definitions */ +1241:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_IREGION_Pos 16U /*!< MPU +1242:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU +1243:Drivers/CMSIS/Include/core_cm4.h **** +1244:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_DREGION_Pos 8U /*!< MPU +1245:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU +1246:Drivers/CMSIS/Include/core_cm4.h **** +1247:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU +1248:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU +1249:Drivers/CMSIS/Include/core_cm4.h **** +1250:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Control Register Definitions */ +1251:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU +1252:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU +1253:Drivers/CMSIS/Include/core_cm4.h **** +1254:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU +1255:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU +1256:Drivers/CMSIS/Include/core_cm4.h **** +1257:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_ENABLE_Pos 0U /*!< MPU +1258:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU +1259:Drivers/CMSIS/Include/core_cm4.h **** +1260:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Region Number Register Definitions */ +1261:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RNR_REGION_Pos 0U /*!< MPU +1262:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU +1263:Drivers/CMSIS/Include/core_cm4.h **** +1264:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Region Base Address Register Definitions */ +1265:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_ADDR_Pos 5U /*!< MPU +1266:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU +1267:Drivers/CMSIS/Include/core_cm4.h **** +1268:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_VALID_Pos 4U /*!< MPU +1269:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU +1270:Drivers/CMSIS/Include/core_cm4.h **** +1271:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_REGION_Pos 0U /*!< MPU +1272:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU +1273:Drivers/CMSIS/Include/core_cm4.h **** +1274:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Region Attribute and Size Register Definitions */ +1275:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ATTRS_Pos 16U /*!< MPU +1276:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU +1277:Drivers/CMSIS/Include/core_cm4.h **** +1278:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_XN_Pos 28U /*!< MPU +1279:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU +1280:Drivers/CMSIS/Include/core_cm4.h **** +1281:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_AP_Pos 24U /*!< MPU +1282:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU +1283:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccGGrCD0.s page 24 + + +1284:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_TEX_Pos 19U /*!< MPU +1285:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU +1286:Drivers/CMSIS/Include/core_cm4.h **** +1287:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_S_Pos 18U /*!< MPU +1288:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU +1289:Drivers/CMSIS/Include/core_cm4.h **** +1290:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_C_Pos 17U /*!< MPU +1291:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU +1292:Drivers/CMSIS/Include/core_cm4.h **** +1293:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_B_Pos 16U /*!< MPU +1294:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU +1295:Drivers/CMSIS/Include/core_cm4.h **** +1296:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SRD_Pos 8U /*!< MPU +1297:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU +1298:Drivers/CMSIS/Include/core_cm4.h **** +1299:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SIZE_Pos 1U /*!< MPU +1300:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU +1301:Drivers/CMSIS/Include/core_cm4.h **** +1302:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ENABLE_Pos 0U /*!< MPU +1303:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU +1304:Drivers/CMSIS/Include/core_cm4.h **** +1305:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_MPU */ +1306:Drivers/CMSIS/Include/core_cm4.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ +1307:Drivers/CMSIS/Include/core_cm4.h **** +1308:Drivers/CMSIS/Include/core_cm4.h **** +1309:Drivers/CMSIS/Include/core_cm4.h **** /** +1310:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1311:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_FPU Floating Point Unit (FPU) +1312:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Floating Point Unit (FPU) +1313:Drivers/CMSIS/Include/core_cm4.h **** @{ +1314:Drivers/CMSIS/Include/core_cm4.h **** */ +1315:Drivers/CMSIS/Include/core_cm4.h **** +1316:Drivers/CMSIS/Include/core_cm4.h **** /** +1317:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Floating Point Unit (FPU). +1318:Drivers/CMSIS/Include/core_cm4.h **** */ +1319:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1320:Drivers/CMSIS/Include/core_cm4.h **** { +1321:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[1U]; +1322:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control R +1323:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address R +1324:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Co +1325:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 +1326:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 +1327:Drivers/CMSIS/Include/core_cm4.h **** } FPU_Type; +1328:Drivers/CMSIS/Include/core_cm4.h **** +1329:Drivers/CMSIS/Include/core_cm4.h **** /* Floating-Point Context Control Register Definitions */ +1330:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCC +1331:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCC +1332:Drivers/CMSIS/Include/core_cm4.h **** +1333:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCC +1334:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCC +1335:Drivers/CMSIS/Include/core_cm4.h **** +1336:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCC +1337:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCC +1338:Drivers/CMSIS/Include/core_cm4.h **** +1339:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCC +1340:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCC + ARM GAS /tmp/ccGGrCD0.s page 25 + + +1341:Drivers/CMSIS/Include/core_cm4.h **** +1342:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCC +1343:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCC +1344:Drivers/CMSIS/Include/core_cm4.h **** +1345:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCC +1346:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCC +1347:Drivers/CMSIS/Include/core_cm4.h **** +1348:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_THREAD_Pos 3U /*!< FPCC +1349:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCC +1350:Drivers/CMSIS/Include/core_cm4.h **** +1351:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_USER_Pos 1U /*!< FPCC +1352:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCC +1353:Drivers/CMSIS/Include/core_cm4.h **** +1354:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCC +1355:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCC +1356:Drivers/CMSIS/Include/core_cm4.h **** +1357:Drivers/CMSIS/Include/core_cm4.h **** /* Floating-Point Context Address Register Definitions */ +1358:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCA +1359:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCA +1360:Drivers/CMSIS/Include/core_cm4.h **** +1361:Drivers/CMSIS/Include/core_cm4.h **** /* Floating-Point Default Status Control Register Definitions */ +1362:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS +1363:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS +1364:Drivers/CMSIS/Include/core_cm4.h **** +1365:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_DN_Pos 25U /*!< FPDS +1366:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDS +1367:Drivers/CMSIS/Include/core_cm4.h **** +1368:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_FZ_Pos 24U /*!< FPDS +1369:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDS +1370:Drivers/CMSIS/Include/core_cm4.h **** +1371:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_RMode_Pos 22U /*!< FPDS +1372:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDS +1373:Drivers/CMSIS/Include/core_cm4.h **** +1374:Drivers/CMSIS/Include/core_cm4.h **** /* Media and FP Feature Register 0 Definitions */ +1375:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR +1376:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR +1377:Drivers/CMSIS/Include/core_cm4.h **** +1378:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR +1379:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR +1380:Drivers/CMSIS/Include/core_cm4.h **** +1381:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR +1382:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR +1383:Drivers/CMSIS/Include/core_cm4.h **** +1384:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Divide_Pos 16U /*!< MVFR +1385:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR +1386:Drivers/CMSIS/Include/core_cm4.h **** +1387:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR +1388:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR +1389:Drivers/CMSIS/Include/core_cm4.h **** +1390:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR +1391:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR +1392:Drivers/CMSIS/Include/core_cm4.h **** +1393:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR +1394:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR +1395:Drivers/CMSIS/Include/core_cm4.h **** +1396:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR +1397:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR + ARM GAS /tmp/ccGGrCD0.s page 26 + + +1398:Drivers/CMSIS/Include/core_cm4.h **** +1399:Drivers/CMSIS/Include/core_cm4.h **** /* Media and FP Feature Register 1 Definitions */ +1400:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR +1401:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR +1402:Drivers/CMSIS/Include/core_cm4.h **** +1403:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR +1404:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR +1405:Drivers/CMSIS/Include/core_cm4.h **** +1406:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR +1407:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR +1408:Drivers/CMSIS/Include/core_cm4.h **** +1409:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR +1410:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR +1411:Drivers/CMSIS/Include/core_cm4.h **** +1412:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_FPU */ +1413:Drivers/CMSIS/Include/core_cm4.h **** +1414:Drivers/CMSIS/Include/core_cm4.h **** +1415:Drivers/CMSIS/Include/core_cm4.h **** /** +1416:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1417:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) +1418:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Core Debug Registers +1419:Drivers/CMSIS/Include/core_cm4.h **** @{ +1420:Drivers/CMSIS/Include/core_cm4.h **** */ +1421:Drivers/CMSIS/Include/core_cm4.h **** +1422:Drivers/CMSIS/Include/core_cm4.h **** /** +1423:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Core Debug Register (CoreDebug). +1424:Drivers/CMSIS/Include/core_cm4.h **** */ +1425:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1426:Drivers/CMSIS/Include/core_cm4.h **** { +1427:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status +1428:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Reg +1429:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Registe +1430:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Cont +1431:Drivers/CMSIS/Include/core_cm4.h **** } CoreDebug_Type; +1432:Drivers/CMSIS/Include/core_cm4.h **** +1433:Drivers/CMSIS/Include/core_cm4.h **** /* Debug Halting Control and Status Register Definitions */ +1434:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< Core +1435:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< Core +1436:Drivers/CMSIS/Include/core_cm4.h **** +1437:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< Core +1438:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< Core +1439:Drivers/CMSIS/Include/core_cm4.h **** +1440:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< Core +1441:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< Core +1442:Drivers/CMSIS/Include/core_cm4.h **** +1443:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< Core +1444:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< Core +1445:Drivers/CMSIS/Include/core_cm4.h **** +1446:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core +1447:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core +1448:Drivers/CMSIS/Include/core_cm4.h **** +1449:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< Core +1450:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< Core +1451:Drivers/CMSIS/Include/core_cm4.h **** +1452:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< Core +1453:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< Core +1454:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccGGrCD0.s page 27 + + +1455:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< Core +1456:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< Core +1457:Drivers/CMSIS/Include/core_cm4.h **** +1458:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< Core +1459:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< Core +1460:Drivers/CMSIS/Include/core_cm4.h **** +1461:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< Core +1462:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< Core +1463:Drivers/CMSIS/Include/core_cm4.h **** +1464:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< Core +1465:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< Core +1466:Drivers/CMSIS/Include/core_cm4.h **** +1467:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< Core +1468:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< Core +1469:Drivers/CMSIS/Include/core_cm4.h **** +1470:Drivers/CMSIS/Include/core_cm4.h **** /* Debug Core Register Selector Register Definitions */ +1471:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< Core +1472:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< Core +1473:Drivers/CMSIS/Include/core_cm4.h **** +1474:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core +1475:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core +1476:Drivers/CMSIS/Include/core_cm4.h **** +1477:Drivers/CMSIS/Include/core_cm4.h **** /* Debug Exception and Monitor Control Register Definitions */ +1478:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< Core +1479:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< Core +1480:Drivers/CMSIS/Include/core_cm4.h **** +1481:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< Core +1482:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< Core +1483:Drivers/CMSIS/Include/core_cm4.h **** +1484:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< Core +1485:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< Core +1486:Drivers/CMSIS/Include/core_cm4.h **** +1487:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< Core +1488:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< Core +1489:Drivers/CMSIS/Include/core_cm4.h **** +1490:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< Core +1491:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< Core +1492:Drivers/CMSIS/Include/core_cm4.h **** +1493:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< Core +1494:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< Core +1495:Drivers/CMSIS/Include/core_cm4.h **** +1496:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< Core +1497:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< Core +1498:Drivers/CMSIS/Include/core_cm4.h **** +1499:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< Core +1500:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< Core +1501:Drivers/CMSIS/Include/core_cm4.h **** +1502:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< Core +1503:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< Core +1504:Drivers/CMSIS/Include/core_cm4.h **** +1505:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< Core +1506:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< Core +1507:Drivers/CMSIS/Include/core_cm4.h **** +1508:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< Core +1509:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< Core +1510:Drivers/CMSIS/Include/core_cm4.h **** +1511:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< Core + ARM GAS /tmp/ccGGrCD0.s page 28 + + +1512:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< Core +1513:Drivers/CMSIS/Include/core_cm4.h **** +1514:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< Core +1515:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< Core +1516:Drivers/CMSIS/Include/core_cm4.h **** +1517:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_CoreDebug */ +1518:Drivers/CMSIS/Include/core_cm4.h **** +1519:Drivers/CMSIS/Include/core_cm4.h **** +1520:Drivers/CMSIS/Include/core_cm4.h **** /** +1521:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1522:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_core_bitfield Core register bit field macros +1523:Drivers/CMSIS/Include/core_cm4.h **** \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). +1524:Drivers/CMSIS/Include/core_cm4.h **** @{ +1525:Drivers/CMSIS/Include/core_cm4.h **** */ +1526:Drivers/CMSIS/Include/core_cm4.h **** +1527:Drivers/CMSIS/Include/core_cm4.h **** /** +1528:Drivers/CMSIS/Include/core_cm4.h **** \brief Mask and shift a bit field value for use in a register bit range. +1529:Drivers/CMSIS/Include/core_cm4.h **** \param[in] field Name of the register bit field. +1530:Drivers/CMSIS/Include/core_cm4.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. +1531:Drivers/CMSIS/Include/core_cm4.h **** \return Masked and shifted value. +1532:Drivers/CMSIS/Include/core_cm4.h **** */ +1533:Drivers/CMSIS/Include/core_cm4.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) +1534:Drivers/CMSIS/Include/core_cm4.h **** +1535:Drivers/CMSIS/Include/core_cm4.h **** /** +1536:Drivers/CMSIS/Include/core_cm4.h **** \brief Mask and shift a register value to extract a bit filed value. +1537:Drivers/CMSIS/Include/core_cm4.h **** \param[in] field Name of the register bit field. +1538:Drivers/CMSIS/Include/core_cm4.h **** \param[in] value Value of register. This parameter is interpreted as an uint32_t type. +1539:Drivers/CMSIS/Include/core_cm4.h **** \return Masked and shifted bit field value. +1540:Drivers/CMSIS/Include/core_cm4.h **** */ +1541:Drivers/CMSIS/Include/core_cm4.h **** #define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) +1542:Drivers/CMSIS/Include/core_cm4.h **** +1543:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_core_bitfield */ +1544:Drivers/CMSIS/Include/core_cm4.h **** +1545:Drivers/CMSIS/Include/core_cm4.h **** +1546:Drivers/CMSIS/Include/core_cm4.h **** /** +1547:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1548:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_core_base Core Definitions +1549:Drivers/CMSIS/Include/core_cm4.h **** \brief Definitions for base addresses, unions, and structures. +1550:Drivers/CMSIS/Include/core_cm4.h **** @{ +1551:Drivers/CMSIS/Include/core_cm4.h **** */ +1552:Drivers/CMSIS/Include/core_cm4.h **** +1553:Drivers/CMSIS/Include/core_cm4.h **** /* Memory mapping of Core Hardware */ +1554:Drivers/CMSIS/Include/core_cm4.h **** #define SCS_BASE (0xE000E000UL) /*!< System Control Space Bas +1555:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +1556:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +1557:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +1558:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address +1559:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +1560:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +1561:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Bas +1562:Drivers/CMSIS/Include/core_cm4.h **** +1563:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register +1564:Drivers/CMSIS/Include/core_cm4.h **** #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct +1565:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration st +1566:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc +1567:Drivers/CMSIS/Include/core_cm4.h **** #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct +1568:Drivers/CMSIS/Include/core_cm4.h **** #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct + ARM GAS /tmp/ccGGrCD0.s page 29 + + +1569:Drivers/CMSIS/Include/core_cm4.h **** #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct +1570:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration +1571:Drivers/CMSIS/Include/core_cm4.h **** +1572:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +1573:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit * +1574:Drivers/CMSIS/Include/core_cm4.h **** #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit * +1575:Drivers/CMSIS/Include/core_cm4.h **** #endif +1576:Drivers/CMSIS/Include/core_cm4.h **** +1577:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ +1578:Drivers/CMSIS/Include/core_cm4.h **** #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ +1579:Drivers/CMSIS/Include/core_cm4.h **** +1580:Drivers/CMSIS/Include/core_cm4.h **** /*@} */ +1581:Drivers/CMSIS/Include/core_cm4.h **** +1582:Drivers/CMSIS/Include/core_cm4.h **** +1583:Drivers/CMSIS/Include/core_cm4.h **** +1584:Drivers/CMSIS/Include/core_cm4.h **** /******************************************************************************* +1585:Drivers/CMSIS/Include/core_cm4.h **** * Hardware Abstraction Layer +1586:Drivers/CMSIS/Include/core_cm4.h **** Core Function Interface contains: +1587:Drivers/CMSIS/Include/core_cm4.h **** - Core NVIC Functions +1588:Drivers/CMSIS/Include/core_cm4.h **** - Core SysTick Functions +1589:Drivers/CMSIS/Include/core_cm4.h **** - Core Debug Functions +1590:Drivers/CMSIS/Include/core_cm4.h **** - Core Register Access Functions +1591:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ +1592:Drivers/CMSIS/Include/core_cm4.h **** /** +1593:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +1594:Drivers/CMSIS/Include/core_cm4.h **** */ +1595:Drivers/CMSIS/Include/core_cm4.h **** +1596:Drivers/CMSIS/Include/core_cm4.h **** +1597:Drivers/CMSIS/Include/core_cm4.h **** +1598:Drivers/CMSIS/Include/core_cm4.h **** /* ########################## NVIC functions #################################### */ +1599:Drivers/CMSIS/Include/core_cm4.h **** /** +1600:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_Core_FunctionInterface +1601:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_NVICFunctions NVIC Functions +1602:Drivers/CMSIS/Include/core_cm4.h **** \brief Functions that manage interrupts and exceptions via the NVIC. +1603:Drivers/CMSIS/Include/core_cm4.h **** @{ +1604:Drivers/CMSIS/Include/core_cm4.h **** */ +1605:Drivers/CMSIS/Include/core_cm4.h **** +1606:Drivers/CMSIS/Include/core_cm4.h **** #ifdef CMSIS_NVIC_VIRTUAL +1607:Drivers/CMSIS/Include/core_cm4.h **** #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE +1608:Drivers/CMSIS/Include/core_cm4.h **** #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" +1609:Drivers/CMSIS/Include/core_cm4.h **** #endif +1610:Drivers/CMSIS/Include/core_cm4.h **** #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +1611:Drivers/CMSIS/Include/core_cm4.h **** #else +1612:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping +1613:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping +1614:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_EnableIRQ __NVIC_EnableIRQ +1615:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ +1616:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_DisableIRQ __NVIC_DisableIRQ +1617:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ +1618:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ +1619:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +1620:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetActive __NVIC_GetActive +1621:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetPriority __NVIC_SetPriority +1622:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetPriority __NVIC_GetPriority +1623:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SystemReset __NVIC_SystemReset +1624:Drivers/CMSIS/Include/core_cm4.h **** #endif /* CMSIS_NVIC_VIRTUAL */ +1625:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccGGrCD0.s page 30 + + +1626:Drivers/CMSIS/Include/core_cm4.h **** #ifdef CMSIS_VECTAB_VIRTUAL +1627:Drivers/CMSIS/Include/core_cm4.h **** #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE +1628:Drivers/CMSIS/Include/core_cm4.h **** #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" +1629:Drivers/CMSIS/Include/core_cm4.h **** #endif +1630:Drivers/CMSIS/Include/core_cm4.h **** #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +1631:Drivers/CMSIS/Include/core_cm4.h **** #else +1632:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetVector __NVIC_SetVector +1633:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetVector __NVIC_GetVector +1634:Drivers/CMSIS/Include/core_cm4.h **** #endif /* (CMSIS_VECTAB_VIRTUAL) */ +1635:Drivers/CMSIS/Include/core_cm4.h **** +1636:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_USER_IRQ_OFFSET 16 +1637:Drivers/CMSIS/Include/core_cm4.h **** +1638:Drivers/CMSIS/Include/core_cm4.h **** +1639:Drivers/CMSIS/Include/core_cm4.h **** /* The following EXC_RETURN values are saved the LR on exception entry */ +1640:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after ret +1641:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after retu +1642:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after retu +1643:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after ret +1644:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu +1645:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu +1646:Drivers/CMSIS/Include/core_cm4.h **** +1647:Drivers/CMSIS/Include/core_cm4.h **** +1648:Drivers/CMSIS/Include/core_cm4.h **** /** +1649:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Priority Grouping +1650:Drivers/CMSIS/Include/core_cm4.h **** \details Sets the priority grouping field using the required unlock sequence. +1651:Drivers/CMSIS/Include/core_cm4.h **** The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. +1652:Drivers/CMSIS/Include/core_cm4.h **** Only values from 0..7 are used. +1653:Drivers/CMSIS/Include/core_cm4.h **** In case of a conflict between priority grouping and available +1654:Drivers/CMSIS/Include/core_cm4.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. +1655:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Priority grouping field. +1656:Drivers/CMSIS/Include/core_cm4.h **** */ +1657:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +1658:Drivers/CMSIS/Include/core_cm4.h **** { +1659:Drivers/CMSIS/Include/core_cm4.h **** uint32_t reg_value; +1660:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 a +1661:Drivers/CMSIS/Include/core_cm4.h **** +1662:Drivers/CMSIS/Include/core_cm4.h **** reg_value = SCB->AIRCR; /* read old register +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan +1664:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | +1665:Drivers/CMSIS/Include/core_cm4.h **** ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | +1666:Drivers/CMSIS/Include/core_cm4.h **** (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key a +1667:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = reg_value; +1668:Drivers/CMSIS/Include/core_cm4.h **** } +1669:Drivers/CMSIS/Include/core_cm4.h **** +1670:Drivers/CMSIS/Include/core_cm4.h **** +1671:Drivers/CMSIS/Include/core_cm4.h **** /** +1672:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Priority Grouping +1673:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the priority grouping field from the NVIC Interrupt Controller. +1674:Drivers/CMSIS/Include/core_cm4.h **** \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). +1675:Drivers/CMSIS/Include/core_cm4.h **** */ +1676:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +1677:Drivers/CMSIS/Include/core_cm4.h **** { +1678:Drivers/CMSIS/Include/core_cm4.h **** return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +1679:Drivers/CMSIS/Include/core_cm4.h **** } +1680:Drivers/CMSIS/Include/core_cm4.h **** +1681:Drivers/CMSIS/Include/core_cm4.h **** +1682:Drivers/CMSIS/Include/core_cm4.h **** /** + ARM GAS /tmp/ccGGrCD0.s page 31 + + +1683:Drivers/CMSIS/Include/core_cm4.h **** \brief Enable Interrupt +1684:Drivers/CMSIS/Include/core_cm4.h **** \details Enables a device specific interrupt in the NVIC interrupt controller. +1685:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1686:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1687:Drivers/CMSIS/Include/core_cm4.h **** */ +1688:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +1689:Drivers/CMSIS/Include/core_cm4.h **** { +1690:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1691:Drivers/CMSIS/Include/core_cm4.h **** { +1692:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); +1693:Drivers/CMSIS/Include/core_cm4.h **** } +1694:Drivers/CMSIS/Include/core_cm4.h **** } +1695:Drivers/CMSIS/Include/core_cm4.h **** +1696:Drivers/CMSIS/Include/core_cm4.h **** +1697:Drivers/CMSIS/Include/core_cm4.h **** /** +1698:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Enable status +1699:Drivers/CMSIS/Include/core_cm4.h **** \details Returns a device specific interrupt enable status from the NVIC interrupt controller. +1700:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1701:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Interrupt is not enabled. +1702:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Interrupt is enabled. +1703:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1704:Drivers/CMSIS/Include/core_cm4.h **** */ +1705:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +1706:Drivers/CMSIS/Include/core_cm4.h **** { +1707:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1708:Drivers/CMSIS/Include/core_cm4.h **** { +1709:Drivers/CMSIS/Include/core_cm4.h **** return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL) +1710:Drivers/CMSIS/Include/core_cm4.h **** } +1711:Drivers/CMSIS/Include/core_cm4.h **** else +1712:Drivers/CMSIS/Include/core_cm4.h **** { +1713:Drivers/CMSIS/Include/core_cm4.h **** return(0U); +1714:Drivers/CMSIS/Include/core_cm4.h **** } +1715:Drivers/CMSIS/Include/core_cm4.h **** } +1716:Drivers/CMSIS/Include/core_cm4.h **** +1717:Drivers/CMSIS/Include/core_cm4.h **** +1718:Drivers/CMSIS/Include/core_cm4.h **** /** +1719:Drivers/CMSIS/Include/core_cm4.h **** \brief Disable Interrupt +1720:Drivers/CMSIS/Include/core_cm4.h **** \details Disables a device specific interrupt in the NVIC interrupt controller. +1721:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1722:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1723:Drivers/CMSIS/Include/core_cm4.h **** */ +1724:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +1725:Drivers/CMSIS/Include/core_cm4.h **** { + 30 .loc 2 1725 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. +1726:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) + 35 .loc 2 1726 3 view .LVU1 + 36 .loc 2 1726 6 is_stmt 0 view .LVU2 + 37 0000 0028 cmp r0, #0 + 38 .loc 2 1726 6 view .LVU3 + 39 0002 0CDB blt .L1 +1727:Drivers/CMSIS/Include/core_cm4.h **** { +1728:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 40 .loc 2 1728 5 is_stmt 1 view .LVU4 + ARM GAS /tmp/ccGGrCD0.s page 32 + + + 41 .loc 2 1728 81 is_stmt 0 view .LVU5 + 42 0004 00F01F02 and r2, r0, #31 + 43 .loc 2 1728 34 view .LVU6 + 44 0008 4009 lsrs r0, r0, #5 + 45 .LVL1: + 46 .loc 2 1728 45 view .LVU7 + 47 000a 0123 movs r3, #1 + 48 000c 9340 lsls r3, r3, r2 + 49 .loc 2 1728 43 view .LVU8 + 50 000e 2030 adds r0, r0, #32 + 51 0010 034A ldr r2, .L3 + 52 0012 42F82030 str r3, [r2, r0, lsl #2] +1729:Drivers/CMSIS/Include/core_cm4.h **** __DSB(); + 53 .loc 2 1729 5 is_stmt 1 view .LVU9 + 54 .LBB32: + 55 .LBI32: + 56 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + ARM GAS /tmp/ccGGrCD0.s page 33 + + + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + ARM GAS /tmp/ccGGrCD0.s page 34 + + + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccGGrCD0.s page 35 + + + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccGGrCD0.s page 36 + + + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccGGrCD0.s page 37 + + + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccGGrCD0.s page 38 + + + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + ARM GAS /tmp/ccGGrCD0.s page 39 + + + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + ARM GAS /tmp/ccGGrCD0.s page 40 + + + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccGGrCD0.s page 41 + + + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + ARM GAS /tmp/ccGGrCD0.s page 42 + + + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccGGrCD0.s page 43 + + + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccGGrCD0.s page 44 + + + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccGGrCD0.s page 45 + + + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccGGrCD0.s page 46 + + + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccGGrCD0.s page 47 + + + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 57 .loc 3 877 27 view .LVU10 + 58 .LBB33: + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 59 .loc 3 879 3 view .LVU11 + 60 .syntax unified + 61 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 62 0016 BFF34F8F dsb 0xF + 63 @ 0 "" 2 + 64 .thumb + 65 .syntax unified + 66 .LBE33: + 67 .LBE32: +1730:Drivers/CMSIS/Include/core_cm4.h **** __ISB(); + 68 .loc 2 1730 5 view .LVU12 + 69 .LBB34: + 70 .LBI34: + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccGGrCD0.s page 48 + + + 71 .loc 3 866 27 view .LVU13 + 72 .LBB35: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 73 .loc 3 868 3 view .LVU14 + 74 .syntax unified + 75 @ 868 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 76 001a BFF36F8F isb 0xF + 77 @ 0 "" 2 + 78 .thumb + 79 .syntax unified + 80 .L1: + 81 .LBE35: + 82 .LBE34: +1731:Drivers/CMSIS/Include/core_cm4.h **** } +1732:Drivers/CMSIS/Include/core_cm4.h **** } + 83 .loc 2 1732 1 is_stmt 0 view .LVU15 + 84 001e 7047 bx lr + 85 .L4: + 86 .align 2 + 87 .L3: + 88 0020 00E100E0 .word -536813312 + 89 .cfi_endproc + 90 .LFE106: + 92 .section .text.__NVIC_SetPriority,"ax",%progbits + 93 .align 1 + 94 .syntax unified + 95 .thumb + 96 .thumb_func + 98 __NVIC_SetPriority: + 99 .LVL2: + 100 .LFB111: +1733:Drivers/CMSIS/Include/core_cm4.h **** +1734:Drivers/CMSIS/Include/core_cm4.h **** +1735:Drivers/CMSIS/Include/core_cm4.h **** /** +1736:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Pending Interrupt +1737:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the NVIC pending register and returns the pending bit for the specified device spe +1738:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1739:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Interrupt status is not pending. +1740:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Interrupt status is pending. +1741:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1742:Drivers/CMSIS/Include/core_cm4.h **** */ +1743:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +1744:Drivers/CMSIS/Include/core_cm4.h **** { +1745:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1746:Drivers/CMSIS/Include/core_cm4.h **** { +1747:Drivers/CMSIS/Include/core_cm4.h **** return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL) +1748:Drivers/CMSIS/Include/core_cm4.h **** } +1749:Drivers/CMSIS/Include/core_cm4.h **** else +1750:Drivers/CMSIS/Include/core_cm4.h **** { +1751:Drivers/CMSIS/Include/core_cm4.h **** return(0U); +1752:Drivers/CMSIS/Include/core_cm4.h **** } +1753:Drivers/CMSIS/Include/core_cm4.h **** } +1754:Drivers/CMSIS/Include/core_cm4.h **** +1755:Drivers/CMSIS/Include/core_cm4.h **** +1756:Drivers/CMSIS/Include/core_cm4.h **** /** +1757:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Pending Interrupt +1758:Drivers/CMSIS/Include/core_cm4.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + ARM GAS /tmp/ccGGrCD0.s page 49 + + +1759:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1760:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1761:Drivers/CMSIS/Include/core_cm4.h **** */ +1762:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +1763:Drivers/CMSIS/Include/core_cm4.h **** { +1764:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1765:Drivers/CMSIS/Include/core_cm4.h **** { +1766:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); +1767:Drivers/CMSIS/Include/core_cm4.h **** } +1768:Drivers/CMSIS/Include/core_cm4.h **** } +1769:Drivers/CMSIS/Include/core_cm4.h **** +1770:Drivers/CMSIS/Include/core_cm4.h **** +1771:Drivers/CMSIS/Include/core_cm4.h **** /** +1772:Drivers/CMSIS/Include/core_cm4.h **** \brief Clear Pending Interrupt +1773:Drivers/CMSIS/Include/core_cm4.h **** \details Clears the pending bit of a device specific interrupt in the NVIC pending register. +1774:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1775:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1776:Drivers/CMSIS/Include/core_cm4.h **** */ +1777:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +1778:Drivers/CMSIS/Include/core_cm4.h **** { +1779:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1780:Drivers/CMSIS/Include/core_cm4.h **** { +1781:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); +1782:Drivers/CMSIS/Include/core_cm4.h **** } +1783:Drivers/CMSIS/Include/core_cm4.h **** } +1784:Drivers/CMSIS/Include/core_cm4.h **** +1785:Drivers/CMSIS/Include/core_cm4.h **** +1786:Drivers/CMSIS/Include/core_cm4.h **** /** +1787:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Active Interrupt +1788:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the active register in the NVIC and returns the active bit for the device specific +1789:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1790:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Interrupt status is not active. +1791:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Interrupt status is active. +1792:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1793:Drivers/CMSIS/Include/core_cm4.h **** */ +1794:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +1795:Drivers/CMSIS/Include/core_cm4.h **** { +1796:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1797:Drivers/CMSIS/Include/core_cm4.h **** { +1798:Drivers/CMSIS/Include/core_cm4.h **** return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL) +1799:Drivers/CMSIS/Include/core_cm4.h **** } +1800:Drivers/CMSIS/Include/core_cm4.h **** else +1801:Drivers/CMSIS/Include/core_cm4.h **** { +1802:Drivers/CMSIS/Include/core_cm4.h **** return(0U); +1803:Drivers/CMSIS/Include/core_cm4.h **** } +1804:Drivers/CMSIS/Include/core_cm4.h **** } +1805:Drivers/CMSIS/Include/core_cm4.h **** +1806:Drivers/CMSIS/Include/core_cm4.h **** +1807:Drivers/CMSIS/Include/core_cm4.h **** /** +1808:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Interrupt Priority +1809:Drivers/CMSIS/Include/core_cm4.h **** \details Sets the priority of a device specific interrupt or a processor exception. +1810:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1811:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1812:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number. +1813:Drivers/CMSIS/Include/core_cm4.h **** \param [in] priority Priority to set. +1814:Drivers/CMSIS/Include/core_cm4.h **** \note The priority cannot be set for every processor exception. +1815:Drivers/CMSIS/Include/core_cm4.h **** */ + ARM GAS /tmp/ccGGrCD0.s page 50 + + +1816:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +1817:Drivers/CMSIS/Include/core_cm4.h **** { + 101 .loc 2 1817 1 is_stmt 1 view -0 + 102 .cfi_startproc + 103 @ args = 0, pretend = 0, frame = 0 + 104 @ frame_needed = 0, uses_anonymous_args = 0 + 105 @ link register save eliminated. +1818:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) + 106 .loc 2 1818 3 view .LVU17 + 107 .loc 2 1818 6 is_stmt 0 view .LVU18 + 108 0000 0028 cmp r0, #0 + 109 .loc 2 1818 6 view .LVU19 + 110 0002 08DB blt .L6 +1819:Drivers/CMSIS/Include/core_cm4.h **** { +1820:Drivers/CMSIS/Include/core_cm4.h **** NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (u + 111 .loc 2 1820 5 is_stmt 1 view .LVU20 + 112 .loc 2 1820 48 is_stmt 0 view .LVU21 + 113 0004 0901 lsls r1, r1, #4 + 114 .LVL3: + 115 .loc 2 1820 48 view .LVU22 + 116 0006 C9B2 uxtb r1, r1 + 117 .loc 2 1820 46 view .LVU23 + 118 0008 00F16040 add r0, r0, #-536870912 + 119 .LVL4: + 120 .loc 2 1820 46 view .LVU24 + 121 000c 00F56140 add r0, r0, #57600 + 122 .LVL5: + 123 .loc 2 1820 46 view .LVU25 + 124 0010 80F80013 strb r1, [r0, #768] + 125 0014 7047 bx lr + 126 .LVL6: + 127 .L6: +1821:Drivers/CMSIS/Include/core_cm4.h **** } +1822:Drivers/CMSIS/Include/core_cm4.h **** else +1823:Drivers/CMSIS/Include/core_cm4.h **** { +1824:Drivers/CMSIS/Include/core_cm4.h **** SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (u + 128 .loc 2 1824 5 is_stmt 1 view .LVU26 + 129 .loc 2 1824 32 is_stmt 0 view .LVU27 + 130 0016 00F00F00 and r0, r0, #15 + 131 .LVL7: + 132 .loc 2 1824 48 view .LVU28 + 133 001a 0901 lsls r1, r1, #4 + 134 .LVL8: + 135 .loc 2 1824 48 view .LVU29 + 136 001c C9B2 uxtb r1, r1 + 137 .loc 2 1824 46 view .LVU30 + 138 001e 014B ldr r3, .L8 + 139 0020 1954 strb r1, [r3, r0] +1825:Drivers/CMSIS/Include/core_cm4.h **** } +1826:Drivers/CMSIS/Include/core_cm4.h **** } + 140 .loc 2 1826 1 view .LVU31 + 141 0022 7047 bx lr + 142 .L9: + 143 .align 2 + 144 .L8: + 145 0024 14ED00E0 .word -536810220 + 146 .cfi_endproc + ARM GAS /tmp/ccGGrCD0.s page 51 + + + 147 .LFE111: + 149 .section .text.__NVIC_GetPriority,"ax",%progbits + 150 .align 1 + 151 .syntax unified + 152 .thumb + 153 .thumb_func + 155 __NVIC_GetPriority: + 156 .LVL9: + 157 .LFB112: +1827:Drivers/CMSIS/Include/core_cm4.h **** +1828:Drivers/CMSIS/Include/core_cm4.h **** +1829:Drivers/CMSIS/Include/core_cm4.h **** /** +1830:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Priority +1831:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the priority of a device specific interrupt or a processor exception. +1832:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1833:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1834:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number. +1835:Drivers/CMSIS/Include/core_cm4.h **** \return Interrupt Priority. +1836:Drivers/CMSIS/Include/core_cm4.h **** Value is aligned automatically to the implemented priority bits of the microc +1837:Drivers/CMSIS/Include/core_cm4.h **** */ +1838:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +1839:Drivers/CMSIS/Include/core_cm4.h **** { + 158 .loc 2 1839 1 is_stmt 1 view -0 + 159 .cfi_startproc + 160 @ args = 0, pretend = 0, frame = 0 + 161 @ frame_needed = 0, uses_anonymous_args = 0 + 162 @ link register save eliminated. +1840:Drivers/CMSIS/Include/core_cm4.h **** +1841:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) + 163 .loc 2 1841 3 view .LVU33 + 164 .loc 2 1841 6 is_stmt 0 view .LVU34 + 165 0000 0028 cmp r0, #0 + 166 .loc 2 1841 6 view .LVU35 + 167 0002 07DB blt .L11 +1842:Drivers/CMSIS/Include/core_cm4.h **** { +1843:Drivers/CMSIS/Include/core_cm4.h **** return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + 168 .loc 2 1843 5 is_stmt 1 view .LVU36 + 169 .loc 2 1843 31 is_stmt 0 view .LVU37 + 170 0004 00F16040 add r0, r0, #-536870912 + 171 .LVL10: + 172 .loc 2 1843 31 view .LVU38 + 173 0008 00F56140 add r0, r0, #57600 + 174 .LVL11: + 175 .loc 2 1843 31 view .LVU39 + 176 000c 90F80003 ldrb r0, [r0, #768] @ zero_extendqisi2 + 177 .LVL12: + 178 .loc 2 1843 64 view .LVU40 + 179 0010 0009 lsrs r0, r0, #4 + 180 0012 7047 bx lr + 181 .L11: +1844:Drivers/CMSIS/Include/core_cm4.h **** } +1845:Drivers/CMSIS/Include/core_cm4.h **** else +1846:Drivers/CMSIS/Include/core_cm4.h **** { +1847:Drivers/CMSIS/Include/core_cm4.h **** return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + 182 .loc 2 1847 5 is_stmt 1 view .LVU41 + 183 .loc 2 1847 50 is_stmt 0 view .LVU42 + 184 0014 00F00F00 and r0, r0, #15 + ARM GAS /tmp/ccGGrCD0.s page 52 + + + 185 .loc 2 1847 31 view .LVU43 + 186 0018 014B ldr r3, .L13 + 187 001a 185C ldrb r0, [r3, r0] @ zero_extendqisi2 + 188 .loc 2 1847 64 view .LVU44 + 189 001c 0009 lsrs r0, r0, #4 +1848:Drivers/CMSIS/Include/core_cm4.h **** } +1849:Drivers/CMSIS/Include/core_cm4.h **** } + 190 .loc 2 1849 1 view .LVU45 + 191 001e 7047 bx lr + 192 .L14: + 193 .align 2 + 194 .L13: + 195 0020 14ED00E0 .word -536810220 + 196 .cfi_endproc + 197 .LFE112: + 199 .section .text.NVIC_EncodePriority,"ax",%progbits + 200 .align 1 + 201 .syntax unified + 202 .thumb + 203 .thumb_func + 205 NVIC_EncodePriority: + 206 .LVL13: + 207 .LFB113: +1850:Drivers/CMSIS/Include/core_cm4.h **** +1851:Drivers/CMSIS/Include/core_cm4.h **** +1852:Drivers/CMSIS/Include/core_cm4.h **** /** +1853:Drivers/CMSIS/Include/core_cm4.h **** \brief Encode Priority +1854:Drivers/CMSIS/Include/core_cm4.h **** \details Encodes the priority for an interrupt with the given priority group, +1855:Drivers/CMSIS/Include/core_cm4.h **** preemptive priority value, and subpriority value. +1856:Drivers/CMSIS/Include/core_cm4.h **** In case of a conflict between priority grouping and available +1857:Drivers/CMSIS/Include/core_cm4.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. +1858:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Used priority group. +1859:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PreemptPriority Preemptive priority value (starting from 0). +1860:Drivers/CMSIS/Include/core_cm4.h **** \param [in] SubPriority Subpriority value (starting from 0). +1861:Drivers/CMSIS/Include/core_cm4.h **** \return Encoded priority. Value can be used in the function \ref NVIC_SetP +1862:Drivers/CMSIS/Include/core_cm4.h **** */ +1863:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uin +1864:Drivers/CMSIS/Include/core_cm4.h **** { + 208 .loc 2 1864 1 is_stmt 1 view -0 + 209 .cfi_startproc + 210 @ args = 0, pretend = 0, frame = 0 + 211 @ frame_needed = 0, uses_anonymous_args = 0 + 212 .loc 2 1864 1 is_stmt 0 view .LVU47 + 213 0000 00B5 push {lr} + 214 .cfi_def_cfa_offset 4 + 215 .cfi_offset 14, -4 +1865:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 216 .loc 2 1865 3 is_stmt 1 view .LVU48 + 217 .loc 2 1865 12 is_stmt 0 view .LVU49 + 218 0002 00F00700 and r0, r0, #7 + 219 .LVL14: +1866:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PreemptPriorityBits; + 220 .loc 2 1866 3 is_stmt 1 view .LVU50 +1867:Drivers/CMSIS/Include/core_cm4.h **** uint32_t SubPriorityBits; + 221 .loc 2 1867 3 view .LVU51 +1868:Drivers/CMSIS/Include/core_cm4.h **** +1869:Drivers/CMSIS/Include/core_cm4.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + ARM GAS /tmp/ccGGrCD0.s page 53 + + + 222 .loc 2 1869 3 view .LVU52 + 223 .loc 2 1869 31 is_stmt 0 view .LVU53 + 224 0006 C0F1070C rsb ip, r0, #7 + 225 .loc 2 1869 23 view .LVU54 + 226 000a BCF1040F cmp ip, #4 + 227 000e 28BF it cs + 228 0010 4FF0040C movcs ip, #4 + 229 .LVL15: +1870:Drivers/CMSIS/Include/core_cm4.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 230 .loc 2 1870 3 is_stmt 1 view .LVU55 + 231 .loc 2 1870 44 is_stmt 0 view .LVU56 + 232 0014 031D adds r3, r0, #4 + 233 .loc 2 1870 109 view .LVU57 + 234 0016 062B cmp r3, #6 + 235 0018 0FD9 bls .L17 + 236 .loc 2 1870 109 discriminator 1 view .LVU58 + 237 001a C31E subs r3, r0, #3 + 238 .L16: + 239 .LVL16: +1871:Drivers/CMSIS/Include/core_cm4.h **** +1872:Drivers/CMSIS/Include/core_cm4.h **** return ( + 240 .loc 2 1872 3 is_stmt 1 view .LVU59 +1873:Drivers/CMSIS/Include/core_cm4.h **** ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits + 241 .loc 2 1873 30 is_stmt 0 view .LVU60 + 242 001c 4FF0FF3E mov lr, #-1 + 243 0020 0EFA0CF0 lsl r0, lr, ip + 244 .LVL17: + 245 .loc 2 1873 30 view .LVU61 + 246 0024 21EA0001 bic r1, r1, r0 + 247 .LVL18: + 248 .loc 2 1873 82 view .LVU62 + 249 0028 9940 lsls r1, r1, r3 +1874:Drivers/CMSIS/Include/core_cm4.h **** ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 250 .loc 2 1874 30 view .LVU63 + 251 002a 0EFA03FE lsl lr, lr, r3 + 252 002e 22EA0E02 bic r2, r2, lr + 253 .LVL19: +1875:Drivers/CMSIS/Include/core_cm4.h **** ); +1876:Drivers/CMSIS/Include/core_cm4.h **** } + 254 .loc 2 1876 1 view .LVU64 + 255 0032 41EA0200 orr r0, r1, r2 + 256 0036 5DF804FB ldr pc, [sp], #4 + 257 .LVL20: + 258 .L17: +1870:Drivers/CMSIS/Include/core_cm4.h **** + 259 .loc 2 1870 109 discriminator 2 view .LVU65 + 260 003a 0023 movs r3, #0 + 261 003c EEE7 b .L16 + 262 .cfi_endproc + 263 .LFE113: + 265 .section .text.NVIC_DecodePriority,"ax",%progbits + 266 .align 1 + 267 .syntax unified + 268 .thumb + 269 .thumb_func + 271 NVIC_DecodePriority: + 272 .LVL21: + ARM GAS /tmp/ccGGrCD0.s page 54 + + + 273 .LFB114: +1877:Drivers/CMSIS/Include/core_cm4.h **** +1878:Drivers/CMSIS/Include/core_cm4.h **** +1879:Drivers/CMSIS/Include/core_cm4.h **** /** +1880:Drivers/CMSIS/Include/core_cm4.h **** \brief Decode Priority +1881:Drivers/CMSIS/Include/core_cm4.h **** \details Decodes an interrupt priority value with a given priority group to +1882:Drivers/CMSIS/Include/core_cm4.h **** preemptive priority value and subpriority value. +1883:Drivers/CMSIS/Include/core_cm4.h **** In case of a conflict between priority grouping and available +1884:Drivers/CMSIS/Include/core_cm4.h **** priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. +1885:Drivers/CMSIS/Include/core_cm4.h **** \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC +1886:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Used priority group. +1887:Drivers/CMSIS/Include/core_cm4.h **** \param [out] pPreemptPriority Preemptive priority value (starting from 0). +1888:Drivers/CMSIS/Include/core_cm4.h **** \param [out] pSubPriority Subpriority value (starting from 0). +1889:Drivers/CMSIS/Include/core_cm4.h **** */ +1890:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* cons +1891:Drivers/CMSIS/Include/core_cm4.h **** { + 274 .loc 2 1891 1 is_stmt 1 view -0 + 275 .cfi_startproc + 276 @ args = 0, pretend = 0, frame = 0 + 277 @ frame_needed = 0, uses_anonymous_args = 0 + 278 .loc 2 1891 1 is_stmt 0 view .LVU67 + 279 0000 10B5 push {r4, lr} + 280 .cfi_def_cfa_offset 8 + 281 .cfi_offset 4, -8 + 282 .cfi_offset 14, -4 +1892:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 283 .loc 2 1892 3 is_stmt 1 view .LVU68 + 284 .loc 2 1892 12 is_stmt 0 view .LVU69 + 285 0002 01F00701 and r1, r1, #7 + 286 .LVL22: +1893:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PreemptPriorityBits; + 287 .loc 2 1893 3 is_stmt 1 view .LVU70 +1894:Drivers/CMSIS/Include/core_cm4.h **** uint32_t SubPriorityBits; + 288 .loc 2 1894 3 view .LVU71 +1895:Drivers/CMSIS/Include/core_cm4.h **** +1896:Drivers/CMSIS/Include/core_cm4.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 289 .loc 2 1896 3 view .LVU72 + 290 .loc 2 1896 31 is_stmt 0 view .LVU73 + 291 0006 C1F1070C rsb ip, r1, #7 + 292 .loc 2 1896 23 view .LVU74 + 293 000a BCF1040F cmp ip, #4 + 294 000e 28BF it cs + 295 0010 4FF0040C movcs ip, #4 + 296 .LVL23: +1897:Drivers/CMSIS/Include/core_cm4.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 297 .loc 2 1897 3 is_stmt 1 view .LVU75 + 298 .loc 2 1897 44 is_stmt 0 view .LVU76 + 299 0014 0C1D adds r4, r1, #4 + 300 .loc 2 1897 109 view .LVU77 + 301 0016 062C cmp r4, #6 + 302 0018 0FD9 bls .L21 + 303 .loc 2 1897 109 discriminator 1 view .LVU78 + 304 001a 0339 subs r1, r1, #3 + 305 .LVL24: + 306 .L20: +1898:Drivers/CMSIS/Include/core_cm4.h **** +1899:Drivers/CMSIS/Include/core_cm4.h **** *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1 + ARM GAS /tmp/ccGGrCD0.s page 55 + + + 307 .loc 2 1899 3 is_stmt 1 view .LVU79 + 308 .loc 2 1899 33 is_stmt 0 view .LVU80 + 309 001c 20FA01F4 lsr r4, r0, r1 + 310 .LVL25: + 311 .loc 2 1899 53 view .LVU81 + 312 0020 4FF0FF3E mov lr, #-1 + 313 0024 0EFA0CFC lsl ip, lr, ip + 314 .LVL26: + 315 .loc 2 1899 53 view .LVU82 + 316 0028 24EA0C04 bic r4, r4, ip + 317 .loc 2 1899 21 view .LVU83 + 318 002c 1460 str r4, [r2] +1900:Drivers/CMSIS/Include/core_cm4.h **** *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1 + 319 .loc 2 1900 3 is_stmt 1 view .LVU84 + 320 .loc 2 1900 53 is_stmt 0 view .LVU85 + 321 002e 0EFA01FE lsl lr, lr, r1 + 322 0032 20EA0E00 bic r0, r0, lr + 323 .LVL27: + 324 .loc 2 1900 21 view .LVU86 + 325 0036 1860 str r0, [r3] +1901:Drivers/CMSIS/Include/core_cm4.h **** } + 326 .loc 2 1901 1 view .LVU87 + 327 0038 10BD pop {r4, pc} + 328 .LVL28: + 329 .L21: +1897:Drivers/CMSIS/Include/core_cm4.h **** + 330 .loc 2 1897 109 discriminator 2 view .LVU88 + 331 003a 0021 movs r1, #0 + 332 .LVL29: +1897:Drivers/CMSIS/Include/core_cm4.h **** + 333 .loc 2 1897 109 discriminator 2 view .LVU89 + 334 003c EEE7 b .L20 + 335 .cfi_endproc + 336 .LFE114: + 338 .section .text.__NVIC_SystemReset,"ax",%progbits + 339 .align 1 + 340 .syntax unified + 341 .thumb + 342 .thumb_func + 344 __NVIC_SystemReset: + 345 .LFB117: +1902:Drivers/CMSIS/Include/core_cm4.h **** +1903:Drivers/CMSIS/Include/core_cm4.h **** +1904:Drivers/CMSIS/Include/core_cm4.h **** /** +1905:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Interrupt Vector +1906:Drivers/CMSIS/Include/core_cm4.h **** \details Sets an interrupt vector in SRAM based interrupt vector table. +1907:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1908:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1909:Drivers/CMSIS/Include/core_cm4.h **** VTOR must been relocated to SRAM before. +1910:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number +1911:Drivers/CMSIS/Include/core_cm4.h **** \param [in] vector Address of interrupt handler function +1912:Drivers/CMSIS/Include/core_cm4.h **** */ +1913:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +1914:Drivers/CMSIS/Include/core_cm4.h **** { +1915:Drivers/CMSIS/Include/core_cm4.h **** uint32_t *vectors = (uint32_t *)SCB->VTOR; +1916:Drivers/CMSIS/Include/core_cm4.h **** vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +1917:Drivers/CMSIS/Include/core_cm4.h **** } + ARM GAS /tmp/ccGGrCD0.s page 56 + + +1918:Drivers/CMSIS/Include/core_cm4.h **** +1919:Drivers/CMSIS/Include/core_cm4.h **** +1920:Drivers/CMSIS/Include/core_cm4.h **** /** +1921:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Vector +1922:Drivers/CMSIS/Include/core_cm4.h **** \details Reads an interrupt vector from interrupt vector table. +1923:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1924:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1925:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number. +1926:Drivers/CMSIS/Include/core_cm4.h **** \return Address of interrupt handler function +1927:Drivers/CMSIS/Include/core_cm4.h **** */ +1928:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +1929:Drivers/CMSIS/Include/core_cm4.h **** { +1930:Drivers/CMSIS/Include/core_cm4.h **** uint32_t *vectors = (uint32_t *)SCB->VTOR; +1931:Drivers/CMSIS/Include/core_cm4.h **** return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +1932:Drivers/CMSIS/Include/core_cm4.h **** } +1933:Drivers/CMSIS/Include/core_cm4.h **** +1934:Drivers/CMSIS/Include/core_cm4.h **** +1935:Drivers/CMSIS/Include/core_cm4.h **** /** +1936:Drivers/CMSIS/Include/core_cm4.h **** \brief System Reset +1937:Drivers/CMSIS/Include/core_cm4.h **** \details Initiates a system reset request to reset the MCU. +1938:Drivers/CMSIS/Include/core_cm4.h **** */ +1939:Drivers/CMSIS/Include/core_cm4.h **** __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +1940:Drivers/CMSIS/Include/core_cm4.h **** { + 346 .loc 2 1940 1 is_stmt 1 view -0 + 347 .cfi_startproc + 348 @ Volatile: function does not return. + 349 @ args = 0, pretend = 0, frame = 0 + 350 @ frame_needed = 0, uses_anonymous_args = 0 + 351 @ link register save eliminated. +1941:Drivers/CMSIS/Include/core_cm4.h **** __DSB(); /* Ensure all outstanding memor + 352 .loc 2 1941 3 view .LVU91 + 353 .LBB36: + 354 .LBI36: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 355 .loc 3 877 27 view .LVU92 + 356 .LBB37: + 357 .loc 3 879 3 view .LVU93 + 358 .syntax unified + 359 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 360 0000 BFF34F8F dsb 0xF + 361 @ 0 "" 2 + 362 .thumb + 363 .syntax unified + 364 .LBE37: + 365 .LBE36: +1942:Drivers/CMSIS/Include/core_cm4.h **** buffered write are completed +1943:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 366 .loc 2 1943 3 view .LVU94 +1944:Drivers/CMSIS/Include/core_cm4.h **** (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + 367 .loc 2 1944 32 is_stmt 0 view .LVU95 + 368 0004 0549 ldr r1, .L25 + 369 0006 CA68 ldr r2, [r1, #12] + 370 .loc 2 1944 40 view .LVU96 + 371 0008 02F4E062 and r2, r2, #1792 +1943:Drivers/CMSIS/Include/core_cm4.h **** (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + 372 .loc 2 1943 17 view .LVU97 + 373 000c 044B ldr r3, .L25+4 + ARM GAS /tmp/ccGGrCD0.s page 57 + + + 374 000e 1343 orrs r3, r3, r2 +1943:Drivers/CMSIS/Include/core_cm4.h **** (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + 375 .loc 2 1943 15 view .LVU98 + 376 0010 CB60 str r3, [r1, #12] +1945:Drivers/CMSIS/Include/core_cm4.h **** SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchange +1946:Drivers/CMSIS/Include/core_cm4.h **** __DSB(); /* Ensure completion of memory + 377 .loc 2 1946 3 is_stmt 1 view .LVU99 + 378 .LBB38: + 379 .LBI38: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 380 .loc 3 877 27 view .LVU100 + 381 .LBB39: + 382 .loc 3 879 3 view .LVU101 + 383 .syntax unified + 384 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 385 0012 BFF34F8F dsb 0xF + 386 @ 0 "" 2 + 387 .thumb + 388 .syntax unified + 389 .L24: + 390 .LBE39: + 391 .LBE38: +1947:Drivers/CMSIS/Include/core_cm4.h **** +1948:Drivers/CMSIS/Include/core_cm4.h **** for(;;) /* wait until reset */ + 392 .loc 2 1948 3 view .LVU102 +1949:Drivers/CMSIS/Include/core_cm4.h **** { +1950:Drivers/CMSIS/Include/core_cm4.h **** __NOP(); + 393 .loc 2 1950 5 discriminator 1 view .LVU103 + 394 .syntax unified + 395 @ 1950 "Drivers/CMSIS/Include/core_cm4.h" 1 + 396 0016 00BF nop + 397 @ 0 "" 2 +1948:Drivers/CMSIS/Include/core_cm4.h **** { + 398 .loc 2 1948 3 view .LVU104 + 399 .thumb + 400 .syntax unified + 401 0018 FDE7 b .L24 + 402 .L26: + 403 001a 00BF .align 2 + 404 .L25: + 405 001c 00ED00E0 .word -536810240 + 406 0020 0400FA05 .word 100270084 + 407 .cfi_endproc + 408 .LFE117: + 410 .section .text.HAL_NVIC_SetPriorityGrouping,"ax",%progbits + 411 .align 1 + 412 .global HAL_NVIC_SetPriorityGrouping + 413 .syntax unified + 414 .thumb + 415 .thumb_func + 417 HAL_NVIC_SetPriorityGrouping: + 418 .LVL30: + 419 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @file stm32f3xx_hal_cortex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @author MCD Application Team + ARM GAS /tmp/ccGGrCD0.s page 58 + + + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief CORTEX HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * functionalities of the CORTEX: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @verbatim + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ##### How to use this driver ##### + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** *** How to configure Interrupts using CORTEX HAL driver *** + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** =========================================================== + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** This section provides functions allowing to configure the NVIC interrupts (IRQ). + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** The Cortex-M4 exceptions are managed by CMSIS functions. + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() function + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible. + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** The pending IRQ priority will be managed only by the sub priority. + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -@- IRQ priority order (sorted by highest to lowest priority): + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+@) Lowest pre-emption priority + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+@) Lowest sub priority + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+@) Lowest hardware priority (IRQ number) + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** *** How to configure Systick using CORTEX HAL driver *** + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ======================================================== + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Setup SysTick Timer for time base + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** is a CMSIS function that: + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Configures the SysTick Reload register with value passed as function parameter. + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Configures the SysTick IRQ priority to the lowest value (0x0FU). + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Resets the SysTick Counter register. + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Enables the SysTick Interrupt. + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Starts the SysTick Counter. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** inside the stm32f3xx_hal_cortex.h file. + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) You can change the SysTick IRQ priority by calling the + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS funct + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + ARM GAS /tmp/ccGGrCD0.s page 59 + + + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula: + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Reload Value should not exceed 0xFFFFFF + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @endverbatim + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ****************************************************************************** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @attention + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * Copyright (c) 2016 STMicroelectronics. + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * All rights reserved. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * the root directory of this software component. + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ****************************************************************************** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Additional Tables: CORTEX_NVIC_Priority_Table + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** The table below gives the allowed values of the pre-emption priority and subpriority according + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================================ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================================ + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_0 | 0 | 0U-15 | + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 4 + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_1 | 0U-1 | 0U-7 | + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 3 + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_2 | 0U-3 | 0U-3 | + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 2 + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_3 | 0U-7 | 0U-1 | + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 1 + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_4 | 0U-15 | 0 | + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 0 + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================================ + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Includes ------------------------------------------------------------------*/ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #include "stm32f3xx_hal.h" + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief CORTEX CORTEX HAL module driver + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + ARM GAS /tmp/ccGGrCD0.s page 60 + + + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #ifdef HAL_CORTEX_MODULE_ENABLED + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private typedef -----------------------------------------------------------*/ + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private define ------------------------------------------------------------*/ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private macro -------------------------------------------------------------*/ + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private variables ---------------------------------------------------------*/ + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private function prototypes -----------------------------------------------*/ + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Exported functions ---------------------------------------------------------*/ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initialization and Configuration functions + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @verbatim + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ##### Initialization and de-initialization functions ##### + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** This section provides the CORTEX HAL driver functions allowing to configure Interrupts + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Systick functionalities + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @endverbatim + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Sets the priority grouping field (pre-emption priority and subpriority) + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * using the required unlock sequence. + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param PriorityGroup The priority grouping bits length. + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 4 bits for subpriority + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 3 bits for subpriority + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 2 bits for subpriority + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 1 bits for subpriority + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 0 bits for subpriority + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * The pending IRQ priority will be managed only by the subpriority. + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 420 .loc 1 169 1 view -0 + 421 .cfi_startproc + 422 @ args = 0, pretend = 0, frame = 0 + 423 @ frame_needed = 0, uses_anonymous_args = 0 + 424 @ link register save eliminated. + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + ARM GAS /tmp/ccGGrCD0.s page 61 + + + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); + 425 .loc 1 171 3 view .LVU106 + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SetPriorityGrouping(PriorityGroup); + 426 .loc 1 174 3 view .LVU107 + 427 .LBB40: + 428 .LBI40: +1657:Drivers/CMSIS/Include/core_cm4.h **** { + 429 .loc 2 1657 22 view .LVU108 + 430 .LBB41: +1659:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 a + 431 .loc 2 1659 3 view .LVU109 +1660:Drivers/CMSIS/Include/core_cm4.h **** + 432 .loc 2 1660 3 view .LVU110 +1662:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan + 433 .loc 2 1662 3 view .LVU111 +1662:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan + 434 .loc 2 1662 14 is_stmt 0 view .LVU112 + 435 0000 074A ldr r2, .L28 + 436 0002 D368 ldr r3, [r2, #12] + 437 .LVL31: +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | + 438 .loc 2 1663 3 is_stmt 1 view .LVU113 +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | + 439 .loc 2 1663 13 is_stmt 0 view .LVU114 + 440 0004 23F4E063 bic r3, r3, #1792 + 441 .LVL32: +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | + 442 .loc 2 1663 13 view .LVU115 + 443 0008 1B04 lsls r3, r3, #16 + 444 000a 1B0C lsrs r3, r3, #16 + 445 .LVL33: +1664:Drivers/CMSIS/Include/core_cm4.h **** ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 446 .loc 2 1664 3 is_stmt 1 view .LVU116 +1666:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = reg_value; + 447 .loc 2 1666 35 is_stmt 0 view .LVU117 + 448 000c 0002 lsls r0, r0, #8 + 449 .LVL34: +1666:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = reg_value; + 450 .loc 2 1666 35 view .LVU118 + 451 000e 00F4E060 and r0, r0, #1792 +1665:Drivers/CMSIS/Include/core_cm4.h **** (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key a + 452 .loc 2 1665 62 view .LVU119 + 453 0012 0343 orrs r3, r3, r0 + 454 .LVL35: +1664:Drivers/CMSIS/Include/core_cm4.h **** ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 455 .loc 2 1664 14 view .LVU120 + 456 0014 43F0BF63 orr r3, r3, #100139008 + 457 0018 43F40033 orr r3, r3, #131072 + 458 .LVL36: +1667:Drivers/CMSIS/Include/core_cm4.h **** } + 459 .loc 2 1667 3 is_stmt 1 view .LVU121 +1667:Drivers/CMSIS/Include/core_cm4.h **** } + 460 .loc 2 1667 14 is_stmt 0 view .LVU122 + 461 001c D360 str r3, [r2, #12] + 462 .LVL37: + ARM GAS /tmp/ccGGrCD0.s page 62 + + +1667:Drivers/CMSIS/Include/core_cm4.h **** } + 463 .loc 2 1667 14 view .LVU123 + 464 .LBE41: + 465 .LBE40: + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 466 .loc 1 175 1 view .LVU124 + 467 001e 7047 bx lr + 468 .L29: + 469 .align 2 + 470 .L28: + 471 0020 00ED00E0 .word -536810240 + 472 .cfi_endproc + 473 .LFE130: + 475 .section .text.HAL_NVIC_SetPriority,"ax",%progbits + 476 .align 1 + 477 .global HAL_NVIC_SetPriority + 478 .syntax unified + 479 .thumb + 480 .thumb_func + 482 HAL_NVIC_SetPriority: + 483 .LVL38: + 484 .LFB131: + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Sets the priority of an interrupt. + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param PreemptPriority The pre-emption priority for the IRQn channel. + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Pr + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * A lower priority value indicates a higher priority + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param SubPriority the subpriority level for the IRQ channel. + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Pr + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * A lower priority value indicates a higher priority. + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 485 .loc 1 191 1 is_stmt 1 view -0 + 486 .cfi_startproc + 487 @ args = 0, pretend = 0, frame = 0 + 488 @ frame_needed = 0, uses_anonymous_args = 0 + 489 .loc 1 191 1 is_stmt 0 view .LVU126 + 490 0000 10B5 push {r4, lr} + 491 .cfi_def_cfa_offset 8 + 492 .cfi_offset 4, -8 + 493 .cfi_offset 14, -4 + 494 0002 0446 mov r4, r0 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t prioritygroup = 0x00U; + 495 .loc 1 192 3 is_stmt 1 view .LVU127 + 496 .LVL39: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); + 497 .loc 1 195 3 view .LVU128 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + 498 .loc 1 196 3 view .LVU129 + ARM GAS /tmp/ccGGrCD0.s page 63 + + + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** prioritygroup = NVIC_GetPriorityGrouping(); + 499 .loc 1 198 3 view .LVU130 + 500 .LBB42: + 501 .LBI42: +1676:Drivers/CMSIS/Include/core_cm4.h **** { + 502 .loc 2 1676 26 view .LVU131 + 503 .LBB43: +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 504 .loc 2 1678 3 view .LVU132 +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 505 .loc 2 1678 26 is_stmt 0 view .LVU133 + 506 0004 054B ldr r3, .L32 + 507 0006 D868 ldr r0, [r3, #12] + 508 .LVL40: +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 509 .loc 2 1678 26 view .LVU134 + 510 .LBE43: + 511 .LBE42: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); + 512 .loc 1 200 3 is_stmt 1 view .LVU135 + 513 0008 C0F30220 ubfx r0, r0, #8, #3 + 514 .LVL41: + 515 .loc 1 200 3 is_stmt 0 view .LVU136 + 516 000c FFF7FEFF bl NVIC_EncodePriority + 517 .LVL42: + 518 .loc 1 200 3 view .LVU137 + 519 0010 0146 mov r1, r0 + 520 .loc 1 200 3 discriminator 1 view .LVU138 + 521 0012 2046 mov r0, r4 + 522 0014 FFF7FEFF bl __NVIC_SetPriority + 523 .LVL43: + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 524 .loc 1 201 1 view .LVU139 + 525 0018 10BD pop {r4, pc} + 526 .LVL44: + 527 .L33: + 528 .loc 1 201 1 view .LVU140 + 529 001a 00BF .align 2 + 530 .L32: + 531 001c 00ED00E0 .word -536810240 + 532 .cfi_endproc + 533 .LFE131: + 535 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits + 536 .align 1 + 537 .global HAL_NVIC_EnableIRQ + 538 .syntax unified + 539 .thumb + 540 .thumb_func + 542 HAL_NVIC_EnableIRQ: + 543 .LVL45: + 544 .LFB132: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Enables a device specific interrupt in the NVIC interrupt controller. + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() + ARM GAS /tmp/ccGGrCD0.s page 64 + + + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * function should be called before. + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 545 .loc 1 213 1 is_stmt 1 view -0 + 546 .cfi_startproc + 547 @ args = 0, pretend = 0, frame = 0 + 548 @ frame_needed = 0, uses_anonymous_args = 0 + 549 @ link register save eliminated. + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 550 .loc 1 215 3 view .LVU142 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable interrupt */ + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_EnableIRQ(IRQn); + 551 .loc 1 218 3 view .LVU143 + 552 .LBB44: + 553 .LBI44: +1688:Drivers/CMSIS/Include/core_cm4.h **** { + 554 .loc 2 1688 22 view .LVU144 + 555 .LBB45: +1690:Drivers/CMSIS/Include/core_cm4.h **** { + 556 .loc 2 1690 3 view .LVU145 +1690:Drivers/CMSIS/Include/core_cm4.h **** { + 557 .loc 2 1690 6 is_stmt 0 view .LVU146 + 558 0000 0028 cmp r0, #0 +1690:Drivers/CMSIS/Include/core_cm4.h **** { + 559 .loc 2 1690 6 view .LVU147 + 560 0002 07DB blt .L34 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 561 .loc 2 1692 5 is_stmt 1 view .LVU148 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 562 .loc 2 1692 81 is_stmt 0 view .LVU149 + 563 0004 00F01F02 and r2, r0, #31 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 564 .loc 2 1692 34 view .LVU150 + 565 0008 4009 lsrs r0, r0, #5 + 566 .LVL46: +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 567 .loc 2 1692 45 view .LVU151 + 568 000a 0123 movs r3, #1 + 569 000c 9340 lsls r3, r3, r2 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 570 .loc 2 1692 43 view .LVU152 + 571 000e 024A ldr r2, .L36 + 572 0010 42F82030 str r3, [r2, r0, lsl #2] + 573 .LVL47: + 574 .L34: +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 575 .loc 2 1692 43 view .LVU153 + 576 .LBE45: + 577 .LBE44: + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + ARM GAS /tmp/ccGGrCD0.s page 65 + + + 578 .loc 1 219 1 view .LVU154 + 579 0014 7047 bx lr + 580 .L37: + 581 0016 00BF .align 2 + 582 .L36: + 583 0018 00E100E0 .word -536813312 + 584 .cfi_endproc + 585 .LFE132: + 587 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits + 588 .align 1 + 589 .global HAL_NVIC_DisableIRQ + 590 .syntax unified + 591 .thumb + 592 .thumb_func + 594 HAL_NVIC_DisableIRQ: + 595 .LVL48: + 596 .LFB133: + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Disables a device specific interrupt in the NVIC interrupt controller. + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 597 .loc 1 229 1 is_stmt 1 view -0 + 598 .cfi_startproc + 599 @ args = 0, pretend = 0, frame = 0 + 600 @ frame_needed = 0, uses_anonymous_args = 0 + 601 .loc 1 229 1 is_stmt 0 view .LVU156 + 602 0000 08B5 push {r3, lr} + 603 .cfi_def_cfa_offset 8 + 604 .cfi_offset 3, -8 + 605 .cfi_offset 14, -4 + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 606 .loc 1 231 3 is_stmt 1 view .LVU157 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable interrupt */ + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_DisableIRQ(IRQn); + 607 .loc 1 234 3 view .LVU158 + 608 0002 FFF7FEFF bl __NVIC_DisableIRQ + 609 .LVL49: + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 610 .loc 1 235 1 is_stmt 0 view .LVU159 + 611 0006 08BD pop {r3, pc} + 612 .cfi_endproc + 613 .LFE133: + 615 .section .text.HAL_NVIC_SystemReset,"ax",%progbits + 616 .align 1 + 617 .global HAL_NVIC_SystemReset + 618 .syntax unified + 619 .thumb + 620 .thumb_func + 622 HAL_NVIC_SystemReset: + ARM GAS /tmp/ccGGrCD0.s page 66 + + + 623 .LFB134: + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initiates a system reset request to reset the MCU. + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SystemReset(void) + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 624 .loc 1 242 1 is_stmt 1 view -0 + 625 .cfi_startproc + 626 @ Volatile: function does not return. + 627 @ args = 0, pretend = 0, frame = 0 + 628 @ frame_needed = 0, uses_anonymous_args = 0 + 629 0000 08B5 push {r3, lr} + 630 .cfi_def_cfa_offset 8 + 631 .cfi_offset 3, -8 + 632 .cfi_offset 14, -4 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* System Reset */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SystemReset(); + 633 .loc 1 244 3 view .LVU161 + 634 0002 FFF7FEFF bl __NVIC_SystemReset + 635 .LVL50: + 636 .cfi_endproc + 637 .LFE134: + 639 .section .text.HAL_SYSTICK_Config,"ax",%progbits + 640 .align 1 + 641 .global HAL_SYSTICK_Config + 642 .syntax unified + 643 .thumb + 644 .thumb_func + 646 HAL_SYSTICK_Config: + 647 .LVL51: + 648 .LFB135: + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * Counter is in free running mode to generate periodic interrupts. + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval status: - 0 Function succeeded. + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * - 1 Function failed. + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 649 .loc 1 255 1 view -0 + 650 .cfi_startproc + 651 @ args = 0, pretend = 0, frame = 0 + 652 @ frame_needed = 0, uses_anonymous_args = 0 + 653 @ link register save eliminated. + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return SysTick_Config(TicksNumb); + 654 .loc 1 256 4 view .LVU163 + 655 .LBB46: + 656 .LBI46: +1951:Drivers/CMSIS/Include/core_cm4.h **** } +1952:Drivers/CMSIS/Include/core_cm4.h **** } +1953:Drivers/CMSIS/Include/core_cm4.h **** +1954:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of CMSIS_Core_NVICFunctions */ + ARM GAS /tmp/ccGGrCD0.s page 67 + + +1955:Drivers/CMSIS/Include/core_cm4.h **** +1956:Drivers/CMSIS/Include/core_cm4.h **** /* ########################## MPU functions #################################### */ +1957:Drivers/CMSIS/Include/core_cm4.h **** +1958:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +1959:Drivers/CMSIS/Include/core_cm4.h **** +1960:Drivers/CMSIS/Include/core_cm4.h **** #include "mpu_armv7.h" +1961:Drivers/CMSIS/Include/core_cm4.h **** +1962:Drivers/CMSIS/Include/core_cm4.h **** #endif +1963:Drivers/CMSIS/Include/core_cm4.h **** +1964:Drivers/CMSIS/Include/core_cm4.h **** +1965:Drivers/CMSIS/Include/core_cm4.h **** /* ########################## FPU functions #################################### */ +1966:Drivers/CMSIS/Include/core_cm4.h **** /** +1967:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_Core_FunctionInterface +1968:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_FpuFunctions FPU Functions +1969:Drivers/CMSIS/Include/core_cm4.h **** \brief Function that provides FPU type. +1970:Drivers/CMSIS/Include/core_cm4.h **** @{ +1971:Drivers/CMSIS/Include/core_cm4.h **** */ +1972:Drivers/CMSIS/Include/core_cm4.h **** +1973:Drivers/CMSIS/Include/core_cm4.h **** /** +1974:Drivers/CMSIS/Include/core_cm4.h **** \brief get FPU type +1975:Drivers/CMSIS/Include/core_cm4.h **** \details returns the FPU type +1976:Drivers/CMSIS/Include/core_cm4.h **** \returns +1977:Drivers/CMSIS/Include/core_cm4.h **** - \b 0: No FPU +1978:Drivers/CMSIS/Include/core_cm4.h **** - \b 1: Single precision FPU +1979:Drivers/CMSIS/Include/core_cm4.h **** - \b 2: Double + Single precision FPU +1980:Drivers/CMSIS/Include/core_cm4.h **** */ +1981:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t SCB_GetFPUType(void) +1982:Drivers/CMSIS/Include/core_cm4.h **** { +1983:Drivers/CMSIS/Include/core_cm4.h **** uint32_t mvfr0; +1984:Drivers/CMSIS/Include/core_cm4.h **** +1985:Drivers/CMSIS/Include/core_cm4.h **** mvfr0 = FPU->MVFR0; +1986:Drivers/CMSIS/Include/core_cm4.h **** if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) +1987:Drivers/CMSIS/Include/core_cm4.h **** { +1988:Drivers/CMSIS/Include/core_cm4.h **** return 1U; /* Single precision FPU */ +1989:Drivers/CMSIS/Include/core_cm4.h **** } +1990:Drivers/CMSIS/Include/core_cm4.h **** else +1991:Drivers/CMSIS/Include/core_cm4.h **** { +1992:Drivers/CMSIS/Include/core_cm4.h **** return 0U; /* No FPU */ +1993:Drivers/CMSIS/Include/core_cm4.h **** } +1994:Drivers/CMSIS/Include/core_cm4.h **** } +1995:Drivers/CMSIS/Include/core_cm4.h **** +1996:Drivers/CMSIS/Include/core_cm4.h **** +1997:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of CMSIS_Core_FpuFunctions */ +1998:Drivers/CMSIS/Include/core_cm4.h **** +1999:Drivers/CMSIS/Include/core_cm4.h **** +2000:Drivers/CMSIS/Include/core_cm4.h **** +2001:Drivers/CMSIS/Include/core_cm4.h **** /* ################################## SysTick function ######################################## +2002:Drivers/CMSIS/Include/core_cm4.h **** /** +2003:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_Core_FunctionInterface +2004:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_SysTickFunctions SysTick Functions +2005:Drivers/CMSIS/Include/core_cm4.h **** \brief Functions that configure the System. +2006:Drivers/CMSIS/Include/core_cm4.h **** @{ +2007:Drivers/CMSIS/Include/core_cm4.h **** */ +2008:Drivers/CMSIS/Include/core_cm4.h **** +2009:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) +2010:Drivers/CMSIS/Include/core_cm4.h **** +2011:Drivers/CMSIS/Include/core_cm4.h **** /** + ARM GAS /tmp/ccGGrCD0.s page 68 + + +2012:Drivers/CMSIS/Include/core_cm4.h **** \brief System Tick Configuration +2013:Drivers/CMSIS/Include/core_cm4.h **** \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. +2014:Drivers/CMSIS/Include/core_cm4.h **** Counter is in free running mode to generate periodic interrupts. +2015:Drivers/CMSIS/Include/core_cm4.h **** \param [in] ticks Number of ticks between two interrupts. +2016:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Function succeeded. +2017:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Function failed. +2018:Drivers/CMSIS/Include/core_cm4.h **** \note When the variable __Vendor_SysTickConfig is set to 1, then the +2019:Drivers/CMSIS/Include/core_cm4.h **** function SysTick_Config is not included. In this case, the file device. +2020:Drivers/CMSIS/Include/core_cm4.h **** must contain a vendor-specific implementation of this function. +2021:Drivers/CMSIS/Include/core_cm4.h **** */ +2022:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) + 657 .loc 2 2022 26 view .LVU164 + 658 .LBB47: +2023:Drivers/CMSIS/Include/core_cm4.h **** { +2024:Drivers/CMSIS/Include/core_cm4.h **** if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 659 .loc 2 2024 3 view .LVU165 + 660 .loc 2 2024 14 is_stmt 0 view .LVU166 + 661 0000 0138 subs r0, r0, #1 + 662 .LVL52: + 663 .loc 2 2024 6 view .LVU167 + 664 0002 B0F1807F cmp r0, #16777216 + 665 0006 0BD2 bcs .L44 +2025:Drivers/CMSIS/Include/core_cm4.h **** { +2026:Drivers/CMSIS/Include/core_cm4.h **** return (1UL); /* Reload value impossible */ +2027:Drivers/CMSIS/Include/core_cm4.h **** } +2028:Drivers/CMSIS/Include/core_cm4.h **** +2029:Drivers/CMSIS/Include/core_cm4.h **** SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 666 .loc 2 2029 3 is_stmt 1 view .LVU168 + 667 .loc 2 2029 18 is_stmt 0 view .LVU169 + 668 0008 4FF0E023 mov r3, #-536813568 + 669 000c 5861 str r0, [r3, #20] +2030:Drivers/CMSIS/Include/core_cm4.h **** NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Int + 670 .loc 2 2030 3 is_stmt 1 view .LVU170 + 671 .LVL53: + 672 .LBB48: + 673 .LBI48: +1816:Drivers/CMSIS/Include/core_cm4.h **** { + 674 .loc 2 1816 22 view .LVU171 + 675 .LBB49: +1818:Drivers/CMSIS/Include/core_cm4.h **** { + 676 .loc 2 1818 3 view .LVU172 +1824:Drivers/CMSIS/Include/core_cm4.h **** } + 677 .loc 2 1824 5 view .LVU173 +1824:Drivers/CMSIS/Include/core_cm4.h **** } + 678 .loc 2 1824 46 is_stmt 0 view .LVU174 + 679 000e 054A ldr r2, .L45 + 680 0010 F021 movs r1, #240 + 681 0012 82F82310 strb r1, [r2, #35] + 682 .LVL54: +1824:Drivers/CMSIS/Include/core_cm4.h **** } + 683 .loc 2 1824 46 view .LVU175 + 684 .LBE49: + 685 .LBE48: +2031:Drivers/CMSIS/Include/core_cm4.h **** SysTick->VAL = 0UL; /* Load the SysTick Counter Val + 686 .loc 2 2031 3 is_stmt 1 view .LVU176 + 687 .loc 2 2031 18 is_stmt 0 view .LVU177 + 688 0016 0020 movs r0, #0 + ARM GAS /tmp/ccGGrCD0.s page 69 + + + 689 .LVL55: + 690 .loc 2 2031 18 view .LVU178 + 691 0018 9861 str r0, [r3, #24] +2032:Drivers/CMSIS/Include/core_cm4.h **** SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 692 .loc 2 2032 3 is_stmt 1 view .LVU179 + 693 .loc 2 2032 18 is_stmt 0 view .LVU180 + 694 001a 0722 movs r2, #7 + 695 001c 1A61 str r2, [r3, #16] +2033:Drivers/CMSIS/Include/core_cm4.h **** SysTick_CTRL_TICKINT_Msk | +2034:Drivers/CMSIS/Include/core_cm4.h **** SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTi +2035:Drivers/CMSIS/Include/core_cm4.h **** return (0UL); /* Function successful */ + 696 .loc 2 2035 3 is_stmt 1 view .LVU181 + 697 .loc 2 2035 10 is_stmt 0 view .LVU182 + 698 001e 7047 bx lr + 699 .L44: +2026:Drivers/CMSIS/Include/core_cm4.h **** } + 700 .loc 2 2026 12 view .LVU183 + 701 0020 0120 movs r0, #1 + 702 .LVL56: +2026:Drivers/CMSIS/Include/core_cm4.h **** } + 703 .loc 2 2026 12 view .LVU184 + 704 .LBE47: + 705 .LBE46: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 706 .loc 1 257 1 view .LVU185 + 707 0022 7047 bx lr + 708 .L46: + 709 .align 2 + 710 .L45: + 711 0024 00ED00E0 .word -536810240 + 712 .cfi_endproc + 713 .LFE135: + 715 .section .text.HAL_MPU_Disable,"ax",%progbits + 716 .align 1 + 717 .global HAL_MPU_Disable + 718 .syntax unified + 719 .thumb + 720 .thumb_func + 722 HAL_MPU_Disable: + 723 .LFB136: + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @} + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Cortex control functions + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @verbatim + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ##### Peripheral Control functions ##### + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** This subsection provides a set of functions allowing to control the CORTEX + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (NVIC, SYSTICK, MPU) functionalities. + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @endverbatim + ARM GAS /tmp/ccGGrCD0.s page 70 + + + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #if (__MPU_PRESENT == 1U) + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Disables the MPU also clears the HFNMIENA bit (ARM recommendation) + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_Disable(void) + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 724 .loc 1 285 1 is_stmt 1 view -0 + 725 .cfi_startproc + 726 @ args = 0, pretend = 0, frame = 0 + 727 @ frame_needed = 0, uses_anonymous_args = 0 + 728 @ link register save eliminated. + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable fault exceptions */ + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; + 729 .loc 1 287 3 view .LVU187 + 730 .loc 1 287 6 is_stmt 0 view .LVU188 + 731 0000 044B ldr r3, .L48 + 732 0002 5A6A ldr r2, [r3, #36] + 733 .loc 1 287 14 view .LVU189 + 734 0004 22F48032 bic r2, r2, #65536 + 735 0008 5A62 str r2, [r3, #36] + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable the MPU */ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->CTRL = 0U; + 736 .loc 1 290 3 is_stmt 1 view .LVU190 + 737 .loc 1 290 13 is_stmt 0 view .LVU191 + 738 000a 0022 movs r2, #0 + 739 000c C3F89420 str r2, [r3, #148] + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 740 .loc 1 291 1 view .LVU192 + 741 0010 7047 bx lr + 742 .L49: + 743 0012 00BF .align 2 + 744 .L48: + 745 0014 00ED00E0 .word -536810240 + 746 .cfi_endproc + 747 .LFE136: + 749 .section .text.HAL_MPU_Enable,"ax",%progbits + 750 .align 1 + 751 .global HAL_MPU_Enable + 752 .syntax unified + 753 .thumb + 754 .thumb_func + 756 HAL_MPU_Enable: + 757 .LVL57: + 758 .LFB137: + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Enables the MPU + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param MPU_Control Specifies the control mode of the MPU during hard fault, + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * NMI, FAULTMASK and privileged access to the default memory + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_HFNMI_PRIVDEF_NONE + ARM GAS /tmp/ccGGrCD0.s page 71 + + + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_HARDFAULT_NMI + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_PRIVILEGED_DEFAULT + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_HFNMI_PRIVDEF + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_Enable(uint32_t MPU_Control) + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 759 .loc 1 305 1 is_stmt 1 view -0 + 760 .cfi_startproc + 761 @ args = 0, pretend = 0, frame = 0 + 762 @ frame_needed = 0, uses_anonymous_args = 0 + 763 @ link register save eliminated. + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable the MPU */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; + 764 .loc 1 307 3 view .LVU194 + 765 .loc 1 307 29 is_stmt 0 view .LVU195 + 766 0000 40F00100 orr r0, r0, #1 + 767 .LVL58: + 768 .loc 1 307 15 view .LVU196 + 769 0004 034B ldr r3, .L51 + 770 0006 C3F89400 str r0, [r3, #148] + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable fault exceptions */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; + 771 .loc 1 310 3 is_stmt 1 view .LVU197 + 772 .loc 1 310 6 is_stmt 0 view .LVU198 + 773 000a 5A6A ldr r2, [r3, #36] + 774 .loc 1 310 14 view .LVU199 + 775 000c 42F48032 orr r2, r2, #65536 + 776 0010 5A62 str r2, [r3, #36] + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 777 .loc 1 311 1 view .LVU200 + 778 0012 7047 bx lr + 779 .L52: + 780 .align 2 + 781 .L51: + 782 0014 00ED00E0 .word -536810240 + 783 .cfi_endproc + 784 .LFE137: + 786 .section .text.HAL_MPU_ConfigRegion,"ax",%progbits + 787 .align 1 + 788 .global HAL_MPU_ConfigRegion + 789 .syntax unified + 790 .thumb + 791 .thumb_func + 793 HAL_MPU_ConfigRegion: + 794 .LVL59: + 795 .LFB138: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initializes and configures the Region and the memory to be protected. + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * the initialization and configuration information. + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + ARM GAS /tmp/ccGGrCD0.s page 72 + + + 796 .loc 1 320 1 is_stmt 1 view -0 + 797 .cfi_startproc + 798 @ args = 0, pretend = 0, frame = 0 + 799 @ frame_needed = 0, uses_anonymous_args = 0 + 800 @ link register save eliminated. + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); + 801 .loc 1 322 3 view .LVU202 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); + 802 .loc 1 323 3 view .LVU203 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set the Region number */ + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RNR = MPU_Init->Number; + 803 .loc 1 326 3 view .LVU204 + 804 .loc 1 326 22 is_stmt 0 view .LVU205 + 805 0000 4278 ldrb r2, [r0, #1] @ zero_extendqisi2 + 806 .loc 1 326 12 view .LVU206 + 807 0002 164B ldr r3, .L56 + 808 0004 C3F89820 str r2, [r3, #152] + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** if ((MPU_Init->Enable) != RESET) + 809 .loc 1 328 3 is_stmt 1 view .LVU207 + 810 .loc 1 328 16 is_stmt 0 view .LVU208 + 811 0008 0378 ldrb r3, [r0] @ zero_extendqisi2 + 812 .loc 1 328 6 view .LVU209 + 813 000a FBB1 cbz r3, .L54 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); + 814 .loc 1 331 5 is_stmt 1 view .LVU210 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); + 815 .loc 1 332 5 view .LVU211 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField)); + 816 .loc 1 333 5 view .LVU212 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); + 817 .loc 1 334 5 view .LVU213 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); + 818 .loc 1 335 5 view .LVU214 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); + 819 .loc 1 336 5 view .LVU215 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); + 820 .loc 1 337 5 view .LVU216 + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); + 821 .loc 1 338 5 view .LVU217 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RBAR = MPU_Init->BaseAddress; + 822 .loc 1 340 5 view .LVU218 + 823 .loc 1 340 25 is_stmt 0 view .LVU219 + 824 000c 4368 ldr r3, [r0, #4] + 825 .loc 1 340 15 view .LVU220 + 826 000e 134A ldr r2, .L56 + 827 0010 C2F89C30 str r3, [r2, #156] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | + 828 .loc 1 341 5 is_stmt 1 view .LVU221 + 829 .loc 1 341 36 is_stmt 0 view .LVU222 + 830 0014 017B ldrb r1, [r0, #12] @ zero_extendqisi2 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | + ARM GAS /tmp/ccGGrCD0.s page 73 + + + 831 .loc 1 342 36 view .LVU223 + 832 0016 C37A ldrb r3, [r0, #11] @ zero_extendqisi2 + 833 .loc 1 342 62 view .LVU224 + 834 0018 1B06 lsls r3, r3, #24 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | + 835 .loc 1 341 84 view .LVU225 + 836 001a 43EA0173 orr r3, r3, r1, lsl #28 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | + 837 .loc 1 343 36 view .LVU226 + 838 001e 817A ldrb r1, [r0, #10] @ zero_extendqisi2 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | + 839 .loc 1 342 84 view .LVU227 + 840 0020 43EAC143 orr r3, r3, r1, lsl #19 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | + 841 .loc 1 344 36 view .LVU228 + 842 0024 417B ldrb r1, [r0, #13] @ zero_extendqisi2 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | + 843 .loc 1 343 84 view .LVU229 + 844 0026 43EA8143 orr r3, r3, r1, lsl #18 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | + 845 .loc 1 345 36 view .LVU230 + 846 002a 817B ldrb r1, [r0, #14] @ zero_extendqisi2 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | + 847 .loc 1 344 84 view .LVU231 + 848 002c 43EA4143 orr r3, r3, r1, lsl #17 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | + 849 .loc 1 346 36 view .LVU232 + 850 0030 C17B ldrb r1, [r0, #15] @ zero_extendqisi2 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | + 851 .loc 1 345 84 view .LVU233 + 852 0032 43EA0143 orr r3, r3, r1, lsl #16 + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | + 853 .loc 1 347 36 view .LVU234 + 854 0036 417A ldrb r1, [r0, #9] @ zero_extendqisi2 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | + 855 .loc 1 346 84 view .LVU235 + 856 0038 43EA0123 orr r3, r3, r1, lsl #8 + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | + 857 .loc 1 348 36 view .LVU236 + 858 003c 017A ldrb r1, [r0, #8] @ zero_extendqisi2 + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | + 859 .loc 1 347 84 view .LVU237 + 860 003e 43EA4103 orr r3, r3, r1, lsl #1 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); + 861 .loc 1 349 36 view .LVU238 + 862 0042 0178 ldrb r1, [r0] @ zero_extendqisi2 + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | + 863 .loc 1 348 84 view .LVU239 + 864 0044 0B43 orrs r3, r3, r1 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | + 865 .loc 1 341 15 view .LVU240 + 866 0046 C2F8A030 str r3, [r2, #160] + 867 004a 7047 bx lr + 868 .L54: + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** else + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + ARM GAS /tmp/ccGGrCD0.s page 74 + + + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RBAR = 0x00U; + 869 .loc 1 353 5 is_stmt 1 view .LVU241 + 870 .loc 1 353 15 is_stmt 0 view .LVU242 + 871 004c 034B ldr r3, .L56 + 872 004e 0022 movs r2, #0 + 873 0050 C3F89C20 str r2, [r3, #156] + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RASR = 0x00U; + 874 .loc 1 354 5 is_stmt 1 view .LVU243 + 875 .loc 1 354 15 is_stmt 0 view .LVU244 + 876 0054 C3F8A020 str r2, [r3, #160] + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 877 .loc 1 356 1 view .LVU245 + 878 0058 7047 bx lr + 879 .L57: + 880 005a 00BF .align 2 + 881 .L56: + 882 005c 00ED00E0 .word -536810240 + 883 .cfi_endproc + 884 .LFE138: + 886 .section .text.HAL_NVIC_GetPriorityGrouping,"ax",%progbits + 887 .align 1 + 888 .global HAL_NVIC_GetPriorityGrouping + 889 .syntax unified + 890 .thumb + 891 .thumb_func + 893 HAL_NVIC_GetPriorityGrouping: + 894 .LFB139: + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #endif /* __MPU_PRESENT */ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets the priority grouping field from the NVIC Interrupt Controller. + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field) + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPriorityGrouping(void) + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 895 .loc 1 364 1 is_stmt 1 view -0 + 896 .cfi_startproc + 897 @ args = 0, pretend = 0, frame = 0 + 898 @ frame_needed = 0, uses_anonymous_args = 0 + 899 @ link register save eliminated. + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Get the PRIGROUP[10:8] field value */ + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return NVIC_GetPriorityGrouping(); + 900 .loc 1 366 3 view .LVU247 + 901 .LBB50: + 902 .LBI50: +1676:Drivers/CMSIS/Include/core_cm4.h **** { + 903 .loc 2 1676 26 view .LVU248 + 904 .LBB51: +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 905 .loc 2 1678 3 view .LVU249 +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 906 .loc 2 1678 26 is_stmt 0 view .LVU250 + 907 0000 024B ldr r3, .L59 + 908 0002 D868 ldr r0, [r3, #12] + 909 .LBE51: + 910 .LBE50: + ARM GAS /tmp/ccGGrCD0.s page 75 + + + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 911 .loc 1 367 1 view .LVU251 + 912 0004 C0F30220 ubfx r0, r0, #8, #3 + 913 0008 7047 bx lr + 914 .L60: + 915 000a 00BF .align 2 + 916 .L59: + 917 000c 00ED00E0 .word -536810240 + 918 .cfi_endproc + 919 .LFE139: + 921 .section .text.HAL_NVIC_GetPriority,"ax",%progbits + 922 .align 1 + 923 .global HAL_NVIC_GetPriority + 924 .syntax unified + 925 .thumb + 926 .thumb_func + 928 HAL_NVIC_GetPriority: + 929 .LVL60: + 930 .LFB140: + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets the priority of an interrupt. + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param PriorityGroup: the priority grouping bits length. + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 4 bits for subpriority + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 3 bits for subpriority + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 2 bits for subpriority + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 1 bits for subpriority + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 0 bits for subpriority + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0). + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param pSubPriority Pointer on the Subpriority value (starting from 0). + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint3 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 931 .loc 1 391 1 is_stmt 1 view -0 + 932 .cfi_startproc + 933 @ args = 0, pretend = 0, frame = 0 + 934 @ frame_needed = 0, uses_anonymous_args = 0 + 935 .loc 1 391 1 is_stmt 0 view .LVU253 + 936 0000 70B5 push {r4, r5, r6, lr} + 937 .cfi_def_cfa_offset 16 + 938 .cfi_offset 4, -16 + 939 .cfi_offset 5, -12 + 940 .cfi_offset 6, -8 + 941 .cfi_offset 14, -4 + 942 0002 0C46 mov r4, r1 + 943 0004 1546 mov r5, r2 + 944 0006 1E46 mov r6, r3 + ARM GAS /tmp/ccGGrCD0.s page 76 + + + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); + 945 .loc 1 393 3 is_stmt 1 view .LVU254 + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Get priority for Cortex-M system or device specific interrupts */ + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority); + 946 .loc 1 395 3 view .LVU255 + 947 0008 FFF7FEFF bl __NVIC_GetPriority + 948 .LVL61: + 949 .loc 1 395 3 is_stmt 0 discriminator 1 view .LVU256 + 950 000c 3346 mov r3, r6 + 951 000e 2A46 mov r2, r5 + 952 0010 2146 mov r1, r4 + 953 0012 FFF7FEFF bl NVIC_DecodePriority + 954 .LVL62: + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 955 .loc 1 396 1 view .LVU257 + 956 0016 70BD pop {r4, r5, r6, pc} + 957 .loc 1 396 1 view .LVU258 + 958 .cfi_endproc + 959 .LFE140: + 961 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits + 962 .align 1 + 963 .global HAL_NVIC_SetPendingIRQ + 964 .syntax unified + 965 .thumb + 966 .thumb_func + 968 HAL_NVIC_SetPendingIRQ: + 969 .LVL63: + 970 .LFB141: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 971 .loc 1 406 1 is_stmt 1 view -0 + 972 .cfi_startproc + 973 @ args = 0, pretend = 0, frame = 0 + 974 @ frame_needed = 0, uses_anonymous_args = 0 + 975 @ link register save eliminated. + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set interrupt pending */ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SetPendingIRQ(IRQn); + 976 .loc 1 408 3 view .LVU260 + 977 .LBB52: + 978 .LBI52: +1762:Drivers/CMSIS/Include/core_cm4.h **** { + 979 .loc 2 1762 22 view .LVU261 + 980 .LBB53: +1764:Drivers/CMSIS/Include/core_cm4.h **** { + 981 .loc 2 1764 3 view .LVU262 +1764:Drivers/CMSIS/Include/core_cm4.h **** { + 982 .loc 2 1764 6 is_stmt 0 view .LVU263 + 983 0000 0028 cmp r0, #0 + ARM GAS /tmp/ccGGrCD0.s page 77 + + +1764:Drivers/CMSIS/Include/core_cm4.h **** { + 984 .loc 2 1764 6 view .LVU264 + 985 0002 08DB blt .L63 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 986 .loc 2 1766 5 is_stmt 1 view .LVU265 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 987 .loc 2 1766 81 is_stmt 0 view .LVU266 + 988 0004 00F01F02 and r2, r0, #31 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 989 .loc 2 1766 34 view .LVU267 + 990 0008 4009 lsrs r0, r0, #5 + 991 .LVL64: +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 992 .loc 2 1766 45 view .LVU268 + 993 000a 0123 movs r3, #1 + 994 000c 9340 lsls r3, r3, r2 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 995 .loc 2 1766 43 view .LVU269 + 996 000e 4030 adds r0, r0, #64 + 997 0010 014A ldr r2, .L65 + 998 0012 42F82030 str r3, [r2, r0, lsl #2] + 999 .LVL65: + 1000 .L63: +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 1001 .loc 2 1766 43 view .LVU270 + 1002 .LBE53: + 1003 .LBE52: + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1004 .loc 1 409 1 view .LVU271 + 1005 0016 7047 bx lr + 1006 .L66: + 1007 .align 2 + 1008 .L65: + 1009 0018 00E100E0 .word -536813312 + 1010 .cfi_endproc + 1011 .LFE141: + 1013 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits + 1014 .align 1 + 1015 .global HAL_NVIC_GetPendingIRQ + 1016 .syntax unified + 1017 .thumb + 1018 .thumb_func + 1020 HAL_NVIC_GetPendingIRQ: + 1021 .LVL66: + 1022 .LFB142: + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets Pending Interrupt (reads the pending register in the NVIC + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * and returns the pending bit for the specified interrupt). + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + ARM GAS /tmp/ccGGrCD0.s page 78 + + + 1023 .loc 1 421 1 is_stmt 1 view -0 + 1024 .cfi_startproc + 1025 @ args = 0, pretend = 0, frame = 0 + 1026 @ frame_needed = 0, uses_anonymous_args = 0 + 1027 @ link register save eliminated. + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Return 1 if pending else 0U */ + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn); + 1028 .loc 1 423 3 view .LVU273 + 1029 .LBB54: + 1030 .LBI54: +1743:Drivers/CMSIS/Include/core_cm4.h **** { + 1031 .loc 2 1743 26 view .LVU274 + 1032 .LBB55: +1745:Drivers/CMSIS/Include/core_cm4.h **** { + 1033 .loc 2 1745 3 view .LVU275 +1745:Drivers/CMSIS/Include/core_cm4.h **** { + 1034 .loc 2 1745 6 is_stmt 0 view .LVU276 + 1035 0000 0028 cmp r0, #0 +1745:Drivers/CMSIS/Include/core_cm4.h **** { + 1036 .loc 2 1745 6 view .LVU277 + 1037 0002 0BDB blt .L69 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 1038 .loc 2 1747 5 is_stmt 1 view .LVU278 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 1039 .loc 2 1747 54 is_stmt 0 view .LVU279 + 1040 0004 4309 lsrs r3, r0, #5 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 1041 .loc 2 1747 35 view .LVU280 + 1042 0006 4033 adds r3, r3, #64 + 1043 0008 054A ldr r2, .L70 + 1044 000a 52F82330 ldr r3, [r2, r3, lsl #2] +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 1045 .loc 2 1747 91 view .LVU281 + 1046 000e 00F01F00 and r0, r0, #31 + 1047 .LVL67: +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 1048 .loc 2 1747 103 view .LVU282 + 1049 0012 23FA00F0 lsr r0, r3, r0 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 1050 .loc 2 1747 12 view .LVU283 + 1051 0016 00F00100 and r0, r0, #1 + 1052 001a 7047 bx lr + 1053 .L69: +1751:Drivers/CMSIS/Include/core_cm4.h **** } + 1054 .loc 2 1751 11 view .LVU284 + 1055 001c 0020 movs r0, #0 + 1056 .LVL68: +1751:Drivers/CMSIS/Include/core_cm4.h **** } + 1057 .loc 2 1751 11 view .LVU285 + 1058 .LBE55: + 1059 .LBE54: + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1060 .loc 1 424 1 view .LVU286 + 1061 001e 7047 bx lr + 1062 .L71: + 1063 .align 2 + 1064 .L70: + ARM GAS /tmp/ccGGrCD0.s page 79 + + + 1065 0020 00E100E0 .word -536813312 + 1066 .cfi_endproc + 1067 .LFE142: + 1069 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits + 1070 .align 1 + 1071 .global HAL_NVIC_ClearPendingIRQ + 1072 .syntax unified + 1073 .thumb + 1074 .thumb_func + 1076 HAL_NVIC_ClearPendingIRQ: + 1077 .LVL69: + 1078 .LFB143: + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Clears the pending bit of an external interrupt. + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 1079 .loc 1 434 1 is_stmt 1 view -0 + 1080 .cfi_startproc + 1081 @ args = 0, pretend = 0, frame = 0 + 1082 @ frame_needed = 0, uses_anonymous_args = 0 + 1083 @ link register save eliminated. + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Clear pending interrupt */ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_ClearPendingIRQ(IRQn); + 1084 .loc 1 436 3 view .LVU288 + 1085 .LBB56: + 1086 .LBI56: +1777:Drivers/CMSIS/Include/core_cm4.h **** { + 1087 .loc 2 1777 22 view .LVU289 + 1088 .LBB57: +1779:Drivers/CMSIS/Include/core_cm4.h **** { + 1089 .loc 2 1779 3 view .LVU290 +1779:Drivers/CMSIS/Include/core_cm4.h **** { + 1090 .loc 2 1779 6 is_stmt 0 view .LVU291 + 1091 0000 0028 cmp r0, #0 +1779:Drivers/CMSIS/Include/core_cm4.h **** { + 1092 .loc 2 1779 6 view .LVU292 + 1093 0002 08DB blt .L72 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 1094 .loc 2 1781 5 is_stmt 1 view .LVU293 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 1095 .loc 2 1781 81 is_stmt 0 view .LVU294 + 1096 0004 00F01F02 and r2, r0, #31 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 1097 .loc 2 1781 34 view .LVU295 + 1098 0008 4009 lsrs r0, r0, #5 + 1099 .LVL70: +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 1100 .loc 2 1781 45 view .LVU296 + 1101 000a 0123 movs r3, #1 + 1102 000c 9340 lsls r3, r3, r2 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + ARM GAS /tmp/ccGGrCD0.s page 80 + + + 1103 .loc 2 1781 43 view .LVU297 + 1104 000e 6030 adds r0, r0, #96 + 1105 0010 014A ldr r2, .L74 + 1106 0012 42F82030 str r3, [r2, r0, lsl #2] + 1107 .LVL71: + 1108 .L72: +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 1109 .loc 2 1781 43 view .LVU298 + 1110 .LBE57: + 1111 .LBE56: + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1112 .loc 1 437 1 view .LVU299 + 1113 0016 7047 bx lr + 1114 .L75: + 1115 .align 2 + 1116 .L74: + 1117 0018 00E100E0 .word -536813312 + 1118 .cfi_endproc + 1119 .LFE143: + 1121 .section .text.HAL_NVIC_GetActive,"ax",%progbits + 1122 .align 1 + 1123 .global HAL_NVIC_GetActive + 1124 .syntax unified + 1125 .thumb + 1126 .thumb_func + 1128 HAL_NVIC_GetActive: + 1129 .LVL72: + 1130 .LFB144: + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit). + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn) + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 1131 .loc 1 448 1 is_stmt 1 view -0 + 1132 .cfi_startproc + 1133 @ args = 0, pretend = 0, frame = 0 + 1134 @ frame_needed = 0, uses_anonymous_args = 0 + 1135 @ link register save eliminated. + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Return 1 if active else 0U */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return NVIC_GetActive(IRQn); + 1136 .loc 1 450 3 view .LVU301 + 1137 .LBB58: + 1138 .LBI58: +1794:Drivers/CMSIS/Include/core_cm4.h **** { + 1139 .loc 2 1794 26 view .LVU302 + 1140 .LBB59: +1796:Drivers/CMSIS/Include/core_cm4.h **** { + 1141 .loc 2 1796 3 view .LVU303 +1796:Drivers/CMSIS/Include/core_cm4.h **** { + 1142 .loc 2 1796 6 is_stmt 0 view .LVU304 + 1143 0000 0028 cmp r0, #0 + ARM GAS /tmp/ccGGrCD0.s page 81 + + +1796:Drivers/CMSIS/Include/core_cm4.h **** { + 1144 .loc 2 1796 6 view .LVU305 + 1145 0002 0BDB blt .L78 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 1146 .loc 2 1798 5 is_stmt 1 view .LVU306 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 1147 .loc 2 1798 54 is_stmt 0 view .LVU307 + 1148 0004 4309 lsrs r3, r0, #5 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 1149 .loc 2 1798 35 view .LVU308 + 1150 0006 8033 adds r3, r3, #128 + 1151 0008 054A ldr r2, .L79 + 1152 000a 52F82330 ldr r3, [r2, r3, lsl #2] +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 1153 .loc 2 1798 91 view .LVU309 + 1154 000e 00F01F00 and r0, r0, #31 + 1155 .LVL73: +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 1156 .loc 2 1798 103 view .LVU310 + 1157 0012 23FA00F0 lsr r0, r3, r0 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 1158 .loc 2 1798 12 view .LVU311 + 1159 0016 00F00100 and r0, r0, #1 + 1160 001a 7047 bx lr + 1161 .L78: +1802:Drivers/CMSIS/Include/core_cm4.h **** } + 1162 .loc 2 1802 11 view .LVU312 + 1163 001c 0020 movs r0, #0 + 1164 .LVL74: +1802:Drivers/CMSIS/Include/core_cm4.h **** } + 1165 .loc 2 1802 11 view .LVU313 + 1166 .LBE59: + 1167 .LBE58: + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1168 .loc 1 451 1 view .LVU314 + 1169 001e 7047 bx lr + 1170 .L80: + 1171 .align 2 + 1172 .L79: + 1173 0020 00E100E0 .word -536813312 + 1174 .cfi_endproc + 1175 .LFE144: + 1177 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits + 1178 .align 1 + 1179 .global HAL_SYSTICK_CLKSourceConfig + 1180 .syntax unified + 1181 .thumb + 1182 .thumb_func + 1184 HAL_SYSTICK_CLKSourceConfig: + 1185 .LVL75: + 1186 .LFB145: + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Configures the SysTick clock source. + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param CLKSource specifies the SysTick clock source. + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock + ARM GAS /tmp/ccGGrCD0.s page 82 + + + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 1187 .loc 1 462 1 is_stmt 1 view -0 + 1188 .cfi_startproc + 1189 @ args = 0, pretend = 0, frame = 0 + 1190 @ frame_needed = 0, uses_anonymous_args = 0 + 1191 @ link register save eliminated. + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); + 1192 .loc 1 464 3 view .LVU316 + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) + 1193 .loc 1 465 3 view .LVU317 + 1194 .loc 1 465 6 is_stmt 0 view .LVU318 + 1195 0000 0428 cmp r0, #4 + 1196 0002 06D0 beq .L84 + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** else + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; + 1197 .loc 1 471 5 is_stmt 1 view .LVU319 + 1198 .loc 1 471 12 is_stmt 0 view .LVU320 + 1199 0004 4FF0E022 mov r2, #-536813568 + 1200 0008 1369 ldr r3, [r2, #16] + 1201 .loc 1 471 19 view .LVU321 + 1202 000a 23F00403 bic r3, r3, #4 + 1203 000e 1361 str r3, [r2, #16] + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1204 .loc 1 473 1 view .LVU322 + 1205 0010 7047 bx lr + 1206 .L84: + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1207 .loc 1 467 5 is_stmt 1 view .LVU323 + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1208 .loc 1 467 12 is_stmt 0 view .LVU324 + 1209 0012 4FF0E022 mov r2, #-536813568 + 1210 0016 1369 ldr r3, [r2, #16] + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1211 .loc 1 467 19 view .LVU325 + 1212 0018 43F00403 orr r3, r3, #4 + 1213 001c 1361 str r3, [r2, #16] + 1214 001e 7047 bx lr + 1215 .cfi_endproc + 1216 .LFE145: + 1218 .section .text.HAL_SYSTICK_Callback,"ax",%progbits + 1219 .align 1 + 1220 .weak HAL_SYSTICK_Callback + 1221 .syntax unified + 1222 .thumb + 1223 .thumb_func + 1225 HAL_SYSTICK_Callback: + 1226 .LFB147: + ARM GAS /tmp/ccGGrCD0.s page 83 + + + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief This function handles SYSTICK interrupt request. + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_SYSTICK_IRQHandler(void) + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief SYSTICK callback. + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 1227 .loc 1 489 1 is_stmt 1 view -0 + 1228 .cfi_startproc + 1229 @ args = 0, pretend = 0, frame = 0 + 1230 @ frame_needed = 0, uses_anonymous_args = 0 + 1231 @ link register save eliminated. + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** the HAL_SYSTICK_Callback could be implemented in the user file + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1232 .loc 1 493 1 view .LVU327 + 1233 0000 7047 bx lr + 1234 .cfi_endproc + 1235 .LFE147: + 1237 .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits + 1238 .align 1 + 1239 .global HAL_SYSTICK_IRQHandler + 1240 .syntax unified + 1241 .thumb + 1242 .thumb_func + 1244 HAL_SYSTICK_IRQHandler: + 1245 .LFB146: + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 1246 .loc 1 480 1 view -0 + 1247 .cfi_startproc + 1248 @ args = 0, pretend = 0, frame = 0 + 1249 @ frame_needed = 0, uses_anonymous_args = 0 + 1250 0000 08B5 push {r3, lr} + 1251 .cfi_def_cfa_offset 8 + 1252 .cfi_offset 3, -8 + 1253 .cfi_offset 14, -4 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1254 .loc 1 481 3 view .LVU329 + 1255 0002 FFF7FEFF bl HAL_SYSTICK_Callback + 1256 .LVL76: + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 1257 .loc 1 482 1 is_stmt 0 view .LVU330 + 1258 0006 08BD pop {r3, pc} + 1259 .cfi_endproc + 1260 .LFE146: + 1262 .text + 1263 .Letext0: + ARM GAS /tmp/ccGGrCD0.s page 84 + + + 1264 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1265 .file 5 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1266 .file 6 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1267 .file 7 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1268 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" + ARM GAS /tmp/ccGGrCD0.s page 85 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_cortex.c + /tmp/ccGGrCD0.s:21 .text.__NVIC_DisableIRQ:00000000 $t + /tmp/ccGGrCD0.s:26 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ + /tmp/ccGGrCD0.s:88 .text.__NVIC_DisableIRQ:00000020 $d + /tmp/ccGGrCD0.s:93 .text.__NVIC_SetPriority:00000000 $t + /tmp/ccGGrCD0.s:98 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority + /tmp/ccGGrCD0.s:145 .text.__NVIC_SetPriority:00000024 $d + /tmp/ccGGrCD0.s:150 .text.__NVIC_GetPriority:00000000 $t + /tmp/ccGGrCD0.s:155 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority + /tmp/ccGGrCD0.s:195 .text.__NVIC_GetPriority:00000020 $d + /tmp/ccGGrCD0.s:200 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccGGrCD0.s:205 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccGGrCD0.s:266 .text.NVIC_DecodePriority:00000000 $t + /tmp/ccGGrCD0.s:271 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority + /tmp/ccGGrCD0.s:339 .text.__NVIC_SystemReset:00000000 $t + /tmp/ccGGrCD0.s:344 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset + /tmp/ccGGrCD0.s:405 .text.__NVIC_SystemReset:0000001c $d + /tmp/ccGGrCD0.s:411 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t + /tmp/ccGGrCD0.s:417 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping + /tmp/ccGGrCD0.s:471 .text.HAL_NVIC_SetPriorityGrouping:00000020 $d + /tmp/ccGGrCD0.s:476 .text.HAL_NVIC_SetPriority:00000000 $t + /tmp/ccGGrCD0.s:482 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority + /tmp/ccGGrCD0.s:531 .text.HAL_NVIC_SetPriority:0000001c $d + /tmp/ccGGrCD0.s:536 .text.HAL_NVIC_EnableIRQ:00000000 $t + /tmp/ccGGrCD0.s:542 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ + /tmp/ccGGrCD0.s:583 .text.HAL_NVIC_EnableIRQ:00000018 $d + /tmp/ccGGrCD0.s:588 .text.HAL_NVIC_DisableIRQ:00000000 $t + /tmp/ccGGrCD0.s:594 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ + /tmp/ccGGrCD0.s:616 .text.HAL_NVIC_SystemReset:00000000 $t + /tmp/ccGGrCD0.s:622 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset + /tmp/ccGGrCD0.s:640 .text.HAL_SYSTICK_Config:00000000 $t + /tmp/ccGGrCD0.s:646 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config + /tmp/ccGGrCD0.s:711 .text.HAL_SYSTICK_Config:00000024 $d + /tmp/ccGGrCD0.s:716 .text.HAL_MPU_Disable:00000000 $t + /tmp/ccGGrCD0.s:722 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable + /tmp/ccGGrCD0.s:745 .text.HAL_MPU_Disable:00000014 $d + /tmp/ccGGrCD0.s:750 .text.HAL_MPU_Enable:00000000 $t + /tmp/ccGGrCD0.s:756 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable + /tmp/ccGGrCD0.s:782 .text.HAL_MPU_Enable:00000014 $d + /tmp/ccGGrCD0.s:787 .text.HAL_MPU_ConfigRegion:00000000 $t + /tmp/ccGGrCD0.s:793 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion + /tmp/ccGGrCD0.s:882 .text.HAL_MPU_ConfigRegion:0000005c $d + /tmp/ccGGrCD0.s:887 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t + /tmp/ccGGrCD0.s:893 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping + /tmp/ccGGrCD0.s:917 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d + /tmp/ccGGrCD0.s:922 .text.HAL_NVIC_GetPriority:00000000 $t + /tmp/ccGGrCD0.s:928 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority + /tmp/ccGGrCD0.s:962 .text.HAL_NVIC_SetPendingIRQ:00000000 $t + /tmp/ccGGrCD0.s:968 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ + /tmp/ccGGrCD0.s:1009 .text.HAL_NVIC_SetPendingIRQ:00000018 $d + /tmp/ccGGrCD0.s:1014 .text.HAL_NVIC_GetPendingIRQ:00000000 $t + /tmp/ccGGrCD0.s:1020 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ + /tmp/ccGGrCD0.s:1065 .text.HAL_NVIC_GetPendingIRQ:00000020 $d + /tmp/ccGGrCD0.s:1070 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t + /tmp/ccGGrCD0.s:1076 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccGGrCD0.s:1117 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d + ARM GAS /tmp/ccGGrCD0.s page 86 + + + /tmp/ccGGrCD0.s:1122 .text.HAL_NVIC_GetActive:00000000 $t + /tmp/ccGGrCD0.s:1128 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive + /tmp/ccGGrCD0.s:1173 .text.HAL_NVIC_GetActive:00000020 $d + /tmp/ccGGrCD0.s:1178 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t + /tmp/ccGGrCD0.s:1184 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccGGrCD0.s:1219 .text.HAL_SYSTICK_Callback:00000000 $t + /tmp/ccGGrCD0.s:1225 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback + /tmp/ccGGrCD0.s:1238 .text.HAL_SYSTICK_IRQHandler:00000000 $t + /tmp/ccGGrCD0.s:1244 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_cortex.o b/build/stm32f3xx_hal_cortex.o new file mode 100644 index 0000000..5b2482c Binary files /dev/null and b/build/stm32f3xx_hal_cortex.o differ diff --git a/build/stm32f3xx_hal_dma.d b/build/stm32f3xx_hal_dma.d new file mode 100644 index 0000000..225cf27 --- /dev/null +++ b/build/stm32f3xx_hal_dma.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_dma.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_dma.lst b/build/stm32f3xx_hal_dma.lst new file mode 100644 index 0000000..37ee49a --- /dev/null +++ b/build/stm32f3xx_hal_dma.lst @@ -0,0 +1,3039 @@ +ARM GAS /tmp/cczKwjqg.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_dma.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c" + 20 .section .text.DMA_SetConfig,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 DMA_SetConfig: + 27 .LVL0: + 28 .LFB142: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @file stm32f3xx_hal_dma.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief DMA HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + Initialization and de-initialization functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + IO operation functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + Peripheral State and errors functions + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ============================================================================== + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### How to use this driver ##### + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ============================================================================== + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** necessary). Please refer to Reference manual for connection between peripherals + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** and DMA requests . + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Transfer Direction, Source and Destination data formats, + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** using HAL_DMA_Init() function. + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** detection. + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer + ARM GAS /tmp/cczKwjqg.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** *** Polling mode IO operation *** + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ================================= + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** address and destination address and the Length of data to be transferred + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** *** Interrupt mode IO operation *** + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =================================== + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** In this case the DMA interrupt is configured + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** *** DMA HAL driver macros list *** + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ============================================= + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Below the list of most used macros in DMA HAL driver. + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ****************************************************************************** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @attention + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * Copyright (c) 2016 STMicroelectronics. + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * All rights reserved. + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * This software is licensed under terms that can be found in the LICENSE file in + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the root directory of this software component. + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ****************************************************************************** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #include "stm32f3xx_hal.h" + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @addtogroup STM32F3xx_HAL_Driver + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA DMA + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief DMA HAL module driver + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/ + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Initialization and de-initialization functions + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction, + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value. + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** reference manual. + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Initialize the DMA according to the specified + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle. + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tmp = 0U; + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL == hdma) + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/cczKwjqg.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change DMA peripheral state */ + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get the CR register value */ + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tmp = hdma->Instance->CCR; + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_DIR)); + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tmp |= hdma->Init.Direction | + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Write to DMA Channel CR register */ + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR = tmp; + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Initialize DmaBaseAddress and ChannelIndex parameters used + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Initialise the error code */ + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Initialize the DMA state*/ + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Allocate lock resource and initialize it */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL == hdma) + ARM GAS /tmp/cczKwjqg.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the selected DMA Channelx */ + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel control register */ + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR = 0U; + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CPAR = 0U; + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel memory address register */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CMAR = 0U; + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get DMA Base Address */ + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clean callbacks */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset the error code */ + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset the DMA state */ + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Release Lock */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief I/O operation functions + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### IO operation functions ##### + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + ARM GAS /tmp/cczKwjqg.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] This section provides functions allowing to: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Configure the source, destination address and data length and + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Start DMA transfer with interrupt + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Abort DMA transfer + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Poll for transfer complete + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Handle DMA interrupt request + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Start the DMA Transfer. + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change DMA peripheral state */ + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the peripheral */ + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Enable the Peripheral */ + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Remain BUSY */ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_BUSY; + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + ARM GAS /tmp/cczKwjqg.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change DMA peripheral state */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the peripheral */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Enable the transfer complete, & transfer error interrupts */ + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half transfer interrupt is optional: enable it only if associated callback is available */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL != hdma->XferHalfCpltCallback ) + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Enable the Peripheral */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Remain BUSY */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_BUSY; + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/cczKwjqg.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Abort the DMA Transfer. + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* no transfer ongoing */ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable DMA IT */ + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the channel */ + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state*/ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Abort the DMA Transfer in Interrupt mode. + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* no transfer ongoing */ + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable DMA IT */ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the channel */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Call User Abort callback */ + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferAbortCallback != NULL) + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback(hdma); + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Polling for transfer complete. + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete. + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param Timeout Timeout duration. + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t temp; + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tickstart = 0U; + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* no transfer ongoing */ + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Polling mode not supported in circular mode */ + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get the level transfer complete flag */ + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer Complete flag */ + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** temp = DMA_FLAG_TC1 << hdma->ChannelIndex; + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half Transfer Complete flag */ + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** temp = DMA_FLAG_HT1 << hdma->ChannelIndex; + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get tick */ + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tickstart = HAL_GetTick(); + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** while(RESET == (hdma->DmaBaseAddress->ISR & temp)) + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))) + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Update error code */ + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_READY; + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check for the Timeout */ + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY) + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Update error code */ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the transfer complete flag */ + ARM GAS /tmp/cczKwjqg.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** all transfers are complete) */ + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process unlocked */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Handle DMA interrupt request. + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval None + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_ + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the half transfer interrupt */ + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* State is updated only in Transfer Complete case */ + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferHalfCpltCallback != NULL) + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half transfer callback */ + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/cczKwjqg.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the transfer complete & transfer error interrupts */ + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* if the DMA mode is not CIRCULAR */ + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the transfer complete flag */ + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferCpltCallback != NULL) + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer complete callback */ + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback(hdma); + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & D + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Then, disable all DMA interrupts */ + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Update error code */ + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferErrorCallback != NULL) + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer error callback */ + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback(hdma); + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Register callbacks + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param CallbackID User Callback identifier + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param pCallback pointer to private callback function which has pointer to + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter. + ARM GAS /tmp/cczKwjqg.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** switch (CallbackID) + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = pCallback; + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback; + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = pCallback; + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = pCallback; + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** default: + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Release Lock */ + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief UnRegister callbacks + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param CallbackID User Callback identifier + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** switch (CallbackID) + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID: + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** default: + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Release Lock */ + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Peripheral State functions + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### State and Errors functions ##### + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + ARM GAS /tmp/cczKwjqg.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** This subsection provides functions allowing to + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Check the DMA state + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Get error code + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Returns the DMA state. + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL state + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->State; + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Return the DMA error code + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval DMA Error Code + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->ErrorCode; + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Set the DMA Transfer parameters. + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 29 .loc 1 825 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cczKwjqg.s page 16 + + + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 34 .loc 1 825 1 is_stmt 0 view .LVU1 + 35 0000 30B4 push {r4, r5} + 36 .cfi_def_cfa_offset 8 + 37 .cfi_offset 4, -8 + 38 .cfi_offset 5, -4 + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 39 .loc 1 827 3 is_stmt 1 view .LVU2 + 40 .loc 1 827 47 is_stmt 0 view .LVU3 + 41 0002 0124 movs r4, #1 + 42 0004 056C ldr r5, [r0, #64] + 43 0006 AC40 lsls r4, r4, r5 + 44 .loc 1 827 31 view .LVU4 + 45 0008 C56B ldr r5, [r0, #60] + 46 000a 6C60 str r4, [r5, #4] + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel data length */ + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; + 47 .loc 1 830 3 is_stmt 1 view .LVU5 + 48 .loc 1 830 7 is_stmt 0 view .LVU6 + 49 000c 0468 ldr r4, [r0] + 50 .loc 1 830 25 view .LVU7 + 51 000e 6360 str r3, [r4, #4] + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Peripheral to Memory */ + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 52 .loc 1 833 3 is_stmt 1 view .LVU8 + 53 .loc 1 833 17 is_stmt 0 view .LVU9 + 54 0010 4368 ldr r3, [r0, #4] + 55 .LVL1: + 56 .loc 1 833 5 view .LVU10 + 57 0012 102B cmp r3, #16 + 58 0014 05D0 beq .L5 + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel source address */ + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Memory to Peripheral */ + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel source address */ + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; + 59 .loc 1 845 5 is_stmt 1 view .LVU11 + 60 .loc 1 845 9 is_stmt 0 view .LVU12 + 61 0016 0368 ldr r3, [r0] + 62 .loc 1 845 26 view .LVU13 + 63 0018 9960 str r1, [r3, #8] + 64 .LVL2: + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; + 65 .loc 1 848 5 is_stmt 1 view .LVU14 + ARM GAS /tmp/cczKwjqg.s page 17 + + + 66 .loc 1 848 9 is_stmt 0 view .LVU15 + 67 001a 0368 ldr r3, [r0] + 68 .loc 1 848 26 view .LVU16 + 69 001c DA60 str r2, [r3, #12] + 70 .L1: + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 71 .loc 1 850 1 view .LVU17 + 72 001e 30BC pop {r4, r5} + 73 .cfi_remember_state + 74 .cfi_restore 5 + 75 .cfi_restore 4 + 76 .cfi_def_cfa_offset 0 + 77 0020 7047 bx lr + 78 .LVL3: + 79 .L5: + 80 .cfi_restore_state + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 81 .loc 1 836 5 is_stmt 1 view .LVU18 + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 82 .loc 1 836 9 is_stmt 0 view .LVU19 + 83 0022 0368 ldr r3, [r0] + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 84 .loc 1 836 26 view .LVU20 + 85 0024 9A60 str r2, [r3, #8] + 86 .LVL4: + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 87 .loc 1 839 5 is_stmt 1 view .LVU21 + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 88 .loc 1 839 9 is_stmt 0 view .LVU22 + 89 0026 0368 ldr r3, [r0] + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 90 .loc 1 839 26 view .LVU23 + 91 0028 D960 str r1, [r3, #12] + 92 002a F8E7 b .L1 + 93 .cfi_endproc + 94 .LFE142: + 96 .section .text.DMA_CalcBaseAndBitshift,"ax",%progbits + 97 .align 1 + 98 .syntax unified + 99 .thumb + 100 .thumb_func + 102 DMA_CalcBaseAndBitshift: + 103 .LVL5: + 104 .LFB143: + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Set the DMA base address and channel index depending on DMA instance + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval None + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 105 .loc 1 859 1 is_stmt 1 view -0 + 106 .cfi_startproc + 107 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cczKwjqg.s page 18 + + + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 @ link register save eliminated. + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #if defined (DMA2) + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* calculation of the channel index */ + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) + 110 .loc 1 862 3 view .LVU25 + 111 .loc 1 862 22 is_stmt 0 view .LVU26 + 112 0000 0268 ldr r2, [r0] + 113 .loc 1 862 6 view .LVU27 + 114 0002 0C4B ldr r3, .L9 + 115 0004 9A42 cmp r2, r3 + 116 0006 0AD8 bhi .L7 + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA1 */ + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch + 117 .loc 1 865 5 is_stmt 1 view .LVU28 + 118 .loc 1 865 53 is_stmt 0 view .LVU29 + 119 0008 0B4B ldr r3, .L9+4 + 120 000a 1344 add r3, r3, r2 + 121 .loc 1 865 80 view .LVU30 + 122 000c 0B4A ldr r2, .L9+8 + 123 000e A2FB0323 umull r2, r3, r2, r3 + 124 0012 1B09 lsrs r3, r3, #4 + 125 .loc 1 865 135 view .LVU31 + 126 0014 9B00 lsls r3, r3, #2 + 127 .loc 1 865 24 view .LVU32 + 128 0016 0364 str r3, [r0, #64] + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 129 .loc 1 866 5 is_stmt 1 view .LVU33 + 130 .loc 1 866 26 is_stmt 0 view .LVU34 + 131 0018 094B ldr r3, .L9+12 + 132 001a C363 str r3, [r0, #60] + 133 001c 7047 bx lr + 134 .L7: + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA2 */ + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch + 135 .loc 1 871 5 is_stmt 1 view .LVU35 + 136 .loc 1 871 53 is_stmt 0 view .LVU36 + 137 001e 094B ldr r3, .L9+16 + 138 0020 1344 add r3, r3, r2 + 139 .loc 1 871 80 view .LVU37 + 140 0022 064A ldr r2, .L9+8 + 141 0024 A2FB0323 umull r2, r3, r2, r3 + 142 0028 1B09 lsrs r3, r3, #4 + 143 .loc 1 871 135 view .LVU38 + 144 002a 9B00 lsls r3, r3, #2 + 145 .loc 1 871 24 view .LVU39 + 146 002c 0364 str r3, [r0, #64] + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2; + 147 .loc 1 872 5 is_stmt 1 view .LVU40 + 148 .loc 1 872 26 is_stmt 0 view .LVU41 + 149 002e 064B ldr r3, .L9+20 + 150 0030 C363 str r3, [r0, #60] + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/cczKwjqg.s page 19 + + + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #else + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* calculation of the channel index */ + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA1 */ + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chan + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #endif + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 151 .loc 1 880 1 view .LVU42 + 152 0032 7047 bx lr + 153 .L10: + 154 .align 2 + 155 .L9: + 156 0034 07040240 .word 1073873927 + 157 0038 F8FFFDBF .word -1073872904 + 158 003c CDCCCCCC .word -858993459 + 159 0040 00000240 .word 1073872896 + 160 0044 F8FBFDBF .word -1073873928 + 161 0048 00040240 .word 1073873920 + 162 .cfi_endproc + 163 .LFE143: + 165 .section .text.HAL_DMA_Init,"ax",%progbits + 166 .align 1 + 167 .global HAL_DMA_Init + 168 .syntax unified + 169 .thumb + 170 .thumb_func + 172 HAL_DMA_Init: + 173 .LVL6: + 174 .LFB130: + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tmp = 0U; + 175 .loc 1 137 1 is_stmt 1 view -0 + 176 .cfi_startproc + 177 @ args = 0, pretend = 0, frame = 0 + 178 @ frame_needed = 0, uses_anonymous_args = 0 + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 179 .loc 1 138 3 view .LVU44 + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 180 .loc 1 141 3 view .LVU45 + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 181 .loc 1 141 5 is_stmt 0 view .LVU46 + 182 0000 10B3 cbz r0, .L13 + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tmp = 0U; + 183 .loc 1 137 1 view .LVU47 + 184 0002 10B5 push {r4, lr} + 185 .cfi_def_cfa_offset 8 + 186 .cfi_offset 4, -8 + 187 .cfi_offset 14, -4 + 188 0004 0446 mov r4, r0 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 189 .loc 1 147 3 is_stmt 1 view .LVU48 + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 190 .loc 1 148 3 view .LVU49 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 191 .loc 1 149 3 view .LVU50 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 192 .loc 1 150 3 view .LVU51 + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + ARM GAS /tmp/cczKwjqg.s page 20 + + + 193 .loc 1 151 3 view .LVU52 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 194 .loc 1 152 3 view .LVU53 + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 195 .loc 1 153 3 view .LVU54 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 196 .loc 1 154 3 view .LVU55 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 197 .loc 1 157 3 view .LVU56 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 198 .loc 1 157 15 is_stmt 0 view .LVU57 + 199 0006 0223 movs r3, #2 + 200 0008 80F82130 strb r3, [r0, #33] + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 201 .loc 1 160 3 is_stmt 1 view .LVU58 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 202 .loc 1 160 13 is_stmt 0 view .LVU59 + 203 000c 0168 ldr r1, [r0] + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 204 .loc 1 160 7 view .LVU60 + 205 000e 0A68 ldr r2, [r1] + 206 .LVL7: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 207 .loc 1 163 3 is_stmt 1 view .LVU61 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 208 .loc 1 163 7 is_stmt 0 view .LVU62 + 209 0010 6FF30D12 bfc r2, #4, #10 + 210 .LVL8: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 211 .loc 1 168 3 is_stmt 1 view .LVU63 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 212 .loc 1 168 21 is_stmt 0 view .LVU64 + 213 0014 4368 ldr r3, [r0, #4] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 214 .loc 1 169 21 view .LVU65 + 215 0016 8068 ldr r0, [r0, #8] + 216 .LVL9: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 217 .loc 1 168 39 view .LVU66 + 218 0018 0343 orrs r3, r3, r0 + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 219 .loc 1 169 54 view .LVU67 + 220 001a E068 ldr r0, [r4, #12] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 221 .loc 1 169 42 view .LVU68 + 222 001c 0343 orrs r3, r3, r0 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 223 .loc 1 170 21 view .LVU69 + 224 001e 2069 ldr r0, [r4, #16] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 225 .loc 1 169 72 view .LVU70 + 226 0020 0343 orrs r3, r3, r0 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 227 .loc 1 170 54 view .LVU71 + 228 0022 6069 ldr r0, [r4, #20] + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 229 .loc 1 170 42 view .LVU72 + ARM GAS /tmp/cczKwjqg.s page 21 + + + 230 0024 0343 orrs r3, r3, r0 + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 231 .loc 1 171 21 view .LVU73 + 232 0026 A069 ldr r0, [r4, #24] + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 233 .loc 1 170 72 view .LVU74 + 234 0028 0343 orrs r3, r3, r0 + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 235 .loc 1 171 54 view .LVU75 + 236 002a E069 ldr r0, [r4, #28] + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 237 .loc 1 171 42 view .LVU76 + 238 002c 0343 orrs r3, r3, r0 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 239 .loc 1 168 7 view .LVU77 + 240 002e 1343 orrs r3, r3, r2 + 241 .LVL10: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 242 .loc 1 174 3 is_stmt 1 view .LVU78 + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 243 .loc 1 174 23 is_stmt 0 view .LVU79 + 244 0030 0B60 str r3, [r1] + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 245 .loc 1 178 3 is_stmt 1 view .LVU80 + 246 0032 2046 mov r0, r4 + 247 0034 FFF7FEFF bl DMA_CalcBaseAndBitshift + 248 .LVL11: + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 249 .loc 1 181 3 view .LVU81 + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 250 .loc 1 181 19 is_stmt 0 view .LVU82 + 251 0038 0020 movs r0, #0 + 252 003a A063 str r0, [r4, #56] + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 253 .loc 1 184 3 is_stmt 1 view .LVU83 + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 254 .loc 1 184 15 is_stmt 0 view .LVU84 + 255 003c 0123 movs r3, #1 + 256 003e 84F82130 strb r3, [r4, #33] + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 257 .loc 1 187 3 is_stmt 1 view .LVU85 + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 258 .loc 1 187 14 is_stmt 0 view .LVU86 + 259 0042 84F82000 strb r0, [r4, #32] + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 260 .loc 1 189 3 is_stmt 1 view .LVU87 + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 261 .loc 1 190 1 is_stmt 0 view .LVU88 + 262 0046 10BD pop {r4, pc} + 263 .LVL12: + 264 .L13: + 265 .cfi_def_cfa_offset 0 + 266 .cfi_restore 4 + 267 .cfi_restore 14 + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 268 .loc 1 143 12 view .LVU89 + 269 0048 0120 movs r0, #1 + ARM GAS /tmp/cczKwjqg.s page 22 + + + 270 .LVL13: + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 271 .loc 1 190 1 view .LVU90 + 272 004a 7047 bx lr + 273 .cfi_endproc + 274 .LFE130: + 276 .section .text.HAL_DMA_DeInit,"ax",%progbits + 277 .align 1 + 278 .global HAL_DMA_DeInit + 279 .syntax unified + 280 .thumb + 281 .thumb_func + 283 HAL_DMA_DeInit: + 284 .LVL14: + 285 .LFB131: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 286 .loc 1 199 1 is_stmt 1 view -0 + 287 .cfi_startproc + 288 @ args = 0, pretend = 0, frame = 0 + 289 @ frame_needed = 0, uses_anonymous_args = 0 + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 290 .loc 1 201 3 view .LVU92 + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 291 .loc 1 201 5 is_stmt 0 view .LVU93 + 292 0000 08B3 cbz r0, .L20 + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 293 .loc 1 199 1 view .LVU94 + 294 0002 38B5 push {r3, r4, r5, lr} + 295 .cfi_def_cfa_offset 16 + 296 .cfi_offset 3, -16 + 297 .cfi_offset 4, -12 + 298 .cfi_offset 5, -8 + 299 .cfi_offset 14, -4 + 300 0004 0446 mov r4, r0 + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 301 .loc 1 207 3 is_stmt 1 view .LVU95 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 302 .loc 1 210 3 view .LVU96 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 303 .loc 1 210 7 is_stmt 0 view .LVU97 + 304 0006 0268 ldr r2, [r0] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 305 .loc 1 210 17 view .LVU98 + 306 0008 1368 ldr r3, [r2] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 307 .loc 1 210 23 view .LVU99 + 308 000a 23F00103 bic r3, r3, #1 + 309 000e 1360 str r3, [r2] + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 310 .loc 1 213 3 is_stmt 1 view .LVU100 + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 311 .loc 1 213 7 is_stmt 0 view .LVU101 + 312 0010 0368 ldr r3, [r0] + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 313 .loc 1 213 24 view .LVU102 + 314 0012 0025 movs r5, #0 + 315 0014 1D60 str r5, [r3] + ARM GAS /tmp/cczKwjqg.s page 23 + + + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 316 .loc 1 216 3 is_stmt 1 view .LVU103 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 317 .loc 1 216 7 is_stmt 0 view .LVU104 + 318 0016 0368 ldr r3, [r0] + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 319 .loc 1 216 25 view .LVU105 + 320 0018 5D60 str r5, [r3, #4] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 321 .loc 1 219 3 is_stmt 1 view .LVU106 + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 322 .loc 1 219 7 is_stmt 0 view .LVU107 + 323 001a 0368 ldr r3, [r0] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 324 .loc 1 219 25 view .LVU108 + 325 001c 9D60 str r5, [r3, #8] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 326 .loc 1 222 3 is_stmt 1 view .LVU109 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 327 .loc 1 222 7 is_stmt 0 view .LVU110 + 328 001e 0368 ldr r3, [r0] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 329 .loc 1 222 24 view .LVU111 + 330 0020 DD60 str r5, [r3, #12] + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 331 .loc 1 225 3 is_stmt 1 view .LVU112 + 332 0022 FFF7FEFF bl DMA_CalcBaseAndBitshift + 333 .LVL15: + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 334 .loc 1 228 3 view .LVU113 + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 335 .loc 1 228 52 is_stmt 0 view .LVU114 + 336 0026 216C ldr r1, [r4, #64] + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 337 .loc 1 228 7 view .LVU115 + 338 0028 E26B ldr r2, [r4, #60] + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 339 .loc 1 228 45 view .LVU116 + 340 002a 0123 movs r3, #1 + 341 002c 8B40 lsls r3, r3, r1 + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 342 .loc 1 228 30 view .LVU117 + 343 002e 5360 str r3, [r2, #4] + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 344 .loc 1 231 3 is_stmt 1 view .LVU118 + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 345 .loc 1 231 26 is_stmt 0 view .LVU119 + 346 0030 A562 str r5, [r4, #40] + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 347 .loc 1 232 3 is_stmt 1 view .LVU120 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 348 .loc 1 232 30 is_stmt 0 view .LVU121 + 349 0032 E562 str r5, [r4, #44] + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 350 .loc 1 233 3 is_stmt 1 view .LVU122 + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 351 .loc 1 233 27 is_stmt 0 view .LVU123 + ARM GAS /tmp/cczKwjqg.s page 24 + + + 352 0034 2563 str r5, [r4, #48] + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 353 .loc 1 234 3 is_stmt 1 view .LVU124 + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 354 .loc 1 234 27 is_stmt 0 view .LVU125 + 355 0036 6563 str r5, [r4, #52] + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 356 .loc 1 237 3 is_stmt 1 view .LVU126 + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 357 .loc 1 237 19 is_stmt 0 view .LVU127 + 358 0038 A563 str r5, [r4, #56] + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 359 .loc 1 240 3 is_stmt 1 view .LVU128 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 360 .loc 1 240 15 is_stmt 0 view .LVU129 + 361 003a 84F82150 strb r5, [r4, #33] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 362 .loc 1 243 3 is_stmt 1 view .LVU130 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 363 .loc 1 243 3 view .LVU131 + 364 003e 84F82050 strb r5, [r4, #32] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 365 .loc 1 243 3 view .LVU132 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 366 .loc 1 245 3 view .LVU133 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 367 .loc 1 245 10 is_stmt 0 view .LVU134 + 368 0042 2846 mov r0, r5 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 369 .loc 1 246 1 view .LVU135 + 370 0044 38BD pop {r3, r4, r5, pc} + 371 .LVL16: + 372 .L20: + 373 .cfi_def_cfa_offset 0 + 374 .cfi_restore 3 + 375 .cfi_restore 4 + 376 .cfi_restore 5 + 377 .cfi_restore 14 + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 378 .loc 1 203 12 view .LVU136 + 379 0046 0120 movs r0, #1 + 380 .LVL17: + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 381 .loc 1 246 1 view .LVU137 + 382 0048 7047 bx lr + 383 .cfi_endproc + 384 .LFE131: + 386 .section .text.HAL_DMA_Start,"ax",%progbits + 387 .align 1 + 388 .global HAL_DMA_Start + 389 .syntax unified + 390 .thumb + 391 .thumb_func + 393 HAL_DMA_Start: + 394 .LVL18: + 395 .LFB132: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cczKwjqg.s page 25 + + + 396 .loc 1 281 1 is_stmt 1 view -0 + 397 .cfi_startproc + 398 @ args = 0, pretend = 0, frame = 0 + 399 @ frame_needed = 0, uses_anonymous_args = 0 + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 400 .loc 1 281 1 is_stmt 0 view .LVU139 + 401 0000 70B5 push {r4, r5, r6, lr} + 402 .cfi_def_cfa_offset 16 + 403 .cfi_offset 4, -16 + 404 .cfi_offset 5, -12 + 405 .cfi_offset 6, -8 + 406 .cfi_offset 14, -4 + 407 0002 0446 mov r4, r0 + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 408 .loc 1 282 2 is_stmt 1 view .LVU140 + 409 .LVL19: + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 410 .loc 1 285 3 view .LVU141 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 411 .loc 1 288 3 view .LVU142 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 412 .loc 1 288 3 view .LVU143 + 413 0004 90F82000 ldrb r0, [r0, #32] @ zero_extendqisi2 + 414 .LVL20: + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 415 .loc 1 288 3 is_stmt 0 view .LVU144 + 416 0008 0128 cmp r0, #1 + 417 000a 1FD0 beq .L28 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 418 .loc 1 288 3 is_stmt 1 discriminator 2 view .LVU145 + 419 000c 0120 movs r0, #1 + 420 000e 84F82000 strb r0, [r4, #32] + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 421 .loc 1 288 3 discriminator 2 view .LVU146 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 422 .loc 1 290 3 view .LVU147 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 423 .loc 1 290 33 is_stmt 0 view .LVU148 + 424 0012 94F82100 ldrb r0, [r4, #33] @ zero_extendqisi2 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 425 .loc 1 290 5 view .LVU149 + 426 0016 0128 cmp r0, #1 + 427 0018 04D0 beq .L30 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 428 .loc 1 309 4 is_stmt 1 view .LVU150 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 429 .loc 1 309 4 view .LVU151 + 430 001a 0023 movs r3, #0 + 431 .LVL21: + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 432 .loc 1 309 4 is_stmt 0 view .LVU152 + 433 001c 84F82030 strb r3, [r4, #32] + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 434 .loc 1 309 4 is_stmt 1 view .LVU153 + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 435 .loc 1 312 4 view .LVU154 + 436 .LVL22: + ARM GAS /tmp/cczKwjqg.s page 26 + + + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 437 .loc 1 312 11 is_stmt 0 view .LVU155 + 438 0020 0220 movs r0, #2 + 439 .LVL23: + 440 .L26: + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 441 .loc 1 316 1 view .LVU156 + 442 0022 70BD pop {r4, r5, r6, pc} + 443 .LVL24: + 444 .L30: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 445 .loc 1 293 4 is_stmt 1 view .LVU157 + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 446 .loc 1 293 16 is_stmt 0 view .LVU158 + 447 0024 0220 movs r0, #2 + 448 0026 84F82100 strb r0, [r4, #33] + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 449 .loc 1 295 4 is_stmt 1 view .LVU159 + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 450 .loc 1 295 20 is_stmt 0 view .LVU160 + 451 002a 0025 movs r5, #0 + 452 002c A563 str r5, [r4, #56] + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 453 .loc 1 298 4 is_stmt 1 view .LVU161 + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 454 .loc 1 298 8 is_stmt 0 view .LVU162 + 455 002e 2668 ldr r6, [r4] + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 456 .loc 1 298 18 view .LVU163 + 457 0030 3068 ldr r0, [r6] + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 458 .loc 1 298 24 view .LVU164 + 459 0032 20F00100 bic r0, r0, #1 + 460 0036 3060 str r0, [r6] + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 461 .loc 1 301 4 is_stmt 1 view .LVU165 + 462 0038 2046 mov r0, r4 + 463 003a FFF7FEFF bl DMA_SetConfig + 464 .LVL25: + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 465 .loc 1 304 4 view .LVU166 + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 466 .loc 1 304 8 is_stmt 0 view .LVU167 + 467 003e 2268 ldr r2, [r4] + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 468 .loc 1 304 18 view .LVU168 + 469 0040 1368 ldr r3, [r2] + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 470 .loc 1 304 24 view .LVU169 + 471 0042 43F00103 orr r3, r3, #1 + 472 0046 1360 str r3, [r2] + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 473 .loc 1 282 20 view .LVU170 + 474 0048 2846 mov r0, r5 + 475 004a EAE7 b .L26 + 476 .LVL26: + 477 .L28: + ARM GAS /tmp/cczKwjqg.s page 27 + + + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 478 .loc 1 288 3 discriminator 1 view .LVU171 + 479 004c 0220 movs r0, #2 + 480 004e E8E7 b .L26 + 481 .cfi_endproc + 482 .LFE132: + 484 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 485 .align 1 + 486 .global HAL_DMA_Start_IT + 487 .syntax unified + 488 .thumb + 489 .thumb_func + 491 HAL_DMA_Start_IT: + 492 .LVL27: + 493 .LFB133: + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 494 .loc 1 328 1 is_stmt 1 view -0 + 495 .cfi_startproc + 496 @ args = 0, pretend = 0, frame = 0 + 497 @ frame_needed = 0, uses_anonymous_args = 0 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 498 .loc 1 328 1 is_stmt 0 view .LVU173 + 499 0000 38B5 push {r3, r4, r5, lr} + 500 .cfi_def_cfa_offset 16 + 501 .cfi_offset 3, -16 + 502 .cfi_offset 4, -12 + 503 .cfi_offset 5, -8 + 504 .cfi_offset 14, -4 + 505 0002 0446 mov r4, r0 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 506 .loc 1 329 2 is_stmt 1 view .LVU174 + 507 .LVL28: + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 508 .loc 1 332 3 view .LVU175 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 509 .loc 1 335 3 view .LVU176 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 510 .loc 1 335 3 view .LVU177 + 511 0004 90F82000 ldrb r0, [r0, #32] @ zero_extendqisi2 + 512 .LVL29: + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 513 .loc 1 335 3 is_stmt 0 view .LVU178 + 514 0008 0128 cmp r0, #1 + 515 000a 31D0 beq .L36 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 516 .loc 1 335 3 is_stmt 1 discriminator 2 view .LVU179 + 517 000c 0120 movs r0, #1 + 518 000e 84F82000 strb r0, [r4, #32] + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 519 .loc 1 335 3 discriminator 2 view .LVU180 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 520 .loc 1 337 3 view .LVU181 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 521 .loc 1 337 33 is_stmt 0 view .LVU182 + 522 0012 94F82100 ldrb r0, [r4, #33] @ zero_extendqisi2 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 523 .loc 1 337 5 view .LVU183 + ARM GAS /tmp/cczKwjqg.s page 28 + + + 524 0016 0128 cmp r0, #1 + 525 0018 04D0 beq .L38 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 526 .loc 1 368 5 is_stmt 1 view .LVU184 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 527 .loc 1 368 5 view .LVU185 + 528 001a 0023 movs r3, #0 + 529 .LVL30: + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 530 .loc 1 368 5 is_stmt 0 view .LVU186 + 531 001c 84F82030 strb r3, [r4, #32] + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 532 .loc 1 368 5 is_stmt 1 view .LVU187 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 533 .loc 1 371 5 view .LVU188 + 534 .LVL31: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 535 .loc 1 371 12 is_stmt 0 view .LVU189 + 536 0020 0220 movs r0, #2 + 537 .LVL32: + 538 .L32: + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 539 .loc 1 375 1 view .LVU190 + 540 0022 38BD pop {r3, r4, r5, pc} + 541 .LVL33: + 542 .L38: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 543 .loc 1 340 4 is_stmt 1 view .LVU191 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 544 .loc 1 340 16 is_stmt 0 view .LVU192 + 545 0024 0220 movs r0, #2 + 546 0026 84F82100 strb r0, [r4, #33] + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 547 .loc 1 342 4 is_stmt 1 view .LVU193 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 548 .loc 1 342 20 is_stmt 0 view .LVU194 + 549 002a 0020 movs r0, #0 + 550 002c A063 str r0, [r4, #56] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 551 .loc 1 345 4 is_stmt 1 view .LVU195 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 552 .loc 1 345 8 is_stmt 0 view .LVU196 + 553 002e 2568 ldr r5, [r4] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 554 .loc 1 345 18 view .LVU197 + 555 0030 2868 ldr r0, [r5] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 556 .loc 1 345 24 view .LVU198 + 557 0032 20F00100 bic r0, r0, #1 + 558 0036 2860 str r0, [r5] + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 559 .loc 1 348 4 is_stmt 1 view .LVU199 + 560 0038 2046 mov r0, r4 + 561 003a FFF7FEFF bl DMA_SetConfig + 562 .LVL34: + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 563 .loc 1 352 5 view .LVU200 + ARM GAS /tmp/cczKwjqg.s page 29 + + + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 564 .loc 1 352 20 is_stmt 0 view .LVU201 + 565 003e E36A ldr r3, [r4, #44] + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 566 .loc 1 352 7 view .LVU202 + 567 0040 5BB1 cbz r3, .L34 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 568 .loc 1 354 7 is_stmt 1 view .LVU203 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 569 .loc 1 354 11 is_stmt 0 view .LVU204 + 570 0042 2268 ldr r2, [r4] + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 571 .loc 1 354 21 view .LVU205 + 572 0044 1368 ldr r3, [r2] + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 573 .loc 1 354 27 view .LVU206 + 574 0046 43F00E03 orr r3, r3, #14 + 575 004a 1360 str r3, [r2] + 576 .L35: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 577 .loc 1 363 4 is_stmt 1 view .LVU207 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 578 .loc 1 363 8 is_stmt 0 view .LVU208 + 579 004c 2268 ldr r2, [r4] + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 580 .loc 1 363 18 view .LVU209 + 581 004e 1368 ldr r3, [r2] + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 582 .loc 1 363 24 view .LVU210 + 583 0050 43F00103 orr r3, r3, #1 + 584 0054 1360 str r3, [r2] + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 585 .loc 1 329 20 view .LVU211 + 586 0056 0020 movs r0, #0 + 587 0058 E3E7 b .L32 + 588 .L34: + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 589 .loc 1 358 5 is_stmt 1 view .LVU212 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 590 .loc 1 358 9 is_stmt 0 view .LVU213 + 591 005a 2268 ldr r2, [r4] + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 592 .loc 1 358 19 view .LVU214 + 593 005c 1368 ldr r3, [r2] + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 594 .loc 1 358 25 view .LVU215 + 595 005e 43F00A03 orr r3, r3, #10 + 596 0062 1360 str r3, [r2] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 597 .loc 1 359 5 is_stmt 1 view .LVU216 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 598 .loc 1 359 9 is_stmt 0 view .LVU217 + 599 0064 2268 ldr r2, [r4] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 600 .loc 1 359 19 view .LVU218 + 601 0066 1368 ldr r3, [r2] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/cczKwjqg.s page 30 + + + 602 .loc 1 359 25 view .LVU219 + 603 0068 23F00403 bic r3, r3, #4 + 604 006c 1360 str r3, [r2] + 605 006e EDE7 b .L35 + 606 .LVL35: + 607 .L36: + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 608 .loc 1 335 3 discriminator 1 view .LVU220 + 609 0070 0220 movs r0, #2 + 610 0072 D6E7 b .L32 + 611 .cfi_endproc + 612 .LFE133: + 614 .section .text.HAL_DMA_Abort,"ax",%progbits + 615 .align 1 + 616 .global HAL_DMA_Abort + 617 .syntax unified + 618 .thumb + 619 .thumb_func + 621 HAL_DMA_Abort: + 622 .LVL36: + 623 .LFB134: + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 624 .loc 1 384 1 is_stmt 1 view -0 + 625 .cfi_startproc + 626 @ args = 0, pretend = 0, frame = 0 + 627 @ frame_needed = 0, uses_anonymous_args = 0 + 628 @ link register save eliminated. + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 629 .loc 1 384 1 is_stmt 0 view .LVU222 + 630 0000 0346 mov r3, r0 + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 631 .loc 1 385 3 is_stmt 1 view .LVU223 + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 632 .loc 1 385 10 is_stmt 0 view .LVU224 + 633 0002 90F82120 ldrb r2, [r0, #33] @ zero_extendqisi2 + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 634 .loc 1 385 5 view .LVU225 + 635 0006 022A cmp r2, #2 + 636 0008 06D0 beq .L40 + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 637 .loc 1 388 5 is_stmt 1 view .LVU226 + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 638 .loc 1 388 21 is_stmt 0 view .LVU227 + 639 000a 0422 movs r2, #4 + 640 000c 8263 str r2, [r0, #56] + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 641 .loc 1 391 5 is_stmt 1 view .LVU228 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 642 .loc 1 391 5 view .LVU229 + 643 000e 0022 movs r2, #0 + 644 0010 80F82020 strb r2, [r0, #32] + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 645 .loc 1 391 5 view .LVU230 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 646 .loc 1 393 5 view .LVU231 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 647 .loc 1 393 12 is_stmt 0 view .LVU232 + ARM GAS /tmp/cczKwjqg.s page 31 + + + 648 0014 0120 movs r0, #1 + 649 .LVL37: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 650 .loc 1 393 12 view .LVU233 + 651 0016 7047 bx lr + 652 .LVL38: + 653 .L40: + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 654 .loc 1 398 6 is_stmt 1 view .LVU234 + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 655 .loc 1 398 10 is_stmt 0 view .LVU235 + 656 0018 0168 ldr r1, [r0] + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 657 .loc 1 398 20 view .LVU236 + 658 001a 0A68 ldr r2, [r1] + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 659 .loc 1 398 26 view .LVU237 + 660 001c 22F00E02 bic r2, r2, #14 + 661 0020 0A60 str r2, [r1] + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 662 .loc 1 401 5 is_stmt 1 view .LVU238 + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 663 .loc 1 401 9 is_stmt 0 view .LVU239 + 664 0022 0168 ldr r1, [r0] + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 665 .loc 1 401 19 view .LVU240 + 666 0024 0A68 ldr r2, [r1] + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 667 .loc 1 401 25 view .LVU241 + 668 0026 22F00102 bic r2, r2, #1 + 669 002a 0A60 str r2, [r1] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 670 .loc 1 404 5 is_stmt 1 view .LVU242 + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 671 .loc 1 404 55 is_stmt 0 view .LVU243 + 672 002c 026C ldr r2, [r0, #64] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 673 .loc 1 404 9 view .LVU244 + 674 002e C06B ldr r0, [r0, #60] + 675 .LVL39: + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 676 .loc 1 404 48 view .LVU245 + 677 0030 0121 movs r1, #1 + 678 0032 01FA02F2 lsl r2, r1, r2 + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 679 .loc 1 404 32 view .LVU246 + 680 0036 4260 str r2, [r0, #4] + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 681 .loc 1 407 3 is_stmt 1 view .LVU247 + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 682 .loc 1 407 15 is_stmt 0 view .LVU248 + 683 0038 83F82110 strb r1, [r3, #33] + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 684 .loc 1 410 3 is_stmt 1 view .LVU249 + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 685 .loc 1 410 3 view .LVU250 + 686 003c 0020 movs r0, #0 + ARM GAS /tmp/cczKwjqg.s page 32 + + + 687 003e 83F82000 strb r0, [r3, #32] + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 688 .loc 1 410 3 view .LVU251 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 689 .loc 1 412 3 view .LVU252 + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 690 .loc 1 413 1 is_stmt 0 view .LVU253 + 691 0042 7047 bx lr + 692 .cfi_endproc + 693 .LFE134: + 695 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 696 .align 1 + 697 .global HAL_DMA_Abort_IT + 698 .syntax unified + 699 .thumb + 700 .thumb_func + 702 HAL_DMA_Abort_IT: + 703 .LVL40: + 704 .LFB135: + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 705 .loc 1 422 1 is_stmt 1 view -0 + 706 .cfi_startproc + 707 @ args = 0, pretend = 0, frame = 0 + 708 @ frame_needed = 0, uses_anonymous_args = 0 + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 709 .loc 1 422 1 is_stmt 0 view .LVU255 + 710 0000 08B5 push {r3, lr} + 711 .cfi_def_cfa_offset 8 + 712 .cfi_offset 3, -8 + 713 .cfi_offset 14, -4 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 714 .loc 1 423 3 is_stmt 1 view .LVU256 + 715 .LVL41: + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 716 .loc 1 425 3 view .LVU257 + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 717 .loc 1 425 32 is_stmt 0 view .LVU258 + 718 0002 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 719 .loc 1 425 5 view .LVU259 + 720 0006 022B cmp r3, #2 + 721 0008 03D0 beq .L43 + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 722 .loc 1 428 5 is_stmt 1 view .LVU260 + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 723 .loc 1 428 21 is_stmt 0 view .LVU261 + 724 000a 0423 movs r3, #4 + 725 000c 8363 str r3, [r0, #56] + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 726 .loc 1 430 5 is_stmt 1 view .LVU262 + 727 .LVL42: + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 728 .loc 1 430 12 is_stmt 0 view .LVU263 + 729 000e 0120 movs r0, #1 + 730 .LVL43: + 731 .L44: + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/cczKwjqg.s page 33 + + + 732 .loc 1 456 3 is_stmt 1 view .LVU264 + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 733 .loc 1 457 1 is_stmt 0 view .LVU265 + 734 0010 08BD pop {r3, pc} + 735 .LVL44: + 736 .L43: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 737 .loc 1 436 5 is_stmt 1 view .LVU266 + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 738 .loc 1 436 9 is_stmt 0 view .LVU267 + 739 0012 0268 ldr r2, [r0] + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 740 .loc 1 436 19 view .LVU268 + 741 0014 1368 ldr r3, [r2] + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 742 .loc 1 436 25 view .LVU269 + 743 0016 23F00E03 bic r3, r3, #14 + 744 001a 1360 str r3, [r2] + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 745 .loc 1 439 5 is_stmt 1 view .LVU270 + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 746 .loc 1 439 9 is_stmt 0 view .LVU271 + 747 001c 0268 ldr r2, [r0] + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 748 .loc 1 439 19 view .LVU272 + 749 001e 1368 ldr r3, [r2] + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 750 .loc 1 439 25 view .LVU273 + 751 0020 23F00103 bic r3, r3, #1 + 752 0024 1360 str r3, [r2] + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 753 .loc 1 442 5 is_stmt 1 view .LVU274 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 754 .loc 1 442 54 is_stmt 0 view .LVU275 + 755 0026 036C ldr r3, [r0, #64] + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 756 .loc 1 442 9 view .LVU276 + 757 0028 C16B ldr r1, [r0, #60] + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 758 .loc 1 442 47 view .LVU277 + 759 002a 0122 movs r2, #1 + 760 002c 02FA03F3 lsl r3, r2, r3 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 761 .loc 1 442 32 view .LVU278 + 762 0030 4B60 str r3, [r1, #4] + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 763 .loc 1 445 5 is_stmt 1 view .LVU279 + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 764 .loc 1 445 17 is_stmt 0 view .LVU280 + 765 0032 80F82120 strb r2, [r0, #33] + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 766 .loc 1 448 5 is_stmt 1 view .LVU281 + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 767 .loc 1 448 5 view .LVU282 + 768 0036 0023 movs r3, #0 + 769 0038 80F82030 strb r3, [r0, #32] + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 34 + + + 770 .loc 1 448 5 view .LVU283 + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 771 .loc 1 451 5 view .LVU284 + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 772 .loc 1 451 12 is_stmt 0 view .LVU285 + 773 003c 436B ldr r3, [r0, #52] + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 774 .loc 1 451 7 view .LVU286 + 775 003e 13B1 cbz r3, .L45 + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 776 .loc 1 453 7 is_stmt 1 view .LVU287 + 777 0040 9847 blx r3 + 778 .LVL45: + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 779 .loc 1 423 21 is_stmt 0 view .LVU288 + 780 0042 0020 movs r0, #0 + 781 0044 E4E7 b .L44 + 782 .LVL46: + 783 .L45: + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 784 .loc 1 423 21 view .LVU289 + 785 0046 0020 movs r0, #0 + 786 .LVL47: + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 787 .loc 1 423 21 view .LVU290 + 788 0048 E2E7 b .L44 + 789 .cfi_endproc + 790 .LFE135: + 792 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 793 .align 1 + 794 .global HAL_DMA_PollForTransfer + 795 .syntax unified + 796 .thumb + 797 .thumb_func + 799 HAL_DMA_PollForTransfer: + 800 .LVL48: + 801 .LFB136: + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t temp; + 802 .loc 1 468 1 is_stmt 1 view -0 + 803 .cfi_startproc + 804 @ args = 0, pretend = 0, frame = 0 + 805 @ frame_needed = 0, uses_anonymous_args = 0 + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t temp; + 806 .loc 1 468 1 is_stmt 0 view .LVU292 + 807 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 808 .cfi_def_cfa_offset 32 + 809 .cfi_offset 3, -32 + 810 .cfi_offset 4, -28 + 811 .cfi_offset 5, -24 + 812 .cfi_offset 6, -20 + 813 .cfi_offset 7, -16 + 814 .cfi_offset 8, -12 + 815 .cfi_offset 9, -8 + 816 .cfi_offset 14, -4 + 817 0004 0446 mov r4, r0 + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tickstart = 0U; + 818 .loc 1 469 3 is_stmt 1 view .LVU293 + ARM GAS /tmp/cczKwjqg.s page 35 + + + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 819 .loc 1 470 3 view .LVU294 + 820 .LVL49: + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 821 .loc 1 472 3 view .LVU295 + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 822 .loc 1 472 32 is_stmt 0 view .LVU296 + 823 0006 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 824 .loc 1 472 5 view .LVU297 + 825 000a 022B cmp r3, #2 + 826 000c 07D0 beq .L48 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 827 .loc 1 475 5 is_stmt 1 view .LVU298 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 828 .loc 1 475 21 is_stmt 0 view .LVU299 + 829 000e 0423 movs r3, #4 + 830 0010 8363 str r3, [r0, #56] + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 831 .loc 1 476 5 is_stmt 1 view .LVU300 + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 832 .loc 1 476 5 view .LVU301 + 833 0012 0023 movs r3, #0 + 834 0014 80F82030 strb r3, [r0, #32] + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 835 .loc 1 476 5 view .LVU302 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 836 .loc 1 477 5 view .LVU303 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 837 .loc 1 477 12 is_stmt 0 view .LVU304 + 838 0018 0120 movs r0, #1 + 839 .LVL50: + 840 .L49: + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 841 .loc 1 560 1 view .LVU305 + 842 001a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 843 .LVL51: + 844 .L48: + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 845 .loc 1 560 1 view .LVU306 + 846 001e 8846 mov r8, r1 + 847 0020 1646 mov r6, r2 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 848 .loc 1 481 3 is_stmt 1 view .LVU307 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 849 .loc 1 481 21 is_stmt 0 view .LVU308 + 850 0022 0368 ldr r3, [r0] + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 851 .loc 1 481 31 view .LVU309 + 852 0024 1B68 ldr r3, [r3] + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 853 .loc 1 481 6 view .LVU310 + 854 0026 13F0200F tst r3, #32 + 855 002a 23D1 bne .L61 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 856 .loc 1 488 3 is_stmt 1 view .LVU311 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/cczKwjqg.s page 36 + + + 857 .loc 1 488 5 is_stmt 0 view .LVU312 + 858 002c 39BB cbnz r1, .L51 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 859 .loc 1 491 5 is_stmt 1 view .LVU313 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 860 .loc 1 491 32 is_stmt 0 view .LVU314 + 861 002e 036C ldr r3, [r0, #64] + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 862 .loc 1 491 10 view .LVU315 + 863 0030 0227 movs r7, #2 + 864 0032 9F40 lsls r7, r7, r3 + 865 .LVL52: + 866 .L52: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 867 .loc 1 500 3 is_stmt 1 view .LVU316 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 868 .loc 1 500 15 is_stmt 0 view .LVU317 + 869 0034 FFF7FEFF bl HAL_GetTick + 870 .LVL53: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 871 .loc 1 500 15 view .LVU318 + 872 0038 8146 mov r9, r0 + 873 .LVL54: + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 874 .loc 1 502 3 is_stmt 1 view .LVU319 + 875 .L55: + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 876 .loc 1 502 15 view .LVU320 + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 877 .loc 1 502 23 is_stmt 0 view .LVU321 + 878 003a E56B ldr r5, [r4, #60] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 879 .loc 1 502 39 view .LVU322 + 880 003c 2B68 ldr r3, [r5] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 881 .loc 1 502 15 view .LVU323 + 882 003e 3B42 tst r3, r7 + 883 0040 2CD1 bne .L62 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 884 .loc 1 504 5 is_stmt 1 view .LVU324 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 885 .loc 1 504 38 is_stmt 0 view .LVU325 + 886 0042 2968 ldr r1, [r5] + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 887 .loc 1 504 67 view .LVU326 + 888 0044 226C ldr r2, [r4, #64] + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 889 .loc 1 504 60 view .LVU327 + 890 0046 0823 movs r3, #8 + 891 0048 9340 lsls r3, r3, r2 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 892 .loc 1 504 7 view .LVU328 + 893 004a 1942 tst r1, r3 + 894 004c 1BD1 bne .L63 + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 895 .loc 1 523 5 is_stmt 1 view .LVU329 + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/cczKwjqg.s page 37 + + + 896 .loc 1 523 7 is_stmt 0 view .LVU330 + 897 004e B6F1FF3F cmp r6, #-1 + 898 0052 F2D0 beq .L55 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 899 .loc 1 525 7 is_stmt 1 view .LVU331 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 900 .loc 1 525 9 is_stmt 0 view .LVU332 + 901 0054 2EB1 cbz r6, .L56 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 902 .loc 1 525 31 discriminator 1 view .LVU333 + 903 0056 FFF7FEFF bl HAL_GetTick + 904 .LVL55: + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 905 .loc 1 525 45 discriminator 1 view .LVU334 + 906 005a A0EB0900 sub r0, r0, r9 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 907 .loc 1 525 26 discriminator 1 view .LVU335 + 908 005e B042 cmp r0, r6 + 909 0060 EBD9 bls .L55 + 910 .L56: + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 911 .loc 1 528 9 is_stmt 1 view .LVU336 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 912 .loc 1 528 25 is_stmt 0 view .LVU337 + 913 0062 2023 movs r3, #32 + 914 0064 A363 str r3, [r4, #56] + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 915 .loc 1 531 9 is_stmt 1 view .LVU338 + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 916 .loc 1 531 21 is_stmt 0 view .LVU339 + 917 0066 0120 movs r0, #1 + 918 0068 84F82100 strb r0, [r4, #33] + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 919 .loc 1 534 9 is_stmt 1 view .LVU340 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 920 .loc 1 534 9 view .LVU341 + 921 006c 0023 movs r3, #0 + 922 006e 84F82030 strb r3, [r4, #32] + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 923 .loc 1 534 9 view .LVU342 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 924 .loc 1 536 9 view .LVU343 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 925 .loc 1 536 16 is_stmt 0 view .LVU344 + 926 0072 D2E7 b .L49 + 927 .LVL56: + 928 .L61: + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 929 .loc 1 483 5 is_stmt 1 view .LVU345 + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 930 .loc 1 483 21 is_stmt 0 view .LVU346 + 931 0074 4FF48073 mov r3, #256 + 932 0078 8363 str r3, [r0, #56] + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 933 .loc 1 484 5 is_stmt 1 view .LVU347 + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 934 .loc 1 484 12 is_stmt 0 view .LVU348 + ARM GAS /tmp/cczKwjqg.s page 38 + + + 935 007a 0120 movs r0, #1 + 936 .LVL57: + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 937 .loc 1 484 12 view .LVU349 + 938 007c CDE7 b .L49 + 939 .LVL58: + 940 .L51: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 941 .loc 1 496 5 is_stmt 1 view .LVU350 + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 942 .loc 1 496 32 is_stmt 0 view .LVU351 + 943 007e 036C ldr r3, [r0, #64] + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 944 .loc 1 496 10 view .LVU352 + 945 0080 0427 movs r7, #4 + 946 0082 9F40 lsls r7, r7, r3 + 947 .LVL59: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 948 .loc 1 496 10 view .LVU353 + 949 0084 D6E7 b .L52 + 950 .LVL60: + 951 .L63: + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 952 .loc 1 509 7 is_stmt 1 view .LVU354 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 953 .loc 1 509 49 is_stmt 0 view .LVU355 + 954 0086 0120 movs r0, #1 + 955 0088 00FA02F2 lsl r2, r0, r2 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 956 .loc 1 509 34 view .LVU356 + 957 008c 6A60 str r2, [r5, #4] + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 958 .loc 1 512 7 is_stmt 1 view .LVU357 + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 959 .loc 1 512 23 is_stmt 0 view .LVU358 + 960 008e A063 str r0, [r4, #56] + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 961 .loc 1 515 7 is_stmt 1 view .LVU359 + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 962 .loc 1 515 18 is_stmt 0 view .LVU360 + 963 0090 84F82100 strb r0, [r4, #33] + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 964 .loc 1 518 7 is_stmt 1 view .LVU361 + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 965 .loc 1 518 7 view .LVU362 + 966 0094 0023 movs r3, #0 + 967 0096 84F82030 strb r3, [r4, #32] + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 968 .loc 1 518 7 view .LVU363 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 969 .loc 1 520 7 view .LVU364 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 970 .loc 1 520 14 is_stmt 0 view .LVU365 + 971 009a BEE7 b .L49 + 972 .L62: + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 973 .loc 1 541 3 is_stmt 1 view .LVU366 + ARM GAS /tmp/cczKwjqg.s page 39 + + + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 974 .loc 1 541 5 is_stmt 0 view .LVU367 + 975 009c B8F1000F cmp r8, #0 + 976 00a0 0AD1 bne .L58 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 977 .loc 1 544 5 is_stmt 1 view .LVU368 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 978 .loc 1 544 54 is_stmt 0 view .LVU369 + 979 00a2 226C ldr r2, [r4, #64] + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 980 .loc 1 544 47 view .LVU370 + 981 00a4 0223 movs r3, #2 + 982 00a6 9340 lsls r3, r3, r2 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 983 .loc 1 544 32 view .LVU371 + 984 00a8 6B60 str r3, [r5, #4] + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 985 .loc 1 548 5 is_stmt 1 view .LVU372 + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 986 .loc 1 548 17 is_stmt 0 view .LVU373 + 987 00aa 0123 movs r3, #1 + 988 00ac 84F82130 strb r3, [r4, #33] + 989 .L59: + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 990 .loc 1 557 3 is_stmt 1 view .LVU374 + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 991 .loc 1 557 3 view .LVU375 + 992 00b0 0020 movs r0, #0 + 993 00b2 84F82000 strb r0, [r4, #32] + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 994 .loc 1 557 3 view .LVU376 + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 995 .loc 1 559 3 view .LVU377 + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 996 .loc 1 559 10 is_stmt 0 view .LVU378 + 997 00b6 B0E7 b .L49 + 998 .L58: + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 999 .loc 1 553 5 is_stmt 1 view .LVU379 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1000 .loc 1 553 54 is_stmt 0 view .LVU380 + 1001 00b8 226C ldr r2, [r4, #64] + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1002 .loc 1 553 47 view .LVU381 + 1003 00ba 0423 movs r3, #4 + 1004 00bc 9340 lsls r3, r3, r2 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1005 .loc 1 553 32 view .LVU382 + 1006 00be 6B60 str r3, [r5, #4] + 1007 00c0 F6E7 b .L59 + 1008 .cfi_endproc + 1009 .LFE136: + 1011 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 1012 .align 1 + 1013 .global HAL_DMA_IRQHandler + 1014 .syntax unified + 1015 .thumb + ARM GAS /tmp/cczKwjqg.s page 40 + + + 1016 .thumb_func + 1018 HAL_DMA_IRQHandler: + 1019 .LVL61: + 1020 .LFB137: + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1021 .loc 1 569 1 is_stmt 1 view -0 + 1022 .cfi_startproc + 1023 @ args = 0, pretend = 0, frame = 0 + 1024 @ frame_needed = 0, uses_anonymous_args = 0 + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1025 .loc 1 569 1 is_stmt 0 view .LVU384 + 1026 0000 38B5 push {r3, r4, r5, lr} + 1027 .cfi_def_cfa_offset 16 + 1028 .cfi_offset 3, -16 + 1029 .cfi_offset 4, -12 + 1030 .cfi_offset 5, -8 + 1031 .cfi_offset 14, -4 + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1032 .loc 1 570 2 is_stmt 1 view .LVU385 + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1033 .loc 1 570 25 is_stmt 0 view .LVU386 + 1034 0002 C36B ldr r3, [r0, #60] + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1035 .loc 1 570 11 view .LVU387 + 1036 0004 1A68 ldr r2, [r3] + 1037 .LVL62: + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1038 .loc 1 571 3 is_stmt 1 view .LVU388 + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1039 .loc 1 571 28 is_stmt 0 view .LVU389 + 1040 0006 0468 ldr r4, [r0] + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1041 .loc 1 571 12 view .LVU390 + 1042 0008 2568 ldr r5, [r4] + 1043 .LVL63: + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1044 .loc 1 574 3 is_stmt 1 view .LVU391 + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1045 .loc 1 574 49 is_stmt 0 view .LVU392 + 1046 000a 016C ldr r1, [r0, #64] + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1047 .loc 1 574 42 view .LVU393 + 1048 000c 0423 movs r3, #4 + 1049 000e 8B40 lsls r3, r3, r1 + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1050 .loc 1 574 6 view .LVU394 + 1051 0010 1342 tst r3, r2 + 1052 0012 13D0 beq .L65 + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1053 .loc 1 574 67 discriminator 1 view .LVU395 + 1054 0014 15F0040F tst r5, #4 + 1055 0018 10D0 beq .L65 + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1056 .loc 1 577 4 is_stmt 1 view .LVU396 + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1057 .loc 1 577 22 is_stmt 0 view .LVU397 + 1058 001a 2368 ldr r3, [r4] + ARM GAS /tmp/cczKwjqg.s page 41 + + + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1059 .loc 1 577 6 view .LVU398 + 1060 001c 13F0200F tst r3, #32 + 1061 0020 03D1 bne .L66 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1062 .loc 1 580 5 is_stmt 1 view .LVU399 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1063 .loc 1 580 19 is_stmt 0 view .LVU400 + 1064 0022 2368 ldr r3, [r4] + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1065 .loc 1 580 25 view .LVU401 + 1066 0024 23F00403 bic r3, r3, #4 + 1067 0028 2360 str r3, [r4] + 1068 .L66: + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1069 .loc 1 584 4 is_stmt 1 view .LVU402 + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1070 .loc 1 584 53 is_stmt 0 view .LVU403 + 1071 002a 016C ldr r1, [r0, #64] + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1072 .loc 1 584 8 view .LVU404 + 1073 002c C26B ldr r2, [r0, #60] + 1074 .LVL64: + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1075 .loc 1 584 46 view .LVU405 + 1076 002e 0423 movs r3, #4 + 1077 0030 8B40 lsls r3, r3, r1 + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1078 .loc 1 584 31 view .LVU406 + 1079 0032 5360 str r3, [r2, #4] + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1080 .loc 1 589 4 is_stmt 1 view .LVU407 + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1081 .loc 1 589 11 is_stmt 0 view .LVU408 + 1082 0034 C36A ldr r3, [r0, #44] + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1083 .loc 1 589 6 view .LVU409 + 1084 0036 03B1 cbz r3, .L64 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1085 .loc 1 592 5 is_stmt 1 view .LVU410 + 1086 0038 9847 blx r3 + 1087 .LVL65: + 1088 .L64: + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1089 .loc 1 648 1 is_stmt 0 view .LVU411 + 1090 003a 38BD pop {r3, r4, r5, pc} + 1091 .LVL66: + 1092 .L65: + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1093 .loc 1 597 8 is_stmt 1 view .LVU412 + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1094 .loc 1 597 47 is_stmt 0 view .LVU413 + 1095 003c 0223 movs r3, #2 + 1096 003e 8B40 lsls r3, r3, r1 + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1097 .loc 1 597 11 view .LVU414 + 1098 0040 1342 tst r3, r2 + ARM GAS /tmp/cczKwjqg.s page 42 + + + 1099 0042 1AD0 beq .L68 + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1100 .loc 1 597 72 discriminator 1 view .LVU415 + 1101 0044 15F0020F tst r5, #2 + 1102 0048 17D0 beq .L68 + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1103 .loc 1 599 4 is_stmt 1 view .LVU416 + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1104 .loc 1 599 22 is_stmt 0 view .LVU417 + 1105 004a 2368 ldr r3, [r4] + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1106 .loc 1 599 6 view .LVU418 + 1107 004c 13F0200F tst r3, #32 + 1108 0050 06D1 bne .L69 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1109 .loc 1 603 5 is_stmt 1 view .LVU419 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1110 .loc 1 603 19 is_stmt 0 view .LVU420 + 1111 0052 2368 ldr r3, [r4] + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1112 .loc 1 603 25 view .LVU421 + 1113 0054 23F00A03 bic r3, r3, #10 + 1114 0058 2360 str r3, [r4] + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1115 .loc 1 606 5 is_stmt 1 view .LVU422 + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1116 .loc 1 606 17 is_stmt 0 view .LVU423 + 1117 005a 0123 movs r3, #1 + 1118 005c 80F82130 strb r3, [r0, #33] + 1119 .L69: + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1120 .loc 1 610 4 is_stmt 1 view .LVU424 + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1121 .loc 1 610 53 is_stmt 0 view .LVU425 + 1122 0060 016C ldr r1, [r0, #64] + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1123 .loc 1 610 8 view .LVU426 + 1124 0062 C26B ldr r2, [r0, #60] + 1125 .LVL67: + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1126 .loc 1 610 46 view .LVU427 + 1127 0064 0223 movs r3, #2 + 1128 0066 8B40 lsls r3, r3, r1 + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1129 .loc 1 610 31 view .LVU428 + 1130 0068 5360 str r3, [r2, #4] + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1131 .loc 1 613 4 is_stmt 1 view .LVU429 + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1132 .loc 1 613 4 view .LVU430 + 1133 006a 0023 movs r3, #0 + 1134 006c 80F82030 strb r3, [r0, #32] + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1135 .loc 1 613 4 view .LVU431 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1136 .loc 1 615 4 view .LVU432 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/cczKwjqg.s page 43 + + + 1137 .loc 1 615 11 is_stmt 0 view .LVU433 + 1138 0070 836A ldr r3, [r0, #40] + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1139 .loc 1 615 6 view .LVU434 + 1140 0072 002B cmp r3, #0 + 1141 0074 E1D0 beq .L64 + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1142 .loc 1 618 5 is_stmt 1 view .LVU435 + 1143 0076 9847 blx r3 + 1144 .LVL68: + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1145 .loc 1 618 5 is_stmt 0 view .LVU436 + 1146 0078 DFE7 b .L64 + 1147 .LVL69: + 1148 .L68: + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1149 .loc 1 623 8 is_stmt 1 view .LVU437 + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1150 .loc 1 623 48 is_stmt 0 view .LVU438 + 1151 007a 0823 movs r3, #8 + 1152 007c 8B40 lsls r3, r3, r1 + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1153 .loc 1 623 11 view .LVU439 + 1154 007e 1342 tst r3, r2 + 1155 0080 DBD0 beq .L64 + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1156 .loc 1 623 73 discriminator 1 view .LVU440 + 1157 0082 15F0080F tst r5, #8 + 1158 0086 D8D0 beq .L64 + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1159 .loc 1 628 5 is_stmt 1 view .LVU441 + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1160 .loc 1 628 19 is_stmt 0 view .LVU442 + 1161 0088 2368 ldr r3, [r4] + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1162 .loc 1 628 25 view .LVU443 + 1163 008a 23F00E03 bic r3, r3, #14 + 1164 008e 2360 str r3, [r4] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1165 .loc 1 631 5 is_stmt 1 view .LVU444 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1166 .loc 1 631 54 is_stmt 0 view .LVU445 + 1167 0090 026C ldr r2, [r0, #64] + 1168 .LVL70: + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1169 .loc 1 631 9 view .LVU446 + 1170 0092 C16B ldr r1, [r0, #60] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1171 .loc 1 631 47 view .LVU447 + 1172 0094 0123 movs r3, #1 + 1173 0096 03FA02F2 lsl r2, r3, r2 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1174 .loc 1 631 32 view .LVU448 + 1175 009a 4A60 str r2, [r1, #4] + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1176 .loc 1 634 5 is_stmt 1 view .LVU449 + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 44 + + + 1177 .loc 1 634 21 is_stmt 0 view .LVU450 + 1178 009c 8363 str r3, [r0, #56] + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1179 .loc 1 637 5 is_stmt 1 view .LVU451 + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1180 .loc 1 637 17 is_stmt 0 view .LVU452 + 1181 009e 80F82130 strb r3, [r0, #33] + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1182 .loc 1 640 5 is_stmt 1 view .LVU453 + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1183 .loc 1 640 5 view .LVU454 + 1184 00a2 0023 movs r3, #0 + 1185 00a4 80F82030 strb r3, [r0, #32] + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1186 .loc 1 640 5 view .LVU455 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1187 .loc 1 642 5 view .LVU456 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1188 .loc 1 642 12 is_stmt 0 view .LVU457 + 1189 00a8 036B ldr r3, [r0, #48] + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1190 .loc 1 642 7 view .LVU458 + 1191 00aa 002B cmp r3, #0 + 1192 00ac C5D0 beq .L64 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1193 .loc 1 645 6 is_stmt 1 view .LVU459 + 1194 00ae 9847 blx r3 + 1195 .LVL71: + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1196 .loc 1 648 1 is_stmt 0 view .LVU460 + 1197 00b0 C3E7 b .L64 + 1198 .cfi_endproc + 1199 .LFE137: + 1201 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 1202 .align 1 + 1203 .global HAL_DMA_RegisterCallback + 1204 .syntax unified + 1205 .thumb + 1206 .thumb_func + 1208 HAL_DMA_RegisterCallback: + 1209 .LVL72: + 1210 .LFB138: + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1211 .loc 1 661 1 is_stmt 1 view -0 + 1212 .cfi_startproc + 1213 @ args = 0, pretend = 0, frame = 0 + 1214 @ frame_needed = 0, uses_anonymous_args = 0 + 1215 @ link register save eliminated. + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1216 .loc 1 661 1 is_stmt 0 view .LVU462 + 1217 0000 0346 mov r3, r0 + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1218 .loc 1 662 3 is_stmt 1 view .LVU463 + 1219 .LVL73: + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1220 .loc 1 665 3 view .LVU464 + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 45 + + + 1221 .loc 1 665 3 view .LVU465 + 1222 0002 90F82000 ldrb r0, [r0, #32] @ zero_extendqisi2 + 1223 .LVL74: + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1224 .loc 1 665 3 is_stmt 0 view .LVU466 + 1225 0006 0128 cmp r0, #1 + 1226 0008 1DD0 beq .L79 + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1227 .loc 1 665 3 is_stmt 1 discriminator 2 view .LVU467 + 1228 000a 0120 movs r0, #1 + 1229 000c 83F82000 strb r0, [r3, #32] + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1230 .loc 1 665 3 discriminator 2 view .LVU468 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1231 .loc 1 667 3 view .LVU469 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1232 .loc 1 667 33 is_stmt 0 view .LVU470 + 1233 0010 93F82100 ldrb r0, [r3, #33] @ zero_extendqisi2 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1234 .loc 1 667 5 view .LVU471 + 1235 0014 0128 cmp r0, #1 + 1236 0016 04D0 beq .L82 + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1237 .loc 1 694 12 view .LVU472 + 1238 0018 0120 movs r0, #1 + 1239 .L73: + 1240 .LVL75: + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1241 .loc 1 698 3 is_stmt 1 view .LVU473 + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1242 .loc 1 698 3 view .LVU474 + 1243 001a 0022 movs r2, #0 + 1244 .LVL76: + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1245 .loc 1 698 3 is_stmt 0 view .LVU475 + 1246 001c 83F82020 strb r2, [r3, #32] + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1247 .loc 1 698 3 is_stmt 1 view .LVU476 + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1248 .loc 1 700 3 view .LVU477 + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1249 .loc 1 700 10 is_stmt 0 view .LVU478 + 1250 0020 7047 bx lr + 1251 .LVL77: + 1252 .L82: + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1253 .loc 1 669 5 is_stmt 1 view .LVU479 + 1254 0022 0329 cmp r1, #3 + 1255 0024 F9D8 bhi .L73 + 1256 0026 DFE801F0 tbb [pc, r1] + 1257 .L75: + 1258 002a 02 .byte (.L78-.L75)/2 + 1259 002b 05 .byte (.L77-.L75)/2 + 1260 002c 08 .byte (.L76-.L75)/2 + 1261 002d 0B .byte (.L74-.L75)/2 + 1262 .p2align 1 + 1263 .L78: + ARM GAS /tmp/cczKwjqg.s page 46 + + + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1264 .loc 1 672 12 view .LVU480 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1265 .loc 1 672 35 is_stmt 0 view .LVU481 + 1266 002e 9A62 str r2, [r3, #40] + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1267 .loc 1 673 12 is_stmt 1 view .LVU482 + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1268 .loc 1 662 21 is_stmt 0 view .LVU483 + 1269 0030 0846 mov r0, r1 + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1270 .loc 1 673 12 view .LVU484 + 1271 0032 F2E7 b .L73 + 1272 .L77: + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1273 .loc 1 676 12 is_stmt 1 view .LVU485 + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1274 .loc 1 676 39 is_stmt 0 view .LVU486 + 1275 0034 DA62 str r2, [r3, #44] + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1276 .loc 1 677 12 is_stmt 1 view .LVU487 + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1277 .loc 1 662 21 is_stmt 0 view .LVU488 + 1278 0036 0020 movs r0, #0 + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1279 .loc 1 677 12 view .LVU489 + 1280 0038 EFE7 b .L73 + 1281 .L76: + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1282 .loc 1 680 12 is_stmt 1 view .LVU490 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1283 .loc 1 680 36 is_stmt 0 view .LVU491 + 1284 003a 1A63 str r2, [r3, #48] + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1285 .loc 1 681 12 is_stmt 1 view .LVU492 + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1286 .loc 1 662 21 is_stmt 0 view .LVU493 + 1287 003c 0020 movs r0, #0 + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1288 .loc 1 681 12 view .LVU494 + 1289 003e ECE7 b .L73 + 1290 .L74: + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1291 .loc 1 684 12 is_stmt 1 view .LVU495 + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1292 .loc 1 684 36 is_stmt 0 view .LVU496 + 1293 0040 5A63 str r2, [r3, #52] + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1294 .loc 1 685 12 is_stmt 1 view .LVU497 + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1295 .loc 1 662 21 is_stmt 0 view .LVU498 + 1296 0042 0020 movs r0, #0 + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1297 .loc 1 685 12 view .LVU499 + 1298 0044 E9E7 b .L73 + 1299 .L79: + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 47 + + + 1300 .loc 1 665 3 discriminator 1 view .LVU500 + 1301 0046 0220 movs r0, #2 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1302 .loc 1 701 1 view .LVU501 + 1303 0048 7047 bx lr + 1304 .cfi_endproc + 1305 .LFE138: + 1307 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 1308 .align 1 + 1309 .global HAL_DMA_UnRegisterCallback + 1310 .syntax unified + 1311 .thumb + 1312 .thumb_func + 1314 HAL_DMA_UnRegisterCallback: + 1315 .LVL78: + 1316 .LFB139: + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1317 .loc 1 712 1 is_stmt 1 view -0 + 1318 .cfi_startproc + 1319 @ args = 0, pretend = 0, frame = 0 + 1320 @ frame_needed = 0, uses_anonymous_args = 0 + 1321 @ link register save eliminated. + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1322 .loc 1 712 1 is_stmt 0 view .LVU503 + 1323 0000 0346 mov r3, r0 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1324 .loc 1 713 3 is_stmt 1 view .LVU504 + 1325 .LVL79: + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1326 .loc 1 716 3 view .LVU505 + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1327 .loc 1 716 3 view .LVU506 + 1328 0002 90F82020 ldrb r2, [r0, #32] @ zero_extendqisi2 + 1329 0006 012A cmp r2, #1 + 1330 0008 25D0 beq .L92 + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1331 .loc 1 716 3 discriminator 2 view .LVU507 + 1332 000a 0122 movs r2, #1 + 1333 000c 80F82020 strb r2, [r0, #32] + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1334 .loc 1 716 3 discriminator 2 view .LVU508 + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1335 .loc 1 718 3 view .LVU509 + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1336 .loc 1 718 33 is_stmt 0 view .LVU510 + 1337 0010 90F82100 ldrb r0, [r0, #33] @ zero_extendqisi2 + 1338 .LVL80: + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1339 .loc 1 718 5 view .LVU511 + 1340 0014 9042 cmp r0, r2 + 1341 0016 04D0 beq .L95 + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1342 .loc 1 752 12 view .LVU512 + 1343 0018 0120 movs r0, #1 + 1344 .L85: + 1345 .LVL81: + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/cczKwjqg.s page 48 + + + 1346 .loc 1 756 3 is_stmt 1 view .LVU513 + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1347 .loc 1 756 3 view .LVU514 + 1348 001a 0022 movs r2, #0 + 1349 001c 83F82020 strb r2, [r3, #32] + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1350 .loc 1 756 3 view .LVU515 + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1351 .loc 1 758 3 view .LVU516 + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1352 .loc 1 758 10 is_stmt 0 view .LVU517 + 1353 0020 7047 bx lr + 1354 .LVL82: + 1355 .L95: + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1356 .loc 1 720 5 is_stmt 1 view .LVU518 + 1357 0022 0429 cmp r1, #4 + 1358 0024 F9D8 bhi .L85 + 1359 0026 DFE801F0 tbb [pc, r1] + 1360 .L87: + 1361 002a 03 .byte (.L91-.L87)/2 + 1362 002b 07 .byte (.L90-.L87)/2 + 1363 002c 0A .byte (.L89-.L87)/2 + 1364 002d 0D .byte (.L88-.L87)/2 + 1365 002e 10 .byte (.L86-.L87)/2 + 1366 002f 00 .p2align 1 + 1367 .L91: + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1368 .loc 1 723 12 view .LVU519 + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1369 .loc 1 723 35 is_stmt 0 view .LVU520 + 1370 0030 0022 movs r2, #0 + 1371 0032 9A62 str r2, [r3, #40] + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1372 .loc 1 724 12 is_stmt 1 view .LVU521 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1373 .loc 1 713 21 is_stmt 0 view .LVU522 + 1374 0034 0846 mov r0, r1 + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1375 .loc 1 724 12 view .LVU523 + 1376 0036 F0E7 b .L85 + 1377 .L90: + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1378 .loc 1 727 12 is_stmt 1 view .LVU524 + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1379 .loc 1 727 39 is_stmt 0 view .LVU525 + 1380 0038 0020 movs r0, #0 + 1381 003a D862 str r0, [r3, #44] + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1382 .loc 1 728 12 is_stmt 1 view .LVU526 + 1383 003c EDE7 b .L85 + 1384 .L89: + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1385 .loc 1 731 12 view .LVU527 + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1386 .loc 1 731 36 is_stmt 0 view .LVU528 + 1387 003e 0020 movs r0, #0 + ARM GAS /tmp/cczKwjqg.s page 49 + + + 1388 0040 1863 str r0, [r3, #48] + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1389 .loc 1 732 12 is_stmt 1 view .LVU529 + 1390 0042 EAE7 b .L85 + 1391 .L88: + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1392 .loc 1 735 12 view .LVU530 + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1393 .loc 1 735 36 is_stmt 0 view .LVU531 + 1394 0044 0020 movs r0, #0 + 1395 0046 5863 str r0, [r3, #52] + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1396 .loc 1 736 12 is_stmt 1 view .LVU532 + 1397 0048 E7E7 b .L85 + 1398 .L86: + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1399 .loc 1 739 12 view .LVU533 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1400 .loc 1 739 35 is_stmt 0 view .LVU534 + 1401 004a 0020 movs r0, #0 + 1402 004c 9862 str r0, [r3, #40] + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1403 .loc 1 740 12 is_stmt 1 view .LVU535 + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1404 .loc 1 740 39 is_stmt 0 view .LVU536 + 1405 004e D862 str r0, [r3, #44] + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1406 .loc 1 741 12 is_stmt 1 view .LVU537 + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1407 .loc 1 741 36 is_stmt 0 view .LVU538 + 1408 0050 1863 str r0, [r3, #48] + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1409 .loc 1 742 12 is_stmt 1 view .LVU539 + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1410 .loc 1 742 36 is_stmt 0 view .LVU540 + 1411 0052 5863 str r0, [r3, #52] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1412 .loc 1 743 12 is_stmt 1 view .LVU541 + 1413 0054 E1E7 b .L85 + 1414 .LVL83: + 1415 .L92: + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1416 .loc 1 716 3 is_stmt 0 discriminator 1 view .LVU542 + 1417 0056 0220 movs r0, #2 + 1418 .LVL84: + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1419 .loc 1 759 1 view .LVU543 + 1420 0058 7047 bx lr + 1421 .cfi_endproc + 1422 .LFE139: + 1424 .section .text.HAL_DMA_GetState,"ax",%progbits + 1425 .align 1 + 1426 .global HAL_DMA_GetState + 1427 .syntax unified + 1428 .thumb + 1429 .thumb_func + 1431 HAL_DMA_GetState: + ARM GAS /tmp/cczKwjqg.s page 50 + + + 1432 .LVL85: + 1433 .LFB140: + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->State; + 1434 .loc 1 788 1 is_stmt 1 view -0 + 1435 .cfi_startproc + 1436 @ args = 0, pretend = 0, frame = 0 + 1437 @ frame_needed = 0, uses_anonymous_args = 0 + 1438 @ link register save eliminated. + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1439 .loc 1 789 3 view .LVU545 + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1440 .loc 1 790 1 is_stmt 0 view .LVU546 + 1441 0000 90F82100 ldrb r0, [r0, #33] @ zero_extendqisi2 + 1442 .LVL86: + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1443 .loc 1 790 1 view .LVU547 + 1444 0004 7047 bx lr + 1445 .cfi_endproc + 1446 .LFE140: + 1448 .section .text.HAL_DMA_GetError,"ax",%progbits + 1449 .align 1 + 1450 .global HAL_DMA_GetError + 1451 .syntax unified + 1452 .thumb + 1453 .thumb_func + 1455 HAL_DMA_GetError: + 1456 .LVL87: + 1457 .LFB141: + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->ErrorCode; + 1458 .loc 1 799 1 is_stmt 1 view -0 + 1459 .cfi_startproc + 1460 @ args = 0, pretend = 0, frame = 0 + 1461 @ frame_needed = 0, uses_anonymous_args = 0 + 1462 @ link register save eliminated. + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1463 .loc 1 800 3 view .LVU549 + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1464 .loc 1 800 14 is_stmt 0 view .LVU550 + 1465 0000 806B ldr r0, [r0, #56] + 1466 .LVL88: + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1467 .loc 1 801 1 view .LVU551 + 1468 0002 7047 bx lr + 1469 .cfi_endproc + 1470 .LFE141: + 1472 .text + 1473 .Letext0: + 1474 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1475 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1476 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1477 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1478 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1479 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 1480 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/cczKwjqg.s page 51 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_dma.c + /tmp/cczKwjqg.s:21 .text.DMA_SetConfig:00000000 $t + /tmp/cczKwjqg.s:26 .text.DMA_SetConfig:00000000 DMA_SetConfig + /tmp/cczKwjqg.s:97 .text.DMA_CalcBaseAndBitshift:00000000 $t + /tmp/cczKwjqg.s:102 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift + /tmp/cczKwjqg.s:156 .text.DMA_CalcBaseAndBitshift:00000034 $d + /tmp/cczKwjqg.s:166 .text.HAL_DMA_Init:00000000 $t + /tmp/cczKwjqg.s:172 .text.HAL_DMA_Init:00000000 HAL_DMA_Init + /tmp/cczKwjqg.s:277 .text.HAL_DMA_DeInit:00000000 $t + /tmp/cczKwjqg.s:283 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit + /tmp/cczKwjqg.s:387 .text.HAL_DMA_Start:00000000 $t + /tmp/cczKwjqg.s:393 .text.HAL_DMA_Start:00000000 HAL_DMA_Start + /tmp/cczKwjqg.s:485 .text.HAL_DMA_Start_IT:00000000 $t + /tmp/cczKwjqg.s:491 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT + /tmp/cczKwjqg.s:615 .text.HAL_DMA_Abort:00000000 $t + /tmp/cczKwjqg.s:621 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort + /tmp/cczKwjqg.s:696 .text.HAL_DMA_Abort_IT:00000000 $t + /tmp/cczKwjqg.s:702 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT + /tmp/cczKwjqg.s:793 .text.HAL_DMA_PollForTransfer:00000000 $t + /tmp/cczKwjqg.s:799 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer + /tmp/cczKwjqg.s:1012 .text.HAL_DMA_IRQHandler:00000000 $t + /tmp/cczKwjqg.s:1018 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler + /tmp/cczKwjqg.s:1202 .text.HAL_DMA_RegisterCallback:00000000 $t + /tmp/cczKwjqg.s:1208 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback + /tmp/cczKwjqg.s:1258 .text.HAL_DMA_RegisterCallback:0000002a $d + /tmp/cczKwjqg.s:1262 .text.HAL_DMA_RegisterCallback:0000002e $t + /tmp/cczKwjqg.s:1308 .text.HAL_DMA_UnRegisterCallback:00000000 $t + /tmp/cczKwjqg.s:1314 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback + /tmp/cczKwjqg.s:1361 .text.HAL_DMA_UnRegisterCallback:0000002a $d + /tmp/cczKwjqg.s:1425 .text.HAL_DMA_GetState:00000000 $t + /tmp/cczKwjqg.s:1431 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState + /tmp/cczKwjqg.s:1449 .text.HAL_DMA_GetError:00000000 $t + /tmp/cczKwjqg.s:1455 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError + /tmp/cczKwjqg.s:1366 .text.HAL_DMA_UnRegisterCallback:0000002f $d + /tmp/cczKwjqg.s:1366 .text.HAL_DMA_UnRegisterCallback:00000030 $t + +UNDEFINED SYMBOLS +HAL_GetTick diff --git a/build/stm32f3xx_hal_dma.o b/build/stm32f3xx_hal_dma.o new file mode 100644 index 0000000..88e117b Binary files /dev/null and b/build/stm32f3xx_hal_dma.o differ diff --git a/build/stm32f3xx_hal_exti.d b/build/stm32f3xx_hal_exti.d new file mode 100644 index 0000000..7775d4d --- /dev/null +++ b/build/stm32f3xx_hal_exti.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_exti.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_exti.lst b/build/stm32f3xx_hal_exti.lst new file mode 100644 index 0000000..4f608c9 --- /dev/null +++ b/build/stm32f3xx_hal_exti.lst @@ -0,0 +1,1820 @@ +ARM GAS /tmp/ccCmTXO9.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_exti.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c" + 20 .section .text.HAL_EXTI_SetConfigLine,"ax",%progbits + 21 .align 1 + 22 .global HAL_EXTI_SetConfigLine + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_EXTI_SetConfigLine: + 28 .LVL0: + 29 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @file stm32f3xx_hal_exti.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief EXTI HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * functionalities of the Extended Interrupts and events controller (EXTI) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ****************************************************************************** + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @attention + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * Copyright (c) 2019 STMicroelectronics. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * All rights reserved. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * in the root directory of this software component. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ****************************************************************************** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @verbatim + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ============================================================================== + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### EXTI Peripheral features ##### + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ============================================================================== + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** [..] + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Each Exti line can be configured within this driver. + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes + ARM GAS /tmp/ccCmTXO9.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Interrupt + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Event + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Both of them + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Configurable Exti lines can be configured with 3 different triggers + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Rising + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Falling + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Both of them + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) When set in interrupt mode, configurable Exti lines have two different + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** interrupts pending registers which allow to distinguish which transition + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** occurs: + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Rising edge pending interrupt + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Falling + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** be selected through multiplexer. + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### How to use this driver ##### + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ============================================================================== + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** [..] + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Configure the EXTI line using HAL_EXTI_SetConfigLine(). + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Choose the interrupt line number by setting "Line" member from + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Configure the interrupt and/or event mode using "Mode" member from + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) For configurable lines, configure rising and/or falling trigger + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** "Trigger" member from EXTI_ConfigTypeDef structure. + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel" + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** member from GPIO_InitTypeDef structure. + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Get current Exti configuration of a dedicated line using + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_EXTI_GetConfigLine(). + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide exiting handle as first parameter. + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide which callback will be registered using one value from + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI_CallbackIDTypeDef. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide callback function pointer. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Get interrupt pending bit using HAL_EXTI_GetPending(). + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @endverbatim + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #include "stm32f3xx_hal.h" + ARM GAS /tmp/ccCmTXO9.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup STM32F3xx_HAL_Driver + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** MISRA C:2012 deviation rule has been granted for following rule: + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * of bounds [0,3] in following API : + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * HAL_EXTI_SetConfigLine + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * HAL_EXTI_GetConfigLine + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * HAL_EXTI_ClearConfigLine + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #ifdef HAL_EXTI_MODULE_ENABLED + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private typedef -----------------------------------------------------------*/ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private defines -----------------------------------------------------------*/ + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @defgroup EXTI_Private_Constants EXTI Private Constants + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #define EXTI_MODE_OFFSET 0x08u /* 0x20: offset between CPU IMR/EMR registers * + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #define EXTI_CONFIG_OFFSET 0x08u /* 0x20: offset between CPU Rising/Falling conf + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @} + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private macros ------------------------------------------------------------*/ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private variables ---------------------------------------------------------*/ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private function prototypes -----------------------------------------------*/ + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Exported functions --------------------------------------------------------*/ + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group1 + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Configuration functions + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @verbatim + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### Configuration functions ##### + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @endverbatim + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Set configuration of a dedicated Exti line. + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param pExtiConfig Pointer on EXTI configuration to be set. + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + ARM GAS /tmp/ccCmTXO9.s page 4 + + + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 30 .loc 1 144 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 35 .loc 1 145 3 view .LVU1 + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 36 .loc 1 146 3 view .LVU2 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 37 .loc 1 147 3 view .LVU3 + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 38 .loc 1 148 3 view .LVU4 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 39 .loc 1 149 3 view .LVU5 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 40 .loc 1 152 3 view .LVU6 + 41 .loc 1 152 6 is_stmt 0 view .LVU7 + 42 0000 0028 cmp r0, #0 + 43 0002 5ED0 beq .L12 + 44 .loc 1 152 23 discriminator 1 view .LVU8 + 45 0004 0029 cmp r1, #0 + 46 0006 5ED0 beq .L13 + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 47 .loc 1 144 1 view .LVU9 + 48 0008 F0B4 push {r4, r5, r6, r7} + 49 .cfi_def_cfa_offset 16 + 50 .cfi_offset 4, -16 + 51 .cfi_offset 5, -12 + 52 .cfi_offset 6, -8 + 53 .cfi_offset 7, -4 + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(pExtiConfig->Line)); + 54 .loc 1 158 3 is_stmt 1 view .LVU10 + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_MODE(pExtiConfig->Mode)); + 55 .loc 1 159 3 view .LVU11 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Assign line number to handle */ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->Line = pExtiConfig->Line; + 56 .loc 1 162 3 view .LVU12 + 57 .loc 1 162 28 is_stmt 0 view .LVU13 + 58 000a 0A68 ldr r2, [r1] + 59 .loc 1 162 15 view .LVU14 + 60 000c 0260 str r2, [r0] + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Compute line register offset and line mask */ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 61 .loc 1 165 3 is_stmt 1 view .LVU15 + 62 .loc 1 165 10 is_stmt 0 view .LVU16 + 63 000e C2F30043 ubfx r3, r2, #16, #1 + ARM GAS /tmp/ccCmTXO9.s page 5 + + + 64 .LVL1: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 65 .loc 1 166 3 is_stmt 1 view .LVU17 + 66 .loc 1 166 11 is_stmt 0 view .LVU18 + 67 0012 02F01F04 and r4, r2, #31 + 68 .LVL2: + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 69 .loc 1 167 3 is_stmt 1 view .LVU19 + 70 .loc 1 167 12 is_stmt 0 view .LVU20 + 71 0016 0120 movs r0, #1 + 72 .LVL3: + 73 .loc 1 167 12 view .LVU21 + 74 0018 A040 lsls r0, r0, r4 + 75 .LVL4: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure triggers for configurable lines */ + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 76 .loc 1 170 3 is_stmt 1 view .LVU22 + 77 .loc 1 170 6 is_stmt 0 view .LVU23 + 78 001a 12F0007F tst r2, #33554432 + 79 001e 1BD0 beq .L3 + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger)); + 80 .loc 1 172 5 is_stmt 1 view .LVU24 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure rising trigger */ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->RTSR + (EXTI_CONFIG_OFFSET * offset)); + 81 .loc 1 175 5 view .LVU25 + 82 .loc 1 175 28 is_stmt 0 view .LVU26 + 83 0020 4FEA431C lsl ip, r3, #5 + 84 .loc 1 175 13 view .LVU27 + 85 0024 294F ldr r7, .L19 + 86 .LVL5: + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 87 .loc 1 176 5 is_stmt 1 view .LVU28 + 88 .loc 1 176 12 is_stmt 0 view .LVU29 + 89 0026 5CF80750 ldr r5, [ip, r7] + 90 .LVL6: + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u) + 91 .loc 1 179 5 is_stmt 1 view .LVU30 + 92 .loc 1 179 21 is_stmt 0 view .LVU31 + 93 002a 8E68 ldr r6, [r1, #8] + 94 .loc 1 179 8 view .LVU32 + 95 002c 16F0010F tst r6, #1 + 96 0030 29D0 beq .L4 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 97 .loc 1 181 7 is_stmt 1 view .LVU33 + 98 .loc 1 181 14 is_stmt 0 view .LVU34 + 99 0032 0543 orrs r5, r5, r0 + 100 .LVL7: + 101 .L5: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + ARM GAS /tmp/ccCmTXO9.s page 6 + + + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store rising trigger mode */ + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 102 .loc 1 189 5 is_stmt 1 view .LVU35 + 103 .loc 1 189 14 is_stmt 0 view .LVU36 + 104 0034 4CF80750 str r5, [ip, r7] + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure falling trigger */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->FTSR + (EXTI_CONFIG_OFFSET * offset)); + 105 .loc 1 192 5 is_stmt 1 view .LVU37 + 106 .loc 1 192 13 is_stmt 0 view .LVU38 + 107 0038 254E ldr r6, .L19+4 + 108 .LVL8: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 109 .loc 1 193 5 is_stmt 1 view .LVU39 + 110 .loc 1 193 12 is_stmt 0 view .LVU40 + 111 003a 5CF80650 ldr r5, [ip, r6] + 112 .LVL9: + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u) + 113 .loc 1 196 5 is_stmt 1 view .LVU41 + 114 .loc 1 196 8 is_stmt 0 view .LVU42 + 115 003e 8F68 ldr r7, [r1, #8] + 116 0040 17F0020F tst r7, #2 + 117 0044 22D0 beq .L6 + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 118 .loc 1 198 7 is_stmt 1 view .LVU43 + 119 .loc 1 198 14 is_stmt 0 view .LVU44 + 120 0046 0543 orrs r5, r5, r0 + 121 .LVL10: + 122 .L7: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store falling trigger mode */ + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 123 .loc 1 206 5 is_stmt 1 view .LVU45 + 124 .loc 1 206 14 is_stmt 0 view .LVU46 + 125 0048 4CF80650 str r5, [ip, r6] + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure gpio port selection in case of gpio exti line */ + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 126 .loc 1 209 5 is_stmt 1 view .LVU47 + 127 .loc 1 209 28 is_stmt 0 view .LVU48 + 128 004c 0D68 ldr r5, [r1] + 129 .LVL11: + 130 .loc 1 209 28 view .LVU49 + 131 004e 05F0C06C and ip, r5, #100663296 + 132 .LVL12: + 133 .loc 1 209 8 view .LVU50 + ARM GAS /tmp/ccCmTXO9.s page 7 + + + 134 0052 BCF1C06F cmp ip, #100663296 + 135 0056 1CD0 beq .L18 + 136 .LVL13: + 137 .L3: + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel)); + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure interrupt mode : read current mode */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->IMR + (EXTI_MODE_OFFSET * offset)); + 138 .loc 1 222 3 is_stmt 1 view .LVU51 + 139 .loc 1 222 25 is_stmt 0 view .LVU52 + 140 0058 5B01 lsls r3, r3, #5 + 141 .LVL14: + 142 .loc 1 222 11 view .LVU53 + 143 005a 03F18042 add r2, r3, #1073741824 + 144 005e 02F58232 add r2, r2, #66560 + 145 .LVL15: + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 146 .loc 1 223 3 is_stmt 1 view .LVU54 + 147 .loc 1 223 10 is_stmt 0 view .LVU55 + 148 0062 1468 ldr r4, [r2] + 149 .LVL16: + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u) + 150 .loc 1 226 3 is_stmt 1 view .LVU56 + 151 .loc 1 226 6 is_stmt 0 view .LVU57 + 152 0064 4D68 ldr r5, [r1, #4] + 153 0066 15F0010F tst r5, #1 + 154 006a 24D0 beq .L8 + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 155 .loc 1 228 5 is_stmt 1 view .LVU58 + 156 .loc 1 228 12 is_stmt 0 view .LVU59 + 157 006c 0443 orrs r4, r4, r0 + 158 .LVL17: + 159 .L9: + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store interrupt mode */ + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 160 .loc 1 236 3 is_stmt 1 view .LVU60 + 161 .loc 1 236 12 is_stmt 0 view .LVU61 + 162 006e 1460 str r4, [r2] + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccCmTXO9.s page 8 + + + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure event mode : read current mode */ + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->EMR + (EXTI_MODE_OFFSET * offset)); + 163 .loc 1 239 3 is_stmt 1 view .LVU62 + 164 .loc 1 239 11 is_stmt 0 view .LVU63 + 165 0070 184C ldr r4, .L19+8 + 166 .LVL18: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 167 .loc 1 240 3 is_stmt 1 view .LVU64 + 168 .loc 1 240 10 is_stmt 0 view .LVU65 + 169 0072 1A59 ldr r2, [r3, r4] + 170 .LVL19: + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u) + 171 .loc 1 243 3 is_stmt 1 view .LVU66 + 172 .loc 1 243 19 is_stmt 0 view .LVU67 + 173 0074 4968 ldr r1, [r1, #4] + 174 .LVL20: + 175 .loc 1 243 6 view .LVU68 + 176 0076 11F0020F tst r1, #2 + 177 007a 1FD0 beq .L10 + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 178 .loc 1 245 5 is_stmt 1 view .LVU69 + 179 .loc 1 245 12 is_stmt 0 view .LVU70 + 180 007c 0243 orrs r2, r2, r0 + 181 .LVL21: + 182 .L11: + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store event mode */ + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 183 .loc 1 253 3 is_stmt 1 view .LVU71 + 184 .loc 1 253 12 is_stmt 0 view .LVU72 + 185 007e 1A51 str r2, [r3, r4] + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 186 .loc 1 255 3 is_stmt 1 view .LVU73 + 187 .loc 1 255 10 is_stmt 0 view .LVU74 + 188 0080 0020 movs r0, #0 + 189 .LVL22: + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 190 .loc 1 256 1 view .LVU75 + 191 0082 F0BC pop {r4, r5, r6, r7} + 192 .cfi_remember_state + 193 .cfi_restore 7 + 194 .cfi_restore 6 + 195 .cfi_restore 5 + 196 .cfi_restore 4 + 197 .cfi_def_cfa_offset 0 + 198 .LVL23: + 199 .loc 1 256 1 view .LVU76 + 200 0084 7047 bx lr + ARM GAS /tmp/ccCmTXO9.s page 9 + + + 201 .LVL24: + 202 .L4: + 203 .cfi_restore_state + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 204 .loc 1 185 7 is_stmt 1 view .LVU77 + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 205 .loc 1 185 14 is_stmt 0 view .LVU78 + 206 0086 25EA0005 bic r5, r5, r0 + 207 .LVL25: + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 208 .loc 1 185 14 view .LVU79 + 209 008a D3E7 b .L5 + 210 .LVL26: + 211 .L6: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 212 .loc 1 202 7 is_stmt 1 view .LVU80 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 213 .loc 1 202 14 is_stmt 0 view .LVU81 + 214 008c 25EA0005 bic r5, r5, r0 + 215 .LVL27: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 216 .loc 1 202 14 view .LVU82 + 217 0090 DAE7 b .L7 + 218 .LVL28: + 219 .L18: + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 220 .loc 1 211 7 is_stmt 1 view .LVU83 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 221 .loc 1 212 7 view .LVU84 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 222 .loc 1 214 7 view .LVU85 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 223 .loc 1 214 39 is_stmt 0 view .LVU86 + 224 0092 A408 lsrs r4, r4, #2 + 225 .LVL29: + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 226 .loc 1 214 14 view .LVU87 + 227 0094 104F ldr r7, .L19+12 + 228 0096 0234 adds r4, r4, #2 + 229 0098 57F82460 ldr r6, [r7, r4, lsl #2] + 230 .LVL30: + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 231 .loc 1 215 7 is_stmt 1 view .LVU88 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 232 .loc 1 215 80 is_stmt 0 view .LVU89 + 233 009c 02F00302 and r2, r2, #3 + 234 .LVL31: + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 235 .loc 1 215 69 view .LVU90 + 236 00a0 9200 lsls r2, r2, #2 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 237 .loc 1 215 40 view .LVU91 + 238 00a2 0F25 movs r5, #15 + 239 00a4 9540 lsls r5, r5, r2 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 240 .loc 1 215 14 view .LVU92 + 241 00a6 26EA0506 bic r6, r6, r5 + ARM GAS /tmp/ccCmTXO9.s page 10 + + + 242 .LVL32: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 243 .loc 1 216 7 is_stmt 1 view .LVU93 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 244 .loc 1 216 29 is_stmt 0 view .LVU94 + 245 00aa CD68 ldr r5, [r1, #12] + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 246 .loc 1 216 39 view .LVU95 + 247 00ac 9540 lsls r5, r5, r2 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 248 .loc 1 216 14 view .LVU96 + 249 00ae 3543 orrs r5, r5, r6 + 250 .LVL33: + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 251 .loc 1 217 7 is_stmt 1 view .LVU97 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 252 .loc 1 217 37 is_stmt 0 view .LVU98 + 253 00b0 47F82450 str r5, [r7, r4, lsl #2] + 254 00b4 D0E7 b .L3 + 255 .LVL34: + 256 .L8: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 257 .loc 1 232 5 is_stmt 1 view .LVU99 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 258 .loc 1 232 12 is_stmt 0 view .LVU100 + 259 00b6 24EA0004 bic r4, r4, r0 + 260 .LVL35: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 261 .loc 1 232 12 view .LVU101 + 262 00ba D8E7 b .L9 + 263 .LVL36: + 264 .L10: + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 265 .loc 1 249 5 is_stmt 1 view .LVU102 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 266 .loc 1 249 12 is_stmt 0 view .LVU103 + 267 00bc 22EA0002 bic r2, r2, r0 + 268 .LVL37: + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 269 .loc 1 249 12 view .LVU104 + 270 00c0 DDE7 b .L11 + 271 .LVL38: + 272 .L12: + 273 .cfi_def_cfa_offset 0 + 274 .cfi_restore 4 + 275 .cfi_restore 5 + 276 .cfi_restore 6 + 277 .cfi_restore 7 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 278 .loc 1 154 12 view .LVU105 + 279 00c2 0120 movs r0, #1 + 280 .LVL39: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 281 .loc 1 154 12 view .LVU106 + 282 00c4 7047 bx lr + 283 .LVL40: + 284 .L13: + ARM GAS /tmp/ccCmTXO9.s page 11 + + + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 285 .loc 1 154 12 view .LVU107 + 286 00c6 0120 movs r0, #1 + 287 .LVL41: + 288 .loc 1 256 1 view .LVU108 + 289 00c8 7047 bx lr + 290 .L20: + 291 00ca 00BF .align 2 + 292 .L19: + 293 00cc 08040140 .word 1073808392 + 294 00d0 0C040140 .word 1073808396 + 295 00d4 04040140 .word 1073808388 + 296 00d8 00000140 .word 1073807360 + 297 .cfi_endproc + 298 .LFE130: + 300 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits + 301 .align 1 + 302 .global HAL_EXTI_GetConfigLine + 303 .syntax unified + 304 .thumb + 305 .thumb_func + 307 HAL_EXTI_GetConfigLine: + 308 .LVL42: + 309 .LFB131: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Get configuration of a dedicated Exti line. + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param pExtiConfig Pointer on structure to store Exti configuration. + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 310 .loc 1 265 1 is_stmt 1 view -0 + 311 .cfi_startproc + 312 @ args = 0, pretend = 0, frame = 0 + 313 @ frame_needed = 0, uses_anonymous_args = 0 + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 314 .loc 1 266 3 view .LVU110 + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 315 .loc 1 267 3 view .LVU111 + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 316 .loc 1 268 3 view .LVU112 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 317 .loc 1 269 3 view .LVU113 + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 318 .loc 1 270 3 view .LVU114 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 319 .loc 1 273 3 view .LVU115 + 320 .loc 1 273 6 is_stmt 0 view .LVU116 + 321 0000 0028 cmp r0, #0 + 322 0002 4CD0 beq .L28 + 323 .loc 1 273 23 discriminator 1 view .LVU117 + 324 0004 0029 cmp r1, #0 + 325 0006 4CD0 beq .L29 + ARM GAS /tmp/ccCmTXO9.s page 12 + + + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 326 .loc 1 265 1 view .LVU118 + 327 0008 10B5 push {r4, lr} + 328 .cfi_def_cfa_offset 8 + 329 .cfi_offset 4, -8 + 330 .cfi_offset 14, -4 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check the parameter */ + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 331 .loc 1 279 3 is_stmt 1 view .LVU119 + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store handle line number to configuration structure */ + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Line = hexti->Line; + 332 .loc 1 282 3 view .LVU120 + 333 .loc 1 282 28 is_stmt 0 view .LVU121 + 334 000a 0368 ldr r3, [r0] + 335 .loc 1 282 21 view .LVU122 + 336 000c 0B60 str r3, [r1] + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 337 .loc 1 285 3 is_stmt 1 view .LVU123 + 338 .loc 1 285 10 is_stmt 0 view .LVU124 + 339 000e C3F30040 ubfx r0, r3, #16, #1 + 340 .LVL43: + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 341 .loc 1 286 3 is_stmt 1 view .LVU125 + 342 .loc 1 286 11 is_stmt 0 view .LVU126 + 343 0012 03F01F0E and lr, r3, #31 + 344 .LVL44: + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 345 .loc 1 287 3 is_stmt 1 view .LVU127 + 346 .loc 1 287 12 is_stmt 0 view .LVU128 + 347 0016 0122 movs r2, #1 + 348 0018 02FA0EF2 lsl r2, r2, lr + 349 .LVL45: + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 1] Get core mode : interrupt */ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->IMR + (EXTI_MODE_OFFSET * offset)); + 350 .loc 1 290 3 is_stmt 1 view .LVU129 + 351 .loc 1 290 25 is_stmt 0 view .LVU130 + 352 001c 4001 lsls r0, r0, #5 + 353 .LVL46: + 354 .loc 1 290 11 view .LVU131 + 355 001e 00F1804C add ip, r0, #1073741824 + 356 0022 0CF5823C add ip, ip, #66560 + 357 .LVL47: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 358 .loc 1 291 3 is_stmt 1 view .LVU132 + 359 .loc 1 291 10 is_stmt 0 view .LVU133 + 360 0026 DCF80040 ldr r4, [ip] + 361 .LVL48: + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if selected line is enable */ + ARM GAS /tmp/ccCmTXO9.s page 13 + + + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 362 .loc 1 294 3 is_stmt 1 view .LVU134 + 363 .loc 1 294 6 is_stmt 0 view .LVU135 + 364 002a 2242 tst r2, r4 + 365 002c 24D0 beq .L23 + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_INTERRUPT; + 366 .loc 1 296 5 is_stmt 1 view .LVU136 + 367 .loc 1 296 23 is_stmt 0 view .LVU137 + 368 002e 0124 movs r4, #1 + 369 .LVL49: + 370 .loc 1 296 23 view .LVU138 + 371 0030 4C60 str r4, [r1, #4] + 372 .L24: + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_NONE; + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get event mode */ + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->EMR + (EXTI_MODE_OFFSET * offset)); + 373 .loc 1 304 3 is_stmt 1 view .LVU139 + 374 .loc 1 304 11 is_stmt 0 view .LVU140 + 375 0032 1E4C ldr r4, .L37 + 376 .LVL50: + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 377 .loc 1 305 3 is_stmt 1 view .LVU141 + 378 .loc 1 305 10 is_stmt 0 view .LVU142 + 379 0034 0459 ldr r4, [r0, r4] + 380 .LVL51: + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if selected line is enable */ + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 381 .loc 1 308 3 is_stmt 1 view .LVU143 + 382 .loc 1 308 6 is_stmt 0 view .LVU144 + 383 0036 2242 tst r2, r4 + 384 0038 03D0 beq .L25 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Mode |= EXTI_MODE_EVENT; + 385 .loc 1 310 5 is_stmt 1 view .LVU145 + 386 .loc 1 310 16 is_stmt 0 view .LVU146 + 387 003a 4C68 ldr r4, [r1, #4] + 388 .LVL52: + 389 .loc 1 310 23 view .LVU147 + 390 003c 44F00204 orr r4, r4, #2 + 391 0040 4C60 str r4, [r1, #4] + 392 .L25: + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get default Trigger and GPIOSel configuration */ + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + 393 .loc 1 314 3 is_stmt 1 view .LVU148 + 394 .loc 1 314 24 is_stmt 0 view .LVU149 + 395 0042 0024 movs r4, #0 + 396 0044 8C60 str r4, [r1, #8] + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + ARM GAS /tmp/ccCmTXO9.s page 14 + + + 397 .loc 1 315 3 is_stmt 1 view .LVU150 + 398 .loc 1 315 24 is_stmt 0 view .LVU151 + 399 0046 CC60 str r4, [r1, #12] + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 2] Get trigger for configurable lines : rising */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 400 .loc 1 318 3 is_stmt 1 view .LVU152 + 401 .loc 1 318 6 is_stmt 0 view .LVU153 + 402 0048 13F0007F tst r3, #33554432 + 403 004c 2BD0 beq .L30 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->RTSR + (EXTI_CONFIG_OFFSET * offset)); + 404 .loc 1 320 5 is_stmt 1 view .LVU154 + 405 .loc 1 320 13 is_stmt 0 view .LVU155 + 406 004e 184C ldr r4, .L37+4 + 407 .LVL53: + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 408 .loc 1 321 5 is_stmt 1 view .LVU156 + 409 .loc 1 321 12 is_stmt 0 view .LVU157 + 410 0050 0459 ldr r4, [r0, r4] + 411 .LVL54: + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 412 .loc 1 324 5 is_stmt 1 view .LVU158 + 413 .loc 1 324 8 is_stmt 0 view .LVU159 + 414 0052 2242 tst r2, r4 + 415 0054 01D0 beq .L26 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING; + 416 .loc 1 326 7 is_stmt 1 view .LVU160 + 417 .loc 1 326 28 is_stmt 0 view .LVU161 + 418 0056 0124 movs r4, #1 + 419 .LVL55: + 420 .loc 1 326 28 view .LVU162 + 421 0058 8C60 str r4, [r1, #8] + 422 .L26: + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get falling configuration */ + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->FTSR + (EXTI_CONFIG_OFFSET * offset)); + 423 .loc 1 330 5 is_stmt 1 view .LVU163 + 424 .loc 1 330 13 is_stmt 0 view .LVU164 + 425 005a 164C ldr r4, .L37+8 + 426 .LVL56: + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 427 .loc 1 331 5 is_stmt 1 view .LVU165 + 428 .loc 1 331 12 is_stmt 0 view .LVU166 + 429 005c 0059 ldr r0, [r0, r4] + 430 .LVL57: + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 431 .loc 1 334 5 is_stmt 1 view .LVU167 + 432 .loc 1 334 8 is_stmt 0 view .LVU168 + 433 005e 0242 tst r2, r0 + 434 0060 03D0 beq .L27 + ARM GAS /tmp/ccCmTXO9.s page 15 + + + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING; + 435 .loc 1 336 7 is_stmt 1 view .LVU169 + 436 .loc 1 336 18 is_stmt 0 view .LVU170 + 437 0062 8A68 ldr r2, [r1, #8] + 438 .LVL58: + 439 .loc 1 336 28 view .LVU171 + 440 0064 42F00202 orr r2, r2, #2 + 441 0068 8A60 str r2, [r1, #8] + 442 .L27: + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 443 .loc 1 340 5 is_stmt 1 view .LVU172 + 444 .loc 1 340 28 is_stmt 0 view .LVU173 + 445 006a 03F0C062 and r2, r3, #100663296 + 446 .loc 1 340 8 view .LVU174 + 447 006e B2F1C06F cmp r2, #100663296 + 448 0072 04D0 beq .L36 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 449 .loc 1 349 10 view .LVU175 + 450 0074 0020 movs r0, #0 + 451 .LVL59: + 452 .loc 1 349 10 view .LVU176 + 453 0076 17E0 b .L22 + 454 .LVL60: + 455 .L23: + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 456 .loc 1 300 5 is_stmt 1 view .LVU177 + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 457 .loc 1 300 23 is_stmt 0 view .LVU178 + 458 0078 0024 movs r4, #0 + 459 .LVL61: + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 460 .loc 1 300 23 view .LVU179 + 461 007a 4C60 str r4, [r1, #4] + 462 007c D9E7 b .L24 + 463 .LVL62: + 464 .L36: + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 465 .loc 1 342 7 is_stmt 1 view .LVU180 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 466 .loc 1 344 7 view .LVU181 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 467 .loc 1 344 39 is_stmt 0 view .LVU182 + 468 007e 4FEA9E02 lsr r2, lr, #2 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 469 .loc 1 344 14 view .LVU183 + ARM GAS /tmp/ccCmTXO9.s page 16 + + + 470 0082 0232 adds r2, r2, #2 + 471 0084 0C48 ldr r0, .L37+12 + 472 .LVL63: + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 473 .loc 1 344 14 view .LVU184 + 474 0086 50F82220 ldr r2, [r0, r2, lsl #2] + 475 .LVL64: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 476 .loc 1 345 7 is_stmt 1 view .LVU185 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 477 .loc 1 345 78 is_stmt 0 view .LVU186 + 478 008a 03F00303 and r3, r3, #3 + 479 .LVL65: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 480 .loc 1 345 67 view .LVU187 + 481 008e 9B00 lsls r3, r3, #2 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 482 .loc 1 345 38 view .LVU188 + 483 0090 22FA03F3 lsr r3, r2, r3 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 484 .loc 1 345 89 view .LVU189 + 485 0094 03F00F03 and r3, r3, #15 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 486 .loc 1 345 28 view .LVU190 + 487 0098 CB60 str r3, [r1, #12] + 488 .loc 1 349 10 view .LVU191 + 489 009a 0020 movs r0, #0 + 490 009c 04E0 b .L22 + 491 .LVL66: + 492 .L28: + 493 .cfi_def_cfa_offset 0 + 494 .cfi_restore 4 + 495 .cfi_restore 14 + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 496 .loc 1 275 12 view .LVU192 + 497 009e 0120 movs r0, #1 + 498 .LVL67: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 499 .loc 1 275 12 view .LVU193 + 500 00a0 7047 bx lr + 501 .LVL68: + 502 .L29: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 503 .loc 1 275 12 view .LVU194 + 504 00a2 0120 movs r0, #1 + 505 .LVL69: + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 506 .loc 1 350 1 view .LVU195 + 507 00a4 7047 bx lr + 508 .LVL70: + 509 .L30: + 510 .cfi_def_cfa_offset 8 + 511 .cfi_offset 4, -8 + 512 .cfi_offset 14, -4 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 513 .loc 1 349 10 view .LVU196 + 514 00a6 0020 movs r0, #0 + ARM GAS /tmp/ccCmTXO9.s page 17 + + + 515 .LVL71: + 516 .L22: + 517 .loc 1 350 1 view .LVU197 + 518 00a8 10BD pop {r4, pc} + 519 .L38: + 520 00aa 00BF .align 2 + 521 .L37: + 522 00ac 04040140 .word 1073808388 + 523 00b0 08040140 .word 1073808392 + 524 00b4 0C040140 .word 1073808396 + 525 00b8 00000140 .word 1073807360 + 526 .cfi_endproc + 527 .LFE131: + 529 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits + 530 .align 1 + 531 .global HAL_EXTI_ClearConfigLine + 532 .syntax unified + 533 .thumb + 534 .thumb_func + 536 HAL_EXTI_ClearConfigLine: + 537 .LVL72: + 538 .LFB132: + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 539 .loc 1 358 1 is_stmt 1 view -0 + 540 .cfi_startproc + 541 @ args = 0, pretend = 0, frame = 0 + 542 @ frame_needed = 0, uses_anonymous_args = 0 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 543 .loc 1 359 3 view .LVU199 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 544 .loc 1 360 3 view .LVU200 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 545 .loc 1 361 3 view .LVU201 + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 546 .loc 1 362 3 view .LVU202 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 547 .loc 1 363 3 view .LVU203 + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (hexti == NULL) + 548 .loc 1 366 3 view .LVU204 + 549 .loc 1 366 6 is_stmt 0 view .LVU205 + 550 0000 0028 cmp r0, #0 + 551 0002 40D0 beq .L41 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 552 .loc 1 358 1 view .LVU206 + 553 0004 30B5 push {r4, r5, lr} + 554 .cfi_def_cfa_offset 12 + 555 .cfi_offset 4, -12 + 556 .cfi_offset 5, -8 + ARM GAS /tmp/ccCmTXO9.s page 18 + + + 557 .cfi_offset 14, -4 + 558 0006 8446 mov ip, r0 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check the parameter */ + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 559 .loc 1 372 3 is_stmt 1 view .LVU207 + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 560 .loc 1 375 3 view .LVU208 + 561 .loc 1 375 19 is_stmt 0 view .LVU209 + 562 0008 0468 ldr r4, [r0] + 563 .loc 1 375 10 view .LVU210 + 564 000a C4F30043 ubfx r3, r4, #16, #1 + 565 .LVL73: + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 566 .loc 1 376 3 is_stmt 1 view .LVU211 + 567 .loc 1 376 11 is_stmt 0 view .LVU212 + 568 000e 04F01F0E and lr, r4, #31 + 569 .LVL74: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 570 .loc 1 377 3 is_stmt 1 view .LVU213 + 571 .loc 1 377 12 is_stmt 0 view .LVU214 + 572 0012 0122 movs r2, #1 + 573 0014 02FA0EF2 lsl r2, r2, lr + 574 .LVL75: + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 1] Clear interrupt mode */ + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->IMR + (EXTI_MODE_OFFSET * offset)); + 575 .loc 1 380 3 is_stmt 1 view .LVU215 + 576 .loc 1 380 25 is_stmt 0 view .LVU216 + 577 0018 5B01 lsls r3, r3, #5 + 578 .LVL76: + 579 .loc 1 380 11 view .LVU217 + 580 001a 03F18041 add r1, r3, #1073741824 + 581 001e 01F58231 add r1, r1, #66560 + 582 .LVL77: + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 583 .loc 1 381 3 is_stmt 1 view .LVU218 + 584 .loc 1 381 13 is_stmt 0 view .LVU219 + 585 0022 0868 ldr r0, [r1] + 586 .LVL78: + 587 .loc 1 381 24 view .LVU220 + 588 0024 D543 mvns r5, r2 + 589 .loc 1 381 10 view .LVU221 + 590 0026 20EA0200 bic r0, r0, r2 + 591 .LVL79: + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 592 .loc 1 382 3 is_stmt 1 view .LVU222 + 593 .loc 1 382 12 is_stmt 0 view .LVU223 + 594 002a 0860 str r0, [r1] + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 2] Clear event mode */ + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->EMR + (EXTI_MODE_OFFSET * offset)); + ARM GAS /tmp/ccCmTXO9.s page 19 + + + 595 .loc 1 385 3 is_stmt 1 view .LVU224 + 596 .loc 1 385 11 is_stmt 0 view .LVU225 + 597 002c 1848 ldr r0, .L49 + 598 .LVL80: + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 599 .loc 1 386 3 is_stmt 1 view .LVU226 + 600 .loc 1 386 13 is_stmt 0 view .LVU227 + 601 002e 1958 ldr r1, [r3, r0] + 602 .LVL81: + 603 .loc 1 386 10 view .LVU228 + 604 0030 21EA0202 bic r2, r1, r2 + 605 .LVL82: + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 606 .loc 1 387 3 is_stmt 1 view .LVU229 + 607 .loc 1 387 12 is_stmt 0 view .LVU230 + 608 0034 1A50 str r2, [r3, r0] + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 3] Clear triggers in case of configurable lines */ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti->Line & EXTI_CONFIG) != 0x00u) + 609 .loc 1 390 3 is_stmt 1 view .LVU231 + 610 .loc 1 390 13 is_stmt 0 view .LVU232 + 611 0036 DCF80020 ldr r2, [ip] + 612 .LVL83: + 613 .loc 1 390 6 view .LVU233 + 614 003a 12F0007F tst r2, #33554432 + 615 003e 24D0 beq .L42 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->RTSR + (EXTI_CONFIG_OFFSET * offset)); + 616 .loc 1 392 5 is_stmt 1 view .LVU234 + 617 .loc 1 392 13 is_stmt 0 view .LVU235 + 618 0040 1449 ldr r1, .L49+4 + 619 .LVL84: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 620 .loc 1 393 5 is_stmt 1 view .LVU236 + 621 .loc 1 393 15 is_stmt 0 view .LVU237 + 622 0042 5A58 ldr r2, [r3, r1] + 623 .loc 1 393 12 view .LVU238 + 624 0044 2A40 ands r2, r2, r5 + 625 .LVL85: + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 626 .loc 1 394 5 is_stmt 1 view .LVU239 + 627 .loc 1 394 14 is_stmt 0 view .LVU240 + 628 0046 5A50 str r2, [r3, r1] + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->FTSR + (EXTI_CONFIG_OFFSET * offset)); + 629 .loc 1 396 5 is_stmt 1 view .LVU241 + 630 .loc 1 396 13 is_stmt 0 view .LVU242 + 631 0048 134A ldr r2, .L49+8 + 632 .LVL86: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 633 .loc 1 397 5 is_stmt 1 view .LVU243 + 634 .loc 1 397 15 is_stmt 0 view .LVU244 + 635 004a 9958 ldr r1, [r3, r2] + 636 .LVL87: + 637 .loc 1 397 12 view .LVU245 + 638 004c 0D40 ands r5, r5, r1 + 639 .LVL88: + ARM GAS /tmp/ccCmTXO9.s page 20 + + + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 640 .loc 1 398 5 is_stmt 1 view .LVU246 + 641 .loc 1 398 14 is_stmt 0 view .LVU247 + 642 004e 9D50 str r5, [r3, r2] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO) + 643 .loc 1 401 5 is_stmt 1 view .LVU248 + 644 .loc 1 401 15 is_stmt 0 view .LVU249 + 645 0050 DCF80030 ldr r3, [ip] + 646 .LVL89: + 647 .loc 1 401 22 view .LVU250 + 648 0054 03F0C063 and r3, r3, #100663296 + 649 .loc 1 401 8 view .LVU251 + 650 0058 B3F1C06F cmp r3, #100663296 + 651 005c 01D0 beq .L48 + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 652 .loc 1 411 10 view .LVU252 + 653 005e 0020 movs r0, #0 + 654 0060 14E0 b .L40 + 655 .L48: + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 656 .loc 1 403 7 is_stmt 1 view .LVU253 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 657 .loc 1 405 7 view .LVU254 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 658 .loc 1 405 39 is_stmt 0 view .LVU255 + 659 0062 4FEA9E0E lsr lr, lr, #2 + 660 .LVL90: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 661 .loc 1 405 14 view .LVU256 + 662 0066 0D49 ldr r1, .L49+12 + 663 0068 0EF1020E add lr, lr, #2 + 664 006c 51F82E30 ldr r3, [r1, lr, lsl #2] + 665 .LVL91: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 666 .loc 1 406 7 is_stmt 1 view .LVU257 + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 667 .loc 1 406 80 is_stmt 0 view .LVU258 + 668 0070 04F00304 and r4, r4, #3 + 669 .LVL92: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 670 .loc 1 406 69 view .LVU259 + 671 0074 A400 lsls r4, r4, #2 + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 672 .loc 1 406 40 view .LVU260 + 673 0076 0F22 movs r2, #15 + 674 0078 A240 lsls r2, r2, r4 + ARM GAS /tmp/ccCmTXO9.s page 21 + + + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 675 .loc 1 406 14 view .LVU261 + 676 007a 23EA0203 bic r3, r3, r2 + 677 .LVL93: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 678 .loc 1 407 7 is_stmt 1 view .LVU262 + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 679 .loc 1 407 37 is_stmt 0 view .LVU263 + 680 007e 41F82E30 str r3, [r1, lr, lsl #2] + 681 .loc 1 411 10 view .LVU264 + 682 0082 0020 movs r0, #0 + 683 0084 02E0 b .L40 + 684 .LVL94: + 685 .L41: + 686 .cfi_def_cfa_offset 0 + 687 .cfi_restore 4 + 688 .cfi_restore 5 + 689 .cfi_restore 14 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 690 .loc 1 368 12 view .LVU265 + 691 0086 0120 movs r0, #1 + 692 .LVL95: + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 693 .loc 1 412 1 view .LVU266 + 694 0088 7047 bx lr + 695 .LVL96: + 696 .L42: + 697 .cfi_def_cfa_offset 12 + 698 .cfi_offset 4, -12 + 699 .cfi_offset 5, -8 + 700 .cfi_offset 14, -4 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 701 .loc 1 411 10 view .LVU267 + 702 008a 0020 movs r0, #0 + 703 .LVL97: + 704 .L40: + 705 .loc 1 412 1 view .LVU268 + 706 008c 30BD pop {r4, r5, pc} + 707 .L50: + 708 008e 00BF .align 2 + 709 .L49: + 710 0090 04040140 .word 1073808388 + 711 0094 08040140 .word 1073808392 + 712 0098 0C040140 .word 1073808396 + 713 009c 00000140 .word 1073807360 + 714 .cfi_endproc + 715 .LFE132: + 717 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits + 718 .align 1 + 719 .global HAL_EXTI_RegisterCallback + 720 .syntax unified + 721 .thumb + 722 .thumb_func + 724 HAL_EXTI_RegisterCallback: + 725 .LVL98: + 726 .LFB133: + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccCmTXO9.s page 22 + + + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Register callback for a dedicated Exti line. + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param CallbackID User callback identifier. + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values. + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param pPendingCbfn function pointer to be stored as callback. + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef Callb + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 727 .loc 1 423 1 is_stmt 1 view -0 + 728 .cfi_startproc + 729 @ args = 0, pretend = 0, frame = 0 + 730 @ frame_needed = 0, uses_anonymous_args = 0 + 731 @ link register save eliminated. + 732 .loc 1 423 1 is_stmt 0 view .LVU270 + 733 0000 0346 mov r3, r0 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; + 734 .loc 1 424 3 is_stmt 1 view .LVU271 + 735 .LVL99: + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** switch (CallbackID) + 736 .loc 1 426 3 view .LVU272 + 737 0002 0846 mov r0, r1 + 738 .LVL100: + 739 .loc 1 426 3 is_stmt 0 view .LVU273 + 740 0004 09B9 cbnz r1, .L53 + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** case HAL_EXTI_COMMON_CB_ID: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->PendingCallback = pPendingCbfn; + 741 .loc 1 429 7 is_stmt 1 view .LVU274 + 742 .loc 1 429 30 is_stmt 0 view .LVU275 + 743 0006 5A60 str r2, [r3, #4] + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** break; + 744 .loc 1 430 7 is_stmt 1 view .LVU276 + 745 0008 7047 bx lr + 746 .L53: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** default: + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** status = HAL_ERROR; + 747 .loc 1 433 14 is_stmt 0 view .LVU277 + 748 000a 0120 movs r0, #1 + 749 .LVL101: + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** break; + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return status; + 750 .loc 1 437 3 is_stmt 1 view .LVU278 + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 751 .loc 1 438 1 is_stmt 0 view .LVU279 + 752 000c 7047 bx lr + 753 .cfi_endproc + 754 .LFE133: + 756 .section .text.HAL_EXTI_GetHandle,"ax",%progbits + 757 .align 1 + 758 .global HAL_EXTI_GetHandle + 759 .syntax unified + ARM GAS /tmp/ccCmTXO9.s page 23 + + + 760 .thumb + 761 .thumb_func + 763 HAL_EXTI_GetHandle: + 764 .LVL102: + 765 .LFB134: + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Store line number as handle private field. + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param ExtiLine Exti line number. + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be from 0 to @ref EXTI_LINE_NB. + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 766 .loc 1 448 1 is_stmt 1 view -0 + 767 .cfi_startproc + 768 @ args = 0, pretend = 0, frame = 0 + 769 @ frame_needed = 0, uses_anonymous_args = 0 + 770 @ link register save eliminated. + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check the parameters */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine)); + 771 .loc 1 450 3 view .LVU281 + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (hexti == NULL) + 772 .loc 1 453 3 view .LVU282 + 773 .loc 1 453 6 is_stmt 0 view .LVU283 + 774 0000 10B1 cbz r0, .L56 + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store line number as handle private field */ + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->Line = ExtiLine; + 775 .loc 1 460 5 is_stmt 1 view .LVU284 + 776 .loc 1 460 17 is_stmt 0 view .LVU285 + 777 0002 0160 str r1, [r0] + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 778 .loc 1 462 5 is_stmt 1 view .LVU286 + 779 .loc 1 462 12 is_stmt 0 view .LVU287 + 780 0004 0020 movs r0, #0 + 781 .LVL103: + 782 .loc 1 462 12 view .LVU288 + 783 0006 7047 bx lr + 784 .LVL104: + 785 .L56: + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 786 .loc 1 455 12 view .LVU289 + 787 0008 0120 movs r0, #1 + 788 .LVL105: + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 789 .loc 1 464 1 view .LVU290 + 790 000a 7047 bx lr + ARM GAS /tmp/ccCmTXO9.s page 24 + + + 791 .cfi_endproc + 792 .LFE134: + 794 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits + 795 .align 1 + 796 .global HAL_EXTI_IRQHandler + 797 .syntax unified + 798 .thumb + 799 .thumb_func + 801 HAL_EXTI_IRQHandler: + 802 .LVL106: + 803 .LFB135: + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @} + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group2 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief EXTI IO functions. + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @verbatim + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### IO operation functions ##### + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @endverbatim + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Handle EXTI interrupt request. + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval none. + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 804 .loc 1 488 1 is_stmt 1 view -0 + 805 .cfi_startproc + 806 @ args = 0, pretend = 0, frame = 0 + 807 @ frame_needed = 0, uses_anonymous_args = 0 + 808 .loc 1 488 1 is_stmt 0 view .LVU292 + 809 0000 08B5 push {r3, lr} + 810 .cfi_def_cfa_offset 8 + 811 .cfi_offset 3, -8 + 812 .cfi_offset 14, -4 + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 813 .loc 1 489 3 is_stmt 1 view .LVU293 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 814 .loc 1 490 3 view .LVU294 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 815 .loc 1 491 3 view .LVU295 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 816 .loc 1 492 3 view .LVU296 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Compute line register offset and line mask */ + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 817 .loc 1 495 3 view .LVU297 + 818 .loc 1 495 19 is_stmt 0 view .LVU298 + ARM GAS /tmp/ccCmTXO9.s page 25 + + + 819 0002 0368 ldr r3, [r0] + 820 .loc 1 495 10 view .LVU299 + 821 0004 C3F30041 ubfx r1, r3, #16, #1 + 822 .LVL107: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 823 .loc 1 496 3 is_stmt 1 view .LVU300 + 824 .loc 1 496 35 is_stmt 0 view .LVU301 + 825 0008 03F01F03 and r3, r3, #31 + 826 .loc 1 496 12 view .LVU302 + 827 000c 0122 movs r2, #1 + 828 000e 02FA03F3 lsl r3, r2, r3 + 829 .LVL108: + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get pending bit */ + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->PR + (EXTI_CONFIG_OFFSET * offset)); + 830 .loc 1 499 3 is_stmt 1 view .LVU303 + 831 .loc 1 499 24 is_stmt 0 view .LVU304 + 832 0012 4A01 lsls r2, r1, #5 + 833 .loc 1 499 11 view .LVU305 + 834 0014 0449 ldr r1, .L60 + 835 .LVL109: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & maskline); + 836 .loc 1 500 3 is_stmt 1 view .LVU306 + 837 .loc 1 500 13 is_stmt 0 view .LVU307 + 838 0016 5258 ldr r2, [r2, r1] + 839 .LVL110: + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (regval != 0x00u) + 840 .loc 1 502 3 is_stmt 1 view .LVU308 + 841 .loc 1 502 6 is_stmt 0 view .LVU309 + 842 0018 1A42 tst r2, r3 + 843 001a 04D0 beq .L57 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Clear pending bit */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI->PR = maskline; + 844 .loc 1 505 5 is_stmt 1 view .LVU310 + 845 .loc 1 505 14 is_stmt 0 view .LVU311 + 846 001c 034A ldr r2, .L60+4 + 847 .LVL111: + 848 .loc 1 505 14 view .LVU312 + 849 001e 5361 str r3, [r2, #20] + 850 .LVL112: + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Call callback */ + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (hexti->PendingCallback != NULL) + 851 .loc 1 508 5 is_stmt 1 view .LVU313 + 852 .loc 1 508 14 is_stmt 0 view .LVU314 + 853 0020 4368 ldr r3, [r0, #4] + 854 .LVL113: + 855 .loc 1 508 8 view .LVU315 + 856 0022 03B1 cbz r3, .L57 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->PendingCallback(); + 857 .loc 1 510 7 is_stmt 1 view .LVU316 + 858 0024 9847 blx r3 + 859 .LVL114: + 860 .L57: + ARM GAS /tmp/ccCmTXO9.s page 26 + + + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 861 .loc 1 513 1 is_stmt 0 view .LVU317 + 862 0026 08BD pop {r3, pc} + 863 .L61: + 864 .align 2 + 865 .L60: + 866 0028 14040140 .word 1073808404 + 867 002c 00040140 .word 1073808384 + 868 .cfi_endproc + 869 .LFE135: + 871 .section .text.HAL_EXTI_GetPending,"ax",%progbits + 872 .align 1 + 873 .global HAL_EXTI_GetPending + 874 .syntax unified + 875 .thumb + 876 .thumb_func + 878 HAL_EXTI_GetPending: + 879 .LVL115: + 880 .LFB136: + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Get interrupt pending bit of a dedicated line. + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param Edge Specify which pending edge as to be checked. + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be one of the following values: + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 881 .loc 1 525 1 is_stmt 1 view -0 + 882 .cfi_startproc + 883 @ args = 0, pretend = 0, frame = 0 + 884 @ frame_needed = 0, uses_anonymous_args = 0 + 885 @ link register save eliminated. + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 886 .loc 1 526 3 view .LVU319 + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 887 .loc 1 527 3 view .LVU320 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 888 .loc 1 528 3 view .LVU321 + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 889 .loc 1 529 3 view .LVU322 + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 890 .loc 1 530 3 view .LVU323 + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 891 .loc 1 533 3 view .LVU324 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 892 .loc 1 534 3 view .LVU325 + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 893 .loc 1 535 3 view .LVU326 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccCmTXO9.s page 27 + + + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 894 .loc 1 538 3 view .LVU327 + 895 .loc 1 538 19 is_stmt 0 view .LVU328 + 896 0000 0368 ldr r3, [r0] + 897 .loc 1 538 10 view .LVU329 + 898 0002 C3F30041 ubfx r1, r3, #16, #1 + 899 .LVL116: + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 900 .loc 1 539 3 is_stmt 1 view .LVU330 + 901 .loc 1 539 11 is_stmt 0 view .LVU331 + 902 0006 03F01F03 and r3, r3, #31 + 903 .LVL117: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 904 .loc 1 540 3 is_stmt 1 view .LVU332 + 905 .loc 1 540 12 is_stmt 0 view .LVU333 + 906 000a 0122 movs r2, #1 + 907 000c 9A40 lsls r2, r2, r3 + 908 .LVL118: + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get pending bit */ + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->PR + (EXTI_CONFIG_OFFSET * offset)); + 909 .loc 1 543 3 is_stmt 1 view .LVU334 + 910 .loc 1 543 24 is_stmt 0 view .LVU335 + 911 000e 4901 lsls r1, r1, #5 + 912 .LVL119: + 913 .loc 1 543 11 view .LVU336 + 914 0010 0248 ldr r0, .L63 + 915 .LVL120: + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* return 1 if bit is set else 0 */ + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = ((*regaddr & maskline) >> linepos); + 916 .loc 1 545 3 is_stmt 1 view .LVU337 + 917 .loc 1 545 14 is_stmt 0 view .LVU338 + 918 0012 0858 ldr r0, [r1, r0] + 919 .LVL121: + 920 .loc 1 545 23 view .LVU339 + 921 0014 1040 ands r0, r0, r2 + 922 .LVL122: + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return regval; + 923 .loc 1 546 3 is_stmt 1 view .LVU340 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 924 .loc 1 547 1 is_stmt 0 view .LVU341 + 925 0016 D840 lsrs r0, r0, r3 + 926 .LVL123: + 927 .loc 1 547 1 view .LVU342 + 928 0018 7047 bx lr + 929 .L64: + 930 001a 00BF .align 2 + 931 .L63: + 932 001c 14040140 .word 1073808404 + 933 .cfi_endproc + 934 .LFE136: + 936 .section .text.HAL_EXTI_ClearPending,"ax",%progbits + 937 .align 1 + 938 .global HAL_EXTI_ClearPending + 939 .syntax unified + 940 .thumb + ARM GAS /tmp/ccCmTXO9.s page 28 + + + 941 .thumb_func + 943 HAL_EXTI_ClearPending: + 944 .LVL124: + 945 .LFB137: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Clear interrupt pending bit of a dedicated line. + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param Edge Specify which pending edge as to be clear. + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be one of the following values: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval None. + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 946 .loc 1 559 1 is_stmt 1 view -0 + 947 .cfi_startproc + 948 @ args = 0, pretend = 0, frame = 0 + 949 @ frame_needed = 0, uses_anonymous_args = 0 + 950 @ link register save eliminated. + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 951 .loc 1 560 3 view .LVU344 + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 952 .loc 1 561 3 view .LVU345 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 953 .loc 1 562 3 view .LVU346 + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 954 .loc 1 565 3 view .LVU347 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 955 .loc 1 566 3 view .LVU348 + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 956 .loc 1 567 3 view .LVU349 + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 957 .loc 1 570 3 view .LVU350 + 958 .loc 1 570 19 is_stmt 0 view .LVU351 + 959 0000 0368 ldr r3, [r0] + 960 .loc 1 570 10 view .LVU352 + 961 0002 C3F30042 ubfx r2, r3, #16, #1 + 962 .LVL125: + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 963 .loc 1 571 3 is_stmt 1 view .LVU353 + 964 .loc 1 571 35 is_stmt 0 view .LVU354 + 965 0006 03F01F03 and r3, r3, #31 + 966 .loc 1 571 12 view .LVU355 + 967 000a 0121 movs r1, #1 + 968 .LVL126: + 969 .loc 1 571 12 view .LVU356 + 970 000c 9940 lsls r1, r1, r3 + 971 .LVL127: + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get pending bit */ + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->PR + (EXTI_CONFIG_OFFSET * offset)); + ARM GAS /tmp/ccCmTXO9.s page 29 + + + 972 .loc 1 574 3 is_stmt 1 view .LVU357 + 973 .loc 1 574 24 is_stmt 0 view .LVU358 + 974 000e 5301 lsls r3, r2, #5 + 975 .loc 1 574 11 view .LVU359 + 976 0010 014A ldr r2, .L66 + 977 .LVL128: + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Clear Pending bit */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = maskline; + 978 .loc 1 577 3 is_stmt 1 view .LVU360 + 979 .loc 1 577 12 is_stmt 0 view .LVU361 + 980 0012 9950 str r1, [r3, r2] + 981 .LVL129: + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 982 .loc 1 578 1 view .LVU362 + 983 0014 7047 bx lr + 984 .L67: + 985 0016 00BF .align 2 + 986 .L66: + 987 0018 14040140 .word 1073808404 + 988 .cfi_endproc + 989 .LFE137: + 991 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits + 992 .align 1 + 993 .global HAL_EXTI_GenerateSWI + 994 .syntax unified + 995 .thumb + 996 .thumb_func + 998 HAL_EXTI_GenerateSWI: + 999 .LVL130: + 1000 .LFB138: + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Generate a software interrupt for a dedicated line. + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval None. + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 1001 .loc 1 586 1 is_stmt 1 view -0 + 1002 .cfi_startproc + 1003 @ args = 0, pretend = 0, frame = 0 + 1004 @ frame_needed = 0, uses_anonymous_args = 0 + 1005 @ link register save eliminated. + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 1006 .loc 1 587 3 view .LVU364 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 1007 .loc 1 588 3 view .LVU365 + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 1008 .loc 1 589 3 view .LVU366 + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 1009 .loc 1 592 3 view .LVU367 + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 1010 .loc 1 593 3 view .LVU368 + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccCmTXO9.s page 30 + + + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 1011 .loc 1 596 3 view .LVU369 + 1012 .loc 1 596 19 is_stmt 0 view .LVU370 + 1013 0000 0368 ldr r3, [r0] + 1014 .loc 1 596 10 view .LVU371 + 1015 0002 C3F30042 ubfx r2, r3, #16, #1 + 1016 .LVL131: + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 1017 .loc 1 597 3 is_stmt 1 view .LVU372 + 1018 .loc 1 597 35 is_stmt 0 view .LVU373 + 1019 0006 03F01F03 and r3, r3, #31 + 1020 .loc 1 597 12 view .LVU374 + 1021 000a 0121 movs r1, #1 + 1022 000c 9940 lsls r1, r1, r3 + 1023 .LVL132: + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->SWIER + (EXTI_CONFIG_OFFSET * offset)); + 1024 .loc 1 599 3 is_stmt 1 view .LVU375 + 1025 .loc 1 599 27 is_stmt 0 view .LVU376 + 1026 000e 5301 lsls r3, r2, #5 + 1027 .loc 1 599 11 view .LVU377 + 1028 0010 014A ldr r2, .L69 + 1029 .LVL133: + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = maskline; + 1030 .loc 1 600 3 is_stmt 1 view .LVU378 + 1031 .loc 1 600 12 is_stmt 0 view .LVU379 + 1032 0012 9950 str r1, [r3, r2] + 1033 .LVL134: + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 1034 .loc 1 601 1 view .LVU380 + 1035 0014 7047 bx lr + 1036 .L70: + 1037 0016 00BF .align 2 + 1038 .L69: + 1039 0018 10040140 .word 1073808400 + 1040 .cfi_endproc + 1041 .LFE138: + 1043 .text + 1044 .Letext0: + 1045 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1046 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1047 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1048 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1049 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h" + ARM GAS /tmp/ccCmTXO9.s page 31 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_exti.c + /tmp/ccCmTXO9.s:21 .text.HAL_EXTI_SetConfigLine:00000000 $t + /tmp/ccCmTXO9.s:27 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine + /tmp/ccCmTXO9.s:293 .text.HAL_EXTI_SetConfigLine:000000cc $d + /tmp/ccCmTXO9.s:301 .text.HAL_EXTI_GetConfigLine:00000000 $t + /tmp/ccCmTXO9.s:307 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine + /tmp/ccCmTXO9.s:522 .text.HAL_EXTI_GetConfigLine:000000ac $d + /tmp/ccCmTXO9.s:530 .text.HAL_EXTI_ClearConfigLine:00000000 $t + /tmp/ccCmTXO9.s:536 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine + /tmp/ccCmTXO9.s:710 .text.HAL_EXTI_ClearConfigLine:00000090 $d + /tmp/ccCmTXO9.s:718 .text.HAL_EXTI_RegisterCallback:00000000 $t + /tmp/ccCmTXO9.s:724 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback + /tmp/ccCmTXO9.s:757 .text.HAL_EXTI_GetHandle:00000000 $t + /tmp/ccCmTXO9.s:763 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle + /tmp/ccCmTXO9.s:795 .text.HAL_EXTI_IRQHandler:00000000 $t + /tmp/ccCmTXO9.s:801 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler + /tmp/ccCmTXO9.s:866 .text.HAL_EXTI_IRQHandler:00000028 $d + /tmp/ccCmTXO9.s:872 .text.HAL_EXTI_GetPending:00000000 $t + /tmp/ccCmTXO9.s:878 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending + /tmp/ccCmTXO9.s:932 .text.HAL_EXTI_GetPending:0000001c $d + /tmp/ccCmTXO9.s:937 .text.HAL_EXTI_ClearPending:00000000 $t + /tmp/ccCmTXO9.s:943 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending + /tmp/ccCmTXO9.s:987 .text.HAL_EXTI_ClearPending:00000018 $d + /tmp/ccCmTXO9.s:992 .text.HAL_EXTI_GenerateSWI:00000000 $t + /tmp/ccCmTXO9.s:998 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI + /tmp/ccCmTXO9.s:1039 .text.HAL_EXTI_GenerateSWI:00000018 $d + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_exti.o b/build/stm32f3xx_hal_exti.o new file mode 100644 index 0000000..1822169 Binary files /dev/null and b/build/stm32f3xx_hal_exti.o differ diff --git a/build/stm32f3xx_hal_flash.d b/build/stm32f3xx_hal_flash.d new file mode 100644 index 0000000..b69a03e --- /dev/null +++ b/build/stm32f3xx_hal_flash.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_flash.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_flash.lst b/build/stm32f3xx_hal_flash.lst new file mode 100644 index 0000000..758b6a9 --- /dev/null +++ b/build/stm32f3xx_hal_flash.lst @@ -0,0 +1,2163 @@ +ARM GAS /tmp/ccHHWLWe.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_flash.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c" + 20 .section .text.FLASH_Program_HalfWord,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 FLASH_Program_HalfWord: + 27 .LVL0: + 28 .LFB141: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @file stm32f3xx_hal_flash.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * functionalities of the internal FLASH memory: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + Program operations functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + Memory Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + Peripheral State functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ============================================================================== + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### FLASH peripheral features ##### + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ============================================================================== + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** to the Flash memory. It implements the erase and program Flash memory operations + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** and the read and write protection mechanisms. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] The Flash memory interface accelerates code execution with a system of instruction + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** prefetch. + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] The FLASH main features are: + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Flash memory read operations + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Flash memory program/erase operations + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Read / write protections + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Prefetch on I-Code + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Option Bytes programming + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + ARM GAS /tmp/ccHHWLWe.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### How to use this driver ##### + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ============================================================================== + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** This driver provides functions and macros to configure and program the FLASH + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** memory of all STM32F3xx devices. + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (#) FLASH Memory I/O Programming functions: this group includes all needed + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** functions to erase and program the main memory: + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Lock and Unlock the FLASH interface + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Erase function: Erase page, erase all pages + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Program functions: half word, word and doubleword + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (#) FLASH Option Bytes Programming functions: this group includes all needed + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** functions to manage the Option Bytes: + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Lock and Unlock the Option Bytes + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Set/Reset the write protection + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Set the Read protection Level + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Program the user Option Bytes + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Launch the Option Bytes loader + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Erase Option Bytes + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Program the data Option Bytes + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Get the Write protection. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Get the user option bytes. + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (#) Interrupts and flags management functions : this group + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** includes all needed functions to: + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Handle FLASH interrupts + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Wait for last FLASH operation according to its status + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Get error flag status + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] In addition to these function, this driver includes a set of macros allowing + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** to handle the following operations: + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Set/Get the latency + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Enable/Disable the prefetch buffer + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Enable/Disable the half cycle access + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Enable/Disable the FLASH interrupts + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Monitor the FLASH flags status + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ****************************************************************************** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @attention + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * Copyright (c) 2016 STMicroelectronics. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * All rights reserved. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This software is licensed under terms that can be found in the LICENSE file in + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * the root directory of this software component. + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ****************************************************************************** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Includes ------------------------------------------------------------------*/ + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** #include "stm32f3xx_hal.h" + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @addtogroup STM32F3xx_HAL_Driver + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + ARM GAS /tmp/ccHHWLWe.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH FLASH + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH HAL module driver + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private typedef -----------------------------------------------------------*/ + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private define ------------------------------------------------------------*/ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Constants FLASH Private Constants + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private macro ---------------------------- ---------------------------------*/ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Macros FLASH Private Macros + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private variables ---------------------------------------------------------*/ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Variables FLASH Private Variables + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Variables used for Erase pages under interruption*/ + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_ProcessTypeDef pFlash; + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private function prototypes -----------------------------------------------*/ + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Functions FLASH Private Functions + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data); + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_SetErrorCode(void); + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** extern void FLASH_PageErase(uint32_t PageAddress); + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Exported functions ---------------------------------------------------------*/ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions FLASH Exported Functions + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Programming operation functions + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + ARM GAS /tmp/ccHHWLWe.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * the erase operation is performed before the program one. + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note FLASH should be previously erased before new programming (only exception to this + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * is when 0x0000 is programmed) + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t index = 0U; + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t nbiterations = 0U; + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Locked */ + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check the parameters */ + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for last operation to be completed */ + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(status == HAL_OK) + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** nbiterations = 1U; + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit = 2*16-bit) at a specified address. */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** nbiterations = 2U; + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit = 4*16-bit) at a specified address. */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** nbiterations = 4U; + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** for (index = 0U; index < nbiterations; index++) + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + ARM GAS /tmp/ccHHWLWe.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for last operation to be completed */ + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* If the program operation is completed, disable the PG Bit */ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (status != HAL_OK) + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** break; + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Unlocked */ + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return status; + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address with interrupt enabled. + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * the erase operation is performed before the program one. + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Locked */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check the parameters */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = Address; + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = Data; + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD; + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + ARM GAS /tmp/ccHHWLWe.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining = 1U; + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD; + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining = 2U; + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD; + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining = 4U; + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_Program_HalfWord(Address, (uint16_t)Data); + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return status; + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief This function handles FLASH interrupt request. + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval None + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** void HAL_FLASH_IRQHandler(void) + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t addresstmp = 0U; + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check FLASH operation error flags */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Return the faulty address */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset address */ + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Save the Error code */ + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_SetErrorCode(); + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH error interrupt user callback */ + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_OperationErrorCallback(addresstmp); + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Stop the procedure ongoing */ + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process can continue only if no error detected */ + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) + ARM GAS /tmp/ccHHWLWe.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Nb of pages to erased can be decreased */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining--; + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check if there are still pages to erase */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Increment sector number*/ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address + FLASH_PAGE_SIZE; + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* If the erase operation is completed, disable the PER Bit */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_PageErase(addresstmp); + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* No more pages to Erase, user callback can be called. */ + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset Sector and stop Erase pages procedure */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp = 0xFFFFFFFFU; + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE) + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Operation is completed, disable the MER Bit */ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* MassErase ended. Return the selected bank */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(0U); + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Stop Mass Erase procedure*/ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Nb of 16-bit data to program can be decreased */ + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining--; + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check if there are still 16-bit data to program */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Increment address to 16-bit */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address += 2U; + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Shift to have next 16-bit data */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = (pFlash.Data >> 16U); + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + ARM GAS /tmp/ccHHWLWe.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Operation is completed, disable the PG Bit */ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Program halfword (16-bit) at a specified address.*/ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data); + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program ended. Return the selected address */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD) + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address); + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD) + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2U); + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6U); + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset Address and stop Program procedure */ + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Operation is completed, disable the PG, PER and MER Bits */ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER)); + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Disable End of FLASH Operation and Error source interrupts */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Unlocked */ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH end of operation interrupt callback + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Mass Erase: No return value expected + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Pages Erase: Address of the page which has been erased + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * (if 0xFFFFFFFF, it means that all the selected pages have been erased) + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Program: Address which was selected for data program + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval none + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccHHWLWe.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** UNUSED(ReturnValue); + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** the HAL_FLASH_EndOfOperationCallback could be implemented in the user file + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH operation error interrupt callback + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Mass Erase: No return value expected + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Pages Erase: Address of the page which returned an error + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Program: Address which was selected for data program + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval none + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** UNUSED(ReturnValue); + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** the HAL_FLASH_OperationErrorCallback could be implemented in the user file + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief management functions + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### Peripheral Control functions ##### + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** This subsection provides a set of functions allowing to control the FLASH + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** memory operations. + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Unlock the FLASH control register access + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Unlock(void) + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Authorize the FLASH Registers access */ + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY1); + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + ARM GAS /tmp/ccHHWLWe.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Verify Flash is unlocked */ + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** status = HAL_ERROR; + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return status; + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Locks the FLASH control register access + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Lock(void) + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_LOCK); + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Unlock the FLASH Option Control Registers access. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Authorizes the Option Byte register programming */ + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_ERROR; + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Lock the FLASH Option Control Registers access. + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTWRE); + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Launch the option byte loading. + ARM GAS /tmp/ccHHWLWe.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note This function will reset automatically the MCU. + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for last operation to be completed */ + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE)); + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Peripheral errors functions + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### Peripheral Errors functions ##### + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** This subsection permit to get in run-time errors of the FLASH peripheral. + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Get the specific FLASH error flag. + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval FLASH_ErrorCode The returned value can be: + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @ref FLASH_Error_Codes + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t HAL_FLASH_GetError(void) + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return pFlash.ErrorCode; + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @addtogroup FLASH_Private_Functions + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Program a half-word (16-bit) at a specified address. + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Address specify the address to be programmed. + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Data specify the data to be programmed. + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval None + ARM GAS /tmp/ccHHWLWe.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 29 .loc 1 603 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clean the error context */ + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 34 .loc 1 605 3 view .LVU1 + 35 .loc 1 605 20 is_stmt 0 view .LVU2 + 36 0000 044B ldr r3, .L2 + 37 0002 0022 movs r2, #0 + 38 0004 DA61 str r2, [r3, #28] + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Proceed to program the new data */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_PG); + 39 .loc 1 608 5 is_stmt 1 view .LVU3 + 40 0006 044A ldr r2, .L2+4 + 41 0008 1369 ldr r3, [r2, #16] + 42 000a 43F00103 orr r3, r3, #1 + 43 000e 1361 str r3, [r2, #16] + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Write data in the address */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** *(__IO uint16_t*)Address = Data; + 44 .loc 1 611 3 view .LVU4 + 45 .loc 1 611 28 is_stmt 0 view .LVU5 + 46 0010 0180 strh r1, [r0] @ movhi + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 47 .loc 1 612 1 view .LVU6 + 48 0012 7047 bx lr + 49 .L3: + 50 .align 2 + 51 .L2: + 52 0014 00000000 .word pFlash + 53 0018 00200240 .word 1073881088 + 54 .cfi_endproc + 55 .LFE141: + 57 .section .text.FLASH_SetErrorCode,"ax",%progbits + 58 .align 1 + 59 .syntax unified + 60 .thumb + 61 .thumb_func + 63 FLASH_SetErrorCode: + 64 .LFB143: + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Wait for a FLASH operation to complete. + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Timeout maximum flash operation timeout + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** flag will be set */ + ARM GAS /tmp/ccHHWLWe.s page 13 + + + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t tickstart = HAL_GetTick(); + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (Timeout != HAL_MAX_DELAY) + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_TIMEOUT; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Save the error code*/ + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_SetErrorCode(); + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_ERROR; + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* There is no error flag set */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Set the specific FLASH error flag. + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval None + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_SetErrorCode(void) + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 65 .loc 1 663 1 is_stmt 1 view -0 + 66 .cfi_startproc + 67 @ args = 0, pretend = 0, frame = 0 + 68 @ frame_needed = 0, uses_anonymous_args = 0 + 69 @ link register save eliminated. + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t flags = 0U; + 70 .loc 1 664 3 view .LVU8 + 71 .LVL1: + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) + 72 .loc 1 666 3 view .LVU9 + 73 .loc 1 666 6 is_stmt 0 view .LVU10 + 74 0000 0C4B ldr r3, .L7 + 75 0002 DB68 ldr r3, [r3, #12] + 76 .loc 1 666 5 view .LVU11 + 77 0004 13F01003 ands r3, r3, #16 + 78 0008 05D0 beq .L5 + ARM GAS /tmp/ccHHWLWe.s page 14 + + + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; + 79 .loc 1 668 5 is_stmt 1 view .LVU12 + 80 .loc 1 668 11 is_stmt 0 view .LVU13 + 81 000a 0B4A ldr r2, .L7+4 + 82 000c D369 ldr r3, [r2, #28] + 83 .loc 1 668 22 view .LVU14 + 84 000e 43F00203 orr r3, r3, #2 + 85 0012 D361 str r3, [r2, #28] + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** flags |= FLASH_FLAG_WRPERR; + 86 .loc 1 669 5 is_stmt 1 view .LVU15 + 87 .LVL2: + 88 .loc 1 669 11 is_stmt 0 view .LVU16 + 89 0014 1023 movs r3, #16 + 90 .LVL3: + 91 .L5: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 92 .loc 1 671 3 is_stmt 1 view .LVU17 + 93 .loc 1 671 6 is_stmt 0 view .LVU18 + 94 0016 074A ldr r2, .L7 + 95 0018 D268 ldr r2, [r2, #12] + 96 .loc 1 671 5 view .LVU19 + 97 001a 12F0040F tst r2, #4 + 98 001e 06D0 beq .L6 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; + 99 .loc 1 673 5 is_stmt 1 view .LVU20 + 100 .loc 1 673 11 is_stmt 0 view .LVU21 + 101 0020 0549 ldr r1, .L7+4 + 102 0022 CA69 ldr r2, [r1, #28] + 103 .loc 1 673 22 view .LVU22 + 104 0024 42F00102 orr r2, r2, #1 + 105 0028 CA61 str r2, [r1, #28] + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** flags |= FLASH_FLAG_PGERR; + 106 .loc 1 674 5 is_stmt 1 view .LVU23 + 107 .loc 1 674 11 is_stmt 0 view .LVU24 + 108 002a 43F00403 orr r3, r3, #4 + 109 .LVL4: + 110 .L6: + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear FLASH error pending bits */ + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(flags); + 111 .loc 1 677 3 is_stmt 1 view .LVU25 + 112 002e 014A ldr r2, .L7 + 113 0030 D360 str r3, [r2, #12] + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 114 .loc 1 678 1 is_stmt 0 view .LVU26 + 115 0032 7047 bx lr + 116 .L8: + 117 .align 2 + 118 .L7: + 119 0034 00200240 .word 1073881088 + 120 0038 00000000 .word pFlash + 121 .cfi_endproc + 122 .LFE143: + 124 .section .text.HAL_FLASH_Program_IT,"ax",%progbits + ARM GAS /tmp/ccHHWLWe.s page 15 + + + 125 .align 1 + 126 .global HAL_FLASH_Program_IT + 127 .syntax unified + 128 .thumb + 129 .thumb_func + 131 HAL_FLASH_Program_IT: + 132 .LVL5: + 133 .LFB131: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 134 .loc 1 239 1 is_stmt 1 view -0 + 135 .cfi_startproc + 136 @ args = 0, pretend = 0, frame = 0 + 137 @ frame_needed = 0, uses_anonymous_args = 0 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 138 .loc 1 239 1 is_stmt 0 view .LVU28 + 139 0000 38B5 push {r3, r4, r5, lr} + 140 .cfi_def_cfa_offset 16 + 141 .cfi_offset 3, -16 + 142 .cfi_offset 4, -12 + 143 .cfi_offset 5, -8 + 144 .cfi_offset 14, -4 + 145 0002 1D46 mov r5, r3 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 146 .loc 1 240 3 is_stmt 1 view .LVU29 + 147 .LVL6: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 148 .loc 1 243 3 view .LVU30 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 149 .loc 1 243 3 view .LVU31 + 150 0004 174B ldr r3, .L18 + 151 0006 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 152 0008 012B cmp r3, #1 + 153 000a 28D0 beq .L14 + 154 000c 8446 mov ip, r0 + 155 000e 0846 mov r0, r1 + 156 .LVL7: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 157 .loc 1 243 3 is_stmt 0 view .LVU32 + 158 0010 1446 mov r4, r2 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 159 .loc 1 243 3 is_stmt 1 discriminator 2 view .LVU33 + 160 0012 144B ldr r3, .L18 + 161 0014 0122 movs r2, #1 + 162 .LVL8: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 163 .loc 1 243 3 is_stmt 0 discriminator 2 view .LVU34 + 164 0016 1A76 strb r2, [r3, #24] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 165 .loc 1 243 3 is_stmt 1 discriminator 2 view .LVU35 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 166 .loc 1 246 3 view .LVU36 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 167 .loc 1 247 3 view .LVU37 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 168 .loc 1 250 3 view .LVU38 + 169 0018 1349 ldr r1, .L18+4 + 170 .LVL9: + ARM GAS /tmp/ccHHWLWe.s page 16 + + + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 171 .loc 1 250 3 is_stmt 0 view .LVU39 + 172 001a 0A69 ldr r2, [r1, #16] + 173 001c 42F4A052 orr r2, r2, #5120 + 174 0020 0A61 str r2, [r1, #16] + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = Data; + 175 .loc 1 252 3 is_stmt 1 view .LVU40 + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = Data; + 176 .loc 1 252 18 is_stmt 0 view .LVU41 + 177 0022 9860 str r0, [r3, #8] + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 178 .loc 1 253 3 is_stmt 1 view .LVU42 + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 179 .loc 1 253 15 is_stmt 0 view .LVU43 + 180 0024 C3E90445 strd r4, [r3, #16] + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 181 .loc 1 255 3 is_stmt 1 view .LVU44 + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 182 .loc 1 255 5 is_stmt 0 view .LVU45 + 183 0028 BCF1010F cmp ip, #1 + 184 002c 0CD0 beq .L16 + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 185 .loc 1 261 8 is_stmt 1 view .LVU46 + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 186 .loc 1 261 10 is_stmt 0 view .LVU47 + 187 002e BCF1020F cmp ip, #2 + 188 0032 0ED0 beq .L17 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 189 .loc 1 269 5 is_stmt 1 view .LVU48 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 190 .loc 1 269 29 is_stmt 0 view .LVU49 + 191 0034 0B4B ldr r3, .L18 + 192 0036 0522 movs r2, #5 + 193 0038 1A70 strb r2, [r3] + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 194 .loc 1 271 5 is_stmt 1 view .LVU50 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 195 .loc 1 271 26 is_stmt 0 view .LVU51 + 196 003a 0422 movs r2, #4 + 197 003c 5A60 str r2, [r3, #4] + 198 .L12: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 199 .loc 1 275 3 is_stmt 1 view .LVU52 + 200 003e A1B2 uxth r1, r4 + 201 0040 FFF7FEFF bl FLASH_Program_HalfWord + 202 .LVL10: + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 203 .loc 1 277 3 view .LVU53 + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 204 .loc 1 277 10 is_stmt 0 view .LVU54 + 205 0044 0020 movs r0, #0 + 206 .L10: + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 207 .loc 1 278 1 view .LVU55 + 208 0046 38BD pop {r3, r4, r5, pc} + 209 .LVL11: + 210 .L16: + ARM GAS /tmp/ccHHWLWe.s page 17 + + + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 211 .loc 1 257 5 is_stmt 1 view .LVU56 + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 212 .loc 1 257 29 is_stmt 0 view .LVU57 + 213 0048 0322 movs r2, #3 + 214 004a 1A70 strb r2, [r3] + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 215 .loc 1 259 5 is_stmt 1 view .LVU58 + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 216 .loc 1 259 26 is_stmt 0 view .LVU59 + 217 004c 0122 movs r2, #1 + 218 004e 5A60 str r2, [r3, #4] + 219 0050 F5E7 b .L12 + 220 .L17: + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 221 .loc 1 263 5 is_stmt 1 view .LVU60 + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 222 .loc 1 263 29 is_stmt 0 view .LVU61 + 223 0052 044B ldr r3, .L18 + 224 0054 0422 movs r2, #4 + 225 0056 1A70 strb r2, [r3] + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 226 .loc 1 265 5 is_stmt 1 view .LVU62 + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 227 .loc 1 265 26 is_stmt 0 view .LVU63 + 228 0058 0222 movs r2, #2 + 229 005a 5A60 str r2, [r3, #4] + 230 005c EFE7 b .L12 + 231 .LVL12: + 232 .L14: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 233 .loc 1 243 3 discriminator 1 view .LVU64 + 234 005e 0220 movs r0, #2 + 235 .LVL13: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 236 .loc 1 243 3 discriminator 1 view .LVU65 + 237 0060 F1E7 b .L10 + 238 .L19: + 239 0062 00BF .align 2 + 240 .L18: + 241 0064 00000000 .word pFlash + 242 0068 00200240 .word 1073881088 + 243 .cfi_endproc + 244 .LFE131: + 246 .section .text.HAL_FLASH_EndOfOperationCallback,"ax",%progbits + 247 .align 1 + 248 .weak HAL_FLASH_EndOfOperationCallback + 249 .syntax unified + 250 .thumb + 251 .thumb_func + 253 HAL_FLASH_EndOfOperationCallback: + 254 .LVL14: + 255 .LFB133: + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 256 .loc 1 428 1 is_stmt 1 view -0 + 257 .cfi_startproc + 258 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccHHWLWe.s page 18 + + + 259 @ frame_needed = 0, uses_anonymous_args = 0 + 260 @ link register save eliminated. + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 261 .loc 1 430 3 view .LVU67 + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 262 .loc 1 435 1 is_stmt 0 view .LVU68 + 263 0000 7047 bx lr + 264 .cfi_endproc + 265 .LFE133: + 267 .section .text.HAL_FLASH_OperationErrorCallback,"ax",%progbits + 268 .align 1 + 269 .weak HAL_FLASH_OperationErrorCallback + 270 .syntax unified + 271 .thumb + 272 .thumb_func + 274 HAL_FLASH_OperationErrorCallback: + 275 .LVL15: + 276 .LFB134: + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 277 .loc 1 446 1 is_stmt 1 view -0 + 278 .cfi_startproc + 279 @ args = 0, pretend = 0, frame = 0 + 280 @ frame_needed = 0, uses_anonymous_args = 0 + 281 @ link register save eliminated. + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 282 .loc 1 448 3 view .LVU70 + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 283 .loc 1 453 1 is_stmt 0 view .LVU71 + 284 0000 7047 bx lr + 285 .cfi_endproc + 286 .LFE134: + 288 .section .text.HAL_FLASH_IRQHandler,"ax",%progbits + 289 .align 1 + 290 .global HAL_FLASH_IRQHandler + 291 .syntax unified + 292 .thumb + 293 .thumb_func + 295 HAL_FLASH_IRQHandler: + 296 .LFB132: + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t addresstmp = 0U; + 297 .loc 1 285 1 is_stmt 1 view -0 + 298 .cfi_startproc + 299 @ args = 0, pretend = 0, frame = 0 + 300 @ frame_needed = 0, uses_anonymous_args = 0 + 301 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 302 .cfi_def_cfa_offset 24 + 303 .cfi_offset 3, -24 + 304 .cfi_offset 4, -20 + 305 .cfi_offset 5, -16 + 306 .cfi_offset 6, -12 + 307 .cfi_offset 7, -8 + 308 .cfi_offset 14, -4 + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 309 .loc 1 286 3 view .LVU73 + 310 .LVL16: + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 311 .loc 1 289 3 view .LVU74 + ARM GAS /tmp/ccHHWLWe.s page 19 + + + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 312 .loc 1 289 6 is_stmt 0 view .LVU75 + 313 0002 524B ldr r3, .L40 + 314 0004 DB68 ldr r3, [r3, #12] + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 315 .loc 1 289 5 view .LVU76 + 316 0006 13F0100F tst r3, #16 + 317 000a 04D1 bne .L23 + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 318 .loc 1 289 48 discriminator 1 view .LVU77 + 319 000c 4F4B ldr r3, .L40 + 320 000e DB68 ldr r3, [r3, #12] + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 321 .loc 1 289 46 discriminator 1 view .LVU78 + 322 0010 13F0040F tst r3, #4 + 323 0014 0BD0 beq .L24 + 324 .L23: + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset address */ + 325 .loc 1 292 5 is_stmt 1 view .LVU79 + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset address */ + 326 .loc 1 292 16 is_stmt 0 view .LVU80 + 327 0016 4E4C ldr r4, .L40+4 + 328 0018 A568 ldr r5, [r4, #8] + 329 .LVL17: + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 330 .loc 1 294 5 is_stmt 1 view .LVU81 + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 331 .loc 1 294 20 is_stmt 0 view .LVU82 + 332 001a 4FF0FF33 mov r3, #-1 + 333 001e A360 str r3, [r4, #8] + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 334 .loc 1 297 5 is_stmt 1 view .LVU83 + 335 0020 FFF7FEFF bl FLASH_SetErrorCode + 336 .LVL18: + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 337 .loc 1 300 5 view .LVU84 + 338 0024 2846 mov r0, r5 + 339 0026 FFF7FEFF bl HAL_FLASH_OperationErrorCallback + 340 .LVL19: + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 341 .loc 1 303 5 view .LVU85 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 342 .loc 1 303 29 is_stmt 0 view .LVU86 + 343 002a 0023 movs r3, #0 + 344 002c 2370 strb r3, [r4] + 345 .LVL20: + 346 .L24: + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 347 .loc 1 307 3 is_stmt 1 view .LVU87 + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 348 .loc 1 307 6 is_stmt 0 view .LVU88 + 349 002e 474B ldr r3, .L40 + 350 0030 DB68 ldr r3, [r3, #12] + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 351 .loc 1 307 5 view .LVU89 + 352 0032 13F0200F tst r3, #32 + 353 0036 2BD0 beq .L25 + ARM GAS /tmp/ccHHWLWe.s page 20 + + + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 354 .loc 1 310 5 is_stmt 1 view .LVU90 + 355 0038 444B ldr r3, .L40 + 356 003a 2022 movs r2, #32 + 357 003c DA60 str r2, [r3, #12] + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 358 .loc 1 313 5 view .LVU91 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 359 .loc 1 313 14 is_stmt 0 view .LVU92 + 360 003e 444B ldr r3, .L40+4 + 361 0040 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 362 .loc 1 313 7 view .LVU93 + 363 0042 2BB3 cbz r3, .L25 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 364 .loc 1 315 7 is_stmt 1 view .LVU94 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 365 .loc 1 315 16 is_stmt 0 view .LVU95 + 366 0044 424B ldr r3, .L40+4 + 367 0046 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 368 0048 DBB2 uxtb r3, r3 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 369 .loc 1 315 9 view .LVU96 + 370 004a 012B cmp r3, #1 + 371 004c 30D0 beq .L35 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 372 .loc 1 346 12 is_stmt 1 view .LVU97 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 373 .loc 1 346 21 is_stmt 0 view .LVU98 + 374 004e 404B ldr r3, .L40+4 + 375 0050 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 376 0052 DBB2 uxtb r3, r3 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 377 .loc 1 346 14 view .LVU99 + 378 0054 022B cmp r3, #2 + 379 0056 4AD0 beq .L36 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 380 .loc 1 361 9 is_stmt 1 view .LVU100 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 381 .loc 1 361 15 is_stmt 0 view .LVU101 + 382 0058 3D4B ldr r3, .L40+4 + 383 005a 5A68 ldr r2, [r3, #4] + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 384 .loc 1 361 29 view .LVU102 + 385 005c 013A subs r2, r2, #1 + 386 005e 5A60 str r2, [r3, #4] + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 387 .loc 1 364 9 is_stmt 1 view .LVU103 + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 388 .loc 1 364 18 is_stmt 0 view .LVU104 + 389 0060 5B68 ldr r3, [r3, #4] + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 390 .loc 1 364 11 view .LVU105 + 391 0062 002B cmp r3, #0 + 392 0064 4FD1 bne .L37 + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 393 .loc 1 383 11 is_stmt 1 view .LVU106 + ARM GAS /tmp/ccHHWLWe.s page 21 + + + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 394 .loc 1 383 21 is_stmt 0 view .LVU107 + 395 0066 3A4B ldr r3, .L40+4 + 396 0068 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 397 006a DBB2 uxtb r3, r3 + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 398 .loc 1 383 14 view .LVU108 + 399 006c 032B cmp r3, #3 + 400 006e 62D0 beq .L38 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 401 .loc 1 387 16 is_stmt 1 view .LVU109 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 402 .loc 1 387 26 is_stmt 0 view .LVU110 + 403 0070 374B ldr r3, .L40+4 + 404 0072 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 405 0074 DBB2 uxtb r3, r3 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 406 .loc 1 387 19 view .LVU111 + 407 0076 042B cmp r3, #4 + 408 0078 62D0 beq .L39 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 409 .loc 1 393 13 is_stmt 1 view .LVU112 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 410 .loc 1 393 52 is_stmt 0 view .LVU113 + 411 007a 354B ldr r3, .L40+4 + 412 007c 9868 ldr r0, [r3, #8] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 413 .loc 1 393 13 view .LVU114 + 414 007e 0638 subs r0, r0, #6 + 415 0080 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 416 .LVL21: + 417 .L31: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 418 .loc 1 397 11 is_stmt 1 view .LVU115 + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 419 .loc 1 397 26 is_stmt 0 view .LVU116 + 420 0084 324B ldr r3, .L40+4 + 421 0086 4FF0FF32 mov r2, #-1 + 422 008a 9A60 str r2, [r3, #8] + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 423 .loc 1 398 11 is_stmt 1 view .LVU117 + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 424 .loc 1 398 35 is_stmt 0 view .LVU118 + 425 008c 0022 movs r2, #0 + 426 008e 1A70 strb r2, [r3] + 427 .L25: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 428 .loc 1 405 3 is_stmt 1 view .LVU119 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 429 .loc 1 405 12 is_stmt 0 view .LVU120 + 430 0090 2F4B ldr r3, .L40+4 + 431 0092 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 432 .loc 1 405 5 view .LVU121 + 433 0094 5BB9 cbnz r3, .L22 + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 434 .loc 1 408 5 is_stmt 1 view .LVU122 + ARM GAS /tmp/ccHHWLWe.s page 22 + + + 435 0096 2D4B ldr r3, .L40 + 436 0098 1A69 ldr r2, [r3, #16] + 437 009a 22F00702 bic r2, r2, #7 + 438 009e 1A61 str r2, [r3, #16] + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 439 .loc 1 411 5 view .LVU123 + 440 00a0 1A69 ldr r2, [r3, #16] + 441 00a2 22F4A052 bic r2, r2, #5120 + 442 00a6 1A61 str r2, [r3, #16] + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 443 .loc 1 414 5 view .LVU124 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 444 .loc 1 414 5 view .LVU125 + 445 00a8 294B ldr r3, .L40+4 + 446 00aa 0022 movs r2, #0 + 447 00ac 1A76 strb r2, [r3, #24] + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 448 .loc 1 414 5 discriminator 1 view .LVU126 + 449 .L22: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 450 .loc 1 416 1 is_stmt 0 view .LVU127 + 451 00ae F8BD pop {r3, r4, r5, r6, r7, pc} + 452 .L35: + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 453 .loc 1 318 9 is_stmt 1 view .LVU128 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 454 .loc 1 318 15 is_stmt 0 view .LVU129 + 455 00b0 274B ldr r3, .L40+4 + 456 00b2 5A68 ldr r2, [r3, #4] + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 457 .loc 1 318 29 view .LVU130 + 458 00b4 013A subs r2, r2, #1 + 459 00b6 5A60 str r2, [r3, #4] + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 460 .loc 1 321 9 is_stmt 1 view .LVU131 + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 461 .loc 1 321 18 is_stmt 0 view .LVU132 + 462 00b8 5B68 ldr r3, [r3, #4] + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 463 .loc 1 321 11 view .LVU133 + 464 00ba 7BB1 cbz r3, .L27 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 465 .loc 1 323 11 is_stmt 1 view .LVU134 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 466 .loc 1 323 22 is_stmt 0 view .LVU135 + 467 00bc 244C ldr r4, .L40+4 + 468 00be A068 ldr r0, [r4, #8] + 469 .LVL22: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 470 .loc 1 325 11 is_stmt 1 view .LVU136 + 471 00c0 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 472 .LVL23: + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 473 .loc 1 328 11 view .LVU137 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 474 .loc 1 328 30 is_stmt 0 view .LVU138 + 475 00c4 A068 ldr r0, [r4, #8] + ARM GAS /tmp/ccHHWLWe.s page 23 + + + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 476 .loc 1 328 22 view .LVU139 + 477 00c6 00F50060 add r0, r0, #2048 + 478 .LVL24: + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 479 .loc 1 329 11 is_stmt 1 view .LVU140 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 480 .loc 1 329 26 is_stmt 0 view .LVU141 + 481 00ca A060 str r0, [r4, #8] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 482 .loc 1 332 11 is_stmt 1 view .LVU142 + 483 00cc 1F4A ldr r2, .L40 + 484 00ce 1369 ldr r3, [r2, #16] + 485 00d0 23F00203 bic r3, r3, #2 + 486 00d4 1361 str r3, [r2, #16] + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 487 .loc 1 334 11 view .LVU143 + 488 00d6 FFF7FEFF bl FLASH_PageErase + 489 .LVL25: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 490 .loc 1 334 11 is_stmt 0 view .LVU144 + 491 00da D9E7 b .L25 + 492 .LVL26: + 493 .L27: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 494 .loc 1 340 11 is_stmt 1 view .LVU145 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 495 .loc 1 340 26 is_stmt 0 view .LVU146 + 496 00dc 1C4B ldr r3, .L40+4 + 497 00de 4FF0FF30 mov r0, #-1 + 498 00e2 9860 str r0, [r3, #8] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 499 .loc 1 341 11 is_stmt 1 view .LVU147 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 500 .loc 1 341 35 is_stmt 0 view .LVU148 + 501 00e4 0022 movs r2, #0 + 502 00e6 1A70 strb r2, [r3] + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 503 .loc 1 343 11 is_stmt 1 view .LVU149 + 504 00e8 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 505 .LVL27: + 506 00ec D0E7 b .L25 + 507 .LVL28: + 508 .L36: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 509 .loc 1 349 9 view .LVU150 + 510 00ee 174A ldr r2, .L40 + 511 00f0 1369 ldr r3, [r2, #16] + 512 00f2 23F00403 bic r3, r3, #4 + 513 00f6 1361 str r3, [r2, #16] + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 514 .loc 1 353 11 view .LVU151 + 515 00f8 0020 movs r0, #0 + 516 00fa FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 517 .LVL29: + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 518 .loc 1 356 11 view .LVU152 + ARM GAS /tmp/ccHHWLWe.s page 24 + + + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 519 .loc 1 356 35 is_stmt 0 view .LVU153 + 520 00fe 144B ldr r3, .L40+4 + 521 0100 0022 movs r2, #0 + 522 0102 1A70 strb r2, [r3] + 523 0104 C4E7 b .L25 + 524 .L37: + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 525 .loc 1 367 11 is_stmt 1 view .LVU154 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 526 .loc 1 367 17 is_stmt 0 view .LVU155 + 527 0106 124B ldr r3, .L40+4 + 528 0108 9A68 ldr r2, [r3, #8] + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 529 .loc 1 367 26 view .LVU156 + 530 010a 0232 adds r2, r2, #2 + 531 010c 9A60 str r2, [r3, #8] + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 532 .loc 1 368 11 is_stmt 1 view .LVU157 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 533 .loc 1 368 22 is_stmt 0 view .LVU158 + 534 010e 9868 ldr r0, [r3, #8] + 535 .LVL30: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 536 .loc 1 371 11 is_stmt 1 view .LVU159 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 537 .loc 1 371 32 is_stmt 0 view .LVU160 + 538 0110 D3E90467 ldrd r6, [r3, #16] + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 539 .loc 1 371 38 view .LVU161 + 540 0114 340C lsrs r4, r6, #16 + 541 0116 44EA0744 orr r4, r4, r7, lsl #16 + 542 011a 3D0C lsrs r5, r7, #16 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 543 .loc 1 371 23 view .LVU162 + 544 011c C3E90445 strd r4, [r3, #16] + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 545 .loc 1 374 11 is_stmt 1 view .LVU163 + 546 0120 0A49 ldr r1, .L40 + 547 0122 0A69 ldr r2, [r1, #16] + 548 0124 22F00102 bic r2, r2, #1 + 549 0128 0A61 str r2, [r1, #16] + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 550 .loc 1 377 11 view .LVU164 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 551 .loc 1 377 62 is_stmt 0 view .LVU165 + 552 012a D3E90423 ldrd r2, [r3, #16] + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 553 .loc 1 377 11 view .LVU166 + 554 012e 91B2 uxth r1, r2 + 555 0130 FFF7FEFF bl FLASH_Program_HalfWord + 556 .LVL31: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 557 .loc 1 377 11 view .LVU167 + 558 0134 ACE7 b .L25 + 559 .LVL32: + 560 .L38: + ARM GAS /tmp/ccHHWLWe.s page 25 + + + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 561 .loc 1 385 13 is_stmt 1 view .LVU168 + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 562 .loc 1 385 52 is_stmt 0 view .LVU169 + 563 0136 064B ldr r3, .L40+4 + 564 0138 9868 ldr r0, [r3, #8] + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 565 .loc 1 385 13 view .LVU170 + 566 013a FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 567 .LVL33: + 568 013e A1E7 b .L31 + 569 .L39: + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 570 .loc 1 389 13 is_stmt 1 view .LVU171 + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 571 .loc 1 389 52 is_stmt 0 view .LVU172 + 572 0140 034B ldr r3, .L40+4 + 573 0142 9868 ldr r0, [r3, #8] + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 574 .loc 1 389 13 view .LVU173 + 575 0144 0238 subs r0, r0, #2 + 576 0146 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 577 .LVL34: + 578 014a 9BE7 b .L31 + 579 .L41: + 580 .align 2 + 581 .L40: + 582 014c 00200240 .word 1073881088 + 583 0150 00000000 .word pFlash + 584 .cfi_endproc + 585 .LFE132: + 587 .section .text.HAL_FLASH_Unlock,"ax",%progbits + 588 .align 1 + 589 .global HAL_FLASH_Unlock + 590 .syntax unified + 591 .thumb + 592 .thumb_func + 594 HAL_FLASH_Unlock: + 595 .LFB135: + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 596 .loc 1 479 1 is_stmt 1 view -0 + 597 .cfi_startproc + 598 @ args = 0, pretend = 0, frame = 0 + 599 @ frame_needed = 0, uses_anonymous_args = 0 + 600 @ link register save eliminated. + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 601 .loc 1 480 3 view .LVU175 + 602 .LVL35: + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 603 .loc 1 482 3 view .LVU176 + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 604 .loc 1 482 6 is_stmt 0 view .LVU177 + 605 0000 0A4B ldr r3, .L46 + 606 0002 1B69 ldr r3, [r3, #16] + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 607 .loc 1 482 5 view .LVU178 + 608 0004 13F0800F tst r3, #128 + ARM GAS /tmp/ccHHWLWe.s page 26 + + + 609 0008 0BD0 beq .L44 + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 610 .loc 1 485 5 is_stmt 1 view .LVU179 + 611 000a 084B ldr r3, .L46 + 612 000c 084A ldr r2, .L46+4 + 613 000e 5A60 str r2, [r3, #4] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 614 .loc 1 486 5 view .LVU180 + 615 0010 02F18832 add r2, r2, #-2004318072 + 616 0014 5A60 str r2, [r3, #4] + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 617 .loc 1 489 5 view .LVU181 + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 618 .loc 1 489 8 is_stmt 0 view .LVU182 + 619 0016 1B69 ldr r3, [r3, #16] + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 620 .loc 1 489 7 view .LVU183 + 621 0018 13F0800F tst r3, #128 + 622 001c 03D1 bne .L45 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 623 .loc 1 480 21 view .LVU184 + 624 001e 0020 movs r0, #0 + 625 0020 7047 bx lr + 626 .L44: + 627 0022 0020 movs r0, #0 + 628 0024 7047 bx lr + 629 .L45: + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 630 .loc 1 491 14 view .LVU185 + 631 0026 0120 movs r0, #1 + 632 .LVL36: + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 633 .loc 1 495 3 is_stmt 1 view .LVU186 + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 634 .loc 1 496 1 is_stmt 0 view .LVU187 + 635 0028 7047 bx lr + 636 .L47: + 637 002a 00BF .align 2 + 638 .L46: + 639 002c 00200240 .word 1073881088 + 640 0030 23016745 .word 1164378403 + 641 .cfi_endproc + 642 .LFE135: + 644 .section .text.HAL_FLASH_Lock,"ax",%progbits + 645 .align 1 + 646 .global HAL_FLASH_Lock + 647 .syntax unified + 648 .thumb + 649 .thumb_func + 651 HAL_FLASH_Lock: + 652 .LFB136: + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 653 .loc 1 503 1 is_stmt 1 view -0 + 654 .cfi_startproc + 655 @ args = 0, pretend = 0, frame = 0 + 656 @ frame_needed = 0, uses_anonymous_args = 0 + 657 @ link register save eliminated. + ARM GAS /tmp/ccHHWLWe.s page 27 + + + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 658 .loc 1 505 3 view .LVU189 + 659 0000 034A ldr r2, .L49 + 660 0002 1369 ldr r3, [r2, #16] + 661 0004 43F08003 orr r3, r3, #128 + 662 0008 1361 str r3, [r2, #16] + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 663 .loc 1 507 3 view .LVU190 + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 664 .loc 1 508 1 is_stmt 0 view .LVU191 + 665 000a 0020 movs r0, #0 + 666 000c 7047 bx lr + 667 .L50: + 668 000e 00BF .align 2 + 669 .L49: + 670 0010 00200240 .word 1073881088 + 671 .cfi_endproc + 672 .LFE136: + 674 .section .text.HAL_FLASH_OB_Unlock,"ax",%progbits + 675 .align 1 + 676 .global HAL_FLASH_OB_Unlock + 677 .syntax unified + 678 .thumb + 679 .thumb_func + 681 HAL_FLASH_OB_Unlock: + 682 .LFB137: + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 683 .loc 1 515 1 is_stmt 1 view -0 + 684 .cfi_startproc + 685 @ args = 0, pretend = 0, frame = 0 + 686 @ frame_needed = 0, uses_anonymous_args = 0 + 687 @ link register save eliminated. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 688 .loc 1 516 3 view .LVU193 + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 689 .loc 1 516 7 is_stmt 0 view .LVU194 + 690 0000 074B ldr r3, .L54 + 691 0002 1B69 ldr r3, [r3, #16] + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 692 .loc 1 516 6 view .LVU195 + 693 0004 13F4007F tst r3, #512 + 694 0008 07D1 bne .L53 + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 695 .loc 1 519 5 is_stmt 1 view .LVU196 + 696 000a 054B ldr r3, .L54 + 697 000c 054A ldr r2, .L54+4 + 698 000e 9A60 str r2, [r3, #8] + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 699 .loc 1 520 5 view .LVU197 + 700 0010 02F18832 add r2, r2, #-2004318072 + 701 0014 9A60 str r2, [r3, #8] + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 702 .loc 1 527 3 view .LVU198 + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 703 .loc 1 527 10 is_stmt 0 view .LVU199 + 704 0016 0020 movs r0, #0 + 705 0018 7047 bx lr + ARM GAS /tmp/ccHHWLWe.s page 28 + + + 706 .L53: + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 707 .loc 1 524 12 view .LVU200 + 708 001a 0120 movs r0, #1 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 709 .loc 1 528 1 view .LVU201 + 710 001c 7047 bx lr + 711 .L55: + 712 001e 00BF .align 2 + 713 .L54: + 714 0020 00200240 .word 1073881088 + 715 0024 23016745 .word 1164378403 + 716 .cfi_endproc + 717 .LFE137: + 719 .section .text.HAL_FLASH_OB_Lock,"ax",%progbits + 720 .align 1 + 721 .global HAL_FLASH_OB_Lock + 722 .syntax unified + 723 .thumb + 724 .thumb_func + 726 HAL_FLASH_OB_Lock: + 727 .LFB138: + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 728 .loc 1 535 1 is_stmt 1 view -0 + 729 .cfi_startproc + 730 @ args = 0, pretend = 0, frame = 0 + 731 @ frame_needed = 0, uses_anonymous_args = 0 + 732 @ link register save eliminated. + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 733 .loc 1 537 3 view .LVU203 + 734 0000 034A ldr r2, .L57 + 735 0002 1369 ldr r3, [r2, #16] + 736 0004 23F40073 bic r3, r3, #512 + 737 0008 1361 str r3, [r2, #16] + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 738 .loc 1 539 3 view .LVU204 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 739 .loc 1 540 1 is_stmt 0 view .LVU205 + 740 000a 0020 movs r0, #0 + 741 000c 7047 bx lr + 742 .L58: + 743 000e 00BF .align 2 + 744 .L57: + 745 0010 00200240 .word 1073881088 + 746 .cfi_endproc + 747 .LFE138: + 749 .section .text.HAL_FLASH_GetError,"ax",%progbits + 750 .align 1 + 751 .global HAL_FLASH_GetError + 752 .syntax unified + 753 .thumb + 754 .thumb_func + 756 HAL_FLASH_GetError: + 757 .LFB140: + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return pFlash.ErrorCode; + 758 .loc 1 580 1 is_stmt 1 view -0 + 759 .cfi_startproc + ARM GAS /tmp/ccHHWLWe.s page 29 + + + 760 @ args = 0, pretend = 0, frame = 0 + 761 @ frame_needed = 0, uses_anonymous_args = 0 + 762 @ link register save eliminated. + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 763 .loc 1 581 4 view .LVU207 + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 764 .loc 1 581 17 is_stmt 0 view .LVU208 + 765 0000 014B ldr r3, .L60 + 766 0002 D869 ldr r0, [r3, #28] + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 767 .loc 1 582 1 view .LVU209 + 768 0004 7047 bx lr + 769 .L61: + 770 0006 00BF .align 2 + 771 .L60: + 772 0008 00000000 .word pFlash + 773 .cfi_endproc + 774 .LFE140: + 776 .section .text.FLASH_WaitForLastOperation,"ax",%progbits + 777 .align 1 + 778 .global FLASH_WaitForLastOperation + 779 .syntax unified + 780 .thumb + 781 .thumb_func + 783 FLASH_WaitForLastOperation: + 784 .LVL37: + 785 .LFB142: + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 786 .loc 1 620 1 is_stmt 1 view -0 + 787 .cfi_startproc + 788 @ args = 0, pretend = 0, frame = 0 + 789 @ frame_needed = 0, uses_anonymous_args = 0 + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 790 .loc 1 620 1 is_stmt 0 view .LVU211 + 791 0000 38B5 push {r3, r4, r5, lr} + 792 .cfi_def_cfa_offset 16 + 793 .cfi_offset 3, -16 + 794 .cfi_offset 4, -12 + 795 .cfi_offset 5, -8 + 796 .cfi_offset 14, -4 + 797 0002 0446 mov r4, r0 + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 798 .loc 1 625 3 is_stmt 1 view .LVU212 + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 799 .loc 1 625 24 is_stmt 0 view .LVU213 + 800 0004 FFF7FEFF bl HAL_GetTick + 801 .LVL38: + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 802 .loc 1 625 24 view .LVU214 + 803 0008 0546 mov r5, r0 + 804 .LVL39: + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 805 .loc 1 627 3 is_stmt 1 view .LVU215 + 806 .L64: + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 807 .loc 1 627 9 view .LVU216 + 808 000a 144B ldr r3, .L73 + ARM GAS /tmp/ccHHWLWe.s page 30 + + + 809 000c DB68 ldr r3, [r3, #12] + 810 000e 13F0010F tst r3, #1 + 811 0012 0AD0 beq .L72 + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 812 .loc 1 629 5 view .LVU217 + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 813 .loc 1 629 8 is_stmt 0 view .LVU218 + 814 0014 B4F1FF3F cmp r4, #-1 + 815 0018 F7D0 beq .L64 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 816 .loc 1 631 7 is_stmt 1 view .LVU219 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 817 .loc 1 631 9 is_stmt 0 view .LVU220 + 818 001a 24B1 cbz r4, .L65 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 819 .loc 1 631 31 discriminator 1 view .LVU221 + 820 001c FFF7FEFF bl HAL_GetTick + 821 .LVL40: + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 822 .loc 1 631 44 discriminator 1 view .LVU222 + 823 0020 401B subs r0, r0, r5 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 824 .loc 1 631 26 discriminator 1 view .LVU223 + 825 0022 A042 cmp r0, r4 + 826 0024 F1D9 bls .L64 + 827 .L65: + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 828 .loc 1 633 9 is_stmt 1 view .LVU224 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 829 .loc 1 633 16 is_stmt 0 view .LVU225 + 830 0026 0320 movs r0, #3 + 831 0028 12E0 b .L66 + 832 .L72: + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 833 .loc 1 639 3 is_stmt 1 view .LVU226 + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 834 .loc 1 639 7 is_stmt 0 view .LVU227 + 835 002a 0C4B ldr r3, .L73 + 836 002c DB68 ldr r3, [r3, #12] + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 837 .loc 1 639 6 view .LVU228 + 838 002e 13F0200F tst r3, #32 + 839 0032 02D0 beq .L68 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 840 .loc 1 642 5 is_stmt 1 view .LVU229 + 841 0034 094B ldr r3, .L73 + 842 0036 2022 movs r2, #32 + 843 0038 DA60 str r2, [r3, #12] + 844 .L68: + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 845 .loc 1 645 3 view .LVU230 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 846 .loc 1 645 6 is_stmt 0 view .LVU231 + 847 003a 084B ldr r3, .L73 + 848 003c DB68 ldr r3, [r3, #12] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 849 .loc 1 645 5 view .LVU232 + ARM GAS /tmp/ccHHWLWe.s page 31 + + + 850 003e 13F0100F tst r3, #16 + 851 0042 06D1 bne .L69 + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 852 .loc 1 646 6 view .LVU233 + 853 0044 054B ldr r3, .L73 + 854 0046 DB68 ldr r3, [r3, #12] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 855 .loc 1 645 47 discriminator 1 view .LVU234 + 856 0048 13F0040F tst r3, #4 + 857 004c 01D1 bne .L69 + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 858 .loc 1 654 10 view .LVU235 + 859 004e 0020 movs r0, #0 + 860 .L66: + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 861 .loc 1 655 1 view .LVU236 + 862 0050 38BD pop {r3, r4, r5, pc} + 863 .LVL41: + 864 .L69: + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_ERROR; + 865 .loc 1 649 5 is_stmt 1 view .LVU237 + 866 0052 FFF7FEFF bl FLASH_SetErrorCode + 867 .LVL42: + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 868 .loc 1 650 5 view .LVU238 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 869 .loc 1 650 12 is_stmt 0 view .LVU239 + 870 0056 0120 movs r0, #1 + 871 0058 FAE7 b .L66 + 872 .L74: + 873 005a 00BF .align 2 + 874 .L73: + 875 005c 00200240 .word 1073881088 + 876 .cfi_endproc + 877 .LFE142: + 879 .section .text.HAL_FLASH_Program,"ax",%progbits + 880 .align 1 + 881 .global HAL_FLASH_Program + 882 .syntax unified + 883 .thumb + 884 .thumb_func + 886 HAL_FLASH_Program: + 887 .LVL43: + 888 .LFB130: + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 889 .loc 1 167 1 is_stmt 1 view -0 + 890 .cfi_startproc + 891 @ args = 0, pretend = 0, frame = 0 + 892 @ frame_needed = 0, uses_anonymous_args = 0 + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 893 .loc 1 167 1 is_stmt 0 view .LVU241 + 894 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 895 .cfi_def_cfa_offset 32 + 896 .cfi_offset 3, -32 + 897 .cfi_offset 4, -28 + 898 .cfi_offset 5, -24 + 899 .cfi_offset 6, -20 + ARM GAS /tmp/ccHHWLWe.s page 32 + + + 900 .cfi_offset 7, -16 + 901 .cfi_offset 8, -12 + 902 .cfi_offset 9, -8 + 903 .cfi_offset 14, -4 + 904 0004 1E46 mov r6, r3 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t index = 0U; + 905 .loc 1 168 3 is_stmt 1 view .LVU242 + 906 .LVL44: + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t nbiterations = 0U; + 907 .loc 1 169 3 view .LVU243 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 908 .loc 1 170 3 view .LVU244 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 909 .loc 1 173 3 view .LVU245 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 910 .loc 1 173 3 view .LVU246 + 911 0006 244B ldr r3, .L87 + 912 0008 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 913 000a 012B cmp r3, #1 + 914 000c 41D0 beq .L81 + 915 000e 0446 mov r4, r0 + 916 0010 0F46 mov r7, r1 + 917 0012 9046 mov r8, r2 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 918 .loc 1 173 3 discriminator 2 view .LVU247 + 919 0014 204B ldr r3, .L87 + 920 0016 0122 movs r2, #1 + 921 .LVL45: + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 922 .loc 1 173 3 is_stmt 0 discriminator 2 view .LVU248 + 923 0018 1A76 strb r2, [r3, #24] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 924 .loc 1 173 3 is_stmt 1 discriminator 2 view .LVU249 + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 925 .loc 1 176 3 view .LVU250 + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 926 .loc 1 177 3 view .LVU251 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 927 .loc 1 180 5 view .LVU252 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 928 .loc 1 180 14 is_stmt 0 view .LVU253 + 929 001a 4CF25030 movw r0, #50000 + 930 .LVL46: + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 931 .loc 1 180 14 view .LVU254 + 932 001e FFF7FEFF bl FLASH_WaitForLastOperation + 933 .LVL47: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 934 .loc 1 182 3 is_stmt 1 view .LVU255 + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 935 .loc 1 182 5 is_stmt 0 view .LVU256 + 936 0022 0346 mov r3, r0 + 937 0024 78BB cbnz r0, .L77 + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 938 .loc 1 184 5 is_stmt 1 view .LVU257 + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 939 .loc 1 184 7 is_stmt 0 view .LVU258 + ARM GAS /tmp/ccHHWLWe.s page 33 + + + 940 0026 012C cmp r4, #1 + 941 0028 08D0 beq .L82 + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 942 .loc 1 189 10 is_stmt 1 view .LVU259 + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 943 .loc 1 189 12 is_stmt 0 view .LVU260 + 944 002a 022C cmp r4, #2 + 945 002c 03D0 beq .L85 + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 946 .loc 1 197 20 view .LVU261 + 947 002e 4FF00409 mov r9, #4 + 948 .L78: + 949 .LVL48: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 950 .loc 1 200 5 is_stmt 1 view .LVU262 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 951 .loc 1 200 16 is_stmt 0 view .LVU263 + 952 0032 1C46 mov r4, r3 + 953 .LVL49: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 954 .loc 1 200 5 view .LVU264 + 955 0034 07E0 b .L79 + 956 .LVL50: + 957 .L85: + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 958 .loc 1 192 20 view .LVU265 + 959 0036 4FF00209 mov r9, #2 + 960 003a FAE7 b .L78 + 961 .L82: + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 962 .loc 1 187 20 view .LVU266 + 963 003c 4FF00109 mov r9, #1 + 964 0040 F7E7 b .L78 + 965 .LVL51: + 966 .L86: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 967 .loc 1 200 49 is_stmt 1 discriminator 2 view .LVU267 + 968 0042 0134 adds r4, r4, #1 + 969 .LVL52: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 970 .loc 1 200 49 is_stmt 0 discriminator 2 view .LVU268 + 971 0044 E4B2 uxtb r4, r4 + 972 .LVL53: + 973 .L79: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 974 .loc 1 200 28 is_stmt 1 discriminator 1 view .LVU269 + 975 0046 4C45 cmp r4, r9 + 976 0048 1DD2 bcs .L77 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 977 .loc 1 202 7 view .LVU270 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 978 .loc 1 202 77 is_stmt 0 view .LVU271 + 979 004a 2101 lsls r1, r4, #4 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 980 .loc 1 202 70 view .LVU272 + 981 004c C1F12002 rsb r2, r1, #32 + 982 0050 A1F12003 sub r3, r1, #32 + ARM GAS /tmp/ccHHWLWe.s page 34 + + + 983 .LVL54: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 984 .loc 1 202 70 view .LVU273 + 985 0054 28FA01F1 lsr r1, r8, r1 + 986 0058 06FA02F2 lsl r2, r6, r2 + 987 005c 1143 orrs r1, r1, r2 + 988 005e 26FA03F3 lsr r3, r6, r3 + 989 0062 1943 orrs r1, r1, r3 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 990 .loc 1 202 7 view .LVU274 + 991 0064 89B2 uxth r1, r1 + 992 0066 07EB4400 add r0, r7, r4, lsl #1 + 993 006a FFF7FEFF bl FLASH_Program_HalfWord + 994 .LVL55: + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 995 .loc 1 205 9 is_stmt 1 view .LVU275 + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 996 .loc 1 205 18 is_stmt 0 view .LVU276 + 997 006e 4CF25030 movw r0, #50000 + 998 0072 FFF7FEFF bl FLASH_WaitForLastOperation + 999 .LVL56: + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 1000 .loc 1 208 9 is_stmt 1 view .LVU277 + 1001 0076 094B ldr r3, .L87+4 + 1002 0078 1D69 ldr r5, [r3, #16] + 1003 007a 25F00105 bic r5, r5, #1 + 1004 007e 1D61 str r5, [r3, #16] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 1005 .loc 1 210 7 view .LVU278 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 1006 .loc 1 210 10 is_stmt 0 view .LVU279 + 1007 0080 0346 mov r3, r0 + 1008 0082 0028 cmp r0, #0 + 1009 0084 DDD0 beq .L86 + 1010 .LVL57: + 1011 .L77: + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1012 .loc 1 218 3 is_stmt 1 view .LVU280 + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1013 .loc 1 218 3 view .LVU281 + 1014 0086 044A ldr r2, .L87 + 1015 0088 0021 movs r1, #0 + 1016 008a 1176 strb r1, [r2, #24] + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1017 .loc 1 218 3 view .LVU282 + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 1018 .loc 1 220 3 view .LVU283 + 1019 .LVL58: + 1020 .L76: + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1021 .loc 1 221 1 is_stmt 0 view .LVU284 + 1022 008c 1846 mov r0, r3 + 1023 008e BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 1024 .LVL59: + 1025 .L81: + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1026 .loc 1 173 3 discriminator 1 view .LVU285 + ARM GAS /tmp/ccHHWLWe.s page 35 + + + 1027 0092 0223 movs r3, #2 + 1028 0094 FAE7 b .L76 + 1029 .L88: + 1030 0096 00BF .align 2 + 1031 .L87: + 1032 0098 00000000 .word pFlash + 1033 009c 00200240 .word 1073881088 + 1034 .cfi_endproc + 1035 .LFE130: + 1037 .section .text.HAL_FLASH_OB_Launch,"ax",%progbits + 1038 .align 1 + 1039 .global HAL_FLASH_OB_Launch + 1040 .syntax unified + 1041 .thumb + 1042 .thumb_func + 1044 HAL_FLASH_OB_Launch: + 1045 .LFB139: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 1046 .loc 1 548 1 is_stmt 1 view -0 + 1047 .cfi_startproc + 1048 @ args = 0, pretend = 0, frame = 0 + 1049 @ frame_needed = 0, uses_anonymous_args = 0 + 1050 0000 08B5 push {r3, lr} + 1051 .cfi_def_cfa_offset 8 + 1052 .cfi_offset 3, -8 + 1053 .cfi_offset 14, -4 + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1054 .loc 1 550 3 view .LVU287 + 1055 0002 054A ldr r2, .L91 + 1056 0004 1369 ldr r3, [r2, #16] + 1057 0006 43F40053 orr r3, r3, #8192 + 1058 000a 1361 str r3, [r2, #16] + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 1059 .loc 1 553 3 view .LVU288 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 1060 .loc 1 553 10 is_stmt 0 view .LVU289 + 1061 000c 4CF25030 movw r0, #50000 + 1062 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 1063 .LVL60: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1064 .loc 1 554 1 view .LVU290 + 1065 0014 08BD pop {r3, pc} + 1066 .L92: + 1067 0016 00BF .align 2 + 1068 .L91: + 1069 0018 00200240 .word 1073881088 + 1070 .cfi_endproc + 1071 .LFE139: + 1073 .global pFlash + 1074 .section .bss.pFlash,"aw",%nobits + 1075 .align 3 + 1078 pFlash: + 1079 0000 00000000 .space 32 + 1079 00000000 + 1079 00000000 + 1079 00000000 + 1079 00000000 + ARM GAS /tmp/ccHHWLWe.s page 36 + + + 1080 .text + 1081 .Letext0: + 1082 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1083 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1084 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1085 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1086 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1087 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h" + 1088 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccHHWLWe.s page 37 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_flash.c + /tmp/ccHHWLWe.s:21 .text.FLASH_Program_HalfWord:00000000 $t + /tmp/ccHHWLWe.s:26 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord + /tmp/ccHHWLWe.s:52 .text.FLASH_Program_HalfWord:00000014 $d + /tmp/ccHHWLWe.s:1078 .bss.pFlash:00000000 pFlash + /tmp/ccHHWLWe.s:58 .text.FLASH_SetErrorCode:00000000 $t + /tmp/ccHHWLWe.s:63 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode + /tmp/ccHHWLWe.s:119 .text.FLASH_SetErrorCode:00000034 $d + /tmp/ccHHWLWe.s:125 .text.HAL_FLASH_Program_IT:00000000 $t + /tmp/ccHHWLWe.s:131 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT + /tmp/ccHHWLWe.s:241 .text.HAL_FLASH_Program_IT:00000064 $d + /tmp/ccHHWLWe.s:247 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t + /tmp/ccHHWLWe.s:253 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback + /tmp/ccHHWLWe.s:268 .text.HAL_FLASH_OperationErrorCallback:00000000 $t + /tmp/ccHHWLWe.s:274 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback + /tmp/ccHHWLWe.s:289 .text.HAL_FLASH_IRQHandler:00000000 $t + /tmp/ccHHWLWe.s:295 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler + /tmp/ccHHWLWe.s:582 .text.HAL_FLASH_IRQHandler:0000014c $d + /tmp/ccHHWLWe.s:588 .text.HAL_FLASH_Unlock:00000000 $t + /tmp/ccHHWLWe.s:594 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock + /tmp/ccHHWLWe.s:639 .text.HAL_FLASH_Unlock:0000002c $d + /tmp/ccHHWLWe.s:645 .text.HAL_FLASH_Lock:00000000 $t + /tmp/ccHHWLWe.s:651 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock + /tmp/ccHHWLWe.s:670 .text.HAL_FLASH_Lock:00000010 $d + /tmp/ccHHWLWe.s:675 .text.HAL_FLASH_OB_Unlock:00000000 $t + /tmp/ccHHWLWe.s:681 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock + /tmp/ccHHWLWe.s:714 .text.HAL_FLASH_OB_Unlock:00000020 $d + /tmp/ccHHWLWe.s:720 .text.HAL_FLASH_OB_Lock:00000000 $t + /tmp/ccHHWLWe.s:726 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock + /tmp/ccHHWLWe.s:745 .text.HAL_FLASH_OB_Lock:00000010 $d + /tmp/ccHHWLWe.s:750 .text.HAL_FLASH_GetError:00000000 $t + /tmp/ccHHWLWe.s:756 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError + /tmp/ccHHWLWe.s:772 .text.HAL_FLASH_GetError:00000008 $d + /tmp/ccHHWLWe.s:777 .text.FLASH_WaitForLastOperation:00000000 $t + /tmp/ccHHWLWe.s:783 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation + /tmp/ccHHWLWe.s:875 .text.FLASH_WaitForLastOperation:0000005c $d + /tmp/ccHHWLWe.s:880 .text.HAL_FLASH_Program:00000000 $t + /tmp/ccHHWLWe.s:886 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program + /tmp/ccHHWLWe.s:1032 .text.HAL_FLASH_Program:00000098 $d + /tmp/ccHHWLWe.s:1038 .text.HAL_FLASH_OB_Launch:00000000 $t + /tmp/ccHHWLWe.s:1044 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch + /tmp/ccHHWLWe.s:1069 .text.HAL_FLASH_OB_Launch:00000018 $d + /tmp/ccHHWLWe.s:1075 .bss.pFlash:00000000 $d + +UNDEFINED SYMBOLS +FLASH_PageErase +HAL_GetTick diff --git a/build/stm32f3xx_hal_flash.o b/build/stm32f3xx_hal_flash.o new file mode 100644 index 0000000..19086c8 Binary files /dev/null and b/build/stm32f3xx_hal_flash.o differ diff --git a/build/stm32f3xx_hal_flash_ex.d b/build/stm32f3xx_hal_flash_ex.d new file mode 100644 index 0000000..bff135a --- /dev/null +++ b/build/stm32f3xx_hal_flash_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_flash_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_flash_ex.lst b/build/stm32f3xx_hal_flash_ex.lst new file mode 100644 index 0000000..b806ba8 --- /dev/null +++ b/build/stm32f3xx_hal_flash_ex.lst @@ -0,0 +1,4275 @@ +ARM GAS /tmp/ccoO7FMo.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_flash_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c" + 20 .section .text.FLASH_MassErase,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 FLASH_MassErase: + 27 .LFB136: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @file stm32f3xx_hal_flash_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * functionalities of the FLASH peripheral: + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended Initialization/de-initialization functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended I/O operation functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended Peripheral Control functions + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### Flash peripheral extended features ##### + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### How to use this driver ##### + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** of all STM32F3xxx devices. It includes + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Set/Reset the write protection + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Program the user Option Bytes + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Get the Read protection Level + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ****************************************************************************** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @attention + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Copyright (c) 2016 STMicroelectronics. + ARM GAS /tmp/ccoO7FMo.s page 2 + + + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * All rights reserved. + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * the root directory of this software component. + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ****************************************************************************** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #include "stm32f3xx_hal.h" + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_IWDGSW_BIT (uint32_t)POSITION_VAL(FLASH_OBR_IWDG_SW) + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA0_BIT (uint32_t)POSITION_VAL(FLASH_OBR_DATA0) + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA1_BIT (uint32_t)POSITION_VAL(FLASH_OBR_DATA1) + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/ccoO7FMo.s page 3 + + + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase operations */ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static void FLASH_MassErase(void); + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress); + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Option bytes control */ + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage); + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage); + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel); + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig); + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data); + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void); + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void); + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions ##### + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase: return only when erase has been done + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase_IT: end of erase is done when HAL_FLASH_EndOfOperationCallback + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps: + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** program memory access. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the desired function to erase page. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Lock() to disable the flash program memory access + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation). + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * must be called before. + ARM GAS /tmp/ccoO7FMo.s page 4 + + + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased) + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Mass Erase requested for Bank1 */ + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the MER Bit */ + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Page Erase is requested */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Page Erase requested on address located on bank1 */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Initialization of PageError variable*/ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU; + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase page by page to be done*/ + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress; + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/ccoO7FMo.s page 5 + + + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_PageErase(address); + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the PER Bit */ + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *PageError = address; + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break; + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * must be called before. + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return HAL_ERROR; + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Mass erase to be done*/ + ARM GAS /tmp/ccoO7FMo.s page 6 + + + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase by page to be done*/ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE; + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/ + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress); + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### Option Bytes Programming functions ##### + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to control the FLASH + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** option bytes operations. + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Erases the FLASH option bytes. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note This functions erases all option bytes except the Read protection (RDP). + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur) + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBErase(void) + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get the actual read protection Option Byte value */ + ARM GAS /tmp/ccoO7FMo.s page 7 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** rdptmp = FLASH_OB_GetRDP(); + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Restore the last read protection Option Byte value */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(rdptmp); + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the erase status */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Program option bytes + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur) + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */ + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Write protection configuration */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); + ARM GAS /tmp/ccoO7FMo.s page 8 + + + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable of Write protection on the selected page */ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPPage); + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Disable of Write protection on the selected page */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPPage); + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Read protection configuration */ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* USER configuration */ + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig); + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* DATA configuration*/ + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA) + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData); + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/ccoO7FMo.s page 9 + + + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Get the Option byte configuration + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get WRP*/ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->WRPPage = FLASH_OB_GetWRP(); + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get RDP Level*/ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get USER*/ + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Get the Option byte user data + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param DATAAdress Address of the option byte DATA + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA0 + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA1 + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval Value programmed in USER data + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress) + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t value = 0U; + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (DATAAdress == OB_DATA_ADDRESS_DATA0) + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data0 */ + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT; + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data1 */ + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT; + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return value; + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + ARM GAS /tmp/ccoO7FMo.s page 10 + + + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory Bank + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static void FLASH_MassErase(void) + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 28 .loc 1 499 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 33 .loc 1 501 3 view .LVU1 + 34 .loc 1 501 20 is_stmt 0 view .LVU2 + 35 0000 064B ldr r3, .L2 + 36 0002 0022 movs r2, #0 + 37 0004 DA61 str r2, [r3, #28] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Only bank1 will be erased*/ + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_MER); + 38 .loc 1 504 5 is_stmt 1 view .LVU3 + 39 0006 064B ldr r3, .L2+4 + 40 0008 1A69 ldr r2, [r3, #16] + 41 000a 42F00402 orr r2, r2, #4 + 42 000e 1A61 str r2, [r3, #16] + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 43 .loc 1 505 5 view .LVU4 + 44 0010 1A69 ldr r2, [r3, #16] + 45 0012 42F04002 orr r2, r2, #64 + 46 0016 1A61 str r2, [r3, #16] + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 47 .loc 1 506 1 is_stmt 0 view .LVU5 + 48 0018 7047 bx lr + 49 .L3: + 50 001a 00BF .align 2 + 51 .L2: + 52 001c 00000000 .word pFlash + 53 0020 00200240 .word 1073881088 + 54 .cfi_endproc + 55 .LFE136: + 57 .section .text.FLASH_OB_GetWRP,"ax",%progbits + 58 .align 1 + 59 .syntax unified + 60 .thumb + 61 .thumb_func + 63 FLASH_OB_GetWRP: + 64 .LFB142: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired pages + ARM GAS /tmp/ccoO7FMo.s page 11 + + + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write protected. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage) + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be protected ******/ + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage)); + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO127MASK) + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U); + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + ARM GAS /tmp/ccoO7FMo.s page 12 + + + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable write protection */ + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired pages + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + ARM GAS /tmp/ccoO7FMo.s page 13 + + + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write unprotected. + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage) + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be unprotected ******/ + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage); + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO127MASK) + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U); + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + ARM GAS /tmp/ccoO7FMo.s page 14 + + + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP0 |= WRP0_Data; + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP1 |= WRP1_Data; + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP2 |= WRP2_Data; + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP3 |= WRP3_Data; + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Set the read protection level. + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param ReadProtectLevel specifies the read protection level. + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + ARM GAS /tmp/ccoO7FMo.s page 15 + + + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel) + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel)); + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRITE_REG(OB->RDP, ReadProtectLevel); + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte. + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * And SDADC12_VDD_MONITOR(Bit7) for STM32F373 or STM32F378 . + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig) + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/ccoO7FMo.s page 16 + + + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW))); + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR) + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SDACD_VDD_MONITOR((UserConfig&OB_SDACD_VDD_MONITOR_SET))); + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_SDADC12_VDD_MONITOR */ + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR) + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x08U); + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #else + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x88U); + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Programs a half word at a specified Option Byte Data address. + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur) + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param Address specifies the address to be programmed. + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be 0x1FFFF804 or 0x1FFFF806. + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param Data specifies the data to be programmed. + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data) + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_DATA_ADDRESS(Address)); + ARM GAS /tmp/ccoO7FMo.s page 17 + + + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enables the Option Bytes Programming operation */ + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the program operation is completed, disable the OPTPG Bit */ + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the Option Byte Data Program Status */ + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 65 .loc 1 880 1 is_stmt 1 view -0 + 66 .cfi_startproc + 67 @ args = 0, pretend = 0, frame = 0 + 68 @ frame_needed = 0, uses_anonymous_args = 0 + 69 @ link register save eliminated. + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return (uint32_t)(READ_REG(FLASH->WRPR)); + 70 .loc 1 882 3 view .LVU7 + 71 .loc 1 882 10 is_stmt 0 view .LVU8 + 72 0000 014B ldr r3, .L5 + 73 0002 186A ldr r0, [r3, #32] + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 74 .loc 1 883 1 view .LVU9 + 75 0004 7047 bx lr + 76 .L6: + 77 0006 00BF .align 2 + 78 .L5: + 79 0008 00200240 .word 1073881088 + 80 .cfi_endproc + 81 .LFE142: + 83 .section .text.FLASH_OB_GetRDP,"ax",%progbits + 84 .align 1 + 85 .syntax unified + 86 .thumb + 87 .thumb_func + 89 FLASH_OB_GetRDP: + 90 .LFB143: + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/ccoO7FMo.s page 18 + + + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval FLASH RDP level + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void) + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 91 .loc 1 894 1 is_stmt 1 view -0 + 92 .cfi_startproc + 93 @ args = 0, pretend = 0, frame = 0 + 94 @ frame_needed = 0, uses_anonymous_args = 0 + 95 @ link register save eliminated. + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t tmp_reg = 0U; + 96 .loc 1 895 3 view .LVU11 + 97 .LVL0: + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Read RDP level bits */ + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_RDPRT) + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, FLASH_OBR_RDPRT); + 98 .loc 1 899 3 view .LVU12 + 99 .loc 1 899 13 is_stmt 0 view .LVU13 + 100 0000 064B ldr r3, .L11 + 101 0002 DB69 ldr r3, [r3, #28] + 102 .loc 1 899 11 view .LVU14 + 103 0004 03F00603 and r3, r3, #6 + 104 .LVL1: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(FLASH_OBR_LEVEL1_PROT) + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_LEVEL1_PROT | FLASH_OBR_LEVEL2_PROT)); + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_RDPRT */ + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_RDPRT) + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (tmp_reg == FLASH_OBR_RDPRT_2) + 105 .loc 1 905 3 is_stmt 1 view .LVU15 + 106 .loc 1 905 6 is_stmt 0 view .LVU16 + 107 0008 062B cmp r3, #6 + 108 000a 02D0 beq .L9 + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(FLASH_OBR_LEVEL1_PROT) + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (tmp_reg == FLASH_OBR_LEVEL2_PROT) + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_RDPRT */ + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_2; + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else if (tmp_reg == 0U) + 109 .loc 1 912 8 is_stmt 1 view .LVU17 + 110 .loc 1 912 11 is_stmt 0 view .LVU18 + 111 000c 1BB9 cbnz r3, .L10 + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_0; + 112 .loc 1 914 12 view .LVU19 + 113 000e AA20 movs r0, #170 + 114 0010 7047 bx lr + 115 .L9: + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 116 .loc 1 910 12 view .LVU20 + ARM GAS /tmp/ccoO7FMo.s page 19 + + + 117 0012 CC20 movs r0, #204 + 118 0014 7047 bx lr + 119 .L10: + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_1; + 120 .loc 1 918 12 view .LVU21 + 121 0016 BB20 movs r0, #187 + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 122 .loc 1 920 1 view .LVU22 + 123 0018 7047 bx lr + 124 .L12: + 125 001a 00BF .align 2 + 126 .L11: + 127 001c 00200240 .word 1073881088 + 128 .cfi_endproc + 129 .LFE143: + 131 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits + 132 .align 1 + 133 .syntax unified + 134 .thumb + 135 .thumb_func + 137 FLASH_OB_RDP_LevelConfig: + 138 .LVL2: + 139 .LFB139: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 140 .loc 1 742 1 is_stmt 1 view -0 + 141 .cfi_startproc + 142 @ args = 0, pretend = 0, frame = 0 + 143 @ frame_needed = 0, uses_anonymous_args = 0 + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 144 .loc 1 742 1 is_stmt 0 view .LVU24 + 145 0000 38B5 push {r3, r4, r5, lr} + 146 .cfi_def_cfa_offset 16 + 147 .cfi_offset 3, -16 + 148 .cfi_offset 4, -12 + 149 .cfi_offset 5, -8 + 150 .cfi_offset 14, -4 + 151 0002 0546 mov r5, r0 + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 152 .loc 1 743 3 is_stmt 1 view .LVU25 + 153 .LVL3: + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 154 .loc 1 746 3 view .LVU26 + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 155 .loc 1 749 3 view .LVU27 + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 156 .loc 1 749 12 is_stmt 0 view .LVU28 + 157 0004 4CF25030 movw r0, #50000 + 158 .LVL4: + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 159 .loc 1 749 12 view .LVU29 + 160 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 161 .LVL5: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/ccoO7FMo.s page 20 + + + 162 .loc 1 751 3 is_stmt 1 view .LVU30 + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 163 .loc 1 751 5 is_stmt 0 view .LVU31 + 164 000c 00B1 cbz r0, .L16 + 165 .LVL6: + 166 .L14: + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 167 .loc 1 781 3 is_stmt 1 view .LVU32 + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 168 .loc 1 782 1 is_stmt 0 view .LVU33 + 169 000e 38BD pop {r3, r4, r5, pc} + 170 .LVL7: + 171 .L16: + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 172 .loc 1 754 5 is_stmt 1 view .LVU34 + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 173 .loc 1 754 22 is_stmt 0 view .LVU35 + 174 0010 124B ldr r3, .L17 + 175 0012 0022 movs r2, #0 + 176 0014 DA61 str r2, [r3, #28] + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 177 .loc 1 757 5 is_stmt 1 view .LVU36 + 178 0016 124C ldr r4, .L17+4 + 179 0018 2369 ldr r3, [r4, #16] + 180 001a 43F02003 orr r3, r3, #32 + 181 001e 2361 str r3, [r4, #16] + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 182 .loc 1 758 5 view .LVU37 + 183 0020 2369 ldr r3, [r4, #16] + 184 0022 43F04003 orr r3, r3, #64 + 185 0026 2361 str r3, [r4, #16] + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 186 .loc 1 761 5 view .LVU38 + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 187 .loc 1 761 14 is_stmt 0 view .LVU39 + 188 0028 4CF25030 movw r0, #50000 + 189 002c FFF7FEFF bl FLASH_WaitForLastOperation + 190 .LVL8: + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 191 .loc 1 764 5 is_stmt 1 view .LVU40 + 192 0030 2369 ldr r3, [r4, #16] + 193 0032 23F02003 bic r3, r3, #32 + 194 0036 2361 str r3, [r4, #16] + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 195 .loc 1 766 5 view .LVU41 + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 196 .loc 1 766 7 is_stmt 0 view .LVU42 + 197 0038 0028 cmp r0, #0 + 198 003a E8D1 bne .L14 + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 199 .loc 1 769 7 is_stmt 1 view .LVU43 + 200 003c 2369 ldr r3, [r4, #16] + 201 003e 43F01003 orr r3, r3, #16 + 202 0042 2361 str r3, [r4, #16] + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 203 .loc 1 771 7 view .LVU44 + 204 0044 074B ldr r3, .L17+8 + ARM GAS /tmp/ccoO7FMo.s page 21 + + + 205 0046 1D80 strh r5, [r3] @ movhi + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 206 .loc 1 774 7 view .LVU45 + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 207 .loc 1 774 16 is_stmt 0 view .LVU46 + 208 0048 4CF25030 movw r0, #50000 + 209 .LVL9: + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 210 .loc 1 774 16 view .LVU47 + 211 004c FFF7FEFF bl FLASH_WaitForLastOperation + 212 .LVL10: + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 213 .loc 1 777 7 is_stmt 1 view .LVU48 + 214 0050 2369 ldr r3, [r4, #16] + 215 0052 23F01003 bic r3, r3, #16 + 216 0056 2361 str r3, [r4, #16] + 217 0058 D9E7 b .L14 + 218 .L18: + 219 005a 00BF .align 2 + 220 .L17: + 221 005c 00000000 .word pFlash + 222 0060 00200240 .word 1073881088 + 223 0064 00F8FF1F .word 536868864 + 224 .cfi_endproc + 225 .LFE139: + 227 .section .text.FLASH_OB_UserConfig,"ax",%progbits + 228 .align 1 + 229 .syntax unified + 230 .thumb + 231 .thumb_func + 233 FLASH_OB_UserConfig: + 234 .LVL11: + 235 .LFB140: + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 236 .loc 1 793 1 view -0 + 237 .cfi_startproc + 238 @ args = 0, pretend = 0, frame = 0 + 239 @ frame_needed = 0, uses_anonymous_args = 0 + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 240 .loc 1 793 1 is_stmt 0 view .LVU50 + 241 0000 38B5 push {r3, r4, r5, lr} + 242 .cfi_def_cfa_offset 16 + 243 .cfi_offset 3, -16 + 244 .cfi_offset 4, -12 + 245 .cfi_offset 5, -8 + 246 .cfi_offset 14, -4 + 247 0002 0446 mov r4, r0 + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 248 .loc 1 794 3 is_stmt 1 view .LVU51 + 249 .LVL12: + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 250 .loc 1 797 3 view .LVU52 + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 251 .loc 1 798 3 view .LVU53 + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 252 .loc 1 799 3 view .LVU54 + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + ARM GAS /tmp/ccoO7FMo.s page 22 + + + 253 .loc 1 800 3 view .LVU55 + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 254 .loc 1 801 3 view .LVU56 + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR) + 255 .loc 1 802 3 view .LVU57 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 256 .loc 1 808 3 view .LVU58 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 257 .loc 1 808 12 is_stmt 0 view .LVU59 + 258 0004 4CF25030 movw r0, #50000 + 259 .LVL13: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 260 .loc 1 808 12 view .LVU60 + 261 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 262 .LVL14: + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 263 .loc 1 810 3 is_stmt 1 view .LVU61 + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 264 .loc 1 810 5 is_stmt 0 view .LVU62 + 265 000c 00B1 cbz r0, .L22 + 266 .LVL15: + 267 .L20: + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 268 .loc 1 831 3 is_stmt 1 view .LVU63 + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 269 .loc 1 832 1 is_stmt 0 view .LVU64 + 270 000e 38BD pop {r3, r4, r5, pc} + 271 .LVL16: + 272 .L22: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 273 .loc 1 813 5 is_stmt 1 view .LVU65 + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 274 .loc 1 813 22 is_stmt 0 view .LVU66 + 275 0010 0A4B ldr r3, .L23 + 276 0012 0022 movs r2, #0 + 277 0014 DA61 str r2, [r3, #28] + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 278 .loc 1 816 5 is_stmt 1 view .LVU67 + 279 0016 0A4D ldr r5, .L23+4 + 280 0018 2B69 ldr r3, [r5, #16] + 281 001a 43F01003 orr r3, r3, #16 + 282 001e 2B61 str r3, [r5, #16] + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif + 283 .loc 1 821 5 view .LVU68 + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif + 284 .loc 1 821 14 is_stmt 0 view .LVU69 + 285 0020 44F08800 orr r0, r4, #136 + 286 0024 074B ldr r3, .L23+8 + 287 0026 5880 strh r0, [r3, #2] @ movhi + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 288 .loc 1 825 5 is_stmt 1 view .LVU70 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 289 .loc 1 825 14 is_stmt 0 view .LVU71 + 290 0028 4CF25030 movw r0, #50000 + 291 002c FFF7FEFF bl FLASH_WaitForLastOperation + 292 .LVL17: + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + ARM GAS /tmp/ccoO7FMo.s page 23 + + + 293 .loc 1 828 5 is_stmt 1 view .LVU72 + 294 0030 2B69 ldr r3, [r5, #16] + 295 0032 23F01003 bic r3, r3, #16 + 296 0036 2B61 str r3, [r5, #16] + 297 0038 E9E7 b .L20 + 298 .L24: + 299 003a 00BF .align 2 + 300 .L23: + 301 003c 00000000 .word pFlash + 302 0040 00200240 .word 1073881088 + 303 0044 00F8FF1F .word 536868864 + 304 .cfi_endproc + 305 .LFE140: + 307 .section .text.FLASH_OB_ProgramData,"ax",%progbits + 308 .align 1 + 309 .syntax unified + 310 .thumb + 311 .thumb_func + 313 FLASH_OB_ProgramData: + 314 .LVL18: + 315 .LFB141: + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 316 .loc 1 847 1 view -0 + 317 .cfi_startproc + 318 @ args = 0, pretend = 0, frame = 0 + 319 @ frame_needed = 0, uses_anonymous_args = 0 + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 320 .loc 1 847 1 is_stmt 0 view .LVU74 + 321 0000 70B5 push {r4, r5, r6, lr} + 322 .cfi_def_cfa_offset 16 + 323 .cfi_offset 4, -16 + 324 .cfi_offset 5, -12 + 325 .cfi_offset 6, -8 + 326 .cfi_offset 14, -4 + 327 0002 0546 mov r5, r0 + 328 0004 0C46 mov r4, r1 + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 329 .loc 1 848 3 is_stmt 1 view .LVU75 + 330 .LVL19: + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 331 .loc 1 851 3 view .LVU76 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 332 .loc 1 854 3 view .LVU77 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 333 .loc 1 854 12 is_stmt 0 view .LVU78 + 334 0006 4CF25030 movw r0, #50000 + 335 .LVL20: + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 336 .loc 1 854 12 view .LVU79 + 337 000a FFF7FEFF bl FLASH_WaitForLastOperation + 338 .LVL21: + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 339 .loc 1 856 3 is_stmt 1 view .LVU80 + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 340 .loc 1 856 5 is_stmt 0 view .LVU81 + 341 000e 00B1 cbz r0, .L28 + 342 .L26: + ARM GAS /tmp/ccoO7FMo.s page 24 + + + 343 .LVL22: + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 344 .loc 1 872 3 is_stmt 1 view .LVU82 + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 345 .loc 1 873 1 is_stmt 0 view .LVU83 + 346 0010 70BD pop {r4, r5, r6, pc} + 347 .LVL23: + 348 .L28: + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 349 .loc 1 859 5 is_stmt 1 view .LVU84 + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 350 .loc 1 859 22 is_stmt 0 view .LVU85 + 351 0012 094B ldr r3, .L29 + 352 0014 0022 movs r2, #0 + 353 0016 DA61 str r2, [r3, #28] + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 354 .loc 1 862 5 is_stmt 1 view .LVU86 + 355 0018 084E ldr r6, .L29+4 + 356 001a 3369 ldr r3, [r6, #16] + 357 001c 43F01003 orr r3, r3, #16 + 358 0020 3361 str r3, [r6, #16] + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 359 .loc 1 863 5 view .LVU87 + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 360 .loc 1 863 30 is_stmt 0 view .LVU88 + 361 0022 2C80 strh r4, [r5] @ movhi + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 362 .loc 1 866 5 is_stmt 1 view .LVU89 + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 363 .loc 1 866 14 is_stmt 0 view .LVU90 + 364 0024 4CF25030 movw r0, #50000 + 365 0028 FFF7FEFF bl FLASH_WaitForLastOperation + 366 .LVL24: + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 367 .loc 1 869 5 is_stmt 1 view .LVU91 + 368 002c 3369 ldr r3, [r6, #16] + 369 002e 23F01003 bic r3, r3, #16 + 370 0032 3361 str r3, [r6, #16] + 371 0034 ECE7 b .L26 + 372 .L30: + 373 0036 00BF .align 2 + 374 .L29: + 375 0038 00000000 .word pFlash + 376 003c 00200240 .word 1073881088 + 377 .cfi_endproc + 378 .LFE141: + 380 .section .text.FLASH_OB_GetUser,"ax",%progbits + 381 .align 1 + 382 .syntax unified + 383 .thumb + 384 .thumb_func + 386 FLASH_OB_GetUser: + 387 .LFB144: + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nB + ARM GAS /tmp/ccoO7FMo.s page 25 + + + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * And SDADC12_VDD_MONITOR(Bit7) for STM32F373 or STM32F378 . + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void) + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 388 .loc 1 929 1 view -0 + 389 .cfi_startproc + 390 @ args = 0, pretend = 0, frame = 0 + 391 @ frame_needed = 0, uses_anonymous_args = 0 + 392 @ link register save eliminated. + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the User Option Byte */ + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT); + 393 .loc 1 931 3 view .LVU93 + 394 .loc 1 931 21 is_stmt 0 view .LVU94 + 395 0000 064B ldr r3, .L32 + 396 0002 D869 ldr r0, [r3, #28] + 397 .loc 1 931 42 view .LVU95 + 398 0004 00F4EE40 and r0, r0, #30464 + 399 .LVL25: + 400 .LBB8: + 401 .LBI8: + 402 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + ARM GAS /tmp/ccoO7FMo.s page 26 + + + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + ARM GAS /tmp/ccoO7FMo.s page 27 + + + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + ARM GAS /tmp/ccoO7FMo.s page 28 + + + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccoO7FMo.s page 29 + + + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccoO7FMo.s page 30 + + + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + ARM GAS /tmp/ccoO7FMo.s page 31 + + + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccoO7FMo.s page 32 + + + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccoO7FMo.s page 33 + + + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + ARM GAS /tmp/ccoO7FMo.s page 34 + + + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccoO7FMo.s page 35 + + + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/ccoO7FMo.s page 36 + + + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + ARM GAS /tmp/ccoO7FMo.s page 37 + + + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + ARM GAS /tmp/ccoO7FMo.s page 38 + + + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/ccoO7FMo.s page 39 + + + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + ARM GAS /tmp/ccoO7FMo.s page 40 + + + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + ARM GAS /tmp/ccoO7FMo.s page 41 + + + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccoO7FMo.s page 42 + + + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 403 .loc 2 981 31 is_stmt 1 view .LVU96 + 404 .LBB9: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 405 .loc 2 983 3 view .LVU97 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 406 .loc 2 988 4 view .LVU98 + 407 0008 4FF48073 mov r3, #256 + 408 .syntax unified + 409 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 410 000c 93FAA3F3 rbit r3, r3 + 411 @ 0 "" 2 + 412 .LVL26: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccoO7FMo.s page 43 + + + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 413 .loc 2 1001 3 view .LVU99 + 414 .loc 2 1001 3 is_stmt 0 view .LVU100 + 415 .thumb + 416 .syntax unified + 417 .LBE9: + 418 .LBE8: + 419 .loc 1 931 63 discriminator 2 view .LVU101 + 420 0010 B3FA83F3 clz r3, r3 + 421 .loc 1 931 60 discriminator 2 view .LVU102 + 422 0014 D840 lsrs r0, r0, r3 + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 423 .loc 1 932 1 view .LVU103 + 424 0016 C0B2 uxtb r0, r0 + 425 0018 7047 bx lr + 426 .L33: + 427 001a 00BF .align 2 + 428 .L32: + 429 001c 00200240 .word 1073881088 + 430 .cfi_endproc + 431 .LFE144: + 433 .section .text.HAL_FLASHEx_OBErase,"ax",%progbits + 434 .align 1 + 435 .global HAL_FLASHEx_OBErase + 436 .syntax unified + 437 .thumb + 438 .thumb_func + 440 HAL_FLASHEx_OBErase: + 441 .LFB132: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 442 .loc 1 312 1 is_stmt 1 view -0 + 443 .cfi_startproc + 444 @ args = 0, pretend = 0, frame = 0 + 445 @ frame_needed = 0, uses_anonymous_args = 0 + 446 0000 38B5 push {r3, r4, r5, lr} + 447 .cfi_def_cfa_offset 16 + 448 .cfi_offset 3, -16 + 449 .cfi_offset 4, -12 + 450 .cfi_offset 5, -8 + 451 .cfi_offset 14, -4 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 452 .loc 1 313 3 view .LVU105 + 453 .LVL27: + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 454 .loc 1 314 3 view .LVU106 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 455 .loc 1 317 3 view .LVU107 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 456 .loc 1 317 12 is_stmt 0 view .LVU108 + 457 0002 FFF7FEFF bl FLASH_OB_GetRDP + 458 .LVL28: + ARM GAS /tmp/ccoO7FMo.s page 44 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 459 .loc 1 317 10 discriminator 1 view .LVU109 + 460 0006 C5B2 uxtb r5, r0 + 461 .LVL29: + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 462 .loc 1 320 3 is_stmt 1 view .LVU110 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 463 .loc 1 320 12 is_stmt 0 view .LVU111 + 464 0008 4CF25030 movw r0, #50000 + 465 000c FFF7FEFF bl FLASH_WaitForLastOperation + 466 .LVL30: + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 467 .loc 1 322 3 is_stmt 1 view .LVU112 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 468 .loc 1 322 5 is_stmt 0 view .LVU113 + 469 0010 00B1 cbz r0, .L37 + 470 .LVL31: + 471 .L35: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 472 .loc 1 345 3 is_stmt 1 view .LVU114 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 473 .loc 1 346 1 is_stmt 0 view .LVU115 + 474 0012 38BD pop {r3, r4, r5, pc} + 475 .LVL32: + 476 .L37: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 477 .loc 1 325 5 is_stmt 1 view .LVU116 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 478 .loc 1 325 22 is_stmt 0 view .LVU117 + 479 0014 0C4B ldr r3, .L38 + 480 0016 0022 movs r2, #0 + 481 0018 DA61 str r2, [r3, #28] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 482 .loc 1 328 5 is_stmt 1 view .LVU118 + 483 001a 0C4C ldr r4, .L38+4 + 484 001c 2369 ldr r3, [r4, #16] + 485 001e 43F02003 orr r3, r3, #32 + 486 0022 2361 str r3, [r4, #16] + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 487 .loc 1 329 5 view .LVU119 + 488 0024 2369 ldr r3, [r4, #16] + 489 0026 43F04003 orr r3, r3, #64 + 490 002a 2361 str r3, [r4, #16] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 491 .loc 1 332 5 view .LVU120 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 492 .loc 1 332 14 is_stmt 0 view .LVU121 + 493 002c 4CF25030 movw r0, #50000 + 494 0030 FFF7FEFF bl FLASH_WaitForLastOperation + 495 .LVL33: + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 496 .loc 1 335 5 is_stmt 1 view .LVU122 + 497 0034 2369 ldr r3, [r4, #16] + 498 0036 23F02003 bic r3, r3, #32 + 499 003a 2361 str r3, [r4, #16] + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 500 .loc 1 337 5 view .LVU123 + ARM GAS /tmp/ccoO7FMo.s page 45 + + + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 501 .loc 1 337 7 is_stmt 0 view .LVU124 + 502 003c 0028 cmp r0, #0 + 503 003e E8D1 bne .L35 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 504 .loc 1 340 7 is_stmt 1 view .LVU125 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 505 .loc 1 340 16 is_stmt 0 view .LVU126 + 506 0040 2846 mov r0, r5 + 507 .LVL34: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 508 .loc 1 340 16 view .LVU127 + 509 0042 FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 510 .LVL35: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 511 .loc 1 340 16 view .LVU128 + 512 0046 E4E7 b .L35 + 513 .L39: + 514 .align 2 + 515 .L38: + 516 0048 00000000 .word pFlash + 517 004c 00200240 .word 1073881088 + 518 .cfi_endproc + 519 .LFE132: + 521 .section .text.FLASH_OB_EnableWRP,"ax",%progbits + 522 .align 1 + 523 .syntax unified + 524 .thumb + 525 .thumb_func + 527 FLASH_OB_EnableWRP: + 528 .LVL36: + 529 .LFB137: + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 530 .loc 1 520 1 is_stmt 1 view -0 + 531 .cfi_startproc + 532 @ args = 0, pretend = 0, frame = 0 + 533 @ frame_needed = 0, uses_anonymous_args = 0 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 534 .loc 1 520 1 is_stmt 0 view .LVU130 + 535 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 536 .cfi_def_cfa_offset 24 + 537 .cfi_offset 3, -24 + 538 .cfi_offset 4, -20 + 539 .cfi_offset 5, -16 + 540 .cfi_offset 6, -12 + 541 .cfi_offset 7, -8 + 542 .cfi_offset 14, -4 + 543 0002 0446 mov r4, r0 + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 544 .loc 1 521 3 is_stmt 1 view .LVU131 + 545 .LVL37: + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 546 .loc 1 522 3 view .LVU132 + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 547 .loc 1 524 3 view .LVU133 + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 548 .loc 1 527 3 view .LVU134 + ARM GAS /tmp/ccoO7FMo.s page 46 + + + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 549 .loc 1 530 3 view .LVU135 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 550 .loc 1 534 3 view .LVU136 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 551 .loc 1 537 3 view .LVU137 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 552 .loc 1 537 37 is_stmt 0 view .LVU138 + 553 0004 FFF7FEFF bl FLASH_OB_GetWRP + 554 .LVL38: + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 555 .loc 1 537 20 discriminator 1 view .LVU139 + 556 0008 20EA0400 bic r0, r0, r4 + 557 .LVL39: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 558 .loc 1 540 3 is_stmt 1 view .LVU140 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 559 .loc 1 540 13 is_stmt 0 view .LVU141 + 560 000c C5B2 uxtb r5, r0 + 561 .LVL40: + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 562 .loc 1 544 3 is_stmt 1 view .LVU142 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 563 .loc 1 544 13 is_stmt 0 view .LVU143 + 564 000e C0F30727 ubfx r7, r0, #8, #8 + 565 .LVL41: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 566 .loc 1 548 3 is_stmt 1 view .LVU144 + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 567 .loc 1 548 13 is_stmt 0 view .LVU145 + 568 0012 C0F30746 ubfx r6, r0, #16, #8 + 569 .LVL42: + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 570 .loc 1 552 3 is_stmt 1 view .LVU146 + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 571 .loc 1 552 13 is_stmt 0 view .LVU147 + 572 0016 040E lsrs r4, r0, #24 + 573 .LVL43: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 574 .loc 1 558 3 is_stmt 1 view .LVU148 + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 575 .loc 1 558 12 is_stmt 0 view .LVU149 + 576 0018 4CF25030 movw r0, #50000 + 577 .LVL44: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 578 .loc 1 558 12 view .LVU150 + 579 001c FFF7FEFF bl FLASH_WaitForLastOperation + 580 .LVL45: + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 581 .loc 1 560 3 is_stmt 1 view .LVU151 + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 582 .loc 1 560 5 is_stmt 0 view .LVU152 + 583 0020 0346 mov r3, r0 + 584 0022 08B1 cbz r0, .L47 + 585 .LVL46: + 586 .L41: + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + ARM GAS /tmp/ccoO7FMo.s page 47 + + + 587 .loc 1 617 3 is_stmt 1 view .LVU153 + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 588 .loc 1 618 1 is_stmt 0 view .LVU154 + 589 0024 1846 mov r0, r3 + 590 0026 F8BD pop {r3, r4, r5, r6, r7, pc} + 591 .LVL47: + 592 .L47: + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 593 .loc 1 563 5 is_stmt 1 view .LVU155 + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 594 .loc 1 563 22 is_stmt 0 view .LVU156 + 595 0028 234B ldr r3, .L52 + 596 002a 0022 movs r2, #0 + 597 002c DA61 str r2, [r3, #28] + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 598 .loc 1 566 5 is_stmt 1 view .LVU157 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 599 .loc 1 566 14 is_stmt 0 view .LVU158 + 600 002e FFF7FEFF bl HAL_FLASHEx_OBErase + 601 .LVL48: + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 602 .loc 1 567 5 is_stmt 1 view .LVU159 + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 603 .loc 1 567 8 is_stmt 0 view .LVU160 + 604 0032 0346 mov r3, r0 + 605 0034 0028 cmp r0, #0 + 606 0036 F5D1 bne .L41 + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 607 .loc 1 570 7 is_stmt 1 view .LVU161 + 608 0038 2049 ldr r1, .L52+4 + 609 003a 0A69 ldr r2, [r1, #16] + 610 003c 42F01002 orr r2, r2, #16 + 611 0040 0A61 str r2, [r1, #16] + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 612 .loc 1 573 7 view .LVU162 + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 613 .loc 1 573 9 is_stmt 0 view .LVU163 + 614 0042 FF2D cmp r5, #255 + 615 0044 0ED1 bne .L48 + 616 .LVL49: + 617 .L42: + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 618 .loc 1 583 7 is_stmt 1 view .LVU164 + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 619 .loc 1 583 9 is_stmt 0 view .LVU165 + 620 0046 23B9 cbnz r3, .L43 + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 621 .loc 1 583 29 discriminator 1 view .LVU166 + 622 0048 FF2F cmp r7, #255 + 623 004a 15D1 bne .L49 + 624 .LVL50: + 625 .L44: + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 626 .loc 1 593 7 is_stmt 1 view .LVU167 + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 627 .loc 1 593 9 is_stmt 0 view .LVU168 + 628 004c 23B9 cbnz r3, .L45 + ARM GAS /tmp/ccoO7FMo.s page 48 + + + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 629 .loc 1 593 29 discriminator 1 view .LVU169 + 630 004e FF2E cmp r6, #255 + 631 0050 1CD1 bne .L50 + 632 .LVL51: + 633 .L43: + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 634 .loc 1 603 7 is_stmt 1 view .LVU170 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 635 .loc 1 603 9 is_stmt 0 view .LVU171 + 636 0052 0BB9 cbnz r3, .L45 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 637 .loc 1 603 29 discriminator 1 view .LVU172 + 638 0054 FF2C cmp r4, #255 + 639 0056 23D1 bne .L51 + 640 .L45: + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 641 .loc 1 613 7 is_stmt 1 view .LVU173 + 642 0058 1849 ldr r1, .L52+4 + 643 005a 0A69 ldr r2, [r1, #16] + 644 005c 22F01002 bic r2, r2, #16 + 645 0060 0A61 str r2, [r1, #16] + 646 0062 DFE7 b .L41 + 647 .LVL52: + 648 .L48: + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 649 .loc 1 575 9 view .LVU174 + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 650 .loc 1 575 11 is_stmt 0 view .LVU175 + 651 0064 164B ldr r3, .L52+8 + 652 0066 1A89 ldrh r2, [r3, #8] + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 653 .loc 1 575 18 view .LVU176 + 654 0068 1540 ands r5, r5, r2 + 655 .LVL53: + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 656 .loc 1 575 18 view .LVU177 + 657 006a 1D81 strh r5, [r3, #8] @ movhi + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 658 .loc 1 578 9 is_stmt 1 view .LVU178 + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 659 .loc 1 578 18 is_stmt 0 view .LVU179 + 660 006c 4CF25030 movw r0, #50000 + 661 .LVL54: + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 662 .loc 1 578 18 view .LVU180 + 663 0070 FFF7FEFF bl FLASH_WaitForLastOperation + 664 .LVL55: + 665 0074 0346 mov r3, r0 + 666 .LVL56: + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 667 .loc 1 578 18 view .LVU181 + 668 0076 E6E7 b .L42 + 669 .L49: + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 670 .loc 1 585 9 is_stmt 1 view .LVU182 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/ccoO7FMo.s page 49 + + + 671 .loc 1 585 11 is_stmt 0 view .LVU183 + 672 0078 114B ldr r3, .L52+8 + 673 .LVL57: + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 674 .loc 1 585 11 view .LVU184 + 675 007a 5A89 ldrh r2, [r3, #10] + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 676 .loc 1 585 18 view .LVU185 + 677 007c 1740 ands r7, r7, r2 + 678 .LVL58: + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 679 .loc 1 585 18 view .LVU186 + 680 007e 5F81 strh r7, [r3, #10] @ movhi + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 681 .loc 1 588 9 is_stmt 1 view .LVU187 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 682 .loc 1 588 18 is_stmt 0 view .LVU188 + 683 0080 4CF25030 movw r0, #50000 + 684 0084 FFF7FEFF bl FLASH_WaitForLastOperation + 685 .LVL59: + 686 0088 0346 mov r3, r0 + 687 .LVL60: + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 688 .loc 1 588 18 view .LVU189 + 689 008a DFE7 b .L44 + 690 .L50: + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 691 .loc 1 595 9 is_stmt 1 view .LVU190 + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 692 .loc 1 595 11 is_stmt 0 view .LVU191 + 693 008c 0C4B ldr r3, .L52+8 + 694 .LVL61: + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 695 .loc 1 595 11 view .LVU192 + 696 008e 9A89 ldrh r2, [r3, #12] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 697 .loc 1 595 18 view .LVU193 + 698 0090 1640 ands r6, r6, r2 + 699 .LVL62: + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 700 .loc 1 595 18 view .LVU194 + 701 0092 9E81 strh r6, [r3, #12] @ movhi + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 702 .loc 1 598 9 is_stmt 1 view .LVU195 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 703 .loc 1 598 18 is_stmt 0 view .LVU196 + 704 0094 4CF25030 movw r0, #50000 + 705 0098 FFF7FEFF bl FLASH_WaitForLastOperation + 706 .LVL63: + 707 009c 0346 mov r3, r0 + 708 .LVL64: + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 709 .loc 1 598 18 view .LVU197 + 710 009e D8E7 b .L43 + 711 .L51: + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 712 .loc 1 605 9 is_stmt 1 view .LVU198 + ARM GAS /tmp/ccoO7FMo.s page 50 + + + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 713 .loc 1 605 11 is_stmt 0 view .LVU199 + 714 00a0 074B ldr r3, .L52+8 + 715 .LVL65: + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 716 .loc 1 605 11 view .LVU200 + 717 00a2 DA89 ldrh r2, [r3, #14] + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 718 .loc 1 605 18 view .LVU201 + 719 00a4 04EA0200 and r0, r4, r2 + 720 00a8 D881 strh r0, [r3, #14] @ movhi + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 721 .loc 1 608 9 is_stmt 1 view .LVU202 + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 722 .loc 1 608 18 is_stmt 0 view .LVU203 + 723 00aa 4CF25030 movw r0, #50000 + 724 00ae FFF7FEFF bl FLASH_WaitForLastOperation + 725 .LVL66: + 726 00b2 0346 mov r3, r0 + 727 .LVL67: + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 728 .loc 1 608 18 view .LVU204 + 729 00b4 D0E7 b .L45 + 730 .L53: + 731 00b6 00BF .align 2 + 732 .L52: + 733 00b8 00000000 .word pFlash + 734 00bc 00200240 .word 1073881088 + 735 00c0 00F8FF1F .word 536868864 + 736 .cfi_endproc + 737 .LFE137: + 739 .section .text.FLASH_OB_DisableWRP,"ax",%progbits + 740 .align 1 + 741 .syntax unified + 742 .thumb + 743 .thumb_func + 745 FLASH_OB_DisableWRP: + 746 .LVL68: + 747 .LFB138: + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 748 .loc 1 632 1 is_stmt 1 view -0 + 749 .cfi_startproc + 750 @ args = 0, pretend = 0, frame = 0 + 751 @ frame_needed = 0, uses_anonymous_args = 0 + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 752 .loc 1 632 1 is_stmt 0 view .LVU206 + 753 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 754 .cfi_def_cfa_offset 24 + 755 .cfi_offset 3, -24 + 756 .cfi_offset 4, -20 + 757 .cfi_offset 5, -16 + 758 .cfi_offset 6, -12 + 759 .cfi_offset 7, -8 + 760 .cfi_offset 14, -4 + 761 0002 0446 mov r4, r0 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 762 .loc 1 633 3 is_stmt 1 view .LVU207 + ARM GAS /tmp/ccoO7FMo.s page 51 + + + 763 .LVL69: + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 764 .loc 1 634 3 view .LVU208 + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 765 .loc 1 636 3 view .LVU209 + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 766 .loc 1 639 3 view .LVU210 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 767 .loc 1 642 3 view .LVU211 + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 768 .loc 1 646 3 view .LVU212 + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 769 .loc 1 649 3 view .LVU213 + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 770 .loc 1 649 23 is_stmt 0 view .LVU214 + 771 0004 FFF7FEFF bl FLASH_OB_GetWRP + 772 .LVL70: + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 773 .loc 1 649 20 discriminator 1 view .LVU215 + 774 0008 2043 orrs r0, r0, r4 + 775 .LVL71: + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 776 .loc 1 652 3 is_stmt 1 view .LVU216 + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 777 .loc 1 652 13 is_stmt 0 view .LVU217 + 778 000a C5B2 uxtb r5, r0 + 779 .LVL72: + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 780 .loc 1 656 3 is_stmt 1 view .LVU218 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 781 .loc 1 656 13 is_stmt 0 view .LVU219 + 782 000c C0F30727 ubfx r7, r0, #8, #8 + 783 .LVL73: + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 784 .loc 1 660 3 is_stmt 1 view .LVU220 + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 785 .loc 1 660 13 is_stmt 0 view .LVU221 + 786 0010 C0F30746 ubfx r6, r0, #16, #8 + 787 .LVL74: + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 788 .loc 1 664 3 is_stmt 1 view .LVU222 + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 789 .loc 1 664 13 is_stmt 0 view .LVU223 + 790 0014 040E lsrs r4, r0, #24 + 791 .LVL75: + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 792 .loc 1 671 3 is_stmt 1 view .LVU224 + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 793 .loc 1 671 12 is_stmt 0 view .LVU225 + 794 0016 4CF25030 movw r0, #50000 + 795 .LVL76: + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 796 .loc 1 671 12 view .LVU226 + 797 001a FFF7FEFF bl FLASH_WaitForLastOperation + 798 .LVL77: + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 799 .loc 1 673 3 is_stmt 1 view .LVU227 + ARM GAS /tmp/ccoO7FMo.s page 52 + + + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 800 .loc 1 673 5 is_stmt 0 view .LVU228 + 801 001e 0346 mov r3, r0 + 802 0020 08B1 cbz r0, .L61 + 803 .LVL78: + 804 .L55: + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 805 .loc 1 728 3 is_stmt 1 view .LVU229 + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 806 .loc 1 729 1 is_stmt 0 view .LVU230 + 807 0022 1846 mov r0, r3 + 808 0024 F8BD pop {r3, r4, r5, r6, r7, pc} + 809 .LVL79: + 810 .L61: + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 811 .loc 1 676 5 is_stmt 1 view .LVU231 + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 812 .loc 1 676 22 is_stmt 0 view .LVU232 + 813 0026 254B ldr r3, .L66 + 814 0028 0022 movs r2, #0 + 815 002a DA61 str r2, [r3, #28] + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 816 .loc 1 679 5 is_stmt 1 view .LVU233 + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 817 .loc 1 679 14 is_stmt 0 view .LVU234 + 818 002c FFF7FEFF bl HAL_FLASHEx_OBErase + 819 .LVL80: + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 820 .loc 1 680 5 is_stmt 1 view .LVU235 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 821 .loc 1 680 8 is_stmt 0 view .LVU236 + 822 0030 0346 mov r3, r0 + 823 0032 0028 cmp r0, #0 + 824 0034 F5D1 bne .L55 + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 825 .loc 1 682 7 is_stmt 1 view .LVU237 + 826 0036 2249 ldr r1, .L66+4 + 827 0038 0A69 ldr r2, [r1, #16] + 828 003a 42F01002 orr r2, r2, #16 + 829 003e 0A61 str r2, [r1, #16] + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 830 .loc 1 685 7 view .LVU238 + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 831 .loc 1 685 9 is_stmt 0 view .LVU239 + 832 0040 FF2D cmp r5, #255 + 833 0042 0ED1 bne .L62 + 834 .LVL81: + 835 .L56: + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 836 .loc 1 695 7 is_stmt 1 view .LVU240 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 837 .loc 1 695 9 is_stmt 0 view .LVU241 + 838 0044 23B9 cbnz r3, .L57 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 839 .loc 1 695 29 discriminator 1 view .LVU242 + 840 0046 FF2F cmp r7, #255 + 841 0048 16D1 bne .L63 + ARM GAS /tmp/ccoO7FMo.s page 53 + + + 842 .L58: + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 843 .loc 1 705 7 is_stmt 1 view .LVU243 + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 844 .loc 1 705 9 is_stmt 0 view .LVU244 + 845 004a 23B9 cbnz r3, .L59 + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 846 .loc 1 705 29 discriminator 1 view .LVU245 + 847 004c FF2E cmp r6, #255 + 848 004e 1ED1 bne .L64 + 849 .L57: + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 850 .loc 1 715 7 is_stmt 1 view .LVU246 + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 851 .loc 1 715 9 is_stmt 0 view .LVU247 + 852 0050 0BB9 cbnz r3, .L59 + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 853 .loc 1 715 29 discriminator 1 view .LVU248 + 854 0052 FF2C cmp r4, #255 + 855 0054 26D1 bne .L65 + 856 .L59: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 857 .loc 1 725 7 is_stmt 1 view .LVU249 + 858 0056 1A49 ldr r1, .L66+4 + 859 0058 0A69 ldr r2, [r1, #16] + 860 005a 22F01002 bic r2, r2, #16 + 861 005e 0A61 str r2, [r1, #16] + 862 0060 DFE7 b .L55 + 863 .LVL82: + 864 .L62: + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 865 .loc 1 687 9 view .LVU250 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 866 .loc 1 687 11 is_stmt 0 view .LVU251 + 867 0062 184A ldr r2, .L66+8 + 868 0064 1389 ldrh r3, [r2, #8] + 869 0066 9BB2 uxth r3, r3 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 870 .loc 1 687 18 view .LVU252 + 871 0068 2B43 orrs r3, r3, r5 + 872 006a 1381 strh r3, [r2, #8] @ movhi + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 873 .loc 1 690 9 is_stmt 1 view .LVU253 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 874 .loc 1 690 18 is_stmt 0 view .LVU254 + 875 006c 4CF25030 movw r0, #50000 + 876 .LVL83: + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 877 .loc 1 690 18 view .LVU255 + 878 0070 FFF7FEFF bl FLASH_WaitForLastOperation + 879 .LVL84: + 880 0074 0346 mov r3, r0 + 881 .LVL85: + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 882 .loc 1 690 18 view .LVU256 + 883 0076 E5E7 b .L56 + 884 .L63: + ARM GAS /tmp/ccoO7FMo.s page 54 + + + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 885 .loc 1 697 9 is_stmt 1 view .LVU257 + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 886 .loc 1 697 11 is_stmt 0 view .LVU258 + 887 0078 124A ldr r2, .L66+8 + 888 007a 5389 ldrh r3, [r2, #10] + 889 .LVL86: + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 890 .loc 1 697 11 view .LVU259 + 891 007c 9BB2 uxth r3, r3 + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 892 .loc 1 697 18 view .LVU260 + 893 007e 3B43 orrs r3, r3, r7 + 894 0080 5381 strh r3, [r2, #10] @ movhi + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 895 .loc 1 700 9 is_stmt 1 view .LVU261 + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 896 .loc 1 700 18 is_stmt 0 view .LVU262 + 897 0082 4CF25030 movw r0, #50000 + 898 0086 FFF7FEFF bl FLASH_WaitForLastOperation + 899 .LVL87: + 900 008a 0346 mov r3, r0 + 901 .LVL88: + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 902 .loc 1 700 18 view .LVU263 + 903 008c DDE7 b .L58 + 904 .L64: + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 905 .loc 1 707 9 is_stmt 1 view .LVU264 + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 906 .loc 1 707 11 is_stmt 0 view .LVU265 + 907 008e 0D4A ldr r2, .L66+8 + 908 0090 9389 ldrh r3, [r2, #12] + 909 .LVL89: + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 910 .loc 1 707 11 view .LVU266 + 911 0092 9BB2 uxth r3, r3 + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 912 .loc 1 707 18 view .LVU267 + 913 0094 3343 orrs r3, r3, r6 + 914 0096 9381 strh r3, [r2, #12] @ movhi + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 915 .loc 1 710 9 is_stmt 1 view .LVU268 + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 916 .loc 1 710 18 is_stmt 0 view .LVU269 + 917 0098 4CF25030 movw r0, #50000 + 918 009c FFF7FEFF bl FLASH_WaitForLastOperation + 919 .LVL90: + 920 00a0 0346 mov r3, r0 + 921 .LVL91: + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 922 .loc 1 710 18 view .LVU270 + 923 00a2 D5E7 b .L57 + 924 .L65: + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 925 .loc 1 717 9 is_stmt 1 view .LVU271 + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/ccoO7FMo.s page 55 + + + 926 .loc 1 717 11 is_stmt 0 view .LVU272 + 927 00a4 074A ldr r2, .L66+8 + 928 00a6 D389 ldrh r3, [r2, #14] + 929 .LVL92: + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 930 .loc 1 717 11 view .LVU273 + 931 00a8 9BB2 uxth r3, r3 + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 932 .loc 1 717 18 view .LVU274 + 933 00aa 2343 orrs r3, r3, r4 + 934 00ac D381 strh r3, [r2, #14] @ movhi + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 935 .loc 1 720 9 is_stmt 1 view .LVU275 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 936 .loc 1 720 18 is_stmt 0 view .LVU276 + 937 00ae 4CF25030 movw r0, #50000 + 938 00b2 FFF7FEFF bl FLASH_WaitForLastOperation + 939 .LVL93: + 940 00b6 0346 mov r3, r0 + 941 .LVL94: + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 942 .loc 1 720 18 view .LVU277 + 943 00b8 CDE7 b .L59 + 944 .L67: + 945 00ba 00BF .align 2 + 946 .L66: + 947 00bc 00000000 .word pFlash + 948 00c0 00200240 .word 1073881088 + 949 00c4 00F8FF1F .word 536868864 + 950 .cfi_endproc + 951 .LFE138: + 953 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits + 954 .align 1 + 955 .global HAL_FLASHEx_OBProgram + 956 .syntax unified + 957 .thumb + 958 .thumb_func + 960 HAL_FLASHEx_OBProgram: + 961 .LVL95: + 962 .LFB133: + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 963 .loc 1 361 1 is_stmt 1 view -0 + 964 .cfi_startproc + 965 @ args = 0, pretend = 0, frame = 0 + 966 @ frame_needed = 0, uses_anonymous_args = 0 + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 967 .loc 1 362 3 view .LVU279 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 968 .loc 1 365 3 view .LVU280 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 969 .loc 1 365 3 view .LVU281 + 970 0000 254B ldr r3, .L86 + 971 0002 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 972 0004 012B cmp r3, #1 + 973 0006 44D0 beq .L76 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 974 .loc 1 361 1 is_stmt 0 view .LVU282 + ARM GAS /tmp/ccoO7FMo.s page 56 + + + 975 0008 10B5 push {r4, lr} + 976 .cfi_def_cfa_offset 8 + 977 .cfi_offset 4, -8 + 978 .cfi_offset 14, -4 + 979 000a 0446 mov r4, r0 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 980 .loc 1 365 3 is_stmt 1 discriminator 2 view .LVU283 + 981 000c 224B ldr r3, .L86 + 982 000e 0122 movs r2, #1 + 983 0010 1A76 strb r2, [r3, #24] + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 984 .loc 1 365 3 discriminator 2 view .LVU284 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 985 .loc 1 368 3 view .LVU285 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 986 .loc 1 371 3 view .LVU286 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 987 .loc 1 371 14 is_stmt 0 view .LVU287 + 988 0012 0368 ldr r3, [r0] + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 989 .loc 1 371 5 view .LVU288 + 990 0014 13F0010F tst r3, #1 + 991 0018 0ED0 beq .L77 + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 992 .loc 1 373 5 is_stmt 1 view .LVU289 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 993 .loc 1 374 5 view .LVU290 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 994 .loc 1 374 16 is_stmt 0 view .LVU291 + 995 001a 4368 ldr r3, [r0, #4] + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 996 .loc 1 374 8 view .LVU292 + 997 001c 9342 cmp r3, r2 + 998 001e 07D0 beq .L82 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 999 .loc 1 382 7 is_stmt 1 view .LVU293 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1000 .loc 1 382 16 is_stmt 0 view .LVU294 + 1001 0020 8068 ldr r0, [r0, #8] + 1002 .LVL96: + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1003 .loc 1 382 16 view .LVU295 + 1004 0022 FFF7FEFF bl FLASH_OB_DisableWRP + 1005 .LVL97: + 1006 .L72: + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1007 .loc 1 384 5 is_stmt 1 view .LVU296 + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1008 .loc 1 384 8 is_stmt 0 view .LVU297 + 1009 0026 40B1 cbz r0, .L70 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1010 .loc 1 387 7 is_stmt 1 view .LVU298 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1011 .loc 1 387 7 view .LVU299 + 1012 0028 1B4B ldr r3, .L86 + 1013 002a 0022 movs r2, #0 + 1014 002c 1A76 strb r2, [r3, #24] + ARM GAS /tmp/ccoO7FMo.s page 57 + + + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1015 .loc 1 387 7 view .LVU300 + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1016 .loc 1 388 7 view .LVU301 + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1017 .loc 1 388 14 is_stmt 0 view .LVU302 + 1018 002e 13E0 b .L69 + 1019 .LVL98: + 1020 .L82: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1021 .loc 1 377 7 is_stmt 1 view .LVU303 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1022 .loc 1 377 16 is_stmt 0 view .LVU304 + 1023 0030 8068 ldr r0, [r0, #8] + 1024 .LVL99: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1025 .loc 1 377 16 view .LVU305 + 1026 0032 FFF7FEFF bl FLASH_OB_EnableWRP + 1027 .LVL100: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1028 .loc 1 377 16 view .LVU306 + 1029 0036 F6E7 b .L72 + 1030 .LVL101: + 1031 .L77: + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1032 .loc 1 362 21 view .LVU307 + 1033 0038 0120 movs r0, #1 + 1034 .LVL102: + 1035 .L70: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1036 .loc 1 393 3 is_stmt 1 view .LVU308 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1037 .loc 1 393 14 is_stmt 0 view .LVU309 + 1038 003a 2368 ldr r3, [r4] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1039 .loc 1 393 5 view .LVU310 + 1040 003c 13F0020F tst r3, #2 + 1041 0040 0BD1 bne .L83 + 1042 .L73: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1043 .loc 1 405 3 is_stmt 1 view .LVU311 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1044 .loc 1 405 14 is_stmt 0 view .LVU312 + 1045 0042 2368 ldr r3, [r4] + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1046 .loc 1 405 5 view .LVU313 + 1047 0044 13F0040F tst r3, #4 + 1048 0048 10D1 bne .L84 + 1049 .L74: + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1050 .loc 1 417 3 is_stmt 1 view .LVU314 + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1051 .loc 1 417 14 is_stmt 0 view .LVU315 + 1052 004a 2368 ldr r3, [r4] + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1053 .loc 1 417 5 view .LVU316 + 1054 004c 13F0080F tst r3, #8 + ARM GAS /tmp/ccoO7FMo.s page 58 + + + 1055 0050 15D1 bne .L85 + 1056 .L75: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1057 .loc 1 429 3 is_stmt 1 view .LVU317 + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1058 .loc 1 429 3 view .LVU318 + 1059 0052 114B ldr r3, .L86 + 1060 0054 0022 movs r2, #0 + 1061 0056 1A76 strb r2, [r3, #24] + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1062 .loc 1 429 3 view .LVU319 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1063 .loc 1 431 3 view .LVU320 + 1064 .L69: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1065 .loc 1 432 1 is_stmt 0 view .LVU321 + 1066 0058 10BD pop {r4, pc} + 1067 .LVL103: + 1068 .L83: + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1069 .loc 1 395 5 is_stmt 1 view .LVU322 + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1070 .loc 1 395 14 is_stmt 0 view .LVU323 + 1071 005a 207B ldrb r0, [r4, #12] @ zero_extendqisi2 + 1072 .LVL104: + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1073 .loc 1 395 14 view .LVU324 + 1074 005c FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 1075 .LVL105: + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1076 .loc 1 396 5 is_stmt 1 view .LVU325 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1077 .loc 1 396 8 is_stmt 0 view .LVU326 + 1078 0060 0028 cmp r0, #0 + 1079 0062 EED0 beq .L73 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1080 .loc 1 399 7 is_stmt 1 view .LVU327 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1081 .loc 1 399 7 view .LVU328 + 1082 0064 0C4B ldr r3, .L86 + 1083 0066 0022 movs r2, #0 + 1084 0068 1A76 strb r2, [r3, #24] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1085 .loc 1 399 7 view .LVU329 + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1086 .loc 1 400 7 view .LVU330 + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1087 .loc 1 400 14 is_stmt 0 view .LVU331 + 1088 006a F5E7 b .L69 + 1089 .L84: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1090 .loc 1 407 5 is_stmt 1 view .LVU332 + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1091 .loc 1 407 14 is_stmt 0 view .LVU333 + 1092 006c 607B ldrb r0, [r4, #13] @ zero_extendqisi2 + 1093 .LVL106: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + ARM GAS /tmp/ccoO7FMo.s page 59 + + + 1094 .loc 1 407 14 view .LVU334 + 1095 006e FFF7FEFF bl FLASH_OB_UserConfig + 1096 .LVL107: + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1097 .loc 1 408 5 is_stmt 1 view .LVU335 + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1098 .loc 1 408 8 is_stmt 0 view .LVU336 + 1099 0072 0028 cmp r0, #0 + 1100 0074 E9D0 beq .L74 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1101 .loc 1 411 7 is_stmt 1 view .LVU337 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1102 .loc 1 411 7 view .LVU338 + 1103 0076 084B ldr r3, .L86 + 1104 0078 0022 movs r2, #0 + 1105 007a 1A76 strb r2, [r3, #24] + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1106 .loc 1 411 7 view .LVU339 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1107 .loc 1 412 7 view .LVU340 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1108 .loc 1 412 14 is_stmt 0 view .LVU341 + 1109 007c ECE7 b .L69 + 1110 .L85: + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1111 .loc 1 419 5 is_stmt 1 view .LVU342 + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1112 .loc 1 419 14 is_stmt 0 view .LVU343 + 1113 007e 217D ldrb r1, [r4, #20] @ zero_extendqisi2 + 1114 0080 2069 ldr r0, [r4, #16] + 1115 .LVL108: + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 1116 .loc 1 419 14 view .LVU344 + 1117 0082 FFF7FEFF bl FLASH_OB_ProgramData + 1118 .LVL109: + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1119 .loc 1 420 5 is_stmt 1 view .LVU345 + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1120 .loc 1 420 8 is_stmt 0 view .LVU346 + 1121 0086 0028 cmp r0, #0 + 1122 0088 E3D0 beq .L75 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1123 .loc 1 423 7 is_stmt 1 view .LVU347 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1124 .loc 1 423 7 view .LVU348 + 1125 008a 034B ldr r3, .L86 + 1126 008c 0022 movs r2, #0 + 1127 008e 1A76 strb r2, [r3, #24] + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 1128 .loc 1 423 7 view .LVU349 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1129 .loc 1 424 7 view .LVU350 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1130 .loc 1 424 14 is_stmt 0 view .LVU351 + 1131 0090 E2E7 b .L69 + 1132 .LVL110: + 1133 .L76: + ARM GAS /tmp/ccoO7FMo.s page 60 + + + 1134 .cfi_def_cfa_offset 0 + 1135 .cfi_restore 4 + 1136 .cfi_restore 14 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1137 .loc 1 365 3 discriminator 1 view .LVU352 + 1138 0092 0220 movs r0, #2 + 1139 .LVL111: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1140 .loc 1 432 1 view .LVU353 + 1141 0094 7047 bx lr + 1142 .L87: + 1143 0096 00BF .align 2 + 1144 .L86: + 1145 0098 00000000 .word pFlash + 1146 .cfi_endproc + 1147 .LFE133: + 1149 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits + 1150 .align 1 + 1151 .global HAL_FLASHEx_OBGetConfig + 1152 .syntax unified + 1153 .thumb + 1154 .thumb_func + 1156 HAL_FLASHEx_OBGetConfig: + 1157 .LVL112: + 1158 .LFB134: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 1159 .loc 1 442 1 is_stmt 1 view -0 + 1160 .cfi_startproc + 1161 @ args = 0, pretend = 0, frame = 0 + 1162 @ frame_needed = 0, uses_anonymous_args = 0 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 1163 .loc 1 442 1 is_stmt 0 view .LVU355 + 1164 0000 10B5 push {r4, lr} + 1165 .cfi_def_cfa_offset 8 + 1166 .cfi_offset 4, -8 + 1167 .cfi_offset 14, -4 + 1168 0002 0446 mov r4, r0 + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1169 .loc 1 443 3 is_stmt 1 view .LVU356 + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1170 .loc 1 443 23 is_stmt 0 view .LVU357 + 1171 0004 0723 movs r3, #7 + 1172 0006 0360 str r3, [r0] + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1173 .loc 1 446 3 is_stmt 1 view .LVU358 + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1174 .loc 1 446 22 is_stmt 0 view .LVU359 + 1175 0008 FFF7FEFF bl FLASH_OB_GetWRP + 1176 .LVL113: + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1177 .loc 1 446 20 discriminator 1 view .LVU360 + 1178 000c A060 str r0, [r4, #8] + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1179 .loc 1 449 3 is_stmt 1 view .LVU361 + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1180 .loc 1 449 23 is_stmt 0 view .LVU362 + 1181 000e FFF7FEFF bl FLASH_OB_GetRDP + ARM GAS /tmp/ccoO7FMo.s page 61 + + + 1182 .LVL114: + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1183 .loc 1 449 21 discriminator 1 view .LVU363 + 1184 0012 2073 strb r0, [r4, #12] + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1185 .loc 1 452 3 is_stmt 1 view .LVU364 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1186 .loc 1 452 25 is_stmt 0 view .LVU365 + 1187 0014 FFF7FEFF bl FLASH_OB_GetUser + 1188 .LVL115: + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1189 .loc 1 452 23 discriminator 1 view .LVU366 + 1190 0018 6073 strb r0, [r4, #13] + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1191 .loc 1 453 1 view .LVU367 + 1192 001a 10BD pop {r4, pc} + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1193 .loc 1 453 1 view .LVU368 + 1194 .cfi_endproc + 1195 .LFE134: + 1197 .section .text.HAL_FLASHEx_OBGetUserData,"ax",%progbits + 1198 .align 1 + 1199 .global HAL_FLASHEx_OBGetUserData + 1200 .syntax unified + 1201 .thumb + 1202 .thumb_func + 1204 HAL_FLASHEx_OBGetUserData: + 1205 .LVL116: + 1206 .LFB135: + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t value = 0U; + 1207 .loc 1 464 1 is_stmt 1 view -0 + 1208 .cfi_startproc + 1209 @ args = 0, pretend = 0, frame = 0 + 1210 @ frame_needed = 0, uses_anonymous_args = 0 + 1211 @ link register save eliminated. + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1212 .loc 1 465 3 view .LVU370 + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1213 .loc 1 467 3 view .LVU371 + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1214 .loc 1 467 6 is_stmt 0 view .LVU372 + 1215 0000 0D4B ldr r3, .L94 + 1216 0002 9842 cmp r0, r3 + 1217 0004 0BD0 beq .L93 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1218 .loc 1 475 5 is_stmt 1 view .LVU373 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1219 .loc 1 475 13 is_stmt 0 view .LVU374 + 1220 0006 0D4B ldr r3, .L94+4 + 1221 0008 D869 ldr r0, [r3, #28] + 1222 .LVL117: + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1223 .loc 1 475 13 view .LVU375 + 1224 000a 00F07F40 and r0, r0, #-16777216 + 1225 .LVL118: + 1226 .LBB10: + 1227 .LBI10: + ARM GAS /tmp/ccoO7FMo.s page 62 + + + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1228 .loc 2 981 31 is_stmt 1 view .LVU376 + 1229 .LBB11: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1230 .loc 2 983 3 view .LVU377 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1231 .loc 2 988 4 view .LVU378 + 1232 000e 4FF07F43 mov r3, #-16777216 + 1233 .syntax unified + 1234 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1235 0012 93FAA3F3 rbit r3, r3 + 1236 @ 0 "" 2 + 1237 .LVL119: + 1238 .loc 2 1001 3 view .LVU379 + 1239 .loc 2 1001 3 is_stmt 0 view .LVU380 + 1240 .thumb + 1241 .syntax unified + 1242 .LBE11: + 1243 .LBE10: + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1244 .loc 1 475 54 discriminator 2 view .LVU381 + 1245 0016 B3FA83F3 clz r3, r3 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1246 .loc 1 475 11 discriminator 2 view .LVU382 + 1247 001a D840 lsrs r0, r0, r3 + 1248 .LVL120: + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1249 .loc 1 478 3 is_stmt 1 view .LVU383 + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1250 .loc 1 479 1 is_stmt 0 view .LVU384 + 1251 001c 7047 bx lr + 1252 .LVL121: + 1253 .L93: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1254 .loc 1 470 5 is_stmt 1 view .LVU385 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1255 .loc 1 470 13 is_stmt 0 view .LVU386 + 1256 001e 074B ldr r3, .L94+4 + 1257 0020 D869 ldr r0, [r3, #28] + 1258 .LVL122: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1259 .loc 1 470 13 view .LVU387 + 1260 0022 00F47F00 and r0, r0, #16711680 + 1261 .LVL123: + 1262 .LBB12: + 1263 .LBI12: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1264 .loc 2 981 31 is_stmt 1 view .LVU388 + 1265 .LBB13: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1266 .loc 2 983 3 view .LVU389 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1267 .loc 2 988 4 view .LVU390 + 1268 0026 4FF47F03 mov r3, #16711680 + 1269 .syntax unified + 1270 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1271 002a 93FAA3F3 rbit r3, r3 + ARM GAS /tmp/ccoO7FMo.s page 63 + + + 1272 @ 0 "" 2 + 1273 .LVL124: + 1274 .loc 2 1001 3 view .LVU391 + 1275 .loc 2 1001 3 is_stmt 0 view .LVU392 + 1276 .thumb + 1277 .syntax unified + 1278 .LBE13: + 1279 .LBE12: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1280 .loc 1 470 54 discriminator 2 view .LVU393 + 1281 002e B3FA83F3 clz r3, r3 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1282 .loc 1 470 11 discriminator 2 view .LVU394 + 1283 0032 D840 lsrs r0, r0, r3 + 1284 .LVL125: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1285 .loc 1 470 11 discriminator 2 view .LVU395 + 1286 0034 7047 bx lr + 1287 .L95: + 1288 0036 00BF .align 2 + 1289 .L94: + 1290 0038 04F8FF1F .word 536868868 + 1291 003c 00200240 .word 1073881088 + 1292 .cfi_endproc + 1293 .LFE135: + 1295 .section .text.FLASH_PageErase,"ax",%progbits + 1296 .align 1 + 1297 .global FLASH_PageErase + 1298 .syntax unified + 1299 .thumb + 1300 .thumb_func + 1302 FLASH_PageErase: + 1303 .LVL126: + 1304 .LFB145: + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory page + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param PageAddress FLASH page to erase + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None + ARM GAS /tmp/ccoO7FMo.s page 64 + + + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress) + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1305 .loc 1 958 1 is_stmt 1 view -0 + 1306 .cfi_startproc + 1307 @ args = 0, pretend = 0, frame = 0 + 1308 @ frame_needed = 0, uses_anonymous_args = 0 + 1309 @ link register save eliminated. + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 1310 .loc 1 960 3 view .LVU397 + 1311 .loc 1 960 20 is_stmt 0 view .LVU398 + 1312 0000 064B ldr r3, .L97 + 1313 0002 0022 movs r2, #0 + 1314 0004 DA61 str r2, [r3, #28] + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Proceed to erase the page */ + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_PER); + 1315 .loc 1 963 5 is_stmt 1 view .LVU399 + 1316 0006 064B ldr r3, .L97+4 + 1317 0008 1A69 ldr r2, [r3, #16] + 1318 000a 42F00202 orr r2, r2, #2 + 1319 000e 1A61 str r2, [r3, #16] + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRITE_REG(FLASH->AR, PageAddress); + 1320 .loc 1 964 5 view .LVU400 + 1321 0010 5861 str r0, [r3, #20] + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 1322 .loc 1 965 5 view .LVU401 + 1323 0012 1A69 ldr r2, [r3, #16] + 1324 0014 42F04002 orr r2, r2, #64 + 1325 0018 1A61 str r2, [r3, #16] + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1326 .loc 1 966 1 is_stmt 0 view .LVU402 + 1327 001a 7047 bx lr + 1328 .L98: + 1329 .align 2 + 1330 .L97: + 1331 001c 00000000 .word pFlash + 1332 0020 00200240 .word 1073881088 + 1333 .cfi_endproc + 1334 .LFE145: + 1336 .section .text.HAL_FLASHEx_Erase,"ax",%progbits + 1337 .align 1 + 1338 .global HAL_FLASHEx_Erase + 1339 .syntax unified + 1340 .thumb + 1341 .thumb_func + 1343 HAL_FLASHEx_Erase: + 1344 .LVL127: + 1345 .LFB130: + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1346 .loc 1 158 1 is_stmt 1 view -0 + 1347 .cfi_startproc + 1348 @ args = 0, pretend = 0, frame = 0 + 1349 @ frame_needed = 0, uses_anonymous_args = 0 + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1350 .loc 1 159 3 view .LVU404 + ARM GAS /tmp/ccoO7FMo.s page 65 + + + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1351 .loc 1 160 3 view .LVU405 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1352 .loc 1 163 3 view .LVU406 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1353 .loc 1 163 3 view .LVU407 + 1354 0000 264B ldr r3, .L116 + 1355 0002 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 1356 0004 012B cmp r3, #1 + 1357 0006 45D0 beq .L106 + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1358 .loc 1 158 1 is_stmt 0 view .LVU408 + 1359 0008 70B5 push {r4, r5, r6, lr} + 1360 .cfi_def_cfa_offset 16 + 1361 .cfi_offset 4, -16 + 1362 .cfi_offset 5, -12 + 1363 .cfi_offset 6, -8 + 1364 .cfi_offset 14, -4 + 1365 000a 0546 mov r5, r0 + 1366 000c 0E46 mov r6, r1 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1367 .loc 1 163 3 is_stmt 1 discriminator 2 view .LVU409 + 1368 000e 234B ldr r3, .L116 + 1369 0010 0122 movs r2, #1 + 1370 0012 1A76 strb r2, [r3, #24] + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1371 .loc 1 163 3 discriminator 2 view .LVU410 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1372 .loc 1 166 3 view .LVU411 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1373 .loc 1 168 3 view .LVU412 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1374 .loc 1 168 17 is_stmt 0 view .LVU413 + 1375 0014 0368 ldr r3, [r0] + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1376 .loc 1 168 6 view .LVU414 + 1377 0016 9342 cmp r3, r2 + 1378 0018 20D0 beq .L113 + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1379 .loc 1 188 5 is_stmt 1 view .LVU415 + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1380 .loc 1 189 5 view .LVU416 + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1381 .loc 1 193 7 view .LVU417 + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1382 .loc 1 193 11 is_stmt 0 view .LVU418 + 1383 001a 4CF25030 movw r0, #50000 + 1384 .LVL128: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1385 .loc 1 193 11 view .LVU419 + 1386 001e FFF7FEFF bl FLASH_WaitForLastOperation + 1387 .LVL129: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1388 .loc 1 193 10 discriminator 1 view .LVU420 + 1389 0022 88BB cbnz r0, .L108 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1390 .loc 1 196 9 is_stmt 1 view .LVU421 + ARM GAS /tmp/ccoO7FMo.s page 66 + + + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1391 .loc 1 196 20 is_stmt 0 view .LVU422 + 1392 0024 4FF0FF33 mov r3, #-1 + 1393 0028 3360 str r3, [r6] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1394 .loc 1 199 9 is_stmt 1 view .LVU423 + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1395 .loc 1 199 21 is_stmt 0 view .LVU424 + 1396 002a 6C68 ldr r4, [r5, #4] + 1397 .LVL130: + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1398 .loc 1 159 21 view .LVU425 + 1399 002c 0121 movs r1, #1 + 1400 .LVL131: + 1401 .L103: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1402 .loc 1 200 21 is_stmt 1 view .LVU426 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1403 .loc 1 200 35 is_stmt 0 view .LVU427 + 1404 002e AA68 ldr r2, [r5, #8] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1405 .loc 1 200 76 view .LVU428 + 1406 0030 6B68 ldr r3, [r5, #4] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1407 .loc 1 200 64 view .LVU429 + 1408 0032 03EBC223 add r3, r3, r2, lsl #11 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1409 .loc 1 200 21 view .LVU430 + 1410 0036 A342 cmp r3, r4 + 1411 0038 27D9 bls .L102 + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1412 .loc 1 203 11 is_stmt 1 view .LVU431 + 1413 003a 2046 mov r0, r4 + 1414 003c FFF7FEFF bl FLASH_PageErase + 1415 .LVL132: + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1416 .loc 1 206 11 view .LVU432 + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1417 .loc 1 206 20 is_stmt 0 view .LVU433 + 1418 0040 4CF25030 movw r0, #50000 + 1419 0044 FFF7FEFF bl FLASH_WaitForLastOperation + 1420 .LVL133: + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1421 .loc 1 209 11 is_stmt 1 view .LVU434 + 1422 0048 154A ldr r2, .L116+4 + 1423 004a 1369 ldr r3, [r2, #16] + 1424 004c 23F00203 bic r3, r3, #2 + 1425 0050 1361 str r3, [r2, #16] + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1426 .loc 1 211 11 view .LVU435 + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1427 .loc 1 211 14 is_stmt 0 view .LVU436 + 1428 0052 0146 mov r1, r0 + 1429 0054 B0B9 cbnz r0, .L114 + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1430 .loc 1 201 21 is_stmt 1 view .LVU437 + 1431 0056 04F50064 add r4, r4, #2048 + ARM GAS /tmp/ccoO7FMo.s page 67 + + + 1432 .LVL134: + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1433 .loc 1 201 21 is_stmt 0 view .LVU438 + 1434 005a E8E7 b .L103 + 1435 .LVL135: + 1436 .L113: + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1437 .loc 1 172 7 is_stmt 1 view .LVU439 + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1438 .loc 1 172 11 is_stmt 0 view .LVU440 + 1439 005c 4CF25030 movw r0, #50000 + 1440 .LVL136: + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1441 .loc 1 172 11 view .LVU441 + 1442 0060 FFF7FEFF bl FLASH_WaitForLastOperation + 1443 .LVL137: + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1444 .loc 1 172 10 discriminator 1 view .LVU442 + 1445 0064 08B1 cbz r0, .L115 + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1446 .loc 1 159 21 view .LVU443 + 1447 0066 0121 movs r1, #1 + 1448 0068 0FE0 b .L102 + 1449 .L115: + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1450 .loc 1 175 9 is_stmt 1 view .LVU444 + 1451 006a FFF7FEFF bl FLASH_MassErase + 1452 .LVL138: + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1453 .loc 1 178 9 view .LVU445 + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1454 .loc 1 178 18 is_stmt 0 view .LVU446 + 1455 006e 4CF25030 movw r0, #50000 + 1456 0072 FFF7FEFF bl FLASH_WaitForLastOperation + 1457 .LVL139: + 1458 0076 0146 mov r1, r0 + 1459 .LVL140: + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1460 .loc 1 181 9 is_stmt 1 view .LVU447 + 1461 0078 094A ldr r2, .L116+4 + 1462 007a 1369 ldr r3, [r2, #16] + 1463 007c 23F00403 bic r3, r3, #4 + 1464 0080 1361 str r3, [r2, #16] + 1465 0082 02E0 b .L102 + 1466 .LVL141: + 1467 .L114: + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break; + 1468 .loc 1 214 13 view .LVU448 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break; + 1469 .loc 1 214 24 is_stmt 0 view .LVU449 + 1470 0084 3460 str r4, [r6] + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1471 .loc 1 215 13 is_stmt 1 view .LVU450 + 1472 0086 00E0 b .L102 + 1473 .LVL142: + 1474 .L108: + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + ARM GAS /tmp/ccoO7FMo.s page 68 + + + 1475 .loc 1 159 21 is_stmt 0 view .LVU451 + 1476 0088 0121 movs r1, #1 + 1477 .LVL143: + 1478 .L102: + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1479 .loc 1 222 3 is_stmt 1 view .LVU452 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1480 .loc 1 222 3 view .LVU453 + 1481 008a 044B ldr r3, .L116 + 1482 008c 0022 movs r2, #0 + 1483 008e 1A76 strb r2, [r3, #24] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1484 .loc 1 222 3 view .LVU454 + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1485 .loc 1 224 3 view .LVU455 + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1486 .loc 1 225 1 is_stmt 0 view .LVU456 + 1487 0090 0846 mov r0, r1 + 1488 0092 70BD pop {r4, r5, r6, pc} + 1489 .LVL144: + 1490 .L106: + 1491 .cfi_def_cfa_offset 0 + 1492 .cfi_restore 4 + 1493 .cfi_restore 5 + 1494 .cfi_restore 6 + 1495 .cfi_restore 14 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1496 .loc 1 163 3 discriminator 1 view .LVU457 + 1497 0094 0221 movs r1, #2 + 1498 .LVL145: + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1499 .loc 1 225 1 view .LVU458 + 1500 0096 0846 mov r0, r1 + 1501 .LVL146: + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1502 .loc 1 225 1 view .LVU459 + 1503 0098 7047 bx lr + 1504 .L117: + 1505 009a 00BF .align 2 + 1506 .L116: + 1507 009c 00000000 .word pFlash + 1508 00a0 00200240 .word 1073881088 + 1509 .cfi_endproc + 1510 .LFE130: + 1512 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits + 1513 .align 1 + 1514 .global HAL_FLASHEx_Erase_IT + 1515 .syntax unified + 1516 .thumb + 1517 .thumb_func + 1519 HAL_FLASHEx_Erase_IT: + 1520 .LVL147: + 1521 .LFB131: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1522 .loc 1 239 1 is_stmt 1 view -0 + 1523 .cfi_startproc + 1524 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccoO7FMo.s page 69 + + + 1525 @ frame_needed = 0, uses_anonymous_args = 0 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1526 .loc 1 239 1 is_stmt 0 view .LVU461 + 1527 0000 10B5 push {r4, lr} + 1528 .cfi_def_cfa_offset 8 + 1529 .cfi_offset 4, -8 + 1530 .cfi_offset 14, -4 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1531 .loc 1 240 3 is_stmt 1 view .LVU462 + 1532 .LVL148: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1533 .loc 1 243 3 view .LVU463 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1534 .loc 1 243 3 view .LVU464 + 1535 0002 144B ldr r3, .L125 + 1536 0004 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 1537 0006 012B cmp r3, #1 + 1538 0008 1FD0 beq .L121 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1539 .loc 1 243 3 discriminator 2 view .LVU465 + 1540 000a 124B ldr r3, .L125 + 1541 000c 0122 movs r2, #1 + 1542 000e 1A76 strb r2, [r3, #24] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1543 .loc 1 243 3 discriminator 2 view .LVU466 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1544 .loc 1 246 3 view .LVU467 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1545 .loc 1 246 13 is_stmt 0 view .LVU468 + 1546 0010 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1547 .loc 1 246 6 view .LVU469 + 1548 0012 03F0FF04 and r4, r3, #255 + 1549 0016 D3B9 cbnz r3, .L122 + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1550 .loc 1 252 3 is_stmt 1 view .LVU470 + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1551 .loc 1 255 3 view .LVU471 + 1552 0018 0F4A ldr r2, .L125+4 + 1553 001a 1369 ldr r3, [r2, #16] + 1554 001c 43F4A053 orr r3, r3, #5120 + 1555 0020 1361 str r3, [r2, #16] + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1556 .loc 1 257 3 view .LVU472 + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1557 .loc 1 257 17 is_stmt 0 view .LVU473 + 1558 0022 0368 ldr r3, [r0] + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1559 .loc 1 257 6 view .LVU474 + 1560 0024 012B cmp r3, #1 + 1561 0026 0AD0 beq .L124 + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1562 .loc 1 268 5 is_stmt 1 view .LVU475 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1563 .loc 1 269 5 view .LVU476 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1564 .loc 1 271 5 view .LVU477 + ARM GAS /tmp/ccoO7FMo.s page 70 + + + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1565 .loc 1 271 29 is_stmt 0 view .LVU478 + 1566 0028 0A4B ldr r3, .L125 + 1567 002a 0122 movs r2, #1 + 1568 002c 1A70 strb r2, [r3] + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1569 .loc 1 272 5 is_stmt 1 view .LVU479 + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1570 .loc 1 272 38 is_stmt 0 view .LVU480 + 1571 002e 8268 ldr r2, [r0, #8] + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1572 .loc 1 272 26 view .LVU481 + 1573 0030 5A60 str r2, [r3, #4] + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1574 .loc 1 273 5 is_stmt 1 view .LVU482 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1575 .loc 1 273 32 is_stmt 0 view .LVU483 + 1576 0032 4068 ldr r0, [r0, #4] + 1577 .LVL149: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1578 .loc 1 273 20 view .LVU484 + 1579 0034 9860 str r0, [r3, #8] + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1580 .loc 1 276 5 is_stmt 1 view .LVU485 + 1581 0036 FFF7FEFF bl FLASH_PageErase + 1582 .LVL150: + 1583 .L119: + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1584 .loc 1 280 1 is_stmt 0 view .LVU486 + 1585 003a 2046 mov r0, r4 + 1586 003c 10BD pop {r4, pc} + 1587 .LVL151: + 1588 .L124: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 1589 .loc 1 260 5 is_stmt 1 view .LVU487 + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 1590 .loc 1 260 29 is_stmt 0 view .LVU488 + 1591 003e 054B ldr r3, .L125 + 1592 0040 0222 movs r2, #2 + 1593 0042 1A70 strb r2, [r3] + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1594 .loc 1 261 9 is_stmt 1 view .LVU489 + 1595 0044 FFF7FEFF bl FLASH_MassErase + 1596 .LVL152: + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1597 .loc 1 261 9 is_stmt 0 view .LVU490 + 1598 0048 F7E7 b .L119 + 1599 .LVL153: + 1600 .L121: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1601 .loc 1 243 3 discriminator 1 view .LVU491 + 1602 004a 0224 movs r4, #2 + 1603 004c F5E7 b .L119 + 1604 .L122: + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1605 .loc 1 248 12 view .LVU492 + 1606 004e 0124 movs r4, #1 + ARM GAS /tmp/ccoO7FMo.s page 71 + + + 1607 0050 F3E7 b .L119 + 1608 .L126: + 1609 0052 00BF .align 2 + 1610 .L125: + 1611 0054 00000000 .word pFlash + 1612 0058 00200240 .word 1073881088 + 1613 .cfi_endproc + 1614 .LFE131: + 1616 .text + 1617 .Letext0: + 1618 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1619 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1620 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1621 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1622 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h" + 1623 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h" + ARM GAS /tmp/ccoO7FMo.s page 72 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_flash_ex.c + /tmp/ccoO7FMo.s:21 .text.FLASH_MassErase:00000000 $t + /tmp/ccoO7FMo.s:26 .text.FLASH_MassErase:00000000 FLASH_MassErase + /tmp/ccoO7FMo.s:52 .text.FLASH_MassErase:0000001c $d + /tmp/ccoO7FMo.s:58 .text.FLASH_OB_GetWRP:00000000 $t + /tmp/ccoO7FMo.s:63 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP + /tmp/ccoO7FMo.s:79 .text.FLASH_OB_GetWRP:00000008 $d + /tmp/ccoO7FMo.s:84 .text.FLASH_OB_GetRDP:00000000 $t + /tmp/ccoO7FMo.s:89 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP + /tmp/ccoO7FMo.s:127 .text.FLASH_OB_GetRDP:0000001c $d + /tmp/ccoO7FMo.s:132 .text.FLASH_OB_RDP_LevelConfig:00000000 $t + /tmp/ccoO7FMo.s:137 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig + /tmp/ccoO7FMo.s:221 .text.FLASH_OB_RDP_LevelConfig:0000005c $d + /tmp/ccoO7FMo.s:228 .text.FLASH_OB_UserConfig:00000000 $t + /tmp/ccoO7FMo.s:233 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig + /tmp/ccoO7FMo.s:301 .text.FLASH_OB_UserConfig:0000003c $d + /tmp/ccoO7FMo.s:308 .text.FLASH_OB_ProgramData:00000000 $t + /tmp/ccoO7FMo.s:313 .text.FLASH_OB_ProgramData:00000000 FLASH_OB_ProgramData + /tmp/ccoO7FMo.s:375 .text.FLASH_OB_ProgramData:00000038 $d + /tmp/ccoO7FMo.s:381 .text.FLASH_OB_GetUser:00000000 $t + /tmp/ccoO7FMo.s:386 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser + /tmp/ccoO7FMo.s:429 .text.FLASH_OB_GetUser:0000001c $d + /tmp/ccoO7FMo.s:434 .text.HAL_FLASHEx_OBErase:00000000 $t + /tmp/ccoO7FMo.s:440 .text.HAL_FLASHEx_OBErase:00000000 HAL_FLASHEx_OBErase + /tmp/ccoO7FMo.s:516 .text.HAL_FLASHEx_OBErase:00000048 $d + /tmp/ccoO7FMo.s:522 .text.FLASH_OB_EnableWRP:00000000 $t + /tmp/ccoO7FMo.s:527 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP + /tmp/ccoO7FMo.s:733 .text.FLASH_OB_EnableWRP:000000b8 $d + /tmp/ccoO7FMo.s:740 .text.FLASH_OB_DisableWRP:00000000 $t + /tmp/ccoO7FMo.s:745 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP + /tmp/ccoO7FMo.s:947 .text.FLASH_OB_DisableWRP:000000bc $d + /tmp/ccoO7FMo.s:954 .text.HAL_FLASHEx_OBProgram:00000000 $t + /tmp/ccoO7FMo.s:960 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram + /tmp/ccoO7FMo.s:1145 .text.HAL_FLASHEx_OBProgram:00000098 $d + /tmp/ccoO7FMo.s:1150 .text.HAL_FLASHEx_OBGetConfig:00000000 $t + /tmp/ccoO7FMo.s:1156 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig + /tmp/ccoO7FMo.s:1198 .text.HAL_FLASHEx_OBGetUserData:00000000 $t + /tmp/ccoO7FMo.s:1204 .text.HAL_FLASHEx_OBGetUserData:00000000 HAL_FLASHEx_OBGetUserData + /tmp/ccoO7FMo.s:1290 .text.HAL_FLASHEx_OBGetUserData:00000038 $d + /tmp/ccoO7FMo.s:1296 .text.FLASH_PageErase:00000000 $t + /tmp/ccoO7FMo.s:1302 .text.FLASH_PageErase:00000000 FLASH_PageErase + /tmp/ccoO7FMo.s:1331 .text.FLASH_PageErase:0000001c $d + /tmp/ccoO7FMo.s:1337 .text.HAL_FLASHEx_Erase:00000000 $t + /tmp/ccoO7FMo.s:1343 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase + /tmp/ccoO7FMo.s:1507 .text.HAL_FLASHEx_Erase:0000009c $d + /tmp/ccoO7FMo.s:1513 .text.HAL_FLASHEx_Erase_IT:00000000 $t + /tmp/ccoO7FMo.s:1519 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT + /tmp/ccoO7FMo.s:1611 .text.HAL_FLASHEx_Erase_IT:00000054 $d + +UNDEFINED SYMBOLS +pFlash +FLASH_WaitForLastOperation diff --git a/build/stm32f3xx_hal_flash_ex.o b/build/stm32f3xx_hal_flash_ex.o new file mode 100644 index 0000000..c643e90 Binary files /dev/null and b/build/stm32f3xx_hal_flash_ex.o differ diff --git a/build/stm32f3xx_hal_gpio.d b/build/stm32f3xx_hal_gpio.d new file mode 100644 index 0000000..8dede01 --- /dev/null +++ b/build/stm32f3xx_hal_gpio.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_gpio.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_gpio.lst b/build/stm32f3xx_hal_gpio.lst new file mode 100644 index 0000000..2b2e3bc --- /dev/null +++ b/build/stm32f3xx_hal_gpio.lst @@ -0,0 +1,1690 @@ +ARM GAS /tmp/ccfeIJZX.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_gpio.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c" + 20 .section .text.HAL_GPIO_Init,"ax",%progbits + 21 .align 1 + 22 .global HAL_GPIO_Init + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_GPIO_Init: + 28 .LVL0: + 29 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @file stm32f3xx_hal_gpio.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief GPIO HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ****************************************************************************** + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @attention + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * All rights reserved. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * in the root directory of this software component. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ****************************************************************************** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @verbatim + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ============================================================================== + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ##### GPIO Peripheral features ##### + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ============================================================================== + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** [..] + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** configured by software in several modes: + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Input mode + ARM GAS /tmp/ccfeIJZX.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Analog mode + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Output mode + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Alternate function mode + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) External interrupt/event lines + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) During and just after reset, the alternate functions and external interrupt + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode. + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** activated or not. + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value. + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) The microcontroller IO pins are connected to onboard peripherals/modules through a + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** multiplexer that allows only one peripheral alternate function (AF) connected + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** to an IO pin at a time. In this way, there can be no conflict between peripherals + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** sharing the same IO pin. + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) All ports have external interrupt/event capability. To use external interrupt + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (+) The external interrupt/event controller consists of up to 23 edge detectors + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (16 lines are connected to GPIO) for generating event/interrupt requests (each + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** input line can be independently configured to select the type (interrupt or event) + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** and the corresponding trigger event (rising or falling or both). Each line can + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** also be masked independently. + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ##### How to use this driver ##### + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ============================================================================== + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** [..] + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** structure. + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure. + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) In alternate mode is selection, the alternate function connected to the IO + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** is configured through "Alternate" member from GPIO_InitTypeDef structure. + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** or DAC output. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_NVIC_EnableIRQ(). + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + ARM GAS /tmp/ccfeIJZX.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** pins). + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (PC14 and PC15U, respectively) when the LSE oscillator is off. The LSE has + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** priority over the GPIO function. + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** general purpose PF0 and PF1, respectively, when the HSE oscillator is off. + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** The HSE has priority over the GPIO function. + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @endverbatim + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ****************************************************************************** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** #include "stm32f3xx_hal.h" + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @addtogroup STM32F3xx_HAL_Driver + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @defgroup GPIO GPIO + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief GPIO HAL module driver + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** MISRA C:2012 deviation rule has been granted for following rules: + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * Rule-18.1_d - Medium: Array pointer `GPIOx' is accessed with index [..,..] + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * which may be out of array bounds [..,UNKNOWN] in following APIs: + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * HAL_GPIO_Init + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * HAL_GPIO_DeInit + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Private defines -----------------------------------------------------------*/ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @addtogroup GPIO_Private_Constants + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** #define GPIO_NUMBER (16U) + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @} + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Private macros ------------------------------------------------------------*/ + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Private macros ------------------------------------------------------------*/ + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @defgroup GPIO_Private_Macros GPIO Private Macros + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @} + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + ARM GAS /tmp/ccfeIJZX.s page 4 + + + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/ + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/ + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Initialization and Configuration functions + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @verbatim + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** =============================================================================== + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** =============================================================================== + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @endverbatim + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family devices + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral. + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 30 .loc 1 172 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 8 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 .loc 1 172 1 is_stmt 0 view .LVU1 + 35 0000 F0B5 push {r4, r5, r6, r7, lr} + 36 .cfi_def_cfa_offset 20 + 37 .cfi_offset 4, -20 + 38 .cfi_offset 5, -16 + 39 .cfi_offset 6, -12 + 40 .cfi_offset 7, -8 + 41 .cfi_offset 14, -4 + 42 0002 83B0 sub sp, sp, #12 + 43 .cfi_def_cfa_offset 32 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t position = 0x00u; + 44 .loc 1 173 3 is_stmt 1 view .LVU2 + 45 .LVL1: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 46 .loc 1 174 3 view .LVU3 + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t temp; + 47 .loc 1 175 3 view .LVU4 + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 48 .loc 1 178 3 view .LVU5 + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + 49 .loc 1 179 3 view .LVU6 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + ARM GAS /tmp/ccfeIJZX.s page 5 + + + 50 .loc 1 180 3 view .LVU7 + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the port pins */ + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u) + 51 .loc 1 183 3 view .LVU8 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 52 .loc 1 173 12 is_stmt 0 view .LVU9 + 53 0004 0023 movs r3, #0 + 54 .loc 1 183 9 view .LVU10 + 55 0006 62E0 b .L2 + 56 .LVL2: + 57 .L20: + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Get current io position */ + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1uL << position); + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (iocurrent != 0x00u) + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_A + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the Speed parameter */ + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + 58 .loc 1 195 9 is_stmt 1 view .LVU11 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the IO Speed */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; + 59 .loc 1 197 9 view .LVU12 + 60 .loc 1 197 14 is_stmt 0 view .LVU13 + 61 0008 8568 ldr r5, [r0, #8] + 62 .LVL3: + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 63 .loc 1 198 9 is_stmt 1 view .LVU14 + 64 .loc 1 198 55 is_stmt 0 view .LVU15 + 65 000a 5E00 lsls r6, r3, #1 + 66 .loc 1 198 42 view .LVU16 + 67 000c 0324 movs r4, #3 + 68 000e B440 lsls r4, r4, r6 + 69 .loc 1 198 14 view .LVU17 + 70 0010 25EA0405 bic r5, r5, r4 + 71 .LVL4: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 72 .loc 1 199 9 is_stmt 1 view .LVU18 + 73 .loc 1 199 27 is_stmt 0 view .LVU19 + 74 0014 CC68 ldr r4, [r1, #12] + 75 .loc 1 199 35 view .LVU20 + 76 0016 B440 lsls r4, r4, r6 + 77 .loc 1 199 14 view .LVU21 + 78 0018 2C43 orrs r4, r4, r5 + 79 .LVL5: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 80 .loc 1 200 9 is_stmt 1 view .LVU22 + 81 .loc 1 200 24 is_stmt 0 view .LVU23 + 82 001a 8460 str r4, [r0, #8] + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the IO Output Type */ + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->OTYPER; + ARM GAS /tmp/ccfeIJZX.s page 6 + + + 83 .loc 1 203 9 is_stmt 1 view .LVU24 + 84 .loc 1 203 14 is_stmt 0 view .LVU25 + 85 001c 4568 ldr r5, [r0, #4] + 86 .LVL6: + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 87 .loc 1 204 9 is_stmt 1 view .LVU26 + 88 .loc 1 204 14 is_stmt 0 view .LVU27 + 89 001e 25EA0C05 bic r5, r5, ip + 90 .LVL7: + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 91 .loc 1 205 9 is_stmt 1 view .LVU28 + 92 .loc 1 205 29 is_stmt 0 view .LVU29 + 93 0022 4C68 ldr r4, [r1, #4] + 94 .loc 1 205 51 view .LVU30 + 95 0024 C4F30014 ubfx r4, r4, #4, #1 + 96 .loc 1 205 71 view .LVU31 + 97 0028 9C40 lsls r4, r4, r3 + 98 .loc 1 205 14 view .LVU32 + 99 002a 2C43 orrs r4, r4, r5 + 100 .LVL8: + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 101 .loc 1 206 9 is_stmt 1 view .LVU33 + 102 .loc 1 206 23 is_stmt 0 view .LVU34 + 103 002c 4460 str r4, [r0, #4] + 104 002e 5FE0 b .L4 + 105 .LVL9: + 106 .L21: + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the Pull parameter */ + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->PUPDR; + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* In case of Alternate function mode selection */ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the Alternate function parameters */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + 107 .loc 1 226 9 is_stmt 1 view .LVU35 + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + 108 .loc 1 227 9 view .LVU36 + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3u]; + 109 .loc 1 230 9 view .LVU37 + 110 .loc 1 230 36 is_stmt 0 view .LVU38 + 111 0030 DD08 lsrs r5, r3, #3 + 112 .loc 1 230 14 view .LVU39 + ARM GAS /tmp/ccfeIJZX.s page 7 + + + 113 0032 0835 adds r5, r5, #8 + 114 0034 50F82540 ldr r4, [r0, r5, lsl #2] + 115 .LVL10: + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 116 .loc 1 231 9 is_stmt 1 view .LVU40 + 117 .loc 1 231 38 is_stmt 0 view .LVU41 + 118 0038 03F0070C and ip, r3, #7 + 119 .loc 1 231 47 view .LVU42 + 120 003c 4FEA8C0C lsl ip, ip, #2 + 121 .loc 1 231 24 view .LVU43 + 122 0040 4FF00F0E mov lr, #15 + 123 0044 0EFA0CFE lsl lr, lr, ip + 124 .loc 1 231 14 view .LVU44 + 125 0048 24EA0E0E bic lr, r4, lr + 126 .LVL11: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 127 .loc 1 232 9 is_stmt 1 view .LVU45 + 128 .loc 1 232 28 is_stmt 0 view .LVU46 + 129 004c 0C69 ldr r4, [r1, #16] + 130 .loc 1 232 41 view .LVU47 + 131 004e 04FA0CF4 lsl r4, r4, ip + 132 .loc 1 232 14 view .LVU48 + 133 0052 44EA0E04 orr r4, r4, lr + 134 .LVL12: + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 135 .loc 1 233 9 is_stmt 1 view .LVU49 + 136 .loc 1 233 36 is_stmt 0 view .LVU50 + 137 0056 40F82540 str r4, [r0, r5, lsl #2] + 138 005a 60E0 b .L6 + 139 .LVL13: + 140 .L22: + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->MODER; + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Enable SYSCFG Clock */ + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2u]; + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 141 .loc 1 251 18 discriminator 9 view .LVU51 + 142 005c 0424 movs r4, #4 + 143 005e 00E0 b .L7 + 144 .L13: + 145 .loc 1 251 18 discriminator 2 view .LVU52 + 146 0060 0024 movs r4, #0 + 147 .L7: + 148 .loc 1 251 40 discriminator 20 view .LVU53 + ARM GAS /tmp/ccfeIJZX.s page 8 + + + 149 0062 04FA0EF4 lsl r4, r4, lr + 150 .loc 1 251 14 discriminator 20 view .LVU54 + 151 0066 2C43 orrs r4, r4, r5 + 152 .LVL14: + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 153 .loc 1 252 9 is_stmt 1 view .LVU55 + 154 .loc 1 252 40 is_stmt 0 view .LVU56 + 155 0068 0CF1020C add ip, ip, #2 + 156 006c 524D ldr r5, .L23 + 157 006e 45F82C40 str r4, [r5, ip, lsl #2] + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->RTSR; + 158 .loc 1 255 9 is_stmt 1 view .LVU57 + 159 .loc 1 255 14 is_stmt 0 view .LVU58 + 160 0072 524C ldr r4, .L23+4 + 161 .LVL15: + 162 .loc 1 255 14 view .LVU59 + 163 0074 A568 ldr r5, [r4, #8] + 164 .LVL16: + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + 165 .loc 1 256 9 is_stmt 1 view .LVU60 + 166 .loc 1 256 17 is_stmt 0 view .LVU61 + 167 0076 D443 mvns r4, r2 + 168 .loc 1 256 14 view .LVU62 + 169 0078 25EA0206 bic r6, r5, r2 + 170 .LVL17: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) + 171 .loc 1 257 9 is_stmt 1 view .LVU63 + 172 .loc 1 257 11 is_stmt 0 view .LVU64 + 173 007c 4F68 ldr r7, [r1, #4] + 174 007e 17F4801F tst r7, #1048576 + 175 0082 01D0 beq .L8 + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 176 .loc 1 259 11 is_stmt 1 view .LVU65 + 177 .loc 1 259 16 is_stmt 0 view .LVU66 + 178 0084 42EA0506 orr r6, r2, r5 + 179 .LVL18: + 180 .L8: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR = temp; + 181 .loc 1 261 9 is_stmt 1 view .LVU67 + 182 .loc 1 261 20 is_stmt 0 view .LVU68 + 183 0088 4C4D ldr r5, .L23+4 + 184 008a AE60 str r6, [r5, #8] + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->FTSR; + 185 .loc 1 263 9 is_stmt 1 view .LVU69 + 186 .loc 1 263 14 is_stmt 0 view .LVU70 + 187 008c ED68 ldr r5, [r5, #12] + 188 .LVL19: + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + 189 .loc 1 264 9 is_stmt 1 view .LVU71 + 190 .loc 1 264 14 is_stmt 0 view .LVU72 + 191 008e 04EA0506 and r6, r4, r5 + 192 .LVL20: + ARM GAS /tmp/ccfeIJZX.s page 9 + + + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) + 193 .loc 1 265 9 is_stmt 1 view .LVU73 + 194 .loc 1 265 11 is_stmt 0 view .LVU74 + 195 0092 4F68 ldr r7, [r1, #4] + 196 0094 17F4001F tst r7, #2097152 + 197 0098 01D0 beq .L9 + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 198 .loc 1 267 11 is_stmt 1 view .LVU75 + 199 .loc 1 267 16 is_stmt 0 view .LVU76 + 200 009a 42EA0506 orr r6, r2, r5 + 201 .LVL21: + 202 .L9: + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->FTSR = temp; + 203 .loc 1 269 9 is_stmt 1 view .LVU77 + 204 .loc 1 269 20 is_stmt 0 view .LVU78 + 205 009e 474D ldr r5, .L23+4 + 206 00a0 EE60 str r6, [r5, #12] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->EMR; + 207 .loc 1 271 9 is_stmt 1 view .LVU79 + 208 .loc 1 271 14 is_stmt 0 view .LVU80 + 209 00a2 6D68 ldr r5, [r5, #4] + 210 .LVL22: + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + 211 .loc 1 272 9 is_stmt 1 view .LVU81 + 212 .loc 1 272 14 is_stmt 0 view .LVU82 + 213 00a4 04EA0506 and r6, r4, r5 + 214 .LVL23: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) + 215 .loc 1 273 9 is_stmt 1 view .LVU83 + 216 .loc 1 273 11 is_stmt 0 view .LVU84 + 217 00a8 4F68 ldr r7, [r1, #4] + 218 00aa 17F4003F tst r7, #131072 + 219 00ae 01D0 beq .L10 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 220 .loc 1 275 11 is_stmt 1 view .LVU85 + 221 .loc 1 275 16 is_stmt 0 view .LVU86 + 222 00b0 42EA0506 orr r6, r2, r5 + 223 .LVL24: + 224 .L10: + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR = temp; + 225 .loc 1 277 9 is_stmt 1 view .LVU87 + 226 .loc 1 277 19 is_stmt 0 view .LVU88 + 227 00b4 414D ldr r5, .L23+4 + 228 00b6 6E60 str r6, [r5, #4] + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->IMR; + 229 .loc 1 280 9 is_stmt 1 view .LVU89 + 230 .loc 1 280 14 is_stmt 0 view .LVU90 + 231 00b8 2D68 ldr r5, [r5] + 232 .LVL25: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + ARM GAS /tmp/ccfeIJZX.s page 10 + + + 233 .loc 1 281 9 is_stmt 1 view .LVU91 + 234 .loc 1 281 14 is_stmt 0 view .LVU92 + 235 00ba 2C40 ands r4, r4, r5 + 236 .LVL26: + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_IT) != 0x00u) + 237 .loc 1 282 9 is_stmt 1 view .LVU93 + 238 .loc 1 282 22 is_stmt 0 view .LVU94 + 239 00bc 4E68 ldr r6, [r1, #4] + 240 .loc 1 282 11 view .LVU95 + 241 00be 16F4803F tst r6, #65536 + 242 00c2 01D0 beq .L11 + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 243 .loc 1 284 11 is_stmt 1 view .LVU96 + 244 .loc 1 284 16 is_stmt 0 view .LVU97 + 245 00c4 42EA0504 orr r4, r2, r5 + 246 .LVL27: + 247 .L11: + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->IMR = temp; + 248 .loc 1 286 9 is_stmt 1 view .LVU98 + 249 .loc 1 286 19 is_stmt 0 view .LVU99 + 250 00c8 3C4A ldr r2, .L23+4 + 251 .LVL28: + 252 .loc 1 286 19 view .LVU100 + 253 00ca 1460 str r4, [r2] + 254 .LVL29: + 255 .L3: + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** position++; + 256 .loc 1 290 5 is_stmt 1 view .LVU101 + 257 .loc 1 290 13 is_stmt 0 view .LVU102 + 258 00cc 0133 adds r3, r3, #1 + 259 .LVL30: + 260 .L2: + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 261 .loc 1 183 41 is_stmt 1 view .LVU103 + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 262 .loc 1 183 21 is_stmt 0 view .LVU104 + 263 00ce 0A68 ldr r2, [r1] + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 264 .loc 1 183 41 view .LVU105 + 265 00d0 32FA03F4 lsrs r4, r2, r3 + 266 00d4 6ED0 beq .L19 + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 267 .loc 1 186 5 is_stmt 1 view .LVU106 + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 268 .loc 1 186 41 is_stmt 0 view .LVU107 + 269 00d6 4FF0010C mov ip, #1 + 270 00da 0CFA03FC lsl ip, ip, r3 + 271 .LVL31: + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 272 .loc 1 188 5 is_stmt 1 view .LVU108 + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 273 .loc 1 188 8 is_stmt 0 view .LVU109 + ARM GAS /tmp/ccfeIJZX.s page 11 + + + 274 00de 1CEA0202 ands r2, ip, r2 + 275 .LVL32: + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 276 .loc 1 188 8 view .LVU110 + 277 00e2 F3D0 beq .L3 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 278 .loc 1 192 7 is_stmt 1 view .LVU111 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 279 .loc 1 192 21 is_stmt 0 view .LVU112 + 280 00e4 4C68 ldr r4, [r1, #4] + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 281 .loc 1 192 28 view .LVU113 + 282 00e6 04F00304 and r4, r4, #3 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 283 .loc 1 192 57 view .LVU114 + 284 00ea 013C subs r4, r4, #1 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 285 .loc 1 192 9 view .LVU115 + 286 00ec 012C cmp r4, #1 + 287 00ee 8BD9 bls .L20 + 288 .L4: + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 289 .loc 1 209 7 is_stmt 1 view .LVU116 + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 290 .loc 1 209 20 is_stmt 0 view .LVU117 + 291 00f0 4C68 ldr r4, [r1, #4] + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 292 .loc 1 209 27 view .LVU118 + 293 00f2 04F00304 and r4, r4, #3 + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 294 .loc 1 209 9 view .LVU119 + 295 00f6 032C cmp r4, #3 + 296 00f8 0CD0 beq .L5 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 297 .loc 1 212 9 is_stmt 1 view .LVU120 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 298 .loc 1 215 9 view .LVU121 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 299 .loc 1 215 14 is_stmt 0 view .LVU122 + 300 00fa C468 ldr r4, [r0, #12] + 301 .LVL33: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 302 .loc 1 216 9 is_stmt 1 view .LVU123 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 303 .loc 1 216 50 is_stmt 0 view .LVU124 + 304 00fc 5D00 lsls r5, r3, #1 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 305 .loc 1 216 37 view .LVU125 + 306 00fe 4FF0030C mov ip, #3 + 307 0102 0CFA05FC lsl ip, ip, r5 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 308 .loc 1 216 14 view .LVU126 + 309 0106 24EA0C0C bic ip, r4, ip + 310 .LVL34: + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 311 .loc 1 217 9 is_stmt 1 view .LVU127 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + ARM GAS /tmp/ccfeIJZX.s page 12 + + + 312 .loc 1 217 28 is_stmt 0 view .LVU128 + 313 010a 8C68 ldr r4, [r1, #8] + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 314 .loc 1 217 36 view .LVU129 + 315 010c AC40 lsls r4, r4, r5 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 316 .loc 1 217 14 view .LVU130 + 317 010e 44EA0C04 orr r4, r4, ip + 318 .LVL35: + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 319 .loc 1 218 9 is_stmt 1 view .LVU131 + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 320 .loc 1 218 22 is_stmt 0 view .LVU132 + 321 0112 C460 str r4, [r0, #12] + 322 .LVL36: + 323 .L5: + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 324 .loc 1 223 7 is_stmt 1 view .LVU133 + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 325 .loc 1 223 20 is_stmt 0 view .LVU134 + 326 0114 4C68 ldr r4, [r1, #4] + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 327 .loc 1 223 27 view .LVU135 + 328 0116 04F00304 and r4, r4, #3 + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 329 .loc 1 223 9 view .LVU136 + 330 011a 022C cmp r4, #2 + 331 011c 88D0 beq .L21 + 332 .L6: + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 333 .loc 1 237 7 is_stmt 1 view .LVU137 + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 334 .loc 1 237 12 is_stmt 0 view .LVU138 + 335 011e 0468 ldr r4, [r0] + 336 .LVL37: + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 337 .loc 1 238 7 is_stmt 1 view .LVU139 + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 338 .loc 1 238 48 is_stmt 0 view .LVU140 + 339 0120 4FEA430E lsl lr, r3, #1 + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 340 .loc 1 238 35 view .LVU141 + 341 0124 4FF0030C mov ip, #3 + 342 0128 0CFA0EFC lsl ip, ip, lr + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 343 .loc 1 238 12 view .LVU142 + 344 012c 24EA0C0C bic ip, r4, ip + 345 .LVL38: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 346 .loc 1 239 7 is_stmt 1 view .LVU143 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 347 .loc 1 239 26 is_stmt 0 view .LVU144 + 348 0130 4C68 ldr r4, [r1, #4] + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 349 .loc 1 239 33 view .LVU145 + 350 0132 04F00304 and r4, r4, #3 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + ARM GAS /tmp/ccfeIJZX.s page 13 + + + 351 .loc 1 239 46 view .LVU146 + 352 0136 04FA0EF4 lsl r4, r4, lr + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 353 .loc 1 239 12 view .LVU147 + 354 013a 44EA0C04 orr r4, r4, ip + 355 .LVL39: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 356 .loc 1 240 7 is_stmt 1 view .LVU148 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 357 .loc 1 240 20 is_stmt 0 view .LVU149 + 358 013e 0460 str r4, [r0] + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 359 .loc 1 244 7 is_stmt 1 view .LVU150 + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 360 .loc 1 244 20 is_stmt 0 view .LVU151 + 361 0140 4C68 ldr r4, [r1, #4] + 362 .LVL40: + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 363 .loc 1 244 9 view .LVU152 + 364 0142 14F4403F tst r4, #196608 + 365 0146 C1D0 beq .L3 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 366 .loc 1 247 9 is_stmt 1 view .LVU153 + 367 .LBB2: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 368 .loc 1 247 9 view .LVU154 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 369 .loc 1 247 9 view .LVU155 + 370 0148 1D4C ldr r4, .L23+8 + 371 014a A569 ldr r5, [r4, #24] + 372 014c 45F00105 orr r5, r5, #1 + 373 0150 A561 str r5, [r4, #24] + 374 .LVL41: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 375 .loc 1 247 9 view .LVU156 + 376 0152 A469 ldr r4, [r4, #24] + 377 0154 04F00104 and r4, r4, #1 + 378 0158 0194 str r4, [sp, #4] + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 379 .loc 1 247 9 view .LVU157 + 380 015a 019C ldr r4, [sp, #4] + 381 .LBE2: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 382 .loc 1 247 9 view .LVU158 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 383 .loc 1 249 9 view .LVU159 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 384 .loc 1 249 40 is_stmt 0 view .LVU160 + 385 015c 4FEA930C lsr ip, r3, #2 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 386 .loc 1 249 14 view .LVU161 + 387 0160 0CF10205 add r5, ip, #2 + 388 0164 144C ldr r4, .L23 + 389 0166 54F82550 ldr r5, [r4, r5, lsl #2] + 390 .LVL42: + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 391 .loc 1 250 9 is_stmt 1 view .LVU162 + ARM GAS /tmp/ccfeIJZX.s page 14 + + + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 392 .loc 1 250 45 is_stmt 0 view .LVU163 + 393 016a 03F0030E and lr, r3, #3 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 394 .loc 1 250 33 view .LVU164 + 395 016e 4FEA8E0E lsl lr, lr, #2 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 396 .loc 1 250 26 view .LVU165 + 397 0172 0F24 movs r4, #15 + 398 0174 04FA0EF4 lsl r4, r4, lr + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 399 .loc 1 250 14 view .LVU166 + 400 0178 25EA0405 bic r5, r5, r4 + 401 .LVL43: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 402 .loc 1 251 9 is_stmt 1 view .LVU167 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 403 .loc 1 251 18 is_stmt 0 view .LVU168 + 404 017c B0F1904F cmp r0, #1207959552 + 405 0180 3FF46EAF beq .L13 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 406 .loc 1 251 18 discriminator 1 view .LVU169 + 407 0184 0F4C ldr r4, .L23+12 + 408 0186 A042 cmp r0, r4 + 409 0188 0ED0 beq .L14 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 410 .loc 1 251 18 discriminator 3 view .LVU170 + 411 018a 04F58064 add r4, r4, #1024 + 412 018e A042 cmp r0, r4 + 413 0190 0CD0 beq .L15 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 414 .loc 1 251 18 discriminator 5 view .LVU171 + 415 0192 04F58064 add r4, r4, #1024 + 416 0196 A042 cmp r0, r4 + 417 0198 0AD0 beq .L16 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 418 .loc 1 251 18 discriminator 7 view .LVU172 + 419 019a 04F58064 add r4, r4, #1024 + 420 019e A042 cmp r0, r4 + 421 01a0 3FF45CAF beq .L22 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 422 .loc 1 251 18 discriminator 10 view .LVU173 + 423 01a4 0524 movs r4, #5 + 424 01a6 5CE7 b .L7 + 425 .L14: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 426 .loc 1 251 18 discriminator 4 view .LVU174 + 427 01a8 0124 movs r4, #1 + 428 01aa 5AE7 b .L7 + 429 .L15: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 430 .loc 1 251 18 discriminator 6 view .LVU175 + 431 01ac 0224 movs r4, #2 + 432 01ae 58E7 b .L7 + 433 .L16: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 434 .loc 1 251 18 discriminator 8 view .LVU176 + ARM GAS /tmp/ccfeIJZX.s page 15 + + + 435 01b0 0324 movs r4, #3 + 436 01b2 56E7 b .L7 + 437 .LVL44: + 438 .L19: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 439 .loc 1 292 1 view .LVU177 + 440 01b4 03B0 add sp, sp, #12 + 441 .cfi_def_cfa_offset 20 + 442 @ sp needed + 443 01b6 F0BD pop {r4, r5, r6, r7, pc} + 444 .L24: + 445 .align 2 + 446 .L23: + 447 01b8 00000140 .word 1073807360 + 448 01bc 00040140 .word 1073808384 + 449 01c0 00100240 .word 1073876992 + 450 01c4 00040048 .word 1207960576 + 451 .cfi_endproc + 452 .LFE130: + 454 .section .text.HAL_GPIO_DeInit,"ax",%progbits + 455 .align 1 + 456 .global HAL_GPIO_DeInit + 457 .syntax unified + 458 .thumb + 459 .thumb_func + 461 HAL_GPIO_DeInit: + 462 .LVL45: + 463 .LFB131: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief De-initialize the GPIOx peripheral registers to their default reset values. + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F30X device or STM32 + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 464 .loc 1 302 1 is_stmt 1 view -0 + 465 .cfi_startproc + 466 @ args = 0, pretend = 0, frame = 0 + 467 @ frame_needed = 0, uses_anonymous_args = 0 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t position = 0x00u; + 468 .loc 1 303 3 view .LVU179 + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 469 .loc 1 304 3 view .LVU180 + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t tmp; + 470 .loc 1 305 3 view .LVU181 + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 471 .loc 1 308 3 view .LVU182 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 472 .loc 1 309 3 view .LVU183 + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the port pins */ + ARM GAS /tmp/ccfeIJZX.s page 16 + + + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0x00u) + 473 .loc 1 312 3 view .LVU184 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 474 .loc 1 303 12 is_stmt 0 view .LVU185 + 475 0000 0023 movs r3, #0 + 476 .LVL46: + 477 .loc 1 312 33 is_stmt 1 view .LVU186 + 478 0002 31FA03F2 lsrs r2, r1, r3 + 479 0006 7AD0 beq .L39 + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t position = 0x00u; + 480 .loc 1 302 1 is_stmt 0 view .LVU187 + 481 0008 F0B5 push {r4, r5, r6, r7, lr} + 482 .cfi_def_cfa_offset 20 + 483 .cfi_offset 4, -20 + 484 .cfi_offset 5, -16 + 485 .cfi_offset 6, -12 + 486 .cfi_offset 7, -8 + 487 .cfi_offset 14, -4 + 488 000a 2EE0 b .L30 + 489 .LVL47: + 490 .L42: + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Get current io position */ + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position); + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (iocurrent != 0x00u) + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2u]; + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 491 .loc 1 324 19 discriminator 9 view .LVU188 + 492 000c 0425 movs r5, #4 + 493 000e 00E0 b .L28 + 494 .L31: + 495 .loc 1 324 19 discriminator 2 view .LVU189 + 496 0010 0025 movs r5, #0 + 497 .L28: + 498 .loc 1 324 41 discriminator 20 view .LVU190 + 499 0012 05FA0CF5 lsl r5, r5, ip + 500 .loc 1 324 10 discriminator 20 view .LVU191 + 501 0016 A542 cmp r5, r4 + 502 0018 55D0 beq .L40 + 503 .LVL48: + 504 .L29: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + ARM GAS /tmp/ccfeIJZX.s page 17 + + + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u)); + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure IO Direction in Input Floating Mode */ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 505 .loc 1 341 7 is_stmt 1 view .LVU192 + 506 .loc 1 341 12 is_stmt 0 view .LVU193 + 507 001a 0468 ldr r4, [r0] + 508 .loc 1 341 56 view .LVU194 + 509 001c 5D00 lsls r5, r3, #1 + 510 .loc 1 341 43 view .LVU195 + 511 001e 4FF0030C mov ip, #3 + 512 0022 0CFA05FC lsl ip, ip, r5 + 513 .loc 1 341 20 view .LVU196 + 514 0026 24EA0C04 bic r4, r4, ip + 515 002a 0460 str r4, [r0] + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 516 .loc 1 344 7 is_stmt 1 view .LVU197 + 517 .loc 1 344 17 is_stmt 0 view .LVU198 + 518 002c 4FEAD30E lsr lr, r3, #3 + 519 0030 0EF1080E add lr, lr, #8 + 520 0034 50F82E40 ldr r4, [r0, lr, lsl #2] + 521 .loc 1 344 48 view .LVU199 + 522 0038 03F00706 and r6, r3, #7 + 523 .loc 1 344 77 view .LVU200 + 524 003c B600 lsls r6, r6, #2 + 525 .loc 1 344 44 view .LVU201 + 526 003e 0F25 movs r5, #15 + 527 0040 B540 lsls r5, r5, r6 + 528 .loc 1 344 34 view .LVU202 + 529 0042 24EA0504 bic r4, r4, r5 + 530 0046 40F82E40 str r4, [r0, lr, lsl #2] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 531 .loc 1 347 7 is_stmt 1 view .LVU203 + 532 .loc 1 347 12 is_stmt 0 view .LVU204 + 533 004a C468 ldr r4, [r0, #12] + 534 .loc 1 347 20 view .LVU205 + 535 004c 24EA0C04 bic r4, r4, ip + 536 0050 C460 str r4, [r0, #12] + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the default value IO Output Type */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 537 .loc 1 350 7 is_stmt 1 view .LVU206 + 538 .loc 1 350 12 is_stmt 0 view .LVU207 + 539 0052 4468 ldr r4, [r0, #4] + 540 .loc 1 350 22 view .LVU208 + 541 0054 24EA0202 bic r2, r4, r2 + 542 .LVL49: + 543 .loc 1 350 22 view .LVU209 + 544 0058 4260 str r2, [r0, #4] + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + ARM GAS /tmp/ccfeIJZX.s page 18 + + + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the default value for IO Speed */ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 545 .loc 1 353 7 is_stmt 1 view .LVU210 + 546 .loc 1 353 12 is_stmt 0 view .LVU211 + 547 005a 8268 ldr r2, [r0, #8] + 548 .loc 1 353 22 view .LVU212 + 549 005c 22EA0C02 bic r2, r2, ip + 550 0060 8260 str r2, [r0, #8] + 551 .L27: + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** position++; + 552 .loc 1 356 5 is_stmt 1 view .LVU213 + 553 .loc 1 356 13 is_stmt 0 view .LVU214 + 554 0062 0133 adds r3, r3, #1 + 555 .LVL50: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 556 .loc 1 312 33 is_stmt 1 view .LVU215 + 557 0064 31FA03F2 lsrs r2, r1, r3 + 558 0068 48D0 beq .L41 + 559 .LVL51: + 560 .L30: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 561 .loc 1 315 5 view .LVU216 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 562 .loc 1 315 35 is_stmt 0 view .LVU217 + 563 006a 0122 movs r2, #1 + 564 006c 9A40 lsls r2, r2, r3 + 565 .LVL52: + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 566 .loc 1 317 5 is_stmt 1 view .LVU218 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 567 .loc 1 317 8 is_stmt 0 view .LVU219 + 568 006e 12EA0107 ands r7, r2, r1 + 569 .LVL53: + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 570 .loc 1 317 8 view .LVU220 + 571 0072 F6D0 beq .L27 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 572 .loc 1 322 7 is_stmt 1 view .LVU221 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 573 .loc 1 322 37 is_stmt 0 view .LVU222 + 574 0074 4FEA930E lsr lr, r3, #2 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 575 .loc 1 322 11 view .LVU223 + 576 0078 0EF10205 add r5, lr, #2 + 577 007c 204C ldr r4, .L43 + 578 007e 54F82540 ldr r4, [r4, r5, lsl #2] + 579 .LVL54: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 580 .loc 1 323 7 is_stmt 1 view .LVU224 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 581 .loc 1 323 41 is_stmt 0 view .LVU225 + 582 0082 03F0030C and ip, r3, #3 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 583 .loc 1 323 29 view .LVU226 + 584 0086 4FEA8C0C lsl ip, ip, #2 + ARM GAS /tmp/ccfeIJZX.s page 19 + + + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 585 .loc 1 323 22 view .LVU227 + 586 008a 0F25 movs r5, #15 + 587 008c 05FA0CF6 lsl r6, r5, ip + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 588 .loc 1 323 11 view .LVU228 + 589 0090 3440 ands r4, r4, r6 + 590 .LVL55: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 591 .loc 1 324 7 is_stmt 1 view .LVU229 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 592 .loc 1 324 19 is_stmt 0 view .LVU230 + 593 0092 B0F1904F cmp r0, #1207959552 + 594 0096 BBD0 beq .L31 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 595 .loc 1 324 19 discriminator 1 view .LVU231 + 596 0098 1A4D ldr r5, .L43+4 + 597 009a A842 cmp r0, r5 + 598 009c 0DD0 beq .L32 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 599 .loc 1 324 19 discriminator 3 view .LVU232 + 600 009e 05F58065 add r5, r5, #1024 + 601 00a2 A842 cmp r0, r5 + 602 00a4 0BD0 beq .L33 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 603 .loc 1 324 19 discriminator 5 view .LVU233 + 604 00a6 05F58065 add r5, r5, #1024 + 605 00aa A842 cmp r0, r5 + 606 00ac 09D0 beq .L34 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 607 .loc 1 324 19 discriminator 7 view .LVU234 + 608 00ae 05F58065 add r5, r5, #1024 + 609 00b2 A842 cmp r0, r5 + 610 00b4 AAD0 beq .L42 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 611 .loc 1 324 19 discriminator 10 view .LVU235 + 612 00b6 0525 movs r5, #5 + 613 00b8 ABE7 b .L28 + 614 .L32: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 615 .loc 1 324 19 discriminator 4 view .LVU236 + 616 00ba 0125 movs r5, #1 + 617 00bc A9E7 b .L28 + 618 .L33: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 619 .loc 1 324 19 discriminator 6 view .LVU237 + 620 00be 0225 movs r5, #2 + 621 00c0 A7E7 b .L28 + 622 .L34: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 623 .loc 1 324 19 discriminator 8 view .LVU238 + 624 00c2 0325 movs r5, #3 + 625 00c4 A5E7 b .L28 + 626 .L40: + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 627 .loc 1 327 9 is_stmt 1 view .LVU239 + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + ARM GAS /tmp/ccfeIJZX.s page 20 + + + 628 .loc 1 327 13 is_stmt 0 view .LVU240 + 629 00c6 104C ldr r4, .L43+8 + 630 .LVL56: + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 631 .loc 1 327 13 view .LVU241 + 632 00c8 2568 ldr r5, [r4] + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 633 .loc 1 327 19 view .LVU242 + 634 00ca 25EA0705 bic r5, r5, r7 + 635 00ce 2560 str r5, [r4] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 636 .loc 1 328 9 is_stmt 1 view .LVU243 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 637 .loc 1 328 13 is_stmt 0 view .LVU244 + 638 00d0 6568 ldr r5, [r4, #4] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 639 .loc 1 328 19 view .LVU245 + 640 00d2 25EA0705 bic r5, r5, r7 + 641 00d6 6560 str r5, [r4, #4] + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 642 .loc 1 331 9 is_stmt 1 view .LVU246 + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 643 .loc 1 331 13 is_stmt 0 view .LVU247 + 644 00d8 E568 ldr r5, [r4, #12] + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 645 .loc 1 331 20 view .LVU248 + 646 00da 25EA0705 bic r5, r5, r7 + 647 00de E560 str r5, [r4, #12] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 648 .loc 1 332 9 is_stmt 1 view .LVU249 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 649 .loc 1 332 13 is_stmt 0 view .LVU250 + 650 00e0 A568 ldr r5, [r4, #8] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 651 .loc 1 332 20 view .LVU251 + 652 00e2 25EA0705 bic r5, r5, r7 + 653 00e6 A560 str r5, [r4, #8] + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 654 .loc 1 335 9 is_stmt 1 view .LVU252 + 655 .LVL57: + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 656 .loc 1 336 9 view .LVU253 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 657 .loc 1 336 23 is_stmt 0 view .LVU254 + 658 00e8 054F ldr r7, .L43 + 659 .LVL58: + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 660 .loc 1 336 23 view .LVU255 + 661 00ea 0EF10204 add r4, lr, #2 + 662 00ee 57F82450 ldr r5, [r7, r4, lsl #2] + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 663 .loc 1 336 40 view .LVU256 + 664 00f2 25EA0605 bic r5, r5, r6 + 665 00f6 47F82450 str r5, [r7, r4, lsl #2] + 666 00fa 8EE7 b .L29 + 667 .LVL59: + 668 .L41: + ARM GAS /tmp/ccfeIJZX.s page 21 + + + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 669 .loc 1 358 1 view .LVU257 + 670 00fc F0BD pop {r4, r5, r6, r7, pc} + 671 .LVL60: + 672 .L39: + 673 .cfi_def_cfa_offset 0 + 674 .cfi_restore 4 + 675 .cfi_restore 5 + 676 .cfi_restore 6 + 677 .cfi_restore 7 + 678 .cfi_restore 14 + 679 .loc 1 358 1 view .LVU258 + 680 00fe 7047 bx lr + 681 .L44: + 682 .align 2 + 683 .L43: + 684 0100 00000140 .word 1073807360 + 685 0104 00040048 .word 1207960576 + 686 0108 00040140 .word 1073808384 + 687 .cfi_endproc + 688 .LFE131: + 690 .section .text.HAL_GPIO_ReadPin,"ax",%progbits + 691 .align 1 + 692 .global HAL_GPIO_ReadPin + 693 .syntax unified + 694 .thumb + 695 .thumb_func + 697 HAL_GPIO_ReadPin: + 698 .LVL61: + 699 .LFB132: + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @} + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @verbatim + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** =============================================================================== + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ##### IO operation functions ##### + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** =============================================================================== + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @endverbatim + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Read the specified input port pin. + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to read. + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval The input port pin value. + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + ARM GAS /tmp/ccfeIJZX.s page 22 + + + 700 .loc 1 384 1 is_stmt 1 view -0 + 701 .cfi_startproc + 702 @ args = 0, pretend = 0, frame = 0 + 703 @ frame_needed = 0, uses_anonymous_args = 0 + 704 @ link register save eliminated. + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIO_PinState bitstatus; + 705 .loc 1 385 3 view .LVU260 + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 706 .loc 1 388 3 view .LVU261 + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 707 .loc 1 390 3 view .LVU262 + 708 .loc 1 390 12 is_stmt 0 view .LVU263 + 709 0000 0369 ldr r3, [r0, #16] + 710 .loc 1 390 5 view .LVU264 + 711 0002 1942 tst r1, r3 + 712 0004 01D0 beq .L47 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; + 713 .loc 1 392 15 view .LVU265 + 714 0006 0120 movs r0, #1 + 715 .LVL62: + 716 .loc 1 392 15 view .LVU266 + 717 0008 7047 bx lr + 718 .LVL63: + 719 .L47: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** else + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; + 720 .loc 1 396 15 view .LVU267 + 721 000a 0020 movs r0, #0 + 722 .LVL64: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** return bitstatus; + 723 .loc 1 398 3 is_stmt 1 view .LVU268 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 724 .loc 1 399 1 is_stmt 0 view .LVU269 + 725 000c 7047 bx lr + 726 .cfi_endproc + 727 .LFE132: + 729 .section .text.HAL_GPIO_WritePin,"ax",%progbits + 730 .align 1 + 731 .global HAL_GPIO_WritePin + 732 .syntax unified + 733 .thumb + 734 .thumb_func + 736 HAL_GPIO_WritePin: + 737 .LVL65: + 738 .LFB133: + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Set or clear the selected data port bit. + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify + ARM GAS /tmp/ccfeIJZX.s page 23 + + + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * the read and the modify access. + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param PinState specifies the value to be written to the selected bit. + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 739 .loc 1 418 1 is_stmt 1 view -0 + 740 .cfi_startproc + 741 @ args = 0, pretend = 0, frame = 0 + 742 @ frame_needed = 0, uses_anonymous_args = 0 + 743 @ link register save eliminated. + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 744 .loc 1 420 3 view .LVU271 + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); + 745 .loc 1 421 3 view .LVU272 + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if(PinState != GPIO_PIN_RESET) + 746 .loc 1 423 3 view .LVU273 + 747 .loc 1 423 5 is_stmt 0 view .LVU274 + 748 0000 0AB1 cbz r2, .L49 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 749 .loc 1 425 5 is_stmt 1 view .LVU275 + 750 .loc 1 425 17 is_stmt 0 view .LVU276 + 751 0002 8161 str r1, [r0, #24] + 752 0004 7047 bx lr + 753 .L49: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** else + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin; + 754 .loc 1 429 5 is_stmt 1 view .LVU277 + 755 .loc 1 429 16 is_stmt 0 view .LVU278 + 756 0006 8162 str r1, [r0, #40] + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 757 .loc 1 431 1 view .LVU279 + 758 0008 7047 bx lr + 759 .cfi_endproc + 760 .LFE133: + 762 .section .text.HAL_GPIO_TogglePin,"ax",%progbits + 763 .align 1 + 764 .global HAL_GPIO_TogglePin + 765 .syntax unified + 766 .thumb + 767 .thumb_func + 769 HAL_GPIO_TogglePin: + 770 .LVL66: + ARM GAS /tmp/ccfeIJZX.s page 24 + + + 771 .LFB134: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Toggle the specified GPIO pin. + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the pin to be toggled. + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 772 .loc 1 440 1 is_stmt 1 view -0 + 773 .cfi_startproc + 774 @ args = 0, pretend = 0, frame = 0 + 775 @ frame_needed = 0, uses_anonymous_args = 0 + 776 @ link register save eliminated. + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t odr; + 777 .loc 1 441 3 view .LVU281 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 778 .loc 1 444 3 view .LVU282 + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* get current Output Data Register value */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** odr = GPIOx->ODR; + 779 .loc 1 447 3 view .LVU283 + 780 .loc 1 447 7 is_stmt 0 view .LVU284 + 781 0000 4369 ldr r3, [r0, #20] + 782 .LVL67: + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Set selected pins that were at low level, and reset ones that were high */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 783 .loc 1 450 3 is_stmt 1 view .LVU285 + 784 .loc 1 450 23 is_stmt 0 view .LVU286 + 785 0002 01EA0302 and r2, r1, r3 + 786 .loc 1 450 59 view .LVU287 + 787 0006 21EA0301 bic r1, r1, r3 + 788 .LVL68: + 789 .loc 1 450 51 view .LVU288 + 790 000a 41EA0241 orr r1, r1, r2, lsl #16 + 791 .loc 1 450 15 view .LVU289 + 792 000e 8161 str r1, [r0, #24] + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 793 .loc 1 451 1 view .LVU290 + 794 0010 7047 bx lr + 795 .cfi_endproc + 796 .LFE134: + 798 .section .text.HAL_GPIO_LockPin,"ax",%progbits + 799 .align 1 + 800 .global HAL_GPIO_LockPin + 801 .syntax unified + 802 .thumb + 803 .thumb_func + 805 HAL_GPIO_LockPin: + 806 .LVL69: + 807 .LFB135: + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + ARM GAS /tmp/ccfeIJZX.s page 25 + + + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Lock GPIO Pins configuration registers. + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * until the next reset. + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bits to be locked. + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 808 .loc 1 465 1 is_stmt 1 view -0 + 809 .cfi_startproc + 810 @ args = 0, pretend = 0, frame = 8 + 811 @ frame_needed = 0, uses_anonymous_args = 0 + 812 @ link register save eliminated. + 813 .loc 1 465 1 is_stmt 0 view .LVU292 + 814 0000 82B0 sub sp, sp, #8 + 815 .cfi_def_cfa_offset 8 + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; + 816 .loc 1 466 3 is_stmt 1 view .LVU293 + 817 .loc 1 466 17 is_stmt 0 view .LVU294 + 818 0002 4FF48033 mov r3, #65536 + 819 0006 0193 str r3, [sp, #4] + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); + 820 .loc 1 469 3 is_stmt 1 view .LVU295 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 821 .loc 1 470 3 view .LVU296 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Apply lock key write sequence */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp |= GPIO_Pin; + 822 .loc 1 473 3 view .LVU297 + 823 .loc 1 473 7 is_stmt 0 view .LVU298 + 824 0008 019B ldr r3, [sp, #4] + 825 000a 0B43 orrs r3, r3, r1 + 826 000c 0193 str r3, [sp, #4] + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15U-0] */ + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 827 .loc 1 475 3 is_stmt 1 view .LVU299 + 828 .loc 1 475 15 is_stmt 0 view .LVU300 + 829 000e 019B ldr r3, [sp, #4] + 830 0010 C361 str r3, [r0, #28] + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15U-0] */ + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; + 831 .loc 1 477 3 is_stmt 1 view .LVU301 + 832 .loc 1 477 15 is_stmt 0 view .LVU302 + 833 0012 C161 str r1, [r0, #28] + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15U-0] */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 834 .loc 1 479 3 is_stmt 1 view .LVU303 + 835 .loc 1 479 15 is_stmt 0 view .LVU304 + 836 0014 019B ldr r3, [sp, #4] + 837 0016 C361 str r3, [r0, #28] + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */ + ARM GAS /tmp/ccfeIJZX.s page 26 + + + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp = GPIOx->LCKR; + 838 .loc 1 481 3 is_stmt 1 view .LVU305 + 839 .loc 1 481 14 is_stmt 0 view .LVU306 + 840 0018 C369 ldr r3, [r0, #28] + 841 .loc 1 481 7 view .LVU307 + 842 001a 0193 str r3, [sp, #4] + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* read again in order to confirm lock is active */ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u) + 843 .loc 1 484 2 is_stmt 1 view .LVU308 + 844 .loc 1 484 11 is_stmt 0 view .LVU309 + 845 001c C369 ldr r3, [r0, #28] + 846 .loc 1 484 4 view .LVU310 + 847 001e 13F4803F tst r3, #65536 + 848 0022 02D0 beq .L54 + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** return HAL_OK; + 849 .loc 1 486 12 view .LVU311 + 850 0024 0020 movs r0, #0 + 851 .LVL70: + 852 .L53: + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** else + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** return HAL_ERROR; + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 853 .loc 1 492 1 view .LVU312 + 854 0026 02B0 add sp, sp, #8 + 855 .cfi_remember_state + 856 .cfi_def_cfa_offset 0 + 857 @ sp needed + 858 0028 7047 bx lr + 859 .LVL71: + 860 .L54: + 861 .cfi_restore_state + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 862 .loc 1 490 12 view .LVU313 + 863 002a 0120 movs r0, #1 + 864 .LVL72: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 865 .loc 1 490 12 view .LVU314 + 866 002c FBE7 b .L53 + 867 .cfi_endproc + 868 .LFE135: + 870 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits + 871 .align 1 + 872 .weak HAL_GPIO_EXTI_Callback + 873 .syntax unified + 874 .thumb + 875 .thumb_func + 877 HAL_GPIO_EXTI_Callback: + 878 .LVL73: + 879 .LFB137: + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Handle EXTI interrupt request. + ARM GAS /tmp/ccfeIJZX.s page 27 + + + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief EXTI line detection callback. + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 880 .loc 1 515 1 is_stmt 1 view -0 + 881 .cfi_startproc + 882 @ args = 0, pretend = 0, frame = 0 + 883 @ frame_needed = 0, uses_anonymous_args = 0 + 884 @ link register save eliminated. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** UNUSED(GPIO_Pin); + 885 .loc 1 517 3 view .LVU316 + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* NOTE: This function should not be modified, when the callback is needed, + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 886 .loc 1 522 1 is_stmt 0 view .LVU317 + 887 0000 7047 bx lr + 888 .cfi_endproc + 889 .LFE137: + 891 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits + 892 .align 1 + 893 .global HAL_GPIO_EXTI_IRQHandler + 894 .syntax unified + 895 .thumb + 896 .thumb_func + 898 HAL_GPIO_EXTI_IRQHandler: + 899 .LVL74: + 900 .LFB136: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 901 .loc 1 500 1 is_stmt 1 view -0 + 902 .cfi_startproc + 903 @ args = 0, pretend = 0, frame = 0 + 904 @ frame_needed = 0, uses_anonymous_args = 0 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 905 .loc 1 500 1 is_stmt 0 view .LVU319 + 906 0000 08B5 push {r3, lr} + 907 .cfi_def_cfa_offset 8 + 908 .cfi_offset 3, -8 + 909 .cfi_offset 14, -4 + ARM GAS /tmp/ccfeIJZX.s page 28 + + + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 910 .loc 1 502 3 is_stmt 1 view .LVU320 + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 911 .loc 1 502 6 is_stmt 0 view .LVU321 + 912 0002 054B ldr r3, .L61 + 913 0004 5B69 ldr r3, [r3, #20] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 914 .loc 1 502 5 view .LVU322 + 915 0006 0342 tst r3, r0 + 916 0008 00D1 bne .L60 + 917 .LVL75: + 918 .L57: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 919 .loc 1 507 1 view .LVU323 + 920 000a 08BD pop {r3, pc} + 921 .LVL76: + 922 .L60: + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 923 .loc 1 504 5 is_stmt 1 view .LVU324 + 924 000c 024B ldr r3, .L61 + 925 000e 5861 str r0, [r3, #20] + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 926 .loc 1 505 5 view .LVU325 + 927 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback + 928 .LVL77: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 929 .loc 1 507 1 is_stmt 0 view .LVU326 + 930 0014 F9E7 b .L57 + 931 .L62: + 932 0016 00BF .align 2 + 933 .L61: + 934 0018 00040140 .word 1073808384 + 935 .cfi_endproc + 936 .LFE136: + 938 .text + 939 .Letext0: + 940 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 941 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 942 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 943 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 944 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + ARM GAS /tmp/ccfeIJZX.s page 29 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_gpio.c + /tmp/ccfeIJZX.s:21 .text.HAL_GPIO_Init:00000000 $t + /tmp/ccfeIJZX.s:27 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init + /tmp/ccfeIJZX.s:447 .text.HAL_GPIO_Init:000001b8 $d + /tmp/ccfeIJZX.s:455 .text.HAL_GPIO_DeInit:00000000 $t + /tmp/ccfeIJZX.s:461 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit + /tmp/ccfeIJZX.s:684 .text.HAL_GPIO_DeInit:00000100 $d + /tmp/ccfeIJZX.s:691 .text.HAL_GPIO_ReadPin:00000000 $t + /tmp/ccfeIJZX.s:697 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin + /tmp/ccfeIJZX.s:730 .text.HAL_GPIO_WritePin:00000000 $t + /tmp/ccfeIJZX.s:736 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin + /tmp/ccfeIJZX.s:763 .text.HAL_GPIO_TogglePin:00000000 $t + /tmp/ccfeIJZX.s:769 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin + /tmp/ccfeIJZX.s:799 .text.HAL_GPIO_LockPin:00000000 $t + /tmp/ccfeIJZX.s:805 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin + /tmp/ccfeIJZX.s:871 .text.HAL_GPIO_EXTI_Callback:00000000 $t + /tmp/ccfeIJZX.s:877 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback + /tmp/ccfeIJZX.s:892 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t + /tmp/ccfeIJZX.s:898 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler + /tmp/ccfeIJZX.s:934 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_gpio.o b/build/stm32f3xx_hal_gpio.o new file mode 100644 index 0000000..81cd448 Binary files /dev/null and b/build/stm32f3xx_hal_gpio.o differ diff --git a/build/stm32f3xx_hal_i2c.d b/build/stm32f3xx_hal_i2c.d new file mode 100644 index 0000000..4bf6bf6 --- /dev/null +++ b/build/stm32f3xx_hal_i2c.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_i2c.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_i2c.lst b/build/stm32f3xx_hal_i2c.lst new file mode 100644 index 0000000..eaa69b2 --- /dev/null +++ b/build/stm32f3xx_hal_i2c.lst @@ -0,0 +1,27414 @@ +ARM GAS /tmp/ccNVyn8W.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_i2c.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c" + 20 .section .text.I2C_Flush_TXDR,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 I2C_Flush_TXDR: + 27 .LVL0: + 28 .LFB195: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @file stm32f3xx_hal_i2c.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * functionalities of the Inter Integrated Circuit (I2C) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + Peripheral State and Errors functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ****************************************************************************** + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @attention + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * All rights reserved. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in the root directory of this software component. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ****************************************************************************** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================================================================== + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### How to use this driver ##### + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================================================================== + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The I2C HAL driver can be used as follows: + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: + ARM GAS /tmp/ccNVyn8W.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) Enable the I2Cx interface clock + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) I2C pins configuration + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Enable the clock for the I2C GPIOs + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure I2C pins as alternate function open-drain + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) NVIC configuration if you need to use interrupt process + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the I2Cx interrupt priority + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Enable the NVIC I2C IRQ Channel + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) DMA Configuration if you need to use DMA process + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Declare a DMA_HandleTypeDef handle structure for + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the transmit or receive channel + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Enable the DMAx interface clock using + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the DMA handle parameters + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the DMA Tx or Rx channel + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the DMA Tx or Rx channel + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addres + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level H + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceRead + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Polling mode IO operation *** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ================================= + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit( + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Polling mode IO MEM operation *** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ===================================== + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_W + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_ + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Interrupt mode IO operation *** + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =================================== + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Trans + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receiv + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmi + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + ARM GAS /tmp/ccNVyn8W.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_ + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Interrupt mode or DMA mode IO sequential operation *** + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ========================================================== + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (@) These interfaces allow to manage a sequential transfer with a repeated start condition + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** when a direction change during transfer + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) A specific option field manage the different steps of a sequential transfer + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Option field values are defined through I2C_XFEROPTIONS and are listed below: + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfac + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** no sequential mode + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start con + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and data to transfer without a final stop condition + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** start condition, address and data to transfer without a final stop cond + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** an then permit a call the same master sequential interface several time + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_D + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transfer + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if no direction change and without a final stop condition in both cases + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transfer + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if no direction change and with a final stop condition in both cases + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a re + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** after several call of the same master sequential interface several time + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (link with option I2C_FIRST_AND_NEXT_FRAME). + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Usage can, transfer several bytes one by one using + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** with option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Receive sequence permit to call the opposite interface Receive or Tra + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** without stopping the communication and so generate a restart conditio + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart c + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** each call of the same master sequential + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** interface. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Usage can, transfer several bytes one by one with a restart with slave + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** each bytes using + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + ARM GAS /tmp/ccNVyn8W.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** with option I2C_FIRST_FRAME then I2C_OTHER_FRAME. + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** generation of STOP condition. + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Different sequential I2C interfaces are listed below: + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT() or using HAL_I2C_Master_Seq_Transmit_DMA() + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is execut + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_MasterTxCpltC + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_A + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_DisableListen_IT() + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and users can + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code to check the Address Match Code and the transmission direction reques + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (Write/Read). + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and users can + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ListenCpltCallback() + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Transmit_IT() or using HAL_I2C_Slave_Seq_Transmit_DMA() + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is execute + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCa + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Receive_IT() or using HAL_I2C_Slave_Seq_Receive_DMA() + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed a + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Interrupt mode IO MEM operation *** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ======================================= + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Write_IT() + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Read_IT() + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** DMA mode IO operation *** + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================== + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA() + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + ARM GAS /tmp/ccNVyn8W.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Receive_DMA() + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Transmit_DMA() + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Receive_DMA() + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** DMA mode IO MEM operation *** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ================================= + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Write_DMA() + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Read_DMA() + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** I2C HAL driver macros list *** + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ================================== + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Below the list of most used macros in I2C HAL driver. + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE: Enable the I2C peripheral + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE: Disable the I2C peripheral + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Callback registration *** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================================= + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** allows the user to configure dynamically the driver callbacks. + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback() + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to register an interrupt callback. + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + ARM GAS /tmp/ccNVyn8W.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Function HAL_I2C_RegisterCallback() allows to register following callbacks: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and a pointer to the user callback function. + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCall + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Use function HAL_I2C_UnRegisterCallback to reset a callback to the default + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** weak function. + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and the Callback ID. + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This function allows to reset following callbacks: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback(). + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** all callbacks are set to the corresponding weak functions: + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback(). + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Exception done for MspInit and MspDeInit functions that are + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** these callbacks are null (not registered beforehand). + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit() + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit() + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Init() function. + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** not defined, the callback registration feature is not available and all callbacks + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** are set to the corresponding weak functions. + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Includes ------------------------------------------------------------------*/ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #include "stm32f3xx_hal.h" + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @addtogroup STM32F3xx_HAL_Driver + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C I2C + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C HAL module driver + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #ifdef HAL_I2C_MODULE_ENABLED + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private typedef -----------------------------------------------------------*/ + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define ------------------------------------------------------------*/ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Private_Define I2C Private Define + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define MAX_NBYTE_SIZE 255U + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define SLAVE_ADDR_SHIFT 7U + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define SLAVE_ADDR_MSK 0x06U + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define for @ref PreviousState usage */ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | \ + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_STATE_BUSY_RX) & \ + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Mask State define, keep only RX and TX bits */ + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Default Value */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Master Busy TX, combinaison of State LSB and Mode enum */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Master Busy RX, combinaison of State LSB and Mode enum */ + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ + ARM GAS /tmp/ccNVyn8W.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define to centralize the enable/disable of Interrupts */ + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_TX_IT (uint16_t)(0x0001U) /*!< Bit field can be combinated with + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_RX_IT (uint16_t)(0x0002U) /*!< Bit field can be combinated with + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_LISTEN_IT (uint16_t)(0x8000U) /*!< Bit field can be combinated with @ref I2 + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and @ref I2C_XFER_RX_IT */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_ERROR_IT (uint16_t)(0x0010U) /*!< Bit definition to manage addition of glo + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and NACK treatment */ + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_RELOAD_IT (uint16_t)(0x0040U) /*!< Bit definition to manage only Reload of + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define Sequential Transfer Options default/reset value */ + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_NO_OPTION_FRAME (0xFFFF0000U) + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private macros ------------------------------------------------------------*/ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @addtogroup I2C_Private_Macro + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Macro to get remaining data to transfer on DMA side */ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) __HAL_DMA_GET_COUNTER(__HANDLE__) + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private variables ---------------------------------------------------------*/ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function prototypes -----------------------------------------------*/ + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Private_Functions I2C Private Functions + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle DMA transfer */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma); + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + ARM GAS /tmp/ccNVyn8W.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c); + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c); + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions for I2C transfer IRQ handler */ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle flags during polling transfer */ + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart); + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to centralize the enable/disable of Interrupts */ + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to treat different error callback */ + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c); + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to flush TXDR register */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to handle start, restart or stop a transfer */ + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Request); + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to Convert Specific options */ + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); + ARM GAS /tmp/ccNVyn8W.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Exported functions --------------------------------------------------------*/ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions I2C Exported Functions + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Initialization and Configuration functions + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### Initialization and de-initialization functions ##### + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] This subsection provides a set of functions allowing to initialize and + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** deinitialize the I2Cx peripheral: + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) User must Implement HAL_I2C_MspInit() function in which he configures + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Call the function HAL_I2C_Init() to configure the selected device with + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the selected configuration: + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Clock Timing + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Own Address 1 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Addressing mode (Master, Slave) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Dual Addressing mode + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Own Address 2 + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Own Address 2 Mask + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) General call mode + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Nostretch mode + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Call the function HAL_I2C_DeInit() to restore the default configuration + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** of the selected I2Cx peripheral. + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Initializes the I2C according to the specified parameters + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in the I2C_InitTypeDef and initialize the associated handle. + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c == NULL) + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + ARM GAS /tmp/ccNVyn8W.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_RESET) + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Allocate lock resource and initialize it */ + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Lock = HAL_UNLOCKED; + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init the I2C Callback settings */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->MspInitCallback == NULL) + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */ + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback(hi2c); + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MspInit(hi2c); + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable the selected I2C peripheral */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Frequency range */ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Own Address1 before set the Own Address1 configuration */ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Own Address1 and ack own address1 mode */ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); + ARM GAS /tmp/ccNVyn8W.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx CR2 Configuration ----------------------*/ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Addressing Master mode */ + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 = (I2C_CR2_ADD10); + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Own Address2 before set the Own Address2 configuration */ + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Dual mode and Own Address2 */ + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx CR1 Configuration ----------------------*/ + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Generalcall and NoStretch mode */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the selected I2C peripheral */ + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_ENABLE(hi2c); + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DeInitialize the I2C peripheral. + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c == NULL) + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable the I2C Peripheral Clock */ + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->MspDeInitCallback == NULL) + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */ + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback(hi2c); + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MspDeInit(hi2c); + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Release Lock */ + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Initialize the I2C MSP. + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MspInit could be implemented in the user file + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DeInitialize the I2C MSP. + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MspDeInit could be implemented in the user file + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + ARM GAS /tmp/ccNVyn8W.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Register a User I2C Callback + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * To be used instead of the weak predefined callback + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note The HAL_I2C_RegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_RES + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * to register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param CallbackID ID of the callback to be registered + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pCallback pointer to the Callback function + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Callb + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** pI2C_CallbackTypeDef pCallback) + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (pCallback == NULL) + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = pCallback; + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = pCallback; + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback; + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = pCallback; + ARM GAS /tmp/ccNVyn8W.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback = pCallback; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback = pCallback; + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback = pCallback; + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback = pCallback; + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback = pCallback; + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + ARM GAS /tmp/ccNVyn8W.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Unregister an I2C Callback + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * I2C callback is redirected to the weak predefined callback + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note The HAL_I2C_UnRegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_R + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * to un-register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param CallbackID ID of the callback to be unregistered + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Cal + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallb + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallba + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + ARM GAS /tmp/ccNVyn8W.s page 17 + + + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallba + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallbac + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + ARM GAS /tmp/ccNVyn8W.s page 18 + + + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Register the Slave Address Match I2C Callback + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pCallback pointer to the Address Match Callback function + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pC + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (pCallback == NULL) + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback = pCallback; + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief UnRegister the Slave Address Match I2C Callback + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined cal + ARM GAS /tmp/ccNVyn8W.s page 19 + + +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c) +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */ +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Data transfers functions +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### IO operation functions ##### +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This subsection provides a set of functions allowing to manage the I2C data +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transfers. +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) There are two modes of transfer: +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Blocking mode : The communication is performed in the polling mode. +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The status of all data processing is returned by the same function +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** after finishing transfer. +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) No-Blocking mode : The communication is performed using Interrupts +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or DMA. These functions return the status of the transfer startup. +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The end of the data processing will be indicated through the +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** using DMA mode. +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Blocking mode functions are : +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit() +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive() +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write() + ARM GAS /tmp/ccNVyn8W.s page 20 + + +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read() +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_IsDeviceReady() +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) No-Blocking mode functions with Interrupt are : +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_IT() +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_IT() +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_IT() +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_IT() +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_IT() +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_IT() +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_IT() +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_IT() +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_IT() +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_IT() +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_EnableListen_IT() +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_DisableListen_IT() +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Abort_IT() +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) No-Blocking mode functions with DMA are : +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_DMA() +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_DMA() +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_DMA() +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_DMA() +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_DMA() +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_DMA() +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_DMA() +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_DMA() +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_DMA() +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_DMA() +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MasterTxCpltCallback() +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MasterRxCpltCallback() +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_SlaveTxCpltCallback() +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_SlaveRxCpltCallback() +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MemTxCpltCallback() +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MemRxCpltCallback() +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_AddrCallback() +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_ListenCpltCallback() +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_ErrorCallback() +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_AbortCpltCallback() +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmits in master mode an amount of data in blocking mode. +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + ARM GAS /tmp/ccNVyn8W.s page 21 + + +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pD +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + ARM GAS /tmp/ccNVyn8W.s page 22 + + +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receives in master mode an amount of data in blocking mode. +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface + ARM GAS /tmp/ccNVyn8W.s page 23 + + +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pDa +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; + ARM GAS /tmp/ccNVyn8W.s page 24 + + +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 25 + + +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmits in slave mode an amount of data in blocking mode. +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout) +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 26 + + +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If 10bit addressing mode is selected */ +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until AF flag is set */ +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ + ARM GAS /tmp/ccNVyn8W.s page 27 + + +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear AF flag */ +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP flag */ +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in blocking mode +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout) +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + ARM GAS /tmp/ccNVyn8W.s page 28 + + +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until DIR flag is reset Receiver mode */ +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; + ARM GAS /tmp/ccNVyn8W.s page 29 + + +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP flag */ +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 30 + + +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRIT +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 31 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t * +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + ARM GAS /tmp/ccNVyn8W.s page 32 + + +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 33 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 34 + + +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with DMA +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + ARM GAS /tmp/ccNVyn8W.s page 35 + + +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance-> +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 36 + + +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 37 + + +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with DMA +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; + ARM GAS /tmp/ccNVyn8W.s page 38 + + +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART * +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 39 + + +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ + ARM GAS /tmp/ccNVyn8W.s page 40 + + +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccNVyn8W.s page 41 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 42 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with DMA +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 43 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Write an amount of data in blocking mode to a specific memory address +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address + ARM GAS /tmp/ccNVyn8W.s page 44 + + +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddre +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Ti +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 45 + + +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); + ARM GAS /tmp/ccNVyn8W.s page 46 + + +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Read an amount of data in blocking mode from a specific memory address +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddres +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Tim +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + ARM GAS /tmp/ccNVyn8W.s page 47 + + +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_ +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 48 + + +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, +2655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory addres +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 49 + + +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_W +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ + ARM GAS /tmp/ccNVyn8W.s page 50 + + +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory addre +2781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAdd +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 51 + + +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_ +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, (I2C_XFER_TX_IT | I2C_XFER_RX_IT)); +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemA +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 52 + + +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ + ARM GAS /tmp/ccNVyn8W.s page 53 + + +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +2955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 54 + + +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be read +3022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +3031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 55 + + +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +3070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +3073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +3076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +3082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 56 + + +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_STAR +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Checks if target device is ready for communication. +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This function is used with Memory devices +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Trials Number of trials + ARM GAS /tmp/ccNVyn8W.s page 57 + + +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +3167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Tria +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout) +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __IO uint32_t I2C_Trials = 0UL; +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp1; +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp2; +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do +3193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Start */ +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); +3196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is set or a NACK flag is set*/ +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while ((tmp1 == RESET) && (tmp2 == RESET)) +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 58 + + +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if the NACKF flag has not been set */ +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Device is ready */ +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag, auto generated with autoend*/ +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if the maximum allowed number of trials has been reached */ +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_Trials == Trials) +3264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Trials */ +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Trials++; + ARM GAS /tmp/ccNVyn8W.s page 59 + + +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (I2C_Trials < Trials); +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Inte +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) + ARM GAS /tmp/ccNVyn8W.s page 60 + + +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA. +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + ARM GAS /tmp/ccNVyn8W.s page 61 + + +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uin +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); + ARM GAS /tmp/ccNVyn8W.s page 62 + + +3451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance-> +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +3476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); + ARM GAS /tmp/ccNVyn8W.s page 63 + + +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Inter +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface + ARM GAS /tmp/ccNVyn8W.s page 64 + + +3565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8 +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 65 + + +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA +3647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + ARM GAS /tmp/ccNVyn8W.s page 66 + + +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +3730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +3731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccNVyn8W.s page 67 + + +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +3788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccNVyn8W.s page 68 + + +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +3824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 69 + + +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +3887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* REnable ADDR interrupt */ +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 70 + + +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; + ARM GAS /tmp/ccNVyn8W.s page 71 + + +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +3975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ + ARM GAS /tmp/ccNVyn8W.s page 72 + + +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +4026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +4029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +4030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset XferSize */ +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 0; +4053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccNVyn8W.s page 73 + + +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +4103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Si +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +4112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ + ARM GAS /tmp/ccNVyn8W.s page 74 + + +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + ARM GAS /tmp/ccNVyn8W.s page 75 + + +4192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +4212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +4215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 76 + + +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; + ARM GAS /tmp/ccNVyn8W.s page 77 + + +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, +4313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); +4314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset XferSize */ +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 0; +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccNVyn8W.s page 78 + + +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Enable the Address listen mode with Interrupt. +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the Address Match interrupt */ +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Disable the Address listen mode with Interrupt. +4407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C +4409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp; +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address listen mode only if a transfer is not ongoing */ +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +4418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; + ARM GAS /tmp/ccNVyn8W.s page 79 + + +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable the Address Match interrupt */ +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +4433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Abort a master I2C IT or DMA process communication with Interrupt. +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +4441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +4456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +4458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +4461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +4465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set State at HAL_I2C_STATE_ABORT */ +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_ABORT; +4469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfe +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); +4473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 80 + + +4477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +4481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong usage of abort function */ +4487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This function should be used only in case of abort monitored by master device */ +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks +4497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +4498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C event interrupt request. +4502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) /* Derogation MISRAC2012-Rule-8.13 */ +4507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C events treatment -------------------------------------*/ +4513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferISR != NULL) +4514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C error interrupt request. +4521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) +4526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; +4530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C Bus error interrupt occurred ------------------------------------*/ +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ +4533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + ARM GAS /tmp/ccNVyn8W.s page 81 + + +4534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; +4536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear BERR flag */ +4538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +4539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ +4543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; +4546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear OVR flag */ +4548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +4549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ +4553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; +4556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ARLO flag */ +4558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +4559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +4562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +4563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Error Callback in case of Error detected */ +4565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_ +4566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, tmperror); +4568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. +4573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MasterTxCpltCallback could be implemented in the user file +4584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master Rx Transfer completed callback. +4589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + ARM GAS /tmp/ccNVyn8W.s page 82 + + +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +4594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MasterRxCpltCallback could be implemented in the user file +4600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @brief Slave Tx Transfer completed callback. +4604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) +4609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file +4615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Slave Rx Transfer completed callback. +4620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) +4625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file +4631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Slave Address Match callback. +4636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFE +4639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param AddrMatchCode Address Match Code +4640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrM +4643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(TransferDirection); +4647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(AddrMatchCode); + ARM GAS /tmp/ccNVyn8W.s page 83 + + +4648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_AddrCallback() could be implemented in the user file +4651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Listen Complete callback. +4656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_ListenCpltCallback() could be implemented in the user file +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Memory Tx Transfer completed callback. +4672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MemTxCpltCallback could be implemented in the user file +4683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. +4688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) +4693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MemRxCpltCallback could be implemented in the user file +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C error callback. +4704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + ARM GAS /tmp/ccNVyn8W.s page 84 + + +4705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +4709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_ErrorCallback could be implemented in the user file +4715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C abort callback. +4720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) +4725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_AbortCpltCallback could be implemented in the user file +4731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions +4739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Peripheral State, Mode and Error functions +4740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim +4742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +4743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### +4744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +4745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] +4746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This subsection permit to get in run-time the status of the peripheral +4747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and the data flow. +4748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim +4750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +4751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Return the I2C handle state. +4755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL state +4758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c) +4760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return I2C handle state */ + ARM GAS /tmp/ccNVyn8W.s page 85 + + +4762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->State; +4763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Returns the I2C Master, Slave, Memory or no mode. +4767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for I2C module +4769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL mode +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c) +4772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->Mode; +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Return the I2C error code. +4778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval I2C Error Code +4781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c) +4783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->ErrorCode; +4785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @addtogroup I2C_Private_Functions +4796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +4797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. +4801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +4808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +4809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +4817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +4818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 86 + + +4819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +4820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +4823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +4828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +4831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +4832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +4840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +4841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +4844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +4846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +4847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +4852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +4853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +4855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +4856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +4858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +4859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +4861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +4863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +4865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +4867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START +4868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +4873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +4875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + ARM GAS /tmp/ccNVyn8W.s page 87 + + +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +4880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +4881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +4895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +4901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +4902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +4904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +4908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +4909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +4911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +4912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +4923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +4930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ + ARM GAS /tmp/ccNVyn8W.s page 88 + + +4933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +4934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +4936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +4937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with Interrupt. +4947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +4954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +4955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +4963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +4964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +4977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +4978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +4986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +4987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +4989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/ccNVyn8W.s page 89 + + +4990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +4992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +4993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Memaddress == 0xFFFFFFFFU) +4995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +5000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +5011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +5015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +5018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +5040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 90 + + +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +5074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. +5084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process locked */ +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if STOPF is set */ +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave complete process */ + ARM GAS /tmp/ccNVyn8W.s page 91 + + +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, tmpITFlags); +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +5108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean XferCount == 0*/ +5113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +5124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +5158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > 0U) + ARM GAS /tmp/ccNVyn8W.s page 92 + + +5161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +5166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount == 0U) && \ +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +5174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, tmpITFlags); +5183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +5185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR only if XferCount not reach "0" */ +5188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* A TXIS flag can be set, during STOP treatment */ +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if all Data have already been sent */ +5190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ +5191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +5195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +5197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +5205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccNVyn8W.s page 93 + + +5218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. +5225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; +5235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +5236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable TC interrupt */ +5261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); +5262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Recover Slave address */ +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +5267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +5273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + ARM GAS /tmp/ccNVyn8W.s page 94 + + +5275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +5280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +5284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the new XferSize in Nbytes register */ +5288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +5294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +5306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +5328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +5330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +5331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 95 + + +5332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with DMA. +5365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +5375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ + ARM GAS /tmp/ccNVyn8W.s page 96 + + +5389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TXIS) != RESET) && \ +5397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +5403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable only Error interrupt */ +5409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +5410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +5431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 97 + + +5446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + ARM GAS /tmp/ccNVyn8W.s page 98 + + +5503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. +5504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t treatdmanack = 0U; +5515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; +5516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process locked */ +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if STOPF is set */ +5521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); +5526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean XferCount == 0 */ +5534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || +5536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Split check of hdmarx, for MISRA compliance */ +5539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) +5544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** treatdmanack = 1U; +5546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Split check of hdmatx, for MISRA compliance */ +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) +5554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx) == 0U) +5556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** treatdmanack = 1U; +5558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 99 + + +5560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (treatdmanack == 1U) +5563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); +5570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAM +5572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store current hi2c->State, solve MISRA2012-Rule-13.5 */ +5599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpstate = hi2c->State; +5600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +5604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN +5608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +5614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ + ARM GAS /tmp/ccNVyn8W.s page 100 + + +5617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Only Clear NACK Flag, no DMA treatment is pending */ +5624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ +5628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, ITFlags); +5631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for write reques +5645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +5650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +5652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +5653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t +5657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +5658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI +5660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Memory Address */ +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ + ARM GAS /tmp/ccNVyn8W.s page 101 + + +5674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) +5691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for read request +5700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +5705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +5707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +5708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T +5712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR +5715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Memory Address */ +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 102 + + +5731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TC flag is set */ +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) +5746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Address complete process callback. +5755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +5756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +5758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint8_t transferdirection; +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t slaveaddrcode; +5763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd1code; +5764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd2code; +5765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(ITFlags); +5768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* In case of Listen state, need to inform upper layer of address match code event */ +5770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +5771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transferdirection = I2C_GET_DIR(hi2c); +5773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); +5776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If 10bits addressing mode is selected */ +5778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +5779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) +5781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = ownadd1code; +5783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrEventCount++; +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) +5785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Address Event counter */ +5787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrEventCount = 0U; + ARM GAS /tmp/ccNVyn8W.s page 103 + + +5788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +5790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Slave Addr callback */ +5796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = ownadd2code; +5806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +5808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +5809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Slave Addr callback */ +5814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else 7 bits addressing mode is selected */ +5822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +5826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Slave Addr callback */ +5831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Else clear address flag only */ +5839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +5842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccNVyn8W.s page 104 + + +5845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Master sequential complete process. +5851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +5852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +5853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c) +5855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No Generate Stop, to permit restart mode */ +5860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +5862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +5865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +5866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +5868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +5876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +5878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +5881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +5885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +5886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +5896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +5898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 105 + + +5902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Slave sequential complete process. +5904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +5905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +5906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) +5908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +5910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +5916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +5918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +5919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +5921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +5923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +5928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +5931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +5937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +5945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +5947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +5951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ +5953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +5957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 106 + + +5959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +5965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +5967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Master complete process. +5977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +5978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +5980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; +5984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __IO uint32_t tmpreg; +5986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +5988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +5989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +5992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +5995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +6000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ +6010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) +6014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ + ARM GAS /tmp/ccNVyn8W.s page 107 + + +6016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set acknowledge error code */ +6019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Fetch Last receive data if any */ +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) && (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET)) +6024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpreg = (uint8_t)hi2c->Instance->RXDR; +6027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); +6028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +6034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +6035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE)) +6038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback(hi2c); +6058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MemTxCpltCallback(hi2c); +6060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +6072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else + ARM GAS /tmp/ccNVyn8W.s page 108 + + +6073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +6074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +6078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback(hi2c); +6093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MemRxCpltCallback(hi2c); +6095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +6107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +6109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +6115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Slave complete process. +6120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +6127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 109 + + +6130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +6134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +6135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +6137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +6138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +6142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +6143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +6159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +6160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); +6167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +6170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); +6177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +6185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) +6186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 110 + + +6187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +6188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +6189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +6195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +6199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +6200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* All data are not transferred, so set error code accordingly */ +6204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +6205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) +6214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +6220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +6222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +6223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +6226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Sequential Complete callback, to inform upper layer of the end of Transfer */ +6228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 111 + + +6244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +6256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +6258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +6271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +6273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Listen complete process. +6279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +6293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) +6294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +6299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +6300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 112 + + +6301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +6304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +6305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable all Interrupts*/ +6312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +6315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C interrupts error process. +6330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ErrorCode Error code to handle. +6332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) +6335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmppreviousstate; +6339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; +6344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set new error code */ +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= ErrorCode; +6347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +6349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_LISTEN) || +6350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || +6351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable all interrupts, except interrupts related to LISTEN state */ +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* keep HAL_I2C_STATE_LISTEN if set */ +6357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; + ARM GAS /tmp/ccNVyn8W.s page 113 + + +6358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +6359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable all interrupts */ +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If state is an abort treatment on going, don't change state */ +6369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This change will be do later */ +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State != HAL_I2C_STATE_ABORT) +6371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set HAL_I2C_STATE_READY */ +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX transfer if any */ +6393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmppreviousstate = hi2c->PreviousState; +6394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ +6396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) +6397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +6399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) +6404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +6408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +6413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +6414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 114 + + +6415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +6417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX transfer if any */ +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ +6426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) +6427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +6429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) +6434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +6438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +6443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +6444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +6447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Error callback treatment. +6462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) +6468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 115 + + +6472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback(hi2c); +6478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); +6480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback(hi2c); +6492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); +6494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Tx data register flush process. +6500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) +6504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 29 .loc 1 6504 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. +6505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If a pending TXIS flag is set */ +6506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write a dummy data in TXDR to clear it */ +6507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) + 34 .loc 1 6507 3 view .LVU1 + 35 .loc 1 6507 7 is_stmt 0 view .LVU2 + 36 0000 0368 ldr r3, [r0] + 37 0002 9A69 ldr r2, [r3, #24] + 38 .loc 1 6507 6 view .LVU3 + 39 0004 12F0020F tst r2, #2 + 40 0008 01D0 beq .L2 +6508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = 0x00U; + 41 .loc 1 6509 5 is_stmt 1 view .LVU4 + 42 .loc 1 6509 26 is_stmt 0 view .LVU5 + 43 000a 0022 movs r2, #0 + 44 000c 9A62 str r2, [r3, #40] + 45 .L2: +6510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 116 + + +6512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register if not empty */ +6513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) + 46 .loc 1 6513 3 is_stmt 1 view .LVU6 + 47 .loc 1 6513 7 is_stmt 0 view .LVU7 + 48 000e 0368 ldr r3, [r0] + 49 0010 9A69 ldr r2, [r3, #24] + 50 .loc 1 6513 6 view .LVU8 + 51 0012 12F0010F tst r2, #1 + 52 0016 03D1 bne .L1 +6514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); + 53 .loc 1 6515 5 is_stmt 1 view .LVU9 + 54 0018 9A69 ldr r2, [r3, #24] + 55 001a 42F00102 orr r2, r2, #1 + 56 001e 9A61 str r2, [r3, #24] + 57 .L1: +6516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 58 .loc 1 6517 1 is_stmt 0 view .LVU10 + 59 0020 7047 bx lr + 60 .cfi_endproc + 61 .LFE195: + 63 .section .text.I2C_TransferConfig,"ax",%progbits + 64 .align 1 + 65 .syntax unified + 66 .thumb + 67 .thumb_func + 69 I2C_TransferConfig: + 70 .LVL1: + 71 .LFB207: +6518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C master transmit process complete callback. +6521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) +6525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupt */ +6536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Buffer pointer */ +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the XferSize to transfer */ + ARM GAS /tmp/ccNVyn8W.s page 117 + + +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +6556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +6564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C slave transmit process complete callback. +6572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) +6576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +6582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +6587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C master receive process complete callback. +6601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle + ARM GAS /tmp/ccNVyn8W.s page 118 + + +6602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupt */ +6616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Buffer pointer */ +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the XferSize to transfer */ +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, +6636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +6644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C slave receive process complete callback. +6652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) +6656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); + ARM GAS /tmp/ccNVyn8W.s page 119 + + +6659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) && \ +6662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +6663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C communication error callback. +6681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma) +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Acknowledge */ +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C communication abort callback +6699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * (To be called at end of DMA Abort procedure). +6700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle. +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) +6704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset AbortCpltCallback */ +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +6712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + ARM GAS /tmp/ccNVyn8W.s page 120 + + +6716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout. It waits +6724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * until a flag is no longer in the specified status. +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +6727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Flag Specifies the I2C flag to check. +6728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Status The actual Flag status (SET or RESET). +6729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +6730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +6731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +6732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta +6734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart) +6735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) +6737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) +6744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. +6761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +6763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +6764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +6765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +6766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) +6771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ + ARM GAS /tmp/ccNVyn8W.s page 121 + + +6773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +6774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) +6784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. +6802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +6804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +6805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +6807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +6812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +6815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) +6823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccNVyn8W.s page 122 + + +6830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. +6840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +6842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +6843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +6844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +6845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +6848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) +6850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ +6852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +6853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an RXNE is pending */ +6861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) +6863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return HAL_OK */ +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* The Reading of data from RXDR will be done in caller function */ +6866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +6867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; +6874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +6878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccNVyn8W.s page 123 + + +6887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) +6900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +6908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +6912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles errors detection during an I2C Communication. +6916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +6918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +6919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +6920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +6921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Ti +6923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +6925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; +6926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; +6927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart = Tickstart; +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp1; +6929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; +6930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) +6932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACKF Flag */ +6934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOP Flag is set or timeout occurred */ +6937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) +6939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +6941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) + ARM GAS /tmp/ccNVyn8W.s page 124 + + +6944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); +6946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; +6947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* In case of I2C still busy, try to regenerate a STOP manually */ +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ +6950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ +6951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) +6952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +6954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +6955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Tick with new reference */ +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +6958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +6961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) +6964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_TIMEOUT; +6966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +6968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; +6970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* In case STOP Flag is detected, clear it */ +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (status == HAL_OK) +6978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_AF; +6984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +6986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Refresh Content of Status register */ +6989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** itflag = hi2c->Instance->ISR; +6990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Then verify if an additional errors occurs */ +6992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if a Bus error occurred */ +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) +6994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_BERR; +6996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear BERR flag */ +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + ARM GAS /tmp/ccNVyn8W.s page 125 + + +7001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an Over-Run/Under-Run error occurred */ +7004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) +7005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_OVR; +7007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear OVR flag */ +7009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an Arbitration Loss error occurred */ +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) +7016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_ARLO; +7018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ARLO flag */ +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +7021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (status != HAL_OK) +7026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +7028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +7029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +7031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +7032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= error_code; +7034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag ar +7046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +7047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Specifies the slave address to be programmed. +7048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Specifies the number of bytes to be programmed. +7049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter must be a value between 0 and 255. +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. +7051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: +7052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . +7053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. +7054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. +7055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Request New state of the I2C START condition generation. +7056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: +7057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. + ARM GAS /tmp/ccNVyn8W.s page 126 + + +7058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). +7059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. +7060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. +7061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t +7064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Request) +7065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 72 .loc 1 7065 1 is_stmt 1 view -0 + 73 .cfi_startproc + 74 @ args = 4, pretend = 0, frame = 0 + 75 @ frame_needed = 0, uses_anonymous_args = 0 + 76 @ link register save eliminated. + 77 .loc 1 7065 1 is_stmt 0 view .LVU12 + 78 0000 10B4 push {r4} + 79 .cfi_def_cfa_offset 4 + 80 .cfi_offset 4, -4 + 81 0002 019C ldr r4, [sp, #4] +7066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +7067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 82 .loc 1 7067 3 is_stmt 1 view .LVU13 +7068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_TRANSFER_MODE(Mode)); + 83 .loc 1 7068 3 view .LVU14 +7069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_TRANSFER_REQUEST(Request)); + 84 .loc 1 7069 3 view .LVU15 +7070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +7072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 85 .loc 1 7072 3 view .LVU16 + 86 .loc 1 7072 52 is_stmt 0 view .LVU17 + 87 0004 C1F30901 ubfx r1, r1, #0, #10 + 88 .LVL2: + 89 .loc 1 7072 68 view .LVU18 + 90 0008 41EA0241 orr r1, r1, r2, lsl #16 +7073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 91 .loc 1 7073 88 view .LVU19 + 92 000c 1943 orrs r1, r1, r3 +7072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 93 .loc 1 7072 19 view .LVU20 + 94 000e 2143 orrs r1, r1, r4 +7072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 95 .loc 1 7072 12 view .LVU21 + 96 0010 21F00041 bic r1, r1, #-2147483648 + 97 .LVL3: +7074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); +7075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* update CR2 register */ +7077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** MODIFY_REG(hi2c->Instance->CR2, \ + 98 .loc 1 7077 3 is_stmt 1 view .LVU22 + 99 0014 0268 ldr r2, [r0] + 100 .LVL4: + 101 .loc 1 7077 3 is_stmt 0 view .LVU23 + 102 0016 5368 ldr r3, [r2, #4] + 103 .LVL5: + 104 .loc 1 7077 3 view .LVU24 + 105 0018 640D lsrs r4, r4, #21 + 106 001a 04F48064 and r4, r4, #1024 + ARM GAS /tmp/ccNVyn8W.s page 127 + + + 107 001e 44F07F74 orr r4, r4, #66846720 + 108 0022 44F45834 orr r4, r4, #221184 + 109 0026 44F47F74 orr r4, r4, #1020 + 110 002a 44F00304 orr r4, r4, #3 + 111 002e 23EA0403 bic r3, r3, r4 + 112 0032 0B43 orrs r3, r3, r1 + 113 0034 5360 str r3, [r2, #4] +7078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ +7079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_CR2_START | I2C_CR2_STOP)), tmp); +7081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 114 .loc 1 7081 1 view .LVU25 + 115 0036 5DF8044B ldr r4, [sp], #4 + 116 .cfi_restore 4 + 117 .cfi_def_cfa_offset 0 + 118 .LVL6: + 119 .loc 1 7081 1 view .LVU26 + 120 003a 7047 bx lr + 121 .cfi_endproc + 122 .LFE207: + 124 .section .text.I2C_Enable_IRQ,"ax",%progbits + 125 .align 1 + 126 .syntax unified + 127 .thumb + 128 .thumb_func + 130 I2C_Enable_IRQ: + 131 .LVL7: + 132 .LFB208: +7082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Manage the enabling of Interrupts. +7085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 133 .loc 1 7091 1 is_stmt 1 view -0 + 134 .cfi_startproc + 135 @ args = 0, pretend = 0, frame = 0 + 136 @ frame_needed = 0, uses_anonymous_args = 0 + 137 @ link register save eliminated. +7092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 138 .loc 1 7092 3 view .LVU28 +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferISR != I2C_Master_ISR_DMA) && \ + 139 .loc 1 7094 3 view .LVU29 + 140 .loc 1 7094 12 is_stmt 0 view .LVU30 + 141 0000 426B ldr r2, [r0, #52] + 142 .loc 1 7094 6 view .LVU31 + 143 0002 294B ldr r3, .L28 + 144 0004 9A42 cmp r2, r3 + 145 0006 24D0 beq .L7 + 146 .loc 1 7094 45 discriminator 1 view .LVU32 + 147 0008 284B ldr r3, .L28+4 + 148 000a 9A42 cmp r2, r3 + ARM GAS /tmp/ccNVyn8W.s page 128 + + + 149 000c 21D0 beq .L7 +7095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->XferISR != I2C_Slave_ISR_DMA) && \ + 150 .loc 1 7095 44 view .LVU33 + 151 000e 284B ldr r3, .L28+8 + 152 0010 9A42 cmp r2, r3 + 153 0012 1ED0 beq .L7 +7096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->XferISR != I2C_Mem_ISR_DMA)) +7097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 154 .loc 1 7098 5 is_stmt 1 view .LVU34 + 155 .loc 1 7098 8 is_stmt 0 view .LVU35 + 156 0014 11F4004F tst r1, #32768 + 157 0018 13D1 bne .L18 +7092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 158 .loc 1 7092 12 view .LVU36 + 159 001a 0023 movs r3, #0 + 160 .L8: + 161 .LVL8: +7099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 162 .loc 1 7104 5 is_stmt 1 view .LVU37 + 163 .loc 1 7104 8 is_stmt 0 view .LVU38 + 164 001c 11F0010F tst r1, #1 + 165 0020 01D0 beq .L9 +7105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 166 .loc 1 7107 7 is_stmt 1 view .LVU39 + 167 .loc 1 7107 14 is_stmt 0 view .LVU40 + 168 0022 43F0F203 orr r3, r3, #242 + 169 .LVL9: + 170 .L9: +7108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 171 .loc 1 7110 5 is_stmt 1 view .LVU41 + 172 .loc 1 7110 8 is_stmt 0 view .LVU42 + 173 0026 11F0020F tst r1, #2 + 174 002a 01D0 beq .L10 +7111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 175 .loc 1 7113 7 is_stmt 1 view .LVU43 + 176 .loc 1 7113 14 is_stmt 0 view .LVU44 + 177 002c 43F0F403 orr r3, r3, #244 + 178 .LVL10: + 179 .L10: +7114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 180 .loc 1 7116 5 is_stmt 1 view .LVU45 + 181 .loc 1 7116 8 is_stmt 0 view .LVU46 + 182 0030 1029 cmp r1, #16 + ARM GAS /tmp/ccNVyn8W.s page 129 + + + 183 0032 08D0 beq .L23 + 184 .L11: +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 185 .loc 1 7122 5 is_stmt 1 view .LVU47 + 186 .loc 1 7122 8 is_stmt 0 view .LVU48 + 187 0034 2029 cmp r1, #32 + 188 0036 09D0 beq .L24 + 189 .L21: +7123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupts */ +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +7126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +7130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) +7138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; +7147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) +7150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupts */ +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); +7159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferISR != I2C_Mem_ISR_DMA) && (InterruptRequest == I2C_XFER_RELOAD_IT)) +7162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +7164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 130 + + +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable interrupts only at the end */ +7169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* to avoid the risk of I2C interrupt handle execution before */ +7170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* all interrupts requested done */ +7171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_ENABLE_IT(hi2c, tmpisr); + 190 .loc 1 7171 3 is_stmt 1 view .LVU49 + 191 0038 0168 ldr r1, [r0] + 192 .LVL11: + 193 .loc 1 7171 3 is_stmt 0 view .LVU50 + 194 003a 0A68 ldr r2, [r1] + 195 003c 1343 orrs r3, r3, r2 + 196 .LVL12: + 197 .loc 1 7171 3 view .LVU51 + 198 003e 0B60 str r3, [r1] + 199 0040 7047 bx lr + 200 .LVL13: + 201 .L18: +7101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 202 .loc 1 7101 14 view .LVU52 + 203 0042 B823 movs r3, #184 + 204 0044 EAE7 b .L8 + 205 .LVL14: + 206 .L23: +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 207 .loc 1 7119 7 is_stmt 1 view .LVU53 +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 208 .loc 1 7119 14 is_stmt 0 view .LVU54 + 209 0046 43F09003 orr r3, r3, #144 + 210 .LVL15: +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 211 .loc 1 7119 14 view .LVU55 + 212 004a F3E7 b .L11 + 213 .L24: +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 214 .loc 1 7125 7 is_stmt 1 view .LVU56 +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 215 .loc 1 7125 14 is_stmt 0 view .LVU57 + 216 004c 43F02003 orr r3, r3, #32 + 217 .LVL16: +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 218 .loc 1 7125 14 view .LVU58 + 219 0050 F2E7 b .L21 + 220 .LVL17: + 221 .L7: +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 222 .loc 1 7091 1 view .LVU59 + 223 0052 10B4 push {r4} + 224 .cfi_def_cfa_offset 4 + 225 .cfi_offset 4, -4 +7131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 226 .loc 1 7131 5 is_stmt 1 view .LVU60 +7131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 227 .loc 1 7131 8 is_stmt 0 view .LVU61 + 228 0054 11F4004F tst r1, #32768 + 229 0058 1AD1 bne .L19 +7092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 230 .loc 1 7092 12 view .LVU62 + ARM GAS /tmp/ccNVyn8W.s page 131 + + + 231 005a 0023 movs r3, #0 + 232 .L13: + 233 .LVL18: +7137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 234 .loc 1 7137 5 is_stmt 1 view .LVU63 +7137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 235 .loc 1 7137 8 is_stmt 0 view .LVU64 + 236 005c 11F0010F tst r1, #1 + 237 0060 01D0 beq .L14 +7140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 238 .loc 1 7140 7 is_stmt 1 view .LVU65 +7140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 239 .loc 1 7140 14 is_stmt 0 view .LVU66 + 240 0062 43F0F203 orr r3, r3, #242 + 241 .LVL19: + 242 .L14: +7143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 243 .loc 1 7143 5 is_stmt 1 view .LVU67 +7143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 244 .loc 1 7143 8 is_stmt 0 view .LVU68 + 245 0066 11F0020F tst r1, #2 + 246 006a 01D0 beq .L15 +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 247 .loc 1 7146 7 is_stmt 1 view .LVU69 +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 248 .loc 1 7146 14 is_stmt 0 view .LVU70 + 249 006c 43F0F403 orr r3, r3, #244 + 250 .LVL20: + 251 .L15: +7149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 252 .loc 1 7149 5 is_stmt 1 view .LVU71 +7149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 253 .loc 1 7149 8 is_stmt 0 view .LVU72 + 254 0070 1029 cmp r1, #16 + 255 0072 0FD0 beq .L25 + 256 .L16: +7155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 257 .loc 1 7155 5 is_stmt 1 view .LVU73 +7155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 258 .loc 1 7155 8 is_stmt 0 view .LVU74 + 259 0074 2029 cmp r1, #32 + 260 0076 10D0 beq .L26 + 261 .L17: +7161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 262 .loc 1 7161 5 is_stmt 1 view .LVU75 +7161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 263 .loc 1 7161 8 is_stmt 0 view .LVU76 + 264 0078 0D4C ldr r4, .L28+8 + 265 007a A242 cmp r2, r4 + 266 007c 01D0 beq .L12 +7161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 267 .loc 1 7161 44 discriminator 1 view .LVU77 + 268 007e 4029 cmp r1, #64 + 269 0080 0ED0 beq .L27 + 270 .L12: + 271 .loc 1 7171 3 is_stmt 1 view .LVU78 + 272 0082 0168 ldr r1, [r0] + ARM GAS /tmp/ccNVyn8W.s page 132 + + + 273 .LVL21: + 274 .loc 1 7171 3 is_stmt 0 view .LVU79 + 275 0084 0A68 ldr r2, [r1] + 276 0086 1343 orrs r3, r3, r2 + 277 .LVL22: + 278 .loc 1 7171 3 view .LVU80 + 279 0088 0B60 str r3, [r1] +7172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 280 .loc 1 7172 1 view .LVU81 + 281 008a 5DF8044B ldr r4, [sp], #4 + 282 .cfi_remember_state + 283 .cfi_restore 4 + 284 .cfi_def_cfa_offset 0 + 285 008e 7047 bx lr + 286 .LVL23: + 287 .L19: + 288 .cfi_restore_state +7134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 289 .loc 1 7134 14 view .LVU82 + 290 0090 B823 movs r3, #184 + 291 0092 E3E7 b .L13 + 292 .LVL24: + 293 .L25: +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 294 .loc 1 7152 7 is_stmt 1 view .LVU83 +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 295 .loc 1 7152 14 is_stmt 0 view .LVU84 + 296 0094 43F09003 orr r3, r3, #144 + 297 .LVL25: +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 298 .loc 1 7152 14 view .LVU85 + 299 0098 ECE7 b .L16 + 300 .L26: +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 301 .loc 1 7158 7 is_stmt 1 view .LVU86 +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 302 .loc 1 7158 14 is_stmt 0 view .LVU87 + 303 009a 43F06003 orr r3, r3, #96 + 304 .LVL26: +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 305 .loc 1 7158 14 view .LVU88 + 306 009e EBE7 b .L17 + 307 .L27: +7164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 308 .loc 1 7164 7 is_stmt 1 view .LVU89 +7164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 309 .loc 1 7164 14 is_stmt 0 view .LVU90 + 310 00a0 43F04003 orr r3, r3, #64 + 311 .LVL27: +7164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 312 .loc 1 7164 14 view .LVU91 + 313 00a4 EDE7 b .L12 + 314 .L29: + 315 00a6 00BF .align 2 + 316 .L28: + 317 00a8 00000000 .word I2C_Master_ISR_DMA + 318 00ac 00000000 .word I2C_Slave_ISR_DMA + ARM GAS /tmp/ccNVyn8W.s page 133 + + + 319 00b0 00000000 .word I2C_Mem_ISR_DMA + 320 .cfi_endproc + 321 .LFE208: + 323 .section .text.I2C_Disable_IRQ,"ax",%progbits + 324 .align 1 + 325 .syntax unified + 326 .thumb + 327 .thumb_func + 329 I2C_Disable_IRQ: + 330 .LVL28: + 331 .LFB209: +7173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Manage the disabling of Interrupts. +7176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 332 .loc 1 7182 1 is_stmt 1 view -0 + 333 .cfi_startproc + 334 @ args = 0, pretend = 0, frame = 0 + 335 @ frame_needed = 0, uses_anonymous_args = 0 + 336 @ link register save eliminated. +7183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 337 .loc 1 7183 3 view .LVU93 +7184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 338 .loc 1 7185 3 view .LVU94 + 339 .loc 1 7185 6 is_stmt 0 view .LVU95 + 340 0000 11F0010F tst r1, #1 + 341 0004 09D0 beq .L37 +7186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable TC and TXI interrupts */ +7188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; + 342 .loc 1 7188 5 is_stmt 1 view .LVU96 + 343 .LVL29: +7189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 344 .loc 1 7190 5 view .LVU97 + 345 .loc 1 7190 24 is_stmt 0 view .LVU98 + 346 0006 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 347 .loc 1 7190 8 view .LVU99 + 348 000a 03F02803 and r3, r3, #40 + 349 000e 282B cmp r3, #40 + 350 0010 01D0 beq .L40 +7191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 351 .loc 1 7193 14 view .LVU100 + 352 0012 F223 movs r3, #242 + 353 0014 02E0 b .L31 + 354 .L40: +7188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 355 .loc 1 7188 12 view .LVU101 + ARM GAS /tmp/ccNVyn8W.s page 134 + + + 356 0016 4223 movs r3, #66 + 357 0018 00E0 b .L31 + 358 .LVL30: + 359 .L37: +7183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 360 .loc 1 7183 12 view .LVU102 + 361 001a 0023 movs r3, #0 + 362 .LVL31: + 363 .L31: +7194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 364 .loc 1 7197 3 is_stmt 1 view .LVU103 + 365 .loc 1 7197 6 is_stmt 0 view .LVU104 + 366 001c 11F0020F tst r1, #2 + 367 0020 09D0 beq .L32 +7198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable TC and RXI interrupts */ +7200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_RXI; + 368 .loc 1 7200 5 is_stmt 1 view .LVU105 + 369 .loc 1 7200 12 is_stmt 0 view .LVU106 + 370 0022 43F0440C orr ip, r3, #68 + 371 .LVL32: +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 372 .loc 1 7202 5 is_stmt 1 view .LVU107 + 373 .loc 1 7202 24 is_stmt 0 view .LVU108 + 374 0026 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 375 .loc 1 7202 8 view .LVU109 + 376 002a 02F02802 and r2, r2, #40 + 377 002e 282A cmp r2, #40 + 378 0030 10D0 beq .L39 +7203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 379 .loc 1 7205 7 is_stmt 1 view .LVU110 + 380 .loc 1 7205 14 is_stmt 0 view .LVU111 + 381 0032 43F0F403 orr r3, r3, #244 + 382 .LVL33: + 383 .L32: +7206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 384 .loc 1 7209 3 is_stmt 1 view .LVU112 + 385 .loc 1 7209 6 is_stmt 0 view .LVU113 + 386 0036 11F4004F tst r1, #32768 + 387 003a 0DD1 bne .L41 + 388 .L33: +7210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable ADDR, NACK and STOP interrupts */ +7212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 389 .loc 1 7215 3 is_stmt 1 view .LVU114 + ARM GAS /tmp/ccNVyn8W.s page 135 + + + 390 .loc 1 7215 6 is_stmt 0 view .LVU115 + 391 003c 1029 cmp r1, #16 + 392 003e 0ED0 beq .L42 + 393 .L34: +7216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 394 .loc 1 7221 3 is_stmt 1 view .LVU116 + 395 .loc 1 7221 6 is_stmt 0 view .LVU117 + 396 0040 2029 cmp r1, #32 + 397 0042 0FD0 beq .L43 + 398 .L35: +7222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupts */ +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +7225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_RELOAD_IT) + 399 .loc 1 7227 3 is_stmt 1 view .LVU118 + 400 .loc 1 7227 6 is_stmt 0 view .LVU119 + 401 0044 4029 cmp r1, #64 + 402 0046 10D0 beq .L44 + 403 .L36: +7228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable interrupts only at the end */ +7234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* to avoid a breaking situation like at "t" time */ +7235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* all disable interrupts request are not done */ +7236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, tmpisr); + 404 .loc 1 7236 3 is_stmt 1 view .LVU120 + 405 0048 0168 ldr r1, [r0] + 406 .LVL34: + 407 .loc 1 7236 3 is_stmt 0 view .LVU121 + 408 004a 0A68 ldr r2, [r1] + 409 004c 22EA0303 bic r3, r2, r3 + 410 .LVL35: + 411 .loc 1 7236 3 view .LVU122 + 412 0050 0B60 str r3, [r1] +7237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 413 .loc 1 7237 1 view .LVU123 + 414 0052 7047 bx lr + 415 .LVL36: + 416 .L39: +7200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 417 .loc 1 7200 12 view .LVU124 + 418 0054 6346 mov r3, ip + 419 0056 EEE7 b .L32 + 420 .LVL37: + 421 .L41: +7212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 422 .loc 1 7212 5 is_stmt 1 view .LVU125 + ARM GAS /tmp/ccNVyn8W.s page 136 + + +7212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 423 .loc 1 7212 12 is_stmt 0 view .LVU126 + 424 0058 43F0B803 orr r3, r3, #184 + 425 .LVL38: +7212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 426 .loc 1 7212 12 view .LVU127 + 427 005c EEE7 b .L33 + 428 .L42: +7218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 429 .loc 1 7218 5 is_stmt 1 view .LVU128 +7218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 430 .loc 1 7218 12 is_stmt 0 view .LVU129 + 431 005e 43F09003 orr r3, r3, #144 + 432 .LVL39: +7218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 433 .loc 1 7218 12 view .LVU130 + 434 0062 EDE7 b .L34 + 435 .L43: +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 436 .loc 1 7224 5 is_stmt 1 view .LVU131 +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 437 .loc 1 7224 12 is_stmt 0 view .LVU132 + 438 0064 43F02003 orr r3, r3, #32 + 439 .LVL40: +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 440 .loc 1 7224 12 view .LVU133 + 441 0068 ECE7 b .L35 + 442 .L44: +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 443 .loc 1 7230 5 is_stmt 1 view .LVU134 +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 444 .loc 1 7230 12 is_stmt 0 view .LVU135 + 445 006a 43F04003 orr r3, r3, #64 + 446 .LVL41: +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 447 .loc 1 7230 12 view .LVU136 + 448 006e EBE7 b .L36 + 449 .cfi_endproc + 450 .LFE209: + 452 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits + 453 .align 1 + 454 .syntax unified + 455 .thumb + 456 .thumb_func + 458 I2C_ConvertOtherXferOptions: + 459 .LVL42: + 460 .LFB210: +7238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Convert I2Cx OTHER_xxx XferOptions to functional XferOptions. +7241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +7242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) +7245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 461 .loc 1 7245 1 is_stmt 1 view -0 + 462 .cfi_startproc + ARM GAS /tmp/ccNVyn8W.s page 137 + + + 463 @ args = 0, pretend = 0, frame = 0 + 464 @ frame_needed = 0, uses_anonymous_args = 0 + 465 @ link register save eliminated. +7246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if user set XferOptions to I2C_OTHER_FRAME */ +7247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_FRAME */ +7249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_OTHER_FRAME) + 466 .loc 1 7249 3 view .LVU138 + 467 .loc 1 7249 11 is_stmt 0 view .LVU139 + 468 0000 C36A ldr r3, [r0, #44] + 469 .loc 1 7249 6 view .LVU140 + 470 0002 AA2B cmp r3, #170 + 471 0004 04D0 beq .L48 +7250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_FRAME; +7252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */ +7254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* then generate a stop condition at the end of transfer */ +7256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */ +7257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME) + 472 .loc 1 7257 8 is_stmt 1 view .LVU141 + 473 .loc 1 7257 16 is_stmt 0 view .LVU142 + 474 0006 C36A ldr r3, [r0, #44] + 475 .loc 1 7257 11 view .LVU143 + 476 0008 B3F52A4F cmp r3, #43520 + 477 000c 03D0 beq .L49 + 478 .L45: +7258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME; +7260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +7262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +7264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 479 .loc 1 7265 1 view .LVU144 + 480 000e 7047 bx lr + 481 .L48: +7251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 482 .loc 1 7251 5 is_stmt 1 view .LVU145 +7251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 483 .loc 1 7251 23 is_stmt 0 view .LVU146 + 484 0010 0023 movs r3, #0 + 485 0012 C362 str r3, [r0, #44] + 486 0014 7047 bx lr + 487 .L49: +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 488 .loc 1 7259 5 is_stmt 1 view .LVU147 +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 489 .loc 1 7259 23 is_stmt 0 view .LVU148 + 490 0016 4FF00073 mov r3, #33554432 + 491 001a C362 str r3, [r0, #44] +7264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 492 .loc 1 7264 3 is_stmt 1 view .LVU149 + 493 .loc 1 7265 1 is_stmt 0 view .LVU150 + 494 001c F7E7 b .L45 + ARM GAS /tmp/ccNVyn8W.s page 138 + + + 495 .cfi_endproc + 496 .LFE210: + 498 .section .text.I2C_IsErrorOccurred,"ax",%progbits + 499 .align 1 + 500 .syntax unified + 501 .thumb + 502 .thumb_func + 504 I2C_IsErrorOccurred: + 505 .LVL43: + 506 .LFB206: +6923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 507 .loc 1 6923 1 is_stmt 1 view -0 + 508 .cfi_startproc + 509 @ args = 0, pretend = 0, frame = 0 + 510 @ frame_needed = 0, uses_anonymous_args = 0 +6923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 511 .loc 1 6923 1 is_stmt 0 view .LVU152 + 512 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 513 .cfi_def_cfa_offset 24 + 514 .cfi_offset 4, -24 + 515 .cfi_offset 5, -20 + 516 .cfi_offset 6, -16 + 517 .cfi_offset 7, -12 + 518 .cfi_offset 8, -8 + 519 .cfi_offset 14, -4 + 520 0004 0446 mov r4, r0 +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 521 .loc 1 6924 3 is_stmt 1 view .LVU153 + 522 .LVL44: +6925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; + 523 .loc 1 6925 3 view .LVU154 +6925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; + 524 .loc 1 6925 27 is_stmt 0 view .LVU155 + 525 0006 0368 ldr r3, [r0] +6925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; + 526 .loc 1 6925 12 view .LVU156 + 527 0008 9E69 ldr r6, [r3, #24] + 528 .LVL45: +6926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 529 .loc 1 6926 3 is_stmt 1 view .LVU157 +6927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp1; + 530 .loc 1 6927 3 view .LVU158 +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; + 531 .loc 1 6928 3 view .LVU159 +6929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 532 .loc 1 6929 3 view .LVU160 +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 533 .loc 1 6931 3 view .LVU161 +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 534 .loc 1 6931 6 is_stmt 0 view .LVU162 + 535 000a 16F01006 ands r6, r6, #16 + 536 .LVL46: +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 537 .loc 1 6931 6 view .LVU163 + 538 000e 7CD0 beq .L67 + 539 0010 0D46 mov r5, r1 + 540 0012 9046 mov r8, r2 + ARM GAS /tmp/ccNVyn8W.s page 139 + + +6934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 541 .loc 1 6934 5 is_stmt 1 view .LVU164 + 542 0014 1022 movs r2, #16 + 543 .LVL47: +6934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 544 .loc 1 6934 5 is_stmt 0 view .LVU165 + 545 0016 DA61 str r2, [r3, #28] +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 546 .loc 1 6938 5 is_stmt 1 view .LVU166 +6926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 547 .loc 1 6926 12 is_stmt 0 view .LVU167 + 548 0018 0026 movs r6, #0 +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 549 .loc 1 6924 21 view .LVU168 + 550 001a 3746 mov r7, r6 + 551 .LVL48: + 552 .L53: +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 553 .loc 1 6938 64 is_stmt 1 view .LVU169 +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 554 .loc 1 6938 13 is_stmt 0 view .LVU170 + 555 001c 2368 ldr r3, [r4] + 556 001e 9869 ldr r0, [r3, #24] +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 557 .loc 1 6938 64 view .LVU171 + 558 0020 10F0200F tst r0, #32 + 559 0024 30D1 bne .L59 +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 560 .loc 1 6938 64 discriminator 1 view .LVU172 + 561 0026 7FBB cbnz r7, .L59 +6941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 562 .loc 1 6941 7 is_stmt 1 view .LVU173 +6941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 563 .loc 1 6941 10 is_stmt 0 view .LVU174 + 564 0028 B5F1FF3F cmp r5, #-1 + 565 002c F6D0 beq .L53 +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 566 .loc 1 6943 9 is_stmt 1 view .LVU175 +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 567 .loc 1 6943 15 is_stmt 0 view .LVU176 + 568 002e FFF7FEFF bl HAL_GetTick + 569 .LVL49: +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 570 .loc 1 6943 29 discriminator 1 view .LVU177 + 571 0032 A0EB0800 sub r0, r0, r8 +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 572 .loc 1 6943 12 discriminator 1 view .LVU178 + 573 0036 A842 cmp r0, r5 + 574 0038 01D8 bhi .L54 +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 575 .loc 1 6943 53 discriminator 1 view .LVU179 + 576 003a 002D cmp r5, #0 + 577 003c EED1 bne .L53 + 578 .L54: +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 579 .loc 1 6945 11 is_stmt 1 view .LVU180 +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + ARM GAS /tmp/ccNVyn8W.s page 140 + + + 580 .loc 1 6945 33 is_stmt 0 view .LVU181 + 581 003e 2168 ldr r1, [r4] +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 582 .loc 1 6945 43 view .LVU182 + 583 0040 4B68 ldr r3, [r1, #4] +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 584 .loc 1 6945 16 view .LVU183 + 585 0042 03F48043 and r3, r3, #16384 + 586 .LVL50: +6946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 587 .loc 1 6946 11 is_stmt 1 view .LVU184 +6946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 588 .loc 1 6946 16 is_stmt 0 view .LVU185 + 589 0046 94F84220 ldrb r2, [r4, #66] @ zero_extendqisi2 + 590 004a D2B2 uxtb r2, r2 + 591 .LVL51: +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 592 .loc 1 6949 11 is_stmt 1 view .LVU186 +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 593 .loc 1 6949 16 is_stmt 0 view .LVU187 + 594 004c 8869 ldr r0, [r1, #24] +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 595 .loc 1 6949 14 view .LVU188 + 596 004e 10F4004F tst r0, #32768 + 597 0052 02D0 beq .L57 +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 598 .loc 1 6949 66 discriminator 1 view .LVU189 + 599 0054 0BB9 cbnz r3, .L57 +6950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) + 600 .loc 1 6950 38 view .LVU190 + 601 0056 202A cmp r2, #32 + 602 0058 0ED1 bne .L69 + 603 .LVL52: + 604 .L57: +6960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 605 .loc 1 6960 59 is_stmt 1 view .LVU191 +6960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 606 .loc 1 6960 18 is_stmt 0 view .LVU192 + 607 005a 2368 ldr r3, [r4] + 608 005c 9B69 ldr r3, [r3, #24] +6960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 609 .loc 1 6960 59 view .LVU193 + 610 005e 13F0200F tst r3, #32 + 611 0062 DBD1 bne .L53 +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 612 .loc 1 6963 13 is_stmt 1 view .LVU194 +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 613 .loc 1 6963 18 is_stmt 0 view .LVU195 + 614 0064 FFF7FEFF bl HAL_GetTick + 615 .LVL53: +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 616 .loc 1 6963 32 discriminator 1 view .LVU196 + 617 0068 A0EB0800 sub r0, r0, r8 +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 618 .loc 1 6963 16 discriminator 1 view .LVU197 + 619 006c 1928 cmp r0, #25 + 620 006e F4D9 bls .L57 + ARM GAS /tmp/ccNVyn8W.s page 141 + + +6965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 621 .loc 1 6965 15 is_stmt 1 view .LVU198 +6965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 622 .loc 1 6965 26 is_stmt 0 view .LVU199 + 623 0070 46F02006 orr r6, r6, #32 + 624 .LVL54: +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 625 .loc 1 6967 15 is_stmt 1 view .LVU200 +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 626 .loc 1 6969 15 view .LVU201 +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 627 .loc 1 6967 22 is_stmt 0 view .LVU202 + 628 0074 0127 movs r7, #1 +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 629 .loc 1 6969 15 view .LVU203 + 630 0076 D1E7 b .L53 + 631 .LVL55: + 632 .L69: +6954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 633 .loc 1 6954 13 is_stmt 1 view .LVU204 +6954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 634 .loc 1 6954 27 is_stmt 0 view .LVU205 + 635 0078 4B68 ldr r3, [r1, #4] + 636 .LVL56: +6954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 637 .loc 1 6954 33 view .LVU206 + 638 007a 43F48043 orr r3, r3, #16384 + 639 007e 4B60 str r3, [r1, #4] +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 640 .loc 1 6957 13 is_stmt 1 view .LVU207 +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 641 .loc 1 6957 25 is_stmt 0 view .LVU208 + 642 0080 FFF7FEFF bl HAL_GetTick + 643 .LVL57: +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 644 .loc 1 6957 25 view .LVU209 + 645 0084 8046 mov r8, r0 + 646 .LVL58: +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 647 .loc 1 6957 25 view .LVU210 + 648 0086 E8E7 b .L57 + 649 .LVL59: + 650 .L59: +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 651 .loc 1 6977 5 is_stmt 1 view .LVU211 +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 652 .loc 1 6977 8 is_stmt 0 view .LVU212 + 653 0088 0FB9 cbnz r7, .L61 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 654 .loc 1 6980 7 is_stmt 1 view .LVU213 + 655 008a 2022 movs r2, #32 + 656 008c DA61 str r2, [r3, #28] + 657 .L61: +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 658 .loc 1 6983 5 view .LVU214 +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 659 .loc 1 6983 16 is_stmt 0 view .LVU215 + ARM GAS /tmp/ccNVyn8W.s page 142 + + + 660 008e 46F00406 orr r6, r6, #4 + 661 .LVL60: +6985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 662 .loc 1 6985 5 is_stmt 1 view .LVU216 +6985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 663 .loc 1 6985 12 is_stmt 0 view .LVU217 + 664 0092 0125 movs r5, #1 + 665 .LVL61: + 666 .L51: +6989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 667 .loc 1 6989 3 is_stmt 1 view .LVU218 +6989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 668 .loc 1 6989 16 is_stmt 0 view .LVU219 + 669 0094 2268 ldr r2, [r4] +6989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 670 .loc 1 6989 10 view .LVU220 + 671 0096 9369 ldr r3, [r2, #24] + 672 .LVL62: +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 673 .loc 1 6993 3 is_stmt 1 view .LVU221 +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 674 .loc 1 6993 6 is_stmt 0 view .LVU222 + 675 0098 13F4807F tst r3, #256 + 676 009c 05D0 beq .L62 +6995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 677 .loc 1 6995 5 is_stmt 1 view .LVU223 +6995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 678 .loc 1 6995 16 is_stmt 0 view .LVU224 + 679 009e 46F00106 orr r6, r6, #1 + 680 .LVL63: +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 681 .loc 1 6998 5 is_stmt 1 view .LVU225 + 682 00a2 4FF48071 mov r1, #256 + 683 00a6 D161 str r1, [r2, #28] +7000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 684 .loc 1 7000 5 view .LVU226 + 685 .LVL64: +7000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 686 .loc 1 7000 12 is_stmt 0 view .LVU227 + 687 00a8 0125 movs r5, #1 + 688 .LVL65: + 689 .L62: +7004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 690 .loc 1 7004 3 is_stmt 1 view .LVU228 +7004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 691 .loc 1 7004 6 is_stmt 0 view .LVU229 + 692 00aa 13F4806F tst r3, #1024 + 693 00ae 06D0 beq .L63 +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 694 .loc 1 7006 5 is_stmt 1 view .LVU230 +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 695 .loc 1 7006 16 is_stmt 0 view .LVU231 + 696 00b0 46F00806 orr r6, r6, #8 + 697 .LVL66: +7009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 698 .loc 1 7009 5 is_stmt 1 view .LVU232 + 699 00b4 2268 ldr r2, [r4] + ARM GAS /tmp/ccNVyn8W.s page 143 + + + 700 00b6 4FF48061 mov r1, #1024 + 701 00ba D161 str r1, [r2, #28] +7011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 702 .loc 1 7011 5 view .LVU233 + 703 .LVL67: +7011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 704 .loc 1 7011 12 is_stmt 0 view .LVU234 + 705 00bc 0125 movs r5, #1 + 706 .LVL68: + 707 .L63: +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 708 .loc 1 7015 3 is_stmt 1 view .LVU235 +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 709 .loc 1 7015 6 is_stmt 0 view .LVU236 + 710 00be 13F4007F tst r3, #512 + 711 00c2 24D0 beq .L64 +7017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 712 .loc 1 7017 5 is_stmt 1 view .LVU237 +7017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 713 .loc 1 7017 16 is_stmt 0 view .LVU238 + 714 00c4 46F00206 orr r6, r6, #2 + 715 .LVL69: +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 716 .loc 1 7020 5 is_stmt 1 view .LVU239 + 717 00c8 2368 ldr r3, [r4] + 718 .LVL70: +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 719 .loc 1 7020 5 is_stmt 0 view .LVU240 + 720 00ca 4FF40072 mov r2, #512 + 721 00ce DA61 str r2, [r3, #28] +7022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 722 .loc 1 7022 5 is_stmt 1 view .LVU241 + 723 .LVL71: +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 724 .loc 1 7025 3 view .LVU242 +7022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 725 .loc 1 7022 12 is_stmt 0 view .LVU243 + 726 00d0 0125 movs r5, #1 + 727 .LVL72: + 728 .L65: +7028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 729 .loc 1 7028 5 is_stmt 1 view .LVU244 + 730 00d2 2046 mov r0, r4 + 731 00d4 FFF7FEFF bl I2C_Flush_TXDR + 732 .LVL73: +7031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 733 .loc 1 7031 5 view .LVU245 + 734 00d8 2268 ldr r2, [r4] + 735 00da 5368 ldr r3, [r2, #4] + 736 00dc 23F0FF73 bic r3, r3, #33423360 + 737 00e0 23F48B33 bic r3, r3, #71168 + 738 00e4 23F4FF73 bic r3, r3, #510 + 739 00e8 23F00103 bic r3, r3, #1 + 740 00ec 5360 str r3, [r2, #4] +7033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 741 .loc 1 7033 5 view .LVU246 +7033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccNVyn8W.s page 144 + + + 742 .loc 1 7033 9 is_stmt 0 view .LVU247 + 743 00ee 636C ldr r3, [r4, #68] +7033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 744 .loc 1 7033 21 view .LVU248 + 745 00f0 3343 orrs r3, r3, r6 + 746 00f2 6364 str r3, [r4, #68] +7034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 747 .loc 1 7034 5 is_stmt 1 view .LVU249 +7034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 748 .loc 1 7034 17 is_stmt 0 view .LVU250 + 749 00f4 2023 movs r3, #32 + 750 00f6 84F84130 strb r3, [r4, #65] +7035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 751 .loc 1 7035 5 is_stmt 1 view .LVU251 +7035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 752 .loc 1 7035 16 is_stmt 0 view .LVU252 + 753 00fa 0023 movs r3, #0 + 754 00fc 84F84230 strb r3, [r4, #66] +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 755 .loc 1 7038 5 is_stmt 1 view .LVU253 +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 756 .loc 1 7038 5 view .LVU254 + 757 0100 84F84030 strb r3, [r4, #64] + 758 .L66: +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 759 .loc 1 7038 5 discriminator 1 view .LVU255 +7041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 760 .loc 1 7041 3 view .LVU256 +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 761 .loc 1 7042 1 is_stmt 0 view .LVU257 + 762 0104 2846 mov r0, r5 + 763 0106 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 764 .LVL74: + 765 .L67: +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 766 .loc 1 6924 21 view .LVU258 + 767 010a 0025 movs r5, #0 + 768 010c C2E7 b .L51 + 769 .LVL75: + 770 .L64: +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 771 .loc 1 7025 3 is_stmt 1 view .LVU259 +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 772 .loc 1 7025 6 is_stmt 0 view .LVU260 + 773 010e 002D cmp r5, #0 + 774 0110 F8D0 beq .L66 + 775 0112 DEE7 b .L65 + 776 .cfi_endproc + 777 .LFE206: + 779 .section .text.I2C_WaitOnTXISFlagUntilTimeout,"ax",%progbits + 780 .align 1 + 781 .syntax unified + 782 .thumb + 783 .thumb_func + 785 I2C_WaitOnTXISFlagUntilTimeout: + 786 .LVL76: + 787 .LFB203: + ARM GAS /tmp/ccNVyn8W.s page 145 + + +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 788 .loc 1 6769 1 is_stmt 1 view -0 + 789 .cfi_startproc + 790 @ args = 0, pretend = 0, frame = 0 + 791 @ frame_needed = 0, uses_anonymous_args = 0 +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 792 .loc 1 6769 1 is_stmt 0 view .LVU262 + 793 0000 70B5 push {r4, r5, r6, lr} + 794 .cfi_def_cfa_offset 16 + 795 .cfi_offset 4, -16 + 796 .cfi_offset 5, -12 + 797 .cfi_offset 6, -8 + 798 .cfi_offset 14, -4 + 799 0002 0446 mov r4, r0 + 800 0004 0D46 mov r5, r1 + 801 0006 1646 mov r6, r2 +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 802 .loc 1 6770 3 is_stmt 1 view .LVU263 + 803 .LVL77: + 804 .L73: +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 805 .loc 1 6770 50 view .LVU264 +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 806 .loc 1 6770 10 is_stmt 0 view .LVU265 + 807 0008 2368 ldr r3, [r4] + 808 000a 9B69 ldr r3, [r3, #24] +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 809 .loc 1 6770 50 view .LVU266 + 810 000c 13F0020F tst r3, #2 + 811 0010 22D1 bne .L78 +6773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 812 .loc 1 6773 5 is_stmt 1 view .LVU267 +6773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 813 .loc 1 6773 9 is_stmt 0 view .LVU268 + 814 0012 3246 mov r2, r6 + 815 0014 2946 mov r1, r5 + 816 0016 2046 mov r0, r4 + 817 0018 FFF7FEFF bl I2C_IsErrorOccurred + 818 .LVL78: +6773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 819 .loc 1 6773 8 discriminator 1 view .LVU269 + 820 001c F0B9 cbnz r0, .L76 +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 821 .loc 1 6779 5 is_stmt 1 view .LVU270 +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 822 .loc 1 6779 8 is_stmt 0 view .LVU271 + 823 001e B5F1FF3F cmp r5, #-1 + 824 0022 F1D0 beq .L73 +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 825 .loc 1 6781 7 is_stmt 1 view .LVU272 +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 826 .loc 1 6781 13 is_stmt 0 view .LVU273 + 827 0024 FFF7FEFF bl HAL_GetTick + 828 .LVL79: +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 829 .loc 1 6781 27 discriminator 1 view .LVU274 + 830 0028 801B subs r0, r0, r6 + ARM GAS /tmp/ccNVyn8W.s page 146 + + +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 831 .loc 1 6781 10 discriminator 1 view .LVU275 + 832 002a A842 cmp r0, r5 + 833 002c 01D8 bhi .L74 +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 834 .loc 1 6781 51 discriminator 1 view .LVU276 + 835 002e 002D cmp r5, #0 + 836 0030 EAD1 bne .L73 + 837 .L74: +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 838 .loc 1 6783 9 is_stmt 1 view .LVU277 +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 839 .loc 1 6783 14 is_stmt 0 view .LVU278 + 840 0032 2368 ldr r3, [r4] + 841 0034 9B69 ldr r3, [r3, #24] +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 842 .loc 1 6783 12 view .LVU279 + 843 0036 13F0020F tst r3, #2 + 844 003a E5D1 bne .L73 +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 845 .loc 1 6785 11 is_stmt 1 view .LVU280 +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 846 .loc 1 6785 15 is_stmt 0 view .LVU281 + 847 003c 636C ldr r3, [r4, #68] +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 848 .loc 1 6785 27 view .LVU282 + 849 003e 43F02003 orr r3, r3, #32 + 850 0042 6364 str r3, [r4, #68] +6786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 851 .loc 1 6786 11 is_stmt 1 view .LVU283 +6786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 852 .loc 1 6786 23 is_stmt 0 view .LVU284 + 853 0044 2023 movs r3, #32 + 854 0046 84F84130 strb r3, [r4, #65] +6787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 855 .loc 1 6787 11 is_stmt 1 view .LVU285 +6787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 856 .loc 1 6787 22 is_stmt 0 view .LVU286 + 857 004a 0023 movs r3, #0 + 858 004c 84F84230 strb r3, [r4, #66] +6790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 859 .loc 1 6790 11 is_stmt 1 view .LVU287 +6790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 860 .loc 1 6790 11 view .LVU288 + 861 0050 84F84030 strb r3, [r4, #64] +6790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 862 .loc 1 6790 11 view .LVU289 +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 863 .loc 1 6792 11 view .LVU290 +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 864 .loc 1 6792 18 is_stmt 0 view .LVU291 + 865 0054 0120 movs r0, #1 + 866 0056 00E0 b .L72 + 867 .L78: +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 868 .loc 1 6797 10 view .LVU292 + 869 0058 0020 movs r0, #0 + ARM GAS /tmp/ccNVyn8W.s page 147 + + + 870 .L72: +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 871 .loc 1 6798 1 view .LVU293 + 872 005a 70BD pop {r4, r5, r6, pc} + 873 .LVL80: + 874 .L76: +6775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 875 .loc 1 6775 14 view .LVU294 + 876 005c 0120 movs r0, #1 + 877 005e FCE7 b .L72 + 878 .cfi_endproc + 879 .LFE203: + 881 .section .text.I2C_WaitOnFlagUntilTimeout,"ax",%progbits + 882 .align 1 + 883 .syntax unified + 884 .thumb + 885 .thumb_func + 887 I2C_WaitOnFlagUntilTimeout: + 888 .LVL81: + 889 .LFB202: +6735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 890 .loc 1 6735 1 is_stmt 1 view -0 + 891 .cfi_startproc + 892 @ args = 4, pretend = 0, frame = 0 + 893 @ frame_needed = 0, uses_anonymous_args = 0 +6735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 894 .loc 1 6735 1 is_stmt 0 view .LVU296 + 895 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 896 .cfi_def_cfa_offset 24 + 897 .cfi_offset 4, -24 + 898 .cfi_offset 5, -20 + 899 .cfi_offset 6, -16 + 900 .cfi_offset 7, -12 + 901 .cfi_offset 8, -8 + 902 .cfi_offset 14, -4 + 903 0004 0546 mov r5, r0 + 904 0006 0F46 mov r7, r1 + 905 0008 1646 mov r6, r2 + 906 000a 9846 mov r8, r3 +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 907 .loc 1 6736 3 is_stmt 1 view .LVU297 + 908 .LVL82: + 909 .L81: +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 910 .loc 1 6736 41 view .LVU298 +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 911 .loc 1 6736 10 is_stmt 0 view .LVU299 + 912 000c 2C68 ldr r4, [r5] + 913 000e A469 ldr r4, [r4, #24] + 914 0010 37EA0404 bics r4, r7, r4 + 915 0014 0CBF ite eq + 916 0016 0124 moveq r4, #1 + 917 0018 0024 movne r4, #0 +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 918 .loc 1 6736 41 view .LVU300 + 919 001a B442 cmp r4, r6 + 920 001c 22D1 bne .L86 + ARM GAS /tmp/ccNVyn8W.s page 148 + + +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 921 .loc 1 6739 5 is_stmt 1 view .LVU301 +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 922 .loc 1 6739 8 is_stmt 0 view .LVU302 + 923 001e B8F1FF3F cmp r8, #-1 + 924 0022 F3D0 beq .L81 +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 925 .loc 1 6741 7 is_stmt 1 view .LVU303 +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 926 .loc 1 6741 13 is_stmt 0 view .LVU304 + 927 0024 FFF7FEFF bl HAL_GetTick + 928 .LVL83: +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 929 .loc 1 6741 27 discriminator 1 view .LVU305 + 930 0028 069B ldr r3, [sp, #24] + 931 002a C01A subs r0, r0, r3 +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 932 .loc 1 6741 10 discriminator 1 view .LVU306 + 933 002c 4045 cmp r0, r8 + 934 002e 02D8 bhi .L82 +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 935 .loc 1 6741 51 discriminator 1 view .LVU307 + 936 0030 B8F1000F cmp r8, #0 + 937 0034 EAD1 bne .L81 + 938 .L82: +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 939 .loc 1 6743 9 is_stmt 1 view .LVU308 +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 940 .loc 1 6743 14 is_stmt 0 view .LVU309 + 941 0036 2B68 ldr r3, [r5] + 942 0038 9B69 ldr r3, [r3, #24] + 943 003a 37EA0303 bics r3, r7, r3 + 944 003e 0CBF ite eq + 945 0040 0123 moveq r3, #1 + 946 0042 0023 movne r3, #0 +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 947 .loc 1 6743 12 view .LVU310 + 948 0044 B342 cmp r3, r6 + 949 0046 E1D1 bne .L81 +6745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 950 .loc 1 6745 11 is_stmt 1 view .LVU311 +6745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 951 .loc 1 6745 15 is_stmt 0 view .LVU312 + 952 0048 6B6C ldr r3, [r5, #68] +6745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 953 .loc 1 6745 27 view .LVU313 + 954 004a 43F02003 orr r3, r3, #32 + 955 004e 6B64 str r3, [r5, #68] +6746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 956 .loc 1 6746 11 is_stmt 1 view .LVU314 +6746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 957 .loc 1 6746 23 is_stmt 0 view .LVU315 + 958 0050 2023 movs r3, #32 + 959 0052 85F84130 strb r3, [r5, #65] +6747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 960 .loc 1 6747 11 is_stmt 1 view .LVU316 +6747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 149 + + + 961 .loc 1 6747 22 is_stmt 0 view .LVU317 + 962 0056 0023 movs r3, #0 + 963 0058 85F84230 strb r3, [r5, #66] +6750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 964 .loc 1 6750 11 is_stmt 1 view .LVU318 +6750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 965 .loc 1 6750 11 view .LVU319 + 966 005c 85F84030 strb r3, [r5, #64] +6750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 967 .loc 1 6750 11 view .LVU320 +6751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 968 .loc 1 6751 11 view .LVU321 +6751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 969 .loc 1 6751 18 is_stmt 0 view .LVU322 + 970 0060 0120 movs r0, #1 + 971 0062 00E0 b .L83 + 972 .L86: +6756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 973 .loc 1 6756 10 view .LVU323 + 974 0064 0020 movs r0, #0 + 975 .L83: +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 976 .loc 1 6757 1 view .LVU324 + 977 0066 BDE8F081 pop {r4, r5, r6, r7, r8, pc} +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 978 .loc 1 6757 1 view .LVU325 + 979 .cfi_endproc + 980 .LFE202: + 982 .section .text.I2C_RequestMemoryWrite,"ax",%progbits + 983 .align 1 + 984 .syntax unified + 985 .thumb + 986 .thumb_func + 988 I2C_RequestMemoryWrite: + 989 .LVL84: + 990 .LFB185: +5658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 991 .loc 1 5658 1 is_stmt 1 view -0 + 992 .cfi_startproc + 993 @ args = 8, pretend = 0, frame = 0 + 994 @ frame_needed = 0, uses_anonymous_args = 0 +5658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 995 .loc 1 5658 1 is_stmt 0 view .LVU327 + 996 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 997 .cfi_def_cfa_offset 24 + 998 .cfi_offset 4, -24 + 999 .cfi_offset 5, -20 + 1000 .cfi_offset 6, -16 + 1001 .cfi_offset 7, -12 + 1002 .cfi_offset 8, -8 + 1003 .cfi_offset 14, -4 + 1004 0004 82B0 sub sp, sp, #8 + 1005 .cfi_def_cfa_offset 32 + 1006 0006 0446 mov r4, r0 + 1007 0008 9046 mov r8, r2 + 1008 000a 1D46 mov r5, r3 + 1009 000c 089E ldr r6, [sp, #32] + ARM GAS /tmp/ccNVyn8W.s page 150 + + + 1010 000e 099F ldr r7, [sp, #36] +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1011 .loc 1 5659 3 is_stmt 1 view .LVU328 + 1012 0010 194B ldr r3, .L96 + 1013 .LVL85: +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1014 .loc 1 5659 3 is_stmt 0 view .LVU329 + 1015 0012 0093 str r3, [sp] + 1016 0014 4FF08073 mov r3, #16777216 + 1017 0018 EAB2 uxtb r2, r5 + 1018 .LVL86: +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1019 .loc 1 5659 3 view .LVU330 + 1020 001a FFF7FEFF bl I2C_TransferConfig + 1021 .LVL87: +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1022 .loc 1 5662 3 is_stmt 1 view .LVU331 +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1023 .loc 1 5662 7 is_stmt 0 view .LVU332 + 1024 001e 3A46 mov r2, r7 + 1025 0020 3146 mov r1, r6 + 1026 0022 2046 mov r0, r4 + 1027 0024 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1028 .LVL88: +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1029 .loc 1 5662 6 discriminator 1 view .LVU333 + 1030 0028 F8B9 cbnz r0, .L91 +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1031 .loc 1 5668 3 is_stmt 1 view .LVU334 +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1032 .loc 1 5668 6 is_stmt 0 view .LVU335 + 1033 002a 012D cmp r5, #1 + 1034 002c 0ED1 bne .L89 +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1035 .loc 1 5671 5 is_stmt 1 view .LVU336 +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1036 .loc 1 5671 9 is_stmt 0 view .LVU337 + 1037 002e 2368 ldr r3, [r4] +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1038 .loc 1 5671 28 view .LVU338 + 1039 0030 5FFA88F2 uxtb r2, r8 +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1040 .loc 1 5671 26 view .LVU339 + 1041 0034 9A62 str r2, [r3, #40] + 1042 .L90: +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1043 .loc 1 5690 3 is_stmt 1 view .LVU340 +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1044 .loc 1 5690 7 is_stmt 0 view .LVU341 + 1045 0036 0097 str r7, [sp] + 1046 0038 3346 mov r3, r6 + 1047 003a 0022 movs r2, #0 + 1048 003c 8021 movs r1, #128 + 1049 003e 2046 mov r0, r4 + 1050 0040 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1051 .LVL89: +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 151 + + + 1052 .loc 1 5690 6 discriminator 1 view .LVU342 + 1053 0044 A8B9 cbnz r0, .L95 + 1054 .L88: +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1055 .loc 1 5696 1 view .LVU343 + 1056 0046 02B0 add sp, sp, #8 + 1057 .cfi_remember_state + 1058 .cfi_def_cfa_offset 24 + 1059 @ sp needed + 1060 0048 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1061 .LVL90: + 1062 .L89: + 1063 .cfi_restore_state +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1064 .loc 1 5677 5 is_stmt 1 view .LVU344 +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1065 .loc 1 5677 9 is_stmt 0 view .LVU345 + 1066 004c 2368 ldr r3, [r4] +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1067 .loc 1 5677 28 view .LVU346 + 1068 004e 4FEA1822 lsr r2, r8, #8 +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1069 .loc 1 5677 26 view .LVU347 + 1070 0052 9A62 str r2, [r3, #40] +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1071 .loc 1 5680 5 is_stmt 1 view .LVU348 +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1072 .loc 1 5680 9 is_stmt 0 view .LVU349 + 1073 0054 3A46 mov r2, r7 + 1074 0056 3146 mov r1, r6 + 1075 0058 2046 mov r0, r4 + 1076 005a FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1077 .LVL91: +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1078 .loc 1 5680 8 discriminator 1 view .LVU350 + 1079 005e 30B9 cbnz r0, .L92 +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1080 .loc 1 5686 5 is_stmt 1 view .LVU351 +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1081 .loc 1 5686 9 is_stmt 0 view .LVU352 + 1082 0060 2368 ldr r3, [r4] +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1083 .loc 1 5686 28 view .LVU353 + 1084 0062 5FFA88F2 uxtb r2, r8 +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1085 .loc 1 5686 26 view .LVU354 + 1086 0066 9A62 str r2, [r3, #40] + 1087 0068 E5E7 b .L90 + 1088 .L91: +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1089 .loc 1 5664 12 view .LVU355 + 1090 006a 0120 movs r0, #1 + 1091 006c EBE7 b .L88 + 1092 .L92: +5682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1093 .loc 1 5682 14 view .LVU356 + 1094 006e 0120 movs r0, #1 + ARM GAS /tmp/ccNVyn8W.s page 152 + + + 1095 0070 E9E7 b .L88 + 1096 .L95: +5692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1097 .loc 1 5692 12 view .LVU357 + 1098 0072 0120 movs r0, #1 + 1099 0074 E7E7 b .L88 + 1100 .L97: + 1101 0076 00BF .align 2 + 1102 .L96: + 1103 0078 00200080 .word -2147475456 + 1104 .cfi_endproc + 1105 .LFE185: + 1107 .section .text.I2C_RequestMemoryRead,"ax",%progbits + 1108 .align 1 + 1109 .syntax unified + 1110 .thumb + 1111 .thumb_func + 1113 I2C_RequestMemoryRead: + 1114 .LVL92: + 1115 .LFB186: +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1116 .loc 1 5713 1 is_stmt 1 view -0 + 1117 .cfi_startproc + 1118 @ args = 8, pretend = 0, frame = 0 + 1119 @ frame_needed = 0, uses_anonymous_args = 0 +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1120 .loc 1 5713 1 is_stmt 0 view .LVU359 + 1121 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1122 .cfi_def_cfa_offset 24 + 1123 .cfi_offset 4, -24 + 1124 .cfi_offset 5, -20 + 1125 .cfi_offset 6, -16 + 1126 .cfi_offset 7, -12 + 1127 .cfi_offset 8, -8 + 1128 .cfi_offset 14, -4 + 1129 0004 82B0 sub sp, sp, #8 + 1130 .cfi_def_cfa_offset 32 + 1131 0006 0446 mov r4, r0 + 1132 0008 9046 mov r8, r2 + 1133 000a 1D46 mov r5, r3 + 1134 000c 089E ldr r6, [sp, #32] + 1135 000e 099F ldr r7, [sp, #36] +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1136 .loc 1 5714 3 is_stmt 1 view .LVU360 + 1137 0010 184B ldr r3, .L107 + 1138 .LVL93: +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1139 .loc 1 5714 3 is_stmt 0 view .LVU361 + 1140 0012 0093 str r3, [sp] + 1141 0014 0023 movs r3, #0 + 1142 0016 EAB2 uxtb r2, r5 + 1143 .LVL94: +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1144 .loc 1 5714 3 view .LVU362 + 1145 0018 FFF7FEFF bl I2C_TransferConfig + 1146 .LVL95: +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 153 + + + 1147 .loc 1 5717 3 is_stmt 1 view .LVU363 +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1148 .loc 1 5717 7 is_stmt 0 view .LVU364 + 1149 001c 3A46 mov r2, r7 + 1150 001e 3146 mov r1, r6 + 1151 0020 2046 mov r0, r4 + 1152 0022 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1153 .LVL96: +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1154 .loc 1 5717 6 discriminator 1 view .LVU365 + 1155 0026 F8B9 cbnz r0, .L102 +5723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1156 .loc 1 5723 3 is_stmt 1 view .LVU366 +5723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1157 .loc 1 5723 6 is_stmt 0 view .LVU367 + 1158 0028 012D cmp r5, #1 + 1159 002a 0ED1 bne .L100 +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1160 .loc 1 5726 5 is_stmt 1 view .LVU368 +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1161 .loc 1 5726 9 is_stmt 0 view .LVU369 + 1162 002c 2368 ldr r3, [r4] +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1163 .loc 1 5726 28 view .LVU370 + 1164 002e 5FFA88F2 uxtb r2, r8 +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1165 .loc 1 5726 26 view .LVU371 + 1166 0032 9A62 str r2, [r3, #40] + 1167 .L101: +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1168 .loc 1 5745 3 is_stmt 1 view .LVU372 +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1169 .loc 1 5745 7 is_stmt 0 view .LVU373 + 1170 0034 0097 str r7, [sp] + 1171 0036 3346 mov r3, r6 + 1172 0038 0022 movs r2, #0 + 1173 003a 4021 movs r1, #64 + 1174 003c 2046 mov r0, r4 + 1175 003e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1176 .LVL97: +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1177 .loc 1 5745 6 discriminator 1 view .LVU374 + 1178 0042 A8B9 cbnz r0, .L106 + 1179 .L99: +5751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1180 .loc 1 5751 1 view .LVU375 + 1181 0044 02B0 add sp, sp, #8 + 1182 .cfi_remember_state + 1183 .cfi_def_cfa_offset 24 + 1184 @ sp needed + 1185 0046 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1186 .LVL98: + 1187 .L100: + 1188 .cfi_restore_state +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1189 .loc 1 5732 5 is_stmt 1 view .LVU376 +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 154 + + + 1190 .loc 1 5732 9 is_stmt 0 view .LVU377 + 1191 004a 2368 ldr r3, [r4] +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1192 .loc 1 5732 28 view .LVU378 + 1193 004c 4FEA1822 lsr r2, r8, #8 +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1194 .loc 1 5732 26 view .LVU379 + 1195 0050 9A62 str r2, [r3, #40] +5735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1196 .loc 1 5735 5 is_stmt 1 view .LVU380 +5735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1197 .loc 1 5735 9 is_stmt 0 view .LVU381 + 1198 0052 3A46 mov r2, r7 + 1199 0054 3146 mov r1, r6 + 1200 0056 2046 mov r0, r4 + 1201 0058 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1202 .LVL99: +5735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1203 .loc 1 5735 8 discriminator 1 view .LVU382 + 1204 005c 30B9 cbnz r0, .L103 +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1205 .loc 1 5741 5 is_stmt 1 view .LVU383 +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1206 .loc 1 5741 9 is_stmt 0 view .LVU384 + 1207 005e 2368 ldr r3, [r4] +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1208 .loc 1 5741 28 view .LVU385 + 1209 0060 5FFA88F2 uxtb r2, r8 +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1210 .loc 1 5741 26 view .LVU386 + 1211 0064 9A62 str r2, [r3, #40] + 1212 0066 E5E7 b .L101 + 1213 .L102: +5719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1214 .loc 1 5719 12 view .LVU387 + 1215 0068 0120 movs r0, #1 + 1216 006a EBE7 b .L99 + 1217 .L103: +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1218 .loc 1 5737 14 view .LVU388 + 1219 006c 0120 movs r0, #1 + 1220 006e E9E7 b .L99 + 1221 .L106: +5747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1222 .loc 1 5747 12 view .LVU389 + 1223 0070 0120 movs r0, #1 + 1224 0072 E7E7 b .L99 + 1225 .L108: + 1226 .align 2 + 1227 .L107: + 1228 0074 00200080 .word -2147475456 + 1229 .cfi_endproc + 1230 .LFE186: + 1232 .section .text.I2C_WaitOnSTOPFlagUntilTimeout,"ax",%progbits + 1233 .align 1 + 1234 .syntax unified + 1235 .thumb + ARM GAS /tmp/ccNVyn8W.s page 155 + + + 1236 .thumb_func + 1238 I2C_WaitOnSTOPFlagUntilTimeout: + 1239 .LVL100: + 1240 .LFB204: +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1241 .loc 1 6810 1 is_stmt 1 view -0 + 1242 .cfi_startproc + 1243 @ args = 0, pretend = 0, frame = 0 + 1244 @ frame_needed = 0, uses_anonymous_args = 0 +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1245 .loc 1 6810 1 is_stmt 0 view .LVU391 + 1246 0000 70B5 push {r4, r5, r6, lr} + 1247 .cfi_def_cfa_offset 16 + 1248 .cfi_offset 4, -16 + 1249 .cfi_offset 5, -12 + 1250 .cfi_offset 6, -8 + 1251 .cfi_offset 14, -4 + 1252 0002 0446 mov r4, r0 + 1253 0004 0D46 mov r5, r1 + 1254 0006 1646 mov r6, r2 +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1255 .loc 1 6811 3 is_stmt 1 view .LVU392 +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1256 .loc 1 6811 9 is_stmt 0 view .LVU393 + 1257 0008 04E0 b .L110 + 1258 .LVL101: + 1259 .L112: +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1260 .loc 1 6822 7 is_stmt 1 view .LVU394 +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1261 .loc 1 6822 12 is_stmt 0 view .LVU395 + 1262 000a 2368 ldr r3, [r4] + 1263 000c 9B69 ldr r3, [r3, #24] +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1264 .loc 1 6822 10 view .LVU396 + 1265 000e 13F0200F tst r3, #32 + 1266 0012 12D0 beq .L116 + 1267 .L110: +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1268 .loc 1 6811 51 is_stmt 1 view .LVU397 +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1269 .loc 1 6811 10 is_stmt 0 view .LVU398 + 1270 0014 2368 ldr r3, [r4] + 1271 0016 9B69 ldr r3, [r3, #24] +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1272 .loc 1 6811 51 view .LVU399 + 1273 0018 13F0200F tst r3, #32 + 1274 001c 1BD1 bne .L117 +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1275 .loc 1 6814 5 is_stmt 1 view .LVU400 +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1276 .loc 1 6814 9 is_stmt 0 view .LVU401 + 1277 001e 3246 mov r2, r6 + 1278 0020 2946 mov r1, r5 + 1279 0022 2046 mov r0, r4 + 1280 0024 FFF7FEFF bl I2C_IsErrorOccurred + 1281 .LVL102: + ARM GAS /tmp/ccNVyn8W.s page 156 + + +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1282 .loc 1 6814 8 discriminator 1 view .LVU402 + 1283 0028 B8B9 cbnz r0, .L114 +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1284 .loc 1 6820 5 is_stmt 1 view .LVU403 +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1285 .loc 1 6820 11 is_stmt 0 view .LVU404 + 1286 002a FFF7FEFF bl HAL_GetTick + 1287 .LVL103: +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1288 .loc 1 6820 25 discriminator 1 view .LVU405 + 1289 002e 801B subs r0, r0, r6 +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1290 .loc 1 6820 8 discriminator 1 view .LVU406 + 1291 0030 A842 cmp r0, r5 + 1292 0032 EAD8 bhi .L112 +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1293 .loc 1 6820 49 discriminator 1 view .LVU407 + 1294 0034 002D cmp r5, #0 + 1295 0036 EDD1 bne .L110 + 1296 0038 E7E7 b .L112 + 1297 .L116: +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1298 .loc 1 6824 9 is_stmt 1 view .LVU408 +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1299 .loc 1 6824 13 is_stmt 0 view .LVU409 + 1300 003a 636C ldr r3, [r4, #68] +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1301 .loc 1 6824 25 view .LVU410 + 1302 003c 43F02003 orr r3, r3, #32 + 1303 0040 6364 str r3, [r4, #68] +6825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1304 .loc 1 6825 9 is_stmt 1 view .LVU411 +6825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1305 .loc 1 6825 21 is_stmt 0 view .LVU412 + 1306 0042 2023 movs r3, #32 + 1307 0044 84F84130 strb r3, [r4, #65] +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1308 .loc 1 6826 9 is_stmt 1 view .LVU413 +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1309 .loc 1 6826 20 is_stmt 0 view .LVU414 + 1310 0048 0023 movs r3, #0 + 1311 004a 84F84230 strb r3, [r4, #66] +6829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1312 .loc 1 6829 9 is_stmt 1 view .LVU415 +6829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1313 .loc 1 6829 9 view .LVU416 + 1314 004e 84F84030 strb r3, [r4, #64] +6829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1315 .loc 1 6829 9 view .LVU417 +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1316 .loc 1 6831 9 view .LVU418 +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1317 .loc 1 6831 16 is_stmt 0 view .LVU419 + 1318 0052 0120 movs r0, #1 + 1319 0054 00E0 b .L111 + 1320 .L117: + ARM GAS /tmp/ccNVyn8W.s page 157 + + +6835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1321 .loc 1 6835 10 view .LVU420 + 1322 0056 0020 movs r0, #0 + 1323 .L111: +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1324 .loc 1 6836 1 view .LVU421 + 1325 0058 70BD pop {r4, r5, r6, pc} + 1326 .LVL104: + 1327 .L114: +6816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1328 .loc 1 6816 14 view .LVU422 + 1329 005a 0120 movs r0, #1 + 1330 005c FCE7 b .L111 + 1331 .cfi_endproc + 1332 .LFE204: + 1334 .section .text.I2C_WaitOnRXNEFlagUntilTimeout,"ax",%progbits + 1335 .align 1 + 1336 .syntax unified + 1337 .thumb + 1338 .thumb_func + 1340 I2C_WaitOnRXNEFlagUntilTimeout: + 1341 .LVL105: + 1342 .LFB205: +6848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + 1343 .loc 1 6848 1 is_stmt 1 view -0 + 1344 .cfi_startproc + 1345 @ args = 0, pretend = 0, frame = 0 + 1346 @ frame_needed = 0, uses_anonymous_args = 0 +6848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + 1347 .loc 1 6848 1 is_stmt 0 view .LVU424 + 1348 0000 70B5 push {r4, r5, r6, lr} + 1349 .cfi_def_cfa_offset 16 + 1350 .cfi_offset 4, -16 + 1351 .cfi_offset 5, -12 + 1352 .cfi_offset 6, -8 + 1353 .cfi_offset 14, -4 + 1354 0002 0446 mov r4, r0 + 1355 0004 0D46 mov r5, r1 + 1356 0006 1646 mov r6, r2 +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1357 .loc 1 6849 3 is_stmt 1 view .LVU425 +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1358 .loc 1 6849 9 is_stmt 0 view .LVU426 + 1359 0008 2DE0 b .L119 + 1360 .LVL106: + 1361 .L131: +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1362 .loc 1 6862 7 is_stmt 1 view .LVU427 +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1363 .loc 1 6862 12 is_stmt 0 view .LVU428 + 1364 000a 9A69 ldr r2, [r3, #24] +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1365 .loc 1 6862 10 view .LVU429 + 1366 000c 12F0040F tst r2, #4 + 1367 0010 02D0 beq .L122 +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1368 .loc 1 6862 68 discriminator 1 view .LVU430 + ARM GAS /tmp/ccNVyn8W.s page 158 + + + 1369 0012 228D ldrh r2, [r4, #40] +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1370 .loc 1 6862 60 discriminator 1 view .LVU431 + 1371 0014 002A cmp r2, #0 + 1372 0016 4CD1 bne .L120 + 1373 .L122: +6870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1374 .loc 1 6870 9 is_stmt 1 view .LVU432 +6870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1375 .loc 1 6870 13 is_stmt 0 view .LVU433 + 1376 0018 9A69 ldr r2, [r3, #24] +6870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1377 .loc 1 6870 12 view .LVU434 + 1378 001a 12F0100F tst r2, #16 + 1379 001e 1AD0 beq .L123 +6872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; + 1380 .loc 1 6872 11 is_stmt 1 view .LVU435 + 1381 0020 1022 movs r2, #16 + 1382 0022 DA61 str r2, [r3, #28] +6873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1383 .loc 1 6873 11 view .LVU436 +6873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1384 .loc 1 6873 27 is_stmt 0 view .LVU437 + 1385 0024 0423 movs r3, #4 + 1386 0026 6364 str r3, [r4, #68] + 1387 .L124: +6881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1388 .loc 1 6881 9 is_stmt 1 view .LVU438 + 1389 0028 2368 ldr r3, [r4] + 1390 002a 2022 movs r2, #32 + 1391 002c DA61 str r2, [r3, #28] +6884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1392 .loc 1 6884 9 view .LVU439 + 1393 002e 2168 ldr r1, [r4] + 1394 0030 4B68 ldr r3, [r1, #4] + 1395 0032 23F0FF73 bic r3, r3, #33423360 + 1396 0036 23F48B33 bic r3, r3, #71168 + 1397 003a 23F4FF73 bic r3, r3, #510 + 1398 003e 23F00103 bic r3, r3, #1 + 1399 0042 4B60 str r3, [r1, #4] +6886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1400 .loc 1 6886 9 view .LVU440 +6886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1401 .loc 1 6886 21 is_stmt 0 view .LVU441 + 1402 0044 84F84120 strb r2, [r4, #65] +6887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1403 .loc 1 6887 9 is_stmt 1 view .LVU442 +6887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1404 .loc 1 6887 20 is_stmt 0 view .LVU443 + 1405 0048 0023 movs r3, #0 + 1406 004a 84F84230 strb r3, [r4, #66] +6890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1407 .loc 1 6890 9 is_stmt 1 view .LVU444 +6890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1408 .loc 1 6890 9 view .LVU445 + 1409 004e 84F84030 strb r3, [r4, #64] +6890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 159 + + + 1410 .loc 1 6890 9 view .LVU446 +6892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1411 .loc 1 6892 9 view .LVU447 +6892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1412 .loc 1 6892 16 is_stmt 0 view .LVU448 + 1413 0052 0121 movs r1, #1 + 1414 0054 2DE0 b .L120 + 1415 .L123: +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1416 .loc 1 6877 11 is_stmt 1 view .LVU449 +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1417 .loc 1 6877 27 is_stmt 0 view .LVU450 + 1418 0056 0023 movs r3, #0 + 1419 0058 6364 str r3, [r4, #68] + 1420 005a E5E7 b .L124 + 1421 .L125: +6899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1422 .loc 1 6899 7 is_stmt 1 view .LVU451 +6899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1423 .loc 1 6899 12 is_stmt 0 view .LVU452 + 1424 005c 2368 ldr r3, [r4] + 1425 005e 9B69 ldr r3, [r3, #24] +6899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1426 .loc 1 6899 10 view .LVU453 + 1427 0060 13F0040F tst r3, #4 + 1428 0064 18D0 beq .L129 + 1429 .L119: +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1430 .loc 1 6849 50 is_stmt 1 view .LVU454 +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1431 .loc 1 6849 10 is_stmt 0 view .LVU455 + 1432 0066 2368 ldr r3, [r4] + 1433 0068 9B69 ldr r3, [r3, #24] +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1434 .loc 1 6849 50 view .LVU456 + 1435 006a 13F0040F tst r3, #4 + 1436 006e 1FD1 bne .L130 +6852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1437 .loc 1 6852 5 is_stmt 1 view .LVU457 +6852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1438 .loc 1 6852 9 is_stmt 0 view .LVU458 + 1439 0070 3246 mov r2, r6 + 1440 0072 2946 mov r1, r5 + 1441 0074 2046 mov r0, r4 + 1442 0076 FFF7FEFF bl I2C_IsErrorOccurred + 1443 .LVL107: +6852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1444 .loc 1 6852 8 discriminator 1 view .LVU459 + 1445 007a 0146 mov r1, r0 + 1446 007c D8B9 cbnz r0, .L127 +6858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1447 .loc 1 6858 5 is_stmt 1 view .LVU460 +6858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1448 .loc 1 6858 9 is_stmt 0 view .LVU461 + 1449 007e 2368 ldr r3, [r4] + 1450 0080 9A69 ldr r2, [r3, #24] +6858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 160 + + + 1451 .loc 1 6858 8 view .LVU462 + 1452 0082 12F0200F tst r2, #32 + 1453 0086 C0D1 bne .L131 +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1454 .loc 1 6897 5 is_stmt 1 view .LVU463 +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1455 .loc 1 6897 11 is_stmt 0 view .LVU464 + 1456 0088 FFF7FEFF bl HAL_GetTick + 1457 .LVL108: +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1458 .loc 1 6897 25 discriminator 1 view .LVU465 + 1459 008c 801B subs r0, r0, r6 +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1460 .loc 1 6897 8 discriminator 1 view .LVU466 + 1461 008e A842 cmp r0, r5 + 1462 0090 E4D8 bhi .L125 +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1463 .loc 1 6897 49 discriminator 1 view .LVU467 + 1464 0092 002D cmp r5, #0 + 1465 0094 E7D1 bne .L119 + 1466 0096 E1E7 b .L125 + 1467 .L129: +6901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1468 .loc 1 6901 9 is_stmt 1 view .LVU468 +6901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1469 .loc 1 6901 13 is_stmt 0 view .LVU469 + 1470 0098 636C ldr r3, [r4, #68] +6901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1471 .loc 1 6901 25 view .LVU470 + 1472 009a 43F02003 orr r3, r3, #32 + 1473 009e 6364 str r3, [r4, #68] +6902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1474 .loc 1 6902 9 is_stmt 1 view .LVU471 +6902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1475 .loc 1 6902 21 is_stmt 0 view .LVU472 + 1476 00a0 2023 movs r3, #32 + 1477 00a2 84F84130 strb r3, [r4, #65] +6905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1478 .loc 1 6905 9 is_stmt 1 view .LVU473 +6905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1479 .loc 1 6905 9 view .LVU474 + 1480 00a6 0023 movs r3, #0 + 1481 00a8 84F84030 strb r3, [r4, #64] +6905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1482 .loc 1 6905 9 view .LVU475 +6907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1483 .loc 1 6907 9 view .LVU476 +6907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1484 .loc 1 6907 16 is_stmt 0 view .LVU477 + 1485 00ac 0121 movs r1, #1 + 1486 00ae 00E0 b .L120 + 1487 .L130: +6911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1488 .loc 1 6911 10 view .LVU478 + 1489 00b0 0021 movs r1, #0 + 1490 .L120: +6912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 161 + + + 1491 .loc 1 6912 1 view .LVU479 + 1492 00b2 0846 mov r0, r1 + 1493 00b4 70BD pop {r4, r5, r6, pc} + 1494 .LVL109: + 1495 .L127: +6854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1496 .loc 1 6854 14 view .LVU480 + 1497 00b6 0121 movs r1, #1 + 1498 00b8 FBE7 b .L120 + 1499 .cfi_endproc + 1500 .LFE205: + 1502 .section .text.HAL_I2C_MspInit,"ax",%progbits + 1503 .align 1 + 1504 .weak HAL_I2C_MspInit + 1505 .syntax unified + 1506 .thumb + 1507 .thumb_func + 1509 HAL_I2C_MspInit: + 1510 .LVL110: + 1511 .LFB132: + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1512 .loc 1 692 1 is_stmt 1 view -0 + 1513 .cfi_startproc + 1514 @ args = 0, pretend = 0, frame = 0 + 1515 @ frame_needed = 0, uses_anonymous_args = 0 + 1516 @ link register save eliminated. + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1517 .loc 1 694 3 view .LVU482 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1518 .loc 1 699 1 is_stmt 0 view .LVU483 + 1519 0000 7047 bx lr + 1520 .cfi_endproc + 1521 .LFE132: + 1523 .section .text.HAL_I2C_Init,"ax",%progbits + 1524 .align 1 + 1525 .global HAL_I2C_Init + 1526 .syntax unified + 1527 .thumb + 1528 .thumb_func + 1530 HAL_I2C_Init: + 1531 .LVL111: + 1532 .LFB130: + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1533 .loc 1 536 1 is_stmt 1 view -0 + 1534 .cfi_startproc + 1535 @ args = 0, pretend = 0, frame = 0 + 1536 @ frame_needed = 0, uses_anonymous_args = 0 + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1537 .loc 1 538 3 view .LVU485 + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1538 .loc 1 538 6 is_stmt 0 view .LVU486 + 1539 0000 0028 cmp r0, #0 + 1540 0002 59D0 beq .L139 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1541 .loc 1 536 1 view .LVU487 + 1542 0004 10B5 push {r4, lr} + 1543 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccNVyn8W.s page 162 + + + 1544 .cfi_offset 4, -8 + 1545 .cfi_offset 14, -4 + 1546 0006 0446 mov r4, r0 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 1547 .loc 1 544 3 is_stmt 1 view .LVU488 + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 1548 .loc 1 545 3 view .LVU489 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 1549 .loc 1 546 3 view .LVU490 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 1550 .loc 1 547 3 view .LVU491 + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 1551 .loc 1 548 3 view .LVU492 + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 1552 .loc 1 549 3 view .LVU493 + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 1553 .loc 1 550 3 view .LVU494 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1554 .loc 1 551 3 view .LVU495 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1555 .loc 1 553 3 view .LVU496 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1556 .loc 1 553 11 is_stmt 0 view .LVU497 + 1557 0008 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1558 .loc 1 553 6 view .LVU498 + 1559 000c 002B cmp r3, #0 + 1560 000e 43D0 beq .L144 + 1561 .LVL112: + 1562 .L135: + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1563 .loc 1 584 3 is_stmt 1 view .LVU499 + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1564 .loc 1 584 15 is_stmt 0 view .LVU500 + 1565 0010 2423 movs r3, #36 + 1566 0012 84F84130 strb r3, [r4, #65] + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1567 .loc 1 587 3 is_stmt 1 view .LVU501 + 1568 0016 2268 ldr r2, [r4] + 1569 0018 1368 ldr r3, [r2] + 1570 001a 23F00103 bic r3, r3, #1 + 1571 001e 1360 str r3, [r2] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1572 .loc 1 591 3 view .LVU502 + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1573 .loc 1 591 39 is_stmt 0 view .LVU503 + 1574 0020 6368 ldr r3, [r4, #4] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1575 .loc 1 591 7 view .LVU504 + 1576 0022 2268 ldr r2, [r4] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1577 .loc 1 591 47 view .LVU505 + 1578 0024 23F07063 bic r3, r3, #251658240 + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1579 .loc 1 591 27 view .LVU506 + 1580 0028 1361 str r3, [r2, #16] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 163 + + + 1581 .loc 1 595 3 is_stmt 1 view .LVU507 + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1582 .loc 1 595 7 is_stmt 0 view .LVU508 + 1583 002a 2268 ldr r2, [r4] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1584 .loc 1 595 17 view .LVU509 + 1585 002c 9368 ldr r3, [r2, #8] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1586 .loc 1 595 24 view .LVU510 + 1587 002e 23F40043 bic r3, r3, #32768 + 1588 0032 9360 str r3, [r2, #8] + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1589 .loc 1 598 3 is_stmt 1 view .LVU511 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1590 .loc 1 598 17 is_stmt 0 view .LVU512 + 1591 0034 E368 ldr r3, [r4, #12] + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1592 .loc 1 598 6 view .LVU513 + 1593 0036 012B cmp r3, #1 + 1594 0038 33D0 beq .L145 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1595 .loc 1 604 5 is_stmt 1 view .LVU514 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1596 .loc 1 604 75 is_stmt 0 view .LVU515 + 1597 003a A368 ldr r3, [r4, #8] + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1598 .loc 1 604 9 view .LVU516 + 1599 003c 2268 ldr r2, [r4] + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1600 .loc 1 604 63 view .LVU517 + 1601 003e 43F40443 orr r3, r3, #33792 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1602 .loc 1 604 26 view .LVU518 + 1603 0042 9360 str r3, [r2, #8] + 1604 .L137: + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1605 .loc 1 609 3 is_stmt 1 view .LVU519 + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1606 .loc 1 609 17 is_stmt 0 view .LVU520 + 1607 0044 E368 ldr r3, [r4, #12] + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1608 .loc 1 609 6 view .LVU521 + 1609 0046 022B cmp r3, #2 + 1610 0048 31D0 beq .L146 + 1611 .L138: + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1612 .loc 1 614 3 is_stmt 1 view .LVU522 + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1613 .loc 1 614 7 is_stmt 0 view .LVU523 + 1614 004a 2268 ldr r2, [r4] + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1615 .loc 1 614 17 view .LVU524 + 1616 004c 5368 ldr r3, [r2, #4] + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1617 .loc 1 614 23 view .LVU525 + 1618 004e 43F00073 orr r3, r3, #33554432 + 1619 0052 43F40043 orr r3, r3, #32768 + ARM GAS /tmp/ccNVyn8W.s page 164 + + + 1620 0056 5360 str r3, [r2, #4] + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1621 .loc 1 618 3 is_stmt 1 view .LVU526 + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1622 .loc 1 618 7 is_stmt 0 view .LVU527 + 1623 0058 2268 ldr r2, [r4] + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1624 .loc 1 618 17 view .LVU528 + 1625 005a D368 ldr r3, [r2, #12] + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1626 .loc 1 618 24 view .LVU529 + 1627 005c 23F40043 bic r3, r3, #32768 + 1628 0060 D360 str r3, [r2, #12] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1629 .loc 1 621 3 is_stmt 1 view .LVU530 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1630 .loc 1 621 37 is_stmt 0 view .LVU531 + 1631 0062 2369 ldr r3, [r4, #16] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1632 .loc 1 621 66 view .LVU532 + 1633 0064 6269 ldr r2, [r4, #20] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1634 .loc 1 621 54 view .LVU533 + 1635 0066 1343 orrs r3, r3, r2 + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1636 .loc 1 622 38 view .LVU534 + 1637 0068 A169 ldr r1, [r4, #24] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1638 .loc 1 621 7 view .LVU535 + 1639 006a 2268 ldr r2, [r4] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1640 .loc 1 621 79 view .LVU536 + 1641 006c 43EA0123 orr r3, r3, r1, lsl #8 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1642 .loc 1 621 24 view .LVU537 + 1643 0070 D360 str r3, [r2, #12] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1644 .loc 1 626 3 is_stmt 1 view .LVU538 + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1645 .loc 1 626 36 is_stmt 0 view .LVU539 + 1646 0072 E369 ldr r3, [r4, #28] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1647 .loc 1 626 65 view .LVU540 + 1648 0074 216A ldr r1, [r4, #32] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1649 .loc 1 626 7 view .LVU541 + 1650 0076 2268 ldr r2, [r4] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1651 .loc 1 626 53 view .LVU542 + 1652 0078 0B43 orrs r3, r3, r1 + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1653 .loc 1 626 23 view .LVU543 + 1654 007a 1360 str r3, [r2] + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1655 .loc 1 629 3 is_stmt 1 view .LVU544 + 1656 007c 2268 ldr r2, [r4] + 1657 007e 1368 ldr r3, [r2] + ARM GAS /tmp/ccNVyn8W.s page 165 + + + 1658 0080 43F00103 orr r3, r3, #1 + 1659 0084 1360 str r3, [r2] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1660 .loc 1 631 3 view .LVU545 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1661 .loc 1 631 19 is_stmt 0 view .LVU546 + 1662 0086 0020 movs r0, #0 + 1663 0088 6064 str r0, [r4, #68] + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1664 .loc 1 632 3 is_stmt 1 view .LVU547 + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1665 .loc 1 632 15 is_stmt 0 view .LVU548 + 1666 008a 2023 movs r3, #32 + 1667 008c 84F84130 strb r3, [r4, #65] + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1668 .loc 1 633 3 is_stmt 1 view .LVU549 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1669 .loc 1 633 23 is_stmt 0 view .LVU550 + 1670 0090 2063 str r0, [r4, #48] + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1671 .loc 1 634 3 is_stmt 1 view .LVU551 + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1672 .loc 1 634 14 is_stmt 0 view .LVU552 + 1673 0092 84F84200 strb r0, [r4, #66] + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1674 .loc 1 636 3 is_stmt 1 view .LVU553 + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1675 .loc 1 637 1 is_stmt 0 view .LVU554 + 1676 0096 10BD pop {r4, pc} + 1677 .LVL113: + 1678 .L144: + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1679 .loc 1 556 5 is_stmt 1 view .LVU555 + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1680 .loc 1 556 16 is_stmt 0 view .LVU556 + 1681 0098 80F84030 strb r3, [r0, #64] + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1682 .loc 1 580 5 is_stmt 1 view .LVU557 + 1683 009c FFF7FEFF bl HAL_I2C_MspInit + 1684 .LVL114: + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1685 .loc 1 580 5 is_stmt 0 view .LVU558 + 1686 00a0 B6E7 b .L135 + 1687 .L145: + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1688 .loc 1 600 5 is_stmt 1 view .LVU559 + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1689 .loc 1 600 56 is_stmt 0 view .LVU560 + 1690 00a2 A368 ldr r3, [r4, #8] + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1691 .loc 1 600 9 view .LVU561 + 1692 00a4 2268 ldr r2, [r4] + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1693 .loc 1 600 44 view .LVU562 + 1694 00a6 43F40043 orr r3, r3, #32768 + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1695 .loc 1 600 26 view .LVU563 + ARM GAS /tmp/ccNVyn8W.s page 166 + + + 1696 00aa 9360 str r3, [r2, #8] + 1697 00ac CAE7 b .L137 + 1698 .L146: + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1699 .loc 1 611 5 is_stmt 1 view .LVU564 + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1700 .loc 1 611 9 is_stmt 0 view .LVU565 + 1701 00ae 2368 ldr r3, [r4] + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1702 .loc 1 611 25 view .LVU566 + 1703 00b0 4FF40062 mov r2, #2048 + 1704 00b4 5A60 str r2, [r3, #4] + 1705 00b6 C8E7 b .L138 + 1706 .LVL115: + 1707 .L139: + 1708 .cfi_def_cfa_offset 0 + 1709 .cfi_restore 4 + 1710 .cfi_restore 14 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1711 .loc 1 540 12 view .LVU567 + 1712 00b8 0120 movs r0, #1 + 1713 .LVL116: + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1714 .loc 1 637 1 view .LVU568 + 1715 00ba 7047 bx lr + 1716 .cfi_endproc + 1717 .LFE130: + 1719 .section .text.HAL_I2C_MspDeInit,"ax",%progbits + 1720 .align 1 + 1721 .weak HAL_I2C_MspDeInit + 1722 .syntax unified + 1723 .thumb + 1724 .thumb_func + 1726 HAL_I2C_MspDeInit: + 1727 .LVL117: + 1728 .LFB133: + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1729 .loc 1 708 1 is_stmt 1 view -0 + 1730 .cfi_startproc + 1731 @ args = 0, pretend = 0, frame = 0 + 1732 @ frame_needed = 0, uses_anonymous_args = 0 + 1733 @ link register save eliminated. + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1734 .loc 1 710 3 view .LVU570 + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1735 .loc 1 715 1 is_stmt 0 view .LVU571 + 1736 0000 7047 bx lr + 1737 .cfi_endproc + 1738 .LFE133: + 1740 .section .text.HAL_I2C_DeInit,"ax",%progbits + 1741 .align 1 + 1742 .global HAL_I2C_DeInit + 1743 .syntax unified + 1744 .thumb + 1745 .thumb_func + 1747 HAL_I2C_DeInit: + 1748 .LVL118: + ARM GAS /tmp/ccNVyn8W.s page 167 + + + 1749 .LFB131: + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1750 .loc 1 646 1 is_stmt 1 view -0 + 1751 .cfi_startproc + 1752 @ args = 0, pretend = 0, frame = 0 + 1753 @ frame_needed = 0, uses_anonymous_args = 0 + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1754 .loc 1 648 3 view .LVU573 + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1755 .loc 1 648 6 is_stmt 0 view .LVU574 + 1756 0000 A8B1 cbz r0, .L150 + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1757 .loc 1 646 1 view .LVU575 + 1758 0002 10B5 push {r4, lr} + 1759 .cfi_def_cfa_offset 8 + 1760 .cfi_offset 4, -8 + 1761 .cfi_offset 14, -4 + 1762 0004 0446 mov r4, r0 + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1763 .loc 1 654 3 is_stmt 1 view .LVU576 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1764 .loc 1 656 3 view .LVU577 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1765 .loc 1 656 15 is_stmt 0 view .LVU578 + 1766 0006 2423 movs r3, #36 + 1767 0008 80F84130 strb r3, [r0, #65] + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1768 .loc 1 659 3 is_stmt 1 view .LVU579 + 1769 000c 0268 ldr r2, [r0] + 1770 000e 1368 ldr r3, [r2] + 1771 0010 23F00103 bic r3, r3, #1 + 1772 0014 1360 str r3, [r2] + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1773 .loc 1 671 3 view .LVU580 + 1774 0016 FFF7FEFF bl HAL_I2C_MspDeInit + 1775 .LVL119: + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1776 .loc 1 674 3 view .LVU581 + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1777 .loc 1 674 19 is_stmt 0 view .LVU582 + 1778 001a 0020 movs r0, #0 + 1779 001c 6064 str r0, [r4, #68] + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1780 .loc 1 675 3 is_stmt 1 view .LVU583 + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1781 .loc 1 675 15 is_stmt 0 view .LVU584 + 1782 001e 84F84100 strb r0, [r4, #65] + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1783 .loc 1 676 3 is_stmt 1 view .LVU585 + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1784 .loc 1 676 23 is_stmt 0 view .LVU586 + 1785 0022 2063 str r0, [r4, #48] + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1786 .loc 1 677 3 is_stmt 1 view .LVU587 + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1787 .loc 1 677 14 is_stmt 0 view .LVU588 + 1788 0024 84F84200 strb r0, [r4, #66] + ARM GAS /tmp/ccNVyn8W.s page 168 + + + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1789 .loc 1 680 3 is_stmt 1 view .LVU589 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1790 .loc 1 680 3 view .LVU590 + 1791 0028 84F84000 strb r0, [r4, #64] + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1792 .loc 1 680 3 view .LVU591 + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1793 .loc 1 682 3 view .LVU592 + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1794 .loc 1 683 1 is_stmt 0 view .LVU593 + 1795 002c 10BD pop {r4, pc} + 1796 .LVL120: + 1797 .L150: + 1798 .cfi_def_cfa_offset 0 + 1799 .cfi_restore 4 + 1800 .cfi_restore 14 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1801 .loc 1 650 12 view .LVU594 + 1802 002e 0120 movs r0, #1 + 1803 .LVL121: + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1804 .loc 1 683 1 view .LVU595 + 1805 0030 7047 bx lr + 1806 .cfi_endproc + 1807 .LFE131: + 1809 .section .text.HAL_I2C_Master_Transmit,"ax",%progbits + 1810 .align 1 + 1811 .global HAL_I2C_Master_Transmit + 1812 .syntax unified + 1813 .thumb + 1814 .thumb_func + 1816 HAL_I2C_Master_Transmit: + 1817 .LVL122: + 1818 .LFB134: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 1819 .loc 1 1116 1 is_stmt 1 view -0 + 1820 .cfi_startproc + 1821 @ args = 4, pretend = 0, frame = 0 + 1822 @ frame_needed = 0, uses_anonymous_args = 0 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 1823 .loc 1 1116 1 is_stmt 0 view .LVU597 + 1824 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 1825 .cfi_def_cfa_offset 32 + 1826 .cfi_offset 4, -32 + 1827 .cfi_offset 5, -28 + 1828 .cfi_offset 6, -24 + 1829 .cfi_offset 7, -20 + 1830 .cfi_offset 8, -16 + 1831 .cfi_offset 9, -12 + 1832 .cfi_offset 10, -8 + 1833 .cfi_offset 14, -4 + 1834 0004 82B0 sub sp, sp, #8 + 1835 .cfi_def_cfa_offset 40 + 1836 0006 0F46 mov r7, r1 + 1837 0008 0A9E ldr r6, [sp, #40] +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 169 + + + 1838 .loc 1 1117 3 is_stmt 1 view .LVU598 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1839 .loc 1 1119 3 view .LVU599 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1840 .loc 1 1119 11 is_stmt 0 view .LVU600 + 1841 000a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 1842 .LVL123: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1843 .loc 1 1119 11 view .LVU601 + 1844 000e C9B2 uxtb r1, r1 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1845 .loc 1 1119 6 view .LVU602 + 1846 0010 2029 cmp r1, #32 + 1847 0012 40F0A380 bne .L163 + 1848 0016 0446 mov r4, r0 + 1849 0018 9046 mov r8, r2 + 1850 001a 9946 mov r9, r3 +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1851 .loc 1 1122 5 is_stmt 1 view .LVU603 +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1852 .loc 1 1122 5 view .LVU604 + 1853 001c 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 1854 .LVL124: +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1855 .loc 1 1122 5 is_stmt 0 view .LVU605 + 1856 0020 012B cmp r3, #1 + 1857 0022 00F09F80 beq .L164 +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1858 .loc 1 1122 5 is_stmt 1 discriminator 2 view .LVU606 + 1859 0026 4FF0010A mov r10, #1 + 1860 002a 80F840A0 strb r10, [r0, #64] +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1861 .loc 1 1122 5 discriminator 2 view .LVU607 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1862 .loc 1 1125 5 view .LVU608 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1863 .loc 1 1125 17 is_stmt 0 view .LVU609 + 1864 002e FFF7FEFF bl HAL_GetTick + 1865 .LVL125: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1866 .loc 1 1125 17 view .LVU610 + 1867 0032 0546 mov r5, r0 + 1868 .LVL126: +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1869 .loc 1 1127 5 is_stmt 1 view .LVU611 +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1870 .loc 1 1127 9 is_stmt 0 view .LVU612 + 1871 0034 0090 str r0, [sp] + 1872 0036 1923 movs r3, #25 + 1873 0038 5246 mov r2, r10 + 1874 003a 4FF40041 mov r1, #32768 + 1875 003e 2046 mov r0, r4 + 1876 .LVL127: +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1877 .loc 1 1127 9 view .LVU613 + 1878 0040 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1879 .LVL128: + ARM GAS /tmp/ccNVyn8W.s page 170 + + +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1880 .loc 1 1127 8 discriminator 1 view .LVU614 + 1881 0044 0028 cmp r0, #0 + 1882 0046 40F08F80 bne .L165 +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 1883 .loc 1 1132 5 is_stmt 1 view .LVU615 +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 1884 .loc 1 1132 21 is_stmt 0 view .LVU616 + 1885 004a 2123 movs r3, #33 + 1886 004c 84F84130 strb r3, [r4, #65] +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 1887 .loc 1 1133 5 is_stmt 1 view .LVU617 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 1888 .loc 1 1133 21 is_stmt 0 view .LVU618 + 1889 0050 1023 movs r3, #16 + 1890 0052 84F84230 strb r3, [r4, #66] +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1891 .loc 1 1134 5 is_stmt 1 view .LVU619 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1892 .loc 1 1134 21 is_stmt 0 view .LVU620 + 1893 0056 0023 movs r3, #0 + 1894 0058 6364 str r3, [r4, #68] +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 1895 .loc 1 1137 5 is_stmt 1 view .LVU621 +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 1896 .loc 1 1137 21 is_stmt 0 view .LVU622 + 1897 005a C4F82480 str r8, [r4, #36] +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 1898 .loc 1 1138 5 is_stmt 1 view .LVU623 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 1899 .loc 1 1138 21 is_stmt 0 view .LVU624 + 1900 005e A4F82A90 strh r9, [r4, #42] @ movhi +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1901 .loc 1 1139 5 is_stmt 1 view .LVU625 +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1902 .loc 1 1139 21 is_stmt 0 view .LVU626 + 1903 0062 6363 str r3, [r4, #52] +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1904 .loc 1 1143 5 is_stmt 1 view .LVU627 +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1905 .loc 1 1143 13 is_stmt 0 view .LVU628 + 1906 0064 638D ldrh r3, [r4, #42] + 1907 0066 9BB2 uxth r3, r3 +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1908 .loc 1 1143 8 view .LVU629 + 1909 0068 FF2B cmp r3, #255 + 1910 006a 0AD9 bls .L157 +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 1911 .loc 1 1145 7 is_stmt 1 view .LVU630 +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 1912 .loc 1 1145 22 is_stmt 0 view .LVU631 + 1913 006c FF22 movs r2, #255 + 1914 006e 2285 strh r2, [r4, #40] @ movhi +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 1915 .loc 1 1146 7 is_stmt 1 view .LVU632 + 1916 0070 414B ldr r3, .L171 + 1917 0072 0093 str r3, [sp] + ARM GAS /tmp/ccNVyn8W.s page 171 + + + 1918 0074 4FF08073 mov r3, #16777216 + 1919 0078 3946 mov r1, r7 + 1920 007a 2046 mov r0, r4 + 1921 007c FFF7FEFF bl I2C_TransferConfig + 1922 .LVL129: + 1923 0080 18E0 b .L159 + 1924 .L157: +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1925 .loc 1 1151 7 view .LVU633 +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1926 .loc 1 1151 28 is_stmt 0 view .LVU634 + 1927 0082 628D ldrh r2, [r4, #42] + 1928 0084 92B2 uxth r2, r2 +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1929 .loc 1 1151 22 view .LVU635 + 1930 0086 2285 strh r2, [r4, #40] @ movhi +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 1931 .loc 1 1152 7 is_stmt 1 view .LVU636 + 1932 0088 3B4B ldr r3, .L171 + 1933 008a 0093 str r3, [sp] + 1934 008c 4FF00073 mov r3, #33554432 + 1935 0090 D2B2 uxtb r2, r2 + 1936 0092 3946 mov r1, r7 + 1937 0094 2046 mov r0, r4 + 1938 0096 FFF7FEFF bl I2C_TransferConfig + 1939 .LVL130: + 1940 009a 0BE0 b .L159 + 1941 .L161: +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1942 .loc 1 1188 11 view .LVU637 +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1943 .loc 1 1188 32 is_stmt 0 view .LVU638 + 1944 009c 628D ldrh r2, [r4, #42] + 1945 009e 92B2 uxth r2, r2 +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1946 .loc 1 1188 26 view .LVU639 + 1947 00a0 2285 strh r2, [r4, #40] @ movhi +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 1948 .loc 1 1189 11 is_stmt 1 view .LVU640 + 1949 00a2 0023 movs r3, #0 + 1950 00a4 0093 str r3, [sp] + 1951 00a6 4FF00073 mov r3, #33554432 + 1952 00aa D2B2 uxtb r2, r2 + 1953 00ac 3946 mov r1, r7 + 1954 00ae 2046 mov r0, r4 + 1955 00b0 FFF7FEFF bl I2C_TransferConfig + 1956 .LVL131: + 1957 .L159: +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1958 .loc 1 1156 28 view .LVU641 +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1959 .loc 1 1156 16 is_stmt 0 view .LVU642 + 1960 00b4 638D ldrh r3, [r4, #42] + 1961 00b6 9BB2 uxth r3, r3 +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1962 .loc 1 1156 28 view .LVU643 + 1963 00b8 002B cmp r3, #0 + ARM GAS /tmp/ccNVyn8W.s page 172 + + + 1964 00ba 33D0 beq .L170 +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1965 .loc 1 1159 7 is_stmt 1 view .LVU644 +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1966 .loc 1 1159 11 is_stmt 0 view .LVU645 + 1967 00bc 2A46 mov r2, r5 + 1968 00be 3146 mov r1, r6 + 1969 00c0 2046 mov r0, r4 + 1970 00c2 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1971 .LVL132: +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1972 .loc 1 1159 10 discriminator 1 view .LVU646 + 1973 00c6 0028 cmp r0, #0 + 1974 00c8 50D1 bne .L166 +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1975 .loc 1 1164 7 is_stmt 1 view .LVU647 +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1976 .loc 1 1164 35 is_stmt 0 view .LVU648 + 1977 00ca 626A ldr r2, [r4, #36] +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1978 .loc 1 1164 11 view .LVU649 + 1979 00cc 2368 ldr r3, [r4] +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1980 .loc 1 1164 30 view .LVU650 + 1981 00ce 1278 ldrb r2, [r2] @ zero_extendqisi2 +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1982 .loc 1 1164 28 view .LVU651 + 1983 00d0 9A62 str r2, [r3, #40] +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1984 .loc 1 1167 7 is_stmt 1 view .LVU652 +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1985 .loc 1 1167 11 is_stmt 0 view .LVU653 + 1986 00d2 636A ldr r3, [r4, #36] +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1987 .loc 1 1167 21 view .LVU654 + 1988 00d4 0133 adds r3, r3, #1 + 1989 00d6 6362 str r3, [r4, #36] +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 1990 .loc 1 1169 7 is_stmt 1 view .LVU655 +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 1991 .loc 1 1169 11 is_stmt 0 view .LVU656 + 1992 00d8 638D ldrh r3, [r4, #42] + 1993 00da 9BB2 uxth r3, r3 +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 1994 .loc 1 1169 22 view .LVU657 + 1995 00dc 013B subs r3, r3, #1 + 1996 00de 9BB2 uxth r3, r3 + 1997 00e0 6385 strh r3, [r4, #42] @ movhi +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1998 .loc 1 1170 7 is_stmt 1 view .LVU658 +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1999 .loc 1 1170 11 is_stmt 0 view .LVU659 + 2000 00e2 238D ldrh r3, [r4, #40] +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2001 .loc 1 1170 21 view .LVU660 + 2002 00e4 013B subs r3, r3, #1 + 2003 00e6 9BB2 uxth r3, r3 + ARM GAS /tmp/ccNVyn8W.s page 173 + + + 2004 00e8 2385 strh r3, [r4, #40] @ movhi +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2005 .loc 1 1172 7 is_stmt 1 view .LVU661 +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2006 .loc 1 1172 16 is_stmt 0 view .LVU662 + 2007 00ea 628D ldrh r2, [r4, #42] + 2008 00ec 92B2 uxth r2, r2 +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2009 .loc 1 1172 10 view .LVU663 + 2010 00ee 002A cmp r2, #0 + 2011 00f0 E0D0 beq .L159 +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2012 .loc 1 1172 35 discriminator 1 view .LVU664 + 2013 00f2 002B cmp r3, #0 + 2014 00f4 DED1 bne .L159 +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2015 .loc 1 1175 9 is_stmt 1 view .LVU665 +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2016 .loc 1 1175 13 is_stmt 0 view .LVU666 + 2017 00f6 0095 str r5, [sp] + 2018 00f8 3346 mov r3, r6 + 2019 00fa 0022 movs r2, #0 + 2020 00fc 8021 movs r1, #128 + 2021 00fe 2046 mov r0, r4 + 2022 0100 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2023 .LVL133: +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2024 .loc 1 1175 12 discriminator 1 view .LVU667 + 2025 0104 A0BB cbnz r0, .L167 +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2026 .loc 1 1180 9 is_stmt 1 view .LVU668 +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2027 .loc 1 1180 17 is_stmt 0 view .LVU669 + 2028 0106 638D ldrh r3, [r4, #42] + 2029 0108 9BB2 uxth r3, r3 +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2030 .loc 1 1180 12 view .LVU670 + 2031 010a FF2B cmp r3, #255 + 2032 010c C6D9 bls .L161 +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2033 .loc 1 1182 11 is_stmt 1 view .LVU671 +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2034 .loc 1 1182 26 is_stmt 0 view .LVU672 + 2035 010e FF22 movs r2, #255 + 2036 0110 2285 strh r2, [r4, #40] @ movhi +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2037 .loc 1 1183 11 is_stmt 1 view .LVU673 + 2038 0112 0023 movs r3, #0 + 2039 0114 0093 str r3, [sp] + 2040 0116 4FF08073 mov r3, #16777216 + 2041 011a 3946 mov r1, r7 + 2042 011c 2046 mov r0, r4 + 2043 011e FFF7FEFF bl I2C_TransferConfig + 2044 .LVL134: + 2045 0122 C7E7 b .L159 + 2046 .L170: +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 174 + + + 2047 .loc 1 1197 5 view .LVU674 +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2048 .loc 1 1197 9 is_stmt 0 view .LVU675 + 2049 0124 2A46 mov r2, r5 + 2050 0126 3146 mov r1, r6 + 2051 0128 2046 mov r0, r4 + 2052 012a FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2053 .LVL135: +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2054 .loc 1 1197 8 discriminator 1 view .LVU676 + 2055 012e 08BB cbnz r0, .L168 +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2056 .loc 1 1203 5 is_stmt 1 view .LVU677 + 2057 0130 2368 ldr r3, [r4] + 2058 0132 2022 movs r2, #32 + 2059 0134 DA61 str r2, [r3, #28] +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2060 .loc 1 1206 5 view .LVU678 + 2061 0136 2168 ldr r1, [r4] + 2062 0138 4B68 ldr r3, [r1, #4] + 2063 013a 23F0FF73 bic r3, r3, #33423360 + 2064 013e 23F48B33 bic r3, r3, #71168 + 2065 0142 23F4FF73 bic r3, r3, #510 + 2066 0146 23F00103 bic r3, r3, #1 + 2067 014a 4B60 str r3, [r1, #4] +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2068 .loc 1 1208 5 view .LVU679 +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2069 .loc 1 1208 17 is_stmt 0 view .LVU680 + 2070 014c 84F84120 strb r2, [r4, #65] +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2071 .loc 1 1209 5 is_stmt 1 view .LVU681 +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2072 .loc 1 1209 17 is_stmt 0 view .LVU682 + 2073 0150 0023 movs r3, #0 + 2074 0152 84F84230 strb r3, [r4, #66] +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2075 .loc 1 1212 5 is_stmt 1 view .LVU683 +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2076 .loc 1 1212 5 view .LVU684 + 2077 0156 84F84030 strb r3, [r4, #64] +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2078 .loc 1 1212 5 view .LVU685 +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2079 .loc 1 1214 5 view .LVU686 +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2080 .loc 1 1214 12 is_stmt 0 view .LVU687 + 2081 015a 00E0 b .L156 + 2082 .LVL136: + 2083 .L163: +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2084 .loc 1 1218 12 view .LVU688 + 2085 015c 0220 movs r0, #2 + 2086 .LVL137: + 2087 .L156: +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2088 .loc 1 1220 1 view .LVU689 + ARM GAS /tmp/ccNVyn8W.s page 175 + + + 2089 015e 02B0 add sp, sp, #8 + 2090 .cfi_remember_state + 2091 .cfi_def_cfa_offset 32 + 2092 @ sp needed + 2093 0160 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 2094 .LVL138: + 2095 .L164: + 2096 .cfi_restore_state +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2097 .loc 1 1122 5 discriminator 1 view .LVU690 + 2098 0164 0220 movs r0, #2 + 2099 .LVL139: +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2100 .loc 1 1122 5 discriminator 1 view .LVU691 + 2101 0166 FAE7 b .L156 + 2102 .LVL140: + 2103 .L165: +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2104 .loc 1 1129 14 view .LVU692 + 2105 0168 0120 movs r0, #1 + 2106 016a F8E7 b .L156 + 2107 .L166: +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2108 .loc 1 1161 16 view .LVU693 + 2109 016c 0120 movs r0, #1 + 2110 016e F6E7 b .L156 + 2111 .L167: +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2112 .loc 1 1177 18 view .LVU694 + 2113 0170 0120 movs r0, #1 + 2114 0172 F4E7 b .L156 + 2115 .L168: +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2116 .loc 1 1199 14 view .LVU695 + 2117 0174 0120 movs r0, #1 + 2118 0176 F2E7 b .L156 + 2119 .L172: + 2120 .align 2 + 2121 .L171: + 2122 0178 00200080 .word -2147475456 + 2123 .cfi_endproc + 2124 .LFE134: + 2126 .section .text.HAL_I2C_Master_Receive,"ax",%progbits + 2127 .align 1 + 2128 .global HAL_I2C_Master_Receive + 2129 .syntax unified + 2130 .thumb + 2131 .thumb_func + 2133 HAL_I2C_Master_Receive: + 2134 .LVL141: + 2135 .LFB135: +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2136 .loc 1 1235 1 is_stmt 1 view -0 + 2137 .cfi_startproc + 2138 @ args = 4, pretend = 0, frame = 0 + 2139 @ frame_needed = 0, uses_anonymous_args = 0 +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + ARM GAS /tmp/ccNVyn8W.s page 176 + + + 2140 .loc 1 1235 1 is_stmt 0 view .LVU697 + 2141 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 2142 .cfi_def_cfa_offset 32 + 2143 .cfi_offset 4, -32 + 2144 .cfi_offset 5, -28 + 2145 .cfi_offset 6, -24 + 2146 .cfi_offset 7, -20 + 2147 .cfi_offset 8, -16 + 2148 .cfi_offset 9, -12 + 2149 .cfi_offset 10, -8 + 2150 .cfi_offset 14, -4 + 2151 0004 82B0 sub sp, sp, #8 + 2152 .cfi_def_cfa_offset 40 + 2153 0006 0F46 mov r7, r1 + 2154 0008 0A9E ldr r6, [sp, #40] +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2155 .loc 1 1236 3 is_stmt 1 view .LVU698 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2156 .loc 1 1238 3 view .LVU699 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2157 .loc 1 1238 11 is_stmt 0 view .LVU700 + 2158 000a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 2159 .LVL142: +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2160 .loc 1 1238 11 view .LVU701 + 2161 000e C9B2 uxtb r1, r1 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2162 .loc 1 1238 6 view .LVU702 + 2163 0010 2029 cmp r1, #32 + 2164 0012 40F0A280 bne .L181 + 2165 0016 0446 mov r4, r0 + 2166 0018 9046 mov r8, r2 + 2167 001a 9946 mov r9, r3 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2168 .loc 1 1241 5 is_stmt 1 view .LVU703 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2169 .loc 1 1241 5 view .LVU704 + 2170 001c 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2171 .LVL143: +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2172 .loc 1 1241 5 is_stmt 0 view .LVU705 + 2173 0020 012B cmp r3, #1 + 2174 0022 00F09E80 beq .L182 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2175 .loc 1 1241 5 is_stmt 1 discriminator 2 view .LVU706 + 2176 0026 4FF0010A mov r10, #1 + 2177 002a 80F840A0 strb r10, [r0, #64] +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2178 .loc 1 1241 5 discriminator 2 view .LVU707 +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2179 .loc 1 1244 5 view .LVU708 +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2180 .loc 1 1244 17 is_stmt 0 view .LVU709 + 2181 002e FFF7FEFF bl HAL_GetTick + 2182 .LVL144: +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2183 .loc 1 1244 17 view .LVU710 + ARM GAS /tmp/ccNVyn8W.s page 177 + + + 2184 0032 0546 mov r5, r0 + 2185 .LVL145: +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2186 .loc 1 1246 5 is_stmt 1 view .LVU711 +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2187 .loc 1 1246 9 is_stmt 0 view .LVU712 + 2188 0034 0090 str r0, [sp] + 2189 0036 1923 movs r3, #25 + 2190 0038 5246 mov r2, r10 + 2191 003a 4FF40041 mov r1, #32768 + 2192 003e 2046 mov r0, r4 + 2193 .LVL146: +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2194 .loc 1 1246 9 view .LVU713 + 2195 0040 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2196 .LVL147: +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2197 .loc 1 1246 8 discriminator 1 view .LVU714 + 2198 0044 0028 cmp r0, #0 + 2199 0046 40F08E80 bne .L183 +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2200 .loc 1 1251 5 is_stmt 1 view .LVU715 +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2201 .loc 1 1251 21 is_stmt 0 view .LVU716 + 2202 004a 2223 movs r3, #34 + 2203 004c 84F84130 strb r3, [r4, #65] +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2204 .loc 1 1252 5 is_stmt 1 view .LVU717 +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2205 .loc 1 1252 21 is_stmt 0 view .LVU718 + 2206 0050 1023 movs r3, #16 + 2207 0052 84F84230 strb r3, [r4, #66] +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2208 .loc 1 1253 5 is_stmt 1 view .LVU719 +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2209 .loc 1 1253 21 is_stmt 0 view .LVU720 + 2210 0056 0023 movs r3, #0 + 2211 0058 6364 str r3, [r4, #68] +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2212 .loc 1 1256 5 is_stmt 1 view .LVU721 +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2213 .loc 1 1256 21 is_stmt 0 view .LVU722 + 2214 005a C4F82480 str r8, [r4, #36] +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2215 .loc 1 1257 5 is_stmt 1 view .LVU723 +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2216 .loc 1 1257 21 is_stmt 0 view .LVU724 + 2217 005e A4F82A90 strh r9, [r4, #42] @ movhi +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2218 .loc 1 1258 5 is_stmt 1 view .LVU725 +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2219 .loc 1 1258 21 is_stmt 0 view .LVU726 + 2220 0062 6363 str r3, [r4, #52] +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2221 .loc 1 1262 5 is_stmt 1 view .LVU727 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2222 .loc 1 1262 13 is_stmt 0 view .LVU728 + ARM GAS /tmp/ccNVyn8W.s page 178 + + + 2223 0064 638D ldrh r3, [r4, #42] + 2224 0066 9BB2 uxth r3, r3 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2225 .loc 1 1262 8 view .LVU729 + 2226 0068 FF2B cmp r3, #255 + 2227 006a 0AD9 bls .L175 +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2228 .loc 1 1264 7 is_stmt 1 view .LVU730 +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2229 .loc 1 1264 22 is_stmt 0 view .LVU731 + 2230 006c FF22 movs r2, #255 + 2231 006e 2285 strh r2, [r4, #40] @ movhi +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2232 .loc 1 1265 7 is_stmt 1 view .LVU732 + 2233 0070 414B ldr r3, .L189 + 2234 0072 0093 str r3, [sp] + 2235 0074 4FF08073 mov r3, #16777216 + 2236 0078 3946 mov r1, r7 + 2237 007a 2046 mov r0, r4 + 2238 007c FFF7FEFF bl I2C_TransferConfig + 2239 .LVL148: + 2240 0080 18E0 b .L177 + 2241 .L175: +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2242 .loc 1 1270 7 view .LVU733 +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2243 .loc 1 1270 28 is_stmt 0 view .LVU734 + 2244 0082 628D ldrh r2, [r4, #42] + 2245 0084 92B2 uxth r2, r2 +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2246 .loc 1 1270 22 view .LVU735 + 2247 0086 2285 strh r2, [r4, #40] @ movhi +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2248 .loc 1 1271 7 is_stmt 1 view .LVU736 + 2249 0088 3B4B ldr r3, .L189 + 2250 008a 0093 str r3, [sp] + 2251 008c 4FF00073 mov r3, #33554432 + 2252 0090 D2B2 uxtb r2, r2 + 2253 0092 3946 mov r1, r7 + 2254 0094 2046 mov r0, r4 + 2255 0096 FFF7FEFF bl I2C_TransferConfig + 2256 .LVL149: + 2257 009a 0BE0 b .L177 + 2258 .L179: +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2259 .loc 1 1308 11 view .LVU737 +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2260 .loc 1 1308 32 is_stmt 0 view .LVU738 + 2261 009c 628D ldrh r2, [r4, #42] + 2262 009e 92B2 uxth r2, r2 +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2263 .loc 1 1308 26 view .LVU739 + 2264 00a0 2285 strh r2, [r4, #40] @ movhi +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2265 .loc 1 1309 11 is_stmt 1 view .LVU740 + 2266 00a2 0023 movs r3, #0 + 2267 00a4 0093 str r3, [sp] + ARM GAS /tmp/ccNVyn8W.s page 179 + + + 2268 00a6 4FF00073 mov r3, #33554432 + 2269 00aa D2B2 uxtb r2, r2 + 2270 00ac 3946 mov r1, r7 + 2271 00ae 2046 mov r0, r4 + 2272 00b0 FFF7FEFF bl I2C_TransferConfig + 2273 .LVL150: + 2274 .L177: +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2275 .loc 1 1275 28 view .LVU741 +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2276 .loc 1 1275 16 is_stmt 0 view .LVU742 + 2277 00b4 638D ldrh r3, [r4, #42] + 2278 00b6 9BB2 uxth r3, r3 +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2279 .loc 1 1275 28 view .LVU743 + 2280 00b8 002B cmp r3, #0 + 2281 00ba 32D0 beq .L188 +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2282 .loc 1 1278 7 is_stmt 1 view .LVU744 +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2283 .loc 1 1278 11 is_stmt 0 view .LVU745 + 2284 00bc 2A46 mov r2, r5 + 2285 00be 3146 mov r1, r6 + 2286 00c0 2046 mov r0, r4 + 2287 00c2 FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 2288 .LVL151: +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2289 .loc 1 1278 10 discriminator 1 view .LVU746 + 2290 00c6 0028 cmp r0, #0 + 2291 00c8 4FD1 bne .L184 +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2292 .loc 1 1284 7 is_stmt 1 view .LVU747 +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2293 .loc 1 1284 38 is_stmt 0 view .LVU748 + 2294 00ca 2368 ldr r3, [r4] +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2295 .loc 1 1284 48 view .LVU749 + 2296 00cc 5A6A ldr r2, [r3, #36] +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2297 .loc 1 1284 12 view .LVU750 + 2298 00ce 636A ldr r3, [r4, #36] +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2299 .loc 1 1284 23 view .LVU751 + 2300 00d0 1A70 strb r2, [r3] +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2301 .loc 1 1287 7 is_stmt 1 view .LVU752 +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2302 .loc 1 1287 11 is_stmt 0 view .LVU753 + 2303 00d2 636A ldr r3, [r4, #36] +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2304 .loc 1 1287 21 view .LVU754 + 2305 00d4 0133 adds r3, r3, #1 + 2306 00d6 6362 str r3, [r4, #36] +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 2307 .loc 1 1289 7 is_stmt 1 view .LVU755 +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 2308 .loc 1 1289 11 is_stmt 0 view .LVU756 + ARM GAS /tmp/ccNVyn8W.s page 180 + + + 2309 00d8 228D ldrh r2, [r4, #40] +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 2310 .loc 1 1289 21 view .LVU757 + 2311 00da 013A subs r2, r2, #1 + 2312 00dc 92B2 uxth r2, r2 + 2313 00de 2285 strh r2, [r4, #40] @ movhi +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2314 .loc 1 1290 7 is_stmt 1 view .LVU758 +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2315 .loc 1 1290 11 is_stmt 0 view .LVU759 + 2316 00e0 638D ldrh r3, [r4, #42] + 2317 00e2 9BB2 uxth r3, r3 +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2318 .loc 1 1290 22 view .LVU760 + 2319 00e4 013B subs r3, r3, #1 + 2320 00e6 9BB2 uxth r3, r3 + 2321 00e8 6385 strh r3, [r4, #42] @ movhi +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2322 .loc 1 1292 7 is_stmt 1 view .LVU761 +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2323 .loc 1 1292 16 is_stmt 0 view .LVU762 + 2324 00ea 638D ldrh r3, [r4, #42] + 2325 00ec 9BB2 uxth r3, r3 +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2326 .loc 1 1292 10 view .LVU763 + 2327 00ee 002B cmp r3, #0 + 2328 00f0 E0D0 beq .L177 +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2329 .loc 1 1292 35 discriminator 1 view .LVU764 + 2330 00f2 002A cmp r2, #0 + 2331 00f4 DED1 bne .L177 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2332 .loc 1 1295 9 is_stmt 1 view .LVU765 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2333 .loc 1 1295 13 is_stmt 0 view .LVU766 + 2334 00f6 0095 str r5, [sp] + 2335 00f8 3346 mov r3, r6 + 2336 00fa 8021 movs r1, #128 + 2337 00fc 2046 mov r0, r4 + 2338 00fe FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2339 .LVL152: +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2340 .loc 1 1295 12 discriminator 1 view .LVU767 + 2341 0102 A0BB cbnz r0, .L185 +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2342 .loc 1 1300 9 is_stmt 1 view .LVU768 +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2343 .loc 1 1300 17 is_stmt 0 view .LVU769 + 2344 0104 638D ldrh r3, [r4, #42] + 2345 0106 9BB2 uxth r3, r3 +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2346 .loc 1 1300 12 view .LVU770 + 2347 0108 FF2B cmp r3, #255 + 2348 010a C7D9 bls .L179 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2349 .loc 1 1302 11 is_stmt 1 view .LVU771 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + ARM GAS /tmp/ccNVyn8W.s page 181 + + + 2350 .loc 1 1302 26 is_stmt 0 view .LVU772 + 2351 010c FF22 movs r2, #255 + 2352 010e 2285 strh r2, [r4, #40] @ movhi +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2353 .loc 1 1303 11 is_stmt 1 view .LVU773 + 2354 0110 0023 movs r3, #0 + 2355 0112 0093 str r3, [sp] + 2356 0114 4FF08073 mov r3, #16777216 + 2357 0118 3946 mov r1, r7 + 2358 011a 2046 mov r0, r4 + 2359 011c FFF7FEFF bl I2C_TransferConfig + 2360 .LVL153: + 2361 0120 C8E7 b .L177 + 2362 .L188: +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2363 .loc 1 1317 5 view .LVU774 +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2364 .loc 1 1317 9 is_stmt 0 view .LVU775 + 2365 0122 2A46 mov r2, r5 + 2366 0124 3146 mov r1, r6 + 2367 0126 2046 mov r0, r4 + 2368 0128 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2369 .LVL154: +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2370 .loc 1 1317 8 discriminator 1 view .LVU776 + 2371 012c 08BB cbnz r0, .L186 +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2372 .loc 1 1323 5 is_stmt 1 view .LVU777 + 2373 012e 2368 ldr r3, [r4] + 2374 0130 2022 movs r2, #32 + 2375 0132 DA61 str r2, [r3, #28] +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2376 .loc 1 1326 5 view .LVU778 + 2377 0134 2168 ldr r1, [r4] + 2378 0136 4B68 ldr r3, [r1, #4] + 2379 0138 23F0FF73 bic r3, r3, #33423360 + 2380 013c 23F48B33 bic r3, r3, #71168 + 2381 0140 23F4FF73 bic r3, r3, #510 + 2382 0144 23F00103 bic r3, r3, #1 + 2383 0148 4B60 str r3, [r1, #4] +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2384 .loc 1 1328 5 view .LVU779 +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2385 .loc 1 1328 17 is_stmt 0 view .LVU780 + 2386 014a 84F84120 strb r2, [r4, #65] +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2387 .loc 1 1329 5 is_stmt 1 view .LVU781 +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2388 .loc 1 1329 17 is_stmt 0 view .LVU782 + 2389 014e 0023 movs r3, #0 + 2390 0150 84F84230 strb r3, [r4, #66] +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2391 .loc 1 1332 5 is_stmt 1 view .LVU783 +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2392 .loc 1 1332 5 view .LVU784 + 2393 0154 84F84030 strb r3, [r4, #64] +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 182 + + + 2394 .loc 1 1332 5 view .LVU785 +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2395 .loc 1 1334 5 view .LVU786 +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2396 .loc 1 1334 12 is_stmt 0 view .LVU787 + 2397 0158 00E0 b .L174 + 2398 .LVL155: + 2399 .L181: +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2400 .loc 1 1338 12 view .LVU788 + 2401 015a 0220 movs r0, #2 + 2402 .LVL156: + 2403 .L174: +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2404 .loc 1 1340 1 view .LVU789 + 2405 015c 02B0 add sp, sp, #8 + 2406 .cfi_remember_state + 2407 .cfi_def_cfa_offset 32 + 2408 @ sp needed + 2409 015e BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 2410 .LVL157: + 2411 .L182: + 2412 .cfi_restore_state +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2413 .loc 1 1241 5 discriminator 1 view .LVU790 + 2414 0162 0220 movs r0, #2 + 2415 .LVL158: +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2416 .loc 1 1241 5 discriminator 1 view .LVU791 + 2417 0164 FAE7 b .L174 + 2418 .LVL159: + 2419 .L183: +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2420 .loc 1 1248 14 view .LVU792 + 2421 0166 0120 movs r0, #1 + 2422 0168 F8E7 b .L174 + 2423 .L184: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2424 .loc 1 1280 16 view .LVU793 + 2425 016a 0120 movs r0, #1 + 2426 016c F6E7 b .L174 + 2427 .L185: +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2428 .loc 1 1297 18 view .LVU794 + 2429 016e 0120 movs r0, #1 + 2430 0170 F4E7 b .L174 + 2431 .L186: +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2432 .loc 1 1319 14 view .LVU795 + 2433 0172 0120 movs r0, #1 + 2434 0174 F2E7 b .L174 + 2435 .L190: + 2436 0176 00BF .align 2 + 2437 .L189: + 2438 0178 00240080 .word -2147474432 + 2439 .cfi_endproc + 2440 .LFE135: + ARM GAS /tmp/ccNVyn8W.s page 183 + + + 2442 .section .text.HAL_I2C_Slave_Transmit,"ax",%progbits + 2443 .align 1 + 2444 .global HAL_I2C_Slave_Transmit + 2445 .syntax unified + 2446 .thumb + 2447 .thumb_func + 2449 HAL_I2C_Slave_Transmit: + 2450 .LVL160: + 2451 .LFB136: +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2452 .loc 1 1353 1 is_stmt 1 view -0 + 2453 .cfi_startproc + 2454 @ args = 0, pretend = 0, frame = 0 + 2455 @ frame_needed = 0, uses_anonymous_args = 0 +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2456 .loc 1 1353 1 is_stmt 0 view .LVU797 + 2457 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2458 .cfi_def_cfa_offset 24 + 2459 .cfi_offset 4, -24 + 2460 .cfi_offset 5, -20 + 2461 .cfi_offset 6, -16 + 2462 .cfi_offset 7, -12 + 2463 .cfi_offset 8, -8 + 2464 .cfi_offset 14, -4 + 2465 0004 82B0 sub sp, sp, #8 + 2466 .cfi_def_cfa_offset 32 + 2467 0006 1D46 mov r5, r3 +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2468 .loc 1 1354 3 is_stmt 1 view .LVU798 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2469 .loc 1 1356 3 view .LVU799 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2470 .loc 1 1356 11 is_stmt 0 view .LVU800 + 2471 0008 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 2472 .LVL161: +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2473 .loc 1 1356 11 view .LVU801 + 2474 000c DBB2 uxtb r3, r3 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2475 .loc 1 1356 6 view .LVU802 + 2476 000e 202B cmp r3, #32 + 2477 0010 40F0D980 bne .L205 + 2478 0014 0446 mov r4, r0 + 2479 0016 0F46 mov r7, r1 + 2480 0018 9046 mov r8, r2 +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2481 .loc 1 1358 5 is_stmt 1 view .LVU803 +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2482 .loc 1 1358 8 is_stmt 0 view .LVU804 + 2483 001a 0029 cmp r1, #0 + 2484 001c 56D0 beq .L193 +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2485 .loc 1 1358 25 discriminator 1 view .LVU805 + 2486 001e 002A cmp r2, #0 + 2487 0020 54D0 beq .L193 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2488 .loc 1 1364 5 is_stmt 1 view .LVU806 + ARM GAS /tmp/ccNVyn8W.s page 184 + + +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2489 .loc 1 1364 5 view .LVU807 + 2490 0022 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2491 0026 012B cmp r3, #1 + 2492 0028 00F0D180 beq .L206 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2493 .loc 1 1364 5 discriminator 2 view .LVU808 + 2494 002c 0123 movs r3, #1 + 2495 002e 80F84030 strb r3, [r0, #64] +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2496 .loc 1 1364 5 discriminator 2 view .LVU809 +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2497 .loc 1 1367 5 view .LVU810 +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2498 .loc 1 1367 17 is_stmt 0 view .LVU811 + 2499 0032 FFF7FEFF bl HAL_GetTick + 2500 .LVL162: +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2501 .loc 1 1367 17 view .LVU812 + 2502 0036 0646 mov r6, r0 + 2503 .LVL163: +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2504 .loc 1 1369 5 is_stmt 1 view .LVU813 +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2505 .loc 1 1369 21 is_stmt 0 view .LVU814 + 2506 0038 2123 movs r3, #33 + 2507 003a 84F84130 strb r3, [r4, #65] +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2508 .loc 1 1370 5 is_stmt 1 view .LVU815 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2509 .loc 1 1370 21 is_stmt 0 view .LVU816 + 2510 003e 2023 movs r3, #32 + 2511 0040 84F84230 strb r3, [r4, #66] +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2512 .loc 1 1371 5 is_stmt 1 view .LVU817 +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2513 .loc 1 1371 21 is_stmt 0 view .LVU818 + 2514 0044 0022 movs r2, #0 + 2515 0046 6264 str r2, [r4, #68] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2516 .loc 1 1374 5 is_stmt 1 view .LVU819 +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2517 .loc 1 1374 21 is_stmt 0 view .LVU820 + 2518 0048 6762 str r7, [r4, #36] +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2519 .loc 1 1375 5 is_stmt 1 view .LVU821 +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2520 .loc 1 1375 21 is_stmt 0 view .LVU822 + 2521 004a A4F82A80 strh r8, [r4, #42] @ movhi +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2522 .loc 1 1376 5 is_stmt 1 view .LVU823 +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2523 .loc 1 1376 21 is_stmt 0 view .LVU824 + 2524 004e 6263 str r2, [r4, #52] +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2525 .loc 1 1379 5 is_stmt 1 view .LVU825 +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 185 + + + 2526 .loc 1 1379 9 is_stmt 0 view .LVU826 + 2527 0050 2168 ldr r1, [r4] +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2528 .loc 1 1379 19 view .LVU827 + 2529 0052 4B68 ldr r3, [r1, #4] +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2530 .loc 1 1379 25 view .LVU828 + 2531 0054 23F40043 bic r3, r3, #32768 + 2532 0058 4B60 str r3, [r1, #4] +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2533 .loc 1 1382 5 is_stmt 1 view .LVU829 +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2534 .loc 1 1382 9 is_stmt 0 view .LVU830 + 2535 005a 0090 str r0, [sp] + 2536 005c 2B46 mov r3, r5 + 2537 005e 0821 movs r1, #8 + 2538 0060 2046 mov r0, r4 + 2539 .LVL164: +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2540 .loc 1 1382 9 view .LVU831 + 2541 0062 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2542 .LVL165: +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2543 .loc 1 1382 8 discriminator 1 view .LVU832 + 2544 0066 0028 cmp r0, #0 + 2545 0068 35D1 bne .L208 +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2546 .loc 1 1390 5 is_stmt 1 view .LVU833 +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2547 .loc 1 1390 19 is_stmt 0 view .LVU834 + 2548 006a 236A ldr r3, [r4, #32] +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2549 .loc 1 1390 8 view .LVU835 + 2550 006c B3F5003F cmp r3, #131072 + 2551 0070 38D0 beq .L209 + 2552 .L196: +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2553 .loc 1 1403 5 is_stmt 1 view .LVU836 + 2554 0072 2368 ldr r3, [r4] + 2555 0074 0822 movs r2, #8 + 2556 0076 DA61 str r2, [r3, #28] +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2557 .loc 1 1406 5 view .LVU837 +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2558 .loc 1 1406 19 is_stmt 0 view .LVU838 + 2559 0078 E368 ldr r3, [r4, #12] +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2560 .loc 1 1406 8 view .LVU839 + 2561 007a 022B cmp r3, #2 + 2562 007c 3FD0 beq .L210 + 2563 .L197: +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2564 .loc 1 1421 5 is_stmt 1 view .LVU840 +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2565 .loc 1 1421 9 is_stmt 0 view .LVU841 + 2566 007e 0096 str r6, [sp] + 2567 0080 2B46 mov r3, r5 + ARM GAS /tmp/ccNVyn8W.s page 186 + + + 2568 0082 0022 movs r2, #0 + 2569 0084 4FF48031 mov r1, #65536 + 2570 0088 2046 mov r0, r4 + 2571 008a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2572 .LVL166: +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2573 .loc 1 1421 8 discriminator 1 view .LVU842 + 2574 008e 0028 cmp r0, #0 + 2575 0090 48D1 bne .L211 + 2576 .L199: +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2577 .loc 1 1428 28 is_stmt 1 view .LVU843 +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2578 .loc 1 1428 16 is_stmt 0 view .LVU844 + 2579 0092 638D ldrh r3, [r4, #42] + 2580 0094 9BB2 uxth r3, r3 +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2581 .loc 1 1428 28 view .LVU845 + 2582 0096 002B cmp r3, #0 + 2583 0098 52D0 beq .L212 +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2584 .loc 1 1431 7 is_stmt 1 view .LVU846 +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2585 .loc 1 1431 11 is_stmt 0 view .LVU847 + 2586 009a 3246 mov r2, r6 + 2587 009c 2946 mov r1, r5 + 2588 009e 2046 mov r0, r4 + 2589 00a0 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2590 .LVL167: +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2591 .loc 1 1431 10 discriminator 1 view .LVU848 + 2592 00a4 0028 cmp r0, #0 + 2593 00a6 44D1 bne .L213 +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2594 .loc 1 1439 7 is_stmt 1 view .LVU849 +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2595 .loc 1 1439 35 is_stmt 0 view .LVU850 + 2596 00a8 626A ldr r2, [r4, #36] +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2597 .loc 1 1439 11 view .LVU851 + 2598 00aa 2368 ldr r3, [r4] +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2599 .loc 1 1439 30 view .LVU852 + 2600 00ac 1278 ldrb r2, [r2] @ zero_extendqisi2 +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2601 .loc 1 1439 28 view .LVU853 + 2602 00ae 9A62 str r2, [r3, #40] +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2603 .loc 1 1442 7 is_stmt 1 view .LVU854 +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2604 .loc 1 1442 11 is_stmt 0 view .LVU855 + 2605 00b0 636A ldr r3, [r4, #36] +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2606 .loc 1 1442 21 view .LVU856 + 2607 00b2 0133 adds r3, r3, #1 + 2608 00b4 6362 str r3, [r4, #36] +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 187 + + + 2609 .loc 1 1444 7 is_stmt 1 view .LVU857 +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2610 .loc 1 1444 11 is_stmt 0 view .LVU858 + 2611 00b6 B4F82AC0 ldrh ip, [r4, #42] + 2612 00ba 1FFA8CFC uxth ip, ip +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2613 .loc 1 1444 22 view .LVU859 + 2614 00be 0CF1FF3C add ip, ip, #-1 + 2615 00c2 1FFA8CFC uxth ip, ip + 2616 00c6 A4F82AC0 strh ip, [r4, #42] @ movhi + 2617 00ca E2E7 b .L199 + 2618 .LVL168: + 2619 .L193: +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2620 .loc 1 1360 7 is_stmt 1 view .LVU860 +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2621 .loc 1 1360 23 is_stmt 0 view .LVU861 + 2622 00cc 4FF40073 mov r3, #512 + 2623 00d0 6364 str r3, [r4, #68] +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2624 .loc 1 1361 7 is_stmt 1 view .LVU862 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2625 .loc 1 1361 15 is_stmt 0 view .LVU863 + 2626 00d2 0120 movs r0, #1 + 2627 .LVL169: +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2628 .loc 1 1361 15 view .LVU864 + 2629 00d4 78E0 b .L192 + 2630 .LVL170: + 2631 .L208: +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2632 .loc 1 1385 7 is_stmt 1 view .LVU865 +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2633 .loc 1 1385 11 is_stmt 0 view .LVU866 + 2634 00d6 2268 ldr r2, [r4] +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2635 .loc 1 1385 21 view .LVU867 + 2636 00d8 5368 ldr r3, [r2, #4] +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2637 .loc 1 1385 27 view .LVU868 + 2638 00da 43F40043 orr r3, r3, #32768 + 2639 00de 5360 str r3, [r2, #4] +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2640 .loc 1 1386 7 is_stmt 1 view .LVU869 +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2641 .loc 1 1386 14 is_stmt 0 view .LVU870 + 2642 00e0 0120 movs r0, #1 + 2643 00e2 71E0 b .L192 + 2644 .L209: +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2645 .loc 1 1394 7 is_stmt 1 view .LVU871 +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2646 .loc 1 1394 35 is_stmt 0 view .LVU872 + 2647 00e4 626A ldr r2, [r4, #36] +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2648 .loc 1 1394 11 view .LVU873 + 2649 00e6 2368 ldr r3, [r4] + ARM GAS /tmp/ccNVyn8W.s page 188 + + +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2650 .loc 1 1394 30 view .LVU874 + 2651 00e8 1278 ldrb r2, [r2] @ zero_extendqisi2 +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2652 .loc 1 1394 28 view .LVU875 + 2653 00ea 9A62 str r2, [r3, #40] +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2654 .loc 1 1397 7 is_stmt 1 view .LVU876 +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2655 .loc 1 1397 11 is_stmt 0 view .LVU877 + 2656 00ec 636A ldr r3, [r4, #36] +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2657 .loc 1 1397 21 view .LVU878 + 2658 00ee 0133 adds r3, r3, #1 + 2659 00f0 6362 str r3, [r4, #36] +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2660 .loc 1 1399 7 is_stmt 1 view .LVU879 +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2661 .loc 1 1399 11 is_stmt 0 view .LVU880 + 2662 00f2 638D ldrh r3, [r4, #42] + 2663 00f4 9BB2 uxth r3, r3 +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2664 .loc 1 1399 22 view .LVU881 + 2665 00f6 013B subs r3, r3, #1 + 2666 00f8 9BB2 uxth r3, r3 + 2667 00fa 6385 strh r3, [r4, #42] @ movhi + 2668 00fc B9E7 b .L196 + 2669 .L210: +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2670 .loc 1 1409 7 is_stmt 1 view .LVU882 +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2671 .loc 1 1409 11 is_stmt 0 view .LVU883 + 2672 00fe 0096 str r6, [sp] + 2673 0100 2B46 mov r3, r5 + 2674 0102 0022 movs r2, #0 + 2675 0104 0821 movs r1, #8 + 2676 0106 2046 mov r0, r4 + 2677 0108 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2678 .LVL171: +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2679 .loc 1 1409 10 discriminator 1 view .LVU884 + 2680 010c 18B9 cbnz r0, .L214 +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2681 .loc 1 1417 7 is_stmt 1 view .LVU885 + 2682 010e 2368 ldr r3, [r4] + 2683 0110 0822 movs r2, #8 + 2684 0112 DA61 str r2, [r3, #28] + 2685 0114 B3E7 b .L197 + 2686 .L214: +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2687 .loc 1 1412 9 view .LVU886 +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2688 .loc 1 1412 13 is_stmt 0 view .LVU887 + 2689 0116 2268 ldr r2, [r4] +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2690 .loc 1 1412 23 view .LVU888 + 2691 0118 5368 ldr r3, [r2, #4] + ARM GAS /tmp/ccNVyn8W.s page 189 + + +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2692 .loc 1 1412 29 view .LVU889 + 2693 011a 43F40043 orr r3, r3, #32768 + 2694 011e 5360 str r3, [r2, #4] +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2695 .loc 1 1413 9 is_stmt 1 view .LVU890 +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2696 .loc 1 1413 16 is_stmt 0 view .LVU891 + 2697 0120 0120 movs r0, #1 + 2698 0122 51E0 b .L192 + 2699 .L211: +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2700 .loc 1 1424 7 is_stmt 1 view .LVU892 +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2701 .loc 1 1424 11 is_stmt 0 view .LVU893 + 2702 0124 2268 ldr r2, [r4] +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2703 .loc 1 1424 21 view .LVU894 + 2704 0126 5368 ldr r3, [r2, #4] +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2705 .loc 1 1424 27 view .LVU895 + 2706 0128 43F40043 orr r3, r3, #32768 + 2707 012c 5360 str r3, [r2, #4] +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2708 .loc 1 1425 7 is_stmt 1 view .LVU896 +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2709 .loc 1 1425 14 is_stmt 0 view .LVU897 + 2710 012e 0120 movs r0, #1 + 2711 0130 4AE0 b .L192 + 2712 .L213: +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2713 .loc 1 1434 9 is_stmt 1 view .LVU898 +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2714 .loc 1 1434 13 is_stmt 0 view .LVU899 + 2715 0132 2268 ldr r2, [r4] +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2716 .loc 1 1434 23 view .LVU900 + 2717 0134 5368 ldr r3, [r2, #4] +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2718 .loc 1 1434 29 view .LVU901 + 2719 0136 43F40043 orr r3, r3, #32768 + 2720 013a 5360 str r3, [r2, #4] +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2721 .loc 1 1435 9 is_stmt 1 view .LVU902 +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2722 .loc 1 1435 16 is_stmt 0 view .LVU903 + 2723 013c 0120 movs r0, #1 + 2724 013e 43E0 b .L192 + 2725 .L212: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2726 .loc 1 1448 5 is_stmt 1 view .LVU904 +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2727 .loc 1 1448 9 is_stmt 0 view .LVU905 + 2728 0140 0096 str r6, [sp] + 2729 0142 2B46 mov r3, r5 + 2730 0144 0022 movs r2, #0 + 2731 0146 1021 movs r1, #16 + ARM GAS /tmp/ccNVyn8W.s page 190 + + + 2732 0148 2046 mov r0, r4 + 2733 014a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2734 .LVL172: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2735 .loc 1 1448 8 discriminator 1 view .LVU906 + 2736 014e 30B1 cbz r0, .L202 +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2737 .loc 1 1451 7 is_stmt 1 view .LVU907 +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2738 .loc 1 1451 11 is_stmt 0 view .LVU908 + 2739 0150 2268 ldr r2, [r4] +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2740 .loc 1 1451 21 view .LVU909 + 2741 0152 5368 ldr r3, [r2, #4] +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2742 .loc 1 1451 27 view .LVU910 + 2743 0154 43F40043 orr r3, r3, #32768 + 2744 0158 5360 str r3, [r2, #4] +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2745 .loc 1 1452 7 is_stmt 1 view .LVU911 +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2746 .loc 1 1452 14 is_stmt 0 view .LVU912 + 2747 015a 0120 movs r0, #1 + 2748 015c 34E0 b .L192 + 2749 .L202: +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2750 .loc 1 1456 5 is_stmt 1 view .LVU913 + 2751 015e 2046 mov r0, r4 + 2752 0160 FFF7FEFF bl I2C_Flush_TXDR + 2753 .LVL173: +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2754 .loc 1 1459 5 view .LVU914 + 2755 0164 2368 ldr r3, [r4] + 2756 0166 1022 movs r2, #16 + 2757 0168 DA61 str r2, [r3, #28] +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2758 .loc 1 1462 5 view .LVU915 +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2759 .loc 1 1462 9 is_stmt 0 view .LVU916 + 2760 016a 3246 mov r2, r6 + 2761 016c 2946 mov r1, r5 + 2762 016e 2046 mov r0, r4 + 2763 0170 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2764 .LVL174: +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2765 .loc 1 1462 8 discriminator 1 view .LVU917 + 2766 0174 30B1 cbz r0, .L203 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2767 .loc 1 1465 7 is_stmt 1 view .LVU918 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2768 .loc 1 1465 11 is_stmt 0 view .LVU919 + 2769 0176 2268 ldr r2, [r4] +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2770 .loc 1 1465 21 view .LVU920 + 2771 0178 5368 ldr r3, [r2, #4] +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2772 .loc 1 1465 27 view .LVU921 + ARM GAS /tmp/ccNVyn8W.s page 191 + + + 2773 017a 43F40043 orr r3, r3, #32768 + 2774 017e 5360 str r3, [r2, #4] +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2775 .loc 1 1467 7 is_stmt 1 view .LVU922 +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2776 .loc 1 1467 14 is_stmt 0 view .LVU923 + 2777 0180 0120 movs r0, #1 + 2778 0182 21E0 b .L192 + 2779 .L203: +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2780 .loc 1 1471 5 is_stmt 1 view .LVU924 + 2781 0184 2368 ldr r3, [r4] + 2782 0186 2022 movs r2, #32 + 2783 0188 DA61 str r2, [r3, #28] +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2784 .loc 1 1474 5 view .LVU925 +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2785 .loc 1 1474 9 is_stmt 0 view .LVU926 + 2786 018a 0096 str r6, [sp] + 2787 018c 2B46 mov r3, r5 + 2788 018e 0122 movs r2, #1 + 2789 0190 4FF40041 mov r1, #32768 + 2790 0194 2046 mov r0, r4 + 2791 0196 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2792 .LVL175: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2793 .loc 1 1474 8 discriminator 1 view .LVU927 + 2794 019a 30B1 cbz r0, .L204 +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2795 .loc 1 1477 7 is_stmt 1 view .LVU928 +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2796 .loc 1 1477 11 is_stmt 0 view .LVU929 + 2797 019c 2268 ldr r2, [r4] +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2798 .loc 1 1477 21 view .LVU930 + 2799 019e 5368 ldr r3, [r2, #4] +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2800 .loc 1 1477 27 view .LVU931 + 2801 01a0 43F40043 orr r3, r3, #32768 + 2802 01a4 5360 str r3, [r2, #4] +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2803 .loc 1 1478 7 is_stmt 1 view .LVU932 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2804 .loc 1 1478 14 is_stmt 0 view .LVU933 + 2805 01a6 0120 movs r0, #1 + 2806 01a8 0EE0 b .L192 + 2807 .L204: +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2808 .loc 1 1482 5 is_stmt 1 view .LVU934 +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2809 .loc 1 1482 9 is_stmt 0 view .LVU935 + 2810 01aa 2268 ldr r2, [r4] +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2811 .loc 1 1482 19 view .LVU936 + 2812 01ac 5368 ldr r3, [r2, #4] +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2813 .loc 1 1482 25 view .LVU937 + ARM GAS /tmp/ccNVyn8W.s page 192 + + + 2814 01ae 43F40043 orr r3, r3, #32768 + 2815 01b2 5360 str r3, [r2, #4] +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2816 .loc 1 1484 5 is_stmt 1 view .LVU938 +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2817 .loc 1 1484 17 is_stmt 0 view .LVU939 + 2818 01b4 2023 movs r3, #32 + 2819 01b6 84F84130 strb r3, [r4, #65] +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2820 .loc 1 1485 5 is_stmt 1 view .LVU940 +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2821 .loc 1 1485 17 is_stmt 0 view .LVU941 + 2822 01ba 0023 movs r3, #0 + 2823 01bc 84F84230 strb r3, [r4, #66] +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2824 .loc 1 1488 5 is_stmt 1 view .LVU942 +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2825 .loc 1 1488 5 view .LVU943 + 2826 01c0 84F84030 strb r3, [r4, #64] +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2827 .loc 1 1488 5 view .LVU944 +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2828 .loc 1 1490 5 view .LVU945 +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2829 .loc 1 1490 12 is_stmt 0 view .LVU946 + 2830 01c4 00E0 b .L192 + 2831 .LVL176: + 2832 .L205: +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2833 .loc 1 1494 12 view .LVU947 + 2834 01c6 0220 movs r0, #2 + 2835 .LVL177: + 2836 .L192: +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2837 .loc 1 1496 1 view .LVU948 + 2838 01c8 02B0 add sp, sp, #8 + 2839 .cfi_remember_state + 2840 .cfi_def_cfa_offset 24 + 2841 @ sp needed + 2842 01ca BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2843 .LVL178: + 2844 .L206: + 2845 .cfi_restore_state +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2846 .loc 1 1364 5 discriminator 1 view .LVU949 + 2847 01ce 0220 movs r0, #2 + 2848 .LVL179: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2849 .loc 1 1364 5 discriminator 1 view .LVU950 + 2850 01d0 FAE7 b .L192 + 2851 .cfi_endproc + 2852 .LFE136: + 2854 .section .text.HAL_I2C_Slave_Receive,"ax",%progbits + 2855 .align 1 + 2856 .global HAL_I2C_Slave_Receive + 2857 .syntax unified + 2858 .thumb + ARM GAS /tmp/ccNVyn8W.s page 193 + + + 2859 .thumb_func + 2861 HAL_I2C_Slave_Receive: + 2862 .LVL180: + 2863 .LFB137: +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2864 .loc 1 1509 1 is_stmt 1 view -0 + 2865 .cfi_startproc + 2866 @ args = 0, pretend = 0, frame = 0 + 2867 @ frame_needed = 0, uses_anonymous_args = 0 +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2868 .loc 1 1509 1 is_stmt 0 view .LVU952 + 2869 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2870 .cfi_def_cfa_offset 24 + 2871 .cfi_offset 4, -24 + 2872 .cfi_offset 5, -20 + 2873 .cfi_offset 6, -16 + 2874 .cfi_offset 7, -12 + 2875 .cfi_offset 8, -8 + 2876 .cfi_offset 14, -4 + 2877 0004 82B0 sub sp, sp, #8 + 2878 .cfi_def_cfa_offset 32 + 2879 0006 1D46 mov r5, r3 +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2880 .loc 1 1510 3 is_stmt 1 view .LVU953 +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2881 .loc 1 1512 3 view .LVU954 +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2882 .loc 1 1512 11 is_stmt 0 view .LVU955 + 2883 0008 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 2884 .LVL181: +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2885 .loc 1 1512 11 view .LVU956 + 2886 000c DBB2 uxtb r3, r3 +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2887 .loc 1 1512 6 view .LVU957 + 2888 000e 202B cmp r3, #32 + 2889 0010 40F0AF80 bne .L226 + 2890 0014 0446 mov r4, r0 + 2891 0016 0E46 mov r6, r1 + 2892 0018 9046 mov r8, r2 +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2893 .loc 1 1514 5 is_stmt 1 view .LVU958 +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2894 .loc 1 1514 8 is_stmt 0 view .LVU959 + 2895 001a 61B3 cbz r1, .L217 +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2896 .loc 1 1514 25 discriminator 1 view .LVU960 + 2897 001c 5AB3 cbz r2, .L217 +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2898 .loc 1 1520 5 is_stmt 1 view .LVU961 +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2899 .loc 1 1520 5 view .LVU962 + 2900 001e 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2901 0022 012B cmp r3, #1 + 2902 0024 00F0A980 beq .L227 +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2903 .loc 1 1520 5 discriminator 2 view .LVU963 + ARM GAS /tmp/ccNVyn8W.s page 194 + + + 2904 0028 0123 movs r3, #1 + 2905 002a 80F84030 strb r3, [r0, #64] +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2906 .loc 1 1520 5 discriminator 2 view .LVU964 +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2907 .loc 1 1523 5 view .LVU965 +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2908 .loc 1 1523 17 is_stmt 0 view .LVU966 + 2909 002e FFF7FEFF bl HAL_GetTick + 2910 .LVL182: +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2911 .loc 1 1523 17 view .LVU967 + 2912 0032 0746 mov r7, r0 + 2913 .LVL183: +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2914 .loc 1 1525 5 is_stmt 1 view .LVU968 +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2915 .loc 1 1525 21 is_stmt 0 view .LVU969 + 2916 0034 2223 movs r3, #34 + 2917 0036 84F84130 strb r3, [r4, #65] +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2918 .loc 1 1526 5 is_stmt 1 view .LVU970 +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2919 .loc 1 1526 21 is_stmt 0 view .LVU971 + 2920 003a 2023 movs r3, #32 + 2921 003c 84F84230 strb r3, [r4, #66] +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2922 .loc 1 1527 5 is_stmt 1 view .LVU972 +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2923 .loc 1 1527 21 is_stmt 0 view .LVU973 + 2924 0040 0022 movs r2, #0 + 2925 0042 6264 str r2, [r4, #68] +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2926 .loc 1 1530 5 is_stmt 1 view .LVU974 +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2927 .loc 1 1530 21 is_stmt 0 view .LVU975 + 2928 0044 6662 str r6, [r4, #36] +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 2929 .loc 1 1531 5 is_stmt 1 view .LVU976 +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 2930 .loc 1 1531 21 is_stmt 0 view .LVU977 + 2931 0046 A4F82A80 strh r8, [r4, #42] @ movhi +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2932 .loc 1 1532 5 is_stmt 1 view .LVU978 +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2933 .loc 1 1532 26 is_stmt 0 view .LVU979 + 2934 004a 638D ldrh r3, [r4, #42] +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2935 .loc 1 1532 20 view .LVU980 + 2936 004c 2385 strh r3, [r4, #40] @ movhi +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2937 .loc 1 1533 5 is_stmt 1 view .LVU981 +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2938 .loc 1 1533 21 is_stmt 0 view .LVU982 + 2939 004e 6263 str r2, [r4, #52] +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2940 .loc 1 1536 5 is_stmt 1 view .LVU983 + ARM GAS /tmp/ccNVyn8W.s page 195 + + +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2941 .loc 1 1536 9 is_stmt 0 view .LVU984 + 2942 0050 2168 ldr r1, [r4] +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2943 .loc 1 1536 19 view .LVU985 + 2944 0052 4B68 ldr r3, [r1, #4] +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2945 .loc 1 1536 25 view .LVU986 + 2946 0054 23F40043 bic r3, r3, #32768 + 2947 0058 4B60 str r3, [r1, #4] +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2948 .loc 1 1539 5 is_stmt 1 view .LVU987 +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2949 .loc 1 1539 9 is_stmt 0 view .LVU988 + 2950 005a 0090 str r0, [sp] + 2951 005c 2B46 mov r3, r5 + 2952 005e 0821 movs r1, #8 + 2953 0060 2046 mov r0, r4 + 2954 .LVL184: +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2955 .loc 1 1539 9 view .LVU989 + 2956 0062 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2957 .LVL185: +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2958 .loc 1 1539 8 discriminator 1 view .LVU990 + 2959 0066 58B1 cbz r0, .L219 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2960 .loc 1 1542 7 is_stmt 1 view .LVU991 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2961 .loc 1 1542 11 is_stmt 0 view .LVU992 + 2962 0068 2268 ldr r2, [r4] +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2963 .loc 1 1542 21 view .LVU993 + 2964 006a 5368 ldr r3, [r2, #4] +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2965 .loc 1 1542 27 view .LVU994 + 2966 006c 43F40043 orr r3, r3, #32768 + 2967 0070 5360 str r3, [r2, #4] +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2968 .loc 1 1543 7 is_stmt 1 view .LVU995 +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2969 .loc 1 1543 14 is_stmt 0 view .LVU996 + 2970 0072 0120 movs r0, #1 + 2971 0074 7EE0 b .L216 + 2972 .LVL186: + 2973 .L217: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2974 .loc 1 1516 7 is_stmt 1 view .LVU997 +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2975 .loc 1 1516 23 is_stmt 0 view .LVU998 + 2976 0076 4FF40073 mov r3, #512 + 2977 007a 6364 str r3, [r4, #68] +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2978 .loc 1 1517 7 is_stmt 1 view .LVU999 +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2979 .loc 1 1517 15 is_stmt 0 view .LVU1000 + 2980 007c 0120 movs r0, #1 + ARM GAS /tmp/ccNVyn8W.s page 196 + + + 2981 .LVL187: +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2982 .loc 1 1517 15 view .LVU1001 + 2983 007e 79E0 b .L216 + 2984 .LVL188: + 2985 .L219: +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2986 .loc 1 1547 5 is_stmt 1 view .LVU1002 + 2987 0080 2368 ldr r3, [r4] + 2988 0082 0822 movs r2, #8 + 2989 0084 DA61 str r2, [r3, #28] +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2990 .loc 1 1550 5 view .LVU1003 +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2991 .loc 1 1550 9 is_stmt 0 view .LVU1004 + 2992 0086 0097 str r7, [sp] + 2993 0088 2B46 mov r3, r5 + 2994 008a 0122 movs r2, #1 + 2995 008c 4FF48031 mov r1, #65536 + 2996 0090 2046 mov r0, r4 + 2997 0092 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2998 .LVL189: +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2999 .loc 1 1550 8 discriminator 1 view .LVU1005 + 3000 0096 D0B1 cbz r0, .L220 +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3001 .loc 1 1553 7 is_stmt 1 view .LVU1006 +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3002 .loc 1 1553 11 is_stmt 0 view .LVU1007 + 3003 0098 2268 ldr r2, [r4] +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3004 .loc 1 1553 21 view .LVU1008 + 3005 009a 5368 ldr r3, [r2, #4] +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3006 .loc 1 1553 27 view .LVU1009 + 3007 009c 43F40043 orr r3, r3, #32768 + 3008 00a0 5360 str r3, [r2, #4] +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3009 .loc 1 1554 7 is_stmt 1 view .LVU1010 +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3010 .loc 1 1554 14 is_stmt 0 view .LVU1011 + 3011 00a2 0120 movs r0, #1 + 3012 00a4 66E0 b .L216 + 3013 .L221: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3014 .loc 1 1582 7 is_stmt 1 view .LVU1012 +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3015 .loc 1 1582 38 is_stmt 0 view .LVU1013 + 3016 00a6 2368 ldr r3, [r4] +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3017 .loc 1 1582 48 view .LVU1014 + 3018 00a8 5A6A ldr r2, [r3, #36] +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3019 .loc 1 1582 12 view .LVU1015 + 3020 00aa 636A ldr r3, [r4, #36] +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3021 .loc 1 1582 23 view .LVU1016 + ARM GAS /tmp/ccNVyn8W.s page 197 + + + 3022 00ac 1A70 strb r2, [r3] +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3023 .loc 1 1585 7 is_stmt 1 view .LVU1017 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3024 .loc 1 1585 11 is_stmt 0 view .LVU1018 + 3025 00ae 636A ldr r3, [r4, #36] +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3026 .loc 1 1585 21 view .LVU1019 + 3027 00b0 0133 adds r3, r3, #1 + 3028 00b2 6362 str r3, [r4, #36] +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3029 .loc 1 1587 7 is_stmt 1 view .LVU1020 +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3030 .loc 1 1587 11 is_stmt 0 view .LVU1021 + 3031 00b4 B4F82AC0 ldrh ip, [r4, #42] + 3032 00b8 1FFA8CFC uxth ip, ip +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3033 .loc 1 1587 22 view .LVU1022 + 3034 00bc 0CF1FF3C add ip, ip, #-1 + 3035 00c0 1FFA8CFC uxth ip, ip + 3036 00c4 A4F82AC0 strh ip, [r4, #42] @ movhi +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3037 .loc 1 1588 7 is_stmt 1 view .LVU1023 +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3038 .loc 1 1588 11 is_stmt 0 view .LVU1024 + 3039 00c8 238D ldrh r3, [r4, #40] +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3040 .loc 1 1588 21 view .LVU1025 + 3041 00ca 013B subs r3, r3, #1 + 3042 00cc 2385 strh r3, [r4, #40] @ movhi + 3043 .L220: +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3044 .loc 1 1557 28 is_stmt 1 view .LVU1026 +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3045 .loc 1 1557 16 is_stmt 0 view .LVU1027 + 3046 00ce 638D ldrh r3, [r4, #42] + 3047 00d0 9BB2 uxth r3, r3 +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3048 .loc 1 1557 28 view .LVU1028 + 3049 00d2 03B3 cbz r3, .L229 +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3050 .loc 1 1560 7 is_stmt 1 view .LVU1029 +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3051 .loc 1 1560 11 is_stmt 0 view .LVU1030 + 3052 00d4 3A46 mov r2, r7 + 3053 00d6 2946 mov r1, r5 + 3054 00d8 2046 mov r0, r4 + 3055 00da FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 3056 .LVL190: +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3057 .loc 1 1560 10 discriminator 1 view .LVU1031 + 3058 00de 0028 cmp r0, #0 + 3059 00e0 E1D0 beq .L221 +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3060 .loc 1 1563 9 is_stmt 1 view .LVU1032 +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3061 .loc 1 1563 13 is_stmt 0 view .LVU1033 + ARM GAS /tmp/ccNVyn8W.s page 198 + + + 3062 00e2 2268 ldr r2, [r4] +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3063 .loc 1 1563 23 view .LVU1034 + 3064 00e4 5368 ldr r3, [r2, #4] +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3065 .loc 1 1563 29 view .LVU1035 + 3066 00e6 43F40043 orr r3, r3, #32768 + 3067 00ea 5360 str r3, [r2, #4] +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3068 .loc 1 1566 9 is_stmt 1 view .LVU1036 +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3069 .loc 1 1566 13 is_stmt 0 view .LVU1037 + 3070 00ec 2368 ldr r3, [r4] + 3071 00ee 9A69 ldr r2, [r3, #24] +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3072 .loc 1 1566 12 view .LVU1038 + 3073 00f0 12F0040F tst r2, #4 + 3074 00f4 0DD0 beq .L222 +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3075 .loc 1 1569 11 is_stmt 1 view .LVU1039 +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3076 .loc 1 1569 52 is_stmt 0 view .LVU1040 + 3077 00f6 5A6A ldr r2, [r3, #36] +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3078 .loc 1 1569 16 view .LVU1041 + 3079 00f8 636A ldr r3, [r4, #36] +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3080 .loc 1 1569 27 view .LVU1042 + 3081 00fa 1A70 strb r2, [r3] +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3082 .loc 1 1572 11 is_stmt 1 view .LVU1043 +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3083 .loc 1 1572 15 is_stmt 0 view .LVU1044 + 3084 00fc 636A ldr r3, [r4, #36] +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3085 .loc 1 1572 25 view .LVU1045 + 3086 00fe 0133 adds r3, r3, #1 + 3087 0100 6362 str r3, [r4, #36] +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3088 .loc 1 1574 11 is_stmt 1 view .LVU1046 +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3089 .loc 1 1574 15 is_stmt 0 view .LVU1047 + 3090 0102 638D ldrh r3, [r4, #42] + 3091 0104 9BB2 uxth r3, r3 +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3092 .loc 1 1574 26 view .LVU1048 + 3093 0106 013B subs r3, r3, #1 + 3094 0108 9BB2 uxth r3, r3 + 3095 010a 6385 strh r3, [r4, #42] @ movhi +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3096 .loc 1 1575 11 is_stmt 1 view .LVU1049 +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3097 .loc 1 1575 15 is_stmt 0 view .LVU1050 + 3098 010c 238D ldrh r3, [r4, #40] +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3099 .loc 1 1575 25 view .LVU1051 + 3100 010e 013B subs r3, r3, #1 + ARM GAS /tmp/ccNVyn8W.s page 199 + + + 3101 0110 2385 strh r3, [r4, #40] @ movhi + 3102 .L222: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3103 .loc 1 1578 9 is_stmt 1 view .LVU1052 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3104 .loc 1 1578 16 is_stmt 0 view .LVU1053 + 3105 0112 0120 movs r0, #1 + 3106 0114 2EE0 b .L216 + 3107 .L229: +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3108 .loc 1 1592 5 is_stmt 1 view .LVU1054 +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3109 .loc 1 1592 9 is_stmt 0 view .LVU1055 + 3110 0116 3A46 mov r2, r7 + 3111 0118 2946 mov r1, r5 + 3112 011a 2046 mov r0, r4 + 3113 011c FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 3114 .LVL191: +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3115 .loc 1 1592 8 discriminator 1 view .LVU1056 + 3116 0120 30B1 cbz r0, .L224 +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3117 .loc 1 1595 7 is_stmt 1 view .LVU1057 +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3118 .loc 1 1595 11 is_stmt 0 view .LVU1058 + 3119 0122 2268 ldr r2, [r4] +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3120 .loc 1 1595 21 view .LVU1059 + 3121 0124 5368 ldr r3, [r2, #4] +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3122 .loc 1 1595 27 view .LVU1060 + 3123 0126 43F40043 orr r3, r3, #32768 + 3124 012a 5360 str r3, [r2, #4] +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3125 .loc 1 1596 7 is_stmt 1 view .LVU1061 +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3126 .loc 1 1596 14 is_stmt 0 view .LVU1062 + 3127 012c 0120 movs r0, #1 + 3128 012e 21E0 b .L216 + 3129 .L224: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3130 .loc 1 1600 5 is_stmt 1 view .LVU1063 + 3131 0130 2368 ldr r3, [r4] + 3132 0132 2022 movs r2, #32 + 3133 0134 DA61 str r2, [r3, #28] +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3134 .loc 1 1603 5 view .LVU1064 +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3135 .loc 1 1603 9 is_stmt 0 view .LVU1065 + 3136 0136 0097 str r7, [sp] + 3137 0138 2B46 mov r3, r5 + 3138 013a 0122 movs r2, #1 + 3139 013c 4FF40041 mov r1, #32768 + 3140 0140 2046 mov r0, r4 + 3141 0142 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3142 .LVL192: +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 200 + + + 3143 .loc 1 1603 8 discriminator 1 view .LVU1066 + 3144 0146 30B1 cbz r0, .L225 +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3145 .loc 1 1606 7 is_stmt 1 view .LVU1067 +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3146 .loc 1 1606 11 is_stmt 0 view .LVU1068 + 3147 0148 2268 ldr r2, [r4] +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3148 .loc 1 1606 21 view .LVU1069 + 3149 014a 5368 ldr r3, [r2, #4] +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3150 .loc 1 1606 27 view .LVU1070 + 3151 014c 43F40043 orr r3, r3, #32768 + 3152 0150 5360 str r3, [r2, #4] +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3153 .loc 1 1607 7 is_stmt 1 view .LVU1071 +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3154 .loc 1 1607 14 is_stmt 0 view .LVU1072 + 3155 0152 0120 movs r0, #1 + 3156 0154 0EE0 b .L216 + 3157 .L225: +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3158 .loc 1 1611 5 is_stmt 1 view .LVU1073 +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3159 .loc 1 1611 9 is_stmt 0 view .LVU1074 + 3160 0156 2268 ldr r2, [r4] +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3161 .loc 1 1611 19 view .LVU1075 + 3162 0158 5368 ldr r3, [r2, #4] +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3163 .loc 1 1611 25 view .LVU1076 + 3164 015a 43F40043 orr r3, r3, #32768 + 3165 015e 5360 str r3, [r2, #4] +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3166 .loc 1 1613 5 is_stmt 1 view .LVU1077 +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3167 .loc 1 1613 17 is_stmt 0 view .LVU1078 + 3168 0160 2023 movs r3, #32 + 3169 0162 84F84130 strb r3, [r4, #65] +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3170 .loc 1 1614 5 is_stmt 1 view .LVU1079 +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3171 .loc 1 1614 17 is_stmt 0 view .LVU1080 + 3172 0166 0023 movs r3, #0 + 3173 0168 84F84230 strb r3, [r4, #66] +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3174 .loc 1 1617 5 is_stmt 1 view .LVU1081 +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3175 .loc 1 1617 5 view .LVU1082 + 3176 016c 84F84030 strb r3, [r4, #64] +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3177 .loc 1 1617 5 view .LVU1083 +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3178 .loc 1 1619 5 view .LVU1084 +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3179 .loc 1 1619 12 is_stmt 0 view .LVU1085 + 3180 0170 00E0 b .L216 + ARM GAS /tmp/ccNVyn8W.s page 201 + + + 3181 .LVL193: + 3182 .L226: +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3183 .loc 1 1623 12 view .LVU1086 + 3184 0172 0220 movs r0, #2 + 3185 .LVL194: + 3186 .L216: +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3187 .loc 1 1625 1 view .LVU1087 + 3188 0174 02B0 add sp, sp, #8 + 3189 .cfi_remember_state + 3190 .cfi_def_cfa_offset 24 + 3191 @ sp needed + 3192 0176 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3193 .LVL195: + 3194 .L227: + 3195 .cfi_restore_state +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3196 .loc 1 1520 5 discriminator 1 view .LVU1088 + 3197 017a 0220 movs r0, #2 + 3198 .LVL196: +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3199 .loc 1 1520 5 discriminator 1 view .LVU1089 + 3200 017c FAE7 b .L216 + 3201 .cfi_endproc + 3202 .LFE137: + 3204 .section .text.HAL_I2C_Master_Transmit_IT,"ax",%progbits + 3205 .align 1 + 3206 .global HAL_I2C_Master_Transmit_IT + 3207 .syntax unified + 3208 .thumb + 3209 .thumb_func + 3211 HAL_I2C_Master_Transmit_IT: + 3212 .LVL197: + 3213 .LFB138: +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3214 .loc 1 1639 1 is_stmt 1 view -0 + 3215 .cfi_startproc + 3216 @ args = 0, pretend = 0, frame = 0 + 3217 @ frame_needed = 0, uses_anonymous_args = 0 +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3218 .loc 1 1639 1 is_stmt 0 view .LVU1091 + 3219 0000 30B5 push {r4, r5, lr} + 3220 .cfi_def_cfa_offset 12 + 3221 .cfi_offset 4, -12 + 3222 .cfi_offset 5, -8 + 3223 .cfi_offset 14, -4 + 3224 0002 83B0 sub sp, sp, #12 + 3225 .cfi_def_cfa_offset 24 + 3226 0004 0446 mov r4, r0 +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3227 .loc 1 1640 3 is_stmt 1 view .LVU1092 +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3228 .loc 1 1642 3 view .LVU1093 +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3229 .loc 1 1642 11 is_stmt 0 view .LVU1094 + 3230 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + ARM GAS /tmp/ccNVyn8W.s page 202 + + + 3231 .LVL198: +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3232 .loc 1 1642 11 view .LVU1095 + 3233 000a C0B2 uxtb r0, r0 +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3234 .loc 1 1642 6 view .LVU1096 + 3235 000c 2028 cmp r0, #32 + 3236 000e 37D1 bne .L234 +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3237 .loc 1 1644 5 is_stmt 1 view .LVU1097 +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3238 .loc 1 1644 9 is_stmt 0 view .LVU1098 + 3239 0010 2068 ldr r0, [r4] + 3240 0012 8069 ldr r0, [r0, #24] +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3241 .loc 1 1644 8 view .LVU1099 + 3242 0014 10F4004F tst r0, #32768 + 3243 0018 34D1 bne .L235 +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3244 .loc 1 1650 5 is_stmt 1 view .LVU1100 +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3245 .loc 1 1650 5 view .LVU1101 + 3246 001a 94F84000 ldrb r0, [r4, #64] @ zero_extendqisi2 + 3247 001e 0128 cmp r0, #1 + 3248 0020 32D0 beq .L236 +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3249 .loc 1 1650 5 discriminator 2 view .LVU1102 + 3250 0022 0120 movs r0, #1 + 3251 0024 84F84000 strb r0, [r4, #64] +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3252 .loc 1 1650 5 discriminator 2 view .LVU1103 +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3253 .loc 1 1652 5 view .LVU1104 +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3254 .loc 1 1652 23 is_stmt 0 view .LVU1105 + 3255 0028 2120 movs r0, #33 + 3256 002a 84F84100 strb r0, [r4, #65] +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3257 .loc 1 1653 5 is_stmt 1 view .LVU1106 +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3258 .loc 1 1653 23 is_stmt 0 view .LVU1107 + 3259 002e 1020 movs r0, #16 + 3260 0030 84F84200 strb r0, [r4, #66] +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3261 .loc 1 1654 5 is_stmt 1 view .LVU1108 +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3262 .loc 1 1654 23 is_stmt 0 view .LVU1109 + 3263 0034 0020 movs r0, #0 + 3264 0036 6064 str r0, [r4, #68] +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3265 .loc 1 1657 5 is_stmt 1 view .LVU1110 +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3266 .loc 1 1657 23 is_stmt 0 view .LVU1111 + 3267 0038 6262 str r2, [r4, #36] +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3268 .loc 1 1658 5 is_stmt 1 view .LVU1112 +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + ARM GAS /tmp/ccNVyn8W.s page 203 + + + 3269 .loc 1 1658 23 is_stmt 0 view .LVU1113 + 3270 003a 6385 strh r3, [r4, #42] @ movhi +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3271 .loc 1 1659 5 is_stmt 1 view .LVU1114 +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3272 .loc 1 1659 23 is_stmt 0 view .LVU1115 + 3273 003c 134B ldr r3, .L238 + 3274 .LVL199: +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3275 .loc 1 1659 23 view .LVU1116 + 3276 003e E362 str r3, [r4, #44] + 3277 .LVL200: +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3278 .loc 1 1660 5 is_stmt 1 view .LVU1117 +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3279 .loc 1 1660 23 is_stmt 0 view .LVU1118 + 3280 0040 134B ldr r3, .L238+4 + 3281 0042 6363 str r3, [r4, #52] +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3282 .loc 1 1662 5 is_stmt 1 view .LVU1119 +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3283 .loc 1 1662 13 is_stmt 0 view .LVU1120 + 3284 0044 638D ldrh r3, [r4, #42] + 3285 0046 9BB2 uxth r3, r3 +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3286 .loc 1 1662 8 view .LVU1121 + 3287 0048 FF2B cmp r3, #255 + 3288 004a 14D9 bls .L232 +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3289 .loc 1 1664 7 is_stmt 1 view .LVU1122 +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3290 .loc 1 1664 22 is_stmt 0 view .LVU1123 + 3291 004c FF23 movs r3, #255 + 3292 004e 2385 strh r3, [r4, #40] @ movhi +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3293 .loc 1 1665 7 is_stmt 1 view .LVU1124 + 3294 .LVL201: +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3295 .loc 1 1665 16 is_stmt 0 view .LVU1125 + 3296 0050 4FF08073 mov r3, #16777216 + 3297 .LVL202: + 3298 .L233: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3299 .loc 1 1675 5 is_stmt 1 view .LVU1126 + 3300 0054 0F4A ldr r2, .L238+8 + 3301 .LVL203: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3302 .loc 1 1675 5 is_stmt 0 view .LVU1127 + 3303 0056 0092 str r2, [sp] + 3304 .LVL204: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3305 .loc 1 1675 5 view .LVU1128 + 3306 0058 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 3307 005c 2046 mov r0, r4 + 3308 005e FFF7FEFF bl I2C_TransferConfig + 3309 .LVL205: +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 204 + + + 3310 .loc 1 1678 5 is_stmt 1 view .LVU1129 +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3311 .loc 1 1678 5 view .LVU1130 + 3312 0062 0025 movs r5, #0 + 3313 0064 84F84050 strb r5, [r4, #64] +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3314 .loc 1 1678 5 view .LVU1131 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3315 .loc 1 1688 5 view .LVU1132 + 3316 0068 0121 movs r1, #1 + 3317 006a 2046 mov r0, r4 + 3318 006c FFF7FEFF bl I2C_Enable_IRQ + 3319 .LVL206: +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3320 .loc 1 1690 5 view .LVU1133 +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3321 .loc 1 1690 12 is_stmt 0 view .LVU1134 + 3322 0070 2846 mov r0, r5 + 3323 .LVL207: + 3324 .L231: +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3325 .loc 1 1696 1 view .LVU1135 + 3326 0072 03B0 add sp, sp, #12 + 3327 .cfi_remember_state + 3328 .cfi_def_cfa_offset 12 + 3329 @ sp needed + 3330 0074 30BD pop {r4, r5, pc} + 3331 .LVL208: + 3332 .L232: + 3333 .cfi_restore_state +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3334 .loc 1 1669 7 is_stmt 1 view .LVU1136 +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3335 .loc 1 1669 28 is_stmt 0 view .LVU1137 + 3336 0076 638D ldrh r3, [r4, #42] +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3337 .loc 1 1669 22 view .LVU1138 + 3338 0078 2385 strh r3, [r4, #40] @ movhi +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3339 .loc 1 1670 7 is_stmt 1 view .LVU1139 + 3340 .LVL209: +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3341 .loc 1 1670 16 is_stmt 0 view .LVU1140 + 3342 007a 4FF00073 mov r3, #33554432 + 3343 007e E9E7 b .L233 + 3344 .LVL210: + 3345 .L234: +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3346 .loc 1 1694 12 view .LVU1141 + 3347 0080 0220 movs r0, #2 + 3348 0082 F6E7 b .L231 + 3349 .L235: +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3350 .loc 1 1646 14 view .LVU1142 + 3351 0084 0220 movs r0, #2 + 3352 0086 F4E7 b .L231 + 3353 .L236: + ARM GAS /tmp/ccNVyn8W.s page 205 + + +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3354 .loc 1 1650 5 discriminator 1 view .LVU1143 + 3355 0088 0220 movs r0, #2 + 3356 008a F2E7 b .L231 + 3357 .L239: + 3358 .align 2 + 3359 .L238: + 3360 008c 0000FFFF .word -65536 + 3361 0090 00000000 .word I2C_Master_ISR_IT + 3362 0094 00200080 .word -2147475456 + 3363 .cfi_endproc + 3364 .LFE138: + 3366 .section .text.HAL_I2C_Master_Receive_IT,"ax",%progbits + 3367 .align 1 + 3368 .global HAL_I2C_Master_Receive_IT + 3369 .syntax unified + 3370 .thumb + 3371 .thumb_func + 3373 HAL_I2C_Master_Receive_IT: + 3374 .LVL211: + 3375 .LFB139: +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3376 .loc 1 1710 1 is_stmt 1 view -0 + 3377 .cfi_startproc + 3378 @ args = 0, pretend = 0, frame = 0 + 3379 @ frame_needed = 0, uses_anonymous_args = 0 +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3380 .loc 1 1710 1 is_stmt 0 view .LVU1145 + 3381 0000 30B5 push {r4, r5, lr} + 3382 .cfi_def_cfa_offset 12 + 3383 .cfi_offset 4, -12 + 3384 .cfi_offset 5, -8 + 3385 .cfi_offset 14, -4 + 3386 0002 83B0 sub sp, sp, #12 + 3387 .cfi_def_cfa_offset 24 + 3388 0004 0446 mov r4, r0 +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3389 .loc 1 1711 3 is_stmt 1 view .LVU1146 +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3390 .loc 1 1713 3 view .LVU1147 +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3391 .loc 1 1713 11 is_stmt 0 view .LVU1148 + 3392 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 3393 .LVL212: +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3394 .loc 1 1713 11 view .LVU1149 + 3395 000a C0B2 uxtb r0, r0 +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3396 .loc 1 1713 6 view .LVU1150 + 3397 000c 2028 cmp r0, #32 + 3398 000e 37D1 bne .L244 +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3399 .loc 1 1715 5 is_stmt 1 view .LVU1151 +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3400 .loc 1 1715 9 is_stmt 0 view .LVU1152 + 3401 0010 2068 ldr r0, [r4] + 3402 0012 8069 ldr r0, [r0, #24] + ARM GAS /tmp/ccNVyn8W.s page 206 + + +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3403 .loc 1 1715 8 view .LVU1153 + 3404 0014 10F4004F tst r0, #32768 + 3405 0018 34D1 bne .L245 +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3406 .loc 1 1721 5 is_stmt 1 view .LVU1154 +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3407 .loc 1 1721 5 view .LVU1155 + 3408 001a 94F84000 ldrb r0, [r4, #64] @ zero_extendqisi2 + 3409 001e 0128 cmp r0, #1 + 3410 0020 32D0 beq .L246 +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3411 .loc 1 1721 5 discriminator 2 view .LVU1156 + 3412 0022 0120 movs r0, #1 + 3413 0024 84F84000 strb r0, [r4, #64] +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3414 .loc 1 1721 5 discriminator 2 view .LVU1157 +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3415 .loc 1 1723 5 view .LVU1158 +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3416 .loc 1 1723 23 is_stmt 0 view .LVU1159 + 3417 0028 2220 movs r0, #34 + 3418 002a 84F84100 strb r0, [r4, #65] +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3419 .loc 1 1724 5 is_stmt 1 view .LVU1160 +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3420 .loc 1 1724 23 is_stmt 0 view .LVU1161 + 3421 002e 1020 movs r0, #16 + 3422 0030 84F84200 strb r0, [r4, #66] +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3423 .loc 1 1725 5 is_stmt 1 view .LVU1162 +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3424 .loc 1 1725 23 is_stmt 0 view .LVU1163 + 3425 0034 0020 movs r0, #0 + 3426 0036 6064 str r0, [r4, #68] +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3427 .loc 1 1728 5 is_stmt 1 view .LVU1164 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3428 .loc 1 1728 23 is_stmt 0 view .LVU1165 + 3429 0038 6262 str r2, [r4, #36] +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3430 .loc 1 1729 5 is_stmt 1 view .LVU1166 +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3431 .loc 1 1729 23 is_stmt 0 view .LVU1167 + 3432 003a 6385 strh r3, [r4, #42] @ movhi +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3433 .loc 1 1730 5 is_stmt 1 view .LVU1168 +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3434 .loc 1 1730 23 is_stmt 0 view .LVU1169 + 3435 003c 134B ldr r3, .L248 + 3436 .LVL213: +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3437 .loc 1 1730 23 view .LVU1170 + 3438 003e E362 str r3, [r4, #44] + 3439 .LVL214: +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3440 .loc 1 1731 5 is_stmt 1 view .LVU1171 + ARM GAS /tmp/ccNVyn8W.s page 207 + + +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3441 .loc 1 1731 23 is_stmt 0 view .LVU1172 + 3442 0040 134B ldr r3, .L248+4 + 3443 0042 6363 str r3, [r4, #52] +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3444 .loc 1 1733 5 is_stmt 1 view .LVU1173 +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3445 .loc 1 1733 13 is_stmt 0 view .LVU1174 + 3446 0044 638D ldrh r3, [r4, #42] + 3447 0046 9BB2 uxth r3, r3 +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3448 .loc 1 1733 8 view .LVU1175 + 3449 0048 FF2B cmp r3, #255 + 3450 004a 14D9 bls .L242 +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3451 .loc 1 1735 7 is_stmt 1 view .LVU1176 +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3452 .loc 1 1735 22 is_stmt 0 view .LVU1177 + 3453 004c FF23 movs r3, #255 + 3454 004e 2385 strh r3, [r4, #40] @ movhi +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3455 .loc 1 1736 7 is_stmt 1 view .LVU1178 + 3456 .LVL215: +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3457 .loc 1 1736 16 is_stmt 0 view .LVU1179 + 3458 0050 4FF08073 mov r3, #16777216 + 3459 .LVL216: + 3460 .L243: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3461 .loc 1 1746 5 is_stmt 1 view .LVU1180 + 3462 0054 0F4A ldr r2, .L248+8 + 3463 .LVL217: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3464 .loc 1 1746 5 is_stmt 0 view .LVU1181 + 3465 0056 0092 str r2, [sp] + 3466 .LVL218: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3467 .loc 1 1746 5 view .LVU1182 + 3468 0058 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 3469 005c 2046 mov r0, r4 + 3470 005e FFF7FEFF bl I2C_TransferConfig + 3471 .LVL219: +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3472 .loc 1 1749 5 is_stmt 1 view .LVU1183 +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3473 .loc 1 1749 5 view .LVU1184 + 3474 0062 0025 movs r5, #0 + 3475 0064 84F84050 strb r5, [r4, #64] +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3476 .loc 1 1749 5 view .LVU1185 +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3477 .loc 1 1759 5 view .LVU1186 + 3478 0068 0221 movs r1, #2 + 3479 006a 2046 mov r0, r4 + 3480 006c FFF7FEFF bl I2C_Enable_IRQ + 3481 .LVL220: +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 208 + + + 3482 .loc 1 1761 5 view .LVU1187 +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3483 .loc 1 1761 12 is_stmt 0 view .LVU1188 + 3484 0070 2846 mov r0, r5 + 3485 .LVL221: + 3486 .L241: +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3487 .loc 1 1767 1 view .LVU1189 + 3488 0072 03B0 add sp, sp, #12 + 3489 .cfi_remember_state + 3490 .cfi_def_cfa_offset 12 + 3491 @ sp needed + 3492 0074 30BD pop {r4, r5, pc} + 3493 .LVL222: + 3494 .L242: + 3495 .cfi_restore_state +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3496 .loc 1 1740 7 is_stmt 1 view .LVU1190 +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3497 .loc 1 1740 28 is_stmt 0 view .LVU1191 + 3498 0076 638D ldrh r3, [r4, #42] +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3499 .loc 1 1740 22 view .LVU1192 + 3500 0078 2385 strh r3, [r4, #40] @ movhi +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3501 .loc 1 1741 7 is_stmt 1 view .LVU1193 + 3502 .LVL223: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3503 .loc 1 1741 16 is_stmt 0 view .LVU1194 + 3504 007a 4FF00073 mov r3, #33554432 + 3505 007e E9E7 b .L243 + 3506 .LVL224: + 3507 .L244: +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3508 .loc 1 1765 12 view .LVU1195 + 3509 0080 0220 movs r0, #2 + 3510 0082 F6E7 b .L241 + 3511 .L245: +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3512 .loc 1 1717 14 view .LVU1196 + 3513 0084 0220 movs r0, #2 + 3514 0086 F4E7 b .L241 + 3515 .L246: +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3516 .loc 1 1721 5 discriminator 1 view .LVU1197 + 3517 0088 0220 movs r0, #2 + 3518 008a F2E7 b .L241 + 3519 .L249: + 3520 .align 2 + 3521 .L248: + 3522 008c 0000FFFF .word -65536 + 3523 0090 00000000 .word I2C_Master_ISR_IT + 3524 0094 00240080 .word -2147474432 + 3525 .cfi_endproc + 3526 .LFE139: + 3528 .section .text.HAL_I2C_Slave_Transmit_IT,"ax",%progbits + 3529 .align 1 + ARM GAS /tmp/ccNVyn8W.s page 209 + + + 3530 .global HAL_I2C_Slave_Transmit_IT + 3531 .syntax unified + 3532 .thumb + 3533 .thumb_func + 3535 HAL_I2C_Slave_Transmit_IT: + 3536 .LVL225: + 3537 .LFB140: +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3538 .loc 1 1778 1 is_stmt 1 view -0 + 3539 .cfi_startproc + 3540 @ args = 0, pretend = 0, frame = 0 + 3541 @ frame_needed = 0, uses_anonymous_args = 0 +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3542 .loc 1 1779 3 view .LVU1199 +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3543 .loc 1 1779 11 is_stmt 0 view .LVU1200 + 3544 0000 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 3545 0004 DBB2 uxtb r3, r3 +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3546 .loc 1 1779 6 view .LVU1201 + 3547 0006 202B cmp r3, #32 + 3548 0008 38D1 bne .L253 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3549 .loc 1 1782 5 is_stmt 1 view .LVU1202 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3550 .loc 1 1782 5 view .LVU1203 + 3551 000a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 3552 000e 012B cmp r3, #1 + 3553 0010 36D0 beq .L254 +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3554 .loc 1 1778 1 is_stmt 0 view .LVU1204 + 3555 0012 10B5 push {r4, lr} + 3556 .cfi_def_cfa_offset 8 + 3557 .cfi_offset 4, -8 + 3558 .cfi_offset 14, -4 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3559 .loc 1 1782 5 is_stmt 1 discriminator 2 view .LVU1205 + 3560 0014 0123 movs r3, #1 + 3561 0016 80F84030 strb r3, [r0, #64] +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3562 .loc 1 1782 5 discriminator 2 view .LVU1206 +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3563 .loc 1 1784 5 view .LVU1207 +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3564 .loc 1 1784 23 is_stmt 0 view .LVU1208 + 3565 001a 2123 movs r3, #33 + 3566 001c 80F84130 strb r3, [r0, #65] +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3567 .loc 1 1785 5 is_stmt 1 view .LVU1209 +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3568 .loc 1 1785 23 is_stmt 0 view .LVU1210 + 3569 0020 2023 movs r3, #32 + 3570 0022 80F84230 strb r3, [r0, #66] +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3571 .loc 1 1786 5 is_stmt 1 view .LVU1211 +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3572 .loc 1 1786 23 is_stmt 0 view .LVU1212 + ARM GAS /tmp/ccNVyn8W.s page 210 + + + 3573 0026 0023 movs r3, #0 + 3574 0028 4364 str r3, [r0, #68] +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3575 .loc 1 1789 5 is_stmt 1 view .LVU1213 +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3576 .loc 1 1789 9 is_stmt 0 view .LVU1214 + 3577 002a 0468 ldr r4, [r0] +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3578 .loc 1 1789 19 view .LVU1215 + 3579 002c 6368 ldr r3, [r4, #4] +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3580 .loc 1 1789 25 view .LVU1216 + 3581 002e 23F40043 bic r3, r3, #32768 + 3582 0032 6360 str r3, [r4, #4] +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3583 .loc 1 1792 5 is_stmt 1 view .LVU1217 +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3584 .loc 1 1792 23 is_stmt 0 view .LVU1218 + 3585 0034 4162 str r1, [r0, #36] +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3586 .loc 1 1793 5 is_stmt 1 view .LVU1219 +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3587 .loc 1 1793 23 is_stmt 0 view .LVU1220 + 3588 0036 4285 strh r2, [r0, #42] @ movhi +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3589 .loc 1 1794 5 is_stmt 1 view .LVU1221 +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3590 .loc 1 1794 29 is_stmt 0 view .LVU1222 + 3591 0038 438D ldrh r3, [r0, #42] +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3592 .loc 1 1794 23 view .LVU1223 + 3593 003a 0385 strh r3, [r0, #40] @ movhi +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3594 .loc 1 1795 5 is_stmt 1 view .LVU1224 +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3595 .loc 1 1795 23 is_stmt 0 view .LVU1225 + 3596 003c 114B ldr r3, .L260 + 3597 003e C362 str r3, [r0, #44] +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3598 .loc 1 1796 5 is_stmt 1 view .LVU1226 +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3599 .loc 1 1796 23 is_stmt 0 view .LVU1227 + 3600 0040 114B ldr r3, .L260+4 + 3601 0042 4363 str r3, [r0, #52] +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3602 .loc 1 1799 5 is_stmt 1 view .LVU1228 +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3603 .loc 1 1799 19 is_stmt 0 view .LVU1229 + 3604 0044 036A ldr r3, [r0, #32] +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3605 .loc 1 1799 8 view .LVU1230 + 3606 0046 B3F5003F cmp r3, #131072 + 3607 004a 08D0 beq .L259 + 3608 .LVL226: + 3609 .L252: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3610 .loc 1 1813 5 is_stmt 1 view .LVU1231 + ARM GAS /tmp/ccNVyn8W.s page 211 + + +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3611 .loc 1 1813 5 view .LVU1232 + 3612 004c 0024 movs r4, #0 + 3613 004e 80F84040 strb r4, [r0, #64] +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3614 .loc 1 1813 5 view .LVU1233 +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3615 .loc 1 1823 5 view .LVU1234 + 3616 0052 48F20101 movw r1, #32769 + 3617 .LVL227: +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3618 .loc 1 1823 5 is_stmt 0 view .LVU1235 + 3619 0056 FFF7FEFF bl I2C_Enable_IRQ + 3620 .LVL228: +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3621 .loc 1 1825 5 is_stmt 1 view .LVU1236 +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3622 .loc 1 1825 12 is_stmt 0 view .LVU1237 + 3623 005a 2046 mov r0, r4 +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3624 .loc 1 1831 1 view .LVU1238 + 3625 005c 10BD pop {r4, pc} + 3626 .LVL229: + 3627 .L259: +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3628 .loc 1 1803 7 is_stmt 1 view .LVU1239 +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3629 .loc 1 1803 11 is_stmt 0 view .LVU1240 + 3630 005e 0368 ldr r3, [r0] +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3631 .loc 1 1803 30 view .LVU1241 + 3632 0060 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 3633 .LVL230: +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3634 .loc 1 1803 28 view .LVU1242 + 3635 0062 9A62 str r2, [r3, #40] +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3636 .loc 1 1806 7 is_stmt 1 view .LVU1243 +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3637 .loc 1 1806 11 is_stmt 0 view .LVU1244 + 3638 0064 436A ldr r3, [r0, #36] +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3639 .loc 1 1806 21 view .LVU1245 + 3640 0066 0133 adds r3, r3, #1 + 3641 0068 4362 str r3, [r0, #36] +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3642 .loc 1 1808 7 is_stmt 1 view .LVU1246 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3643 .loc 1 1808 11 is_stmt 0 view .LVU1247 + 3644 006a 438D ldrh r3, [r0, #42] + 3645 006c 9BB2 uxth r3, r3 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3646 .loc 1 1808 22 view .LVU1248 + 3647 006e 013B subs r3, r3, #1 + 3648 0070 9BB2 uxth r3, r3 + 3649 0072 4385 strh r3, [r0, #42] @ movhi +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 212 + + + 3650 .loc 1 1809 7 is_stmt 1 view .LVU1249 +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3651 .loc 1 1809 11 is_stmt 0 view .LVU1250 + 3652 0074 038D ldrh r3, [r0, #40] +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3653 .loc 1 1809 21 view .LVU1251 + 3654 0076 013B subs r3, r3, #1 + 3655 0078 0385 strh r3, [r0, #40] @ movhi + 3656 007a E7E7 b .L252 + 3657 .LVL231: + 3658 .L253: + 3659 .cfi_def_cfa_offset 0 + 3660 .cfi_restore 4 + 3661 .cfi_restore 14 +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3662 .loc 1 1829 12 view .LVU1252 + 3663 007c 0220 movs r0, #2 + 3664 .LVL232: +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3665 .loc 1 1829 12 view .LVU1253 + 3666 007e 7047 bx lr + 3667 .LVL233: + 3668 .L254: +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3669 .loc 1 1782 5 discriminator 1 view .LVU1254 + 3670 0080 0220 movs r0, #2 + 3671 .LVL234: +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3672 .loc 1 1831 1 view .LVU1255 + 3673 0082 7047 bx lr + 3674 .L261: + 3675 .align 2 + 3676 .L260: + 3677 0084 0000FFFF .word -65536 + 3678 0088 00000000 .word I2C_Slave_ISR_IT + 3679 .cfi_endproc + 3680 .LFE140: + 3682 .section .text.HAL_I2C_Slave_Receive_IT,"ax",%progbits + 3683 .align 1 + 3684 .global HAL_I2C_Slave_Receive_IT + 3685 .syntax unified + 3686 .thumb + 3687 .thumb_func + 3689 HAL_I2C_Slave_Receive_IT: + 3690 .LVL235: + 3691 .LFB141: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3692 .loc 1 1842 1 is_stmt 1 view -0 + 3693 .cfi_startproc + 3694 @ args = 0, pretend = 0, frame = 0 + 3695 @ frame_needed = 0, uses_anonymous_args = 0 +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3696 .loc 1 1842 1 is_stmt 0 view .LVU1257 + 3697 0000 38B5 push {r3, r4, r5, lr} + 3698 .cfi_def_cfa_offset 16 + 3699 .cfi_offset 3, -16 + 3700 .cfi_offset 4, -12 + ARM GAS /tmp/ccNVyn8W.s page 213 + + + 3701 .cfi_offset 5, -8 + 3702 .cfi_offset 14, -4 +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3703 .loc 1 1843 3 is_stmt 1 view .LVU1258 +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3704 .loc 1 1843 11 is_stmt 0 view .LVU1259 + 3705 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 3706 0006 DBB2 uxtb r3, r3 +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3707 .loc 1 1843 6 view .LVU1260 + 3708 0008 202B cmp r3, #32 + 3709 000a 23D1 bne .L264 +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3710 .loc 1 1846 5 is_stmt 1 view .LVU1261 +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3711 .loc 1 1846 5 view .LVU1262 + 3712 000c 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 3713 0010 012B cmp r3, #1 + 3714 0012 21D0 beq .L265 +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3715 .loc 1 1846 5 discriminator 2 view .LVU1263 + 3716 0014 0123 movs r3, #1 + 3717 0016 80F84030 strb r3, [r0, #64] +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3718 .loc 1 1846 5 discriminator 2 view .LVU1264 +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3719 .loc 1 1848 5 view .LVU1265 +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3720 .loc 1 1848 23 is_stmt 0 view .LVU1266 + 3721 001a 2223 movs r3, #34 + 3722 001c 80F84130 strb r3, [r0, #65] +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3723 .loc 1 1849 5 is_stmt 1 view .LVU1267 +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3724 .loc 1 1849 23 is_stmt 0 view .LVU1268 + 3725 0020 2023 movs r3, #32 + 3726 0022 80F84230 strb r3, [r0, #66] +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3727 .loc 1 1850 5 is_stmt 1 view .LVU1269 +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3728 .loc 1 1850 23 is_stmt 0 view .LVU1270 + 3729 0026 0024 movs r4, #0 + 3730 0028 4464 str r4, [r0, #68] +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3731 .loc 1 1853 5 is_stmt 1 view .LVU1271 +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3732 .loc 1 1853 9 is_stmt 0 view .LVU1272 + 3733 002a 0568 ldr r5, [r0] +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3734 .loc 1 1853 19 view .LVU1273 + 3735 002c 6B68 ldr r3, [r5, #4] +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3736 .loc 1 1853 25 view .LVU1274 + 3737 002e 23F40043 bic r3, r3, #32768 + 3738 0032 6B60 str r3, [r5, #4] +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3739 .loc 1 1856 5 is_stmt 1 view .LVU1275 + ARM GAS /tmp/ccNVyn8W.s page 214 + + +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3740 .loc 1 1856 23 is_stmt 0 view .LVU1276 + 3741 0034 4162 str r1, [r0, #36] +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3742 .loc 1 1857 5 is_stmt 1 view .LVU1277 +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3743 .loc 1 1857 23 is_stmt 0 view .LVU1278 + 3744 0036 4285 strh r2, [r0, #42] @ movhi +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3745 .loc 1 1858 5 is_stmt 1 view .LVU1279 +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3746 .loc 1 1858 29 is_stmt 0 view .LVU1280 + 3747 0038 438D ldrh r3, [r0, #42] +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3748 .loc 1 1858 23 view .LVU1281 + 3749 003a 0385 strh r3, [r0, #40] @ movhi +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3750 .loc 1 1859 5 is_stmt 1 view .LVU1282 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3751 .loc 1 1859 23 is_stmt 0 view .LVU1283 + 3752 003c 074B ldr r3, .L267 + 3753 003e C362 str r3, [r0, #44] +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3754 .loc 1 1860 5 is_stmt 1 view .LVU1284 +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3755 .loc 1 1860 23 is_stmt 0 view .LVU1285 + 3756 0040 074B ldr r3, .L267+4 + 3757 0042 4363 str r3, [r0, #52] +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3758 .loc 1 1863 5 is_stmt 1 view .LVU1286 +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3759 .loc 1 1863 5 view .LVU1287 + 3760 0044 80F84040 strb r4, [r0, #64] +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3761 .loc 1 1863 5 view .LVU1288 +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3762 .loc 1 1873 5 view .LVU1289 + 3763 0048 48F20201 movw r1, #32770 + 3764 .LVL236: +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3765 .loc 1 1873 5 is_stmt 0 view .LVU1290 + 3766 004c FFF7FEFF bl I2C_Enable_IRQ + 3767 .LVL237: +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3768 .loc 1 1875 5 is_stmt 1 view .LVU1291 +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3769 .loc 1 1875 12 is_stmt 0 view .LVU1292 + 3770 0050 2046 mov r0, r4 + 3771 .L263: +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3772 .loc 1 1881 1 view .LVU1293 + 3773 0052 38BD pop {r3, r4, r5, pc} + 3774 .LVL238: + 3775 .L264: +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3776 .loc 1 1879 12 view .LVU1294 + 3777 0054 0220 movs r0, #2 + ARM GAS /tmp/ccNVyn8W.s page 215 + + + 3778 .LVL239: +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3779 .loc 1 1879 12 view .LVU1295 + 3780 0056 FCE7 b .L263 + 3781 .LVL240: + 3782 .L265: +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3783 .loc 1 1846 5 discriminator 1 view .LVU1296 + 3784 0058 0220 movs r0, #2 + 3785 .LVL241: +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3786 .loc 1 1846 5 discriminator 1 view .LVU1297 + 3787 005a FAE7 b .L263 + 3788 .L268: + 3789 .align 2 + 3790 .L267: + 3791 005c 0000FFFF .word -65536 + 3792 0060 00000000 .word I2C_Slave_ISR_IT + 3793 .cfi_endproc + 3794 .LFE141: + 3796 .section .text.HAL_I2C_Master_Transmit_DMA,"ax",%progbits + 3797 .align 1 + 3798 .global HAL_I2C_Master_Transmit_DMA + 3799 .syntax unified + 3800 .thumb + 3801 .thumb_func + 3803 HAL_I2C_Master_Transmit_DMA: + 3804 .LVL242: + 3805 .LFB142: +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3806 .loc 1 1895 1 is_stmt 1 view -0 + 3807 .cfi_startproc + 3808 @ args = 0, pretend = 0, frame = 0 + 3809 @ frame_needed = 0, uses_anonymous_args = 0 +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3810 .loc 1 1895 1 is_stmt 0 view .LVU1299 + 3811 0000 70B5 push {r4, r5, r6, lr} + 3812 .cfi_def_cfa_offset 16 + 3813 .cfi_offset 4, -16 + 3814 .cfi_offset 5, -12 + 3815 .cfi_offset 6, -8 + 3816 .cfi_offset 14, -4 + 3817 0002 82B0 sub sp, sp, #8 + 3818 .cfi_def_cfa_offset 24 + 3819 0004 0446 mov r4, r0 +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 3820 .loc 1 1896 3 is_stmt 1 view .LVU1300 +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3821 .loc 1 1897 3 view .LVU1301 +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3822 .loc 1 1899 3 view .LVU1302 +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3823 .loc 1 1899 11 is_stmt 0 view .LVU1303 + 3824 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 3825 .LVL243: +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3826 .loc 1 1899 11 view .LVU1304 + ARM GAS /tmp/ccNVyn8W.s page 216 + + + 3827 000a C0B2 uxtb r0, r0 +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3828 .loc 1 1899 6 view .LVU1305 + 3829 000c 2028 cmp r0, #32 + 3830 000e 40F08D80 bne .L278 + 3831 0012 0D46 mov r5, r1 + 3832 0014 1146 mov r1, r2 + 3833 .LVL244: +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3834 .loc 1 1901 5 is_stmt 1 view .LVU1306 +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3835 .loc 1 1901 9 is_stmt 0 view .LVU1307 + 3836 0016 2268 ldr r2, [r4] + 3837 .LVL245: +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3838 .loc 1 1901 9 view .LVU1308 + 3839 0018 9269 ldr r2, [r2, #24] +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3840 .loc 1 1901 8 view .LVU1309 + 3841 001a 12F4004F tst r2, #32768 + 3842 001e 40F08880 bne .L279 +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3843 .loc 1 1907 5 is_stmt 1 view .LVU1310 +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3844 .loc 1 1907 5 view .LVU1311 + 3845 0022 94F84020 ldrb r2, [r4, #64] @ zero_extendqisi2 + 3846 0026 012A cmp r2, #1 + 3847 0028 00F08580 beq .L280 +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3848 .loc 1 1907 5 discriminator 2 view .LVU1312 + 3849 002c 0122 movs r2, #1 + 3850 002e 84F84020 strb r2, [r4, #64] +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3851 .loc 1 1907 5 discriminator 2 view .LVU1313 +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3852 .loc 1 1909 5 view .LVU1314 +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3853 .loc 1 1909 23 is_stmt 0 view .LVU1315 + 3854 0032 2122 movs r2, #33 + 3855 0034 84F84120 strb r2, [r4, #65] +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3856 .loc 1 1910 5 is_stmt 1 view .LVU1316 +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3857 .loc 1 1910 23 is_stmt 0 view .LVU1317 + 3858 0038 1022 movs r2, #16 + 3859 003a 84F84220 strb r2, [r4, #66] +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3860 .loc 1 1911 5 is_stmt 1 view .LVU1318 +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3861 .loc 1 1911 23 is_stmt 0 view .LVU1319 + 3862 003e 0022 movs r2, #0 + 3863 0040 6264 str r2, [r4, #68] +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3864 .loc 1 1914 5 is_stmt 1 view .LVU1320 +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3865 .loc 1 1914 23 is_stmt 0 view .LVU1321 + 3866 0042 6162 str r1, [r4, #36] + ARM GAS /tmp/ccNVyn8W.s page 217 + + +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3867 .loc 1 1915 5 is_stmt 1 view .LVU1322 +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3868 .loc 1 1915 23 is_stmt 0 view .LVU1323 + 3869 0044 6385 strh r3, [r4, #42] @ movhi +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 3870 .loc 1 1916 5 is_stmt 1 view .LVU1324 +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 3871 .loc 1 1916 23 is_stmt 0 view .LVU1325 + 3872 0046 3D4B ldr r3, .L284 + 3873 .LVL246: +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 3874 .loc 1 1916 23 view .LVU1326 + 3875 0048 E362 str r3, [r4, #44] + 3876 .LVL247: +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3877 .loc 1 1917 5 is_stmt 1 view .LVU1327 +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3878 .loc 1 1917 23 is_stmt 0 view .LVU1328 + 3879 004a 3D4B ldr r3, .L284+4 + 3880 004c 6363 str r3, [r4, #52] +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3881 .loc 1 1919 5 is_stmt 1 view .LVU1329 +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3882 .loc 1 1919 13 is_stmt 0 view .LVU1330 + 3883 004e 638D ldrh r3, [r4, #42] + 3884 0050 9BB2 uxth r3, r3 +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3885 .loc 1 1919 8 view .LVU1331 + 3886 0052 FF2B cmp r3, #255 + 3887 0054 27D9 bls .L271 +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3888 .loc 1 1921 7 is_stmt 1 view .LVU1332 +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3889 .loc 1 1921 22 is_stmt 0 view .LVU1333 + 3890 0056 FF23 movs r3, #255 + 3891 0058 2385 strh r3, [r4, #40] @ movhi +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3892 .loc 1 1922 7 is_stmt 1 view .LVU1334 + 3893 .LVL248: +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3894 .loc 1 1922 16 is_stmt 0 view .LVU1335 + 3895 005a 4FF08076 mov r6, #16777216 + 3896 .LVL249: + 3897 .L272: +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3898 .loc 1 1930 5 is_stmt 1 view .LVU1336 +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3899 .loc 1 1930 13 is_stmt 0 view .LVU1337 + 3900 005e 228D ldrh r2, [r4, #40] +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3901 .loc 1 1930 8 view .LVU1338 + 3902 0060 002A cmp r2, #0 + 3903 0062 4FD0 beq .L273 +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3904 .loc 1 1932 7 is_stmt 1 view .LVU1339 +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 218 + + + 3905 .loc 1 1932 15 is_stmt 0 view .LVU1340 + 3906 0064 A36B ldr r3, [r4, #56] +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3907 .loc 1 1932 10 view .LVU1341 + 3908 0066 1BB3 cbz r3, .L274 +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3909 .loc 1 1935 9 is_stmt 1 view .LVU1342 +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3910 .loc 1 1935 40 is_stmt 0 view .LVU1343 + 3911 0068 364A ldr r2, .L284+8 + 3912 006a 9A62 str r2, [r3, #40] +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3913 .loc 1 1938 9 is_stmt 1 view .LVU1344 +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3914 .loc 1 1938 13 is_stmt 0 view .LVU1345 + 3915 006c A36B ldr r3, [r4, #56] +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3916 .loc 1 1938 41 view .LVU1346 + 3917 006e 364A ldr r2, .L284+12 + 3918 0070 1A63 str r2, [r3, #48] +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 3919 .loc 1 1941 9 is_stmt 1 view .LVU1347 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 3920 .loc 1 1941 13 is_stmt 0 view .LVU1348 + 3921 0072 A26B ldr r2, [r4, #56] +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 3922 .loc 1 1941 44 view .LVU1349 + 3923 0074 0023 movs r3, #0 + 3924 0076 D362 str r3, [r2, #44] +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3925 .loc 1 1942 9 is_stmt 1 view .LVU1350 +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3926 .loc 1 1942 13 is_stmt 0 view .LVU1351 + 3927 0078 A26B ldr r2, [r4, #56] +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3928 .loc 1 1942 41 view .LVU1352 + 3929 007a 5363 str r3, [r2, #52] +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 3930 .loc 1 1945 9 is_stmt 1 view .LVU1353 +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 3931 .loc 1 1945 88 is_stmt 0 view .LVU1354 + 3932 007c 2268 ldr r2, [r4] +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 3933 .loc 1 1945 25 view .LVU1355 + 3934 007e 238D ldrh r3, [r4, #40] + 3935 0080 2832 adds r2, r2, #40 + 3936 0082 A06B ldr r0, [r4, #56] + 3937 0084 FFF7FEFF bl HAL_DMA_Start_IT + 3938 .LVL250: +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3939 .loc 1 1963 7 is_stmt 1 view .LVU1356 +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3940 .loc 1 1963 10 is_stmt 0 view .LVU1357 + 3941 0088 00B3 cbz r0, .L283 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3942 .loc 1 1987 9 is_stmt 1 view .LVU1358 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/ccNVyn8W.s page 219 + + + 3943 .loc 1 1987 25 is_stmt 0 view .LVU1359 + 3944 008a 2023 movs r3, #32 + 3945 008c 84F84130 strb r3, [r4, #65] +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3946 .loc 1 1988 9 is_stmt 1 view .LVU1360 +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3947 .loc 1 1988 25 is_stmt 0 view .LVU1361 + 3948 0090 0022 movs r2, #0 + 3949 0092 84F84220 strb r2, [r4, #66] +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3950 .loc 1 1991 9 is_stmt 1 view .LVU1362 +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3951 .loc 1 1991 13 is_stmt 0 view .LVU1363 + 3952 0096 636C ldr r3, [r4, #68] +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3953 .loc 1 1991 25 view .LVU1364 + 3954 0098 43F01003 orr r3, r3, #16 + 3955 009c 6364 str r3, [r4, #68] +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3956 .loc 1 1994 9 is_stmt 1 view .LVU1365 +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3957 .loc 1 1994 9 view .LVU1366 + 3958 009e 84F84020 strb r2, [r4, #64] +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3959 .loc 1 1994 9 view .LVU1367 +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3960 .loc 1 1996 9 view .LVU1368 +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3961 .loc 1 1996 16 is_stmt 0 view .LVU1369 + 3962 00a2 0120 movs r0, #1 + 3963 .LVL251: +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3964 .loc 1 1996 16 view .LVU1370 + 3965 00a4 43E0 b .L270 + 3966 .LVL252: + 3967 .L271: +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3968 .loc 1 1926 7 is_stmt 1 view .LVU1371 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3969 .loc 1 1926 28 is_stmt 0 view .LVU1372 + 3970 00a6 638D ldrh r3, [r4, #42] +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3971 .loc 1 1926 22 view .LVU1373 + 3972 00a8 2385 strh r3, [r4, #40] @ movhi +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3973 .loc 1 1927 7 is_stmt 1 view .LVU1374 + 3974 .LVL253: +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3975 .loc 1 1927 16 is_stmt 0 view .LVU1375 + 3976 00aa 4FF00076 mov r6, #33554432 + 3977 00ae D6E7 b .L272 + 3978 .LVL254: + 3979 .L274: +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3980 .loc 1 1951 9 is_stmt 1 view .LVU1376 +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3981 .loc 1 1951 25 is_stmt 0 view .LVU1377 + ARM GAS /tmp/ccNVyn8W.s page 220 + + + 3982 00b0 2023 movs r3, #32 + 3983 00b2 84F84130 strb r3, [r4, #65] +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3984 .loc 1 1952 9 is_stmt 1 view .LVU1378 +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3985 .loc 1 1952 25 is_stmt 0 view .LVU1379 + 3986 00b6 0022 movs r2, #0 + 3987 00b8 84F84220 strb r2, [r4, #66] +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3988 .loc 1 1955 9 is_stmt 1 view .LVU1380 +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3989 .loc 1 1955 13 is_stmt 0 view .LVU1381 + 3990 00bc 636C ldr r3, [r4, #68] +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3991 .loc 1 1955 25 view .LVU1382 + 3992 00be 43F08003 orr r3, r3, #128 + 3993 00c2 6364 str r3, [r4, #68] +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3994 .loc 1 1958 9 is_stmt 1 view .LVU1383 +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3995 .loc 1 1958 9 view .LVU1384 + 3996 00c4 84F84020 strb r2, [r4, #64] +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3997 .loc 1 1958 9 view .LVU1385 +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3998 .loc 1 1960 9 view .LVU1386 +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3999 .loc 1 1960 16 is_stmt 0 view .LVU1387 + 4000 00c8 0120 movs r0, #1 + 4001 00ca 30E0 b .L270 + 4002 .LVL255: + 4003 .L283: +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4004 .loc 1 1967 9 is_stmt 1 view .LVU1388 + 4005 00cc 1F4B ldr r3, .L284+16 + 4006 00ce 0093 str r3, [sp] + 4007 00d0 3346 mov r3, r6 + 4008 00d2 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 4009 00d6 2946 mov r1, r5 + 4010 00d8 2046 mov r0, r4 + 4011 .LVL256: +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4012 .loc 1 1967 9 is_stmt 0 view .LVU1389 + 4013 00da FFF7FEFF bl I2C_TransferConfig + 4014 .LVL257: +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4015 .loc 1 1970 9 is_stmt 1 view .LVU1390 +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4016 .loc 1 1970 13 is_stmt 0 view .LVU1391 + 4017 00de 638D ldrh r3, [r4, #42] + 4018 00e0 9BB2 uxth r3, r3 +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4019 .loc 1 1970 32 view .LVU1392 + 4020 00e2 228D ldrh r2, [r4, #40] +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4021 .loc 1 1970 25 view .LVU1393 + 4022 00e4 9B1A subs r3, r3, r2 + ARM GAS /tmp/ccNVyn8W.s page 221 + + + 4023 00e6 9BB2 uxth r3, r3 + 4024 00e8 6385 strh r3, [r4, #42] @ movhi +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4025 .loc 1 1973 9 is_stmt 1 view .LVU1394 +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4026 .loc 1 1973 9 view .LVU1395 + 4027 00ea 0023 movs r3, #0 + 4028 00ec 84F84030 strb r3, [r4, #64] +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4029 .loc 1 1973 9 view .LVU1396 +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4030 .loc 1 1979 9 view .LVU1397 + 4031 00f0 1021 movs r1, #16 + 4032 00f2 2046 mov r0, r4 + 4033 00f4 FFF7FEFF bl I2C_Enable_IRQ + 4034 .LVL258: +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4035 .loc 1 1982 9 view .LVU1398 +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4036 .loc 1 1982 13 is_stmt 0 view .LVU1399 + 4037 00f8 2268 ldr r2, [r4] +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4038 .loc 1 1982 23 view .LVU1400 + 4039 00fa 1368 ldr r3, [r2] +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4040 .loc 1 1982 29 view .LVU1401 + 4041 00fc 43F48043 orr r3, r3, #16384 + 4042 0100 1360 str r3, [r2] + 4043 0102 11E0 b .L277 + 4044 .LVL259: + 4045 .L273: +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4046 .loc 1 2002 7 is_stmt 1 view .LVU1402 +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4047 .loc 1 2002 21 is_stmt 0 view .LVU1403 + 4048 0104 124B ldr r3, .L284+20 + 4049 0106 6363 str r3, [r4, #52] +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4050 .loc 1 2006 7 is_stmt 1 view .LVU1404 + 4051 0108 104B ldr r3, .L284+16 + 4052 010a 0093 str r3, [sp] + 4053 010c 4FF00073 mov r3, #33554432 + 4054 0110 D2B2 uxtb r2, r2 + 4055 0112 2946 mov r1, r5 + 4056 .LVL260: +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4057 .loc 1 2006 7 is_stmt 0 view .LVU1405 + 4058 0114 2046 mov r0, r4 + 4059 0116 FFF7FEFF bl I2C_TransferConfig + 4060 .LVL261: +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4061 .loc 1 2010 7 is_stmt 1 view .LVU1406 +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4062 .loc 1 2010 7 view .LVU1407 + 4063 011a 0023 movs r3, #0 + 4064 011c 84F84030 strb r3, [r4, #64] +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 222 + + + 4065 .loc 1 2010 7 view .LVU1408 +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4066 .loc 1 2019 7 view .LVU1409 + 4067 0120 0121 movs r1, #1 + 4068 0122 2046 mov r0, r4 + 4069 0124 FFF7FEFF bl I2C_Enable_IRQ + 4070 .LVL262: + 4071 .L277: +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4072 .loc 1 2022 5 view .LVU1410 +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4073 .loc 1 2022 12 is_stmt 0 view .LVU1411 + 4074 0128 0020 movs r0, #0 + 4075 012a 00E0 b .L270 + 4076 .LVL263: + 4077 .L278: +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4078 .loc 1 2026 12 view .LVU1412 + 4079 012c 0220 movs r0, #2 + 4080 .LVL264: + 4081 .L270: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4082 .loc 1 2028 1 view .LVU1413 + 4083 012e 02B0 add sp, sp, #8 + 4084 .cfi_remember_state + 4085 .cfi_def_cfa_offset 16 + 4086 @ sp needed + 4087 0130 70BD pop {r4, r5, r6, pc} + 4088 .LVL265: + 4089 .L279: + 4090 .cfi_restore_state +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4091 .loc 1 1903 14 view .LVU1414 + 4092 0132 0220 movs r0, #2 + 4093 0134 FBE7 b .L270 + 4094 .L280: +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4095 .loc 1 1907 5 discriminator 1 view .LVU1415 + 4096 0136 0220 movs r0, #2 + 4097 0138 F9E7 b .L270 + 4098 .L285: + 4099 013a 00BF .align 2 + 4100 .L284: + 4101 013c 0000FFFF .word -65536 + 4102 0140 00000000 .word I2C_Master_ISR_DMA + 4103 0144 00000000 .word I2C_DMAMasterTransmitCplt + 4104 0148 00000000 .word I2C_DMAError + 4105 014c 00200080 .word -2147475456 + 4106 0150 00000000 .word I2C_Master_ISR_IT + 4107 .cfi_endproc + 4108 .LFE142: + 4110 .section .text.HAL_I2C_Master_Receive_DMA,"ax",%progbits + 4111 .align 1 + 4112 .global HAL_I2C_Master_Receive_DMA + 4113 .syntax unified + 4114 .thumb + 4115 .thumb_func + ARM GAS /tmp/ccNVyn8W.s page 223 + + + 4117 HAL_I2C_Master_Receive_DMA: + 4118 .LVL266: + 4119 .LFB143: +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 4120 .loc 1 2042 1 is_stmt 1 view -0 + 4121 .cfi_startproc + 4122 @ args = 0, pretend = 0, frame = 0 + 4123 @ frame_needed = 0, uses_anonymous_args = 0 +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 4124 .loc 1 2042 1 is_stmt 0 view .LVU1417 + 4125 0000 70B5 push {r4, r5, r6, lr} + 4126 .cfi_def_cfa_offset 16 + 4127 .cfi_offset 4, -16 + 4128 .cfi_offset 5, -12 + 4129 .cfi_offset 6, -8 + 4130 .cfi_offset 14, -4 + 4131 0002 82B0 sub sp, sp, #8 + 4132 .cfi_def_cfa_offset 24 + 4133 0004 0446 mov r4, r0 +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4134 .loc 1 2043 3 is_stmt 1 view .LVU1418 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4135 .loc 1 2044 3 view .LVU1419 +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4136 .loc 1 2046 3 view .LVU1420 +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4137 .loc 1 2046 11 is_stmt 0 view .LVU1421 + 4138 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 4139 .LVL267: +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4140 .loc 1 2046 11 view .LVU1422 + 4141 000a C0B2 uxtb r0, r0 +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4142 .loc 1 2046 6 view .LVU1423 + 4143 000c 2028 cmp r0, #32 + 4144 000e 40F08C80 bne .L295 + 4145 0012 0D46 mov r5, r1 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4146 .loc 1 2048 5 is_stmt 1 view .LVU1424 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4147 .loc 1 2048 9 is_stmt 0 view .LVU1425 + 4148 0014 2168 ldr r1, [r4] + 4149 .LVL268: +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4150 .loc 1 2048 9 view .LVU1426 + 4151 0016 8969 ldr r1, [r1, #24] +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4152 .loc 1 2048 8 view .LVU1427 + 4153 0018 11F4004F tst r1, #32768 + 4154 001c 40F08880 bne .L296 +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4155 .loc 1 2054 5 is_stmt 1 view .LVU1428 +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4156 .loc 1 2054 5 view .LVU1429 + 4157 0020 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 4158 0024 0129 cmp r1, #1 + 4159 0026 00F08580 beq .L297 + ARM GAS /tmp/ccNVyn8W.s page 224 + + +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4160 .loc 1 2054 5 discriminator 2 view .LVU1430 + 4161 002a 0121 movs r1, #1 + 4162 002c 84F84010 strb r1, [r4, #64] +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4163 .loc 1 2054 5 discriminator 2 view .LVU1431 +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4164 .loc 1 2056 5 view .LVU1432 +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4165 .loc 1 2056 23 is_stmt 0 view .LVU1433 + 4166 0030 2221 movs r1, #34 + 4167 0032 84F84110 strb r1, [r4, #65] +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4168 .loc 1 2057 5 is_stmt 1 view .LVU1434 +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4169 .loc 1 2057 23 is_stmt 0 view .LVU1435 + 4170 0036 1021 movs r1, #16 + 4171 0038 84F84210 strb r1, [r4, #66] +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4172 .loc 1 2058 5 is_stmt 1 view .LVU1436 +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4173 .loc 1 2058 23 is_stmt 0 view .LVU1437 + 4174 003c 0021 movs r1, #0 + 4175 003e 6164 str r1, [r4, #68] +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4176 .loc 1 2061 5 is_stmt 1 view .LVU1438 +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4177 .loc 1 2061 23 is_stmt 0 view .LVU1439 + 4178 0040 6262 str r2, [r4, #36] +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4179 .loc 1 2062 5 is_stmt 1 view .LVU1440 +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4180 .loc 1 2062 23 is_stmt 0 view .LVU1441 + 4181 0042 6385 strh r3, [r4, #42] @ movhi +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4182 .loc 1 2063 5 is_stmt 1 view .LVU1442 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4183 .loc 1 2063 23 is_stmt 0 view .LVU1443 + 4184 0044 3C4B ldr r3, .L301 + 4185 .LVL269: +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4186 .loc 1 2063 23 view .LVU1444 + 4187 0046 E362 str r3, [r4, #44] + 4188 .LVL270: +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4189 .loc 1 2064 5 is_stmt 1 view .LVU1445 +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4190 .loc 1 2064 23 is_stmt 0 view .LVU1446 + 4191 0048 3C4B ldr r3, .L301+4 + 4192 004a 6363 str r3, [r4, #52] +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4193 .loc 1 2066 5 is_stmt 1 view .LVU1447 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4194 .loc 1 2066 13 is_stmt 0 view .LVU1448 + 4195 004c 638D ldrh r3, [r4, #42] + 4196 004e 9BB2 uxth r3, r3 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 225 + + + 4197 .loc 1 2066 8 view .LVU1449 + 4198 0050 FF2B cmp r3, #255 + 4199 0052 27D9 bls .L288 +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4200 .loc 1 2068 7 is_stmt 1 view .LVU1450 +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4201 .loc 1 2068 22 is_stmt 0 view .LVU1451 + 4202 0054 FF23 movs r3, #255 + 4203 0056 2385 strh r3, [r4, #40] @ movhi +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4204 .loc 1 2069 7 is_stmt 1 view .LVU1452 + 4205 .LVL271: +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4206 .loc 1 2069 16 is_stmt 0 view .LVU1453 + 4207 0058 4FF08076 mov r6, #16777216 + 4208 .LVL272: + 4209 .L289: +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4210 .loc 1 2077 5 is_stmt 1 view .LVU1454 +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4211 .loc 1 2077 13 is_stmt 0 view .LVU1455 + 4212 005c 218D ldrh r1, [r4, #40] +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4213 .loc 1 2077 8 view .LVU1456 + 4214 005e 0029 cmp r1, #0 + 4215 0060 4FD0 beq .L290 +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4216 .loc 1 2079 7 is_stmt 1 view .LVU1457 +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4217 .loc 1 2079 15 is_stmt 0 view .LVU1458 + 4218 0062 E36B ldr r3, [r4, #60] +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4219 .loc 1 2079 10 view .LVU1459 + 4220 0064 1BB3 cbz r3, .L291 +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4221 .loc 1 2082 9 is_stmt 1 view .LVU1460 +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4222 .loc 1 2082 40 is_stmt 0 view .LVU1461 + 4223 0066 3649 ldr r1, .L301+8 + 4224 0068 9962 str r1, [r3, #40] +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4225 .loc 1 2085 9 is_stmt 1 view .LVU1462 +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4226 .loc 1 2085 13 is_stmt 0 view .LVU1463 + 4227 006a E36B ldr r3, [r4, #60] +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4228 .loc 1 2085 41 view .LVU1464 + 4229 006c 3549 ldr r1, .L301+12 + 4230 006e 1963 str r1, [r3, #48] +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4231 .loc 1 2088 9 is_stmt 1 view .LVU1465 +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4232 .loc 1 2088 13 is_stmt 0 view .LVU1466 + 4233 0070 E16B ldr r1, [r4, #60] +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4234 .loc 1 2088 44 view .LVU1467 + 4235 0072 0023 movs r3, #0 + ARM GAS /tmp/ccNVyn8W.s page 226 + + + 4236 0074 CB62 str r3, [r1, #44] +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4237 .loc 1 2089 9 is_stmt 1 view .LVU1468 +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4238 .loc 1 2089 13 is_stmt 0 view .LVU1469 + 4239 0076 E16B ldr r1, [r4, #60] +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4240 .loc 1 2089 41 view .LVU1470 + 4241 0078 4B63 str r3, [r1, #52] +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4242 .loc 1 2092 9 is_stmt 1 view .LVU1471 +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4243 .loc 1 2092 71 is_stmt 0 view .LVU1472 + 4244 007a 2168 ldr r1, [r4] +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4245 .loc 1 2092 25 view .LVU1473 + 4246 007c 238D ldrh r3, [r4, #40] + 4247 007e 2431 adds r1, r1, #36 + 4248 0080 E06B ldr r0, [r4, #60] + 4249 0082 FFF7FEFF bl HAL_DMA_Start_IT + 4250 .LVL273: +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4251 .loc 1 2110 7 is_stmt 1 view .LVU1474 +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4252 .loc 1 2110 10 is_stmt 0 view .LVU1475 + 4253 0086 00B3 cbz r0, .L300 +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4254 .loc 1 2134 9 is_stmt 1 view .LVU1476 +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4255 .loc 1 2134 25 is_stmt 0 view .LVU1477 + 4256 0088 2023 movs r3, #32 + 4257 008a 84F84130 strb r3, [r4, #65] +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4258 .loc 1 2135 9 is_stmt 1 view .LVU1478 +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4259 .loc 1 2135 25 is_stmt 0 view .LVU1479 + 4260 008e 0022 movs r2, #0 + 4261 0090 84F84220 strb r2, [r4, #66] +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4262 .loc 1 2138 9 is_stmt 1 view .LVU1480 +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4263 .loc 1 2138 13 is_stmt 0 view .LVU1481 + 4264 0094 636C ldr r3, [r4, #68] +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4265 .loc 1 2138 25 view .LVU1482 + 4266 0096 43F01003 orr r3, r3, #16 + 4267 009a 6364 str r3, [r4, #68] +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4268 .loc 1 2141 9 is_stmt 1 view .LVU1483 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4269 .loc 1 2141 9 view .LVU1484 + 4270 009c 84F84020 strb r2, [r4, #64] +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4271 .loc 1 2141 9 view .LVU1485 +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4272 .loc 1 2143 9 view .LVU1486 +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 227 + + + 4273 .loc 1 2143 16 is_stmt 0 view .LVU1487 + 4274 00a0 0120 movs r0, #1 + 4275 .LVL274: +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4276 .loc 1 2143 16 view .LVU1488 + 4277 00a2 43E0 b .L287 + 4278 .LVL275: + 4279 .L288: +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4280 .loc 1 2073 7 is_stmt 1 view .LVU1489 +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4281 .loc 1 2073 28 is_stmt 0 view .LVU1490 + 4282 00a4 638D ldrh r3, [r4, #42] +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4283 .loc 1 2073 22 view .LVU1491 + 4284 00a6 2385 strh r3, [r4, #40] @ movhi +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4285 .loc 1 2074 7 is_stmt 1 view .LVU1492 + 4286 .LVL276: +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4287 .loc 1 2074 16 is_stmt 0 view .LVU1493 + 4288 00a8 4FF00076 mov r6, #33554432 + 4289 00ac D6E7 b .L289 + 4290 .LVL277: + 4291 .L291: +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4292 .loc 1 2098 9 is_stmt 1 view .LVU1494 +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4293 .loc 1 2098 25 is_stmt 0 view .LVU1495 + 4294 00ae 2023 movs r3, #32 + 4295 00b0 84F84130 strb r3, [r4, #65] +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4296 .loc 1 2099 9 is_stmt 1 view .LVU1496 +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4297 .loc 1 2099 25 is_stmt 0 view .LVU1497 + 4298 00b4 0022 movs r2, #0 + 4299 .LVL278: +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4300 .loc 1 2099 25 view .LVU1498 + 4301 00b6 84F84220 strb r2, [r4, #66] +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4302 .loc 1 2102 9 is_stmt 1 view .LVU1499 +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4303 .loc 1 2102 13 is_stmt 0 view .LVU1500 + 4304 00ba 636C ldr r3, [r4, #68] +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4305 .loc 1 2102 25 view .LVU1501 + 4306 00bc 43F08003 orr r3, r3, #128 + 4307 00c0 6364 str r3, [r4, #68] +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4308 .loc 1 2105 9 is_stmt 1 view .LVU1502 +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4309 .loc 1 2105 9 view .LVU1503 + 4310 00c2 84F84020 strb r2, [r4, #64] +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4311 .loc 1 2105 9 view .LVU1504 +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 228 + + + 4312 .loc 1 2107 9 view .LVU1505 +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4313 .loc 1 2107 16 is_stmt 0 view .LVU1506 + 4314 00c6 0120 movs r0, #1 + 4315 00c8 30E0 b .L287 + 4316 .LVL279: + 4317 .L300: +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4318 .loc 1 2114 9 is_stmt 1 view .LVU1507 + 4319 00ca 1F4B ldr r3, .L301+16 + 4320 00cc 0093 str r3, [sp] + 4321 00ce 3346 mov r3, r6 + 4322 00d0 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 4323 00d4 2946 mov r1, r5 + 4324 00d6 2046 mov r0, r4 + 4325 .LVL280: +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4326 .loc 1 2114 9 is_stmt 0 view .LVU1508 + 4327 00d8 FFF7FEFF bl I2C_TransferConfig + 4328 .LVL281: +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4329 .loc 1 2117 9 is_stmt 1 view .LVU1509 +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4330 .loc 1 2117 13 is_stmt 0 view .LVU1510 + 4331 00dc 638D ldrh r3, [r4, #42] + 4332 00de 9BB2 uxth r3, r3 +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4333 .loc 1 2117 32 view .LVU1511 + 4334 00e0 228D ldrh r2, [r4, #40] +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4335 .loc 1 2117 25 view .LVU1512 + 4336 00e2 9B1A subs r3, r3, r2 + 4337 00e4 9BB2 uxth r3, r3 + 4338 00e6 6385 strh r3, [r4, #42] @ movhi +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4339 .loc 1 2120 9 is_stmt 1 view .LVU1513 +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4340 .loc 1 2120 9 view .LVU1514 + 4341 00e8 0023 movs r3, #0 + 4342 00ea 84F84030 strb r3, [r4, #64] +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4343 .loc 1 2120 9 view .LVU1515 +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4344 .loc 1 2126 9 view .LVU1516 + 4345 00ee 1021 movs r1, #16 + 4346 00f0 2046 mov r0, r4 + 4347 00f2 FFF7FEFF bl I2C_Enable_IRQ + 4348 .LVL282: +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4349 .loc 1 2129 9 view .LVU1517 +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4350 .loc 1 2129 13 is_stmt 0 view .LVU1518 + 4351 00f6 2268 ldr r2, [r4] +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4352 .loc 1 2129 23 view .LVU1519 + 4353 00f8 1368 ldr r3, [r2] +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 229 + + + 4354 .loc 1 2129 29 view .LVU1520 + 4355 00fa 43F40043 orr r3, r3, #32768 + 4356 00fe 1360 str r3, [r2] + 4357 0100 11E0 b .L294 + 4358 .LVL283: + 4359 .L290: +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4360 .loc 1 2149 7 is_stmt 1 view .LVU1521 +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4361 .loc 1 2149 21 is_stmt 0 view .LVU1522 + 4362 0102 124B ldr r3, .L301+20 + 4363 0104 6363 str r3, [r4, #52] +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4364 .loc 1 2153 7 is_stmt 1 view .LVU1523 + 4365 0106 104B ldr r3, .L301+16 + 4366 0108 0093 str r3, [sp] + 4367 010a 4FF00073 mov r3, #33554432 + 4368 010e CAB2 uxtb r2, r1 + 4369 .LVL284: +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4370 .loc 1 2153 7 is_stmt 0 view .LVU1524 + 4371 0110 2946 mov r1, r5 + 4372 0112 2046 mov r0, r4 + 4373 0114 FFF7FEFF bl I2C_TransferConfig + 4374 .LVL285: +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4375 .loc 1 2157 7 is_stmt 1 view .LVU1525 +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4376 .loc 1 2157 7 view .LVU1526 + 4377 0118 0023 movs r3, #0 + 4378 011a 84F84030 strb r3, [r4, #64] +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4379 .loc 1 2157 7 view .LVU1527 +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4380 .loc 1 2166 7 view .LVU1528 + 4381 011e 0121 movs r1, #1 + 4382 0120 2046 mov r0, r4 + 4383 0122 FFF7FEFF bl I2C_Enable_IRQ + 4384 .LVL286: + 4385 .L294: +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4386 .loc 1 2169 5 view .LVU1529 +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4387 .loc 1 2169 12 is_stmt 0 view .LVU1530 + 4388 0126 0020 movs r0, #0 + 4389 0128 00E0 b .L287 + 4390 .LVL287: + 4391 .L295: +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4392 .loc 1 2173 12 view .LVU1531 + 4393 012a 0220 movs r0, #2 + 4394 .LVL288: + 4395 .L287: +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4396 .loc 1 2175 1 view .LVU1532 + 4397 012c 02B0 add sp, sp, #8 + 4398 .cfi_remember_state + ARM GAS /tmp/ccNVyn8W.s page 230 + + + 4399 .cfi_def_cfa_offset 16 + 4400 @ sp needed + 4401 012e 70BD pop {r4, r5, r6, pc} + 4402 .LVL289: + 4403 .L296: + 4404 .cfi_restore_state +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4405 .loc 1 2050 14 view .LVU1533 + 4406 0130 0220 movs r0, #2 + 4407 0132 FBE7 b .L287 + 4408 .L297: +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4409 .loc 1 2054 5 discriminator 1 view .LVU1534 + 4410 0134 0220 movs r0, #2 + 4411 0136 F9E7 b .L287 + 4412 .L302: + 4413 .align 2 + 4414 .L301: + 4415 0138 0000FFFF .word -65536 + 4416 013c 00000000 .word I2C_Master_ISR_DMA + 4417 0140 00000000 .word I2C_DMAMasterReceiveCplt + 4418 0144 00000000 .word I2C_DMAError + 4419 0148 00240080 .word -2147474432 + 4420 014c 00000000 .word I2C_Master_ISR_IT + 4421 .cfi_endproc + 4422 .LFE143: + 4424 .section .text.HAL_I2C_Slave_Transmit_DMA,"ax",%progbits + 4425 .align 1 + 4426 .global HAL_I2C_Slave_Transmit_DMA + 4427 .syntax unified + 4428 .thumb + 4429 .thumb_func + 4431 HAL_I2C_Slave_Transmit_DMA: + 4432 .LVL290: + 4433 .LFB144: +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4434 .loc 1 2186 1 is_stmt 1 view -0 + 4435 .cfi_startproc + 4436 @ args = 0, pretend = 0, frame = 0 + 4437 @ frame_needed = 0, uses_anonymous_args = 0 +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4438 .loc 1 2187 3 view .LVU1536 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4439 .loc 1 2189 3 view .LVU1537 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4440 .loc 1 2189 11 is_stmt 0 view .LVU1538 + 4441 0000 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 4442 0004 DBB2 uxtb r3, r3 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4443 .loc 1 2189 6 view .LVU1539 + 4444 0006 202B cmp r3, #32 + 4445 0008 40F08D80 bne .L313 +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4446 .loc 1 2186 1 view .LVU1540 + 4447 000c 10B5 push {r4, lr} + 4448 .cfi_def_cfa_offset 8 + 4449 .cfi_offset 4, -8 + ARM GAS /tmp/ccNVyn8W.s page 231 + + + 4450 .cfi_offset 14, -4 + 4451 000e 0446 mov r4, r0 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4452 .loc 1 2191 5 is_stmt 1 view .LVU1541 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4453 .loc 1 2191 8 is_stmt 0 view .LVU1542 + 4454 0010 0029 cmp r1, #0 + 4455 0012 44D0 beq .L305 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4456 .loc 1 2191 25 discriminator 1 view .LVU1543 + 4457 0014 002A cmp r2, #0 + 4458 0016 42D0 beq .L305 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4459 .loc 1 2197 5 is_stmt 1 view .LVU1544 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4460 .loc 1 2197 5 view .LVU1545 + 4461 0018 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 4462 001c 012B cmp r3, #1 + 4463 001e 00F08480 beq .L314 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4464 .loc 1 2197 5 discriminator 2 view .LVU1546 + 4465 0022 0123 movs r3, #1 + 4466 0024 80F84030 strb r3, [r0, #64] +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4467 .loc 1 2197 5 discriminator 2 view .LVU1547 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4468 .loc 1 2199 5 view .LVU1548 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4469 .loc 1 2199 23 is_stmt 0 view .LVU1549 + 4470 0028 2123 movs r3, #33 + 4471 002a 80F84130 strb r3, [r0, #65] +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4472 .loc 1 2200 5 is_stmt 1 view .LVU1550 +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4473 .loc 1 2200 23 is_stmt 0 view .LVU1551 + 4474 002e 2023 movs r3, #32 + 4475 0030 80F84230 strb r3, [r0, #66] +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4476 .loc 1 2201 5 is_stmt 1 view .LVU1552 +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4477 .loc 1 2201 23 is_stmt 0 view .LVU1553 + 4478 0034 0023 movs r3, #0 + 4479 0036 4364 str r3, [r0, #68] +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4480 .loc 1 2204 5 is_stmt 1 view .LVU1554 +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4481 .loc 1 2204 23 is_stmt 0 view .LVU1555 + 4482 0038 4162 str r1, [r0, #36] +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4483 .loc 1 2205 5 is_stmt 1 view .LVU1556 +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4484 .loc 1 2205 23 is_stmt 0 view .LVU1557 + 4485 003a 4285 strh r2, [r0, #42] @ movhi +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4486 .loc 1 2206 5 is_stmt 1 view .LVU1558 +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4487 .loc 1 2206 29 is_stmt 0 view .LVU1559 + ARM GAS /tmp/ccNVyn8W.s page 232 + + + 4488 003c 438D ldrh r3, [r0, #42] +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4489 .loc 1 2206 23 view .LVU1560 + 4490 003e 0385 strh r3, [r0, #40] @ movhi +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4491 .loc 1 2207 5 is_stmt 1 view .LVU1561 +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4492 .loc 1 2207 23 is_stmt 0 view .LVU1562 + 4493 0040 3B4B ldr r3, .L322 + 4494 0042 C362 str r3, [r0, #44] +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4495 .loc 1 2208 5 is_stmt 1 view .LVU1563 +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4496 .loc 1 2208 23 is_stmt 0 view .LVU1564 + 4497 0044 3B4B ldr r3, .L322+4 + 4498 0046 4363 str r3, [r0, #52] +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4499 .loc 1 2211 5 is_stmt 1 view .LVU1565 +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4500 .loc 1 2211 19 is_stmt 0 view .LVU1566 + 4501 0048 036A ldr r3, [r0, #32] +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4502 .loc 1 2211 8 view .LVU1567 + 4503 004a B3F5003F cmp r3, #131072 + 4504 004e 2BD0 beq .L320 + 4505 .LVL291: + 4506 .L307: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4507 .loc 1 2224 5 is_stmt 1 view .LVU1568 +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4508 .loc 1 2224 13 is_stmt 0 view .LVU1569 + 4509 0050 638D ldrh r3, [r4, #42] + 4510 0052 9BB2 uxth r3, r3 +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4511 .loc 1 2224 8 view .LVU1570 + 4512 0054 002B cmp r3, #0 + 4513 0056 57D0 beq .L308 +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4514 .loc 1 2226 7 is_stmt 1 view .LVU1571 +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4515 .loc 1 2226 15 is_stmt 0 view .LVU1572 + 4516 0058 A36B ldr r3, [r4, #56] +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4517 .loc 1 2226 10 view .LVU1573 + 4518 005a 002B cmp r3, #0 + 4519 005c 33D0 beq .L309 +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4520 .loc 1 2229 9 is_stmt 1 view .LVU1574 +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4521 .loc 1 2229 40 is_stmt 0 view .LVU1575 + 4522 005e 364A ldr r2, .L322+8 + 4523 0060 9A62 str r2, [r3, #40] +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4524 .loc 1 2232 9 is_stmt 1 view .LVU1576 +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4525 .loc 1 2232 13 is_stmt 0 view .LVU1577 + 4526 0062 A36B ldr r3, [r4, #56] + ARM GAS /tmp/ccNVyn8W.s page 233 + + +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4527 .loc 1 2232 41 view .LVU1578 + 4528 0064 354A ldr r2, .L322+12 + 4529 0066 1A63 str r2, [r3, #48] +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4530 .loc 1 2235 9 is_stmt 1 view .LVU1579 +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4531 .loc 1 2235 13 is_stmt 0 view .LVU1580 + 4532 0068 A26B ldr r2, [r4, #56] +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4533 .loc 1 2235 44 view .LVU1581 + 4534 006a 0023 movs r3, #0 + 4535 006c D362 str r3, [r2, #44] +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4536 .loc 1 2236 9 is_stmt 1 view .LVU1582 +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4537 .loc 1 2236 13 is_stmt 0 view .LVU1583 + 4538 006e A26B ldr r2, [r4, #56] +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4539 .loc 1 2236 41 view .LVU1584 + 4540 0070 5363 str r3, [r2, #52] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4541 .loc 1 2239 9 is_stmt 1 view .LVU1585 +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4542 .loc 1 2240 83 is_stmt 0 view .LVU1586 + 4543 0072 2268 ldr r2, [r4] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4544 .loc 1 2239 25 view .LVU1587 + 4545 0074 238D ldrh r3, [r4, #40] + 4546 0076 2832 adds r2, r2, #40 + 4547 0078 616A ldr r1, [r4, #36] + 4548 .LVL292: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4549 .loc 1 2239 25 view .LVU1588 + 4550 007a A06B ldr r0, [r4, #56] + 4551 .LVL293: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4552 .loc 1 2239 25 view .LVU1589 + 4553 007c FFF7FEFF bl HAL_DMA_Start_IT + 4554 .LVL294: +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4555 .loc 1 2258 7 is_stmt 1 view .LVU1590 +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4556 .loc 1 2258 10 is_stmt 0 view .LVU1591 + 4557 0080 78B3 cbz r0, .L321 +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4558 .loc 1 2278 9 is_stmt 1 view .LVU1592 +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4559 .loc 1 2278 25 is_stmt 0 view .LVU1593 + 4560 0082 2823 movs r3, #40 + 4561 0084 84F84130 strb r3, [r4, #65] +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4562 .loc 1 2279 9 is_stmt 1 view .LVU1594 +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4563 .loc 1 2279 25 is_stmt 0 view .LVU1595 + 4564 0088 0022 movs r2, #0 + 4565 008a 84F84220 strb r2, [r4, #66] + ARM GAS /tmp/ccNVyn8W.s page 234 + + +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4566 .loc 1 2282 9 is_stmt 1 view .LVU1596 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4567 .loc 1 2282 13 is_stmt 0 view .LVU1597 + 4568 008e 636C ldr r3, [r4, #68] +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4569 .loc 1 2282 25 view .LVU1598 + 4570 0090 43F01003 orr r3, r3, #16 + 4571 0094 6364 str r3, [r4, #68] +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4572 .loc 1 2285 9 is_stmt 1 view .LVU1599 +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4573 .loc 1 2285 9 view .LVU1600 + 4574 0096 84F84020 strb r2, [r4, #64] +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4575 .loc 1 2285 9 view .LVU1601 +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4576 .loc 1 2287 9 view .LVU1602 +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4577 .loc 1 2287 16 is_stmt 0 view .LVU1603 + 4578 009a 0120 movs r0, #1 + 4579 .LVL295: +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4580 .loc 1 2287 16 view .LVU1604 + 4581 009c 03E0 b .L304 + 4582 .LVL296: + 4583 .L305: +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 4584 .loc 1 2193 7 is_stmt 1 view .LVU1605 +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 4585 .loc 1 2193 23 is_stmt 0 view .LVU1606 + 4586 009e 4FF40073 mov r3, #512 + 4587 00a2 6364 str r3, [r4, #68] +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4588 .loc 1 2194 7 is_stmt 1 view .LVU1607 +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4589 .loc 1 2194 15 is_stmt 0 view .LVU1608 + 4590 00a4 0120 movs r0, #1 + 4591 .LVL297: + 4592 .L304: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4593 .loc 1 2311 1 view .LVU1609 + 4594 00a6 10BD pop {r4, pc} + 4595 .LVL298: + 4596 .L320: +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4597 .loc 1 2215 7 is_stmt 1 view .LVU1610 +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4598 .loc 1 2215 11 is_stmt 0 view .LVU1611 + 4599 00a8 0368 ldr r3, [r0] +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4600 .loc 1 2215 30 view .LVU1612 + 4601 00aa 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 4602 .LVL299: +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4603 .loc 1 2215 28 view .LVU1613 + 4604 00ac 9A62 str r2, [r3, #40] + ARM GAS /tmp/ccNVyn8W.s page 235 + + +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4605 .loc 1 2218 7 is_stmt 1 view .LVU1614 +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4606 .loc 1 2218 11 is_stmt 0 view .LVU1615 + 4607 00ae 436A ldr r3, [r0, #36] +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4608 .loc 1 2218 21 view .LVU1616 + 4609 00b0 0133 adds r3, r3, #1 + 4610 00b2 4362 str r3, [r0, #36] +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4611 .loc 1 2220 7 is_stmt 1 view .LVU1617 +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4612 .loc 1 2220 11 is_stmt 0 view .LVU1618 + 4613 00b4 438D ldrh r3, [r0, #42] + 4614 00b6 9BB2 uxth r3, r3 +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4615 .loc 1 2220 22 view .LVU1619 + 4616 00b8 013B subs r3, r3, #1 + 4617 00ba 9BB2 uxth r3, r3 + 4618 00bc 4385 strh r3, [r0, #42] @ movhi +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4619 .loc 1 2221 7 is_stmt 1 view .LVU1620 +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4620 .loc 1 2221 11 is_stmt 0 view .LVU1621 + 4621 00be 038D ldrh r3, [r0, #40] +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4622 .loc 1 2221 21 view .LVU1622 + 4623 00c0 013B subs r3, r3, #1 + 4624 00c2 0385 strh r3, [r0, #40] @ movhi + 4625 00c4 C4E7 b .L307 + 4626 .L309: +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4627 .loc 1 2246 9 is_stmt 1 view .LVU1623 +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4628 .loc 1 2246 25 is_stmt 0 view .LVU1624 + 4629 00c6 2823 movs r3, #40 + 4630 00c8 84F84130 strb r3, [r4, #65] +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4631 .loc 1 2247 9 is_stmt 1 view .LVU1625 +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4632 .loc 1 2247 25 is_stmt 0 view .LVU1626 + 4633 00cc 0022 movs r2, #0 + 4634 00ce 84F84220 strb r2, [r4, #66] +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4635 .loc 1 2250 9 is_stmt 1 view .LVU1627 +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4636 .loc 1 2250 13 is_stmt 0 view .LVU1628 + 4637 00d2 636C ldr r3, [r4, #68] +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4638 .loc 1 2250 25 view .LVU1629 + 4639 00d4 43F08003 orr r3, r3, #128 + 4640 00d8 6364 str r3, [r4, #68] +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4641 .loc 1 2253 9 is_stmt 1 view .LVU1630 +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4642 .loc 1 2253 9 view .LVU1631 + 4643 00da 84F84020 strb r2, [r4, #64] + ARM GAS /tmp/ccNVyn8W.s page 236 + + +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4644 .loc 1 2253 9 view .LVU1632 +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4645 .loc 1 2255 9 view .LVU1633 +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4646 .loc 1 2255 16 is_stmt 0 view .LVU1634 + 4647 00de 0120 movs r0, #1 + 4648 .LVL300: +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4649 .loc 1 2255 16 view .LVU1635 + 4650 00e0 E1E7 b .L304 + 4651 .LVL301: + 4652 .L321: +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4653 .loc 1 2261 9 is_stmt 1 view .LVU1636 +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4654 .loc 1 2261 13 is_stmt 0 view .LVU1637 + 4655 00e2 2268 ldr r2, [r4] +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4656 .loc 1 2261 23 view .LVU1638 + 4657 00e4 5368 ldr r3, [r2, #4] +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4658 .loc 1 2261 29 view .LVU1639 + 4659 00e6 23F40043 bic r3, r3, #32768 + 4660 00ea 5360 str r3, [r2, #4] +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4661 .loc 1 2264 9 is_stmt 1 view .LVU1640 +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4662 .loc 1 2264 9 view .LVU1641 + 4663 00ec 0023 movs r3, #0 + 4664 00ee 84F84030 strb r3, [r4, #64] +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4665 .loc 1 2264 9 view .LVU1642 +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4666 .loc 1 2270 9 view .LVU1643 + 4667 00f2 4FF40041 mov r1, #32768 + 4668 00f6 2046 mov r0, r4 + 4669 .LVL302: +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4670 .loc 1 2270 9 is_stmt 0 view .LVU1644 + 4671 00f8 FFF7FEFF bl I2C_Enable_IRQ + 4672 .LVL303: +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4673 .loc 1 2273 9 is_stmt 1 view .LVU1645 +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4674 .loc 1 2273 13 is_stmt 0 view .LVU1646 + 4675 00fc 2268 ldr r2, [r4] +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4676 .loc 1 2273 23 view .LVU1647 + 4677 00fe 1368 ldr r3, [r2] +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4678 .loc 1 2273 29 view .LVU1648 + 4679 0100 43F48043 orr r3, r3, #16384 + 4680 0104 1360 str r3, [r2] + 4681 0106 0CE0 b .L312 + 4682 .LVL304: + 4683 .L308: + ARM GAS /tmp/ccNVyn8W.s page 237 + + +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4684 .loc 1 2293 7 is_stmt 1 view .LVU1649 +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4685 .loc 1 2293 11 is_stmt 0 view .LVU1650 + 4686 0108 2268 ldr r2, [r4] +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4687 .loc 1 2293 21 view .LVU1651 + 4688 010a 5368 ldr r3, [r2, #4] +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4689 .loc 1 2293 27 view .LVU1652 + 4690 010c 23F40043 bic r3, r3, #32768 + 4691 0110 5360 str r3, [r2, #4] +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4692 .loc 1 2296 7 is_stmt 1 view .LVU1653 +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4693 .loc 1 2296 7 view .LVU1654 + 4694 0112 0023 movs r3, #0 + 4695 0114 84F84030 strb r3, [r4, #64] +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4696 .loc 1 2296 7 view .LVU1655 +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4697 .loc 1 2302 7 view .LVU1656 + 4698 0118 4FF40041 mov r1, #32768 + 4699 .LVL305: +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4700 .loc 1 2302 7 is_stmt 0 view .LVU1657 + 4701 011c 2046 mov r0, r4 + 4702 .LVL306: +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4703 .loc 1 2302 7 view .LVU1658 + 4704 011e FFF7FEFF bl I2C_Enable_IRQ + 4705 .LVL307: + 4706 .L312: +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4707 .loc 1 2305 5 is_stmt 1 view .LVU1659 +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4708 .loc 1 2305 12 is_stmt 0 view .LVU1660 + 4709 0122 0020 movs r0, #0 + 4710 0124 BFE7 b .L304 + 4711 .LVL308: + 4712 .L313: + 4713 .cfi_def_cfa_offset 0 + 4714 .cfi_restore 4 + 4715 .cfi_restore 14 +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4716 .loc 1 2309 12 view .LVU1661 + 4717 0126 0220 movs r0, #2 + 4718 .LVL309: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4719 .loc 1 2311 1 view .LVU1662 + 4720 0128 7047 bx lr + 4721 .LVL310: + 4722 .L314: + 4723 .cfi_def_cfa_offset 8 + 4724 .cfi_offset 4, -8 + 4725 .cfi_offset 14, -4 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 238 + + + 4726 .loc 1 2197 5 discriminator 1 view .LVU1663 + 4727 012a 0220 movs r0, #2 + 4728 .LVL311: +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4729 .loc 1 2197 5 discriminator 1 view .LVU1664 + 4730 012c BBE7 b .L304 + 4731 .L323: + 4732 012e 00BF .align 2 + 4733 .L322: + 4734 0130 0000FFFF .word -65536 + 4735 0134 00000000 .word I2C_Slave_ISR_DMA + 4736 0138 00000000 .word I2C_DMASlaveTransmitCplt + 4737 013c 00000000 .word I2C_DMAError + 4738 .cfi_endproc + 4739 .LFE144: + 4741 .section .text.HAL_I2C_Slave_Receive_DMA,"ax",%progbits + 4742 .align 1 + 4743 .global HAL_I2C_Slave_Receive_DMA + 4744 .syntax unified + 4745 .thumb + 4746 .thumb_func + 4748 HAL_I2C_Slave_Receive_DMA: + 4749 .LVL312: + 4750 .LFB145: +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4751 .loc 1 2322 1 is_stmt 1 view -0 + 4752 .cfi_startproc + 4753 @ args = 0, pretend = 0, frame = 0 + 4754 @ frame_needed = 0, uses_anonymous_args = 0 +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4755 .loc 1 2322 1 is_stmt 0 view .LVU1666 + 4756 0000 38B5 push {r3, r4, r5, lr} + 4757 .cfi_def_cfa_offset 16 + 4758 .cfi_offset 3, -16 + 4759 .cfi_offset 4, -12 + 4760 .cfi_offset 5, -8 + 4761 .cfi_offset 14, -4 +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4762 .loc 1 2323 3 is_stmt 1 view .LVU1667 +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4763 .loc 1 2325 3 view .LVU1668 +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4764 .loc 1 2325 11 is_stmt 0 view .LVU1669 + 4765 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 4766 0006 DBB2 uxtb r3, r3 +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4767 .loc 1 2325 6 view .LVU1670 + 4768 0008 202B cmp r3, #32 + 4769 000a 65D1 bne .L331 + 4770 000c 0446 mov r4, r0 +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4771 .loc 1 2327 5 is_stmt 1 view .LVU1671 +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4772 .loc 1 2327 8 is_stmt 0 view .LVU1672 + 4773 000e 0029 cmp r1, #0 + 4774 0010 3CD0 beq .L326 +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 239 + + + 4775 .loc 1 2327 25 discriminator 1 view .LVU1673 + 4776 0012 002A cmp r2, #0 + 4777 0014 3AD0 beq .L326 +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4778 .loc 1 2333 5 is_stmt 1 view .LVU1674 +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4779 .loc 1 2333 5 view .LVU1675 + 4780 0016 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 4781 001a 012B cmp r3, #1 + 4782 001c 5FD0 beq .L332 +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4783 .loc 1 2333 5 discriminator 2 view .LVU1676 + 4784 001e 0123 movs r3, #1 + 4785 0020 80F84030 strb r3, [r0, #64] +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4786 .loc 1 2333 5 discriminator 2 view .LVU1677 +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4787 .loc 1 2335 5 view .LVU1678 +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4788 .loc 1 2335 23 is_stmt 0 view .LVU1679 + 4789 0024 2223 movs r3, #34 + 4790 0026 80F84130 strb r3, [r0, #65] +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4791 .loc 1 2336 5 is_stmt 1 view .LVU1680 +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4792 .loc 1 2336 23 is_stmt 0 view .LVU1681 + 4793 002a 2023 movs r3, #32 + 4794 002c 80F84230 strb r3, [r0, #66] +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4795 .loc 1 2337 5 is_stmt 1 view .LVU1682 +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4796 .loc 1 2337 23 is_stmt 0 view .LVU1683 + 4797 0030 0023 movs r3, #0 + 4798 0032 4364 str r3, [r0, #68] +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4799 .loc 1 2340 5 is_stmt 1 view .LVU1684 +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4800 .loc 1 2340 23 is_stmt 0 view .LVU1685 + 4801 0034 4162 str r1, [r0, #36] +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4802 .loc 1 2341 5 is_stmt 1 view .LVU1686 +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4803 .loc 1 2341 23 is_stmt 0 view .LVU1687 + 4804 0036 4285 strh r2, [r0, #42] @ movhi +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4805 .loc 1 2342 5 is_stmt 1 view .LVU1688 +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4806 .loc 1 2342 29 is_stmt 0 view .LVU1689 + 4807 0038 438D ldrh r3, [r0, #42] +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4808 .loc 1 2342 23 view .LVU1690 + 4809 003a 0385 strh r3, [r0, #40] @ movhi +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4810 .loc 1 2343 5 is_stmt 1 view .LVU1691 +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4811 .loc 1 2343 23 is_stmt 0 view .LVU1692 + 4812 003c 294B ldr r3, .L336 + ARM GAS /tmp/ccNVyn8W.s page 240 + + + 4813 003e C362 str r3, [r0, #44] +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4814 .loc 1 2344 5 is_stmt 1 view .LVU1693 +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4815 .loc 1 2344 23 is_stmt 0 view .LVU1694 + 4816 0040 294B ldr r3, .L336+4 + 4817 0042 4363 str r3, [r0, #52] +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4818 .loc 1 2346 5 is_stmt 1 view .LVU1695 +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4819 .loc 1 2346 13 is_stmt 0 view .LVU1696 + 4820 0044 C36B ldr r3, [r0, #60] +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4821 .loc 1 2346 8 view .LVU1697 + 4822 0046 33B3 cbz r3, .L328 +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4823 .loc 1 2349 7 is_stmt 1 view .LVU1698 +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4824 .loc 1 2349 38 is_stmt 0 view .LVU1699 + 4825 0048 284A ldr r2, .L336+8 + 4826 .LVL313: +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4827 .loc 1 2349 38 view .LVU1700 + 4828 004a 9A62 str r2, [r3, #40] +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4829 .loc 1 2352 7 is_stmt 1 view .LVU1701 +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4830 .loc 1 2352 11 is_stmt 0 view .LVU1702 + 4831 004c C36B ldr r3, [r0, #60] +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4832 .loc 1 2352 39 view .LVU1703 + 4833 004e 284A ldr r2, .L336+12 + 4834 0050 1A63 str r2, [r3, #48] +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4835 .loc 1 2355 7 is_stmt 1 view .LVU1704 +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4836 .loc 1 2355 11 is_stmt 0 view .LVU1705 + 4837 0052 C26B ldr r2, [r0, #60] +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4838 .loc 1 2355 42 view .LVU1706 + 4839 0054 0023 movs r3, #0 + 4840 0056 D362 str r3, [r2, #44] +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4841 .loc 1 2356 7 is_stmt 1 view .LVU1707 +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4842 .loc 1 2356 11 is_stmt 0 view .LVU1708 + 4843 0058 C26B ldr r2, [r0, #60] +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4844 .loc 1 2356 39 view .LVU1709 + 4845 005a 5363 str r3, [r2, #52] +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4846 .loc 1 2359 7 is_stmt 1 view .LVU1710 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4847 .loc 1 2359 69 is_stmt 0 view .LVU1711 + 4848 005c 0068 ldr r0, [r0] + 4849 .LVL314: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + ARM GAS /tmp/ccNVyn8W.s page 241 + + + 4850 .loc 1 2359 23 view .LVU1712 + 4851 005e 238D ldrh r3, [r4, #40] + 4852 0060 0A46 mov r2, r1 + 4853 0062 00F12401 add r1, r0, #36 + 4854 .LVL315: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4855 .loc 1 2359 23 view .LVU1713 + 4856 0066 E06B ldr r0, [r4, #60] + 4857 0068 FFF7FEFF bl HAL_DMA_Start_IT + 4858 .LVL316: +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4859 .loc 1 2377 5 is_stmt 1 view .LVU1714 +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4860 .loc 1 2377 8 is_stmt 0 view .LVU1715 + 4861 006c 0546 mov r5, r0 + 4862 006e 00B3 cbz r0, .L335 +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4863 .loc 1 2397 7 is_stmt 1 view .LVU1716 +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4864 .loc 1 2397 23 is_stmt 0 view .LVU1717 + 4865 0070 2823 movs r3, #40 + 4866 0072 84F84130 strb r3, [r4, #65] +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4867 .loc 1 2398 7 is_stmt 1 view .LVU1718 +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4868 .loc 1 2398 23 is_stmt 0 view .LVU1719 + 4869 0076 0022 movs r2, #0 + 4870 0078 84F84220 strb r2, [r4, #66] +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4871 .loc 1 2401 7 is_stmt 1 view .LVU1720 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4872 .loc 1 2401 11 is_stmt 0 view .LVU1721 + 4873 007c 636C ldr r3, [r4, #68] +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4874 .loc 1 2401 23 view .LVU1722 + 4875 007e 43F01003 orr r3, r3, #16 + 4876 0082 6364 str r3, [r4, #68] +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4877 .loc 1 2404 7 is_stmt 1 view .LVU1723 +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4878 .loc 1 2404 7 view .LVU1724 + 4879 0084 84F84020 strb r2, [r4, #64] +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4880 .loc 1 2404 7 view .LVU1725 +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4881 .loc 1 2406 7 view .LVU1726 +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4882 .loc 1 2406 14 is_stmt 0 view .LVU1727 + 4883 0088 0125 movs r5, #1 + 4884 008a 26E0 b .L325 + 4885 .LVL317: + 4886 .L326: +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 4887 .loc 1 2329 7 is_stmt 1 view .LVU1728 +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 4888 .loc 1 2329 23 is_stmt 0 view .LVU1729 + 4889 008c 4FF40073 mov r3, #512 + ARM GAS /tmp/ccNVyn8W.s page 242 + + + 4890 0090 6364 str r3, [r4, #68] +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4891 .loc 1 2330 7 is_stmt 1 view .LVU1730 +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4892 .loc 1 2330 15 is_stmt 0 view .LVU1731 + 4893 0092 0125 movs r5, #1 + 4894 0094 21E0 b .L325 + 4895 .L328: +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4896 .loc 1 2365 7 is_stmt 1 view .LVU1732 +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4897 .loc 1 2365 23 is_stmt 0 view .LVU1733 + 4898 0096 2823 movs r3, #40 + 4899 0098 80F84130 strb r3, [r0, #65] +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4900 .loc 1 2366 7 is_stmt 1 view .LVU1734 +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4901 .loc 1 2366 23 is_stmt 0 view .LVU1735 + 4902 009c 0022 movs r2, #0 + 4903 .LVL318: +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4904 .loc 1 2366 23 view .LVU1736 + 4905 009e 80F84220 strb r2, [r0, #66] +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4906 .loc 1 2369 7 is_stmt 1 view .LVU1737 +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4907 .loc 1 2369 11 is_stmt 0 view .LVU1738 + 4908 00a2 436C ldr r3, [r0, #68] +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4909 .loc 1 2369 23 view .LVU1739 + 4910 00a4 43F08003 orr r3, r3, #128 + 4911 00a8 4364 str r3, [r0, #68] +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4912 .loc 1 2372 7 is_stmt 1 view .LVU1740 +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4913 .loc 1 2372 7 view .LVU1741 + 4914 00aa 80F84020 strb r2, [r0, #64] +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4915 .loc 1 2372 7 view .LVU1742 +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4916 .loc 1 2374 7 view .LVU1743 +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4917 .loc 1 2374 14 is_stmt 0 view .LVU1744 + 4918 00ae 0125 movs r5, #1 + 4919 00b0 13E0 b .L325 + 4920 .LVL319: + 4921 .L335: +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4922 .loc 1 2380 7 is_stmt 1 view .LVU1745 +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4923 .loc 1 2380 11 is_stmt 0 view .LVU1746 + 4924 00b2 2268 ldr r2, [r4] +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4925 .loc 1 2380 21 view .LVU1747 + 4926 00b4 5368 ldr r3, [r2, #4] +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4927 .loc 1 2380 27 view .LVU1748 + ARM GAS /tmp/ccNVyn8W.s page 243 + + + 4928 00b6 23F40043 bic r3, r3, #32768 + 4929 00ba 5360 str r3, [r2, #4] +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4930 .loc 1 2383 7 is_stmt 1 view .LVU1749 +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4931 .loc 1 2383 7 view .LVU1750 + 4932 00bc 0023 movs r3, #0 + 4933 00be 84F84030 strb r3, [r4, #64] +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4934 .loc 1 2383 7 view .LVU1751 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4935 .loc 1 2389 7 view .LVU1752 + 4936 00c2 4FF40041 mov r1, #32768 + 4937 00c6 2046 mov r0, r4 + 4938 .LVL320: +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4939 .loc 1 2389 7 is_stmt 0 view .LVU1753 + 4940 00c8 FFF7FEFF bl I2C_Enable_IRQ + 4941 .LVL321: +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4942 .loc 1 2392 7 is_stmt 1 view .LVU1754 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4943 .loc 1 2392 11 is_stmt 0 view .LVU1755 + 4944 00cc 2268 ldr r2, [r4] +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4945 .loc 1 2392 21 view .LVU1756 + 4946 00ce 1368 ldr r3, [r2] +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4947 .loc 1 2392 27 view .LVU1757 + 4948 00d0 43F40043 orr r3, r3, #32768 + 4949 00d4 1360 str r3, [r2] +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4950 .loc 1 2409 5 is_stmt 1 view .LVU1758 +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4951 .loc 1 2409 12 is_stmt 0 view .LVU1759 + 4952 00d6 00E0 b .L325 + 4953 .LVL322: + 4954 .L331: +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4955 .loc 1 2413 12 view .LVU1760 + 4956 00d8 0225 movs r5, #2 + 4957 .LVL323: + 4958 .L325: +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4959 .loc 1 2415 1 view .LVU1761 + 4960 00da 2846 mov r0, r5 + 4961 00dc 38BD pop {r3, r4, r5, pc} + 4962 .LVL324: + 4963 .L332: +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4964 .loc 1 2333 5 discriminator 1 view .LVU1762 + 4965 00de 0225 movs r5, #2 + 4966 00e0 FBE7 b .L325 + 4967 .L337: + 4968 00e2 00BF .align 2 + 4969 .L336: + 4970 00e4 0000FFFF .word -65536 + ARM GAS /tmp/ccNVyn8W.s page 244 + + + 4971 00e8 00000000 .word I2C_Slave_ISR_DMA + 4972 00ec 00000000 .word I2C_DMASlaveReceiveCplt + 4973 00f0 00000000 .word I2C_DMAError + 4974 .cfi_endproc + 4975 .LFE145: + 4977 .section .text.HAL_I2C_Mem_Write,"ax",%progbits + 4978 .align 1 + 4979 .global HAL_I2C_Mem_Write + 4980 .syntax unified + 4981 .thumb + 4982 .thumb_func + 4984 HAL_I2C_Mem_Write: + 4985 .LVL325: + 4986 .LFB146: +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 4987 .loc 1 2432 1 is_stmt 1 view -0 + 4988 .cfi_startproc + 4989 @ args = 12, pretend = 0, frame = 0 + 4990 @ frame_needed = 0, uses_anonymous_args = 0 +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 4991 .loc 1 2432 1 is_stmt 0 view .LVU1764 + 4992 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4993 .cfi_def_cfa_offset 36 + 4994 .cfi_offset 4, -36 + 4995 .cfi_offset 5, -32 + 4996 .cfi_offset 6, -28 + 4997 .cfi_offset 7, -24 + 4998 .cfi_offset 8, -20 + 4999 .cfi_offset 9, -16 + 5000 .cfi_offset 10, -12 + 5001 .cfi_offset 11, -8 + 5002 .cfi_offset 14, -4 + 5003 0004 83B0 sub sp, sp, #12 + 5004 .cfi_def_cfa_offset 48 + 5005 0006 0E46 mov r6, r1 + 5006 0008 BDF834A0 ldrh r10, [sp, #52] + 5007 000c 0E9D ldr r5, [sp, #56] +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5008 .loc 1 2433 3 is_stmt 1 view .LVU1765 +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5009 .loc 1 2436 3 view .LVU1766 +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5010 .loc 1 2438 3 view .LVU1767 +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5011 .loc 1 2438 11 is_stmt 0 view .LVU1768 + 5012 000e 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 5013 .LVL326: +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5014 .loc 1 2438 11 view .LVU1769 + 5015 0012 C9B2 uxtb r1, r1 +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5016 .loc 1 2438 6 view .LVU1770 + 5017 0014 2029 cmp r1, #32 + 5018 0016 40F0BB80 bne .L348 + 5019 001a 0446 mov r4, r0 + 5020 001c 9046 mov r8, r2 + 5021 001e 9946 mov r9, r3 + ARM GAS /tmp/ccNVyn8W.s page 245 + + +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5022 .loc 1 2440 5 is_stmt 1 view .LVU1771 +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5023 .loc 1 2440 8 is_stmt 0 view .LVU1772 + 5024 0020 0C9B ldr r3, [sp, #48] + 5025 .LVL327: +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5026 .loc 1 2440 8 view .LVU1773 + 5027 0022 CBB1 cbz r3, .L340 +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5028 .loc 1 2440 25 discriminator 1 view .LVU1774 + 5029 0024 BAF1000F cmp r10, #0 + 5030 0028 16D0 beq .L340 +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5031 .loc 1 2447 5 is_stmt 1 view .LVU1775 +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5032 .loc 1 2447 5 view .LVU1776 + 5033 002a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 5034 002e 012B cmp r3, #1 + 5035 0030 00F0B280 beq .L349 +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5036 .loc 1 2447 5 discriminator 2 view .LVU1777 + 5037 0034 4FF0010B mov fp, #1 + 5038 0038 80F840B0 strb fp, [r0, #64] +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5039 .loc 1 2447 5 discriminator 2 view .LVU1778 +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5040 .loc 1 2450 5 view .LVU1779 +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5041 .loc 1 2450 17 is_stmt 0 view .LVU1780 + 5042 003c FFF7FEFF bl HAL_GetTick + 5043 .LVL328: +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5044 .loc 1 2450 17 view .LVU1781 + 5045 0040 0746 mov r7, r0 + 5046 .LVL329: +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5047 .loc 1 2452 5 is_stmt 1 view .LVU1782 +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5048 .loc 1 2452 9 is_stmt 0 view .LVU1783 + 5049 0042 0090 str r0, [sp] + 5050 0044 1923 movs r3, #25 + 5051 0046 5A46 mov r2, fp + 5052 0048 4FF40041 mov r1, #32768 + 5053 004c 2046 mov r0, r4 + 5054 .LVL330: +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5055 .loc 1 2452 9 view .LVU1784 + 5056 004e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5057 .LVL331: +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5058 .loc 1 2452 8 discriminator 1 view .LVU1785 + 5059 0052 30B1 cbz r0, .L355 +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5060 .loc 1 2454 14 view .LVU1786 + 5061 0054 0120 movs r0, #1 + 5062 0056 9CE0 b .L339 + ARM GAS /tmp/ccNVyn8W.s page 246 + + + 5063 .LVL332: + 5064 .L340: +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5065 .loc 1 2442 7 is_stmt 1 view .LVU1787 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5066 .loc 1 2442 23 is_stmt 0 view .LVU1788 + 5067 0058 4FF40073 mov r3, #512 + 5068 005c 6364 str r3, [r4, #68] +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5069 .loc 1 2443 7 is_stmt 1 view .LVU1789 +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5070 .loc 1 2443 15 is_stmt 0 view .LVU1790 + 5071 005e 0120 movs r0, #1 + 5072 .LVL333: +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5073 .loc 1 2443 15 view .LVU1791 + 5074 0060 97E0 b .L339 + 5075 .LVL334: + 5076 .L355: +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5077 .loc 1 2457 5 is_stmt 1 view .LVU1792 +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5078 .loc 1 2457 21 is_stmt 0 view .LVU1793 + 5079 0062 2123 movs r3, #33 + 5080 0064 84F84130 strb r3, [r4, #65] +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5081 .loc 1 2458 5 is_stmt 1 view .LVU1794 +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5082 .loc 1 2458 21 is_stmt 0 view .LVU1795 + 5083 0068 4023 movs r3, #64 + 5084 006a 84F84230 strb r3, [r4, #66] +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5085 .loc 1 2459 5 is_stmt 1 view .LVU1796 +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5086 .loc 1 2459 21 is_stmt 0 view .LVU1797 + 5087 006e 0023 movs r3, #0 + 5088 0070 6364 str r3, [r4, #68] +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5089 .loc 1 2462 5 is_stmt 1 view .LVU1798 +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5090 .loc 1 2462 21 is_stmt 0 view .LVU1799 + 5091 0072 0C9A ldr r2, [sp, #48] + 5092 0074 6262 str r2, [r4, #36] +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5093 .loc 1 2463 5 is_stmt 1 view .LVU1800 +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5094 .loc 1 2463 21 is_stmt 0 view .LVU1801 + 5095 0076 A4F82AA0 strh r10, [r4, #42] @ movhi +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5096 .loc 1 2464 5 is_stmt 1 view .LVU1802 +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5097 .loc 1 2464 21 is_stmt 0 view .LVU1803 + 5098 007a 6363 str r3, [r4, #52] +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5099 .loc 1 2467 5 is_stmt 1 view .LVU1804 +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5100 .loc 1 2467 9 is_stmt 0 view .LVU1805 + ARM GAS /tmp/ccNVyn8W.s page 247 + + + 5101 007c 0197 str r7, [sp, #4] + 5102 007e 0095 str r5, [sp] + 5103 0080 4B46 mov r3, r9 + 5104 0082 4246 mov r2, r8 + 5105 0084 3146 mov r1, r6 + 5106 0086 2046 mov r0, r4 + 5107 0088 FFF7FEFF bl I2C_RequestMemoryWrite + 5108 .LVL335: +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5109 .loc 1 2467 8 discriminator 1 view .LVU1806 + 5110 008c 70B9 cbnz r0, .L356 +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5111 .loc 1 2475 5 is_stmt 1 view .LVU1807 +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5112 .loc 1 2475 13 is_stmt 0 view .LVU1808 + 5113 008e 638D ldrh r3, [r4, #42] + 5114 0090 9BB2 uxth r3, r3 +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5115 .loc 1 2475 8 view .LVU1809 + 5116 0092 FF2B cmp r3, #255 + 5117 0094 0FD9 bls .L343 +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5118 .loc 1 2477 7 is_stmt 1 view .LVU1810 +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5119 .loc 1 2477 22 is_stmt 0 view .LVU1811 + 5120 0096 FF22 movs r2, #255 + 5121 0098 2285 strh r2, [r4, #40] @ movhi +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5122 .loc 1 2478 7 is_stmt 1 view .LVU1812 + 5123 009a 0023 movs r3, #0 + 5124 009c 0093 str r3, [sp] + 5125 009e 4FF08073 mov r3, #16777216 + 5126 00a2 3146 mov r1, r6 + 5127 00a4 2046 mov r0, r4 + 5128 00a6 FFF7FEFF bl I2C_TransferConfig + 5129 .LVL336: + 5130 00aa 21E0 b .L347 + 5131 .L356: +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5132 .loc 1 2470 7 view .LVU1813 +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5133 .loc 1 2470 7 view .LVU1814 + 5134 00ac 0023 movs r3, #0 + 5135 00ae 84F84030 strb r3, [r4, #64] +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5136 .loc 1 2470 7 view .LVU1815 +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5137 .loc 1 2471 7 view .LVU1816 +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5138 .loc 1 2471 14 is_stmt 0 view .LVU1817 + 5139 00b2 5846 mov r0, fp + 5140 00b4 6DE0 b .L339 + 5141 .L343: +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5142 .loc 1 2482 7 is_stmt 1 view .LVU1818 +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5143 .loc 1 2482 28 is_stmt 0 view .LVU1819 + ARM GAS /tmp/ccNVyn8W.s page 248 + + + 5144 00b6 628D ldrh r2, [r4, #42] + 5145 00b8 92B2 uxth r2, r2 +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5146 .loc 1 2482 22 view .LVU1820 + 5147 00ba 2285 strh r2, [r4, #40] @ movhi +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5148 .loc 1 2483 7 is_stmt 1 view .LVU1821 + 5149 00bc 0023 movs r3, #0 + 5150 00be 0093 str r3, [sp] + 5151 00c0 4FF00073 mov r3, #33554432 + 5152 00c4 D2B2 uxtb r2, r2 + 5153 00c6 3146 mov r1, r6 + 5154 00c8 2046 mov r0, r4 + 5155 00ca FFF7FEFF bl I2C_TransferConfig + 5156 .LVL337: + 5157 00ce 0FE0 b .L347 + 5158 .L346: +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5159 .loc 1 2519 11 view .LVU1822 +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5160 .loc 1 2519 32 is_stmt 0 view .LVU1823 + 5161 00d0 628D ldrh r2, [r4, #42] + 5162 00d2 92B2 uxth r2, r2 +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5163 .loc 1 2519 26 view .LVU1824 + 5164 00d4 2285 strh r2, [r4, #40] @ movhi +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5165 .loc 1 2520 11 is_stmt 1 view .LVU1825 + 5166 00d6 0023 movs r3, #0 + 5167 00d8 0093 str r3, [sp] + 5168 00da 4FF00073 mov r3, #33554432 + 5169 00de D2B2 uxtb r2, r2 + 5170 00e0 3146 mov r1, r6 + 5171 00e2 2046 mov r0, r4 + 5172 00e4 FFF7FEFF bl I2C_TransferConfig + 5173 .LVL338: + 5174 .L345: +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5175 .loc 1 2525 30 view .LVU1826 +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5176 .loc 1 2525 18 is_stmt 0 view .LVU1827 + 5177 00e8 638D ldrh r3, [r4, #42] + 5178 00ea 9BB2 uxth r3, r3 +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5179 .loc 1 2525 30 view .LVU1828 + 5180 00ec 002B cmp r3, #0 + 5181 00ee 33D0 beq .L357 + 5182 .L347: +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5183 .loc 1 2486 5 is_stmt 1 view .LVU1829 +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5184 .loc 1 2489 7 view .LVU1830 +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5185 .loc 1 2489 11 is_stmt 0 view .LVU1831 + 5186 00f0 3A46 mov r2, r7 + 5187 00f2 2946 mov r1, r5 + 5188 00f4 2046 mov r0, r4 + ARM GAS /tmp/ccNVyn8W.s page 249 + + + 5189 00f6 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 5190 .LVL339: +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5191 .loc 1 2489 10 discriminator 1 view .LVU1832 + 5192 00fa 0028 cmp r0, #0 + 5193 00fc 4ED1 bne .L351 +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5194 .loc 1 2495 7 is_stmt 1 view .LVU1833 +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5195 .loc 1 2495 35 is_stmt 0 view .LVU1834 + 5196 00fe 626A ldr r2, [r4, #36] +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5197 .loc 1 2495 11 view .LVU1835 + 5198 0100 2368 ldr r3, [r4] +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5199 .loc 1 2495 30 view .LVU1836 + 5200 0102 1278 ldrb r2, [r2] @ zero_extendqisi2 +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5201 .loc 1 2495 28 view .LVU1837 + 5202 0104 9A62 str r2, [r3, #40] +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5203 .loc 1 2498 7 is_stmt 1 view .LVU1838 +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5204 .loc 1 2498 11 is_stmt 0 view .LVU1839 + 5205 0106 636A ldr r3, [r4, #36] +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5206 .loc 1 2498 21 view .LVU1840 + 5207 0108 0133 adds r3, r3, #1 + 5208 010a 6362 str r3, [r4, #36] +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 5209 .loc 1 2500 7 is_stmt 1 view .LVU1841 +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 5210 .loc 1 2500 11 is_stmt 0 view .LVU1842 + 5211 010c 638D ldrh r3, [r4, #42] + 5212 010e 9BB2 uxth r3, r3 +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 5213 .loc 1 2500 22 view .LVU1843 + 5214 0110 013B subs r3, r3, #1 + 5215 0112 9BB2 uxth r3, r3 + 5216 0114 6385 strh r3, [r4, #42] @ movhi +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5217 .loc 1 2501 7 is_stmt 1 view .LVU1844 +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5218 .loc 1 2501 11 is_stmt 0 view .LVU1845 + 5219 0116 238D ldrh r3, [r4, #40] +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5220 .loc 1 2501 21 view .LVU1846 + 5221 0118 013B subs r3, r3, #1 + 5222 011a 9BB2 uxth r3, r3 + 5223 011c 2385 strh r3, [r4, #40] @ movhi +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5224 .loc 1 2503 7 is_stmt 1 view .LVU1847 +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5225 .loc 1 2503 16 is_stmt 0 view .LVU1848 + 5226 011e 628D ldrh r2, [r4, #42] + 5227 0120 92B2 uxth r2, r2 +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 250 + + + 5228 .loc 1 2503 10 view .LVU1849 + 5229 0122 002A cmp r2, #0 + 5230 0124 E0D0 beq .L345 +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5231 .loc 1 2503 35 discriminator 1 view .LVU1850 + 5232 0126 002B cmp r3, #0 + 5233 0128 DED1 bne .L345 +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5234 .loc 1 2506 9 is_stmt 1 view .LVU1851 +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5235 .loc 1 2506 13 is_stmt 0 view .LVU1852 + 5236 012a 0097 str r7, [sp] + 5237 012c 2B46 mov r3, r5 + 5238 012e 0022 movs r2, #0 + 5239 0130 8021 movs r1, #128 + 5240 0132 2046 mov r0, r4 + 5241 0134 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5242 .LVL340: +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5243 .loc 1 2506 12 discriminator 1 view .LVU1853 + 5244 0138 90BB cbnz r0, .L352 +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5245 .loc 1 2511 9 is_stmt 1 view .LVU1854 +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5246 .loc 1 2511 17 is_stmt 0 view .LVU1855 + 5247 013a 638D ldrh r3, [r4, #42] + 5248 013c 9BB2 uxth r3, r3 +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5249 .loc 1 2511 12 view .LVU1856 + 5250 013e FF2B cmp r3, #255 + 5251 0140 C6D9 bls .L346 +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5252 .loc 1 2513 11 is_stmt 1 view .LVU1857 +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5253 .loc 1 2513 26 is_stmt 0 view .LVU1858 + 5254 0142 FF22 movs r2, #255 + 5255 0144 2285 strh r2, [r4, #40] @ movhi +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5256 .loc 1 2514 11 is_stmt 1 view .LVU1859 + 5257 0146 0023 movs r3, #0 + 5258 0148 0093 str r3, [sp] + 5259 014a 4FF08073 mov r3, #16777216 + 5260 014e 3146 mov r1, r6 + 5261 0150 2046 mov r0, r4 + 5262 0152 FFF7FEFF bl I2C_TransferConfig + 5263 .LVL341: + 5264 0156 C7E7 b .L345 + 5265 .L357: +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5266 .loc 1 2529 5 view .LVU1860 +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5267 .loc 1 2529 9 is_stmt 0 view .LVU1861 + 5268 0158 3A46 mov r2, r7 + 5269 015a 2946 mov r1, r5 + 5270 015c 2046 mov r0, r4 + 5271 015e FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 5272 .LVL342: + ARM GAS /tmp/ccNVyn8W.s page 251 + + +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5273 .loc 1 2529 8 discriminator 1 view .LVU1862 + 5274 0162 F8B9 cbnz r0, .L353 +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5275 .loc 1 2535 5 is_stmt 1 view .LVU1863 + 5276 0164 2368 ldr r3, [r4] + 5277 0166 2022 movs r2, #32 + 5278 0168 DA61 str r2, [r3, #28] +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5279 .loc 1 2538 5 view .LVU1864 + 5280 016a 2168 ldr r1, [r4] + 5281 016c 4B68 ldr r3, [r1, #4] + 5282 016e 23F0FF73 bic r3, r3, #33423360 + 5283 0172 23F48B33 bic r3, r3, #71168 + 5284 0176 23F4FF73 bic r3, r3, #510 + 5285 017a 23F00103 bic r3, r3, #1 + 5286 017e 4B60 str r3, [r1, #4] +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5287 .loc 1 2540 5 view .LVU1865 +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5288 .loc 1 2540 17 is_stmt 0 view .LVU1866 + 5289 0180 84F84120 strb r2, [r4, #65] +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5290 .loc 1 2541 5 is_stmt 1 view .LVU1867 +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5291 .loc 1 2541 17 is_stmt 0 view .LVU1868 + 5292 0184 0023 movs r3, #0 + 5293 0186 84F84230 strb r3, [r4, #66] +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5294 .loc 1 2544 5 is_stmt 1 view .LVU1869 +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5295 .loc 1 2544 5 view .LVU1870 + 5296 018a 84F84030 strb r3, [r4, #64] +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5297 .loc 1 2544 5 view .LVU1871 +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5298 .loc 1 2546 5 view .LVU1872 +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5299 .loc 1 2546 12 is_stmt 0 view .LVU1873 + 5300 018e 00E0 b .L339 + 5301 .LVL343: + 5302 .L348: +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5303 .loc 1 2550 12 view .LVU1874 + 5304 0190 0220 movs r0, #2 + 5305 .LVL344: + 5306 .L339: +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5307 .loc 1 2552 1 view .LVU1875 + 5308 0192 03B0 add sp, sp, #12 + 5309 .cfi_remember_state + 5310 .cfi_def_cfa_offset 36 + 5311 @ sp needed + 5312 0194 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5313 .LVL345: + 5314 .L349: + 5315 .cfi_restore_state + ARM GAS /tmp/ccNVyn8W.s page 252 + + +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5316 .loc 1 2447 5 discriminator 1 view .LVU1876 + 5317 0198 0220 movs r0, #2 + 5318 .LVL346: +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5319 .loc 1 2447 5 discriminator 1 view .LVU1877 + 5320 019a FAE7 b .L339 + 5321 .LVL347: + 5322 .L351: +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5323 .loc 1 2491 16 view .LVU1878 + 5324 019c 0120 movs r0, #1 + 5325 019e F8E7 b .L339 + 5326 .L352: +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5327 .loc 1 2508 18 view .LVU1879 + 5328 01a0 0120 movs r0, #1 + 5329 01a2 F6E7 b .L339 + 5330 .L353: +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5331 .loc 1 2531 14 view .LVU1880 + 5332 01a4 0120 movs r0, #1 + 5333 01a6 F4E7 b .L339 + 5334 .cfi_endproc + 5335 .LFE146: + 5337 .section .text.HAL_I2C_Mem_Read,"ax",%progbits + 5338 .align 1 + 5339 .global HAL_I2C_Mem_Read + 5340 .syntax unified + 5341 .thumb + 5342 .thumb_func + 5344 HAL_I2C_Mem_Read: + 5345 .LVL348: + 5346 .LFB147: +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 5347 .loc 1 2569 1 is_stmt 1 view -0 + 5348 .cfi_startproc + 5349 @ args = 12, pretend = 0, frame = 0 + 5350 @ frame_needed = 0, uses_anonymous_args = 0 +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 5351 .loc 1 2569 1 is_stmt 0 view .LVU1882 + 5352 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5353 .cfi_def_cfa_offset 36 + 5354 .cfi_offset 4, -36 + 5355 .cfi_offset 5, -32 + 5356 .cfi_offset 6, -28 + 5357 .cfi_offset 7, -24 + 5358 .cfi_offset 8, -20 + 5359 .cfi_offset 9, -16 + 5360 .cfi_offset 10, -12 + 5361 .cfi_offset 11, -8 + 5362 .cfi_offset 14, -4 + 5363 0004 83B0 sub sp, sp, #12 + 5364 .cfi_def_cfa_offset 48 + 5365 0006 0E46 mov r6, r1 + 5366 0008 BDF834A0 ldrh r10, [sp, #52] + 5367 000c 0E9D ldr r5, [sp, #56] + ARM GAS /tmp/ccNVyn8W.s page 253 + + +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5368 .loc 1 2570 3 is_stmt 1 view .LVU1883 +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5369 .loc 1 2573 3 view .LVU1884 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5370 .loc 1 2575 3 view .LVU1885 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5371 .loc 1 2575 11 is_stmt 0 view .LVU1886 + 5372 000e 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 5373 .LVL349: +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5374 .loc 1 2575 11 view .LVU1887 + 5375 0012 C9B2 uxtb r1, r1 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5376 .loc 1 2575 6 view .LVU1888 + 5377 0014 2029 cmp r1, #32 + 5378 0016 40F0BC80 bne .L368 + 5379 001a 0446 mov r4, r0 + 5380 001c 9046 mov r8, r2 + 5381 001e 9946 mov r9, r3 +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5382 .loc 1 2577 5 is_stmt 1 view .LVU1889 +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5383 .loc 1 2577 8 is_stmt 0 view .LVU1890 + 5384 0020 0C9B ldr r3, [sp, #48] + 5385 .LVL350: +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5386 .loc 1 2577 8 view .LVU1891 + 5387 0022 CBB1 cbz r3, .L360 +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5388 .loc 1 2577 25 discriminator 1 view .LVU1892 + 5389 0024 BAF1000F cmp r10, #0 + 5390 0028 16D0 beq .L360 +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5391 .loc 1 2584 5 is_stmt 1 view .LVU1893 +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5392 .loc 1 2584 5 view .LVU1894 + 5393 002a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 5394 002e 012B cmp r3, #1 + 5395 0030 00F0B380 beq .L369 +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5396 .loc 1 2584 5 discriminator 2 view .LVU1895 + 5397 0034 4FF0010B mov fp, #1 + 5398 0038 80F840B0 strb fp, [r0, #64] +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5399 .loc 1 2584 5 discriminator 2 view .LVU1896 +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5400 .loc 1 2587 5 view .LVU1897 +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5401 .loc 1 2587 17 is_stmt 0 view .LVU1898 + 5402 003c FFF7FEFF bl HAL_GetTick + 5403 .LVL351: +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5404 .loc 1 2587 17 view .LVU1899 + 5405 0040 0746 mov r7, r0 + 5406 .LVL352: +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 254 + + + 5407 .loc 1 2589 5 is_stmt 1 view .LVU1900 +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5408 .loc 1 2589 9 is_stmt 0 view .LVU1901 + 5409 0042 0090 str r0, [sp] + 5410 0044 1923 movs r3, #25 + 5411 0046 5A46 mov r2, fp + 5412 0048 4FF40041 mov r1, #32768 + 5413 004c 2046 mov r0, r4 + 5414 .LVL353: +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5415 .loc 1 2589 9 view .LVU1902 + 5416 004e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5417 .LVL354: +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5418 .loc 1 2589 8 discriminator 1 view .LVU1903 + 5419 0052 30B1 cbz r0, .L375 +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5420 .loc 1 2591 14 view .LVU1904 + 5421 0054 0120 movs r0, #1 + 5422 0056 9DE0 b .L359 + 5423 .LVL355: + 5424 .L360: +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5425 .loc 1 2579 7 is_stmt 1 view .LVU1905 +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5426 .loc 1 2579 23 is_stmt 0 view .LVU1906 + 5427 0058 4FF40073 mov r3, #512 + 5428 005c 6364 str r3, [r4, #68] +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5429 .loc 1 2580 7 is_stmt 1 view .LVU1907 +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5430 .loc 1 2580 15 is_stmt 0 view .LVU1908 + 5431 005e 0120 movs r0, #1 + 5432 .LVL356: +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5433 .loc 1 2580 15 view .LVU1909 + 5434 0060 98E0 b .L359 + 5435 .LVL357: + 5436 .L375: +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5437 .loc 1 2594 5 is_stmt 1 view .LVU1910 +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5438 .loc 1 2594 21 is_stmt 0 view .LVU1911 + 5439 0062 2223 movs r3, #34 + 5440 0064 84F84130 strb r3, [r4, #65] +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5441 .loc 1 2595 5 is_stmt 1 view .LVU1912 +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5442 .loc 1 2595 21 is_stmt 0 view .LVU1913 + 5443 0068 4023 movs r3, #64 + 5444 006a 84F84230 strb r3, [r4, #66] +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5445 .loc 1 2596 5 is_stmt 1 view .LVU1914 +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5446 .loc 1 2596 21 is_stmt 0 view .LVU1915 + 5447 006e 0023 movs r3, #0 + 5448 0070 6364 str r3, [r4, #68] + ARM GAS /tmp/ccNVyn8W.s page 255 + + +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5449 .loc 1 2599 5 is_stmt 1 view .LVU1916 +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5450 .loc 1 2599 21 is_stmt 0 view .LVU1917 + 5451 0072 0C9A ldr r2, [sp, #48] + 5452 0074 6262 str r2, [r4, #36] +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5453 .loc 1 2600 5 is_stmt 1 view .LVU1918 +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5454 .loc 1 2600 21 is_stmt 0 view .LVU1919 + 5455 0076 A4F82AA0 strh r10, [r4, #42] @ movhi +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5456 .loc 1 2601 5 is_stmt 1 view .LVU1920 +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5457 .loc 1 2601 21 is_stmt 0 view .LVU1921 + 5458 007a 6363 str r3, [r4, #52] +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5459 .loc 1 2604 5 is_stmt 1 view .LVU1922 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5460 .loc 1 2604 9 is_stmt 0 view .LVU1923 + 5461 007c 0197 str r7, [sp, #4] + 5462 007e 0095 str r5, [sp] + 5463 0080 4B46 mov r3, r9 + 5464 0082 4246 mov r2, r8 + 5465 0084 3146 mov r1, r6 + 5466 0086 2046 mov r0, r4 + 5467 0088 FFF7FEFF bl I2C_RequestMemoryRead + 5468 .LVL358: +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5469 .loc 1 2604 8 discriminator 1 view .LVU1924 + 5470 008c 70B9 cbnz r0, .L376 +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5471 .loc 1 2613 5 is_stmt 1 view .LVU1925 +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5472 .loc 1 2613 13 is_stmt 0 view .LVU1926 + 5473 008e 638D ldrh r3, [r4, #42] + 5474 0090 9BB2 uxth r3, r3 +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5475 .loc 1 2613 8 view .LVU1927 + 5476 0092 FF2B cmp r3, #255 + 5477 0094 0FD9 bls .L363 +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5478 .loc 1 2615 7 is_stmt 1 view .LVU1928 +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5479 .loc 1 2615 22 is_stmt 0 view .LVU1929 + 5480 0096 FF22 movs r2, #255 + 5481 0098 2285 strh r2, [r4, #40] @ movhi +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 5482 .loc 1 2616 7 is_stmt 1 view .LVU1930 + 5483 009a 444B ldr r3, .L378 + 5484 009c 0093 str r3, [sp] + 5485 009e 4FF08073 mov r3, #16777216 + 5486 00a2 3146 mov r1, r6 + 5487 00a4 2046 mov r0, r4 + 5488 00a6 FFF7FEFF bl I2C_TransferConfig + 5489 .LVL359: + 5490 00aa 21E0 b .L367 + ARM GAS /tmp/ccNVyn8W.s page 256 + + + 5491 .L376: +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5492 .loc 1 2607 7 view .LVU1931 +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5493 .loc 1 2607 7 view .LVU1932 + 5494 00ac 0023 movs r3, #0 + 5495 00ae 84F84030 strb r3, [r4, #64] +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5496 .loc 1 2607 7 view .LVU1933 +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5497 .loc 1 2608 7 view .LVU1934 +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5498 .loc 1 2608 14 is_stmt 0 view .LVU1935 + 5499 00b2 5846 mov r0, fp + 5500 00b4 6EE0 b .L359 + 5501 .L363: +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5502 .loc 1 2621 7 is_stmt 1 view .LVU1936 +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5503 .loc 1 2621 28 is_stmt 0 view .LVU1937 + 5504 00b6 628D ldrh r2, [r4, #42] + 5505 00b8 92B2 uxth r2, r2 +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5506 .loc 1 2621 22 view .LVU1938 + 5507 00ba 2285 strh r2, [r4, #40] @ movhi +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 5508 .loc 1 2622 7 is_stmt 1 view .LVU1939 + 5509 00bc 3B4B ldr r3, .L378 + 5510 00be 0093 str r3, [sp] + 5511 00c0 4FF00073 mov r3, #33554432 + 5512 00c4 D2B2 uxtb r2, r2 + 5513 00c6 3146 mov r1, r6 + 5514 00c8 2046 mov r0, r4 + 5515 00ca FFF7FEFF bl I2C_TransferConfig + 5516 .LVL360: + 5517 00ce 0FE0 b .L367 + 5518 .L366: +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5519 .loc 1 2659 11 view .LVU1940 +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5520 .loc 1 2659 32 is_stmt 0 view .LVU1941 + 5521 00d0 628D ldrh r2, [r4, #42] + 5522 00d2 92B2 uxth r2, r2 +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5523 .loc 1 2659 26 view .LVU1942 + 5524 00d4 2285 strh r2, [r4, #40] @ movhi +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5525 .loc 1 2660 11 is_stmt 1 view .LVU1943 + 5526 00d6 0023 movs r3, #0 + 5527 00d8 0093 str r3, [sp] + 5528 00da 4FF00073 mov r3, #33554432 + 5529 00de D2B2 uxtb r2, r2 + 5530 00e0 3146 mov r1, r6 + 5531 00e2 2046 mov r0, r4 + 5532 00e4 FFF7FEFF bl I2C_TransferConfig + 5533 .LVL361: + 5534 .L365: + ARM GAS /tmp/ccNVyn8W.s page 257 + + +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5535 .loc 1 2664 30 view .LVU1944 +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5536 .loc 1 2664 18 is_stmt 0 view .LVU1945 + 5537 00e8 638D ldrh r3, [r4, #42] + 5538 00ea 9BB2 uxth r3, r3 +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5539 .loc 1 2664 30 view .LVU1946 + 5540 00ec 002B cmp r3, #0 + 5541 00ee 34D0 beq .L377 + 5542 .L367: +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5543 .loc 1 2626 5 is_stmt 1 view .LVU1947 +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5544 .loc 1 2629 7 view .LVU1948 +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5545 .loc 1 2629 11 is_stmt 0 view .LVU1949 + 5546 00f0 0097 str r7, [sp] + 5547 00f2 2B46 mov r3, r5 + 5548 00f4 0022 movs r2, #0 + 5549 00f6 0421 movs r1, #4 + 5550 00f8 2046 mov r0, r4 + 5551 00fa FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5552 .LVL362: +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5553 .loc 1 2629 10 discriminator 1 view .LVU1950 + 5554 00fe 0028 cmp r0, #0 + 5555 0100 4DD1 bne .L371 +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5556 .loc 1 2635 7 is_stmt 1 view .LVU1951 +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5557 .loc 1 2635 38 is_stmt 0 view .LVU1952 + 5558 0102 2368 ldr r3, [r4] +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5559 .loc 1 2635 48 view .LVU1953 + 5560 0104 5A6A ldr r2, [r3, #36] +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5561 .loc 1 2635 12 view .LVU1954 + 5562 0106 636A ldr r3, [r4, #36] +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5563 .loc 1 2635 23 view .LVU1955 + 5564 0108 1A70 strb r2, [r3] +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5565 .loc 1 2638 7 is_stmt 1 view .LVU1956 +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5566 .loc 1 2638 11 is_stmt 0 view .LVU1957 + 5567 010a 636A ldr r3, [r4, #36] +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5568 .loc 1 2638 21 view .LVU1958 + 5569 010c 0133 adds r3, r3, #1 + 5570 010e 6362 str r3, [r4, #36] +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 5571 .loc 1 2640 7 is_stmt 1 view .LVU1959 +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 5572 .loc 1 2640 11 is_stmt 0 view .LVU1960 + 5573 0110 228D ldrh r2, [r4, #40] +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/ccNVyn8W.s page 258 + + + 5574 .loc 1 2640 21 view .LVU1961 + 5575 0112 013A subs r2, r2, #1 + 5576 0114 92B2 uxth r2, r2 + 5577 0116 2285 strh r2, [r4, #40] @ movhi +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5578 .loc 1 2641 7 is_stmt 1 view .LVU1962 +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5579 .loc 1 2641 11 is_stmt 0 view .LVU1963 + 5580 0118 638D ldrh r3, [r4, #42] + 5581 011a 9BB2 uxth r3, r3 +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5582 .loc 1 2641 22 view .LVU1964 + 5583 011c 013B subs r3, r3, #1 + 5584 011e 9BB2 uxth r3, r3 + 5585 0120 6385 strh r3, [r4, #42] @ movhi +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5586 .loc 1 2643 7 is_stmt 1 view .LVU1965 +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5587 .loc 1 2643 16 is_stmt 0 view .LVU1966 + 5588 0122 638D ldrh r3, [r4, #42] + 5589 0124 9BB2 uxth r3, r3 +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5590 .loc 1 2643 10 view .LVU1967 + 5591 0126 002B cmp r3, #0 + 5592 0128 DED0 beq .L365 +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5593 .loc 1 2643 35 discriminator 1 view .LVU1968 + 5594 012a 002A cmp r2, #0 + 5595 012c DCD1 bne .L365 +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5596 .loc 1 2646 9 is_stmt 1 view .LVU1969 +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5597 .loc 1 2646 13 is_stmt 0 view .LVU1970 + 5598 012e 0097 str r7, [sp] + 5599 0130 2B46 mov r3, r5 + 5600 0132 8021 movs r1, #128 + 5601 0134 2046 mov r0, r4 + 5602 0136 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5603 .LVL363: +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5604 .loc 1 2646 12 discriminator 1 view .LVU1971 + 5605 013a 90BB cbnz r0, .L372 +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5606 .loc 1 2651 9 is_stmt 1 view .LVU1972 +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5607 .loc 1 2651 17 is_stmt 0 view .LVU1973 + 5608 013c 638D ldrh r3, [r4, #42] + 5609 013e 9BB2 uxth r3, r3 +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5610 .loc 1 2651 12 view .LVU1974 + 5611 0140 FF2B cmp r3, #255 + 5612 0142 C5D9 bls .L366 +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 5613 .loc 1 2653 11 is_stmt 1 view .LVU1975 +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 5614 .loc 1 2653 26 is_stmt 0 view .LVU1976 + 5615 0144 FF22 movs r2, #255 + ARM GAS /tmp/ccNVyn8W.s page 259 + + + 5616 0146 2285 strh r2, [r4, #40] @ movhi +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5617 .loc 1 2654 11 is_stmt 1 view .LVU1977 + 5618 0148 0023 movs r3, #0 + 5619 014a 0093 str r3, [sp] + 5620 014c 4FF08073 mov r3, #16777216 + 5621 0150 3146 mov r1, r6 + 5622 0152 2046 mov r0, r4 + 5623 0154 FFF7FEFF bl I2C_TransferConfig + 5624 .LVL364: + 5625 0158 C6E7 b .L365 + 5626 .L377: +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5627 .loc 1 2668 5 view .LVU1978 +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5628 .loc 1 2668 9 is_stmt 0 view .LVU1979 + 5629 015a 3A46 mov r2, r7 + 5630 015c 2946 mov r1, r5 + 5631 015e 2046 mov r0, r4 + 5632 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 5633 .LVL365: +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5634 .loc 1 2668 8 discriminator 1 view .LVU1980 + 5635 0164 F8B9 cbnz r0, .L373 +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5636 .loc 1 2674 5 is_stmt 1 view .LVU1981 + 5637 0166 2368 ldr r3, [r4] + 5638 0168 2022 movs r2, #32 + 5639 016a DA61 str r2, [r3, #28] +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5640 .loc 1 2677 5 view .LVU1982 + 5641 016c 2168 ldr r1, [r4] + 5642 016e 4B68 ldr r3, [r1, #4] + 5643 0170 23F0FF73 bic r3, r3, #33423360 + 5644 0174 23F48B33 bic r3, r3, #71168 + 5645 0178 23F4FF73 bic r3, r3, #510 + 5646 017c 23F00103 bic r3, r3, #1 + 5647 0180 4B60 str r3, [r1, #4] +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5648 .loc 1 2679 5 view .LVU1983 +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5649 .loc 1 2679 17 is_stmt 0 view .LVU1984 + 5650 0182 84F84120 strb r2, [r4, #65] +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5651 .loc 1 2680 5 is_stmt 1 view .LVU1985 +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5652 .loc 1 2680 17 is_stmt 0 view .LVU1986 + 5653 0186 0023 movs r3, #0 + 5654 0188 84F84230 strb r3, [r4, #66] +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5655 .loc 1 2683 5 is_stmt 1 view .LVU1987 +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5656 .loc 1 2683 5 view .LVU1988 + 5657 018c 84F84030 strb r3, [r4, #64] +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5658 .loc 1 2683 5 view .LVU1989 +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 260 + + + 5659 .loc 1 2685 5 view .LVU1990 +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5660 .loc 1 2685 12 is_stmt 0 view .LVU1991 + 5661 0190 00E0 b .L359 + 5662 .LVL366: + 5663 .L368: +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5664 .loc 1 2689 12 view .LVU1992 + 5665 0192 0220 movs r0, #2 + 5666 .LVL367: + 5667 .L359: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 5668 .loc 1 2691 1 view .LVU1993 + 5669 0194 03B0 add sp, sp, #12 + 5670 .cfi_remember_state + 5671 .cfi_def_cfa_offset 36 + 5672 @ sp needed + 5673 0196 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5674 .LVL368: + 5675 .L369: + 5676 .cfi_restore_state +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5677 .loc 1 2584 5 discriminator 1 view .LVU1994 + 5678 019a 0220 movs r0, #2 + 5679 .LVL369: +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5680 .loc 1 2584 5 discriminator 1 view .LVU1995 + 5681 019c FAE7 b .L359 + 5682 .LVL370: + 5683 .L371: +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5684 .loc 1 2631 16 view .LVU1996 + 5685 019e 0120 movs r0, #1 + 5686 01a0 F8E7 b .L359 + 5687 .L372: +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5688 .loc 1 2648 18 view .LVU1997 + 5689 01a2 0120 movs r0, #1 + 5690 01a4 F6E7 b .L359 + 5691 .L373: +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5692 .loc 1 2670 14 view .LVU1998 + 5693 01a6 0120 movs r0, #1 + 5694 01a8 F4E7 b .L359 + 5695 .L379: + 5696 01aa 00BF .align 2 + 5697 .L378: + 5698 01ac 00240080 .word -2147474432 + 5699 .cfi_endproc + 5700 .LFE147: + 5702 .section .text.HAL_I2C_Mem_Write_IT,"ax",%progbits + 5703 .align 1 + 5704 .global HAL_I2C_Mem_Write_IT + 5705 .syntax unified + 5706 .thumb + 5707 .thumb_func + 5709 HAL_I2C_Mem_Write_IT: + ARM GAS /tmp/ccNVyn8W.s page 261 + + + 5710 .LVL371: + 5711 .LFB148: +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 5712 .loc 1 2706 1 is_stmt 1 view -0 + 5713 .cfi_startproc + 5714 @ args = 8, pretend = 0, frame = 0 + 5715 @ frame_needed = 0, uses_anonymous_args = 0 +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 5716 .loc 1 2706 1 is_stmt 0 view .LVU2000 + 5717 0000 70B5 push {r4, r5, r6, lr} + 5718 .cfi_def_cfa_offset 16 + 5719 .cfi_offset 4, -16 + 5720 .cfi_offset 5, -12 + 5721 .cfi_offset 6, -8 + 5722 .cfi_offset 14, -4 + 5723 0002 82B0 sub sp, sp, #8 + 5724 .cfi_def_cfa_offset 24 + 5725 0004 0446 mov r4, r0 + 5726 0006 1D46 mov r5, r3 + 5727 0008 BDF81C30 ldrh r3, [sp, #28] + 5728 .LVL372: +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5729 .loc 1 2708 3 is_stmt 1 view .LVU2001 +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5730 .loc 1 2710 3 view .LVU2002 +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5731 .loc 1 2710 11 is_stmt 0 view .LVU2003 + 5732 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 5733 .LVL373: +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5734 .loc 1 2710 11 view .LVU2004 + 5735 0010 C0B2 uxtb r0, r0 +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5736 .loc 1 2710 6 view .LVU2005 + 5737 0012 2028 cmp r0, #32 + 5738 0014 42D1 bne .L386 +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5739 .loc 1 2712 5 is_stmt 1 view .LVU2006 +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5740 .loc 1 2712 8 is_stmt 0 view .LVU2007 + 5741 0016 0698 ldr r0, [sp, #24] + 5742 0018 0028 cmp r0, #0 + 5743 001a 34D0 beq .L382 +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5744 .loc 1 2712 25 discriminator 1 view .LVU2008 + 5745 001c 002B cmp r3, #0 + 5746 001e 32D0 beq .L382 +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5747 .loc 1 2718 5 is_stmt 1 view .LVU2009 +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5748 .loc 1 2718 9 is_stmt 0 view .LVU2010 + 5749 0020 2068 ldr r0, [r4] + 5750 0022 8669 ldr r6, [r0, #24] +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5751 .loc 1 2718 8 view .LVU2011 + 5752 0024 16F4004F tst r6, #32768 + 5753 0028 3BD1 bne .L387 + ARM GAS /tmp/ccNVyn8W.s page 262 + + +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5754 .loc 1 2724 5 is_stmt 1 view .LVU2012 +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5755 .loc 1 2724 5 view .LVU2013 + 5756 002a 94F84060 ldrb r6, [r4, #64] @ zero_extendqisi2 + 5757 002e 012E cmp r6, #1 + 5758 0030 39D0 beq .L388 +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5759 .loc 1 2724 5 discriminator 2 view .LVU2014 + 5760 0032 0126 movs r6, #1 + 5761 0034 84F84060 strb r6, [r4, #64] +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5762 .loc 1 2724 5 discriminator 2 view .LVU2015 +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5763 .loc 1 2726 5 view .LVU2016 +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5764 .loc 1 2726 23 is_stmt 0 view .LVU2017 + 5765 0038 2126 movs r6, #33 + 5766 003a 84F84160 strb r6, [r4, #65] +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5767 .loc 1 2727 5 is_stmt 1 view .LVU2018 +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5768 .loc 1 2727 23 is_stmt 0 view .LVU2019 + 5769 003e 4026 movs r6, #64 + 5770 0040 84F84260 strb r6, [r4, #66] +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5771 .loc 1 2728 5 is_stmt 1 view .LVU2020 +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5772 .loc 1 2728 23 is_stmt 0 view .LVU2021 + 5773 0044 0026 movs r6, #0 + 5774 0046 6664 str r6, [r4, #68] +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5775 .loc 1 2731 5 is_stmt 1 view .LVU2022 +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5776 .loc 1 2731 23 is_stmt 0 view .LVU2023 + 5777 0048 069E ldr r6, [sp, #24] + 5778 004a 6662 str r6, [r4, #36] +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5779 .loc 1 2732 5 is_stmt 1 view .LVU2024 +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5780 .loc 1 2732 23 is_stmt 0 view .LVU2025 + 5781 004c 6385 strh r3, [r4, #42] @ movhi +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 5782 .loc 1 2733 5 is_stmt 1 view .LVU2026 +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 5783 .loc 1 2733 23 is_stmt 0 view .LVU2027 + 5784 004e 174B ldr r3, .L391 + 5785 0050 E362 str r3, [r4, #44] +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 5786 .loc 1 2734 5 is_stmt 1 view .LVU2028 +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 5787 .loc 1 2734 23 is_stmt 0 view .LVU2029 + 5788 0052 174B ldr r3, .L391+4 + 5789 0054 6363 str r3, [r4, #52] +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5790 .loc 1 2735 5 is_stmt 1 view .LVU2030 +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 263 + + + 5791 .loc 1 2735 23 is_stmt 0 view .LVU2031 + 5792 0056 E164 str r1, [r4, #76] +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5793 .loc 1 2738 5 is_stmt 1 view .LVU2032 +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5794 .loc 1 2738 8 is_stmt 0 view .LVU2033 + 5795 0058 012D cmp r5, #1 + 5796 005a 19D0 beq .L390 +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5797 .loc 1 2750 7 is_stmt 1 view .LVU2034 +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5798 .loc 1 2750 30 is_stmt 0 view .LVU2035 + 5799 005c 130A lsrs r3, r2, #8 +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5800 .loc 1 2750 28 view .LVU2036 + 5801 005e 8362 str r3, [r0, #40] +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5802 .loc 1 2753 7 is_stmt 1 view .LVU2037 +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5803 .loc 1 2753 26 is_stmt 0 view .LVU2038 + 5804 0060 D2B2 uxtb r2, r2 + 5805 .LVL374: +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5806 .loc 1 2753 24 view .LVU2039 + 5807 0062 2265 str r2, [r4, #80] + 5808 .L385: +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5809 .loc 1 2756 5 is_stmt 1 view .LVU2040 + 5810 0064 134B ldr r3, .L391+8 + 5811 0066 0093 str r3, [sp] + 5812 0068 4FF08073 mov r3, #16777216 + 5813 006c EAB2 uxtb r2, r5 + 5814 006e 2046 mov r0, r4 + 5815 0070 FFF7FEFF bl I2C_TransferConfig + 5816 .LVL375: +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5817 .loc 1 2759 5 view .LVU2041 +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5818 .loc 1 2759 5 view .LVU2042 + 5819 0074 0025 movs r5, #0 + 5820 .LVL376: +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5821 .loc 1 2759 5 is_stmt 0 view .LVU2043 + 5822 0076 84F84050 strb r5, [r4, #64] +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5823 .loc 1 2759 5 is_stmt 1 view .LVU2044 +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5824 .loc 1 2769 5 view .LVU2045 + 5825 007a 0121 movs r1, #1 + 5826 007c 2046 mov r0, r4 + 5827 007e FFF7FEFF bl I2C_Enable_IRQ + 5828 .LVL377: +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5829 .loc 1 2771 5 view .LVU2046 +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5830 .loc 1 2771 12 is_stmt 0 view .LVU2047 + 5831 0082 2846 mov r0, r5 + ARM GAS /tmp/ccNVyn8W.s page 264 + + + 5832 0084 0BE0 b .L381 + 5833 .LVL378: + 5834 .L382: +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5835 .loc 1 2714 7 is_stmt 1 view .LVU2048 +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5836 .loc 1 2714 23 is_stmt 0 view .LVU2049 + 5837 0086 4FF40073 mov r3, #512 + 5838 008a 6364 str r3, [r4, #68] +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5839 .loc 1 2715 7 is_stmt 1 view .LVU2050 +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5840 .loc 1 2715 15 is_stmt 0 view .LVU2051 + 5841 008c 0120 movs r0, #1 + 5842 008e 06E0 b .L381 + 5843 .L390: +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5844 .loc 1 2741 7 is_stmt 1 view .LVU2052 +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5845 .loc 1 2741 30 is_stmt 0 view .LVU2053 + 5846 0090 D2B2 uxtb r2, r2 + 5847 .LVL379: +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5848 .loc 1 2741 28 view .LVU2054 + 5849 0092 8262 str r2, [r0, #40] +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5850 .loc 1 2744 7 is_stmt 1 view .LVU2055 +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5851 .loc 1 2744 24 is_stmt 0 view .LVU2056 + 5852 0094 4FF0FF33 mov r3, #-1 + 5853 0098 2365 str r3, [r4, #80] + 5854 009a E3E7 b .L385 + 5855 .LVL380: + 5856 .L386: +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5857 .loc 1 2775 12 view .LVU2057 + 5858 009c 0220 movs r0, #2 + 5859 .LVL381: + 5860 .L381: +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5861 .loc 1 2777 1 view .LVU2058 + 5862 009e 02B0 add sp, sp, #8 + 5863 .cfi_remember_state + 5864 .cfi_def_cfa_offset 16 + 5865 @ sp needed + 5866 00a0 70BD pop {r4, r5, r6, pc} + 5867 .LVL382: + 5868 .L387: + 5869 .cfi_restore_state +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5870 .loc 1 2720 14 view .LVU2059 + 5871 00a2 0220 movs r0, #2 + 5872 00a4 FBE7 b .L381 + 5873 .L388: +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5874 .loc 1 2724 5 discriminator 1 view .LVU2060 + 5875 00a6 0220 movs r0, #2 + ARM GAS /tmp/ccNVyn8W.s page 265 + + + 5876 00a8 F9E7 b .L381 + 5877 .L392: + 5878 00aa 00BF .align 2 + 5879 .L391: + 5880 00ac 0000FFFF .word -65536 + 5881 00b0 00000000 .word I2C_Mem_ISR_IT + 5882 00b4 00200080 .word -2147475456 + 5883 .cfi_endproc + 5884 .LFE148: + 5886 .section .text.HAL_I2C_Mem_Read_IT,"ax",%progbits + 5887 .align 1 + 5888 .global HAL_I2C_Mem_Read_IT + 5889 .syntax unified + 5890 .thumb + 5891 .thumb_func + 5893 HAL_I2C_Mem_Read_IT: + 5894 .LVL383: + 5895 .LFB149: +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 5896 .loc 1 2793 1 is_stmt 1 view -0 + 5897 .cfi_startproc + 5898 @ args = 8, pretend = 0, frame = 0 + 5899 @ frame_needed = 0, uses_anonymous_args = 0 +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 5900 .loc 1 2793 1 is_stmt 0 view .LVU2062 + 5901 0000 70B5 push {r4, r5, r6, lr} + 5902 .cfi_def_cfa_offset 16 + 5903 .cfi_offset 4, -16 + 5904 .cfi_offset 5, -12 + 5905 .cfi_offset 6, -8 + 5906 .cfi_offset 14, -4 + 5907 0002 82B0 sub sp, sp, #8 + 5908 .cfi_def_cfa_offset 24 + 5909 0004 0446 mov r4, r0 + 5910 0006 1D46 mov r5, r3 + 5911 0008 BDF81C30 ldrh r3, [sp, #28] + 5912 .LVL384: +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5913 .loc 1 2795 3 is_stmt 1 view .LVU2063 +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5914 .loc 1 2797 3 view .LVU2064 +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5915 .loc 1 2797 11 is_stmt 0 view .LVU2065 + 5916 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 5917 .LVL385: +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5918 .loc 1 2797 11 view .LVU2066 + 5919 0010 C0B2 uxtb r0, r0 +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5920 .loc 1 2797 6 view .LVU2067 + 5921 0012 2028 cmp r0, #32 + 5922 0014 41D1 bne .L399 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5923 .loc 1 2799 5 is_stmt 1 view .LVU2068 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5924 .loc 1 2799 8 is_stmt 0 view .LVU2069 + 5925 0016 0698 ldr r0, [sp, #24] + ARM GAS /tmp/ccNVyn8W.s page 266 + + + 5926 0018 0028 cmp r0, #0 + 5927 001a 33D0 beq .L395 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5928 .loc 1 2799 25 discriminator 1 view .LVU2070 + 5929 001c 002B cmp r3, #0 + 5930 001e 31D0 beq .L395 +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5931 .loc 1 2805 5 is_stmt 1 view .LVU2071 +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5932 .loc 1 2805 9 is_stmt 0 view .LVU2072 + 5933 0020 2068 ldr r0, [r4] + 5934 0022 8669 ldr r6, [r0, #24] +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5935 .loc 1 2805 8 view .LVU2073 + 5936 0024 16F4004F tst r6, #32768 + 5937 0028 3AD1 bne .L400 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5938 .loc 1 2811 5 is_stmt 1 view .LVU2074 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5939 .loc 1 2811 5 view .LVU2075 + 5940 002a 94F84060 ldrb r6, [r4, #64] @ zero_extendqisi2 + 5941 002e 012E cmp r6, #1 + 5942 0030 38D0 beq .L401 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5943 .loc 1 2811 5 discriminator 2 view .LVU2076 + 5944 0032 0126 movs r6, #1 + 5945 0034 84F84060 strb r6, [r4, #64] +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5946 .loc 1 2811 5 discriminator 2 view .LVU2077 +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5947 .loc 1 2813 5 view .LVU2078 +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5948 .loc 1 2813 23 is_stmt 0 view .LVU2079 + 5949 0038 2226 movs r6, #34 + 5950 003a 84F84160 strb r6, [r4, #65] +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5951 .loc 1 2814 5 is_stmt 1 view .LVU2080 +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5952 .loc 1 2814 23 is_stmt 0 view .LVU2081 + 5953 003e 4026 movs r6, #64 + 5954 0040 84F84260 strb r6, [r4, #66] +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5955 .loc 1 2815 5 is_stmt 1 view .LVU2082 +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5956 .loc 1 2815 23 is_stmt 0 view .LVU2083 + 5957 0044 0026 movs r6, #0 + 5958 0046 6664 str r6, [r4, #68] +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5959 .loc 1 2818 5 is_stmt 1 view .LVU2084 +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5960 .loc 1 2818 23 is_stmt 0 view .LVU2085 + 5961 0048 069E ldr r6, [sp, #24] + 5962 004a 6662 str r6, [r4, #36] +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5963 .loc 1 2819 5 is_stmt 1 view .LVU2086 +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5964 .loc 1 2819 23 is_stmt 0 view .LVU2087 + ARM GAS /tmp/ccNVyn8W.s page 267 + + + 5965 004c 6385 strh r3, [r4, #42] @ movhi +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 5966 .loc 1 2820 5 is_stmt 1 view .LVU2088 +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 5967 .loc 1 2820 23 is_stmt 0 view .LVU2089 + 5968 004e 164B ldr r3, .L404 + 5969 0050 E362 str r3, [r4, #44] +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 5970 .loc 1 2821 5 is_stmt 1 view .LVU2090 +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 5971 .loc 1 2821 23 is_stmt 0 view .LVU2091 + 5972 0052 164B ldr r3, .L404+4 + 5973 0054 6363 str r3, [r4, #52] +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5974 .loc 1 2822 5 is_stmt 1 view .LVU2092 +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5975 .loc 1 2822 23 is_stmt 0 view .LVU2093 + 5976 0056 E164 str r1, [r4, #76] +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5977 .loc 1 2825 5 is_stmt 1 view .LVU2094 +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5978 .loc 1 2825 8 is_stmt 0 view .LVU2095 + 5979 0058 012D cmp r5, #1 + 5980 005a 18D0 beq .L403 +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5981 .loc 1 2837 7 is_stmt 1 view .LVU2096 +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5982 .loc 1 2837 30 is_stmt 0 view .LVU2097 + 5983 005c 130A lsrs r3, r2, #8 +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5984 .loc 1 2837 28 view .LVU2098 + 5985 005e 8362 str r3, [r0, #40] +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5986 .loc 1 2840 7 is_stmt 1 view .LVU2099 +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5987 .loc 1 2840 26 is_stmt 0 view .LVU2100 + 5988 0060 D2B2 uxtb r2, r2 + 5989 .LVL386: +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5990 .loc 1 2840 24 view .LVU2101 + 5991 0062 2265 str r2, [r4, #80] + 5992 .L398: +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5993 .loc 1 2843 5 is_stmt 1 view .LVU2102 + 5994 0064 124B ldr r3, .L404+8 + 5995 0066 0093 str r3, [sp] + 5996 0068 0023 movs r3, #0 + 5997 006a EAB2 uxtb r2, r5 + 5998 006c 2046 mov r0, r4 + 5999 006e FFF7FEFF bl I2C_TransferConfig + 6000 .LVL387: +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6001 .loc 1 2846 5 view .LVU2103 +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6002 .loc 1 2846 5 view .LVU2104 + 6003 0072 0025 movs r5, #0 + 6004 .LVL388: + ARM GAS /tmp/ccNVyn8W.s page 268 + + +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6005 .loc 1 2846 5 is_stmt 0 view .LVU2105 + 6006 0074 84F84050 strb r5, [r4, #64] +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6007 .loc 1 2846 5 is_stmt 1 view .LVU2106 +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6008 .loc 1 2856 5 view .LVU2107 + 6009 0078 0321 movs r1, #3 + 6010 007a 2046 mov r0, r4 + 6011 007c FFF7FEFF bl I2C_Enable_IRQ + 6012 .LVL389: +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6013 .loc 1 2858 5 view .LVU2108 +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6014 .loc 1 2858 12 is_stmt 0 view .LVU2109 + 6015 0080 2846 mov r0, r5 + 6016 0082 0BE0 b .L394 + 6017 .LVL390: + 6018 .L395: +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6019 .loc 1 2801 7 is_stmt 1 view .LVU2110 +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6020 .loc 1 2801 23 is_stmt 0 view .LVU2111 + 6021 0084 4FF40073 mov r3, #512 + 6022 0088 6364 str r3, [r4, #68] +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6023 .loc 1 2802 7 is_stmt 1 view .LVU2112 +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6024 .loc 1 2802 15 is_stmt 0 view .LVU2113 + 6025 008a 0120 movs r0, #1 + 6026 008c 06E0 b .L394 + 6027 .L403: +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6028 .loc 1 2828 7 is_stmt 1 view .LVU2114 +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6029 .loc 1 2828 30 is_stmt 0 view .LVU2115 + 6030 008e D2B2 uxtb r2, r2 + 6031 .LVL391: +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6032 .loc 1 2828 28 view .LVU2116 + 6033 0090 8262 str r2, [r0, #40] +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6034 .loc 1 2831 7 is_stmt 1 view .LVU2117 +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6035 .loc 1 2831 24 is_stmt 0 view .LVU2118 + 6036 0092 4FF0FF33 mov r3, #-1 + 6037 0096 2365 str r3, [r4, #80] + 6038 0098 E4E7 b .L398 + 6039 .LVL392: + 6040 .L399: +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6041 .loc 1 2862 12 view .LVU2119 + 6042 009a 0220 movs r0, #2 + 6043 .LVL393: + 6044 .L394: +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6045 .loc 1 2864 1 view .LVU2120 + ARM GAS /tmp/ccNVyn8W.s page 269 + + + 6046 009c 02B0 add sp, sp, #8 + 6047 .cfi_remember_state + 6048 .cfi_def_cfa_offset 16 + 6049 @ sp needed + 6050 009e 70BD pop {r4, r5, r6, pc} + 6051 .LVL394: + 6052 .L400: + 6053 .cfi_restore_state +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6054 .loc 1 2807 14 view .LVU2121 + 6055 00a0 0220 movs r0, #2 + 6056 00a2 FBE7 b .L394 + 6057 .L401: +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6058 .loc 1 2811 5 discriminator 1 view .LVU2122 + 6059 00a4 0220 movs r0, #2 + 6060 00a6 F9E7 b .L394 + 6061 .L405: + 6062 .align 2 + 6063 .L404: + 6064 00a8 0000FFFF .word -65536 + 6065 00ac 00000000 .word I2C_Mem_ISR_IT + 6066 00b0 00200080 .word -2147475456 + 6067 .cfi_endproc + 6068 .LFE149: + 6070 .section .text.HAL_I2C_Mem_Write_DMA,"ax",%progbits + 6071 .align 1 + 6072 .global HAL_I2C_Mem_Write_DMA + 6073 .syntax unified + 6074 .thumb + 6075 .thumb_func + 6077 HAL_I2C_Mem_Write_DMA: + 6078 .LVL395: + 6079 .LFB150: +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6080 .loc 1 2880 1 is_stmt 1 view -0 + 6081 .cfi_startproc + 6082 @ args = 8, pretend = 0, frame = 0 + 6083 @ frame_needed = 0, uses_anonymous_args = 0 +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6084 .loc 1 2880 1 is_stmt 0 view .LVU2124 + 6085 0000 F0B5 push {r4, r5, r6, r7, lr} + 6086 .cfi_def_cfa_offset 20 + 6087 .cfi_offset 4, -20 + 6088 .cfi_offset 5, -16 + 6089 .cfi_offset 6, -12 + 6090 .cfi_offset 7, -8 + 6091 .cfi_offset 14, -4 + 6092 0002 83B0 sub sp, sp, #12 + 6093 .cfi_def_cfa_offset 32 + 6094 0004 0446 mov r4, r0 + 6095 0006 0E46 mov r6, r1 + 6096 0008 1F46 mov r7, r3 + 6097 000a 0899 ldr r1, [sp, #32] + 6098 .LVL396: +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6099 .loc 1 2880 1 view .LVU2125 + ARM GAS /tmp/ccNVyn8W.s page 270 + + + 6100 000c BDF82430 ldrh r3, [sp, #36] + 6101 .LVL397: +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6102 .loc 1 2881 3 is_stmt 1 view .LVU2126 +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6103 .loc 1 2884 3 view .LVU2127 +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6104 .loc 1 2886 3 view .LVU2128 +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6105 .loc 1 2886 11 is_stmt 0 view .LVU2129 + 6106 0010 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 6107 .LVL398: +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6108 .loc 1 2886 11 view .LVU2130 + 6109 0014 C0B2 uxtb r0, r0 +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6110 .loc 1 2886 6 view .LVU2131 + 6111 0016 2028 cmp r0, #32 + 6112 0018 7AD1 bne .L417 +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6113 .loc 1 2888 5 is_stmt 1 view .LVU2132 +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6114 .loc 1 2888 8 is_stmt 0 view .LVU2133 + 6115 001a 0029 cmp r1, #0 + 6116 001c 4BD0 beq .L408 +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6117 .loc 1 2888 25 discriminator 1 view .LVU2134 + 6118 001e 002B cmp r3, #0 + 6119 0020 49D0 beq .L408 +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6120 .loc 1 2894 5 is_stmt 1 view .LVU2135 +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6121 .loc 1 2894 9 is_stmt 0 view .LVU2136 + 6122 0022 2068 ldr r0, [r4] + 6123 0024 8569 ldr r5, [r0, #24] +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6124 .loc 1 2894 8 view .LVU2137 + 6125 0026 15F4004F tst r5, #32768 + 6126 002a 75D1 bne .L418 +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6127 .loc 1 2900 5 is_stmt 1 view .LVU2138 +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6128 .loc 1 2900 5 view .LVU2139 + 6129 002c 94F84050 ldrb r5, [r4, #64] @ zero_extendqisi2 + 6130 0030 012D cmp r5, #1 + 6131 0032 73D0 beq .L419 +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6132 .loc 1 2900 5 discriminator 2 view .LVU2140 + 6133 0034 0125 movs r5, #1 + 6134 0036 84F84050 strb r5, [r4, #64] +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6135 .loc 1 2900 5 discriminator 2 view .LVU2141 +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6136 .loc 1 2902 5 view .LVU2142 +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6137 .loc 1 2902 23 is_stmt 0 view .LVU2143 + 6138 003a 2125 movs r5, #33 + ARM GAS /tmp/ccNVyn8W.s page 271 + + + 6139 003c 84F84150 strb r5, [r4, #65] +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6140 .loc 1 2903 5 is_stmt 1 view .LVU2144 +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6141 .loc 1 2903 23 is_stmt 0 view .LVU2145 + 6142 0040 4025 movs r5, #64 + 6143 0042 84F84250 strb r5, [r4, #66] +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6144 .loc 1 2904 5 is_stmt 1 view .LVU2146 +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6145 .loc 1 2904 23 is_stmt 0 view .LVU2147 + 6146 0046 0025 movs r5, #0 + 6147 0048 6564 str r5, [r4, #68] +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6148 .loc 1 2907 5 is_stmt 1 view .LVU2148 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6149 .loc 1 2907 23 is_stmt 0 view .LVU2149 + 6150 004a 6162 str r1, [r4, #36] +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6151 .loc 1 2908 5 is_stmt 1 view .LVU2150 +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6152 .loc 1 2908 23 is_stmt 0 view .LVU2151 + 6153 004c 6385 strh r3, [r4, #42] @ movhi +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6154 .loc 1 2909 5 is_stmt 1 view .LVU2152 +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6155 .loc 1 2909 23 is_stmt 0 view .LVU2153 + 6156 004e 344B ldr r3, .L424 + 6157 0050 E362 str r3, [r4, #44] +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6158 .loc 1 2910 5 is_stmt 1 view .LVU2154 +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6159 .loc 1 2910 23 is_stmt 0 view .LVU2155 + 6160 0052 344B ldr r3, .L424+4 + 6161 0054 6363 str r3, [r4, #52] +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6162 .loc 1 2911 5 is_stmt 1 view .LVU2156 +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6163 .loc 1 2911 23 is_stmt 0 view .LVU2157 + 6164 0056 E664 str r6, [r4, #76] +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6165 .loc 1 2913 5 is_stmt 1 view .LVU2158 +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6166 .loc 1 2913 13 is_stmt 0 view .LVU2159 + 6167 0058 638D ldrh r3, [r4, #42] + 6168 005a 9BB2 uxth r3, r3 +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6169 .loc 1 2913 8 view .LVU2160 + 6170 005c FF2B cmp r3, #255 + 6171 005e 2FD9 bls .L410 +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6172 .loc 1 2915 7 is_stmt 1 view .LVU2161 +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6173 .loc 1 2915 22 is_stmt 0 view .LVU2162 + 6174 0060 FF23 movs r3, #255 + 6175 0062 2385 strh r3, [r4, #40] @ movhi + 6176 .L411: + ARM GAS /tmp/ccNVyn8W.s page 272 + + +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6177 .loc 1 2923 5 is_stmt 1 view .LVU2163 +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6178 .loc 1 2923 8 is_stmt 0 view .LVU2164 + 6179 0064 012F cmp r7, #1 + 6180 0066 2ED0 beq .L422 +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6181 .loc 1 2935 7 is_stmt 1 view .LVU2165 +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6182 .loc 1 2935 30 is_stmt 0 view .LVU2166 + 6183 0068 130A lsrs r3, r2, #8 +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6184 .loc 1 2935 28 view .LVU2167 + 6185 006a 8362 str r3, [r0, #40] +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6186 .loc 1 2938 7 is_stmt 1 view .LVU2168 +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6187 .loc 1 2938 26 is_stmt 0 view .LVU2169 + 6188 006c D2B2 uxtb r2, r2 + 6189 .LVL399: +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6190 .loc 1 2938 24 view .LVU2170 + 6191 006e 2265 str r2, [r4, #80] + 6192 .L413: +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6193 .loc 1 2941 5 is_stmt 1 view .LVU2171 +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6194 .loc 1 2941 13 is_stmt 0 view .LVU2172 + 6195 0070 A36B ldr r3, [r4, #56] +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6196 .loc 1 2941 8 view .LVU2173 + 6197 0072 002B cmp r3, #0 + 6198 0074 2DD0 beq .L414 +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6199 .loc 1 2944 7 is_stmt 1 view .LVU2174 +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6200 .loc 1 2944 38 is_stmt 0 view .LVU2175 + 6201 0076 2C4A ldr r2, .L424+8 + 6202 0078 9A62 str r2, [r3, #40] +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6203 .loc 1 2947 7 is_stmt 1 view .LVU2176 +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6204 .loc 1 2947 11 is_stmt 0 view .LVU2177 + 6205 007a A36B ldr r3, [r4, #56] +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6206 .loc 1 2947 39 view .LVU2178 + 6207 007c 2B4A ldr r2, .L424+12 + 6208 007e 1A63 str r2, [r3, #48] +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6209 .loc 1 2950 7 is_stmt 1 view .LVU2179 +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6210 .loc 1 2950 11 is_stmt 0 view .LVU2180 + 6211 0080 A26B ldr r2, [r4, #56] +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6212 .loc 1 2950 42 view .LVU2181 + 6213 0082 0023 movs r3, #0 + 6214 0084 D362 str r3, [r2, #44] + ARM GAS /tmp/ccNVyn8W.s page 273 + + +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6215 .loc 1 2951 7 is_stmt 1 view .LVU2182 +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6216 .loc 1 2951 11 is_stmt 0 view .LVU2183 + 6217 0086 A26B ldr r2, [r4, #56] +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6218 .loc 1 2951 39 view .LVU2184 + 6219 0088 5363 str r3, [r2, #52] +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6220 .loc 1 2954 7 is_stmt 1 view .LVU2185 +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6221 .loc 1 2954 86 is_stmt 0 view .LVU2186 + 6222 008a 2268 ldr r2, [r4] +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6223 .loc 1 2954 23 view .LVU2187 + 6224 008c 238D ldrh r3, [r4, #40] + 6225 008e 2832 adds r2, r2, #40 + 6226 0090 A06B ldr r0, [r4, #56] + 6227 0092 FFF7FEFF bl HAL_DMA_Start_IT + 6228 .LVL400: +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6229 .loc 1 2972 5 is_stmt 1 view .LVU2188 +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6230 .loc 1 2972 8 is_stmt 0 view .LVU2189 + 6231 0096 0546 mov r5, r0 + 6232 0098 48B3 cbz r0, .L423 +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6233 .loc 1 2992 7 is_stmt 1 view .LVU2190 +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6234 .loc 1 2992 23 is_stmt 0 view .LVU2191 + 6235 009a 2023 movs r3, #32 + 6236 009c 84F84130 strb r3, [r4, #65] +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6237 .loc 1 2993 7 is_stmt 1 view .LVU2192 +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6238 .loc 1 2993 23 is_stmt 0 view .LVU2193 + 6239 00a0 0022 movs r2, #0 + 6240 00a2 84F84220 strb r2, [r4, #66] +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6241 .loc 1 2996 7 is_stmt 1 view .LVU2194 +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6242 .loc 1 2996 11 is_stmt 0 view .LVU2195 + 6243 00a6 636C ldr r3, [r4, #68] +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6244 .loc 1 2996 23 view .LVU2196 + 6245 00a8 43F01003 orr r3, r3, #16 + 6246 00ac 6364 str r3, [r4, #68] +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6247 .loc 1 2999 7 is_stmt 1 view .LVU2197 +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6248 .loc 1 2999 7 view .LVU2198 + 6249 00ae 84F84020 strb r2, [r4, #64] +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6250 .loc 1 2999 7 view .LVU2199 +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6251 .loc 1 3001 7 view .LVU2200 +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 274 + + + 6252 .loc 1 3001 14 is_stmt 0 view .LVU2201 + 6253 00b2 0125 movs r5, #1 + 6254 00b4 2DE0 b .L407 + 6255 .LVL401: + 6256 .L408: +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6257 .loc 1 2890 7 is_stmt 1 view .LVU2202 +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6258 .loc 1 2890 23 is_stmt 0 view .LVU2203 + 6259 00b6 4FF40073 mov r3, #512 + 6260 00ba 6364 str r3, [r4, #68] +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6261 .loc 1 2891 7 is_stmt 1 view .LVU2204 +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6262 .loc 1 2891 15 is_stmt 0 view .LVU2205 + 6263 00bc 0125 movs r5, #1 + 6264 00be 28E0 b .L407 + 6265 .L410: +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6266 .loc 1 2919 7 is_stmt 1 view .LVU2206 +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6267 .loc 1 2919 28 is_stmt 0 view .LVU2207 + 6268 00c0 638D ldrh r3, [r4, #42] +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6269 .loc 1 2919 22 view .LVU2208 + 6270 00c2 2385 strh r3, [r4, #40] @ movhi + 6271 00c4 CEE7 b .L411 + 6272 .L422: +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6273 .loc 1 2926 7 is_stmt 1 view .LVU2209 +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6274 .loc 1 2926 30 is_stmt 0 view .LVU2210 + 6275 00c6 D2B2 uxtb r2, r2 + 6276 .LVL402: +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6277 .loc 1 2926 28 view .LVU2211 + 6278 00c8 8262 str r2, [r0, #40] +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6279 .loc 1 2929 7 is_stmt 1 view .LVU2212 +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6280 .loc 1 2929 24 is_stmt 0 view .LVU2213 + 6281 00ca 4FF0FF33 mov r3, #-1 + 6282 00ce 2365 str r3, [r4, #80] + 6283 00d0 CEE7 b .L413 + 6284 .L414: +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6285 .loc 1 2960 7 is_stmt 1 view .LVU2214 +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6286 .loc 1 2960 23 is_stmt 0 view .LVU2215 + 6287 00d2 2023 movs r3, #32 + 6288 00d4 84F84130 strb r3, [r4, #65] +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6289 .loc 1 2961 7 is_stmt 1 view .LVU2216 +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6290 .loc 1 2961 23 is_stmt 0 view .LVU2217 + 6291 00d8 0022 movs r2, #0 + 6292 00da 84F84220 strb r2, [r4, #66] + ARM GAS /tmp/ccNVyn8W.s page 275 + + +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6293 .loc 1 2964 7 is_stmt 1 view .LVU2218 +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6294 .loc 1 2964 11 is_stmt 0 view .LVU2219 + 6295 00de 636C ldr r3, [r4, #68] +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6296 .loc 1 2964 23 view .LVU2220 + 6297 00e0 43F08003 orr r3, r3, #128 + 6298 00e4 6364 str r3, [r4, #68] +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6299 .loc 1 2967 7 is_stmt 1 view .LVU2221 +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6300 .loc 1 2967 7 view .LVU2222 + 6301 00e6 84F84020 strb r2, [r4, #64] +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6302 .loc 1 2967 7 view .LVU2223 +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6303 .loc 1 2969 7 view .LVU2224 +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6304 .loc 1 2969 14 is_stmt 0 view .LVU2225 + 6305 00ea 0125 movs r5, #1 + 6306 00ec 11E0 b .L407 + 6307 .LVL403: + 6308 .L423: +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6309 .loc 1 2975 7 is_stmt 1 view .LVU2226 + 6310 00ee 104B ldr r3, .L424+16 + 6311 00f0 0093 str r3, [sp] + 6312 00f2 4FF08073 mov r3, #16777216 + 6313 00f6 FAB2 uxtb r2, r7 + 6314 00f8 3146 mov r1, r6 + 6315 00fa 2046 mov r0, r4 + 6316 .LVL404: +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6317 .loc 1 2975 7 is_stmt 0 view .LVU2227 + 6318 00fc FFF7FEFF bl I2C_TransferConfig + 6319 .LVL405: +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6320 .loc 1 2978 7 is_stmt 1 view .LVU2228 +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6321 .loc 1 2978 7 view .LVU2229 + 6322 0100 0023 movs r3, #0 + 6323 0102 84F84030 strb r3, [r4, #64] +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6324 .loc 1 2978 7 view .LVU2230 +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6325 .loc 1 2987 7 view .LVU2231 + 6326 0106 0121 movs r1, #1 + 6327 0108 2046 mov r0, r4 + 6328 010a FFF7FEFF bl I2C_Enable_IRQ + 6329 .LVL406: +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6330 .loc 1 3004 5 view .LVU2232 +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6331 .loc 1 3004 12 is_stmt 0 view .LVU2233 + 6332 010e 00E0 b .L407 + 6333 .LVL407: + ARM GAS /tmp/ccNVyn8W.s page 276 + + + 6334 .L417: +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6335 .loc 1 3008 12 view .LVU2234 + 6336 0110 0225 movs r5, #2 + 6337 .LVL408: + 6338 .L407: +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6339 .loc 1 3010 1 view .LVU2235 + 6340 0112 2846 mov r0, r5 + 6341 0114 03B0 add sp, sp, #12 + 6342 .cfi_remember_state + 6343 .cfi_def_cfa_offset 20 + 6344 @ sp needed + 6345 0116 F0BD pop {r4, r5, r6, r7, pc} + 6346 .LVL409: + 6347 .L418: + 6348 .cfi_restore_state +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6349 .loc 1 2896 14 view .LVU2236 + 6350 0118 0225 movs r5, #2 + 6351 011a FAE7 b .L407 + 6352 .L419: +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6353 .loc 1 2900 5 discriminator 1 view .LVU2237 + 6354 011c 0225 movs r5, #2 + 6355 011e F8E7 b .L407 + 6356 .L425: + 6357 .align 2 + 6358 .L424: + 6359 0120 0000FFFF .word -65536 + 6360 0124 00000000 .word I2C_Mem_ISR_DMA + 6361 0128 00000000 .word I2C_DMAMasterTransmitCplt + 6362 012c 00000000 .word I2C_DMAError + 6363 0130 00200080 .word -2147475456 + 6364 .cfi_endproc + 6365 .LFE150: + 6367 .section .text.HAL_I2C_Mem_Read_DMA,"ax",%progbits + 6368 .align 1 + 6369 .global HAL_I2C_Mem_Read_DMA + 6370 .syntax unified + 6371 .thumb + 6372 .thumb_func + 6374 HAL_I2C_Mem_Read_DMA: + 6375 .LVL410: + 6376 .LFB151: +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6377 .loc 1 3026 1 is_stmt 1 view -0 + 6378 .cfi_startproc + 6379 @ args = 8, pretend = 0, frame = 0 + 6380 @ frame_needed = 0, uses_anonymous_args = 0 +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6381 .loc 1 3026 1 is_stmt 0 view .LVU2239 + 6382 0000 F0B5 push {r4, r5, r6, r7, lr} + 6383 .cfi_def_cfa_offset 20 + 6384 .cfi_offset 4, -20 + 6385 .cfi_offset 5, -16 + 6386 .cfi_offset 6, -12 + ARM GAS /tmp/ccNVyn8W.s page 277 + + + 6387 .cfi_offset 7, -8 + 6388 .cfi_offset 14, -4 + 6389 0002 83B0 sub sp, sp, #12 + 6390 .cfi_def_cfa_offset 32 + 6391 0004 0446 mov r4, r0 + 6392 0006 1F46 mov r7, r3 + 6393 0008 089D ldr r5, [sp, #32] + 6394 000a BDF82430 ldrh r3, [sp, #36] + 6395 .LVL411: +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6396 .loc 1 3027 3 is_stmt 1 view .LVU2240 +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6397 .loc 1 3030 3 view .LVU2241 +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6398 .loc 1 3032 3 view .LVU2242 +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6399 .loc 1 3032 11 is_stmt 0 view .LVU2243 + 6400 000e 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 6401 .LVL412: +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6402 .loc 1 3032 11 view .LVU2244 + 6403 0012 C0B2 uxtb r0, r0 +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6404 .loc 1 3032 6 view .LVU2245 + 6405 0014 2028 cmp r0, #32 + 6406 0016 7BD1 bne .L437 + 6407 0018 0E46 mov r6, r1 +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6408 .loc 1 3034 5 is_stmt 1 view .LVU2246 +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6409 .loc 1 3034 8 is_stmt 0 view .LVU2247 + 6410 001a 002D cmp r5, #0 + 6411 001c 4CD0 beq .L428 +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6412 .loc 1 3034 25 discriminator 1 view .LVU2248 + 6413 001e 002B cmp r3, #0 + 6414 0020 4AD0 beq .L428 +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6415 .loc 1 3040 5 is_stmt 1 view .LVU2249 +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6416 .loc 1 3040 9 is_stmt 0 view .LVU2250 + 6417 0022 2168 ldr r1, [r4] + 6418 .LVL413: +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6419 .loc 1 3040 9 view .LVU2251 + 6420 0024 8869 ldr r0, [r1, #24] +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6421 .loc 1 3040 8 view .LVU2252 + 6422 0026 10F4004F tst r0, #32768 + 6423 002a 75D1 bne .L438 +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6424 .loc 1 3046 5 is_stmt 1 view .LVU2253 +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6425 .loc 1 3046 5 view .LVU2254 + 6426 002c 94F84000 ldrb r0, [r4, #64] @ zero_extendqisi2 + 6427 0030 0128 cmp r0, #1 + 6428 0032 73D0 beq .L439 + ARM GAS /tmp/ccNVyn8W.s page 278 + + +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6429 .loc 1 3046 5 discriminator 2 view .LVU2255 + 6430 0034 0120 movs r0, #1 + 6431 0036 84F84000 strb r0, [r4, #64] +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6432 .loc 1 3046 5 discriminator 2 view .LVU2256 +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6433 .loc 1 3048 5 view .LVU2257 +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6434 .loc 1 3048 23 is_stmt 0 view .LVU2258 + 6435 003a 2220 movs r0, #34 + 6436 003c 84F84100 strb r0, [r4, #65] +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6437 .loc 1 3049 5 is_stmt 1 view .LVU2259 +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6438 .loc 1 3049 23 is_stmt 0 view .LVU2260 + 6439 0040 4020 movs r0, #64 + 6440 0042 84F84200 strb r0, [r4, #66] +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6441 .loc 1 3050 5 is_stmt 1 view .LVU2261 +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6442 .loc 1 3050 23 is_stmt 0 view .LVU2262 + 6443 0046 0020 movs r0, #0 + 6444 0048 6064 str r0, [r4, #68] +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6445 .loc 1 3053 5 is_stmt 1 view .LVU2263 +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6446 .loc 1 3053 23 is_stmt 0 view .LVU2264 + 6447 004a 6562 str r5, [r4, #36] +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6448 .loc 1 3054 5 is_stmt 1 view .LVU2265 +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6449 .loc 1 3054 23 is_stmt 0 view .LVU2266 + 6450 004c 6385 strh r3, [r4, #42] @ movhi +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6451 .loc 1 3055 5 is_stmt 1 view .LVU2267 +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6452 .loc 1 3055 23 is_stmt 0 view .LVU2268 + 6453 004e 344B ldr r3, .L444 + 6454 0050 E362 str r3, [r4, #44] +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6455 .loc 1 3056 5 is_stmt 1 view .LVU2269 +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6456 .loc 1 3056 23 is_stmt 0 view .LVU2270 + 6457 0052 344B ldr r3, .L444+4 + 6458 0054 6363 str r3, [r4, #52] +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6459 .loc 1 3057 5 is_stmt 1 view .LVU2271 +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6460 .loc 1 3057 23 is_stmt 0 view .LVU2272 + 6461 0056 E664 str r6, [r4, #76] +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6462 .loc 1 3059 5 is_stmt 1 view .LVU2273 +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6463 .loc 1 3059 13 is_stmt 0 view .LVU2274 + 6464 0058 638D ldrh r3, [r4, #42] + 6465 005a 9BB2 uxth r3, r3 + ARM GAS /tmp/ccNVyn8W.s page 279 + + +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6466 .loc 1 3059 8 view .LVU2275 + 6467 005c FF2B cmp r3, #255 + 6468 005e 30D9 bls .L430 +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6469 .loc 1 3061 7 is_stmt 1 view .LVU2276 +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6470 .loc 1 3061 22 is_stmt 0 view .LVU2277 + 6471 0060 FF23 movs r3, #255 + 6472 0062 2385 strh r3, [r4, #40] @ movhi + 6473 .L431: +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6474 .loc 1 3069 5 is_stmt 1 view .LVU2278 +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6475 .loc 1 3069 8 is_stmt 0 view .LVU2279 + 6476 0064 012F cmp r7, #1 + 6477 0066 2FD0 beq .L442 +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6478 .loc 1 3081 7 is_stmt 1 view .LVU2280 +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6479 .loc 1 3081 30 is_stmt 0 view .LVU2281 + 6480 0068 130A lsrs r3, r2, #8 +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6481 .loc 1 3081 28 view .LVU2282 + 6482 006a 8B62 str r3, [r1, #40] +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6483 .loc 1 3084 7 is_stmt 1 view .LVU2283 +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6484 .loc 1 3084 26 is_stmt 0 view .LVU2284 + 6485 006c D2B2 uxtb r2, r2 + 6486 .LVL414: +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6487 .loc 1 3084 24 view .LVU2285 + 6488 006e 2265 str r2, [r4, #80] + 6489 .L433: +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6490 .loc 1 3087 5 is_stmt 1 view .LVU2286 +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6491 .loc 1 3087 13 is_stmt 0 view .LVU2287 + 6492 0070 E36B ldr r3, [r4, #60] +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6493 .loc 1 3087 8 view .LVU2288 + 6494 0072 002B cmp r3, #0 + 6495 0074 2ED0 beq .L434 +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6496 .loc 1 3090 7 is_stmt 1 view .LVU2289 +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6497 .loc 1 3090 38 is_stmt 0 view .LVU2290 + 6498 0076 2C4A ldr r2, .L444+8 + 6499 0078 9A62 str r2, [r3, #40] +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6500 .loc 1 3093 7 is_stmt 1 view .LVU2291 +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6501 .loc 1 3093 11 is_stmt 0 view .LVU2292 + 6502 007a E36B ldr r3, [r4, #60] +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6503 .loc 1 3093 39 view .LVU2293 + ARM GAS /tmp/ccNVyn8W.s page 280 + + + 6504 007c 2B4A ldr r2, .L444+12 + 6505 007e 1A63 str r2, [r3, #48] +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6506 .loc 1 3096 7 is_stmt 1 view .LVU2294 +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6507 .loc 1 3096 11 is_stmt 0 view .LVU2295 + 6508 0080 E26B ldr r2, [r4, #60] +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6509 .loc 1 3096 42 view .LVU2296 + 6510 0082 0023 movs r3, #0 + 6511 0084 D362 str r3, [r2, #44] +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6512 .loc 1 3097 7 is_stmt 1 view .LVU2297 +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6513 .loc 1 3097 11 is_stmt 0 view .LVU2298 + 6514 0086 E26B ldr r2, [r4, #60] +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6515 .loc 1 3097 39 view .LVU2299 + 6516 0088 5363 str r3, [r2, #52] +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6517 .loc 1 3100 7 is_stmt 1 view .LVU2300 +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6518 .loc 1 3100 69 is_stmt 0 view .LVU2301 + 6519 008a 2168 ldr r1, [r4] +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6520 .loc 1 3100 23 view .LVU2302 + 6521 008c 238D ldrh r3, [r4, #40] + 6522 008e 2A46 mov r2, r5 + 6523 0090 2431 adds r1, r1, #36 + 6524 0092 E06B ldr r0, [r4, #60] + 6525 0094 FFF7FEFF bl HAL_DMA_Start_IT + 6526 .LVL415: +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6527 .loc 1 3118 5 is_stmt 1 view .LVU2303 +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6528 .loc 1 3118 8 is_stmt 0 view .LVU2304 + 6529 0098 0546 mov r5, r0 + 6530 009a 48B3 cbz r0, .L443 +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6531 .loc 1 3138 7 is_stmt 1 view .LVU2305 +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6532 .loc 1 3138 23 is_stmt 0 view .LVU2306 + 6533 009c 2023 movs r3, #32 + 6534 009e 84F84130 strb r3, [r4, #65] +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6535 .loc 1 3139 7 is_stmt 1 view .LVU2307 +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6536 .loc 1 3139 23 is_stmt 0 view .LVU2308 + 6537 00a2 0022 movs r2, #0 + 6538 00a4 84F84220 strb r2, [r4, #66] +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6539 .loc 1 3142 7 is_stmt 1 view .LVU2309 +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6540 .loc 1 3142 11 is_stmt 0 view .LVU2310 + 6541 00a8 636C ldr r3, [r4, #68] +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6542 .loc 1 3142 23 view .LVU2311 + ARM GAS /tmp/ccNVyn8W.s page 281 + + + 6543 00aa 43F01003 orr r3, r3, #16 + 6544 00ae 6364 str r3, [r4, #68] +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6545 .loc 1 3145 7 is_stmt 1 view .LVU2312 +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6546 .loc 1 3145 7 view .LVU2313 + 6547 00b0 84F84020 strb r2, [r4, #64] +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6548 .loc 1 3145 7 view .LVU2314 +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6549 .loc 1 3147 7 view .LVU2315 +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6550 .loc 1 3147 14 is_stmt 0 view .LVU2316 + 6551 00b4 0125 movs r5, #1 + 6552 00b6 2CE0 b .L427 + 6553 .LVL416: + 6554 .L428: +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6555 .loc 1 3036 7 is_stmt 1 view .LVU2317 +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6556 .loc 1 3036 23 is_stmt 0 view .LVU2318 + 6557 00b8 4FF40073 mov r3, #512 + 6558 00bc 6364 str r3, [r4, #68] +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6559 .loc 1 3037 7 is_stmt 1 view .LVU2319 +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6560 .loc 1 3037 15 is_stmt 0 view .LVU2320 + 6561 00be 0125 movs r5, #1 + 6562 00c0 27E0 b .L427 + 6563 .LVL417: + 6564 .L430: +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6565 .loc 1 3065 7 is_stmt 1 view .LVU2321 +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6566 .loc 1 3065 28 is_stmt 0 view .LVU2322 + 6567 00c2 638D ldrh r3, [r4, #42] +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6568 .loc 1 3065 22 view .LVU2323 + 6569 00c4 2385 strh r3, [r4, #40] @ movhi + 6570 00c6 CDE7 b .L431 + 6571 .L442: +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6572 .loc 1 3072 7 is_stmt 1 view .LVU2324 +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6573 .loc 1 3072 30 is_stmt 0 view .LVU2325 + 6574 00c8 D2B2 uxtb r2, r2 + 6575 .LVL418: +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6576 .loc 1 3072 28 view .LVU2326 + 6577 00ca 8A62 str r2, [r1, #40] +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6578 .loc 1 3075 7 is_stmt 1 view .LVU2327 +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6579 .loc 1 3075 24 is_stmt 0 view .LVU2328 + 6580 00cc 4FF0FF33 mov r3, #-1 + 6581 00d0 2365 str r3, [r4, #80] + 6582 00d2 CDE7 b .L433 + ARM GAS /tmp/ccNVyn8W.s page 282 + + + 6583 .L434: +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6584 .loc 1 3106 7 is_stmt 1 view .LVU2329 +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6585 .loc 1 3106 23 is_stmt 0 view .LVU2330 + 6586 00d4 2023 movs r3, #32 + 6587 00d6 84F84130 strb r3, [r4, #65] +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6588 .loc 1 3107 7 is_stmt 1 view .LVU2331 +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6589 .loc 1 3107 23 is_stmt 0 view .LVU2332 + 6590 00da 0022 movs r2, #0 + 6591 00dc 84F84220 strb r2, [r4, #66] +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6592 .loc 1 3110 7 is_stmt 1 view .LVU2333 +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6593 .loc 1 3110 11 is_stmt 0 view .LVU2334 + 6594 00e0 636C ldr r3, [r4, #68] +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6595 .loc 1 3110 23 view .LVU2335 + 6596 00e2 43F08003 orr r3, r3, #128 + 6597 00e6 6364 str r3, [r4, #68] +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6598 .loc 1 3113 7 is_stmt 1 view .LVU2336 +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6599 .loc 1 3113 7 view .LVU2337 + 6600 00e8 84F84020 strb r2, [r4, #64] +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6601 .loc 1 3113 7 view .LVU2338 +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6602 .loc 1 3115 7 view .LVU2339 +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6603 .loc 1 3115 14 is_stmt 0 view .LVU2340 + 6604 00ec 0125 movs r5, #1 + 6605 00ee 10E0 b .L427 + 6606 .LVL419: + 6607 .L443: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6608 .loc 1 3121 7 is_stmt 1 view .LVU2341 + 6609 00f0 0F4B ldr r3, .L444+16 + 6610 00f2 0093 str r3, [sp] + 6611 00f4 0023 movs r3, #0 + 6612 00f6 FAB2 uxtb r2, r7 + 6613 00f8 3146 mov r1, r6 + 6614 00fa 2046 mov r0, r4 + 6615 .LVL420: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6616 .loc 1 3121 7 is_stmt 0 view .LVU2342 + 6617 00fc FFF7FEFF bl I2C_TransferConfig + 6618 .LVL421: +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6619 .loc 1 3124 7 is_stmt 1 view .LVU2343 +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6620 .loc 1 3124 7 view .LVU2344 + 6621 0100 0023 movs r3, #0 + 6622 0102 84F84030 strb r3, [r4, #64] +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 283 + + + 6623 .loc 1 3124 7 view .LVU2345 +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6624 .loc 1 3133 7 view .LVU2346 + 6625 0106 0121 movs r1, #1 + 6626 0108 2046 mov r0, r4 + 6627 010a FFF7FEFF bl I2C_Enable_IRQ + 6628 .LVL422: +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6629 .loc 1 3150 5 view .LVU2347 +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6630 .loc 1 3150 12 is_stmt 0 view .LVU2348 + 6631 010e 00E0 b .L427 + 6632 .LVL423: + 6633 .L437: +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6634 .loc 1 3154 12 view .LVU2349 + 6635 0110 0225 movs r5, #2 + 6636 .LVL424: + 6637 .L427: +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6638 .loc 1 3156 1 view .LVU2350 + 6639 0112 2846 mov r0, r5 + 6640 0114 03B0 add sp, sp, #12 + 6641 .cfi_remember_state + 6642 .cfi_def_cfa_offset 20 + 6643 @ sp needed + 6644 0116 F0BD pop {r4, r5, r6, r7, pc} + 6645 .LVL425: + 6646 .L438: + 6647 .cfi_restore_state +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6648 .loc 1 3042 14 view .LVU2351 + 6649 0118 0225 movs r5, #2 + 6650 011a FAE7 b .L427 + 6651 .L439: +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6652 .loc 1 3046 5 discriminator 1 view .LVU2352 + 6653 011c 0225 movs r5, #2 + 6654 011e F8E7 b .L427 + 6655 .L445: + 6656 .align 2 + 6657 .L444: + 6658 0120 0000FFFF .word -65536 + 6659 0124 00000000 .word I2C_Mem_ISR_DMA + 6660 0128 00000000 .word I2C_DMAMasterReceiveCplt + 6661 012c 00000000 .word I2C_DMAError + 6662 0130 00200080 .word -2147475456 + 6663 .cfi_endproc + 6664 .LFE151: + 6666 .section .text.HAL_I2C_IsDeviceReady,"ax",%progbits + 6667 .align 1 + 6668 .global HAL_I2C_IsDeviceReady + 6669 .syntax unified + 6670 .thumb + 6671 .thumb_func + 6673 HAL_I2C_IsDeviceReady: + 6674 .LVL426: + ARM GAS /tmp/ccNVyn8W.s page 284 + + + 6675 .LFB152: +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 6676 .loc 1 3171 1 is_stmt 1 view -0 + 6677 .cfi_startproc + 6678 @ args = 0, pretend = 0, frame = 8 + 6679 @ frame_needed = 0, uses_anonymous_args = 0 +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 6680 .loc 1 3171 1 is_stmt 0 view .LVU2354 + 6681 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 6682 .cfi_def_cfa_offset 28 + 6683 .cfi_offset 4, -28 + 6684 .cfi_offset 5, -24 + 6685 .cfi_offset 6, -20 + 6686 .cfi_offset 7, -16 + 6687 .cfi_offset 8, -12 + 6688 .cfi_offset 9, -8 + 6689 .cfi_offset 14, -4 + 6690 0004 85B0 sub sp, sp, #20 + 6691 .cfi_def_cfa_offset 48 + 6692 0006 1D46 mov r5, r3 +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6693 .loc 1 3172 3 is_stmt 1 view .LVU2355 +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6694 .loc 1 3174 3 view .LVU2356 +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6695 .loc 1 3174 17 is_stmt 0 view .LVU2357 + 6696 0008 0023 movs r3, #0 + 6697 .LVL427: +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6698 .loc 1 3174 17 view .LVU2358 + 6699 000a 0393 str r3, [sp, #12] +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp2; + 6700 .loc 1 3176 3 is_stmt 1 view .LVU2359 +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6701 .loc 1 3177 3 view .LVU2360 +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6702 .loc 1 3179 3 view .LVU2361 +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6703 .loc 1 3179 11 is_stmt 0 view .LVU2362 + 6704 000c 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 6705 0010 DBB2 uxtb r3, r3 +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6706 .loc 1 3179 6 view .LVU2363 + 6707 0012 202B cmp r3, #32 + 6708 0014 40F0A080 bne .L458 + 6709 0018 0646 mov r6, r0 + 6710 001a 8946 mov r9, r1 + 6711 001c 9046 mov r8, r2 +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6712 .loc 1 3181 5 is_stmt 1 view .LVU2364 +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6713 .loc 1 3181 9 is_stmt 0 view .LVU2365 + 6714 001e 0368 ldr r3, [r0] + 6715 0020 9B69 ldr r3, [r3, #24] +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6716 .loc 1 3181 8 view .LVU2366 + 6717 0022 13F4004F tst r3, #32768 + ARM GAS /tmp/ccNVyn8W.s page 285 + + + 6718 0026 40F09980 bne .L459 +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6719 .loc 1 3187 5 is_stmt 1 view .LVU2367 +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6720 .loc 1 3187 5 view .LVU2368 + 6721 002a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 6722 002e 012B cmp r3, #1 + 6723 0030 00F09680 beq .L460 +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6724 .loc 1 3187 5 discriminator 2 view .LVU2369 + 6725 0034 0123 movs r3, #1 + 6726 0036 80F84030 strb r3, [r0, #64] +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6727 .loc 1 3187 5 discriminator 2 view .LVU2370 +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6728 .loc 1 3189 5 view .LVU2371 +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6729 .loc 1 3189 17 is_stmt 0 view .LVU2372 + 6730 003a 2423 movs r3, #36 + 6731 003c 80F84130 strb r3, [r0, #65] +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6732 .loc 1 3190 5 is_stmt 1 view .LVU2373 +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6733 .loc 1 3190 21 is_stmt 0 view .LVU2374 + 6734 0040 0023 movs r3, #0 + 6735 0042 4364 str r3, [r0, #68] + 6736 0044 44E0 b .L457 + 6737 .LVL428: + 6738 .L468: +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6739 .loc 1 3195 29 discriminator 1 view .LVU2375 + 6740 0046 C9F30903 ubfx r3, r9, #0, #10 + 6741 004a 43F00073 orr r3, r3, #33554432 + 6742 004e 43F40053 orr r3, r3, #8192 + 6743 0052 46E0 b .L449 + 6744 .LVL429: + 6745 .L451: +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6746 .loc 1 3223 9 is_stmt 1 view .LVU2376 +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6747 .loc 1 3223 16 is_stmt 0 view .LVU2377 + 6748 0054 3368 ldr r3, [r6] + 6749 0056 9C69 ldr r4, [r3, #24] + 6750 .LVL430: +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6751 .loc 1 3223 16 view .LVU2378 + 6752 0058 C4F34014 ubfx r4, r4, #5, #1 + 6753 .LVL431: +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6754 .loc 1 3224 9 is_stmt 1 view .LVU2379 +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6755 .loc 1 3224 16 is_stmt 0 view .LVU2380 + 6756 005c 9B69 ldr r3, [r3, #24] + 6757 005e C3F30013 ubfx r3, r3, #4, #1 + 6758 .LVL432: + 6759 .L450: +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 286 + + + 6760 .loc 1 3204 30 is_stmt 1 view .LVU2381 + 6761 0062 C4B9 cbnz r4, .L453 +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6762 .loc 1 3204 30 is_stmt 0 discriminator 1 view .LVU2382 + 6763 0064 BBB9 cbnz r3, .L453 +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6764 .loc 1 3206 9 is_stmt 1 view .LVU2383 +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6765 .loc 1 3206 12 is_stmt 0 view .LVU2384 + 6766 0066 B5F1FF3F cmp r5, #-1 + 6767 006a F3D0 beq .L451 +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6768 .loc 1 3208 11 is_stmt 1 view .LVU2385 +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6769 .loc 1 3208 17 is_stmt 0 view .LVU2386 + 6770 006c FFF7FEFF bl HAL_GetTick + 6771 .LVL433: +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6772 .loc 1 3208 31 discriminator 1 view .LVU2387 + 6773 0070 C01B subs r0, r0, r7 +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6774 .loc 1 3208 14 discriminator 1 view .LVU2388 + 6775 0072 A842 cmp r0, r5 + 6776 0074 01D8 bhi .L452 +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6777 .loc 1 3208 55 discriminator 1 view .LVU2389 + 6778 0076 002D cmp r5, #0 + 6779 0078 ECD1 bne .L451 + 6780 .L452: +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6781 .loc 1 3211 13 is_stmt 1 view .LVU2390 +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6782 .loc 1 3211 25 is_stmt 0 view .LVU2391 + 6783 007a 2023 movs r3, #32 + 6784 007c 86F84130 strb r3, [r6, #65] +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6785 .loc 1 3214 13 is_stmt 1 view .LVU2392 +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6786 .loc 1 3214 17 is_stmt 0 view .LVU2393 + 6787 0080 736C ldr r3, [r6, #68] +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6788 .loc 1 3214 29 view .LVU2394 + 6789 0082 43F02003 orr r3, r3, #32 + 6790 0086 7364 str r3, [r6, #68] +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6791 .loc 1 3217 13 is_stmt 1 view .LVU2395 +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6792 .loc 1 3217 13 view .LVU2396 + 6793 0088 0023 movs r3, #0 + 6794 008a 86F84030 strb r3, [r6, #64] +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6795 .loc 1 3217 13 view .LVU2397 +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6796 .loc 1 3219 13 view .LVU2398 +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6797 .loc 1 3219 20 is_stmt 0 view .LVU2399 + 6798 008e 0120 movs r0, #1 + ARM GAS /tmp/ccNVyn8W.s page 287 + + + 6799 .LVL434: + 6800 .L447: +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6801 .loc 1 3297 1 view .LVU2400 + 6802 0090 05B0 add sp, sp, #20 + 6803 .cfi_remember_state + 6804 .cfi_def_cfa_offset 28 + 6805 @ sp needed + 6806 0092 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 6807 .LVL435: + 6808 .L453: + 6809 .cfi_restore_state +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6810 .loc 1 3228 7 is_stmt 1 view .LVU2401 +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6811 .loc 1 3228 11 is_stmt 0 view .LVU2402 + 6812 0096 3368 ldr r3, [r6] + 6813 .LVL436: +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6814 .loc 1 3228 11 view .LVU2403 + 6815 0098 9B69 ldr r3, [r3, #24] +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6816 .loc 1 3228 10 view .LVU2404 + 6817 009a 13F0100F tst r3, #16 + 6818 009e 2DD0 beq .L465 +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6819 .loc 1 3250 9 is_stmt 1 view .LVU2405 +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6820 .loc 1 3250 13 is_stmt 0 view .LVU2406 + 6821 00a0 0097 str r7, [sp] + 6822 00a2 2B46 mov r3, r5 + 6823 00a4 0022 movs r2, #0 + 6824 00a6 2021 movs r1, #32 + 6825 00a8 3046 mov r0, r6 + 6826 00aa FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6827 .LVL437: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6828 .loc 1 3250 12 discriminator 1 view .LVU2407 + 6829 00ae 0028 cmp r0, #0 + 6830 00b0 5AD1 bne .L462 +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6831 .loc 1 3256 9 is_stmt 1 view .LVU2408 + 6832 00b2 3368 ldr r3, [r6] + 6833 00b4 1022 movs r2, #16 + 6834 00b6 DA61 str r2, [r3, #28] +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6835 .loc 1 3259 9 view .LVU2409 + 6836 00b8 3368 ldr r3, [r6] + 6837 00ba 2022 movs r2, #32 + 6838 00bc DA61 str r2, [r3, #28] +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6839 .loc 1 3263 7 view .LVU2410 +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6840 .loc 1 3263 22 is_stmt 0 view .LVU2411 + 6841 00be 039B ldr r3, [sp, #12] +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6842 .loc 1 3263 10 view .LVU2412 + ARM GAS /tmp/ccNVyn8W.s page 288 + + + 6843 00c0 4345 cmp r3, r8 + 6844 00c2 2CD0 beq .L466 + 6845 .L456: +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 6846 .loc 1 3279 7 is_stmt 1 view .LVU2413 +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 6847 .loc 1 3279 17 is_stmt 0 view .LVU2414 + 6848 00c4 039B ldr r3, [sp, #12] + 6849 00c6 0133 adds r3, r3, #1 + 6850 00c8 0393 str r3, [sp, #12] +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6851 .loc 1 3280 25 is_stmt 1 view .LVU2415 + 6852 00ca 039B ldr r3, [sp, #12] + 6853 00cc 4345 cmp r3, r8 + 6854 00ce 37D2 bcs .L467 + 6855 .LVL438: + 6856 .L457: +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6857 .loc 1 3192 5 view .LVU2416 +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6858 .loc 1 3195 7 view .LVU2417 +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6859 .loc 1 3195 29 is_stmt 0 view .LVU2418 + 6860 00d0 F368 ldr r3, [r6, #12] + 6861 00d2 012B cmp r3, #1 + 6862 00d4 B7D0 beq .L468 +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6863 .loc 1 3195 29 discriminator 2 view .LVU2419 + 6864 00d6 C9F30903 ubfx r3, r9, #0, #10 + 6865 00da 43F00073 orr r3, r3, #33554432 + 6866 00de 43F42053 orr r3, r3, #10240 + 6867 .L449: +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6868 .loc 1 3195 11 discriminator 4 view .LVU2420 + 6869 00e2 3268 ldr r2, [r6] +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6870 .loc 1 3195 27 discriminator 4 view .LVU2421 + 6871 00e4 5360 str r3, [r2, #4] +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6872 .loc 1 3199 7 is_stmt 1 view .LVU2422 +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6873 .loc 1 3199 19 is_stmt 0 view .LVU2423 + 6874 00e6 FFF7FEFF bl HAL_GetTick + 6875 .LVL439: + 6876 00ea 0746 mov r7, r0 + 6877 .LVL440: +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6878 .loc 1 3201 7 is_stmt 1 view .LVU2424 +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6879 .loc 1 3201 14 is_stmt 0 view .LVU2425 + 6880 00ec 3368 ldr r3, [r6] + 6881 00ee 9C69 ldr r4, [r3, #24] + 6882 00f0 C4F34014 ubfx r4, r4, #5, #1 + 6883 .LVL441: +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6884 .loc 1 3202 7 is_stmt 1 view .LVU2426 +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 289 + + + 6885 .loc 1 3202 14 is_stmt 0 view .LVU2427 + 6886 00f4 9B69 ldr r3, [r3, #24] + 6887 00f6 C3F30013 ubfx r3, r3, #4, #1 + 6888 .LVL442: +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6889 .loc 1 3204 7 is_stmt 1 view .LVU2428 +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6890 .loc 1 3204 13 is_stmt 0 view .LVU2429 + 6891 00fa B2E7 b .L450 + 6892 .LVL443: + 6893 .L465: +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6894 .loc 1 3231 9 is_stmt 1 view .LVU2430 +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6895 .loc 1 3231 13 is_stmt 0 view .LVU2431 + 6896 00fc 0097 str r7, [sp] + 6897 00fe 2B46 mov r3, r5 + 6898 0100 0022 movs r2, #0 + 6899 0102 2021 movs r1, #32 + 6900 0104 3046 mov r0, r6 + 6901 0106 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6902 .LVL444: +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6903 .loc 1 3231 12 discriminator 1 view .LVU2432 + 6904 010a 58BB cbnz r0, .L461 +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6905 .loc 1 3237 9 is_stmt 1 view .LVU2433 + 6906 010c 3268 ldr r2, [r6] + 6907 010e 2023 movs r3, #32 + 6908 0110 D361 str r3, [r2, #28] +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6909 .loc 1 3240 9 view .LVU2434 +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6910 .loc 1 3240 21 is_stmt 0 view .LVU2435 + 6911 0112 86F84130 strb r3, [r6, #65] +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6912 .loc 1 3243 9 is_stmt 1 view .LVU2436 +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6913 .loc 1 3243 9 view .LVU2437 + 6914 0116 0023 movs r3, #0 + 6915 0118 86F84030 strb r3, [r6, #64] +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6916 .loc 1 3243 9 view .LVU2438 +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6917 .loc 1 3245 9 view .LVU2439 +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6918 .loc 1 3245 16 is_stmt 0 view .LVU2440 + 6919 011c B8E7 b .L447 + 6920 .L466: +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6921 .loc 1 3266 9 is_stmt 1 view .LVU2441 +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6922 .loc 1 3266 13 is_stmt 0 view .LVU2442 + 6923 011e 3268 ldr r2, [r6] +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6924 .loc 1 3266 23 view .LVU2443 + 6925 0120 5368 ldr r3, [r2, #4] + ARM GAS /tmp/ccNVyn8W.s page 290 + + +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6926 .loc 1 3266 29 view .LVU2444 + 6927 0122 43F48043 orr r3, r3, #16384 + 6928 0126 5360 str r3, [r2, #4] +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6929 .loc 1 3269 9 is_stmt 1 view .LVU2445 +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6930 .loc 1 3269 13 is_stmt 0 view .LVU2446 + 6931 0128 0097 str r7, [sp] + 6932 012a 2B46 mov r3, r5 + 6933 012c 0022 movs r2, #0 + 6934 012e 2021 movs r1, #32 + 6935 0130 3046 mov r0, r6 + 6936 0132 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6937 .LVL445: +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6938 .loc 1 3269 12 discriminator 1 view .LVU2447 + 6939 0136 C8B9 cbnz r0, .L463 +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6940 .loc 1 3275 9 is_stmt 1 view .LVU2448 + 6941 0138 3368 ldr r3, [r6] + 6942 013a 2022 movs r2, #32 + 6943 013c DA61 str r2, [r3, #28] + 6944 013e C1E7 b .L456 + 6945 .L467: +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6946 .loc 1 3283 5 view .LVU2449 +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6947 .loc 1 3283 17 is_stmt 0 view .LVU2450 + 6948 0140 2023 movs r3, #32 + 6949 0142 86F84130 strb r3, [r6, #65] +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6950 .loc 1 3286 5 is_stmt 1 view .LVU2451 +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6951 .loc 1 3286 9 is_stmt 0 view .LVU2452 + 6952 0146 736C ldr r3, [r6, #68] +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6953 .loc 1 3286 21 view .LVU2453 + 6954 0148 43F02003 orr r3, r3, #32 + 6955 014c 7364 str r3, [r6, #68] +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6956 .loc 1 3289 5 is_stmt 1 view .LVU2454 +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6957 .loc 1 3289 5 view .LVU2455 + 6958 014e 0023 movs r3, #0 + 6959 0150 86F84030 strb r3, [r6, #64] +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6960 .loc 1 3289 5 view .LVU2456 +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6961 .loc 1 3291 5 view .LVU2457 +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6962 .loc 1 3291 12 is_stmt 0 view .LVU2458 + 6963 0154 0120 movs r0, #1 + 6964 0156 9BE7 b .L447 + 6965 .LVL446: + 6966 .L458: +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 291 + + + 6967 .loc 1 3295 12 view .LVU2459 + 6968 0158 0220 movs r0, #2 + 6969 .LVL447: +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6970 .loc 1 3295 12 view .LVU2460 + 6971 015a 99E7 b .L447 + 6972 .LVL448: + 6973 .L459: +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6974 .loc 1 3183 14 view .LVU2461 + 6975 015c 0220 movs r0, #2 + 6976 .LVL449: +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6977 .loc 1 3183 14 view .LVU2462 + 6978 015e 97E7 b .L447 + 6979 .LVL450: + 6980 .L460: +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6981 .loc 1 3187 5 discriminator 1 view .LVU2463 + 6982 0160 0220 movs r0, #2 + 6983 .LVL451: +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6984 .loc 1 3187 5 discriminator 1 view .LVU2464 + 6985 0162 95E7 b .L447 + 6986 .LVL452: + 6987 .L461: +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6988 .loc 1 3233 18 view .LVU2465 + 6989 0164 0120 movs r0, #1 + 6990 0166 93E7 b .L447 + 6991 .L462: +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6992 .loc 1 3252 18 view .LVU2466 + 6993 0168 0120 movs r0, #1 + 6994 016a 91E7 b .L447 + 6995 .L463: +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6996 .loc 1 3271 18 view .LVU2467 + 6997 016c 0120 movs r0, #1 + 6998 016e 8FE7 b .L447 + 6999 .cfi_endproc + 7000 .LFE152: + 7002 .section .text.HAL_I2C_Master_Seq_Transmit_IT,"ax",%progbits + 7003 .align 1 + 7004 .global HAL_I2C_Master_Seq_Transmit_IT + 7005 .syntax unified + 7006 .thumb + 7007 .thumb_func + 7009 HAL_I2C_Master_Seq_Transmit_IT: + 7010 .LVL453: + 7011 .LFB153: +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7012 .loc 1 3313 1 is_stmt 1 view -0 + 7013 .cfi_startproc + 7014 @ args = 4, pretend = 0, frame = 0 + 7015 @ frame_needed = 0, uses_anonymous_args = 0 +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + ARM GAS /tmp/ccNVyn8W.s page 292 + + + 7016 .loc 1 3313 1 is_stmt 0 view .LVU2469 + 7017 0000 70B5 push {r4, r5, r6, lr} + 7018 .cfi_def_cfa_offset 16 + 7019 .cfi_offset 4, -16 + 7020 .cfi_offset 5, -12 + 7021 .cfi_offset 6, -8 + 7022 .cfi_offset 14, -4 + 7023 0002 82B0 sub sp, sp, #8 + 7024 .cfi_def_cfa_offset 24 + 7025 0004 0446 mov r4, r0 +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 7026 .loc 1 3314 3 is_stmt 1 view .LVU2470 +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7027 .loc 1 3315 3 view .LVU2471 + 7028 .LVL454: +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7029 .loc 1 3318 3 view .LVU2472 +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7030 .loc 1 3320 3 view .LVU2473 +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7031 .loc 1 3320 11 is_stmt 0 view .LVU2474 + 7032 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7033 .LVL455: +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7034 .loc 1 3320 11 view .LVU2475 + 7035 000a C0B2 uxtb r0, r0 +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7036 .loc 1 3320 6 view .LVU2476 + 7037 000c 2028 cmp r0, #32 + 7038 000e 49D1 bne .L475 + 7039 0010 0D46 mov r5, r1 +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7040 .loc 1 3323 5 is_stmt 1 view .LVU2477 +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7041 .loc 1 3323 5 view .LVU2478 + 7042 0012 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7043 .LVL456: +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7044 .loc 1 3323 5 is_stmt 0 view .LVU2479 + 7045 0016 0129 cmp r1, #1 + 7046 0018 46D0 beq .L476 +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7047 .loc 1 3323 5 is_stmt 1 discriminator 2 view .LVU2480 + 7048 001a 0121 movs r1, #1 + 7049 001c 84F84010 strb r1, [r4, #64] +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7050 .loc 1 3323 5 discriminator 2 view .LVU2481 +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7051 .loc 1 3325 5 view .LVU2482 +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7052 .loc 1 3325 21 is_stmt 0 view .LVU2483 + 7053 0020 2121 movs r1, #33 + 7054 0022 84F84110 strb r1, [r4, #65] +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7055 .loc 1 3326 5 is_stmt 1 view .LVU2484 +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7056 .loc 1 3326 21 is_stmt 0 view .LVU2485 + ARM GAS /tmp/ccNVyn8W.s page 293 + + + 7057 0026 1021 movs r1, #16 + 7058 0028 84F84210 strb r1, [r4, #66] +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7059 .loc 1 3327 5 is_stmt 1 view .LVU2486 +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7060 .loc 1 3327 21 is_stmt 0 view .LVU2487 + 7061 002c 0021 movs r1, #0 + 7062 002e 6164 str r1, [r4, #68] +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7063 .loc 1 3330 5 is_stmt 1 view .LVU2488 +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7064 .loc 1 3330 23 is_stmt 0 view .LVU2489 + 7065 0030 6262 str r2, [r4, #36] +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7066 .loc 1 3331 5 is_stmt 1 view .LVU2490 +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7067 .loc 1 3331 23 is_stmt 0 view .LVU2491 + 7068 0032 6385 strh r3, [r4, #42] @ movhi +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7069 .loc 1 3332 5 is_stmt 1 view .LVU2492 +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7070 .loc 1 3332 23 is_stmt 0 view .LVU2493 + 7071 0034 069B ldr r3, [sp, #24] + 7072 .LVL457: +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7073 .loc 1 3332 23 view .LVU2494 + 7074 0036 E362 str r3, [r4, #44] + 7075 .LVL458: +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7076 .loc 1 3333 5 is_stmt 1 view .LVU2495 +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7077 .loc 1 3333 23 is_stmt 0 view .LVU2496 + 7078 0038 1C4B ldr r3, .L480 + 7079 003a 6363 str r3, [r4, #52] +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7080 .loc 1 3336 5 is_stmt 1 view .LVU2497 +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7081 .loc 1 3336 13 is_stmt 0 view .LVU2498 + 7082 003c 638D ldrh r3, [r4, #42] + 7083 003e 9BB2 uxth r3, r3 +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7084 .loc 1 3336 8 view .LVU2499 + 7085 0040 FF2B cmp r3, #255 + 7086 0042 0ED9 bls .L471 +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7087 .loc 1 3338 7 is_stmt 1 view .LVU2500 +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7088 .loc 1 3338 22 is_stmt 0 view .LVU2501 + 7089 0044 FF23 movs r3, #255 + 7090 0046 2385 strh r3, [r4, #40] @ movhi +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7091 .loc 1 3339 7 is_stmt 1 view .LVU2502 + 7092 .LVL459: +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7093 .loc 1 3339 16 is_stmt 0 view .LVU2503 + 7094 0048 4FF08076 mov r6, #16777216 + 7095 .LVL460: + ARM GAS /tmp/ccNVyn8W.s page 294 + + + 7096 .L472: +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7097 .loc 1 3350 5 is_stmt 1 view .LVU2504 +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7098 .loc 1 3350 14 is_stmt 0 view .LVU2505 + 7099 004c 236B ldr r3, [r4, #48] +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7100 .loc 1 3350 8 view .LVU2506 + 7101 004e 112B cmp r3, #17 + 7102 0050 0BD1 bne .L473 +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7103 .loc 1 3351 10 view .LVU2507 + 7104 0052 069B ldr r3, [sp, #24] + 7105 0054 AA2B cmp r3, #170 + 7106 0056 08D0 beq .L473 +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7107 .loc 1 3351 10 discriminator 2 view .LVU2508 + 7108 0058 B3F52A4F cmp r3, #43520 + 7109 005c 05D0 beq .L473 +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7110 .loc 1 3353 19 view .LVU2509 + 7111 005e 0023 movs r3, #0 + 7112 0060 0CE0 b .L474 + 7113 .LVL461: + 7114 .L471: +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7115 .loc 1 3343 7 is_stmt 1 view .LVU2510 +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7116 .loc 1 3343 28 is_stmt 0 view .LVU2511 + 7117 0062 638D ldrh r3, [r4, #42] +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7118 .loc 1 3343 22 view .LVU2512 + 7119 0064 2385 strh r3, [r4, #40] @ movhi +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7120 .loc 1 3344 7 is_stmt 1 view .LVU2513 +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7121 .loc 1 3344 16 is_stmt 0 view .LVU2514 + 7122 0066 E66A ldr r6, [r4, #44] + 7123 .LVL462: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7124 .loc 1 3344 16 view .LVU2515 + 7125 0068 F0E7 b .L472 + 7126 .L473: +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7127 .loc 1 3358 7 is_stmt 1 view .LVU2516 + 7128 006a 2046 mov r0, r4 + 7129 006c FFF7FEFF bl I2C_ConvertOtherXferOptions + 7130 .LVL463: +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7131 .loc 1 3361 7 view .LVU2517 +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7132 .loc 1 3361 15 is_stmt 0 view .LVU2518 + 7133 0070 638D ldrh r3, [r4, #42] + 7134 0072 9BB2 uxth r3, r3 +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7135 .loc 1 3361 10 view .LVU2519 + 7136 0074 FF2B cmp r3, #255 + ARM GAS /tmp/ccNVyn8W.s page 295 + + + 7137 0076 13D8 bhi .L478 +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7138 .loc 1 3363 9 is_stmt 1 view .LVU2520 +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7139 .loc 1 3363 18 is_stmt 0 view .LVU2521 + 7140 0078 E66A ldr r6, [r4, #44] + 7141 .LVL464: +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7142 .loc 1 3315 12 view .LVU2522 + 7143 007a 0D4B ldr r3, .L480+4 + 7144 .L474: + 7145 .LVL465: +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7146 .loc 1 3368 5 is_stmt 1 view .LVU2523 + 7147 007c 0093 str r3, [sp] + 7148 007e 3346 mov r3, r6 + 7149 .LVL466: +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7150 .loc 1 3368 5 is_stmt 0 view .LVU2524 + 7151 0080 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 7152 0084 2946 mov r1, r5 + 7153 0086 2046 mov r0, r4 + 7154 0088 FFF7FEFF bl I2C_TransferConfig + 7155 .LVL467: +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7156 .loc 1 3371 5 is_stmt 1 view .LVU2525 +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7157 .loc 1 3371 5 view .LVU2526 + 7158 008c 0025 movs r5, #0 + 7159 .LVL468: +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7160 .loc 1 3371 5 is_stmt 0 view .LVU2527 + 7161 008e 84F84050 strb r5, [r4, #64] +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7162 .loc 1 3371 5 is_stmt 1 view .LVU2528 +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7163 .loc 1 3380 5 view .LVU2529 + 7164 0092 0121 movs r1, #1 + 7165 0094 2046 mov r0, r4 + 7166 0096 FFF7FEFF bl I2C_Enable_IRQ + 7167 .LVL469: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7168 .loc 1 3382 5 view .LVU2530 +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7169 .loc 1 3382 12 is_stmt 0 view .LVU2531 + 7170 009a 2846 mov r0, r5 + 7171 .LVL470: + 7172 .L470: +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7173 .loc 1 3388 1 view .LVU2532 + 7174 009c 02B0 add sp, sp, #8 + 7175 .cfi_remember_state + 7176 .cfi_def_cfa_offset 16 + 7177 @ sp needed + 7178 009e 70BD pop {r4, r5, r6, pc} + 7179 .LVL471: + 7180 .L478: + ARM GAS /tmp/ccNVyn8W.s page 296 + + + 7181 .cfi_restore_state +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7182 .loc 1 3315 12 view .LVU2533 + 7183 00a0 034B ldr r3, .L480+4 + 7184 00a2 EBE7 b .L474 + 7185 .LVL472: + 7186 .L475: +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7187 .loc 1 3386 12 view .LVU2534 + 7188 00a4 0220 movs r0, #2 + 7189 00a6 F9E7 b .L470 + 7190 .LVL473: + 7191 .L476: +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7192 .loc 1 3323 5 discriminator 1 view .LVU2535 + 7193 00a8 0220 movs r0, #2 + 7194 00aa F7E7 b .L470 + 7195 .L481: + 7196 .align 2 + 7197 .L480: + 7198 00ac 00000000 .word I2C_Master_ISR_IT + 7199 00b0 00200080 .word -2147475456 + 7200 .cfi_endproc + 7201 .LFE153: + 7203 .section .text.HAL_I2C_Master_Seq_Transmit_DMA,"ax",%progbits + 7204 .align 1 + 7205 .global HAL_I2C_Master_Seq_Transmit_DMA + 7206 .syntax unified + 7207 .thumb + 7208 .thumb_func + 7210 HAL_I2C_Master_Seq_Transmit_DMA: + 7211 .LVL474: + 7212 .LFB154: +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7213 .loc 1 3404 1 is_stmt 1 view -0 + 7214 .cfi_startproc + 7215 @ args = 4, pretend = 0, frame = 0 + 7216 @ frame_needed = 0, uses_anonymous_args = 0 +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7217 .loc 1 3404 1 is_stmt 0 view .LVU2537 + 7218 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 7219 .cfi_def_cfa_offset 24 + 7220 .cfi_offset 4, -24 + 7221 .cfi_offset 5, -20 + 7222 .cfi_offset 6, -16 + 7223 .cfi_offset 7, -12 + 7224 .cfi_offset 8, -8 + 7225 .cfi_offset 14, -4 + 7226 0004 82B0 sub sp, sp, #8 + 7227 .cfi_def_cfa_offset 32 + 7228 0006 0446 mov r4, r0 + 7229 0008 1546 mov r5, r2 + 7230 000a 089A ldr r2, [sp, #32] + 7231 .LVL475: +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 7232 .loc 1 3405 3 is_stmt 1 view .LVU2538 +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + ARM GAS /tmp/ccNVyn8W.s page 297 + + + 7233 .loc 1 3406 3 view .LVU2539 +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7234 .loc 1 3407 3 view .LVU2540 +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7235 .loc 1 3410 3 view .LVU2541 +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7236 .loc 1 3412 3 view .LVU2542 +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7237 .loc 1 3412 11 is_stmt 0 view .LVU2543 + 7238 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7239 .LVL476: +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7240 .loc 1 3412 11 view .LVU2544 + 7241 0010 C0B2 uxtb r0, r0 +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7242 .loc 1 3412 6 view .LVU2545 + 7243 0012 2028 cmp r0, #32 + 7244 0014 40F09D80 bne .L493 + 7245 0018 0E46 mov r6, r1 +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7246 .loc 1 3415 5 is_stmt 1 view .LVU2546 +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7247 .loc 1 3415 5 view .LVU2547 + 7248 001a 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7249 .LVL477: +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7250 .loc 1 3415 5 is_stmt 0 view .LVU2548 + 7251 001e 0129 cmp r1, #1 + 7252 0020 00F09B80 beq .L494 +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7253 .loc 1 3415 5 is_stmt 1 discriminator 2 view .LVU2549 + 7254 0024 0121 movs r1, #1 + 7255 0026 84F84010 strb r1, [r4, #64] +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7256 .loc 1 3415 5 discriminator 2 view .LVU2550 +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7257 .loc 1 3417 5 view .LVU2551 +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7258 .loc 1 3417 21 is_stmt 0 view .LVU2552 + 7259 002a 2121 movs r1, #33 + 7260 002c 84F84110 strb r1, [r4, #65] +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7261 .loc 1 3418 5 is_stmt 1 view .LVU2553 +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7262 .loc 1 3418 21 is_stmt 0 view .LVU2554 + 7263 0030 1021 movs r1, #16 + 7264 0032 84F84210 strb r1, [r4, #66] +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7265 .loc 1 3419 5 is_stmt 1 view .LVU2555 +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7266 .loc 1 3419 21 is_stmt 0 view .LVU2556 + 7267 0036 0021 movs r1, #0 + 7268 0038 6164 str r1, [r4, #68] +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7269 .loc 1 3422 5 is_stmt 1 view .LVU2557 +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7270 .loc 1 3422 23 is_stmt 0 view .LVU2558 + ARM GAS /tmp/ccNVyn8W.s page 298 + + + 7271 003a 6562 str r5, [r4, #36] +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7272 .loc 1 3423 5 is_stmt 1 view .LVU2559 +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7273 .loc 1 3423 23 is_stmt 0 view .LVU2560 + 7274 003c 6385 strh r3, [r4, #42] @ movhi +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 7275 .loc 1 3424 5 is_stmt 1 view .LVU2561 +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 7276 .loc 1 3424 23 is_stmt 0 view .LVU2562 + 7277 003e E262 str r2, [r4, #44] +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7278 .loc 1 3425 5 is_stmt 1 view .LVU2563 +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7279 .loc 1 3425 23 is_stmt 0 view .LVU2564 + 7280 0040 474B ldr r3, .L500 + 7281 .LVL478: +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7282 .loc 1 3425 23 view .LVU2565 + 7283 0042 6363 str r3, [r4, #52] +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7284 .loc 1 3428 5 is_stmt 1 view .LVU2566 +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7285 .loc 1 3428 13 is_stmt 0 view .LVU2567 + 7286 0044 638D ldrh r3, [r4, #42] + 7287 0046 9BB2 uxth r3, r3 +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7288 .loc 1 3428 8 view .LVU2568 + 7289 0048 FF2B cmp r3, #255 + 7290 004a 0ED9 bls .L484 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7291 .loc 1 3430 7 is_stmt 1 view .LVU2569 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7292 .loc 1 3430 22 is_stmt 0 view .LVU2570 + 7293 004c FF23 movs r3, #255 + 7294 004e 2385 strh r3, [r4, #40] @ movhi +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7295 .loc 1 3431 7 is_stmt 1 view .LVU2571 + 7296 .LVL479: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7297 .loc 1 3431 16 is_stmt 0 view .LVU2572 + 7298 0050 4FF08077 mov r7, #16777216 + 7299 .LVL480: + 7300 .L485: +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7301 .loc 1 3442 5 is_stmt 1 view .LVU2573 +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7302 .loc 1 3442 14 is_stmt 0 view .LVU2574 + 7303 0054 236B ldr r3, [r4, #48] +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7304 .loc 1 3442 8 view .LVU2575 + 7305 0056 112B cmp r3, #17 + 7306 0058 0BD1 bne .L486 +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7307 .loc 1 3443 10 view .LVU2576 + 7308 005a AA2A cmp r2, #170 + 7309 005c 09D0 beq .L486 + ARM GAS /tmp/ccNVyn8W.s page 299 + + +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7310 .loc 1 3443 10 discriminator 2 view .LVU2577 + 7311 005e B2F52A4F cmp r2, #43520 + 7312 0062 06D0 beq .L486 +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7313 .loc 1 3445 19 view .LVU2578 + 7314 0064 4FF00008 mov r8, #0 + 7315 0068 0DE0 b .L487 + 7316 .LVL481: + 7317 .L484: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7318 .loc 1 3435 7 is_stmt 1 view .LVU2579 +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7319 .loc 1 3435 28 is_stmt 0 view .LVU2580 + 7320 006a 638D ldrh r3, [r4, #42] +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7321 .loc 1 3435 22 view .LVU2581 + 7322 006c 2385 strh r3, [r4, #40] @ movhi +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7323 .loc 1 3436 7 is_stmt 1 view .LVU2582 +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7324 .loc 1 3436 16 is_stmt 0 view .LVU2583 + 7325 006e E76A ldr r7, [r4, #44] + 7326 .LVL482: +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7327 .loc 1 3436 16 view .LVU2584 + 7328 0070 F0E7 b .L485 + 7329 .L486: +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7330 .loc 1 3450 7 is_stmt 1 view .LVU2585 + 7331 0072 2046 mov r0, r4 + 7332 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 7333 .LVL483: +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7334 .loc 1 3453 7 view .LVU2586 +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7335 .loc 1 3453 15 is_stmt 0 view .LVU2587 + 7336 0078 638D ldrh r3, [r4, #42] + 7337 007a 9BB2 uxth r3, r3 +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7338 .loc 1 3453 10 view .LVU2588 + 7339 007c FF2B cmp r3, #255 + 7340 007e 27D8 bhi .L496 +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7341 .loc 1 3455 9 is_stmt 1 view .LVU2589 +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7342 .loc 1 3455 18 is_stmt 0 view .LVU2590 + 7343 0080 E76A ldr r7, [r4, #44] + 7344 .LVL484: +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7345 .loc 1 3406 12 view .LVU2591 + 7346 0082 DFF8EC80 ldr r8, .L500+16 + 7347 .L487: + 7348 .LVL485: +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7349 .loc 1 3459 5 is_stmt 1 view .LVU2592 +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 300 + + + 7350 .loc 1 3459 13 is_stmt 0 view .LVU2593 + 7351 0086 228D ldrh r2, [r4, #40] +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7352 .loc 1 3459 8 view .LVU2594 + 7353 0088 002A cmp r2, #0 + 7354 008a 4ED0 beq .L488 +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7355 .loc 1 3461 7 is_stmt 1 view .LVU2595 +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7356 .loc 1 3461 15 is_stmt 0 view .LVU2596 + 7357 008c A36B ldr r3, [r4, #56] +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7358 .loc 1 3461 10 view .LVU2597 + 7359 008e 13B3 cbz r3, .L489 +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7360 .loc 1 3464 9 is_stmt 1 view .LVU2598 +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7361 .loc 1 3464 40 is_stmt 0 view .LVU2599 + 7362 0090 344A ldr r2, .L500+4 + 7363 0092 9A62 str r2, [r3, #40] +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7364 .loc 1 3467 9 is_stmt 1 view .LVU2600 +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7365 .loc 1 3467 13 is_stmt 0 view .LVU2601 + 7366 0094 A36B ldr r3, [r4, #56] +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7367 .loc 1 3467 41 view .LVU2602 + 7368 0096 344A ldr r2, .L500+8 + 7369 0098 1A63 str r2, [r3, #48] +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7370 .loc 1 3470 9 is_stmt 1 view .LVU2603 +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7371 .loc 1 3470 13 is_stmt 0 view .LVU2604 + 7372 009a A26B ldr r2, [r4, #56] +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7373 .loc 1 3470 44 view .LVU2605 + 7374 009c 0023 movs r3, #0 + 7375 009e D362 str r3, [r2, #44] +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7376 .loc 1 3471 9 is_stmt 1 view .LVU2606 +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7377 .loc 1 3471 13 is_stmt 0 view .LVU2607 + 7378 00a0 A26B ldr r2, [r4, #56] +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7379 .loc 1 3471 41 view .LVU2608 + 7380 00a2 5363 str r3, [r2, #52] +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 7381 .loc 1 3474 9 is_stmt 1 view .LVU2609 +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 7382 .loc 1 3474 88 is_stmt 0 view .LVU2610 + 7383 00a4 2268 ldr r2, [r4] +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 7384 .loc 1 3474 25 view .LVU2611 + 7385 00a6 238D ldrh r3, [r4, #40] + 7386 00a8 2832 adds r2, r2, #40 + 7387 00aa 2946 mov r1, r5 + 7388 00ac A06B ldr r0, [r4, #56] + ARM GAS /tmp/ccNVyn8W.s page 301 + + + 7389 00ae FFF7FEFF bl HAL_DMA_Start_IT + 7390 .LVL486: +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7391 .loc 1 3492 7 is_stmt 1 view .LVU2612 +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7392 .loc 1 3492 10 is_stmt 0 view .LVU2613 + 7393 00b2 F0B1 cbz r0, .L499 +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7394 .loc 1 3515 9 is_stmt 1 view .LVU2614 +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7395 .loc 1 3515 25 is_stmt 0 view .LVU2615 + 7396 00b4 2023 movs r3, #32 + 7397 00b6 84F84130 strb r3, [r4, #65] +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7398 .loc 1 3516 9 is_stmt 1 view .LVU2616 +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7399 .loc 1 3516 25 is_stmt 0 view .LVU2617 + 7400 00ba 0022 movs r2, #0 + 7401 00bc 84F84220 strb r2, [r4, #66] +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7402 .loc 1 3519 9 is_stmt 1 view .LVU2618 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7403 .loc 1 3519 13 is_stmt 0 view .LVU2619 + 7404 00c0 636C ldr r3, [r4, #68] +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7405 .loc 1 3519 25 view .LVU2620 + 7406 00c2 43F01003 orr r3, r3, #16 + 7407 00c6 6364 str r3, [r4, #68] +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7408 .loc 1 3522 9 is_stmt 1 view .LVU2621 +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7409 .loc 1 3522 9 view .LVU2622 + 7410 00c8 84F84020 strb r2, [r4, #64] +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7411 .loc 1 3522 9 view .LVU2623 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7412 .loc 1 3524 9 view .LVU2624 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7413 .loc 1 3524 16 is_stmt 0 view .LVU2625 + 7414 00cc 0120 movs r0, #1 + 7415 .LVL487: +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7416 .loc 1 3524 16 view .LVU2626 + 7417 00ce 41E0 b .L483 + 7418 .LVL488: + 7419 .L496: +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7420 .loc 1 3406 12 view .LVU2627 + 7421 00d0 DFF89C80 ldr r8, .L500+16 + 7422 00d4 D7E7 b .L487 + 7423 .LVL489: + 7424 .L489: +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7425 .loc 1 3480 9 is_stmt 1 view .LVU2628 +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7426 .loc 1 3480 25 is_stmt 0 view .LVU2629 + 7427 00d6 2023 movs r3, #32 + ARM GAS /tmp/ccNVyn8W.s page 302 + + + 7428 00d8 84F84130 strb r3, [r4, #65] +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7429 .loc 1 3481 9 is_stmt 1 view .LVU2630 +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7430 .loc 1 3481 25 is_stmt 0 view .LVU2631 + 7431 00dc 0022 movs r2, #0 + 7432 00de 84F84220 strb r2, [r4, #66] +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7433 .loc 1 3484 9 is_stmt 1 view .LVU2632 +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7434 .loc 1 3484 13 is_stmt 0 view .LVU2633 + 7435 00e2 636C ldr r3, [r4, #68] +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7436 .loc 1 3484 25 view .LVU2634 + 7437 00e4 43F08003 orr r3, r3, #128 + 7438 00e8 6364 str r3, [r4, #68] +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7439 .loc 1 3487 9 is_stmt 1 view .LVU2635 +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7440 .loc 1 3487 9 view .LVU2636 + 7441 00ea 84F84020 strb r2, [r4, #64] +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7442 .loc 1 3487 9 view .LVU2637 +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7443 .loc 1 3489 9 view .LVU2638 +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7444 .loc 1 3489 16 is_stmt 0 view .LVU2639 + 7445 00ee 0120 movs r0, #1 + 7446 00f0 30E0 b .L483 + 7447 .LVL490: + 7448 .L499: +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7449 .loc 1 3495 9 is_stmt 1 view .LVU2640 + 7450 00f2 CDF80080 str r8, [sp] + 7451 00f6 3B46 mov r3, r7 + 7452 00f8 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 7453 00fc 3146 mov r1, r6 + 7454 00fe 2046 mov r0, r4 + 7455 .LVL491: +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7456 .loc 1 3495 9 is_stmt 0 view .LVU2641 + 7457 0100 FFF7FEFF bl I2C_TransferConfig + 7458 .LVL492: +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7459 .loc 1 3498 9 is_stmt 1 view .LVU2642 +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7460 .loc 1 3498 13 is_stmt 0 view .LVU2643 + 7461 0104 638D ldrh r3, [r4, #42] + 7462 0106 9BB2 uxth r3, r3 +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7463 .loc 1 3498 32 view .LVU2644 + 7464 0108 228D ldrh r2, [r4, #40] +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7465 .loc 1 3498 25 view .LVU2645 + 7466 010a 9B1A subs r3, r3, r2 + 7467 010c 9BB2 uxth r3, r3 + 7468 010e 6385 strh r3, [r4, #42] @ movhi + ARM GAS /tmp/ccNVyn8W.s page 303 + + +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7469 .loc 1 3501 9 is_stmt 1 view .LVU2646 +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7470 .loc 1 3501 9 view .LVU2647 + 7471 0110 0023 movs r3, #0 + 7472 0112 84F84030 strb r3, [r4, #64] +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7473 .loc 1 3501 9 view .LVU2648 +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7474 .loc 1 3507 9 view .LVU2649 + 7475 0116 1021 movs r1, #16 + 7476 0118 2046 mov r0, r4 + 7477 011a FFF7FEFF bl I2C_Enable_IRQ + 7478 .LVL493: +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7479 .loc 1 3510 9 view .LVU2650 +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7480 .loc 1 3510 13 is_stmt 0 view .LVU2651 + 7481 011e 2268 ldr r2, [r4] +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7482 .loc 1 3510 23 view .LVU2652 + 7483 0120 1368 ldr r3, [r2] +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7484 .loc 1 3510 29 view .LVU2653 + 7485 0122 43F48043 orr r3, r3, #16384 + 7486 0126 1360 str r3, [r2] + 7487 0128 11E0 b .L492 + 7488 .LVL494: + 7489 .L488: +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7490 .loc 1 3530 7 is_stmt 1 view .LVU2654 +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7491 .loc 1 3530 21 is_stmt 0 view .LVU2655 + 7492 012a 104B ldr r3, .L500+12 + 7493 012c 6363 str r3, [r4, #52] +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 7494 .loc 1 3534 7 is_stmt 1 view .LVU2656 + 7495 012e 104B ldr r3, .L500+16 + 7496 0130 0093 str r3, [sp] + 7497 0132 4FF00073 mov r3, #33554432 + 7498 0136 D2B2 uxtb r2, r2 + 7499 0138 3146 mov r1, r6 + 7500 013a 2046 mov r0, r4 + 7501 013c FFF7FEFF bl I2C_TransferConfig + 7502 .LVL495: +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7503 .loc 1 3538 7 view .LVU2657 +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7504 .loc 1 3538 7 view .LVU2658 + 7505 0140 0023 movs r3, #0 + 7506 0142 84F84030 strb r3, [r4, #64] +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7507 .loc 1 3538 7 view .LVU2659 +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7508 .loc 1 3547 7 view .LVU2660 + 7509 0146 0121 movs r1, #1 + 7510 0148 2046 mov r0, r4 + ARM GAS /tmp/ccNVyn8W.s page 304 + + + 7511 014a FFF7FEFF bl I2C_Enable_IRQ + 7512 .LVL496: + 7513 .L492: +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7514 .loc 1 3550 5 view .LVU2661 +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7515 .loc 1 3550 12 is_stmt 0 view .LVU2662 + 7516 014e 0020 movs r0, #0 + 7517 0150 00E0 b .L483 + 7518 .LVL497: + 7519 .L493: +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7520 .loc 1 3554 12 view .LVU2663 + 7521 0152 0220 movs r0, #2 + 7522 .LVL498: + 7523 .L483: +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7524 .loc 1 3556 1 view .LVU2664 + 7525 0154 02B0 add sp, sp, #8 + 7526 .cfi_remember_state + 7527 .cfi_def_cfa_offset 24 + 7528 @ sp needed + 7529 0156 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 7530 .LVL499: + 7531 .L494: + 7532 .cfi_restore_state +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7533 .loc 1 3415 5 discriminator 1 view .LVU2665 + 7534 015a 0220 movs r0, #2 + 7535 015c FAE7 b .L483 + 7536 .L501: + 7537 015e 00BF .align 2 + 7538 .L500: + 7539 0160 00000000 .word I2C_Master_ISR_DMA + 7540 0164 00000000 .word I2C_DMAMasterTransmitCplt + 7541 0168 00000000 .word I2C_DMAError + 7542 016c 00000000 .word I2C_Master_ISR_IT + 7543 0170 00200080 .word -2147475456 + 7544 .cfi_endproc + 7545 .LFE154: + 7547 .section .text.HAL_I2C_Master_Seq_Receive_IT,"ax",%progbits + 7548 .align 1 + 7549 .global HAL_I2C_Master_Seq_Receive_IT + 7550 .syntax unified + 7551 .thumb + 7552 .thumb_func + 7554 HAL_I2C_Master_Seq_Receive_IT: + 7555 .LVL500: + 7556 .LFB155: +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7557 .loc 1 3572 1 is_stmt 1 view -0 + 7558 .cfi_startproc + 7559 @ args = 4, pretend = 0, frame = 0 + 7560 @ frame_needed = 0, uses_anonymous_args = 0 +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7561 .loc 1 3572 1 is_stmt 0 view .LVU2667 + 7562 0000 70B5 push {r4, r5, r6, lr} + ARM GAS /tmp/ccNVyn8W.s page 305 + + + 7563 .cfi_def_cfa_offset 16 + 7564 .cfi_offset 4, -16 + 7565 .cfi_offset 5, -12 + 7566 .cfi_offset 6, -8 + 7567 .cfi_offset 14, -4 + 7568 0002 82B0 sub sp, sp, #8 + 7569 .cfi_def_cfa_offset 24 + 7570 0004 0446 mov r4, r0 +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 7571 .loc 1 3573 3 is_stmt 1 view .LVU2668 +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7572 .loc 1 3574 3 view .LVU2669 + 7573 .LVL501: +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7574 .loc 1 3577 3 view .LVU2670 +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7575 .loc 1 3579 3 view .LVU2671 +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7576 .loc 1 3579 11 is_stmt 0 view .LVU2672 + 7577 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7578 .LVL502: +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7579 .loc 1 3579 11 view .LVU2673 + 7580 000a C0B2 uxtb r0, r0 +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7581 .loc 1 3579 6 view .LVU2674 + 7582 000c 2028 cmp r0, #32 + 7583 000e 49D1 bne .L508 + 7584 0010 0D46 mov r5, r1 +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7585 .loc 1 3582 5 is_stmt 1 view .LVU2675 +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7586 .loc 1 3582 5 view .LVU2676 + 7587 0012 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7588 .LVL503: +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7589 .loc 1 3582 5 is_stmt 0 view .LVU2677 + 7590 0016 0129 cmp r1, #1 + 7591 0018 46D0 beq .L509 +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7592 .loc 1 3582 5 is_stmt 1 discriminator 2 view .LVU2678 + 7593 001a 0121 movs r1, #1 + 7594 001c 84F84010 strb r1, [r4, #64] +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7595 .loc 1 3582 5 discriminator 2 view .LVU2679 +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7596 .loc 1 3584 5 view .LVU2680 +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7597 .loc 1 3584 21 is_stmt 0 view .LVU2681 + 7598 0020 2221 movs r1, #34 + 7599 0022 84F84110 strb r1, [r4, #65] +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7600 .loc 1 3585 5 is_stmt 1 view .LVU2682 +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7601 .loc 1 3585 21 is_stmt 0 view .LVU2683 + 7602 0026 1021 movs r1, #16 + 7603 0028 84F84210 strb r1, [r4, #66] + ARM GAS /tmp/ccNVyn8W.s page 306 + + +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7604 .loc 1 3586 5 is_stmt 1 view .LVU2684 +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7605 .loc 1 3586 21 is_stmt 0 view .LVU2685 + 7606 002c 0021 movs r1, #0 + 7607 002e 6164 str r1, [r4, #68] +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7608 .loc 1 3589 5 is_stmt 1 view .LVU2686 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7609 .loc 1 3589 23 is_stmt 0 view .LVU2687 + 7610 0030 6262 str r2, [r4, #36] +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7611 .loc 1 3590 5 is_stmt 1 view .LVU2688 +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7612 .loc 1 3590 23 is_stmt 0 view .LVU2689 + 7613 0032 6385 strh r3, [r4, #42] @ movhi +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7614 .loc 1 3591 5 is_stmt 1 view .LVU2690 +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7615 .loc 1 3591 23 is_stmt 0 view .LVU2691 + 7616 0034 069B ldr r3, [sp, #24] + 7617 .LVL504: +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7618 .loc 1 3591 23 view .LVU2692 + 7619 0036 E362 str r3, [r4, #44] + 7620 .LVL505: +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7621 .loc 1 3592 5 is_stmt 1 view .LVU2693 +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7622 .loc 1 3592 23 is_stmt 0 view .LVU2694 + 7623 0038 1C4B ldr r3, .L513 + 7624 003a 6363 str r3, [r4, #52] +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7625 .loc 1 3595 5 is_stmt 1 view .LVU2695 +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7626 .loc 1 3595 13 is_stmt 0 view .LVU2696 + 7627 003c 638D ldrh r3, [r4, #42] + 7628 003e 9BB2 uxth r3, r3 +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7629 .loc 1 3595 8 view .LVU2697 + 7630 0040 FF2B cmp r3, #255 + 7631 0042 0ED9 bls .L504 +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7632 .loc 1 3597 7 is_stmt 1 view .LVU2698 +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7633 .loc 1 3597 22 is_stmt 0 view .LVU2699 + 7634 0044 FF23 movs r3, #255 + 7635 0046 2385 strh r3, [r4, #40] @ movhi +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7636 .loc 1 3598 7 is_stmt 1 view .LVU2700 + 7637 .LVL506: +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7638 .loc 1 3598 16 is_stmt 0 view .LVU2701 + 7639 0048 4FF08076 mov r6, #16777216 + 7640 .LVL507: + 7641 .L505: +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + ARM GAS /tmp/ccNVyn8W.s page 307 + + + 7642 .loc 1 3609 5 is_stmt 1 view .LVU2702 +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7643 .loc 1 3609 14 is_stmt 0 view .LVU2703 + 7644 004c 236B ldr r3, [r4, #48] +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7645 .loc 1 3609 8 view .LVU2704 + 7646 004e 122B cmp r3, #18 + 7647 0050 0BD1 bne .L506 +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7648 .loc 1 3610 10 view .LVU2705 + 7649 0052 069B ldr r3, [sp, #24] + 7650 0054 AA2B cmp r3, #170 + 7651 0056 08D0 beq .L506 +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7652 .loc 1 3610 10 discriminator 2 view .LVU2706 + 7653 0058 B3F52A4F cmp r3, #43520 + 7654 005c 05D0 beq .L506 +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7655 .loc 1 3612 19 view .LVU2707 + 7656 005e 0023 movs r3, #0 + 7657 0060 0CE0 b .L507 + 7658 .LVL508: + 7659 .L504: +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7660 .loc 1 3602 7 is_stmt 1 view .LVU2708 +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7661 .loc 1 3602 28 is_stmt 0 view .LVU2709 + 7662 0062 638D ldrh r3, [r4, #42] +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7663 .loc 1 3602 22 view .LVU2710 + 7664 0064 2385 strh r3, [r4, #40] @ movhi +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7665 .loc 1 3603 7 is_stmt 1 view .LVU2711 +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7666 .loc 1 3603 16 is_stmt 0 view .LVU2712 + 7667 0066 E66A ldr r6, [r4, #44] + 7668 .LVL509: +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7669 .loc 1 3603 16 view .LVU2713 + 7670 0068 F0E7 b .L505 + 7671 .L506: +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7672 .loc 1 3617 7 is_stmt 1 view .LVU2714 + 7673 006a 2046 mov r0, r4 + 7674 006c FFF7FEFF bl I2C_ConvertOtherXferOptions + 7675 .LVL510: +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7676 .loc 1 3620 7 view .LVU2715 +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7677 .loc 1 3620 15 is_stmt 0 view .LVU2716 + 7678 0070 638D ldrh r3, [r4, #42] + 7679 0072 9BB2 uxth r3, r3 +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7680 .loc 1 3620 10 view .LVU2717 + 7681 0074 FF2B cmp r3, #255 + 7682 0076 13D8 bhi .L511 +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 308 + + + 7683 .loc 1 3622 9 is_stmt 1 view .LVU2718 +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7684 .loc 1 3622 18 is_stmt 0 view .LVU2719 + 7685 0078 E66A ldr r6, [r4, #44] + 7686 .LVL511: +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7687 .loc 1 3574 12 view .LVU2720 + 7688 007a 0D4B ldr r3, .L513+4 + 7689 .L507: + 7690 .LVL512: +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7691 .loc 1 3627 5 is_stmt 1 view .LVU2721 + 7692 007c 0093 str r3, [sp] + 7693 007e 3346 mov r3, r6 + 7694 .LVL513: +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7695 .loc 1 3627 5 is_stmt 0 view .LVU2722 + 7696 0080 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 7697 0084 2946 mov r1, r5 + 7698 0086 2046 mov r0, r4 + 7699 0088 FFF7FEFF bl I2C_TransferConfig + 7700 .LVL514: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7701 .loc 1 3630 5 is_stmt 1 view .LVU2723 +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7702 .loc 1 3630 5 view .LVU2724 + 7703 008c 0025 movs r5, #0 + 7704 .LVL515: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7705 .loc 1 3630 5 is_stmt 0 view .LVU2725 + 7706 008e 84F84050 strb r5, [r4, #64] +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7707 .loc 1 3630 5 is_stmt 1 view .LVU2726 +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7708 .loc 1 3635 5 view .LVU2727 + 7709 0092 0221 movs r1, #2 + 7710 0094 2046 mov r0, r4 + 7711 0096 FFF7FEFF bl I2C_Enable_IRQ + 7712 .LVL516: +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7713 .loc 1 3637 5 view .LVU2728 +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7714 .loc 1 3637 12 is_stmt 0 view .LVU2729 + 7715 009a 2846 mov r0, r5 + 7716 .LVL517: + 7717 .L503: +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7718 .loc 1 3643 1 view .LVU2730 + 7719 009c 02B0 add sp, sp, #8 + 7720 .cfi_remember_state + 7721 .cfi_def_cfa_offset 16 + 7722 @ sp needed + 7723 009e 70BD pop {r4, r5, r6, pc} + 7724 .LVL518: + 7725 .L511: + 7726 .cfi_restore_state +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 309 + + + 7727 .loc 1 3574 12 view .LVU2731 + 7728 00a0 034B ldr r3, .L513+4 + 7729 00a2 EBE7 b .L507 + 7730 .LVL519: + 7731 .L508: +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7732 .loc 1 3641 12 view .LVU2732 + 7733 00a4 0220 movs r0, #2 + 7734 00a6 F9E7 b .L503 + 7735 .LVL520: + 7736 .L509: +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7737 .loc 1 3582 5 discriminator 1 view .LVU2733 + 7738 00a8 0220 movs r0, #2 + 7739 00aa F7E7 b .L503 + 7740 .L514: + 7741 .align 2 + 7742 .L513: + 7743 00ac 00000000 .word I2C_Master_ISR_IT + 7744 00b0 00240080 .word -2147474432 + 7745 .cfi_endproc + 7746 .LFE155: + 7748 .section .text.HAL_I2C_Master_Seq_Receive_DMA,"ax",%progbits + 7749 .align 1 + 7750 .global HAL_I2C_Master_Seq_Receive_DMA + 7751 .syntax unified + 7752 .thumb + 7753 .thumb_func + 7755 HAL_I2C_Master_Seq_Receive_DMA: + 7756 .LVL521: + 7757 .LFB156: +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7758 .loc 1 3659 1 is_stmt 1 view -0 + 7759 .cfi_startproc + 7760 @ args = 4, pretend = 0, frame = 0 + 7761 @ frame_needed = 0, uses_anonymous_args = 0 +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7762 .loc 1 3659 1 is_stmt 0 view .LVU2735 + 7763 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 7764 .cfi_def_cfa_offset 24 + 7765 .cfi_offset 4, -24 + 7766 .cfi_offset 5, -20 + 7767 .cfi_offset 6, -16 + 7768 .cfi_offset 7, -12 + 7769 .cfi_offset 8, -8 + 7770 .cfi_offset 14, -4 + 7771 0004 82B0 sub sp, sp, #8 + 7772 .cfi_def_cfa_offset 32 + 7773 0006 0446 mov r4, r0 + 7774 0008 1546 mov r5, r2 + 7775 000a 089A ldr r2, [sp, #32] + 7776 .LVL522: +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 7777 .loc 1 3660 3 is_stmt 1 view .LVU2736 +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7778 .loc 1 3661 3 view .LVU2737 +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 310 + + + 7779 .loc 1 3662 3 view .LVU2738 +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7780 .loc 1 3665 3 view .LVU2739 +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7781 .loc 1 3667 3 view .LVU2740 +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7782 .loc 1 3667 11 is_stmt 0 view .LVU2741 + 7783 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7784 .LVL523: +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7785 .loc 1 3667 11 view .LVU2742 + 7786 0010 C0B2 uxtb r0, r0 +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7787 .loc 1 3667 6 view .LVU2743 + 7788 0012 2028 cmp r0, #32 + 7789 0014 40F09D80 bne .L526 + 7790 0018 0E46 mov r6, r1 +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7791 .loc 1 3670 5 is_stmt 1 view .LVU2744 +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7792 .loc 1 3670 5 view .LVU2745 + 7793 001a 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7794 .LVL524: +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7795 .loc 1 3670 5 is_stmt 0 view .LVU2746 + 7796 001e 0129 cmp r1, #1 + 7797 0020 00F09B80 beq .L527 +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7798 .loc 1 3670 5 is_stmt 1 discriminator 2 view .LVU2747 + 7799 0024 0121 movs r1, #1 + 7800 0026 84F84010 strb r1, [r4, #64] +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7801 .loc 1 3670 5 discriminator 2 view .LVU2748 +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7802 .loc 1 3672 5 view .LVU2749 +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7803 .loc 1 3672 21 is_stmt 0 view .LVU2750 + 7804 002a 2221 movs r1, #34 + 7805 002c 84F84110 strb r1, [r4, #65] +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7806 .loc 1 3673 5 is_stmt 1 view .LVU2751 +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7807 .loc 1 3673 21 is_stmt 0 view .LVU2752 + 7808 0030 1021 movs r1, #16 + 7809 0032 84F84210 strb r1, [r4, #66] +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7810 .loc 1 3674 5 is_stmt 1 view .LVU2753 +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7811 .loc 1 3674 21 is_stmt 0 view .LVU2754 + 7812 0036 0021 movs r1, #0 + 7813 0038 6164 str r1, [r4, #68] +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7814 .loc 1 3677 5 is_stmt 1 view .LVU2755 +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7815 .loc 1 3677 23 is_stmt 0 view .LVU2756 + 7816 003a 6562 str r5, [r4, #36] +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + ARM GAS /tmp/ccNVyn8W.s page 311 + + + 7817 .loc 1 3678 5 is_stmt 1 view .LVU2757 +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7818 .loc 1 3678 23 is_stmt 0 view .LVU2758 + 7819 003c 6385 strh r3, [r4, #42] @ movhi +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 7820 .loc 1 3679 5 is_stmt 1 view .LVU2759 +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 7821 .loc 1 3679 23 is_stmt 0 view .LVU2760 + 7822 003e E262 str r2, [r4, #44] +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7823 .loc 1 3680 5 is_stmt 1 view .LVU2761 +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7824 .loc 1 3680 23 is_stmt 0 view .LVU2762 + 7825 0040 474B ldr r3, .L533 + 7826 .LVL525: +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7827 .loc 1 3680 23 view .LVU2763 + 7828 0042 6363 str r3, [r4, #52] +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7829 .loc 1 3683 5 is_stmt 1 view .LVU2764 +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7830 .loc 1 3683 13 is_stmt 0 view .LVU2765 + 7831 0044 638D ldrh r3, [r4, #42] + 7832 0046 9BB2 uxth r3, r3 +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7833 .loc 1 3683 8 view .LVU2766 + 7834 0048 FF2B cmp r3, #255 + 7835 004a 0ED9 bls .L517 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7836 .loc 1 3685 7 is_stmt 1 view .LVU2767 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7837 .loc 1 3685 22 is_stmt 0 view .LVU2768 + 7838 004c FF23 movs r3, #255 + 7839 004e 2385 strh r3, [r4, #40] @ movhi +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7840 .loc 1 3686 7 is_stmt 1 view .LVU2769 + 7841 .LVL526: +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7842 .loc 1 3686 16 is_stmt 0 view .LVU2770 + 7843 0050 4FF08077 mov r7, #16777216 + 7844 .LVL527: + 7845 .L518: +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7846 .loc 1 3697 5 is_stmt 1 view .LVU2771 +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7847 .loc 1 3697 14 is_stmt 0 view .LVU2772 + 7848 0054 236B ldr r3, [r4, #48] +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7849 .loc 1 3697 8 view .LVU2773 + 7850 0056 122B cmp r3, #18 + 7851 0058 0BD1 bne .L519 +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7852 .loc 1 3698 10 view .LVU2774 + 7853 005a AA2A cmp r2, #170 + 7854 005c 09D0 beq .L519 +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7855 .loc 1 3698 10 discriminator 2 view .LVU2775 + ARM GAS /tmp/ccNVyn8W.s page 312 + + + 7856 005e B2F52A4F cmp r2, #43520 + 7857 0062 06D0 beq .L519 +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7858 .loc 1 3700 19 view .LVU2776 + 7859 0064 4FF00008 mov r8, #0 + 7860 0068 0DE0 b .L520 + 7861 .LVL528: + 7862 .L517: +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7863 .loc 1 3690 7 is_stmt 1 view .LVU2777 +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7864 .loc 1 3690 28 is_stmt 0 view .LVU2778 + 7865 006a 638D ldrh r3, [r4, #42] +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7866 .loc 1 3690 22 view .LVU2779 + 7867 006c 2385 strh r3, [r4, #40] @ movhi +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7868 .loc 1 3691 7 is_stmt 1 view .LVU2780 +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7869 .loc 1 3691 16 is_stmt 0 view .LVU2781 + 7870 006e E76A ldr r7, [r4, #44] + 7871 .LVL529: +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7872 .loc 1 3691 16 view .LVU2782 + 7873 0070 F0E7 b .L518 + 7874 .L519: +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7875 .loc 1 3705 7 is_stmt 1 view .LVU2783 + 7876 0072 2046 mov r0, r4 + 7877 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 7878 .LVL530: +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7879 .loc 1 3708 7 view .LVU2784 +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7880 .loc 1 3708 15 is_stmt 0 view .LVU2785 + 7881 0078 638D ldrh r3, [r4, #42] + 7882 007a 9BB2 uxth r3, r3 +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7883 .loc 1 3708 10 view .LVU2786 + 7884 007c FF2B cmp r3, #255 + 7885 007e 27D8 bhi .L529 +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7886 .loc 1 3710 9 is_stmt 1 view .LVU2787 +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7887 .loc 1 3710 18 is_stmt 0 view .LVU2788 + 7888 0080 E76A ldr r7, [r4, #44] + 7889 .LVL531: +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7890 .loc 1 3661 12 view .LVU2789 + 7891 0082 DFF8EC80 ldr r8, .L533+16 + 7892 .L520: + 7893 .LVL532: +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7894 .loc 1 3714 5 is_stmt 1 view .LVU2790 +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7895 .loc 1 3714 13 is_stmt 0 view .LVU2791 + 7896 0086 228D ldrh r2, [r4, #40] + ARM GAS /tmp/ccNVyn8W.s page 313 + + +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7897 .loc 1 3714 8 view .LVU2792 + 7898 0088 002A cmp r2, #0 + 7899 008a 4ED0 beq .L521 +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7900 .loc 1 3716 7 is_stmt 1 view .LVU2793 +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7901 .loc 1 3716 15 is_stmt 0 view .LVU2794 + 7902 008c E36B ldr r3, [r4, #60] +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7903 .loc 1 3716 10 view .LVU2795 + 7904 008e 13B3 cbz r3, .L522 +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7905 .loc 1 3719 9 is_stmt 1 view .LVU2796 +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7906 .loc 1 3719 40 is_stmt 0 view .LVU2797 + 7907 0090 344A ldr r2, .L533+4 + 7908 0092 9A62 str r2, [r3, #40] +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7909 .loc 1 3722 9 is_stmt 1 view .LVU2798 +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7910 .loc 1 3722 13 is_stmt 0 view .LVU2799 + 7911 0094 E36B ldr r3, [r4, #60] +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7912 .loc 1 3722 41 view .LVU2800 + 7913 0096 344A ldr r2, .L533+8 + 7914 0098 1A63 str r2, [r3, #48] +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7915 .loc 1 3725 9 is_stmt 1 view .LVU2801 +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7916 .loc 1 3725 13 is_stmt 0 view .LVU2802 + 7917 009a E26B ldr r2, [r4, #60] +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7918 .loc 1 3725 44 view .LVU2803 + 7919 009c 0023 movs r3, #0 + 7920 009e D362 str r3, [r2, #44] +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7921 .loc 1 3726 9 is_stmt 1 view .LVU2804 +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7922 .loc 1 3726 13 is_stmt 0 view .LVU2805 + 7923 00a0 E26B ldr r2, [r4, #60] +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7924 .loc 1 3726 41 view .LVU2806 + 7925 00a2 5363 str r3, [r2, #52] +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 7926 .loc 1 3729 9 is_stmt 1 view .LVU2807 +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 7927 .loc 1 3729 71 is_stmt 0 view .LVU2808 + 7928 00a4 2168 ldr r1, [r4] +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 7929 .loc 1 3729 25 view .LVU2809 + 7930 00a6 238D ldrh r3, [r4, #40] + 7931 00a8 2A46 mov r2, r5 + 7932 00aa 2431 adds r1, r1, #36 + 7933 00ac E06B ldr r0, [r4, #60] + 7934 00ae FFF7FEFF bl HAL_DMA_Start_IT + 7935 .LVL533: + ARM GAS /tmp/ccNVyn8W.s page 314 + + +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7936 .loc 1 3747 7 is_stmt 1 view .LVU2810 +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7937 .loc 1 3747 10 is_stmt 0 view .LVU2811 + 7938 00b2 F0B1 cbz r0, .L532 +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7939 .loc 1 3770 9 is_stmt 1 view .LVU2812 +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7940 .loc 1 3770 25 is_stmt 0 view .LVU2813 + 7941 00b4 2023 movs r3, #32 + 7942 00b6 84F84130 strb r3, [r4, #65] +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7943 .loc 1 3771 9 is_stmt 1 view .LVU2814 +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7944 .loc 1 3771 25 is_stmt 0 view .LVU2815 + 7945 00ba 0022 movs r2, #0 + 7946 00bc 84F84220 strb r2, [r4, #66] +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7947 .loc 1 3774 9 is_stmt 1 view .LVU2816 +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7948 .loc 1 3774 13 is_stmt 0 view .LVU2817 + 7949 00c0 636C ldr r3, [r4, #68] +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7950 .loc 1 3774 25 view .LVU2818 + 7951 00c2 43F01003 orr r3, r3, #16 + 7952 00c6 6364 str r3, [r4, #68] +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7953 .loc 1 3777 9 is_stmt 1 view .LVU2819 +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7954 .loc 1 3777 9 view .LVU2820 + 7955 00c8 84F84020 strb r2, [r4, #64] +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7956 .loc 1 3777 9 view .LVU2821 +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7957 .loc 1 3779 9 view .LVU2822 +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7958 .loc 1 3779 16 is_stmt 0 view .LVU2823 + 7959 00cc 0120 movs r0, #1 + 7960 .LVL534: +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7961 .loc 1 3779 16 view .LVU2824 + 7962 00ce 41E0 b .L516 + 7963 .LVL535: + 7964 .L529: +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7965 .loc 1 3661 12 view .LVU2825 + 7966 00d0 DFF89C80 ldr r8, .L533+16 + 7967 00d4 D7E7 b .L520 + 7968 .LVL536: + 7969 .L522: +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7970 .loc 1 3735 9 is_stmt 1 view .LVU2826 +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7971 .loc 1 3735 25 is_stmt 0 view .LVU2827 + 7972 00d6 2023 movs r3, #32 + 7973 00d8 84F84130 strb r3, [r4, #65] +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 315 + + + 7974 .loc 1 3736 9 is_stmt 1 view .LVU2828 +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7975 .loc 1 3736 25 is_stmt 0 view .LVU2829 + 7976 00dc 0022 movs r2, #0 + 7977 00de 84F84220 strb r2, [r4, #66] +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7978 .loc 1 3739 9 is_stmt 1 view .LVU2830 +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7979 .loc 1 3739 13 is_stmt 0 view .LVU2831 + 7980 00e2 636C ldr r3, [r4, #68] +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7981 .loc 1 3739 25 view .LVU2832 + 7982 00e4 43F08003 orr r3, r3, #128 + 7983 00e8 6364 str r3, [r4, #68] +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7984 .loc 1 3742 9 is_stmt 1 view .LVU2833 +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7985 .loc 1 3742 9 view .LVU2834 + 7986 00ea 84F84020 strb r2, [r4, #64] +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7987 .loc 1 3742 9 view .LVU2835 +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7988 .loc 1 3744 9 view .LVU2836 +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7989 .loc 1 3744 16 is_stmt 0 view .LVU2837 + 7990 00ee 0120 movs r0, #1 + 7991 00f0 30E0 b .L516 + 7992 .LVL537: + 7993 .L532: +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7994 .loc 1 3750 9 is_stmt 1 view .LVU2838 + 7995 00f2 CDF80080 str r8, [sp] + 7996 00f6 3B46 mov r3, r7 + 7997 00f8 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 7998 00fc 3146 mov r1, r6 + 7999 00fe 2046 mov r0, r4 + 8000 .LVL538: +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8001 .loc 1 3750 9 is_stmt 0 view .LVU2839 + 8002 0100 FFF7FEFF bl I2C_TransferConfig + 8003 .LVL539: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8004 .loc 1 3753 9 is_stmt 1 view .LVU2840 +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8005 .loc 1 3753 13 is_stmt 0 view .LVU2841 + 8006 0104 638D ldrh r3, [r4, #42] + 8007 0106 9BB2 uxth r3, r3 +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8008 .loc 1 3753 32 view .LVU2842 + 8009 0108 228D ldrh r2, [r4, #40] +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8010 .loc 1 3753 25 view .LVU2843 + 8011 010a 9B1A subs r3, r3, r2 + 8012 010c 9BB2 uxth r3, r3 + 8013 010e 6385 strh r3, [r4, #42] @ movhi +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8014 .loc 1 3756 9 is_stmt 1 view .LVU2844 + ARM GAS /tmp/ccNVyn8W.s page 316 + + +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8015 .loc 1 3756 9 view .LVU2845 + 8016 0110 0023 movs r3, #0 + 8017 0112 84F84030 strb r3, [r4, #64] +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8018 .loc 1 3756 9 view .LVU2846 +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8019 .loc 1 3762 9 view .LVU2847 + 8020 0116 1021 movs r1, #16 + 8021 0118 2046 mov r0, r4 + 8022 011a FFF7FEFF bl I2C_Enable_IRQ + 8023 .LVL540: +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8024 .loc 1 3765 9 view .LVU2848 +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8025 .loc 1 3765 13 is_stmt 0 view .LVU2849 + 8026 011e 2268 ldr r2, [r4] +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8027 .loc 1 3765 23 view .LVU2850 + 8028 0120 1368 ldr r3, [r2] +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8029 .loc 1 3765 29 view .LVU2851 + 8030 0122 43F40043 orr r3, r3, #32768 + 8031 0126 1360 str r3, [r2] + 8032 0128 11E0 b .L525 + 8033 .LVL541: + 8034 .L521: +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8035 .loc 1 3785 7 is_stmt 1 view .LVU2852 +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8036 .loc 1 3785 21 is_stmt 0 view .LVU2853 + 8037 012a 104B ldr r3, .L533+12 + 8038 012c 6363 str r3, [r4, #52] +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 8039 .loc 1 3789 7 is_stmt 1 view .LVU2854 + 8040 012e 104B ldr r3, .L533+16 + 8041 0130 0093 str r3, [sp] + 8042 0132 4FF00073 mov r3, #33554432 + 8043 0136 D2B2 uxtb r2, r2 + 8044 0138 3146 mov r1, r6 + 8045 013a 2046 mov r0, r4 + 8046 013c FFF7FEFF bl I2C_TransferConfig + 8047 .LVL542: +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8048 .loc 1 3793 7 view .LVU2855 +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8049 .loc 1 3793 7 view .LVU2856 + 8050 0140 0023 movs r3, #0 + 8051 0142 84F84030 strb r3, [r4, #64] +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8052 .loc 1 3793 7 view .LVU2857 +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8053 .loc 1 3802 7 view .LVU2858 + 8054 0146 0121 movs r1, #1 + 8055 0148 2046 mov r0, r4 + 8056 014a FFF7FEFF bl I2C_Enable_IRQ + 8057 .LVL543: + ARM GAS /tmp/ccNVyn8W.s page 317 + + + 8058 .L525: +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8059 .loc 1 3805 5 view .LVU2859 +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8060 .loc 1 3805 12 is_stmt 0 view .LVU2860 + 8061 014e 0020 movs r0, #0 + 8062 0150 00E0 b .L516 + 8063 .LVL544: + 8064 .L526: +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8065 .loc 1 3809 12 view .LVU2861 + 8066 0152 0220 movs r0, #2 + 8067 .LVL545: + 8068 .L516: +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8069 .loc 1 3811 1 view .LVU2862 + 8070 0154 02B0 add sp, sp, #8 + 8071 .cfi_remember_state + 8072 .cfi_def_cfa_offset 24 + 8073 @ sp needed + 8074 0156 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 8075 .LVL546: + 8076 .L527: + 8077 .cfi_restore_state +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8078 .loc 1 3670 5 discriminator 1 view .LVU2863 + 8079 015a 0220 movs r0, #2 + 8080 015c FAE7 b .L516 + 8081 .L534: + 8082 015e 00BF .align 2 + 8083 .L533: + 8084 0160 00000000 .word I2C_Master_ISR_DMA + 8085 0164 00000000 .word I2C_DMAMasterReceiveCplt + 8086 0168 00000000 .word I2C_DMAError + 8087 016c 00000000 .word I2C_Master_ISR_IT + 8088 0170 00240080 .word -2147474432 + 8089 .cfi_endproc + 8090 .LFE156: + 8092 .section .text.HAL_I2C_Slave_Seq_Transmit_IT,"ax",%progbits + 8093 .align 1 + 8094 .global HAL_I2C_Slave_Seq_Transmit_IT + 8095 .syntax unified + 8096 .thumb + 8097 .thumb_func + 8099 HAL_I2C_Slave_Seq_Transmit_IT: + 8100 .LVL547: + 8101 .LFB157: +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8102 .loc 1 3825 1 is_stmt 1 view -0 + 8103 .cfi_startproc + 8104 @ args = 0, pretend = 0, frame = 0 + 8105 @ frame_needed = 0, uses_anonymous_args = 0 +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8106 .loc 1 3825 1 is_stmt 0 view .LVU2865 + 8107 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8108 .cfi_def_cfa_offset 24 + 8109 .cfi_offset 3, -24 + ARM GAS /tmp/ccNVyn8W.s page 318 + + + 8110 .cfi_offset 4, -20 + 8111 .cfi_offset 5, -16 + 8112 .cfi_offset 6, -12 + 8113 .cfi_offset 7, -8 + 8114 .cfi_offset 14, -4 + 8115 0002 0446 mov r4, r0 +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8116 .loc 1 3827 3 is_stmt 1 view .LVU2866 +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8117 .loc 1 3830 3 view .LVU2867 +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8118 .loc 1 3832 3 view .LVU2868 +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8119 .loc 1 3832 22 is_stmt 0 view .LVU2869 + 8120 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8121 .LVL548: +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8122 .loc 1 3832 6 view .LVU2870 + 8123 0008 00F02800 and r0, r0, #40 + 8124 000c 2828 cmp r0, #40 + 8125 000e 5ED1 bne .L541 + 8126 0010 0F46 mov r7, r1 + 8127 0012 1646 mov r6, r2 + 8128 0014 1D46 mov r5, r3 +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8129 .loc 1 3834 5 is_stmt 1 view .LVU2871 +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8130 .loc 1 3834 8 is_stmt 0 view .LVU2872 + 8131 0016 01B1 cbz r1, .L537 +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8132 .loc 1 3834 25 discriminator 1 view .LVU2873 + 8133 0018 22B9 cbnz r2, .L538 + 8134 .L537: +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8135 .loc 1 3836 7 is_stmt 1 view .LVU2874 +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8136 .loc 1 3836 23 is_stmt 0 view .LVU2875 + 8137 001a 4FF40073 mov r3, #512 + 8138 .LVL549: +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8139 .loc 1 3836 23 view .LVU2876 + 8140 001e 6364 str r3, [r4, #68] +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8141 .loc 1 3837 7 is_stmt 1 view .LVU2877 +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8142 .loc 1 3837 15 is_stmt 0 view .LVU2878 + 8143 0020 0120 movs r0, #1 + 8144 0022 55E0 b .L536 + 8145 .LVL550: + 8146 .L538: +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8147 .loc 1 3841 5 is_stmt 1 view .LVU2879 + 8148 0024 48F20101 movw r1, #32769 + 8149 .LVL551: +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8150 .loc 1 3841 5 is_stmt 0 view .LVU2880 + 8151 0028 2046 mov r0, r4 + ARM GAS /tmp/ccNVyn8W.s page 319 + + + 8152 002a FFF7FEFF bl I2C_Disable_IRQ + 8153 .LVL552: +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8154 .loc 1 3844 5 is_stmt 1 view .LVU2881 +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8155 .loc 1 3844 5 view .LVU2882 + 8156 002e 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 8157 0032 012B cmp r3, #1 + 8158 0034 4DD0 beq .L542 +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8159 .loc 1 3844 5 discriminator 2 view .LVU2883 + 8160 0036 0123 movs r3, #1 + 8161 0038 84F84030 strb r3, [r4, #64] +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8162 .loc 1 3844 5 discriminator 2 view .LVU2884 +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8163 .loc 1 3848 5 view .LVU2885 +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8164 .loc 1 3848 13 is_stmt 0 view .LVU2886 + 8165 003c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8166 0040 DBB2 uxtb r3, r3 +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8167 .loc 1 3848 8 view .LVU2887 + 8168 0042 2A2B cmp r3, #42 + 8169 0044 28D0 beq .L544 + 8170 .L539: +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8171 .loc 1 3874 5 is_stmt 1 view .LVU2888 +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8172 .loc 1 3874 21 is_stmt 0 view .LVU2889 + 8173 0046 2923 movs r3, #41 + 8174 0048 84F84130 strb r3, [r4, #65] +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8175 .loc 1 3875 5 is_stmt 1 view .LVU2890 +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8176 .loc 1 3875 21 is_stmt 0 view .LVU2891 + 8177 004c 2023 movs r3, #32 + 8178 004e 84F84230 strb r3, [r4, #66] +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8179 .loc 1 3876 5 is_stmt 1 view .LVU2892 +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8180 .loc 1 3876 21 is_stmt 0 view .LVU2893 + 8181 0052 0023 movs r3, #0 + 8182 0054 6364 str r3, [r4, #68] +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8183 .loc 1 3879 5 is_stmt 1 view .LVU2894 +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8184 .loc 1 3879 9 is_stmt 0 view .LVU2895 + 8185 0056 2268 ldr r2, [r4] +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8186 .loc 1 3879 19 view .LVU2896 + 8187 0058 5368 ldr r3, [r2, #4] +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8188 .loc 1 3879 25 view .LVU2897 + 8189 005a 23F40043 bic r3, r3, #32768 + 8190 005e 5360 str r3, [r2, #4] +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + ARM GAS /tmp/ccNVyn8W.s page 320 + + + 8191 .loc 1 3882 5 is_stmt 1 view .LVU2898 +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8192 .loc 1 3882 23 is_stmt 0 view .LVU2899 + 8193 0060 6762 str r7, [r4, #36] +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8194 .loc 1 3883 5 is_stmt 1 view .LVU2900 +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8195 .loc 1 3883 23 is_stmt 0 view .LVU2901 + 8196 0062 6685 strh r6, [r4, #42] @ movhi +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8197 .loc 1 3884 5 is_stmt 1 view .LVU2902 +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8198 .loc 1 3884 29 is_stmt 0 view .LVU2903 + 8199 0064 638D ldrh r3, [r4, #42] +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8200 .loc 1 3884 23 view .LVU2904 + 8201 0066 2385 strh r3, [r4, #40] @ movhi +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8202 .loc 1 3885 5 is_stmt 1 view .LVU2905 +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8203 .loc 1 3885 23 is_stmt 0 view .LVU2906 + 8204 0068 E562 str r5, [r4, #44] +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8205 .loc 1 3886 5 is_stmt 1 view .LVU2907 +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8206 .loc 1 3886 23 is_stmt 0 view .LVU2908 + 8207 006a 1B4B ldr r3, .L545 + 8208 006c 6363 str r3, [r4, #52] +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8209 .loc 1 3888 5 is_stmt 1 view .LVU2909 +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8210 .loc 1 3888 11 is_stmt 0 view .LVU2910 + 8211 006e 2268 ldr r2, [r4] + 8212 0070 9369 ldr r3, [r2, #24] + 8213 0072 03F00803 and r3, r3, #8 + 8214 .LVL553: +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8215 .loc 1 3889 5 is_stmt 1 view .LVU2911 +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8216 .loc 1 3889 10 is_stmt 0 view .LVU2912 + 8217 0076 9169 ldr r1, [r2, #24] +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8218 .loc 1 3889 8 view .LVU2913 + 8219 0078 11F4803F tst r1, #65536 + 8220 007c 02D0 beq .L540 +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8221 .loc 1 3889 54 discriminator 1 view .LVU2914 + 8222 007e 0BB1 cbz r3, .L540 +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8223 .loc 1 3893 7 is_stmt 1 view .LVU2915 + 8224 0080 0823 movs r3, #8 + 8225 .LVL554: +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8226 .loc 1 3893 7 is_stmt 0 view .LVU2916 + 8227 0082 D361 str r3, [r2, #28] + 8228 .L540: +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 321 + + + 8229 .loc 1 3897 5 is_stmt 1 view .LVU2917 +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8230 .loc 1 3897 5 view .LVU2918 + 8231 0084 0025 movs r5, #0 + 8232 .LVL555: +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8233 .loc 1 3897 5 is_stmt 0 view .LVU2919 + 8234 0086 84F84050 strb r5, [r4, #64] +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8235 .loc 1 3897 5 is_stmt 1 view .LVU2920 +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8236 .loc 1 3903 5 view .LVU2921 + 8237 008a 48F20101 movw r1, #32769 + 8238 008e 2046 mov r0, r4 + 8239 0090 FFF7FEFF bl I2C_Enable_IRQ + 8240 .LVL556: +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8241 .loc 1 3905 5 view .LVU2922 +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8242 .loc 1 3905 12 is_stmt 0 view .LVU2923 + 8243 0094 2846 mov r0, r5 + 8244 0096 1BE0 b .L536 + 8245 .LVL557: + 8246 .L544: +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8247 .loc 1 3851 7 is_stmt 1 view .LVU2924 + 8248 0098 0221 movs r1, #2 + 8249 009a 2046 mov r0, r4 + 8250 009c FFF7FEFF bl I2C_Disable_IRQ + 8251 .LVL558: +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8252 .loc 1 3854 7 view .LVU2925 +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8253 .loc 1 3854 16 is_stmt 0 view .LVU2926 + 8254 00a0 2368 ldr r3, [r4] +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8255 .loc 1 3854 26 view .LVU2927 + 8256 00a2 1A68 ldr r2, [r3] +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8257 .loc 1 3854 10 view .LVU2928 + 8258 00a4 12F4004F tst r2, #32768 + 8259 00a8 CDD0 beq .L539 +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8260 .loc 1 3856 9 is_stmt 1 view .LVU2929 +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8261 .loc 1 3856 23 is_stmt 0 view .LVU2930 + 8262 00aa 1A68 ldr r2, [r3] +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8263 .loc 1 3856 29 view .LVU2931 + 8264 00ac 22F40042 bic r2, r2, #32768 + 8265 00b0 1A60 str r2, [r3] +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8266 .loc 1 3858 9 is_stmt 1 view .LVU2932 +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8267 .loc 1 3858 17 is_stmt 0 view .LVU2933 + 8268 00b2 E36B ldr r3, [r4, #60] +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 322 + + + 8269 .loc 1 3858 12 view .LVU2934 + 8270 00b4 002B cmp r3, #0 + 8271 00b6 C6D0 beq .L539 +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8272 .loc 1 3862 11 is_stmt 1 view .LVU2935 +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8273 .loc 1 3862 43 is_stmt 0 view .LVU2936 + 8274 00b8 084A ldr r2, .L545+4 + 8275 00ba 5A63 str r2, [r3, #52] +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8276 .loc 1 3865 11 is_stmt 1 view .LVU2937 +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8277 .loc 1 3865 15 is_stmt 0 view .LVU2938 + 8278 00bc E06B ldr r0, [r4, #60] + 8279 00be FFF7FEFF bl HAL_DMA_Abort_IT + 8280 .LVL559: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8281 .loc 1 3865 14 discriminator 1 view .LVU2939 + 8282 00c2 0028 cmp r0, #0 + 8283 00c4 BFD0 beq .L539 +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8284 .loc 1 3868 13 is_stmt 1 view .LVU2940 +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8285 .loc 1 3868 17 is_stmt 0 view .LVU2941 + 8286 00c6 E06B ldr r0, [r4, #60] +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8287 .loc 1 3868 25 view .LVU2942 + 8288 00c8 436B ldr r3, [r0, #52] +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8289 .loc 1 3868 13 view .LVU2943 + 8290 00ca 9847 blx r3 + 8291 .LVL560: + 8292 00cc BBE7 b .L539 + 8293 .LVL561: + 8294 .L541: +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8295 .loc 1 3909 12 view .LVU2944 + 8296 00ce 0120 movs r0, #1 + 8297 .LVL562: + 8298 .L536: +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8299 .loc 1 3911 1 view .LVU2945 + 8300 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} + 8301 .LVL563: + 8302 .L542: +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8303 .loc 1 3844 5 discriminator 1 view .LVU2946 + 8304 00d2 0220 movs r0, #2 + 8305 00d4 FCE7 b .L536 + 8306 .L546: + 8307 00d6 00BF .align 2 + 8308 .L545: + 8309 00d8 00000000 .word I2C_Slave_ISR_IT + 8310 00dc 00000000 .word I2C_DMAAbort + 8311 .cfi_endproc + 8312 .LFE157: + 8314 .section .text.HAL_I2C_Slave_Seq_Transmit_DMA,"ax",%progbits + ARM GAS /tmp/ccNVyn8W.s page 323 + + + 8315 .align 1 + 8316 .global HAL_I2C_Slave_Seq_Transmit_DMA + 8317 .syntax unified + 8318 .thumb + 8319 .thumb_func + 8321 HAL_I2C_Slave_Seq_Transmit_DMA: + 8322 .LVL564: + 8323 .LFB158: +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8324 .loc 1 3925 1 is_stmt 1 view -0 + 8325 .cfi_startproc + 8326 @ args = 0, pretend = 0, frame = 0 + 8327 @ frame_needed = 0, uses_anonymous_args = 0 +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8328 .loc 1 3925 1 is_stmt 0 view .LVU2948 + 8329 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8330 .cfi_def_cfa_offset 24 + 8331 .cfi_offset 3, -24 + 8332 .cfi_offset 4, -20 + 8333 .cfi_offset 5, -16 + 8334 .cfi_offset 6, -12 + 8335 .cfi_offset 7, -8 + 8336 .cfi_offset 14, -4 + 8337 0002 0446 mov r4, r0 +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8338 .loc 1 3927 3 is_stmt 1 view .LVU2949 +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8339 .loc 1 3928 3 view .LVU2950 +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8340 .loc 1 3931 3 view .LVU2951 +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8341 .loc 1 3933 3 view .LVU2952 +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8342 .loc 1 3933 22 is_stmt 0 view .LVU2953 + 8343 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8344 .LVL565: +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8345 .loc 1 3933 6 view .LVU2954 + 8346 0008 00F02800 and r0, r0, #40 + 8347 000c 2828 cmp r0, #40 + 8348 000e 40F0C080 bne .L558 + 8349 0012 0F46 mov r7, r1 + 8350 0014 1646 mov r6, r2 + 8351 0016 1D46 mov r5, r3 +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8352 .loc 1 3935 5 is_stmt 1 view .LVU2955 +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8353 .loc 1 3935 8 is_stmt 0 view .LVU2956 + 8354 0018 0029 cmp r1, #0 + 8355 001a 51D0 beq .L549 +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8356 .loc 1 3935 25 discriminator 1 view .LVU2957 + 8357 001c 002A cmp r2, #0 + 8358 001e 4FD0 beq .L549 +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8359 .loc 1 3942 5 is_stmt 1 view .LVU2958 +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 324 + + + 8360 .loc 1 3942 5 view .LVU2959 + 8361 0020 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 8362 .LVL566: +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8363 .loc 1 3942 5 is_stmt 0 view .LVU2960 + 8364 0024 012B cmp r3, #1 + 8365 0026 00F0B780 beq .L559 +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8366 .loc 1 3942 5 is_stmt 1 discriminator 2 view .LVU2961 + 8367 002a 0123 movs r3, #1 + 8368 002c 84F84030 strb r3, [r4, #64] +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8369 .loc 1 3942 5 discriminator 2 view .LVU2962 +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8370 .loc 1 3945 5 view .LVU2963 + 8371 0030 48F20101 movw r1, #32769 + 8372 .LVL567: +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8373 .loc 1 3945 5 is_stmt 0 view .LVU2964 + 8374 0034 2046 mov r0, r4 + 8375 0036 FFF7FEFF bl I2C_Disable_IRQ + 8376 .LVL568: +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8377 .loc 1 3949 5 is_stmt 1 view .LVU2965 +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8378 .loc 1 3949 13 is_stmt 0 view .LVU2966 + 8379 003a 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8380 003e DBB2 uxtb r3, r3 +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8381 .loc 1 3949 8 view .LVU2967 + 8382 0040 2A2B cmp r3, #42 + 8383 0042 42D0 beq .L562 +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8384 .loc 1 3974 10 is_stmt 1 view .LVU2968 +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8385 .loc 1 3974 18 is_stmt 0 view .LVU2969 + 8386 0044 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8387 0048 DBB2 uxtb r3, r3 +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8388 .loc 1 3974 13 view .LVU2970 + 8389 004a 292B cmp r3, #41 + 8390 004c 59D0 beq .L563 + 8391 .L552: +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8392 .loc 1 3999 5 is_stmt 1 view .LVU2971 +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8393 .loc 1 4001 5 view .LVU2972 +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8394 .loc 1 4001 21 is_stmt 0 view .LVU2973 + 8395 004e 2923 movs r3, #41 + 8396 0050 84F84130 strb r3, [r4, #65] +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8397 .loc 1 4002 5 is_stmt 1 view .LVU2974 +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8398 .loc 1 4002 21 is_stmt 0 view .LVU2975 + 8399 0054 2023 movs r3, #32 + 8400 0056 84F84230 strb r3, [r4, #66] + ARM GAS /tmp/ccNVyn8W.s page 325 + + +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8401 .loc 1 4003 5 is_stmt 1 view .LVU2976 +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8402 .loc 1 4003 21 is_stmt 0 view .LVU2977 + 8403 005a 0023 movs r3, #0 + 8404 005c 6364 str r3, [r4, #68] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8405 .loc 1 4006 5 is_stmt 1 view .LVU2978 +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8406 .loc 1 4006 9 is_stmt 0 view .LVU2979 + 8407 005e 2268 ldr r2, [r4] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8408 .loc 1 4006 19 view .LVU2980 + 8409 0060 5368 ldr r3, [r2, #4] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8410 .loc 1 4006 25 view .LVU2981 + 8411 0062 23F40043 bic r3, r3, #32768 + 8412 0066 5360 str r3, [r2, #4] +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8413 .loc 1 4009 5 is_stmt 1 view .LVU2982 +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8414 .loc 1 4009 23 is_stmt 0 view .LVU2983 + 8415 0068 6762 str r7, [r4, #36] +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8416 .loc 1 4010 5 is_stmt 1 view .LVU2984 +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8417 .loc 1 4010 23 is_stmt 0 view .LVU2985 + 8418 006a 6685 strh r6, [r4, #42] @ movhi +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8419 .loc 1 4011 5 is_stmt 1 view .LVU2986 +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8420 .loc 1 4011 29 is_stmt 0 view .LVU2987 + 8421 006c 638D ldrh r3, [r4, #42] +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8422 .loc 1 4011 23 view .LVU2988 + 8423 006e 2385 strh r3, [r4, #40] @ movhi +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 8424 .loc 1 4012 5 is_stmt 1 view .LVU2989 +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 8425 .loc 1 4012 23 is_stmt 0 view .LVU2990 + 8426 0070 E562 str r5, [r4, #44] +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8427 .loc 1 4013 5 is_stmt 1 view .LVU2991 +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8428 .loc 1 4013 23 is_stmt 0 view .LVU2992 + 8429 0072 4A4B ldr r3, .L564 + 8430 0074 6363 str r3, [r4, #52] +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8431 .loc 1 4015 5 is_stmt 1 view .LVU2993 +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8432 .loc 1 4015 13 is_stmt 0 view .LVU2994 + 8433 0076 A36B ldr r3, [r4, #56] +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8434 .loc 1 4015 8 view .LVU2995 + 8435 0078 002B cmp r3, #0 + 8436 007a 59D0 beq .L553 +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 326 + + + 8437 .loc 1 4018 7 is_stmt 1 view .LVU2996 +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8438 .loc 1 4018 38 is_stmt 0 view .LVU2997 + 8439 007c 484A ldr r2, .L564+4 + 8440 007e 9A62 str r2, [r3, #40] +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8441 .loc 1 4021 7 is_stmt 1 view .LVU2998 +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8442 .loc 1 4021 11 is_stmt 0 view .LVU2999 + 8443 0080 A36B ldr r3, [r4, #56] +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8444 .loc 1 4021 39 view .LVU3000 + 8445 0082 484A ldr r2, .L564+8 + 8446 0084 1A63 str r2, [r3, #48] +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8447 .loc 1 4024 7 is_stmt 1 view .LVU3001 +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8448 .loc 1 4024 11 is_stmt 0 view .LVU3002 + 8449 0086 A26B ldr r2, [r4, #56] +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8450 .loc 1 4024 42 view .LVU3003 + 8451 0088 0023 movs r3, #0 + 8452 008a D362 str r3, [r2, #44] +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8453 .loc 1 4025 7 is_stmt 1 view .LVU3004 +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8454 .loc 1 4025 11 is_stmt 0 view .LVU3005 + 8455 008c A26B ldr r2, [r4, #56] +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8456 .loc 1 4025 39 view .LVU3006 + 8457 008e 5363 str r3, [r2, #52] +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8458 .loc 1 4028 7 is_stmt 1 view .LVU3007 +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8459 .loc 1 4028 86 is_stmt 0 view .LVU3008 + 8460 0090 2268 ldr r2, [r4] +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8461 .loc 1 4028 23 view .LVU3009 + 8462 0092 238D ldrh r3, [r4, #40] + 8463 0094 2832 adds r2, r2, #40 + 8464 0096 3946 mov r1, r7 + 8465 0098 A06B ldr r0, [r4, #56] + 8466 009a FFF7FEFF bl HAL_DMA_Start_IT + 8467 .LVL569: +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8468 .loc 1 4046 5 is_stmt 1 view .LVU3010 +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8469 .loc 1 4046 8 is_stmt 0 view .LVU3011 + 8470 009e 0546 mov r5, r0 + 8471 .LVL570: +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8472 .loc 1 4046 8 view .LVU3012 + 8473 00a0 0028 cmp r0, #0 + 8474 00a2 53D0 beq .L554 +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8475 .loc 1 4057 7 is_stmt 1 view .LVU3013 +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/ccNVyn8W.s page 327 + + + 8476 .loc 1 4057 23 is_stmt 0 view .LVU3014 + 8477 00a4 2823 movs r3, #40 + 8478 00a6 84F84130 strb r3, [r4, #65] +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8479 .loc 1 4058 7 is_stmt 1 view .LVU3015 +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8480 .loc 1 4058 23 is_stmt 0 view .LVU3016 + 8481 00aa 0022 movs r2, #0 + 8482 00ac 84F84220 strb r2, [r4, #66] +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8483 .loc 1 4061 7 is_stmt 1 view .LVU3017 +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8484 .loc 1 4061 11 is_stmt 0 view .LVU3018 + 8485 00b0 636C ldr r3, [r4, #68] +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8486 .loc 1 4061 23 view .LVU3019 + 8487 00b2 43F01003 orr r3, r3, #16 + 8488 00b6 6364 str r3, [r4, #68] +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8489 .loc 1 4064 7 is_stmt 1 view .LVU3020 +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8490 .loc 1 4064 7 view .LVU3021 + 8491 00b8 84F84020 strb r2, [r4, #64] +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8492 .loc 1 4064 7 view .LVU3022 +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8493 .loc 1 4066 7 view .LVU3023 +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8494 .loc 1 4066 14 is_stmt 0 view .LVU3024 + 8495 00bc 0125 movs r5, #1 + 8496 00be 69E0 b .L548 + 8497 .LVL571: + 8498 .L549: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8499 .loc 1 3937 7 is_stmt 1 view .LVU3025 +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8500 .loc 1 3937 23 is_stmt 0 view .LVU3026 + 8501 00c0 4FF40073 mov r3, #512 + 8502 .LVL572: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8503 .loc 1 3937 23 view .LVU3027 + 8504 00c4 6364 str r3, [r4, #68] +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8505 .loc 1 3938 7 is_stmt 1 view .LVU3028 +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8506 .loc 1 3938 15 is_stmt 0 view .LVU3029 + 8507 00c6 0125 movs r5, #1 + 8508 .LVL573: +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8509 .loc 1 3938 15 view .LVU3030 + 8510 00c8 64E0 b .L548 + 8511 .LVL574: + 8512 .L562: +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8513 .loc 1 3952 7 is_stmt 1 view .LVU3031 + 8514 00ca 0221 movs r1, #2 + 8515 00cc 2046 mov r0, r4 + ARM GAS /tmp/ccNVyn8W.s page 328 + + + 8516 00ce FFF7FEFF bl I2C_Disable_IRQ + 8517 .LVL575: +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8518 .loc 1 3954 7 view .LVU3032 +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8519 .loc 1 3954 16 is_stmt 0 view .LVU3033 + 8520 00d2 2368 ldr r3, [r4] +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8521 .loc 1 3954 26 view .LVU3034 + 8522 00d4 1A68 ldr r2, [r3] +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8523 .loc 1 3954 10 view .LVU3035 + 8524 00d6 12F4004F tst r2, #32768 + 8525 00da B8D0 beq .L552 +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8526 .loc 1 3957 9 is_stmt 1 view .LVU3036 +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8527 .loc 1 3957 17 is_stmt 0 view .LVU3037 + 8528 00dc E26B ldr r2, [r4, #60] +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8529 .loc 1 3957 12 view .LVU3038 + 8530 00de 002A cmp r2, #0 + 8531 00e0 B5D0 beq .L552 +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8532 .loc 1 3959 11 is_stmt 1 view .LVU3039 +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8533 .loc 1 3959 25 is_stmt 0 view .LVU3040 + 8534 00e2 1A68 ldr r2, [r3] +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8535 .loc 1 3959 31 view .LVU3041 + 8536 00e4 22F40042 bic r2, r2, #32768 + 8537 00e8 1A60 str r2, [r3] +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8538 .loc 1 3963 11 is_stmt 1 view .LVU3042 +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8539 .loc 1 3963 15 is_stmt 0 view .LVU3043 + 8540 00ea E36B ldr r3, [r4, #60] +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8541 .loc 1 3963 43 view .LVU3044 + 8542 00ec 2E4A ldr r2, .L564+12 + 8543 00ee 5A63 str r2, [r3, #52] +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8544 .loc 1 3966 11 is_stmt 1 view .LVU3045 +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8545 .loc 1 3966 15 is_stmt 0 view .LVU3046 + 8546 00f0 E06B ldr r0, [r4, #60] + 8547 00f2 FFF7FEFF bl HAL_DMA_Abort_IT + 8548 .LVL576: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8549 .loc 1 3966 14 discriminator 1 view .LVU3047 + 8550 00f6 0028 cmp r0, #0 + 8551 00f8 A9D0 beq .L552 +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8552 .loc 1 3969 13 is_stmt 1 view .LVU3048 +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8553 .loc 1 3969 17 is_stmt 0 view .LVU3049 + 8554 00fa E06B ldr r0, [r4, #60] + ARM GAS /tmp/ccNVyn8W.s page 329 + + +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8555 .loc 1 3969 25 view .LVU3050 + 8556 00fc 436B ldr r3, [r0, #52] +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8557 .loc 1 3969 13 view .LVU3051 + 8558 00fe 9847 blx r3 + 8559 .LVL577: + 8560 0100 A5E7 b .L552 + 8561 .L563: +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8562 .loc 1 3976 7 is_stmt 1 view .LVU3052 +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8563 .loc 1 3976 16 is_stmt 0 view .LVU3053 + 8564 0102 2368 ldr r3, [r4] +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8565 .loc 1 3976 26 view .LVU3054 + 8566 0104 1A68 ldr r2, [r3] +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8567 .loc 1 3976 10 view .LVU3055 + 8568 0106 12F4804F tst r2, #16384 + 8569 010a A0D0 beq .L552 +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8570 .loc 1 3978 9 is_stmt 1 view .LVU3056 +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8571 .loc 1 3978 23 is_stmt 0 view .LVU3057 + 8572 010c 1A68 ldr r2, [r3] +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8573 .loc 1 3978 29 view .LVU3058 + 8574 010e 22F48042 bic r2, r2, #16384 + 8575 0112 1A60 str r2, [r3] +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8576 .loc 1 3981 9 is_stmt 1 view .LVU3059 +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8577 .loc 1 3981 17 is_stmt 0 view .LVU3060 + 8578 0114 A36B ldr r3, [r4, #56] +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8579 .loc 1 3981 12 view .LVU3061 + 8580 0116 002B cmp r3, #0 + 8581 0118 99D0 beq .L552 +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8582 .loc 1 3985 11 is_stmt 1 view .LVU3062 +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8583 .loc 1 3985 43 is_stmt 0 view .LVU3063 + 8584 011a 234A ldr r2, .L564+12 + 8585 011c 5A63 str r2, [r3, #52] +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8586 .loc 1 3988 11 is_stmt 1 view .LVU3064 +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8587 .loc 1 3988 15 is_stmt 0 view .LVU3065 + 8588 011e A06B ldr r0, [r4, #56] + 8589 0120 FFF7FEFF bl HAL_DMA_Abort_IT + 8590 .LVL578: +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8591 .loc 1 3988 14 discriminator 1 view .LVU3066 + 8592 0124 0028 cmp r0, #0 + 8593 0126 92D0 beq .L552 +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 330 + + + 8594 .loc 1 3991 13 is_stmt 1 view .LVU3067 +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8595 .loc 1 3991 17 is_stmt 0 view .LVU3068 + 8596 0128 A06B ldr r0, [r4, #56] +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8597 .loc 1 3991 25 view .LVU3069 + 8598 012a 436B ldr r3, [r0, #52] +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8599 .loc 1 3991 13 view .LVU3070 + 8600 012c 9847 blx r3 + 8601 .LVL579: + 8602 012e 8EE7 b .L552 + 8603 .L553: +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8604 .loc 1 4034 7 is_stmt 1 view .LVU3071 +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8605 .loc 1 4034 23 is_stmt 0 view .LVU3072 + 8606 0130 2823 movs r3, #40 + 8607 0132 84F84130 strb r3, [r4, #65] +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8608 .loc 1 4035 7 is_stmt 1 view .LVU3073 +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8609 .loc 1 4035 23 is_stmt 0 view .LVU3074 + 8610 0136 0022 movs r2, #0 + 8611 0138 84F84220 strb r2, [r4, #66] +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8612 .loc 1 4038 7 is_stmt 1 view .LVU3075 +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8613 .loc 1 4038 11 is_stmt 0 view .LVU3076 + 8614 013c 636C ldr r3, [r4, #68] +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8615 .loc 1 4038 23 view .LVU3077 + 8616 013e 43F08003 orr r3, r3, #128 + 8617 0142 6364 str r3, [r4, #68] +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8618 .loc 1 4041 7 is_stmt 1 view .LVU3078 +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8619 .loc 1 4041 7 view .LVU3079 + 8620 0144 84F84020 strb r2, [r4, #64] +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8621 .loc 1 4041 7 view .LVU3080 +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8622 .loc 1 4043 7 view .LVU3081 +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8623 .loc 1 4043 14 is_stmt 0 view .LVU3082 + 8624 0148 0125 movs r5, #1 + 8625 .LVL580: +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8626 .loc 1 4043 14 view .LVU3083 + 8627 014a 23E0 b .L548 + 8628 .LVL581: + 8629 .L554: +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8630 .loc 1 4049 7 is_stmt 1 view .LVU3084 +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8631 .loc 1 4049 11 is_stmt 0 view .LVU3085 + 8632 014c 638D ldrh r3, [r4, #42] + ARM GAS /tmp/ccNVyn8W.s page 331 + + + 8633 014e 9BB2 uxth r3, r3 +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8634 .loc 1 4049 30 view .LVU3086 + 8635 0150 228D ldrh r2, [r4, #40] +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8636 .loc 1 4049 23 view .LVU3087 + 8637 0152 9B1A subs r3, r3, r2 + 8638 0154 9BB2 uxth r3, r3 + 8639 0156 6385 strh r3, [r4, #42] @ movhi +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8640 .loc 1 4052 7 is_stmt 1 view .LVU3088 +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8641 .loc 1 4052 22 is_stmt 0 view .LVU3089 + 8642 0158 0023 movs r3, #0 + 8643 015a 2385 strh r3, [r4, #40] @ movhi +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8644 .loc 1 4069 5 is_stmt 1 view .LVU3090 +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8645 .loc 1 4069 11 is_stmt 0 view .LVU3091 + 8646 015c 2268 ldr r2, [r4] + 8647 015e 9369 ldr r3, [r2, #24] + 8648 0160 03F00803 and r3, r3, #8 + 8649 .LVL582: +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8650 .loc 1 4070 5 is_stmt 1 view .LVU3092 +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8651 .loc 1 4070 10 is_stmt 0 view .LVU3093 + 8652 0164 9169 ldr r1, [r2, #24] +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8653 .loc 1 4070 8 view .LVU3094 + 8654 0166 11F4803F tst r1, #65536 + 8655 016a 0DD1 bne .L556 + 8656 .LVL583: + 8657 .L557: +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8658 .loc 1 4078 5 is_stmt 1 view .LVU3095 +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8659 .loc 1 4078 5 view .LVU3096 + 8660 016c 0023 movs r3, #0 + 8661 016e 84F84030 strb r3, [r4, #64] +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8662 .loc 1 4078 5 view .LVU3097 +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8663 .loc 1 4081 5 view .LVU3098 +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8664 .loc 1 4081 9 is_stmt 0 view .LVU3099 + 8665 0172 2268 ldr r2, [r4] +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8666 .loc 1 4081 19 view .LVU3100 + 8667 0174 1368 ldr r3, [r2] +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8668 .loc 1 4081 25 view .LVU3101 + 8669 0176 43F48043 orr r3, r3, #16384 + 8670 017a 1360 str r3, [r2] +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8671 .loc 1 4087 5 is_stmt 1 view .LVU3102 + 8672 017c 4FF40041 mov r1, #32768 + ARM GAS /tmp/ccNVyn8W.s page 332 + + + 8673 0180 2046 mov r0, r4 + 8674 .LVL584: +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8675 .loc 1 4087 5 is_stmt 0 view .LVU3103 + 8676 0182 FFF7FEFF bl I2C_Enable_IRQ + 8677 .LVL585: +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8678 .loc 1 4089 5 is_stmt 1 view .LVU3104 +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8679 .loc 1 4089 12 is_stmt 0 view .LVU3105 + 8680 0186 05E0 b .L548 + 8681 .LVL586: + 8682 .L556: +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8683 .loc 1 4070 54 discriminator 1 view .LVU3106 + 8684 0188 002B cmp r3, #0 + 8685 018a EFD0 beq .L557 +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8686 .loc 1 4074 7 is_stmt 1 view .LVU3107 + 8687 018c 0823 movs r3, #8 + 8688 .LVL587: +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8689 .loc 1 4074 7 is_stmt 0 view .LVU3108 + 8690 018e D361 str r3, [r2, #28] + 8691 0190 ECE7 b .L557 + 8692 .LVL588: + 8693 .L558: +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8694 .loc 1 4093 12 view .LVU3109 + 8695 0192 0125 movs r5, #1 + 8696 .LVL589: + 8697 .L548: +4095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8698 .loc 1 4095 1 view .LVU3110 + 8699 0194 2846 mov r0, r5 + 8700 0196 F8BD pop {r3, r4, r5, r6, r7, pc} + 8701 .LVL590: + 8702 .L559: +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8703 .loc 1 3942 5 discriminator 1 view .LVU3111 + 8704 0198 0225 movs r5, #2 + 8705 .LVL591: +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8706 .loc 1 3942 5 discriminator 1 view .LVU3112 + 8707 019a FBE7 b .L548 + 8708 .L565: + 8709 .align 2 + 8710 .L564: + 8711 019c 00000000 .word I2C_Slave_ISR_DMA + 8712 01a0 00000000 .word I2C_DMASlaveTransmitCplt + 8713 01a4 00000000 .word I2C_DMAError + 8714 01a8 00000000 .word I2C_DMAAbort + 8715 .cfi_endproc + 8716 .LFE158: + 8718 .section .text.HAL_I2C_Slave_Seq_Receive_IT,"ax",%progbits + 8719 .align 1 + 8720 .global HAL_I2C_Slave_Seq_Receive_IT + ARM GAS /tmp/ccNVyn8W.s page 333 + + + 8721 .syntax unified + 8722 .thumb + 8723 .thumb_func + 8725 HAL_I2C_Slave_Seq_Receive_IT: + 8726 .LVL592: + 8727 .LFB159: +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8728 .loc 1 4109 1 is_stmt 1 view -0 + 8729 .cfi_startproc + 8730 @ args = 0, pretend = 0, frame = 0 + 8731 @ frame_needed = 0, uses_anonymous_args = 0 +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8732 .loc 1 4109 1 is_stmt 0 view .LVU3114 + 8733 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8734 .cfi_def_cfa_offset 24 + 8735 .cfi_offset 3, -24 + 8736 .cfi_offset 4, -20 + 8737 .cfi_offset 5, -16 + 8738 .cfi_offset 6, -12 + 8739 .cfi_offset 7, -8 + 8740 .cfi_offset 14, -4 + 8741 0002 0446 mov r4, r0 +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8742 .loc 1 4111 3 is_stmt 1 view .LVU3115 +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8743 .loc 1 4114 3 view .LVU3116 +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8744 .loc 1 4116 3 view .LVU3117 +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8745 .loc 1 4116 22 is_stmt 0 view .LVU3118 + 8746 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8747 .LVL593: +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8748 .loc 1 4116 6 view .LVU3119 + 8749 0008 00F02800 and r0, r0, #40 + 8750 000c 2828 cmp r0, #40 + 8751 000e 5ED1 bne .L572 + 8752 0010 0F46 mov r7, r1 + 8753 0012 1646 mov r6, r2 + 8754 0014 1D46 mov r5, r3 +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8755 .loc 1 4118 5 is_stmt 1 view .LVU3120 +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8756 .loc 1 4118 8 is_stmt 0 view .LVU3121 + 8757 0016 01B1 cbz r1, .L568 +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8758 .loc 1 4118 25 discriminator 1 view .LVU3122 + 8759 0018 22B9 cbnz r2, .L569 + 8760 .L568: +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8761 .loc 1 4120 7 is_stmt 1 view .LVU3123 +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8762 .loc 1 4120 23 is_stmt 0 view .LVU3124 + 8763 001a 4FF40073 mov r3, #512 + 8764 .LVL594: +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8765 .loc 1 4120 23 view .LVU3125 + ARM GAS /tmp/ccNVyn8W.s page 334 + + + 8766 001e 6364 str r3, [r4, #68] +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8767 .loc 1 4121 7 is_stmt 1 view .LVU3126 +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8768 .loc 1 4121 15 is_stmt 0 view .LVU3127 + 8769 0020 0120 movs r0, #1 + 8770 0022 55E0 b .L567 + 8771 .LVL595: + 8772 .L569: +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8773 .loc 1 4125 5 is_stmt 1 view .LVU3128 + 8774 0024 48F20201 movw r1, #32770 + 8775 .LVL596: +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8776 .loc 1 4125 5 is_stmt 0 view .LVU3129 + 8777 0028 2046 mov r0, r4 + 8778 002a FFF7FEFF bl I2C_Disable_IRQ + 8779 .LVL597: +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8780 .loc 1 4128 5 is_stmt 1 view .LVU3130 +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8781 .loc 1 4128 5 view .LVU3131 + 8782 002e 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 8783 0032 012B cmp r3, #1 + 8784 0034 4DD0 beq .L573 +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8785 .loc 1 4128 5 discriminator 2 view .LVU3132 + 8786 0036 0123 movs r3, #1 + 8787 0038 84F84030 strb r3, [r4, #64] +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8788 .loc 1 4128 5 discriminator 2 view .LVU3133 +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8789 .loc 1 4132 5 view .LVU3134 +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8790 .loc 1 4132 13 is_stmt 0 view .LVU3135 + 8791 003c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8792 0040 DBB2 uxtb r3, r3 +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8793 .loc 1 4132 8 view .LVU3136 + 8794 0042 292B cmp r3, #41 + 8795 0044 28D0 beq .L575 + 8796 .L570: +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8797 .loc 1 4158 5 is_stmt 1 view .LVU3137 +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8798 .loc 1 4158 21 is_stmt 0 view .LVU3138 + 8799 0046 2A23 movs r3, #42 + 8800 0048 84F84130 strb r3, [r4, #65] +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8801 .loc 1 4159 5 is_stmt 1 view .LVU3139 +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8802 .loc 1 4159 21 is_stmt 0 view .LVU3140 + 8803 004c 2023 movs r3, #32 + 8804 004e 84F84230 strb r3, [r4, #66] +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8805 .loc 1 4160 5 is_stmt 1 view .LVU3141 +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 335 + + + 8806 .loc 1 4160 21 is_stmt 0 view .LVU3142 + 8807 0052 0023 movs r3, #0 + 8808 0054 6364 str r3, [r4, #68] +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8809 .loc 1 4163 5 is_stmt 1 view .LVU3143 +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8810 .loc 1 4163 9 is_stmt 0 view .LVU3144 + 8811 0056 2268 ldr r2, [r4] +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8812 .loc 1 4163 19 view .LVU3145 + 8813 0058 5368 ldr r3, [r2, #4] +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8814 .loc 1 4163 25 view .LVU3146 + 8815 005a 23F40043 bic r3, r3, #32768 + 8816 005e 5360 str r3, [r2, #4] +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8817 .loc 1 4166 5 is_stmt 1 view .LVU3147 +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8818 .loc 1 4166 23 is_stmt 0 view .LVU3148 + 8819 0060 6762 str r7, [r4, #36] +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8820 .loc 1 4167 5 is_stmt 1 view .LVU3149 +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8821 .loc 1 4167 23 is_stmt 0 view .LVU3150 + 8822 0062 6685 strh r6, [r4, #42] @ movhi +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8823 .loc 1 4168 5 is_stmt 1 view .LVU3151 +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8824 .loc 1 4168 29 is_stmt 0 view .LVU3152 + 8825 0064 638D ldrh r3, [r4, #42] +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8826 .loc 1 4168 23 view .LVU3153 + 8827 0066 2385 strh r3, [r4, #40] @ movhi +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8828 .loc 1 4169 5 is_stmt 1 view .LVU3154 +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8829 .loc 1 4169 23 is_stmt 0 view .LVU3155 + 8830 0068 E562 str r5, [r4, #44] +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8831 .loc 1 4170 5 is_stmt 1 view .LVU3156 +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8832 .loc 1 4170 23 is_stmt 0 view .LVU3157 + 8833 006a 1B4B ldr r3, .L576 + 8834 006c 6363 str r3, [r4, #52] +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 8835 .loc 1 4172 5 is_stmt 1 view .LVU3158 +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 8836 .loc 1 4172 11 is_stmt 0 view .LVU3159 + 8837 006e 2268 ldr r2, [r4] + 8838 0070 9369 ldr r3, [r2, #24] + 8839 0072 03F00803 and r3, r3, #8 + 8840 .LVL598: +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8841 .loc 1 4173 5 is_stmt 1 view .LVU3160 +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8842 .loc 1 4173 10 is_stmt 0 view .LVU3161 + 8843 0076 9169 ldr r1, [r2, #24] + ARM GAS /tmp/ccNVyn8W.s page 336 + + +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8844 .loc 1 4173 8 view .LVU3162 + 8845 0078 11F4803F tst r1, #65536 + 8846 007c 02D1 bne .L571 +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8847 .loc 1 4173 55 discriminator 1 view .LVU3163 + 8848 007e 0BB1 cbz r3, .L571 +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8849 .loc 1 4177 7 is_stmt 1 view .LVU3164 + 8850 0080 0823 movs r3, #8 + 8851 .LVL599: +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8852 .loc 1 4177 7 is_stmt 0 view .LVU3165 + 8853 0082 D361 str r3, [r2, #28] + 8854 .L571: +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8855 .loc 1 4181 5 is_stmt 1 view .LVU3166 +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8856 .loc 1 4181 5 view .LVU3167 + 8857 0084 0025 movs r5, #0 + 8858 .LVL600: +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8859 .loc 1 4181 5 is_stmt 0 view .LVU3168 + 8860 0086 84F84050 strb r5, [r4, #64] +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8861 .loc 1 4181 5 is_stmt 1 view .LVU3169 +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8862 .loc 1 4187 5 view .LVU3170 + 8863 008a 48F20201 movw r1, #32770 + 8864 008e 2046 mov r0, r4 + 8865 0090 FFF7FEFF bl I2C_Enable_IRQ + 8866 .LVL601: +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8867 .loc 1 4189 5 view .LVU3171 +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8868 .loc 1 4189 12 is_stmt 0 view .LVU3172 + 8869 0094 2846 mov r0, r5 + 8870 0096 1BE0 b .L567 + 8871 .LVL602: + 8872 .L575: +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8873 .loc 1 4135 7 is_stmt 1 view .LVU3173 + 8874 0098 0121 movs r1, #1 + 8875 009a 2046 mov r0, r4 + 8876 009c FFF7FEFF bl I2C_Disable_IRQ + 8877 .LVL603: +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8878 .loc 1 4137 7 view .LVU3174 +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8879 .loc 1 4137 16 is_stmt 0 view .LVU3175 + 8880 00a0 2368 ldr r3, [r4] +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8881 .loc 1 4137 26 view .LVU3176 + 8882 00a2 1A68 ldr r2, [r3] +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8883 .loc 1 4137 10 view .LVU3177 + 8884 00a4 12F4804F tst r2, #16384 + ARM GAS /tmp/ccNVyn8W.s page 337 + + + 8885 00a8 CDD0 beq .L570 +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8886 .loc 1 4139 9 is_stmt 1 view .LVU3178 +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8887 .loc 1 4139 23 is_stmt 0 view .LVU3179 + 8888 00aa 1A68 ldr r2, [r3] +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8889 .loc 1 4139 29 view .LVU3180 + 8890 00ac 22F48042 bic r2, r2, #16384 + 8891 00b0 1A60 str r2, [r3] +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8892 .loc 1 4142 9 is_stmt 1 view .LVU3181 +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8893 .loc 1 4142 17 is_stmt 0 view .LVU3182 + 8894 00b2 A36B ldr r3, [r4, #56] +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8895 .loc 1 4142 12 view .LVU3183 + 8896 00b4 002B cmp r3, #0 + 8897 00b6 C6D0 beq .L570 +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8898 .loc 1 4146 11 is_stmt 1 view .LVU3184 +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8899 .loc 1 4146 43 is_stmt 0 view .LVU3185 + 8900 00b8 084A ldr r2, .L576+4 + 8901 00ba 5A63 str r2, [r3, #52] +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8902 .loc 1 4149 11 is_stmt 1 view .LVU3186 +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8903 .loc 1 4149 15 is_stmt 0 view .LVU3187 + 8904 00bc A06B ldr r0, [r4, #56] + 8905 00be FFF7FEFF bl HAL_DMA_Abort_IT + 8906 .LVL604: +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8907 .loc 1 4149 14 discriminator 1 view .LVU3188 + 8908 00c2 0028 cmp r0, #0 + 8909 00c4 BFD0 beq .L570 +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8910 .loc 1 4152 13 is_stmt 1 view .LVU3189 +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8911 .loc 1 4152 17 is_stmt 0 view .LVU3190 + 8912 00c6 A06B ldr r0, [r4, #56] +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8913 .loc 1 4152 25 view .LVU3191 + 8914 00c8 436B ldr r3, [r0, #52] +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8915 .loc 1 4152 13 view .LVU3192 + 8916 00ca 9847 blx r3 + 8917 .LVL605: + 8918 00cc BBE7 b .L570 + 8919 .LVL606: + 8920 .L572: +4193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8921 .loc 1 4193 12 view .LVU3193 + 8922 00ce 0120 movs r0, #1 + 8923 .LVL607: + 8924 .L567: +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 338 + + + 8925 .loc 1 4195 1 view .LVU3194 + 8926 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} + 8927 .LVL608: + 8928 .L573: +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8929 .loc 1 4128 5 discriminator 1 view .LVU3195 + 8930 00d2 0220 movs r0, #2 + 8931 00d4 FCE7 b .L567 + 8932 .L577: + 8933 00d6 00BF .align 2 + 8934 .L576: + 8935 00d8 00000000 .word I2C_Slave_ISR_IT + 8936 00dc 00000000 .word I2C_DMAAbort + 8937 .cfi_endproc + 8938 .LFE159: + 8940 .section .text.HAL_I2C_Slave_Seq_Receive_DMA,"ax",%progbits + 8941 .align 1 + 8942 .global HAL_I2C_Slave_Seq_Receive_DMA + 8943 .syntax unified + 8944 .thumb + 8945 .thumb_func + 8947 HAL_I2C_Slave_Seq_Receive_DMA: + 8948 .LVL609: + 8949 .LFB160: +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8950 .loc 1 4209 1 is_stmt 1 view -0 + 8951 .cfi_startproc + 8952 @ args = 0, pretend = 0, frame = 0 + 8953 @ frame_needed = 0, uses_anonymous_args = 0 +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8954 .loc 1 4209 1 is_stmt 0 view .LVU3197 + 8955 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8956 .cfi_def_cfa_offset 24 + 8957 .cfi_offset 3, -24 + 8958 .cfi_offset 4, -20 + 8959 .cfi_offset 5, -16 + 8960 .cfi_offset 6, -12 + 8961 .cfi_offset 7, -8 + 8962 .cfi_offset 14, -4 + 8963 0002 0446 mov r4, r0 +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8964 .loc 1 4211 3 is_stmt 1 view .LVU3198 +4212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8965 .loc 1 4212 3 view .LVU3199 +4215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8966 .loc 1 4215 3 view .LVU3200 +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8967 .loc 1 4217 3 view .LVU3201 +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8968 .loc 1 4217 22 is_stmt 0 view .LVU3202 + 8969 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8970 .LVL610: +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8971 .loc 1 4217 6 view .LVU3203 + 8972 0008 00F02800 and r0, r0, #40 + 8973 000c 2828 cmp r0, #40 + 8974 000e 40F0BE80 bne .L589 + ARM GAS /tmp/ccNVyn8W.s page 339 + + + 8975 0012 0F46 mov r7, r1 + 8976 0014 1646 mov r6, r2 + 8977 0016 1D46 mov r5, r3 +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8978 .loc 1 4219 5 is_stmt 1 view .LVU3204 +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8979 .loc 1 4219 8 is_stmt 0 view .LVU3205 + 8980 0018 01B1 cbz r1, .L580 +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8981 .loc 1 4219 25 discriminator 1 view .LVU3206 + 8982 001a 22B9 cbnz r2, .L581 + 8983 .L580: +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8984 .loc 1 4221 7 is_stmt 1 view .LVU3207 +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8985 .loc 1 4221 23 is_stmt 0 view .LVU3208 + 8986 001c 4FF40073 mov r3, #512 + 8987 .LVL611: +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8988 .loc 1 4221 23 view .LVU3209 + 8989 0020 6364 str r3, [r4, #68] +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8990 .loc 1 4222 7 is_stmt 1 view .LVU3210 +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8991 .loc 1 4222 15 is_stmt 0 view .LVU3211 + 8992 0022 0125 movs r5, #1 + 8993 .LVL612: +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8994 .loc 1 4222 15 view .LVU3212 + 8995 0024 B4E0 b .L579 + 8996 .LVL613: + 8997 .L581: +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8998 .loc 1 4226 5 is_stmt 1 view .LVU3213 + 8999 0026 48F20201 movw r1, #32770 + 9000 .LVL614: +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9001 .loc 1 4226 5 is_stmt 0 view .LVU3214 + 9002 002a 2046 mov r0, r4 + 9003 002c FFF7FEFF bl I2C_Disable_IRQ + 9004 .LVL615: +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9005 .loc 1 4229 5 is_stmt 1 view .LVU3215 +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9006 .loc 1 4229 5 view .LVU3216 + 9007 0030 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 9008 0034 012B cmp r3, #1 + 9009 0036 00F0AD80 beq .L590 +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9010 .loc 1 4229 5 discriminator 2 view .LVU3217 + 9011 003a 0123 movs r3, #1 + 9012 003c 84F84030 strb r3, [r4, #64] +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9013 .loc 1 4229 5 discriminator 2 view .LVU3218 +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9014 .loc 1 4233 5 view .LVU3219 +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 340 + + + 9015 .loc 1 4233 13 is_stmt 0 view .LVU3220 + 9016 0040 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9017 0044 DBB2 uxtb r3, r3 +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9018 .loc 1 4233 8 view .LVU3221 + 9019 0046 292B cmp r3, #41 + 9020 0048 3DD0 beq .L593 +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9021 .loc 1 4258 10 is_stmt 1 view .LVU3222 +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9022 .loc 1 4258 18 is_stmt 0 view .LVU3223 + 9023 004a 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9024 004e DBB2 uxtb r3, r3 +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9025 .loc 1 4258 13 view .LVU3224 + 9026 0050 2A2B cmp r3, #42 + 9027 0052 54D0 beq .L594 + 9028 .L583: +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9029 .loc 1 4283 5 is_stmt 1 view .LVU3225 +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9030 .loc 1 4285 5 view .LVU3226 +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9031 .loc 1 4285 21 is_stmt 0 view .LVU3227 + 9032 0054 2A23 movs r3, #42 + 9033 0056 84F84130 strb r3, [r4, #65] +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9034 .loc 1 4286 5 is_stmt 1 view .LVU3228 +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9035 .loc 1 4286 21 is_stmt 0 view .LVU3229 + 9036 005a 2023 movs r3, #32 + 9037 005c 84F84230 strb r3, [r4, #66] +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9038 .loc 1 4287 5 is_stmt 1 view .LVU3230 +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9039 .loc 1 4287 21 is_stmt 0 view .LVU3231 + 9040 0060 0023 movs r3, #0 + 9041 0062 6364 str r3, [r4, #68] +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9042 .loc 1 4290 5 is_stmt 1 view .LVU3232 +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9043 .loc 1 4290 9 is_stmt 0 view .LVU3233 + 9044 0064 2268 ldr r2, [r4] +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9045 .loc 1 4290 19 view .LVU3234 + 9046 0066 5368 ldr r3, [r2, #4] +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9047 .loc 1 4290 25 view .LVU3235 + 9048 0068 23F40043 bic r3, r3, #32768 + 9049 006c 5360 str r3, [r2, #4] +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 9050 .loc 1 4293 5 is_stmt 1 view .LVU3236 +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 9051 .loc 1 4293 23 is_stmt 0 view .LVU3237 + 9052 006e 6762 str r7, [r4, #36] +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9053 .loc 1 4294 5 is_stmt 1 view .LVU3238 + ARM GAS /tmp/ccNVyn8W.s page 341 + + +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9054 .loc 1 4294 23 is_stmt 0 view .LVU3239 + 9055 0070 6685 strh r6, [r4, #42] @ movhi +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9056 .loc 1 4295 5 is_stmt 1 view .LVU3240 +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9057 .loc 1 4295 29 is_stmt 0 view .LVU3241 + 9058 0072 638D ldrh r3, [r4, #42] +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9059 .loc 1 4295 23 view .LVU3242 + 9060 0074 2385 strh r3, [r4, #40] @ movhi +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9061 .loc 1 4296 5 is_stmt 1 view .LVU3243 +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9062 .loc 1 4296 23 is_stmt 0 view .LVU3244 + 9063 0076 E562 str r5, [r4, #44] +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9064 .loc 1 4297 5 is_stmt 1 view .LVU3245 +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9065 .loc 1 4297 23 is_stmt 0 view .LVU3246 + 9066 0078 474B ldr r3, .L595 + 9067 007a 6363 str r3, [r4, #52] +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9068 .loc 1 4299 5 is_stmt 1 view .LVU3247 +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9069 .loc 1 4299 13 is_stmt 0 view .LVU3248 + 9070 007c E36B ldr r3, [r4, #60] +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9071 .loc 1 4299 8 view .LVU3249 + 9072 007e 002B cmp r3, #0 + 9073 0080 54D0 beq .L584 +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9074 .loc 1 4302 7 is_stmt 1 view .LVU3250 +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9075 .loc 1 4302 38 is_stmt 0 view .LVU3251 + 9076 0082 464A ldr r2, .L595+4 + 9077 0084 9A62 str r2, [r3, #40] +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9078 .loc 1 4305 7 is_stmt 1 view .LVU3252 +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9079 .loc 1 4305 11 is_stmt 0 view .LVU3253 + 9080 0086 E36B ldr r3, [r4, #60] +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9081 .loc 1 4305 39 view .LVU3254 + 9082 0088 454A ldr r2, .L595+8 + 9083 008a 1A63 str r2, [r3, #48] +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9084 .loc 1 4308 7 is_stmt 1 view .LVU3255 +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9085 .loc 1 4308 11 is_stmt 0 view .LVU3256 + 9086 008c E26B ldr r2, [r4, #60] +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9087 .loc 1 4308 42 view .LVU3257 + 9088 008e 0023 movs r3, #0 + 9089 0090 D362 str r3, [r2, #44] +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9090 .loc 1 4309 7 is_stmt 1 view .LVU3258 + ARM GAS /tmp/ccNVyn8W.s page 342 + + +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9091 .loc 1 4309 11 is_stmt 0 view .LVU3259 + 9092 0092 E26B ldr r2, [r4, #60] +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9093 .loc 1 4309 39 view .LVU3260 + 9094 0094 5363 str r3, [r2, #52] +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 9095 .loc 1 4312 7 is_stmt 1 view .LVU3261 +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 9096 .loc 1 4312 69 is_stmt 0 view .LVU3262 + 9097 0096 2168 ldr r1, [r4] +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 9098 .loc 1 4312 23 view .LVU3263 + 9099 0098 238D ldrh r3, [r4, #40] + 9100 009a 3A46 mov r2, r7 + 9101 009c 2431 adds r1, r1, #36 + 9102 009e E06B ldr r0, [r4, #60] + 9103 00a0 FFF7FEFF bl HAL_DMA_Start_IT + 9104 .LVL616: +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9105 .loc 1 4330 5 is_stmt 1 view .LVU3264 +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9106 .loc 1 4330 8 is_stmt 0 view .LVU3265 + 9107 00a4 0546 mov r5, r0 + 9108 .LVL617: +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9109 .loc 1 4330 8 view .LVU3266 + 9110 00a6 0028 cmp r0, #0 + 9111 00a8 4ED0 beq .L585 +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9112 .loc 1 4341 7 is_stmt 1 view .LVU3267 +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9113 .loc 1 4341 23 is_stmt 0 view .LVU3268 + 9114 00aa 2823 movs r3, #40 + 9115 00ac 84F84130 strb r3, [r4, #65] +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9116 .loc 1 4342 7 is_stmt 1 view .LVU3269 +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9117 .loc 1 4342 23 is_stmt 0 view .LVU3270 + 9118 00b0 0022 movs r2, #0 + 9119 00b2 84F84220 strb r2, [r4, #66] +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9120 .loc 1 4345 7 is_stmt 1 view .LVU3271 +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9121 .loc 1 4345 11 is_stmt 0 view .LVU3272 + 9122 00b6 636C ldr r3, [r4, #68] +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9123 .loc 1 4345 23 view .LVU3273 + 9124 00b8 43F01003 orr r3, r3, #16 + 9125 00bc 6364 str r3, [r4, #68] +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9126 .loc 1 4348 7 is_stmt 1 view .LVU3274 +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9127 .loc 1 4348 7 view .LVU3275 + 9128 00be 84F84020 strb r2, [r4, #64] +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9129 .loc 1 4348 7 view .LVU3276 + ARM GAS /tmp/ccNVyn8W.s page 343 + + +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9130 .loc 1 4350 7 view .LVU3277 +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9131 .loc 1 4350 14 is_stmt 0 view .LVU3278 + 9132 00c2 0125 movs r5, #1 + 9133 00c4 64E0 b .L579 + 9134 .LVL618: + 9135 .L593: +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9136 .loc 1 4236 7 is_stmt 1 view .LVU3279 + 9137 00c6 0121 movs r1, #1 + 9138 00c8 2046 mov r0, r4 + 9139 00ca FFF7FEFF bl I2C_Disable_IRQ + 9140 .LVL619: +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9141 .loc 1 4238 7 view .LVU3280 +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9142 .loc 1 4238 16 is_stmt 0 view .LVU3281 + 9143 00ce 2368 ldr r3, [r4] +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9144 .loc 1 4238 26 view .LVU3282 + 9145 00d0 1A68 ldr r2, [r3] +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9146 .loc 1 4238 10 view .LVU3283 + 9147 00d2 12F4804F tst r2, #16384 + 9148 00d6 BDD0 beq .L583 +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9149 .loc 1 4241 9 is_stmt 1 view .LVU3284 +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9150 .loc 1 4241 17 is_stmt 0 view .LVU3285 + 9151 00d8 A26B ldr r2, [r4, #56] +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9152 .loc 1 4241 12 view .LVU3286 + 9153 00da 002A cmp r2, #0 + 9154 00dc BAD0 beq .L583 +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9155 .loc 1 4243 11 is_stmt 1 view .LVU3287 +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9156 .loc 1 4243 25 is_stmt 0 view .LVU3288 + 9157 00de 1A68 ldr r2, [r3] +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9158 .loc 1 4243 31 view .LVU3289 + 9159 00e0 22F48042 bic r2, r2, #16384 + 9160 00e4 1A60 str r2, [r3] +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9161 .loc 1 4247 11 is_stmt 1 view .LVU3290 +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9162 .loc 1 4247 15 is_stmt 0 view .LVU3291 + 9163 00e6 A36B ldr r3, [r4, #56] +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9164 .loc 1 4247 43 view .LVU3292 + 9165 00e8 2E4A ldr r2, .L595+12 + 9166 00ea 5A63 str r2, [r3, #52] +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9167 .loc 1 4250 11 is_stmt 1 view .LVU3293 +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9168 .loc 1 4250 15 is_stmt 0 view .LVU3294 + ARM GAS /tmp/ccNVyn8W.s page 344 + + + 9169 00ec A06B ldr r0, [r4, #56] + 9170 00ee FFF7FEFF bl HAL_DMA_Abort_IT + 9171 .LVL620: +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9172 .loc 1 4250 14 discriminator 1 view .LVU3295 + 9173 00f2 0028 cmp r0, #0 + 9174 00f4 AED0 beq .L583 +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9175 .loc 1 4253 13 is_stmt 1 view .LVU3296 +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9176 .loc 1 4253 17 is_stmt 0 view .LVU3297 + 9177 00f6 A06B ldr r0, [r4, #56] +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9178 .loc 1 4253 25 view .LVU3298 + 9179 00f8 436B ldr r3, [r0, #52] +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9180 .loc 1 4253 13 view .LVU3299 + 9181 00fa 9847 blx r3 + 9182 .LVL621: + 9183 00fc AAE7 b .L583 + 9184 .L594: +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9185 .loc 1 4260 7 is_stmt 1 view .LVU3300 +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9186 .loc 1 4260 16 is_stmt 0 view .LVU3301 + 9187 00fe 2368 ldr r3, [r4] +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9188 .loc 1 4260 26 view .LVU3302 + 9189 0100 1A68 ldr r2, [r3] +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9190 .loc 1 4260 10 view .LVU3303 + 9191 0102 12F4004F tst r2, #32768 + 9192 0106 A5D0 beq .L583 +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9193 .loc 1 4262 9 is_stmt 1 view .LVU3304 +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9194 .loc 1 4262 23 is_stmt 0 view .LVU3305 + 9195 0108 1A68 ldr r2, [r3] +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9196 .loc 1 4262 29 view .LVU3306 + 9197 010a 22F40042 bic r2, r2, #32768 + 9198 010e 1A60 str r2, [r3] +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9199 .loc 1 4265 9 is_stmt 1 view .LVU3307 +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9200 .loc 1 4265 17 is_stmt 0 view .LVU3308 + 9201 0110 E36B ldr r3, [r4, #60] +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9202 .loc 1 4265 12 view .LVU3309 + 9203 0112 002B cmp r3, #0 + 9204 0114 9ED0 beq .L583 +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9205 .loc 1 4269 11 is_stmt 1 view .LVU3310 +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9206 .loc 1 4269 43 is_stmt 0 view .LVU3311 + 9207 0116 234A ldr r2, .L595+12 + 9208 0118 5A63 str r2, [r3, #52] + ARM GAS /tmp/ccNVyn8W.s page 345 + + +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9209 .loc 1 4272 11 is_stmt 1 view .LVU3312 +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9210 .loc 1 4272 15 is_stmt 0 view .LVU3313 + 9211 011a E06B ldr r0, [r4, #60] + 9212 011c FFF7FEFF bl HAL_DMA_Abort_IT + 9213 .LVL622: +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9214 .loc 1 4272 14 discriminator 1 view .LVU3314 + 9215 0120 0028 cmp r0, #0 + 9216 0122 97D0 beq .L583 +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9217 .loc 1 4275 13 is_stmt 1 view .LVU3315 +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9218 .loc 1 4275 17 is_stmt 0 view .LVU3316 + 9219 0124 E06B ldr r0, [r4, #60] +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9220 .loc 1 4275 25 view .LVU3317 + 9221 0126 436B ldr r3, [r0, #52] +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9222 .loc 1 4275 13 view .LVU3318 + 9223 0128 9847 blx r3 + 9224 .LVL623: + 9225 012a 93E7 b .L583 + 9226 .L584: +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9227 .loc 1 4318 7 is_stmt 1 view .LVU3319 +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9228 .loc 1 4318 23 is_stmt 0 view .LVU3320 + 9229 012c 2823 movs r3, #40 + 9230 012e 84F84130 strb r3, [r4, #65] +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9231 .loc 1 4319 7 is_stmt 1 view .LVU3321 +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9232 .loc 1 4319 23 is_stmt 0 view .LVU3322 + 9233 0132 0022 movs r2, #0 + 9234 0134 84F84220 strb r2, [r4, #66] +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9235 .loc 1 4322 7 is_stmt 1 view .LVU3323 +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9236 .loc 1 4322 11 is_stmt 0 view .LVU3324 + 9237 0138 636C ldr r3, [r4, #68] +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9238 .loc 1 4322 23 view .LVU3325 + 9239 013a 43F08003 orr r3, r3, #128 + 9240 013e 6364 str r3, [r4, #68] +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9241 .loc 1 4325 7 is_stmt 1 view .LVU3326 +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9242 .loc 1 4325 7 view .LVU3327 + 9243 0140 84F84020 strb r2, [r4, #64] +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9244 .loc 1 4325 7 view .LVU3328 +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9245 .loc 1 4327 7 view .LVU3329 +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9246 .loc 1 4327 14 is_stmt 0 view .LVU3330 + ARM GAS /tmp/ccNVyn8W.s page 346 + + + 9247 0144 0125 movs r5, #1 + 9248 .LVL624: +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9249 .loc 1 4327 14 view .LVU3331 + 9250 0146 23E0 b .L579 + 9251 .LVL625: + 9252 .L585: +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9253 .loc 1 4333 7 is_stmt 1 view .LVU3332 +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9254 .loc 1 4333 11 is_stmt 0 view .LVU3333 + 9255 0148 638D ldrh r3, [r4, #42] + 9256 014a 9BB2 uxth r3, r3 +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9257 .loc 1 4333 30 view .LVU3334 + 9258 014c 228D ldrh r2, [r4, #40] +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9259 .loc 1 4333 23 view .LVU3335 + 9260 014e 9B1A subs r3, r3, r2 + 9261 0150 9BB2 uxth r3, r3 + 9262 0152 6385 strh r3, [r4, #42] @ movhi +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9263 .loc 1 4336 7 is_stmt 1 view .LVU3336 +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9264 .loc 1 4336 22 is_stmt 0 view .LVU3337 + 9265 0154 0023 movs r3, #0 + 9266 0156 2385 strh r3, [r4, #40] @ movhi +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9267 .loc 1 4353 5 is_stmt 1 view .LVU3338 +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9268 .loc 1 4353 11 is_stmt 0 view .LVU3339 + 9269 0158 2268 ldr r2, [r4] + 9270 015a 9369 ldr r3, [r2, #24] + 9271 015c 03F00803 and r3, r3, #8 + 9272 .LVL626: +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9273 .loc 1 4354 5 is_stmt 1 view .LVU3340 +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9274 .loc 1 4354 10 is_stmt 0 view .LVU3341 + 9275 0160 9169 ldr r1, [r2, #24] +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9276 .loc 1 4354 8 view .LVU3342 + 9277 0162 11F4803F tst r1, #65536 + 9278 0166 0DD0 beq .L587 + 9279 .LVL627: + 9280 .L588: +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9281 .loc 1 4362 5 is_stmt 1 view .LVU3343 +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9282 .loc 1 4362 5 view .LVU3344 + 9283 0168 0023 movs r3, #0 + 9284 016a 84F84030 strb r3, [r4, #64] +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9285 .loc 1 4362 5 view .LVU3345 +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9286 .loc 1 4365 5 view .LVU3346 +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 347 + + + 9287 .loc 1 4365 9 is_stmt 0 view .LVU3347 + 9288 016e 2268 ldr r2, [r4] +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9289 .loc 1 4365 19 view .LVU3348 + 9290 0170 1368 ldr r3, [r2] +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9291 .loc 1 4365 25 view .LVU3349 + 9292 0172 43F40043 orr r3, r3, #32768 + 9293 0176 1360 str r3, [r2] +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9294 .loc 1 4371 5 is_stmt 1 view .LVU3350 + 9295 0178 48F20201 movw r1, #32770 + 9296 017c 2046 mov r0, r4 + 9297 .LVL628: +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9298 .loc 1 4371 5 is_stmt 0 view .LVU3351 + 9299 017e FFF7FEFF bl I2C_Enable_IRQ + 9300 .LVL629: +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9301 .loc 1 4373 5 is_stmt 1 view .LVU3352 +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9302 .loc 1 4373 12 is_stmt 0 view .LVU3353 + 9303 0182 05E0 b .L579 + 9304 .LVL630: + 9305 .L587: +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9306 .loc 1 4354 55 discriminator 1 view .LVU3354 + 9307 0184 002B cmp r3, #0 + 9308 0186 EFD0 beq .L588 +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9309 .loc 1 4358 7 is_stmt 1 view .LVU3355 + 9310 0188 0823 movs r3, #8 + 9311 .LVL631: +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9312 .loc 1 4358 7 is_stmt 0 view .LVU3356 + 9313 018a D361 str r3, [r2, #28] + 9314 018c ECE7 b .L588 + 9315 .LVL632: + 9316 .L589: +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9317 .loc 1 4377 12 view .LVU3357 + 9318 018e 0125 movs r5, #1 + 9319 .LVL633: + 9320 .L579: +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9321 .loc 1 4379 1 view .LVU3358 + 9322 0190 2846 mov r0, r5 + 9323 0192 F8BD pop {r3, r4, r5, r6, r7, pc} + 9324 .LVL634: + 9325 .L590: +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9326 .loc 1 4229 5 discriminator 1 view .LVU3359 + 9327 0194 0225 movs r5, #2 + 9328 .LVL635: +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9329 .loc 1 4229 5 discriminator 1 view .LVU3360 + 9330 0196 FBE7 b .L579 + ARM GAS /tmp/ccNVyn8W.s page 348 + + + 9331 .L596: + 9332 .align 2 + 9333 .L595: + 9334 0198 00000000 .word I2C_Slave_ISR_DMA + 9335 019c 00000000 .word I2C_DMASlaveReceiveCplt + 9336 01a0 00000000 .word I2C_DMAError + 9337 01a4 00000000 .word I2C_DMAAbort + 9338 .cfi_endproc + 9339 .LFE160: + 9341 .section .text.HAL_I2C_EnableListen_IT,"ax",%progbits + 9342 .align 1 + 9343 .global HAL_I2C_EnableListen_IT + 9344 .syntax unified + 9345 .thumb + 9346 .thumb_func + 9348 HAL_I2C_EnableListen_IT: + 9349 .LVL636: + 9350 .LFB161: +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 9351 .loc 1 4388 1 is_stmt 1 view -0 + 9352 .cfi_startproc + 9353 @ args = 0, pretend = 0, frame = 0 + 9354 @ frame_needed = 0, uses_anonymous_args = 0 +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 9355 .loc 1 4388 1 is_stmt 0 view .LVU3362 + 9356 0000 08B5 push {r3, lr} + 9357 .cfi_def_cfa_offset 8 + 9358 .cfi_offset 3, -8 + 9359 .cfi_offset 14, -4 +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9360 .loc 1 4389 3 is_stmt 1 view .LVU3363 +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9361 .loc 1 4389 11 is_stmt 0 view .LVU3364 + 9362 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9363 0006 DBB2 uxtb r3, r3 +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9364 .loc 1 4389 6 view .LVU3365 + 9365 0008 202B cmp r3, #32 + 9366 000a 01D0 beq .L601 +4401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9367 .loc 1 4401 12 view .LVU3366 + 9368 000c 0220 movs r0, #2 + 9369 .LVL637: + 9370 .L598: +4403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9371 .loc 1 4403 1 view .LVU3367 + 9372 000e 08BD pop {r3, pc} + 9373 .LVL638: + 9374 .L601: +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9375 .loc 1 4391 5 is_stmt 1 view .LVU3368 +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9376 .loc 1 4391 17 is_stmt 0 view .LVU3369 + 9377 0010 2823 movs r3, #40 + 9378 0012 80F84130 strb r3, [r0, #65] +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9379 .loc 1 4392 5 is_stmt 1 view .LVU3370 + ARM GAS /tmp/ccNVyn8W.s page 349 + + +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9380 .loc 1 4392 19 is_stmt 0 view .LVU3371 + 9381 0016 044B ldr r3, .L602 + 9382 0018 4363 str r3, [r0, #52] +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9383 .loc 1 4395 5 is_stmt 1 view .LVU3372 + 9384 001a 4FF40041 mov r1, #32768 + 9385 001e FFF7FEFF bl I2C_Enable_IRQ + 9386 .LVL639: +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9387 .loc 1 4397 5 view .LVU3373 +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9388 .loc 1 4397 12 is_stmt 0 view .LVU3374 + 9389 0022 0020 movs r0, #0 + 9390 0024 F3E7 b .L598 + 9391 .L603: + 9392 0026 00BF .align 2 + 9393 .L602: + 9394 0028 00000000 .word I2C_Slave_ISR_IT + 9395 .cfi_endproc + 9396 .LFE161: + 9398 .section .text.HAL_I2C_DisableListen_IT,"ax",%progbits + 9399 .align 1 + 9400 .global HAL_I2C_DisableListen_IT + 9401 .syntax unified + 9402 .thumb + 9403 .thumb_func + 9405 HAL_I2C_DisableListen_IT: + 9406 .LVL640: + 9407 .LFB162: +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9408 .loc 1 4412 1 is_stmt 1 view -0 + 9409 .cfi_startproc + 9410 @ args = 0, pretend = 0, frame = 0 + 9411 @ frame_needed = 0, uses_anonymous_args = 0 +4414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9412 .loc 1 4414 3 view .LVU3376 +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9413 .loc 1 4417 3 view .LVU3377 +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9414 .loc 1 4417 11 is_stmt 0 view .LVU3378 + 9415 0000 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9416 0004 DBB2 uxtb r3, r3 +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9417 .loc 1 4417 6 view .LVU3379 + 9418 0006 282B cmp r3, #40 + 9419 0008 01D0 beq .L611 +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9420 .loc 1 4432 12 view .LVU3380 + 9421 000a 0220 movs r0, #2 + 9422 .LVL641: +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9423 .loc 1 4434 1 view .LVU3381 + 9424 000c 7047 bx lr + 9425 .LVL642: + 9426 .L611: +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + ARM GAS /tmp/ccNVyn8W.s page 350 + + + 9427 .loc 1 4412 1 view .LVU3382 + 9428 000e 10B5 push {r4, lr} + 9429 .cfi_def_cfa_offset 8 + 9430 .cfi_offset 4, -8 + 9431 .cfi_offset 14, -4 +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 9432 .loc 1 4419 5 is_stmt 1 view .LVU3383 +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 9433 .loc 1 4419 26 is_stmt 0 view .LVU3384 + 9434 0010 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 9435 .LVL643: +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9436 .loc 1 4420 5 is_stmt 1 view .LVU3385 +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9437 .loc 1 4420 48 is_stmt 0 view .LVU3386 + 9438 0014 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9439 .loc 1 4420 31 view .LVU3387 + 9440 0018 02F00302 and r2, r2, #3 + 9441 .LVL644: +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9442 .loc 1 4420 31 view .LVU3388 + 9443 001c 1343 orrs r3, r3, r2 +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9444 .loc 1 4420 25 view .LVU3389 + 9445 001e 0363 str r3, [r0, #48] +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9446 .loc 1 4421 5 is_stmt 1 view .LVU3390 +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9447 .loc 1 4421 17 is_stmt 0 view .LVU3391 + 9448 0020 2023 movs r3, #32 + 9449 0022 80F84130 strb r3, [r0, #65] +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9450 .loc 1 4422 5 is_stmt 1 view .LVU3392 +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9451 .loc 1 4422 16 is_stmt 0 view .LVU3393 + 9452 0026 0024 movs r4, #0 + 9453 0028 80F84240 strb r4, [r0, #66] +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9454 .loc 1 4423 5 is_stmt 1 view .LVU3394 +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9455 .loc 1 4423 19 is_stmt 0 view .LVU3395 + 9456 002c 4463 str r4, [r0, #52] +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9457 .loc 1 4426 5 is_stmt 1 view .LVU3396 + 9458 002e 4FF40041 mov r1, #32768 + 9459 0032 FFF7FEFF bl I2C_Disable_IRQ + 9460 .LVL645: +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9461 .loc 1 4428 5 view .LVU3397 +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9462 .loc 1 4428 12 is_stmt 0 view .LVU3398 + 9463 0036 2046 mov r0, r4 +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9464 .loc 1 4434 1 view .LVU3399 + 9465 0038 10BD pop {r4, pc} + 9466 .cfi_endproc + ARM GAS /tmp/ccNVyn8W.s page 351 + + + 9467 .LFE162: + 9469 .section .text.HAL_I2C_Master_Abort_IT,"ax",%progbits + 9470 .align 1 + 9471 .global HAL_I2C_Master_Abort_IT + 9472 .syntax unified + 9473 .thumb + 9474 .thumb_func + 9476 HAL_I2C_Master_Abort_IT: + 9477 .LVL646: + 9478 .LFB163: +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) + 9479 .loc 1 4445 1 is_stmt 1 view -0 + 9480 .cfi_startproc + 9481 @ args = 0, pretend = 0, frame = 0 + 9482 @ frame_needed = 0, uses_anonymous_args = 0 +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9483 .loc 1 4446 3 view .LVU3401 +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9484 .loc 1 4446 11 is_stmt 0 view .LVU3402 + 9485 0000 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 9486 0004 DBB2 uxtb r3, r3 +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9487 .loc 1 4446 6 view .LVU3403 + 9488 0006 102B cmp r3, #16 + 9489 0008 36D1 bne .L616 +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) + 9490 .loc 1 4445 1 view .LVU3404 + 9491 000a 30B5 push {r4, r5, lr} + 9492 .cfi_def_cfa_offset 12 + 9493 .cfi_offset 4, -12 + 9494 .cfi_offset 5, -8 + 9495 .cfi_offset 14, -4 + 9496 000c 83B0 sub sp, sp, #12 + 9497 .cfi_def_cfa_offset 24 + 9498 000e 0446 mov r4, r0 + 9499 0010 0D46 mov r5, r1 +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9500 .loc 1 4449 5 is_stmt 1 view .LVU3405 +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9501 .loc 1 4449 5 view .LVU3406 + 9502 0012 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 9503 0016 012B cmp r3, #1 + 9504 0018 30D0 beq .L617 +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9505 .loc 1 4449 5 discriminator 2 view .LVU3407 + 9506 001a 0123 movs r3, #1 + 9507 001c 80F84030 strb r3, [r0, #64] +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9508 .loc 1 4449 5 discriminator 2 view .LVU3408 +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9509 .loc 1 4452 5 view .LVU3409 +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9510 .loc 1 4452 13 is_stmt 0 view .LVU3410 + 9511 0020 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9512 0024 DBB2 uxtb r3, r3 +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9513 .loc 1 4452 8 view .LVU3411 + ARM GAS /tmp/ccNVyn8W.s page 352 + + + 9514 0026 212B cmp r3, #33 + 9515 0028 1AD0 beq .L622 +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9516 .loc 1 4457 10 is_stmt 1 view .LVU3412 +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9517 .loc 1 4457 18 is_stmt 0 view .LVU3413 + 9518 002a 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9519 002e DBB2 uxtb r3, r3 +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9520 .loc 1 4457 13 view .LVU3414 + 9521 0030 222B cmp r3, #34 + 9522 0032 1BD0 beq .L623 + 9523 .LVL647: + 9524 .L615: +4465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9525 .loc 1 4465 5 is_stmt 1 view .LVU3415 +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9526 .loc 1 4468 5 view .LVU3416 +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9527 .loc 1 4468 17 is_stmt 0 view .LVU3417 + 9528 0034 6023 movs r3, #96 + 9529 0036 84F84130 strb r3, [r4, #65] +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9530 .loc 1 4472 5 is_stmt 1 view .LVU3418 + 9531 003a 114B ldr r3, .L624 + 9532 003c 0093 str r3, [sp] + 9533 003e 4FF00073 mov r3, #33554432 + 9534 0042 0122 movs r2, #1 + 9535 0044 2946 mov r1, r5 + 9536 0046 2046 mov r0, r4 + 9537 0048 FFF7FEFF bl I2C_TransferConfig + 9538 .LVL648: +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9539 .loc 1 4475 5 view .LVU3419 +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9540 .loc 1 4475 5 view .LVU3420 + 9541 004c 0025 movs r5, #0 + 9542 .LVL649: +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9543 .loc 1 4475 5 is_stmt 0 view .LVU3421 + 9544 004e 84F84050 strb r5, [r4, #64] +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9545 .loc 1 4475 5 is_stmt 1 view .LVU3422 +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9546 .loc 1 4480 5 view .LVU3423 + 9547 0052 2021 movs r1, #32 + 9548 0054 2046 mov r0, r4 + 9549 0056 FFF7FEFF bl I2C_Enable_IRQ + 9550 .LVL650: +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9551 .loc 1 4482 5 view .LVU3424 +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9552 .loc 1 4482 12 is_stmt 0 view .LVU3425 + 9553 005a 2846 mov r0, r5 + 9554 .L613: +4490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9555 .loc 1 4490 1 view .LVU3426 + ARM GAS /tmp/ccNVyn8W.s page 353 + + + 9556 005c 03B0 add sp, sp, #12 + 9557 .cfi_remember_state + 9558 .cfi_def_cfa_offset 12 + 9559 @ sp needed + 9560 005e 30BD pop {r4, r5, pc} + 9561 .LVL651: + 9562 .L622: + 9563 .cfi_restore_state +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9564 .loc 1 4454 7 is_stmt 1 view .LVU3427 + 9565 0060 0121 movs r1, #1 + 9566 .LVL652: +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9567 .loc 1 4454 7 is_stmt 0 view .LVU3428 + 9568 0062 FFF7FEFF bl I2C_Disable_IRQ + 9569 .LVL653: +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9570 .loc 1 4455 7 is_stmt 1 view .LVU3429 +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9571 .loc 1 4455 27 is_stmt 0 view .LVU3430 + 9572 0066 1123 movs r3, #17 + 9573 0068 2363 str r3, [r4, #48] + 9574 006a E3E7 b .L615 + 9575 .LVL654: + 9576 .L623: +4459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9577 .loc 1 4459 7 is_stmt 1 view .LVU3431 + 9578 006c 0221 movs r1, #2 + 9579 .LVL655: +4459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9580 .loc 1 4459 7 is_stmt 0 view .LVU3432 + 9581 006e FFF7FEFF bl I2C_Disable_IRQ + 9582 .LVL656: +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9583 .loc 1 4460 7 is_stmt 1 view .LVU3433 +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9584 .loc 1 4460 27 is_stmt 0 view .LVU3434 + 9585 0072 1223 movs r3, #18 + 9586 0074 2363 str r3, [r4, #48] + 9587 0076 DDE7 b .L615 + 9588 .LVL657: + 9589 .L616: + 9590 .cfi_def_cfa_offset 0 + 9591 .cfi_restore 4 + 9592 .cfi_restore 5 + 9593 .cfi_restore 14 +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9594 .loc 1 4488 12 view .LVU3435 + 9595 0078 0120 movs r0, #1 + 9596 .LVL658: +4490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9597 .loc 1 4490 1 view .LVU3436 + 9598 007a 7047 bx lr + 9599 .LVL659: + 9600 .L617: + 9601 .cfi_def_cfa_offset 24 + 9602 .cfi_offset 4, -12 + ARM GAS /tmp/ccNVyn8W.s page 354 + + + 9603 .cfi_offset 5, -8 + 9604 .cfi_offset 14, -4 +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9605 .loc 1 4449 5 discriminator 1 view .LVU3437 + 9606 007c 0220 movs r0, #2 + 9607 .LVL660: +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9608 .loc 1 4449 5 discriminator 1 view .LVU3438 + 9609 007e EDE7 b .L613 + 9610 .L625: + 9611 .align 2 + 9612 .L624: + 9613 0080 00400080 .word -2147467264 + 9614 .cfi_endproc + 9615 .LFE163: + 9617 .section .text.HAL_I2C_EV_IRQHandler,"ax",%progbits + 9618 .align 1 + 9619 .global HAL_I2C_EV_IRQHandler + 9620 .syntax unified + 9621 .thumb + 9622 .thumb_func + 9624 HAL_I2C_EV_IRQHandler: + 9625 .LVL661: + 9626 .LFB164: +4507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 9627 .loc 1 4507 1 is_stmt 1 view -0 + 9628 .cfi_startproc + 9629 @ args = 0, pretend = 0, frame = 0 + 9630 @ frame_needed = 0, uses_anonymous_args = 0 +4507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 9631 .loc 1 4507 1 is_stmt 0 view .LVU3440 + 9632 0000 08B5 push {r3, lr} + 9633 .cfi_def_cfa_offset 8 + 9634 .cfi_offset 3, -8 + 9635 .cfi_offset 14, -4 +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 9636 .loc 1 4509 3 is_stmt 1 view .LVU3441 +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 9637 .loc 1 4509 24 is_stmt 0 view .LVU3442 + 9638 0002 0368 ldr r3, [r0] +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 9639 .loc 1 4509 12 view .LVU3443 + 9640 0004 9969 ldr r1, [r3, #24] + 9641 .LVL662: +4510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9642 .loc 1 4510 3 is_stmt 1 view .LVU3444 +4510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9643 .loc 1 4510 12 is_stmt 0 view .LVU3445 + 9644 0006 1A68 ldr r2, [r3] + 9645 .LVL663: +4513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9646 .loc 1 4513 3 is_stmt 1 view .LVU3446 +4513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9647 .loc 1 4513 11 is_stmt 0 view .LVU3447 + 9648 0008 436B ldr r3, [r0, #52] +4513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9649 .loc 1 4513 6 view .LVU3448 + ARM GAS /tmp/ccNVyn8W.s page 355 + + + 9650 000a 03B1 cbz r3, .L626 +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9651 .loc 1 4515 5 is_stmt 1 view .LVU3449 + 9652 000c 9847 blx r3 + 9653 .LVL664: + 9654 .L626: +4517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9655 .loc 1 4517 1 is_stmt 0 view .LVU3450 + 9656 000e 08BD pop {r3, pc} + 9657 .cfi_endproc + 9658 .LFE164: + 9660 .section .text.HAL_I2C_MasterTxCpltCallback,"ax",%progbits + 9661 .align 1 + 9662 .weak HAL_I2C_MasterTxCpltCallback + 9663 .syntax unified + 9664 .thumb + 9665 .thumb_func + 9667 HAL_I2C_MasterTxCpltCallback: + 9668 .LVL665: + 9669 .LFB166: +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 9670 .loc 1 4578 1 is_stmt 1 view -0 + 9671 .cfi_startproc + 9672 @ args = 0, pretend = 0, frame = 0 + 9673 @ frame_needed = 0, uses_anonymous_args = 0 + 9674 @ link register save eliminated. +4580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9675 .loc 1 4580 3 view .LVU3452 +4585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9676 .loc 1 4585 1 is_stmt 0 view .LVU3453 + 9677 0000 7047 bx lr + 9678 .cfi_endproc + 9679 .LFE166: + 9681 .section .text.HAL_I2C_MasterRxCpltCallback,"ax",%progbits + 9682 .align 1 + 9683 .weak HAL_I2C_MasterRxCpltCallback + 9684 .syntax unified + 9685 .thumb + 9686 .thumb_func + 9688 HAL_I2C_MasterRxCpltCallback: + 9689 .LVL666: + 9690 .LFB167: +4594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 9691 .loc 1 4594 1 is_stmt 1 view -0 + 9692 .cfi_startproc + 9693 @ args = 0, pretend = 0, frame = 0 + 9694 @ frame_needed = 0, uses_anonymous_args = 0 + 9695 @ link register save eliminated. +4596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9696 .loc 1 4596 3 view .LVU3455 +4601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9697 .loc 1 4601 1 is_stmt 0 view .LVU3456 + 9698 0000 7047 bx lr + 9699 .cfi_endproc + 9700 .LFE167: + 9702 .section .text.I2C_ITMasterSeqCplt,"ax",%progbits + 9703 .align 1 + ARM GAS /tmp/ccNVyn8W.s page 356 + + + 9704 .syntax unified + 9705 .thumb + 9706 .thumb_func + 9708 I2C_ITMasterSeqCplt: + 9709 .LVL667: + 9710 .LFB188: +5855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ + 9711 .loc 1 5855 1 is_stmt 1 view -0 + 9712 .cfi_startproc + 9713 @ args = 0, pretend = 0, frame = 0 + 9714 @ frame_needed = 0, uses_anonymous_args = 0 +5855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ + 9715 .loc 1 5855 1 is_stmt 0 view .LVU3458 + 9716 0000 38B5 push {r3, r4, r5, lr} + 9717 .cfi_def_cfa_offset 16 + 9718 .cfi_offset 3, -16 + 9719 .cfi_offset 4, -12 + 9720 .cfi_offset 5, -8 + 9721 .cfi_offset 14, -4 + 9722 0002 0446 mov r4, r0 +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9723 .loc 1 5857 3 is_stmt 1 view .LVU3459 +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9724 .loc 1 5857 14 is_stmt 0 view .LVU3460 + 9725 0004 0023 movs r3, #0 + 9726 0006 80F84230 strb r3, [r0, #66] +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9727 .loc 1 5861 3 is_stmt 1 view .LVU3461 +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9728 .loc 1 5861 11 is_stmt 0 view .LVU3462 + 9729 000a 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9730 000e DBB2 uxtb r3, r3 +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9731 .loc 1 5861 6 view .LVU3463 + 9732 0010 212B cmp r3, #33 + 9733 0012 0FD0 beq .L635 +5883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9734 .loc 1 5883 5 is_stmt 1 view .LVU3464 +5883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9735 .loc 1 5883 25 is_stmt 0 view .LVU3465 + 9736 0014 2023 movs r3, #32 + 9737 0016 80F84130 strb r3, [r0, #65] +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9738 .loc 1 5884 5 is_stmt 1 view .LVU3466 +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9739 .loc 1 5884 25 is_stmt 0 view .LVU3467 + 9740 001a 1223 movs r3, #18 + 9741 001c 0363 str r3, [r0, #48] +5885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9742 .loc 1 5885 5 is_stmt 1 view .LVU3468 +5885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9743 .loc 1 5885 25 is_stmt 0 view .LVU3469 + 9744 001e 0025 movs r5, #0 + 9745 0020 4563 str r5, [r0, #52] +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9746 .loc 1 5888 5 is_stmt 1 view .LVU3470 + 9747 0022 0221 movs r1, #2 + ARM GAS /tmp/ccNVyn8W.s page 357 + + + 9748 0024 FFF7FEFF bl I2C_Disable_IRQ + 9749 .LVL668: +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9750 .loc 1 5891 5 view .LVU3471 +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9751 .loc 1 5891 5 view .LVU3472 + 9752 0028 84F84050 strb r5, [r4, #64] +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9753 .loc 1 5891 5 view .LVU3473 +5897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9754 .loc 1 5897 5 view .LVU3474 + 9755 002c 2046 mov r0, r4 + 9756 002e FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 9757 .LVL669: + 9758 .L631: +5900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9759 .loc 1 5900 1 is_stmt 0 view .LVU3475 + 9760 0032 38BD pop {r3, r4, r5, pc} + 9761 .LVL670: + 9762 .L635: +5863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9763 .loc 1 5863 5 is_stmt 1 view .LVU3476 +5863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9764 .loc 1 5863 25 is_stmt 0 view .LVU3477 + 9765 0034 2023 movs r3, #32 + 9766 0036 80F84130 strb r3, [r0, #65] +5864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9767 .loc 1 5864 5 is_stmt 1 view .LVU3478 +5864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9768 .loc 1 5864 25 is_stmt 0 view .LVU3479 + 9769 003a 1123 movs r3, #17 + 9770 003c 0363 str r3, [r0, #48] +5865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9771 .loc 1 5865 5 is_stmt 1 view .LVU3480 +5865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9772 .loc 1 5865 25 is_stmt 0 view .LVU3481 + 9773 003e 0025 movs r5, #0 + 9774 0040 4563 str r5, [r0, #52] +5868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9775 .loc 1 5868 5 is_stmt 1 view .LVU3482 + 9776 0042 0121 movs r1, #1 + 9777 0044 FFF7FEFF bl I2C_Disable_IRQ + 9778 .LVL671: +5871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9779 .loc 1 5871 5 view .LVU3483 +5871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9780 .loc 1 5871 5 view .LVU3484 + 9781 0048 84F84050 strb r5, [r4, #64] +5871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9782 .loc 1 5871 5 view .LVU3485 +5877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9783 .loc 1 5877 5 view .LVU3486 + 9784 004c 2046 mov r0, r4 + 9785 004e FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 9786 .LVL672: + 9787 0052 EEE7 b .L631 + 9788 .cfi_endproc + ARM GAS /tmp/ccNVyn8W.s page 358 + + + 9789 .LFE188: + 9791 .section .text.HAL_I2C_SlaveTxCpltCallback,"ax",%progbits + 9792 .align 1 + 9793 .weak HAL_I2C_SlaveTxCpltCallback + 9794 .syntax unified + 9795 .thumb + 9796 .thumb_func + 9798 HAL_I2C_SlaveTxCpltCallback: + 9799 .LVL673: + 9800 .LFB168: +4609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 9801 .loc 1 4609 1 view -0 + 9802 .cfi_startproc + 9803 @ args = 0, pretend = 0, frame = 0 + 9804 @ frame_needed = 0, uses_anonymous_args = 0 + 9805 @ link register save eliminated. +4611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9806 .loc 1 4611 3 view .LVU3488 +4616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9807 .loc 1 4616 1 is_stmt 0 view .LVU3489 + 9808 0000 7047 bx lr + 9809 .cfi_endproc + 9810 .LFE168: + 9812 .section .text.HAL_I2C_SlaveRxCpltCallback,"ax",%progbits + 9813 .align 1 + 9814 .weak HAL_I2C_SlaveRxCpltCallback + 9815 .syntax unified + 9816 .thumb + 9817 .thumb_func + 9819 HAL_I2C_SlaveRxCpltCallback: + 9820 .LVL674: + 9821 .LFB169: +4625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 9822 .loc 1 4625 1 is_stmt 1 view -0 + 9823 .cfi_startproc + 9824 @ args = 0, pretend = 0, frame = 0 + 9825 @ frame_needed = 0, uses_anonymous_args = 0 + 9826 @ link register save eliminated. +4627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9827 .loc 1 4627 3 view .LVU3491 +4632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9828 .loc 1 4632 1 is_stmt 0 view .LVU3492 + 9829 0000 7047 bx lr + 9830 .cfi_endproc + 9831 .LFE169: + 9833 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits + 9834 .align 1 + 9835 .syntax unified + 9836 .thumb + 9837 .thumb_func + 9839 I2C_ITSlaveSeqCplt: + 9840 .LVL675: + 9841 .LFB189: +5908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 9842 .loc 1 5908 1 is_stmt 1 view -0 + 9843 .cfi_startproc + 9844 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccNVyn8W.s page 359 + + + 9845 @ frame_needed = 0, uses_anonymous_args = 0 +5908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 9846 .loc 1 5908 1 is_stmt 0 view .LVU3494 + 9847 0000 10B5 push {r4, lr} + 9848 .cfi_def_cfa_offset 8 + 9849 .cfi_offset 4, -8 + 9850 .cfi_offset 14, -4 + 9851 0002 0446 mov r4, r0 +5909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9852 .loc 1 5909 3 is_stmt 1 view .LVU3495 +5909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9853 .loc 1 5909 26 is_stmt 0 view .LVU3496 + 9854 0004 0368 ldr r3, [r0] +5909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9855 .loc 1 5909 12 view .LVU3497 + 9856 0006 1A68 ldr r2, [r3] + 9857 .LVL676: +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9858 .loc 1 5912 3 is_stmt 1 view .LVU3498 +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9859 .loc 1 5912 14 is_stmt 0 view .LVU3499 + 9860 0008 0021 movs r1, #0 + 9861 000a 80F84210 strb r1, [r0, #66] +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9862 .loc 1 5915 3 is_stmt 1 view .LVU3500 +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9863 .loc 1 5915 6 is_stmt 0 view .LVU3501 + 9864 000e 12F4804F tst r2, #16384 + 9865 0012 0ED0 beq .L639 +5918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9866 .loc 1 5918 5 is_stmt 1 view .LVU3502 +5918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9867 .loc 1 5918 19 is_stmt 0 view .LVU3503 + 9868 0014 1A68 ldr r2, [r3] + 9869 .LVL677: +5918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9870 .loc 1 5918 25 view .LVU3504 + 9871 0016 22F48042 bic r2, r2, #16384 + 9872 001a 1A60 str r2, [r3] + 9873 .L640: +5928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9874 .loc 1 5928 3 is_stmt 1 view .LVU3505 +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9875 .loc 1 5930 3 view .LVU3506 +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9876 .loc 1 5930 11 is_stmt 0 view .LVU3507 + 9877 001c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9878 0020 DBB2 uxtb r3, r3 +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9879 .loc 1 5930 6 view .LVU3508 + 9880 0022 292B cmp r3, #41 + 9881 0024 0DD0 beq .L644 +5950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9882 .loc 1 5950 8 is_stmt 1 view .LVU3509 +5950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9883 .loc 1 5950 16 is_stmt 0 view .LVU3510 + 9884 0026 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + ARM GAS /tmp/ccNVyn8W.s page 360 + + + 9885 002a DBB2 uxtb r3, r3 +5950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9886 .loc 1 5950 11 view .LVU3511 + 9887 002c 2A2B cmp r3, #42 + 9888 002e 18D0 beq .L645 + 9889 .LVL678: + 9890 .L638: +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9891 .loc 1 5973 1 view .LVU3512 + 9892 0030 10BD pop {r4, pc} + 9893 .LVL679: + 9894 .L639: +5920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9895 .loc 1 5920 8 is_stmt 1 view .LVU3513 +5920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9896 .loc 1 5920 11 is_stmt 0 view .LVU3514 + 9897 0032 12F4004F tst r2, #32768 + 9898 0036 F1D0 beq .L640 +5923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9899 .loc 1 5923 5 is_stmt 1 view .LVU3515 +5923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9900 .loc 1 5923 19 is_stmt 0 view .LVU3516 + 9901 0038 1A68 ldr r2, [r3] + 9902 .LVL680: +5923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9903 .loc 1 5923 25 view .LVU3517 + 9904 003a 22F40042 bic r2, r2, #32768 + 9905 003e 1A60 str r2, [r3] + 9906 0040 ECE7 b .L640 + 9907 .L644: +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 9908 .loc 1 5933 5 is_stmt 1 view .LVU3518 +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 9909 .loc 1 5933 25 is_stmt 0 view .LVU3519 + 9910 0042 2823 movs r3, #40 + 9911 0044 84F84130 strb r3, [r4, #65] +5934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9912 .loc 1 5934 5 is_stmt 1 view .LVU3520 +5934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9913 .loc 1 5934 25 is_stmt 0 view .LVU3521 + 9914 0048 2123 movs r3, #33 + 9915 004a 2363 str r3, [r4, #48] +5937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9916 .loc 1 5937 5 is_stmt 1 view .LVU3522 + 9917 004c 0121 movs r1, #1 + 9918 004e 2046 mov r0, r4 + 9919 .LVL681: +5937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9920 .loc 1 5937 5 is_stmt 0 view .LVU3523 + 9921 0050 FFF7FEFF bl I2C_Disable_IRQ + 9922 .LVL682: +5940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9923 .loc 1 5940 5 is_stmt 1 view .LVU3524 +5940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9924 .loc 1 5940 5 view .LVU3525 + 9925 0054 0023 movs r3, #0 + 9926 0056 84F84030 strb r3, [r4, #64] + ARM GAS /tmp/ccNVyn8W.s page 361 + + +5940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9927 .loc 1 5940 5 view .LVU3526 +5946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9928 .loc 1 5946 5 view .LVU3527 + 9929 005a 2046 mov r0, r4 + 9930 005c FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 9931 .LVL683: + 9932 0060 E6E7 b .L638 + 9933 .LVL684: + 9934 .L645: +5953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 9935 .loc 1 5953 5 view .LVU3528 +5953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 9936 .loc 1 5953 25 is_stmt 0 view .LVU3529 + 9937 0062 2823 movs r3, #40 + 9938 0064 84F84130 strb r3, [r4, #65] +5954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9939 .loc 1 5954 5 is_stmt 1 view .LVU3530 +5954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9940 .loc 1 5954 25 is_stmt 0 view .LVU3531 + 9941 0068 2223 movs r3, #34 + 9942 006a 2363 str r3, [r4, #48] +5957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9943 .loc 1 5957 5 is_stmt 1 view .LVU3532 + 9944 006c 0221 movs r1, #2 + 9945 006e 2046 mov r0, r4 + 9946 .LVL685: +5957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9947 .loc 1 5957 5 is_stmt 0 view .LVU3533 + 9948 0070 FFF7FEFF bl I2C_Disable_IRQ + 9949 .LVL686: +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9950 .loc 1 5960 5 is_stmt 1 view .LVU3534 +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9951 .loc 1 5960 5 view .LVU3535 + 9952 0074 0023 movs r3, #0 + 9953 0076 84F84030 strb r3, [r4, #64] +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9954 .loc 1 5960 5 view .LVU3536 +5966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9955 .loc 1 5966 5 view .LVU3537 + 9956 007a 2046 mov r0, r4 + 9957 007c FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 9958 .LVL687: +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9959 .loc 1 5972 3 view .LVU3538 +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9960 .loc 1 5973 1 is_stmt 0 view .LVU3539 + 9961 0080 D6E7 b .L638 + 9962 .cfi_endproc + 9963 .LFE189: + 9965 .section .text.I2C_DMASlaveTransmitCplt,"ax",%progbits + 9966 .align 1 + 9967 .syntax unified + 9968 .thumb + 9969 .thumb_func + 9971 I2C_DMASlaveTransmitCplt: + ARM GAS /tmp/ccNVyn8W.s page 362 + + + 9972 .LVL688: + 9973 .LFB197: +6576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 9974 .loc 1 6576 1 is_stmt 1 view -0 + 9975 .cfi_startproc + 9976 @ args = 0, pretend = 0, frame = 0 + 9977 @ frame_needed = 0, uses_anonymous_args = 0 +6576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 9978 .loc 1 6576 1 is_stmt 0 view .LVU3541 + 9979 0000 08B5 push {r3, lr} + 9980 .cfi_def_cfa_offset 8 + 9981 .cfi_offset 3, -8 + 9982 .cfi_offset 14, -4 +6578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 9983 .loc 1 6578 3 is_stmt 1 view .LVU3542 +6578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 9984 .loc 1 6578 22 is_stmt 0 view .LVU3543 + 9985 0002 406A ldr r0, [r0, #36] + 9986 .LVL689: +6579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9987 .loc 1 6579 3 is_stmt 1 view .LVU3544 +6579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9988 .loc 1 6579 12 is_stmt 0 view .LVU3545 + 9989 0004 C36A ldr r3, [r0, #44] + 9990 .LVL690: +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9991 .loc 1 6581 3 is_stmt 1 view .LVU3546 +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9992 .loc 1 6581 6 is_stmt 0 view .LVU3547 + 9993 0006 B3F1807F cmp r3, #16777216 + 9994 000a 00D0 beq .L647 +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9995 .loc 1 6581 38 discriminator 1 view .LVU3548 + 9996 000c 33B9 cbnz r3, .L646 + 9997 .L647: +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9998 .loc 1 6584 5 is_stmt 1 view .LVU3549 +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9999 .loc 1 6584 9 is_stmt 0 view .LVU3550 + 10000 000e 0268 ldr r2, [r0] +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10001 .loc 1 6584 19 view .LVU3551 + 10002 0010 1368 ldr r3, [r2] + 10003 .LVL691: +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10004 .loc 1 6584 25 view .LVU3552 + 10005 0012 23F48043 bic r3, r3, #16384 + 10006 0016 1360 str r3, [r2] +6588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10007 .loc 1 6588 5 is_stmt 1 view .LVU3553 + 10008 0018 FFF7FEFF bl I2C_ITSlaveSeqCplt + 10009 .LVL692: + 10010 .L646: +6596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10011 .loc 1 6596 1 is_stmt 0 view .LVU3554 + 10012 001c 08BD pop {r3, pc} + 10013 .cfi_endproc + ARM GAS /tmp/ccNVyn8W.s page 363 + + + 10014 .LFE197: + 10016 .section .text.I2C_DMASlaveReceiveCplt,"ax",%progbits + 10017 .align 1 + 10018 .syntax unified + 10019 .thumb + 10020 .thumb_func + 10022 I2C_DMASlaveReceiveCplt: + 10023 .LVL693: + 10024 .LFB199: +6656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10025 .loc 1 6656 1 is_stmt 1 view -0 + 10026 .cfi_startproc + 10027 @ args = 0, pretend = 0, frame = 0 + 10028 @ frame_needed = 0, uses_anonymous_args = 0 +6656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10029 .loc 1 6656 1 is_stmt 0 view .LVU3556 + 10030 0000 08B5 push {r3, lr} + 10031 .cfi_def_cfa_offset 8 + 10032 .cfi_offset 3, -8 + 10033 .cfi_offset 14, -4 +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10034 .loc 1 6658 3 is_stmt 1 view .LVU3557 +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10035 .loc 1 6658 22 is_stmt 0 view .LVU3558 + 10036 0002 406A ldr r0, [r0, #36] + 10037 .LVL694: +6659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10038 .loc 1 6659 3 is_stmt 1 view .LVU3559 +6659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10039 .loc 1 6659 12 is_stmt 0 view .LVU3560 + 10040 0004 C26A ldr r2, [r0, #44] + 10041 .LVL695: +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10042 .loc 1 6661 3 is_stmt 1 view .LVU3561 +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10043 .loc 1 6661 8 is_stmt 0 view .LVU3562 + 10044 0006 C36B ldr r3, [r0, #60] + 10045 0008 1B68 ldr r3, [r3] + 10046 000a 5B68 ldr r3, [r3, #4] +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10047 .loc 1 6661 6 view .LVU3563 + 10048 000c 13B9 cbnz r3, .L650 +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10049 .loc 1 6661 53 discriminator 1 view .LVU3564 + 10050 000e 12F5803F cmn r2, #65536 + 10051 0012 00D1 bne .L653 + 10052 .LVL696: + 10053 .L650: +6676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10054 .loc 1 6676 1 view .LVU3565 + 10055 0014 08BD pop {r3, pc} + 10056 .LVL697: + 10057 .L653: +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10058 .loc 1 6665 5 is_stmt 1 view .LVU3566 +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10059 .loc 1 6665 9 is_stmt 0 view .LVU3567 + ARM GAS /tmp/ccNVyn8W.s page 364 + + + 10060 0016 0268 ldr r2, [r0] + 10061 .LVL698: +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10062 .loc 1 6665 19 view .LVU3568 + 10063 0018 1368 ldr r3, [r2] +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10064 .loc 1 6665 25 view .LVU3569 + 10065 001a 23F40043 bic r3, r3, #32768 + 10066 001e 1360 str r3, [r2] +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10067 .loc 1 6668 5 is_stmt 1 view .LVU3570 + 10068 0020 FFF7FEFF bl I2C_ITSlaveSeqCplt + 10069 .LVL699: +6675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10070 .loc 1 6675 3 view .LVU3571 +6676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10071 .loc 1 6676 1 is_stmt 0 view .LVU3572 + 10072 0024 F6E7 b .L650 + 10073 .cfi_endproc + 10074 .LFE199: + 10076 .section .text.HAL_I2C_AddrCallback,"ax",%progbits + 10077 .align 1 + 10078 .weak HAL_I2C_AddrCallback + 10079 .syntax unified + 10080 .thumb + 10081 .thumb_func + 10083 HAL_I2C_AddrCallback: + 10084 .LVL700: + 10085 .LFB170: +4643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10086 .loc 1 4643 1 is_stmt 1 view -0 + 10087 .cfi_startproc + 10088 @ args = 0, pretend = 0, frame = 0 + 10089 @ frame_needed = 0, uses_anonymous_args = 0 + 10090 @ link register save eliminated. +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(TransferDirection); + 10091 .loc 1 4645 3 view .LVU3574 +4646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(AddrMatchCode); + 10092 .loc 1 4646 3 view .LVU3575 +4647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10093 .loc 1 4647 3 view .LVU3576 +4652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10094 .loc 1 4652 1 is_stmt 0 view .LVU3577 + 10095 0000 7047 bx lr + 10096 .cfi_endproc + 10097 .LFE170: + 10099 .section .text.I2C_ITAddrCplt,"ax",%progbits + 10100 .align 1 + 10101 .syntax unified + 10102 .thumb + 10103 .thumb_func + 10105 I2C_ITAddrCplt: + 10106 .LVL701: + 10107 .LFB187: +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint8_t transferdirection; + 10108 .loc 1 5760 1 is_stmt 1 view -0 + 10109 .cfi_startproc + ARM GAS /tmp/ccNVyn8W.s page 365 + + + 10110 @ args = 0, pretend = 0, frame = 0 + 10111 @ frame_needed = 0, uses_anonymous_args = 0 +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint8_t transferdirection; + 10112 .loc 1 5760 1 is_stmt 0 view .LVU3579 + 10113 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 10114 .cfi_def_cfa_offset 24 + 10115 .cfi_offset 3, -24 + 10116 .cfi_offset 4, -20 + 10117 .cfi_offset 5, -16 + 10118 .cfi_offset 6, -12 + 10119 .cfi_offset 7, -8 + 10120 .cfi_offset 14, -4 + 10121 0002 0446 mov r4, r0 +5761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t slaveaddrcode; + 10122 .loc 1 5761 3 is_stmt 1 view .LVU3580 +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd1code; + 10123 .loc 1 5762 3 view .LVU3581 +5763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd2code; + 10124 .loc 1 5763 3 view .LVU3582 +5764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10125 .loc 1 5764 3 view .LVU3583 +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10126 .loc 1 5767 3 view .LVU3584 +5770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10127 .loc 1 5770 3 view .LVU3585 +5770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10128 .loc 1 5770 22 is_stmt 0 view .LVU3586 + 10129 0004 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 +5770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10130 .loc 1 5770 6 view .LVU3587 + 10131 0008 03F02803 and r3, r3, #40 + 10132 000c 282B cmp r3, #40 + 10133 000e 06D0 beq .L661 +5842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10134 .loc 1 5842 5 is_stmt 1 view .LVU3588 + 10135 0010 0368 ldr r3, [r0] + 10136 0012 0822 movs r2, #8 + 10137 0014 DA61 str r2, [r3, #28] +5845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10138 .loc 1 5845 5 view .LVU3589 +5845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10139 .loc 1 5845 5 view .LVU3590 + 10140 0016 0023 movs r3, #0 + 10141 0018 80F84030 strb r3, [r0, #64] +5845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10142 .loc 1 5845 5 discriminator 1 view .LVU3591 + 10143 .LVL702: + 10144 .L655: +5847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10145 .loc 1 5847 1 is_stmt 0 view .LVU3592 + 10146 001c F8BD pop {r3, r4, r5, r6, r7, pc} + 10147 .LVL703: + 10148 .L661: +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 10149 .loc 1 5772 5 is_stmt 1 view .LVU3593 +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 10150 .loc 1 5772 25 is_stmt 0 view .LVU3594 + ARM GAS /tmp/ccNVyn8W.s page 366 + + + 10151 001e 0368 ldr r3, [r0] + 10152 0020 9E69 ldr r6, [r3, #24] +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 10153 .loc 1 5772 23 view .LVU3595 + 10154 0022 C6F30046 ubfx r6, r6, #16, #1 + 10155 .LVL704: +5773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 10156 .loc 1 5773 5 is_stmt 1 view .LVU3596 +5773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 10157 .loc 1 5773 25 is_stmt 0 view .LVU3597 + 10158 0026 9A69 ldr r2, [r3, #24] + 10159 0028 120C lsrs r2, r2, #16 +5773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 10160 .loc 1 5773 23 view .LVU3598 + 10161 002a 02F0FE05 and r5, r2, #254 + 10162 .LVL705: +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 10163 .loc 1 5774 5 is_stmt 1 view .LVU3599 +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 10164 .loc 1 5774 25 is_stmt 0 view .LVU3600 + 10165 002e 9A68 ldr r2, [r3, #8] +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 10166 .loc 1 5774 23 view .LVU3601 + 10167 0030 C2F30902 ubfx r2, r2, #0, #10 + 10168 .LVL706: +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10169 .loc 1 5775 5 is_stmt 1 view .LVU3602 +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10170 .loc 1 5775 25 is_stmt 0 view .LVU3603 + 10171 0034 DF68 ldr r7, [r3, #12] +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10172 .loc 1 5775 23 view .LVU3604 + 10173 0036 07F0FE07 and r7, r7, #254 + 10174 .LVL707: +5778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10175 .loc 1 5778 5 is_stmt 1 view .LVU3605 +5778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10176 .loc 1 5778 19 is_stmt 0 view .LVU3606 + 10177 003a C168 ldr r1, [r0, #12] + 10178 .LVL708: +5778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10179 .loc 1 5778 8 view .LVU3607 + 10180 003c 0229 cmp r1, #2 + 10181 003e 22D1 bne .L657 +5780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10182 .loc 1 5780 7 is_stmt 1 view .LVU3608 +5780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10183 .loc 1 5780 44 is_stmt 0 view .LVU3609 + 10184 0040 85EAD215 eor r5, r5, r2, lsr #7 + 10185 .LVL709: +5780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10186 .loc 1 5780 10 view .LVU3610 + 10187 0044 15F0060F tst r5, #6 + 10188 0048 10D1 bne .L658 +5782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrEventCount++; + 10189 .loc 1 5782 9 is_stmt 1 view .LVU3611 + 10190 .LVL710: + ARM GAS /tmp/ccNVyn8W.s page 367 + + +5783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 10191 .loc 1 5783 9 view .LVU3612 +5783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 10192 .loc 1 5783 13 is_stmt 0 view .LVU3613 + 10193 004a 816C ldr r1, [r0, #72] +5783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 10194 .loc 1 5783 29 view .LVU3614 + 10195 004c 0131 adds r1, r1, #1 + 10196 004e 8164 str r1, [r0, #72] +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10197 .loc 1 5784 9 is_stmt 1 view .LVU3615 +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10198 .loc 1 5784 17 is_stmt 0 view .LVU3616 + 10199 0050 816C ldr r1, [r0, #72] +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10200 .loc 1 5784 12 view .LVU3617 + 10201 0052 0229 cmp r1, #2 + 10202 0054 E2D1 bne .L655 +5787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10203 .loc 1 5787 11 is_stmt 1 view .LVU3618 +5787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10204 .loc 1 5787 32 is_stmt 0 view .LVU3619 + 10205 0056 0021 movs r1, #0 + 10206 0058 8164 str r1, [r0, #72] +5790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10207 .loc 1 5790 11 is_stmt 1 view .LVU3620 + 10208 005a 0820 movs r0, #8 + 10209 .LVL711: +5790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10210 .loc 1 5790 11 is_stmt 0 view .LVU3621 + 10211 005c D861 str r0, [r3, #28] +5793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10212 .loc 1 5793 11 is_stmt 1 view .LVU3622 +5793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10213 .loc 1 5793 11 view .LVU3623 + 10214 005e 84F84010 strb r1, [r4, #64] +5793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10215 .loc 1 5793 11 view .LVU3624 +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10216 .loc 1 5799 11 view .LVU3625 + 10217 0062 3146 mov r1, r6 + 10218 0064 2046 mov r0, r4 + 10219 0066 FFF7FEFF bl HAL_I2C_AddrCallback + 10220 .LVL712: +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10221 .loc 1 5799 11 is_stmt 0 view .LVU3626 + 10222 006a D7E7 b .L655 + 10223 .LVL713: + 10224 .L658: +5805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10225 .loc 1 5805 9 is_stmt 1 view .LVU3627 +5808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10226 .loc 1 5808 9 view .LVU3628 + 10227 006c 4FF40041 mov r1, #32768 + 10228 0070 FFF7FEFF bl I2C_Disable_IRQ + 10229 .LVL714: +5811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 368 + + + 10230 .loc 1 5811 9 view .LVU3629 +5811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10231 .loc 1 5811 9 view .LVU3630 + 10232 0074 0023 movs r3, #0 + 10233 0076 84F84030 strb r3, [r4, #64] +5811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10234 .loc 1 5811 9 view .LVU3631 +5817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10235 .loc 1 5817 9 view .LVU3632 + 10236 007a 3A46 mov r2, r7 + 10237 007c 3146 mov r1, r6 + 10238 007e 2046 mov r0, r4 + 10239 0080 FFF7FEFF bl HAL_I2C_AddrCallback + 10240 .LVL715: + 10241 0084 CAE7 b .L655 + 10242 .LVL716: + 10243 .L657: +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10244 .loc 1 5825 7 view .LVU3633 + 10245 0086 4FF40041 mov r1, #32768 + 10246 008a FFF7FEFF bl I2C_Disable_IRQ + 10247 .LVL717: +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10248 .loc 1 5828 7 view .LVU3634 +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10249 .loc 1 5828 7 view .LVU3635 + 10250 008e 0023 movs r3, #0 + 10251 0090 84F84030 strb r3, [r4, #64] +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10252 .loc 1 5828 7 view .LVU3636 +5834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10253 .loc 1 5834 7 view .LVU3637 + 10254 0094 2A46 mov r2, r5 + 10255 0096 3146 mov r1, r6 + 10256 0098 2046 mov r0, r4 + 10257 009a FFF7FEFF bl HAL_I2C_AddrCallback + 10258 .LVL718: + 10259 009e BDE7 b .L655 + 10260 .cfi_endproc + 10261 .LFE187: + 10263 .section .text.HAL_I2C_ListenCpltCallback,"ax",%progbits + 10264 .align 1 + 10265 .weak HAL_I2C_ListenCpltCallback + 10266 .syntax unified + 10267 .thumb + 10268 .thumb_func + 10270 HAL_I2C_ListenCpltCallback: + 10271 .LVL719: + 10272 .LFB171: +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10273 .loc 1 4661 1 view -0 + 10274 .cfi_startproc + 10275 @ args = 0, pretend = 0, frame = 0 + 10276 @ frame_needed = 0, uses_anonymous_args = 0 + 10277 @ link register save eliminated. +4663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10278 .loc 1 4663 3 view .LVU3639 + ARM GAS /tmp/ccNVyn8W.s page 369 + + +4668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10279 .loc 1 4668 1 is_stmt 0 view .LVU3640 + 10280 0000 7047 bx lr + 10281 .cfi_endproc + 10282 .LFE171: + 10284 .section .text.I2C_ITListenCplt,"ax",%progbits + 10285 .align 1 + 10286 .syntax unified + 10287 .thumb + 10288 .thumb_func + 10290 I2C_ITListenCplt: + 10291 .LVL720: + 10292 .LFB192: +6284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ + 10293 .loc 1 6284 1 is_stmt 1 view -0 + 10294 .cfi_startproc + 10295 @ args = 0, pretend = 0, frame = 0 + 10296 @ frame_needed = 0, uses_anonymous_args = 0 +6284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ + 10297 .loc 1 6284 1 is_stmt 0 view .LVU3642 + 10298 0000 10B5 push {r4, lr} + 10299 .cfi_def_cfa_offset 8 + 10300 .cfi_offset 4, -8 + 10301 .cfi_offset 14, -4 + 10302 0002 0446 mov r4, r0 +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10303 .loc 1 6286 3 is_stmt 1 view .LVU3643 +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10304 .loc 1 6286 21 is_stmt 0 view .LVU3644 + 10305 0004 174B ldr r3, .L666 + 10306 0006 C362 str r3, [r0, #44] +6287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10307 .loc 1 6287 3 is_stmt 1 view .LVU3645 +6287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10308 .loc 1 6287 23 is_stmt 0 view .LVU3646 + 10309 0008 0023 movs r3, #0 + 10310 000a 0363 str r3, [r0, #48] +6288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10311 .loc 1 6288 3 is_stmt 1 view .LVU3647 +6288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10312 .loc 1 6288 15 is_stmt 0 view .LVU3648 + 10313 000c 2022 movs r2, #32 + 10314 000e 80F84120 strb r2, [r0, #65] +6289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10315 .loc 1 6289 3 is_stmt 1 view .LVU3649 +6289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10316 .loc 1 6289 14 is_stmt 0 view .LVU3650 + 10317 0012 80F84230 strb r3, [r0, #66] +6290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10318 .loc 1 6290 3 is_stmt 1 view .LVU3651 +6290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10319 .loc 1 6290 17 is_stmt 0 view .LVU3652 + 10320 0016 4363 str r3, [r0, #52] +6293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10321 .loc 1 6293 3 is_stmt 1 view .LVU3653 +6293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10322 .loc 1 6293 6 is_stmt 0 view .LVU3654 + ARM GAS /tmp/ccNVyn8W.s page 370 + + + 10323 0018 11F0040F tst r1, #4 + 10324 001c 13D0 beq .L664 +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10325 .loc 1 6296 5 is_stmt 1 view .LVU3655 +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10326 .loc 1 6296 36 is_stmt 0 view .LVU3656 + 10327 001e 0368 ldr r3, [r0] +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10328 .loc 1 6296 46 view .LVU3657 + 10329 0020 5A6A ldr r2, [r3, #36] +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10330 .loc 1 6296 10 view .LVU3658 + 10331 0022 436A ldr r3, [r0, #36] +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10332 .loc 1 6296 21 view .LVU3659 + 10333 0024 1A70 strb r2, [r3] +6299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10334 .loc 1 6299 5 is_stmt 1 view .LVU3660 +6299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10335 .loc 1 6299 9 is_stmt 0 view .LVU3661 + 10336 0026 436A ldr r3, [r0, #36] +6299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10337 .loc 1 6299 19 view .LVU3662 + 10338 0028 0133 adds r3, r3, #1 + 10339 002a 4362 str r3, [r0, #36] +6301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10340 .loc 1 6301 5 is_stmt 1 view .LVU3663 +6301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10341 .loc 1 6301 14 is_stmt 0 view .LVU3664 + 10342 002c 038D ldrh r3, [r0, #40] +6301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10343 .loc 1 6301 8 view .LVU3665 + 10344 002e 53B1 cbz r3, .L664 +6303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 10345 .loc 1 6303 7 is_stmt 1 view .LVU3666 +6303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 10346 .loc 1 6303 21 is_stmt 0 view .LVU3667 + 10347 0030 013B subs r3, r3, #1 + 10348 0032 0385 strh r3, [r0, #40] @ movhi +6304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10349 .loc 1 6304 7 is_stmt 1 view .LVU3668 +6304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10350 .loc 1 6304 11 is_stmt 0 view .LVU3669 + 10351 0034 438D ldrh r3, [r0, #42] + 10352 0036 9BB2 uxth r3, r3 +6304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10353 .loc 1 6304 22 view .LVU3670 + 10354 0038 013B subs r3, r3, #1 + 10355 003a 9BB2 uxth r3, r3 + 10356 003c 4385 strh r3, [r0, #42] @ movhi +6307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10357 .loc 1 6307 7 is_stmt 1 view .LVU3671 +6307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10358 .loc 1 6307 11 is_stmt 0 view .LVU3672 + 10359 003e 436C ldr r3, [r0, #68] +6307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10360 .loc 1 6307 23 view .LVU3673 + ARM GAS /tmp/ccNVyn8W.s page 371 + + + 10361 0040 43F00403 orr r3, r3, #4 + 10362 0044 4364 str r3, [r0, #68] + 10363 .L664: +6312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10364 .loc 1 6312 3 is_stmt 1 view .LVU3674 + 10365 0046 48F20301 movw r1, #32771 + 10366 .LVL721: +6312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10367 .loc 1 6312 3 is_stmt 0 view .LVU3675 + 10368 004a 2046 mov r0, r4 + 10369 .LVL722: +6312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10370 .loc 1 6312 3 view .LVU3676 + 10371 004c FFF7FEFF bl I2C_Disable_IRQ + 10372 .LVL723: +6315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10373 .loc 1 6315 3 is_stmt 1 view .LVU3677 + 10374 0050 2368 ldr r3, [r4] + 10375 0052 1022 movs r2, #16 + 10376 0054 DA61 str r2, [r3, #28] +6318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10377 .loc 1 6318 3 view .LVU3678 +6318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10378 .loc 1 6318 3 view .LVU3679 + 10379 0056 0023 movs r3, #0 + 10380 0058 84F84030 strb r3, [r4, #64] +6318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10381 .loc 1 6318 3 view .LVU3680 +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10382 .loc 1 6324 3 view .LVU3681 + 10383 005c 2046 mov r0, r4 + 10384 005e FFF7FEFF bl HAL_I2C_ListenCpltCallback + 10385 .LVL724: +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10386 .loc 1 6326 1 is_stmt 0 view .LVU3682 + 10387 0062 10BD pop {r4, pc} + 10388 .LVL725: + 10389 .L667: +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10390 .loc 1 6326 1 view .LVU3683 + 10391 .align 2 + 10392 .L666: + 10393 0064 0000FFFF .word -65536 + 10394 .cfi_endproc + 10395 .LFE192: + 10397 .section .text.HAL_I2C_MemTxCpltCallback,"ax",%progbits + 10398 .align 1 + 10399 .weak HAL_I2C_MemTxCpltCallback + 10400 .syntax unified + 10401 .thumb + 10402 .thumb_func + 10404 HAL_I2C_MemTxCpltCallback: + 10405 .LVL726: + 10406 .LFB172: +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10407 .loc 1 4677 1 is_stmt 1 view -0 + 10408 .cfi_startproc + ARM GAS /tmp/ccNVyn8W.s page 372 + + + 10409 @ args = 0, pretend = 0, frame = 0 + 10410 @ frame_needed = 0, uses_anonymous_args = 0 + 10411 @ link register save eliminated. +4679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10412 .loc 1 4679 3 view .LVU3685 +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10413 .loc 1 4684 1 is_stmt 0 view .LVU3686 + 10414 0000 7047 bx lr + 10415 .cfi_endproc + 10416 .LFE172: + 10418 .section .text.HAL_I2C_MemRxCpltCallback,"ax",%progbits + 10419 .align 1 + 10420 .weak HAL_I2C_MemRxCpltCallback + 10421 .syntax unified + 10422 .thumb + 10423 .thumb_func + 10425 HAL_I2C_MemRxCpltCallback: + 10426 .LVL727: + 10427 .LFB173: +4693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10428 .loc 1 4693 1 is_stmt 1 view -0 + 10429 .cfi_startproc + 10430 @ args = 0, pretend = 0, frame = 0 + 10431 @ frame_needed = 0, uses_anonymous_args = 0 + 10432 @ link register save eliminated. +4695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10433 .loc 1 4695 3 view .LVU3688 +4700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10434 .loc 1 4700 1 is_stmt 0 view .LVU3689 + 10435 0000 7047 bx lr + 10436 .cfi_endproc + 10437 .LFE173: + 10439 .section .text.HAL_I2C_ErrorCallback,"ax",%progbits + 10440 .align 1 + 10441 .weak HAL_I2C_ErrorCallback + 10442 .syntax unified + 10443 .thumb + 10444 .thumb_func + 10446 HAL_I2C_ErrorCallback: + 10447 .LVL728: + 10448 .LFB174: +4709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10449 .loc 1 4709 1 is_stmt 1 view -0 + 10450 .cfi_startproc + 10451 @ args = 0, pretend = 0, frame = 0 + 10452 @ frame_needed = 0, uses_anonymous_args = 0 + 10453 @ link register save eliminated. +4711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10454 .loc 1 4711 3 view .LVU3691 +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10455 .loc 1 4716 1 is_stmt 0 view .LVU3692 + 10456 0000 7047 bx lr + 10457 .cfi_endproc + 10458 .LFE174: + 10460 .section .text.HAL_I2C_AbortCpltCallback,"ax",%progbits + 10461 .align 1 + 10462 .weak HAL_I2C_AbortCpltCallback + ARM GAS /tmp/ccNVyn8W.s page 373 + + + 10463 .syntax unified + 10464 .thumb + 10465 .thumb_func + 10467 HAL_I2C_AbortCpltCallback: + 10468 .LVL729: + 10469 .LFB175: +4725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10470 .loc 1 4725 1 is_stmt 1 view -0 + 10471 .cfi_startproc + 10472 @ args = 0, pretend = 0, frame = 0 + 10473 @ frame_needed = 0, uses_anonymous_args = 0 + 10474 @ link register save eliminated. +4727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10475 .loc 1 4727 3 view .LVU3694 +4732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10476 .loc 1 4732 1 is_stmt 0 view .LVU3695 + 10477 0000 7047 bx lr + 10478 .cfi_endproc + 10479 .LFE175: + 10481 .section .text.I2C_TreatErrorCallback,"ax",%progbits + 10482 .align 1 + 10483 .syntax unified + 10484 .thumb + 10485 .thumb_func + 10487 I2C_TreatErrorCallback: + 10488 .LVL730: + 10489 .LFB194: +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 10490 .loc 1 6466 1 is_stmt 1 view -0 + 10491 .cfi_startproc + 10492 @ args = 0, pretend = 0, frame = 0 + 10493 @ frame_needed = 0, uses_anonymous_args = 0 +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 10494 .loc 1 6466 1 is_stmt 0 view .LVU3697 + 10495 0000 08B5 push {r3, lr} + 10496 .cfi_def_cfa_offset 8 + 10497 .cfi_offset 3, -8 + 10498 .cfi_offset 14, -4 +6467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10499 .loc 1 6467 3 is_stmt 1 view .LVU3698 +6467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10500 .loc 1 6467 11 is_stmt 0 view .LVU3699 + 10501 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10502 0006 DBB2 uxtb r3, r3 +6467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10503 .loc 1 6467 6 view .LVU3700 + 10504 0008 602B cmp r3, #96 + 10505 000a 06D0 beq .L676 +6484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10506 .loc 1 6484 5 is_stmt 1 view .LVU3701 +6484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10507 .loc 1 6484 25 is_stmt 0 view .LVU3702 + 10508 000c 0023 movs r3, #0 + 10509 000e 0363 str r3, [r0, #48] +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10510 .loc 1 6487 5 is_stmt 1 view .LVU3703 +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 374 + + + 10511 .loc 1 6487 5 view .LVU3704 + 10512 0010 80F84030 strb r3, [r0, #64] +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10513 .loc 1 6487 5 view .LVU3705 +6493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10514 .loc 1 6493 5 view .LVU3706 + 10515 0014 FFF7FEFF bl HAL_I2C_ErrorCallback + 10516 .LVL731: + 10517 .L672: +6496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10518 .loc 1 6496 1 is_stmt 0 view .LVU3707 + 10519 0018 08BD pop {r3, pc} + 10520 .LVL732: + 10521 .L676: +6469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10522 .loc 1 6469 5 is_stmt 1 view .LVU3708 +6469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10523 .loc 1 6469 17 is_stmt 0 view .LVU3709 + 10524 001a 2023 movs r3, #32 + 10525 001c 80F84130 strb r3, [r0, #65] +6470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10526 .loc 1 6470 5 is_stmt 1 view .LVU3710 +6470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10527 .loc 1 6470 25 is_stmt 0 view .LVU3711 + 10528 0020 0023 movs r3, #0 + 10529 0022 0363 str r3, [r0, #48] +6473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10530 .loc 1 6473 5 is_stmt 1 view .LVU3712 +6473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10531 .loc 1 6473 5 view .LVU3713 + 10532 0024 80F84030 strb r3, [r0, #64] +6473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10533 .loc 1 6473 5 view .LVU3714 +6479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10534 .loc 1 6479 5 view .LVU3715 + 10535 0028 FFF7FEFF bl HAL_I2C_AbortCpltCallback + 10536 .LVL733: +6479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10537 .loc 1 6479 5 is_stmt 0 view .LVU3716 + 10538 002c F4E7 b .L672 + 10539 .cfi_endproc + 10540 .LFE194: + 10542 .section .text.I2C_ITError,"ax",%progbits + 10543 .align 1 + 10544 .syntax unified + 10545 .thumb + 10546 .thumb_func + 10548 I2C_ITError: + 10549 .LVL734: + 10550 .LFB193: +6335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 10551 .loc 1 6335 1 is_stmt 1 view -0 + 10552 .cfi_startproc + 10553 @ args = 0, pretend = 0, frame = 0 + 10554 @ frame_needed = 0, uses_anonymous_args = 0 +6335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 10555 .loc 1 6335 1 is_stmt 0 view .LVU3718 + ARM GAS /tmp/ccNVyn8W.s page 375 + + + 10556 0000 10B5 push {r4, lr} + 10557 .cfi_def_cfa_offset 8 + 10558 .cfi_offset 4, -8 + 10559 .cfi_offset 14, -4 + 10560 0002 0446 mov r4, r0 +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10561 .loc 1 6336 3 is_stmt 1 view .LVU3719 +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10562 .loc 1 6336 24 is_stmt 0 view .LVU3720 + 10563 0004 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10564 .LVL735: +6338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10565 .loc 1 6338 3 is_stmt 1 view .LVU3721 +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 10566 .loc 1 6341 3 view .LVU3722 +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 10567 .loc 1 6341 23 is_stmt 0 view .LVU3723 + 10568 0008 0022 movs r2, #0 + 10569 000a 80F84220 strb r2, [r0, #66] +6342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; + 10570 .loc 1 6342 3 is_stmt 1 view .LVU3724 +6342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; + 10571 .loc 1 6342 23 is_stmt 0 view .LVU3725 + 10572 000e 4548 ldr r0, .L692 + 10573 .LVL736: +6342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; + 10574 .loc 1 6342 23 view .LVU3726 + 10575 0010 E062 str r0, [r4, #44] +6343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10576 .loc 1 6343 3 is_stmt 1 view .LVU3727 +6343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10577 .loc 1 6343 23 is_stmt 0 view .LVU3728 + 10578 0012 6285 strh r2, [r4, #42] @ movhi +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10579 .loc 1 6346 3 is_stmt 1 view .LVU3729 +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10580 .loc 1 6346 7 is_stmt 0 view .LVU3730 + 10581 0014 626C ldr r2, [r4, #68] +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10582 .loc 1 6346 19 view .LVU3731 + 10583 0016 0A43 orrs r2, r2, r1 + 10584 0018 6264 str r2, [r4, #68] +6349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 10585 .loc 1 6349 3 is_stmt 1 view .LVU3732 +6350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 10586 .loc 1 6350 50 is_stmt 0 view .LVU3733 + 10587 001a 283B subs r3, r3, #40 + 10588 .LVL737: +6350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 10589 .loc 1 6350 50 view .LVU3734 + 10590 001c DBB2 uxtb r3, r3 + 10591 .LVL738: +6349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 10592 .loc 1 6349 6 view .LVU3735 + 10593 001e 022B cmp r3, #2 + 10594 0020 19D8 bhi .L678 +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 376 + + + 10595 .loc 1 6354 5 is_stmt 1 view .LVU3736 + 10596 0022 0321 movs r1, #3 + 10597 .LVL739: +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10598 .loc 1 6354 5 is_stmt 0 view .LVU3737 + 10599 0024 2046 mov r0, r4 + 10600 0026 FFF7FEFF bl I2C_Disable_IRQ + 10601 .LVL740: +6357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10602 .loc 1 6357 5 is_stmt 1 view .LVU3738 +6357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10603 .loc 1 6357 25 is_stmt 0 view .LVU3739 + 10604 002a 2823 movs r3, #40 + 10605 002c 84F84130 strb r3, [r4, #65] +6358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10606 .loc 1 6358 5 is_stmt 1 view .LVU3740 +6358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10607 .loc 1 6358 25 is_stmt 0 view .LVU3741 + 10608 0030 3D4B ldr r3, .L692+4 + 10609 0032 6363 str r3, [r4, #52] + 10610 .L679: +6393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10611 .loc 1 6393 3 is_stmt 1 view .LVU3742 +6393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10612 .loc 1 6393 20 is_stmt 0 view .LVU3743 + 10613 0034 236B ldr r3, [r4, #48] + 10614 .LVL741: +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10615 .loc 1 6395 3 is_stmt 1 view .LVU3744 +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10616 .loc 1 6395 12 is_stmt 0 view .LVU3745 + 10617 0036 A26B ldr r2, [r4, #56] +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10618 .loc 1 6395 6 view .LVU3746 + 10619 0038 1AB1 cbz r2, .L682 +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10620 .loc 1 6395 30 discriminator 1 view .LVU3747 + 10621 003a 112B cmp r3, #17 + 10622 003c 30D0 beq .L683 +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10623 .loc 1 6395 81 discriminator 2 view .LVU3748 + 10624 003e 212B cmp r3, #33 + 10625 0040 2ED0 beq .L683 + 10626 .L682: +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10627 .loc 1 6425 8 is_stmt 1 view .LVU3749 +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10628 .loc 1 6425 17 is_stmt 0 view .LVU3750 + 10629 0042 E26B ldr r2, [r4, #60] +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10630 .loc 1 6425 11 view .LVU3751 + 10631 0044 1AB1 cbz r2, .L687 +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10632 .loc 1 6425 35 discriminator 1 view .LVU3752 + 10633 0046 122B cmp r3, #18 + 10634 0048 4BD0 beq .L688 +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + ARM GAS /tmp/ccNVyn8W.s page 377 + + + 10635 .loc 1 6425 86 discriminator 2 view .LVU3753 + 10636 004a 222B cmp r3, #34 + 10637 004c 49D0 beq .L688 + 10638 .L687: +6456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10639 .loc 1 6456 5 is_stmt 1 view .LVU3754 + 10640 004e 2046 mov r0, r4 + 10641 0050 FFF7FEFF bl I2C_TreatErrorCallback + 10642 .LVL742: + 10643 .L677: +6458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10644 .loc 1 6458 1 is_stmt 0 view .LVU3755 + 10645 0054 10BD pop {r4, pc} + 10646 .LVL743: + 10647 .L678: +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10648 .loc 1 6363 5 is_stmt 1 view .LVU3756 + 10649 0056 48F20301 movw r1, #32771 + 10650 .LVL744: +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10651 .loc 1 6363 5 is_stmt 0 view .LVU3757 + 10652 005a 2046 mov r0, r4 + 10653 005c FFF7FEFF bl I2C_Disable_IRQ + 10654 .LVL745: +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10655 .loc 1 6366 5 is_stmt 1 view .LVU3758 + 10656 0060 2046 mov r0, r4 + 10657 0062 FFF7FEFF bl I2C_Flush_TXDR + 10658 .LVL746: +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10659 .loc 1 6370 5 view .LVU3759 +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10660 .loc 1 6370 13 is_stmt 0 view .LVU3760 + 10661 0066 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 10662 006a DBB2 uxtb r3, r3 +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10663 .loc 1 6370 8 view .LVU3761 + 10664 006c 602B cmp r3, #96 + 10665 006e 14D0 beq .L680 +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10666 .loc 1 6373 7 is_stmt 1 view .LVU3762 +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10667 .loc 1 6373 27 is_stmt 0 view .LVU3763 + 10668 0070 2023 movs r3, #32 + 10669 0072 84F84130 strb r3, [r4, #65] +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10670 .loc 1 6376 7 is_stmt 1 view .LVU3764 +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10671 .loc 1 6376 11 is_stmt 0 view .LVU3765 + 10672 0076 2368 ldr r3, [r4] + 10673 0078 9A69 ldr r2, [r3, #24] +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10674 .loc 1 6376 10 view .LVU3766 + 10675 007a 12F0200F tst r2, #32 + 10676 007e 0CD0 beq .L680 +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10677 .loc 1 6378 9 is_stmt 1 view .LVU3767 + ARM GAS /tmp/ccNVyn8W.s page 378 + + +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10678 .loc 1 6378 13 is_stmt 0 view .LVU3768 + 10679 0080 9A69 ldr r2, [r3, #24] +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10680 .loc 1 6378 12 view .LVU3769 + 10681 0082 12F0100F tst r2, #16 + 10682 0086 05D0 beq .L681 +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + 10683 .loc 1 6380 11 is_stmt 1 view .LVU3770 + 10684 0088 1022 movs r2, #16 + 10685 008a DA61 str r2, [r3, #28] +6381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10686 .loc 1 6381 11 view .LVU3771 +6381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10687 .loc 1 6381 15 is_stmt 0 view .LVU3772 + 10688 008c 636C ldr r3, [r4, #68] +6381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10689 .loc 1 6381 27 view .LVU3773 + 10690 008e 43F00403 orr r3, r3, #4 + 10691 0092 6364 str r3, [r4, #68] + 10692 .L681: +6385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10693 .loc 1 6385 9 is_stmt 1 view .LVU3774 + 10694 0094 2368 ldr r3, [r4] + 10695 0096 2022 movs r2, #32 + 10696 0098 DA61 str r2, [r3, #28] + 10697 .L680: +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10698 .loc 1 6389 5 view .LVU3775 +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10699 .loc 1 6389 25 is_stmt 0 view .LVU3776 + 10700 009a 0023 movs r3, #0 + 10701 009c 6363 str r3, [r4, #52] + 10702 009e C9E7 b .L679 + 10703 .LVL747: + 10704 .L683: +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10705 .loc 1 6398 5 is_stmt 1 view .LVU3777 +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10706 .loc 1 6398 14 is_stmt 0 view .LVU3778 + 10707 00a0 2368 ldr r3, [r4] + 10708 .LVL748: +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10709 .loc 1 6398 24 view .LVU3779 + 10710 00a2 1A68 ldr r2, [r3] +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10711 .loc 1 6398 8 view .LVU3780 + 10712 00a4 12F4804F tst r2, #16384 + 10713 00a8 03D0 beq .L684 +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10714 .loc 1 6400 7 is_stmt 1 view .LVU3781 +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10715 .loc 1 6400 21 is_stmt 0 view .LVU3782 + 10716 00aa 1A68 ldr r2, [r3] +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10717 .loc 1 6400 27 view .LVU3783 + 10718 00ac 22F48042 bic r2, r2, #16384 + ARM GAS /tmp/ccNVyn8W.s page 379 + + + 10719 00b0 1A60 str r2, [r3] + 10720 .L684: +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10721 .loc 1 6403 5 is_stmt 1 view .LVU3784 +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10722 .loc 1 6403 9 is_stmt 0 view .LVU3785 + 10723 00b2 A06B ldr r0, [r4, #56] + 10724 00b4 FFF7FEFF bl HAL_DMA_GetState + 10725 .LVL749: +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10726 .loc 1 6403 8 discriminator 1 view .LVU3786 + 10727 00b8 0128 cmp r0, #1 + 10728 00ba 0ED0 beq .L685 +6407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10729 .loc 1 6407 7 is_stmt 1 view .LVU3787 +6407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10730 .loc 1 6407 11 is_stmt 0 view .LVU3788 + 10731 00bc A36B ldr r3, [r4, #56] +6407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10732 .loc 1 6407 39 view .LVU3789 + 10733 00be 1B4A ldr r2, .L692+8 + 10734 00c0 5A63 str r2, [r3, #52] +6410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10735 .loc 1 6410 7 is_stmt 1 view .LVU3790 +6410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10736 .loc 1 6410 7 view .LVU3791 + 10737 00c2 0023 movs r3, #0 + 10738 00c4 84F84030 strb r3, [r4, #64] +6410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10739 .loc 1 6410 7 view .LVU3792 +6413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10740 .loc 1 6413 7 view .LVU3793 +6413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10741 .loc 1 6413 11 is_stmt 0 view .LVU3794 + 10742 00c8 A06B ldr r0, [r4, #56] + 10743 00ca FFF7FEFF bl HAL_DMA_Abort_IT + 10744 .LVL750: +6413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10745 .loc 1 6413 10 discriminator 1 view .LVU3795 + 10746 00ce 0028 cmp r0, #0 + 10747 00d0 C0D0 beq .L677 +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10748 .loc 1 6416 9 is_stmt 1 view .LVU3796 +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10749 .loc 1 6416 13 is_stmt 0 view .LVU3797 + 10750 00d2 A06B ldr r0, [r4, #56] +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10751 .loc 1 6416 21 view .LVU3798 + 10752 00d4 436B ldr r3, [r0, #52] +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10753 .loc 1 6416 9 view .LVU3799 + 10754 00d6 9847 blx r3 + 10755 .LVL751: + 10756 00d8 BCE7 b .L677 + 10757 .L685: +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10758 .loc 1 6421 7 is_stmt 1 view .LVU3800 + ARM GAS /tmp/ccNVyn8W.s page 380 + + + 10759 00da 2046 mov r0, r4 + 10760 00dc FFF7FEFF bl I2C_TreatErrorCallback + 10761 .LVL752: + 10762 00e0 B8E7 b .L677 + 10763 .LVL753: + 10764 .L688: +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10765 .loc 1 6428 5 view .LVU3801 +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10766 .loc 1 6428 14 is_stmt 0 view .LVU3802 + 10767 00e2 2368 ldr r3, [r4] + 10768 .LVL754: +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10769 .loc 1 6428 24 view .LVU3803 + 10770 00e4 1A68 ldr r2, [r3] +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10771 .loc 1 6428 8 view .LVU3804 + 10772 00e6 12F4004F tst r2, #32768 + 10773 00ea 03D0 beq .L689 +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10774 .loc 1 6430 7 is_stmt 1 view .LVU3805 +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10775 .loc 1 6430 21 is_stmt 0 view .LVU3806 + 10776 00ec 1A68 ldr r2, [r3] +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10777 .loc 1 6430 27 view .LVU3807 + 10778 00ee 22F40042 bic r2, r2, #32768 + 10779 00f2 1A60 str r2, [r3] + 10780 .L689: +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10781 .loc 1 6433 5 is_stmt 1 view .LVU3808 +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10782 .loc 1 6433 9 is_stmt 0 view .LVU3809 + 10783 00f4 E06B ldr r0, [r4, #60] + 10784 00f6 FFF7FEFF bl HAL_DMA_GetState + 10785 .LVL755: +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10786 .loc 1 6433 8 discriminator 1 view .LVU3810 + 10787 00fa 0128 cmp r0, #1 + 10788 00fc 0ED0 beq .L690 +6437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10789 .loc 1 6437 7 is_stmt 1 view .LVU3811 +6437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10790 .loc 1 6437 11 is_stmt 0 view .LVU3812 + 10791 00fe E36B ldr r3, [r4, #60] +6437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10792 .loc 1 6437 39 view .LVU3813 + 10793 0100 0A4A ldr r2, .L692+8 + 10794 0102 5A63 str r2, [r3, #52] +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10795 .loc 1 6440 7 is_stmt 1 view .LVU3814 +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10796 .loc 1 6440 7 view .LVU3815 + 10797 0104 0023 movs r3, #0 + 10798 0106 84F84030 strb r3, [r4, #64] +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10799 .loc 1 6440 7 view .LVU3816 + ARM GAS /tmp/ccNVyn8W.s page 381 + + +6443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10800 .loc 1 6443 7 view .LVU3817 +6443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10801 .loc 1 6443 11 is_stmt 0 view .LVU3818 + 10802 010a E06B ldr r0, [r4, #60] + 10803 010c FFF7FEFF bl HAL_DMA_Abort_IT + 10804 .LVL756: +6443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10805 .loc 1 6443 10 discriminator 1 view .LVU3819 + 10806 0110 0028 cmp r0, #0 + 10807 0112 9FD0 beq .L677 +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10808 .loc 1 6446 9 is_stmt 1 view .LVU3820 +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10809 .loc 1 6446 13 is_stmt 0 view .LVU3821 + 10810 0114 E06B ldr r0, [r4, #60] +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10811 .loc 1 6446 21 view .LVU3822 + 10812 0116 436B ldr r3, [r0, #52] +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10813 .loc 1 6446 9 view .LVU3823 + 10814 0118 9847 blx r3 + 10815 .LVL757: + 10816 011a 9BE7 b .L677 + 10817 .L690: +6451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10818 .loc 1 6451 7 is_stmt 1 view .LVU3824 + 10819 011c 2046 mov r0, r4 + 10820 011e FFF7FEFF bl I2C_TreatErrorCallback + 10821 .LVL758: + 10822 0122 97E7 b .L677 + 10823 .L693: + 10824 .align 2 + 10825 .L692: + 10826 0124 0000FFFF .word -65536 + 10827 0128 00000000 .word I2C_Slave_ISR_IT + 10828 012c 00000000 .word I2C_DMAAbort + 10829 .cfi_endproc + 10830 .LFE193: + 10832 .section .text.I2C_ITSlaveCplt,"ax",%progbits + 10833 .align 1 + 10834 .syntax unified + 10835 .thumb + 10836 .thumb_func + 10838 I2C_ITSlaveCplt: + 10839 .LVL759: + 10840 .LFB191: +6125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 10841 .loc 1 6125 1 view -0 + 10842 .cfi_startproc + 10843 @ args = 0, pretend = 0, frame = 0 + 10844 @ frame_needed = 0, uses_anonymous_args = 0 +6125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 10845 .loc 1 6125 1 is_stmt 0 view .LVU3826 + 10846 0000 70B5 push {r4, r5, r6, lr} + 10847 .cfi_def_cfa_offset 16 + 10848 .cfi_offset 4, -16 + ARM GAS /tmp/ccNVyn8W.s page 382 + + + 10849 .cfi_offset 5, -12 + 10850 .cfi_offset 6, -8 + 10851 .cfi_offset 14, -4 + 10852 0002 0446 mov r4, r0 + 10853 0004 0D46 mov r5, r1 +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 10854 .loc 1 6126 3 is_stmt 1 view .LVU3827 +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 10855 .loc 1 6126 26 is_stmt 0 view .LVU3828 + 10856 0006 0268 ldr r2, [r0] +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 10857 .loc 1 6126 12 view .LVU3829 + 10858 0008 1668 ldr r6, [r2] + 10859 .LVL760: +6127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 10860 .loc 1 6127 3 is_stmt 1 view .LVU3830 +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10861 .loc 1 6128 3 view .LVU3831 +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10862 .loc 1 6128 24 is_stmt 0 view .LVU3832 + 10863 000a 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10864 .LVL761: +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10865 .loc 1 6131 3 is_stmt 1 view .LVU3833 + 10866 000e 2021 movs r1, #32 + 10867 .LVL762: +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10868 .loc 1 6131 3 is_stmt 0 view .LVU3834 + 10869 0010 D161 str r1, [r2, #28] +6134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10870 .loc 1 6134 3 is_stmt 1 view .LVU3835 + 10871 0012 213B subs r3, r3, #33 + 10872 .LVL763: +6134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10873 .loc 1 6134 3 is_stmt 0 view .LVU3836 + 10874 0014 092B cmp r3, #9 + 10875 0016 0CD8 bhi .L695 + 10876 0018 DFE803F0 tbb [pc, r3] + 10877 .L697: + 10878 001c 05 .byte (.L698-.L697)/2 + 10879 001d 62 .byte (.L696-.L697)/2 + 10880 001e 0B .byte (.L695-.L697)/2 + 10881 001f 0B .byte (.L695-.L697)/2 + 10882 0020 0B .byte (.L695-.L697)/2 + 10883 0021 0B .byte (.L695-.L697)/2 + 10884 0022 0B .byte (.L695-.L697)/2 + 10885 0023 0B .byte (.L695-.L697)/2 + 10886 0024 05 .byte (.L698-.L697)/2 + 10887 0025 62 .byte (.L696-.L697)/2 + 10888 .p2align 1 + 10889 .L698: +6136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 10890 .loc 1 6136 5 is_stmt 1 view .LVU3837 + 10891 0026 48F20101 movw r1, #32769 + 10892 002a FFF7FEFF bl I2C_Disable_IRQ + 10893 .LVL764: +6137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 383 + + + 10894 .loc 1 6137 5 view .LVU3838 +6137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10895 .loc 1 6137 25 is_stmt 0 view .LVU3839 + 10896 002e 2123 movs r3, #33 + 10897 0030 2363 str r3, [r4, #48] + 10898 .L695: +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10899 .loc 1 6150 3 is_stmt 1 view .LVU3840 +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10900 .loc 1 6150 7 is_stmt 0 view .LVU3841 + 10901 0032 2268 ldr r2, [r4] +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10902 .loc 1 6150 17 view .LVU3842 + 10903 0034 5368 ldr r3, [r2, #4] +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10904 .loc 1 6150 23 view .LVU3843 + 10905 0036 43F40043 orr r3, r3, #32768 + 10906 003a 5360 str r3, [r2, #4] +6153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10907 .loc 1 6153 3 is_stmt 1 view .LVU3844 + 10908 003c 2268 ldr r2, [r4] + 10909 003e 5368 ldr r3, [r2, #4] + 10910 0040 23F0FF73 bic r3, r3, #33423360 + 10911 0044 23F48B33 bic r3, r3, #71168 + 10912 0048 23F4FF73 bic r3, r3, #510 + 10913 004c 23F00103 bic r3, r3, #1 + 10914 0050 5360 str r3, [r2, #4] +6156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10915 .loc 1 6156 3 view .LVU3845 + 10916 0052 2046 mov r0, r4 + 10917 0054 FFF7FEFF bl I2C_Flush_TXDR + 10918 .LVL765: +6159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10919 .loc 1 6159 3 view .LVU3846 +6159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10920 .loc 1 6159 6 is_stmt 0 view .LVU3847 + 10921 0058 16F4804F tst r6, #16384 + 10922 005c 47D0 beq .L699 +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10923 .loc 1 6162 5 is_stmt 1 view .LVU3848 +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10924 .loc 1 6162 9 is_stmt 0 view .LVU3849 + 10925 005e 2268 ldr r2, [r4] +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10926 .loc 1 6162 19 view .LVU3850 + 10927 0060 1368 ldr r3, [r2] +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10928 .loc 1 6162 25 view .LVU3851 + 10929 0062 23F48043 bic r3, r3, #16384 + 10930 0066 1360 str r3, [r2] +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10931 .loc 1 6164 5 is_stmt 1 view .LVU3852 +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10932 .loc 1 6164 13 is_stmt 0 view .LVU3853 + 10933 0068 A36B ldr r3, [r4, #56] +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10934 .loc 1 6164 8 view .LVU3854 + ARM GAS /tmp/ccNVyn8W.s page 384 + + + 10935 006a 1BB1 cbz r3, .L700 +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10936 .loc 1 6166 7 is_stmt 1 view .LVU3855 +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10937 .loc 1 6166 35 is_stmt 0 view .LVU3856 + 10938 006c 1B68 ldr r3, [r3] + 10939 006e 5B68 ldr r3, [r3, #4] +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10940 .loc 1 6166 25 view .LVU3857 + 10941 0070 9BB2 uxth r3, r3 +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10942 .loc 1 6166 23 view .LVU3858 + 10943 0072 6385 strh r3, [r4, #42] @ movhi + 10944 .L700: +6182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10945 .loc 1 6182 3 is_stmt 1 view .LVU3859 +6185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10946 .loc 1 6185 3 view .LVU3860 +6185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10947 .loc 1 6185 6 is_stmt 0 view .LVU3861 + 10948 0074 15F0040F tst r5, #4 + 10949 0078 11D0 beq .L701 +6188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10950 .loc 1 6188 5 is_stmt 1 view .LVU3862 +6188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10951 .loc 1 6188 16 is_stmt 0 view .LVU3863 + 10952 007a 25F00405 bic r5, r5, #4 + 10953 .LVL766: +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10954 .loc 1 6191 5 is_stmt 1 view .LVU3864 +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10955 .loc 1 6191 36 is_stmt 0 view .LVU3865 + 10956 007e 2368 ldr r3, [r4] +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10957 .loc 1 6191 46 view .LVU3866 + 10958 0080 5A6A ldr r2, [r3, #36] +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10959 .loc 1 6191 10 view .LVU3867 + 10960 0082 636A ldr r3, [r4, #36] +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10961 .loc 1 6191 21 view .LVU3868 + 10962 0084 1A70 strb r2, [r3] +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10963 .loc 1 6194 5 is_stmt 1 view .LVU3869 +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10964 .loc 1 6194 9 is_stmt 0 view .LVU3870 + 10965 0086 636A ldr r3, [r4, #36] +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10966 .loc 1 6194 19 view .LVU3871 + 10967 0088 0133 adds r3, r3, #1 + 10968 008a 6362 str r3, [r4, #36] +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10969 .loc 1 6196 5 is_stmt 1 view .LVU3872 +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10970 .loc 1 6196 14 is_stmt 0 view .LVU3873 + 10971 008c 238D ldrh r3, [r4, #40] +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 385 + + + 10972 .loc 1 6196 8 view .LVU3874 + 10973 008e 33B1 cbz r3, .L701 +6198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 10974 .loc 1 6198 7 is_stmt 1 view .LVU3875 +6198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 10975 .loc 1 6198 21 is_stmt 0 view .LVU3876 + 10976 0090 013B subs r3, r3, #1 + 10977 0092 2385 strh r3, [r4, #40] @ movhi +6199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10978 .loc 1 6199 7 is_stmt 1 view .LVU3877 +6199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10979 .loc 1 6199 11 is_stmt 0 view .LVU3878 + 10980 0094 638D ldrh r3, [r4, #42] + 10981 0096 9BB2 uxth r3, r3 +6199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10982 .loc 1 6199 22 view .LVU3879 + 10983 0098 013B subs r3, r3, #1 + 10984 009a 9BB2 uxth r3, r3 + 10985 009c 6385 strh r3, [r4, #42] @ movhi + 10986 .L701: +6204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10987 .loc 1 6204 3 is_stmt 1 view .LVU3880 +6204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10988 .loc 1 6204 11 is_stmt 0 view .LVU3881 + 10989 009e 638D ldrh r3, [r4, #42] + 10990 00a0 9BB2 uxth r3, r3 +6204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10991 .loc 1 6204 6 view .LVU3882 + 10992 00a2 1BB1 cbz r3, .L702 +6207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10993 .loc 1 6207 5 is_stmt 1 view .LVU3883 +6207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10994 .loc 1 6207 9 is_stmt 0 view .LVU3884 + 10995 00a4 636C ldr r3, [r4, #68] +6207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10996 .loc 1 6207 21 view .LVU3885 + 10997 00a6 43F00403 orr r3, r3, #4 + 10998 00aa 6364 str r3, [r4, #68] + 10999 .L702: +6210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11000 .loc 1 6210 3 is_stmt 1 view .LVU3886 +6210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11001 .loc 1 6210 14 is_stmt 0 view .LVU3887 + 11002 00ac 0023 movs r3, #0 + 11003 00ae 84F84230 strb r3, [r4, #66] +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11004 .loc 1 6211 3 is_stmt 1 view .LVU3888 +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11005 .loc 1 6211 17 is_stmt 0 view .LVU3889 + 11006 00b2 6363 str r3, [r4, #52] +6213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11007 .loc 1 6213 3 is_stmt 1 view .LVU3890 +6213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11008 .loc 1 6213 11 is_stmt 0 view .LVU3891 + 11009 00b4 636C ldr r3, [r4, #68] +6213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11010 .loc 1 6213 6 view .LVU3892 + ARM GAS /tmp/ccNVyn8W.s page 386 + + + 11011 00b6 53BB cbnz r3, .L709 +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11012 .loc 1 6225 8 is_stmt 1 view .LVU3893 +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11013 .loc 1 6225 16 is_stmt 0 view .LVU3894 + 11014 00b8 E36A ldr r3, [r4, #44] +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11015 .loc 1 6225 11 view .LVU3895 + 11016 00ba 13F5803F cmn r3, #65536 + 11017 00be 34D1 bne .L710 +6245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11018 .loc 1 6245 8 is_stmt 1 view .LVU3896 +6245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11019 .loc 1 6245 16 is_stmt 0 view .LVU3897 + 11020 00c0 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11021 00c4 DBB2 uxtb r3, r3 +6245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11022 .loc 1 6245 11 view .LVU3898 + 11023 00c6 222B cmp r3, #34 + 11024 00c8 3FD0 beq .L711 +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11025 .loc 1 6262 5 is_stmt 1 view .LVU3899 +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11026 .loc 1 6262 17 is_stmt 0 view .LVU3900 + 11027 00ca 2023 movs r3, #32 + 11028 00cc 84F84130 strb r3, [r4, #65] +6263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11029 .loc 1 6263 5 is_stmt 1 view .LVU3901 +6263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11030 .loc 1 6263 25 is_stmt 0 view .LVU3902 + 11031 00d0 0023 movs r3, #0 + 11032 00d2 2363 str r3, [r4, #48] +6266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11033 .loc 1 6266 5 is_stmt 1 view .LVU3903 +6266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11034 .loc 1 6266 5 view .LVU3904 + 11035 00d4 84F84030 strb r3, [r4, #64] +6266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11036 .loc 1 6266 5 view .LVU3905 +6272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11037 .loc 1 6272 5 view .LVU3906 + 11038 00d8 2046 mov r0, r4 + 11039 00da FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 11040 .LVL767: +6275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11041 .loc 1 6275 1 is_stmt 0 view .LVU3907 + 11042 00de 33E0 b .L694 + 11043 .LVL768: + 11044 .L696: +6141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 11045 .loc 1 6141 5 is_stmt 1 view .LVU3908 + 11046 00e0 48F20201 movw r1, #32770 + 11047 00e4 FFF7FEFF bl I2C_Disable_IRQ + 11048 .LVL769: +6142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11049 .loc 1 6142 5 view .LVU3909 +6142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 387 + + + 11050 .loc 1 6142 25 is_stmt 0 view .LVU3910 + 11051 00e8 2223 movs r3, #34 + 11052 00ea 2363 str r3, [r4, #48] + 11053 00ec A1E7 b .L695 + 11054 .L699: +6169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11055 .loc 1 6169 8 is_stmt 1 view .LVU3911 +6169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11056 .loc 1 6169 11 is_stmt 0 view .LVU3912 + 11057 00ee 16F4004F tst r6, #32768 + 11058 00f2 BFD0 beq .L700 +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11059 .loc 1 6172 5 is_stmt 1 view .LVU3913 +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11060 .loc 1 6172 9 is_stmt 0 view .LVU3914 + 11061 00f4 2268 ldr r2, [r4] +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11062 .loc 1 6172 19 view .LVU3915 + 11063 00f6 1368 ldr r3, [r2] +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11064 .loc 1 6172 25 view .LVU3916 + 11065 00f8 23F40043 bic r3, r3, #32768 + 11066 00fc 1360 str r3, [r2] +6174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11067 .loc 1 6174 5 is_stmt 1 view .LVU3917 +6174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11068 .loc 1 6174 13 is_stmt 0 view .LVU3918 + 11069 00fe E36B ldr r3, [r4, #60] +6174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11070 .loc 1 6174 8 view .LVU3919 + 11071 0100 002B cmp r3, #0 + 11072 0102 B7D0 beq .L700 +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11073 .loc 1 6176 7 is_stmt 1 view .LVU3920 +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11074 .loc 1 6176 35 is_stmt 0 view .LVU3921 + 11075 0104 1B68 ldr r3, [r3] + 11076 0106 5B68 ldr r3, [r3, #4] +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11077 .loc 1 6176 25 view .LVU3922 + 11078 0108 9BB2 uxth r3, r3 +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11079 .loc 1 6176 23 view .LVU3923 + 11080 010a 6385 strh r3, [r4, #42] @ movhi + 11081 010c B2E7 b .L700 + 11082 .LVL770: + 11083 .L709: +6216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11084 .loc 1 6216 5 is_stmt 1 view .LVU3924 +6216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11085 .loc 1 6216 27 is_stmt 0 view .LVU3925 + 11086 010e 616C ldr r1, [r4, #68] +6216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11087 .loc 1 6216 5 view .LVU3926 + 11088 0110 2046 mov r0, r4 + 11089 0112 FFF7FEFF bl I2C_ITError + 11090 .LVL771: + ARM GAS /tmp/ccNVyn8W.s page 388 + + +6219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11091 .loc 1 6219 5 is_stmt 1 view .LVU3927 +6219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11092 .loc 1 6219 13 is_stmt 0 view .LVU3928 + 11093 0116 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11094 011a DBB2 uxtb r3, r3 +6219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11095 .loc 1 6219 8 view .LVU3929 + 11096 011c 282B cmp r3, #40 + 11097 011e 13D1 bne .L694 +6222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11098 .loc 1 6222 7 is_stmt 1 view .LVU3930 + 11099 0120 2946 mov r1, r5 + 11100 0122 2046 mov r0, r4 + 11101 0124 FFF7FEFF bl I2C_ITListenCplt + 11102 .LVL772: + 11103 0128 0EE0 b .L694 + 11104 .L710: +6228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11105 .loc 1 6228 5 view .LVU3931 + 11106 012a 2046 mov r0, r4 + 11107 012c FFF7FEFF bl I2C_ITSlaveSeqCplt + 11108 .LVL773: +6230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11109 .loc 1 6230 5 view .LVU3932 +6230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11110 .loc 1 6230 23 is_stmt 0 view .LVU3933 + 11111 0130 0B4B ldr r3, .L712 + 11112 0132 E362 str r3, [r4, #44] +6231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11113 .loc 1 6231 5 is_stmt 1 view .LVU3934 +6231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11114 .loc 1 6231 17 is_stmt 0 view .LVU3935 + 11115 0134 2023 movs r3, #32 + 11116 0136 84F84130 strb r3, [r4, #65] +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11117 .loc 1 6232 5 is_stmt 1 view .LVU3936 +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11118 .loc 1 6232 25 is_stmt 0 view .LVU3937 + 11119 013a 0023 movs r3, #0 + 11120 013c 2363 str r3, [r4, #48] +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11121 .loc 1 6235 5 is_stmt 1 view .LVU3938 +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11122 .loc 1 6235 5 view .LVU3939 + 11123 013e 84F84030 strb r3, [r4, #64] +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11124 .loc 1 6235 5 view .LVU3940 +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11125 .loc 1 6241 5 view .LVU3941 + 11126 0142 2046 mov r0, r4 + 11127 0144 FFF7FEFF bl HAL_I2C_ListenCpltCallback + 11128 .LVL774: + 11129 .L694: +6275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11130 .loc 1 6275 1 is_stmt 0 view .LVU3942 + 11131 0148 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/ccNVyn8W.s page 389 + + + 11132 .LVL775: + 11133 .L711: +6247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11134 .loc 1 6247 5 is_stmt 1 view .LVU3943 +6247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11135 .loc 1 6247 17 is_stmt 0 view .LVU3944 + 11136 014a 2023 movs r3, #32 + 11137 014c 84F84130 strb r3, [r4, #65] +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11138 .loc 1 6248 5 is_stmt 1 view .LVU3945 +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11139 .loc 1 6248 25 is_stmt 0 view .LVU3946 + 11140 0150 0023 movs r3, #0 + 11141 0152 2363 str r3, [r4, #48] +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11142 .loc 1 6251 5 is_stmt 1 view .LVU3947 +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11143 .loc 1 6251 5 view .LVU3948 + 11144 0154 84F84030 strb r3, [r4, #64] +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11145 .loc 1 6251 5 view .LVU3949 +6257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11146 .loc 1 6257 5 view .LVU3950 + 11147 0158 2046 mov r0, r4 + 11148 015a FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 11149 .LVL776: + 11150 015e F3E7 b .L694 + 11151 .L713: + 11152 .align 2 + 11153 .L712: + 11154 0160 0000FFFF .word -65536 + 11155 .cfi_endproc + 11156 .LFE191: + 11158 .section .text.I2C_Slave_ISR_IT,"ax",%progbits + 11159 .align 1 + 11160 .syntax unified + 11161 .thumb + 11162 .thumb_func + 11164 I2C_Slave_ISR_IT: + 11165 .LVL777: + 11166 .LFB181: +5092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11167 .loc 1 5092 1 view -0 + 11168 .cfi_startproc + 11169 @ args = 0, pretend = 0, frame = 0 + 11170 @ frame_needed = 0, uses_anonymous_args = 0 +5092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11171 .loc 1 5092 1 is_stmt 0 view .LVU3952 + 11172 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11173 .cfi_def_cfa_offset 24 + 11174 .cfi_offset 3, -24 + 11175 .cfi_offset 4, -20 + 11176 .cfi_offset 5, -16 + 11177 .cfi_offset 6, -12 + 11178 .cfi_offset 7, -8 + 11179 .cfi_offset 14, -4 +5093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + ARM GAS /tmp/ccNVyn8W.s page 390 + + + 11180 .loc 1 5093 3 is_stmt 1 view .LVU3953 +5093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11181 .loc 1 5093 12 is_stmt 0 view .LVU3954 + 11182 0002 C76A ldr r7, [r0, #44] + 11183 .LVL778: +5094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11184 .loc 1 5094 3 is_stmt 1 view .LVU3955 +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11185 .loc 1 5097 3 view .LVU3956 +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11186 .loc 1 5097 3 view .LVU3957 + 11187 0004 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 11188 0008 012B cmp r3, #1 + 11189 000a 00F09E80 beq .L728 + 11190 000e 0446 mov r4, r0 + 11191 0010 0D46 mov r5, r1 + 11192 0012 1646 mov r6, r2 +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11193 .loc 1 5097 3 discriminator 2 view .LVU3958 + 11194 0014 0123 movs r3, #1 + 11195 0016 80F84030 strb r3, [r0, #64] +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11196 .loc 1 5097 3 discriminator 2 view .LVU3959 +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11197 .loc 1 5100 3 view .LVU3960 +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11198 .loc 1 5100 6 is_stmt 0 view .LVU3961 + 11199 001a 11F0200F tst r1, #32 + 11200 001e 02D0 beq .L716 +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11201 .loc 1 5100 61 discriminator 1 view .LVU3962 + 11202 0020 12F0200F tst r2, #32 + 11203 0024 19D1 bne .L730 + 11204 .LVL779: + 11205 .L716: +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11206 .loc 1 5107 3 is_stmt 1 view .LVU3963 +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11207 .loc 1 5107 6 is_stmt 0 view .LVU3964 + 11208 0026 15F0100F tst r5, #16 + 11209 002a 3ED0 beq .L717 +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11210 .loc 1 5107 58 discriminator 1 view .LVU3965 + 11211 002c 16F0100F tst r6, #16 + 11212 0030 3BD0 beq .L717 +5114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11213 .loc 1 5114 5 is_stmt 1 view .LVU3966 +5114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11214 .loc 1 5114 13 is_stmt 0 view .LVU3967 + 11215 0032 638D ldrh r3, [r4, #42] + 11216 0034 9BB2 uxth r3, r3 +5114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11217 .loc 1 5114 8 view .LVU3968 + 11218 0036 43BB cbnz r3, .L718 +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11219 .loc 1 5116 7 is_stmt 1 view .LVU3969 +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + ARM GAS /tmp/ccNVyn8W.s page 391 + + + 11220 .loc 1 5116 16 is_stmt 0 view .LVU3970 + 11221 0038 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11222 003c DBB2 uxtb r3, r3 +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11223 .loc 1 5116 10 view .LVU3971 + 11224 003e 282B cmp r3, #40 + 11225 0040 0ED0 beq .L731 + 11226 .L719: +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11227 .loc 1 5123 12 is_stmt 1 view .LVU3972 +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11228 .loc 1 5123 21 is_stmt 0 view .LVU3973 + 11229 0042 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11230 0046 DBB2 uxtb r3, r3 +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11231 .loc 1 5123 15 view .LVU3974 + 11232 0048 292B cmp r3, #41 + 11233 004a 11D0 beq .L732 + 11234 .L721: +5138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11235 .loc 1 5138 9 is_stmt 1 view .LVU3975 + 11236 004c 2368 ldr r3, [r4] + 11237 004e 1022 movs r2, #16 + 11238 0050 DA61 str r2, [r3, #28] + 11239 .L720: +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11240 .loc 1 5215 3 view .LVU3976 +5218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11241 .loc 1 5218 3 view .LVU3977 +5218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11242 .loc 1 5218 3 view .LVU3978 + 11243 0052 0020 movs r0, #0 + 11244 0054 84F84000 strb r0, [r4, #64] +5218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11245 .loc 1 5218 3 view .LVU3979 +5220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11246 .loc 1 5220 3 view .LVU3980 + 11247 .LVL780: + 11248 .L715: +5221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11249 .loc 1 5221 1 is_stmt 0 view .LVU3981 + 11250 0058 F8BD pop {r3, r4, r5, r6, r7, pc} + 11251 .LVL781: + 11252 .L730: +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11253 .loc 1 5104 5 is_stmt 1 view .LVU3982 + 11254 005a FFF7FEFF bl I2C_ITSlaveCplt + 11255 .LVL782: +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11256 .loc 1 5104 5 is_stmt 0 view .LVU3983 + 11257 005e E2E7 b .L716 + 11258 .L731: +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11259 .loc 1 5116 49 discriminator 1 view .LVU3984 + 11260 0060 B7F1007F cmp r7, #33554432 + 11261 0064 EDD1 bne .L719 +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 392 + + + 11262 .loc 1 5121 9 is_stmt 1 view .LVU3985 + 11263 0066 2946 mov r1, r5 + 11264 0068 2046 mov r0, r4 + 11265 006a FFF7FEFF bl I2C_ITListenCplt + 11266 .LVL783: + 11267 006e F0E7 b .L720 + 11268 .L732: +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11269 .loc 1 5123 62 is_stmt 0 discriminator 1 view .LVU3986 + 11270 0070 17F5803F cmn r7, #65536 + 11271 0074 EAD0 beq .L721 +5126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11272 .loc 1 5126 9 is_stmt 1 view .LVU3987 + 11273 0076 2368 ldr r3, [r4] + 11274 0078 1022 movs r2, #16 + 11275 007a DA61 str r2, [r3, #28] +5129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11276 .loc 1 5129 9 view .LVU3988 + 11277 007c 2046 mov r0, r4 + 11278 007e FFF7FEFF bl I2C_Flush_TXDR + 11279 .LVL784: +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11280 .loc 1 5133 9 view .LVU3989 + 11281 0082 2046 mov r0, r4 + 11282 0084 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11283 .LVL785: + 11284 0088 E3E7 b .L720 + 11285 .L718: +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11286 .loc 1 5145 7 view .LVU3990 + 11287 008a 2368 ldr r3, [r4] + 11288 008c 1022 movs r2, #16 + 11289 008e DA61 str r2, [r3, #28] +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11290 .loc 1 5148 7 view .LVU3991 +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11291 .loc 1 5148 11 is_stmt 0 view .LVU3992 + 11292 0090 636C ldr r3, [r4, #68] +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11293 .loc 1 5148 23 view .LVU3993 + 11294 0092 43F00403 orr r3, r3, #4 + 11295 0096 6364 str r3, [r4, #68] +5150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11296 .loc 1 5150 7 is_stmt 1 view .LVU3994 +5150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11297 .loc 1 5150 10 is_stmt 0 view .LVU3995 + 11298 0098 17B1 cbz r7, .L722 +5150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11299 .loc 1 5150 43 discriminator 1 view .LVU3996 + 11300 009a B7F1807F cmp r7, #16777216 + 11301 009e D8D1 bne .L720 + 11302 .L722: +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11303 .loc 1 5153 9 is_stmt 1 view .LVU3997 +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11304 .loc 1 5153 31 is_stmt 0 view .LVU3998 + 11305 00a0 616C ldr r1, [r4, #68] + ARM GAS /tmp/ccNVyn8W.s page 393 + + +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11306 .loc 1 5153 9 view .LVU3999 + 11307 00a2 2046 mov r0, r4 + 11308 00a4 FFF7FEFF bl I2C_ITError + 11309 .LVL786: + 11310 00a8 D3E7 b .L720 + 11311 .L717: +5157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11312 .loc 1 5157 8 is_stmt 1 view .LVU4000 +5157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11313 .loc 1 5157 11 is_stmt 0 view .LVU4001 + 11314 00aa 15F0040F tst r5, #4 + 11315 00ae 1FD0 beq .L723 +5157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11316 .loc 1 5157 65 discriminator 1 view .LVU4002 + 11317 00b0 16F0040F tst r6, #4 + 11318 00b4 1CD0 beq .L723 +5160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11319 .loc 1 5160 5 is_stmt 1 view .LVU4003 +5160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11320 .loc 1 5160 13 is_stmt 0 view .LVU4004 + 11321 00b6 638D ldrh r3, [r4, #42] + 11322 00b8 9BB2 uxth r3, r3 +5160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11323 .loc 1 5160 8 view .LVU4005 + 11324 00ba 73B1 cbz r3, .L724 +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11325 .loc 1 5163 7 is_stmt 1 view .LVU4006 +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11326 .loc 1 5163 38 is_stmt 0 view .LVU4007 + 11327 00bc 2368 ldr r3, [r4] +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11328 .loc 1 5163 48 view .LVU4008 + 11329 00be 5A6A ldr r2, [r3, #36] +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11330 .loc 1 5163 12 view .LVU4009 + 11331 00c0 636A ldr r3, [r4, #36] +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11332 .loc 1 5163 23 view .LVU4010 + 11333 00c2 1A70 strb r2, [r3] +5166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11334 .loc 1 5166 7 is_stmt 1 view .LVU4011 +5166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11335 .loc 1 5166 11 is_stmt 0 view .LVU4012 + 11336 00c4 636A ldr r3, [r4, #36] +5166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11337 .loc 1 5166 21 view .LVU4013 + 11338 00c6 0133 adds r3, r3, #1 + 11339 00c8 6362 str r3, [r4, #36] +5168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11340 .loc 1 5168 7 is_stmt 1 view .LVU4014 +5168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11341 .loc 1 5168 11 is_stmt 0 view .LVU4015 + 11342 00ca 238D ldrh r3, [r4, #40] +5168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11343 .loc 1 5168 21 view .LVU4016 + 11344 00cc 013B subs r3, r3, #1 + ARM GAS /tmp/ccNVyn8W.s page 394 + + + 11345 00ce 2385 strh r3, [r4, #40] @ movhi +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11346 .loc 1 5169 7 is_stmt 1 view .LVU4017 +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11347 .loc 1 5169 11 is_stmt 0 view .LVU4018 + 11348 00d0 638D ldrh r3, [r4, #42] + 11349 00d2 9BB2 uxth r3, r3 +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11350 .loc 1 5169 22 view .LVU4019 + 11351 00d4 013B subs r3, r3, #1 + 11352 00d6 9BB2 uxth r3, r3 + 11353 00d8 6385 strh r3, [r4, #42] @ movhi + 11354 .L724: +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11355 .loc 1 5172 5 is_stmt 1 view .LVU4020 +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11356 .loc 1 5172 14 is_stmt 0 view .LVU4021 + 11357 00da 638D ldrh r3, [r4, #42] + 11358 00dc 9BB2 uxth r3, r3 +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11359 .loc 1 5172 8 view .LVU4022 + 11360 00de 002B cmp r3, #0 + 11361 00e0 B7D1 bne .L720 +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11362 .loc 1 5172 33 discriminator 1 view .LVU4023 + 11363 00e2 17F5803F cmn r7, #65536 + 11364 00e6 B4D0 beq .L720 +5176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11365 .loc 1 5176 7 is_stmt 1 view .LVU4024 + 11366 00e8 2046 mov r0, r4 + 11367 00ea FFF7FEFF bl I2C_ITSlaveSeqCplt + 11368 .LVL787: + 11369 00ee B0E7 b .L720 + 11370 .L723: +5179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 11371 .loc 1 5179 8 view .LVU4025 +5179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 11372 .loc 1 5179 11 is_stmt 0 view .LVU4026 + 11373 00f0 15F0080F tst r5, #8 + 11374 00f4 02D0 beq .L725 +5179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 11375 .loc 1 5179 65 discriminator 1 view .LVU4027 + 11376 00f6 16F0080F tst r6, #8 + 11377 00fa 18D1 bne .L733 + 11378 .L725: +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11379 .loc 1 5184 8 is_stmt 1 view .LVU4028 +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11380 .loc 1 5184 11 is_stmt 0 view .LVU4029 + 11381 00fc 15F0020F tst r5, #2 + 11382 0100 A7D0 beq .L720 +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11383 .loc 1 5184 65 discriminator 1 view .LVU4030 + 11384 0102 16F0020F tst r6, #2 + 11385 0106 A4D0 beq .L720 +5191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11386 .loc 1 5191 5 is_stmt 1 view .LVU4031 + ARM GAS /tmp/ccNVyn8W.s page 395 + + +5191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11387 .loc 1 5191 13 is_stmt 0 view .LVU4032 + 11388 0108 638D ldrh r3, [r4, #42] + 11389 010a 9BB2 uxth r3, r3 +5191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11390 .loc 1 5191 8 view .LVU4033 + 11391 010c A3B1 cbz r3, .L726 +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11392 .loc 1 5194 7 is_stmt 1 view .LVU4034 +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11393 .loc 1 5194 35 is_stmt 0 view .LVU4035 + 11394 010e 626A ldr r2, [r4, #36] +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11395 .loc 1 5194 11 view .LVU4036 + 11396 0110 2368 ldr r3, [r4] +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11397 .loc 1 5194 30 view .LVU4037 + 11398 0112 1278 ldrb r2, [r2] @ zero_extendqisi2 +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11399 .loc 1 5194 28 view .LVU4038 + 11400 0114 9A62 str r2, [r3, #40] +5197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11401 .loc 1 5197 7 is_stmt 1 view .LVU4039 +5197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11402 .loc 1 5197 11 is_stmt 0 view .LVU4040 + 11403 0116 636A ldr r3, [r4, #36] +5197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11404 .loc 1 5197 21 view .LVU4041 + 11405 0118 0133 adds r3, r3, #1 + 11406 011a 6362 str r3, [r4, #36] +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 11407 .loc 1 5199 7 is_stmt 1 view .LVU4042 +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 11408 .loc 1 5199 11 is_stmt 0 view .LVU4043 + 11409 011c 638D ldrh r3, [r4, #42] + 11410 011e 9BB2 uxth r3, r3 +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 11411 .loc 1 5199 22 view .LVU4044 + 11412 0120 013B subs r3, r3, #1 + 11413 0122 9BB2 uxth r3, r3 + 11414 0124 6385 strh r3, [r4, #42] @ movhi +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11415 .loc 1 5200 7 is_stmt 1 view .LVU4045 +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11416 .loc 1 5200 11 is_stmt 0 view .LVU4046 + 11417 0126 238D ldrh r3, [r4, #40] +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11418 .loc 1 5200 21 view .LVU4047 + 11419 0128 013B subs r3, r3, #1 + 11420 012a 2385 strh r3, [r4, #40] @ movhi + 11421 012c 91E7 b .L720 + 11422 .L733: +5182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11423 .loc 1 5182 5 is_stmt 1 view .LVU4048 + 11424 012e 2946 mov r1, r5 + 11425 0130 2046 mov r0, r4 + 11426 0132 FFF7FEFF bl I2C_ITAddrCplt + ARM GAS /tmp/ccNVyn8W.s page 396 + + + 11427 .LVL788: + 11428 0136 8CE7 b .L720 + 11429 .L726: +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11430 .loc 1 5204 7 view .LVU4049 +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11431 .loc 1 5204 10 is_stmt 0 view .LVU4050 + 11432 0138 B7F1807F cmp r7, #16777216 + 11433 013c 01D0 beq .L727 +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11434 .loc 1 5204 42 discriminator 1 view .LVU4051 + 11435 013e 002F cmp r7, #0 + 11436 0140 87D1 bne .L720 + 11437 .L727: +5208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11438 .loc 1 5208 9 is_stmt 1 view .LVU4052 + 11439 0142 2046 mov r0, r4 + 11440 0144 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11441 .LVL789: + 11442 0148 83E7 b .L720 + 11443 .LVL790: + 11444 .L728: +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11445 .loc 1 5097 3 is_stmt 0 discriminator 1 view .LVU4053 + 11446 014a 0220 movs r0, #2 + 11447 .LVL791: +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11448 .loc 1 5097 3 discriminator 1 view .LVU4054 + 11449 014c 84E7 b .L715 + 11450 .cfi_endproc + 11451 .LFE181: + 11453 .section .text.I2C_ITMasterCplt,"ax",%progbits + 11454 .align 1 + 11455 .syntax unified + 11456 .thumb + 11457 .thumb_func + 11459 I2C_ITMasterCplt: + 11460 .LVL792: + 11461 .LFB190: +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 11462 .loc 1 5982 1 is_stmt 1 view -0 + 11463 .cfi_startproc + 11464 @ args = 0, pretend = 0, frame = 8 + 11465 @ frame_needed = 0, uses_anonymous_args = 0 +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 11466 .loc 1 5982 1 is_stmt 0 view .LVU4056 + 11467 0000 30B5 push {r4, r5, lr} + 11468 .cfi_def_cfa_offset 12 + 11469 .cfi_offset 4, -12 + 11470 .cfi_offset 5, -8 + 11471 .cfi_offset 14, -4 + 11472 0002 83B0 sub sp, sp, #12 + 11473 .cfi_def_cfa_offset 24 + 11474 0004 0446 mov r4, r0 + 11475 0006 0D46 mov r5, r1 +5983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11476 .loc 1 5983 3 is_stmt 1 view .LVU4057 + ARM GAS /tmp/ccNVyn8W.s page 397 + + +5984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __IO uint32_t tmpreg; + 11477 .loc 1 5984 3 view .LVU4058 + 11478 .LVL793: +5985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11479 .loc 1 5985 3 view .LVU4059 +5988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11480 .loc 1 5988 3 view .LVU4060 + 11481 0008 0368 ldr r3, [r0] + 11482 000a 2022 movs r2, #32 + 11483 000c DA61 str r2, [r3, #28] +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11484 .loc 1 5991 3 view .LVU4061 +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11485 .loc 1 5991 11 is_stmt 0 view .LVU4062 + 11486 000e 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 11487 0012 DBB2 uxtb r3, r3 +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11488 .loc 1 5991 6 view .LVU4063 + 11489 0014 212B cmp r3, #33 + 11490 0016 33D0 beq .L746 +5996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11491 .loc 1 5996 8 is_stmt 1 view .LVU4064 +5996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11492 .loc 1 5996 16 is_stmt 0 view .LVU4065 + 11493 0018 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 11494 001c DBB2 uxtb r3, r3 +5996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11495 .loc 1 5996 11 view .LVU4066 + 11496 001e 222B cmp r3, #34 + 11497 0020 34D0 beq .L747 + 11498 .LVL794: + 11499 .L736: +6004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11500 .loc 1 6004 3 is_stmt 1 view .LVU4067 +6007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11501 .loc 1 6007 3 view .LVU4068 + 11502 0022 2268 ldr r2, [r4] + 11503 0024 5368 ldr r3, [r2, #4] + 11504 0026 23F0FF73 bic r3, r3, #33423360 + 11505 002a 23F48B33 bic r3, r3, #71168 + 11506 002e 23F4FF73 bic r3, r3, #510 + 11507 0032 23F00103 bic r3, r3, #1 + 11508 0036 5360 str r3, [r2, #4] +6010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11509 .loc 1 6010 3 view .LVU4069 +6010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11510 .loc 1 6010 23 is_stmt 0 view .LVU4070 + 11511 0038 0023 movs r3, #0 + 11512 003a 6363 str r3, [r4, #52] +6011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11513 .loc 1 6011 3 is_stmt 1 view .LVU4071 +6011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11514 .loc 1 6011 23 is_stmt 0 view .LVU4072 + 11515 003c A3F58033 sub r3, r3, #65536 + 11516 0040 E362 str r3, [r4, #44] +6013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11517 .loc 1 6013 3 is_stmt 1 view .LVU4073 + ARM GAS /tmp/ccNVyn8W.s page 398 + + +6013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11518 .loc 1 6013 6 is_stmt 0 view .LVU4074 + 11519 0042 15F0100F tst r5, #16 + 11520 0046 06D0 beq .L737 +6016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11521 .loc 1 6016 5 is_stmt 1 view .LVU4075 + 11522 0048 2368 ldr r3, [r4] + 11523 004a 1022 movs r2, #16 + 11524 004c DA61 str r2, [r3, #28] +6019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11525 .loc 1 6019 5 view .LVU4076 +6019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11526 .loc 1 6019 9 is_stmt 0 view .LVU4077 + 11527 004e 636C ldr r3, [r4, #68] +6019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11528 .loc 1 6019 21 view .LVU4078 + 11529 0050 43F00403 orr r3, r3, #4 + 11530 0054 6364 str r3, [r4, #68] + 11531 .L737: +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11532 .loc 1 6023 3 is_stmt 1 view .LVU4079 +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11533 .loc 1 6023 12 is_stmt 0 view .LVU4080 + 11534 0056 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11535 005a DBB2 uxtb r3, r3 +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11536 .loc 1 6023 6 view .LVU4081 + 11537 005c 602B cmp r3, #96 + 11538 005e 1BD0 beq .L748 + 11539 .L738: +6031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11540 .loc 1 6031 3 is_stmt 1 view .LVU4082 + 11541 0060 2046 mov r0, r4 + 11542 0062 FFF7FEFF bl I2C_Flush_TXDR + 11543 .LVL795: +6034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11544 .loc 1 6034 3 view .LVU4083 +6034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11545 .loc 1 6034 12 is_stmt 0 view .LVU4084 + 11546 0066 626C ldr r2, [r4, #68] + 11547 .LVL796: +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11548 .loc 1 6037 3 is_stmt 1 view .LVU4085 +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11549 .loc 1 6037 12 is_stmt 0 view .LVU4086 + 11550 0068 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11551 006c DBB2 uxtb r3, r3 +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11552 .loc 1 6037 6 view .LVU4087 + 11553 006e 602B cmp r3, #96 + 11554 0070 00D0 beq .L739 +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11555 .loc 1 6037 44 discriminator 1 view .LVU4088 + 11556 0072 D2B1 cbz r2, .L740 + 11557 .L739: +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11558 .loc 1 6040 5 is_stmt 1 view .LVU4089 + ARM GAS /tmp/ccNVyn8W.s page 399 + + +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11559 .loc 1 6040 27 is_stmt 0 view .LVU4090 + 11560 0074 616C ldr r1, [r4, #68] +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11561 .loc 1 6040 5 view .LVU4091 + 11562 0076 2046 mov r0, r4 + 11563 0078 FFF7FEFF bl I2C_ITError + 11564 .LVL797: + 11565 .L734: +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11566 .loc 1 6116 1 view .LVU4092 + 11567 007c 03B0 add sp, sp, #12 + 11568 .cfi_remember_state + 11569 .cfi_def_cfa_offset 12 + 11570 @ sp needed + 11571 007e 30BD pop {r4, r5, pc} + 11572 .LVL798: + 11573 .L746: + 11574 .cfi_restore_state +5993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 11575 .loc 1 5993 5 is_stmt 1 view .LVU4093 + 11576 0080 0121 movs r1, #1 + 11577 .LVL799: +5993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 11578 .loc 1 5993 5 is_stmt 0 view .LVU4094 + 11579 0082 FFF7FEFF bl I2C_Disable_IRQ + 11580 .LVL800: +5994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11581 .loc 1 5994 5 is_stmt 1 view .LVU4095 +5994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11582 .loc 1 5994 25 is_stmt 0 view .LVU4096 + 11583 0086 1123 movs r3, #17 + 11584 0088 2363 str r3, [r4, #48] + 11585 008a CAE7 b .L736 + 11586 .LVL801: + 11587 .L747: +5998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 11588 .loc 1 5998 5 is_stmt 1 view .LVU4097 + 11589 008c 0221 movs r1, #2 + 11590 .LVL802: +5998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 11591 .loc 1 5998 5 is_stmt 0 view .LVU4098 + 11592 008e FFF7FEFF bl I2C_Disable_IRQ + 11593 .LVL803: +5999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11594 .loc 1 5999 5 is_stmt 1 view .LVU4099 +5999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11595 .loc 1 5999 25 is_stmt 0 view .LVU4100 + 11596 0092 1223 movs r3, #18 + 11597 0094 2363 str r3, [r4, #48] + 11598 0096 C4E7 b .L736 + 11599 .L748: +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11600 .loc 1 6023 44 discriminator 1 view .LVU4101 + 11601 0098 15F0040F tst r5, #4 + 11602 009c E0D0 beq .L738 +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + ARM GAS /tmp/ccNVyn8W.s page 400 + + + 11603 .loc 1 6026 5 is_stmt 1 view .LVU4102 +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 11604 .loc 1 6026 27 is_stmt 0 view .LVU4103 + 11605 009e 2368 ldr r3, [r4] +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 11606 .loc 1 6026 37 view .LVU4104 + 11607 00a0 5B6A ldr r3, [r3, #36] + 11608 00a2 DBB2 uxtb r3, r3 +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 11609 .loc 1 6026 12 view .LVU4105 + 11610 00a4 0193 str r3, [sp, #4] +6027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11611 .loc 1 6027 5 is_stmt 1 view .LVU4106 + 11612 00a6 019B ldr r3, [sp, #4] + 11613 00a8 DAE7 b .L738 + 11614 .LVL804: + 11615 .L740: +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11616 .loc 1 6043 8 view .LVU4107 +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11617 .loc 1 6043 16 is_stmt 0 view .LVU4108 + 11618 00aa 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11619 00ae DBB2 uxtb r3, r3 +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11620 .loc 1 6043 11 view .LVU4109 + 11621 00b0 212B cmp r3, #33 + 11622 00b2 17D0 beq .L749 +6078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11623 .loc 1 6078 8 is_stmt 1 view .LVU4110 +6078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11624 .loc 1 6078 16 is_stmt 0 view .LVU4111 + 11625 00b4 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11626 00b8 DBB2 uxtb r3, r3 +6078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11627 .loc 1 6078 11 view .LVU4112 + 11628 00ba 222B cmp r3, #34 + 11629 00bc DED1 bne .L734 +6080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11630 .loc 1 6080 5 is_stmt 1 view .LVU4113 +6080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11631 .loc 1 6080 17 is_stmt 0 view .LVU4114 + 11632 00be 2023 movs r3, #32 + 11633 00c0 84F84130 strb r3, [r4, #65] +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11634 .loc 1 6081 5 is_stmt 1 view .LVU4115 +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11635 .loc 1 6081 25 is_stmt 0 view .LVU4116 + 11636 00c4 0023 movs r3, #0 + 11637 00c6 2363 str r3, [r4, #48] +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11638 .loc 1 6083 5 is_stmt 1 view .LVU4117 +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11639 .loc 1 6083 13 is_stmt 0 view .LVU4118 + 11640 00c8 94F84230 ldrb r3, [r4, #66] @ zero_extendqisi2 + 11641 00cc DBB2 uxtb r3, r3 +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11642 .loc 1 6083 8 view .LVU4119 + ARM GAS /tmp/ccNVyn8W.s page 401 + + + 11643 00ce 402B cmp r3, #64 + 11644 00d0 24D0 beq .L750 +6099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11645 .loc 1 6099 7 is_stmt 1 view .LVU4120 +6099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11646 .loc 1 6099 18 is_stmt 0 view .LVU4121 + 11647 00d2 0023 movs r3, #0 + 11648 00d4 84F84230 strb r3, [r4, #66] +6102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11649 .loc 1 6102 7 is_stmt 1 view .LVU4122 +6102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11650 .loc 1 6102 7 view .LVU4123 + 11651 00d8 84F84030 strb r3, [r4, #64] +6102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11652 .loc 1 6102 7 view .LVU4124 +6108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11653 .loc 1 6108 7 view .LVU4125 + 11654 00dc 2046 mov r0, r4 + 11655 00de FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 11656 .LVL805: +6115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11657 .loc 1 6115 3 view .LVU4126 +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11658 .loc 1 6116 1 is_stmt 0 view .LVU4127 + 11659 00e2 CBE7 b .L734 + 11660 .LVL806: + 11661 .L749: +6045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11662 .loc 1 6045 5 is_stmt 1 view .LVU4128 +6045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11663 .loc 1 6045 17 is_stmt 0 view .LVU4129 + 11664 00e4 2023 movs r3, #32 + 11665 00e6 84F84130 strb r3, [r4, #65] +6046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11666 .loc 1 6046 5 is_stmt 1 view .LVU4130 +6046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11667 .loc 1 6046 25 is_stmt 0 view .LVU4131 + 11668 00ea 0023 movs r3, #0 + 11669 00ec 2363 str r3, [r4, #48] +6048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11670 .loc 1 6048 5 is_stmt 1 view .LVU4132 +6048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11671 .loc 1 6048 13 is_stmt 0 view .LVU4133 + 11672 00ee 94F84230 ldrb r3, [r4, #66] @ zero_extendqisi2 + 11673 00f2 DBB2 uxtb r3, r3 +6048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11674 .loc 1 6048 8 view .LVU4134 + 11675 00f4 402B cmp r3, #64 + 11676 00f6 08D0 beq .L751 +6064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11677 .loc 1 6064 7 is_stmt 1 view .LVU4135 +6064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11678 .loc 1 6064 18 is_stmt 0 view .LVU4136 + 11679 00f8 0023 movs r3, #0 + 11680 00fa 84F84230 strb r3, [r4, #66] +6067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11681 .loc 1 6067 7 is_stmt 1 view .LVU4137 + ARM GAS /tmp/ccNVyn8W.s page 402 + + +6067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11682 .loc 1 6067 7 view .LVU4138 + 11683 00fe 84F84030 strb r3, [r4, #64] +6067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11684 .loc 1 6067 7 view .LVU4139 +6073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11685 .loc 1 6073 7 view .LVU4140 + 11686 0102 2046 mov r0, r4 + 11687 0104 FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 11688 .LVL807: +6073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11689 .loc 1 6073 7 is_stmt 0 view .LVU4141 + 11690 0108 B8E7 b .L734 + 11691 .LVL808: + 11692 .L751: +6050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11693 .loc 1 6050 7 is_stmt 1 view .LVU4142 +6050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11694 .loc 1 6050 18 is_stmt 0 view .LVU4143 + 11695 010a 0023 movs r3, #0 + 11696 010c 84F84230 strb r3, [r4, #66] +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11697 .loc 1 6053 7 is_stmt 1 view .LVU4144 +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11698 .loc 1 6053 7 view .LVU4145 + 11699 0110 84F84030 strb r3, [r4, #64] +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11700 .loc 1 6053 7 view .LVU4146 +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11701 .loc 1 6059 7 view .LVU4147 + 11702 0114 2046 mov r0, r4 + 11703 0116 FFF7FEFF bl HAL_I2C_MemTxCpltCallback + 11704 .LVL809: +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11705 .loc 1 6059 7 is_stmt 0 view .LVU4148 + 11706 011a AFE7 b .L734 + 11707 .LVL810: + 11708 .L750: +6085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11709 .loc 1 6085 7 is_stmt 1 view .LVU4149 +6085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11710 .loc 1 6085 18 is_stmt 0 view .LVU4150 + 11711 011c 0023 movs r3, #0 + 11712 011e 84F84230 strb r3, [r4, #66] +6088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11713 .loc 1 6088 7 is_stmt 1 view .LVU4151 +6088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11714 .loc 1 6088 7 view .LVU4152 + 11715 0122 84F84030 strb r3, [r4, #64] +6088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11716 .loc 1 6088 7 view .LVU4153 +6094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11717 .loc 1 6094 7 view .LVU4154 + 11718 0126 2046 mov r0, r4 + 11719 0128 FFF7FEFF bl HAL_I2C_MemRxCpltCallback + 11720 .LVL811: +6094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccNVyn8W.s page 403 + + + 11721 .loc 1 6094 7 is_stmt 0 view .LVU4155 + 11722 012c A6E7 b .L734 + 11723 .cfi_endproc + 11724 .LFE190: + 11726 .section .text.I2C_Master_ISR_IT,"ax",%progbits + 11727 .align 1 + 11728 .syntax unified + 11729 .thumb + 11730 .thumb_func + 11732 I2C_Master_ISR_IT: + 11733 .LVL812: + 11734 .LFB179: +4809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 11735 .loc 1 4809 1 is_stmt 1 view -0 + 11736 .cfi_startproc + 11737 @ args = 0, pretend = 0, frame = 0 + 11738 @ frame_needed = 0, uses_anonymous_args = 0 +4810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11739 .loc 1 4810 3 view .LVU4157 +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11740 .loc 1 4811 3 view .LVU4158 +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11741 .loc 1 4814 3 view .LVU4159 +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11742 .loc 1 4814 3 view .LVU4160 + 11743 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 11744 0004 012B cmp r3, #1 + 11745 0006 00F0B980 beq .L766 +4809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 11746 .loc 1 4809 1 is_stmt 0 view .LVU4161 + 11747 000a 70B5 push {r4, r5, r6, lr} + 11748 .cfi_def_cfa_offset 16 + 11749 .cfi_offset 4, -16 + 11750 .cfi_offset 5, -12 + 11751 .cfi_offset 6, -8 + 11752 .cfi_offset 14, -4 + 11753 000c 82B0 sub sp, sp, #8 + 11754 .cfi_def_cfa_offset 24 + 11755 000e 0446 mov r4, r0 + 11756 0010 0D46 mov r5, r1 + 11757 0012 1646 mov r6, r2 +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11758 .loc 1 4814 3 is_stmt 1 discriminator 2 view .LVU4162 + 11759 0014 0123 movs r3, #1 + 11760 0016 80F84030 strb r3, [r0, #64] +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11761 .loc 1 4814 3 discriminator 2 view .LVU4163 +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11762 .loc 1 4816 3 view .LVU4164 +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11763 .loc 1 4816 6 is_stmt 0 view .LVU4165 + 11764 001a 11F0100F tst r1, #16 + 11765 001e 02D0 beq .L754 +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11766 .loc 1 4816 58 discriminator 1 view .LVU4166 + 11767 0020 12F0100F tst r2, #16 + 11768 0024 22D1 bne .L771 + ARM GAS /tmp/ccNVyn8W.s page 404 + + + 11769 .L754: +4830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11770 .loc 1 4830 8 is_stmt 1 view .LVU4167 +4830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11771 .loc 1 4830 11 is_stmt 0 view .LVU4168 + 11772 0026 15F0040F tst r5, #4 + 11773 002a 29D0 beq .L756 +4830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11774 .loc 1 4830 65 discriminator 1 view .LVU4169 + 11775 002c 16F0040F tst r6, #4 + 11776 0030 26D0 beq .L756 +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11777 .loc 1 4834 5 is_stmt 1 view .LVU4170 +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11778 .loc 1 4834 16 is_stmt 0 view .LVU4171 + 11779 0032 25F00405 bic r5, r5, #4 + 11780 .LVL813: +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11781 .loc 1 4837 5 is_stmt 1 view .LVU4172 +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11782 .loc 1 4837 36 is_stmt 0 view .LVU4173 + 11783 0036 2368 ldr r3, [r4] +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11784 .loc 1 4837 46 view .LVU4174 + 11785 0038 5A6A ldr r2, [r3, #36] + 11786 .LVL814: +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11787 .loc 1 4837 10 view .LVU4175 + 11788 003a 636A ldr r3, [r4, #36] +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11789 .loc 1 4837 21 view .LVU4176 + 11790 003c 1A70 strb r2, [r3] +4840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11791 .loc 1 4840 5 is_stmt 1 view .LVU4177 +4840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11792 .loc 1 4840 9 is_stmt 0 view .LVU4178 + 11793 003e 636A ldr r3, [r4, #36] +4840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11794 .loc 1 4840 19 view .LVU4179 + 11795 0040 0133 adds r3, r3, #1 + 11796 0042 6362 str r3, [r4, #36] +4842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11797 .loc 1 4842 5 is_stmt 1 view .LVU4180 +4842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11798 .loc 1 4842 9 is_stmt 0 view .LVU4181 + 11799 0044 238D ldrh r3, [r4, #40] +4842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11800 .loc 1 4842 19 view .LVU4182 + 11801 0046 013B subs r3, r3, #1 + 11802 0048 2385 strh r3, [r4, #40] @ movhi +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11803 .loc 1 4843 5 is_stmt 1 view .LVU4183 +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11804 .loc 1 4843 9 is_stmt 0 view .LVU4184 + 11805 004a 638D ldrh r3, [r4, #42] + 11806 004c 9BB2 uxth r3, r3 +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 405 + + + 11807 .loc 1 4843 20 view .LVU4185 + 11808 004e 013B subs r3, r3, #1 + 11809 0050 9BB2 uxth r3, r3 + 11810 0052 6385 strh r3, [r4, #42] @ movhi + 11811 .LVL815: + 11812 .L755: +4930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11813 .loc 1 4930 3 is_stmt 1 view .LVU4186 +4932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11814 .loc 1 4932 3 view .LVU4187 +4932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11815 .loc 1 4932 6 is_stmt 0 view .LVU4188 + 11816 0054 15F0200F tst r5, #32 + 11817 0058 03D0 beq .L765 +4932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11818 .loc 1 4932 61 discriminator 1 view .LVU4189 + 11819 005a 16F0200F tst r6, #32 + 11820 005e 40F08880 bne .L772 + 11821 .L765: +4940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11822 .loc 1 4940 3 is_stmt 1 view .LVU4190 +4940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11823 .loc 1 4940 3 view .LVU4191 + 11824 0062 0020 movs r0, #0 + 11825 0064 84F84000 strb r0, [r4, #64] +4940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11826 .loc 1 4940 3 view .LVU4192 +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11827 .loc 1 4942 3 view .LVU4193 +4943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11828 .loc 1 4943 1 is_stmt 0 view .LVU4194 + 11829 0068 02B0 add sp, sp, #8 + 11830 .cfi_remember_state + 11831 .cfi_def_cfa_offset 16 + 11832 @ sp needed + 11833 006a 70BD pop {r4, r5, r6, pc} + 11834 .LVL816: + 11835 .L771: + 11836 .cfi_restore_state +4820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11837 .loc 1 4820 5 is_stmt 1 view .LVU4195 + 11838 006c 0368 ldr r3, [r0] + 11839 006e 1022 movs r2, #16 + 11840 .LVL817: +4820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11841 .loc 1 4820 5 is_stmt 0 view .LVU4196 + 11842 0070 DA61 str r2, [r3, #28] +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11843 .loc 1 4825 5 is_stmt 1 view .LVU4197 +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11844 .loc 1 4825 9 is_stmt 0 view .LVU4198 + 11845 0072 436C ldr r3, [r0, #68] +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11846 .loc 1 4825 21 view .LVU4199 + 11847 0074 43F00403 orr r3, r3, #4 + 11848 0078 4364 str r3, [r0, #68] +4828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 406 + + + 11849 .loc 1 4828 5 is_stmt 1 view .LVU4200 + 11850 007a FFF7FEFF bl I2C_Flush_TXDR + 11851 .LVL818: +4828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11852 .loc 1 4828 5 is_stmt 0 view .LVU4201 + 11853 007e E9E7 b .L755 + 11854 .LVL819: + 11855 .L756: +4845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11856 .loc 1 4845 8 is_stmt 1 view .LVU4202 +4845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11857 .loc 1 4845 11 is_stmt 0 view .LVU4203 + 11858 0080 15F0020F tst r5, #2 + 11859 0084 12D0 beq .L757 +4845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11860 .loc 1 4845 65 discriminator 1 view .LVU4204 + 11861 0086 16F0020F tst r6, #2 + 11862 008a 0FD0 beq .L757 +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11863 .loc 1 4849 5 is_stmt 1 view .LVU4205 +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11864 .loc 1 4849 33 is_stmt 0 view .LVU4206 + 11865 008c 626A ldr r2, [r4, #36] + 11866 .LVL820: +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11867 .loc 1 4849 9 view .LVU4207 + 11868 008e 2368 ldr r3, [r4] +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11869 .loc 1 4849 28 view .LVU4208 + 11870 0090 1278 ldrb r2, [r2] @ zero_extendqisi2 +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11871 .loc 1 4849 26 view .LVU4209 + 11872 0092 9A62 str r2, [r3, #40] +4852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11873 .loc 1 4852 5 is_stmt 1 view .LVU4210 +4852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11874 .loc 1 4852 9 is_stmt 0 view .LVU4211 + 11875 0094 636A ldr r3, [r4, #36] +4852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11876 .loc 1 4852 19 view .LVU4212 + 11877 0096 0133 adds r3, r3, #1 + 11878 0098 6362 str r3, [r4, #36] +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11879 .loc 1 4854 5 is_stmt 1 view .LVU4213 +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11880 .loc 1 4854 9 is_stmt 0 view .LVU4214 + 11881 009a 238D ldrh r3, [r4, #40] +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11882 .loc 1 4854 19 view .LVU4215 + 11883 009c 013B subs r3, r3, #1 + 11884 009e 2385 strh r3, [r4, #40] @ movhi +4855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11885 .loc 1 4855 5 is_stmt 1 view .LVU4216 +4855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11886 .loc 1 4855 9 is_stmt 0 view .LVU4217 + 11887 00a0 638D ldrh r3, [r4, #42] + 11888 00a2 9BB2 uxth r3, r3 + ARM GAS /tmp/ccNVyn8W.s page 407 + + +4855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11889 .loc 1 4855 20 view .LVU4218 + 11890 00a4 013B subs r3, r3, #1 + 11891 00a6 9BB2 uxth r3, r3 + 11892 00a8 6385 strh r3, [r4, #42] @ movhi + 11893 00aa D3E7 b .L755 + 11894 .LVL821: + 11895 .L757: +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 11896 .loc 1 4857 8 is_stmt 1 view .LVU4219 +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 11897 .loc 1 4857 11 is_stmt 0 view .LVU4220 + 11898 00ac 15F0800F tst r5, #128 + 11899 00b0 3FD0 beq .L758 +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 11900 .loc 1 4857 64 discriminator 1 view .LVU4221 + 11901 00b2 16F0400F tst r6, #64 + 11902 00b6 3CD0 beq .L758 +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11903 .loc 1 4860 5 is_stmt 1 view .LVU4222 +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11904 .loc 1 4860 14 is_stmt 0 view .LVU4223 + 11905 00b8 638D ldrh r3, [r4, #42] + 11906 00ba 9BB2 uxth r3, r3 +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11907 .loc 1 4860 8 view .LVU4224 + 11908 00bc 5BB3 cbz r3, .L759 +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11909 .loc 1 4860 41 discriminator 1 view .LVU4225 + 11910 00be 238D ldrh r3, [r4, #40] +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11911 .loc 1 4860 33 discriminator 1 view .LVU4226 + 11912 00c0 4BBB cbnz r3, .L759 +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11913 .loc 1 4862 7 is_stmt 1 view .LVU4227 +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11914 .loc 1 4862 35 is_stmt 0 view .LVU4228 + 11915 00c2 2368 ldr r3, [r4] +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11916 .loc 1 4862 45 view .LVU4229 + 11917 00c4 5968 ldr r1, [r3, #4] + 11918 .LVL822: +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11919 .loc 1 4862 18 view .LVU4230 + 11920 00c6 C1F30901 ubfx r1, r1, #0, #10 + 11921 .LVL823: +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11922 .loc 1 4864 7 is_stmt 1 view .LVU4231 +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11923 .loc 1 4864 15 is_stmt 0 view .LVU4232 + 11924 00ca 638D ldrh r3, [r4, #42] + 11925 00cc 9BB2 uxth r3, r3 +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11926 .loc 1 4864 10 view .LVU4233 + 11927 00ce FF2B cmp r3, #255 + 11928 00d0 0ED8 bhi .L773 +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + ARM GAS /tmp/ccNVyn8W.s page 408 + + + 11929 .loc 1 4871 9 is_stmt 1 view .LVU4234 +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 11930 .loc 1 4871 30 is_stmt 0 view .LVU4235 + 11931 00d2 628D ldrh r2, [r4, #42] + 11932 .LVL824: +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 11933 .loc 1 4871 30 view .LVU4236 + 11934 00d4 92B2 uxth r2, r2 +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 11935 .loc 1 4871 24 view .LVU4237 + 11936 00d6 2285 strh r2, [r4, #40] @ movhi +4872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11937 .loc 1 4872 9 is_stmt 1 view .LVU4238 +4872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11938 .loc 1 4872 17 is_stmt 0 view .LVU4239 + 11939 00d8 E36A ldr r3, [r4, #44] +4872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11940 .loc 1 4872 12 view .LVU4240 + 11941 00da 13F5803F cmn r3, #65536 + 11942 00de 11D0 beq .L761 +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 11943 .loc 1 4874 11 is_stmt 1 view .LVU4241 +4875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11944 .loc 1 4875 34 is_stmt 0 view .LVU4242 + 11945 00e0 E36A ldr r3, [r4, #44] +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 11946 .loc 1 4874 11 view .LVU4243 + 11947 00e2 0020 movs r0, #0 + 11948 .LVL825: +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 11949 .loc 1 4874 11 view .LVU4244 + 11950 00e4 0090 str r0, [sp] + 11951 00e6 D2B2 uxtb r2, r2 + 11952 00e8 2046 mov r0, r4 + 11953 00ea FFF7FEFF bl I2C_TransferConfig + 11954 .LVL826: +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 11955 .loc 1 4874 11 view .LVU4245 + 11956 00ee B1E7 b .L755 + 11957 .LVL827: + 11958 .L773: +4866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START + 11959 .loc 1 4866 9 is_stmt 1 view .LVU4246 +4866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START + 11960 .loc 1 4866 24 is_stmt 0 view .LVU4247 + 11961 00f0 FF22 movs r2, #255 + 11962 .LVL828: +4866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START + 11963 .loc 1 4866 24 view .LVU4248 + 11964 00f2 2285 strh r2, [r4, #40] @ movhi +4867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11965 .loc 1 4867 9 is_stmt 1 view .LVU4249 + 11966 00f4 0023 movs r3, #0 + 11967 00f6 0093 str r3, [sp] + 11968 00f8 4FF08073 mov r3, #16777216 + 11969 00fc 2046 mov r0, r4 + 11970 .LVL829: + ARM GAS /tmp/ccNVyn8W.s page 409 + + +4867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11971 .loc 1 4867 9 is_stmt 0 view .LVU4250 + 11972 00fe FFF7FEFF bl I2C_TransferConfig + 11973 .LVL830: +4867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11974 .loc 1 4867 9 view .LVU4251 + 11975 0102 A7E7 b .L755 + 11976 .LVL831: + 11977 .L761: +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 11978 .loc 1 4879 11 is_stmt 1 view .LVU4252 + 11979 0104 0023 movs r3, #0 + 11980 0106 0093 str r3, [sp] + 11981 0108 4FF00073 mov r3, #33554432 + 11982 010c D2B2 uxtb r2, r2 + 11983 010e 2046 mov r0, r4 + 11984 .LVL832: +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 11985 .loc 1 4879 11 is_stmt 0 view .LVU4253 + 11986 0110 FFF7FEFF bl I2C_TransferConfig + 11987 .LVL833: +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 11988 .loc 1 4879 11 view .LVU4254 + 11989 0114 9EE7 b .L755 + 11990 .LVL834: + 11991 .L759: +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11992 .loc 1 4887 7 is_stmt 1 view .LVU4255 +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11993 .loc 1 4887 11 is_stmt 0 view .LVU4256 + 11994 0116 2368 ldr r3, [r4] + 11995 0118 5B68 ldr r3, [r3, #4] +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11996 .loc 1 4887 10 view .LVU4257 + 11997 011a 13F0007F tst r3, #33554432 + 11998 011e 03D1 bne .L762 +4890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11999 .loc 1 4890 9 is_stmt 1 view .LVU4258 + 12000 0120 2046 mov r0, r4 + 12001 .LVL835: +4890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12002 .loc 1 4890 9 is_stmt 0 view .LVU4259 + 12003 0122 FFF7FEFF bl I2C_ITMasterSeqCplt + 12004 .LVL836: +4890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12005 .loc 1 4890 9 view .LVU4260 + 12006 0126 95E7 b .L755 + 12007 .LVL837: + 12008 .L762: +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12009 .loc 1 4896 9 is_stmt 1 view .LVU4261 + 12010 0128 4021 movs r1, #64 + 12011 .LVL838: +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12012 .loc 1 4896 9 is_stmt 0 view .LVU4262 + 12013 012a 2046 mov r0, r4 + 12014 .LVL839: + ARM GAS /tmp/ccNVyn8W.s page 410 + + +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12015 .loc 1 4896 9 view .LVU4263 + 12016 012c FFF7FEFF bl I2C_ITError + 12017 .LVL840: +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12018 .loc 1 4896 9 view .LVU4264 + 12019 0130 90E7 b .L755 + 12020 .LVL841: + 12021 .L758: +4900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12022 .loc 1 4900 8 is_stmt 1 view .LVU4265 +4900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12023 .loc 1 4900 11 is_stmt 0 view .LVU4266 + 12024 0132 15F0400F tst r5, #64 + 12025 0136 8DD0 beq .L755 +4900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12026 .loc 1 4900 63 discriminator 1 view .LVU4267 + 12027 0138 16F0400F tst r6, #64 + 12028 013c 8AD0 beq .L755 +4903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12029 .loc 1 4903 5 is_stmt 1 view .LVU4268 +4903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12030 .loc 1 4903 13 is_stmt 0 view .LVU4269 + 12031 013e 638D ldrh r3, [r4, #42] + 12032 0140 9BB2 uxth r3, r3 +4903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12033 .loc 1 4903 8 view .LVU4270 + 12034 0142 8BB9 cbnz r3, .L763 +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12035 .loc 1 4905 7 is_stmt 1 view .LVU4271 +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12036 .loc 1 4905 11 is_stmt 0 view .LVU4272 + 12037 0144 2368 ldr r3, [r4] + 12038 0146 5A68 ldr r2, [r3, #4] + 12039 .LVL842: +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12040 .loc 1 4905 10 view .LVU4273 + 12041 0148 12F0007F tst r2, #33554432 + 12042 014c 82D1 bne .L755 +4908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12043 .loc 1 4908 9 is_stmt 1 view .LVU4274 +4908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12044 .loc 1 4908 17 is_stmt 0 view .LVU4275 + 12045 014e E26A ldr r2, [r4, #44] +4908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12046 .loc 1 4908 12 view .LVU4276 + 12047 0150 12F5803F cmn r2, #65536 + 12048 0154 04D1 bne .L764 +4911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12049 .loc 1 4911 11 is_stmt 1 view .LVU4277 +4911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12050 .loc 1 4911 25 is_stmt 0 view .LVU4278 + 12051 0156 5A68 ldr r2, [r3, #4] +4911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12052 .loc 1 4911 31 view .LVU4279 + 12053 0158 42F48042 orr r2, r2, #16384 + 12054 015c 5A60 str r2, [r3, #4] + ARM GAS /tmp/ccNVyn8W.s page 411 + + + 12055 015e 79E7 b .L755 + 12056 .L764: +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12057 .loc 1 4916 11 is_stmt 1 view .LVU4280 + 12058 0160 2046 mov r0, r4 + 12059 .LVL843: +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12060 .loc 1 4916 11 is_stmt 0 view .LVU4281 + 12061 0162 FFF7FEFF bl I2C_ITMasterSeqCplt + 12062 .LVL844: +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12063 .loc 1 4916 11 view .LVU4282 + 12064 0166 75E7 b .L755 + 12065 .LVL845: + 12066 .L763: +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12067 .loc 1 4924 7 is_stmt 1 view .LVU4283 + 12068 0168 4021 movs r1, #64 + 12069 .LVL846: +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12070 .loc 1 4924 7 is_stmt 0 view .LVU4284 + 12071 016a 2046 mov r0, r4 + 12072 .LVL847: +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12073 .loc 1 4924 7 view .LVU4285 + 12074 016c FFF7FEFF bl I2C_ITError + 12075 .LVL848: +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12076 .loc 1 4924 7 view .LVU4286 + 12077 0170 70E7 b .L755 + 12078 .LVL849: + 12079 .L772: +4936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12080 .loc 1 4936 5 is_stmt 1 view .LVU4287 + 12081 0172 2946 mov r1, r5 + 12082 0174 2046 mov r0, r4 + 12083 0176 FFF7FEFF bl I2C_ITMasterCplt + 12084 .LVL850: + 12085 017a 72E7 b .L765 + 12086 .LVL851: + 12087 .L766: + 12088 .cfi_def_cfa_offset 0 + 12089 .cfi_restore 4 + 12090 .cfi_restore 5 + 12091 .cfi_restore 6 + 12092 .cfi_restore 14 +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12093 .loc 1 4814 3 is_stmt 0 discriminator 1 view .LVU4288 + 12094 017c 0220 movs r0, #2 + 12095 .LVL852: +4943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12096 .loc 1 4943 1 view .LVU4289 + 12097 017e 7047 bx lr + 12098 .cfi_endproc + 12099 .LFE179: + 12101 .section .text.I2C_Mem_ISR_DMA,"ax",%progbits + 12102 .align 1 + ARM GAS /tmp/ccNVyn8W.s page 412 + + + 12103 .syntax unified + 12104 .thumb + 12105 .thumb_func + 12107 I2C_Mem_ISR_DMA: + 12108 .LVL853: + 12109 .LFB183: +5373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 12110 .loc 1 5373 1 is_stmt 1 view -0 + 12111 .cfi_startproc + 12112 @ args = 0, pretend = 0, frame = 0 + 12113 @ frame_needed = 0, uses_anonymous_args = 0 +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12114 .loc 1 5374 3 view .LVU4291 +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12115 .loc 1 5377 3 view .LVU4292 +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12116 .loc 1 5377 3 view .LVU4293 + 12117 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 12118 0004 012B cmp r3, #1 + 12119 0006 00F0BE80 beq .L789 +5373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 12120 .loc 1 5373 1 is_stmt 0 view .LVU4294 + 12121 000a 10B5 push {r4, lr} + 12122 .cfi_def_cfa_offset 8 + 12123 .cfi_offset 4, -8 + 12124 .cfi_offset 14, -4 + 12125 000c 82B0 sub sp, sp, #8 + 12126 .cfi_def_cfa_offset 16 + 12127 000e 0446 mov r4, r0 +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12128 .loc 1 5377 3 is_stmt 1 discriminator 2 view .LVU4295 + 12129 0010 0123 movs r3, #1 + 12130 0012 80F84030 strb r3, [r0, #64] +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12131 .loc 1 5377 3 discriminator 2 view .LVU4296 +5379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12132 .loc 1 5379 3 view .LVU4297 +5379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12133 .loc 1 5379 6 is_stmt 0 view .LVU4298 + 12134 0016 11F0100F tst r1, #16 + 12135 001a 02D0 beq .L776 +5379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12136 .loc 1 5379 55 discriminator 1 view .LVU4299 + 12137 001c 12F0100F tst r2, #16 + 12138 0020 10D1 bne .L795 + 12139 .L776: +5396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12140 .loc 1 5396 8 is_stmt 1 view .LVU4300 +5396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12141 .loc 1 5396 11 is_stmt 0 view .LVU4301 + 12142 0022 11F0020F tst r1, #2 + 12143 0026 1BD0 beq .L778 +5396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12144 .loc 1 5396 62 discriminator 1 view .LVU4302 + 12145 0028 12F0020F tst r2, #2 + 12146 002c 18D0 beq .L778 +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 413 + + + 12147 .loc 1 5400 5 is_stmt 1 view .LVU4303 +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12148 .loc 1 5400 9 is_stmt 0 view .LVU4304 + 12149 002e 2368 ldr r3, [r4] +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12150 .loc 1 5400 32 view .LVU4305 + 12151 0030 226D ldr r2, [r4, #80] + 12152 .LVL854: +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12153 .loc 1 5400 26 view .LVU4306 + 12154 0032 9A62 str r2, [r3, #40] +5403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12155 .loc 1 5403 5 is_stmt 1 view .LVU4307 +5403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12156 .loc 1 5403 22 is_stmt 0 view .LVU4308 + 12157 0034 4FF0FF33 mov r3, #-1 + 12158 0038 2365 str r3, [r4, #80] + 12159 .LVL855: + 12160 .L777: +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12161 .loc 1 5494 3 is_stmt 1 view .LVU4309 +5497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12162 .loc 1 5497 3 view .LVU4310 +5497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12163 .loc 1 5497 3 view .LVU4311 + 12164 003a 0020 movs r0, #0 + 12165 003c 84F84000 strb r0, [r4, #64] +5497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12166 .loc 1 5497 3 view .LVU4312 +5499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12167 .loc 1 5499 3 view .LVU4313 +5500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12168 .loc 1 5500 1 is_stmt 0 view .LVU4314 + 12169 0040 02B0 add sp, sp, #8 + 12170 .cfi_remember_state + 12171 .cfi_def_cfa_offset 8 + 12172 @ sp needed + 12173 0042 10BD pop {r4, pc} + 12174 .LVL856: + 12175 .L795: + 12176 .cfi_restore_state +5383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12177 .loc 1 5383 5 is_stmt 1 view .LVU4315 + 12178 0044 0368 ldr r3, [r0] + 12179 0046 1022 movs r2, #16 + 12180 .LVL857: +5383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12181 .loc 1 5383 5 is_stmt 0 view .LVU4316 + 12182 0048 DA61 str r2, [r3, #28] +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12183 .loc 1 5386 5 is_stmt 1 view .LVU4317 +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12184 .loc 1 5386 9 is_stmt 0 view .LVU4318 + 12185 004a 436C ldr r3, [r0, #68] +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12186 .loc 1 5386 21 view .LVU4319 + 12187 004c 43F00403 orr r3, r3, #4 + ARM GAS /tmp/ccNVyn8W.s page 414 + + + 12188 0050 4364 str r3, [r0, #68] +5391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12189 .loc 1 5391 5 is_stmt 1 view .LVU4320 + 12190 0052 2021 movs r1, #32 + 12191 .LVL858: +5391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12192 .loc 1 5391 5 is_stmt 0 view .LVU4321 + 12193 0054 FFF7FEFF bl I2C_Enable_IRQ + 12194 .LVL859: +5394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12195 .loc 1 5394 5 is_stmt 1 view .LVU4322 + 12196 0058 2046 mov r0, r4 + 12197 005a FFF7FEFF bl I2C_Flush_TXDR + 12198 .LVL860: + 12199 005e ECE7 b .L777 + 12200 .LVL861: + 12201 .L778: +5405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12202 .loc 1 5405 8 view .LVU4323 +5405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12203 .loc 1 5405 11 is_stmt 0 view .LVU4324 + 12204 0060 11F0800F tst r1, #128 + 12205 0064 02D0 beq .L779 +5405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12206 .loc 1 5405 61 discriminator 1 view .LVU4325 + 12207 0066 12F0400F tst r2, #64 + 12208 006a 2AD1 bne .L796 + 12209 .L779: +5447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12210 .loc 1 5447 8 is_stmt 1 view .LVU4326 +5447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12211 .loc 1 5447 11 is_stmt 0 view .LVU4327 + 12212 006c 11F0400F tst r1, #64 + 12213 0070 7DD0 beq .L784 +5447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12214 .loc 1 5447 60 discriminator 1 view .LVU4328 + 12215 0072 12F0400F tst r2, #64 + 12216 0076 7AD0 beq .L784 +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12217 .loc 1 5450 5 is_stmt 1 view .LVU4329 +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12218 .loc 1 5450 13 is_stmt 0 view .LVU4330 + 12219 0078 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12220 007c DBB2 uxtb r3, r3 +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12221 .loc 1 5450 8 view .LVU4331 + 12222 007e 222B cmp r3, #34 + 12223 0080 60D0 beq .L790 +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12224 .loc 1 5374 12 view .LVU4332 + 12225 0082 4248 ldr r0, .L799 + 12226 .LVL862: + 12227 .L785: +5455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12228 .loc 1 5455 5 is_stmt 1 view .LVU4333 +5455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12229 .loc 1 5455 13 is_stmt 0 view .LVU4334 + ARM GAS /tmp/ccNVyn8W.s page 415 + + + 12230 0084 638D ldrh r3, [r4, #42] + 12231 0086 9BB2 uxth r3, r3 +5455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12232 .loc 1 5455 8 view .LVU4335 + 12233 0088 FF2B cmp r3, #255 + 12234 008a 5DD9 bls .L786 +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12235 .loc 1 5457 7 is_stmt 1 view .LVU4336 +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12236 .loc 1 5457 22 is_stmt 0 view .LVU4337 + 12237 008c FF22 movs r2, #255 + 12238 .LVL863: +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12239 .loc 1 5457 22 view .LVU4338 + 12240 008e 2285 strh r2, [r4, #40] @ movhi +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12241 .loc 1 5460 7 is_stmt 1 view .LVU4339 +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12242 .loc 1 5460 46 is_stmt 0 view .LVU4340 + 12243 0090 E16C ldr r1, [r4, #76] + 12244 .LVL864: +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12245 .loc 1 5460 7 view .LVU4341 + 12246 0092 0090 str r0, [sp] + 12247 0094 4FF08073 mov r3, #16777216 + 12248 0098 89B2 uxth r1, r1 + 12249 009a 2046 mov r0, r4 + 12250 .LVL865: +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12251 .loc 1 5460 7 view .LVU4342 + 12252 009c FFF7FEFF bl I2C_TransferConfig + 12253 .LVL866: + 12254 .L787: +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12255 .loc 1 5473 5 is_stmt 1 view .LVU4343 +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12256 .loc 1 5473 9 is_stmt 0 view .LVU4344 + 12257 00a0 638D ldrh r3, [r4, #42] + 12258 00a2 9BB2 uxth r3, r3 +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12259 .loc 1 5473 28 view .LVU4345 + 12260 00a4 228D ldrh r2, [r4, #40] +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12261 .loc 1 5473 21 view .LVU4346 + 12262 00a6 9B1A subs r3, r3, r2 + 12263 00a8 9BB2 uxth r3, r3 + 12264 00aa 6385 strh r3, [r4, #42] @ movhi +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12265 .loc 1 5476 5 is_stmt 1 view .LVU4347 +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12266 .loc 1 5476 13 is_stmt 0 view .LVU4348 + 12267 00ac 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12268 00b0 DBB2 uxtb r3, r3 +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12269 .loc 1 5476 8 view .LVU4349 + 12270 00b2 222B cmp r3, #34 + 12271 00b4 55D0 beq .L797 + ARM GAS /tmp/ccNVyn8W.s page 416 + + +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12272 .loc 1 5482 7 is_stmt 1 view .LVU4350 +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12273 .loc 1 5482 11 is_stmt 0 view .LVU4351 + 12274 00b6 2268 ldr r2, [r4] +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12275 .loc 1 5482 21 view .LVU4352 + 12276 00b8 1368 ldr r3, [r2] +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12277 .loc 1 5482 27 view .LVU4353 + 12278 00ba 43F48043 orr r3, r3, #16384 + 12279 00be 1360 str r3, [r2] + 12280 00c0 BBE7 b .L777 + 12281 .LVL867: + 12282 .L796: +5409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12283 .loc 1 5409 5 is_stmt 1 view .LVU4354 + 12284 00c2 1021 movs r1, #16 + 12285 .LVL868: +5409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12286 .loc 1 5409 5 is_stmt 0 view .LVU4355 + 12287 00c4 2046 mov r0, r4 + 12288 .LVL869: +5409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12289 .loc 1 5409 5 view .LVU4356 + 12290 00c6 FFF7FEFF bl I2C_Enable_IRQ + 12291 .LVL870: +5411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12292 .loc 1 5411 5 is_stmt 1 view .LVU4357 +5411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12293 .loc 1 5411 13 is_stmt 0 view .LVU4358 + 12294 00ca 638D ldrh r3, [r4, #42] + 12295 00cc 9BB2 uxth r3, r3 +5411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12296 .loc 1 5411 8 view .LVU4359 + 12297 00ce 002B cmp r3, #0 + 12298 00d0 33D0 beq .L780 +5414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12299 .loc 1 5414 7 is_stmt 1 view .LVU4360 +5414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12300 .loc 1 5414 15 is_stmt 0 view .LVU4361 + 12301 00d2 638D ldrh r3, [r4, #42] + 12302 00d4 9BB2 uxth r3, r3 +5414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12303 .loc 1 5414 10 view .LVU4362 + 12304 00d6 FF2B cmp r3, #255 + 12305 00d8 1BD9 bls .L781 +5416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12306 .loc 1 5416 9 is_stmt 1 view .LVU4363 +5416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12307 .loc 1 5416 24 is_stmt 0 view .LVU4364 + 12308 00da FF22 movs r2, #255 + 12309 00dc 2285 strh r2, [r4, #40] @ movhi +5417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 12310 .loc 1 5417 9 is_stmt 1 view .LVU4365 +5417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 12311 .loc 1 5417 48 is_stmt 0 view .LVU4366 + ARM GAS /tmp/ccNVyn8W.s page 417 + + + 12312 00de E16C ldr r1, [r4, #76] +5417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 12313 .loc 1 5417 9 view .LVU4367 + 12314 00e0 0023 movs r3, #0 + 12315 00e2 0093 str r3, [sp] + 12316 00e4 4FF08073 mov r3, #16777216 + 12317 00e8 89B2 uxth r1, r1 + 12318 00ea 2046 mov r0, r4 + 12319 00ec FFF7FEFF bl I2C_TransferConfig + 12320 .LVL871: + 12321 .L782: +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12322 .loc 1 5428 7 is_stmt 1 view .LVU4368 +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12323 .loc 1 5428 11 is_stmt 0 view .LVU4369 + 12324 00f0 638D ldrh r3, [r4, #42] + 12325 00f2 9BB2 uxth r3, r3 +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12326 .loc 1 5428 30 view .LVU4370 + 12327 00f4 228D ldrh r2, [r4, #40] +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12328 .loc 1 5428 23 view .LVU4371 + 12329 00f6 9B1A subs r3, r3, r2 + 12330 00f8 9BB2 uxth r3, r3 + 12331 00fa 6385 strh r3, [r4, #42] @ movhi +5431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12332 .loc 1 5431 7 is_stmt 1 view .LVU4372 +5431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12333 .loc 1 5431 15 is_stmt 0 view .LVU4373 + 12334 00fc 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12335 0100 DBB2 uxtb r3, r3 +5431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12336 .loc 1 5431 10 view .LVU4374 + 12337 0102 222B cmp r3, #34 + 12338 0104 13D0 beq .L798 +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12339 .loc 1 5437 9 is_stmt 1 view .LVU4375 +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12340 .loc 1 5437 13 is_stmt 0 view .LVU4376 + 12341 0106 2268 ldr r2, [r4] +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12342 .loc 1 5437 23 view .LVU4377 + 12343 0108 1368 ldr r3, [r2] +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12344 .loc 1 5437 29 view .LVU4378 + 12345 010a 43F48043 orr r3, r3, #16384 + 12346 010e 1360 str r3, [r2] + 12347 0110 93E7 b .L777 + 12348 .L781: +5422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12349 .loc 1 5422 9 is_stmt 1 view .LVU4379 +5422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12350 .loc 1 5422 30 is_stmt 0 view .LVU4380 + 12351 0112 628D ldrh r2, [r4, #42] + 12352 0114 92B2 uxth r2, r2 +5422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12353 .loc 1 5422 24 view .LVU4381 + ARM GAS /tmp/ccNVyn8W.s page 418 + + + 12354 0116 2285 strh r2, [r4, #40] @ movhi +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12355 .loc 1 5423 9 is_stmt 1 view .LVU4382 +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12356 .loc 1 5423 48 is_stmt 0 view .LVU4383 + 12357 0118 E16C ldr r1, [r4, #76] +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12358 .loc 1 5423 9 view .LVU4384 + 12359 011a 0023 movs r3, #0 + 12360 011c 0093 str r3, [sp] + 12361 011e 4FF00073 mov r3, #33554432 + 12362 0122 D2B2 uxtb r2, r2 + 12363 0124 89B2 uxth r1, r1 + 12364 0126 2046 mov r0, r4 + 12365 0128 FFF7FEFF bl I2C_TransferConfig + 12366 .LVL872: + 12367 012c E0E7 b .L782 + 12368 .L798: +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12369 .loc 1 5433 9 is_stmt 1 view .LVU4385 +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12370 .loc 1 5433 13 is_stmt 0 view .LVU4386 + 12371 012e 2268 ldr r2, [r4] +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12372 .loc 1 5433 23 view .LVU4387 + 12373 0130 1368 ldr r3, [r2] +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12374 .loc 1 5433 29 view .LVU4388 + 12375 0132 43F40043 orr r3, r3, #32768 + 12376 0136 1360 str r3, [r2] + 12377 0138 7FE7 b .L777 + 12378 .L780: +5444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12379 .loc 1 5444 7 is_stmt 1 view .LVU4389 + 12380 013a 4021 movs r1, #64 + 12381 013c 2046 mov r0, r4 + 12382 013e FFF7FEFF bl I2C_ITError + 12383 .LVL873: + 12384 0142 7AE7 b .L777 + 12385 .LVL874: + 12386 .L790: +5452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12387 .loc 1 5452 17 is_stmt 0 view .LVU4390 + 12388 0144 1248 ldr r0, .L799+4 + 12389 .LVL875: +5452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12390 .loc 1 5452 17 view .LVU4391 + 12391 0146 9DE7 b .L785 + 12392 .LVL876: + 12393 .L786: +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12394 .loc 1 5465 7 is_stmt 1 view .LVU4392 +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12395 .loc 1 5465 28 is_stmt 0 view .LVU4393 + 12396 0148 628D ldrh r2, [r4, #42] + 12397 .LVL877: +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 419 + + + 12398 .loc 1 5465 28 view .LVU4394 + 12399 014a 92B2 uxth r2, r2 +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12400 .loc 1 5465 22 view .LVU4395 + 12401 014c 2285 strh r2, [r4, #40] @ movhi +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12402 .loc 1 5468 7 is_stmt 1 view .LVU4396 +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12403 .loc 1 5468 46 is_stmt 0 view .LVU4397 + 12404 014e E16C ldr r1, [r4, #76] + 12405 .LVL878: +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12406 .loc 1 5468 7 view .LVU4398 + 12407 0150 0090 str r0, [sp] + 12408 0152 4FF00073 mov r3, #33554432 + 12409 0156 D2B2 uxtb r2, r2 + 12410 0158 89B2 uxth r1, r1 + 12411 015a 2046 mov r0, r4 + 12412 .LVL879: +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12413 .loc 1 5468 7 view .LVU4399 + 12414 015c FFF7FEFF bl I2C_TransferConfig + 12415 .LVL880: +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12416 .loc 1 5468 7 view .LVU4400 + 12417 0160 9EE7 b .L787 + 12418 .L797: +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12419 .loc 1 5478 7 is_stmt 1 view .LVU4401 +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12420 .loc 1 5478 11 is_stmt 0 view .LVU4402 + 12421 0162 2268 ldr r2, [r4] +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12422 .loc 1 5478 21 view .LVU4403 + 12423 0164 1368 ldr r3, [r2] +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12424 .loc 1 5478 27 view .LVU4404 + 12425 0166 43F40043 orr r3, r3, #32768 + 12426 016a 1360 str r3, [r2] + 12427 016c 65E7 b .L777 + 12428 .LVL881: + 12429 .L784: +5485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12430 .loc 1 5485 8 is_stmt 1 view .LVU4405 +5485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12431 .loc 1 5485 11 is_stmt 0 view .LVU4406 + 12432 016e 11F0200F tst r1, #32 + 12433 0172 3FF462AF beq .L777 +5485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12434 .loc 1 5485 63 discriminator 1 view .LVU4407 + 12435 0176 12F0200F tst r2, #32 + 12436 017a 3FF45EAF beq .L777 +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12437 .loc 1 5489 5 is_stmt 1 view .LVU4408 + 12438 017e 2046 mov r0, r4 + 12439 .LVL882: +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 420 + + + 12440 .loc 1 5489 5 is_stmt 0 view .LVU4409 + 12441 0180 FFF7FEFF bl I2C_ITMasterCplt + 12442 .LVL883: +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12443 .loc 1 5489 5 view .LVU4410 + 12444 0184 59E7 b .L777 + 12445 .LVL884: + 12446 .L789: + 12447 .cfi_def_cfa_offset 0 + 12448 .cfi_restore 4 + 12449 .cfi_restore 14 +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12450 .loc 1 5377 3 discriminator 1 view .LVU4411 + 12451 0186 0220 movs r0, #2 + 12452 .LVL885: +5500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12453 .loc 1 5500 1 view .LVU4412 + 12454 0188 7047 bx lr + 12455 .L800: + 12456 018a 00BF .align 2 + 12457 .L799: + 12458 018c 00200080 .word -2147475456 + 12459 0190 00240080 .word -2147474432 + 12460 .cfi_endproc + 12461 .LFE183: + 12463 .section .text.I2C_Slave_ISR_DMA,"ax",%progbits + 12464 .align 1 + 12465 .syntax unified + 12466 .thumb + 12467 .thumb_func + 12469 I2C_Slave_ISR_DMA: + 12470 .LVL886: + 12471 .LFB184: +5512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12472 .loc 1 5512 1 is_stmt 1 view -0 + 12473 .cfi_startproc + 12474 @ args = 0, pretend = 0, frame = 0 + 12475 @ frame_needed = 0, uses_anonymous_args = 0 +5512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12476 .loc 1 5512 1 is_stmt 0 view .LVU4414 + 12477 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 12478 .cfi_def_cfa_offset 24 + 12479 .cfi_offset 3, -24 + 12480 .cfi_offset 4, -20 + 12481 .cfi_offset 5, -16 + 12482 .cfi_offset 6, -12 + 12483 .cfi_offset 7, -8 + 12484 .cfi_offset 14, -4 +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 12485 .loc 1 5513 3 is_stmt 1 view .LVU4415 +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 12486 .loc 1 5513 12 is_stmt 0 view .LVU4416 + 12487 0002 C76A ldr r7, [r0, #44] + 12488 .LVL887: +5514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 12489 .loc 1 5514 3 is_stmt 1 view .LVU4417 +5515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 421 + + + 12490 .loc 1 5515 3 view .LVU4418 +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12491 .loc 1 5518 3 view .LVU4419 +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12492 .loc 1 5518 3 view .LVU4420 + 12493 0004 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 12494 0008 012B cmp r3, #1 + 12495 000a 00F08B80 beq .L819 + 12496 000e 0446 mov r4, r0 + 12497 0010 0D46 mov r5, r1 + 12498 0012 1646 mov r6, r2 +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12499 .loc 1 5518 3 discriminator 2 view .LVU4421 + 12500 0014 0123 movs r3, #1 + 12501 0016 80F84030 strb r3, [r0, #64] +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12502 .loc 1 5518 3 discriminator 2 view .LVU4422 +5521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12503 .loc 1 5521 3 view .LVU4423 +5521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12504 .loc 1 5521 6 is_stmt 0 view .LVU4424 + 12505 001a 11F0200F tst r1, #32 + 12506 001e 02D0 beq .L803 +5521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12507 .loc 1 5521 58 discriminator 1 view .LVU4425 + 12508 0020 12F0200F tst r2, #32 + 12509 0024 19D1 bne .L824 + 12510 .LVL888: + 12511 .L803: +5528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12512 .loc 1 5528 3 is_stmt 1 view .LVU4426 +5528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12513 .loc 1 5528 6 is_stmt 0 view .LVU4427 + 12514 0026 15F0100F tst r5, #16 + 12515 002a 6CD0 beq .L804 +5528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12516 .loc 1 5528 55 discriminator 1 view .LVU4428 + 12517 002c 16F0100F tst r6, #16 + 12518 0030 69D0 beq .L804 +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 12519 .loc 1 5535 5 is_stmt 1 view .LVU4429 + 12520 0032 C6F38031 ubfx r1, r6, #14, #1 +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 12521 .loc 1 5535 8 is_stmt 0 view .LVU4430 + 12522 0036 16F4804F tst r6, #16384 + 12523 003a 02D1 bne .L805 +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 12524 .loc 1 5535 68 discriminator 1 view .LVU4431 + 12525 003c 16F4004F tst r6, #32768 + 12526 0040 5DD0 beq .L806 + 12527 .L805: +5539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12528 .loc 1 5539 7 is_stmt 1 view .LVU4432 +5539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12529 .loc 1 5539 15 is_stmt 0 view .LVU4433 + 12530 0042 E36B ldr r3, [r4, #60] +5539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 422 + + + 12531 .loc 1 5539 10 view .LVU4434 + 12532 0044 63B1 cbz r3, .L820 +5541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12533 .loc 1 5541 9 is_stmt 1 view .LVU4435 + 12534 0046 C6F3C032 ubfx r2, r6, #15, #1 +5541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12535 .loc 1 5541 12 is_stmt 0 view .LVU4436 + 12536 004a 16F4004F tst r6, #32768 + 12537 004e 08D0 beq .L807 +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12538 .loc 1 5543 11 is_stmt 1 view .LVU4437 +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12539 .loc 1 5543 15 is_stmt 0 view .LVU4438 + 12540 0050 1B68 ldr r3, [r3] + 12541 0052 5B68 ldr r3, [r3, #4] +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12542 .loc 1 5543 14 view .LVU4439 + 12543 0054 23B3 cbz r3, .L821 +5514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 12544 .loc 1 5514 12 view .LVU4440 + 12545 0056 0022 movs r2, #0 + 12546 0058 03E0 b .L807 + 12547 .LVL889: + 12548 .L824: +5525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12549 .loc 1 5525 5 is_stmt 1 view .LVU4441 + 12550 005a FFF7FEFF bl I2C_ITSlaveCplt + 12551 .LVL890: +5525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12552 .loc 1 5525 5 is_stmt 0 view .LVU4442 + 12553 005e E2E7 b .L803 + 12554 .L820: +5514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 12555 .loc 1 5514 12 view .LVU4443 + 12556 0060 0022 movs r2, #0 + 12557 .L807: + 12558 .LVL891: +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12559 .loc 1 5551 7 is_stmt 1 view .LVU4444 +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12560 .loc 1 5551 15 is_stmt 0 view .LVU4445 + 12561 0062 A36B ldr r3, [r4, #56] +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12562 .loc 1 5551 10 view .LVU4446 + 12563 0064 1BB1 cbz r3, .L808 +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12564 .loc 1 5553 9 is_stmt 1 view .LVU4447 +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12565 .loc 1 5553 12 is_stmt 0 view .LVU4448 + 12566 0066 11B1 cbz r1, .L808 +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12567 .loc 1 5555 11 is_stmt 1 view .LVU4449 +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12568 .loc 1 5555 15 is_stmt 0 view .LVU4450 + 12569 0068 1B68 ldr r3, [r3] + 12570 006a 5B68 ldr r3, [r3, #4] +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 423 + + + 12571 .loc 1 5555 14 view .LVU4451 + 12572 006c D3B1 cbz r3, .L809 + 12573 .L808: +5562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12574 .loc 1 5562 7 is_stmt 1 view .LVU4452 +5562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12575 .loc 1 5562 10 is_stmt 0 view .LVU4453 + 12576 006e CAB9 cbnz r2, .L809 +5593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12577 .loc 1 5593 9 is_stmt 1 view .LVU4454 + 12578 0070 2368 ldr r3, [r4] + 12579 0072 1022 movs r2, #16 + 12580 .LVL892: +5593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12581 .loc 1 5593 9 is_stmt 0 view .LVU4455 + 12582 0074 DA61 str r2, [r3, #28] +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12583 .loc 1 5596 9 is_stmt 1 view .LVU4456 +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12584 .loc 1 5596 13 is_stmt 0 view .LVU4457 + 12585 0076 636C ldr r3, [r4, #68] +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12586 .loc 1 5596 25 view .LVU4458 + 12587 0078 43F00403 orr r3, r3, #4 + 12588 007c 6364 str r3, [r4, #68] +5599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12589 .loc 1 5599 9 is_stmt 1 view .LVU4459 +5599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12590 .loc 1 5599 18 is_stmt 0 view .LVU4460 + 12591 007e 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12592 0082 DBB2 uxtb r3, r3 + 12593 .LVL893: +5601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12594 .loc 1 5601 9 is_stmt 1 view .LVU4461 +5601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12595 .loc 1 5601 12 is_stmt 0 view .LVU4462 + 12596 0084 17B1 cbz r7, .L814 +5601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12597 .loc 1 5601 45 discriminator 1 view .LVU4463 + 12598 0086 B7F1807F cmp r7, #16777216 + 12599 008a 42D1 bne .L812 + 12600 .L814: +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12601 .loc 1 5603 11 is_stmt 1 view .LVU4464 + 12602 008c 213B subs r3, r3, #33 + 12603 .LVL894: +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12604 .loc 1 5603 11 is_stmt 0 view .LVU4465 + 12605 008e 092B cmp r3, #9 + 12606 0090 2DD8 bhi .L815 + 12607 0092 DFE803F0 tbb [pc, r3] + 12608 .L817: + 12609 0096 2A .byte (.L818-.L817)/2 + 12610 0097 31 .byte (.L816-.L817)/2 + 12611 0098 2C .byte (.L815-.L817)/2 + 12612 0099 2C .byte (.L815-.L817)/2 + 12613 009a 2C .byte (.L815-.L817)/2 + ARM GAS /tmp/ccNVyn8W.s page 424 + + + 12614 009b 2C .byte (.L815-.L817)/2 + 12615 009c 2C .byte (.L815-.L817)/2 + 12616 009d 2C .byte (.L815-.L817)/2 + 12617 009e 2A .byte (.L818-.L817)/2 + 12618 009f 31 .byte (.L816-.L817)/2 + 12619 .LVL895: + 12620 .p2align 1 + 12621 .L821: +5545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12622 .loc 1 5545 26 view .LVU4466 + 12623 00a0 0122 movs r2, #1 + 12624 00a2 DEE7 b .L807 + 12625 .LVL896: + 12626 .L809: +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12627 .loc 1 5564 9 is_stmt 1 view .LVU4467 +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12628 .loc 1 5564 18 is_stmt 0 view .LVU4468 + 12629 00a4 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12630 00a8 DBB2 uxtb r3, r3 +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12631 .loc 1 5564 12 view .LVU4469 + 12632 00aa 282B cmp r3, #40 + 12633 00ac 08D0 beq .L825 + 12634 .L811: +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12635 .loc 1 5571 14 is_stmt 1 view .LVU4470 +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12636 .loc 1 5571 23 is_stmt 0 view .LVU4471 + 12637 00ae 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12638 00b2 DBB2 uxtb r3, r3 +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12639 .loc 1 5571 17 view .LVU4472 + 12640 00b4 292B cmp r3, #41 + 12641 00b6 0BD0 beq .L826 + 12642 .L813: +5586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12643 .loc 1 5586 11 is_stmt 1 view .LVU4473 + 12644 00b8 2368 ldr r3, [r4] + 12645 00ba 1022 movs r2, #16 + 12646 00bc DA61 str r2, [r3, #28] + 12647 00be 28E0 b .L812 + 12648 .L825: +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12649 .loc 1 5564 51 is_stmt 0 discriminator 1 view .LVU4474 + 12650 00c0 B7F1007F cmp r7, #33554432 + 12651 00c4 F3D1 bne .L811 +5569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12652 .loc 1 5569 11 is_stmt 1 view .LVU4475 + 12653 00c6 2946 mov r1, r5 + 12654 00c8 2046 mov r0, r4 + 12655 00ca FFF7FEFF bl I2C_ITListenCplt + 12656 .LVL897: + 12657 00ce 20E0 b .L812 + 12658 .L826: +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12659 .loc 1 5571 64 is_stmt 0 discriminator 1 view .LVU4476 + ARM GAS /tmp/ccNVyn8W.s page 425 + + + 12660 00d0 17F5803F cmn r7, #65536 + 12661 00d4 F0D0 beq .L813 +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12662 .loc 1 5574 11 is_stmt 1 view .LVU4477 + 12663 00d6 2368 ldr r3, [r4] + 12664 00d8 1022 movs r2, #16 + 12665 00da DA61 str r2, [r3, #28] +5577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12666 .loc 1 5577 11 view .LVU4478 + 12667 00dc 2046 mov r0, r4 + 12668 00de FFF7FEFF bl I2C_Flush_TXDR + 12669 .LVL898: +5581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12670 .loc 1 5581 11 view .LVU4479 + 12671 00e2 2046 mov r0, r4 + 12672 00e4 FFF7FEFF bl I2C_ITSlaveSeqCplt + 12673 .LVL899: + 12674 00e8 13E0 b .L812 + 12675 .LVL900: + 12676 .L818: +5605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12677 .loc 1 5605 13 view .LVU4480 +5605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12678 .loc 1 5605 33 is_stmt 0 view .LVU4481 + 12679 00ea 2123 movs r3, #33 + 12680 .LVL901: +5605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12681 .loc 1 5605 33 view .LVU4482 + 12682 00ec 2363 str r3, [r4, #48] + 12683 .L815: +5617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12684 .loc 1 5617 11 is_stmt 1 view .LVU4483 +5617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12685 .loc 1 5617 33 is_stmt 0 view .LVU4484 + 12686 00ee 616C ldr r1, [r4, #68] +5617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12687 .loc 1 5617 11 view .LVU4485 + 12688 00f0 2046 mov r0, r4 + 12689 00f2 FFF7FEFF bl I2C_ITError + 12690 .LVL902: + 12691 00f6 0CE0 b .L812 + 12692 .LVL903: + 12693 .L816: +5609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12694 .loc 1 5609 13 is_stmt 1 view .LVU4486 +5609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12695 .loc 1 5609 33 is_stmt 0 view .LVU4487 + 12696 00f8 2223 movs r3, #34 + 12697 .LVL904: +5609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12698 .loc 1 5609 33 view .LVU4488 + 12699 00fa 2363 str r3, [r4, #48] + 12700 00fc F7E7 b .L815 + 12701 .LVL905: + 12702 .L806: +5624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12703 .loc 1 5624 7 is_stmt 1 view .LVU4489 + ARM GAS /tmp/ccNVyn8W.s page 426 + + + 12704 00fe 2368 ldr r3, [r4] + 12705 0100 1022 movs r2, #16 + 12706 0102 DA61 str r2, [r3, #28] + 12707 0104 05E0 b .L812 + 12708 .L804: +5627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12709 .loc 1 5627 8 view .LVU4490 +5627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12710 .loc 1 5627 11 is_stmt 0 view .LVU4491 + 12711 0106 15F0080F tst r5, #8 + 12712 010a 02D0 beq .L812 +5627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12713 .loc 1 5627 62 discriminator 1 view .LVU4492 + 12714 010c 16F0080F tst r6, #8 + 12715 0110 03D1 bne .L827 + 12716 .LVL906: + 12717 .L812: +5635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12718 .loc 1 5635 3 is_stmt 1 view .LVU4493 +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12719 .loc 1 5638 3 view .LVU4494 +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12720 .loc 1 5638 3 view .LVU4495 + 12721 0112 0020 movs r0, #0 + 12722 0114 84F84000 strb r0, [r4, #64] +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12723 .loc 1 5638 3 view .LVU4496 +5640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12724 .loc 1 5640 3 view .LVU4497 + 12725 .LVL907: + 12726 .L802: +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12727 .loc 1 5641 1 is_stmt 0 view .LVU4498 + 12728 0118 F8BD pop {r3, r4, r5, r6, r7, pc} + 12729 .LVL908: + 12730 .L827: +5630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12731 .loc 1 5630 5 is_stmt 1 view .LVU4499 + 12732 011a 2946 mov r1, r5 + 12733 011c 2046 mov r0, r4 + 12734 011e FFF7FEFF bl I2C_ITAddrCplt + 12735 .LVL909: + 12736 0122 F6E7 b .L812 + 12737 .LVL910: + 12738 .L819: +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12739 .loc 1 5518 3 is_stmt 0 discriminator 1 view .LVU4500 + 12740 0124 0220 movs r0, #2 + 12741 .LVL911: +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12742 .loc 1 5518 3 discriminator 1 view .LVU4501 + 12743 0126 F7E7 b .L802 + 12744 .cfi_endproc + 12745 .LFE184: + 12747 .section .text.I2C_Master_ISR_DMA,"ax",%progbits + 12748 .align 1 + 12749 .syntax unified + ARM GAS /tmp/ccNVyn8W.s page 427 + + + 12750 .thumb + 12751 .thumb_func + 12753 I2C_Master_ISR_DMA: + 12754 .LVL912: + 12755 .LFB182: +5233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 12756 .loc 1 5233 1 is_stmt 1 view -0 + 12757 .cfi_startproc + 12758 @ args = 0, pretend = 0, frame = 0 + 12759 @ frame_needed = 0, uses_anonymous_args = 0 +5234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 12760 .loc 1 5234 3 view .LVU4503 +5235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12761 .loc 1 5235 3 view .LVU4504 +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12762 .loc 1 5238 3 view .LVU4505 +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12763 .loc 1 5238 3 view .LVU4506 + 12764 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 12765 0004 012B cmp r3, #1 + 12766 0006 00F09A80 beq .L841 +5233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 12767 .loc 1 5233 1 is_stmt 0 view .LVU4507 + 12768 000a 10B5 push {r4, lr} + 12769 .cfi_def_cfa_offset 8 + 12770 .cfi_offset 4, -8 + 12771 .cfi_offset 14, -4 + 12772 000c 82B0 sub sp, sp, #8 + 12773 .cfi_def_cfa_offset 16 + 12774 000e 0446 mov r4, r0 +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12775 .loc 1 5238 3 is_stmt 1 discriminator 2 view .LVU4508 + 12776 0010 0123 movs r3, #1 + 12777 0012 80F84030 strb r3, [r0, #64] +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12778 .loc 1 5238 3 discriminator 2 view .LVU4509 +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12779 .loc 1 5240 3 view .LVU4510 +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12780 .loc 1 5240 6 is_stmt 0 view .LVU4511 + 12781 0016 11F0100F tst r1, #16 + 12782 001a 02D0 beq .L830 +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12783 .loc 1 5240 55 discriminator 1 view .LVU4512 + 12784 001c 12F0100F tst r2, #16 + 12785 0020 32D1 bne .L847 + 12786 .L830: +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12787 .loc 1 5257 8 is_stmt 1 view .LVU4513 +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12788 .loc 1 5257 11 is_stmt 0 view .LVU4514 + 12789 0022 11F0800F tst r1, #128 + 12790 0026 60D0 beq .L832 +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12791 .loc 1 5257 61 discriminator 1 view .LVU4515 + 12792 0028 12F0400F tst r2, #64 + 12793 002c 5DD0 beq .L832 + ARM GAS /tmp/ccNVyn8W.s page 428 + + +5261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12794 .loc 1 5261 5 is_stmt 1 view .LVU4516 + 12795 002e 2268 ldr r2, [r4] + 12796 .LVL913: +5261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12797 .loc 1 5261 5 is_stmt 0 view .LVU4517 + 12798 0030 1368 ldr r3, [r2] + 12799 0032 23F04003 bic r3, r3, #64 + 12800 0036 1360 str r3, [r2] +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12801 .loc 1 5263 5 is_stmt 1 view .LVU4518 +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12802 .loc 1 5263 13 is_stmt 0 view .LVU4519 + 12803 0038 638D ldrh r3, [r4, #42] + 12804 003a 9BB2 uxth r3, r3 +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12805 .loc 1 5263 8 view .LVU4520 + 12806 003c 002B cmp r3, #0 + 12807 003e 46D0 beq .L833 +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12808 .loc 1 5266 7 is_stmt 1 view .LVU4521 +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12809 .loc 1 5266 35 is_stmt 0 view .LVU4522 + 12810 0040 2368 ldr r3, [r4] +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12811 .loc 1 5266 45 view .LVU4523 + 12812 0042 5968 ldr r1, [r3, #4] + 12813 .LVL914: +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12814 .loc 1 5266 18 view .LVU4524 + 12815 0044 C1F30901 ubfx r1, r1, #0, #10 + 12816 .LVL915: +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12817 .loc 1 5269 7 is_stmt 1 view .LVU4525 +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12818 .loc 1 5269 15 is_stmt 0 view .LVU4526 + 12819 0048 638D ldrh r3, [r4, #42] + 12820 004a 9BB2 uxth r3, r3 +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12821 .loc 1 5269 10 view .LVU4527 + 12822 004c FF2B cmp r3, #255 + 12823 004e 2DD9 bls .L834 +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 12824 .loc 1 5271 9 is_stmt 1 view .LVU4528 +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 12825 .loc 1 5271 24 is_stmt 0 view .LVU4529 + 12826 0050 FF23 movs r3, #255 + 12827 0052 2385 strh r3, [r4, #40] @ movhi +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12828 .loc 1 5272 9 is_stmt 1 view .LVU4530 + 12829 .LVL916: +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12830 .loc 1 5272 18 is_stmt 0 view .LVU4531 + 12831 0054 4FF08073 mov r3, #16777216 + 12832 .LVL917: + 12833 .L835: +5288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 429 + + + 12834 .loc 1 5288 7 is_stmt 1 view .LVU4532 + 12835 0058 0022 movs r2, #0 + 12836 005a 0092 str r2, [sp] + 12837 005c 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 12838 0060 2046 mov r0, r4 + 12839 .LVL918: +5288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12840 .loc 1 5288 7 is_stmt 0 view .LVU4533 + 12841 0062 FFF7FEFF bl I2C_TransferConfig + 12842 .LVL919: +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12843 .loc 1 5291 7 is_stmt 1 view .LVU4534 +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12844 .loc 1 5291 11 is_stmt 0 view .LVU4535 + 12845 0066 638D ldrh r3, [r4, #42] + 12846 0068 9BB2 uxth r3, r3 +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12847 .loc 1 5291 30 view .LVU4536 + 12848 006a 228D ldrh r2, [r4, #40] +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12849 .loc 1 5291 23 view .LVU4537 + 12850 006c 9B1A subs r3, r3, r2 + 12851 006e 9BB2 uxth r3, r3 + 12852 0070 6385 strh r3, [r4, #42] @ movhi +5294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12853 .loc 1 5294 7 is_stmt 1 view .LVU4538 +5294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12854 .loc 1 5294 15 is_stmt 0 view .LVU4539 + 12855 0072 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12856 0076 DBB2 uxtb r3, r3 +5294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12857 .loc 1 5294 10 view .LVU4540 + 12858 0078 222B cmp r3, #34 + 12859 007a 22D0 beq .L848 +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12860 .loc 1 5300 9 is_stmt 1 view .LVU4541 +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12861 .loc 1 5300 13 is_stmt 0 view .LVU4542 + 12862 007c 2268 ldr r2, [r4] +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12863 .loc 1 5300 23 view .LVU4543 + 12864 007e 1368 ldr r3, [r2] +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12865 .loc 1 5300 29 view .LVU4544 + 12866 0080 43F48043 orr r3, r3, #16384 + 12867 0084 1360 str r3, [r2] + 12868 0086 0CE0 b .L831 + 12869 .LVL920: + 12870 .L847: +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12871 .loc 1 5244 5 is_stmt 1 view .LVU4545 + 12872 0088 0368 ldr r3, [r0] + 12873 008a 1022 movs r2, #16 + 12874 .LVL921: +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12875 .loc 1 5244 5 is_stmt 0 view .LVU4546 + 12876 008c DA61 str r2, [r3, #28] + ARM GAS /tmp/ccNVyn8W.s page 430 + + +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12877 .loc 1 5247 5 is_stmt 1 view .LVU4547 +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12878 .loc 1 5247 9 is_stmt 0 view .LVU4548 + 12879 008e 436C ldr r3, [r0, #68] +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12880 .loc 1 5247 21 view .LVU4549 + 12881 0090 43F00403 orr r3, r3, #4 + 12882 0094 4364 str r3, [r0, #68] +5252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12883 .loc 1 5252 5 is_stmt 1 view .LVU4550 + 12884 0096 2021 movs r1, #32 + 12885 .LVL922: +5252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12886 .loc 1 5252 5 is_stmt 0 view .LVU4551 + 12887 0098 FFF7FEFF bl I2C_Enable_IRQ + 12888 .LVL923: +5255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12889 .loc 1 5255 5 is_stmt 1 view .LVU4552 + 12890 009c 2046 mov r0, r4 + 12891 009e FFF7FEFF bl I2C_Flush_TXDR + 12892 .LVL924: + 12893 .L831: +5355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12894 .loc 1 5355 3 view .LVU4553 +5358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12895 .loc 1 5358 3 view .LVU4554 +5358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12896 .loc 1 5358 3 view .LVU4555 + 12897 00a2 0020 movs r0, #0 + 12898 00a4 84F84000 strb r0, [r4, #64] +5358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12899 .loc 1 5358 3 view .LVU4556 +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12900 .loc 1 5360 3 view .LVU4557 +5361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12901 .loc 1 5361 1 is_stmt 0 view .LVU4558 + 12902 00a8 02B0 add sp, sp, #8 + 12903 .cfi_remember_state + 12904 .cfi_def_cfa_offset 8 + 12905 @ sp needed + 12906 00aa 10BD pop {r4, pc} + 12907 .LVL925: + 12908 .L834: + 12909 .cfi_restore_state +5276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 12910 .loc 1 5276 9 is_stmt 1 view .LVU4559 +5276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 12911 .loc 1 5276 30 is_stmt 0 view .LVU4560 + 12912 00ac 638D ldrh r3, [r4, #42] +5276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 12913 .loc 1 5276 24 view .LVU4561 + 12914 00ae 2385 strh r3, [r4, #40] @ movhi +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12915 .loc 1 5277 9 is_stmt 1 view .LVU4562 +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12916 .loc 1 5277 17 is_stmt 0 view .LVU4563 + ARM GAS /tmp/ccNVyn8W.s page 431 + + + 12917 00b0 E36A ldr r3, [r4, #44] +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12918 .loc 1 5277 12 view .LVU4564 + 12919 00b2 13F5803F cmn r3, #65536 + 12920 00b6 01D0 beq .L842 +5279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12921 .loc 1 5279 11 is_stmt 1 view .LVU4565 +5279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12922 .loc 1 5279 20 is_stmt 0 view .LVU4566 + 12923 00b8 E36A ldr r3, [r4, #44] + 12924 .LVL926: +5279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12925 .loc 1 5279 20 view .LVU4567 + 12926 00ba CDE7 b .L835 + 12927 .LVL927: + 12928 .L842: +5283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12929 .loc 1 5283 20 view .LVU4568 + 12930 00bc 4FF00073 mov r3, #33554432 + 12931 00c0 CAE7 b .L835 + 12932 .LVL928: + 12933 .L848: +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12934 .loc 1 5296 9 is_stmt 1 view .LVU4569 +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12935 .loc 1 5296 13 is_stmt 0 view .LVU4570 + 12936 00c2 2268 ldr r2, [r4] +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12937 .loc 1 5296 23 view .LVU4571 + 12938 00c4 1368 ldr r3, [r2] +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12939 .loc 1 5296 29 view .LVU4572 + 12940 00c6 43F40043 orr r3, r3, #32768 + 12941 00ca 1360 str r3, [r2] + 12942 00cc E9E7 b .L831 + 12943 .LVL929: + 12944 .L833: +5306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12945 .loc 1 5306 7 is_stmt 1 view .LVU4573 +5306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12946 .loc 1 5306 11 is_stmt 0 view .LVU4574 + 12947 00ce 2368 ldr r3, [r4] + 12948 00d0 5B68 ldr r3, [r3, #4] +5306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12949 .loc 1 5306 10 view .LVU4575 + 12950 00d2 13F0007F tst r3, #33554432 + 12951 00d6 03D1 bne .L837 +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12952 .loc 1 5309 9 is_stmt 1 view .LVU4576 + 12953 00d8 2046 mov r0, r4 + 12954 .LVL930: +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12955 .loc 1 5309 9 is_stmt 0 view .LVU4577 + 12956 00da FFF7FEFF bl I2C_ITMasterSeqCplt + 12957 .LVL931: +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12958 .loc 1 5309 9 view .LVU4578 + ARM GAS /tmp/ccNVyn8W.s page 432 + + + 12959 00de E0E7 b .L831 + 12960 .LVL932: + 12961 .L837: +5315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12962 .loc 1 5315 9 is_stmt 1 view .LVU4579 + 12963 00e0 4021 movs r1, #64 + 12964 .LVL933: +5315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12965 .loc 1 5315 9 is_stmt 0 view .LVU4580 + 12966 00e2 2046 mov r0, r4 + 12967 .LVL934: +5315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12968 .loc 1 5315 9 view .LVU4581 + 12969 00e4 FFF7FEFF bl I2C_ITError + 12970 .LVL935: + 12971 00e8 DBE7 b .L831 + 12972 .LVL936: + 12973 .L832: +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12974 .loc 1 5319 8 is_stmt 1 view .LVU4582 +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12975 .loc 1 5319 11 is_stmt 0 view .LVU4583 + 12976 00ea 11F0400F tst r1, #64 + 12977 00ee 1CD0 beq .L838 +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12978 .loc 1 5319 60 discriminator 1 view .LVU4584 + 12979 00f0 12F0400F tst r2, #64 + 12980 00f4 19D0 beq .L838 +5322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12981 .loc 1 5322 5 is_stmt 1 view .LVU4585 +5322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12982 .loc 1 5322 13 is_stmt 0 view .LVU4586 + 12983 00f6 638D ldrh r3, [r4, #42] + 12984 00f8 9BB2 uxth r3, r3 +5322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12985 .loc 1 5322 8 view .LVU4587 + 12986 00fa 8BB9 cbnz r3, .L839 +5324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12987 .loc 1 5324 7 is_stmt 1 view .LVU4588 +5324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12988 .loc 1 5324 11 is_stmt 0 view .LVU4589 + 12989 00fc 2368 ldr r3, [r4] + 12990 00fe 5A68 ldr r2, [r3, #4] + 12991 .LVL937: +5324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12992 .loc 1 5324 10 view .LVU4590 + 12993 0100 12F0007F tst r2, #33554432 + 12994 0104 CDD1 bne .L831 +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12995 .loc 1 5327 9 is_stmt 1 view .LVU4591 +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12996 .loc 1 5327 17 is_stmt 0 view .LVU4592 + 12997 0106 E26A ldr r2, [r4, #44] +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12998 .loc 1 5327 12 view .LVU4593 + 12999 0108 12F5803F cmn r2, #65536 + 13000 010c 04D1 bne .L840 + ARM GAS /tmp/ccNVyn8W.s page 433 + + +5330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13001 .loc 1 5330 11 is_stmt 1 view .LVU4594 +5330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13002 .loc 1 5330 25 is_stmt 0 view .LVU4595 + 13003 010e 5A68 ldr r2, [r3, #4] +5330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13004 .loc 1 5330 31 view .LVU4596 + 13005 0110 42F48042 orr r2, r2, #16384 + 13006 0114 5A60 str r2, [r3, #4] + 13007 0116 C4E7 b .L831 + 13008 .L840: +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13009 .loc 1 5335 11 is_stmt 1 view .LVU4597 + 13010 0118 2046 mov r0, r4 + 13011 .LVL938: +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13012 .loc 1 5335 11 is_stmt 0 view .LVU4598 + 13013 011a FFF7FEFF bl I2C_ITMasterSeqCplt + 13014 .LVL939: +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13015 .loc 1 5335 11 view .LVU4599 + 13016 011e C0E7 b .L831 + 13017 .LVL940: + 13018 .L839: +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13019 .loc 1 5343 7 is_stmt 1 view .LVU4600 + 13020 0120 4021 movs r1, #64 + 13021 .LVL941: +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13022 .loc 1 5343 7 is_stmt 0 view .LVU4601 + 13023 0122 2046 mov r0, r4 + 13024 .LVL942: +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13025 .loc 1 5343 7 view .LVU4602 + 13026 0124 FFF7FEFF bl I2C_ITError + 13027 .LVL943: +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13028 .loc 1 5343 7 view .LVU4603 + 13029 0128 BBE7 b .L831 + 13030 .LVL944: + 13031 .L838: +5346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13032 .loc 1 5346 8 is_stmt 1 view .LVU4604 +5346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13033 .loc 1 5346 11 is_stmt 0 view .LVU4605 + 13034 012a 11F0200F tst r1, #32 + 13035 012e B8D0 beq .L831 +5346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13036 .loc 1 5346 63 discriminator 1 view .LVU4606 + 13037 0130 12F0200F tst r2, #32 + 13038 0134 B5D0 beq .L831 +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13039 .loc 1 5350 5 is_stmt 1 view .LVU4607 + 13040 0136 2046 mov r0, r4 + 13041 .LVL945: +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13042 .loc 1 5350 5 is_stmt 0 view .LVU4608 + ARM GAS /tmp/ccNVyn8W.s page 434 + + + 13043 0138 FFF7FEFF bl I2C_ITMasterCplt + 13044 .LVL946: +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13045 .loc 1 5350 5 view .LVU4609 + 13046 013c B1E7 b .L831 + 13047 .LVL947: + 13048 .L841: + 13049 .cfi_def_cfa_offset 0 + 13050 .cfi_restore 4 + 13051 .cfi_restore 14 +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13052 .loc 1 5238 3 discriminator 1 view .LVU4610 + 13053 013e 0220 movs r0, #2 + 13054 .LVL948: +5361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13055 .loc 1 5361 1 view .LVU4611 + 13056 0140 7047 bx lr + 13057 .cfi_endproc + 13058 .LFE182: + 13060 .section .text.I2C_DMAError,"ax",%progbits + 13061 .align 1 + 13062 .syntax unified + 13063 .thumb + 13064 .thumb_func + 13066 I2C_DMAError: + 13067 .LVL949: + 13068 .LFB200: +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13069 .loc 1 6685 1 is_stmt 1 view -0 + 13070 .cfi_startproc + 13071 @ args = 0, pretend = 0, frame = 0 + 13072 @ frame_needed = 0, uses_anonymous_args = 0 +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13073 .loc 1 6685 1 is_stmt 0 view .LVU4613 + 13074 0000 08B5 push {r3, lr} + 13075 .cfi_def_cfa_offset 8 + 13076 .cfi_offset 3, -8 + 13077 .cfi_offset 14, -4 +6687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13078 .loc 1 6687 3 is_stmt 1 view .LVU4614 +6687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13079 .loc 1 6687 22 is_stmt 0 view .LVU4615 + 13080 0002 406A ldr r0, [r0, #36] + 13081 .LVL950: +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13082 .loc 1 6690 3 is_stmt 1 view .LVU4616 +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13083 .loc 1 6690 7 is_stmt 0 view .LVU4617 + 13084 0004 0268 ldr r2, [r0] +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13085 .loc 1 6690 17 view .LVU4618 + 13086 0006 5368 ldr r3, [r2, #4] +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13087 .loc 1 6690 23 view .LVU4619 + 13088 0008 43F40043 orr r3, r3, #32768 + 13089 000c 5360 str r3, [r2, #4] +6693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccNVyn8W.s page 435 + + + 13090 .loc 1 6693 3 is_stmt 1 view .LVU4620 + 13091 000e 1021 movs r1, #16 + 13092 0010 FFF7FEFF bl I2C_ITError + 13093 .LVL951: +6694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13094 .loc 1 6694 1 is_stmt 0 view .LVU4621 + 13095 0014 08BD pop {r3, pc} + 13096 .cfi_endproc + 13097 .LFE200: + 13099 .section .text.I2C_DMAMasterTransmitCplt,"ax",%progbits + 13100 .align 1 + 13101 .syntax unified + 13102 .thumb + 13103 .thumb_func + 13105 I2C_DMAMasterTransmitCplt: + 13106 .LVL952: + 13107 .LFB196: +6525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13108 .loc 1 6525 1 is_stmt 1 view -0 + 13109 .cfi_startproc + 13110 @ args = 0, pretend = 0, frame = 0 + 13111 @ frame_needed = 0, uses_anonymous_args = 0 +6525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13112 .loc 1 6525 1 is_stmt 0 view .LVU4623 + 13113 0000 10B5 push {r4, lr} + 13114 .cfi_def_cfa_offset 8 + 13115 .cfi_offset 4, -8 + 13116 .cfi_offset 14, -4 +6527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13117 .loc 1 6527 3 is_stmt 1 view .LVU4624 +6527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13118 .loc 1 6527 22 is_stmt 0 view .LVU4625 + 13119 0002 446A ldr r4, [r0, #36] + 13120 .LVL953: +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13121 .loc 1 6530 3 is_stmt 1 view .LVU4626 +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13122 .loc 1 6530 7 is_stmt 0 view .LVU4627 + 13123 0004 2268 ldr r2, [r4] +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13124 .loc 1 6530 17 view .LVU4628 + 13125 0006 1368 ldr r3, [r2] +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13126 .loc 1 6530 23 view .LVU4629 + 13127 0008 23F48043 bic r3, r3, #16384 + 13128 000c 1360 str r3, [r2] +6533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13129 .loc 1 6533 3 is_stmt 1 view .LVU4630 +6533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13130 .loc 1 6533 11 is_stmt 0 view .LVU4631 + 13131 000e 638D ldrh r3, [r4, #42] + 13132 0010 9BB2 uxth r3, r3 +6533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13133 .loc 1 6533 6 view .LVU4632 + 13134 0012 ABB1 cbz r3, .L858 +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13135 .loc 1 6542 5 is_stmt 1 view .LVU4633 + ARM GAS /tmp/ccNVyn8W.s page 436 + + +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13136 .loc 1 6542 9 is_stmt 0 view .LVU4634 + 13137 0014 616A ldr r1, [r4, #36] +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13138 .loc 1 6542 27 view .LVU4635 + 13139 0016 238D ldrh r3, [r4, #40] +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13140 .loc 1 6542 20 view .LVU4636 + 13141 0018 1944 add r1, r1, r3 + 13142 001a 6162 str r1, [r4, #36] +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13143 .loc 1 6545 5 is_stmt 1 view .LVU4637 +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13144 .loc 1 6545 13 is_stmt 0 view .LVU4638 + 13145 001c 638D ldrh r3, [r4, #42] + 13146 001e 9BB2 uxth r3, r3 +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13147 .loc 1 6545 8 view .LVU4639 + 13148 0020 FF2B cmp r3, #255 + 13149 0022 12D9 bls .L854 +6547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13150 .loc 1 6547 7 is_stmt 1 view .LVU4640 +6547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13151 .loc 1 6547 22 is_stmt 0 view .LVU4641 + 13152 0024 FF23 movs r3, #255 + 13153 0026 2385 strh r3, [r4, #40] @ movhi + 13154 .L855: +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13155 .loc 1 6555 5 is_stmt 1 view .LVU4642 +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13156 .loc 1 6555 81 is_stmt 0 view .LVU4643 + 13157 0028 2268 ldr r2, [r4] +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13158 .loc 1 6555 9 view .LVU4644 + 13159 002a 238D ldrh r3, [r4, #40] + 13160 002c 2832 adds r2, r2, #40 + 13161 002e A06B ldr r0, [r4, #56] + 13162 .LVL954: +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13163 .loc 1 6555 9 view .LVU4645 + 13164 0030 FFF7FEFF bl HAL_DMA_Start_IT + 13165 .LVL955: +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13166 .loc 1 6555 8 discriminator 1 view .LVU4646 + 13167 0034 60B1 cbz r0, .L856 +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13168 .loc 1 6559 7 is_stmt 1 view .LVU4647 + 13169 0036 1021 movs r1, #16 + 13170 0038 2046 mov r0, r4 + 13171 003a FFF7FEFF bl I2C_ITError + 13172 .LVL956: + 13173 .L851: +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13174 .loc 1 6567 1 is_stmt 0 view .LVU4648 + 13175 003e 10BD pop {r4, pc} + 13176 .LVL957: + 13177 .L858: + ARM GAS /tmp/ccNVyn8W.s page 437 + + +6536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13178 .loc 1 6536 5 is_stmt 1 view .LVU4649 + 13179 0040 2021 movs r1, #32 + 13180 0042 2046 mov r0, r4 + 13181 .LVL958: +6536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13182 .loc 1 6536 5 is_stmt 0 view .LVU4650 + 13183 0044 FFF7FEFF bl I2C_Enable_IRQ + 13184 .LVL959: + 13185 0048 F9E7 b .L851 + 13186 .LVL960: + 13187 .L854: +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13188 .loc 1 6551 7 is_stmt 1 view .LVU4651 +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13189 .loc 1 6551 28 is_stmt 0 view .LVU4652 + 13190 004a 638D ldrh r3, [r4, #42] +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13191 .loc 1 6551 22 view .LVU4653 + 13192 004c 2385 strh r3, [r4, #40] @ movhi + 13193 004e EBE7 b .L855 + 13194 .LVL961: + 13195 .L856: +6564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13196 .loc 1 6564 7 is_stmt 1 view .LVU4654 + 13197 0050 4021 movs r1, #64 + 13198 0052 2046 mov r0, r4 + 13199 0054 FFF7FEFF bl I2C_Enable_IRQ + 13200 .LVL962: +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13201 .loc 1 6567 1 is_stmt 0 view .LVU4655 + 13202 0058 F1E7 b .L851 + 13203 .cfi_endproc + 13204 .LFE196: + 13206 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits + 13207 .align 1 + 13208 .syntax unified + 13209 .thumb + 13210 .thumb_func + 13212 I2C_DMAMasterReceiveCplt: + 13213 .LVL963: + 13214 .LFB198: +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13215 .loc 1 6605 1 is_stmt 1 view -0 + 13216 .cfi_startproc + 13217 @ args = 0, pretend = 0, frame = 0 + 13218 @ frame_needed = 0, uses_anonymous_args = 0 +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13219 .loc 1 6605 1 is_stmt 0 view .LVU4657 + 13220 0000 10B5 push {r4, lr} + 13221 .cfi_def_cfa_offset 8 + 13222 .cfi_offset 4, -8 + 13223 .cfi_offset 14, -4 +6607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13224 .loc 1 6607 3 is_stmt 1 view .LVU4658 +6607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13225 .loc 1 6607 22 is_stmt 0 view .LVU4659 + ARM GAS /tmp/ccNVyn8W.s page 438 + + + 13226 0002 446A ldr r4, [r0, #36] + 13227 .LVL964: +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13228 .loc 1 6610 3 is_stmt 1 view .LVU4660 +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13229 .loc 1 6610 7 is_stmt 0 view .LVU4661 + 13230 0004 2268 ldr r2, [r4] +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13231 .loc 1 6610 17 view .LVU4662 + 13232 0006 1368 ldr r3, [r2] +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13233 .loc 1 6610 23 view .LVU4663 + 13234 0008 23F40043 bic r3, r3, #32768 + 13235 000c 1360 str r3, [r2] +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13236 .loc 1 6613 3 is_stmt 1 view .LVU4664 +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13237 .loc 1 6613 11 is_stmt 0 view .LVU4665 + 13238 000e 638D ldrh r3, [r4, #42] + 13239 0010 9BB2 uxth r3, r3 +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13240 .loc 1 6613 6 view .LVU4666 + 13241 0012 ABB1 cbz r3, .L866 +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13242 .loc 1 6622 5 is_stmt 1 view .LVU4667 +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13243 .loc 1 6622 9 is_stmt 0 view .LVU4668 + 13244 0014 626A ldr r2, [r4, #36] +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13245 .loc 1 6622 27 view .LVU4669 + 13246 0016 238D ldrh r3, [r4, #40] +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13247 .loc 1 6622 20 view .LVU4670 + 13248 0018 1A44 add r2, r2, r3 + 13249 001a 6262 str r2, [r4, #36] +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13250 .loc 1 6625 5 is_stmt 1 view .LVU4671 +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13251 .loc 1 6625 13 is_stmt 0 view .LVU4672 + 13252 001c 638D ldrh r3, [r4, #42] + 13253 001e 9BB2 uxth r3, r3 +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13254 .loc 1 6625 8 view .LVU4673 + 13255 0020 FF2B cmp r3, #255 + 13256 0022 12D9 bls .L862 +6627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13257 .loc 1 6627 7 is_stmt 1 view .LVU4674 +6627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13258 .loc 1 6627 22 is_stmt 0 view .LVU4675 + 13259 0024 FF23 movs r3, #255 + 13260 0026 2385 strh r3, [r4, #40] @ movhi + 13261 .L863: +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13262 .loc 1 6635 5 is_stmt 1 view .LVU4676 +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13263 .loc 1 6635 55 is_stmt 0 view .LVU4677 + 13264 0028 2168 ldr r1, [r4] + ARM GAS /tmp/ccNVyn8W.s page 439 + + +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13265 .loc 1 6635 9 view .LVU4678 + 13266 002a 238D ldrh r3, [r4, #40] + 13267 002c 2431 adds r1, r1, #36 + 13268 002e E06B ldr r0, [r4, #60] + 13269 .LVL965: +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13270 .loc 1 6635 9 view .LVU4679 + 13271 0030 FFF7FEFF bl HAL_DMA_Start_IT + 13272 .LVL966: +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13273 .loc 1 6635 8 discriminator 1 view .LVU4680 + 13274 0034 60B1 cbz r0, .L864 +6639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13275 .loc 1 6639 7 is_stmt 1 view .LVU4681 + 13276 0036 1021 movs r1, #16 + 13277 0038 2046 mov r0, r4 + 13278 003a FFF7FEFF bl I2C_ITError + 13279 .LVL967: + 13280 .L859: +6647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13281 .loc 1 6647 1 is_stmt 0 view .LVU4682 + 13282 003e 10BD pop {r4, pc} + 13283 .LVL968: + 13284 .L866: +6616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13285 .loc 1 6616 5 is_stmt 1 view .LVU4683 + 13286 0040 2021 movs r1, #32 + 13287 0042 2046 mov r0, r4 + 13288 .LVL969: +6616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13289 .loc 1 6616 5 is_stmt 0 view .LVU4684 + 13290 0044 FFF7FEFF bl I2C_Enable_IRQ + 13291 .LVL970: + 13292 0048 F9E7 b .L859 + 13293 .LVL971: + 13294 .L862: +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13295 .loc 1 6631 7 is_stmt 1 view .LVU4685 +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13296 .loc 1 6631 28 is_stmt 0 view .LVU4686 + 13297 004a 638D ldrh r3, [r4, #42] +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13298 .loc 1 6631 22 view .LVU4687 + 13299 004c 2385 strh r3, [r4, #40] @ movhi + 13300 004e EBE7 b .L863 + 13301 .LVL972: + 13302 .L864: +6644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13303 .loc 1 6644 7 is_stmt 1 view .LVU4688 + 13304 0050 4021 movs r1, #64 + 13305 0052 2046 mov r0, r4 + 13306 0054 FFF7FEFF bl I2C_Enable_IRQ + 13307 .LVL973: +6647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13308 .loc 1 6647 1 is_stmt 0 view .LVU4689 + 13309 0058 F1E7 b .L859 + ARM GAS /tmp/ccNVyn8W.s page 440 + + + 13310 .cfi_endproc + 13311 .LFE198: + 13313 .section .text.I2C_Mem_ISR_IT,"ax",%progbits + 13314 .align 1 + 13315 .syntax unified + 13316 .thumb + 13317 .thumb_func + 13319 I2C_Mem_ISR_IT: + 13320 .LVL974: + 13321 .LFB180: +4955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13322 .loc 1 4955 1 is_stmt 1 view -0 + 13323 .cfi_startproc + 13324 @ args = 0, pretend = 0, frame = 0 + 13325 @ frame_needed = 0, uses_anonymous_args = 0 +4956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 13326 .loc 1 4956 3 view .LVU4691 +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13327 .loc 1 4957 3 view .LVU4692 +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13328 .loc 1 4960 3 view .LVU4693 +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13329 .loc 1 4960 3 view .LVU4694 + 13330 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 13331 0004 012B cmp r3, #1 + 13332 0006 00F0B980 beq .L880 +4955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13333 .loc 1 4955 1 is_stmt 0 view .LVU4695 + 13334 000a 70B5 push {r4, r5, r6, lr} + 13335 .cfi_def_cfa_offset 16 + 13336 .cfi_offset 4, -16 + 13337 .cfi_offset 5, -12 + 13338 .cfi_offset 6, -8 + 13339 .cfi_offset 14, -4 + 13340 000c 82B0 sub sp, sp, #8 + 13341 .cfi_def_cfa_offset 24 + 13342 000e 0446 mov r4, r0 + 13343 0010 0D46 mov r5, r1 + 13344 0012 1646 mov r6, r2 +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13345 .loc 1 4960 3 is_stmt 1 discriminator 2 view .LVU4696 + 13346 0014 0123 movs r3, #1 + 13347 0016 80F84030 strb r3, [r0, #64] +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13348 .loc 1 4960 3 discriminator 2 view .LVU4697 +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13349 .loc 1 4962 3 view .LVU4698 +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13350 .loc 1 4962 6 is_stmt 0 view .LVU4699 + 13351 001a 11F0100F tst r1, #16 + 13352 001e 02D0 beq .L869 +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13353 .loc 1 4962 58 discriminator 1 view .LVU4700 + 13354 0020 12F0100F tst r2, #16 + 13355 0024 22D1 bne .L886 + 13356 .L869: +4976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + ARM GAS /tmp/ccNVyn8W.s page 441 + + + 13357 .loc 1 4976 8 is_stmt 1 view .LVU4701 +4976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13358 .loc 1 4976 11 is_stmt 0 view .LVU4702 + 13359 0026 15F0040F tst r5, #4 + 13360 002a 29D0 beq .L871 +4976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13361 .loc 1 4976 65 discriminator 1 view .LVU4703 + 13362 002c 16F0040F tst r6, #4 + 13363 0030 26D0 beq .L871 +4980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13364 .loc 1 4980 5 is_stmt 1 view .LVU4704 +4980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13365 .loc 1 4980 16 is_stmt 0 view .LVU4705 + 13366 0032 25F00405 bic r5, r5, #4 + 13367 .LVL975: +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13368 .loc 1 4983 5 is_stmt 1 view .LVU4706 +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13369 .loc 1 4983 36 is_stmt 0 view .LVU4707 + 13370 0036 2368 ldr r3, [r4] +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13371 .loc 1 4983 46 view .LVU4708 + 13372 0038 5A6A ldr r2, [r3, #36] + 13373 .LVL976: +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13374 .loc 1 4983 10 view .LVU4709 + 13375 003a 636A ldr r3, [r4, #36] +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13376 .loc 1 4983 21 view .LVU4710 + 13377 003c 1A70 strb r2, [r3] +4986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13378 .loc 1 4986 5 is_stmt 1 view .LVU4711 +4986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13379 .loc 1 4986 9 is_stmt 0 view .LVU4712 + 13380 003e 636A ldr r3, [r4, #36] +4986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13381 .loc 1 4986 19 view .LVU4713 + 13382 0040 0133 adds r3, r3, #1 + 13383 0042 6362 str r3, [r4, #36] +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13384 .loc 1 4988 5 is_stmt 1 view .LVU4714 +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13385 .loc 1 4988 9 is_stmt 0 view .LVU4715 + 13386 0044 238D ldrh r3, [r4, #40] +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13387 .loc 1 4988 19 view .LVU4716 + 13388 0046 013B subs r3, r3, #1 + 13389 0048 2385 strh r3, [r4, #40] @ movhi +4989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13390 .loc 1 4989 5 is_stmt 1 view .LVU4717 +4989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13391 .loc 1 4989 9 is_stmt 0 view .LVU4718 + 13392 004a 638D ldrh r3, [r4, #42] + 13393 004c 9BB2 uxth r3, r3 +4989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13394 .loc 1 4989 20 view .LVU4719 + 13395 004e 013B subs r3, r3, #1 + ARM GAS /tmp/ccNVyn8W.s page 442 + + + 13396 0050 9BB2 uxth r3, r3 + 13397 0052 6385 strh r3, [r4, #42] @ movhi + 13398 .LVL977: + 13399 .L870: +5067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13400 .loc 1 5067 3 is_stmt 1 view .LVU4720 +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13401 .loc 1 5069 3 view .LVU4721 +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13402 .loc 1 5069 6 is_stmt 0 view .LVU4722 + 13403 0054 15F0200F tst r5, #32 + 13404 0058 03D0 beq .L879 +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13405 .loc 1 5069 61 discriminator 1 view .LVU4723 + 13406 005a 16F0200F tst r6, #32 + 13407 005e 40F08880 bne .L887 + 13408 .L879: +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13409 .loc 1 5077 3 is_stmt 1 view .LVU4724 +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13410 .loc 1 5077 3 view .LVU4725 + 13411 0062 0020 movs r0, #0 + 13412 0064 84F84000 strb r0, [r4, #64] +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13413 .loc 1 5077 3 view .LVU4726 +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13414 .loc 1 5079 3 view .LVU4727 +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13415 .loc 1 5080 1 is_stmt 0 view .LVU4728 + 13416 0068 02B0 add sp, sp, #8 + 13417 .cfi_remember_state + 13418 .cfi_def_cfa_offset 16 + 13419 @ sp needed + 13420 006a 70BD pop {r4, r5, r6, pc} + 13421 .LVL978: + 13422 .L886: + 13423 .cfi_restore_state +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13424 .loc 1 4966 5 is_stmt 1 view .LVU4729 + 13425 006c 0368 ldr r3, [r0] + 13426 006e 1022 movs r2, #16 + 13427 .LVL979: +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13428 .loc 1 4966 5 is_stmt 0 view .LVU4730 + 13429 0070 DA61 str r2, [r3, #28] +4971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13430 .loc 1 4971 5 is_stmt 1 view .LVU4731 +4971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13431 .loc 1 4971 9 is_stmt 0 view .LVU4732 + 13432 0072 436C ldr r3, [r0, #68] +4971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13433 .loc 1 4971 21 view .LVU4733 + 13434 0074 43F00403 orr r3, r3, #4 + 13435 0078 4364 str r3, [r0, #68] +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13436 .loc 1 4974 5 is_stmt 1 view .LVU4734 + 13437 007a FFF7FEFF bl I2C_Flush_TXDR + ARM GAS /tmp/ccNVyn8W.s page 443 + + + 13438 .LVL980: +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13439 .loc 1 4974 5 is_stmt 0 view .LVU4735 + 13440 007e E9E7 b .L870 + 13441 .LVL981: + 13442 .L871: +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13443 .loc 1 4991 8 is_stmt 1 view .LVU4736 +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13444 .loc 1 4991 11 is_stmt 0 view .LVU4737 + 13445 0080 15F0020F tst r5, #2 + 13446 0084 1DD0 beq .L872 +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13447 .loc 1 4991 65 discriminator 1 view .LVU4738 + 13448 0086 16F0020F tst r6, #2 + 13449 008a 1AD0 beq .L872 +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13450 .loc 1 4994 5 is_stmt 1 view .LVU4739 +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13451 .loc 1 4994 13 is_stmt 0 view .LVU4740 + 13452 008c 236D ldr r3, [r4, #80] +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13453 .loc 1 4994 8 view .LVU4741 + 13454 008e B3F1FF3F cmp r3, #-1 + 13455 0092 06D0 beq .L888 +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13456 .loc 1 5008 7 is_stmt 1 view .LVU4742 +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13457 .loc 1 5008 11 is_stmt 0 view .LVU4743 + 13458 0094 2368 ldr r3, [r4] +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13459 .loc 1 5008 34 view .LVU4744 + 13460 0096 226D ldr r2, [r4, #80] + 13461 .LVL982: +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13462 .loc 1 5008 28 view .LVU4745 + 13463 0098 9A62 str r2, [r3, #40] +5011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13464 .loc 1 5011 7 is_stmt 1 view .LVU4746 +5011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13465 .loc 1 5011 24 is_stmt 0 view .LVU4747 + 13466 009a 4FF0FF33 mov r3, #-1 + 13467 009e 2365 str r3, [r4, #80] + 13468 00a0 D8E7 b .L870 + 13469 .LVL983: + 13470 .L888: +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13471 .loc 1 4997 7 is_stmt 1 view .LVU4748 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13472 .loc 1 4997 35 is_stmt 0 view .LVU4749 + 13473 00a2 626A ldr r2, [r4, #36] + 13474 .LVL984: +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13475 .loc 1 4997 11 view .LVU4750 + 13476 00a4 2368 ldr r3, [r4] +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13477 .loc 1 4997 30 view .LVU4751 + ARM GAS /tmp/ccNVyn8W.s page 444 + + + 13478 00a6 1278 ldrb r2, [r2] @ zero_extendqisi2 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13479 .loc 1 4997 28 view .LVU4752 + 13480 00a8 9A62 str r2, [r3, #40] +5000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13481 .loc 1 5000 7 is_stmt 1 view .LVU4753 +5000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13482 .loc 1 5000 11 is_stmt 0 view .LVU4754 + 13483 00aa 636A ldr r3, [r4, #36] +5000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13484 .loc 1 5000 21 view .LVU4755 + 13485 00ac 0133 adds r3, r3, #1 + 13486 00ae 6362 str r3, [r4, #36] +5002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13487 .loc 1 5002 7 is_stmt 1 view .LVU4756 +5002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13488 .loc 1 5002 11 is_stmt 0 view .LVU4757 + 13489 00b0 238D ldrh r3, [r4, #40] +5002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13490 .loc 1 5002 21 view .LVU4758 + 13491 00b2 013B subs r3, r3, #1 + 13492 00b4 2385 strh r3, [r4, #40] @ movhi +5003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13493 .loc 1 5003 7 is_stmt 1 view .LVU4759 +5003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13494 .loc 1 5003 11 is_stmt 0 view .LVU4760 + 13495 00b6 638D ldrh r3, [r4, #42] + 13496 00b8 9BB2 uxth r3, r3 +5003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13497 .loc 1 5003 22 view .LVU4761 + 13498 00ba 013B subs r3, r3, #1 + 13499 00bc 9BB2 uxth r3, r3 + 13500 00be 6385 strh r3, [r4, #42] @ movhi + 13501 00c0 C8E7 b .L870 + 13502 .LVL985: + 13503 .L872: +5014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13504 .loc 1 5014 8 is_stmt 1 view .LVU4762 +5014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13505 .loc 1 5014 11 is_stmt 0 view .LVU4763 + 13506 00c2 15F0800F tst r5, #128 + 13507 00c6 2AD0 beq .L874 +5014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13508 .loc 1 5014 64 discriminator 1 view .LVU4764 + 13509 00c8 16F0400F tst r6, #64 + 13510 00cc 27D0 beq .L874 +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13511 .loc 1 5017 5 is_stmt 1 view .LVU4765 +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13512 .loc 1 5017 14 is_stmt 0 view .LVU4766 + 13513 00ce 638D ldrh r3, [r4, #42] + 13514 00d0 9BB2 uxth r3, r3 +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13515 .loc 1 5017 8 view .LVU4767 + 13516 00d2 FBB1 cbz r3, .L875 +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13517 .loc 1 5017 41 discriminator 1 view .LVU4768 + ARM GAS /tmp/ccNVyn8W.s page 445 + + + 13518 00d4 238D ldrh r3, [r4, #40] +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13519 .loc 1 5017 33 discriminator 1 view .LVU4769 + 13520 00d6 EBB9 cbnz r3, .L875 +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13521 .loc 1 5019 7 is_stmt 1 view .LVU4770 +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13522 .loc 1 5019 15 is_stmt 0 view .LVU4771 + 13523 00d8 638D ldrh r3, [r4, #42] + 13524 00da 9BB2 uxth r3, r3 +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13525 .loc 1 5019 10 view .LVU4772 + 13526 00dc FF2B cmp r3, #255 + 13527 00de 0BD9 bls .L876 +5021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13528 .loc 1 5021 9 is_stmt 1 view .LVU4773 +5021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13529 .loc 1 5021 24 is_stmt 0 view .LVU4774 + 13530 00e0 FF22 movs r2, #255 + 13531 .LVL986: +5021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13532 .loc 1 5021 24 view .LVU4775 + 13533 00e2 2285 strh r2, [r4, #40] @ movhi +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13534 .loc 1 5022 9 is_stmt 1 view .LVU4776 +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13535 .loc 1 5022 48 is_stmt 0 view .LVU4777 + 13536 00e4 E16C ldr r1, [r4, #76] + 13537 .LVL987: +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13538 .loc 1 5022 9 view .LVU4778 + 13539 00e6 0023 movs r3, #0 + 13540 00e8 0093 str r3, [sp] + 13541 00ea 4FF08073 mov r3, #16777216 + 13542 00ee 89B2 uxth r1, r1 + 13543 00f0 2046 mov r0, r4 + 13544 .LVL988: +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13545 .loc 1 5022 9 view .LVU4779 + 13546 00f2 FFF7FEFF bl I2C_TransferConfig + 13547 .LVL989: + 13548 00f6 ADE7 b .L870 + 13549 .LVL990: + 13550 .L876: +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13551 .loc 1 5027 9 is_stmt 1 view .LVU4780 +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13552 .loc 1 5027 30 is_stmt 0 view .LVU4781 + 13553 00f8 628D ldrh r2, [r4, #42] + 13554 .LVL991: +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13555 .loc 1 5027 30 view .LVU4782 + 13556 00fa 92B2 uxth r2, r2 +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13557 .loc 1 5027 24 view .LVU4783 + 13558 00fc 2285 strh r2, [r4, #40] @ movhi +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + ARM GAS /tmp/ccNVyn8W.s page 446 + + + 13559 .loc 1 5028 9 is_stmt 1 view .LVU4784 +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13560 .loc 1 5028 48 is_stmt 0 view .LVU4785 + 13561 00fe E16C ldr r1, [r4, #76] + 13562 .LVL992: +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13563 .loc 1 5028 9 view .LVU4786 + 13564 0100 0023 movs r3, #0 + 13565 0102 0093 str r3, [sp] + 13566 0104 4FF00073 mov r3, #33554432 + 13567 0108 D2B2 uxtb r2, r2 + 13568 010a 89B2 uxth r1, r1 + 13569 010c 2046 mov r0, r4 + 13570 .LVL993: +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13571 .loc 1 5028 9 view .LVU4787 + 13572 010e FFF7FEFF bl I2C_TransferConfig + 13573 .LVL994: + 13574 0112 9FE7 b .L870 + 13575 .LVL995: + 13576 .L875: +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13577 .loc 1 5036 7 is_stmt 1 view .LVU4788 + 13578 0114 4021 movs r1, #64 + 13579 .LVL996: +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13580 .loc 1 5036 7 is_stmt 0 view .LVU4789 + 13581 0116 2046 mov r0, r4 + 13582 .LVL997: +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13583 .loc 1 5036 7 view .LVU4790 + 13584 0118 FFF7FEFF bl I2C_ITError + 13585 .LVL998: +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13586 .loc 1 5036 7 view .LVU4791 + 13587 011c 9AE7 b .L870 + 13588 .LVL999: + 13589 .L874: +5039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13590 .loc 1 5039 8 is_stmt 1 view .LVU4792 +5039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13591 .loc 1 5039 11 is_stmt 0 view .LVU4793 + 13592 011e 15F0400F tst r5, #64 + 13593 0122 97D0 beq .L870 +5039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13594 .loc 1 5039 63 discriminator 1 view .LVU4794 + 13595 0124 16F0400F tst r6, #64 + 13596 0128 94D0 beq .L870 +5042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13597 .loc 1 5042 5 is_stmt 1 view .LVU4795 +5042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13598 .loc 1 5042 13 is_stmt 0 view .LVU4796 + 13599 012a 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 13600 012e DBB2 uxtb r3, r3 +5042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13601 .loc 1 5042 8 view .LVU4797 + 13602 0130 222B cmp r3, #34 + ARM GAS /tmp/ccNVyn8W.s page 447 + + + 13603 0132 0FD0 beq .L881 +4956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 13604 .loc 1 4956 12 view .LVU4798 + 13605 0134 1248 ldr r0, .L889 + 13606 .LVL1000: + 13607 .L877: +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13608 .loc 1 5047 5 is_stmt 1 view .LVU4799 +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13609 .loc 1 5047 13 is_stmt 0 view .LVU4800 + 13610 0136 638D ldrh r3, [r4, #42] + 13611 0138 9BB2 uxth r3, r3 +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13612 .loc 1 5047 8 view .LVU4801 + 13613 013a FF2B cmp r3, #255 + 13614 013c 0CD9 bls .L878 +5049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13615 .loc 1 5049 7 is_stmt 1 view .LVU4802 +5049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13616 .loc 1 5049 22 is_stmt 0 view .LVU4803 + 13617 013e FF22 movs r2, #255 + 13618 .LVL1001: +5049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13619 .loc 1 5049 22 view .LVU4804 + 13620 0140 2285 strh r2, [r4, #40] @ movhi +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13621 .loc 1 5052 7 is_stmt 1 view .LVU4805 +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13622 .loc 1 5052 46 is_stmt 0 view .LVU4806 + 13623 0142 E16C ldr r1, [r4, #76] + 13624 .LVL1002: +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13625 .loc 1 5052 7 view .LVU4807 + 13626 0144 0090 str r0, [sp] + 13627 0146 4FF08073 mov r3, #16777216 + 13628 014a 89B2 uxth r1, r1 + 13629 014c 2046 mov r0, r4 + 13630 .LVL1003: +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13631 .loc 1 5052 7 view .LVU4808 + 13632 014e FFF7FEFF bl I2C_TransferConfig + 13633 .LVL1004: +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13634 .loc 1 5052 7 view .LVU4809 + 13635 0152 7FE7 b .L870 + 13636 .LVL1005: + 13637 .L881: +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13638 .loc 1 5044 17 view .LVU4810 + 13639 0154 0B48 ldr r0, .L889+4 + 13640 .LVL1006: +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13641 .loc 1 5044 17 view .LVU4811 + 13642 0156 EEE7 b .L877 + 13643 .LVL1007: + 13644 .L878: +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccNVyn8W.s page 448 + + + 13645 .loc 1 5057 7 is_stmt 1 view .LVU4812 +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13646 .loc 1 5057 28 is_stmt 0 view .LVU4813 + 13647 0158 628D ldrh r2, [r4, #42] + 13648 .LVL1008: +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13649 .loc 1 5057 28 view .LVU4814 + 13650 015a 92B2 uxth r2, r2 +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13651 .loc 1 5057 22 view .LVU4815 + 13652 015c 2285 strh r2, [r4, #40] @ movhi +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13653 .loc 1 5060 7 is_stmt 1 view .LVU4816 +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13654 .loc 1 5060 46 is_stmt 0 view .LVU4817 + 13655 015e E16C ldr r1, [r4, #76] + 13656 .LVL1009: +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13657 .loc 1 5060 7 view .LVU4818 + 13658 0160 0090 str r0, [sp] + 13659 0162 4FF00073 mov r3, #33554432 + 13660 0166 D2B2 uxtb r2, r2 + 13661 0168 89B2 uxth r1, r1 + 13662 016a 2046 mov r0, r4 + 13663 .LVL1010: +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13664 .loc 1 5060 7 view .LVU4819 + 13665 016c FFF7FEFF bl I2C_TransferConfig + 13666 .LVL1011: +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13667 .loc 1 5060 7 view .LVU4820 + 13668 0170 70E7 b .L870 + 13669 .LVL1012: + 13670 .L887: +5073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13671 .loc 1 5073 5 is_stmt 1 view .LVU4821 + 13672 0172 2946 mov r1, r5 + 13673 0174 2046 mov r0, r4 + 13674 0176 FFF7FEFF bl I2C_ITMasterCplt + 13675 .LVL1013: + 13676 017a 72E7 b .L879 + 13677 .LVL1014: + 13678 .L880: + 13679 .cfi_def_cfa_offset 0 + 13680 .cfi_restore 4 + 13681 .cfi_restore 5 + 13682 .cfi_restore 6 + 13683 .cfi_restore 14 +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13684 .loc 1 4960 3 is_stmt 0 discriminator 1 view .LVU4822 + 13685 017c 0220 movs r0, #2 + 13686 .LVL1015: +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13687 .loc 1 5080 1 view .LVU4823 + 13688 017e 7047 bx lr + 13689 .L890: + 13690 .align 2 + ARM GAS /tmp/ccNVyn8W.s page 449 + + + 13691 .L889: + 13692 0180 00200080 .word -2147475456 + 13693 0184 00240080 .word -2147474432 + 13694 .cfi_endproc + 13695 .LFE180: + 13697 .section .text.HAL_I2C_ER_IRQHandler,"ax",%progbits + 13698 .align 1 + 13699 .global HAL_I2C_ER_IRQHandler + 13700 .syntax unified + 13701 .thumb + 13702 .thumb_func + 13704 HAL_I2C_ER_IRQHandler: + 13705 .LVL1016: + 13706 .LFB165: +4526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 13707 .loc 1 4526 1 is_stmt 1 view -0 + 13708 .cfi_startproc + 13709 @ args = 0, pretend = 0, frame = 0 + 13710 @ frame_needed = 0, uses_anonymous_args = 0 +4526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 13711 .loc 1 4526 1 is_stmt 0 view .LVU4825 + 13712 0000 10B5 push {r4, lr} + 13713 .cfi_def_cfa_offset 8 + 13714 .cfi_offset 4, -8 + 13715 .cfi_offset 14, -4 +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 13716 .loc 1 4527 3 is_stmt 1 view .LVU4826 +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 13717 .loc 1 4527 24 is_stmt 0 view .LVU4827 + 13718 0002 0268 ldr r2, [r0] +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 13719 .loc 1 4527 12 view .LVU4828 + 13720 0004 9369 ldr r3, [r2, #24] + 13721 .LVL1017: +4528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 13722 .loc 1 4528 3 is_stmt 1 view .LVU4829 +4528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 13723 .loc 1 4528 12 is_stmt 0 view .LVU4830 + 13724 0006 1168 ldr r1, [r2] + 13725 .LVL1018: +4529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13726 .loc 1 4529 3 is_stmt 1 view .LVU4831 +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13727 .loc 1 4532 3 view .LVU4832 +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13728 .loc 1 4532 6 is_stmt 0 view .LVU4833 + 13729 0008 13F4807F tst r3, #256 + 13730 000c 09D0 beq .L892 +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13731 .loc 1 4532 57 discriminator 1 view .LVU4834 + 13732 000e 11F0800F tst r1, #128 + 13733 0012 06D0 beq .L892 +4535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13734 .loc 1 4535 5 is_stmt 1 view .LVU4835 +4535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13735 .loc 1 4535 9 is_stmt 0 view .LVU4836 + 13736 0014 446C ldr r4, [r0, #68] + ARM GAS /tmp/ccNVyn8W.s page 450 + + +4535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13737 .loc 1 4535 21 view .LVU4837 + 13738 0016 44F00104 orr r4, r4, #1 + 13739 001a 4464 str r4, [r0, #68] +4538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13740 .loc 1 4538 5 is_stmt 1 view .LVU4838 + 13741 001c 4FF48074 mov r4, #256 + 13742 0020 D461 str r4, [r2, #28] + 13743 .L892: +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13744 .loc 1 4542 3 view .LVU4839 +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13745 .loc 1 4542 6 is_stmt 0 view .LVU4840 + 13746 0022 13F4806F tst r3, #1024 + 13747 0026 0AD0 beq .L893 +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13748 .loc 1 4542 56 discriminator 1 view .LVU4841 + 13749 0028 11F0800F tst r1, #128 + 13750 002c 07D0 beq .L893 +4545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13751 .loc 1 4545 5 is_stmt 1 view .LVU4842 +4545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13752 .loc 1 4545 9 is_stmt 0 view .LVU4843 + 13753 002e 426C ldr r2, [r0, #68] +4545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13754 .loc 1 4545 21 view .LVU4844 + 13755 0030 42F00802 orr r2, r2, #8 + 13756 0034 4264 str r2, [r0, #68] +4548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13757 .loc 1 4548 5 is_stmt 1 view .LVU4845 + 13758 0036 0268 ldr r2, [r0] + 13759 0038 4FF48064 mov r4, #1024 + 13760 003c D461 str r4, [r2, #28] + 13761 .L893: +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13762 .loc 1 4552 3 view .LVU4846 +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13763 .loc 1 4552 6 is_stmt 0 view .LVU4847 + 13764 003e 13F4007F tst r3, #512 + 13765 0042 0AD0 beq .L894 +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 13766 .loc 1 4552 57 discriminator 1 view .LVU4848 + 13767 0044 11F0800F tst r1, #128 + 13768 0048 07D0 beq .L894 +4555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13769 .loc 1 4555 5 is_stmt 1 view .LVU4849 +4555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13770 .loc 1 4555 9 is_stmt 0 view .LVU4850 + 13771 004a 436C ldr r3, [r0, #68] + 13772 .LVL1019: +4555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13773 .loc 1 4555 21 view .LVU4851 + 13774 004c 43F00203 orr r3, r3, #2 + 13775 0050 4364 str r3, [r0, #68] +4558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13776 .loc 1 4558 5 is_stmt 1 view .LVU4852 + 13777 0052 0368 ldr r3, [r0] + ARM GAS /tmp/ccNVyn8W.s page 451 + + + 13778 0054 4FF40072 mov r2, #512 + 13779 0058 DA61 str r2, [r3, #28] + 13780 .L894: +4562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13781 .loc 1 4562 3 view .LVU4853 +4562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13782 .loc 1 4562 12 is_stmt 0 view .LVU4854 + 13783 005a 416C ldr r1, [r0, #68] + 13784 .LVL1020: +4565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13785 .loc 1 4565 3 is_stmt 1 view .LVU4855 +4565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13786 .loc 1 4565 6 is_stmt 0 view .LVU4856 + 13787 005c 11F00B0F tst r1, #11 + 13788 0060 00D1 bne .L897 + 13789 .LVL1021: + 13790 .L891: +4569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13791 .loc 1 4569 1 view .LVU4857 + 13792 0062 10BD pop {r4, pc} + 13793 .LVL1022: + 13794 .L897: +4567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13795 .loc 1 4567 5 is_stmt 1 view .LVU4858 + 13796 0064 FFF7FEFF bl I2C_ITError + 13797 .LVL1023: +4569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13798 .loc 1 4569 1 is_stmt 0 view .LVU4859 + 13799 0068 FBE7 b .L891 + 13800 .cfi_endproc + 13801 .LFE165: + 13803 .section .text.I2C_DMAAbort,"ax",%progbits + 13804 .align 1 + 13805 .syntax unified + 13806 .thumb + 13807 .thumb_func + 13809 I2C_DMAAbort: + 13810 .LVL1024: + 13811 .LFB201: +6704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13812 .loc 1 6704 1 is_stmt 1 view -0 + 13813 .cfi_startproc + 13814 @ args = 0, pretend = 0, frame = 0 + 13815 @ frame_needed = 0, uses_anonymous_args = 0 +6704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13816 .loc 1 6704 1 is_stmt 0 view .LVU4861 + 13817 0000 08B5 push {r3, lr} + 13818 .cfi_def_cfa_offset 8 + 13819 .cfi_offset 3, -8 + 13820 .cfi_offset 14, -4 +6706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13821 .loc 1 6706 3 is_stmt 1 view .LVU4862 +6706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13822 .loc 1 6706 22 is_stmt 0 view .LVU4863 + 13823 0002 406A ldr r0, [r0, #36] + 13824 .LVL1025: +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccNVyn8W.s page 452 + + + 13825 .loc 1 6709 3 is_stmt 1 view .LVU4864 +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13826 .loc 1 6709 11 is_stmt 0 view .LVU4865 + 13827 0004 836B ldr r3, [r0, #56] +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13828 .loc 1 6709 6 view .LVU4866 + 13829 0006 0BB1 cbz r3, .L899 +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13830 .loc 1 6711 5 is_stmt 1 view .LVU4867 +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13831 .loc 1 6711 37 is_stmt 0 view .LVU4868 + 13832 0008 0022 movs r2, #0 + 13833 000a 5A63 str r2, [r3, #52] + 13834 .L899: +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13835 .loc 1 6713 3 is_stmt 1 view .LVU4869 +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13836 .loc 1 6713 11 is_stmt 0 view .LVU4870 + 13837 000c C36B ldr r3, [r0, #60] +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13838 .loc 1 6713 6 view .LVU4871 + 13839 000e 0BB1 cbz r3, .L900 +6715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13840 .loc 1 6715 5 is_stmt 1 view .LVU4872 +6715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13841 .loc 1 6715 37 is_stmt 0 view .LVU4873 + 13842 0010 0022 movs r2, #0 + 13843 0012 5A63 str r2, [r3, #52] + 13844 .L900: +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13845 .loc 1 6718 3 is_stmt 1 view .LVU4874 + 13846 0014 FFF7FEFF bl I2C_TreatErrorCallback + 13847 .LVL1026: +6719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13848 .loc 1 6719 1 is_stmt 0 view .LVU4875 + 13849 0018 08BD pop {r3, pc} + 13850 .cfi_endproc + 13851 .LFE201: + 13853 .section .text.HAL_I2C_GetState,"ax",%progbits + 13854 .align 1 + 13855 .global HAL_I2C_GetState + 13856 .syntax unified + 13857 .thumb + 13858 .thumb_func + 13860 HAL_I2C_GetState: + 13861 .LVL1027: + 13862 .LFB176: +4760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return I2C handle state */ + 13863 .loc 1 4760 1 is_stmt 1 view -0 + 13864 .cfi_startproc + 13865 @ args = 0, pretend = 0, frame = 0 + 13866 @ frame_needed = 0, uses_anonymous_args = 0 + 13867 @ link register save eliminated. +4762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13868 .loc 1 4762 3 view .LVU4877 +4762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13869 .loc 1 4762 14 is_stmt 0 view .LVU4878 + ARM GAS /tmp/ccNVyn8W.s page 453 + + + 13870 0000 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 13871 .LVL1028: +4763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13872 .loc 1 4763 1 view .LVU4879 + 13873 0004 7047 bx lr + 13874 .cfi_endproc + 13875 .LFE176: + 13877 .section .text.HAL_I2C_GetMode,"ax",%progbits + 13878 .align 1 + 13879 .global HAL_I2C_GetMode + 13880 .syntax unified + 13881 .thumb + 13882 .thumb_func + 13884 HAL_I2C_GetMode: + 13885 .LVL1029: + 13886 .LFB177: +4772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->Mode; + 13887 .loc 1 4772 1 is_stmt 1 view -0 + 13888 .cfi_startproc + 13889 @ args = 0, pretend = 0, frame = 0 + 13890 @ frame_needed = 0, uses_anonymous_args = 0 + 13891 @ link register save eliminated. +4773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13892 .loc 1 4773 3 view .LVU4881 +4773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13893 .loc 1 4773 14 is_stmt 0 view .LVU4882 + 13894 0000 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 13895 .LVL1030: +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13896 .loc 1 4774 1 view .LVU4883 + 13897 0004 7047 bx lr + 13898 .cfi_endproc + 13899 .LFE177: + 13901 .section .text.HAL_I2C_GetError,"ax",%progbits + 13902 .align 1 + 13903 .global HAL_I2C_GetError + 13904 .syntax unified + 13905 .thumb + 13906 .thumb_func + 13908 HAL_I2C_GetError: + 13909 .LVL1031: + 13910 .LFB178: +4783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->ErrorCode; + 13911 .loc 1 4783 1 is_stmt 1 view -0 + 13912 .cfi_startproc + 13913 @ args = 0, pretend = 0, frame = 0 + 13914 @ frame_needed = 0, uses_anonymous_args = 0 + 13915 @ link register save eliminated. +4784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13916 .loc 1 4784 3 view .LVU4885 +4784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13917 .loc 1 4784 14 is_stmt 0 view .LVU4886 + 13918 0000 406C ldr r0, [r0, #68] + 13919 .LVL1032: +4785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13920 .loc 1 4785 1 view .LVU4887 + 13921 0002 7047 bx lr + ARM GAS /tmp/ccNVyn8W.s page 454 + + + 13922 .cfi_endproc + 13923 .LFE178: + 13925 .text + 13926 .Letext0: + 13927 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 13928 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 13929 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 13930 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 13931 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 13932 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 13933 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + 13934 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccNVyn8W.s page 455 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_i2c.c + /tmp/ccNVyn8W.s:21 .text.I2C_Flush_TXDR:00000000 $t + /tmp/ccNVyn8W.s:26 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR + /tmp/ccNVyn8W.s:64 .text.I2C_TransferConfig:00000000 $t + /tmp/ccNVyn8W.s:69 .text.I2C_TransferConfig:00000000 I2C_TransferConfig + /tmp/ccNVyn8W.s:125 .text.I2C_Enable_IRQ:00000000 $t + /tmp/ccNVyn8W.s:130 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ + /tmp/ccNVyn8W.s:317 .text.I2C_Enable_IRQ:000000a8 $d + /tmp/ccNVyn8W.s:12753 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA + /tmp/ccNVyn8W.s:12469 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA + /tmp/ccNVyn8W.s:12107 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA + /tmp/ccNVyn8W.s:324 .text.I2C_Disable_IRQ:00000000 $t + /tmp/ccNVyn8W.s:329 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ + /tmp/ccNVyn8W.s:453 .text.I2C_ConvertOtherXferOptions:00000000 $t + /tmp/ccNVyn8W.s:458 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions + /tmp/ccNVyn8W.s:499 .text.I2C_IsErrorOccurred:00000000 $t + /tmp/ccNVyn8W.s:504 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred + /tmp/ccNVyn8W.s:780 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t + /tmp/ccNVyn8W.s:785 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout + /tmp/ccNVyn8W.s:882 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t + /tmp/ccNVyn8W.s:887 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout + /tmp/ccNVyn8W.s:983 .text.I2C_RequestMemoryWrite:00000000 $t + /tmp/ccNVyn8W.s:988 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite + /tmp/ccNVyn8W.s:1103 .text.I2C_RequestMemoryWrite:00000078 $d + /tmp/ccNVyn8W.s:1108 .text.I2C_RequestMemoryRead:00000000 $t + /tmp/ccNVyn8W.s:1113 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead + /tmp/ccNVyn8W.s:1228 .text.I2C_RequestMemoryRead:00000074 $d + /tmp/ccNVyn8W.s:1233 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t + /tmp/ccNVyn8W.s:1238 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout + /tmp/ccNVyn8W.s:1335 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t + /tmp/ccNVyn8W.s:1340 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout + /tmp/ccNVyn8W.s:1503 .text.HAL_I2C_MspInit:00000000 $t + /tmp/ccNVyn8W.s:1509 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit + /tmp/ccNVyn8W.s:1524 .text.HAL_I2C_Init:00000000 $t + /tmp/ccNVyn8W.s:1530 .text.HAL_I2C_Init:00000000 HAL_I2C_Init + /tmp/ccNVyn8W.s:1720 .text.HAL_I2C_MspDeInit:00000000 $t + /tmp/ccNVyn8W.s:1726 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit + /tmp/ccNVyn8W.s:1741 .text.HAL_I2C_DeInit:00000000 $t + /tmp/ccNVyn8W.s:1747 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit + /tmp/ccNVyn8W.s:1810 .text.HAL_I2C_Master_Transmit:00000000 $t + /tmp/ccNVyn8W.s:1816 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit + /tmp/ccNVyn8W.s:2122 .text.HAL_I2C_Master_Transmit:00000178 $d + /tmp/ccNVyn8W.s:2127 .text.HAL_I2C_Master_Receive:00000000 $t + /tmp/ccNVyn8W.s:2133 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive + /tmp/ccNVyn8W.s:2438 .text.HAL_I2C_Master_Receive:00000178 $d + /tmp/ccNVyn8W.s:2443 .text.HAL_I2C_Slave_Transmit:00000000 $t + /tmp/ccNVyn8W.s:2449 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit + /tmp/ccNVyn8W.s:2855 .text.HAL_I2C_Slave_Receive:00000000 $t + /tmp/ccNVyn8W.s:2861 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive + /tmp/ccNVyn8W.s:3205 .text.HAL_I2C_Master_Transmit_IT:00000000 $t + /tmp/ccNVyn8W.s:3211 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT + /tmp/ccNVyn8W.s:3360 .text.HAL_I2C_Master_Transmit_IT:0000008c $d + /tmp/ccNVyn8W.s:11732 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT + /tmp/ccNVyn8W.s:3367 .text.HAL_I2C_Master_Receive_IT:00000000 $t + /tmp/ccNVyn8W.s:3373 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT + /tmp/ccNVyn8W.s:3522 .text.HAL_I2C_Master_Receive_IT:0000008c $d + ARM GAS /tmp/ccNVyn8W.s page 456 + + + /tmp/ccNVyn8W.s:3529 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t + /tmp/ccNVyn8W.s:3535 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT + /tmp/ccNVyn8W.s:3677 .text.HAL_I2C_Slave_Transmit_IT:00000084 $d + /tmp/ccNVyn8W.s:11164 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT + /tmp/ccNVyn8W.s:3683 .text.HAL_I2C_Slave_Receive_IT:00000000 $t + /tmp/ccNVyn8W.s:3689 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT + /tmp/ccNVyn8W.s:3791 .text.HAL_I2C_Slave_Receive_IT:0000005c $d + /tmp/ccNVyn8W.s:3797 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t + /tmp/ccNVyn8W.s:3803 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA + /tmp/ccNVyn8W.s:4101 .text.HAL_I2C_Master_Transmit_DMA:0000013c $d + /tmp/ccNVyn8W.s:13105 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt + /tmp/ccNVyn8W.s:13066 .text.I2C_DMAError:00000000 I2C_DMAError + /tmp/ccNVyn8W.s:4111 .text.HAL_I2C_Master_Receive_DMA:00000000 $t + /tmp/ccNVyn8W.s:4117 .text.HAL_I2C_Master_Receive_DMA:00000000 HAL_I2C_Master_Receive_DMA + /tmp/ccNVyn8W.s:4415 .text.HAL_I2C_Master_Receive_DMA:00000138 $d + /tmp/ccNVyn8W.s:13212 .text.I2C_DMAMasterReceiveCplt:00000000 I2C_DMAMasterReceiveCplt + /tmp/ccNVyn8W.s:4425 .text.HAL_I2C_Slave_Transmit_DMA:00000000 $t + /tmp/ccNVyn8W.s:4431 .text.HAL_I2C_Slave_Transmit_DMA:00000000 HAL_I2C_Slave_Transmit_DMA + /tmp/ccNVyn8W.s:4734 .text.HAL_I2C_Slave_Transmit_DMA:00000130 $d + /tmp/ccNVyn8W.s:9971 .text.I2C_DMASlaveTransmitCplt:00000000 I2C_DMASlaveTransmitCplt + /tmp/ccNVyn8W.s:4742 .text.HAL_I2C_Slave_Receive_DMA:00000000 $t + /tmp/ccNVyn8W.s:4748 .text.HAL_I2C_Slave_Receive_DMA:00000000 HAL_I2C_Slave_Receive_DMA + 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.text.HAL_I2C_Master_Seq_Transmit_DMA:00000160 $d + /tmp/ccNVyn8W.s:7548 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 $t + /tmp/ccNVyn8W.s:7554 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 HAL_I2C_Master_Seq_Receive_IT + /tmp/ccNVyn8W.s:7743 .text.HAL_I2C_Master_Seq_Receive_IT:000000ac $d + /tmp/ccNVyn8W.s:7749 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 $t + /tmp/ccNVyn8W.s:7755 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 HAL_I2C_Master_Seq_Receive_DMA + /tmp/ccNVyn8W.s:8084 .text.HAL_I2C_Master_Seq_Receive_DMA:00000160 $d + /tmp/ccNVyn8W.s:8093 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 $t + ARM GAS /tmp/ccNVyn8W.s page 457 + + + /tmp/ccNVyn8W.s:8099 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 HAL_I2C_Slave_Seq_Transmit_IT + /tmp/ccNVyn8W.s:8309 .text.HAL_I2C_Slave_Seq_Transmit_IT:000000d8 $d + /tmp/ccNVyn8W.s:13809 .text.I2C_DMAAbort:00000000 I2C_DMAAbort + /tmp/ccNVyn8W.s:8315 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 $t + /tmp/ccNVyn8W.s:8321 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 HAL_I2C_Slave_Seq_Transmit_DMA + /tmp/ccNVyn8W.s:8711 .text.HAL_I2C_Slave_Seq_Transmit_DMA:0000019c $d + /tmp/ccNVyn8W.s:8719 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t + /tmp/ccNVyn8W.s:8725 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT + /tmp/ccNVyn8W.s:8935 .text.HAL_I2C_Slave_Seq_Receive_IT:000000d8 $d + /tmp/ccNVyn8W.s:8941 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t + /tmp/ccNVyn8W.s:8947 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA + /tmp/ccNVyn8W.s:9334 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000198 $d + /tmp/ccNVyn8W.s:9342 .text.HAL_I2C_EnableListen_IT:00000000 $t + /tmp/ccNVyn8W.s:9348 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT + /tmp/ccNVyn8W.s:9394 .text.HAL_I2C_EnableListen_IT:00000028 $d + /tmp/ccNVyn8W.s:9399 .text.HAL_I2C_DisableListen_IT:00000000 $t + /tmp/ccNVyn8W.s:9405 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT + /tmp/ccNVyn8W.s:9470 .text.HAL_I2C_Master_Abort_IT:00000000 $t + /tmp/ccNVyn8W.s:9476 .text.HAL_I2C_Master_Abort_IT:00000000 HAL_I2C_Master_Abort_IT + /tmp/ccNVyn8W.s:9613 .text.HAL_I2C_Master_Abort_IT:00000080 $d + /tmp/ccNVyn8W.s:9618 .text.HAL_I2C_EV_IRQHandler:00000000 $t + /tmp/ccNVyn8W.s:9624 .text.HAL_I2C_EV_IRQHandler:00000000 HAL_I2C_EV_IRQHandler + /tmp/ccNVyn8W.s:9661 .text.HAL_I2C_MasterTxCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:9667 .text.HAL_I2C_MasterTxCpltCallback:00000000 HAL_I2C_MasterTxCpltCallback + /tmp/ccNVyn8W.s:9682 .text.HAL_I2C_MasterRxCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:9688 .text.HAL_I2C_MasterRxCpltCallback:00000000 HAL_I2C_MasterRxCpltCallback + /tmp/ccNVyn8W.s:9703 .text.I2C_ITMasterSeqCplt:00000000 $t + /tmp/ccNVyn8W.s:9708 .text.I2C_ITMasterSeqCplt:00000000 I2C_ITMasterSeqCplt + /tmp/ccNVyn8W.s:9792 .text.HAL_I2C_SlaveTxCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:9798 .text.HAL_I2C_SlaveTxCpltCallback:00000000 HAL_I2C_SlaveTxCpltCallback + /tmp/ccNVyn8W.s:9813 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:9819 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback + /tmp/ccNVyn8W.s:9834 .text.I2C_ITSlaveSeqCplt:00000000 $t + /tmp/ccNVyn8W.s:9839 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt + /tmp/ccNVyn8W.s:9966 .text.I2C_DMASlaveTransmitCplt:00000000 $t + /tmp/ccNVyn8W.s:10017 .text.I2C_DMASlaveReceiveCplt:00000000 $t + /tmp/ccNVyn8W.s:10077 .text.HAL_I2C_AddrCallback:00000000 $t + /tmp/ccNVyn8W.s:10083 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback + /tmp/ccNVyn8W.s:10100 .text.I2C_ITAddrCplt:00000000 $t + /tmp/ccNVyn8W.s:10105 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt + /tmp/ccNVyn8W.s:10264 .text.HAL_I2C_ListenCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:10270 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback + /tmp/ccNVyn8W.s:10285 .text.I2C_ITListenCplt:00000000 $t + /tmp/ccNVyn8W.s:10290 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt + /tmp/ccNVyn8W.s:10393 .text.I2C_ITListenCplt:00000064 $d + /tmp/ccNVyn8W.s:10398 .text.HAL_I2C_MemTxCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:10404 .text.HAL_I2C_MemTxCpltCallback:00000000 HAL_I2C_MemTxCpltCallback + /tmp/ccNVyn8W.s:10419 .text.HAL_I2C_MemRxCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:10425 .text.HAL_I2C_MemRxCpltCallback:00000000 HAL_I2C_MemRxCpltCallback + /tmp/ccNVyn8W.s:10440 .text.HAL_I2C_ErrorCallback:00000000 $t + /tmp/ccNVyn8W.s:10446 .text.HAL_I2C_ErrorCallback:00000000 HAL_I2C_ErrorCallback + /tmp/ccNVyn8W.s:10461 .text.HAL_I2C_AbortCpltCallback:00000000 $t + /tmp/ccNVyn8W.s:10467 .text.HAL_I2C_AbortCpltCallback:00000000 HAL_I2C_AbortCpltCallback + /tmp/ccNVyn8W.s:10482 .text.I2C_TreatErrorCallback:00000000 $t + /tmp/ccNVyn8W.s:10487 .text.I2C_TreatErrorCallback:00000000 I2C_TreatErrorCallback + /tmp/ccNVyn8W.s:10543 .text.I2C_ITError:00000000 $t + /tmp/ccNVyn8W.s:10548 .text.I2C_ITError:00000000 I2C_ITError + ARM GAS /tmp/ccNVyn8W.s page 458 + + + /tmp/ccNVyn8W.s:10826 .text.I2C_ITError:00000124 $d + /tmp/ccNVyn8W.s:10833 .text.I2C_ITSlaveCplt:00000000 $t + /tmp/ccNVyn8W.s:10838 .text.I2C_ITSlaveCplt:00000000 I2C_ITSlaveCplt + /tmp/ccNVyn8W.s:10878 .text.I2C_ITSlaveCplt:0000001c $d + /tmp/ccNVyn8W.s:10888 .text.I2C_ITSlaveCplt:00000026 $t + /tmp/ccNVyn8W.s:11154 .text.I2C_ITSlaveCplt:00000160 $d + /tmp/ccNVyn8W.s:11159 .text.I2C_Slave_ISR_IT:00000000 $t + /tmp/ccNVyn8W.s:11454 .text.I2C_ITMasterCplt:00000000 $t + /tmp/ccNVyn8W.s:11459 .text.I2C_ITMasterCplt:00000000 I2C_ITMasterCplt + /tmp/ccNVyn8W.s:11727 .text.I2C_Master_ISR_IT:00000000 $t + /tmp/ccNVyn8W.s:12102 .text.I2C_Mem_ISR_DMA:00000000 $t + /tmp/ccNVyn8W.s:12458 .text.I2C_Mem_ISR_DMA:0000018c $d + /tmp/ccNVyn8W.s:12464 .text.I2C_Slave_ISR_DMA:00000000 $t + /tmp/ccNVyn8W.s:12609 .text.I2C_Slave_ISR_DMA:00000096 $d + /tmp/ccNVyn8W.s:12620 .text.I2C_Slave_ISR_DMA:000000a0 $t + /tmp/ccNVyn8W.s:12748 .text.I2C_Master_ISR_DMA:00000000 $t + /tmp/ccNVyn8W.s:13061 .text.I2C_DMAError:00000000 $t + /tmp/ccNVyn8W.s:13100 .text.I2C_DMAMasterTransmitCplt:00000000 $t + /tmp/ccNVyn8W.s:13207 .text.I2C_DMAMasterReceiveCplt:00000000 $t + /tmp/ccNVyn8W.s:13314 .text.I2C_Mem_ISR_IT:00000000 $t + /tmp/ccNVyn8W.s:13692 .text.I2C_Mem_ISR_IT:00000180 $d + /tmp/ccNVyn8W.s:13698 .text.HAL_I2C_ER_IRQHandler:00000000 $t + /tmp/ccNVyn8W.s:13704 .text.HAL_I2C_ER_IRQHandler:00000000 HAL_I2C_ER_IRQHandler + /tmp/ccNVyn8W.s:13804 .text.I2C_DMAAbort:00000000 $t + /tmp/ccNVyn8W.s:13854 .text.HAL_I2C_GetState:00000000 $t + /tmp/ccNVyn8W.s:13860 .text.HAL_I2C_GetState:00000000 HAL_I2C_GetState + /tmp/ccNVyn8W.s:13878 .text.HAL_I2C_GetMode:00000000 $t + /tmp/ccNVyn8W.s:13884 .text.HAL_I2C_GetMode:00000000 HAL_I2C_GetMode + /tmp/ccNVyn8W.s:13902 .text.HAL_I2C_GetError:00000000 $t + /tmp/ccNVyn8W.s:13908 .text.HAL_I2C_GetError:00000000 HAL_I2C_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_DMA_Start_IT +HAL_DMA_Abort_IT +HAL_DMA_GetState diff --git a/build/stm32f3xx_hal_i2c.o b/build/stm32f3xx_hal_i2c.o new file mode 100644 index 0000000..4c569ec Binary files /dev/null and b/build/stm32f3xx_hal_i2c.o differ diff --git a/build/stm32f3xx_hal_i2c_ex.d b/build/stm32f3xx_hal_i2c_ex.d new file mode 100644 index 0000000..25b6cf7 --- /dev/null +++ b/build/stm32f3xx_hal_i2c_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_i2c_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_i2c_ex.lst b/build/stm32f3xx_hal_i2c_ex.lst new file mode 100644 index 0000000..9dcc10a --- /dev/null +++ b/build/stm32f3xx_hal_i2c_ex.lst @@ -0,0 +1,915 @@ +ARM GAS /tmp/ccCBUPU1.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_i2c_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c" + 20 .section .text.HAL_I2CEx_ConfigAnalogFilter,"ax",%progbits + 21 .align 1 + 22 .global HAL_I2CEx_ConfigAnalogFilter + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_I2CEx_ConfigAnalogFilter: + 28 .LVL0: + 29 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @file stm32f3xx_hal_i2c_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * functionalities of I2C Extended peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + Filter Mode Functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + WakeUp Mode Functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + FastModePlus Functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ****************************************************************************** + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @attention + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * All rights reserved. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * in the root directory of this software component. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ****************************************************************************** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ============================================================================== + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### I2C peripheral Extended features ##### + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ============================================================================== + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] Comparing to other previous devices, the I2C interface for STM32F3xx + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** devices contains the following additional features + ARM GAS /tmp/ccCBUPU1.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Disable or enable wakeup from Stop mode(s) + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Disable or enable Fast Mode Plus + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### How to use this driver ##### + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ============================================================================== + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This driver provides functions to configure Noise Filter and Wake Up Feature + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure the enable or disable of I2C Wake Up Mode using the functions : + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableWakeUp() + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableWakeUp() + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure the enable or disable of fast mode plus driving capability using the functions : + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableFastModePlus() + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableFastModePlus() + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Includes ------------------------------------------------------------------*/ + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** #include "stm32f3xx_hal.h" + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx I2CEx + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** #ifdef HAL_I2C_MODULE_ENABLED + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private define ------------------------------------------------------------*/ + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private macro -------------------------------------------------------------*/ + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private variables ---------------------------------------------------------*/ + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private functions ---------------------------------------------------------*/ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group1 Filter Mode Functions + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Filter Mode Functions + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### Filter Mode Functions ##### + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Noise Filters + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + ARM GAS /tmp/ccCBUPU1.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter. + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter. + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 30 .loc 1 97 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 35 .loc 1 97 1 is_stmt 0 view .LVU1 + 36 0000 0346 mov r3, r0 + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 37 .loc 1 99 3 is_stmt 1 view .LVU2 + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); + 38 .loc 1 100 3 view .LVU3 + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 39 .loc 1 102 3 view .LVU4 + 40 .loc 1 102 11 is_stmt 0 view .LVU5 + 41 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 42 0006 D2B2 uxtb r2, r2 + 43 .loc 1 102 6 view .LVU6 + 44 0008 202A cmp r2, #32 + 45 000a 23D1 bne .L3 + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 46 .loc 1 105 5 is_stmt 1 view .LVU7 + 47 .loc 1 105 5 view .LVU8 + 48 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 49 0010 012A cmp r2, #1 + 50 0012 21D0 beq .L4 + 51 .loc 1 105 5 discriminator 2 view .LVU9 + 52 0014 0122 movs r2, #1 + 53 0016 80F84020 strb r2, [r0, #64] + 54 .loc 1 105 5 discriminator 2 view .LVU10 + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 55 .loc 1 107 5 view .LVU11 + 56 .loc 1 107 17 is_stmt 0 view .LVU12 + 57 001a 2422 movs r2, #36 + 58 001c 80F84120 strb r2, [r0, #65] + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 59 .loc 1 110 5 is_stmt 1 view .LVU13 + 60 0020 0068 ldr r0, [r0] + 61 .LVL1: + 62 .loc 1 110 5 is_stmt 0 view .LVU14 + ARM GAS /tmp/ccCBUPU1.s page 4 + + + 63 0022 0268 ldr r2, [r0] + 64 0024 22F00102 bic r2, r2, #1 + 65 0028 0260 str r2, [r0] + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); + 66 .loc 1 113 5 is_stmt 1 view .LVU15 + 67 .loc 1 113 9 is_stmt 0 view .LVU16 + 68 002a 1868 ldr r0, [r3] + 69 .loc 1 113 19 view .LVU17 + 70 002c 0268 ldr r2, [r0] + 71 .loc 1 113 25 view .LVU18 + 72 002e 22F48052 bic r2, r2, #4096 + 73 0032 0260 str r2, [r0] + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Set analog filter bit*/ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= AnalogFilter; + 74 .loc 1 116 5 is_stmt 1 view .LVU19 + 75 .loc 1 116 9 is_stmt 0 view .LVU20 + 76 0034 1868 ldr r0, [r3] + 77 .loc 1 116 19 view .LVU21 + 78 0036 0268 ldr r2, [r0] + 79 .loc 1 116 25 view .LVU22 + 80 0038 1143 orrs r1, r1, r2 + 81 .LVL2: + 82 .loc 1 116 25 view .LVU23 + 83 003a 0160 str r1, [r0] + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 84 .loc 1 118 5 is_stmt 1 view .LVU24 + 85 003c 1968 ldr r1, [r3] + 86 003e 0A68 ldr r2, [r1] + 87 0040 42F00102 orr r2, r2, #1 + 88 0044 0A60 str r2, [r1] + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 89 .loc 1 120 5 view .LVU25 + 90 .loc 1 120 17 is_stmt 0 view .LVU26 + 91 0046 2022 movs r2, #32 + 92 0048 83F84120 strb r2, [r3, #65] + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 93 .loc 1 123 5 is_stmt 1 view .LVU27 + 94 .loc 1 123 5 view .LVU28 + 95 004c 0020 movs r0, #0 + 96 004e 83F84000 strb r0, [r3, #64] + 97 .loc 1 123 5 view .LVU29 + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 98 .loc 1 125 5 view .LVU30 + 99 .loc 1 125 12 is_stmt 0 view .LVU31 + 100 0052 7047 bx lr + 101 .LVL3: + 102 .L3: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + ARM GAS /tmp/ccCBUPU1.s page 5 + + + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 103 .loc 1 129 12 view .LVU32 + 104 0054 0220 movs r0, #2 + 105 .LVL4: + 106 .loc 1 129 12 view .LVU33 + 107 0056 7047 bx lr + 108 .LVL5: + 109 .L4: + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 110 .loc 1 105 5 discriminator 1 view .LVU34 + 111 0058 0220 movs r0, #2 + 112 .LVL6: + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 113 .loc 1 131 1 view .LVU35 + 114 005a 7047 bx lr + 115 .cfi_endproc + 116 .LFE130: + 118 .section .text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits + 119 .align 1 + 120 .global HAL_I2CEx_ConfigDigitalFilter + 121 .syntax unified + 122 .thumb + 123 .thumb_func + 125 HAL_I2CEx_ConfigDigitalFilter: + 126 .LVL7: + 127 .LFB131: + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Configure I2C Digital noise filter. + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 128 .loc 1 141 1 is_stmt 1 view -0 + 129 .cfi_startproc + 130 @ args = 0, pretend = 0, frame = 0 + 131 @ frame_needed = 0, uses_anonymous_args = 0 + 132 @ link register save eliminated. + 133 .loc 1 141 1 is_stmt 0 view .LVU37 + 134 0000 0346 mov r3, r0 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** uint32_t tmpreg; + 135 .loc 1 142 3 is_stmt 1 view .LVU38 + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 136 .loc 1 145 3 view .LVU39 + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); + 137 .loc 1 146 3 view .LVU40 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 138 .loc 1 148 3 view .LVU41 + 139 .loc 1 148 11 is_stmt 0 view .LVU42 + ARM GAS /tmp/ccCBUPU1.s page 6 + + + 140 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 141 0006 D2B2 uxtb r2, r2 + 142 .loc 1 148 6 view .LVU43 + 143 0008 202A cmp r2, #32 + 144 000a 21D1 bne .L7 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 145 .loc 1 151 5 is_stmt 1 view .LVU44 + 146 .loc 1 151 5 view .LVU45 + 147 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 148 0010 012A cmp r2, #1 + 149 0012 1FD0 beq .L8 + 150 .loc 1 151 5 discriminator 2 view .LVU46 + 151 0014 0122 movs r2, #1 + 152 0016 80F84020 strb r2, [r0, #64] + 153 .loc 1 151 5 discriminator 2 view .LVU47 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 154 .loc 1 153 5 view .LVU48 + 155 .loc 1 153 17 is_stmt 0 view .LVU49 + 156 001a 2422 movs r2, #36 + 157 001c 80F84120 strb r2, [r0, #65] + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 158 .loc 1 156 5 is_stmt 1 view .LVU50 + 159 0020 0068 ldr r0, [r0] + 160 .LVL8: + 161 .loc 1 156 5 is_stmt 0 view .LVU51 + 162 0022 0268 ldr r2, [r0] + 163 0024 22F00102 bic r2, r2, #1 + 164 0028 0260 str r2, [r0] + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Get the old register value */ + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg = hi2c->Instance->CR1; + 165 .loc 1 159 5 is_stmt 1 view .LVU52 + 166 .loc 1 159 18 is_stmt 0 view .LVU53 + 167 002a 1868 ldr r0, [r3] + 168 .loc 1 159 12 view .LVU54 + 169 002c 0268 ldr r2, [r0] + 170 .LVL9: + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Reset I2Cx DNF bits [11:8] */ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg &= ~(I2C_CR1_DNF); + 171 .loc 1 162 5 is_stmt 1 view .LVU55 + 172 .loc 1 162 12 is_stmt 0 view .LVU56 + 173 002e 22F47062 bic r2, r2, #3840 + 174 .LVL10: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Set I2Cx DNF coefficient */ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg |= DigitalFilter << 8U; + 175 .loc 1 165 5 is_stmt 1 view .LVU57 + 176 .loc 1 165 12 is_stmt 0 view .LVU58 + 177 0032 42EA0122 orr r2, r2, r1, lsl #8 + 178 .LVL11: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + ARM GAS /tmp/ccCBUPU1.s page 7 + + + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Store the new register value */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 = tmpreg; + 179 .loc 1 168 5 is_stmt 1 view .LVU59 + 180 .loc 1 168 25 is_stmt 0 view .LVU60 + 181 0036 0260 str r2, [r0] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 182 .loc 1 170 5 is_stmt 1 view .LVU61 + 183 0038 1968 ldr r1, [r3] + 184 .LVL12: + 185 .loc 1 170 5 is_stmt 0 view .LVU62 + 186 003a 0A68 ldr r2, [r1] + 187 .LVL13: + 188 .loc 1 170 5 view .LVU63 + 189 003c 42F00102 orr r2, r2, #1 + 190 0040 0A60 str r2, [r1] + 191 .LVL14: + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 192 .loc 1 172 5 is_stmt 1 view .LVU64 + 193 .loc 1 172 17 is_stmt 0 view .LVU65 + 194 0042 2022 movs r2, #32 + 195 0044 83F84120 strb r2, [r3, #65] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 196 .loc 1 175 5 is_stmt 1 view .LVU66 + 197 .loc 1 175 5 view .LVU67 + 198 0048 0020 movs r0, #0 + 199 004a 83F84000 strb r0, [r3, #64] + 200 .loc 1 175 5 view .LVU68 + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 201 .loc 1 177 5 view .LVU69 + 202 .loc 1 177 12 is_stmt 0 view .LVU70 + 203 004e 7047 bx lr + 204 .LVL15: + 205 .L7: + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 206 .loc 1 181 12 view .LVU71 + 207 0050 0220 movs r0, #2 + 208 .LVL16: + 209 .loc 1 181 12 view .LVU72 + 210 0052 7047 bx lr + 211 .LVL17: + 212 .L8: + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 213 .loc 1 151 5 discriminator 1 view .LVU73 + 214 0054 0220 movs r0, #2 + 215 .LVL18: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 216 .loc 1 183 1 view .LVU74 + 217 0056 7047 bx lr + ARM GAS /tmp/ccCBUPU1.s page 8 + + + 218 .cfi_endproc + 219 .LFE131: + 221 .section .text.HAL_I2CEx_EnableWakeUp,"ax",%progbits + 222 .align 1 + 223 .global HAL_I2CEx_EnableWakeUp + 224 .syntax unified + 225 .thumb + 226 .thumb_func + 228 HAL_I2CEx_EnableWakeUp: + 229 .LVL19: + 230 .LFB132: + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @} + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief WakeUp Mode Functions + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### WakeUp Mode Functions ##### + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Wake Up Feature + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Enable I2C wakeup from Stop mode(s). + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 231 .loc 1 209 1 is_stmt 1 view -0 + 232 .cfi_startproc + 233 @ args = 0, pretend = 0, frame = 0 + 234 @ frame_needed = 0, uses_anonymous_args = 0 + 235 @ link register save eliminated. + 236 .loc 1 209 1 is_stmt 0 view .LVU76 + 237 0000 0346 mov r3, r0 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + 238 .loc 1 211 3 is_stmt 1 view .LVU77 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 239 .loc 1 213 3 view .LVU78 + 240 .loc 1 213 11 is_stmt 0 view .LVU79 + 241 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 242 0006 D2B2 uxtb r2, r2 + 243 .loc 1 213 6 view .LVU80 + 244 0008 202A cmp r2, #32 + 245 000a 1FD1 bne .L11 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + ARM GAS /tmp/ccCBUPU1.s page 9 + + + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 246 .loc 1 216 5 is_stmt 1 view .LVU81 + 247 .loc 1 216 5 view .LVU82 + 248 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 249 0010 012A cmp r2, #1 + 250 0012 1DD0 beq .L12 + 251 .loc 1 216 5 discriminator 2 view .LVU83 + 252 0014 0122 movs r2, #1 + 253 0016 80F84020 strb r2, [r0, #64] + 254 .loc 1 216 5 discriminator 2 view .LVU84 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 255 .loc 1 218 5 view .LVU85 + 256 .loc 1 218 17 is_stmt 0 view .LVU86 + 257 001a 2422 movs r2, #36 + 258 001c 80F84120 strb r2, [r0, #65] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 259 .loc 1 221 5 is_stmt 1 view .LVU87 + 260 0020 0168 ldr r1, [r0] + 261 0022 0A68 ldr r2, [r1] + 262 0024 22F00102 bic r2, r2, #1 + 263 0028 0A60 str r2, [r1] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= I2C_CR1_WUPEN; + 264 .loc 1 224 5 view .LVU88 + 265 .loc 1 224 9 is_stmt 0 view .LVU89 + 266 002a 0168 ldr r1, [r0] + 267 .loc 1 224 19 view .LVU90 + 268 002c 0A68 ldr r2, [r1] + 269 .loc 1 224 25 view .LVU91 + 270 002e 42F48022 orr r2, r2, #262144 + 271 0032 0A60 str r2, [r1] + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 272 .loc 1 226 5 is_stmt 1 view .LVU92 + 273 0034 0168 ldr r1, [r0] + 274 0036 0A68 ldr r2, [r1] + 275 0038 42F00102 orr r2, r2, #1 + 276 003c 0A60 str r2, [r1] + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 277 .loc 1 228 5 view .LVU93 + 278 .loc 1 228 17 is_stmt 0 view .LVU94 + 279 003e 2022 movs r2, #32 + 280 0040 80F84120 strb r2, [r0, #65] + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 281 .loc 1 231 5 is_stmt 1 view .LVU95 + 282 .loc 1 231 5 view .LVU96 + 283 0044 0020 movs r0, #0 + 284 .LVL20: + 285 .loc 1 231 5 is_stmt 0 view .LVU97 + ARM GAS /tmp/ccCBUPU1.s page 10 + + + 286 0046 83F84000 strb r0, [r3, #64] + 287 .loc 1 231 5 is_stmt 1 view .LVU98 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 288 .loc 1 233 5 view .LVU99 + 289 .loc 1 233 12 is_stmt 0 view .LVU100 + 290 004a 7047 bx lr + 291 .LVL21: + 292 .L11: + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 293 .loc 1 237 12 view .LVU101 + 294 004c 0220 movs r0, #2 + 295 .LVL22: + 296 .loc 1 237 12 view .LVU102 + 297 004e 7047 bx lr + 298 .LVL23: + 299 .L12: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 300 .loc 1 216 5 discriminator 1 view .LVU103 + 301 0050 0220 movs r0, #2 + 302 .LVL24: + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 303 .loc 1 239 1 view .LVU104 + 304 0052 7047 bx lr + 305 .cfi_endproc + 306 .LFE132: + 308 .section .text.HAL_I2CEx_DisableWakeUp,"ax",%progbits + 309 .align 1 + 310 .global HAL_I2CEx_DisableWakeUp + 311 .syntax unified + 312 .thumb + 313 .thumb_func + 315 HAL_I2CEx_DisableWakeUp: + 316 .LVL25: + 317 .LFB133: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Disable I2C wakeup from Stop mode(s). + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 318 .loc 1 248 1 is_stmt 1 view -0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 0 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 @ link register save eliminated. + 323 .loc 1 248 1 is_stmt 0 view .LVU106 + 324 0000 0346 mov r3, r0 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + ARM GAS /tmp/ccCBUPU1.s page 11 + + + 325 .loc 1 250 3 is_stmt 1 view .LVU107 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 326 .loc 1 252 3 view .LVU108 + 327 .loc 1 252 11 is_stmt 0 view .LVU109 + 328 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 329 0006 D2B2 uxtb r2, r2 + 330 .loc 1 252 6 view .LVU110 + 331 0008 202A cmp r2, #32 + 332 000a 1FD1 bne .L15 + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 333 .loc 1 255 5 is_stmt 1 view .LVU111 + 334 .loc 1 255 5 view .LVU112 + 335 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 336 0010 012A cmp r2, #1 + 337 0012 1DD0 beq .L16 + 338 .loc 1 255 5 discriminator 2 view .LVU113 + 339 0014 0122 movs r2, #1 + 340 0016 80F84020 strb r2, [r0, #64] + 341 .loc 1 255 5 discriminator 2 view .LVU114 + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 342 .loc 1 257 5 view .LVU115 + 343 .loc 1 257 17 is_stmt 0 view .LVU116 + 344 001a 2422 movs r2, #36 + 345 001c 80F84120 strb r2, [r0, #65] + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 346 .loc 1 260 5 is_stmt 1 view .LVU117 + 347 0020 0168 ldr r1, [r0] + 348 0022 0A68 ldr r2, [r1] + 349 0024 22F00102 bic r2, r2, #1 + 350 0028 0A60 str r2, [r1] + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); + 351 .loc 1 263 5 view .LVU118 + 352 .loc 1 263 9 is_stmt 0 view .LVU119 + 353 002a 0168 ldr r1, [r0] + 354 .loc 1 263 19 view .LVU120 + 355 002c 0A68 ldr r2, [r1] + 356 .loc 1 263 25 view .LVU121 + 357 002e 22F48022 bic r2, r2, #262144 + 358 0032 0A60 str r2, [r1] + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 359 .loc 1 265 5 is_stmt 1 view .LVU122 + 360 0034 0168 ldr r1, [r0] + 361 0036 0A68 ldr r2, [r1] + 362 0038 42F00102 orr r2, r2, #1 + 363 003c 0A60 str r2, [r1] + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 364 .loc 1 267 5 view .LVU123 + ARM GAS /tmp/ccCBUPU1.s page 12 + + + 365 .loc 1 267 17 is_stmt 0 view .LVU124 + 366 003e 2022 movs r2, #32 + 367 0040 80F84120 strb r2, [r0, #65] + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 368 .loc 1 270 5 is_stmt 1 view .LVU125 + 369 .loc 1 270 5 view .LVU126 + 370 0044 0020 movs r0, #0 + 371 .LVL26: + 372 .loc 1 270 5 is_stmt 0 view .LVU127 + 373 0046 83F84000 strb r0, [r3, #64] + 374 .loc 1 270 5 is_stmt 1 view .LVU128 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 375 .loc 1 272 5 view .LVU129 + 376 .loc 1 272 12 is_stmt 0 view .LVU130 + 377 004a 7047 bx lr + 378 .LVL27: + 379 .L15: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 380 .loc 1 276 12 view .LVU131 + 381 004c 0220 movs r0, #2 + 382 .LVL28: + 383 .loc 1 276 12 view .LVU132 + 384 004e 7047 bx lr + 385 .LVL29: + 386 .L16: + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 387 .loc 1 255 5 discriminator 1 view .LVU133 + 388 0050 0220 movs r0, #2 + 389 .LVL30: + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 390 .loc 1 278 1 view .LVU134 + 391 0052 7047 bx lr + 392 .cfi_endproc + 393 .LFE133: + 395 .section .text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits + 396 .align 1 + 397 .global HAL_I2CEx_EnableFastModePlus + 398 .syntax unified + 399 .thumb + 400 .thumb_func + 402 HAL_I2CEx_EnableFastModePlus: + 403 .LVL31: + 404 .LFB134: + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @} + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Fast Mode Plus Functions + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + ARM GAS /tmp/ccCBUPU1.s page 13 + + + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### Fast Mode Plus Functions ##### + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Fast Mode Plus + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Enable the I2C fast mode plus driving capability. + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be enabled on all selected + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be enabled + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C3 pins fast mode plus driving capability can be enabled + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C3 parameter. + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval None + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 405 .loc 1 313 1 is_stmt 1 view -0 + 406 .cfi_startproc + 407 @ args = 0, pretend = 0, frame = 8 + 408 @ frame_needed = 0, uses_anonymous_args = 0 + 409 @ link register save eliminated. + 410 .loc 1 313 1 is_stmt 0 view .LVU136 + 411 0000 82B0 sub sp, sp, #8 + 412 .cfi_def_cfa_offset 8 + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameter */ + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 413 .loc 1 315 3 is_stmt 1 view .LVU137 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 414 .loc 1 318 3 view .LVU138 + 415 .LBB2: + 416 .loc 1 318 3 view .LVU139 + 417 .loc 1 318 3 view .LVU140 + 418 0002 084B ldr r3, .L19 + 419 0004 9A69 ldr r2, [r3, #24] + 420 0006 42F00102 orr r2, r2, #1 + 421 000a 9A61 str r2, [r3, #24] + 422 .loc 1 318 3 view .LVU141 + 423 000c 9B69 ldr r3, [r3, #24] + 424 000e 03F00103 and r3, r3, #1 + 425 0012 0193 str r3, [sp, #4] + 426 .loc 1 318 3 view .LVU142 + 427 0014 019B ldr r3, [sp, #4] + 428 .LBE2: + ARM GAS /tmp/ccCBUPU1.s page 14 + + + 429 .loc 1 318 3 view .LVU143 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable fast mode plus driving capability for selected pin */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 430 .loc 1 321 3 view .LVU144 + 431 0016 044A ldr r2, .L19+4 + 432 0018 1368 ldr r3, [r2] + 433 001a 0343 orrs r3, r3, r0 + 434 001c 1360 str r3, [r2] + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 435 .loc 1 322 1 is_stmt 0 view .LVU145 + 436 001e 02B0 add sp, sp, #8 + 437 .cfi_def_cfa_offset 0 + 438 @ sp needed + 439 0020 7047 bx lr + 440 .L20: + 441 0022 00BF .align 2 + 442 .L19: + 443 0024 00100240 .word 1073876992 + 444 0028 00000140 .word 1073807360 + 445 .cfi_endproc + 446 .LFE134: + 448 .section .text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits + 449 .align 1 + 450 .global HAL_I2CEx_DisableFastModePlus + 451 .syntax unified + 452 .thumb + 453 .thumb_func + 455 HAL_I2CEx_DisableFastModePlus: + 456 .LVL32: + 457 .LFB135: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Disable the I2C fast mode plus driving capability. + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be disabled on all selected + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be disabled + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C3 pins fast mode plus driving capability can be disabled + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C3 parameter. + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval None + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 458 .loc 1 340 1 is_stmt 1 view -0 + 459 .cfi_startproc + 460 @ args = 0, pretend = 0, frame = 8 + 461 @ frame_needed = 0, uses_anonymous_args = 0 + 462 @ link register save eliminated. + 463 .loc 1 340 1 is_stmt 0 view .LVU147 + 464 0000 82B0 sub sp, sp, #8 + 465 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccCBUPU1.s page 15 + + + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameter */ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 466 .loc 1 342 3 is_stmt 1 view .LVU148 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 467 .loc 1 345 3 view .LVU149 + 468 .LBB3: + 469 .loc 1 345 3 view .LVU150 + 470 .loc 1 345 3 view .LVU151 + 471 0002 084B ldr r3, .L23 + 472 0004 9A69 ldr r2, [r3, #24] + 473 0006 42F00102 orr r2, r2, #1 + 474 000a 9A61 str r2, [r3, #24] + 475 .loc 1 345 3 view .LVU152 + 476 000c 9B69 ldr r3, [r3, #24] + 477 000e 03F00103 and r3, r3, #1 + 478 0012 0193 str r3, [sp, #4] + 479 .loc 1 345 3 view .LVU153 + 480 0014 019B ldr r3, [sp, #4] + 481 .LBE3: + 482 .loc 1 345 3 view .LVU154 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable fast mode plus driving capability for selected pin */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 483 .loc 1 348 3 view .LVU155 + 484 0016 044A ldr r2, .L23+4 + 485 0018 1368 ldr r3, [r2] + 486 001a 23EA0003 bic r3, r3, r0 + 487 001e 1360 str r3, [r2] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 488 .loc 1 349 1 is_stmt 0 view .LVU156 + 489 0020 02B0 add sp, sp, #8 + 490 .cfi_def_cfa_offset 0 + 491 @ sp needed + 492 0022 7047 bx lr + 493 .L24: + 494 .align 2 + 495 .L23: + 496 0024 00100240 .word 1073876992 + 497 0028 00000140 .word 1073807360 + 498 .cfi_endproc + 499 .LFE135: + 501 .text + 502 .Letext0: + 503 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 504 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 505 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 506 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 507 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 508 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + ARM GAS /tmp/ccCBUPU1.s page 16 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_i2c_ex.c + /tmp/ccCBUPU1.s:21 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t + /tmp/ccCBUPU1.s:27 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter + /tmp/ccCBUPU1.s:119 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t + /tmp/ccCBUPU1.s:125 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter + /tmp/ccCBUPU1.s:222 .text.HAL_I2CEx_EnableWakeUp:00000000 $t + /tmp/ccCBUPU1.s:228 .text.HAL_I2CEx_EnableWakeUp:00000000 HAL_I2CEx_EnableWakeUp + /tmp/ccCBUPU1.s:309 .text.HAL_I2CEx_DisableWakeUp:00000000 $t + /tmp/ccCBUPU1.s:315 .text.HAL_I2CEx_DisableWakeUp:00000000 HAL_I2CEx_DisableWakeUp + /tmp/ccCBUPU1.s:396 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t + /tmp/ccCBUPU1.s:402 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus + /tmp/ccCBUPU1.s:443 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d + /tmp/ccCBUPU1.s:449 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t + /tmp/ccCBUPU1.s:455 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus + /tmp/ccCBUPU1.s:496 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_i2c_ex.o b/build/stm32f3xx_hal_i2c_ex.o new file mode 100644 index 0000000..e020314 Binary files /dev/null and b/build/stm32f3xx_hal_i2c_ex.o differ diff --git a/build/stm32f3xx_hal_msp.d b/build/stm32f3xx_hal_msp.d new file mode 100644 index 0000000..3e0060c --- /dev/null +++ b/build/stm32f3xx_hal_msp.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_msp.o: Core/Src/stm32f3xx_hal_msp.c Core/Inc/main.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Core/Inc/main.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_msp.lst b/build/stm32f3xx_hal_msp.lst new file mode 100644 index 0000000..368ca4e --- /dev/null +++ b/build/stm32f3xx_hal_msp.lst @@ -0,0 +1,1822 @@ +ARM GAS /tmp/ccdHkDFg.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_msp.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/stm32f3xx_hal_msp.c" + 20 .section .text.HAL_MspInit,"ax",%progbits + 21 .align 1 + 22 .global HAL_MspInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_MspInit: + 28 .LFB130: + 1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/stm32f3xx_hal_msp.c **** /** + 3:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** + 4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c + 5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization + 6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes. + 7:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** + 8:Core/Src/stm32f3xx_hal_msp.c **** * @attention + 9:Core/Src/stm32f3xx_hal_msp.c **** * + 10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics. + 11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved. + 12:Core/Src/stm32f3xx_hal_msp.c **** * + 13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file + 14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component. + 15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 16:Core/Src/stm32f3xx_hal_msp.c **** * + 17:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** + 18:Core/Src/stm32f3xx_hal_msp.c **** */ + 19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */ + 20:Core/Src/stm32f3xx_hal_msp.c **** + 21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ + 22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h" + 23:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */ + 24:Core/Src/stm32f3xx_hal_msp.c **** + 25:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */ + 26:Core/Src/stm32f3xx_hal_msp.c **** + 27:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */ + 29:Core/Src/stm32f3xx_hal_msp.c **** + 30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */ + ARM GAS /tmp/ccdHkDFg.s page 2 + + + 31:Core/Src/stm32f3xx_hal_msp.c **** + 32:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ + 33:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */ + 34:Core/Src/stm32f3xx_hal_msp.c **** + 35:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */ + 36:Core/Src/stm32f3xx_hal_msp.c **** + 37:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */ + 39:Core/Src/stm32f3xx_hal_msp.c **** + 40:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */ + 41:Core/Src/stm32f3xx_hal_msp.c **** + 42:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */ + 44:Core/Src/stm32f3xx_hal_msp.c **** + 45:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */ + 46:Core/Src/stm32f3xx_hal_msp.c **** + 47:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ + 48:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */ + 49:Core/Src/stm32f3xx_hal_msp.c **** + 50:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */ + 51:Core/Src/stm32f3xx_hal_msp.c **** + 52:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ + 53:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ + 54:Core/Src/stm32f3xx_hal_msp.c **** + 55:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ + 56:Core/Src/stm32f3xx_hal_msp.c **** + 57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */ + 58:Core/Src/stm32f3xx_hal_msp.c **** + 59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */ + 60:Core/Src/stm32f3xx_hal_msp.c **** + 61:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + 62:Core/Src/stm32f3xx_hal_msp.c **** /** + 63:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP. + 64:Core/Src/stm32f3xx_hal_msp.c **** */ + 65:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void) + 66:Core/Src/stm32f3xx_hal_msp.c **** { + 29 .loc 1 66 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 8 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 34 0000 82B0 sub sp, sp, #8 + 35 .cfi_def_cfa_offset 8 + 67:Core/Src/stm32f3xx_hal_msp.c **** + 68:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ + 69:Core/Src/stm32f3xx_hal_msp.c **** + 70:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */ + 71:Core/Src/stm32f3xx_hal_msp.c **** + 72:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 36 .loc 1 72 3 view .LVU1 + 37 .LBB2: + 38 .loc 1 72 3 view .LVU2 + 39 .loc 1 72 3 view .LVU3 + 40 0002 0A4B ldr r3, .L3 + 41 0004 9A69 ldr r2, [r3, #24] + 42 0006 42F00102 orr r2, r2, #1 + 43 000a 9A61 str r2, [r3, #24] + ARM GAS /tmp/ccdHkDFg.s page 3 + + + 44 .loc 1 72 3 view .LVU4 + 45 000c 9A69 ldr r2, [r3, #24] + 46 000e 02F00102 and r2, r2, #1 + 47 0012 0092 str r2, [sp] + 48 .loc 1 72 3 view .LVU5 + 49 0014 009A ldr r2, [sp] + 50 .LBE2: + 51 .loc 1 72 3 view .LVU6 + 73:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 52 .loc 1 73 3 view .LVU7 + 53 .LBB3: + 54 .loc 1 73 3 view .LVU8 + 55 .loc 1 73 3 view .LVU9 + 56 0016 DA69 ldr r2, [r3, #28] + 57 0018 42F08052 orr r2, r2, #268435456 + 58 001c DA61 str r2, [r3, #28] + 59 .loc 1 73 3 view .LVU10 + 60 001e DB69 ldr r3, [r3, #28] + 61 0020 03F08053 and r3, r3, #268435456 + 62 0024 0193 str r3, [sp, #4] + 63 .loc 1 73 3 view .LVU11 + 64 0026 019B ldr r3, [sp, #4] + 65 .LBE3: + 66 .loc 1 73 3 view .LVU12 + 74:Core/Src/stm32f3xx_hal_msp.c **** + 75:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/ + 76:Core/Src/stm32f3xx_hal_msp.c **** + 77:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ + 78:Core/Src/stm32f3xx_hal_msp.c **** + 79:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */ + 80:Core/Src/stm32f3xx_hal_msp.c **** } + 67 .loc 1 80 1 is_stmt 0 view .LVU13 + 68 0028 02B0 add sp, sp, #8 + 69 .cfi_def_cfa_offset 0 + 70 @ sp needed + 71 002a 7047 bx lr + 72 .L4: + 73 .align 2 + 74 .L3: + 75 002c 00100240 .word 1073876992 + 76 .cfi_endproc + 77 .LFE130: + 79 .section .text.HAL_CAN_MspInit,"ax",%progbits + 80 .align 1 + 81 .global HAL_CAN_MspInit + 82 .syntax unified + 83 .thumb + 84 .thumb_func + 86 HAL_CAN_MspInit: + 87 .LVL0: + 88 .LFB131: + 81:Core/Src/stm32f3xx_hal_msp.c **** + 82:Core/Src/stm32f3xx_hal_msp.c **** /** + 83:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP Initialization + 84:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example + 85:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer + 86:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + ARM GAS /tmp/ccdHkDFg.s page 4 + + + 87:Core/Src/stm32f3xx_hal_msp.c **** */ + 88:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) + 89:Core/Src/stm32f3xx_hal_msp.c **** { + 89 .loc 1 89 1 is_stmt 1 view -0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 32 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 .loc 1 89 1 is_stmt 0 view .LVU15 + 94 0000 00B5 push {lr} + 95 .cfi_def_cfa_offset 4 + 96 .cfi_offset 14, -4 + 97 0002 89B0 sub sp, sp, #36 + 98 .cfi_def_cfa_offset 40 + 90:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 99 .loc 1 90 3 is_stmt 1 view .LVU16 + 100 .loc 1 90 20 is_stmt 0 view .LVU17 + 101 0004 0023 movs r3, #0 + 102 0006 0393 str r3, [sp, #12] + 103 0008 0493 str r3, [sp, #16] + 104 000a 0593 str r3, [sp, #20] + 105 000c 0693 str r3, [sp, #24] + 106 000e 0793 str r3, [sp, #28] + 91:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) + 107 .loc 1 91 3 is_stmt 1 view .LVU18 + 108 .loc 1 91 10 is_stmt 0 view .LVU19 + 109 0010 0268 ldr r2, [r0] + 110 .loc 1 91 5 view .LVU20 + 111 0012 144B ldr r3, .L9 + 112 0014 9A42 cmp r2, r3 + 113 0016 02D0 beq .L8 + 114 .LVL1: + 115 .L5: + 92:Core/Src/stm32f3xx_hal_msp.c **** { + 93:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */ + 94:Core/Src/stm32f3xx_hal_msp.c **** + 95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */ + 96:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 97:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE(); + 98:Core/Src/stm32f3xx_hal_msp.c **** + 99:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 100:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 101:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX + 102:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX + 103:Core/Src/stm32f3xx_hal_msp.c **** */ + 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; + 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 110:Core/Src/stm32f3xx_hal_msp.c **** + 111:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ + 112:Core/Src/stm32f3xx_hal_msp.c **** + 113:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */ + 114:Core/Src/stm32f3xx_hal_msp.c **** } + 115:Core/Src/stm32f3xx_hal_msp.c **** + 116:Core/Src/stm32f3xx_hal_msp.c **** } + ARM GAS /tmp/ccdHkDFg.s page 5 + + + 116 .loc 1 116 1 view .LVU21 + 117 0018 09B0 add sp, sp, #36 + 118 .cfi_remember_state + 119 .cfi_def_cfa_offset 4 + 120 @ sp needed + 121 001a 5DF804FB ldr pc, [sp], #4 + 122 .LVL2: + 123 .L8: + 124 .cfi_restore_state + 97:Core/Src/stm32f3xx_hal_msp.c **** + 125 .loc 1 97 5 is_stmt 1 view .LVU22 + 126 .LBB4: + 97:Core/Src/stm32f3xx_hal_msp.c **** + 127 .loc 1 97 5 view .LVU23 + 97:Core/Src/stm32f3xx_hal_msp.c **** + 128 .loc 1 97 5 view .LVU24 + 129 001e 03F5D633 add r3, r3, #109568 + 130 0022 DA69 ldr r2, [r3, #28] + 131 0024 42F00072 orr r2, r2, #33554432 + 132 0028 DA61 str r2, [r3, #28] + 97:Core/Src/stm32f3xx_hal_msp.c **** + 133 .loc 1 97 5 view .LVU25 + 134 002a DA69 ldr r2, [r3, #28] + 135 002c 02F00072 and r2, r2, #33554432 + 136 0030 0192 str r2, [sp, #4] + 97:Core/Src/stm32f3xx_hal_msp.c **** + 137 .loc 1 97 5 view .LVU26 + 138 0032 019A ldr r2, [sp, #4] + 139 .LBE4: + 97:Core/Src/stm32f3xx_hal_msp.c **** + 140 .loc 1 97 5 view .LVU27 + 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 141 .loc 1 99 5 view .LVU28 + 142 .LBB5: + 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 143 .loc 1 99 5 view .LVU29 + 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 144 .loc 1 99 5 view .LVU30 + 145 0034 5A69 ldr r2, [r3, #20] + 146 0036 42F40032 orr r2, r2, #131072 + 147 003a 5A61 str r2, [r3, #20] + 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 148 .loc 1 99 5 view .LVU31 + 149 003c 5B69 ldr r3, [r3, #20] + 150 003e 03F40033 and r3, r3, #131072 + 151 0042 0293 str r3, [sp, #8] + 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 152 .loc 1 99 5 view .LVU32 + 153 0044 029B ldr r3, [sp, #8] + 154 .LBE5: + 99:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 155 .loc 1 99 5 view .LVU33 + 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 156 .loc 1 104 5 view .LVU34 + 104:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 157 .loc 1 104 25 is_stmt 0 view .LVU35 + 158 0046 4FF4C053 mov r3, #6144 + ARM GAS /tmp/ccdHkDFg.s page 6 + + + 159 004a 0393 str r3, [sp, #12] + 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 160 .loc 1 105 5 is_stmt 1 view .LVU36 + 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 161 .loc 1 105 26 is_stmt 0 view .LVU37 + 162 004c 0223 movs r3, #2 + 163 004e 0493 str r3, [sp, #16] + 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 164 .loc 1 106 5 is_stmt 1 view .LVU38 + 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; + 165 .loc 1 107 5 view .LVU39 + 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; + 166 .loc 1 107 27 is_stmt 0 view .LVU40 + 167 0050 0323 movs r3, #3 + 168 0052 0693 str r3, [sp, #24] + 108:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 169 .loc 1 108 5 is_stmt 1 view .LVU41 + 108:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 170 .loc 1 108 31 is_stmt 0 view .LVU42 + 171 0054 0923 movs r3, #9 + 172 0056 0793 str r3, [sp, #28] + 109:Core/Src/stm32f3xx_hal_msp.c **** + 173 .loc 1 109 5 is_stmt 1 view .LVU43 + 174 0058 03A9 add r1, sp, #12 + 175 005a 4FF09040 mov r0, #1207959552 + 176 .LVL3: + 109:Core/Src/stm32f3xx_hal_msp.c **** + 177 .loc 1 109 5 is_stmt 0 view .LVU44 + 178 005e FFF7FEFF bl HAL_GPIO_Init + 179 .LVL4: + 180 .loc 1 116 1 view .LVU45 + 181 0062 D9E7 b .L5 + 182 .L10: + 183 .align 2 + 184 .L9: + 185 0064 00640040 .word 1073767424 + 186 .cfi_endproc + 187 .LFE131: + 189 .section .text.HAL_CAN_MspDeInit,"ax",%progbits + 190 .align 1 + 191 .global HAL_CAN_MspDeInit + 192 .syntax unified + 193 .thumb + 194 .thumb_func + 196 HAL_CAN_MspDeInit: + 197 .LVL5: + 198 .LFB132: + 117:Core/Src/stm32f3xx_hal_msp.c **** + 118:Core/Src/stm32f3xx_hal_msp.c **** /** + 119:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP De-Initialization + 120:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 121:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer + 122:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 123:Core/Src/stm32f3xx_hal_msp.c **** */ + 124:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) + 125:Core/Src/stm32f3xx_hal_msp.c **** { + 199 .loc 1 125 1 is_stmt 1 view -0 + ARM GAS /tmp/ccdHkDFg.s page 7 + + + 200 .cfi_startproc + 201 @ args = 0, pretend = 0, frame = 0 + 202 @ frame_needed = 0, uses_anonymous_args = 0 + 203 .loc 1 125 1 is_stmt 0 view .LVU47 + 204 0000 08B5 push {r3, lr} + 205 .cfi_def_cfa_offset 8 + 206 .cfi_offset 3, -8 + 207 .cfi_offset 14, -4 + 126:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) + 208 .loc 1 126 3 is_stmt 1 view .LVU48 + 209 .loc 1 126 10 is_stmt 0 view .LVU49 + 210 0002 0268 ldr r2, [r0] + 211 .loc 1 126 5 view .LVU50 + 212 0004 074B ldr r3, .L15 + 213 0006 9A42 cmp r2, r3 + 214 0008 00D0 beq .L14 + 215 .LVL6: + 216 .L11: + 127:Core/Src/stm32f3xx_hal_msp.c **** { + 128:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */ + 129:Core/Src/stm32f3xx_hal_msp.c **** + 130:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */ + 131:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + 132:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE(); + 133:Core/Src/stm32f3xx_hal_msp.c **** + 134:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration + 135:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX + 136:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX + 137:Core/Src/stm32f3xx_hal_msp.c **** */ + 138:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); + 139:Core/Src/stm32f3xx_hal_msp.c **** + 140:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ + 141:Core/Src/stm32f3xx_hal_msp.c **** + 142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */ + 143:Core/Src/stm32f3xx_hal_msp.c **** } + 144:Core/Src/stm32f3xx_hal_msp.c **** + 145:Core/Src/stm32f3xx_hal_msp.c **** } + 217 .loc 1 145 1 view .LVU51 + 218 000a 08BD pop {r3, pc} + 219 .LVL7: + 220 .L14: + 132:Core/Src/stm32f3xx_hal_msp.c **** + 221 .loc 1 132 5 is_stmt 1 view .LVU52 + 222 000c 064A ldr r2, .L15+4 + 223 000e D369 ldr r3, [r2, #28] + 224 0010 23F00073 bic r3, r3, #33554432 + 225 0014 D361 str r3, [r2, #28] + 138:Core/Src/stm32f3xx_hal_msp.c **** + 226 .loc 1 138 5 view .LVU53 + 227 0016 4FF4C051 mov r1, #6144 + 228 001a 4FF09040 mov r0, #1207959552 + 229 .LVL8: + 138:Core/Src/stm32f3xx_hal_msp.c **** + 230 .loc 1 138 5 is_stmt 0 view .LVU54 + 231 001e FFF7FEFF bl HAL_GPIO_DeInit + 232 .LVL9: + 233 .loc 1 145 1 view .LVU55 + ARM GAS /tmp/ccdHkDFg.s page 8 + + + 234 0022 F2E7 b .L11 + 235 .L16: + 236 .align 2 + 237 .L15: + 238 0024 00640040 .word 1073767424 + 239 0028 00100240 .word 1073876992 + 240 .cfi_endproc + 241 .LFE132: + 243 .section .text.HAL_I2C_MspInit,"ax",%progbits + 244 .align 1 + 245 .global HAL_I2C_MspInit + 246 .syntax unified + 247 .thumb + 248 .thumb_func + 250 HAL_I2C_MspInit: + 251 .LVL10: + 252 .LFB133: + 146:Core/Src/stm32f3xx_hal_msp.c **** + 147:Core/Src/stm32f3xx_hal_msp.c **** /** + 148:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP Initialization + 149:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example + 150:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer + 151:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 152:Core/Src/stm32f3xx_hal_msp.c **** */ + 153:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) + 154:Core/Src/stm32f3xx_hal_msp.c **** { + 253 .loc 1 154 1 is_stmt 1 view -0 + 254 .cfi_startproc + 255 @ args = 0, pretend = 0, frame = 32 + 256 @ frame_needed = 0, uses_anonymous_args = 0 + 257 .loc 1 154 1 is_stmt 0 view .LVU57 + 258 0000 F0B5 push {r4, r5, r6, r7, lr} + 259 .cfi_def_cfa_offset 20 + 260 .cfi_offset 4, -20 + 261 .cfi_offset 5, -16 + 262 .cfi_offset 6, -12 + 263 .cfi_offset 7, -8 + 264 .cfi_offset 14, -4 + 265 0002 89B0 sub sp, sp, #36 + 266 .cfi_def_cfa_offset 56 + 155:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 267 .loc 1 155 3 is_stmt 1 view .LVU58 + 268 .loc 1 155 20 is_stmt 0 view .LVU59 + 269 0004 0023 movs r3, #0 + 270 0006 0393 str r3, [sp, #12] + 271 0008 0493 str r3, [sp, #16] + 272 000a 0593 str r3, [sp, #20] + 273 000c 0693 str r3, [sp, #24] + 274 000e 0793 str r3, [sp, #28] + 156:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) + 275 .loc 1 156 3 is_stmt 1 view .LVU60 + 276 .loc 1 156 10 is_stmt 0 view .LVU61 + 277 0010 0268 ldr r2, [r0] + 278 .loc 1 156 5 view .LVU62 + 279 0012 1E4B ldr r3, .L21 + 280 0014 9A42 cmp r2, r3 + 281 0016 01D0 beq .L20 + ARM GAS /tmp/ccdHkDFg.s page 9 + + + 282 .LVL11: + 283 .L17: + 157:Core/Src/stm32f3xx_hal_msp.c **** { + 158:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */ + 159:Core/Src/stm32f3xx_hal_msp.c **** + 160:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */ + 161:Core/Src/stm32f3xx_hal_msp.c **** + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 163:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 164:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 165:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL + 166:Core/Src/stm32f3xx_hal_msp.c **** PB9 ------> I2C1_SDA + 167:Core/Src/stm32f3xx_hal_msp.c **** */ + 168:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; + 169:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 172:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + 173:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 174:Core/Src/stm32f3xx_hal_msp.c **** + 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9; + 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 179:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + 180:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 181:Core/Src/stm32f3xx_hal_msp.c **** + 182:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 183:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE(); + 184:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + 185:Core/Src/stm32f3xx_hal_msp.c **** + 186:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */ + 187:Core/Src/stm32f3xx_hal_msp.c **** } + 188:Core/Src/stm32f3xx_hal_msp.c **** + 189:Core/Src/stm32f3xx_hal_msp.c **** } + 284 .loc 1 189 1 view .LVU63 + 285 0018 09B0 add sp, sp, #36 + 286 .cfi_remember_state + 287 .cfi_def_cfa_offset 20 + 288 @ sp needed + 289 001a F0BD pop {r4, r5, r6, r7, pc} + 290 .LVL12: + 291 .L20: + 292 .cfi_restore_state + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 293 .loc 1 162 5 is_stmt 1 view .LVU64 + 294 .LBB6: + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 295 .loc 1 162 5 view .LVU65 + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 296 .loc 1 162 5 view .LVU66 + 297 001c 1C4C ldr r4, .L21+4 + 298 001e 6369 ldr r3, [r4, #20] + 299 0020 43F40033 orr r3, r3, #131072 + 300 0024 6361 str r3, [r4, #20] + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 301 .loc 1 162 5 view .LVU67 + ARM GAS /tmp/ccdHkDFg.s page 10 + + + 302 0026 6369 ldr r3, [r4, #20] + 303 0028 03F40033 and r3, r3, #131072 + 304 002c 0093 str r3, [sp] + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 305 .loc 1 162 5 view .LVU68 + 306 002e 009B ldr r3, [sp] + 307 .LBE6: + 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 308 .loc 1 162 5 view .LVU69 + 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 309 .loc 1 163 5 view .LVU70 + 310 .LBB7: + 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 311 .loc 1 163 5 view .LVU71 + 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 312 .loc 1 163 5 view .LVU72 + 313 0030 6369 ldr r3, [r4, #20] + 314 0032 43F48023 orr r3, r3, #262144 + 315 0036 6361 str r3, [r4, #20] + 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 316 .loc 1 163 5 view .LVU73 + 317 0038 6369 ldr r3, [r4, #20] + 318 003a 03F48023 and r3, r3, #262144 + 319 003e 0193 str r3, [sp, #4] + 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 320 .loc 1 163 5 view .LVU74 + 321 0040 019B ldr r3, [sp, #4] + 322 .LBE7: + 163:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 323 .loc 1 163 5 view .LVU75 + 168:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 324 .loc 1 168 5 view .LVU76 + 168:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 325 .loc 1 168 25 is_stmt 0 view .LVU77 + 326 0042 4FF40043 mov r3, #32768 + 327 0046 0393 str r3, [sp, #12] + 169:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 328 .loc 1 169 5 is_stmt 1 view .LVU78 + 169:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 329 .loc 1 169 26 is_stmt 0 view .LVU79 + 330 0048 1227 movs r7, #18 + 331 004a 0497 str r7, [sp, #16] + 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 332 .loc 1 170 5 is_stmt 1 view .LVU80 + 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + 333 .loc 1 171 5 view .LVU81 + 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + 334 .loc 1 171 27 is_stmt 0 view .LVU82 + 335 004c 0326 movs r6, #3 + 336 004e 0696 str r6, [sp, #24] + 172:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 337 .loc 1 172 5 is_stmt 1 view .LVU83 + 172:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 338 .loc 1 172 31 is_stmt 0 view .LVU84 + 339 0050 0425 movs r5, #4 + 340 0052 0795 str r5, [sp, #28] + 173:Core/Src/stm32f3xx_hal_msp.c **** + ARM GAS /tmp/ccdHkDFg.s page 11 + + + 341 .loc 1 173 5 is_stmt 1 view .LVU85 + 342 0054 03A9 add r1, sp, #12 + 343 0056 4FF09040 mov r0, #1207959552 + 344 .LVL13: + 173:Core/Src/stm32f3xx_hal_msp.c **** + 345 .loc 1 173 5 is_stmt 0 view .LVU86 + 346 005a FFF7FEFF bl HAL_GPIO_Init + 347 .LVL14: + 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 348 .loc 1 175 5 is_stmt 1 view .LVU87 + 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 349 .loc 1 175 25 is_stmt 0 view .LVU88 + 350 005e 4FF40073 mov r3, #512 + 351 0062 0393 str r3, [sp, #12] + 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 352 .loc 1 176 5 is_stmt 1 view .LVU89 + 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 353 .loc 1 176 26 is_stmt 0 view .LVU90 + 354 0064 0497 str r7, [sp, #16] + 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 355 .loc 1 177 5 is_stmt 1 view .LVU91 + 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 356 .loc 1 177 26 is_stmt 0 view .LVU92 + 357 0066 0023 movs r3, #0 + 358 0068 0593 str r3, [sp, #20] + 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + 359 .loc 1 178 5 is_stmt 1 view .LVU93 + 178:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + 360 .loc 1 178 27 is_stmt 0 view .LVU94 + 361 006a 0696 str r6, [sp, #24] + 179:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 362 .loc 1 179 5 is_stmt 1 view .LVU95 + 179:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 363 .loc 1 179 31 is_stmt 0 view .LVU96 + 364 006c 0795 str r5, [sp, #28] + 180:Core/Src/stm32f3xx_hal_msp.c **** + 365 .loc 1 180 5 is_stmt 1 view .LVU97 + 366 006e 03A9 add r1, sp, #12 + 367 0070 0848 ldr r0, .L21+8 + 368 0072 FFF7FEFF bl HAL_GPIO_Init + 369 .LVL15: + 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + 370 .loc 1 183 5 view .LVU98 + 371 .LBB8: + 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + 372 .loc 1 183 5 view .LVU99 + 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + 373 .loc 1 183 5 view .LVU100 + 374 0076 E369 ldr r3, [r4, #28] + 375 0078 43F40013 orr r3, r3, #2097152 + 376 007c E361 str r3, [r4, #28] + 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + 377 .loc 1 183 5 view .LVU101 + 378 007e E369 ldr r3, [r4, #28] + 379 0080 03F40013 and r3, r3, #2097152 + 380 0084 0293 str r3, [sp, #8] + 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + ARM GAS /tmp/ccdHkDFg.s page 12 + + + 381 .loc 1 183 5 view .LVU102 + 382 0086 029B ldr r3, [sp, #8] + 383 .LBE8: + 183:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ + 384 .loc 1 183 5 discriminator 1 view .LVU103 + 385 .loc 1 189 1 is_stmt 0 view .LVU104 + 386 0088 C6E7 b .L17 + 387 .L22: + 388 008a 00BF .align 2 + 389 .L21: + 390 008c 00540040 .word 1073763328 + 391 0090 00100240 .word 1073876992 + 392 0094 00040048 .word 1207960576 + 393 .cfi_endproc + 394 .LFE133: + 396 .section .text.HAL_I2C_MspDeInit,"ax",%progbits + 397 .align 1 + 398 .global HAL_I2C_MspDeInit + 399 .syntax unified + 400 .thumb + 401 .thumb_func + 403 HAL_I2C_MspDeInit: + 404 .LVL16: + 405 .LFB134: + 190:Core/Src/stm32f3xx_hal_msp.c **** + 191:Core/Src/stm32f3xx_hal_msp.c **** /** + 192:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP De-Initialization + 193:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 194:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer + 195:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 196:Core/Src/stm32f3xx_hal_msp.c **** */ + 197:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) + 198:Core/Src/stm32f3xx_hal_msp.c **** { + 406 .loc 1 198 1 is_stmt 1 view -0 + 407 .cfi_startproc + 408 @ args = 0, pretend = 0, frame = 0 + 409 @ frame_needed = 0, uses_anonymous_args = 0 + 410 .loc 1 198 1 is_stmt 0 view .LVU106 + 411 0000 08B5 push {r3, lr} + 412 .cfi_def_cfa_offset 8 + 413 .cfi_offset 3, -8 + 414 .cfi_offset 14, -4 + 199:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) + 415 .loc 1 199 3 is_stmt 1 view .LVU107 + 416 .loc 1 199 10 is_stmt 0 view .LVU108 + 417 0002 0268 ldr r2, [r0] + 418 .loc 1 199 5 view .LVU109 + 419 0004 0A4B ldr r3, .L27 + 420 0006 9A42 cmp r2, r3 + 421 0008 00D0 beq .L26 + 422 .LVL17: + 423 .L23: + 200:Core/Src/stm32f3xx_hal_msp.c **** { + 201:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */ + 202:Core/Src/stm32f3xx_hal_msp.c **** + 203:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */ + 204:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + ARM GAS /tmp/ccdHkDFg.s page 13 + + + 205:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE(); + 206:Core/Src/stm32f3xx_hal_msp.c **** + 207:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration + 208:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL + 209:Core/Src/stm32f3xx_hal_msp.c **** PB9 ------> I2C1_SDA + 210:Core/Src/stm32f3xx_hal_msp.c **** */ + 211:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15); + 212:Core/Src/stm32f3xx_hal_msp.c **** + 213:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9); + 214:Core/Src/stm32f3xx_hal_msp.c **** + 215:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */ + 216:Core/Src/stm32f3xx_hal_msp.c **** + 217:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */ + 218:Core/Src/stm32f3xx_hal_msp.c **** } + 219:Core/Src/stm32f3xx_hal_msp.c **** + 220:Core/Src/stm32f3xx_hal_msp.c **** } + 424 .loc 1 220 1 view .LVU110 + 425 000a 08BD pop {r3, pc} + 426 .LVL18: + 427 .L26: + 205:Core/Src/stm32f3xx_hal_msp.c **** + 428 .loc 1 205 5 is_stmt 1 view .LVU111 + 429 000c 094A ldr r2, .L27+4 + 430 000e D369 ldr r3, [r2, #28] + 431 0010 23F40013 bic r3, r3, #2097152 + 432 0014 D361 str r3, [r2, #28] + 211:Core/Src/stm32f3xx_hal_msp.c **** + 433 .loc 1 211 5 view .LVU112 + 434 0016 4FF40041 mov r1, #32768 + 435 001a 4FF09040 mov r0, #1207959552 + 436 .LVL19: + 211:Core/Src/stm32f3xx_hal_msp.c **** + 437 .loc 1 211 5 is_stmt 0 view .LVU113 + 438 001e FFF7FEFF bl HAL_GPIO_DeInit + 439 .LVL20: + 213:Core/Src/stm32f3xx_hal_msp.c **** + 440 .loc 1 213 5 is_stmt 1 view .LVU114 + 441 0022 4FF40071 mov r1, #512 + 442 0026 0448 ldr r0, .L27+8 + 443 0028 FFF7FEFF bl HAL_GPIO_DeInit + 444 .LVL21: + 445 .loc 1 220 1 is_stmt 0 view .LVU115 + 446 002c EDE7 b .L23 + 447 .L28: + 448 002e 00BF .align 2 + 449 .L27: + 450 0030 00540040 .word 1073763328 + 451 0034 00100240 .word 1073876992 + 452 0038 00040048 .word 1207960576 + 453 .cfi_endproc + 454 .LFE134: + 456 .section .text.HAL_SPI_MspInit,"ax",%progbits + 457 .align 1 + 458 .global HAL_SPI_MspInit + 459 .syntax unified + 460 .thumb + 461 .thumb_func + ARM GAS /tmp/ccdHkDFg.s page 14 + + + 463 HAL_SPI_MspInit: + 464 .LVL22: + 465 .LFB135: + 221:Core/Src/stm32f3xx_hal_msp.c **** + 222:Core/Src/stm32f3xx_hal_msp.c **** /** + 223:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP Initialization + 224:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example + 225:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer + 226:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 227:Core/Src/stm32f3xx_hal_msp.c **** */ + 228:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) + 229:Core/Src/stm32f3xx_hal_msp.c **** { + 466 .loc 1 229 1 is_stmt 1 view -0 + 467 .cfi_startproc + 468 @ args = 0, pretend = 0, frame = 32 + 469 @ frame_needed = 0, uses_anonymous_args = 0 + 470 .loc 1 229 1 is_stmt 0 view .LVU117 + 471 0000 00B5 push {lr} + 472 .cfi_def_cfa_offset 4 + 473 .cfi_offset 14, -4 + 474 0002 89B0 sub sp, sp, #36 + 475 .cfi_def_cfa_offset 40 + 230:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 476 .loc 1 230 3 is_stmt 1 view .LVU118 + 477 .loc 1 230 20 is_stmt 0 view .LVU119 + 478 0004 0023 movs r3, #0 + 479 0006 0393 str r3, [sp, #12] + 480 0008 0493 str r3, [sp, #16] + 481 000a 0593 str r3, [sp, #20] + 482 000c 0693 str r3, [sp, #24] + 483 000e 0793 str r3, [sp, #28] + 231:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI1) + 484 .loc 1 231 3 is_stmt 1 view .LVU120 + 485 .loc 1 231 10 is_stmt 0 view .LVU121 + 486 0010 0268 ldr r2, [r0] + 487 .loc 1 231 5 view .LVU122 + 488 0012 144B ldr r3, .L33 + 489 0014 9A42 cmp r2, r3 + 490 0016 02D0 beq .L32 + 491 .LVL23: + 492 .L29: + 232:Core/Src/stm32f3xx_hal_msp.c **** { + 233:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 0 */ + 234:Core/Src/stm32f3xx_hal_msp.c **** + 235:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 0 */ + 236:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 237:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_ENABLE(); + 238:Core/Src/stm32f3xx_hal_msp.c **** + 239:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 240:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 241:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> SPI1_NSS + 242:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> SPI1_SCK + 243:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> SPI1_MISO + 244:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> SPI1_MOSI + 245:Core/Src/stm32f3xx_hal_msp.c **** */ + 246:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + 247:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + ARM GAS /tmp/ccdHkDFg.s page 15 + + + 248:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 249:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 250:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + 251:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 252:Core/Src/stm32f3xx_hal_msp.c **** + 253:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 1 */ + 254:Core/Src/stm32f3xx_hal_msp.c **** + 255:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 1 */ + 256:Core/Src/stm32f3xx_hal_msp.c **** } + 257:Core/Src/stm32f3xx_hal_msp.c **** + 258:Core/Src/stm32f3xx_hal_msp.c **** } + 493 .loc 1 258 1 view .LVU123 + 494 0018 09B0 add sp, sp, #36 + 495 .cfi_remember_state + 496 .cfi_def_cfa_offset 4 + 497 @ sp needed + 498 001a 5DF804FB ldr pc, [sp], #4 + 499 .LVL24: + 500 .L32: + 501 .cfi_restore_state + 237:Core/Src/stm32f3xx_hal_msp.c **** + 502 .loc 1 237 5 is_stmt 1 view .LVU124 + 503 .LBB9: + 237:Core/Src/stm32f3xx_hal_msp.c **** + 504 .loc 1 237 5 view .LVU125 + 237:Core/Src/stm32f3xx_hal_msp.c **** + 505 .loc 1 237 5 view .LVU126 + 506 001e 03F56043 add r3, r3, #57344 + 507 0022 9A69 ldr r2, [r3, #24] + 508 0024 42F48052 orr r2, r2, #4096 + 509 0028 9A61 str r2, [r3, #24] + 237:Core/Src/stm32f3xx_hal_msp.c **** + 510 .loc 1 237 5 view .LVU127 + 511 002a 9A69 ldr r2, [r3, #24] + 512 002c 02F48052 and r2, r2, #4096 + 513 0030 0192 str r2, [sp, #4] + 237:Core/Src/stm32f3xx_hal_msp.c **** + 514 .loc 1 237 5 view .LVU128 + 515 0032 019A ldr r2, [sp, #4] + 516 .LBE9: + 237:Core/Src/stm32f3xx_hal_msp.c **** + 517 .loc 1 237 5 view .LVU129 + 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 518 .loc 1 239 5 view .LVU130 + 519 .LBB10: + 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 520 .loc 1 239 5 view .LVU131 + 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 521 .loc 1 239 5 view .LVU132 + 522 0034 5A69 ldr r2, [r3, #20] + 523 0036 42F40032 orr r2, r2, #131072 + 524 003a 5A61 str r2, [r3, #20] + 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 525 .loc 1 239 5 view .LVU133 + 526 003c 5B69 ldr r3, [r3, #20] + 527 003e 03F40033 and r3, r3, #131072 + 528 0042 0293 str r3, [sp, #8] + ARM GAS /tmp/ccdHkDFg.s page 16 + + + 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 529 .loc 1 239 5 view .LVU134 + 530 0044 029B ldr r3, [sp, #8] + 531 .LBE10: + 239:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 532 .loc 1 239 5 view .LVU135 + 246:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 533 .loc 1 246 5 view .LVU136 + 246:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 534 .loc 1 246 25 is_stmt 0 view .LVU137 + 535 0046 F023 movs r3, #240 + 536 0048 0393 str r3, [sp, #12] + 247:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 537 .loc 1 247 5 is_stmt 1 view .LVU138 + 247:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 538 .loc 1 247 26 is_stmt 0 view .LVU139 + 539 004a 0223 movs r3, #2 + 540 004c 0493 str r3, [sp, #16] + 248:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 541 .loc 1 248 5 is_stmt 1 view .LVU140 + 249:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + 542 .loc 1 249 5 view .LVU141 + 249:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + 543 .loc 1 249 27 is_stmt 0 view .LVU142 + 544 004e 0323 movs r3, #3 + 545 0050 0693 str r3, [sp, #24] + 250:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 546 .loc 1 250 5 is_stmt 1 view .LVU143 + 250:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 547 .loc 1 250 31 is_stmt 0 view .LVU144 + 548 0052 0523 movs r3, #5 + 549 0054 0793 str r3, [sp, #28] + 251:Core/Src/stm32f3xx_hal_msp.c **** + 550 .loc 1 251 5 is_stmt 1 view .LVU145 + 551 0056 03A9 add r1, sp, #12 + 552 0058 4FF09040 mov r0, #1207959552 + 553 .LVL25: + 251:Core/Src/stm32f3xx_hal_msp.c **** + 554 .loc 1 251 5 is_stmt 0 view .LVU146 + 555 005c FFF7FEFF bl HAL_GPIO_Init + 556 .LVL26: + 557 .loc 1 258 1 view .LVU147 + 558 0060 DAE7 b .L29 + 559 .L34: + 560 0062 00BF .align 2 + 561 .L33: + 562 0064 00300140 .word 1073819648 + 563 .cfi_endproc + 564 .LFE135: + 566 .section .text.HAL_SPI_MspDeInit,"ax",%progbits + 567 .align 1 + 568 .global HAL_SPI_MspDeInit + 569 .syntax unified + 570 .thumb + 571 .thumb_func + 573 HAL_SPI_MspDeInit: + 574 .LVL27: + ARM GAS /tmp/ccdHkDFg.s page 17 + + + 575 .LFB136: + 259:Core/Src/stm32f3xx_hal_msp.c **** + 260:Core/Src/stm32f3xx_hal_msp.c **** /** + 261:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization + 262:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 263:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer + 264:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 265:Core/Src/stm32f3xx_hal_msp.c **** */ + 266:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) + 267:Core/Src/stm32f3xx_hal_msp.c **** { + 576 .loc 1 267 1 is_stmt 1 view -0 + 577 .cfi_startproc + 578 @ args = 0, pretend = 0, frame = 0 + 579 @ frame_needed = 0, uses_anonymous_args = 0 + 580 .loc 1 267 1 is_stmt 0 view .LVU149 + 581 0000 08B5 push {r3, lr} + 582 .cfi_def_cfa_offset 8 + 583 .cfi_offset 3, -8 + 584 .cfi_offset 14, -4 + 268:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI1) + 585 .loc 1 268 3 is_stmt 1 view .LVU150 + 586 .loc 1 268 10 is_stmt 0 view .LVU151 + 587 0002 0268 ldr r2, [r0] + 588 .loc 1 268 5 view .LVU152 + 589 0004 074B ldr r3, .L39 + 590 0006 9A42 cmp r2, r3 + 591 0008 00D0 beq .L38 + 592 .LVL28: + 593 .L35: + 269:Core/Src/stm32f3xx_hal_msp.c **** { + 270:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 0 */ + 271:Core/Src/stm32f3xx_hal_msp.c **** + 272:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 0 */ + 273:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + 274:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_DISABLE(); + 275:Core/Src/stm32f3xx_hal_msp.c **** + 276:Core/Src/stm32f3xx_hal_msp.c **** /**SPI1 GPIO Configuration + 277:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> SPI1_NSS + 278:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> SPI1_SCK + 279:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> SPI1_MISO + 280:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> SPI1_MOSI + 281:Core/Src/stm32f3xx_hal_msp.c **** */ + 282:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + 283:Core/Src/stm32f3xx_hal_msp.c **** + 284:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 1 */ + 285:Core/Src/stm32f3xx_hal_msp.c **** + 286:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 1 */ + 287:Core/Src/stm32f3xx_hal_msp.c **** } + 288:Core/Src/stm32f3xx_hal_msp.c **** + 289:Core/Src/stm32f3xx_hal_msp.c **** } + 594 .loc 1 289 1 view .LVU153 + 595 000a 08BD pop {r3, pc} + 596 .LVL29: + 597 .L38: + 274:Core/Src/stm32f3xx_hal_msp.c **** + 598 .loc 1 274 5 is_stmt 1 view .LVU154 + 599 000c 064A ldr r2, .L39+4 + ARM GAS /tmp/ccdHkDFg.s page 18 + + + 600 000e 9369 ldr r3, [r2, #24] + 601 0010 23F48053 bic r3, r3, #4096 + 602 0014 9361 str r3, [r2, #24] + 282:Core/Src/stm32f3xx_hal_msp.c **** + 603 .loc 1 282 5 view .LVU155 + 604 0016 F021 movs r1, #240 + 605 0018 4FF09040 mov r0, #1207959552 + 606 .LVL30: + 282:Core/Src/stm32f3xx_hal_msp.c **** + 607 .loc 1 282 5 is_stmt 0 view .LVU156 + 608 001c FFF7FEFF bl HAL_GPIO_DeInit + 609 .LVL31: + 610 .loc 1 289 1 view .LVU157 + 611 0020 F3E7 b .L35 + 612 .L40: + 613 0022 00BF .align 2 + 614 .L39: + 615 0024 00300140 .word 1073819648 + 616 0028 00100240 .word 1073876992 + 617 .cfi_endproc + 618 .LFE136: + 620 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits + 621 .align 1 + 622 .global HAL_TIM_PWM_MspInit + 623 .syntax unified + 624 .thumb + 625 .thumb_func + 627 HAL_TIM_PWM_MspInit: + 628 .LVL32: + 629 .LFB137: + 290:Core/Src/stm32f3xx_hal_msp.c **** + 291:Core/Src/stm32f3xx_hal_msp.c **** /** + 292:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP Initialization + 293:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example + 294:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer + 295:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 296:Core/Src/stm32f3xx_hal_msp.c **** */ + 297:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) + 298:Core/Src/stm32f3xx_hal_msp.c **** { + 630 .loc 1 298 1 is_stmt 1 view -0 + 631 .cfi_startproc + 632 @ args = 0, pretend = 0, frame = 8 + 633 @ frame_needed = 0, uses_anonymous_args = 0 + 634 @ link register save eliminated. + 635 .loc 1 298 1 is_stmt 0 view .LVU159 + 636 0000 82B0 sub sp, sp, #8 + 637 .cfi_def_cfa_offset 8 + 299:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM1) + 638 .loc 1 299 3 is_stmt 1 view .LVU160 + 639 .loc 1 299 14 is_stmt 0 view .LVU161 + 640 0002 0368 ldr r3, [r0] + 641 .loc 1 299 5 view .LVU162 + 642 0004 0E4A ldr r2, .L47 + 643 0006 9342 cmp r3, r2 + 644 0008 04D0 beq .L45 + 300:Core/Src/stm32f3xx_hal_msp.c **** { + 301:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 0 */ + ARM GAS /tmp/ccdHkDFg.s page 19 + + + 302:Core/Src/stm32f3xx_hal_msp.c **** + 303:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 0 */ + 304:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 305:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_ENABLE(); + 306:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 307:Core/Src/stm32f3xx_hal_msp.c **** + 308:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 1 */ + 309:Core/Src/stm32f3xx_hal_msp.c **** } + 310:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM15) + 645 .loc 1 310 8 is_stmt 1 view .LVU163 + 646 .loc 1 310 10 is_stmt 0 view .LVU164 + 647 000a 0E4A ldr r2, .L47+4 + 648 000c 9342 cmp r3, r2 + 649 000e 0CD0 beq .L46 + 650 .L41: + 311:Core/Src/stm32f3xx_hal_msp.c **** { + 312:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 0 */ + 313:Core/Src/stm32f3xx_hal_msp.c **** + 314:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspInit 0 */ + 315:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 316:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM15_CLK_ENABLE(); + 317:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 318:Core/Src/stm32f3xx_hal_msp.c **** + 319:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspInit 1 */ + 320:Core/Src/stm32f3xx_hal_msp.c **** } + 321:Core/Src/stm32f3xx_hal_msp.c **** + 322:Core/Src/stm32f3xx_hal_msp.c **** } + 651 .loc 1 322 1 view .LVU165 + 652 0010 02B0 add sp, sp, #8 + 653 .cfi_remember_state + 654 .cfi_def_cfa_offset 0 + 655 @ sp needed + 656 0012 7047 bx lr + 657 .L45: + 658 .cfi_restore_state + 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 659 .loc 1 305 5 is_stmt 1 view .LVU166 + 660 .LBB11: + 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 661 .loc 1 305 5 view .LVU167 + 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 662 .loc 1 305 5 view .LVU168 + 663 0014 0C4B ldr r3, .L47+8 + 664 0016 9A69 ldr r2, [r3, #24] + 665 0018 42F40062 orr r2, r2, #2048 + 666 001c 9A61 str r2, [r3, #24] + 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 667 .loc 1 305 5 view .LVU169 + 668 001e 9B69 ldr r3, [r3, #24] + 669 0020 03F40063 and r3, r3, #2048 + 670 0024 0093 str r3, [sp] + 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 671 .loc 1 305 5 view .LVU170 + 672 0026 009B ldr r3, [sp] + 673 .LBE11: + 305:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ + 674 .loc 1 305 5 view .LVU171 + ARM GAS /tmp/ccdHkDFg.s page 20 + + + 675 0028 F2E7 b .L41 + 676 .L46: + 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 677 .loc 1 316 5 view .LVU172 + 678 .LBB12: + 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 679 .loc 1 316 5 view .LVU173 + 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 680 .loc 1 316 5 view .LVU174 + 681 002a 074B ldr r3, .L47+8 + 682 002c 9A69 ldr r2, [r3, #24] + 683 002e 42F48032 orr r2, r2, #65536 + 684 0032 9A61 str r2, [r3, #24] + 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 685 .loc 1 316 5 view .LVU175 + 686 0034 9B69 ldr r3, [r3, #24] + 687 0036 03F48033 and r3, r3, #65536 + 688 003a 0193 str r3, [sp, #4] + 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 689 .loc 1 316 5 view .LVU176 + 690 003c 019B ldr r3, [sp, #4] + 691 .LBE12: + 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ + 692 .loc 1 316 5 discriminator 1 view .LVU177 + 693 .loc 1 322 1 is_stmt 0 view .LVU178 + 694 003e E7E7 b .L41 + 695 .L48: + 696 .align 2 + 697 .L47: + 698 0040 002C0140 .word 1073818624 + 699 0044 00400140 .word 1073823744 + 700 0048 00100240 .word 1073876992 + 701 .cfi_endproc + 702 .LFE137: + 704 .section .text.HAL_TIM_MspPostInit,"ax",%progbits + 705 .align 1 + 706 .global HAL_TIM_MspPostInit + 707 .syntax unified + 708 .thumb + 709 .thumb_func + 711 HAL_TIM_MspPostInit: + 712 .LVL33: + 713 .LFB138: + 323:Core/Src/stm32f3xx_hal_msp.c **** + 324:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) + 325:Core/Src/stm32f3xx_hal_msp.c **** { + 714 .loc 1 325 1 is_stmt 1 view -0 + 715 .cfi_startproc + 716 @ args = 0, pretend = 0, frame = 32 + 717 @ frame_needed = 0, uses_anonymous_args = 0 + 718 .loc 1 325 1 is_stmt 0 view .LVU180 + 719 0000 00B5 push {lr} + 720 .cfi_def_cfa_offset 4 + 721 .cfi_offset 14, -4 + 722 0002 89B0 sub sp, sp, #36 + 723 .cfi_def_cfa_offset 40 + 326:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + ARM GAS /tmp/ccdHkDFg.s page 21 + + + 724 .loc 1 326 3 is_stmt 1 view .LVU181 + 725 .loc 1 326 20 is_stmt 0 view .LVU182 + 726 0004 0023 movs r3, #0 + 727 0006 0393 str r3, [sp, #12] + 728 0008 0493 str r3, [sp, #16] + 729 000a 0593 str r3, [sp, #20] + 730 000c 0693 str r3, [sp, #24] + 731 000e 0793 str r3, [sp, #28] + 327:Core/Src/stm32f3xx_hal_msp.c **** if(htim->Instance==TIM1) + 732 .loc 1 327 3 is_stmt 1 view .LVU183 + 733 .loc 1 327 10 is_stmt 0 view .LVU184 + 734 0010 0368 ldr r3, [r0] + 735 .loc 1 327 5 view .LVU185 + 736 0012 1A4A ldr r2, .L55 + 737 0014 9342 cmp r3, r2 + 738 0016 05D0 beq .L53 + 328:Core/Src/stm32f3xx_hal_msp.c **** { + 329:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 0 */ + 330:Core/Src/stm32f3xx_hal_msp.c **** + 331:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspPostInit 0 */ + 332:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 333:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 334:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> TIM1_CH3N + 335:Core/Src/stm32f3xx_hal_msp.c **** */ + 336:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; + 337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 339:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 340:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_TIM1; + 341:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 342:Core/Src/stm32f3xx_hal_msp.c **** + 343:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 1 */ + 344:Core/Src/stm32f3xx_hal_msp.c **** + 345:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspPostInit 1 */ + 346:Core/Src/stm32f3xx_hal_msp.c **** } + 347:Core/Src/stm32f3xx_hal_msp.c **** else if(htim->Instance==TIM15) + 739 .loc 1 347 8 is_stmt 1 view .LVU186 + 740 .loc 1 347 10 is_stmt 0 view .LVU187 + 741 0018 194A ldr r2, .L55+4 + 742 001a 9342 cmp r3, r2 + 743 001c 18D0 beq .L54 + 744 .LVL34: + 745 .L49: + 348:Core/Src/stm32f3xx_hal_msp.c **** { + 349:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspPostInit 0 */ + 350:Core/Src/stm32f3xx_hal_msp.c **** + 351:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspPostInit 0 */ + 352:Core/Src/stm32f3xx_hal_msp.c **** + 353:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 354:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 355:Core/Src/stm32f3xx_hal_msp.c **** PA2 ------> TIM15_CH1 + 356:Core/Src/stm32f3xx_hal_msp.c **** PA3 ------> TIM15_CH2 + 357:Core/Src/stm32f3xx_hal_msp.c **** */ + 358:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = PWM_PG_FAN1_Pin|PWM_PG_FAN2_Pin; + 359:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 360:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 361:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + ARM GAS /tmp/ccdHkDFg.s page 22 + + + 362:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_TIM15; + 363:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 364:Core/Src/stm32f3xx_hal_msp.c **** + 365:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspPostInit 1 */ + 366:Core/Src/stm32f3xx_hal_msp.c **** + 367:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspPostInit 1 */ + 368:Core/Src/stm32f3xx_hal_msp.c **** } + 369:Core/Src/stm32f3xx_hal_msp.c **** + 370:Core/Src/stm32f3xx_hal_msp.c **** } + 746 .loc 1 370 1 view .LVU188 + 747 001e 09B0 add sp, sp, #36 + 748 .cfi_remember_state + 749 .cfi_def_cfa_offset 4 + 750 @ sp needed + 751 0020 5DF804FB ldr pc, [sp], #4 + 752 .LVL35: + 753 .L53: + 754 .cfi_restore_state + 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 755 .loc 1 332 5 is_stmt 1 view .LVU189 + 756 .LBB13: + 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 757 .loc 1 332 5 view .LVU190 + 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 758 .loc 1 332 5 view .LVU191 + 759 0024 174B ldr r3, .L55+8 + 760 0026 5A69 ldr r2, [r3, #20] + 761 0028 42F48022 orr r2, r2, #262144 + 762 002c 5A61 str r2, [r3, #20] + 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 763 .loc 1 332 5 view .LVU192 + 764 002e 5B69 ldr r3, [r3, #20] + 765 0030 03F48023 and r3, r3, #262144 + 766 0034 0193 str r3, [sp, #4] + 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 767 .loc 1 332 5 view .LVU193 + 768 0036 019B ldr r3, [sp, #4] + 769 .LBE13: + 332:Core/Src/stm32f3xx_hal_msp.c **** /**TIM1 GPIO Configuration + 770 .loc 1 332 5 view .LVU194 + 336:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 771 .loc 1 336 5 view .LVU195 + 336:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 772 .loc 1 336 25 is_stmt 0 view .LVU196 + 773 0038 4FF40043 mov r3, #32768 + 774 003c 0393 str r3, [sp, #12] + 337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 775 .loc 1 337 5 is_stmt 1 view .LVU197 + 337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 776 .loc 1 337 26 is_stmt 0 view .LVU198 + 777 003e 0223 movs r3, #2 + 778 0040 0493 str r3, [sp, #16] + 338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 779 .loc 1 338 5 is_stmt 1 view .LVU199 + 339:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_TIM1; + 780 .loc 1 339 5 view .LVU200 + 340:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + ARM GAS /tmp/ccdHkDFg.s page 23 + + + 781 .loc 1 340 5 view .LVU201 + 340:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 782 .loc 1 340 31 is_stmt 0 view .LVU202 + 783 0042 0423 movs r3, #4 + 784 0044 0793 str r3, [sp, #28] + 341:Core/Src/stm32f3xx_hal_msp.c **** + 785 .loc 1 341 5 is_stmt 1 view .LVU203 + 786 0046 03A9 add r1, sp, #12 + 787 0048 0F48 ldr r0, .L55+12 + 788 .LVL36: + 341:Core/Src/stm32f3xx_hal_msp.c **** + 789 .loc 1 341 5 is_stmt 0 view .LVU204 + 790 004a FFF7FEFF bl HAL_GPIO_Init + 791 .LVL37: + 792 004e E6E7 b .L49 + 793 .LVL38: + 794 .L54: + 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 795 .loc 1 353 5 is_stmt 1 view .LVU205 + 796 .LBB14: + 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 797 .loc 1 353 5 view .LVU206 + 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 798 .loc 1 353 5 view .LVU207 + 799 0050 0C4B ldr r3, .L55+8 + 800 0052 5A69 ldr r2, [r3, #20] + 801 0054 42F40032 orr r2, r2, #131072 + 802 0058 5A61 str r2, [r3, #20] + 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 803 .loc 1 353 5 view .LVU208 + 804 005a 5B69 ldr r3, [r3, #20] + 805 005c 03F40033 and r3, r3, #131072 + 806 0060 0293 str r3, [sp, #8] + 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 807 .loc 1 353 5 view .LVU209 + 808 0062 029B ldr r3, [sp, #8] + 809 .LBE14: + 353:Core/Src/stm32f3xx_hal_msp.c **** /**TIM15 GPIO Configuration + 810 .loc 1 353 5 view .LVU210 + 358:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 811 .loc 1 358 5 view .LVU211 + 358:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 812 .loc 1 358 25 is_stmt 0 view .LVU212 + 813 0064 0C23 movs r3, #12 + 814 0066 0393 str r3, [sp, #12] + 359:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 815 .loc 1 359 5 is_stmt 1 view .LVU213 + 359:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 816 .loc 1 359 26 is_stmt 0 view .LVU214 + 817 0068 0223 movs r3, #2 + 818 006a 0493 str r3, [sp, #16] + 360:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 819 .loc 1 360 5 is_stmt 1 view .LVU215 + 361:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_TIM15; + 820 .loc 1 361 5 view .LVU216 + 362:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 821 .loc 1 362 5 view .LVU217 + ARM GAS /tmp/ccdHkDFg.s page 24 + + + 362:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 822 .loc 1 362 31 is_stmt 0 view .LVU218 + 823 006c 0923 movs r3, #9 + 824 006e 0793 str r3, [sp, #28] + 363:Core/Src/stm32f3xx_hal_msp.c **** + 825 .loc 1 363 5 is_stmt 1 view .LVU219 + 826 0070 03A9 add r1, sp, #12 + 827 0072 4FF09040 mov r0, #1207959552 + 828 .LVL39: + 363:Core/Src/stm32f3xx_hal_msp.c **** + 829 .loc 1 363 5 is_stmt 0 view .LVU220 + 830 0076 FFF7FEFF bl HAL_GPIO_Init + 831 .LVL40: + 832 .loc 1 370 1 view .LVU221 + 833 007a D0E7 b .L49 + 834 .L56: + 835 .align 2 + 836 .L55: + 837 007c 002C0140 .word 1073818624 + 838 0080 00400140 .word 1073823744 + 839 0084 00100240 .word 1073876992 + 840 0088 00040048 .word 1207960576 + 841 .cfi_endproc + 842 .LFE138: + 844 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits + 845 .align 1 + 846 .global HAL_TIM_PWM_MspDeInit + 847 .syntax unified + 848 .thumb + 849 .thumb_func + 851 HAL_TIM_PWM_MspDeInit: + 852 .LVL41: + 853 .LFB139: + 371:Core/Src/stm32f3xx_hal_msp.c **** /** + 372:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP De-Initialization + 373:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 374:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer + 375:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 376:Core/Src/stm32f3xx_hal_msp.c **** */ + 377:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) + 378:Core/Src/stm32f3xx_hal_msp.c **** { + 854 .loc 1 378 1 is_stmt 1 view -0 + 855 .cfi_startproc + 856 @ args = 0, pretend = 0, frame = 0 + 857 @ frame_needed = 0, uses_anonymous_args = 0 + 858 @ link register save eliminated. + 379:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM1) + 859 .loc 1 379 3 view .LVU223 + 860 .loc 1 379 14 is_stmt 0 view .LVU224 + 861 0000 0368 ldr r3, [r0] + 862 .loc 1 379 5 view .LVU225 + 863 0002 0A4A ldr r2, .L62 + 864 0004 9342 cmp r3, r2 + 865 0006 03D0 beq .L60 + 380:Core/Src/stm32f3xx_hal_msp.c **** { + 381:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 0 */ + 382:Core/Src/stm32f3xx_hal_msp.c **** + ARM GAS /tmp/ccdHkDFg.s page 25 + + + 383:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 0 */ + 384:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + 385:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_DISABLE(); + 386:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ + 387:Core/Src/stm32f3xx_hal_msp.c **** + 388:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 1 */ + 389:Core/Src/stm32f3xx_hal_msp.c **** } + 390:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM15) + 866 .loc 1 390 8 is_stmt 1 view .LVU226 + 867 .loc 1 390 10 is_stmt 0 view .LVU227 + 868 0008 094A ldr r2, .L62+4 + 869 000a 9342 cmp r3, r2 + 870 000c 07D0 beq .L61 + 871 .L57: + 391:Core/Src/stm32f3xx_hal_msp.c **** { + 392:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 0 */ + 393:Core/Src/stm32f3xx_hal_msp.c **** + 394:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspDeInit 0 */ + 395:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + 396:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM15_CLK_DISABLE(); + 397:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 1 */ + 398:Core/Src/stm32f3xx_hal_msp.c **** + 399:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM15_MspDeInit 1 */ + 400:Core/Src/stm32f3xx_hal_msp.c **** } + 401:Core/Src/stm32f3xx_hal_msp.c **** + 402:Core/Src/stm32f3xx_hal_msp.c **** } + 872 .loc 1 402 1 view .LVU228 + 873 000e 7047 bx lr + 874 .L60: + 385:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ + 875 .loc 1 385 5 is_stmt 1 view .LVU229 + 876 0010 02F56442 add r2, r2, #58368 + 877 0014 9369 ldr r3, [r2, #24] + 878 0016 23F40063 bic r3, r3, #2048 + 879 001a 9361 str r3, [r2, #24] + 880 001c 7047 bx lr + 881 .L61: + 396:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 1 */ + 882 .loc 1 396 5 view .LVU230 + 883 001e 02F55042 add r2, r2, #53248 + 884 0022 9369 ldr r3, [r2, #24] + 885 0024 23F48033 bic r3, r3, #65536 + 886 0028 9361 str r3, [r2, #24] + 887 .loc 1 402 1 is_stmt 0 view .LVU231 + 888 002a F0E7 b .L57 + 889 .L63: + 890 .align 2 + 891 .L62: + 892 002c 002C0140 .word 1073818624 + 893 0030 00400140 .word 1073823744 + 894 .cfi_endproc + 895 .LFE139: + 897 .section .text.HAL_UART_MspInit,"ax",%progbits + 898 .align 1 + 899 .global HAL_UART_MspInit + 900 .syntax unified + 901 .thumb + ARM GAS /tmp/ccdHkDFg.s page 26 + + + 902 .thumb_func + 904 HAL_UART_MspInit: + 905 .LVL42: + 906 .LFB140: + 403:Core/Src/stm32f3xx_hal_msp.c **** + 404:Core/Src/stm32f3xx_hal_msp.c **** /** + 405:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP Initialization + 406:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example + 407:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer + 408:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 409:Core/Src/stm32f3xx_hal_msp.c **** */ + 410:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) + 411:Core/Src/stm32f3xx_hal_msp.c **** { + 907 .loc 1 411 1 is_stmt 1 view -0 + 908 .cfi_startproc + 909 @ args = 0, pretend = 0, frame = 32 + 910 @ frame_needed = 0, uses_anonymous_args = 0 + 911 .loc 1 411 1 is_stmt 0 view .LVU233 + 912 0000 00B5 push {lr} + 913 .cfi_def_cfa_offset 4 + 914 .cfi_offset 14, -4 + 915 0002 89B0 sub sp, sp, #36 + 916 .cfi_def_cfa_offset 40 + 412:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 917 .loc 1 412 3 is_stmt 1 view .LVU234 + 918 .loc 1 412 20 is_stmt 0 view .LVU235 + 919 0004 0023 movs r3, #0 + 920 0006 0393 str r3, [sp, #12] + 921 0008 0493 str r3, [sp, #16] + 922 000a 0593 str r3, [sp, #20] + 923 000c 0693 str r3, [sp, #24] + 924 000e 0793 str r3, [sp, #28] + 413:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1) + 925 .loc 1 413 3 is_stmt 1 view .LVU236 + 926 .loc 1 413 11 is_stmt 0 view .LVU237 + 927 0010 0268 ldr r2, [r0] + 928 .loc 1 413 5 view .LVU238 + 929 0012 134B ldr r3, .L68 + 930 0014 9A42 cmp r2, r3 + 931 0016 02D0 beq .L67 + 932 .LVL43: + 933 .L64: + 414:Core/Src/stm32f3xx_hal_msp.c **** { + 415:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */ + 416:Core/Src/stm32f3xx_hal_msp.c **** + 417:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */ + 418:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 419:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE(); + 420:Core/Src/stm32f3xx_hal_msp.c **** + 421:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 422:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 423:Core/Src/stm32f3xx_hal_msp.c **** PB6 ------> USART1_TX + 424:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> USART1_RX + 425:Core/Src/stm32f3xx_hal_msp.c **** */ + 426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + 427:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 428:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + ARM GAS /tmp/ccdHkDFg.s page 27 + + + 429:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 430:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + 431:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 432:Core/Src/stm32f3xx_hal_msp.c **** + 433:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */ + 434:Core/Src/stm32f3xx_hal_msp.c **** + 435:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */ + 436:Core/Src/stm32f3xx_hal_msp.c **** } + 437:Core/Src/stm32f3xx_hal_msp.c **** + 438:Core/Src/stm32f3xx_hal_msp.c **** } + 934 .loc 1 438 1 view .LVU239 + 935 0018 09B0 add sp, sp, #36 + 936 .cfi_remember_state + 937 .cfi_def_cfa_offset 4 + 938 @ sp needed + 939 001a 5DF804FB ldr pc, [sp], #4 + 940 .LVL44: + 941 .L67: + 942 .cfi_restore_state + 419:Core/Src/stm32f3xx_hal_msp.c **** + 943 .loc 1 419 5 is_stmt 1 view .LVU240 + 944 .LBB15: + 419:Core/Src/stm32f3xx_hal_msp.c **** + 945 .loc 1 419 5 view .LVU241 + 419:Core/Src/stm32f3xx_hal_msp.c **** + 946 .loc 1 419 5 view .LVU242 + 947 001e 03F55843 add r3, r3, #55296 + 948 0022 9A69 ldr r2, [r3, #24] + 949 0024 42F48042 orr r2, r2, #16384 + 950 0028 9A61 str r2, [r3, #24] + 419:Core/Src/stm32f3xx_hal_msp.c **** + 951 .loc 1 419 5 view .LVU243 + 952 002a 9A69 ldr r2, [r3, #24] + 953 002c 02F48042 and r2, r2, #16384 + 954 0030 0192 str r2, [sp, #4] + 419:Core/Src/stm32f3xx_hal_msp.c **** + 955 .loc 1 419 5 view .LVU244 + 956 0032 019A ldr r2, [sp, #4] + 957 .LBE15: + 419:Core/Src/stm32f3xx_hal_msp.c **** + 958 .loc 1 419 5 view .LVU245 + 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 959 .loc 1 421 5 view .LVU246 + 960 .LBB16: + 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 961 .loc 1 421 5 view .LVU247 + 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 962 .loc 1 421 5 view .LVU248 + 963 0034 5A69 ldr r2, [r3, #20] + 964 0036 42F48022 orr r2, r2, #262144 + 965 003a 5A61 str r2, [r3, #20] + 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 966 .loc 1 421 5 view .LVU249 + 967 003c 5B69 ldr r3, [r3, #20] + 968 003e 03F48023 and r3, r3, #262144 + 969 0042 0293 str r3, [sp, #8] + 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + ARM GAS /tmp/ccdHkDFg.s page 28 + + + 970 .loc 1 421 5 view .LVU250 + 971 0044 029B ldr r3, [sp, #8] + 972 .LBE16: + 421:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 973 .loc 1 421 5 view .LVU251 + 426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 974 .loc 1 426 5 view .LVU252 + 426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 975 .loc 1 426 25 is_stmt 0 view .LVU253 + 976 0046 C023 movs r3, #192 + 977 0048 0393 str r3, [sp, #12] + 427:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 978 .loc 1 427 5 is_stmt 1 view .LVU254 + 427:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 979 .loc 1 427 26 is_stmt 0 view .LVU255 + 980 004a 0223 movs r3, #2 + 981 004c 0493 str r3, [sp, #16] + 428:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 982 .loc 1 428 5 is_stmt 1 view .LVU256 + 429:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + 983 .loc 1 429 5 view .LVU257 + 429:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + 984 .loc 1 429 27 is_stmt 0 view .LVU258 + 985 004e 0323 movs r3, #3 + 986 0050 0693 str r3, [sp, #24] + 430:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 987 .loc 1 430 5 is_stmt 1 view .LVU259 + 430:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 988 .loc 1 430 31 is_stmt 0 view .LVU260 + 989 0052 0723 movs r3, #7 + 990 0054 0793 str r3, [sp, #28] + 431:Core/Src/stm32f3xx_hal_msp.c **** + 991 .loc 1 431 5 is_stmt 1 view .LVU261 + 992 0056 03A9 add r1, sp, #12 + 993 0058 0248 ldr r0, .L68+4 + 994 .LVL45: + 431:Core/Src/stm32f3xx_hal_msp.c **** + 995 .loc 1 431 5 is_stmt 0 view .LVU262 + 996 005a FFF7FEFF bl HAL_GPIO_Init + 997 .LVL46: + 998 .loc 1 438 1 view .LVU263 + 999 005e DBE7 b .L64 + 1000 .L69: + 1001 .align 2 + 1002 .L68: + 1003 0060 00380140 .word 1073821696 + 1004 0064 00040048 .word 1207960576 + 1005 .cfi_endproc + 1006 .LFE140: + 1008 .section .text.HAL_UART_MspDeInit,"ax",%progbits + 1009 .align 1 + 1010 .global HAL_UART_MspDeInit + 1011 .syntax unified + 1012 .thumb + 1013 .thumb_func + 1015 HAL_UART_MspDeInit: + 1016 .LVL47: + ARM GAS /tmp/ccdHkDFg.s page 29 + + + 1017 .LFB141: + 439:Core/Src/stm32f3xx_hal_msp.c **** + 440:Core/Src/stm32f3xx_hal_msp.c **** /** + 441:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP De-Initialization + 442:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 443:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer + 444:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 445:Core/Src/stm32f3xx_hal_msp.c **** */ + 446:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) + 447:Core/Src/stm32f3xx_hal_msp.c **** { + 1018 .loc 1 447 1 is_stmt 1 view -0 + 1019 .cfi_startproc + 1020 @ args = 0, pretend = 0, frame = 0 + 1021 @ frame_needed = 0, uses_anonymous_args = 0 + 1022 .loc 1 447 1 is_stmt 0 view .LVU265 + 1023 0000 08B5 push {r3, lr} + 1024 .cfi_def_cfa_offset 8 + 1025 .cfi_offset 3, -8 + 1026 .cfi_offset 14, -4 + 448:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1) + 1027 .loc 1 448 3 is_stmt 1 view .LVU266 + 1028 .loc 1 448 11 is_stmt 0 view .LVU267 + 1029 0002 0268 ldr r2, [r0] + 1030 .loc 1 448 5 view .LVU268 + 1031 0004 064B ldr r3, .L74 + 1032 0006 9A42 cmp r2, r3 + 1033 0008 00D0 beq .L73 + 1034 .LVL48: + 1035 .L70: + 449:Core/Src/stm32f3xx_hal_msp.c **** { + 450:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */ + 451:Core/Src/stm32f3xx_hal_msp.c **** + 452:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */ + 453:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + 454:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE(); + 455:Core/Src/stm32f3xx_hal_msp.c **** + 456:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration + 457:Core/Src/stm32f3xx_hal_msp.c **** PB6 ------> USART1_TX + 458:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> USART1_RX + 459:Core/Src/stm32f3xx_hal_msp.c **** */ + 460:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7); + 461:Core/Src/stm32f3xx_hal_msp.c **** + 462:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */ + 463:Core/Src/stm32f3xx_hal_msp.c **** + 464:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */ + 465:Core/Src/stm32f3xx_hal_msp.c **** } + 466:Core/Src/stm32f3xx_hal_msp.c **** + 467:Core/Src/stm32f3xx_hal_msp.c **** } + 1036 .loc 1 467 1 view .LVU269 + 1037 000a 08BD pop {r3, pc} + 1038 .LVL49: + 1039 .L73: + 454:Core/Src/stm32f3xx_hal_msp.c **** + 1040 .loc 1 454 5 is_stmt 1 view .LVU270 + 1041 000c 054A ldr r2, .L74+4 + 1042 000e 9369 ldr r3, [r2, #24] + 1043 0010 23F48043 bic r3, r3, #16384 + ARM GAS /tmp/ccdHkDFg.s page 30 + + + 1044 0014 9361 str r3, [r2, #24] + 460:Core/Src/stm32f3xx_hal_msp.c **** + 1045 .loc 1 460 5 view .LVU271 + 1046 0016 C021 movs r1, #192 + 1047 0018 0348 ldr r0, .L74+8 + 1048 .LVL50: + 460:Core/Src/stm32f3xx_hal_msp.c **** + 1049 .loc 1 460 5 is_stmt 0 view .LVU272 + 1050 001a FFF7FEFF bl HAL_GPIO_DeInit + 1051 .LVL51: + 1052 .loc 1 467 1 view .LVU273 + 1053 001e F4E7 b .L70 + 1054 .L75: + 1055 .align 2 + 1056 .L74: + 1057 0020 00380140 .word 1073821696 + 1058 0024 00100240 .word 1073876992 + 1059 0028 00040048 .word 1207960576 + 1060 .cfi_endproc + 1061 .LFE141: + 1063 .text + 1064 .Letext0: + 1065 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1066 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1067 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1068 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1069 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1070 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 1071 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 1072 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" + 1073 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + 1074 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 1075 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" + 1076 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" + ARM GAS /tmp/ccdHkDFg.s page 31 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_msp.c + /tmp/ccdHkDFg.s:21 .text.HAL_MspInit:00000000 $t + /tmp/ccdHkDFg.s:27 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccdHkDFg.s:75 .text.HAL_MspInit:0000002c $d + /tmp/ccdHkDFg.s:80 .text.HAL_CAN_MspInit:00000000 $t + /tmp/ccdHkDFg.s:86 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit + /tmp/ccdHkDFg.s:185 .text.HAL_CAN_MspInit:00000064 $d + /tmp/ccdHkDFg.s:190 .text.HAL_CAN_MspDeInit:00000000 $t + /tmp/ccdHkDFg.s:196 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit + /tmp/ccdHkDFg.s:238 .text.HAL_CAN_MspDeInit:00000024 $d + /tmp/ccdHkDFg.s:244 .text.HAL_I2C_MspInit:00000000 $t + /tmp/ccdHkDFg.s:250 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit + /tmp/ccdHkDFg.s:390 .text.HAL_I2C_MspInit:0000008c $d + /tmp/ccdHkDFg.s:397 .text.HAL_I2C_MspDeInit:00000000 $t + /tmp/ccdHkDFg.s:403 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit + /tmp/ccdHkDFg.s:450 .text.HAL_I2C_MspDeInit:00000030 $d + /tmp/ccdHkDFg.s:457 .text.HAL_SPI_MspInit:00000000 $t + /tmp/ccdHkDFg.s:463 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit + /tmp/ccdHkDFg.s:562 .text.HAL_SPI_MspInit:00000064 $d + /tmp/ccdHkDFg.s:567 .text.HAL_SPI_MspDeInit:00000000 $t + /tmp/ccdHkDFg.s:573 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit + /tmp/ccdHkDFg.s:615 .text.HAL_SPI_MspDeInit:00000024 $d + /tmp/ccdHkDFg.s:621 .text.HAL_TIM_PWM_MspInit:00000000 $t + /tmp/ccdHkDFg.s:627 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit + /tmp/ccdHkDFg.s:698 .text.HAL_TIM_PWM_MspInit:00000040 $d + /tmp/ccdHkDFg.s:705 .text.HAL_TIM_MspPostInit:00000000 $t + /tmp/ccdHkDFg.s:711 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit + /tmp/ccdHkDFg.s:837 .text.HAL_TIM_MspPostInit:0000007c $d + /tmp/ccdHkDFg.s:845 .text.HAL_TIM_PWM_MspDeInit:00000000 $t + /tmp/ccdHkDFg.s:851 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit + /tmp/ccdHkDFg.s:892 .text.HAL_TIM_PWM_MspDeInit:0000002c $d + /tmp/ccdHkDFg.s:898 .text.HAL_UART_MspInit:00000000 $t + /tmp/ccdHkDFg.s:904 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit + /tmp/ccdHkDFg.s:1003 .text.HAL_UART_MspInit:00000060 $d + /tmp/ccdHkDFg.s:1009 .text.HAL_UART_MspDeInit:00000000 $t + /tmp/ccdHkDFg.s:1015 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit + /tmp/ccdHkDFg.s:1057 .text.HAL_UART_MspDeInit:00000020 $d + +UNDEFINED SYMBOLS +HAL_GPIO_Init +HAL_GPIO_DeInit diff --git a/build/stm32f3xx_hal_msp.o b/build/stm32f3xx_hal_msp.o new file mode 100644 index 0000000..e49d434 Binary files /dev/null and b/build/stm32f3xx_hal_msp.o differ diff --git a/build/stm32f3xx_hal_pwr.d b/build/stm32f3xx_hal_pwr.d new file mode 100644 index 0000000..379a5a7 --- /dev/null +++ b/build/stm32f3xx_hal_pwr.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_pwr.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_pwr.lst b/build/stm32f3xx_hal_pwr.lst new file mode 100644 index 0000000..895f4be --- /dev/null +++ b/build/stm32f3xx_hal_pwr.lst @@ -0,0 +1,989 @@ +ARM GAS /tmp/cc53YuwZ.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_pwr.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" + 20 .section .text.HAL_PWR_DeInit,"ax",%progbits + 21 .align 1 + 22 .global HAL_PWR_DeInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_PWR_DeInit: + 28 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @file stm32f3xx_hal_pwr.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief PWR HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + Initialization/de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ****************************************************************************** + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @attention + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * All rights reserved. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * in the root directory of this software component. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ****************************************************************************** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #include "stm32f3xx_hal.h" + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @addtogroup STM32F3xx_HAL_Driver + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{ + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + ARM GAS /tmp/cc53YuwZ.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR PWR + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief PWR HAL module driver + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #ifdef HAL_PWR_MODULE_ENABLED + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private typedef -----------------------------------------------------------*/ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private define ------------------------------------------------------------*/ + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private macro -------------------------------------------------------------*/ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private variables ---------------------------------------------------------*/ + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private function prototypes -----------------------------------------------*/ + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private functions ---------------------------------------------------------*/ + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions PWR Exported Functions + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{ + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Initialization and de-initialization functions + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================================================== + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ##### Initialization and de-initialization functions ##### + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================================================== + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** After reset, the backup domain (RTC registers, RTC backup data + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** registers and backup SRAM) is protected against possible unwanted + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** write accesses. + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows: + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro. + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{ + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Deinitializes the PWR peripheral registers to their default reset values. + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DeInit(void) + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 29 .loc 1 74 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __HAL_RCC_PWR_FORCE_RESET(); + 34 .loc 1 75 3 view .LVU1 + 35 0000 044B ldr r3, .L2 + 36 0002 1A69 ldr r2, [r3, #16] + 37 0004 42F08052 orr r2, r2, #268435456 + 38 0008 1A61 str r2, [r3, #16] + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __HAL_RCC_PWR_RELEASE_RESET(); + 39 .loc 1 76 3 view .LVU2 + ARM GAS /tmp/cc53YuwZ.s page 3 + + + 40 000a 1A69 ldr r2, [r3, #16] + 41 000c 22F08052 bic r2, r2, #268435456 + 42 0010 1A61 str r2, [r3, #16] + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 43 .loc 1 77 1 is_stmt 0 view .LVU3 + 44 0012 7047 bx lr + 45 .L3: + 46 .align 2 + 47 .L2: + 48 0014 00100240 .word 1073876992 + 49 .cfi_endproc + 50 .LFE130: + 52 .section .text.HAL_PWR_EnableBkUpAccess,"ax",%progbits + 53 .align 1 + 54 .global HAL_PWR_EnableBkUpAccess + 55 .syntax unified + 56 .thumb + 57 .thumb_func + 59 HAL_PWR_EnableBkUpAccess: + 60 .LFB131: + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables access to the backup domain (RTC registers, RTC + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * backup data registers and backup SRAM). + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void) + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 61 .loc 1 87 1 is_stmt 1 view -0 + 62 .cfi_startproc + 63 @ args = 0, pretend = 0, frame = 0 + 64 @ frame_needed = 0, uses_anonymous_args = 0 + 65 @ link register save eliminated. + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 66 .loc 1 88 3 view .LVU5 + 67 0000 024A ldr r2, .L5 + 68 0002 1368 ldr r3, [r2] + 69 0004 43F48073 orr r3, r3, #256 + 70 0008 1360 str r3, [r2] + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 71 .loc 1 89 1 is_stmt 0 view .LVU6 + 72 000a 7047 bx lr + 73 .L6: + 74 .align 2 + 75 .L5: + 76 000c 00700040 .word 1073770496 + 77 .cfi_endproc + 78 .LFE131: + 80 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits + 81 .align 1 + 82 .global HAL_PWR_DisableBkUpAccess + 83 .syntax unified + 84 .thumb + 85 .thumb_func + 87 HAL_PWR_DisableBkUpAccess: + ARM GAS /tmp/cc53YuwZ.s page 4 + + + 88 .LFB132: + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * backup data registers and backup SRAM). + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void) + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 89 .loc 1 99 1 is_stmt 1 view -0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 @ link register save eliminated. + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(PWR->CR, PWR_CR_DBP); + 94 .loc 1 100 3 view .LVU8 + 95 0000 024A ldr r2, .L8 + 96 0002 1368 ldr r3, [r2] + 97 0004 23F48073 bic r3, r3, #256 + 98 0008 1360 str r3, [r2] + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 99 .loc 1 101 1 is_stmt 0 view .LVU9 + 100 000a 7047 bx lr + 101 .L9: + 102 .align 2 + 103 .L8: + 104 000c 00700040 .word 1073770496 + 105 .cfi_endproc + 106 .LFE132: + 108 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits + 109 .align 1 + 110 .global HAL_PWR_EnableWakeUpPin + 111 .syntax unified + 112 .thumb + 113 .thumb_func + 115 HAL_PWR_EnableWakeUpPin: + 116 .LVL0: + 117 .LFB133: + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @} + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Low Power modes configuration functions + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================================================== + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ##### Peripheral Control functions ##### + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================================================== + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** WakeUp pin configuration *** + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================================ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + ARM GAS /tmp/cc53YuwZ.s page 5 + + + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** forced in input pull down configuration and is active on rising edges. + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) There are up to three WakeUp pins: + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 1 on PA.00. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 2 on PC.13 (STM32F303xC, STM32F303xE only). + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 3 on PE.06. + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Main and Backup Regulators configuration *** + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================================================ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD) + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** save battery life. + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** protected to prevent confidential data, such as cryptographic private + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** key, from being accessed. The backup SRAM can be erased only through + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the Flash interface when a protection level change from level 1 to + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** level 0 is requested. + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** -@- Refer to the description of Read protection (RDP) in the Flash + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** programming manual. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** Refer to the datasheets for more details. + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Low Power modes configuration *** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ===================================== + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The devices feature 3 low-power modes: + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** in low power mode + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off (mode not available on STM32F3x8 devices). + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Sleep mode *** + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================== + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry: + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** functions with + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit: + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Any peripheral interrupt acknowledged by the nested vectored interrupt + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode. + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Stop mode *** + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================= + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI, + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** are preserved. + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode to minimize the co + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** function with: + ARM GAS /tmp/cc53YuwZ.s page 6 + + + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Main regulator ON or + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Low Power regulator ON. + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction or + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit: + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode. + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** when programmed in wakeup mode (the peripheral must be + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** programmed in wakeup mode and the corresponding interrupt vector + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** must be enabled in the NVIC). + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Standby mode *** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ==================== + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** except for the RTC registers, RTC backup registers, backup SRAM and Standby + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** circuitry. + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The voltage regulator is OFF. + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit: + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset. + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Auto-wakeup (AWU) from low-power mode *** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ============================================= + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** Wakeup event, a tamper event, a time-stamp event, or a comparator event, + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** without depending on an external interrupt (Auto-wakeup mode). + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions. + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Comparator auto-wakeup (AWU) from the Stop mode + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** to be sensitive to to the selected edges (falling, rising or falling + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** and rising) (Interrupt or Event modes) using the EXTI_Init() function. + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+++) Configure the comparator to generate the event. + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{ + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + ARM GAS /tmp/cc53YuwZ.s page 7 + + + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables the WakeUp PINx functionality. + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be value of : + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @ref PWR_WakeUp_Pins + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 118 .loc 1 242 1 is_stmt 1 view -0 + 119 .cfi_startproc + 120 @ args = 0, pretend = 0, frame = 0 + 121 @ frame_needed = 0, uses_anonymous_args = 0 + 122 @ link register save eliminated. + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 123 .loc 1 244 3 view .LVU11 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Enable the EWUPx pin */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx); + 124 .loc 1 246 3 view .LVU12 + 125 0000 024A ldr r2, .L11 + 126 0002 5368 ldr r3, [r2, #4] + 127 0004 0343 orrs r3, r3, r0 + 128 0006 5360 str r3, [r2, #4] + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 129 .loc 1 247 1 is_stmt 0 view .LVU13 + 130 0008 7047 bx lr + 131 .L12: + 132 000a 00BF .align 2 + 133 .L11: + 134 000c 00700040 .word 1073770496 + 135 .cfi_endproc + 136 .LFE133: + 138 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits + 139 .align 1 + 140 .global HAL_PWR_DisableWakeUpPin + 141 .syntax unified + 142 .thumb + 143 .thumb_func + 145 HAL_PWR_DisableWakeUpPin: + 146 .LVL1: + 147 .LFB134: + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables the WakeUp PINx functionality. + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be values of : + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @ref PWR_WakeUp_Pins + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 148 .loc 1 257 1 is_stmt 1 view -0 + 149 .cfi_startproc + 150 @ args = 0, pretend = 0, frame = 0 + 151 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cc53YuwZ.s page 8 + + + 152 @ link register save eliminated. + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 153 .loc 1 259 3 view .LVU15 + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Disable the EWUPx pin */ + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx); + 154 .loc 1 261 3 view .LVU16 + 155 0000 024A ldr r2, .L14 + 156 0002 5368 ldr r3, [r2, #4] + 157 0004 23EA0003 bic r3, r3, r0 + 158 0008 5360 str r3, [r2, #4] + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 159 .loc 1 262 1 is_stmt 0 view .LVU17 + 160 000a 7047 bx lr + 161 .L15: + 162 .align 2 + 163 .L14: + 164 000c 00700040 .word 1073770496 + 165 .cfi_endproc + 166 .LFE134: + 168 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits + 169 .align 1 + 170 .global HAL_PWR_EnterSLEEPMode + 171 .syntax unified + 172 .thumb + 173 .thumb_func + 175 HAL_PWR_EnterSLEEPMode: + 176 .LVL2: + 177 .LFB135: + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters Sleep mode. + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode. + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode. + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note This parameter has no effect in F3 family and is just maintained to + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * offer full portability of other STM32 families software. + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction. + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * When WFI entry is used, tick interrupt have to be disabled if not desired as + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * the interrupt wake up source. + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 178 .loc 1 282 1 is_stmt 1 view -0 + 179 .cfi_startproc + 180 @ args = 0, pretend = 0, frame = 0 + 181 @ frame_needed = 0, uses_anonymous_args = 0 + 182 @ link register save eliminated. + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); + 183 .loc 1 284 3 view .LVU19 + ARM GAS /tmp/cc53YuwZ.s page 9 + + + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */ + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 184 .loc 1 287 3 view .LVU20 + 185 .loc 1 287 6 is_stmt 0 view .LVU21 + 186 0000 064A ldr r2, .L20 + 187 0002 1369 ldr r3, [r2, #16] + 188 .loc 1 287 12 view .LVU22 + 189 0004 23F00403 bic r3, r3, #4 + 190 0008 1361 str r3, [r2, #16] + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI) + 191 .loc 1 290 3 is_stmt 1 view .LVU23 + 192 .loc 1 290 5 is_stmt 0 view .LVU24 + 193 000a 0129 cmp r1, #1 + 194 000c 03D0 beq .L19 + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI(); + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** else + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Event */ + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __SEV(); + 195 .loc 1 298 5 is_stmt 1 view .LVU25 + 196 .syntax unified + 197 @ 298 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 198 000e 40BF sev + 199 @ 0 "" 2 + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 200 .loc 1 299 5 view .LVU26 + 201 @ 299 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 202 0010 20BF wfe + 203 @ 0 "" 2 + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 204 .loc 1 300 5 view .LVU27 + 205 @ 300 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 206 0012 20BF wfe + 207 @ 0 "" 2 + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 208 .loc 1 302 1 is_stmt 0 view .LVU28 + 209 .thumb + 210 .syntax unified + 211 0014 7047 bx lr + 212 .L19: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 213 .loc 1 293 5 is_stmt 1 view .LVU29 + 214 .syntax unified + 215 @ 293 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 216 0016 30BF wfi + 217 @ 0 "" 2 + 218 .thumb + 219 .syntax unified + 220 0018 7047 bx lr + 221 .L21: + ARM GAS /tmp/cc53YuwZ.s page 10 + + + 222 001a 00BF .align 2 + 223 .L20: + 224 001c 00ED00E0 .word -536810240 + 225 .cfi_endproc + 226 .LFE135: + 228 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits + 229 .align 1 + 230 .global HAL_PWR_EnterSTOPMode + 231 .syntax unified + 232 .thumb + 233 .thumb_func + 235 HAL_PWR_EnterSTOPMode: + 236 .LVL3: + 237 .LFB136: + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters STOP mode. + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock. + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode. + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * is higher although the startup time is reduced. + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in STOP mode. + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 238 .loc 1 324 1 view -0 + 239 .cfi_startproc + 240 @ args = 0, pretend = 0, frame = 0 + 241 @ frame_needed = 0, uses_anonymous_args = 0 + 242 @ link register save eliminated. + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** uint32_t tmpreg = 0U; + 243 .loc 1 325 3 view .LVU31 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + 244 .loc 1 328 3 view .LVU32 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); + 245 .loc 1 329 3 view .LVU33 + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select the regulator state in STOP mode ---------------------------------*/ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg = PWR->CR; + 246 .loc 1 332 3 view .LVU34 + 247 .loc 1 332 10 is_stmt 0 view .LVU35 + 248 0000 0B4A ldr r2, .L26 + 249 0002 1368 ldr r3, [r2] + 250 .LVL4: + ARM GAS /tmp/cc53YuwZ.s page 11 + + + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear PDDS and LPDS bits */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); + 251 .loc 1 335 3 is_stmt 1 view .LVU36 + 252 .loc 1 335 10 is_stmt 0 view .LVU37 + 253 0004 23F00303 bic r3, r3, #3 + 254 .LVL5: + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set LPDS bit according to Regulator value */ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg |= Regulator; + 255 .loc 1 338 3 is_stmt 1 view .LVU38 + 256 .loc 1 338 10 is_stmt 0 view .LVU39 + 257 0008 0343 orrs r3, r3, r0 + 258 .LVL6: + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Store the new value */ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** PWR->CR = tmpreg; + 259 .loc 1 341 3 is_stmt 1 view .LVU40 + 260 .loc 1 341 11 is_stmt 0 view .LVU41 + 261 000a 1360 str r3, [r2] + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 262 .loc 1 344 3 is_stmt 1 view .LVU42 + 263 .loc 1 344 6 is_stmt 0 view .LVU43 + 264 000c 094A ldr r2, .L26+4 + 265 000e 1369 ldr r3, [r2, #16] + 266 .LVL7: + 267 .loc 1 344 12 view .LVU44 + 268 0010 43F00403 orr r3, r3, #4 + 269 0014 1361 str r3, [r2, #16] + 270 .LVL8: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select STOP mode entry --------------------------------------------------*/ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI) + 271 .loc 1 347 3 is_stmt 1 view .LVU45 + 272 .loc 1 347 5 is_stmt 0 view .LVU46 + 273 0016 0129 cmp r1, #1 + 274 0018 08D0 beq .L25 + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI(); + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** else + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Event */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __SEV(); + 275 .loc 1 355 5 is_stmt 1 view .LVU47 + 276 .syntax unified + 277 @ 355 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 278 001a 40BF sev + 279 @ 0 "" 2 + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 280 .loc 1 356 5 view .LVU48 + 281 @ 356 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 282 001c 20BF wfe + 283 @ 0 "" 2 + ARM GAS /tmp/cc53YuwZ.s page 12 + + + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 284 .loc 1 357 5 view .LVU49 + 285 @ 357 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 286 001e 20BF wfe + 287 @ 0 "" 2 + 288 .thumb + 289 .syntax unified + 290 .L24: + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 291 .loc 1 361 3 view .LVU50 + 292 .loc 1 361 6 is_stmt 0 view .LVU51 + 293 0020 044A ldr r2, .L26+4 + 294 0022 1369 ldr r3, [r2, #16] + 295 .loc 1 361 12 view .LVU52 + 296 0024 23F00403 bic r3, r3, #4 + 297 0028 1361 str r3, [r2, #16] + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 298 .loc 1 362 1 view .LVU53 + 299 002a 7047 bx lr + 300 .L25: + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 301 .loc 1 350 5 is_stmt 1 view .LVU54 + 302 .syntax unified + 303 @ 350 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 304 002c 30BF wfi + 305 @ 0 "" 2 + 306 .thumb + 307 .syntax unified + 308 002e F7E7 b .L24 + 309 .L27: + 310 .align 2 + 311 .L26: + 312 0030 00700040 .word 1073770496 + 313 0034 00ED00E0 .word -536810240 + 314 .cfi_endproc + 315 .LFE136: + 317 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits + 318 .align 1 + 319 .global HAL_PWR_EnterSTANDBYMode + 320 .syntax unified + 321 .thumb + 322 .thumb_func + 324 HAL_PWR_EnterSTANDBYMode: + 325 .LFB137: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters STANDBY mode. + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for: + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - Reset pad (still available), + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - RTC alternate function pins if configured for tamper, time-stamp, RTC + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out, + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - WKUP pins if enabled. + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + ARM GAS /tmp/cc53YuwZ.s page 13 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void) + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 326 .loc 1 374 1 view -0 + 327 .cfi_startproc + 328 @ args = 0, pretend = 0, frame = 0 + 329 @ frame_needed = 0, uses_anonymous_args = 0 + 330 @ link register save eliminated. + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select STANDBY mode */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** PWR->CR |= PWR_CR_PDDS; + 331 .loc 1 376 3 view .LVU56 + 332 .loc 1 376 6 is_stmt 0 view .LVU57 + 333 0000 054A ldr r2, .L29 + 334 0002 1368 ldr r3, [r2] + 335 .loc 1 376 11 view .LVU58 + 336 0004 43F00203 orr r3, r3, #2 + 337 0008 1360 str r3, [r2] + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 338 .loc 1 379 3 is_stmt 1 view .LVU59 + 339 .loc 1 379 6 is_stmt 0 view .LVU60 + 340 000a 044A ldr r2, .L29+4 + 341 000c 1369 ldr r3, [r2, #16] + 342 .loc 1 379 12 view .LVU61 + 343 000e 43F00403 orr r3, r3, #4 + 344 0012 1361 str r3, [r2, #16] + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #if defined ( __CC_ARM) + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __force_stores(); + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #endif + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI(); + 345 .loc 1 386 3 is_stmt 1 view .LVU62 + 346 .syntax unified + 347 @ 386 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 348 0014 30BF wfi + 349 @ 0 "" 2 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 350 .loc 1 387 1 is_stmt 0 view .LVU63 + 351 .thumb + 352 .syntax unified + 353 0016 7047 bx lr + 354 .L30: + 355 .align 2 + 356 .L29: + 357 0018 00700040 .word 1073770496 + 358 001c 00ED00E0 .word -536810240 + 359 .cfi_endproc + 360 .LFE137: + 362 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits + 363 .align 1 + 364 .global HAL_PWR_EnableSleepOnExit + 365 .syntax unified + 366 .thumb + 367 .thumb_func + 369 HAL_PWR_EnableSleepOnExit: + ARM GAS /tmp/cc53YuwZ.s page 14 + + + 370 .LFB138: + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * interruptions handling. + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void) + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 371 .loc 1 398 1 is_stmt 1 view -0 + 372 .cfi_startproc + 373 @ args = 0, pretend = 0, frame = 0 + 374 @ frame_needed = 0, uses_anonymous_args = 0 + 375 @ link register save eliminated. + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 376 .loc 1 400 3 view .LVU65 + 377 0000 024A ldr r2, .L32 + 378 0002 1369 ldr r3, [r2, #16] + 379 0004 43F00203 orr r3, r3, #2 + 380 0008 1361 str r3, [r2, #16] + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 381 .loc 1 401 1 is_stmt 0 view .LVU66 + 382 000a 7047 bx lr + 383 .L33: + 384 .align 2 + 385 .L32: + 386 000c 00ED00E0 .word -536810240 + 387 .cfi_endproc + 388 .LFE138: + 390 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits + 391 .align 1 + 392 .global HAL_PWR_DisableSleepOnExit + 393 .syntax unified + 394 .thumb + 395 .thumb_func + 397 HAL_PWR_DisableSleepOnExit: + 398 .LFB139: + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void) + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 399 .loc 1 411 1 is_stmt 1 view -0 + 400 .cfi_startproc + 401 @ args = 0, pretend = 0, frame = 0 + 402 @ frame_needed = 0, uses_anonymous_args = 0 + 403 @ link register save eliminated. + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ + ARM GAS /tmp/cc53YuwZ.s page 15 + + + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 404 .loc 1 413 3 view .LVU68 + 405 0000 024A ldr r2, .L35 + 406 0002 1369 ldr r3, [r2, #16] + 407 0004 23F00203 bic r3, r3, #2 + 408 0008 1361 str r3, [r2, #16] + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 409 .loc 1 414 1 is_stmt 0 view .LVU69 + 410 000a 7047 bx lr + 411 .L36: + 412 .align 2 + 413 .L35: + 414 000c 00ED00E0 .word -536810240 + 415 .cfi_endproc + 416 .LFE139: + 418 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits + 419 .align 1 + 420 .global HAL_PWR_EnableSEVOnPend + 421 .syntax unified + 422 .thumb + 423 .thumb_func + 425 HAL_PWR_EnableSEVOnPend: + 426 .LFB140: + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit. + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void) + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 427 .loc 1 425 1 is_stmt 1 view -0 + 428 .cfi_startproc + 429 @ args = 0, pretend = 0, frame = 0 + 430 @ frame_needed = 0, uses_anonymous_args = 0 + 431 @ link register save eliminated. + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */ + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 432 .loc 1 427 3 view .LVU71 + 433 0000 024A ldr r2, .L38 + 434 0002 1369 ldr r3, [r2, #16] + 435 0004 43F01003 orr r3, r3, #16 + 436 0008 1361 str r3, [r2, #16] + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 437 .loc 1 428 1 is_stmt 0 view .LVU72 + 438 000a 7047 bx lr + 439 .L39: + 440 .align 2 + 441 .L38: + 442 000c 00ED00E0 .word -536810240 + 443 .cfi_endproc + 444 .LFE140: + 446 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits + 447 .align 1 + ARM GAS /tmp/cc53YuwZ.s page 16 + + + 448 .global HAL_PWR_DisableSEVOnPend + 449 .syntax unified + 450 .thumb + 451 .thumb_func + 453 HAL_PWR_DisableSEVOnPend: + 454 .LFB141: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit. + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void) + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 455 .loc 1 438 1 is_stmt 1 view -0 + 456 .cfi_startproc + 457 @ args = 0, pretend = 0, frame = 0 + 458 @ frame_needed = 0, uses_anonymous_args = 0 + 459 @ link register save eliminated. + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */ + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 460 .loc 1 440 3 view .LVU74 + 461 0000 024A ldr r2, .L41 + 462 0002 1369 ldr r3, [r2, #16] + 463 0004 23F01003 bic r3, r3, #16 + 464 0008 1361 str r3, [r2, #16] + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 465 .loc 1 441 1 is_stmt 0 view .LVU75 + 466 000a 7047 bx lr + 467 .L42: + 468 .align 2 + 469 .L41: + 470 000c 00ED00E0 .word -536810240 + 471 .cfi_endproc + 472 .LFE141: + 474 .text + 475 .Letext0: + 476 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 477 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 478 .file 4 "Drivers/CMSIS/Include/core_cm4.h" + 479 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + ARM GAS /tmp/cc53YuwZ.s page 17 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_pwr.c + /tmp/cc53YuwZ.s:21 .text.HAL_PWR_DeInit:00000000 $t + /tmp/cc53YuwZ.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit + /tmp/cc53YuwZ.s:48 .text.HAL_PWR_DeInit:00000014 $d + /tmp/cc53YuwZ.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t + /tmp/cc53YuwZ.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess + /tmp/cc53YuwZ.s:76 .text.HAL_PWR_EnableBkUpAccess:0000000c $d + /tmp/cc53YuwZ.s:81 .text.HAL_PWR_DisableBkUpAccess:00000000 $t + /tmp/cc53YuwZ.s:87 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess + /tmp/cc53YuwZ.s:104 .text.HAL_PWR_DisableBkUpAccess:0000000c $d + /tmp/cc53YuwZ.s:109 .text.HAL_PWR_EnableWakeUpPin:00000000 $t + /tmp/cc53YuwZ.s:115 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin + /tmp/cc53YuwZ.s:134 .text.HAL_PWR_EnableWakeUpPin:0000000c $d + /tmp/cc53YuwZ.s:139 .text.HAL_PWR_DisableWakeUpPin:00000000 $t + /tmp/cc53YuwZ.s:145 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin + /tmp/cc53YuwZ.s:164 .text.HAL_PWR_DisableWakeUpPin:0000000c $d + /tmp/cc53YuwZ.s:169 .text.HAL_PWR_EnterSLEEPMode:00000000 $t + /tmp/cc53YuwZ.s:175 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode + /tmp/cc53YuwZ.s:224 .text.HAL_PWR_EnterSLEEPMode:0000001c $d + /tmp/cc53YuwZ.s:229 .text.HAL_PWR_EnterSTOPMode:00000000 $t + /tmp/cc53YuwZ.s:235 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode + /tmp/cc53YuwZ.s:312 .text.HAL_PWR_EnterSTOPMode:00000030 $d + /tmp/cc53YuwZ.s:318 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t + /tmp/cc53YuwZ.s:324 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode + /tmp/cc53YuwZ.s:357 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d + /tmp/cc53YuwZ.s:363 .text.HAL_PWR_EnableSleepOnExit:00000000 $t + /tmp/cc53YuwZ.s:369 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit + /tmp/cc53YuwZ.s:386 .text.HAL_PWR_EnableSleepOnExit:0000000c $d + /tmp/cc53YuwZ.s:391 .text.HAL_PWR_DisableSleepOnExit:00000000 $t + /tmp/cc53YuwZ.s:397 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit + /tmp/cc53YuwZ.s:414 .text.HAL_PWR_DisableSleepOnExit:0000000c $d + /tmp/cc53YuwZ.s:419 .text.HAL_PWR_EnableSEVOnPend:00000000 $t + /tmp/cc53YuwZ.s:425 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend + /tmp/cc53YuwZ.s:442 .text.HAL_PWR_EnableSEVOnPend:0000000c $d + /tmp/cc53YuwZ.s:447 .text.HAL_PWR_DisableSEVOnPend:00000000 $t + /tmp/cc53YuwZ.s:453 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend + /tmp/cc53YuwZ.s:470 .text.HAL_PWR_DisableSEVOnPend:0000000c $d + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_pwr.o b/build/stm32f3xx_hal_pwr.o new file mode 100644 index 0000000..3d58963 Binary files /dev/null and b/build/stm32f3xx_hal_pwr.o differ diff --git a/build/stm32f3xx_hal_pwr_ex.d b/build/stm32f3xx_hal_pwr_ex.d new file mode 100644 index 0000000..f11853f --- /dev/null +++ b/build/stm32f3xx_hal_pwr_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_pwr_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_pwr_ex.lst b/build/stm32f3xx_hal_pwr_ex.lst new file mode 100644 index 0000000..239444a --- /dev/null +++ b/build/stm32f3xx_hal_pwr_ex.lst @@ -0,0 +1,498 @@ +ARM GAS /tmp/ccdEzH7M.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_pwr_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c" + 20 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits + 21 .align 1 + 22 .global HAL_PWR_ConfigPVD + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_PWR_ConfigPVD: + 28 .LVL0: + 29 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @file stm32f3xx_hal_pwr_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @attention + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * All rights reserved. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * in the root directory of this software component. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #include "stm32f3xx_hal.h" + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + ARM GAS /tmp/ccdEzH7M.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWR Extended Private Constants + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U) + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U) + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U) + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U) + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @} + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @verbatim + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =============================================================================== + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ##### Peripheral Extended control functions ##### + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =============================================================================== + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** PVD configuration (present on all other devices than STM32F3x8 devices) *** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ========================= + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F3x8 Product Line + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** Voltage regulator *** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ========================= + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The voltage regulator is always enabled after Reset. It works in three different + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** modes. + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Run mode, the regulator supplies full power to the 1.8V domain (core, memories + ARM GAS /tmp/ccdEzH7M.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** and digital peripherals). + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator supplies low power to the 1.8V domain, preserving + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** contents of registers and SRAM. + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator is powered off. The contents of the registers and SRAM + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** are lost except for the Standby circuitry and the Backup Domain. + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** Note: in the STM32F3x8xx devices, the voltage regulator is bypassed and the + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** microcontroller must be powered from a nominal VDD = 1.8V +/-8U% voltage. + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** SDADC power configuration *** + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ================================ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) On STM32F373xC/STM32F378xx devices, there are up to + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 3 SDADC instances that can be enabled/disabled. + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @endverbatim + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || \ + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F302xC) || defined(STM32F303xC) || \ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F303x8) || defined(STM32F334x8) || \ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F301x8) || defined(STM32F302x8) || \ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F373xC) + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * information for the PVD. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * detection level. + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 30 .loc 1 129 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check the parameters */ + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); + 35 .loc 1 131 3 view .LVU1 + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); + 36 .loc 1 132 3 view .LVU2 + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */ + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); + 37 .loc 1 135 3 view .LVU3 + ARM GAS /tmp/ccdEzH7M.s page 4 + + + 38 0000 1E4A ldr r2, .L6 + 39 0002 1368 ldr r3, [r2] + 40 0004 23F0E003 bic r3, r3, #224 + 41 0008 0168 ldr r1, [r0] + 42 000a 0B43 orrs r3, r3, r1 + 43 000c 1360 str r3, [r2] + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); + 44 .loc 1 138 3 view .LVU4 + 45 000e 1C4B ldr r3, .L6+4 + 46 0010 5A68 ldr r2, [r3, #4] + 47 0012 22F48032 bic r2, r2, #65536 + 48 0016 5A60 str r2, [r3, #4] + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); + 49 .loc 1 139 3 view .LVU5 + 50 0018 1A68 ldr r2, [r3] + 51 001a 22F48032 bic r2, r2, #65536 + 52 001e 1A60 str r2, [r3] + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); + 53 .loc 1 140 3 view .LVU6 + 54 0020 9A68 ldr r2, [r3, #8] + 55 0022 22F48032 bic r2, r2, #65536 + 56 0026 9A60 str r2, [r3, #8] + 57 .loc 1 140 44 view .LVU7 + 58 0028 DA68 ldr r2, [r3, #12] + 59 002a 22F48032 bic r2, r2, #65536 + 60 002e DA60 str r2, [r3, #12] + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure interrupt mode */ + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) + 61 .loc 1 143 3 view .LVU8 + 62 .loc 1 143 17 is_stmt 0 view .LVU9 + 63 0030 4368 ldr r3, [r0, #4] + 64 .loc 1 143 5 view .LVU10 + 65 0032 13F4803F tst r3, #65536 + 66 0036 04D0 beq .L2 + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); + 67 .loc 1 145 5 is_stmt 1 view .LVU11 + 68 0038 114A ldr r2, .L6+4 + 69 003a 1368 ldr r3, [r2] + 70 003c 43F48033 orr r3, r3, #65536 + 71 0040 1360 str r3, [r2] + 72 .L2: + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure event mode */ + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) + 73 .loc 1 149 3 view .LVU12 + 74 .loc 1 149 17 is_stmt 0 view .LVU13 + 75 0042 4368 ldr r3, [r0, #4] + 76 .loc 1 149 5 view .LVU14 + 77 0044 13F4003F tst r3, #131072 + 78 0048 04D0 beq .L3 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); + ARM GAS /tmp/ccdEzH7M.s page 5 + + + 79 .loc 1 151 5 is_stmt 1 view .LVU15 + 80 004a 0D4A ldr r2, .L6+4 + 81 004c 5368 ldr r3, [r2, #4] + 82 004e 43F48033 orr r3, r3, #65536 + 83 0052 5360 str r3, [r2, #4] + 84 .L3: + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure the edge */ + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) + 85 .loc 1 155 3 view .LVU16 + 86 .loc 1 155 17 is_stmt 0 view .LVU17 + 87 0054 4368 ldr r3, [r0, #4] + 88 .loc 1 155 5 view .LVU18 + 89 0056 13F0010F tst r3, #1 + 90 005a 04D0 beq .L4 + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); + 91 .loc 1 157 5 is_stmt 1 view .LVU19 + 92 005c 084A ldr r2, .L6+4 + 93 005e 9368 ldr r3, [r2, #8] + 94 0060 43F48033 orr r3, r3, #65536 + 95 0064 9360 str r3, [r2, #8] + 96 .L4: + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) + 97 .loc 1 160 3 view .LVU20 + 98 .loc 1 160 17 is_stmt 0 view .LVU21 + 99 0066 4368 ldr r3, [r0, #4] + 100 .loc 1 160 5 view .LVU22 + 101 0068 13F0020F tst r3, #2 + 102 006c 04D0 beq .L1 + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); + 103 .loc 1 162 5 is_stmt 1 view .LVU23 + 104 006e 044A ldr r2, .L6+4 + 105 0070 D368 ldr r3, [r2, #12] + 106 0072 43F48033 orr r3, r3, #65536 + 107 0076 D360 str r3, [r2, #12] + 108 .L1: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 109 .loc 1 164 1 is_stmt 0 view .LVU24 + 110 0078 7047 bx lr + 111 .L7: + 112 007a 00BF .align 2 + 113 .L6: + 114 007c 00700040 .word 1073770496 + 115 0080 00040140 .word 1073808384 + 116 .cfi_endproc + 117 .LFE130: + 119 .section .text.HAL_PWR_EnablePVD,"ax",%progbits + 120 .align 1 + 121 .global HAL_PWR_EnablePVD + 122 .syntax unified + 123 .thumb + ARM GAS /tmp/ccdEzH7M.s page 6 + + + 124 .thumb_func + 126 HAL_PWR_EnablePVD: + 127 .LFB131: + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD). + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void) + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 128 .loc 1 171 1 is_stmt 1 view -0 + 129 .cfi_startproc + 130 @ args = 0, pretend = 0, frame = 0 + 131 @ frame_needed = 0, uses_anonymous_args = 0 + 132 @ link register save eliminated. + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** SET_BIT(PWR->CR, PWR_CR_PVDE); + 133 .loc 1 172 3 view .LVU26 + 134 0000 024A ldr r2, .L9 + 135 0002 1368 ldr r3, [r2] + 136 0004 43F01003 orr r3, r3, #16 + 137 0008 1360 str r3, [r2] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 138 .loc 1 173 1 is_stmt 0 view .LVU27 + 139 000a 7047 bx lr + 140 .L10: + 141 .align 2 + 142 .L9: + 143 000c 00700040 .word 1073770496 + 144 .cfi_endproc + 145 .LFE131: + 147 .section .text.HAL_PWR_DisablePVD,"ax",%progbits + 148 .align 1 + 149 .global HAL_PWR_DisablePVD + 150 .syntax unified + 151 .thumb + 152 .thumb_func + 154 HAL_PWR_DisablePVD: + 155 .LFB132: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD). + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void) + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 156 .loc 1 180 1 is_stmt 1 view -0 + 157 .cfi_startproc + 158 @ args = 0, pretend = 0, frame = 0 + 159 @ frame_needed = 0, uses_anonymous_args = 0 + 160 @ link register save eliminated. + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR, PWR_CR_PVDE); + 161 .loc 1 181 3 view .LVU29 + 162 0000 024A ldr r2, .L12 + 163 0002 1368 ldr r3, [r2] + 164 0004 23F01003 bic r3, r3, #16 + 165 0008 1360 str r3, [r2] + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + ARM GAS /tmp/ccdEzH7M.s page 7 + + + 166 .loc 1 182 1 is_stmt 0 view .LVU30 + 167 000a 7047 bx lr + 168 .L13: + 169 .align 2 + 170 .L12: + 171 000c 00700040 .word 1073770496 + 172 .cfi_endproc + 173 .LFE132: + 175 .section .text.HAL_PWR_PVDCallback,"ax",%progbits + 176 .align 1 + 177 .weak HAL_PWR_PVDCallback + 178 .syntax unified + 179 .thumb + 180 .thumb_func + 182 HAL_PWR_PVDCallback: + 183 .LFB134: + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request. + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler(). + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void) + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void) + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 184 .loc 1 207 1 is_stmt 1 view -0 + 185 .cfi_startproc + 186 @ args = 0, pretend = 0, frame = 0 + 187 @ frame_needed = 0, uses_anonymous_args = 0 + 188 @ link register save eliminated. + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 189 .loc 1 211 1 view .LVU32 + 190 0000 7047 bx lr + 191 .cfi_endproc + 192 .LFE134: + 194 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits + 195 .align 1 + 196 .global HAL_PWR_PVD_IRQHandler + ARM GAS /tmp/ccdEzH7M.s page 8 + + + 197 .syntax unified + 198 .thumb + 199 .thumb_func + 201 HAL_PWR_PVD_IRQHandler: + 202 .LFB133: + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 203 .loc 1 190 1 view -0 + 204 .cfi_startproc + 205 @ args = 0, pretend = 0, frame = 0 + 206 @ frame_needed = 0, uses_anonymous_args = 0 + 207 0000 08B5 push {r3, lr} + 208 .cfi_def_cfa_offset 8 + 209 .cfi_offset 3, -8 + 210 .cfi_offset 14, -4 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 211 .loc 1 192 3 view .LVU34 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 212 .loc 1 192 6 is_stmt 0 view .LVU35 + 213 0002 064B ldr r3, .L19 + 214 0004 5B69 ldr r3, [r3, #20] + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 215 .loc 1 192 5 view .LVU36 + 216 0006 13F4803F tst r3, #65536 + 217 000a 00D1 bne .L18 + 218 .L15: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 219 .loc 1 200 1 view .LVU37 + 220 000c 08BD pop {r3, pc} + 221 .L18: + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 222 .loc 1 195 5 is_stmt 1 view .LVU38 + 223 000e FFF7FEFF bl HAL_PWR_PVDCallback + 224 .LVL1: + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 225 .loc 1 198 5 view .LVU39 + 226 0012 024B ldr r3, .L19 + 227 0014 4FF48032 mov r2, #65536 + 228 0018 5A61 str r2, [r3, #20] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 229 .loc 1 200 1 is_stmt 0 view .LVU40 + 230 001a F7E7 b .L15 + 231 .L20: + 232 .align 2 + 233 .L19: + 234 001c 00040140 .word 1073808384 + 235 .cfi_endproc + 236 .LFE133: + 238 .text + 239 .Letext0: + 240 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 241 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 242 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 243 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h" + 244 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + ARM GAS /tmp/ccdEzH7M.s page 9 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_pwr_ex.c + /tmp/ccdEzH7M.s:21 .text.HAL_PWR_ConfigPVD:00000000 $t + /tmp/ccdEzH7M.s:27 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD + /tmp/ccdEzH7M.s:114 .text.HAL_PWR_ConfigPVD:0000007c $d + /tmp/ccdEzH7M.s:120 .text.HAL_PWR_EnablePVD:00000000 $t + /tmp/ccdEzH7M.s:126 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD + /tmp/ccdEzH7M.s:143 .text.HAL_PWR_EnablePVD:0000000c $d + /tmp/ccdEzH7M.s:148 .text.HAL_PWR_DisablePVD:00000000 $t + /tmp/ccdEzH7M.s:154 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD + /tmp/ccdEzH7M.s:171 .text.HAL_PWR_DisablePVD:0000000c $d + /tmp/ccdEzH7M.s:176 .text.HAL_PWR_PVDCallback:00000000 $t + /tmp/ccdEzH7M.s:182 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback + /tmp/ccdEzH7M.s:195 .text.HAL_PWR_PVD_IRQHandler:00000000 $t + /tmp/ccdEzH7M.s:201 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler + /tmp/ccdEzH7M.s:234 .text.HAL_PWR_PVD_IRQHandler:0000001c $d + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_pwr_ex.o b/build/stm32f3xx_hal_pwr_ex.o new file mode 100644 index 0000000..6da9481 Binary files /dev/null and b/build/stm32f3xx_hal_pwr_ex.o differ diff --git a/build/stm32f3xx_hal_rcc.d b/build/stm32f3xx_hal_rcc.d new file mode 100644 index 0000000..4507a55 --- /dev/null +++ b/build/stm32f3xx_hal_rcc.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_rcc.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_rcc.lst b/build/stm32f3xx_hal_rcc.lst new file mode 100644 index 0000000..b4b38c4 --- /dev/null +++ b/build/stm32f3xx_hal_rcc.lst @@ -0,0 +1,6334 @@ +ARM GAS /tmp/cc4nNFis.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_rcc.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c" + 20 .section .text.HAL_RCC_DeInit,"ax",%progbits + 21 .align 1 + 22 .global HAL_RCC_DeInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_RCC_DeInit: + 28 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @file stm32f3xx_hal_rcc.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC specific features ##### + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses; + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** are assigned to be used for debug purpose. + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to: + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (if the application needs higher frequency/performance) + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not + ARM GAS /tmp/cc4nNFis.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, I2S, TIM, USB FS) + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC Limitations ##### + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from/to registers. + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Workarounds: + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @attention + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * Copyright (c) 2016 STMicroelectronics. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * All rights reserved. + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the root directory of this software component. + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #include "stm32f3xx_hal.h" + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @addtogroup STM32F3xx_HAL_Driver + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC RCC + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Bits position in in the CFGR register */ + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_HPRE_BITNUMBER POSITION_VAL(RCC_CFGR_HPRE) + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE1_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE1) + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE2_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE2) + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros + ARM GAS /tmp/cc4nNFis.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initialization and Configuration functions + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1 + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and APB2). + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the PLL as System clock source. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source. + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring different output clocks: + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 72 MHz) + ARM GAS /tmp/cc4nNFis.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz) + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the ADC peripherals (up to 72 M + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The fourth output may be used to generate the clock for the TIM peripherals (144 MHz) + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin). + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HSE and PLL. + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the peripherals mapped on these buses. You can use + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except: + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock. + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock. + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE. + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock. + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output. + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK) + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency. + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock. + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For the STM32F3xx devices, the maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly. + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prefetch is disabled. + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings: + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) | + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 | + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 | + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |2WS(3CPU cycle)| 48 < SYSCLK <= 72 | + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+ + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + ARM GAS /tmp/cc4nNFis.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSI ON and used as system clock source + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSE and PLL OFF + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - CSS and MCO1 OFF + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - All interrupts disabled + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function does not modify the configuration of the + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - Peripheral clocks + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - LSI, LSE and RTC clocks + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void) + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 29 .loc 1 215 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 0000 38B5 push {r3, r4, r5, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 3, -16 + 36 .cfi_offset 4, -12 + 37 .cfi_offset 5, -8 + 38 .cfi_offset 14, -4 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0; + 39 .loc 1 216 3 view .LVU1 + 40 .LVL0: + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSION bit */ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION); + 41 .loc 1 219 3 view .LVU2 + 42 0002 364A ldr r2, .L18 + 43 0004 1368 ldr r3, [r2] + 44 0006 43F00103 orr r3, r3, #1 + 45 000a 1360 str r3, [r2] + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSIRDY bit is set before writing default HSITRIM value */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 46 .loc 1 223 3 view .LVU3 + 47 .loc 1 223 15 is_stmt 0 view .LVU4 + 48 000c FFF7FEFF bl HAL_GetTick + 49 .LVL1: + 50 0010 0446 mov r4, r0 + 51 .LVL2: + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) + 52 .loc 1 226 3 is_stmt 1 view .LVU5 + 53 .L2: + 54 .loc 1 226 42 view .LVU6 + 55 .loc 1 226 9 is_stmt 0 view .LVU7 + 56 0012 324B ldr r3, .L18 + 57 0014 1B68 ldr r3, [r3] + 58 .loc 1 226 42 view .LVU8 + 59 0016 13F0020F tst r3, #2 + 60 001a 07D1 bne .L14 + ARM GAS /tmp/cc4nNFis.s page 6 + + + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 61 .loc 1 228 5 is_stmt 1 view .LVU9 + 62 .loc 1 228 9 is_stmt 0 view .LVU10 + 63 001c FFF7FEFF bl HAL_GetTick + 64 .LVL3: + 65 .loc 1 228 23 discriminator 1 view .LVU11 + 66 0020 001B subs r0, r0, r4 + 67 .loc 1 228 7 discriminator 1 view .LVU12 + 68 0022 0228 cmp r0, #2 + 69 0024 F5D9 bls .L2 + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 70 .loc 1 230 14 view .LVU13 + 71 0026 0324 movs r4, #3 + 72 .LVL4: + 73 .L3: + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSITRIM default value */ + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, RCC_CR_HSITRIM_4); + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0] and MCOSEL[2:0] bits */ + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCO + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSI selected as system clock source */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till system clock source is ready */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clock settings */ + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_InitTick(uwTickPrio) != HAL_OK) + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEBYP bit */ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure PLLRDY is reset */ + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + ARM GAS /tmp/cc4nNFis.s page 7 + + + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR register */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR2 register */ + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR3 register */ + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear all interrupt flags */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable all interrupts */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset all CSR flags */ + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 74 .loc 1 298 1 view .LVU14 + 75 0028 2046 mov r0, r4 + 76 002a 38BD pop {r3, r4, r5, pc} + 77 .LVL5: + 78 .L14: + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 79 .loc 1 235 3 is_stmt 1 view .LVU15 + 80 002c 2B4A ldr r2, .L18 + 81 002e 1368 ldr r3, [r2] + 82 0030 23F0F803 bic r3, r3, #248 + 83 0034 43F08003 orr r3, r3, #128 + 84 0038 1360 str r3, [r2] + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 85 .loc 1 238 3 view .LVU16 + 86 003a 5168 ldr r1, [r2, #4] + 87 003c 284B ldr r3, .L18+4 + 88 003e 0B40 ands r3, r3, r1 + 89 0040 5360 str r3, [r2, #4] + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 90 .loc 1 242 3 view .LVU17 + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 91 .loc 1 242 15 is_stmt 0 view .LVU18 + 92 0042 FFF7FEFF bl HAL_GetTick + 93 .LVL6: + 94 0046 0446 mov r4, r0 + 95 .LVL7: + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 96 .loc 1 245 3 is_stmt 1 view .LVU19 + 97 .L5: + ARM GAS /tmp/cc4nNFis.s page 8 + + + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 98 .loc 1 245 43 view .LVU20 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 99 .loc 1 245 9 is_stmt 0 view .LVU21 + 100 0048 244B ldr r3, .L18 + 101 004a 5B68 ldr r3, [r3, #4] + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 102 .loc 1 245 43 view .LVU22 + 103 004c 13F00C0F tst r3, #12 + 104 0050 08D0 beq .L15 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 105 .loc 1 247 5 is_stmt 1 view .LVU23 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 106 .loc 1 247 9 is_stmt 0 view .LVU24 + 107 0052 FFF7FEFF bl HAL_GetTick + 108 .LVL8: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 109 .loc 1 247 23 discriminator 1 view .LVU25 + 110 0056 001B subs r0, r0, r4 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 111 .loc 1 247 7 discriminator 1 view .LVU26 + 112 0058 41F28833 movw r3, #5000 + 113 005c 9842 cmp r0, r3 + 114 005e F3D9 bls .L5 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 115 .loc 1 249 14 view .LVU27 + 116 0060 0324 movs r4, #3 + 117 .LVL9: + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 118 .loc 1 249 14 view .LVU28 + 119 0062 E1E7 b .L3 + 120 .LVL10: + 121 .L15: + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 122 .loc 1 254 3 is_stmt 1 view .LVU29 + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 123 .loc 1 254 19 is_stmt 0 view .LVU30 + 124 0064 1F4B ldr r3, .L18+8 + 125 0066 204A ldr r2, .L18+12 + 126 0068 1A60 str r2, [r3] + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 127 .loc 1 257 3 is_stmt 1 view .LVU31 + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 128 .loc 1 257 6 is_stmt 0 view .LVU32 + 129 006a 204B ldr r3, .L18+16 + 130 006c 1868 ldr r0, [r3] + 131 006e FFF7FEFF bl HAL_InitTick + 132 .LVL11: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 133 .loc 1 257 5 discriminator 1 view .LVU33 + 134 0072 0446 mov r4, r0 + 135 .LVL12: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 136 .loc 1 257 5 discriminator 1 view .LVU34 + 137 0074 08B1 cbz r0, .L16 + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 138 .loc 1 259 12 view .LVU35 + ARM GAS /tmp/cc4nNFis.s page 9 + + + 139 0076 0124 movs r4, #1 + 140 0078 D6E7 b .L3 + 141 .L16: + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 142 .loc 1 263 3 is_stmt 1 view .LVU36 + 143 007a 184A ldr r2, .L18 + 144 007c 1368 ldr r3, [r2] + 145 007e 23F08473 bic r3, r3, #17301504 + 146 0082 23F48033 bic r3, r3, #65536 + 147 0086 1360 str r3, [r2] + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 148 .loc 1 266 3 view .LVU37 + 149 0088 1368 ldr r3, [r2] + 150 008a 23F48023 bic r3, r3, #262144 + 151 008e 1360 str r3, [r2] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) + 152 .loc 1 270 3 view .LVU38 + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) + 153 .loc 1 270 15 is_stmt 0 view .LVU39 + 154 0090 FFF7FEFF bl HAL_GetTick + 155 .LVL13: + 156 0094 0546 mov r5, r0 + 157 .LVL14: + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 158 .loc 1 271 3 is_stmt 1 view .LVU40 + 159 .L7: + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 160 .loc 1 271 42 view .LVU41 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 161 .loc 1 271 9 is_stmt 0 view .LVU42 + 162 0096 114B ldr r3, .L18 + 163 0098 1B68 ldr r3, [r3] + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 164 .loc 1 271 42 view .LVU43 + 165 009a 13F0007F tst r3, #33554432 + 166 009e 06D0 beq .L17 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 167 .loc 1 273 5 is_stmt 1 view .LVU44 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 168 .loc 1 273 9 is_stmt 0 view .LVU45 + 169 00a0 FFF7FEFF bl HAL_GetTick + 170 .LVL15: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 171 .loc 1 273 23 discriminator 1 view .LVU46 + 172 00a4 401B subs r0, r0, r5 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 173 .loc 1 273 7 discriminator 1 view .LVU47 + 174 00a6 0228 cmp r0, #2 + 175 00a8 F5D9 bls .L7 + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 176 .loc 1 275 14 view .LVU48 + 177 00aa 0324 movs r4, #3 + 178 00ac BCE7 b .L3 + 179 .L17: + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 180 .loc 1 280 3 is_stmt 1 view .LVU49 + 181 00ae 0B4B ldr r3, .L18 + ARM GAS /tmp/cc4nNFis.s page 10 + + + 182 00b0 0022 movs r2, #0 + 183 00b2 5A60 str r2, [r3, #4] + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 184 .loc 1 283 3 view .LVU50 + 185 00b4 DA62 str r2, [r3, #44] + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 186 .loc 1 286 3 view .LVU51 + 187 00b6 1A63 str r2, [r3, #48] + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 188 .loc 1 289 3 view .LVU52 + 189 00b8 9968 ldr r1, [r3, #8] + 190 00ba 41F41F01 orr r1, r1, #10420224 + 191 00be 9960 str r1, [r3, #8] + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 192 .loc 1 292 3 view .LVU53 + 193 00c0 9A60 str r2, [r3, #8] + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 194 .loc 1 295 3 view .LVU54 + 195 .LVL16: + 196 .LBB168: + 197 .LBI168: + 198 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + ARM GAS /tmp/cc4nNFis.s page 11 + + + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + ARM GAS /tmp/cc4nNFis.s page 12 + + + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + ARM GAS /tmp/cc4nNFis.s page 13 + + + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cc4nNFis.s page 14 + + + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cc4nNFis.s page 15 + + + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + ARM GAS /tmp/cc4nNFis.s page 16 + + + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cc4nNFis.s page 17 + + + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cc4nNFis.s page 18 + + + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + ARM GAS /tmp/cc4nNFis.s page 19 + + + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/cc4nNFis.s page 20 + + + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/cc4nNFis.s page 21 + + + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + ARM GAS /tmp/cc4nNFis.s page 22 + + + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + ARM GAS /tmp/cc4nNFis.s page 23 + + + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/cc4nNFis.s page 24 + + + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + ARM GAS /tmp/cc4nNFis.s page 25 + + + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + ARM GAS /tmp/cc4nNFis.s page 26 + + + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cc4nNFis.s page 27 + + + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 199 .loc 2 981 31 view .LVU55 + 200 .LBB169: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 201 .loc 2 983 3 view .LVU56 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 202 .loc 2 988 4 view .LVU57 + 203 00c2 4FF08072 mov r2, #16777216 + 204 .syntax unified + 205 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 206 00c6 92FAA2F2 rbit r2, r2 + 207 @ 0 "" 2 + 208 .LVL17: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cc4nNFis.s page 28 + + + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 209 .loc 2 1001 3 view .LVU58 + 210 .loc 2 1001 3 is_stmt 0 view .LVU59 + 211 .thumb + 212 .syntax unified + 213 .LBE169: + 214 .LBE168: + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 215 .loc 1 295 3 discriminator 2 view .LVU60 + 216 00ca B2FA82F2 clz r2, r2 + 217 00ce 084B ldr r3, .L18+20 + 218 00d0 1344 add r3, r3, r2 + 219 00d2 9B00 lsls r3, r3, #2 + 220 00d4 0122 movs r2, #1 + 221 00d6 1A60 str r2, [r3] + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 222 .loc 1 297 3 is_stmt 1 view .LVU61 + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 223 .loc 1 297 10 is_stmt 0 view .LVU62 + 224 00d8 A6E7 b .L3 + 225 .L19: + 226 00da 00BF .align 2 + 227 .L18: + 228 00dc 00100240 .word 1073876992 + 229 00e0 0CC0FFF8 .word -117456884 + 230 00e4 00000000 .word SystemCoreClock + 231 00e8 00127A00 .word 8000000 + 232 00ec 00000000 .word uwTickPrio + 233 00f0 20819010 .word 277905696 + 234 .cfi_endproc + 235 .LFE130: + 237 .section .text.HAL_RCC_OscConfig,"ax",%progbits + 238 .align 1 + 239 .global HAL_RCC_OscConfig + 240 .syntax unified + 241 .thumb + 242 .thumb_func + 244 HAL_RCC_OscConfig: + 245 .LVL18: + 246 .LFB131: + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC_OscInitTypeDef. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not + ARM GAS /tmp/cc4nNFis.s page 29 + + + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 247 .loc 1 315 1 is_stmt 1 view -0 + 248 .cfi_startproc + 249 @ args = 0, pretend = 0, frame = 8 + 250 @ frame_needed = 0, uses_anonymous_args = 0 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; + 251 .loc 1 316 3 view .LVU64 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config; + 252 .loc 1 317 3 view .LVU65 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config2; + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) + 253 .loc 1 323 3 view .LVU66 + 254 .loc 1 323 5 is_stmt 0 view .LVU67 + 255 0000 0028 cmp r0, #0 + 256 0002 00F0FF82 beq .L94 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; + 257 .loc 1 315 1 view .LVU68 + 258 0006 70B5 push {r4, r5, r6, lr} + 259 .cfi_def_cfa_offset 16 + 260 .cfi_offset 4, -16 + 261 .cfi_offset 5, -12 + 262 .cfi_offset 6, -8 + 263 .cfi_offset 14, -4 + 264 0008 82B0 sub sp, sp, #8 + 265 .cfi_def_cfa_offset 24 + 266 000a 0446 mov r4, r0 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + 267 .loc 1 329 3 is_stmt 1 view .LVU69 + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 268 .loc 1 332 3 view .LVU70 + 269 .loc 1 332 25 is_stmt 0 view .LVU71 + 270 000c 0368 ldr r3, [r0] + 271 .loc 1 332 5 view .LVU72 + 272 000e 13F0010F tst r3, #1 + 273 0012 3BD0 beq .L22 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + 274 .loc 1 335 5 is_stmt 1 view .LVU73 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe + ARM GAS /tmp/cc4nNFis.s page 30 + + + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 275 .loc 1 338 5 view .LVU74 + 276 .loc 1 338 9 is_stmt 0 view .LVU75 + 277 0014 B44B ldr r3, .L132 + 278 0016 5B68 ldr r3, [r3, #4] + 279 0018 03F00C03 and r3, r3, #12 + 280 .loc 1 338 7 view .LVU76 + 281 001c 042B cmp r3, #4 + 282 001e 1ED0 beq .L23 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 283 .loc 1 339 13 view .LVU77 + 284 0020 B14B ldr r3, .L132 + 285 0022 5B68 ldr r3, [r3, #4] + 286 0024 03F00C03 and r3, r3, #12 + 287 .loc 1 339 8 view .LVU78 + 288 0028 082B cmp r3, #8 + 289 002a 13D0 beq .L118 + 290 .L24: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 291 .loc 1 349 7 is_stmt 1 view .LVU79 + 292 .loc 1 349 7 view .LVU80 + 293 002c 6368 ldr r3, [r4, #4] + 294 002e B3F5803F cmp r3, #65536 + 295 0032 68D0 beq .L119 + 296 .loc 1 349 7 discriminator 2 view .LVU81 + 297 0034 002B cmp r3, #0 + 298 0036 40F09280 bne .L29 + 299 .loc 1 349 7 discriminator 4 view .LVU82 + 300 003a 03F18043 add r3, r3, #1073741824 + 301 003e 03F50433 add r3, r3, #135168 + 302 0042 1A68 ldr r2, [r3] + 303 0044 22F48032 bic r2, r2, #65536 + 304 0048 1A60 str r2, [r3] + 305 .loc 1 349 7 discriminator 4 view .LVU83 + 306 004a 1A68 ldr r2, [r3] + 307 004c 22F48022 bic r2, r2, #262144 + 308 0050 1A60 str r2, [r3] + 309 0052 5DE0 b .L28 + 310 .L118: + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 311 .loc 1 339 82 is_stmt 0 discriminator 1 view .LVU84 + 312 0054 A44B ldr r3, .L132 + 313 0056 5B68 ldr r3, [r3, #4] + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 314 .loc 1 339 78 discriminator 1 view .LVU85 + 315 0058 13F4803F tst r3, #65536 + 316 005c E6D0 beq .L24 + 317 .L23: + ARM GAS /tmp/cc4nNFis.s page 31 + + + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 318 .loc 1 341 7 is_stmt 1 view .LVU86 + 319 .LVL19: + 320 .LBB170: + 321 .LBI170: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 322 .loc 2 981 31 view .LVU87 + 323 .LBB171: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 324 .loc 2 983 3 view .LVU88 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 325 .loc 2 988 4 view .LVU89 + 326 005e 4FF40033 mov r3, #131072 + 327 .syntax unified + 328 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 329 0062 93FAA3F3 rbit r3, r3 + 330 @ 0 "" 2 + 331 .loc 2 1001 3 view .LVU90 + 332 .LVL20: + 333 .loc 2 1001 3 is_stmt 0 view .LVU91 + 334 .thumb + 335 .syntax unified + 336 .LBE171: + 337 .LBE170: + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 338 .loc 1 341 11 discriminator 1 view .LVU92 + 339 0066 A04B ldr r3, .L132 + 340 0068 1968 ldr r1, [r3] + 341 .LVL21: + 342 .LBB172: + 343 .LBI172: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 344 .loc 2 981 31 is_stmt 1 view .LVU93 + 345 .LBB173: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 346 .loc 2 983 3 view .LVU94 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 347 .loc 2 988 4 view .LVU95 + 348 006a 4FF40033 mov r3, #131072 + 349 .syntax unified + 350 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 351 006e 93FAA3F3 rbit r3, r3 + 352 @ 0 "" 2 + 353 .LVL22: + 354 .loc 2 1001 3 view .LVU96 + 355 .loc 2 1001 3 is_stmt 0 view .LVU97 + 356 .thumb + 357 .syntax unified + 358 .LBE173: + 359 .LBE172: + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 360 .loc 1 341 11 discriminator 2 view .LVU98 + 361 0072 B3FA83F3 clz r3, r3 + 362 0076 03F01F03 and r3, r3, #31 + 363 007a 0122 movs r2, #1 + 364 007c 02FA03F3 lsl r3, r2, r3 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/cc4nNFis.s page 32 + + + 365 .loc 1 341 9 discriminator 2 view .LVU99 + 366 0080 0B42 tst r3, r1 + 367 0082 03D0 beq .L22 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 368 .loc 1 341 78 discriminator 13 view .LVU100 + 369 0084 6368 ldr r3, [r4, #4] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 370 .loc 1 341 57 discriminator 13 view .LVU101 + 371 0086 002B cmp r3, #0 + 372 0088 00F0BE82 beq .L120 + 373 .LVL23: + 374 .L22: + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the HSE predivision factor --------------------------------*/ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE State */ + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is ready */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is disabled */ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 375 .loc 1 388 3 is_stmt 1 view .LVU102 + 376 .loc 1 388 25 is_stmt 0 view .LVU103 + 377 008c 2368 ldr r3, [r4] + 378 .loc 1 388 5 view .LVU104 + 379 008e 13F0020F tst r3, #2 + 380 0092 00F0C480 beq .L40 + ARM GAS /tmp/cc4nNFis.s page 33 + + + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + 381 .loc 1 391 5 is_stmt 1 view .LVU105 + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + 382 .loc 1 392 5 view .LVU106 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 383 .loc 1 395 5 view .LVU107 + 384 .loc 1 395 9 is_stmt 0 view .LVU108 + 385 0096 944B ldr r3, .L132 + 386 0098 5B68 ldr r3, [r3, #4] + 387 .loc 1 395 7 view .LVU109 + 388 009a 13F00C0F tst r3, #12 + 389 009e 00F09C80 beq .L41 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 390 .loc 1 396 13 view .LVU110 + 391 00a2 914B ldr r3, .L132 + 392 00a4 5B68 ldr r3, [r3, #4] + 393 00a6 03F00C03 and r3, r3, #12 + 394 .loc 1 396 8 view .LVU111 + 395 00aa 082B cmp r3, #8 + 396 00ac 00F08F80 beq .L121 + 397 .L42: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI State */ + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) + 398 .loc 1 413 7 is_stmt 1 view .LVU112 + 399 .loc 1 413 27 is_stmt 0 view .LVU113 + 400 00b0 2369 ldr r3, [r4, #16] + 401 .loc 1 413 9 view .LVU114 + 402 00b2 002B cmp r3, #0 + 403 00b4 00F0F080 beq .L46 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); + 404 .loc 1 416 9 is_stmt 1 view .LVU115 + 405 .LVL24: + 406 .LBB174: + 407 .LBI174: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 408 .loc 2 981 31 view .LVU116 + ARM GAS /tmp/cc4nNFis.s page 34 + + + 409 .LBB175: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 410 .loc 2 983 3 view .LVU117 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 411 .loc 2 988 4 view .LVU118 + 412 00b8 0122 movs r2, #1 + 413 .syntax unified + 414 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 415 00ba 92FAA2F3 rbit r3, r2 + 416 @ 0 "" 2 + 417 .LVL25: + 418 .loc 2 1001 3 view .LVU119 + 419 .loc 2 1001 3 is_stmt 0 view .LVU120 + 420 .thumb + 421 .syntax unified + 422 .LBE175: + 423 .LBE174: + 424 .loc 1 416 9 discriminator 2 view .LVU121 + 425 00be B3FA83F3 clz r3, r3 + 426 00c2 03F18453 add r3, r3, #276824064 + 427 00c6 03F58413 add r3, r3, #1081344 + 428 00ca 9B00 lsls r3, r3, #2 + 429 00cc 1A60 str r2, [r3] + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 430 .loc 1 419 9 is_stmt 1 view .LVU122 + 431 .loc 1 419 21 is_stmt 0 view .LVU123 + 432 00ce FFF7FEFF bl HAL_GetTick + 433 .LVL26: + 434 00d2 0546 mov r5, r0 + 435 .LVL27: + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 436 .loc 1 422 9 is_stmt 1 view .LVU124 + 437 .L47: + 438 .loc 1 422 51 view .LVU125 + 439 .LBB176: + 440 .LBI176: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441 .loc 2 981 31 view .LVU126 + 442 .LBB177: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 443 .loc 2 983 3 view .LVU127 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 444 .loc 2 988 4 view .LVU128 + 445 00d4 0223 movs r3, #2 + 446 .syntax unified + 447 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 448 00d6 93FAA3F3 rbit r3, r3 + 449 @ 0 "" 2 + 450 .loc 2 1001 3 view .LVU129 + 451 .LVL28: + 452 .loc 2 1001 3 is_stmt 0 view .LVU130 + 453 .thumb + 454 .syntax unified + ARM GAS /tmp/cc4nNFis.s page 35 + + + 455 .LBE177: + 456 .LBE176: + 457 .loc 1 422 15 discriminator 1 view .LVU131 + 458 00da 834B ldr r3, .L132 + 459 00dc 1968 ldr r1, [r3] + 460 .LVL29: + 461 .LBB178: + 462 .LBI178: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463 .loc 2 981 31 is_stmt 1 view .LVU132 + 464 .LBB179: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465 .loc 2 983 3 view .LVU133 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 466 .loc 2 988 4 view .LVU134 + 467 00de 0223 movs r3, #2 + 468 .syntax unified + 469 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 470 00e0 93FAA3F3 rbit r3, r3 + 471 @ 0 "" 2 + 472 .LVL30: + 473 .loc 2 1001 3 view .LVU135 + 474 .loc 2 1001 3 is_stmt 0 view .LVU136 + 475 .thumb + 476 .syntax unified + 477 .LBE179: + 478 .LBE178: + 479 .loc 1 422 15 discriminator 2 view .LVU137 + 480 00e4 B3FA83F3 clz r3, r3 + 481 00e8 03F01F03 and r3, r3, #31 + 482 00ec 0122 movs r2, #1 + 483 00ee 02FA03F3 lsl r3, r2, r3 + 484 .loc 1 422 51 discriminator 2 view .LVU138 + 485 00f2 0B42 tst r3, r1 + 486 00f4 40F0C280 bne .L122 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 487 .loc 1 424 11 is_stmt 1 view .LVU139 + 488 .loc 1 424 15 is_stmt 0 view .LVU140 + 489 00f8 FFF7FEFF bl HAL_GetTick + 490 .LVL31: + 491 .loc 1 424 29 discriminator 1 view .LVU141 + 492 00fc 401B subs r0, r0, r5 + 493 .loc 1 424 13 discriminator 1 view .LVU142 + 494 00fe 0228 cmp r0, #2 + 495 0100 E8D9 bls .L47 + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 496 .loc 1 426 20 view .LVU143 + 497 0102 0320 movs r0, #3 + 498 0104 89E2 b .L21 + 499 .LVL32: + 500 .L119: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 501 .loc 1 349 7 is_stmt 1 discriminator 1 view .LVU144 + 502 0106 784A ldr r2, .L132 + 503 0108 1368 ldr r3, [r2] + ARM GAS /tmp/cc4nNFis.s page 36 + + + 504 010a 43F48033 orr r3, r3, #65536 + 505 010e 1360 str r3, [r2] + 506 .L28: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 507 .loc 1 349 7 discriminator 10 view .LVU145 + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ + 508 .loc 1 353 7 view .LVU146 + 509 0110 754A ldr r2, .L132 + 510 0112 D36A ldr r3, [r2, #44] + 511 0114 23F00F03 bic r3, r3, #15 + 512 0118 A168 ldr r1, [r4, #8] + 513 011a 0B43 orrs r3, r3, r1 + 514 011c D362 str r3, [r2, #44] + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 515 .loc 1 357 7 view .LVU147 + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 516 .loc 1 357 27 is_stmt 0 view .LVU148 + 517 011e 6368 ldr r3, [r4, #4] + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 518 .loc 1 357 9 view .LVU149 + 519 0120 002B cmp r3, #0 + 520 0122 36D0 beq .L31 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 521 .loc 1 360 9 is_stmt 1 view .LVU150 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 522 .loc 1 360 21 is_stmt 0 view .LVU151 + 523 0124 FFF7FEFF bl HAL_GetTick + 524 .LVL33: + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 525 .loc 1 360 21 view .LVU152 + 526 0128 0546 mov r5, r0 + 527 .LVL34: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 528 .loc 1 363 9 is_stmt 1 view .LVU153 + 529 .L32: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 530 .loc 1 363 51 view .LVU154 + 531 .LBB180: + 532 .LBI180: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 533 .loc 2 981 31 view .LVU155 + 534 .LBB181: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535 .loc 2 983 3 view .LVU156 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 536 .loc 2 988 4 view .LVU157 + 537 012a 4FF40033 mov r3, #131072 + 538 .syntax unified + 539 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 540 012e 93FAA3F3 rbit r3, r3 + 541 @ 0 "" 2 + 542 .loc 2 1001 3 view .LVU158 + 543 .LVL35: + 544 .loc 2 1001 3 is_stmt 0 view .LVU159 + 545 .thumb + 546 .syntax unified + 547 .LBE181: + ARM GAS /tmp/cc4nNFis.s page 37 + + + 548 .LBE180: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 549 .loc 1 363 15 discriminator 1 view .LVU160 + 550 0132 6D4B ldr r3, .L132 + 551 0134 1968 ldr r1, [r3] + 552 .LVL36: + 553 .LBB182: + 554 .LBI182: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 555 .loc 2 981 31 is_stmt 1 view .LVU161 + 556 .LBB183: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 557 .loc 2 983 3 view .LVU162 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 558 .loc 2 988 4 view .LVU163 + 559 0136 4FF40033 mov r3, #131072 + 560 .syntax unified + 561 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 562 013a 93FAA3F3 rbit r3, r3 + 563 @ 0 "" 2 + 564 .LVL37: + 565 .loc 2 1001 3 view .LVU164 + 566 .loc 2 1001 3 is_stmt 0 view .LVU165 + 567 .thumb + 568 .syntax unified + 569 .LBE183: + 570 .LBE182: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 571 .loc 1 363 15 discriminator 2 view .LVU166 + 572 013e B3FA83F3 clz r3, r3 + 573 0142 03F01F03 and r3, r3, #31 + 574 0146 0122 movs r2, #1 + 575 0148 02FA03F3 lsl r3, r2, r3 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 576 .loc 1 363 51 discriminator 2 view .LVU167 + 577 014c 0B42 tst r3, r1 + 578 014e 9DD1 bne .L22 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 579 .loc 1 365 11 is_stmt 1 view .LVU168 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 580 .loc 1 365 15 is_stmt 0 view .LVU169 + 581 0150 FFF7FEFF bl HAL_GetTick + 582 .LVL38: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 583 .loc 1 365 29 discriminator 1 view .LVU170 + 584 0154 401B subs r0, r0, r5 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 585 .loc 1 365 13 discriminator 1 view .LVU171 + 586 0156 6428 cmp r0, #100 + 587 0158 E7D9 bls .L32 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 588 .loc 1 367 20 view .LVU172 + 589 015a 0320 movs r0, #3 + 590 015c 5DE2 b .L21 + 591 .LVL39: + 592 .L29: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + ARM GAS /tmp/cc4nNFis.s page 38 + + + 593 .loc 1 349 7 is_stmt 1 discriminator 5 view .LVU173 + 594 015e B3F5A02F cmp r3, #327680 + 595 0162 09D0 beq .L123 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 596 .loc 1 349 7 discriminator 8 view .LVU174 + 597 0164 604B ldr r3, .L132 + 598 0166 1A68 ldr r2, [r3] + 599 0168 22F48032 bic r2, r2, #65536 + 600 016c 1A60 str r2, [r3] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 601 .loc 1 349 7 discriminator 8 view .LVU175 + 602 016e 1A68 ldr r2, [r3] + 603 0170 22F48022 bic r2, r2, #262144 + 604 0174 1A60 str r2, [r3] + 605 0176 CBE7 b .L28 + 606 .L123: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 607 .loc 1 349 7 discriminator 7 view .LVU176 + 608 0178 03F18043 add r3, r3, #1073741824 + 609 017c A3F53C33 sub r3, r3, #192512 + 610 0180 1A68 ldr r2, [r3] + 611 0182 42F48022 orr r2, r2, #262144 + 612 0186 1A60 str r2, [r3] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 613 .loc 1 349 7 discriminator 7 view .LVU177 + 614 0188 1A68 ldr r2, [r3] + 615 018a 42F48032 orr r2, r2, #65536 + 616 018e 1A60 str r2, [r3] + 617 0190 BEE7 b .L28 + 618 .L31: + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 619 .loc 1 374 9 view .LVU178 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 620 .loc 1 374 21 is_stmt 0 view .LVU179 + 621 0192 FFF7FEFF bl HAL_GetTick + 622 .LVL40: + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 623 .loc 1 374 21 view .LVU180 + 624 0196 0546 mov r5, r0 + 625 .LVL41: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 626 .loc 1 377 9 is_stmt 1 view .LVU181 + 627 .L36: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 628 .loc 1 377 51 view .LVU182 + 629 .LBB184: + 630 .LBI184: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 631 .loc 2 981 31 view .LVU183 + 632 .LBB185: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 633 .loc 2 983 3 view .LVU184 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 634 .loc 2 988 4 view .LVU185 + 635 0198 4FF40033 mov r3, #131072 + 636 .syntax unified + 637 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/cc4nNFis.s page 39 + + + 638 019c 93FAA3F3 rbit r3, r3 + 639 @ 0 "" 2 + 640 .loc 2 1001 3 view .LVU186 + 641 .LVL42: + 642 .loc 2 1001 3 is_stmt 0 view .LVU187 + 643 .thumb + 644 .syntax unified + 645 .LBE185: + 646 .LBE184: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 647 .loc 1 377 15 discriminator 1 view .LVU188 + 648 01a0 514B ldr r3, .L132 + 649 01a2 1968 ldr r1, [r3] + 650 .LVL43: + 651 .LBB186: + 652 .LBI186: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 653 .loc 2 981 31 is_stmt 1 view .LVU189 + 654 .LBB187: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655 .loc 2 983 3 view .LVU190 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 656 .loc 2 988 4 view .LVU191 + 657 01a4 4FF40033 mov r3, #131072 + 658 .syntax unified + 659 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 660 01a8 93FAA3F3 rbit r3, r3 + 661 @ 0 "" 2 + 662 .LVL44: + 663 .loc 2 1001 3 view .LVU192 + 664 .loc 2 1001 3 is_stmt 0 view .LVU193 + 665 .thumb + 666 .syntax unified + 667 .LBE187: + 668 .LBE186: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 669 .loc 1 377 15 discriminator 2 view .LVU194 + 670 01ac B3FA83F3 clz r3, r3 + 671 01b0 03F01F03 and r3, r3, #31 + 672 01b4 0122 movs r2, #1 + 673 01b6 02FA03F3 lsl r3, r2, r3 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 674 .loc 1 377 51 discriminator 2 view .LVU195 + 675 01ba 0B42 tst r3, r1 + 676 01bc 3FF466AF beq .L22 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 677 .loc 1 379 12 is_stmt 1 view .LVU196 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 678 .loc 1 379 16 is_stmt 0 view .LVU197 + 679 01c0 FFF7FEFF bl HAL_GetTick + 680 .LVL45: + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 681 .loc 1 379 30 discriminator 1 view .LVU198 + 682 01c4 401B subs r0, r0, r5 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 683 .loc 1 379 14 discriminator 1 view .LVU199 + 684 01c6 6428 cmp r0, #100 + ARM GAS /tmp/cc4nNFis.s page 40 + + + 685 01c8 E6D9 bls .L36 + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 686 .loc 1 381 20 view .LVU200 + 687 01ca 0320 movs r0, #3 + 688 01cc 25E2 b .L21 + 689 .LVL46: + 690 .L121: + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 691 .loc 1 396 82 discriminator 1 view .LVU201 + 692 01ce 464B ldr r3, .L132 + 693 01d0 5B68 ldr r3, [r3, #4] + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 694 .loc 1 396 78 discriminator 1 view .LVU202 + 695 01d2 13F4803F tst r3, #65536 + 696 01d6 7FF46BAF bne .L42 + 697 .L41: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 698 .loc 1 399 7 is_stmt 1 view .LVU203 + 699 .LVL47: + 700 .LBB188: + 701 .LBI188: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 702 .loc 2 981 31 view .LVU204 + 703 .LBB189: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 704 .loc 2 983 3 view .LVU205 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 705 .loc 2 988 4 view .LVU206 + 706 01da 0223 movs r3, #2 + 707 .syntax unified + 708 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 709 01dc 93FAA3F3 rbit r3, r3 + 710 @ 0 "" 2 + 711 .loc 2 1001 3 view .LVU207 + 712 .LVL48: + 713 .loc 2 1001 3 is_stmt 0 view .LVU208 + 714 .thumb + 715 .syntax unified + 716 .LBE189: + 717 .LBE188: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 718 .loc 1 399 11 discriminator 1 view .LVU209 + 719 01e0 414B ldr r3, .L132 + 720 01e2 1968 ldr r1, [r3] + 721 .LVL49: + 722 .LBB190: + 723 .LBI190: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 724 .loc 2 981 31 is_stmt 1 view .LVU210 + 725 .LBB191: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 726 .loc 2 983 3 view .LVU211 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 727 .loc 2 988 4 view .LVU212 + 728 01e4 0223 movs r3, #2 + 729 .syntax unified + 730 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/cc4nNFis.s page 41 + + + 731 01e6 93FAA3F3 rbit r3, r3 + 732 @ 0 "" 2 + 733 .LVL50: + 734 .loc 2 1001 3 view .LVU213 + 735 .loc 2 1001 3 is_stmt 0 view .LVU214 + 736 .thumb + 737 .syntax unified + 738 .LBE191: + 739 .LBE190: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 740 .loc 1 399 11 discriminator 2 view .LVU215 + 741 01ea B3FA83F3 clz r3, r3 + 742 01ee 03F01F03 and r3, r3, #31 + 743 01f2 0122 movs r2, #1 + 744 01f4 02FA03F3 lsl r3, r2, r3 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 745 .loc 1 399 9 discriminator 2 view .LVU216 + 746 01f8 0B42 tst r3, r1 + 747 01fa 03D0 beq .L45 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 748 .loc 1 399 78 discriminator 13 view .LVU217 + 749 01fc 2369 ldr r3, [r4, #16] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 750 .loc 1 399 57 discriminator 13 view .LVU218 + 751 01fe 9342 cmp r3, r2 + 752 0200 40F00482 bne .L98 + 753 .L45: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 754 .loc 1 407 9 is_stmt 1 view .LVU219 + 755 0204 3848 ldr r0, .L132 + 756 0206 0368 ldr r3, [r0] + 757 0208 23F0F803 bic r3, r3, #248 + 758 020c 6169 ldr r1, [r4, #20] + 759 .LVL51: + 760 .LBB192: + 761 .LBI192: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 762 .loc 2 981 31 view .LVU220 + 763 .LBB193: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 764 .loc 2 983 3 view .LVU221 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 765 .loc 2 988 4 view .LVU222 + 766 020e F822 movs r2, #248 + 767 .syntax unified + 768 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 769 0210 92FAA2F2 rbit r2, r2 + 770 @ 0 "" 2 + 771 .LVL52: + 772 .loc 2 1001 3 view .LVU223 + 773 .loc 2 1001 3 is_stmt 0 view .LVU224 + 774 .thumb + 775 .syntax unified + 776 .LBE193: + 777 .LBE192: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 778 .loc 1 407 9 discriminator 2 view .LVU225 + ARM GAS /tmp/cc4nNFis.s page 42 + + + 779 0214 B2FA82F2 clz r2, r2 + 780 0218 9140 lsls r1, r1, r2 + 781 021a 0B43 orrs r3, r3, r1 + 782 021c 0360 str r3, [r0] + 783 .L40: + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is disabled */ + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 784 .loc 1 453 3 is_stmt 1 view .LVU226 + 785 .loc 1 453 25 is_stmt 0 view .LVU227 + 786 021e 2368 ldr r3, [r4] + 787 .loc 1 453 5 view .LVU228 + 788 0220 13F0080F tst r3, #8 + 789 0224 00F08C80 beq .L55 + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + 790 .loc 1 456 5 is_stmt 1 view .LVU229 + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSI State */ + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) + 791 .loc 1 459 5 view .LVU230 + 792 .loc 1 459 25 is_stmt 0 view .LVU231 + 793 0228 A369 ldr r3, [r4, #24] + 794 .loc 1 459 7 view .LVU232 + 795 022a 002B cmp r3, #0 + 796 022c 60D0 beq .L56 + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); + 797 .loc 1 462 7 is_stmt 1 view .LVU233 + 798 .LVL53: + 799 .LBB194: + ARM GAS /tmp/cc4nNFis.s page 43 + + + 800 .LBI194: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 801 .loc 2 981 31 view .LVU234 + 802 .LBB195: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 803 .loc 2 983 3 view .LVU235 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 804 .loc 2 988 4 view .LVU236 + 805 022e 0121 movs r1, #1 + 806 .syntax unified + 807 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 808 0230 91FAA1F2 rbit r2, r1 + 809 @ 0 "" 2 + 810 .LVL54: + 811 .loc 2 1001 3 view .LVU237 + 812 .loc 2 1001 3 is_stmt 0 view .LVU238 + 813 .thumb + 814 .syntax unified + 815 .LBE195: + 816 .LBE194: + 817 .loc 1 462 7 discriminator 2 view .LVU239 + 818 0234 B2FA82F2 clz r2, r2 + 819 0238 2C4B ldr r3, .L132+4 + 820 023a 1344 add r3, r3, r2 + 821 023c 9B00 lsls r3, r3, #2 + 822 023e 1960 str r1, [r3] + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 823 .loc 1 465 7 is_stmt 1 view .LVU240 + 824 .loc 1 465 19 is_stmt 0 view .LVU241 + 825 0240 FFF7FEFF bl HAL_GetTick + 826 .LVL55: + 827 0244 0546 mov r5, r0 + 828 .LVL56: + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is ready */ + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 829 .loc 1 468 7 is_stmt 1 view .LVU242 + 830 .L57: + 831 .loc 1 468 49 view .LVU243 + 832 .LBB196: + 833 .LBI196: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 834 .loc 2 981 31 view .LVU244 + 835 .LBB197: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 836 .loc 2 983 3 view .LVU245 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 837 .loc 2 988 4 view .LVU246 + 838 0246 0223 movs r3, #2 + 839 .syntax unified + 840 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 841 0248 93FAA3F2 rbit r2, r3 + 842 @ 0 "" 2 + 843 .LVL57: + 844 .loc 2 1001 3 view .LVU247 + ARM GAS /tmp/cc4nNFis.s page 44 + + + 845 .loc 2 1001 3 is_stmt 0 view .LVU248 + 846 .thumb + 847 .syntax unified + 848 .LBE197: + 849 .LBE196: + 850 .LBB198: + 851 .LBI198: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 852 .loc 2 981 31 is_stmt 1 view .LVU249 + 853 .LBB199: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 854 .loc 2 983 3 view .LVU250 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 855 .loc 2 988 4 view .LVU251 + 856 .syntax unified + 857 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 858 024c 93FAA3F2 rbit r2, r3 + 859 @ 0 "" 2 + 860 .LVL58: + 861 .loc 2 1001 3 view .LVU252 + 862 .loc 2 1001 3 is_stmt 0 view .LVU253 + 863 .thumb + 864 .syntax unified + 865 .LBE199: + 866 .LBE198: + 867 .LBB200: + 868 .LBI200: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 869 .loc 2 981 31 is_stmt 1 view .LVU254 + 870 .LBB201: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871 .loc 2 983 3 view .LVU255 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 872 .loc 2 988 4 view .LVU256 + 873 .syntax unified + 874 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 875 0250 93FAA3F2 rbit r2, r3 + 876 @ 0 "" 2 + 877 .LVL59: + 878 .loc 2 1001 3 view .LVU257 + 879 .loc 2 1001 3 is_stmt 0 view .LVU258 + 880 .thumb + 881 .syntax unified + 882 .LBE201: + 883 .LBE200: + 884 .loc 1 468 13 discriminator 8 view .LVU259 + 885 0254 244A ldr r2, .L132 + 886 0256 516A ldr r1, [r2, #36] + 887 .LVL60: + 888 .LBB202: + 889 .LBI202: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890 .loc 2 981 31 is_stmt 1 view .LVU260 + 891 .LBB203: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 892 .loc 2 983 3 view .LVU261 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/cc4nNFis.s page 45 + + + 893 .loc 2 988 4 view .LVU262 + 894 .syntax unified + 895 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 896 0258 93FAA3F3 rbit r3, r3 + 897 @ 0 "" 2 + 898 .LVL61: + 899 .loc 2 1001 3 view .LVU263 + 900 .loc 2 1001 3 is_stmt 0 view .LVU264 + 901 .thumb + 902 .syntax unified + 903 .LBE203: + 904 .LBE202: + 905 .loc 1 468 13 discriminator 2 view .LVU265 + 906 025c B3FA83F3 clz r3, r3 + 907 0260 03F01F03 and r3, r3, #31 + 908 0264 0122 movs r2, #1 + 909 0266 02FA03F3 lsl r3, r2, r3 + 910 .loc 1 468 49 discriminator 2 view .LVU266 + 911 026a 0B42 tst r3, r1 + 912 026c 68D1 bne .L55 + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 913 .loc 1 470 9 is_stmt 1 view .LVU267 + 914 .loc 1 470 13 is_stmt 0 view .LVU268 + 915 026e FFF7FEFF bl HAL_GetTick + 916 .LVL62: + 917 .loc 1 470 27 discriminator 1 view .LVU269 + 918 0272 401B subs r0, r0, r5 + 919 .loc 1 470 11 discriminator 1 view .LVU270 + 920 0274 0228 cmp r0, #2 + 921 0276 E6D9 bls .L57 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 922 .loc 1 472 18 view .LVU271 + 923 0278 0320 movs r0, #3 + 924 027a CEE1 b .L21 + 925 .L122: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 926 .loc 1 431 9 is_stmt 1 view .LVU272 + 927 027c 1A48 ldr r0, .L132 + 928 027e 0368 ldr r3, [r0] + 929 0280 23F0F803 bic r3, r3, #248 + 930 0284 6169 ldr r1, [r4, #20] + 931 .LVL63: + 932 .LBB204: + 933 .LBI204: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 934 .loc 2 981 31 view .LVU273 + 935 .LBB205: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 936 .loc 2 983 3 view .LVU274 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 937 .loc 2 988 4 view .LVU275 + 938 0286 F822 movs r2, #248 + 939 .syntax unified + 940 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 941 0288 92FAA2F2 rbit r2, r2 + ARM GAS /tmp/cc4nNFis.s page 46 + + + 942 @ 0 "" 2 + 943 .LVL64: + 944 .loc 2 1001 3 view .LVU276 + 945 .loc 2 1001 3 is_stmt 0 view .LVU277 + 946 .thumb + 947 .syntax unified + 948 .LBE205: + 949 .LBE204: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 950 .loc 1 431 9 discriminator 2 view .LVU278 + 951 028c B2FA82F2 clz r2, r2 + 952 0290 9140 lsls r1, r1, r2 + 953 0292 0B43 orrs r3, r3, r1 + 954 0294 0360 str r3, [r0] + 955 0296 C2E7 b .L40 + 956 .LVL65: + 957 .L46: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 958 .loc 1 436 9 is_stmt 1 view .LVU279 + 959 .LBB206: + 960 .LBI206: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 961 .loc 2 981 31 view .LVU280 + 962 .LBB207: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 963 .loc 2 983 3 view .LVU281 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 964 .loc 2 988 4 view .LVU282 + 965 0298 0123 movs r3, #1 + 966 .syntax unified + 967 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 968 029a 93FAA3F3 rbit r3, r3 + 969 @ 0 "" 2 + 970 .LVL66: + 971 .loc 2 1001 3 view .LVU283 + 972 .loc 2 1001 3 is_stmt 0 view .LVU284 + 973 .thumb + 974 .syntax unified + 975 .LBE207: + 976 .LBE206: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 977 .loc 1 436 9 discriminator 2 view .LVU285 + 978 029e B3FA83F3 clz r3, r3 + 979 02a2 03F18453 add r3, r3, #276824064 + 980 02a6 03F58413 add r3, r3, #1081344 + 981 02aa 9B00 lsls r3, r3, #2 + 982 02ac 0022 movs r2, #0 + 983 02ae 1A60 str r2, [r3] + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 984 .loc 1 439 9 is_stmt 1 view .LVU286 + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 985 .loc 1 439 21 is_stmt 0 view .LVU287 + 986 02b0 FFF7FEFF bl HAL_GetTick + 987 .LVL67: + 988 02b4 0546 mov r5, r0 + 989 .LVL68: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/cc4nNFis.s page 47 + + + 990 .loc 1 442 9 is_stmt 1 view .LVU288 + 991 .L51: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 992 .loc 1 442 51 view .LVU289 + 993 .LBB208: + 994 .LBI208: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995 .loc 2 981 31 view .LVU290 + 996 .LBB209: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 997 .loc 2 983 3 view .LVU291 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 998 .loc 2 988 4 view .LVU292 + 999 02b6 0223 movs r3, #2 + 1000 .syntax unified + 1001 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1002 02b8 93FAA3F3 rbit r3, r3 + 1003 @ 0 "" 2 + 1004 .loc 2 1001 3 view .LVU293 + 1005 .LVL69: + 1006 .loc 2 1001 3 is_stmt 0 view .LVU294 + 1007 .thumb + 1008 .syntax unified + 1009 .LBE209: + 1010 .LBE208: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1011 .loc 1 442 15 discriminator 1 view .LVU295 + 1012 02bc 0A4B ldr r3, .L132 + 1013 02be 1968 ldr r1, [r3] + 1014 .LVL70: + 1015 .LBB210: + 1016 .LBI210: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1017 .loc 2 981 31 is_stmt 1 view .LVU296 + 1018 .LBB211: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1019 .loc 2 983 3 view .LVU297 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1020 .loc 2 988 4 view .LVU298 + 1021 02c0 0223 movs r3, #2 + 1022 .syntax unified + 1023 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1024 02c2 93FAA3F3 rbit r3, r3 + 1025 @ 0 "" 2 + 1026 .LVL71: + 1027 .loc 2 1001 3 view .LVU299 + 1028 .loc 2 1001 3 is_stmt 0 view .LVU300 + 1029 .thumb + 1030 .syntax unified + 1031 .LBE211: + 1032 .LBE210: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1033 .loc 1 442 15 discriminator 2 view .LVU301 + 1034 02c6 B3FA83F3 clz r3, r3 + 1035 02ca 03F01F03 and r3, r3, #31 + 1036 02ce 0122 movs r2, #1 + 1037 02d0 02FA03F3 lsl r3, r2, r3 + ARM GAS /tmp/cc4nNFis.s page 48 + + + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1038 .loc 1 442 51 discriminator 2 view .LVU302 + 1039 02d4 0B42 tst r3, r1 + 1040 02d6 A2D0 beq .L40 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1041 .loc 1 444 11 is_stmt 1 view .LVU303 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1042 .loc 1 444 15 is_stmt 0 view .LVU304 + 1043 02d8 FFF7FEFF bl HAL_GetTick + 1044 .LVL72: + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1045 .loc 1 444 29 discriminator 1 view .LVU305 + 1046 02dc 401B subs r0, r0, r5 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1047 .loc 1 444 13 discriminator 1 view .LVU306 + 1048 02de 0228 cmp r0, #2 + 1049 02e0 E9D9 bls .L51 + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1050 .loc 1 446 20 view .LVU307 + 1051 02e2 0320 movs r0, #3 + 1052 02e4 99E1 b .L21 + 1053 .L133: + 1054 02e6 00BF .align 2 + 1055 .L132: + 1056 02e8 00100240 .word 1073876992 + 1057 02ec 20819010 .word 277905696 + 1058 .LVL73: + 1059 .L56: + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); + 1060 .loc 1 479 7 is_stmt 1 view .LVU308 + 1061 .LBB212: + 1062 .LBI212: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1063 .loc 2 981 31 view .LVU309 + 1064 .LBB213: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1065 .loc 2 983 3 view .LVU310 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1066 .loc 2 988 4 view .LVU311 + 1067 02f0 0122 movs r2, #1 + 1068 .syntax unified + 1069 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1070 02f2 92FAA2F2 rbit r2, r2 + 1071 @ 0 "" 2 + 1072 .LVL74: + 1073 .loc 2 1001 3 view .LVU312 + 1074 .loc 2 1001 3 is_stmt 0 view .LVU313 + 1075 .thumb + 1076 .syntax unified + 1077 .LBE213: + 1078 .LBE212: + ARM GAS /tmp/cc4nNFis.s page 49 + + + 1079 .loc 1 479 7 discriminator 2 view .LVU314 + 1080 02f6 B2FA82F2 clz r2, r2 + 1081 02fa B74B ldr r3, .L134 + 1082 02fc 1344 add r3, r3, r2 + 1083 02fe 9B00 lsls r3, r3, #2 + 1084 0300 0022 movs r2, #0 + 1085 0302 1A60 str r2, [r3] + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1086 .loc 1 482 7 is_stmt 1 view .LVU315 + 1087 .loc 1 482 19 is_stmt 0 view .LVU316 + 1088 0304 FFF7FEFF bl HAL_GetTick + 1089 .LVL75: + 1090 0308 0546 mov r5, r0 + 1091 .LVL76: + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is disabled */ + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 1092 .loc 1 485 7 is_stmt 1 view .LVU317 + 1093 .L59: + 1094 .loc 1 485 49 view .LVU318 + 1095 .LBB214: + 1096 .LBI214: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1097 .loc 2 981 31 view .LVU319 + 1098 .LBB215: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1099 .loc 2 983 3 view .LVU320 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1100 .loc 2 988 4 view .LVU321 + 1101 030a 0223 movs r3, #2 + 1102 .syntax unified + 1103 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1104 030c 93FAA3F2 rbit r2, r3 + 1105 @ 0 "" 2 + 1106 .LVL77: + 1107 .loc 2 1001 3 view .LVU322 + 1108 .loc 2 1001 3 is_stmt 0 view .LVU323 + 1109 .thumb + 1110 .syntax unified + 1111 .LBE215: + 1112 .LBE214: + 1113 .LBB216: + 1114 .LBI216: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1115 .loc 2 981 31 is_stmt 1 view .LVU324 + 1116 .LBB217: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1117 .loc 2 983 3 view .LVU325 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1118 .loc 2 988 4 view .LVU326 + 1119 .syntax unified + 1120 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1121 0310 93FAA3F2 rbit r2, r3 + 1122 @ 0 "" 2 + 1123 .LVL78: + ARM GAS /tmp/cc4nNFis.s page 50 + + + 1124 .loc 2 1001 3 view .LVU327 + 1125 .loc 2 1001 3 is_stmt 0 view .LVU328 + 1126 .thumb + 1127 .syntax unified + 1128 .LBE217: + 1129 .LBE216: + 1130 .LBB218: + 1131 .LBI218: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1132 .loc 2 981 31 is_stmt 1 view .LVU329 + 1133 .LBB219: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1134 .loc 2 983 3 view .LVU330 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1135 .loc 2 988 4 view .LVU331 + 1136 .syntax unified + 1137 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1138 0314 93FAA3F2 rbit r2, r3 + 1139 @ 0 "" 2 + 1140 .LVL79: + 1141 .loc 2 1001 3 view .LVU332 + 1142 .loc 2 1001 3 is_stmt 0 view .LVU333 + 1143 .thumb + 1144 .syntax unified + 1145 .LBE219: + 1146 .LBE218: + 1147 .loc 1 485 13 discriminator 8 view .LVU334 + 1148 0318 B04A ldr r2, .L134+4 + 1149 031a 516A ldr r1, [r2, #36] + 1150 .LVL80: + 1151 .LBB220: + 1152 .LBI220: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1153 .loc 2 981 31 is_stmt 1 view .LVU335 + 1154 .LBB221: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1155 .loc 2 983 3 view .LVU336 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1156 .loc 2 988 4 view .LVU337 + 1157 .syntax unified + 1158 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1159 031c 93FAA3F3 rbit r3, r3 + 1160 @ 0 "" 2 + 1161 .LVL81: + 1162 .loc 2 1001 3 view .LVU338 + 1163 .loc 2 1001 3 is_stmt 0 view .LVU339 + 1164 .thumb + 1165 .syntax unified + 1166 .LBE221: + 1167 .LBE220: + 1168 .loc 1 485 13 discriminator 2 view .LVU340 + 1169 0320 B3FA83F3 clz r3, r3 + 1170 0324 03F01F03 and r3, r3, #31 + 1171 0328 0122 movs r2, #1 + 1172 032a 02FA03F3 lsl r3, r2, r3 + 1173 .loc 1 485 49 discriminator 2 view .LVU341 + 1174 032e 0B42 tst r3, r1 + ARM GAS /tmp/cc4nNFis.s page 51 + + + 1175 0330 06D0 beq .L55 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 1176 .loc 1 487 9 is_stmt 1 view .LVU342 + 1177 .loc 1 487 13 is_stmt 0 view .LVU343 + 1178 0332 FFF7FEFF bl HAL_GetTick + 1179 .LVL82: + 1180 .loc 1 487 27 discriminator 1 view .LVU344 + 1181 0336 401B subs r0, r0, r5 + 1182 .loc 1 487 11 discriminator 1 view .LVU345 + 1183 0338 0228 cmp r0, #2 + 1184 033a E6D9 bls .L59 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 1185 .loc 1 489 18 view .LVU346 + 1186 033c 0320 movs r0, #3 + 1187 033e 6CE1 b .L21 + 1188 .LVL83: + 1189 .L55: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 1190 .loc 1 495 3 is_stmt 1 view .LVU347 + 1191 .loc 1 495 25 is_stmt 0 view .LVU348 + 1192 0340 2368 ldr r3, [r4] + 1193 .loc 1 495 5 view .LVU349 + 1194 0342 13F0040F tst r3, #4 + 1195 0346 00F0A980 beq .L61 + 1196 .LBB222: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; + 1197 .loc 1 497 5 is_stmt 1 view .LVU350 + 1198 .LVL84: + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + 1199 .loc 1 500 5 view .LVU351 + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 1200 .loc 1 504 5 view .LVU352 + 1201 .loc 1 504 8 is_stmt 0 view .LVU353 + 1202 034a A44B ldr r3, .L134+4 + 1203 034c DB69 ldr r3, [r3, #28] + 1204 .loc 1 504 7 view .LVU354 + 1205 034e 13F0805F tst r3, #268435456 + 1206 0352 20D1 bne .L103 + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 1207 .loc 1 506 7 is_stmt 1 view .LVU355 + 1208 .LBB223: + 1209 .loc 1 506 7 view .LVU356 + 1210 .loc 1 506 7 view .LVU357 + ARM GAS /tmp/cc4nNFis.s page 52 + + + 1211 0354 A14B ldr r3, .L134+4 + 1212 0356 DA69 ldr r2, [r3, #28] + 1213 0358 42F08052 orr r2, r2, #268435456 + 1214 035c DA61 str r2, [r3, #28] + 1215 .loc 1 506 7 view .LVU358 + 1216 035e DB69 ldr r3, [r3, #28] + 1217 0360 03F08053 and r3, r3, #268435456 + 1218 0364 0193 str r3, [sp, #4] + 1219 .loc 1 506 7 view .LVU359 + 1220 0366 019B ldr r3, [sp, #4] + 1221 .LBE223: + 1222 .loc 1 506 7 view .LVU360 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pwrclkchanged = SET; + 1223 .loc 1 507 7 view .LVU361 + 1224 .LVL85: + 1225 .loc 1 507 21 is_stmt 0 view .LVU362 + 1226 0368 0125 movs r5, #1 + 1227 .LVL86: + 1228 .L62: + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 1229 .loc 1 510 5 is_stmt 1 view .LVU363 + 1230 .loc 1 510 8 is_stmt 0 view .LVU364 + 1231 036a 9D4B ldr r3, .L134+8 + 1232 036c 1B68 ldr r3, [r3] + 1233 .loc 1 510 7 view .LVU365 + 1234 036e 13F4807F tst r3, #256 + 1235 0372 12D0 beq .L124 + 1236 .L63: + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable write access to Backup domain */ + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 1237 .loc 1 528 5 is_stmt 1 view .LVU366 + 1238 .loc 1 528 5 view .LVU367 + 1239 0374 E368 ldr r3, [r4, #12] + 1240 0376 012B cmp r3, #1 + 1241 0378 23D0 beq .L125 + 1242 .loc 1 528 5 discriminator 2 view .LVU368 + 1243 037a 73BB cbnz r3, .L68 + 1244 .loc 1 528 5 discriminator 4 view .LVU369 + 1245 037c 03F18043 add r3, r3, #1073741824 + ARM GAS /tmp/cc4nNFis.s page 53 + + + 1246 0380 03F50433 add r3, r3, #135168 + 1247 0384 1A6A ldr r2, [r3, #32] + 1248 0386 22F00102 bic r2, r2, #1 + 1249 038a 1A62 str r2, [r3, #32] + 1250 .loc 1 528 5 discriminator 4 view .LVU370 + 1251 038c 1A6A ldr r2, [r3, #32] + 1252 038e 22F00402 bic r2, r2, #4 + 1253 0392 1A62 str r2, [r3, #32] + 1254 0394 1AE0 b .L67 + 1255 .LVL87: + 1256 .L103: + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1257 .loc 1 497 22 is_stmt 0 view .LVU371 + 1258 0396 0025 movs r5, #0 + 1259 0398 E7E7 b .L62 + 1260 .LVL88: + 1261 .L124: + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1262 .loc 1 513 7 is_stmt 1 view .LVU372 + 1263 039a 914A ldr r2, .L134+8 + 1264 039c 1368 ldr r3, [r2] + 1265 039e 43F48073 orr r3, r3, #256 + 1266 03a2 1360 str r3, [r2] + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1267 .loc 1 516 7 view .LVU373 + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1268 .loc 1 516 19 is_stmt 0 view .LVU374 + 1269 03a4 FFF7FEFF bl HAL_GetTick + 1270 .LVL89: + 1271 03a8 0646 mov r6, r0 + 1272 .LVL90: + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1273 .loc 1 518 7 is_stmt 1 view .LVU375 + 1274 .L64: + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1275 .loc 1 518 13 view .LVU376 + 1276 03aa 8D4B ldr r3, .L134+8 + 1277 03ac 1B68 ldr r3, [r3] + 1278 03ae 13F4807F tst r3, #256 + 1279 03b2 DFD1 bne .L63 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1280 .loc 1 520 9 view .LVU377 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1281 .loc 1 520 13 is_stmt 0 view .LVU378 + 1282 03b4 FFF7FEFF bl HAL_GetTick + 1283 .LVL91: + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1284 .loc 1 520 27 discriminator 1 view .LVU379 + 1285 03b8 801B subs r0, r0, r6 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1286 .loc 1 520 11 discriminator 1 view .LVU380 + 1287 03ba 6428 cmp r0, #100 + 1288 03bc F5D9 bls .L64 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1289 .loc 1 522 18 view .LVU381 + 1290 03be 0320 movs r0, #3 + 1291 03c0 2BE1 b .L21 + ARM GAS /tmp/cc4nNFis.s page 54 + + + 1292 .LVL92: + 1293 .L125: + 1294 .loc 1 528 5 is_stmt 1 discriminator 1 view .LVU382 + 1295 03c2 864A ldr r2, .L134+4 + 1296 03c4 136A ldr r3, [r2, #32] + 1297 03c6 43F00103 orr r3, r3, #1 + 1298 03ca 1362 str r3, [r2, #32] + 1299 .L67: + 1300 .loc 1 528 5 discriminator 10 view .LVU383 + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 1301 .loc 1 530 5 view .LVU384 + 1302 .loc 1 530 25 is_stmt 0 view .LVU385 + 1303 03cc E368 ldr r3, [r4, #12] + 1304 .loc 1 530 7 view .LVU386 + 1305 03ce 002B cmp r3, #0 + 1306 03d0 3CD0 beq .L70 + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1307 .loc 1 533 7 is_stmt 1 view .LVU387 + 1308 .loc 1 533 19 is_stmt 0 view .LVU388 + 1309 03d2 FFF7FEFF bl HAL_GetTick + 1310 .LVL93: + 1311 03d6 0646 mov r6, r0 + 1312 .LVL94: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is ready */ + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 1313 .loc 1 536 7 is_stmt 1 view .LVU389 + 1314 .loc 1 536 12 is_stmt 0 view .LVU390 + 1315 03d8 2EE0 b .L71 + 1316 .LVL95: + 1317 .L68: + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1318 .loc 1 528 5 is_stmt 1 discriminator 5 view .LVU391 + 1319 03da 052B cmp r3, #5 + 1320 03dc 09D0 beq .L126 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1321 .loc 1 528 5 discriminator 8 view .LVU392 + 1322 03de 7F4B ldr r3, .L134+4 + 1323 03e0 1A6A ldr r2, [r3, #32] + 1324 03e2 22F00102 bic r2, r2, #1 + 1325 03e6 1A62 str r2, [r3, #32] + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1326 .loc 1 528 5 discriminator 8 view .LVU393 + 1327 03e8 1A6A ldr r2, [r3, #32] + 1328 03ea 22F00402 bic r2, r2, #4 + 1329 03ee 1A62 str r2, [r3, #32] + 1330 03f0 ECE7 b .L67 + 1331 .L126: + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1332 .loc 1 528 5 discriminator 7 view .LVU394 + 1333 03f2 7A4B ldr r3, .L134+4 + 1334 03f4 1A6A ldr r2, [r3, #32] + 1335 03f6 42F00402 orr r2, r2, #4 + 1336 03fa 1A62 str r2, [r3, #32] + ARM GAS /tmp/cc4nNFis.s page 55 + + + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1337 .loc 1 528 5 discriminator 7 view .LVU395 + 1338 03fc 1A6A ldr r2, [r3, #32] + 1339 03fe 42F00102 orr r2, r2, #1 + 1340 0402 1A62 str r2, [r3, #32] + 1341 0404 E2E7 b .L67 + 1342 .LVL96: + 1343 .L72: + 1344 .LBB224: + 1345 .LBI224: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1346 .loc 2 981 31 view .LVU396 + 1347 .LBB225: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1348 .loc 2 983 3 view .LVU397 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1349 .loc 2 988 4 view .LVU398 + 1350 0406 0223 movs r3, #2 + 1351 .syntax unified + 1352 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1353 0408 93FAA3F3 rbit r3, r3 + 1354 @ 0 "" 2 + 1355 .LVL97: + 1356 .loc 2 1001 3 view .LVU399 + 1357 .loc 2 1001 3 is_stmt 0 view .LVU400 + 1358 .thumb + 1359 .syntax unified + 1360 .LBE225: + 1361 .LBE224: + 1362 .loc 1 536 13 discriminator 8 view .LVU401 + 1363 040c 734B ldr r3, .L134+4 + 1364 040e 596A ldr r1, [r3, #36] + 1365 .L73: + 1366 .LVL98: + 1367 .LBB226: + 1368 .LBI226: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1369 .loc 2 981 31 is_stmt 1 view .LVU402 + 1370 .LBB227: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1371 .loc 2 983 3 view .LVU403 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1372 .loc 2 988 4 view .LVU404 + 1373 0410 0223 movs r3, #2 + 1374 .syntax unified + 1375 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1376 0412 93FAA3F3 rbit r3, r3 + 1377 @ 0 "" 2 + 1378 .LVL99: + 1379 .loc 2 1001 3 view .LVU405 + 1380 .loc 2 1001 3 is_stmt 0 view .LVU406 + 1381 .thumb + 1382 .syntax unified + 1383 .LBE227: + 1384 .LBE226: + 1385 .loc 1 536 13 discriminator 2 view .LVU407 + 1386 0416 B3FA83F3 clz r3, r3 + ARM GAS /tmp/cc4nNFis.s page 56 + + + 1387 041a 03F01F03 and r3, r3, #31 + 1388 041e 0122 movs r2, #1 + 1389 0420 02FA03F3 lsl r3, r2, r3 + 1390 .loc 1 536 49 discriminator 2 view .LVU408 + 1391 0424 1942 tst r1, r3 + 1392 0426 38D1 bne .L75 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 1393 .loc 1 538 9 is_stmt 1 view .LVU409 + 1394 .loc 1 538 13 is_stmt 0 view .LVU410 + 1395 0428 FFF7FEFF bl HAL_GetTick + 1396 .LVL100: + 1397 .loc 1 538 27 discriminator 1 view .LVU411 + 1398 042c 801B subs r0, r0, r6 + 1399 .loc 1 538 11 discriminator 1 view .LVU412 + 1400 042e 41F28833 movw r3, #5000 + 1401 0432 9842 cmp r0, r3 + 1402 0434 00F2EC80 bhi .L105 + 1403 .L71: + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1404 .loc 1 536 49 is_stmt 1 view .LVU413 + 1405 .LVL101: + 1406 .LBB228: + 1407 .LBI228: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1408 .loc 2 981 31 view .LVU414 + 1409 .LBB229: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1410 .loc 2 983 3 view .LVU415 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1411 .loc 2 988 4 view .LVU416 + 1412 0438 0223 movs r3, #2 + 1413 .syntax unified + 1414 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1415 043a 93FAA3F2 rbit r2, r3 + 1416 @ 0 "" 2 + 1417 .LVL102: + 1418 .loc 2 1001 3 view .LVU417 + 1419 .loc 2 1001 3 is_stmt 0 view .LVU418 + 1420 .thumb + 1421 .syntax unified + 1422 .LBE229: + 1423 .LBE228: + 1424 .LBB230: + 1425 .LBI230: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1426 .loc 2 981 31 is_stmt 1 view .LVU419 + 1427 .LBB231: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1428 .loc 2 983 3 view .LVU420 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1429 .loc 2 988 4 view .LVU421 + 1430 .syntax unified + 1431 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1432 043e 93FAA3F3 rbit r3, r3 + 1433 @ 0 "" 2 + 1434 .LVL103: + ARM GAS /tmp/cc4nNFis.s page 57 + + + 1435 .loc 2 1001 3 view .LVU422 + 1436 .loc 2 1001 3 is_stmt 0 view .LVU423 + 1437 .thumb + 1438 .syntax unified + 1439 .LBE231: + 1440 .LBE230: + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1441 .loc 1 536 13 discriminator 2 view .LVU424 + 1442 0442 002B cmp r3, #0 + 1443 0444 DFD0 beq .L72 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1444 .loc 1 536 13 discriminator 4 view .LVU425 + 1445 0446 654B ldr r3, .L134+4 + 1446 0448 196A ldr r1, [r3, #32] + 1447 044a E1E7 b .L73 + 1448 .LVL104: + 1449 .L70: + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1450 .loc 1 547 7 is_stmt 1 view .LVU426 + 1451 .loc 1 547 19 is_stmt 0 view .LVU427 + 1452 044c FFF7FEFF bl HAL_GetTick + 1453 .LVL105: + 1454 0450 0646 mov r6, r0 + 1455 .LVL106: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is disabled */ + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 1456 .loc 1 550 7 is_stmt 1 view .LVU428 + 1457 .loc 1 550 12 is_stmt 0 view .LVU429 + 1458 0452 18E0 b .L76 + 1459 .LVL107: + 1460 .L77: + 1461 .LBB232: + 1462 .LBI232: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1463 .loc 2 981 31 is_stmt 1 view .LVU430 + 1464 .LBB233: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1465 .loc 2 983 3 view .LVU431 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1466 .loc 2 988 4 view .LVU432 + 1467 0454 0223 movs r3, #2 + 1468 .syntax unified + 1469 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1470 0456 93FAA3F3 rbit r3, r3 + 1471 @ 0 "" 2 + 1472 .LVL108: + 1473 .loc 2 1001 3 view .LVU433 + 1474 .loc 2 1001 3 is_stmt 0 view .LVU434 + ARM GAS /tmp/cc4nNFis.s page 58 + + + 1475 .thumb + 1476 .syntax unified + 1477 .LBE233: + 1478 .LBE232: + 1479 .loc 1 550 13 discriminator 8 view .LVU435 + 1480 045a 604B ldr r3, .L134+4 + 1481 045c 596A ldr r1, [r3, #36] + 1482 .L78: + 1483 .LVL109: + 1484 .LBB234: + 1485 .LBI234: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1486 .loc 2 981 31 is_stmt 1 view .LVU436 + 1487 .LBB235: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1488 .loc 2 983 3 view .LVU437 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1489 .loc 2 988 4 view .LVU438 + 1490 045e 0223 movs r3, #2 + 1491 .syntax unified + 1492 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1493 0460 93FAA3F3 rbit r3, r3 + 1494 @ 0 "" 2 + 1495 .LVL110: + 1496 .loc 2 1001 3 view .LVU439 + 1497 .loc 2 1001 3 is_stmt 0 view .LVU440 + 1498 .thumb + 1499 .syntax unified + 1500 .LBE235: + 1501 .LBE234: + 1502 .loc 1 550 13 discriminator 2 view .LVU441 + 1503 0464 B3FA83F3 clz r3, r3 + 1504 0468 03F01F03 and r3, r3, #31 + 1505 046c 0122 movs r2, #1 + 1506 046e 02FA03F3 lsl r3, r2, r3 + 1507 .loc 1 550 49 discriminator 2 view .LVU442 + 1508 0472 1942 tst r1, r3 + 1509 0474 11D0 beq .L75 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 1510 .loc 1 552 9 is_stmt 1 view .LVU443 + 1511 .loc 1 552 13 is_stmt 0 view .LVU444 + 1512 0476 FFF7FEFF bl HAL_GetTick + 1513 .LVL111: + 1514 .loc 1 552 27 discriminator 1 view .LVU445 + 1515 047a 801B subs r0, r0, r6 + 1516 .loc 1 552 11 discriminator 1 view .LVU446 + 1517 047c 41F28833 movw r3, #5000 + 1518 0480 9842 cmp r0, r3 + 1519 0482 00F2C780 bhi .L106 + 1520 .L76: + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1521 .loc 1 550 49 is_stmt 1 view .LVU447 + 1522 .LVL112: + 1523 .LBB236: + 1524 .LBI236: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cc4nNFis.s page 59 + + + 1525 .loc 2 981 31 view .LVU448 + 1526 .LBB237: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1527 .loc 2 983 3 view .LVU449 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1528 .loc 2 988 4 view .LVU450 + 1529 0486 0223 movs r3, #2 + 1530 .syntax unified + 1531 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1532 0488 93FAA3F2 rbit r2, r3 + 1533 @ 0 "" 2 + 1534 .LVL113: + 1535 .loc 2 1001 3 view .LVU451 + 1536 .loc 2 1001 3 is_stmt 0 view .LVU452 + 1537 .thumb + 1538 .syntax unified + 1539 .LBE237: + 1540 .LBE236: + 1541 .LBB238: + 1542 .LBI238: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1543 .loc 2 981 31 is_stmt 1 view .LVU453 + 1544 .LBB239: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1545 .loc 2 983 3 view .LVU454 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1546 .loc 2 988 4 view .LVU455 + 1547 .syntax unified + 1548 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1549 048c 93FAA3F3 rbit r3, r3 + 1550 @ 0 "" 2 + 1551 .LVL114: + 1552 .loc 2 1001 3 view .LVU456 + 1553 .loc 2 1001 3 is_stmt 0 view .LVU457 + 1554 .thumb + 1555 .syntax unified + 1556 .LBE239: + 1557 .LBE238: + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1558 .loc 1 550 13 discriminator 2 view .LVU458 + 1559 0490 002B cmp r3, #0 + 1560 0492 DFD0 beq .L77 + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1561 .loc 1 550 13 discriminator 4 view .LVU459 + 1562 0494 514B ldr r3, .L134+4 + 1563 0496 196A ldr r1, [r3, #32] + 1564 0498 E1E7 b .L78 + 1565 .L75: + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Require to disable power clock if necessary */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(pwrclkchanged == SET) + 1566 .loc 1 560 5 is_stmt 1 view .LVU460 + ARM GAS /tmp/cc4nNFis.s page 60 + + + 1567 .loc 1 560 7 is_stmt 0 view .LVU461 + 1568 049a B5BB cbnz r5, .L127 + 1569 .LVL115: + 1570 .L61: + 1571 .loc 1 560 7 view .LVU462 + 1572 .LBE222: + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + 1573 .loc 1 568 3 is_stmt 1 view .LVU463 + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 1574 .loc 1 569 3 view .LVU464 + 1575 .loc 1 569 30 is_stmt 0 view .LVU465 + 1576 049c E369 ldr r3, [r4, #28] + 1577 .loc 1 569 6 view .LVU466 + 1578 049e 002B cmp r3, #0 + 1579 04a0 00F0BA80 beq .L107 + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 1580 .loc 1 572 5 is_stmt 1 view .LVU467 + 1581 .loc 1 572 8 is_stmt 0 view .LVU468 + 1582 04a4 4D4A ldr r2, .L134+4 + 1583 04a6 5268 ldr r2, [r2, #4] + 1584 04a8 02F00C02 and r2, r2, #12 + 1585 .loc 1 572 7 view .LVU469 + 1586 04ac 082A cmp r2, #8 + 1587 04ae 00F09980 beq .L80 + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 1588 .loc 1 574 7 is_stmt 1 view .LVU470 + 1589 .loc 1 574 9 is_stmt 0 view .LVU471 + 1590 04b2 022B cmp r3, #2 + 1591 04b4 2FD0 beq .L128 + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + ARM GAS /tmp/cc4nNFis.s page 61 + + + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source and multiplication factor. */ + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the main PLL. */ + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is ready */ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 1592 .loc 1 626 9 is_stmt 1 view .LVU472 + 1593 .LVL116: + 1594 .LBB240: + 1595 .LBI240: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1596 .loc 2 981 31 view .LVU473 + 1597 .LBB241: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1598 .loc 2 983 3 view .LVU474 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1599 .loc 2 988 4 view .LVU475 + 1600 04b6 4FF08073 mov r3, #16777216 + 1601 .syntax unified + 1602 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1603 04ba 93FAA3F3 rbit r3, r3 + 1604 @ 0 "" 2 + 1605 .LVL117: + 1606 .loc 2 1001 3 view .LVU476 + 1607 .loc 2 1001 3 is_stmt 0 view .LVU477 + 1608 .thumb + 1609 .syntax unified + 1610 .LBE241: + 1611 .LBE240: + ARM GAS /tmp/cc4nNFis.s page 62 + + + 1612 .loc 1 626 9 discriminator 2 view .LVU478 + 1613 04be B3FA83F3 clz r3, r3 + 1614 04c2 03F18453 add r3, r3, #276824064 + 1615 04c6 03F58413 add r3, r3, #1081344 + 1616 04ca 9B00 lsls r3, r3, #2 + 1617 04cc 0022 movs r2, #0 + 1618 04ce 1A60 str r2, [r3] + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1619 .loc 1 629 9 is_stmt 1 view .LVU479 + 1620 .loc 1 629 21 is_stmt 0 view .LVU480 + 1621 04d0 FFF7FEFF bl HAL_GetTick + 1622 .LVL118: + 1623 04d4 0446 mov r4, r0 + 1624 .LVL119: + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 1625 .loc 1 632 9 is_stmt 1 view .LVU481 + 1626 .L90: + 1627 .loc 1 632 52 view .LVU482 + 1628 .LBB242: + 1629 .LBI242: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1630 .loc 2 981 31 view .LVU483 + 1631 .LBB243: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1632 .loc 2 983 3 view .LVU484 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1633 .loc 2 988 4 view .LVU485 + 1634 04d6 4FF00073 mov r3, #33554432 + 1635 .syntax unified + 1636 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1637 04da 93FAA3F3 rbit r3, r3 + 1638 @ 0 "" 2 + 1639 .loc 2 1001 3 view .LVU486 + 1640 .LVL120: + 1641 .loc 2 1001 3 is_stmt 0 view .LVU487 + 1642 .thumb + 1643 .syntax unified + 1644 .LBE243: + 1645 .LBE242: + 1646 .loc 1 632 15 discriminator 1 view .LVU488 + 1647 04de 3F4B ldr r3, .L134+4 + 1648 04e0 1968 ldr r1, [r3] + 1649 .LVL121: + 1650 .LBB244: + 1651 .LBI244: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1652 .loc 2 981 31 is_stmt 1 view .LVU489 + 1653 .LBB245: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1654 .loc 2 983 3 view .LVU490 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1655 .loc 2 988 4 view .LVU491 + 1656 04e2 4FF00073 mov r3, #33554432 + ARM GAS /tmp/cc4nNFis.s page 63 + + + 1657 .syntax unified + 1658 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1659 04e6 93FAA3F3 rbit r3, r3 + 1660 @ 0 "" 2 + 1661 .LVL122: + 1662 .loc 2 1001 3 view .LVU492 + 1663 .loc 2 1001 3 is_stmt 0 view .LVU493 + 1664 .thumb + 1665 .syntax unified + 1666 .LBE245: + 1667 .LBE244: + 1668 .loc 1 632 15 discriminator 2 view .LVU494 + 1669 04ea B3FA83F3 clz r3, r3 + 1670 04ee 03F01F03 and r3, r3, #31 + 1671 04f2 0122 movs r2, #1 + 1672 04f4 02FA03F3 lsl r3, r2, r3 + 1673 .loc 1 632 52 discriminator 2 view .LVU495 + 1674 04f8 1942 tst r1, r3 + 1675 04fa 6BD0 beq .L129 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 1676 .loc 1 634 11 is_stmt 1 view .LVU496 + 1677 .loc 1 634 15 is_stmt 0 view .LVU497 + 1678 04fc FFF7FEFF bl HAL_GetTick + 1679 .LVL123: + 1680 .loc 1 634 29 discriminator 1 view .LVU498 + 1681 0500 001B subs r0, r0, r4 + 1682 .loc 1 634 13 discriminator 1 view .LVU499 + 1683 0502 0228 cmp r0, #2 + 1684 0504 E7D9 bls .L90 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 1685 .loc 1 636 20 view .LVU500 + 1686 0506 0320 movs r0, #3 + 1687 0508 87E0 b .L21 + 1688 .LVL124: + 1689 .L127: + 1690 .LBB246: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1691 .loc 1 562 7 is_stmt 1 view .LVU501 + 1692 050a 344A ldr r2, .L134+4 + 1693 050c D369 ldr r3, [r2, #28] + 1694 050e 23F08053 bic r3, r3, #268435456 + 1695 0512 D361 str r3, [r2, #28] + 1696 0514 C2E7 b .L61 + 1697 .LVL125: + 1698 .L128: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1699 .loc 1 562 7 is_stmt 0 view .LVU502 + 1700 .LBE246: + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 1701 .loc 1 577 9 is_stmt 1 view .LVU503 + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 1702 .loc 1 578 9 view .LVU504 + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1703 .loc 1 584 9 view .LVU505 + 1704 .LBB247: + ARM GAS /tmp/cc4nNFis.s page 64 + + + 1705 .LBI247: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1706 .loc 2 981 31 view .LVU506 + 1707 .LBB248: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1708 .loc 2 983 3 view .LVU507 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1709 .loc 2 988 4 view .LVU508 + 1710 0516 4FF08073 mov r3, #16777216 + 1711 .syntax unified + 1712 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1713 051a 93FAA3F3 rbit r3, r3 + 1714 @ 0 "" 2 + 1715 .LVL126: + 1716 .loc 2 1001 3 view .LVU509 + 1717 .loc 2 1001 3 is_stmt 0 view .LVU510 + 1718 .thumb + 1719 .syntax unified + 1720 .LBE248: + 1721 .LBE247: + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1722 .loc 1 584 9 discriminator 2 view .LVU511 + 1723 051e B3FA83F3 clz r3, r3 + 1724 0522 03F18453 add r3, r3, #276824064 + 1725 0526 03F58413 add r3, r3, #1081344 + 1726 052a 9B00 lsls r3, r3, #2 + 1727 052c 0022 movs r2, #0 + 1728 052e 1A60 str r2, [r3] + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1729 .loc 1 587 9 is_stmt 1 view .LVU512 + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1730 .loc 1 587 21 is_stmt 0 view .LVU513 + 1731 0530 FFF7FEFF bl HAL_GetTick + 1732 .LVL127: + 1733 0534 0546 mov r5, r0 + 1734 .LVL128: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1735 .loc 1 590 9 is_stmt 1 view .LVU514 + 1736 .L82: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1737 .loc 1 590 52 view .LVU515 + 1738 .LBB249: + 1739 .LBI249: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1740 .loc 2 981 31 view .LVU516 + 1741 .LBB250: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1742 .loc 2 983 3 view .LVU517 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1743 .loc 2 988 4 view .LVU518 + 1744 0536 4FF00073 mov r3, #33554432 + 1745 .syntax unified + 1746 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1747 053a 93FAA3F3 rbit r3, r3 + 1748 @ 0 "" 2 + 1749 .loc 2 1001 3 view .LVU519 + 1750 .LVL129: + ARM GAS /tmp/cc4nNFis.s page 65 + + + 1751 .loc 2 1001 3 is_stmt 0 view .LVU520 + 1752 .thumb + 1753 .syntax unified + 1754 .LBE250: + 1755 .LBE249: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1756 .loc 1 590 15 discriminator 1 view .LVU521 + 1757 053e 274B ldr r3, .L134+4 + 1758 0540 1968 ldr r1, [r3] + 1759 .LVL130: + 1760 .LBB251: + 1761 .LBI251: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1762 .loc 2 981 31 is_stmt 1 view .LVU522 + 1763 .LBB252: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1764 .loc 2 983 3 view .LVU523 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1765 .loc 2 988 4 view .LVU524 + 1766 0542 4FF00073 mov r3, #33554432 + 1767 .syntax unified + 1768 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1769 0546 93FAA3F3 rbit r3, r3 + 1770 @ 0 "" 2 + 1771 .LVL131: + 1772 .loc 2 1001 3 view .LVU525 + 1773 .loc 2 1001 3 is_stmt 0 view .LVU526 + 1774 .thumb + 1775 .syntax unified + 1776 .LBE252: + 1777 .LBE251: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1778 .loc 1 590 15 discriminator 2 view .LVU527 + 1779 054a B3FA83F3 clz r3, r3 + 1780 054e 03F01F03 and r3, r3, #31 + 1781 0552 0122 movs r2, #1 + 1782 0554 02FA03F3 lsl r3, r2, r3 + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1783 .loc 1 590 52 discriminator 2 view .LVU528 + 1784 0558 1942 tst r1, r3 + 1785 055a 06D0 beq .L130 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1786 .loc 1 592 11 is_stmt 1 view .LVU529 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1787 .loc 1 592 15 is_stmt 0 view .LVU530 + 1788 055c FFF7FEFF bl HAL_GetTick + 1789 .LVL132: + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1790 .loc 1 592 29 discriminator 1 view .LVU531 + 1791 0560 401B subs r0, r0, r5 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1792 .loc 1 592 13 discriminator 1 view .LVU532 + 1793 0562 0228 cmp r0, #2 + 1794 0564 E7D9 bls .L82 + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1795 .loc 1 594 20 view .LVU533 + 1796 0566 0320 movs r0, #3 + ARM GAS /tmp/cc4nNFis.s page 66 + + + 1797 0568 57E0 b .L21 + 1798 .L130: + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 1799 .loc 1 605 7 is_stmt 1 view .LVU534 + 1800 056a 1C49 ldr r1, .L134+4 + 1801 056c 4B68 ldr r3, [r1, #4] + 1802 056e 23F47413 bic r3, r3, #3997696 + 1803 0572 626A ldr r2, [r4, #36] + 1804 0574 206A ldr r0, [r4, #32] + 1805 0576 0243 orrs r2, r2, r0 + 1806 0578 1343 orrs r3, r3, r2 + 1807 057a 4B60 str r3, [r1, #4] + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1808 .loc 1 609 9 view .LVU535 + 1809 .LVL133: + 1810 .LBB253: + 1811 .LBI253: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1812 .loc 2 981 31 view .LVU536 + 1813 .LBB254: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1814 .loc 2 983 3 view .LVU537 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1815 .loc 2 988 4 view .LVU538 + 1816 057c 4FF08073 mov r3, #16777216 + 1817 .syntax unified + 1818 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1819 0580 93FAA3F3 rbit r3, r3 + 1820 @ 0 "" 2 + 1821 .LVL134: + 1822 .loc 2 1001 3 view .LVU539 + 1823 .loc 2 1001 3 is_stmt 0 view .LVU540 + 1824 .thumb + 1825 .syntax unified + 1826 .LBE254: + 1827 .LBE253: + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1828 .loc 1 609 9 discriminator 2 view .LVU541 + 1829 0584 B3FA83F3 clz r3, r3 + 1830 0588 03F18453 add r3, r3, #276824064 + 1831 058c 03F58413 add r3, r3, #1081344 + 1832 0590 9B00 lsls r3, r3, #2 + 1833 0592 0122 movs r2, #1 + 1834 0594 1A60 str r2, [r3] + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1835 .loc 1 612 9 is_stmt 1 view .LVU542 + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1836 .loc 1 612 21 is_stmt 0 view .LVU543 + 1837 0596 FFF7FEFF bl HAL_GetTick + 1838 .LVL135: + 1839 059a 0446 mov r4, r0 + 1840 .LVL136: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1841 .loc 1 615 9 is_stmt 1 view .LVU544 + 1842 .L86: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1843 .loc 1 615 52 view .LVU545 + ARM GAS /tmp/cc4nNFis.s page 67 + + + 1844 .LBB255: + 1845 .LBI255: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1846 .loc 2 981 31 view .LVU546 + 1847 .LBB256: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1848 .loc 2 983 3 view .LVU547 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1849 .loc 2 988 4 view .LVU548 + 1850 059c 4FF00073 mov r3, #33554432 + 1851 .syntax unified + 1852 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1853 05a0 93FAA3F3 rbit r3, r3 + 1854 @ 0 "" 2 + 1855 .loc 2 1001 3 view .LVU549 + 1856 .LVL137: + 1857 .loc 2 1001 3 is_stmt 0 view .LVU550 + 1858 .thumb + 1859 .syntax unified + 1860 .LBE256: + 1861 .LBE255: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1862 .loc 1 615 15 discriminator 1 view .LVU551 + 1863 05a4 0D4B ldr r3, .L134+4 + 1864 05a6 1968 ldr r1, [r3] + 1865 .LVL138: + 1866 .LBB257: + 1867 .LBI257: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1868 .loc 2 981 31 is_stmt 1 view .LVU552 + 1869 .LBB258: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1870 .loc 2 983 3 view .LVU553 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1871 .loc 2 988 4 view .LVU554 + 1872 05a8 4FF00073 mov r3, #33554432 + 1873 .syntax unified + 1874 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1875 05ac 93FAA3F3 rbit r3, r3 + 1876 @ 0 "" 2 + 1877 .LVL139: + 1878 .loc 2 1001 3 view .LVU555 + 1879 .loc 2 1001 3 is_stmt 0 view .LVU556 + 1880 .thumb + 1881 .syntax unified + 1882 .LBE258: + 1883 .LBE257: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1884 .loc 1 615 15 discriminator 2 view .LVU557 + 1885 05b0 B3FA83F3 clz r3, r3 + 1886 05b4 03F01F03 and r3, r3, #31 + 1887 05b8 0122 movs r2, #1 + 1888 05ba 02FA03F3 lsl r3, r2, r3 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1889 .loc 1 615 52 discriminator 2 view .LVU558 + 1890 05be 1942 tst r1, r3 + 1891 05c0 06D1 bne .L131 + ARM GAS /tmp/cc4nNFis.s page 68 + + + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1892 .loc 1 617 11 is_stmt 1 view .LVU559 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1893 .loc 1 617 15 is_stmt 0 view .LVU560 + 1894 05c2 FFF7FEFF bl HAL_GetTick + 1895 .LVL140: + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1896 .loc 1 617 29 discriminator 1 view .LVU561 + 1897 05c6 001B subs r0, r0, r4 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1898 .loc 1 617 13 discriminator 1 view .LVU562 + 1899 05c8 0228 cmp r0, #2 + 1900 05ca E7D9 bls .L86 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1901 .loc 1 619 20 view .LVU563 + 1902 05cc 0320 movs r0, #3 + 1903 05ce 24E0 b .L21 + 1904 .L131: + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config = RCC->CFGR; + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)) + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; + 1905 .loc 1 668 10 view .LVU564 + 1906 05d0 0020 movs r0, #0 + 1907 05d2 22E0 b .L21 + 1908 .L129: + 1909 .loc 1 668 10 view .LVU565 + 1910 05d4 0020 movs r0, #0 + 1911 05d6 20E0 b .L21 + ARM GAS /tmp/cc4nNFis.s page 69 + + + 1912 .L135: + 1913 .align 2 + 1914 .L134: + 1915 05d8 20819010 .word 277905696 + 1916 05dc 00100240 .word 1073876992 + 1917 05e0 00700040 .word 1073770496 + 1918 .LVL141: + 1919 .L80: + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1920 .loc 1 644 7 is_stmt 1 view .LVU566 + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1921 .loc 1 644 9 is_stmt 0 view .LVU567 + 1922 05e4 012B cmp r3, #1 + 1923 05e6 1AD0 beq .L111 + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 1924 .loc 1 651 9 is_stmt 1 view .LVU568 + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 1925 .loc 1 651 20 is_stmt 0 view .LVU569 + 1926 05e8 104B ldr r3, .L136 + 1927 05ea 5B68 ldr r3, [r3, #4] + 1928 .LVL142: + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1929 .loc 1 658 9 is_stmt 1 view .LVU570 + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1930 .loc 1 658 13 is_stmt 0 view .LVU571 + 1931 05ec 03F48031 and r1, r3, #65536 + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1932 .loc 1 658 78 view .LVU572 + 1933 05f0 226A ldr r2, [r4, #32] + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1934 .loc 1 658 11 view .LVU573 + 1935 05f2 9142 cmp r1, r2 + 1936 05f4 15D1 bne .L112 + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 1937 .loc 1 659 13 view .LVU574 + 1938 05f6 03F47013 and r3, r3, #3932160 + 1939 .LVL143: + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 1940 .loc 1 659 78 view .LVU575 + 1941 05fa 626A ldr r2, [r4, #36] + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1942 .loc 1 658 90 discriminator 1 view .LVU576 + 1943 05fc 9342 cmp r3, r2 + 1944 05fe 12D1 bne .L113 + 1945 .loc 1 668 10 view .LVU577 + 1946 0600 0020 movs r0, #0 + 1947 0602 0AE0 b .L21 + 1948 .LVL144: + 1949 .L94: + 1950 .cfi_def_cfa_offset 0 + 1951 .cfi_restore 4 + 1952 .cfi_restore 5 + 1953 .cfi_restore 6 + 1954 .cfi_restore 14 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1955 .loc 1 325 12 view .LVU578 + 1956 0604 0120 movs r0, #1 + ARM GAS /tmp/cc4nNFis.s page 70 + + + 1957 .LVL145: + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1958 .loc 1 669 1 view .LVU579 + 1959 0606 7047 bx lr + 1960 .LVL146: + 1961 .L120: + 1962 .cfi_def_cfa_offset 24 + 1963 .cfi_offset 4, -16 + 1964 .cfi_offset 5, -12 + 1965 .cfi_offset 6, -8 + 1966 .cfi_offset 14, -4 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1967 .loc 1 343 16 view .LVU580 + 1968 0608 0120 movs r0, #1 + 1969 .LVL147: + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1970 .loc 1 343 16 view .LVU581 + 1971 060a 06E0 b .L21 + 1972 .L98: + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1973 .loc 1 401 16 view .LVU582 + 1974 060c 0120 movs r0, #1 + 1975 060e 04E0 b .L21 + 1976 .LVL148: + 1977 .L105: + 1978 .LBB259: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1979 .loc 1 540 18 view .LVU583 + 1980 0610 0320 movs r0, #3 + 1981 0612 02E0 b .L21 + 1982 .L106: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1983 .loc 1 554 18 view .LVU584 + 1984 0614 0320 movs r0, #3 + 1985 0616 00E0 b .L21 + 1986 .LVL149: + 1987 .L107: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1988 .loc 1 554 18 view .LVU585 + 1989 .LBE259: + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1990 .loc 1 668 10 view .LVU586 + 1991 0618 0020 movs r0, #0 + 1992 .LVL150: + 1993 .L21: + 1994 .loc 1 669 1 view .LVU587 + 1995 061a 02B0 add sp, sp, #8 + 1996 .cfi_remember_state + 1997 .cfi_def_cfa_offset 16 + 1998 @ sp needed + 1999 061c 70BD pop {r4, r5, r6, pc} + 2000 .LVL151: + 2001 .L111: + 2002 .cfi_restore_state + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2003 .loc 1 646 16 view .LVU588 + 2004 061e 0120 movs r0, #1 + ARM GAS /tmp/cc4nNFis.s page 71 + + + 2005 0620 FBE7 b .L21 + 2006 .LVL152: + 2007 .L112: + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2008 .loc 1 662 18 view .LVU589 + 2009 0622 0120 movs r0, #1 + 2010 0624 F9E7 b .L21 + 2011 .LVL153: + 2012 .L113: + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2013 .loc 1 662 18 view .LVU590 + 2014 0626 0120 movs r0, #1 + 2015 0628 F7E7 b .L21 + 2016 .L137: + 2017 062a 00BF .align 2 + 2018 .L136: + 2019 062c 00100240 .word 1073876992 + 2020 .cfi_endproc + 2021 .LFE131: + 2023 .section .text.HAL_RCC_MCOConfig,"ax",%progbits + 2024 .align 1 + 2025 .global HAL_RCC_MCOConfig + 2026 .syntax unified + 2027 .thumb + 2028 .thumb_func + 2030 HAL_RCC_MCOConfig: + 2031 .LVL154: + 2032 .LFB133: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param FLatency FLASH Latency + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * occur when the clock source will be ready. + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * currently used as system clock source. + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ + ARM GAS /tmp/cc4nNFis.s page 72 + + + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HCLK) of the device. */ + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE ready flag */ + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the PLL ready flag */ + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + ARM GAS /tmp/cc4nNFis.s page 73 + + + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI ready flag */ + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_InitTick (uwTickPrio); + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + ARM GAS /tmp/cc4nNFis.s page 74 + + + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC clocks control functions + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Peripheral Control functions ##### + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequencies. + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + ARM GAS /tmp/cc4nNFis.s page 75 + + + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2033 .loc 1 887 1 is_stmt 1 view -0 + 2034 .cfi_startproc + 2035 @ args = 0, pretend = 0, frame = 24 + 2036 @ frame_needed = 0, uses_anonymous_args = 0 + 2037 .loc 1 887 1 is_stmt 0 view .LVU592 + 2038 0000 30B5 push {r4, r5, lr} + 2039 .cfi_def_cfa_offset 12 + 2040 .cfi_offset 4, -12 + 2041 .cfi_offset 5, -8 + 2042 .cfi_offset 14, -4 + 2043 0002 87B0 sub sp, sp, #28 + 2044 .cfi_def_cfa_offset 40 + 2045 0004 0D46 mov r5, r1 + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio; + 2046 .loc 1 888 3 is_stmt 1 view .LVU593 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); + 2047 .loc 1 891 3 view .LVU594 + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); + 2048 .loc 1 892 3 view .LVU595 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); + 2049 .loc 1 893 3 view .LVU596 + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; + 2050 .loc 1 896 3 view .LVU597 + 2051 .loc 1 896 18 is_stmt 0 view .LVU598 + 2052 0006 0223 movs r3, #2 + 2053 0008 0293 str r3, [sp, #8] + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; + 2054 .loc 1 897 3 is_stmt 1 view .LVU599 + 2055 .loc 1 897 18 is_stmt 0 view .LVU600 + 2056 000a 0323 movs r3, #3 + 2057 000c 0493 str r3, [sp, #16] + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; + 2058 .loc 1 898 3 is_stmt 1 view .LVU601 + 2059 .loc 1 898 18 is_stmt 0 view .LVU602 + 2060 000e 0023 movs r3, #0 + ARM GAS /tmp/cc4nNFis.s page 76 + + + 2061 0010 0393 str r3, [sp, #12] + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; + 2062 .loc 1 899 3 is_stmt 1 view .LVU603 + 2063 .loc 1 899 18 is_stmt 0 view .LVU604 + 2064 0012 4FF48072 mov r2, #256 + 2065 .LVL155: + 2066 .loc 1 899 18 view .LVU605 + 2067 0016 0192 str r2, [sp, #4] + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; + 2068 .loc 1 900 3 is_stmt 1 view .LVU606 + 2069 .loc 1 900 18 is_stmt 0 view .LVU607 + 2070 0018 0593 str r3, [sp, #20] + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* MCO1 Clock Enable */ + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MCO1_CLK_ENABLE(); + 2071 .loc 1 903 3 is_stmt 1 view .LVU608 + 2072 .LBB260: + 2073 .loc 1 903 3 view .LVU609 + 2074 .loc 1 903 3 view .LVU610 + 2075 001a 0B4C ldr r4, .L140 + 2076 001c 6369 ldr r3, [r4, #20] + 2077 001e 43F40033 orr r3, r3, #131072 + 2078 0022 6361 str r3, [r4, #20] + 2079 .loc 1 903 3 view .LVU611 + 2080 0024 6369 ldr r3, [r4, #20] + 2081 0026 03F40033 and r3, r3, #131072 + 2082 002a 0093 str r3, [sp] + 2083 .loc 1 903 3 view .LVU612 + 2084 002c 009B ldr r3, [sp] + 2085 .LBE260: + 2086 .loc 1 903 3 view .LVU613 + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); + 2087 .loc 1 905 3 view .LVU614 + 2088 002e 01A9 add r1, sp, #4 + 2089 .LVL156: + 2090 .loc 1 905 3 is_stmt 0 view .LVU615 + 2091 0030 4FF09040 mov r0, #1207959552 + 2092 .LVL157: + 2093 .loc 1 905 3 view .LVU616 + 2094 0034 FFF7FEFF bl HAL_GPIO_Init + 2095 .LVL158: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO clock source */ + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); + 2096 .loc 1 908 3 is_stmt 1 view .LVU617 + 2097 0038 6368 ldr r3, [r4, #4] + 2098 003a 23F0E063 bic r3, r3, #117440512 + 2099 003e 2B43 orrs r3, r3, r5 + 2100 0040 6360 str r3, [r4, #4] + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2101 .loc 1 909 1 is_stmt 0 view .LVU618 + 2102 0042 07B0 add sp, sp, #28 + 2103 .cfi_def_cfa_offset 12 + 2104 @ sp needed + 2105 0044 30BD pop {r4, r5, pc} + 2106 .LVL159: + ARM GAS /tmp/cc4nNFis.s page 77 + + + 2107 .L141: + 2108 .loc 1 909 1 view .LVU619 + 2109 0046 00BF .align 2 + 2110 .L140: + 2111 0048 00100240 .word 1073876992 + 2112 .cfi_endproc + 2113 .LFE133: + 2115 .section .text.HAL_RCC_EnableCSS,"ax",%progbits + 2116 .align 1 + 2117 .global HAL_RCC_EnableCSS + 2118 .syntax unified + 2119 .thumb + 2120 .thumb_func + 2122 HAL_RCC_EnableCSS: + 2123 .LFB134: + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Enables the Clock Security System. + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2124 .loc 1 921 1 is_stmt 1 view -0 + 2125 .cfi_startproc + 2126 @ args = 0, pretend = 0, frame = 0 + 2127 @ frame_needed = 0, uses_anonymous_args = 0 + 2128 @ link register save eliminated. + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; + 2129 .loc 1 922 3 view .LVU621 + 2130 .LVL160: + 2131 .LBB261: + 2132 .LBI261: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2133 .loc 2 981 31 view .LVU622 + 2134 .LBB262: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2135 .loc 2 983 3 view .LVU623 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2136 .loc 2 988 4 view .LVU624 + 2137 0000 4FF40023 mov r3, #524288 + 2138 .syntax unified + 2139 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2140 0004 93FAA3F3 rbit r3, r3 + 2141 @ 0 "" 2 + 2142 .LVL161: + 2143 .loc 2 1001 3 view .LVU625 + 2144 .loc 2 1001 3 is_stmt 0 view .LVU626 + 2145 .thumb + 2146 .syntax unified + 2147 .LBE262: + 2148 .LBE261: + 2149 .loc 1 922 22 discriminator 2 view .LVU627 + ARM GAS /tmp/cc4nNFis.s page 78 + + + 2150 0008 B3FA83F3 clz r3, r3 + 2151 000c 03F18453 add r3, r3, #276824064 + 2152 0010 03F58413 add r3, r3, #1081344 + 2153 0014 9B00 lsls r3, r3, #2 + 2154 .loc 1 922 38 discriminator 2 view .LVU628 + 2155 0016 0122 movs r2, #1 + 2156 0018 1A60 str r2, [r3] + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2157 .loc 1 923 1 view .LVU629 + 2158 001a 7047 bx lr + 2159 .cfi_endproc + 2160 .LFE134: + 2162 .section .text.HAL_RCC_DisableCSS,"ax",%progbits + 2163 .align 1 + 2164 .global HAL_RCC_DisableCSS + 2165 .syntax unified + 2166 .thumb + 2167 .thumb_func + 2169 HAL_RCC_DisableCSS: + 2170 .LFB135: + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Disables the Clock Security System. + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2171 .loc 1 930 1 is_stmt 1 view -0 + 2172 .cfi_startproc + 2173 @ args = 0, pretend = 0, frame = 0 + 2174 @ frame_needed = 0, uses_anonymous_args = 0 + 2175 @ link register save eliminated. + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; + 2176 .loc 1 931 3 view .LVU631 + 2177 .LVL162: + 2178 .LBB263: + 2179 .LBI263: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2180 .loc 2 981 31 view .LVU632 + 2181 .LBB264: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2182 .loc 2 983 3 view .LVU633 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2183 .loc 2 988 4 view .LVU634 + 2184 0000 4FF40023 mov r3, #524288 + 2185 .syntax unified + 2186 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2187 0004 93FAA3F3 rbit r3, r3 + 2188 @ 0 "" 2 + 2189 .LVL163: + 2190 .loc 2 1001 3 view .LVU635 + 2191 .loc 2 1001 3 is_stmt 0 view .LVU636 + 2192 .thumb + 2193 .syntax unified + 2194 .LBE264: + 2195 .LBE263: + 2196 .loc 1 931 22 discriminator 2 view .LVU637 + ARM GAS /tmp/cc4nNFis.s page 79 + + + 2197 0008 B3FA83F3 clz r3, r3 + 2198 000c 03F18453 add r3, r3, #276824064 + 2199 0010 03F58413 add r3, r3, #1081344 + 2200 0014 9B00 lsls r3, r3, #2 + 2201 .loc 1 931 38 discriminator 2 view .LVU638 + 2202 0016 0022 movs r2, #0 + 2203 0018 1A60 str r2, [r3] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2204 .loc 1 932 1 view .LVU639 + 2205 001a 7047 bx lr + 2206 .cfi_endproc + 2207 .LFE135: + 2209 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits + 2210 .align 1 + 2211 .global HAL_RCC_GetSysClockFreq + 2212 .syntax unified + 2213 .thumb + 2214 .thumb_func + 2216 HAL_RCC_GetSysClockFreq: + 2217 .LFB136: + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * constant and the selected clock source: + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor. + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * in voltage and temperature. + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * have wrong result. + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * value for HSE crystal. + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function can be used by the user application to compute the + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval SYSCLK frequency + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2218 .loc 1 964 1 is_stmt 1 view -0 + 2219 .cfi_startproc + 2220 @ args = 0, pretend = 0, frame = 0 + 2221 @ frame_needed = 0, uses_anonymous_args = 0 + 2222 @ link register save eliminated. + ARM GAS /tmp/cc4nNFis.s page 80 + + + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; + 2223 .loc 1 965 3 view .LVU641 + 2224 .LVL164: + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; + 2225 .loc 1 966 3 view .LVU642 + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tmpreg = RCC->CFGR; + 2226 .loc 1 968 3 view .LVU643 + 2227 .loc 1 968 10 is_stmt 0 view .LVU644 + 2228 0000 164B ldr r3, .L149 + 2229 0002 5B68 ldr r3, [r3, #4] + 2230 .LVL165: + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) + 2231 .loc 1 971 3 is_stmt 1 view .LVU645 + 2232 .loc 1 971 18 is_stmt 0 view .LVU646 + 2233 0004 03F00C02 and r2, r3, #12 + 2234 .loc 1 971 3 view .LVU647 + 2235 0008 082A cmp r2, #8 + 2236 000a 01D0 beq .L148 + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; + 2237 .loc 1 975 20 view .LVU648 + 2238 000c 1448 ldr r0, .L149+4 + 2239 .LVL166: + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLL + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFG + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC_HSE_PREDIV) == RCC_CFGR_PLLSRC_HSE_PREDIV) + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ + ARM GAS /tmp/cc4nNFis.s page 81 + + +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = pllclk; +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** default: /* HSI used as system clock */ +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return sysclockfreq; + 2240 .loc 1 1015 3 is_stmt 1 view .LVU649 +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2241 .loc 1 1016 1 is_stmt 0 view .LVU650 + 2242 000e 7047 bx lr + 2243 .LVL167: + 2244 .L148: + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFG + 2245 .loc 1 980 7 is_stmt 1 view .LVU651 + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFG + 2246 .loc 1 980 35 is_stmt 0 view .LVU652 + 2247 0010 03F47011 and r1, r3, #3932160 + 2248 .LVL168: + 2249 .LBB265: + 2250 .LBI265: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2251 .loc 2 981 31 is_stmt 1 view .LVU653 + 2252 .LBB266: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2253 .loc 2 983 3 view .LVU654 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2254 .loc 2 988 4 view .LVU655 + 2255 0014 4FF47012 mov r2, #3932160 + 2256 .syntax unified + 2257 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2258 0018 92FAA2F2 rbit r2, r2 + 2259 @ 0 "" 2 + 2260 .LVL169: + 2261 .loc 2 1001 3 view .LVU656 + 2262 .loc 2 1001 3 is_stmt 0 view .LVU657 + 2263 .thumb + 2264 .syntax unified + 2265 .LBE266: + 2266 .LBE265: + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFG + 2267 .loc 1 980 72 discriminator 2 view .LVU658 + 2268 001c B2FA82F2 clz r2, r2 + 2269 0020 21FA02F2 lsr r2, r1, r2 + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFG + 2270 .loc 1 980 34 discriminator 2 view .LVU659 + 2271 0024 0F49 ldr r1, .L149+8 + 2272 0026 885C ldrb r0, [r1, r2] @ zero_extendqisi2 + 2273 .LVL170: + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2274 .loc 1 981 7 is_stmt 1 view .LVU660 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2275 .loc 1 981 49 is_stmt 0 view .LVU661 + ARM GAS /tmp/cc4nNFis.s page 82 + + + 2276 0028 0C4A ldr r2, .L149 + 2277 002a D26A ldr r2, [r2, #44] + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2278 .loc 1 981 35 view .LVU662 + 2279 002c 02F00F02 and r2, r2, #15 + 2280 .LVL171: + 2281 .LBB267: + 2282 .LBI267: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2283 .loc 2 981 31 is_stmt 1 view .LVU663 + 2284 .LBB268: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2285 .loc 2 983 3 view .LVU664 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2286 .loc 2 988 4 view .LVU665 + 2287 0030 0F21 movs r1, #15 + 2288 .syntax unified + 2289 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2290 0032 91FAA1F1 rbit r1, r1 + 2291 @ 0 "" 2 + 2292 .LVL172: + 2293 .loc 2 1001 3 view .LVU666 + 2294 .loc 2 1001 3 is_stmt 0 view .LVU667 + 2295 .thumb + 2296 .syntax unified + 2297 .LBE268: + 2298 .LBE267: + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2299 .loc 1 981 77 discriminator 2 view .LVU668 + 2300 0036 B1FA81F1 clz r1, r1 + 2301 003a CA40 lsrs r2, r2, r1 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2302 .loc 1 981 34 discriminator 2 view .LVU669 + 2303 003c 0A49 ldr r1, .L149+12 + 2304 003e 8A5C ldrb r2, [r1, r2] @ zero_extendqisi2 + 2305 .LVL173: + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2306 .loc 1 983 7 is_stmt 1 view .LVU670 + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2307 .loc 1 983 10 is_stmt 0 view .LVU671 + 2308 0040 13F4803F tst r3, #65536 + 2309 0044 05D0 beq .L146 + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2310 .loc 1 986 9 is_stmt 1 view .LVU672 + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2311 .loc 1 986 18 is_stmt 0 view .LVU673 + 2312 0046 064B ldr r3, .L149+4 + 2313 .LVL174: + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2314 .loc 1 986 18 view .LVU674 + 2315 0048 B3FBF2F3 udiv r3, r3, r2 + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2316 .loc 1 986 16 view .LVU675 + 2317 004c 03FB00F0 mul r0, r3, r0 + 2318 .LVL175: + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2319 .loc 1 986 16 view .LVU676 + ARM GAS /tmp/cc4nNFis.s page 83 + + + 2320 0050 7047 bx lr + 2321 .LVL176: + 2322 .L146: + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2323 .loc 1 991 9 is_stmt 1 view .LVU677 + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2324 .loc 1 991 16 is_stmt 0 view .LVU678 + 2325 0052 064B ldr r3, .L149+16 + 2326 .LVL177: + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2327 .loc 1 991 16 view .LVU679 + 2328 0054 03FB00F0 mul r0, r3, r0 + 2329 .LVL178: + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2330 .loc 1 991 16 view .LVU680 + 2331 0058 7047 bx lr + 2332 .L150: + 2333 005a 00BF .align 2 + 2334 .L149: + 2335 005c 00100240 .word 1073876992 + 2336 0060 00127A00 .word 8000000 + 2337 0064 00000000 .word aPLLMULFactorTable + 2338 0068 00000000 .word aPredivFactorTable + 2339 006c 00093D00 .word 4000000 + 2340 .cfi_endproc + 2341 .LFE136: + 2343 .section .text.HAL_RCC_ClockConfig,"ax",%progbits + 2344 .align 1 + 2345 .global HAL_RCC_ClockConfig + 2346 .syntax unified + 2347 .thumb + 2348 .thumb_func + 2350 HAL_RCC_ClockConfig: + 2351 .LVL179: + 2352 .LFB132: + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; + 2353 .loc 1 695 1 is_stmt 1 view -0 + 2354 .cfi_startproc + 2355 @ args = 0, pretend = 0, frame = 0 + 2356 @ frame_needed = 0, uses_anonymous_args = 0 + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2357 .loc 1 696 3 view .LVU682 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2358 .loc 1 699 3 view .LVU683 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2359 .loc 1 699 5 is_stmt 0 view .LVU684 + 2360 0000 0028 cmp r0, #0 + 2361 0002 00F0BE80 beq .L170 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; + 2362 .loc 1 695 1 view .LVU685 + 2363 0006 70B5 push {r4, r5, r6, lr} + 2364 .cfi_def_cfa_offset 16 + 2365 .cfi_offset 4, -16 + 2366 .cfi_offset 5, -12 + 2367 .cfi_offset 6, -8 + 2368 .cfi_offset 14, -4 + 2369 0008 0D46 mov r5, r1 + ARM GAS /tmp/cc4nNFis.s page 84 + + + 2370 000a 0446 mov r4, r0 + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 2371 .loc 1 705 3 is_stmt 1 view .LVU686 + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2372 .loc 1 706 3 view .LVU687 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2373 .loc 1 713 3 view .LVU688 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2374 .loc 1 713 17 is_stmt 0 view .LVU689 + 2375 000c 614B ldr r3, .L183 + 2376 000e 1B68 ldr r3, [r3] + 2377 0010 03F00703 and r3, r3, #7 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2378 .loc 1 713 5 view .LVU690 + 2379 0014 8B42 cmp r3, r1 + 2380 0016 0BD2 bcs .L153 + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2381 .loc 1 716 5 is_stmt 1 view .LVU691 + 2382 0018 5E4A ldr r2, .L183 + 2383 001a 1368 ldr r3, [r2] + 2384 001c 23F00703 bic r3, r3, #7 + 2385 0020 0B43 orrs r3, r3, r1 + 2386 0022 1360 str r3, [r2] + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2387 .loc 1 720 5 view .LVU692 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2388 .loc 1 720 8 is_stmt 0 view .LVU693 + 2389 0024 1368 ldr r3, [r2] + 2390 0026 03F00703 and r3, r3, #7 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2391 .loc 1 720 7 view .LVU694 + 2392 002a 8B42 cmp r3, r1 + 2393 002c 40F0AB80 bne .L171 + 2394 .L153: + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2395 .loc 1 727 3 is_stmt 1 view .LVU695 + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2396 .loc 1 727 25 is_stmt 0 view .LVU696 + 2397 0030 2368 ldr r3, [r4] + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2398 .loc 1 727 5 view .LVU697 + 2399 0032 13F0020F tst r3, #2 + 2400 0036 06D0 beq .L154 + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 2401 .loc 1 729 5 is_stmt 1 view .LVU698 + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2402 .loc 1 730 5 view .LVU699 + 2403 0038 574A ldr r2, .L183+4 + 2404 003a 5368 ldr r3, [r2, #4] + 2405 003c 23F0F003 bic r3, r3, #240 + 2406 0040 A168 ldr r1, [r4, #8] + 2407 .LVL180: + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2408 .loc 1 730 5 is_stmt 0 view .LVU700 + 2409 0042 0B43 orrs r3, r3, r1 + 2410 0044 5360 str r3, [r2, #4] + 2411 .L154: + ARM GAS /tmp/cc4nNFis.s page 85 + + + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2412 .loc 1 734 3 is_stmt 1 view .LVU701 + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2413 .loc 1 734 25 is_stmt 0 view .LVU702 + 2414 0046 2368 ldr r3, [r4] + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2415 .loc 1 734 5 view .LVU703 + 2416 0048 13F0010F tst r3, #1 + 2417 004c 5AD0 beq .L155 + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2418 .loc 1 736 5 is_stmt 1 view .LVU704 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2419 .loc 1 739 5 view .LVU705 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2420 .loc 1 739 25 is_stmt 0 view .LVU706 + 2421 004e 6368 ldr r3, [r4, #4] + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2422 .loc 1 739 7 view .LVU707 + 2423 0050 012B cmp r3, #1 + 2424 0052 2DD0 beq .L181 + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2425 .loc 1 748 10 is_stmt 1 view .LVU708 + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2426 .loc 1 748 12 is_stmt 0 view .LVU709 + 2427 0054 022B cmp r3, #2 + 2428 0056 40D0 beq .L182 + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2429 .loc 1 760 7 is_stmt 1 view .LVU710 + 2430 .LVL181: + 2431 .LBB269: + 2432 .LBI269: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2433 .loc 2 981 31 view .LVU711 + 2434 .LBB270: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2435 .loc 2 983 3 view .LVU712 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2436 .loc 2 988 4 view .LVU713 + 2437 0058 0222 movs r2, #2 + 2438 .syntax unified + 2439 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2440 005a 92FAA2F2 rbit r2, r2 + 2441 @ 0 "" 2 + 2442 .loc 2 1001 3 view .LVU714 + 2443 .LVL182: + 2444 .loc 2 1001 3 is_stmt 0 view .LVU715 + 2445 .thumb + 2446 .syntax unified + 2447 .LBE270: + 2448 .LBE269: + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2449 .loc 1 760 10 discriminator 1 view .LVU716 + 2450 005e 4E4A ldr r2, .L183+4 + 2451 0060 1068 ldr r0, [r2] + 2452 .LVL183: + 2453 .LBB271: + 2454 .LBI271: + ARM GAS /tmp/cc4nNFis.s page 86 + + + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2455 .loc 2 981 31 is_stmt 1 view .LVU717 + 2456 .LBB272: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2457 .loc 2 983 3 view .LVU718 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2458 .loc 2 988 4 view .LVU719 + 2459 0062 0222 movs r2, #2 + 2460 .syntax unified + 2461 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2462 0064 92FAA2F2 rbit r2, r2 + 2463 @ 0 "" 2 + 2464 .LVL184: + 2465 .loc 2 1001 3 view .LVU720 + 2466 .loc 2 1001 3 is_stmt 0 view .LVU721 + 2467 .thumb + 2468 .syntax unified + 2469 .LBE272: + 2470 .LBE271: + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2471 .loc 1 760 10 discriminator 2 view .LVU722 + 2472 0068 B2FA82F2 clz r2, r2 + 2473 006c 02F01F02 and r2, r2, #31 + 2474 0070 0121 movs r1, #1 + 2475 0072 01FA02F2 lsl r2, r1, r2 + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2476 .loc 1 760 9 discriminator 2 view .LVU723 + 2477 0076 1042 tst r0, r2 + 2478 0078 00F08780 beq .L174 + 2479 .L159: + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2480 .loc 1 766 5 is_stmt 1 view .LVU724 + 2481 007c 4649 ldr r1, .L183+4 + 2482 007e 4A68 ldr r2, [r1, #4] + 2483 0080 22F00302 bic r2, r2, #3 + 2484 0084 1343 orrs r3, r3, r2 + 2485 0086 4B60 str r3, [r1, #4] + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2486 .loc 1 769 5 view .LVU725 + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2487 .loc 1 769 17 is_stmt 0 view .LVU726 + 2488 0088 FFF7FEFF bl HAL_GetTick + 2489 .LVL185: + 2490 008c 0646 mov r6, r0 + 2491 .LVL186: + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2492 .loc 1 771 5 is_stmt 1 view .LVU727 + 2493 .L165: + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2494 .loc 1 771 42 view .LVU728 + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2495 .loc 1 771 12 is_stmt 0 view .LVU729 + 2496 008e 424B ldr r3, .L183+4 + 2497 0090 5B68 ldr r3, [r3, #4] + 2498 0092 03F00C03 and r3, r3, #12 + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2499 .loc 1 771 63 view .LVU730 + ARM GAS /tmp/cc4nNFis.s page 87 + + + 2500 0096 6268 ldr r2, [r4, #4] + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2501 .loc 1 771 42 view .LVU731 + 2502 0098 B3EB820F cmp r3, r2, lsl #2 + 2503 009c 32D0 beq .L155 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2504 .loc 1 773 7 is_stmt 1 view .LVU732 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2505 .loc 1 773 12 is_stmt 0 view .LVU733 + 2506 009e FFF7FEFF bl HAL_GetTick + 2507 .LVL187: + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2508 .loc 1 773 26 discriminator 1 view .LVU734 + 2509 00a2 801B subs r0, r0, r6 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2510 .loc 1 773 10 discriminator 1 view .LVU735 + 2511 00a4 41F28833 movw r3, #5000 + 2512 00a8 9842 cmp r0, r3 + 2513 00aa F0D9 bls .L165 + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2514 .loc 1 775 16 view .LVU736 + 2515 00ac 0320 movs r0, #3 + 2516 00ae 67E0 b .L152 + 2517 .LVL188: + 2518 .L181: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2519 .loc 1 742 7 is_stmt 1 view .LVU737 + 2520 .LBB273: + 2521 .LBI273: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2522 .loc 2 981 31 view .LVU738 + 2523 .LBB274: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2524 .loc 2 983 3 view .LVU739 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2525 .loc 2 988 4 view .LVU740 + 2526 00b0 4FF40032 mov r2, #131072 + 2527 .syntax unified + 2528 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2529 00b4 92FAA2F2 rbit r2, r2 + 2530 @ 0 "" 2 + 2531 .loc 2 1001 3 view .LVU741 + 2532 .LVL189: + 2533 .loc 2 1001 3 is_stmt 0 view .LVU742 + 2534 .thumb + 2535 .syntax unified + 2536 .LBE274: + 2537 .LBE273: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2538 .loc 1 742 10 discriminator 1 view .LVU743 + 2539 00b8 374A ldr r2, .L183+4 + 2540 00ba 1068 ldr r0, [r2] + 2541 .LVL190: + 2542 .LBB275: + 2543 .LBI275: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2544 .loc 2 981 31 is_stmt 1 view .LVU744 + ARM GAS /tmp/cc4nNFis.s page 88 + + + 2545 .LBB276: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2546 .loc 2 983 3 view .LVU745 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2547 .loc 2 988 4 view .LVU746 + 2548 00bc 4FF40032 mov r2, #131072 + 2549 .syntax unified + 2550 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2551 00c0 92FAA2F2 rbit r2, r2 + 2552 @ 0 "" 2 + 2553 .LVL191: + 2554 .loc 2 1001 3 view .LVU747 + 2555 .loc 2 1001 3 is_stmt 0 view .LVU748 + 2556 .thumb + 2557 .syntax unified + 2558 .LBE276: + 2559 .LBE275: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2560 .loc 1 742 10 discriminator 2 view .LVU749 + 2561 00c4 B2FA82F2 clz r2, r2 + 2562 00c8 02F01F02 and r2, r2, #31 + 2563 00cc 0121 movs r1, #1 + 2564 00ce 01FA02F2 lsl r2, r1, r2 + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2565 .loc 1 742 9 discriminator 2 view .LVU750 + 2566 00d2 0242 tst r2, r0 + 2567 00d4 D2D1 bne .L159 + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2568 .loc 1 744 16 view .LVU751 + 2569 00d6 0120 movs r0, #1 + 2570 00d8 52E0 b .L152 + 2571 .LVL192: + 2572 .L182: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2573 .loc 1 751 7 is_stmt 1 view .LVU752 + 2574 .LBB277: + 2575 .LBI277: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2576 .loc 2 981 31 view .LVU753 + 2577 .LBB278: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2578 .loc 2 983 3 view .LVU754 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2579 .loc 2 988 4 view .LVU755 + 2580 00da 4FF00072 mov r2, #33554432 + 2581 .syntax unified + 2582 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2583 00de 92FAA2F2 rbit r2, r2 + 2584 @ 0 "" 2 + 2585 .loc 2 1001 3 view .LVU756 + 2586 .LVL193: + 2587 .loc 2 1001 3 is_stmt 0 view .LVU757 + 2588 .thumb + 2589 .syntax unified + 2590 .LBE278: + 2591 .LBE277: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/cc4nNFis.s page 89 + + + 2592 .loc 1 751 10 discriminator 1 view .LVU758 + 2593 00e2 2D4A ldr r2, .L183+4 + 2594 00e4 1068 ldr r0, [r2] + 2595 .LVL194: + 2596 .LBB279: + 2597 .LBI279: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2598 .loc 2 981 31 is_stmt 1 view .LVU759 + 2599 .LBB280: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2600 .loc 2 983 3 view .LVU760 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2601 .loc 2 988 4 view .LVU761 + 2602 00e6 4FF00072 mov r2, #33554432 + 2603 .syntax unified + 2604 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2605 00ea 92FAA2F2 rbit r2, r2 + 2606 @ 0 "" 2 + 2607 .LVL195: + 2608 .loc 2 1001 3 view .LVU762 + 2609 .loc 2 1001 3 is_stmt 0 view .LVU763 + 2610 .thumb + 2611 .syntax unified + 2612 .LBE280: + 2613 .LBE279: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2614 .loc 1 751 10 discriminator 2 view .LVU764 + 2615 00ee B2FA82F2 clz r2, r2 + 2616 00f2 02F01F02 and r2, r2, #31 + 2617 00f6 0121 movs r1, #1 + 2618 00f8 01FA02F2 lsl r2, r1, r2 + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2619 .loc 1 751 9 discriminator 2 view .LVU765 + 2620 00fc 1042 tst r0, r2 + 2621 00fe BDD1 bne .L159 + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2622 .loc 1 753 16 view .LVU766 + 2623 0100 0120 movs r0, #1 + 2624 0102 3DE0 b .L152 + 2625 .LVL196: + 2626 .L155: + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2627 .loc 1 780 3 is_stmt 1 view .LVU767 + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2628 .loc 1 780 17 is_stmt 0 view .LVU768 + 2629 0104 234B ldr r3, .L183 + 2630 0106 1B68 ldr r3, [r3] + 2631 0108 03F00703 and r3, r3, #7 + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2632 .loc 1 780 5 view .LVU769 + 2633 010c AB42 cmp r3, r5 + 2634 010e 0AD9 bls .L167 + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2635 .loc 1 783 5 is_stmt 1 view .LVU770 + 2636 0110 204A ldr r2, .L183 + 2637 0112 1368 ldr r3, [r2] + 2638 0114 23F00703 bic r3, r3, #7 + ARM GAS /tmp/cc4nNFis.s page 90 + + + 2639 0118 2B43 orrs r3, r3, r5 + 2640 011a 1360 str r3, [r2] + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2641 .loc 1 787 5 view .LVU771 + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2642 .loc 1 787 8 is_stmt 0 view .LVU772 + 2643 011c 1368 ldr r3, [r2] + 2644 011e 03F00703 and r3, r3, #7 + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2645 .loc 1 787 7 view .LVU773 + 2646 0122 AB42 cmp r3, r5 + 2647 0124 33D1 bne .L176 + 2648 .L167: + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2649 .loc 1 794 3 is_stmt 1 view .LVU774 + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2650 .loc 1 794 25 is_stmt 0 view .LVU775 + 2651 0126 2368 ldr r3, [r4] + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2652 .loc 1 794 5 view .LVU776 + 2653 0128 13F0040F tst r3, #4 + 2654 012c 06D0 beq .L168 + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); + 2655 .loc 1 796 5 is_stmt 1 view .LVU777 + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2656 .loc 1 797 5 view .LVU778 + 2657 012e 1A4A ldr r2, .L183+4 + 2658 0130 5368 ldr r3, [r2, #4] + 2659 0132 23F4E063 bic r3, r3, #1792 + 2660 0136 E168 ldr r1, [r4, #12] + 2661 0138 0B43 orrs r3, r3, r1 + 2662 013a 5360 str r3, [r2, #4] + 2663 .L168: + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2664 .loc 1 801 3 view .LVU779 + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2665 .loc 1 801 25 is_stmt 0 view .LVU780 + 2666 013c 2368 ldr r3, [r4] + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2667 .loc 1 801 5 view .LVU781 + 2668 013e 13F0080F tst r3, #8 + 2669 0142 07D0 beq .L169 + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); + 2670 .loc 1 803 5 is_stmt 1 view .LVU782 + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2671 .loc 1 804 5 view .LVU783 + 2672 0144 144A ldr r2, .L183+4 + 2673 0146 5368 ldr r3, [r2, #4] + 2674 0148 23F46053 bic r3, r3, #14336 + 2675 014c 2169 ldr r1, [r4, #16] + 2676 014e 43EAC103 orr r3, r3, r1, lsl #3 + 2677 0152 5360 str r3, [r2, #4] + 2678 .L169: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2679 .loc 1 808 3 view .LVU784 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2680 .loc 1 808 21 is_stmt 0 view .LVU785 + ARM GAS /tmp/cc4nNFis.s page 91 + + + 2681 0154 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 2682 .LVL197: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2683 .loc 1 808 68 discriminator 1 view .LVU786 + 2684 0158 0F4B ldr r3, .L183+4 + 2685 015a 5B68 ldr r3, [r3, #4] + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2686 .loc 1 808 75 discriminator 1 view .LVU787 + 2687 015c 03F0F003 and r3, r3, #240 + 2688 .LVL198: + 2689 .LBB281: + 2690 .LBI281: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2691 .loc 2 981 31 is_stmt 1 view .LVU788 + 2692 .LBB282: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2693 .loc 2 983 3 view .LVU789 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2694 .loc 2 988 4 view .LVU790 + 2695 0160 F022 movs r2, #240 + 2696 .syntax unified + 2697 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2698 0162 92FAA2F2 rbit r2, r2 + 2699 @ 0 "" 2 + 2700 .LVL199: + 2701 .loc 2 1001 3 view .LVU791 + 2702 .loc 2 1001 3 is_stmt 0 view .LVU792 + 2703 .thumb + 2704 .syntax unified + 2705 .LBE282: + 2706 .LBE281: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2707 .loc 1 808 91 discriminator 3 view .LVU793 + 2708 0166 B2FA82F2 clz r2, r2 + 2709 016a D340 lsrs r3, r3, r2 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2710 .loc 1 808 63 discriminator 3 view .LVU794 + 2711 016c 0B4A ldr r2, .L183+8 + 2712 016e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2713 .loc 1 808 47 discriminator 3 view .LVU795 + 2714 0170 D840 lsrs r0, r0, r3 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2715 .loc 1 808 19 discriminator 3 view .LVU796 + 2716 0172 0B4B ldr r3, .L183+12 + 2717 0174 1860 str r0, [r3] + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2718 .loc 1 811 3 is_stmt 1 view .LVU797 + 2719 0176 0B4B ldr r3, .L183+16 + 2720 0178 1868 ldr r0, [r3] + 2721 017a FFF7FEFF bl HAL_InitTick + 2722 .LVL200: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2723 .loc 1 813 3 view .LVU798 + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2724 .loc 1 813 10 is_stmt 0 view .LVU799 + 2725 017e 0020 movs r0, #0 + ARM GAS /tmp/cc4nNFis.s page 92 + + + 2726 .L152: + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2727 .loc 1 814 1 view .LVU800 + 2728 0180 70BD pop {r4, r5, r6, pc} + 2729 .LVL201: + 2730 .L170: + 2731 .cfi_def_cfa_offset 0 + 2732 .cfi_restore 4 + 2733 .cfi_restore 5 + 2734 .cfi_restore 6 + 2735 .cfi_restore 14 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2736 .loc 1 701 12 view .LVU801 + 2737 0182 0120 movs r0, #1 + 2738 .LVL202: + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2739 .loc 1 814 1 view .LVU802 + 2740 0184 7047 bx lr + 2741 .LVL203: + 2742 .L171: + 2743 .cfi_def_cfa_offset 16 + 2744 .cfi_offset 4, -16 + 2745 .cfi_offset 5, -12 + 2746 .cfi_offset 6, -8 + 2747 .cfi_offset 14, -4 + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2748 .loc 1 722 14 view .LVU803 + 2749 0186 0120 movs r0, #1 + 2750 .LVL204: + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2751 .loc 1 722 14 view .LVU804 + 2752 0188 FAE7 b .L152 + 2753 .LVL205: + 2754 .L174: + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2755 .loc 1 762 16 view .LVU805 + 2756 018a 0120 movs r0, #1 + 2757 018c F8E7 b .L152 + 2758 .LVL206: + 2759 .L176: + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2760 .loc 1 789 14 view .LVU806 + 2761 018e 0120 movs r0, #1 + 2762 0190 F6E7 b .L152 + 2763 .L184: + 2764 0192 00BF .align 2 + 2765 .L183: + 2766 0194 00200240 .word 1073881088 + 2767 0198 00100240 .word 1073876992 + 2768 019c 00000000 .word AHBPrescTable + 2769 01a0 00000000 .word SystemCoreClock + 2770 01a4 00000000 .word uwTickPrio + 2771 .cfi_endproc + 2772 .LFE132: + 2774 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits + 2775 .align 1 + 2776 .global HAL_RCC_GetHCLKFreq + ARM GAS /tmp/cc4nNFis.s page 93 + + + 2777 .syntax unified + 2778 .thumb + 2779 .thumb_func + 2781 HAL_RCC_GetHCLKFreq: + 2782 .LFB137: +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the HCLK frequency +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated within this function +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HCLK frequency +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2783 .loc 1 1028 1 is_stmt 1 view -0 + 2784 .cfi_startproc + 2785 @ args = 0, pretend = 0, frame = 0 + 2786 @ frame_needed = 0, uses_anonymous_args = 0 + 2787 @ link register save eliminated. +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return SystemCoreClock; + 2788 .loc 1 1029 3 view .LVU808 +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2789 .loc 1 1030 1 is_stmt 0 view .LVU809 + 2790 0000 014B ldr r3, .L186 + 2791 0002 1868 ldr r0, [r3] + 2792 0004 7047 bx lr + 2793 .L187: + 2794 0006 00BF .align 2 + 2795 .L186: + 2796 0008 00000000 .word SystemCoreClock + 2797 .cfi_endproc + 2798 .LFE137: + 2800 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits + 2801 .align 1 + 2802 .global HAL_RCC_GetPCLK1Freq + 2803 .syntax unified + 2804 .thumb + 2805 .thumb_func + 2807 HAL_RCC_GetPCLK1Freq: + 2808 .LFB138: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK1 frequency +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2809 .loc 1 1039 1 is_stmt 1 view -0 + 2810 .cfi_startproc + 2811 @ args = 0, pretend = 0, frame = 0 + 2812 @ frame_needed = 0, uses_anonymous_args = 0 + 2813 0000 08B5 push {r3, lr} + ARM GAS /tmp/cc4nNFis.s page 94 + + + 2814 .cfi_def_cfa_offset 8 + 2815 .cfi_offset 3, -8 + 2816 .cfi_offset 14, -4 +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BIT + 2817 .loc 1 1041 3 view .LVU811 + 2818 .loc 1 1041 11 is_stmt 0 view .LVU812 + 2819 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 2820 .LVL207: + 2821 .loc 1 1041 54 discriminator 1 view .LVU813 + 2822 0006 074B ldr r3, .L190 + 2823 0008 5B68 ldr r3, [r3, #4] + 2824 .loc 1 1041 61 discriminator 1 view .LVU814 + 2825 000a 03F4E063 and r3, r3, #1792 + 2826 .LVL208: + 2827 .LBB283: + 2828 .LBI283: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2829 .loc 2 981 31 is_stmt 1 view .LVU815 + 2830 .LBB284: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2831 .loc 2 983 3 view .LVU816 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2832 .loc 2 988 4 view .LVU817 + 2833 000e 4FF4E062 mov r2, #1792 + 2834 .syntax unified + 2835 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2836 0012 92FAA2F2 rbit r2, r2 + 2837 @ 0 "" 2 + 2838 .LVL209: + 2839 .loc 2 1001 3 view .LVU818 + 2840 .loc 2 1001 3 is_stmt 0 view .LVU819 + 2841 .thumb + 2842 .syntax unified + 2843 .LBE284: + 2844 .LBE283: + 2845 .loc 1 1041 79 discriminator 3 view .LVU820 + 2846 0016 B2FA82F2 clz r2, r2 + 2847 001a D340 lsrs r3, r3, r2 + 2848 .loc 1 1041 49 discriminator 3 view .LVU821 + 2849 001c 024A ldr r2, .L190+4 + 2850 001e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2851 .loc 1 1042 1 view .LVU822 + 2852 0020 D840 lsrs r0, r0, r3 + 2853 0022 08BD pop {r3, pc} + 2854 .L191: + 2855 .align 2 + 2856 .L190: + 2857 0024 00100240 .word 1073876992 + 2858 0028 00000000 .word APBPrescTable + 2859 .cfi_endproc + 2860 .LFE138: + 2862 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits + 2863 .align 1 + 2864 .global HAL_RCC_GetPCLK2Freq + 2865 .syntax unified + ARM GAS /tmp/cc4nNFis.s page 95 + + + 2866 .thumb + 2867 .thumb_func + 2869 HAL_RCC_GetPCLK2Freq: + 2870 .LFB139: +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK2 frequency +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2871 .loc 1 1051 1 is_stmt 1 view -0 + 2872 .cfi_startproc + 2873 @ args = 0, pretend = 0, frame = 0 + 2874 @ frame_needed = 0, uses_anonymous_args = 0 + 2875 0000 08B5 push {r3, lr} + 2876 .cfi_def_cfa_offset 8 + 2877 .cfi_offset 3, -8 + 2878 .cfi_offset 14, -4 +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITN + 2879 .loc 1 1053 3 view .LVU824 + 2880 .loc 1 1053 11 is_stmt 0 view .LVU825 + 2881 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 2882 .LVL210: + 2883 .loc 1 1053 53 discriminator 1 view .LVU826 + 2884 0006 074B ldr r3, .L194 + 2885 0008 5B68 ldr r3, [r3, #4] + 2886 .loc 1 1053 60 discriminator 1 view .LVU827 + 2887 000a 03F46053 and r3, r3, #14336 + 2888 .LVL211: + 2889 .LBB285: + 2890 .LBI285: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2891 .loc 2 981 31 is_stmt 1 view .LVU828 + 2892 .LBB286: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2893 .loc 2 983 3 view .LVU829 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2894 .loc 2 988 4 view .LVU830 + 2895 000e 4FF46052 mov r2, #14336 + 2896 .syntax unified + 2897 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2898 0012 92FAA2F2 rbit r2, r2 + 2899 @ 0 "" 2 + 2900 .LVL212: + 2901 .loc 2 1001 3 view .LVU831 + 2902 .loc 2 1001 3 is_stmt 0 view .LVU832 + 2903 .thumb + 2904 .syntax unified + 2905 .LBE286: + 2906 .LBE285: + 2907 .loc 1 1053 78 discriminator 3 view .LVU833 + 2908 0016 B2FA82F2 clz r2, r2 + 2909 001a D340 lsrs r3, r3, r2 + ARM GAS /tmp/cc4nNFis.s page 96 + + + 2910 .loc 1 1053 48 discriminator 3 view .LVU834 + 2911 001c 024A ldr r2, .L194+4 + 2912 001e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2913 .loc 1 1054 1 view .LVU835 + 2914 0020 D840 lsrs r0, r0, r3 + 2915 0022 08BD pop {r3, pc} + 2916 .L195: + 2917 .align 2 + 2918 .L194: + 2919 0024 00100240 .word 1073876992 + 2920 0028 00000000 .word APBPrescTable + 2921 .cfi_endproc + 2922 .LFE139: + 2924 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits + 2925 .align 1 + 2926 .global HAL_RCC_GetOscConfig + 2927 .syntax unified + 2928 .thumb + 2929 .thumb_func + 2931 HAL_RCC_GetOscConfig: + 2932 .LVL213: + 2933 .LFB140: +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * will be configured. +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2934 .loc 1 1064 1 is_stmt 1 view -0 + 2935 .cfi_startproc + 2936 @ args = 0, pretend = 0, frame = 0 + 2937 @ frame_needed = 0, uses_anonymous_args = 0 + 2938 @ link register save eliminated. +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); + 2939 .loc 1 1066 3 view .LVU837 +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ + 2940 .loc 1 1069 3 view .LVU838 + 2941 .loc 1 1069 37 is_stmt 0 view .LVU839 + 2942 0000 0F23 movs r3, #15 + 2943 0002 0360 str r3, [r0] +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) + 2944 .loc 1 1074 3 is_stmt 1 view .LVU840 + 2945 .loc 1 1074 10 is_stmt 0 view .LVU841 + 2946 0004 2D4B ldr r3, .L209 + 2947 0006 1B68 ldr r3, [r3] + ARM GAS /tmp/cc4nNFis.s page 97 + + + 2948 .loc 1 1074 5 view .LVU842 + 2949 0008 13F4802F tst r3, #262144 + 2950 000c 36D0 beq .L197 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; + 2951 .loc 1 1076 5 is_stmt 1 view .LVU843 + 2952 .loc 1 1076 33 is_stmt 0 view .LVU844 + 2953 000e 4FF4A023 mov r3, #327680 + 2954 0012 4360 str r3, [r0, #4] + 2955 .L198: +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEPredivValue = __HAL_RCC_HSE_GET_PREDIV(); + 2956 .loc 1 1087 3 is_stmt 1 view .LVU845 + 2957 .loc 1 1087 39 is_stmt 0 view .LVU846 + 2958 0014 294A ldr r2, .L209 + 2959 0016 D36A ldr r3, [r2, #44] + 2960 0018 03F00F03 and r3, r3, #15 + 2961 .loc 1 1087 37 view .LVU847 + 2962 001c 8360 str r3, [r0, #8] +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) + 2963 .loc 1 1091 3 is_stmt 1 view .LVU848 + 2964 .loc 1 1091 10 is_stmt 0 view .LVU849 + 2965 001e 1368 ldr r3, [r2] + 2966 .loc 1 1091 5 view .LVU850 + 2967 0020 13F0010F tst r3, #1 + 2968 0024 36D0 beq .L200 +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; + 2969 .loc 1 1093 5 is_stmt 1 view .LVU851 + 2970 .loc 1 1093 33 is_stmt 0 view .LVU852 + 2971 0026 0123 movs r3, #1 + 2972 0028 0361 str r3, [r0, #16] + 2973 .L201: +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> POSITION_VAL(RC + 2974 .loc 1 1100 3 is_stmt 1 view .LVU853 + 2975 .loc 1 1100 59 is_stmt 0 view .LVU854 + 2976 002a 2449 ldr r1, .L209 + 2977 002c 0B68 ldr r3, [r1] + 2978 .loc 1 1100 64 view .LVU855 + ARM GAS /tmp/cc4nNFis.s page 98 + + + 2979 002e 03F0F803 and r3, r3, #248 + 2980 .LVL214: + 2981 .LBB287: + 2982 .LBI287: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2983 .loc 2 981 31 is_stmt 1 view .LVU856 + 2984 .LBB288: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2985 .loc 2 983 3 view .LVU857 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2986 .loc 2 988 4 view .LVU858 + 2987 0032 F822 movs r2, #248 + 2988 .syntax unified + 2989 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2990 0034 92FAA2F2 rbit r2, r2 + 2991 @ 0 "" 2 + 2992 .LVL215: + 2993 .loc 2 1001 3 view .LVU859 + 2994 .loc 2 1001 3 is_stmt 0 view .LVU860 + 2995 .thumb + 2996 .syntax unified + 2997 .LBE288: + 2998 .LBE287: + 2999 .loc 1 1100 44 discriminator 2 view .LVU861 + 3000 0038 B2FA82F2 clz r2, r2 + 3001 003c D340 lsrs r3, r3, r2 + 3002 .loc 1 1100 42 discriminator 2 view .LVU862 + 3003 003e 4361 str r3, [r0, #20] +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) + 3004 .loc 1 1103 3 is_stmt 1 view .LVU863 + 3005 .loc 1 1103 10 is_stmt 0 view .LVU864 + 3006 0040 0B6A ldr r3, [r1, #32] + 3007 .loc 1 1103 5 view .LVU865 + 3008 0042 13F0040F tst r3, #4 + 3009 0046 28D0 beq .L202 +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; + 3010 .loc 1 1105 5 is_stmt 1 view .LVU866 + 3011 .loc 1 1105 33 is_stmt 0 view .LVU867 + 3012 0048 0523 movs r3, #5 + 3013 004a C360 str r3, [r0, #12] + 3014 .L203: +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) + 3015 .loc 1 1117 3 is_stmt 1 view .LVU868 + ARM GAS /tmp/cc4nNFis.s page 99 + + + 3016 .loc 1 1117 10 is_stmt 0 view .LVU869 + 3017 004c 1B4B ldr r3, .L209 + 3018 004e 5B6A ldr r3, [r3, #36] + 3019 .loc 1 1117 5 view .LVU870 + 3020 0050 13F0010F tst r3, #1 + 3021 0054 2CD0 beq .L205 +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; + 3022 .loc 1 1119 5 is_stmt 1 view .LVU871 + 3023 .loc 1 1119 33 is_stmt 0 view .LVU872 + 3024 0056 0123 movs r3, #1 + 3025 0058 8361 str r3, [r0, #24] + 3026 .L206: +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) + 3027 .loc 1 1128 3 is_stmt 1 view .LVU873 + 3028 .loc 1 1128 10 is_stmt 0 view .LVU874 + 3029 005a 184B ldr r3, .L209 + 3030 005c 1B68 ldr r3, [r3] + 3031 .loc 1 1128 5 view .LVU875 + 3032 005e 13F0807F tst r3, #16777216 + 3033 0062 28D0 beq .L207 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; + 3034 .loc 1 1130 5 is_stmt 1 view .LVU876 + 3035 .loc 1 1130 37 is_stmt 0 view .LVU877 + 3036 0064 0223 movs r3, #2 + 3037 0066 C361 str r3, [r0, #28] + 3038 .L208: +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); + 3039 .loc 1 1136 3 is_stmt 1 view .LVU878 + 3040 .loc 1 1136 52 is_stmt 0 view .LVU879 + 3041 0068 144A ldr r2, .L209 + 3042 006a 5368 ldr r3, [r2, #4] + 3043 .loc 1 1136 38 view .LVU880 + 3044 006c 03F48033 and r3, r3, #65536 + 3045 .loc 1 1136 36 view .LVU881 + 3046 0070 0362 str r3, [r0, #32] +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); + 3047 .loc 1 1137 3 is_stmt 1 view .LVU882 + 3048 .loc 1 1137 49 is_stmt 0 view .LVU883 + 3049 0072 5368 ldr r3, [r2, #4] + 3050 .loc 1 1137 35 view .LVU884 + 3051 0074 03F47013 and r3, r3, #3932160 + 3052 .loc 1 1137 33 view .LVU885 + ARM GAS /tmp/cc4nNFis.s page 100 + + + 3053 0078 4362 str r3, [r0, #36] +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3054 .loc 1 1141 1 view .LVU886 + 3055 007a 7047 bx lr + 3056 .L197: +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3057 .loc 1 1078 8 is_stmt 1 view .LVU887 +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3058 .loc 1 1078 15 is_stmt 0 view .LVU888 + 3059 007c 0F4B ldr r3, .L209 + 3060 007e 1B68 ldr r3, [r3] +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3061 .loc 1 1078 10 view .LVU889 + 3062 0080 13F4803F tst r3, #65536 + 3063 0084 03D0 beq .L199 +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3064 .loc 1 1080 5 is_stmt 1 view .LVU890 +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3065 .loc 1 1080 33 is_stmt 0 view .LVU891 + 3066 0086 4FF48033 mov r3, #65536 + 3067 008a 4360 str r3, [r0, #4] + 3068 008c C2E7 b .L198 + 3069 .L199: +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3070 .loc 1 1084 5 is_stmt 1 view .LVU892 +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3071 .loc 1 1084 33 is_stmt 0 view .LVU893 + 3072 008e 0023 movs r3, #0 + 3073 0090 4360 str r3, [r0, #4] + 3074 0092 BFE7 b .L198 + 3075 .L200: +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3076 .loc 1 1097 5 is_stmt 1 view .LVU894 +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3077 .loc 1 1097 33 is_stmt 0 view .LVU895 + 3078 0094 0023 movs r3, #0 + 3079 0096 0361 str r3, [r0, #16] + 3080 0098 C7E7 b .L201 + 3081 .L202: +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3082 .loc 1 1107 8 is_stmt 1 view .LVU896 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3083 .loc 1 1107 15 is_stmt 0 view .LVU897 + 3084 009a 084B ldr r3, .L209 + 3085 009c 1B6A ldr r3, [r3, #32] +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3086 .loc 1 1107 10 view .LVU898 + 3087 009e 13F0010F tst r3, #1 + 3088 00a2 02D0 beq .L204 +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3089 .loc 1 1109 5 is_stmt 1 view .LVU899 +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3090 .loc 1 1109 33 is_stmt 0 view .LVU900 + 3091 00a4 0123 movs r3, #1 + ARM GAS /tmp/cc4nNFis.s page 101 + + + 3092 00a6 C360 str r3, [r0, #12] + 3093 00a8 D0E7 b .L203 + 3094 .L204: +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3095 .loc 1 1113 5 is_stmt 1 view .LVU901 +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3096 .loc 1 1113 33 is_stmt 0 view .LVU902 + 3097 00aa 0023 movs r3, #0 + 3098 00ac C360 str r3, [r0, #12] + 3099 00ae CDE7 b .L203 + 3100 .L205: +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3101 .loc 1 1123 5 is_stmt 1 view .LVU903 +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3102 .loc 1 1123 33 is_stmt 0 view .LVU904 + 3103 00b0 0023 movs r3, #0 + 3104 00b2 8361 str r3, [r0, #24] + 3105 00b4 D1E7 b .L206 + 3106 .L207: +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3107 .loc 1 1134 5 is_stmt 1 view .LVU905 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3108 .loc 1 1134 37 is_stmt 0 view .LVU906 + 3109 00b6 0123 movs r3, #1 + 3110 00b8 C361 str r3, [r0, #28] + 3111 00ba D5E7 b .L208 + 3112 .L210: + 3113 .align 2 + 3114 .L209: + 3115 00bc 00100240 .word 1073876992 + 3116 .cfi_endproc + 3117 .LFE140: + 3119 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits + 3120 .align 1 + 3121 .global HAL_RCC_GetClockConfig + 3122 .syntax unified + 3123 .thumb + 3124 .thumb_func + 3126 HAL_RCC_GetClockConfig: + 3127 .LVL216: + 3128 .LFB141: +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the current clock configuration. +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3129 .loc 1 1152 1 is_stmt 1 view -0 + 3130 .cfi_startproc + 3131 @ args = 0, pretend = 0, frame = 0 + 3132 @ frame_needed = 0, uses_anonymous_args = 0 + 3133 @ link register save eliminated. + ARM GAS /tmp/cc4nNFis.s page 102 + + +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); + 3134 .loc 1 1154 3 view .LVU908 +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); + 3135 .loc 1 1155 3 view .LVU909 +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | + 3136 .loc 1 1158 3 view .LVU910 + 3137 .loc 1 1158 32 is_stmt 0 view .LVU911 + 3138 0000 0F23 movs r3, #15 + 3139 0002 0360 str r3, [r0] +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); + 3140 .loc 1 1161 3 is_stmt 1 view .LVU912 + 3141 .loc 1 1161 51 is_stmt 0 view .LVU913 + 3142 0004 0B4B ldr r3, .L212 + 3143 0006 5A68 ldr r2, [r3, #4] + 3144 .loc 1 1161 37 view .LVU914 + 3145 0008 02F00302 and r2, r2, #3 + 3146 .loc 1 1161 35 view .LVU915 + 3147 000c 4260 str r2, [r0, #4] +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); + 3148 .loc 1 1164 3 is_stmt 1 view .LVU916 + 3149 .loc 1 1164 52 is_stmt 0 view .LVU917 + 3150 000e 5A68 ldr r2, [r3, #4] + 3151 .loc 1 1164 38 view .LVU918 + 3152 0010 02F0F002 and r2, r2, #240 + 3153 .loc 1 1164 36 view .LVU919 + 3154 0014 8260 str r2, [r0, #8] +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); + 3155 .loc 1 1167 3 is_stmt 1 view .LVU920 + 3156 .loc 1 1167 53 is_stmt 0 view .LVU921 + 3157 0016 5A68 ldr r2, [r3, #4] + 3158 .loc 1 1167 39 view .LVU922 + 3159 0018 02F4E062 and r2, r2, #1792 + 3160 .loc 1 1167 37 view .LVU923 + 3161 001c C260 str r2, [r0, #12] +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); + 3162 .loc 1 1170 3 is_stmt 1 view .LVU924 + 3163 .loc 1 1170 54 is_stmt 0 view .LVU925 + 3164 001e 5B68 ldr r3, [r3, #4] + 3165 .loc 1 1170 39 view .LVU926 + 3166 0020 DB08 lsrs r3, r3, #3 + 3167 0022 03F4E063 and r3, r3, #1792 + 3168 .loc 1 1170 37 view .LVU927 + 3169 0026 0361 str r3, [r0, #16] +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); + ARM GAS /tmp/cc4nNFis.s page 103 + + + 3170 .loc 1 1173 3 is_stmt 1 view .LVU928 + 3171 .loc 1 1173 32 is_stmt 0 view .LVU929 + 3172 0028 034B ldr r3, .L212+4 + 3173 002a 1B68 ldr r3, [r3] + 3174 .loc 1 1173 16 view .LVU930 + 3175 002c 03F00703 and r3, r3, #7 + 3176 .loc 1 1173 14 view .LVU931 + 3177 0030 0B60 str r3, [r1] +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3178 .loc 1 1174 1 view .LVU932 + 3179 0032 7047 bx lr + 3180 .L213: + 3181 .align 2 + 3182 .L212: + 3183 0034 00100240 .word 1073876992 + 3184 0038 00200240 .word 1073881088 + 3185 .cfi_endproc + 3186 .LFE141: + 3188 .section .text.HAL_RCC_CSSCallback,"ax",%progbits + 3189 .align 1 + 3190 .weak HAL_RCC_CSSCallback + 3191 .syntax unified + 3192 .thumb + 3193 .thumb_func + 3195 HAL_RCC_CSSCallback: + 3196 .LFB143: +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_RCC_CSSCallback(); +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval none +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3197 .loc 1 1199 1 is_stmt 1 view -0 + 3198 .cfi_startproc + 3199 @ args = 0, pretend = 0, frame = 0 + 3200 @ frame_needed = 0, uses_anonymous_args = 0 + 3201 @ link register save eliminated. +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, + ARM GAS /tmp/cc4nNFis.s page 104 + + +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3202 .loc 1 1203 1 view .LVU934 + 3203 0000 7047 bx lr + 3204 .cfi_endproc + 3205 .LFE143: + 3207 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits + 3208 .align 1 + 3209 .global HAL_RCC_NMI_IRQHandler + 3210 .syntax unified + 3211 .thumb + 3212 .thumb_func + 3214 HAL_RCC_NMI_IRQHandler: + 3215 .LFB142: +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ + 3216 .loc 1 1182 1 view -0 + 3217 .cfi_startproc + 3218 @ args = 0, pretend = 0, frame = 0 + 3219 @ frame_needed = 0, uses_anonymous_args = 0 + 3220 0000 08B5 push {r3, lr} + 3221 .cfi_def_cfa_offset 8 + 3222 .cfi_offset 3, -8 + 3223 .cfi_offset 14, -4 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3224 .loc 1 1184 3 view .LVU936 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3225 .loc 1 1184 6 is_stmt 0 view .LVU937 + 3226 0002 064B ldr r3, .L219 + 3227 0004 9B68 ldr r3, [r3, #8] +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3228 .loc 1 1184 5 view .LVU938 + 3229 0006 13F0800F tst r3, #128 + 3230 000a 00D1 bne .L218 + 3231 .L215: +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 3232 .loc 1 1192 1 view .LVU939 + 3233 000c 08BD pop {r3, pc} + 3234 .L218: +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 3235 .loc 1 1187 5 is_stmt 1 view .LVU940 + 3236 000e FFF7FEFF bl HAL_RCC_CSSCallback + 3237 .LVL217: +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3238 .loc 1 1190 5 view .LVU941 + 3239 0012 024B ldr r3, .L219 + 3240 0014 8022 movs r2, #128 + 3241 0016 9A72 strb r2, [r3, #10] +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 3242 .loc 1 1192 1 is_stmt 0 view .LVU942 + 3243 0018 F8E7 b .L215 + 3244 .L220: + 3245 001a 00BF .align 2 + 3246 .L219: + 3247 001c 00100240 .word 1073876992 + 3248 .cfi_endproc + 3249 .LFE142: + ARM GAS /tmp/cc4nNFis.s page 105 + + + 3251 .section .rodata.aPredivFactorTable,"a" + 3252 .align 2 + 3255 aPredivFactorTable: + 3256 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015" + 3256 05060708 + 3256 090A0B0C + 3256 0D + 3257 000d 0E0F10 .ascii "\016\017\020" + 3258 .section .rodata.aPLLMULFactorTable,"a" + 3259 .align 2 + 3262 aPLLMULFactorTable: + 3263 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" + 3263 06070809 + 3263 0A0B0C0D + 3263 0E + 3264 000d 0F1010 .ascii "\017\020\020" + 3265 .text + 3266 .Letext0: + 3267 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 3268 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 3269 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 3270 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 3271 .file 7 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 3272 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 3273 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 3274 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 3275 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/cc4nNFis.s page 106 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_rcc.c + /tmp/cc4nNFis.s:21 .text.HAL_RCC_DeInit:00000000 $t + /tmp/cc4nNFis.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit + /tmp/cc4nNFis.s:228 .text.HAL_RCC_DeInit:000000dc $d + /tmp/cc4nNFis.s:238 .text.HAL_RCC_OscConfig:00000000 $t + /tmp/cc4nNFis.s:244 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig + /tmp/cc4nNFis.s:1056 .text.HAL_RCC_OscConfig:000002e8 $d + /tmp/cc4nNFis.s:1067 .text.HAL_RCC_OscConfig:000002f0 $t + /tmp/cc4nNFis.s:1915 .text.HAL_RCC_OscConfig:000005d8 $d + /tmp/cc4nNFis.s:1922 .text.HAL_RCC_OscConfig:000005e4 $t + /tmp/cc4nNFis.s:2019 .text.HAL_RCC_OscConfig:0000062c $d + /tmp/cc4nNFis.s:2024 .text.HAL_RCC_MCOConfig:00000000 $t + /tmp/cc4nNFis.s:2030 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig + /tmp/cc4nNFis.s:2111 .text.HAL_RCC_MCOConfig:00000048 $d + /tmp/cc4nNFis.s:2116 .text.HAL_RCC_EnableCSS:00000000 $t + /tmp/cc4nNFis.s:2122 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS + /tmp/cc4nNFis.s:2163 .text.HAL_RCC_DisableCSS:00000000 $t + /tmp/cc4nNFis.s:2169 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS + /tmp/cc4nNFis.s:2210 .text.HAL_RCC_GetSysClockFreq:00000000 $t + /tmp/cc4nNFis.s:2216 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq + /tmp/cc4nNFis.s:2335 .text.HAL_RCC_GetSysClockFreq:0000005c $d + /tmp/cc4nNFis.s:3262 .rodata.aPLLMULFactorTable:00000000 aPLLMULFactorTable + /tmp/cc4nNFis.s:3255 .rodata.aPredivFactorTable:00000000 aPredivFactorTable + /tmp/cc4nNFis.s:2344 .text.HAL_RCC_ClockConfig:00000000 $t + /tmp/cc4nNFis.s:2350 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig + /tmp/cc4nNFis.s:2766 .text.HAL_RCC_ClockConfig:00000194 $d + /tmp/cc4nNFis.s:2775 .text.HAL_RCC_GetHCLKFreq:00000000 $t + /tmp/cc4nNFis.s:2781 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq + /tmp/cc4nNFis.s:2796 .text.HAL_RCC_GetHCLKFreq:00000008 $d + /tmp/cc4nNFis.s:2801 .text.HAL_RCC_GetPCLK1Freq:00000000 $t + /tmp/cc4nNFis.s:2807 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq + /tmp/cc4nNFis.s:2857 .text.HAL_RCC_GetPCLK1Freq:00000024 $d + /tmp/cc4nNFis.s:2863 .text.HAL_RCC_GetPCLK2Freq:00000000 $t + /tmp/cc4nNFis.s:2869 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq + /tmp/cc4nNFis.s:2919 .text.HAL_RCC_GetPCLK2Freq:00000024 $d + /tmp/cc4nNFis.s:2925 .text.HAL_RCC_GetOscConfig:00000000 $t + /tmp/cc4nNFis.s:2931 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig + /tmp/cc4nNFis.s:3115 .text.HAL_RCC_GetOscConfig:000000bc $d + /tmp/cc4nNFis.s:3120 .text.HAL_RCC_GetClockConfig:00000000 $t + /tmp/cc4nNFis.s:3126 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig + /tmp/cc4nNFis.s:3183 .text.HAL_RCC_GetClockConfig:00000034 $d + /tmp/cc4nNFis.s:3189 .text.HAL_RCC_CSSCallback:00000000 $t + /tmp/cc4nNFis.s:3195 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback + /tmp/cc4nNFis.s:3208 .text.HAL_RCC_NMI_IRQHandler:00000000 $t + /tmp/cc4nNFis.s:3214 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler + /tmp/cc4nNFis.s:3247 .text.HAL_RCC_NMI_IRQHandler:0000001c $d + /tmp/cc4nNFis.s:3252 .rodata.aPredivFactorTable:00000000 $d + /tmp/cc4nNFis.s:3259 .rodata.aPLLMULFactorTable:00000000 $d + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_InitTick +SystemCoreClock +uwTickPrio +HAL_GPIO_Init +AHBPrescTable + ARM GAS /tmp/cc4nNFis.s page 107 + + +APBPrescTable diff --git a/build/stm32f3xx_hal_rcc.o b/build/stm32f3xx_hal_rcc.o new file mode 100644 index 0000000..7de3af1 Binary files /dev/null and b/build/stm32f3xx_hal_rcc.o differ diff --git a/build/stm32f3xx_hal_rcc_ex.d b/build/stm32f3xx_hal_rcc_ex.d new file mode 100644 index 0000000..b8e0ca1 --- /dev/null +++ b/build/stm32f3xx_hal_rcc_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_rcc_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_rcc_ex.lst b/build/stm32f3xx_hal_rcc_ex.lst new file mode 100644 index 0000000..126db2f --- /dev/null +++ b/build/stm32f3xx_hal_rcc_ex.lst @@ -0,0 +1,4848 @@ +ARM GAS /tmp/ccCEnyjw.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_rcc_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c" + 20 .section .text.RCC_GetPLLCLKFreq,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 RCC_GetPLLCLKFreq: + 27 .LFB133: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @file stm32f3xx_hal_rcc_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ****************************************************************************** + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @attention + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * All rights reserved. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the root directory of this software component. + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ****************************************************************************** + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/ + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #include "stm32f3xx_hal.h" + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx + ARM GAS /tmp/ccCEnyjw.s page 2 + + + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver. + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/ + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) || de + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM1SW) || defined(RCC_CFGR3_TIM2SW) || defined(RCC_CFGR3_TIM8SW) || defined( + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM16SW) || defined(RCC_CFGR3_TIM17SW) || defined(RCC_CFGR3_TIM20SW) || defin + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_HRTIM1SW) + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Functions RCCEx Private Functions + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static uint32_t RCC_GetPLLCLKFreq(void); + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRExx || RCC_CFGR3_TIMxSW || RCC_CFGR3_HRTIM1SW || RCC + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @verbatim + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** =============================================================================== + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions ##### + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** =============================================================================== + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** [..] + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequencies. + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** [..] + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** the backup registers) are set to their reset values. + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endverbatim + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified + ARM GAS /tmp/ccCEnyjw.s page 3 + + + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef. + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * (ADC, CEC, I2C, I2S, SDADC, HRTIM, TIM, USART, RTC and USB). + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values. + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note When the TIMx clock source is APB clock, so the TIMx clock is APB clock or + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * APB clock x 2 depending on the APB prescaler. + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * When the TIMx clock source is PLL clock, so the TIMx clock is PLL clock x 2. + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval HAL status + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** power domain is done. */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */ + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */ + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccCEnyjw.s page 4 + + + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */ + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE(); + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg; + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */ + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get Start Tick */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait till LSE is ready */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(pwrclkchanged == SET) + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/ + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */ + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); + ARM GAS /tmp/ccCEnyjw.s page 5 + + + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ USART3 Configuration ------------------------*/ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */ + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE)\ + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC)\ + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302x8) \ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/ + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->USBClockSelection)); + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USB clock source */ + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->USBClockSelection); + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302x8 || */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx) + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C2 Configuration ------------------------*/ + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C2 clock source */ + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); + ARM GAS /tmp/ccCEnyjw.s page 6 + + + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C3 Configuration ------------------------*/ + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C3 clock source */ + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ UART4 Configuration ------------------------*/ + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the UART4 clock source */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ UART5 Configuration ------------------------*/ + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the UART5 clock source */ + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2S Configuration ------------------------*/ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection)); + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccCEnyjw.s page 7 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2S clock source */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection); + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 clock Configuration ------------------*/ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1) + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC1PLLCLK_DIV(PeriphClkInit->Adc1ClockSelection)); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC1 clock source */ + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection); + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 & ADC2 clock Configuration -------------*/ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC12) == RCC_PERIPHCLK_ADC12) + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC12PLLCLK_DIV(PeriphClkInit->Adc12ClockSelection)); + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC12 clock source */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC12_CONFIG(PeriphClkInit->Adc12ClockSelection); + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx */ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC3 & ADC4 clock Configuration -------------*/ + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC34) == RCC_PERIPHCLK_ADC34) + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC34PLLCLK_DIV(PeriphClkInit->Adc34ClockSelection)); + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC34 clock source */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC34_CONFIG(PeriphClkInit->Adc34ClockSelection); + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx) + ARM GAS /tmp/ccCEnyjw.s page 8 + + + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 clock Configuration ------------------*/ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1) + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC1PCLK2_DIV(PeriphClkInit->Adc1ClockSelection)); + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC1 clock source */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection); + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM1 clock Configuration ----------------*/ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM1) == RCC_PERIPHCLK_TIM1) + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM1CLKSOURCE(PeriphClkInit->Tim1ClockSelection)); + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM1 clock source */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM1_CONFIG(PeriphClkInit->Tim1ClockSelection); + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM8 clock Configuration ----------------*/ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM8) == RCC_PERIPHCLK_TIM8) + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM8CLKSOURCE(PeriphClkInit->Tim8ClockSelection)); + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM8 clock source */ + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM8_CONFIG(PeriphClkInit->Tim8ClockSelection); + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM15 clock Configuration ----------------*/ + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15) + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection)); + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccCEnyjw.s page 9 + + + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM15 clock source */ + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection); + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM16 clock Configuration ----------------*/ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16) + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection)); + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM16 clock source */ + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection); + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM17 clock Configuration ----------------*/ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17) + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection)); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM17 clock source */ + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection); + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F334x8) + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ HRTIM1 clock Configuration ----------------*/ + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1) + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection)); + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the HRTIM1 clock source */ + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection); + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F334x8 */ + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx) + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ SDADC clock Configuration -------------------*/ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDADC) == RCC_PERIPHCLK_SDADC) + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_SDADCSYSCLK_DIV(PeriphClkInit->SdadcClockSelection)); + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the SDADC clock prescaler */ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_SDADC_CONFIG(PeriphClkInit->SdadcClockSelection); + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + ARM GAS /tmp/ccCEnyjw.s page 10 + + + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */ + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM2 clock Configuration -------------------*/ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM2) == RCC_PERIPHCLK_TIM2) + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM2CLKSOURCE(PeriphClkInit->Tim2ClockSelection)); + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM2_CONFIG(PeriphClkInit->Tim2ClockSelection); + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM3 clock Configuration -------------------*/ + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM34) == RCC_PERIPHCLK_TIM34) + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM3CLKSOURCE(PeriphClkInit->Tim34ClockSelection)); + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM34_CONFIG(PeriphClkInit->Tim34ClockSelection); + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM15 clock Configuration ------------------*/ + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15) + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection)); + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection); + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM16 clock Configuration ------------------*/ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16) + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection)); + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection); + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM17 clock Configuration ------------------*/ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17) + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection)); + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection); + ARM GAS /tmp/ccCEnyjw.s page 11 + + + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx) + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM20 clock Configuration ------------------*/ + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM20) == RCC_PERIPHCLK_TIM20) + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM20CLKSOURCE(PeriphClkInit->Tim20ClockSelection)); + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM20_CONFIG(PeriphClkInit->Tim20ClockSelection); + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_OK; + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * RCC configuration registers. + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * (ADC, CEC, I2C, I2S, SDADC, HRTIM, TIM, USART, RTC and USB clocks). + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval None + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Common part first */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) && defined(RCC_CFGR3_USART3SW) + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | \ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW && RCC_CFGR3_USART3SW */ + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/ + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART2 clock configuration -----------------------------------------*/ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART3 clock configuration -----------------------------------------*/ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C1 clock configuration -----------------------------------------*/ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE)\ + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC)\ + ARM GAS /tmp/ccCEnyjw.s page 12 + + + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302x8) \ + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->USBClockSelection = __HAL_RCC_GET_USB_SOURCE(); + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || */ + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302x8 || */ + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC */ + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx) + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C2; + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/ + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE(); + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */ + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C3; + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C3 clock configuration -----------------------------------------*/ + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE(); + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) ||defined(STM32F358xx) + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= (RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5); + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART4 clock configuration -----------------------------------------*/ + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE(); + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART5 clock configuration -----------------------------------------*/ + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE(); + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx */ + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/ + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2sClockSelection = __HAL_RCC_GET_I2S_SOURCE(); + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + ARM GAS /tmp/ccCEnyjw.s page 13 + + + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx) + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC1; + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 clock configuration -----------------------------------------*/ + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc1ClockSelection = __HAL_RCC_GET_ADC1_SOURCE(); + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC12; + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 & ADC2 clock configuration -----------------------------------------*/ + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc12ClockSelection = __HAL_RCC_GET_ADC12_SOURCE(); + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx */ + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC34; + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC3 & ADC4 clock configuration -----------------------------------------*/ + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc34ClockSelection = __HAL_RCC_GET_ADC34_SOURCE(); + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\ + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM1; + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/ + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim1ClockSelection = __HAL_RCC_GET_TIM1_SOURCE(); + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM8; + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM8 clock configuration -----------------------------------------*/ + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim8ClockSelection = __HAL_RCC_GET_TIM8_SOURCE(); + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + ARM GAS /tmp/ccCEnyjw.s page 14 + + + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= (RCC_PERIPHCLK_TIM15 | RCC_PERIPHCLK_TIM16 | RCC_PERIPHCLK + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/ + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim15ClockSelection = __HAL_RCC_GET_TIM15_SOURCE(); + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim16ClockSelection = __HAL_RCC_GET_TIM16_SOURCE(); + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim17ClockSelection = __HAL_RCC_GET_TIM17_SOURCE(); + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F334x8) + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_HRTIM1; + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the HRTIM1 clock configuration -----------------------------------------*/ + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Hrtim1ClockSelection = __HAL_RCC_GET_HRTIM1_SOURCE(); + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F334x8 */ + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx) + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_SDADC; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the SDADC clock configuration -----------------------------------------*/ + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->SdadcClockSelection = __HAL_RCC_GET_SDADC_SOURCE(); + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the CEC clock configuration -----------------------------------------*/ + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE(); + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */ + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM2; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM2 clock configuration -----------------------------------------*/ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim2ClockSelection = __HAL_RCC_GET_TIM2_SOURCE(); + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM34; + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM3 clock configuration -----------------------------------------*/ + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim34ClockSelection = __HAL_RCC_GET_TIM34_SOURCE(); + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM15; + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/ + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim15ClockSelection = __HAL_RCC_GET_TIM15_SOURCE(); + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM16; + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim16ClockSelection = __HAL_RCC_GET_TIM16_SOURCE(); + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM17; + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim17ClockSelection = __HAL_RCC_GET_TIM17_SOURCE(); + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + ARM GAS /tmp/ccCEnyjw.s page 15 + + + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined (STM32F303xE) || defined(STM32F398xx) + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM20; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM20 clock configuration -----------------------------------------*/ + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim20ClockSelection = __HAL_RCC_GET_TIM20_SOURCE(); + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx */ + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown or 0xDEADDEAD if not applicable. + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This parameter can be one of the following values: + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F301x8 + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302x8 + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302xC + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302xE + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + ARM GAS /tmp/ccCEnyjw.s page 16 + + + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303x8 + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303xC + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303xE + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM20 TIM20 peripheral clock + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F318xx + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F328xx + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + ARM GAS /tmp/ccCEnyjw.s page 17 + + + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F334x8 + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_HRTIM1 HRTIM1 peripheral clock + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F358xx + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F373xC + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SDADC SDADC peripheral clock + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F378xx + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SDADC SDADC peripheral clock + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F398xx + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM20 TIM20 peripheral clock + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral) + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + ARM GAS /tmp/ccCEnyjw.s page 18 + + + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t frequency = 0U; + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t srcclk = 0U; + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static const uint16_t adc_pll_prediv_table[16U] = { 1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64 + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRE12 || RCC_CFGR2_ADCPRE34 */ + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_SDPRE) + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static const uint8_t sdadc_prescaler_table[16U] = { 2U, 4U, 6U, 8U, 10U, 12U, 14U, 16U, 20U, 24 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_SDPRE */ + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** switch (PeriphClk) + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC: + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current RTC source */ + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE(); + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */ + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */ + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSI_VALUE; + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U; + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1: + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART1 source */ + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE(); + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */ + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_USART1CLKSOURCE_PCLK2) + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK2) + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq(); + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1) + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_USART1CLKSOURCE_PCLK2 */ + ARM GAS /tmp/ccCEnyjw.s page 19 + + +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */ +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */ +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK) +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */ +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2: +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART2 source */ +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE(); +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */ +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1) +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */ +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */ +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK) +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */ +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3: +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART3 source */ +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE(); +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */ +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1) +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccCEnyjw.s page 20 + + +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */ +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */ +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK) +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */ +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_UART4SW) +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART4: +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current UART4 source */ +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART4_SOURCE(); +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART4 clock selection is PCLK1 */ +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_UART4CLKSOURCE_PCLK1) +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if UART4 clock selection is HSI */ +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART4 clock selection is SYSCLK */ +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_UART4CLKSOURCE_SYSCLK) +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if UART4 clock selection is LSE */ +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART4CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_UART4SW */ +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_UART5SW) +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART5: +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current UART5 source */ +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART5_SOURCE(); +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART5 clock selection is PCLK1 */ +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_UART5CLKSOURCE_PCLK1) +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + ARM GAS /tmp/ccCEnyjw.s page 21 + + +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if UART5 clock selection is HSI */ +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART5CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART5 clock selection is SYSCLK */ +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_UART5CLKSOURCE_SYSCLK) +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if UART5 clock selection is LSE */ +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART5CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_UART5SW */ +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1: +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C1 source */ +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE(); +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */ +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */ +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK) +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_I2C2SW) +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C2: +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C2 source */ +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C2_SOURCE(); +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C2 clock selection is HSI */ +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C2 clock selection is SYSCLK */ +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C2CLKSOURCE_SYSCLK) +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_I2C2SW */ +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_I2C3SW) +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C3: + ARM GAS /tmp/ccCEnyjw.s page 22 + + +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C3 source */ +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C3_SOURCE(); +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C3 clock selection is HSI */ +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C3 clock selection is SYSCLK */ +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C3CLKSOURCE_SYSCLK) +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_I2C3SW */ +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_I2SSRC) +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2S: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2S source */ +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2S_SOURCE(); +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin */ +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_I2SCLKSOURCE_EXT) +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* External clock used. Frequency cannot be returned.*/ +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = 0xDEADDEADU; +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2S clock selection is SYSCLK */ +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2SCLKSOURCE_SYSCLK) +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_I2SSRC */ +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_USBPRE) +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB: +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USB source */ +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE(); +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USB clock selection is not divided */ +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USBCLKSOURCE_PLL) +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USB clock selection is divided by 1.5 */ +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else /* RCC_USBCLKSOURCE_PLL_DIV1_5 */ +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = (RCC_GetPLLCLKFreq() * 3U) / 2U; +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccCEnyjw.s page 23 + + +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_USBPRE */ +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR_ADCPRE) +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC1: +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC1 source */ +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC1_SOURCE(); +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC1 clock selection is AHB */ +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC1PLLCLK_OFF) +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */ +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6U/8U/10U/12U/16U/32 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> POSITION_VAL(RCC_CFGR2_ +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else /* RCC_CFGR_ADCPRE */ +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* ADC1 is set to PLCK2 frequency divided by 2U/4U/6U/8U */ +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq() / (((srcclk >> POSITION_VAL(RCC_CFGR_ADCPRE)) + 1U) * 2U) +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES */ +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR_ADCPRE */ +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADCPRE12) +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC12: +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC12 source */ +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC12_SOURCE(); +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */ +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC12PLLCLK_OFF) +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */ +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6/8U/10U/12U/16U/32U +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> POSITION_VAL(RCC_CFGR2_ +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADCPRE12 */ +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADCPRE34) +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC34: +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccCEnyjw.s page 24 + + +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC34 source */ +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC34_SOURCE(); +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC34 clock selection is AHB */ +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC34PLLCLK_OFF) +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */ +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6U/8U/10U/12U/16U/32 +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> POSITION_VAL(RCC_CFGR2_ +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADCPRE34 */ +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM1SW) +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM1: +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM1 source */ +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM1_SOURCE(); +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM1 clock selection is PLL */ +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM1CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM1 clock selection is SYSCLK */ +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM1CLK_HCLK) +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM1SW */ +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM2SW) +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM2: +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM2 source */ +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM2_SOURCE(); +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM2 clock selection is PLL */ +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM2CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM2 clock selection is SYSCLK */ +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM2CLK_HCLK) +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccCEnyjw.s page 25 + + +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM2SW */ +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM8SW) +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM8: +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM8 source */ +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM8_SOURCE(); +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM8 clock selection is PLL */ +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM8CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM8 clock selection is SYSCLK */ +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM8CLK_HCLK) +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM8SW */ +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM15SW) +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM15: +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM15 source */ +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM15_SOURCE(); +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM15 clock selection is PLL */ +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM15CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM15 clock selection is SYSCLK */ +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM15CLK_HCLK) +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM15SW */ +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM16SW) +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM16: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM16 source */ +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM16_SOURCE(); +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM16 clock selection is PLL */ +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM16CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM16 clock selection is SYSCLK */ +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM16CLK_HCLK) +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccCEnyjw.s page 26 + + +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM16SW */ +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM17SW) +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM17: +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM17 source */ +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM17_SOURCE(); +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM17 clock selection is PLL */ +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM17CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM17 clock selection is SYSCLK */ +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM17CLK_HCLK) +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM17SW */ +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM20SW) +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM20: +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM20 source */ +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM20_SOURCE(); +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM20 clock selection is PLL */ +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM20CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM20 clock selection is SYSCLK */ +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM20CLK_HCLK) +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM20SW */ +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM34SW) +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM34: +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM34 source */ +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM34_SOURCE(); +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM34 clock selection is PLL */ +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM34CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM34 clock selection is SYSCLK */ +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM34CLK_HCLK) +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccCEnyjw.s page 27 + + +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM34SW */ +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_HRTIM1SW) +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_HRTIM1: +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current HRTIM1 source */ +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_HRTIM1_SOURCE(); +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if HRTIM1 clock selection is PLL */ +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_HRTIM1CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HRTIM1 clock selection is SYSCLK */ +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_HRTIM1CLK_HCLK) +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_HRTIM1SW */ +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_SDPRE) +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_SDADC: +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current SDADC source */ +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_SDADC_SOURCE(); +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the system frequency divided by SDADC prescaler (2U/4U/6U/8U/10U/12U/14U/16U/ +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock / sdadc_prescaler_table[(srcclk >> POSITION_VAL(RCC_CFGR_SDPRE)) +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_SDPRE */ +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_CECSW) +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current CEC source */ +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE(); +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */ +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */ +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_CECSW */ +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** default: +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return(frequency); +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccCEnyjw.s page 28 + + +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) || de +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM1SW) || defined(RCC_CFGR3_TIM2SW) || defined(RCC_CFGR3_TIM8SW) || defined( +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM16SW) || defined(RCC_CFGR3_TIM17SW) || defined(RCC_CFGR3_TIM20SW) || defin +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_HRTIM1SW) +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @addtogroup RCCEx_Private_Functions +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static uint32_t RCC_GetPLLCLKFreq(void) +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 28 .loc 1 1532 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t pllmul = 0U, pllsource = 0U, prediv = 0U, pllclk = 0U; + 33 .loc 1 1533 3 view .LVU1 + 34 .LVL0: +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + 35 .loc 1 1535 3 view .LVU2 + 36 .loc 1 1535 15 is_stmt 0 view .LVU3 + 37 0000 0B4B ldr r3, .L4 + 38 0002 5868 ldr r0, [r3, #4] + 39 .LVL1: +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllmul = ( pllmul >> 18U) + 2U; + 40 .loc 1 1536 3 is_stmt 1 view .LVU4 + 41 .loc 1 1536 21 is_stmt 0 view .LVU5 + 42 0004 C0F38340 ubfx r0, r0, #18, #4 + 43 .LVL2: + 44 .loc 1 1536 10 view .LVU6 + 45 0008 0230 adds r0, r0, #2 + 46 .LVL3: +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 47 .loc 1 1537 3 is_stmt 1 view .LVU7 + 48 .loc 1 1537 18 is_stmt 0 view .LVU8 + 49 000a 5B68 ldr r3, [r3, #4] + 50 .LVL4: +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (pllsource != RCC_PLLSOURCE_HSI) + 51 .loc 1 1539 3 is_stmt 1 view .LVU9 + 52 .loc 1 1539 6 is_stmt 0 view .LVU10 + 53 000c 13F4803F tst r3, #65536 + 54 0010 0AD0 beq .L2 +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** prediv = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; + 55 .loc 1 1541 5 is_stmt 1 view .LVU11 + 56 .loc 1 1541 18 is_stmt 0 view .LVU12 + ARM GAS /tmp/ccCEnyjw.s page 29 + + + 57 0012 074B ldr r3, .L4 + 58 .LVL5: + 59 .loc 1 1541 18 view .LVU13 + 60 0014 DB6A ldr r3, [r3, #44] + 61 .loc 1 1541 26 view .LVU14 + 62 0016 03F00F03 and r3, r3, #15 + 63 .loc 1 1541 12 view .LVU15 + 64 001a 0133 adds r3, r3, #1 + 65 .LVL6: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSE_VALUE/prediv) * pllmul; + 66 .loc 1 1543 5 is_stmt 1 view .LVU16 + 67 .loc 1 1543 24 is_stmt 0 view .LVU17 + 68 001c 054A ldr r2, .L4+4 + 69 001e B2FBF3F3 udiv r3, r2, r3 + 70 .LVL7: + 71 .loc 1 1543 12 view .LVU18 + 72 0022 03FB00F0 mul r0, r3, r0 + 73 .LVL8: + 74 .loc 1 1543 12 view .LVU19 + 75 0026 7047 bx lr + 76 .LVL9: + 77 .L2: +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2U * PLLMUL */ +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSI_VALUE >> 1U) * pllmul; + 78 .loc 1 1548 5 is_stmt 1 view .LVU20 + 79 .loc 1 1548 12 is_stmt 0 view .LVU21 + 80 0028 034B ldr r3, .L4+8 + 81 .LVL10: + 82 .loc 1 1548 12 view .LVU22 + 83 002a 03FB00F0 mul r0, r3, r0 + 84 .LVL11: +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** prediv = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSE_VALUE/prediv) * pllmul; +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSI_VALUE/prediv) * pllmul; +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return pllclk; + 85 .loc 1 1564 3 is_stmt 1 view .LVU23 +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 86 .loc 1 1565 1 is_stmt 0 view .LVU24 + 87 002e 7047 bx lr + 88 .L5: + 89 .align 2 + ARM GAS /tmp/ccCEnyjw.s page 30 + + + 90 .L4: + 91 0030 00100240 .word 1073876992 + 92 0034 00127A00 .word 8000000 + 93 0038 00093D00 .word 4000000 + 94 .cfi_endproc + 95 .LFE133: + 97 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits + 98 .align 1 + 99 .global HAL_RCCEx_PeriphCLKConfig + 100 .syntax unified + 101 .thumb + 102 .thumb_func + 104 HAL_RCCEx_PeriphCLKConfig: + 105 .LVL12: + 106 .LFB130: + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 107 .loc 1 106 1 is_stmt 1 view -0 + 108 .cfi_startproc + 109 @ args = 0, pretend = 0, frame = 8 + 110 @ frame_needed = 0, uses_anonymous_args = 0 + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 111 .loc 1 106 1 is_stmt 0 view .LVU26 + 112 0000 F0B5 push {r4, r5, r6, r7, lr} + 113 .cfi_def_cfa_offset 20 + 114 .cfi_offset 4, -20 + 115 .cfi_offset 5, -16 + 116 .cfi_offset 6, -12 + 117 .cfi_offset 7, -8 + 118 .cfi_offset 14, -4 + 119 0002 83B0 sub sp, sp, #12 + 120 .cfi_def_cfa_offset 32 + 121 0004 0446 mov r4, r0 + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 122 .loc 1 107 3 is_stmt 1 view .LVU27 + 123 .LVL13: + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 124 .loc 1 108 3 view .LVU28 + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 125 .loc 1 109 3 view .LVU29 + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 126 .loc 1 112 3 view .LVU30 + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 127 .loc 1 115 3 view .LVU31 + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 128 .loc 1 115 21 is_stmt 0 view .LVU32 + 129 0006 0368 ldr r3, [r0] + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 130 .loc 1 115 5 view .LVU33 + 131 0008 13F4803F tst r3, #65536 + 132 000c 48D0 beq .L7 + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 133 .loc 1 118 5 is_stmt 1 view .LVU34 + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 134 .loc 1 124 5 view .LVU35 + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 135 .loc 1 124 8 is_stmt 0 view .LVU36 + 136 000e 864B ldr r3, .L36 + ARM GAS /tmp/ccCEnyjw.s page 31 + + + 137 0010 DB69 ldr r3, [r3, #28] + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 138 .loc 1 124 7 view .LVU37 + 139 0012 13F0805F tst r3, #268435456 + 140 0016 40F0BE80 bne .L28 + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 141 .loc 1 126 7 is_stmt 1 view .LVU38 + 142 .LBB17: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 143 .loc 1 126 7 view .LVU39 + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 144 .loc 1 126 7 view .LVU40 + 145 001a 834B ldr r3, .L36 + 146 001c DA69 ldr r2, [r3, #28] + 147 001e 42F08052 orr r2, r2, #268435456 + 148 0022 DA61 str r2, [r3, #28] + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 149 .loc 1 126 7 view .LVU41 + 150 0024 DB69 ldr r3, [r3, #28] + 151 0026 03F08053 and r3, r3, #268435456 + 152 002a 0193 str r3, [sp, #4] + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 153 .loc 1 126 7 view .LVU42 + 154 002c 019B ldr r3, [sp, #4] + 155 .LBE17: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 156 .loc 1 126 7 view .LVU43 + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 157 .loc 1 127 7 view .LVU44 + 158 .LVL14: + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 159 .loc 1 127 21 is_stmt 0 view .LVU45 + 160 002e 0125 movs r5, #1 + 161 .LVL15: + 162 .L8: + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 163 .loc 1 130 5 is_stmt 1 view .LVU46 + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 164 .loc 1 130 8 is_stmt 0 view .LVU47 + 165 0030 7E4B ldr r3, .L36+4 + 166 0032 1B68 ldr r3, [r3] + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 167 .loc 1 130 7 view .LVU48 + 168 0034 13F4807F tst r3, #256 + 169 0038 00F0AF80 beq .L33 + 170 .LVL16: + 171 .L9: + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 172 .loc 1 148 5 is_stmt 1 view .LVU49 + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 173 .loc 1 148 20 is_stmt 0 view .LVU50 + 174 003c 7A4B ldr r3, .L36 + 175 003e 1B6A ldr r3, [r3, #32] + 176 .LVL17: + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 177 .loc 1 149 5 is_stmt 1 view .LVU51 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccCEnyjw.s page 32 + + + 178 .loc 1 149 7 is_stmt 0 view .LVU52 + 179 0040 13F44073 ands r3, r3, #768 + 180 .LVL18: + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 181 .loc 1 149 7 view .LVU53 + 182 0044 22D0 beq .L13 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 183 .loc 1 149 64 discriminator 1 view .LVU54 + 184 0046 6268 ldr r2, [r4, #4] + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 185 .loc 1 149 84 discriminator 1 view .LVU55 + 186 0048 02F44072 and r2, r2, #768 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 187 .loc 1 149 34 discriminator 1 view .LVU56 + 188 004c 9A42 cmp r2, r3 + 189 004e 1DD0 beq .L13 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 190 .loc 1 152 7 is_stmt 1 view .LVU57 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 191 .loc 1 152 22 is_stmt 0 view .LVU58 + 192 0050 7548 ldr r0, .L36 + 193 0052 016A ldr r1, [r0, #32] + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 194 .loc 1 152 16 view .LVU59 + 195 0054 21F44076 bic r6, r1, #768 + 196 .LVL19: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 197 .loc 1 154 7 is_stmt 1 view .LVU60 + 198 .LBB18: + 199 .LBI18: + 200 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + ARM GAS /tmp/ccCEnyjw.s page 33 + + + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + ARM GAS /tmp/ccCEnyjw.s page 34 + + + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + ARM GAS /tmp/ccCEnyjw.s page 35 + + + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccCEnyjw.s page 36 + + + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccCEnyjw.s page 37 + + + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccCEnyjw.s page 38 + + + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + ARM GAS /tmp/ccCEnyjw.s page 39 + + + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccCEnyjw.s page 40 + + + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccCEnyjw.s page 41 + + + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + ARM GAS /tmp/ccCEnyjw.s page 42 + + + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + ARM GAS /tmp/ccCEnyjw.s page 43 + + + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + ARM GAS /tmp/ccCEnyjw.s page 44 + + + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + ARM GAS /tmp/ccCEnyjw.s page 45 + + + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccCEnyjw.s page 46 + + + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + ARM GAS /tmp/ccCEnyjw.s page 47 + + + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccCEnyjw.s page 48 + + + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccCEnyjw.s page 49 + + + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 201 .loc 2 981 31 view .LVU61 + 202 .LBB19: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 203 .loc 2 983 3 view .LVU62 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 204 .loc 2 988 4 view .LVU63 + 205 0058 4FF48033 mov r3, #65536 + 206 .syntax unified + 207 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccCEnyjw.s page 50 + + + 208 005c 93FAA3F2 rbit r2, r3 + 209 @ 0 "" 2 + 210 .LVL20: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 211 .loc 2 1001 3 view .LVU64 + 212 .loc 2 1001 3 is_stmt 0 view .LVU65 + 213 .thumb + 214 .syntax unified + 215 .LBE19: + 216 .LBE18: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 217 .loc 1 154 7 discriminator 2 view .LVU66 + 218 0060 B2FA82F2 clz r2, r2 + 219 0064 724F ldr r7, .L36+8 + 220 0066 3A44 add r2, r2, r7 + 221 0068 9200 lsls r2, r2, #2 + 222 006a 4FF0010C mov ip, #1 + 223 006e C2F800C0 str ip, [r2] + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 224 .loc 1 155 7 is_stmt 1 view .LVU67 + 225 .LVL21: + 226 .LBB20: + 227 .LBI20: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 228 .loc 2 981 31 view .LVU68 + 229 .LBB21: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 230 .loc 2 983 3 view .LVU69 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 231 .loc 2 988 4 view .LVU70 + 232 .syntax unified + 233 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 234 0072 93FAA3F3 rbit r3, r3 + 235 @ 0 "" 2 + 236 .LVL22: + 237 .loc 2 1001 3 view .LVU71 + 238 .loc 2 1001 3 is_stmt 0 view .LVU72 + 239 .thumb + 240 .syntax unified + 241 .LBE21: + 242 .LBE20: + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 243 .loc 1 155 7 discriminator 2 view .LVU73 + 244 0076 B3FA83F3 clz r3, r3 + 245 007a 3B44 add r3, r3, r7 + ARM GAS /tmp/ccCEnyjw.s page 51 + + + 246 007c 9B00 lsls r3, r3, #2 + 247 007e 0022 movs r2, #0 + 248 0080 1A60 str r2, [r3] + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 249 .loc 1 157 7 is_stmt 1 view .LVU74 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 250 .loc 1 157 17 is_stmt 0 view .LVU75 + 251 0082 0662 str r6, [r0, #32] + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 252 .loc 1 160 7 is_stmt 1 view .LVU76 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 253 .loc 1 160 10 is_stmt 0 view .LVU77 + 254 0084 11F0010F tst r1, #1 + 255 0088 40F09C80 bne .L34 + 256 .LVL23: + 257 .L13: + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 258 .loc 1 175 5 is_stmt 1 view .LVU78 + 259 008c 664A ldr r2, .L36 + 260 008e 136A ldr r3, [r2, #32] + 261 0090 23F44073 bic r3, r3, #768 + 262 0094 6168 ldr r1, [r4, #4] + 263 0096 0B43 orrs r3, r3, r1 + 264 0098 1362 str r3, [r2, #32] + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 265 .loc 1 178 5 view .LVU79 + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 266 .loc 1 178 7 is_stmt 0 view .LVU80 + 267 009a 002D cmp r5, #0 + 268 009c 40F0B980 bne .L35 + 269 .LVL24: + 270 .L7: + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 271 .loc 1 185 3 is_stmt 1 view .LVU81 + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 272 .loc 1 185 21 is_stmt 0 view .LVU82 + 273 00a0 2368 ldr r3, [r4] + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 274 .loc 1 185 5 view .LVU83 + 275 00a2 13F0010F tst r3, #1 + 276 00a6 06D0 beq .L18 + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 277 .loc 1 188 5 is_stmt 1 view .LVU84 + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 278 .loc 1 191 5 view .LVU85 + 279 00a8 5F4A ldr r2, .L36 + 280 00aa 136B ldr r3, [r2, #48] + 281 00ac 23F00303 bic r3, r3, #3 + 282 00b0 A168 ldr r1, [r4, #8] + 283 00b2 0B43 orrs r3, r3, r1 + 284 00b4 1363 str r3, [r2, #48] + 285 .L18: + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 286 .loc 1 196 3 view .LVU86 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 287 .loc 1 196 21 is_stmt 0 view .LVU87 + 288 00b6 2368 ldr r3, [r4] + ARM GAS /tmp/ccCEnyjw.s page 52 + + + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 289 .loc 1 196 5 view .LVU88 + 290 00b8 13F0020F tst r3, #2 + 291 00bc 06D0 beq .L19 + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 292 .loc 1 199 5 is_stmt 1 view .LVU89 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 293 .loc 1 202 5 view .LVU90 + 294 00be 5A4A ldr r2, .L36 + 295 00c0 136B ldr r3, [r2, #48] + 296 00c2 23F44033 bic r3, r3, #196608 + 297 00c6 E168 ldr r1, [r4, #12] + 298 00c8 0B43 orrs r3, r3, r1 + 299 00ca 1363 str r3, [r2, #48] + 300 .L19: + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 301 .loc 1 208 3 view .LVU91 + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 302 .loc 1 208 21 is_stmt 0 view .LVU92 + 303 00cc 2368 ldr r3, [r4] + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 304 .loc 1 208 5 view .LVU93 + 305 00ce 13F0040F tst r3, #4 + 306 00d2 06D0 beq .L20 + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 307 .loc 1 211 5 is_stmt 1 view .LVU94 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 308 .loc 1 214 5 view .LVU95 + 309 00d4 544A ldr r2, .L36 + 310 00d6 136B ldr r3, [r2, #48] + 311 00d8 23F44023 bic r3, r3, #786432 + 312 00dc 2169 ldr r1, [r4, #16] + 313 00de 0B43 orrs r3, r3, r1 + 314 00e0 1363 str r3, [r2, #48] + 315 .L20: + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 316 .loc 1 219 3 view .LVU96 + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 317 .loc 1 219 21 is_stmt 0 view .LVU97 + 318 00e2 2368 ldr r3, [r4] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 319 .loc 1 219 5 view .LVU98 + 320 00e4 13F0200F tst r3, #32 + 321 00e8 06D0 beq .L21 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 322 .loc 1 222 5 is_stmt 1 view .LVU99 + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 323 .loc 1 225 5 view .LVU100 + 324 00ea 4F4A ldr r2, .L36 + 325 00ec 136B ldr r3, [r2, #48] + 326 00ee 23F01003 bic r3, r3, #16 + 327 00f2 E169 ldr r1, [r4, #28] + 328 00f4 0B43 orrs r3, r3, r1 + 329 00f6 1363 str r3, [r2, #48] + 330 .L21: + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 331 .loc 1 233 3 view .LVU101 + ARM GAS /tmp/ccCEnyjw.s page 53 + + + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 332 .loc 1 233 21 is_stmt 0 view .LVU102 + 333 00f8 2368 ldr r3, [r4] + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 334 .loc 1 233 5 view .LVU103 + 335 00fa 13F4003F tst r3, #131072 + 336 00fe 06D0 beq .L22 + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 337 .loc 1 236 5 is_stmt 1 view .LVU104 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 338 .loc 1 239 5 view .LVU105 + 339 0100 494A ldr r2, .L36 + 340 0102 5368 ldr r3, [r2, #4] + 341 0104 23F48003 bic r3, r3, #4194304 + 342 0108 216B ldr r1, [r4, #48] + 343 010a 0B43 orrs r3, r3, r1 + 344 010c 5360 str r3, [r2, #4] + 345 .L22: + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 346 .loc 1 253 3 view .LVU106 + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 347 .loc 1 253 21 is_stmt 0 view .LVU107 + 348 010e 2368 ldr r3, [r4] + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 349 .loc 1 253 5 view .LVU108 + 350 0110 13F0400F tst r3, #64 + 351 0114 06D0 beq .L23 + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 352 .loc 1 256 5 is_stmt 1 view .LVU109 + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 353 .loc 1 259 5 view .LVU110 + 354 0116 444A ldr r2, .L36 + 355 0118 136B ldr r3, [r2, #48] + 356 011a 23F02003 bic r3, r3, #32 + 357 011e 216A ldr r1, [r4, #32] + 358 0120 0B43 orrs r3, r3, r1 + 359 0122 1363 str r3, [r2, #48] + 360 .L23: + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 361 .loc 1 286 3 view .LVU111 + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 362 .loc 1 286 21 is_stmt 0 view .LVU112 + 363 0124 2368 ldr r3, [r4] + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 364 .loc 1 286 5 view .LVU113 + 365 0126 13F0080F tst r3, #8 + 366 012a 06D0 beq .L24 + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 367 .loc 1 289 5 is_stmt 1 view .LVU114 + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 368 .loc 1 292 5 view .LVU115 + 369 012c 3E4A ldr r2, .L36 + 370 012e 136B ldr r3, [r2, #48] + 371 0130 23F44013 bic r3, r3, #3145728 + 372 0134 6169 ldr r1, [r4, #20] + 373 0136 0B43 orrs r3, r3, r1 + 374 0138 1363 str r3, [r2, #48] + ARM GAS /tmp/ccCEnyjw.s page 54 + + + 375 .L24: + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 376 .loc 1 296 3 view .LVU116 + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 377 .loc 1 296 21 is_stmt 0 view .LVU117 + 378 013a 2368 ldr r3, [r4] + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 379 .loc 1 296 5 view .LVU118 + 380 013c 13F0100F tst r3, #16 + 381 0140 06D0 beq .L25 + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 382 .loc 1 299 5 is_stmt 1 view .LVU119 + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 383 .loc 1 302 5 view .LVU120 + 384 0142 394A ldr r2, .L36 + 385 0144 136B ldr r3, [r2, #48] + 386 0146 23F44003 bic r3, r3, #12582912 + 387 014a A169 ldr r1, [r4, #24] + 388 014c 0B43 orrs r3, r3, r1 + 389 014e 1363 str r3, [r2, #48] + 390 .L25: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 391 .loc 1 312 3 view .LVU121 + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 392 .loc 1 312 21 is_stmt 0 view .LVU122 + 393 0150 2368 ldr r3, [r4] + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 394 .loc 1 312 5 view .LVU123 + 395 0152 13F4007F tst r3, #512 + 396 0156 06D0 beq .L26 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 397 .loc 1 315 5 is_stmt 1 view .LVU124 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 398 .loc 1 318 5 view .LVU125 + 399 0158 334A ldr r2, .L36 + 400 015a 5368 ldr r3, [r2, #4] + 401 015c 23F40003 bic r3, r3, #8388608 + 402 0160 A16A ldr r1, [r4, #40] + 403 0162 0B43 orrs r3, r3, r1 + 404 0164 5360 str r3, [r2, #4] + 405 .L26: + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 406 .loc 1 344 3 view .LVU126 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 407 .loc 1 344 21 is_stmt 0 view .LVU127 + 408 0166 2368 ldr r3, [r4] + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 409 .loc 1 344 5 view .LVU128 + 410 0168 13F0800F tst r3, #128 + 411 016c 06D0 beq .L27 + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 412 .loc 1 347 5 is_stmt 1 view .LVU129 + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 413 .loc 1 350 5 view .LVU130 + 414 016e 2E4A ldr r2, .L36 + 415 0170 D36A ldr r3, [r2, #44] + 416 0172 23F4F873 bic r3, r3, #496 + ARM GAS /tmp/ccCEnyjw.s page 55 + + + 417 0176 616A ldr r1, [r4, #36] + 418 0178 0B43 orrs r3, r3, r1 + 419 017a D362 str r3, [r2, #44] + 420 .L27: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 421 .loc 1 393 3 view .LVU131 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 422 .loc 1 393 21 is_stmt 0 view .LVU132 + 423 017c 2368 ldr r3, [r4] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 424 .loc 1 393 5 view .LVU133 + 425 017e 13F4805F tst r3, #4096 + 426 0182 4DD0 beq .L31 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 427 .loc 1 396 5 is_stmt 1 view .LVU134 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 428 .loc 1 399 5 view .LVU135 + 429 0184 284A ldr r2, .L36 + 430 0186 136B ldr r3, [r2, #48] + 431 0188 23F48073 bic r3, r3, #256 + 432 018c E16A ldr r1, [r4, #44] + 433 018e 0B43 orrs r3, r3, r1 + 434 0190 1363 str r3, [r2, #48] + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 435 .loc 1 562 10 is_stmt 0 view .LVU136 + 436 0192 0020 movs r0, #0 + 437 0194 45E0 b .L11 + 438 .LVL25: + 439 .L28: + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 440 .loc 1 109 20 view .LVU137 + 441 0196 0025 movs r5, #0 + 442 0198 4AE7 b .L8 + 443 .LVL26: + 444 .L33: + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 445 .loc 1 133 7 is_stmt 1 view .LVU138 + 446 019a 244A ldr r2, .L36+4 + 447 019c 1368 ldr r3, [r2] + 448 019e 43F48073 orr r3, r3, #256 + 449 01a2 1360 str r3, [r2] + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 450 .loc 1 136 7 view .LVU139 + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 451 .loc 1 136 19 is_stmt 0 view .LVU140 + 452 01a4 FFF7FEFF bl HAL_GetTick + 453 .LVL27: + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 454 .loc 1 136 19 view .LVU141 + 455 01a8 0646 mov r6, r0 + 456 .LVL28: + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 457 .loc 1 138 7 is_stmt 1 view .LVU142 + 458 .L10: + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 459 .loc 1 138 13 view .LVU143 + 460 01aa 204B ldr r3, .L36+4 + ARM GAS /tmp/ccCEnyjw.s page 56 + + + 461 01ac 1B68 ldr r3, [r3] + 462 01ae 13F4807F tst r3, #256 + 463 01b2 7FF443AF bne .L9 + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 464 .loc 1 140 11 view .LVU144 + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 465 .loc 1 140 15 is_stmt 0 view .LVU145 + 466 01b6 FFF7FEFF bl HAL_GetTick + 467 .LVL29: + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 468 .loc 1 140 29 discriminator 1 view .LVU146 + 469 01ba 801B subs r0, r0, r6 + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 470 .loc 1 140 13 discriminator 1 view .LVU147 + 471 01bc 6428 cmp r0, #100 + 472 01be F4D9 bls .L10 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 473 .loc 1 142 18 view .LVU148 + 474 01c0 0320 movs r0, #3 + 475 01c2 2EE0 b .L11 + 476 .LVL30: + 477 .L34: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 478 .loc 1 163 9 is_stmt 1 view .LVU149 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 479 .loc 1 163 21 is_stmt 0 view .LVU150 + 480 01c4 FFF7FEFF bl HAL_GetTick + 481 .LVL31: + 482 01c8 0646 mov r6, r0 + 483 .LVL32: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 484 .loc 1 166 9 is_stmt 1 view .LVU151 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 485 .loc 1 166 14 is_stmt 0 view .LVU152 + 486 01ca 18E0 b .L14 + 487 .LVL33: + 488 .L15: + 489 .LBB22: + 490 .LBI22: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 491 .loc 2 981 31 is_stmt 1 view .LVU153 + 492 .LBB23: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 493 .loc 2 983 3 view .LVU154 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 494 .loc 2 988 4 view .LVU155 + 495 01cc 0223 movs r3, #2 + 496 .syntax unified + 497 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 498 01ce 93FAA3F3 rbit r3, r3 + 499 @ 0 "" 2 + 500 .LVL34: + 501 .loc 2 1001 3 view .LVU156 + 502 .loc 2 1001 3 is_stmt 0 view .LVU157 + 503 .thumb + 504 .syntax unified + 505 .LBE23: + ARM GAS /tmp/ccCEnyjw.s page 57 + + + 506 .LBE22: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 507 .loc 1 166 15 discriminator 8 view .LVU158 + 508 01d2 154B ldr r3, .L36 + 509 01d4 596A ldr r1, [r3, #36] + 510 .L16: + 511 .LVL35: + 512 .LBB24: + 513 .LBI24: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 514 .loc 2 981 31 is_stmt 1 view .LVU159 + 515 .LBB25: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 516 .loc 2 983 3 view .LVU160 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 517 .loc 2 988 4 view .LVU161 + 518 01d6 0223 movs r3, #2 + 519 .syntax unified + 520 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 521 01d8 93FAA3F3 rbit r3, r3 + 522 @ 0 "" 2 + 523 .LVL36: + 524 .loc 2 1001 3 view .LVU162 + 525 .loc 2 1001 3 is_stmt 0 view .LVU163 + 526 .thumb + 527 .syntax unified + 528 .LBE25: + 529 .LBE24: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 530 .loc 1 166 15 discriminator 2 view .LVU164 + 531 01dc B3FA83F3 clz r3, r3 + 532 01e0 03F01F03 and r3, r3, #31 + 533 01e4 0122 movs r2, #1 + 534 01e6 02FA03F3 lsl r3, r2, r3 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 535 .loc 1 166 51 discriminator 2 view .LVU165 + 536 01ea 0B42 tst r3, r1 + 537 01ec 7FF44EAF bne .L13 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 538 .loc 1 168 13 is_stmt 1 view .LVU166 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 539 .loc 1 168 17 is_stmt 0 view .LVU167 + 540 01f0 FFF7FEFF bl HAL_GetTick + 541 .LVL37: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 542 .loc 1 168 31 discriminator 1 view .LVU168 + 543 01f4 801B subs r0, r0, r6 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 544 .loc 1 168 15 discriminator 1 view .LVU169 + 545 01f6 41F28833 movw r3, #5000 + 546 01fa 9842 cmp r0, r3 + 547 01fc 0ED8 bhi .L30 + 548 .L14: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 549 .loc 1 166 51 is_stmt 1 view .LVU170 + 550 .LVL38: + 551 .LBB26: + ARM GAS /tmp/ccCEnyjw.s page 58 + + + 552 .LBI26: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 553 .loc 2 981 31 view .LVU171 + 554 .LBB27: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 555 .loc 2 983 3 view .LVU172 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 556 .loc 2 988 4 view .LVU173 + 557 01fe 0223 movs r3, #2 + 558 .syntax unified + 559 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 560 0200 93FAA3F2 rbit r2, r3 + 561 @ 0 "" 2 + 562 .LVL39: + 563 .loc 2 1001 3 view .LVU174 + 564 .loc 2 1001 3 is_stmt 0 view .LVU175 + 565 .thumb + 566 .syntax unified + 567 .LBE27: + 568 .LBE26: + 569 .LBB28: + 570 .LBI28: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571 .loc 2 981 31 is_stmt 1 view .LVU176 + 572 .LBB29: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 573 .loc 2 983 3 view .LVU177 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 574 .loc 2 988 4 view .LVU178 + 575 .syntax unified + 576 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 577 0204 93FAA3F3 rbit r3, r3 + 578 @ 0 "" 2 + 579 .LVL40: + 580 .loc 2 1001 3 view .LVU179 + 581 .loc 2 1001 3 is_stmt 0 view .LVU180 + 582 .thumb + 583 .syntax unified + 584 .LBE29: + 585 .LBE28: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 586 .loc 1 166 15 discriminator 2 view .LVU181 + 587 0208 002B cmp r3, #0 + 588 020a DFD0 beq .L15 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 589 .loc 1 166 15 discriminator 4 view .LVU182 + 590 020c 064B ldr r3, .L36 + 591 020e 196A ldr r1, [r3, #32] + 592 0210 E1E7 b .L16 + 593 .LVL41: + 594 .L35: + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 595 .loc 1 180 7 is_stmt 1 view .LVU183 + 596 0212 D369 ldr r3, [r2, #28] + 597 0214 23F08053 bic r3, r3, #268435456 + 598 0218 D361 str r3, [r2, #28] + 599 021a 41E7 b .L7 + ARM GAS /tmp/ccCEnyjw.s page 59 + + + 600 .LVL42: + 601 .L30: + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 602 .loc 1 170 20 is_stmt 0 view .LVU184 + 603 021c 0320 movs r0, #3 + 604 021e 00E0 b .L11 + 605 .LVL43: + 606 .L31: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 607 .loc 1 562 10 view .LVU185 + 608 0220 0020 movs r0, #0 + 609 .L11: + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 610 .loc 1 563 1 view .LVU186 + 611 0222 03B0 add sp, sp, #12 + 612 .cfi_def_cfa_offset 20 + 613 @ sp needed + 614 0224 F0BD pop {r4, r5, r6, r7, pc} + 615 .LVL44: + 616 .L37: + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 617 .loc 1 563 1 view .LVU187 + 618 0226 00BF .align 2 + 619 .L36: + 620 0228 00100240 .word 1073876992 + 621 022c 00700040 .word 1073770496 + 622 0230 00819010 .word 277905664 + 623 .cfi_endproc + 624 .LFE130: + 626 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits + 627 .align 1 + 628 .global HAL_RCCEx_GetPeriphCLKConfig + 629 .syntax unified + 630 .thumb + 631 .thumb_func + 633 HAL_RCCEx_GetPeriphCLKConfig: + 634 .LVL45: + 635 .LFB131: + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 636 .loc 1 574 1 is_stmt 1 view -0 + 637 .cfi_startproc + 638 @ args = 0, pretend = 0, frame = 0 + 639 @ frame_needed = 0, uses_anonymous_args = 0 + 640 @ link register save eliminated. + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 641 .loc 1 578 3 view .LVU189 + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 642 .loc 1 578 39 is_stmt 0 view .LVU190 + 643 0000 1F4B ldr r3, .L39 + 644 0002 0360 str r3, [r0] + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 645 .loc 1 586 3 is_stmt 1 view .LVU191 + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 646 .loc 1 586 38 is_stmt 0 view .LVU192 + 647 0004 1F4B ldr r3, .L39+4 + 648 0006 1A6A ldr r2, [r3, #32] + 649 0008 02F44072 and r2, r2, #768 + ARM GAS /tmp/ccCEnyjw.s page 60 + + + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 650 .loc 1 586 36 view .LVU193 + 651 000c 4260 str r2, [r0, #4] + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 652 .loc 1 588 3 is_stmt 1 view .LVU194 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 653 .loc 1 588 41 is_stmt 0 view .LVU195 + 654 000e 1A6B ldr r2, [r3, #48] + 655 0010 02F00302 and r2, r2, #3 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 656 .loc 1 588 39 view .LVU196 + 657 0014 8260 str r2, [r0, #8] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 658 .loc 1 591 3 is_stmt 1 view .LVU197 + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 659 .loc 1 591 41 is_stmt 0 view .LVU198 + 660 0016 1A6B ldr r2, [r3, #48] + 661 0018 02F44032 and r2, r2, #196608 + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 662 .loc 1 591 39 view .LVU199 + 663 001c C260 str r2, [r0, #12] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 664 .loc 1 595 3 is_stmt 1 view .LVU200 + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 665 .loc 1 595 41 is_stmt 0 view .LVU201 + 666 001e 1A6B ldr r2, [r3, #48] + 667 0020 02F44022 and r2, r2, #786432 + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 668 .loc 1 595 39 view .LVU202 + 669 0024 0261 str r2, [r0, #16] + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 670 .loc 1 598 3 is_stmt 1 view .LVU203 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 671 .loc 1 598 39 is_stmt 0 view .LVU204 + 672 0026 1A6B ldr r2, [r3, #48] + 673 0028 02F01002 and r2, r2, #16 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 674 .loc 1 598 37 view .LVU205 + 675 002c C261 str r2, [r0, #28] + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ + 676 .loc 1 605 3 is_stmt 1 view .LVU206 + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ + 677 .loc 1 605 39 is_stmt 0 view .LVU207 + 678 002e 164A ldr r2, .L39+8 + 679 0030 0260 str r2, [r0] + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 680 .loc 1 607 3 is_stmt 1 view .LVU208 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 681 .loc 1 607 38 is_stmt 0 view .LVU209 + 682 0032 5A68 ldr r2, [r3, #4] + 683 0034 02F48002 and r2, r2, #4194304 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 684 .loc 1 607 36 view .LVU210 + 685 0038 0263 str r2, [r0, #48] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/ + 686 .loc 1 619 3 is_stmt 1 view .LVU211 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/ + ARM GAS /tmp/ccCEnyjw.s page 61 + + + 687 .loc 1 619 39 is_stmt 0 view .LVU212 + 688 003a 144A ldr r2, .L39+12 + 689 003c 0260 str r2, [r0] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 690 .loc 1 621 3 is_stmt 1 view .LVU213 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 691 .loc 1 621 39 is_stmt 0 view .LVU214 + 692 003e 1A6B ldr r2, [r3, #48] + 693 0040 02F02002 and r2, r2, #32 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 694 .loc 1 621 37 view .LVU215 + 695 0044 0262 str r2, [r0, #32] + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART4 clock configuration -----------------------------------------*/ + 696 .loc 1 641 3 is_stmt 1 view .LVU216 + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART4 clock configuration -----------------------------------------*/ + 697 .loc 1 641 39 is_stmt 0 view .LVU217 + 698 0046 124A ldr r2, .L39+16 + 699 0048 0260 str r2, [r0] + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART5 clock configuration -----------------------------------------*/ + 700 .loc 1 643 3 is_stmt 1 view .LVU218 + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART5 clock configuration -----------------------------------------*/ + 701 .loc 1 643 40 is_stmt 0 view .LVU219 + 702 004a 1A6B ldr r2, [r3, #48] + 703 004c 02F44012 and r2, r2, #3145728 + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART5 clock configuration -----------------------------------------*/ + 704 .loc 1 643 38 view .LVU220 + 705 0050 4261 str r2, [r0, #20] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 706 .loc 1 645 3 is_stmt 1 view .LVU221 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 707 .loc 1 645 40 is_stmt 0 view .LVU222 + 708 0052 1A6B ldr r2, [r3, #48] + 709 0054 02F44002 and r2, r2, #12582912 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 710 .loc 1 645 38 view .LVU223 + 711 0058 8261 str r2, [r0, #24] + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/ + 712 .loc 1 654 3 is_stmt 1 view .LVU224 + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/ + 713 .loc 1 654 39 is_stmt 0 view .LVU225 + 714 005a 0E4A ldr r2, .L39+20 + 715 005c 0260 str r2, [r0] + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 716 .loc 1 656 3 is_stmt 1 view .LVU226 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 717 .loc 1 656 38 is_stmt 0 view .LVU227 + 718 005e 5A68 ldr r2, [r3, #4] + 719 0060 02F40002 and r2, r2, #8388608 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 720 .loc 1 656 36 view .LVU228 + 721 0064 8262 str r2, [r0, #40] + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 & ADC2 clock configuration -----------------------------------------*/ + 722 .loc 1 676 3 is_stmt 1 view .LVU229 + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 & ADC2 clock configuration -----------------------------------------*/ + 723 .loc 1 676 39 is_stmt 0 view .LVU230 + 724 0066 0C4A ldr r2, .L39+24 + 725 0068 0260 str r2, [r0] + ARM GAS /tmp/ccCEnyjw.s page 62 + + + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 726 .loc 1 678 3 is_stmt 1 view .LVU231 + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 727 .loc 1 678 40 is_stmt 0 view .LVU232 + 728 006a DA6A ldr r2, [r3, #44] + 729 006c 02F4F872 and r2, r2, #496 + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 730 .loc 1 678 38 view .LVU233 + 731 0070 4262 str r2, [r0, #36] + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/ + 732 .loc 1 699 3 is_stmt 1 view .LVU234 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/ + 733 .loc 1 699 39 is_stmt 0 view .LVU235 + 734 0072 0A4A ldr r2, .L39+28 + 735 0074 0260 str r2, [r0] + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 736 .loc 1 701 3 is_stmt 1 view .LVU236 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 737 .loc 1 701 39 is_stmt 0 view .LVU237 + 738 0076 1B6B ldr r3, [r3, #48] + 739 0078 03F48073 and r3, r3, #256 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 740 .loc 1 701 37 view .LVU238 + 741 007c C362 str r3, [r0, #44] + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 742 .loc 1 779 1 view .LVU239 + 743 007e 7047 bx lr + 744 .L40: + 745 .align 2 + 746 .L39: + 747 0080 27000100 .word 65575 + 748 0084 00100240 .word 1073876992 + 749 0088 27000300 .word 196647 + 750 008c 67000300 .word 196711 + 751 0090 7F000300 .word 196735 + 752 0094 7F020300 .word 197247 + 753 0098 FF020300 .word 197375 + 754 009c FF120300 .word 201471 + 755 .cfi_endproc + 756 .LFE131: + 758 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits + 759 .align 1 + 760 .global HAL_RCCEx_GetPeriphCLKFreq + 761 .syntax unified + 762 .thumb + 763 .thumb_func + 765 HAL_RCCEx_GetPeriphCLKFreq: + 766 .LVL46: + 767 .LFB132: + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 768 .loc 1 945 1 is_stmt 1 view -0 + 769 .cfi_startproc + 770 @ args = 0, pretend = 0, frame = 0 + 771 @ frame_needed = 0, uses_anonymous_args = 0 + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 772 .loc 1 945 1 is_stmt 0 view .LVU241 + 773 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccCEnyjw.s page 63 + + + 774 .cfi_def_cfa_offset 8 + 775 .cfi_offset 4, -8 + 776 .cfi_offset 14, -4 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 777 .loc 1 947 3 is_stmt 1 view .LVU242 + 778 .LVL47: + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) + 779 .loc 1 949 3 view .LVU243 + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRE12 || RCC_CFGR2_ADCPRE34 */ + 780 .loc 1 951 3 view .LVU244 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 781 .loc 1 958 3 view .LVU245 + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 782 .loc 1 960 3 view .LVU246 + 783 0002 4028 cmp r0, #64 + 784 0004 00F05181 beq .L42 + 785 0008 2BD8 bhi .L43 + 786 000a 2028 cmp r0, #32 + 787 000c 00F29F81 bhi .L80 + 788 0010 0028 cmp r0, #0 + 789 0012 00F09E81 beq .L81 + 790 0016 0138 subs r0, r0, #1 + 791 .LVL48: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 792 .loc 1 960 3 is_stmt 0 view .LVU247 + 793 0018 1F28 cmp r0, #31 + 794 001a 00F29C81 bhi .L82 + 795 001e DFE810F0 tbh [pc, r0, lsl #1] + 796 .L46: + 797 0022 7200 .2byte (.L51-.L46)/2 + 798 0024 9500 .2byte (.L50-.L46)/2 + 799 0026 9A01 .2byte (.L82-.L46)/2 + 800 0028 BE00 .2byte (.L49-.L46)/2 + 801 002a 9A01 .2byte (.L82-.L46)/2 + 802 002c 9A01 .2byte (.L82-.L46)/2 + 803 002e 9A01 .2byte (.L82-.L46)/2 + 804 0030 E700 .2byte (.L48-.L46)/2 + 805 0032 9A01 .2byte (.L82-.L46)/2 + 806 0034 9A01 .2byte (.L82-.L46)/2 + 807 0036 9A01 .2byte (.L82-.L46)/2 + 808 0038 9A01 .2byte (.L82-.L46)/2 + 809 003a 9A01 .2byte (.L82-.L46)/2 + 810 003c 9A01 .2byte (.L82-.L46)/2 + 811 003e 9A01 .2byte (.L82-.L46)/2 + 812 0040 0D01 .2byte (.L47-.L46)/2 + 813 0042 9A01 .2byte (.L82-.L46)/2 + 814 0044 9A01 .2byte (.L82-.L46)/2 + 815 0046 9A01 .2byte (.L82-.L46)/2 + 816 0048 9A01 .2byte (.L82-.L46)/2 + 817 004a 9A01 .2byte (.L82-.L46)/2 + 818 004c 9A01 .2byte (.L82-.L46)/2 + 819 004e 9A01 .2byte (.L82-.L46)/2 + 820 0050 9A01 .2byte (.L82-.L46)/2 + 821 0052 9A01 .2byte (.L82-.L46)/2 + 822 0054 9A01 .2byte (.L82-.L46)/2 + 823 0056 9A01 .2byte (.L82-.L46)/2 + 824 0058 9A01 .2byte (.L82-.L46)/2 + ARM GAS /tmp/ccCEnyjw.s page 64 + + + 825 005a 9A01 .2byte (.L82-.L46)/2 + 826 005c 9A01 .2byte (.L82-.L46)/2 + 827 005e 9A01 .2byte (.L82-.L46)/2 + 828 0060 3501 .2byte (.L45-.L46)/2 + 829 .LVL49: + 830 .p2align 1 + 831 .L43: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 832 .loc 1 960 3 view .LVU248 + 833 0062 B0F5805F cmp r0, #4096 + 834 0066 00F06281 beq .L52 + 835 006a 13D9 bls .L104 + 836 006c B0F5803F cmp r0, #65536 + 837 0070 22D0 beq .L56 + 838 0072 B0F5003F cmp r0, #131072 + 839 0076 1DD1 bne .L105 +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 840 .loc 1 1213 7 is_stmt 1 view .LVU249 +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 841 .loc 1 1213 11 is_stmt 0 view .LVU250 + 842 0078 9C4B ldr r3, .L131 + 843 007a 1868 ldr r0, [r3] + 844 .LVL50: +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 845 .loc 1 1213 10 view .LVU251 + 846 007c 10F00070 ands r0, r0, #33554432 + 847 0080 00F06A81 beq .L41 +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 848 .loc 1 1216 9 is_stmt 1 view .LVU252 +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 849 .loc 1 1216 18 is_stmt 0 view .LVU253 + 850 0084 5B68 ldr r3, [r3, #4] + 851 .LVL51: +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 852 .loc 1 1219 9 is_stmt 1 view .LVU254 +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 853 .loc 1 1219 12 is_stmt 0 view .LVU255 + 854 0086 13F4800F tst r3, #4194304 + 855 008a 00F02081 beq .L77 +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 856 .loc 1 1221 11 is_stmt 1 view .LVU256 +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 857 .loc 1 1221 23 is_stmt 0 view .LVU257 + 858 008e FFF7FEFF bl RCC_GetPLLCLKFreq + 859 .LVL52: +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 860 .loc 1 1221 23 view .LVU258 + 861 0092 61E1 b .L41 + 862 .LVL53: + 863 .L104: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 864 .loc 1 960 3 view .LVU259 + 865 0094 8028 cmp r0, #128 + 866 0096 00F02081 beq .L54 + 867 009a B0F5007F cmp r0, #512 + 868 009e 07D1 bne .L106 +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccCEnyjw.s page 65 + + + 869 .loc 1 1193 7 is_stmt 1 view .LVU260 +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 870 .loc 1 1193 16 is_stmt 0 view .LVU261 + 871 00a0 924B ldr r3, .L131 + 872 00a2 5B68 ldr r3, [r3, #4] + 873 .LVL54: +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 874 .loc 1 1196 7 is_stmt 1 view .LVU262 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 875 .loc 1 1196 10 is_stmt 0 view .LVU263 + 876 00a4 13F4000F tst r3, #8388608 + 877 00a8 00F00E81 beq .L107 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 878 .loc 1 1199 19 view .LVU264 + 879 00ac 9048 ldr r0, .L131+4 + 880 .LVL55: +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 881 .loc 1 1511 3 is_stmt 1 view .LVU265 +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 882 .loc 1 1511 9 is_stmt 0 view .LVU266 + 883 00ae 53E1 b .L41 + 884 .LVL56: + 885 .L106: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 886 .loc 1 960 3 view .LVU267 + 887 00b0 0020 movs r0, #0 + 888 .LVL57: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 889 .loc 1 960 3 view .LVU268 + 890 00b2 51E1 b .L41 + 891 .LVL58: + 892 .L105: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 893 .loc 1 960 3 view .LVU269 + 894 00b4 0020 movs r0, #0 + 895 .LVL59: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 896 .loc 1 960 3 view .LVU270 + 897 00b6 4FE1 b .L41 + 898 .LVL60: + 899 .L56: + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 900 .loc 1 965 7 is_stmt 1 view .LVU271 + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 901 .loc 1 965 16 is_stmt 0 view .LVU272 + 902 00b8 8C4B ldr r3, .L131 + 903 00ba 1B6A ldr r3, [r3, #32] + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 904 .loc 1 965 14 view .LVU273 + 905 00bc 03F44073 and r3, r3, #768 + 906 .LVL61: + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 907 .loc 1 968 7 is_stmt 1 view .LVU274 + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 908 .loc 1 968 10 is_stmt 0 view .LVU275 + 909 00c0 B3F5807F cmp r3, #256 + 910 00c4 07D0 beq .L108 + ARM GAS /tmp/ccCEnyjw.s page 66 + + + 911 .L58: + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 912 .loc 1 973 12 is_stmt 1 view .LVU276 + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 913 .loc 1 973 15 is_stmt 0 view .LVU277 + 914 00c6 B3F5007F cmp r3, #512 + 915 00ca 0CD0 beq .L109 + 916 .L59: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 917 .loc 1 978 12 is_stmt 1 view .LVU278 + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 918 .loc 1 978 15 is_stmt 0 view .LVU279 + 919 00cc B3F5407F cmp r3, #768 + 920 00d0 11D0 beq .L110 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 921 .loc 1 947 12 view .LVU280 + 922 00d2 0020 movs r0, #0 + 923 .LVL62: + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 924 .loc 1 947 12 view .LVU281 + 925 00d4 40E1 b .L41 + 926 .LVL63: + 927 .L108: + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 928 .loc 1 968 48 discriminator 1 view .LVU282 + 929 00d6 854A ldr r2, .L131 + 930 00d8 126A ldr r2, [r2, #32] + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 931 .loc 1 968 44 discriminator 1 view .LVU283 + 932 00da 12F0020F tst r2, #2 + 933 00de F2D0 beq .L58 + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 934 .loc 1 970 19 view .LVU284 + 935 00e0 4FF40040 mov r0, #32768 + 936 .LVL64: + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 937 .loc 1 970 19 view .LVU285 + 938 00e4 38E1 b .L41 + 939 .LVL65: + 940 .L109: + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 941 .loc 1 973 53 discriminator 1 view .LVU286 + 942 00e6 814A ldr r2, .L131 + 943 00e8 526A ldr r2, [r2, #36] + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 944 .loc 1 973 49 discriminator 1 view .LVU287 + 945 00ea 12F0020F tst r2, #2 + 946 00ee EDD0 beq .L59 + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 947 .loc 1 975 19 view .LVU288 + 948 00f0 49F64040 movw r0, #40000 + 949 .LVL66: + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 950 .loc 1 975 19 view .LVU289 + 951 00f4 30E1 b .L41 + 952 .LVL67: + 953 .L110: + ARM GAS /tmp/ccCEnyjw.s page 67 + + + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 954 .loc 1 978 59 discriminator 1 view .LVU290 + 955 00f6 7D4B ldr r3, .L131 + 956 .LVL68: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 957 .loc 1 978 59 discriminator 1 view .LVU291 + 958 00f8 1868 ldr r0, [r3] + 959 .LVL69: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 960 .loc 1 978 55 discriminator 1 view .LVU292 + 961 00fa 10F40030 ands r0, r0, #131072 + 962 00fe 00F02B81 beq .L41 + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 963 .loc 1 980 19 view .LVU293 + 964 0102 7C48 ldr r0, .L131+8 + 965 0104 28E1 b .L41 + 966 .LVL70: + 967 .L51: + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 968 .loc 1 987 7 is_stmt 1 view .LVU294 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 969 .loc 1 987 16 is_stmt 0 view .LVU295 + 970 0106 794B ldr r3, .L131 + 971 0108 1B6B ldr r3, [r3, #48] + 972 .LVL71: + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 973 .loc 1 991 7 is_stmt 1 view .LVU296 + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 974 .loc 1 991 10 is_stmt 0 view .LVU297 + 975 010a 13F00303 ands r3, r3, #3 + 976 .LVL72: + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 977 .loc 1 991 10 view .LVU298 + 978 010e 07D0 beq .L111 +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 979 .loc 1 1002 12 is_stmt 1 view .LVU299 +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 980 .loc 1 1002 15 is_stmt 0 view .LVU300 + 981 0110 032B cmp r3, #3 + 982 0112 08D0 beq .L112 + 983 .L61: +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 984 .loc 1 1007 12 is_stmt 1 view .LVU301 +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 985 .loc 1 1007 15 is_stmt 0 view .LVU302 + 986 0114 012B cmp r3, #1 + 987 0116 0DD0 beq .L113 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 988 .loc 1 1012 12 is_stmt 1 view .LVU303 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 989 .loc 1 1012 15 is_stmt 0 view .LVU304 + 990 0118 022B cmp r3, #2 + 991 011a 0ED0 beq .L114 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 992 .loc 1 947 12 view .LVU305 + 993 011c 0020 movs r0, #0 + 994 .LVL73: + ARM GAS /tmp/ccCEnyjw.s page 68 + + + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 995 .loc 1 947 12 view .LVU306 + 996 011e 1BE1 b .L41 + 997 .L111: + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 998 .loc 1 993 9 is_stmt 1 view .LVU307 + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 999 .loc 1 993 21 is_stmt 0 view .LVU308 + 1000 0120 FFF7FEFF bl HAL_RCC_GetPCLK2Freq + 1001 .LVL74: + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1002 .loc 1 993 21 view .LVU309 + 1003 0124 18E1 b .L41 + 1004 .LVL75: + 1005 .L112: +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1006 .loc 1 1002 56 discriminator 1 view .LVU310 + 1007 0126 714A ldr r2, .L131 + 1008 0128 1268 ldr r2, [r2] +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1009 .loc 1 1002 52 discriminator 1 view .LVU311 + 1010 012a 12F0020F tst r2, #2 + 1011 012e F1D0 beq .L61 +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1012 .loc 1 1004 19 view .LVU312 + 1013 0130 7148 ldr r0, .L131+12 + 1014 0132 11E1 b .L41 + 1015 .L113: +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1016 .loc 1 1009 9 is_stmt 1 view .LVU313 +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1017 .loc 1 1009 21 is_stmt 0 view .LVU314 + 1018 0134 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1019 .LVL76: +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1020 .loc 1 1009 21 view .LVU315 + 1021 0138 0EE1 b .L41 + 1022 .LVL77: + 1023 .L114: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1024 .loc 1 1012 56 discriminator 1 view .LVU316 + 1025 013a 6C4B ldr r3, .L131 + 1026 .LVL78: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1027 .loc 1 1012 56 discriminator 1 view .LVU317 + 1028 013c 186A ldr r0, [r3, #32] +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1029 .loc 1 1012 52 discriminator 1 view .LVU318 + 1030 013e 10F00200 ands r0, r0, #2 + 1031 0142 00F00981 beq .L41 +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1032 .loc 1 1014 19 view .LVU319 + 1033 0146 4FF40040 mov r0, #32768 + 1034 014a 05E1 b .L41 + 1035 .LVL79: + 1036 .L50: +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccCEnyjw.s page 69 + + + 1037 .loc 1 1022 7 is_stmt 1 view .LVU320 +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1038 .loc 1 1022 16 is_stmt 0 view .LVU321 + 1039 014c 674B ldr r3, .L131 + 1040 014e 1B6B ldr r3, [r3, #48] + 1041 .LVL80: +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1042 .loc 1 1025 7 is_stmt 1 view .LVU322 +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1043 .loc 1 1025 10 is_stmt 0 view .LVU323 + 1044 0150 13F44033 ands r3, r3, #196608 + 1045 .LVL81: +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1046 .loc 1 1025 10 view .LVU324 + 1047 0154 0AD0 beq .L115 +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1048 .loc 1 1030 12 is_stmt 1 view .LVU325 +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1049 .loc 1 1030 15 is_stmt 0 view .LVU326 + 1050 0156 B3F5403F cmp r3, #196608 + 1051 015a 0AD0 beq .L116 + 1052 .L64: +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1053 .loc 1 1035 12 is_stmt 1 view .LVU327 +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1054 .loc 1 1035 15 is_stmt 0 view .LVU328 + 1055 015c B3F5803F cmp r3, #65536 + 1056 0160 0ED0 beq .L117 +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1057 .loc 1 1040 12 is_stmt 1 view .LVU329 +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1058 .loc 1 1040 15 is_stmt 0 view .LVU330 + 1059 0162 B3F5003F cmp r3, #131072 + 1060 0166 0ED0 beq .L118 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1061 .loc 1 947 12 view .LVU331 + 1062 0168 0020 movs r0, #0 + 1063 016a F5E0 b .L41 + 1064 .L115: +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1065 .loc 1 1027 9 is_stmt 1 view .LVU332 +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1066 .loc 1 1027 21 is_stmt 0 view .LVU333 + 1067 016c FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 1068 .LVL82: +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1069 .loc 1 1027 21 view .LVU334 + 1070 0170 F2E0 b .L41 + 1071 .LVL83: + 1072 .L116: +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1073 .loc 1 1030 56 discriminator 1 view .LVU335 + 1074 0172 5E4A ldr r2, .L131 + 1075 0174 1268 ldr r2, [r2] +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1076 .loc 1 1030 52 discriminator 1 view .LVU336 + 1077 0176 12F0020F tst r2, #2 + ARM GAS /tmp/ccCEnyjw.s page 70 + + + 1078 017a EFD0 beq .L64 +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1079 .loc 1 1032 19 view .LVU337 + 1080 017c 5E48 ldr r0, .L131+12 + 1081 017e EBE0 b .L41 + 1082 .L117: +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1083 .loc 1 1037 9 is_stmt 1 view .LVU338 +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1084 .loc 1 1037 21 is_stmt 0 view .LVU339 + 1085 0180 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1086 .LVL84: +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1087 .loc 1 1037 21 view .LVU340 + 1088 0184 E8E0 b .L41 + 1089 .LVL85: + 1090 .L118: +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1091 .loc 1 1040 56 discriminator 1 view .LVU341 + 1092 0186 03F18043 add r3, r3, #1073741824 + 1093 .LVL86: +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1094 .loc 1 1040 56 discriminator 1 view .LVU342 + 1095 018a 03F58053 add r3, r3, #4096 + 1096 .LVL87: +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1097 .loc 1 1040 56 discriminator 1 view .LVU343 + 1098 018e 186A ldr r0, [r3, #32] +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1099 .loc 1 1040 52 discriminator 1 view .LVU344 + 1100 0190 10F00200 ands r0, r0, #2 + 1101 0194 00F0E080 beq .L41 +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1102 .loc 1 1042 19 view .LVU345 + 1103 0198 4FF40040 mov r0, #32768 + 1104 019c DCE0 b .L41 + 1105 .LVL88: + 1106 .L49: +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1107 .loc 1 1051 7 is_stmt 1 view .LVU346 +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1108 .loc 1 1051 16 is_stmt 0 view .LVU347 + 1109 019e 534B ldr r3, .L131 + 1110 01a0 1B6B ldr r3, [r3, #48] + 1111 .LVL89: +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1112 .loc 1 1054 7 is_stmt 1 view .LVU348 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1113 .loc 1 1054 10 is_stmt 0 view .LVU349 + 1114 01a2 13F44023 ands r3, r3, #786432 + 1115 .LVL90: +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1116 .loc 1 1054 10 view .LVU350 + 1117 01a6 0AD0 beq .L119 +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1118 .loc 1 1059 12 is_stmt 1 view .LVU351 +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccCEnyjw.s page 71 + + + 1119 .loc 1 1059 15 is_stmt 0 view .LVU352 + 1120 01a8 B3F5402F cmp r3, #786432 + 1121 01ac 0AD0 beq .L120 + 1122 .L67: +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1123 .loc 1 1064 12 is_stmt 1 view .LVU353 +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1124 .loc 1 1064 15 is_stmt 0 view .LVU354 + 1125 01ae B3F5802F cmp r3, #262144 + 1126 01b2 0ED0 beq .L121 +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1127 .loc 1 1069 12 is_stmt 1 view .LVU355 +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1128 .loc 1 1069 15 is_stmt 0 view .LVU356 + 1129 01b4 B3F5002F cmp r3, #524288 + 1130 01b8 0ED0 beq .L122 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1131 .loc 1 947 12 view .LVU357 + 1132 01ba 0020 movs r0, #0 + 1133 01bc CCE0 b .L41 + 1134 .L119: +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1135 .loc 1 1056 9 is_stmt 1 view .LVU358 +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1136 .loc 1 1056 21 is_stmt 0 view .LVU359 + 1137 01be FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 1138 .LVL91: +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1139 .loc 1 1056 21 view .LVU360 + 1140 01c2 C9E0 b .L41 + 1141 .LVL92: + 1142 .L120: +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1143 .loc 1 1059 56 discriminator 1 view .LVU361 + 1144 01c4 494A ldr r2, .L131 + 1145 01c6 1268 ldr r2, [r2] +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1146 .loc 1 1059 52 discriminator 1 view .LVU362 + 1147 01c8 12F0020F tst r2, #2 + 1148 01cc EFD0 beq .L67 +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1149 .loc 1 1061 19 view .LVU363 + 1150 01ce 4A48 ldr r0, .L131+12 + 1151 01d0 C2E0 b .L41 + 1152 .L121: +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1153 .loc 1 1066 9 is_stmt 1 view .LVU364 +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1154 .loc 1 1066 21 is_stmt 0 view .LVU365 + 1155 01d2 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1156 .LVL93: +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1157 .loc 1 1066 21 view .LVU366 + 1158 01d6 BFE0 b .L41 + 1159 .LVL94: + 1160 .L122: +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccCEnyjw.s page 72 + + + 1161 .loc 1 1069 56 discriminator 1 view .LVU367 + 1162 01d8 03F18043 add r3, r3, #1073741824 + 1163 .LVL95: +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1164 .loc 1 1069 56 discriminator 1 view .LVU368 + 1165 01dc A3F5BE23 sub r3, r3, #389120 + 1166 .LVL96: +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1167 .loc 1 1069 56 discriminator 1 view .LVU369 + 1168 01e0 186A ldr r0, [r3, #32] +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1169 .loc 1 1069 52 discriminator 1 view .LVU370 + 1170 01e2 10F00200 ands r0, r0, #2 + 1171 01e6 00F0B780 beq .L41 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1172 .loc 1 1071 19 view .LVU371 + 1173 01ea 4FF40040 mov r0, #32768 + 1174 01ee B3E0 b .L41 + 1175 .LVL97: + 1176 .L48: +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1177 .loc 1 1080 7 is_stmt 1 view .LVU372 +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1178 .loc 1 1080 16 is_stmt 0 view .LVU373 + 1179 01f0 3E4B ldr r3, .L131 + 1180 01f2 1B6B ldr r3, [r3, #48] + 1181 .LVL98: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1182 .loc 1 1083 7 is_stmt 1 view .LVU374 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1183 .loc 1 1083 10 is_stmt 0 view .LVU375 + 1184 01f4 13F44013 ands r3, r3, #3145728 + 1185 .LVL99: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1186 .loc 1 1083 10 view .LVU376 + 1187 01f8 0AD0 beq .L123 +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1188 .loc 1 1088 12 is_stmt 1 view .LVU377 +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1189 .loc 1 1088 15 is_stmt 0 view .LVU378 + 1190 01fa B3F5401F cmp r3, #3145728 + 1191 01fe 0AD0 beq .L124 + 1192 .L70: +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1193 .loc 1 1093 12 is_stmt 1 view .LVU379 +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1194 .loc 1 1093 15 is_stmt 0 view .LVU380 + 1195 0200 B3F5801F cmp r3, #1048576 + 1196 0204 0ED0 beq .L125 +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1197 .loc 1 1098 12 is_stmt 1 view .LVU381 +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1198 .loc 1 1098 15 is_stmt 0 view .LVU382 + 1199 0206 B3F5001F cmp r3, #2097152 + 1200 020a 0ED0 beq .L126 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1201 .loc 1 947 12 view .LVU383 + ARM GAS /tmp/ccCEnyjw.s page 73 + + + 1202 020c 0020 movs r0, #0 + 1203 020e A3E0 b .L41 + 1204 .L123: +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1205 .loc 1 1085 9 is_stmt 1 view .LVU384 +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1206 .loc 1 1085 21 is_stmt 0 view .LVU385 + 1207 0210 FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 1208 .LVL100: +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1209 .loc 1 1085 21 view .LVU386 + 1210 0214 A0E0 b .L41 + 1211 .LVL101: + 1212 .L124: +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1213 .loc 1 1088 55 discriminator 1 view .LVU387 + 1214 0216 354A ldr r2, .L131 + 1215 0218 1268 ldr r2, [r2] +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1216 .loc 1 1088 51 discriminator 1 view .LVU388 + 1217 021a 12F0020F tst r2, #2 + 1218 021e EFD0 beq .L70 +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1219 .loc 1 1090 19 view .LVU389 + 1220 0220 3548 ldr r0, .L131+12 + 1221 0222 99E0 b .L41 + 1222 .L125: +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1223 .loc 1 1095 9 is_stmt 1 view .LVU390 +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1224 .loc 1 1095 21 is_stmt 0 view .LVU391 + 1225 0224 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1226 .LVL102: +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1227 .loc 1 1095 21 view .LVU392 + 1228 0228 96E0 b .L41 + 1229 .LVL103: + 1230 .L126: +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1231 .loc 1 1098 55 discriminator 1 view .LVU393 + 1232 022a 304B ldr r3, .L131 + 1233 .LVL104: +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1234 .loc 1 1098 55 discriminator 1 view .LVU394 + 1235 022c 186A ldr r0, [r3, #32] +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1236 .loc 1 1098 51 discriminator 1 view .LVU395 + 1237 022e 10F00200 ands r0, r0, #2 + 1238 0232 00F09180 beq .L41 +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1239 .loc 1 1100 19 view .LVU396 + 1240 0236 4FF40040 mov r0, #32768 + 1241 023a 8DE0 b .L41 + 1242 .LVL105: + 1243 .L47: +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1244 .loc 1 1109 7 is_stmt 1 view .LVU397 + ARM GAS /tmp/ccCEnyjw.s page 74 + + +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1245 .loc 1 1109 16 is_stmt 0 view .LVU398 + 1246 023c 2B4B ldr r3, .L131 + 1247 023e 1B6B ldr r3, [r3, #48] + 1248 .LVL106: +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1249 .loc 1 1112 7 is_stmt 1 view .LVU399 +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1250 .loc 1 1112 10 is_stmt 0 view .LVU400 + 1251 0240 13F44003 ands r3, r3, #12582912 + 1252 .LVL107: +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1253 .loc 1 1112 10 view .LVU401 + 1254 0244 0AD0 beq .L127 +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1255 .loc 1 1117 12 is_stmt 1 view .LVU402 +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1256 .loc 1 1117 15 is_stmt 0 view .LVU403 + 1257 0246 B3F5400F cmp r3, #12582912 + 1258 024a 0AD0 beq .L128 + 1259 .L73: +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1260 .loc 1 1122 12 is_stmt 1 view .LVU404 +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1261 .loc 1 1122 15 is_stmt 0 view .LVU405 + 1262 024c B3F5800F cmp r3, #4194304 + 1263 0250 0ED0 beq .L129 +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1264 .loc 1 1127 12 is_stmt 1 view .LVU406 +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1265 .loc 1 1127 15 is_stmt 0 view .LVU407 + 1266 0252 B3F5000F cmp r3, #8388608 + 1267 0256 0ED0 beq .L130 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1268 .loc 1 947 12 view .LVU408 + 1269 0258 0020 movs r0, #0 + 1270 025a 7DE0 b .L41 + 1271 .L127: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1272 .loc 1 1114 9 is_stmt 1 view .LVU409 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1273 .loc 1 1114 21 is_stmt 0 view .LVU410 + 1274 025c FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 1275 .LVL108: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1276 .loc 1 1114 21 view .LVU411 + 1277 0260 7AE0 b .L41 + 1278 .LVL109: + 1279 .L128: +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1280 .loc 1 1117 55 discriminator 1 view .LVU412 + 1281 0262 224A ldr r2, .L131 + 1282 0264 1268 ldr r2, [r2] +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1283 .loc 1 1117 51 discriminator 1 view .LVU413 + 1284 0266 12F0020F tst r2, #2 + 1285 026a EFD0 beq .L73 + ARM GAS /tmp/ccCEnyjw.s page 75 + + +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1286 .loc 1 1119 19 view .LVU414 + 1287 026c 2248 ldr r0, .L131+12 + 1288 026e 73E0 b .L41 + 1289 .L129: +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1290 .loc 1 1124 9 is_stmt 1 view .LVU415 +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1291 .loc 1 1124 21 is_stmt 0 view .LVU416 + 1292 0270 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1293 .LVL110: +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1294 .loc 1 1124 21 view .LVU417 + 1295 0274 70E0 b .L41 + 1296 .LVL111: + 1297 .L130: +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1298 .loc 1 1127 55 discriminator 1 view .LVU418 + 1299 0276 03F17E53 add r3, r3, #1065353216 + 1300 .LVL112: +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1301 .loc 1 1127 55 discriminator 1 view .LVU419 + 1302 027a 03F50433 add r3, r3, #135168 + 1303 .LVL113: +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1304 .loc 1 1127 55 discriminator 1 view .LVU420 + 1305 027e 186A ldr r0, [r3, #32] +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1306 .loc 1 1127 51 discriminator 1 view .LVU421 + 1307 0280 10F00200 ands r0, r0, #2 + 1308 0284 68D0 beq .L41 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1309 .loc 1 1129 19 view .LVU422 + 1310 0286 4FF40040 mov r0, #32768 + 1311 028a 65E0 b .L41 + 1312 .LVL114: + 1313 .L45: +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1314 .loc 1 1137 7 is_stmt 1 view .LVU423 +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1315 .loc 1 1137 16 is_stmt 0 view .LVU424 + 1316 028c 174B ldr r3, .L131 + 1317 028e 1B6B ldr r3, [r3, #48] + 1318 .LVL115: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1319 .loc 1 1140 7 is_stmt 1 view .LVU425 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1320 .loc 1 1140 10 is_stmt 0 view .LVU426 + 1321 0290 13F0100F tst r3, #16 + 1322 0294 06D1 bne .L75 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1323 .loc 1 1140 49 discriminator 1 view .LVU427 + 1324 0296 154B ldr r3, .L131 + 1325 .LVL116: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1326 .loc 1 1140 49 discriminator 1 view .LVU428 + 1327 0298 1868 ldr r0, [r3] + ARM GAS /tmp/ccCEnyjw.s page 76 + + +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1328 .loc 1 1140 45 discriminator 1 view .LVU429 + 1329 029a 10F00200 ands r0, r0, #2 + 1330 029e 5BD0 beq .L41 +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1331 .loc 1 1142 19 view .LVU430 + 1332 02a0 1548 ldr r0, .L131+12 + 1333 02a2 59E0 b .L41 + 1334 .LVL117: + 1335 .L75: +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1336 .loc 1 1147 9 is_stmt 1 view .LVU431 +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1337 .loc 1 1147 21 is_stmt 0 view .LVU432 + 1338 02a4 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1339 .LVL118: +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1340 .loc 1 1147 21 view .LVU433 + 1341 02a8 56E0 b .L41 + 1342 .LVL119: + 1343 .L42: +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1344 .loc 1 1155 7 is_stmt 1 view .LVU434 +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1345 .loc 1 1155 16 is_stmt 0 view .LVU435 + 1346 02aa 104B ldr r3, .L131 + 1347 02ac 1B6B ldr r3, [r3, #48] + 1348 .LVL120: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1349 .loc 1 1158 7 is_stmt 1 view .LVU436 +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1350 .loc 1 1158 10 is_stmt 0 view .LVU437 + 1351 02ae 13F0200F tst r3, #32 + 1352 02b2 06D1 bne .L76 +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1353 .loc 1 1158 49 discriminator 1 view .LVU438 + 1354 02b4 0D4B ldr r3, .L131 + 1355 .LVL121: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1356 .loc 1 1158 49 discriminator 1 view .LVU439 + 1357 02b6 1868 ldr r0, [r3] + 1358 .LVL122: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1359 .loc 1 1158 45 discriminator 1 view .LVU440 + 1360 02b8 10F00200 ands r0, r0, #2 + 1361 02bc 4CD0 beq .L41 +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1362 .loc 1 1160 19 view .LVU441 + 1363 02be 0E48 ldr r0, .L131+12 + 1364 02c0 4AE0 b .L41 + 1365 .LVL123: + 1366 .L76: +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1367 .loc 1 1165 9 is_stmt 1 view .LVU442 +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1368 .loc 1 1165 21 is_stmt 0 view .LVU443 + 1369 02c2 FFF7FEFF bl HAL_RCC_GetSysClockFreq + ARM GAS /tmp/ccCEnyjw.s page 77 + + + 1370 .LVL124: +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1371 .loc 1 1165 21 view .LVU444 + 1372 02c6 47E0 b .L41 + 1373 .LVL125: + 1374 .L107: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1375 .loc 1 1202 12 is_stmt 1 view .LVU445 +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1376 .loc 1 1204 9 view .LVU446 +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1377 .loc 1 1204 21 is_stmt 0 view .LVU447 + 1378 02c8 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1379 .LVL126: +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1380 .loc 1 1204 21 view .LVU448 + 1381 02cc 44E0 b .L41 + 1382 .LVL127: + 1383 .L77: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1384 .loc 1 1226 11 is_stmt 1 view .LVU449 +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1385 .loc 1 1226 24 is_stmt 0 view .LVU450 + 1386 02ce FFF7FEFF bl RCC_GetPLLCLKFreq + 1387 .LVL128: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1388 .loc 1 1226 44 discriminator 1 view .LVU451 + 1389 02d2 00EB4000 add r0, r0, r0, lsl #1 +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1390 .loc 1 1226 21 discriminator 1 view .LVU452 + 1391 02d6 4008 lsrs r0, r0, #1 + 1392 .LVL129: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1393 .loc 1 1226 21 discriminator 1 view .LVU453 + 1394 02d8 3EE0 b .L41 + 1395 .LVL130: + 1396 .L54: +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */ + 1397 .loc 1 1264 7 is_stmt 1 view .LVU454 +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */ + 1398 .loc 1 1264 16 is_stmt 0 view .LVU455 + 1399 02da 044B ldr r3, .L131 + 1400 02dc DC6A ldr r4, [r3, #44] + 1401 .LVL131: +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1402 .loc 1 1266 7 is_stmt 1 view .LVU456 +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1403 .loc 1 1266 10 is_stmt 0 view .LVU457 + 1404 02de 14F4F874 ands r4, r4, #496 + 1405 .LVL132: +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1406 .loc 1 1266 10 view .LVU458 + 1407 02e2 0DD1 bne .L78 +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1408 .loc 1 1268 11 is_stmt 1 view .LVU459 +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1409 .loc 1 1268 21 is_stmt 0 view .LVU460 + ARM GAS /tmp/ccCEnyjw.s page 78 + + + 1410 02e4 054B ldr r3, .L131+16 + 1411 02e6 1868 ldr r0, [r3] + 1412 .LVL133: +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1413 .loc 1 1268 21 view .LVU461 + 1414 02e8 36E0 b .L41 + 1415 .L132: + 1416 02ea 00BF .align 2 + 1417 .L131: + 1418 02ec 00100240 .word 1073876992 + 1419 02f0 ADDEADDE .word -559030611 + 1420 02f4 90D00300 .word 250000 + 1421 02f8 00127A00 .word 8000000 + 1422 02fc 00000000 .word SystemCoreClock + 1423 .LVL134: + 1424 .L78: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1425 .loc 1 1274 9 is_stmt 1 view .LVU462 +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1426 .loc 1 1274 13 is_stmt 0 view .LVU463 + 1427 0300 164B ldr r3, .L133 + 1428 0302 1868 ldr r0, [r3] + 1429 .LVL135: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1430 .loc 1 1274 12 view .LVU464 + 1431 0304 10F00070 ands r0, r0, #33554432 + 1432 0308 26D0 beq .L41 +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1433 .loc 1 1277 11 is_stmt 1 view .LVU465 +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1434 .loc 1 1277 23 is_stmt 0 view .LVU466 + 1435 030a FFF7FEFF bl RCC_GetPLLCLKFreq + 1436 .LVL136: + 1437 .LBB30: + 1438 .LBI30: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1439 .loc 2 981 31 is_stmt 1 view .LVU467 + 1440 .LBB31: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1441 .loc 2 983 3 view .LVU468 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1442 .loc 2 988 4 view .LVU469 + 1443 030e 4FF4F873 mov r3, #496 + 1444 .syntax unified + 1445 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1446 0312 93FAA3F3 rbit r3, r3 + 1447 @ 0 "" 2 + 1448 .LVL137: + 1449 .loc 2 1001 3 view .LVU470 + 1450 .loc 2 1001 3 is_stmt 0 view .LVU471 + 1451 .thumb + 1452 .syntax unified + 1453 .LBE31: + 1454 .LBE30: +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1455 .loc 1 1277 74 discriminator 3 view .LVU472 + 1456 0316 B3FA83F3 clz r3, r3 + ARM GAS /tmp/ccCEnyjw.s page 79 + + + 1457 031a 24FA03F3 lsr r3, r4, r3 +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1458 .loc 1 1277 111 discriminator 3 view .LVU473 + 1459 031e 03F00F03 and r3, r3, #15 +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1460 .loc 1 1277 65 discriminator 3 view .LVU474 + 1461 0322 0F4A ldr r2, .L133+4 + 1462 0324 32F81330 ldrh r3, [r2, r3, lsl #1] +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1463 .loc 1 1277 21 discriminator 3 view .LVU475 + 1464 0328 B0FBF3F0 udiv r0, r0, r3 + 1465 .LVL138: +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1466 .loc 1 1277 21 discriminator 3 view .LVU476 + 1467 032c 14E0 b .L41 + 1468 .LVL139: + 1469 .L52: +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1470 .loc 1 1310 7 is_stmt 1 view .LVU477 +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1471 .loc 1 1310 16 is_stmt 0 view .LVU478 + 1472 032e 0B4B ldr r3, .L133 + 1473 0330 1B6B ldr r3, [r3, #48] + 1474 .LVL140: +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1475 .loc 1 1313 7 is_stmt 1 view .LVU479 +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1476 .loc 1 1313 10 is_stmt 0 view .LVU480 + 1477 0332 13F4807F tst r3, #256 + 1478 0336 07D0 beq .L79 +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1479 .loc 1 1313 46 discriminator 1 view .LVU481 + 1480 0338 084B ldr r3, .L133 + 1481 .LVL141: +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1482 .loc 1 1313 46 discriminator 1 view .LVU482 + 1483 033a 1868 ldr r0, [r3] + 1484 .LVL142: +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1485 .loc 1 1313 42 discriminator 1 view .LVU483 + 1486 033c 10F00070 ands r0, r0, #33554432 + 1487 0340 0AD0 beq .L41 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1488 .loc 1 1315 9 is_stmt 1 view .LVU484 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1489 .loc 1 1315 21 is_stmt 0 view .LVU485 + 1490 0342 FFF7FEFF bl RCC_GetPLLCLKFreq + 1491 .LVL143: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1492 .loc 1 1315 19 view .LVU486 + 1493 0346 07E0 b .L41 + 1494 .LVL144: + 1495 .L79: +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1496 .loc 1 1320 9 is_stmt 1 view .LVU487 +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1497 .loc 1 1320 19 is_stmt 0 view .LVU488 + ARM GAS /tmp/ccCEnyjw.s page 80 + + + 1498 0348 064B ldr r3, .L133+8 + 1499 .LVL145: +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1500 .loc 1 1320 19 view .LVU489 + 1501 034a 1868 ldr r0, [r3] + 1502 .LVL146: +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1503 .loc 1 1320 19 view .LVU490 + 1504 034c 04E0 b .L41 + 1505 .LVL147: + 1506 .L80: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1507 .loc 1 960 3 view .LVU491 + 1508 034e 0020 movs r0, #0 + 1509 .LVL148: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1510 .loc 1 960 3 view .LVU492 + 1511 0350 02E0 b .L41 + 1512 .LVL149: + 1513 .L81: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1514 .loc 1 960 3 view .LVU493 + 1515 0352 0020 movs r0, #0 + 1516 .LVL150: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1517 .loc 1 960 3 view .LVU494 + 1518 0354 00E0 b .L41 + 1519 .L82: + 1520 0356 0020 movs r0, #0 + 1521 .LVL151: + 1522 .L41: +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1523 .loc 1 1512 1 view .LVU495 + 1524 0358 10BD pop {r4, pc} + 1525 .L134: + 1526 035a 00BF .align 2 + 1527 .L133: + 1528 035c 00100240 .word 1073876992 + 1529 0360 00000000 .word adc_pll_prediv_table.0 + 1530 0364 00000000 .word SystemCoreClock + 1531 .cfi_endproc + 1532 .LFE132: + 1534 .section .rodata.adc_pll_prediv_table.0,"a" + 1535 .align 2 + 1538 adc_pll_prediv_table.0: + 1539 0000 0100 .short 1 + 1540 0002 0200 .short 2 + 1541 0004 0400 .short 4 + 1542 0006 0600 .short 6 + 1543 0008 0800 .short 8 + 1544 000a 0A00 .short 10 + 1545 000c 0C00 .short 12 + 1546 000e 1000 .short 16 + 1547 0010 2000 .short 32 + 1548 0012 4000 .short 64 + 1549 0014 8000 .short 128 + 1550 0016 0001 .short 256 + ARM GAS /tmp/ccCEnyjw.s page 81 + + + 1551 0018 0001 .short 256 + 1552 001a 0001 .short 256 + 1553 001c 0001 .short 256 + 1554 001e 0001 .short 256 + 1555 .text + 1556 .Letext0: + 1557 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1558 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1559 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1560 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1561 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1562 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h" + 1563 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 1564 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 1565 .file 11 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + ARM GAS /tmp/ccCEnyjw.s page 82 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_rcc_ex.c + /tmp/ccCEnyjw.s:21 .text.RCC_GetPLLCLKFreq:00000000 $t + /tmp/ccCEnyjw.s:26 .text.RCC_GetPLLCLKFreq:00000000 RCC_GetPLLCLKFreq + /tmp/ccCEnyjw.s:91 .text.RCC_GetPLLCLKFreq:00000030 $d + /tmp/ccCEnyjw.s:98 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t + /tmp/ccCEnyjw.s:104 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig + /tmp/ccCEnyjw.s:620 .text.HAL_RCCEx_PeriphCLKConfig:00000228 $d + /tmp/ccCEnyjw.s:627 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t + /tmp/ccCEnyjw.s:633 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig + /tmp/ccCEnyjw.s:747 .text.HAL_RCCEx_GetPeriphCLKConfig:00000080 $d + /tmp/ccCEnyjw.s:759 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t + /tmp/ccCEnyjw.s:765 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq + /tmp/ccCEnyjw.s:797 .text.HAL_RCCEx_GetPeriphCLKFreq:00000022 $d + /tmp/ccCEnyjw.s:830 .text.HAL_RCCEx_GetPeriphCLKFreq:00000062 $t + /tmp/ccCEnyjw.s:1418 .text.HAL_RCCEx_GetPeriphCLKFreq:000002ec $d + /tmp/ccCEnyjw.s:1427 .text.HAL_RCCEx_GetPeriphCLKFreq:00000300 $t + /tmp/ccCEnyjw.s:1528 .text.HAL_RCCEx_GetPeriphCLKFreq:0000035c $d + /tmp/ccCEnyjw.s:1538 .rodata.adc_pll_prediv_table.0:00000000 adc_pll_prediv_table.0 + /tmp/ccCEnyjw.s:1535 .rodata.adc_pll_prediv_table.0:00000000 $d + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_RCC_GetPCLK2Freq +HAL_RCC_GetSysClockFreq +HAL_RCC_GetPCLK1Freq +SystemCoreClock diff --git a/build/stm32f3xx_hal_rcc_ex.o b/build/stm32f3xx_hal_rcc_ex.o new file mode 100644 index 0000000..3fe683a Binary files /dev/null and b/build/stm32f3xx_hal_rcc_ex.o differ diff --git a/build/stm32f3xx_hal_spi.d b/build/stm32f3xx_hal_spi.d new file mode 100644 index 0000000..047518f --- /dev/null +++ b/build/stm32f3xx_hal_spi.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_spi.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_spi.lst b/build/stm32f3xx_hal_spi.lst new file mode 100644 index 0000000..7a442b4 --- /dev/null +++ b/build/stm32f3xx_hal_spi.lst @@ -0,0 +1,15304 @@ +ARM GAS /tmp/ccZ0BHQJ.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_spi.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c" + 20 .section .text.SPI_WaitFlagStateUntilTimeout,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 SPI_WaitFlagStateUntilTimeout: + 27 .LVL0: + 28 .LFB177: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @file stm32f3xx_hal_spi.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * functionalities of the Serial Peripheral Interface (SPI) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + Peripheral Control functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + Peripheral State functions + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ****************************************************************************** + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @attention + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * All rights reserved. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * in the root directory of this software component. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ****************************************************************************** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @verbatim + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ============================================================================== + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ##### How to use this driver ##### + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ============================================================================== + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The SPI HAL driver can be used as follows: + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) Declare a SPI_HandleTypeDef handle structure, for example: + ARM GAS /tmp/ccZ0BHQJ.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef hspi; + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API: + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) Enable the SPIx interface clock + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) SPI pins configuration + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Enable the clock for the SPI GPIOs + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Configure these SPI pins as alternate function push-pull + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) NVIC configuration if you need to use interrupt process + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Configure the SPIx interrupt priority + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Enable the NVIC SPI IRQ handle + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) DMA Configuration if you need to use DMA process + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Stream + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Enable the DMAx clock + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Configure the DMA handle parameters + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Configure the DMA Tx or Rx Stream/Channel + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx hand + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init str + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) Initialize the SPI registers by calling the HAL_SPI_Init() API: + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** by calling the customized HAL_SPI_MspInit() API. + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Circular mode restriction: + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) The DMA circular mode cannot be used when the SPI is configured in these modes: + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) Master 2Lines RxOnly + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) Master 1Line Rx + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) The CRC feature is not managed when the DMA circular mode is enabled + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Master Receive mode restriction: + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=1) or + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** does not initiate a new transfer the following procedure has to be respected: + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) HAL_SPI_DeInit() + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (##) HAL_SPI_Init() + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Callback registration: + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) The compilation flag USE_HAL_SPI_REGISTER_CALLBACKS when set to 1U + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** allows the user to configure dynamically the driver callbacks. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Use Functions HAL_SPI_RegisterCallback() to register an interrupt callback. + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Function HAL_SPI_RegisterCallback() allows to register following callbacks: + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxCpltCallback : SPI Tx Completed callback + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) RxCpltCallback : SPI Rx Completed callback + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxRxCpltCallback : SPI TxRx Completed callback + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxHalfCpltCallback : SPI Tx Half Completed callback + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) RxHalfCpltCallback : SPI Rx Half Completed callback + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxRxHalfCpltCallback : SPI TxRx Half Completed callback + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) ErrorCallback : SPI Error callback + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) AbortCpltCallback : SPI Abort callback + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) MspInitCallback : SPI Msp Init callback + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) MspDeInitCallback : SPI Msp DeInit callback + ARM GAS /tmp/ccZ0BHQJ.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and a pointer to the user callback function. + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) Use function HAL_SPI_UnRegisterCallback to reset a callback to the default + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** weak function. + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_UnRegisterCallback takes as parameters the HAL peripheral handle, + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and the Callback ID. + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** This function allows to reset following callbacks: + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxCpltCallback : SPI Tx Completed callback + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) RxCpltCallback : SPI Rx Completed callback + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxRxCpltCallback : SPI TxRx Completed callback + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxHalfCpltCallback : SPI Tx Half Completed callback + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) RxHalfCpltCallback : SPI Rx Half Completed callback + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TxRxHalfCpltCallback : SPI TxRx Half Completed callback + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) ErrorCallback : SPI Error callback + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) AbortCpltCallback : SPI Abort callback + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) MspInitCallback : SPI Msp Init callback + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) MspDeInitCallback : SPI Msp DeInit callback + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** By default, after the HAL_SPI_Init() and when the state is HAL_SPI_STATE_RESET + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** all callbacks are set to the corresponding weak functions: + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** examples HAL_SPI_MasterTxCpltCallback(), HAL_SPI_MasterRxCpltCallback(). + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Exception done for MspInit and MspDeInit functions that are + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** reset to the legacy weak functions in the HAL_SPI_Init()/ HAL_SPI_DeInit() only when + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** these callbacks are null (not registered beforehand). + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** If MspInit or MspDeInit are not null, the HAL_SPI_Init()/ HAL_SPI_DeInit() + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Callbacks can be registered/unregistered in HAL_SPI_STATE_READY state only. + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** in HAL_SPI_STATE_READY or HAL_SPI_STATE_RESET state, + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** using HAL_SPI_RegisterCallback() before calling HAL_SPI_DeInit() + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** or HAL_SPI_Init() function. + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** When the compilation define USE_HAL_PPP_REGISTER_CALLBACKS is set to 0 or + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** not defined, the callback registering feature is not available + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and weak (surcharged) callbacks are used. + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Using the HAL it is not possible to reach all supported SPI frequency with the different SPI + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the following table resume the max SPI frequency reached with data size 8bits/16bits, + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** according to frequency of the APBx Peripheral Clock (fPCLK) used by the SPI instance. + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @endverbatim + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Additional table : + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** DataSize = SPI_DATASIZE_8BIT: + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +------------------------------------------------------------------------------------------- + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | Process | Transfer mode |---------------------|----------------------|------------------- + ARM GAS /tmp/ccZ0BHQJ.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | | Master | Slave | Master | Slave | Master | Slave + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** |=========================================================================================== + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | T | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X |----------------|----------|----------|-----------|----------|-----------|------- + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | / | Interrupt | Fpclk/4 | Fpclk/16 | NA | NA | NA | NA + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | R |----------------|----------|----------|-----------|----------|-----------|------- + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X | DMA | Fpclk/2 | Fpclk/2 | NA | NA | NA | NA + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** |=========|================|==========|==========|===========|==========|===========|======= + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | Polling | Fpclk/4 | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/ + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | |----------------|----------|----------|-----------|----------|-----------|------- + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | R | Interrupt | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/ + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X |----------------|----------|----------|-----------|----------|-----------|------- + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | DMA | Fpclk/4 | Fpclk/2 | Fpclk/2 | Fpclk/16 | Fpclk/2 | Fpclk/ + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** |=========|================|==========|==========|===========|==========|===========|======= + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | Polling | Fpclk/8 | Fpclk/2 | NA | NA | Fpclk/8 | Fpclk/ + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | |----------------|----------|----------|-----------|----------|-----------|------- + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | T | Interrupt | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/16 | Fpclk/ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X |----------------|----------|----------|-----------|----------|-----------|------- + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | DMA | Fpclk/2 | Fpclk/2 | NA | NA | Fpclk/8 | Fpclk/ + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +------------------------------------------------------------------------------------------- + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** DataSize = SPI_DATASIZE_16BIT: + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +------------------------------------------------------------------------------------------- + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | Process | Transfer mode |---------------------|----------------------|------------------- + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | | Master | Slave | Master | Slave | Master | Slave + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** |=========================================================================================== + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | T | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X |----------------|----------|----------|-----------|----------|-----------|------- + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | / | Interrupt | Fpclk/4 | Fpclk/16 | NA | NA | NA | NA + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | R |----------------|----------|----------|-----------|----------|-----------|------- + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X | DMA | Fpclk/2 | Fpclk/2 | NA | NA | NA | NA + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** |=========|================|==========|==========|===========|==========|===========|======= + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | Polling | Fpclk/4 | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | |----------------|----------|----------|-----------|----------|-----------|------- + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | R | Interrupt | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/ + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X |----------------|----------|----------|-----------|----------|-----------|------- + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | DMA | Fpclk/4 | Fpclk/2 | Fpclk/2 | Fpclk/16 | Fpclk/2 | Fpclk/ + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** |=========|================|==========|==========|===========|==========|===========|======= + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | Polling | Fpclk/8 | Fpclk/2 | NA | NA | Fpclk/8 | Fpclk/ + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | |----------------|----------|----------|-----------|----------|-----------|------- + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | T | Interrupt | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/16 | Fpclk/ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | X |----------------|----------|----------|-----------|----------|-----------|------- + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** | | DMA | Fpclk/2 | Fpclk/2 | NA | NA | Fpclk/8 | Fpclk/ + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +------------------------------------------------------------------------------------------- + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bi + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @note + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA() + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Includes ------------------------------------------------------------------*/ + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #include "stm32f3xx_hal.h" + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @addtogroup STM32F3xx_HAL_Driver + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI SPI + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI HAL module driver + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #ifdef HAL_SPI_MODULE_ENABLED + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Private typedef -----------------------------------------------------------*/ + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Private defines -----------------------------------------------------------*/ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Private_Constants SPI Private Constants + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #define SPI_DEFAULT_TIMEOUT 100U + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Private macros ------------------------------------------------------------*/ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Private variables ---------------------------------------------------------*/ + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Private function prototypes -----------------------------------------------*/ + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Private_Functions SPI Private Functions + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma); + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma); + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma); + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma); + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma); + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma); + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAError(DMA_HandleTypeDef *hdma); + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma); + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma); + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma); + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, Flag + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout, uint32_t Tickstart); + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout, uint32_t Tickstart); + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi); + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi); + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi); + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi); + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi); + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi); + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi); + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi); + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi); + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi); + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi); + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi); + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi); + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi); + ARM GAS /tmp/ccZ0BHQJ.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi); + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi); + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t T + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Exported functions --------------------------------------------------------*/ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Exported_Functions SPI Exported Functions + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Initialization and Configuration functions + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @verbatim + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ##### Initialization and de-initialization functions ##### + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] This subsection provides a set of functions allowing to initialize and + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** de-initialize the SPIx peripheral: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) User must implement HAL_SPI_MspInit() function in which he configures + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) Call the function HAL_SPI_Init() to configure the selected device with + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the selected configuration: + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) Mode + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) Direction + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) Data Size + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) Clock Polarity and Phase + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) NSS Management + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) BaudRate Prescaler + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) FirstBit + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) TIMode + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) CRC Calculation + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) CRC Polynomial if CRC enabled + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) CRC Length, used only with Data8 and Data16 + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) FIFO reception threshold + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) Call the function HAL_SPI_DeInit() to restore the default configuration + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** of the selected SPIx peripheral. + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @endverbatim + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Initialize the SPI according to the specified parameters + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * in the SPI_InitTypeDef and initialize the associated handle. + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t frxth; + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi == NULL) + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_ERROR; + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the parameters */ + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_MODE(hspi->Init.Mode)); + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION(hspi->Init.Direction)); + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSS(hspi->Init.NSS)); + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Mode == SPI_MODE_MASTER) + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Force polarity and phase to TI protocaol requirements */ + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPolarity = SPI_POLARITY_LOW; + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPhase = SPI_PHASE_1EDGE; + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation)); + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength)); + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State == HAL_SPI_STATE_RESET) + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Allocate lock resource and initialize it */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Lock = HAL_UNLOCKED; + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init the SPI Callback settings */ + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->MspInitCallback == NULL) + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC... */ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback(hspi); + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC... */ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_MspInit(hspi); + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY; + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the selected SPI peripheral */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Align by default the rs fifo threshold on the data size */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** frxth = SPI_RXFIFO_THRESHOLD_HF; + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** frxth = SPI_RXFIFO_THRESHOLD_QF; + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC calculation is valid only for 16Bit and 8 Bit */ + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT)) + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC must be disabled */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management, + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Communication speed, First bit and CRC calculation state */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) | + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.CLKPolarity & SPI_CR1_CPOL) | + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.CLKPhase & SPI_CR1_CPHA) | + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.NSS & SPI_CR1_SSM) | + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); + ARM GAS /tmp/ccZ0BHQJ.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*---------------------------- SPIx CRCL Configuration -------------------*/ + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Align the CRC Length on the data size */ + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE) + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC Length aligned on the data size : value set by default */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT; + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT; + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : CRC Length */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCL); + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */ + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.TIMode & SPI_CR2_FRF) | + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.NSSPMode & SPI_CR2_NSSP) | + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.DataSize & SPI_CR2_DS_Msk) | + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (frxth & SPI_CR2_FRXTH))); + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*---------------------------- SPIx CRCPOLY Configuration ------------------*/ + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : CRC Polynomial */ + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** WRITE_REG(hspi->Instance->CRCPR, (hspi->Init.CRCPolynomial & SPI_CRCPR_CRCPOLY_Msk)); + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if defined(SPI_I2SCFGR_I2SMOD) + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* SPI_I2SCFGR_I2SMOD */ + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief De-Initialize the SPI peripheral. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + ARM GAS /tmp/ccZ0BHQJ.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi == NULL) + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_ERROR; + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check SPI Instance parameter */ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY; + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI Peripheral Clock */ + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->MspDeInitCallback == NULL) + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */ + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback(hspi); + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_MspDeInit(hspi); + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_RESET; + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Release Lock */ + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Initialize the SPI MSP. + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_MspInit should be implemented in the user file + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + ARM GAS /tmp/ccZ0BHQJ.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief De-Initialize the SPI MSP. + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_MspDeInit should be implemented in the user file + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Register a User SPI Callback + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * To be used instead of the weak predefined callback + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi Pointer to a SPI_HandleTypeDef structure that contains + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI. + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param CallbackID ID of the callback to be registered + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pCallback pointer to the Callback function + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef Callb + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** pSPI_CallbackTypeDef pCallback) + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef status = HAL_OK; + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (pCallback == NULL) + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode |= HAL_SPI_ERROR_INVALID_CALLBACK; + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_ERROR; + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_SPI_STATE_READY == hspi->State) + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_COMPLETE_CB_ID : + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback = pCallback; + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_COMPLETE_CB_ID : + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback = pCallback; + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_COMPLETE_CB_ID : + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback = pCallback; + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_HALF_COMPLETE_CB_ID : + ARM GAS /tmp/ccZ0BHQJ.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback = pCallback; + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_HALF_COMPLETE_CB_ID : + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback = pCallback; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID : + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback = pCallback; + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ERROR_CB_ID : + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback = pCallback; + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ABORT_CB_ID : + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback = pCallback; + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = pCallback; + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = pCallback; + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else if (HAL_SPI_STATE_RESET == hspi->State) + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = pCallback; + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = pCallback; + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Release Lock */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return status; + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Unregister an SPI Callback + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * SPI callback is redirected to the weak predefined callback + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi Pointer to a SPI_HandleTypeDef structure that contains + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI. + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param CallbackID ID of the callback to be unregistered + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef Cal + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef status = HAL_OK; + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_SPI_STATE_READY == hspi->State) + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_COMPLETE_CB_ID : + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_COMPLETE_CB_ID : + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_COMPLETE_CB_ID : + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_HALF_COMPLETE_CB_ID : + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallbac + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_HALF_COMPLETE_CB_ID : + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallbac + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID : + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallb + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ERROR_CB_ID : + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ABORT_CB_ID : + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else if (HAL_SPI_STATE_RESET == hspi->State) + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Release Lock */ + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + ARM GAS /tmp/ccZ0BHQJ.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return status; + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Exported_Functions_Group2 IO operation functions + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Data transfers functions + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @verbatim + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ============================================================================== + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ##### IO operation functions ##### + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** This subsection provides a set of functions allowing to manage the SPI + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** data transfers. + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] The SPI supports master and slave mode : + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) There are two modes of transfer: + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) Blocking mode: The communication is performed in polling mode. + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The HAL status of all data processing is returned by the same function + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** after finishing transfer. + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) No-Blocking mode: The communication is performed using Interrupts + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** or DMA, These APIs return the HAL status. + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The end of the data processing will be indicated through the + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** using DMA mode. + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() u + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will be executed respectively at the end of the transmit or Receive process + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either I + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** exist for 1Line (simplex) and 2Lines (full duplex) modes. + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @endverbatim + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit an amount of data in blocking mode. + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); + ARM GAS /tmp/ccZ0BHQJ.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX; + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)NULL; + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 17 + + + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->TxXferCount > 0U) + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until TXE flag is set to send data */ + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 8 Bit mode */ + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* write on the data register in packing mode */ + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->TxXferCount > 0U) + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until TXE flag is set to send data */ + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 18 + + + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* write on the data register in packing mode */ + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear overrun flag in 2 Lines communication mode because received is not read */ + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_2LINES) + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error: + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + ARM GAS /tmp/ccZ0BHQJ.s page 19 + + +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Receive an amount of data in blocking mode. +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be received +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)NULL; +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + ARM GAS /tmp/ccZ0BHQJ.s page 20 + + +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* this is done to handle the CRCNEXT before the latest data */ +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the Rx Fifo threshold */ +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction: 1Line */ +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 8 Bit mode */ +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT) +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transfer loop */ +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->RxXferCount > 0U) +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the RXNE flag */ +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* read the received data */ +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ + ARM GAS /tmp/ccZ0BHQJ.s page 21 + + +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transfer loop */ +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->RxXferCount > 0U) +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the RXNE flag */ +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Handle the CRC Transmission */ +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* freeze the CRC before the latest data */ +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read the latest data */ +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* the latest data has not been received */ +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive last data in 16 Bit mode */ +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive last data in 8 Bit mode */ +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 22 + + +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait the CRC data */ +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC to Flush DR and RXNE flag */ +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC */ +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16B +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); + ARM GAS /tmp/ccZ0BHQJ.s page 23 + + +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit and Receive an amount of data in blocking mode. +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pTxData pointer to transmission data buffer +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pRxData pointer to reception data buffer +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent and received +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxDa +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout) +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_RxXferCount; +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t spi_cr1; +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t spi_cr2; +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Variable used to alternate Rx and Tx during transfer */ +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t txallowed = 1U; +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 24 + + +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init temporary variables */ +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_state = hspi->State; +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_RxXferCount = Size; +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** spi_cr1 = READ_REG(hspi->Instance->CR1); +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** spi_cr2 = READ_REG(hspi->Instance->CR2); +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (!((tmp_state == HAL_SPI_STATE_READY) || \ +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_RX) +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX_RX; +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the Rx Fifo threshold */ +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (initial_RxXferCount > 1U)) +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set fiforxthreshold according the reception data length: 16bit */ +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + ARM GAS /tmp/ccZ0BHQJ.s page 25 + + +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set fiforxthreshold according the reception data length: 8bit */ +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit and Receive data in 16 Bit mode */ +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check TXE flag */ +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U) +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 0U; +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check RXNE flag */ +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 1U; +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 26 + + +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit and Receive data in 8 Bit mode */ +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check TXE flag */ +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U) +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 0U; +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 27 + + +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until RXNE flag is reset */ +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount > 1U) +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold before to switch on 8 bit data size */ +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 1U; +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout = +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC from DR to close CRC calculation process */ +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until TXE flag */ +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC */ +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC */ +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; + ARM GAS /tmp/ccZ0BHQJ.s page 28 + + +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear CRC Flag */ +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit an amount of data in non-blocking mode with Interrupt. +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + ARM GAS /tmp/ccZ0BHQJ.s page 29 + + +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX; +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)NULL; +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the function for IT treatment */ +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_TxISR_16BIT; +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_TxISR_8BIT; +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 30 + + +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE and ERR interrupt */ +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Receive an amount of data in non-blocking mode with Interrupt. +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + ARM GAS /tmp/ccZ0BHQJ.s page 31 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)NULL; +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the data size to adapt Rx threshold and the set the function for IT treatment */ +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16 bit */ +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BIT; +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8 bit */ +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BIT; +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 1U; +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 2U; +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 0U; +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE and ERR interrupt */ +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); + ARM GAS /tmp/ccZ0BHQJ.s page 32 + + +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Note : The SPI must be enabled after unlocking current process +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** to avoid the risk of SPI interrupt handle execution before current +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** process unlock */ +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pTxData pointer to transmission data buffer +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pRxData pointer to reception data buffer +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent and received +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pR +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init temporary variables */ +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_state = hspi->State; +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (!((tmp_state == HAL_SPI_STATE_READY) || \ +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ + ARM GAS /tmp/ccZ0BHQJ.s page 33 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_RX) +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX_RX; +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the function for IT treatment */ +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_16BIT; +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_8BIT; +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 1U; +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 2U; +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 0U; +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if packing mode is enabled and if there is more than 2 data to receive */ +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size >= 2U)) +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16 bit */ +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8 bit */ +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE, RXNE and ERR interrupt */ +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); + ARM GAS /tmp/ccZ0BHQJ.s page 34 + + +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit an amount of data in non-blocking mode with DMA. +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check tx dma handle */ +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX; +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)NULL; +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + ARM GAS /tmp/ccZ0BHQJ.s page 35 + + +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI TxDMA Half transfer complete callback */ +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt; +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI TxDMA transfer complete callback */ +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt; +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA error callback */ +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = SPI_DMAError; +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA AbortCpltCallback */ +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode is enabled only if the DMA setting is HALWORD */ +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDA +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the even/odd of the data size + crc if enabled */ +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount & 0x1U) == 0U) +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U); +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Tx DMA Stream/Channel */ +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instanc +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 36 + + +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI Error Interrupt Bit */ +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Tx DMA Request */ +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Receive an amount of data in non-blocking mode with DMA. +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When the CRC feature is enabled the pData Length must be Size + 1. +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check rx dma handle */ +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check tx dma handle */ +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size); +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + ARM GAS /tmp/ccZ0BHQJ.s page 37 + + +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F373xC) || defined (STM32F358xx +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode management is enabled by the DMA settings */ +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDA +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restriction the DMA data received is not allowed in this mode */ +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* STM32F302xC || STM32F303xC || STM32F373xC || STM32F358xx || STM32F378xx */ +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); + ARM GAS /tmp/ccZ0BHQJ.s page 38 + + +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount & 0x1U) == 0x0U) +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI RxDMA Half transfer complete callback */ +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Rx DMA transfer complete callback */ +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA error callback */ +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferErrorCallback = SPI_DMAError; +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA AbortCpltCallback */ +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Rx DMA Stream/Channel */ +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBu +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI Error Interrupt Bit */ +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Rx DMA Request */ +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error: +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ + ARM GAS /tmp/ccZ0BHQJ.s page 39 + + +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pTxData pointer to transmission data buffer +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pRxData pointer to reception data buffer +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When the CRC feature is enabled the pRxData Length must be Size + 1 +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *p +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t Size) +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check rx & tx dma handles */ +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init temporary variables */ +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_state = hspi->State; +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (!((tmp_state == HAL_SPI_STATE_READY) || +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_RX) +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX_RX; +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + ARM GAS /tmp/ccZ0BHQJ.s page 40 + + +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F373xC) || defined (STM32F358xx +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode management is enabled by the DMA settings */ +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDA +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restriction the DMA data received is not allowed in this mode */ +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* STM32F302xC || STM32F303xC || STM32F373xC || STM32F358xx || STM32F378xx */ +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset the threshold bit */ +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX); +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The packing mode management is enabled by the DMA settings according the spi data size */ +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set fiforxthreshold according the reception data length: 16bit */ +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferSize & 0x1U) == 0x0U) +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = hspi->TxXferCount >> 1U; +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) + ARM GAS /tmp/ccZ0BHQJ.s page 41 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount & 0x1U) == 0x0U) +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback * +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State == HAL_SPI_STATE_BUSY_RX) +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Rx DMA Half transfer complete callback */ +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Tx/Rx DMA Half transfer complete callback */ +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt; +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA error callback */ +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferErrorCallback = SPI_DMAError; +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA AbortCpltCallback */ +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Rx DMA Stream/Channel */ +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBu +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Rx DMA Request */ +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** is performed in DMA reception complete callback */ +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferHalfCpltCallback = NULL; +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + ARM GAS /tmp/ccZ0BHQJ.s page 42 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Tx DMA Stream/Channel */ +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instanc +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI Error Interrupt Bit */ +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Tx DMA Request */ +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Abort ongoing transfer (blocking mode). +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle. +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx), +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * started in Interrupt or DMA mode. +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * This procedure performs following operations : +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable SPI Interrupts (depending of transfer direction) +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Set handle State to READY +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure is executed in blocking mode : when exiting function, Abort is considere +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi) +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialized local variable */ +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_OK; +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */ +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE); +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 43 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */ +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)) +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_AbortTx_ISR; +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_AbortRx_ISR; +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx request if enabled */ +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */ +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */ +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Tx Handle linked to SPI Peripheral */ +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK) +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Tx DMA Request */ +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN)); +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + ARM GAS /tmp/ccZ0BHQJ.s page 44 + + +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Rx request if enabled */ +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */ +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */ +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Rx Handle linked to SPI Peripheral */ +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK) +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable peripheral */ +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx DMA Request */ +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN)); +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Tx and Rx transfer counters */ +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check error during Abort procedure */ +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT) +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* return HAL_Error in case of error during Abort procedure */ +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + ARM GAS /tmp/ccZ0BHQJ.s page 45 + + +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->state to ready */ +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Abort ongoing transfer (Interrupt mode). +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle. +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx), +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * started in Interrupt or DMA mode. +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * This procedure performs following operations : +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable SPI Interrupts (depending of transfer direction) +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Set handle State to READY +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - At abort completion, call user abort complete callback +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * considered as completed only when user abort complete callback is executed (not when ex +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi) +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t abortcplt ; +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialized local variable */ +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_OK; +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 1U; +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */ +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE); +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */ +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)) +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_AbortTx_ISR; +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 46 + + +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_AbortRx_ISR; +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks sho +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** before any call to DMA Abort functions */ +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Tx Handle is valid */ +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Otherwise, set it to NULL */ +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback; +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Rx Handle is valid */ +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. +2585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Otherwise, set it to NULL */ +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback; +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 47 + + +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx request if enabled */ +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Tx Stream/Channel */ +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Tx Handle linked to SPI Peripheral */ +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK) +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 0U; +2611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Rx request if enabled */ +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Rx Stream/Channel */ +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Rx Handle linked to SPI Peripheral */ +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort_IT(hspi->hdmarx) != HAL_OK) +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 0U; +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (abortcplt == 1U) +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Tx and Rx transfer counters */ +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check error during Abort procedure */ +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT) +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* return HAL_Error in case of error during Abort procedure */ +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); + ARM GAS /tmp/ccZ0BHQJ.s page 48 + + +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->State to Ready */ +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback(hspi); +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_AbortCpltCallback(hspi); +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Pause the DMA Transfer. +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi) +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx & Rx requests */ +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Resume the DMA Transfer. +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi) +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI DMA Tx & Rx requests */ +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + ARM GAS /tmp/ccZ0BHQJ.s page 49 + + +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Stop the DMA Transfer. +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The Lock is not implemented on this API to allow the user application +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() o +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA tx Stream/Channel */ +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort(hspi->hdmatx)) +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA rx Stream/Channel */ +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort(hspi->hdmarx)) +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx & Rx requests */ +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle SPI interrupt request. +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi) +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itsource = hspi->Instance->CR2; +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI in mode Receiver ----------------------------------------------------*/ +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR(hspi); +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 50 + + +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI in mode Transmitter -------------------------------------------------*/ +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR(hspi); +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI in Error Treatment --------------------------------------------------*/ +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI Overrun error interrupt occurred ----------------------------------*/ +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) +2781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_TX) +2783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR); +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI Mode Fault error interrupt occurred -------------------------------*/ +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) +2796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF); +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_MODFFLAG(hspi); +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI Frame error interrupt occurred ------------------------------------*/ +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET) +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE); +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable all interrupts */ +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR); +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA requests if enabled */ +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN) +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN)); +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Rx channel */ +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ + ARM GAS /tmp/ccZ0BHQJ.s page 51 + + +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError; +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Tx channel */ +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError; +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +2849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx Transfer completed callback. +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxCpltCallback should be implemented in the user file +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx Transfer completed callback. +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccZ0BHQJ.s page 52 + + +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_RxCpltCallback should be implemented in the user file +2885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx and Rx Transfer completed callback. +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxRxCpltCallback should be implemented in the user file +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx Half Transfer completed callback. +2906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi) +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxHalfCpltCallback should be implemented in the user file +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx Half Transfer completed callback. +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi) +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file +2933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx and Rx Half Transfer callback. + ARM GAS /tmp/ccZ0BHQJ.s page 53 + + +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi) +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI error callback. +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_ErrorCallback should be implemented in the user file +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and user can use HAL_SPI_GetError() API to check the latest error occurred +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI Abort Complete callback. +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle. +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi) +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_AbortCpltCallback can be implemented in the user file. +2983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI control functions +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @verbatim +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== + ARM GAS /tmp/ccZ0BHQJ.s page 54 + + +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ##### Peripheral State and Errors functions ##### +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** This subsection provides a set of functions allowing to control the SPI. +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) HAL_SPI_GetError() check in run-time Errors occurring during communication +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @endverbatim +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Return the SPI handle state. +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval SPI state +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI handle state */ +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return hspi->State; +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Return the SPI error code. +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval SPI error code in bitmap format +3022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI ErrorCode */ +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return hspi->ErrorCode; +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} +3031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @addtogroup SPI_Private_Functions +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Private functions +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI transmit process complete callback. +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + ARM GAS /tmp/ccZ0BHQJ.s page 55 + + +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Normal Mode */ +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC) +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Tx DMA Request */ +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear overrun flag in 2 Lines communication mode because received data is not read */ +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_2LINES) +3073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Tx complete callback */ +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback(hspi); +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxCpltCallback(hspi); +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI receive process complete callback. +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + ARM GAS /tmp/ccZ0BHQJ.s page 56 + + +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +3117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Normal Mode */ +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC) +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC handling */ +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until RXNE flag */ +3129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) ! +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC */ +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC */ +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstar +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + ARM GAS /tmp/ccZ0BHQJ.s page 57 + + +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if we are in Master RX 2 line mode */ +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Normal case */ +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback(hspi); +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxCpltCallback(hspi); +3213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI transmit receive process complete callback. +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) + ARM GAS /tmp/ccZ0BHQJ.s page 58 + + +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Normal Mode */ +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC) +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC handling */ +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BI +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart) != HAL_OK) +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TI +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC to Flush DR and RXNE flag */ +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 59 + + +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx/Tx DMA Request */ +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ +3309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback(hspi); +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxRxCpltCallback(hspi); +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI half transmit process complete callback. +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Tx half complete callback */ +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback(hspi); +3329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxHalfCpltCallback(hspi); +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI half receive process complete callback +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + ARM GAS /tmp/ccZ0BHQJ.s page 60 + + +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx half complete callback */ +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback(hspi); +3347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxHalfCpltCallback(hspi); +3349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI half transmit receive process complete callback. +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx half complete callback */ +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback(hspi); +3365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxRxHalfCpltCallback(hspi); +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI communication error callback. +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAError(DMA_HandleTypeDef *hdma) +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Stop the disable DMA transfer on SPI side */ +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + ARM GAS /tmp/ccZ0BHQJ.s page 61 + + +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI communication abort callback, when initiated by HAL services on Error +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * (To be called at end of DMA Abort procedure following error occurrence). +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma DMA handle. +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI Tx communication abort callback, when initiated by user +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * (To be called at end of DMA Tx Abort procedure following user abort request). +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When this callback is executed, User Abort complete call back is called only if no +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * Abort still ongoing for Rx DMA Handle. +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma DMA handle. +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Tx DMA Request */ +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL +3440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if an Abort process is still ongoing */ +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +3446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx->XferAbortCallback != NULL) +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 62 + + +3451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check no error during Abort procedure */ +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT) +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->State to Ready */ +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Abort complete callback */ +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback(hspi); +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_AbortCpltCallback(hspi); +3476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI Rx communication abort callback, when initiated by user +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * (To be called at end of DMA Rx Abort procedure following user abort request). +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When this callback is executed, User Abort complete call back is called only if no +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * Abort still ongoing for Tx DMA Handle. +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma DMA handle. +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +3493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx DMA Request */ +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 63 + + +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if an Abort process is still ongoing */ +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +3513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx->XferAbortCallback != NULL) +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check no error during Abort procedure */ +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT) +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->State to Ready */ +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Abort complete callback */ +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback(hspi); +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_AbortCpltCallback(hspi); +3543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. +3548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in packing mode */ +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount > 1U) +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 64 + + +3565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 8 Bit mode */ +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR); +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check end of the reception */ +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_8BITCRC; +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC to flush Data Register */ +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize--; +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check end of the reception */ +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->CRCSize == 0U) +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); + ARM GAS /tmp/ccZ0BHQJ.s page 65 + + +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode. +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in packing Bit mode */ +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount >= 2U) +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; +3645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 8 Bit mode */ +3647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transmission */ +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set CRC Next Bit to send CRC */ +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + ARM GAS /tmp/ccZ0BHQJ.s page 66 + + +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode. +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 16 Bit mode */ +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_16BITCRC; +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE interrupt */ +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode. +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC to flush Data Register */ +3723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE interrupt */ +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode. + ARM GAS /tmp/ccZ0BHQJ.s page 67 + + +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set CRC Next Bit to send CRC */ +3754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the CRC 8-bit receive in Interrupt context. +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC to flush Data Register */ +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize--; +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->CRCSize == 0U) + ARM GAS /tmp/ccZ0BHQJ.s page 68 + + +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the receive 8-bit in Interrupt context. +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BITCRC; +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the CRC 16-bit receive in Interrupt context. +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC to flush Data Register */ +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); + ARM GAS /tmp/ccZ0BHQJ.s page 69 + + +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the 16-bit receive in Interrupt context. +3857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BITCRC; +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the data 8-bit transmit in Interrupt mode. +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + ARM GAS /tmp/ccZ0BHQJ.s page 70 + + +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseTx_ISR(hspi); +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the data 16-bit transmit in Interrupt mode. +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseTx_ISR(hspi); +3936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle SPI Communication Timeout. +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Flag SPI flag to check +3944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param State flag state to check +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +3947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +3948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, Flag +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout, uint32_t Tickstart) +3951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 29 .loc 1 3951 1 view -0 + 30 .cfi_startproc + 31 @ args = 4, pretend = 0, frame = 8 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 .loc 1 3951 1 is_stmt 0 view .LVU1 + 34 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 35 .cfi_def_cfa_offset 32 + 36 .cfi_offset 4, -32 + 37 .cfi_offset 5, -28 + 38 .cfi_offset 6, -24 + 39 .cfi_offset 7, -20 + 40 .cfi_offset 8, -16 + ARM GAS /tmp/ccZ0BHQJ.s page 71 + + + 41 .cfi_offset 9, -12 + 42 .cfi_offset 10, -8 + 43 .cfi_offset 14, -4 + 44 0004 82B0 sub sp, sp, #8 + 45 .cfi_def_cfa_offset 40 + 46 0006 0546 mov r5, r0 + 47 0008 8846 mov r8, r1 + 48 000a 1746 mov r7, r2 + 49 000c 1E46 mov r6, r3 +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 50 .loc 1 3952 3 is_stmt 1 view .LVU2 +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_timeout; + 51 .loc 1 3953 3 view .LVU3 +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_tickstart; + 52 .loc 1 3954 3 view .LVU4 +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Adjust Timeout value in case of end of transfer */ +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); + 53 .loc 1 3957 3 view .LVU5 + 54 .loc 1 3957 30 is_stmt 0 view .LVU6 + 55 000e FFF7FEFF bl HAL_GetTick + 56 .LVL1: + 57 .loc 1 3957 44 discriminator 1 view .LVU7 + 58 0012 0A9B ldr r3, [sp, #40] + 59 0014 1B1A subs r3, r3, r0 + 60 .loc 1 3957 17 discriminator 1 view .LVU8 + 61 0016 03EB0609 add r9, r3, r6 + 62 .LVL2: +3958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_tickstart = HAL_GetTick(); + 63 .loc 1 3958 3 is_stmt 1 view .LVU9 + 64 .loc 1 3958 19 is_stmt 0 view .LVU10 + 65 001a FFF7FEFF bl HAL_GetTick + 66 .LVL3: + 67 001e 8246 mov r10, r0 + 68 .LVL4: +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); + 69 .loc 1 3961 3 is_stmt 1 view .LVU11 + 70 .loc 1 3961 43 is_stmt 0 view .LVU12 + 71 0020 284B ldr r3, .L16 + 72 0022 1B68 ldr r3, [r3] + 73 .loc 1 3961 50 view .LVU13 + 74 0024 C3F3CB33 ubfx r3, r3, #15, #12 + 75 .loc 1 3961 23 view .LVU14 + 76 0028 09FB03F3 mul r3, r9, r3 + 77 .loc 1 3961 9 view .LVU15 + 78 002c 0193 str r3, [sp, #4] +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) + 79 .loc 1 3963 3 is_stmt 1 view .LVU16 + 80 .LVL5: + 81 .L3: + 82 .loc 1 3963 57 view .LVU17 + 83 .loc 1 3963 11 is_stmt 0 view .LVU18 + 84 002e 2B68 ldr r3, [r5] + 85 0030 9C68 ldr r4, [r3, #8] + ARM GAS /tmp/ccZ0BHQJ.s page 72 + + + 86 .loc 1 3963 48 view .LVU19 + 87 0032 38EA0404 bics r4, r8, r4 + 88 0036 0CBF ite eq + 89 0038 0123 moveq r3, #1 + 90 003a 0023 movne r3, #0 + 91 .loc 1 3963 57 view .LVU20 + 92 003c BB42 cmp r3, r7 + 93 003e 3DD0 beq .L12 +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (Timeout != HAL_MAX_DELAY) + 94 .loc 1 3965 5 is_stmt 1 view .LVU21 + 95 .loc 1 3965 8 is_stmt 0 view .LVU22 + 96 0040 B6F1FF3F cmp r6, #-1 + 97 0044 F3D0 beq .L3 +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) + 98 .loc 1 3967 7 is_stmt 1 view .LVU23 + 99 .loc 1 3967 13 is_stmt 0 view .LVU24 + 100 0046 FFF7FEFF bl HAL_GetTick + 101 .LVL6: + 102 .loc 1 3967 27 discriminator 1 view .LVU25 + 103 004a A0EB0A00 sub r0, r0, r10 + 104 .loc 1 3967 10 discriminator 1 view .LVU26 + 105 004e 4845 cmp r0, r9 + 106 0050 07D2 bcs .L13 +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI and reset the CRC: the CRC value should be cleared +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** on both master and slave sides in order to resynchronize the master +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and slave for their respective CRC calculation */ +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); +3975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI peripheral */ +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +3987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +3993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop proced +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 107 .loc 1 3997 7 is_stmt 1 view .LVU27 + 108 .loc 1 3997 17 is_stmt 0 view .LVU28 + ARM GAS /tmp/ccZ0BHQJ.s page 73 + + + 109 0052 019A ldr r2, [sp, #4] + 110 .loc 1 3997 10 view .LVU29 + 111 0054 02B1 cbz r2, .L9 + 112 0056 4A46 mov r2, r9 + 113 .L9: + 114 .LVL7: +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = 0U; +4000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 115 .loc 1 4001 7 is_stmt 1 view .LVU30 + 116 .loc 1 4001 12 is_stmt 0 view .LVU31 + 117 0058 019B ldr r3, [sp, #4] + 118 005a 013B subs r3, r3, #1 + 119 005c 0193 str r3, [sp, #4] + 120 005e 9146 mov r9, r2 + 121 0060 E5E7 b .L3 + 122 .LVL8: + 123 .L13: +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 124 .loc 1 3974 9 is_stmt 1 view .LVU32 + 125 0062 2A68 ldr r2, [r5] + 126 0064 5368 ldr r3, [r2, #4] + 127 0066 23F0E003 bic r3, r3, #224 + 128 006a 5360 str r3, [r2, #4] +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 129 .loc 1 3976 9 view .LVU33 +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 130 .loc 1 3976 24 is_stmt 0 view .LVU34 + 131 006c 6B68 ldr r3, [r5, #4] +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 132 .loc 1 3976 12 view .LVU35 + 133 006e B3F5827F cmp r3, #260 + 134 0072 0BD0 beq .L14 + 135 .L5: +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 136 .loc 1 3984 9 is_stmt 1 view .LVU36 +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 137 .loc 1 3984 23 is_stmt 0 view .LVU37 + 138 0074 AB6A ldr r3, [r5, #40] +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 139 .loc 1 3984 12 view .LVU38 + 140 0076 B3F5005F cmp r3, #8192 + 141 007a 14D0 beq .L15 + 142 .L7: +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 143 .loc 1 3986 11 is_stmt 1 discriminator 1 view .LVU39 +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 144 .loc 1 3989 9 view .LVU40 +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 145 .loc 1 3989 21 is_stmt 0 view .LVU41 + 146 007c 0123 movs r3, #1 + 147 007e 85F85D30 strb r3, [r5, #93] +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 148 .loc 1 3992 9 is_stmt 1 view .LVU42 +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 149 .loc 1 3992 9 view .LVU43 + ARM GAS /tmp/ccZ0BHQJ.s page 74 + + + 150 0082 0023 movs r3, #0 + 151 0084 85F85C30 strb r3, [r5, #92] +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 152 .loc 1 3992 9 view .LVU44 +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 153 .loc 1 3994 9 view .LVU45 +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 154 .loc 1 3994 16 is_stmt 0 view .LVU46 + 155 0088 0320 movs r0, #3 + 156 008a 18E0 b .L8 + 157 .L14: +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 158 .loc 1 3976 65 discriminator 1 view .LVU47 + 159 008c AB68 ldr r3, [r5, #8] +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 160 .loc 1 3976 50 discriminator 1 view .LVU48 + 161 008e B3F5004F cmp r3, #32768 + 162 0092 02D0 beq .L6 +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 163 .loc 1 3977 54 view .LVU49 + 164 0094 B3F5806F cmp r3, #1024 + 165 0098 ECD1 bne .L5 + 166 .L6: +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 167 .loc 1 3980 11 is_stmt 1 view .LVU50 + 168 009a 2A68 ldr r2, [r5] + 169 009c 1368 ldr r3, [r2] + 170 009e 23F04003 bic r3, r3, #64 + 171 00a2 1360 str r3, [r2] + 172 00a4 E6E7 b .L5 + 173 .L15: +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 174 .loc 1 3986 11 view .LVU51 +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 175 .loc 1 3986 11 view .LVU52 + 176 00a6 2A68 ldr r2, [r5] + 177 00a8 1368 ldr r3, [r2] + 178 00aa 23F40053 bic r3, r3, #8192 + 179 00ae 1360 str r3, [r2] +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 180 .loc 1 3986 11 view .LVU53 + 181 00b0 2A68 ldr r2, [r5] + 182 00b2 1368 ldr r3, [r2] + 183 00b4 43F40053 orr r3, r3, #8192 + 184 00b8 1360 str r3, [r2] + 185 00ba DFE7 b .L7 + 186 .L12: +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 187 .loc 1 4005 10 is_stmt 0 view .LVU54 + 188 00bc 0020 movs r0, #0 + 189 .L8: +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 190 .loc 1 4006 1 view .LVU55 + 191 00be 02B0 add sp, sp, #8 + ARM GAS /tmp/ccZ0BHQJ.s page 75 + + + 192 .cfi_def_cfa_offset 32 + 193 @ sp needed + 194 00c0 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 195 .LVL9: + 196 .L17: + 197 .loc 1 4006 1 view .LVU56 + 198 .align 2 + 199 .L16: + 200 00c4 00000000 .word SystemCoreClock + 201 .cfi_endproc + 202 .LFE177: + 204 .section .text.SPI_WaitFifoStateUntilTimeout,"ax",%progbits + 205 .align 1 + 206 .syntax unified + 207 .thumb + 208 .thumb_func + 210 SPI_WaitFifoStateUntilTimeout: + 211 .LVL10: + 212 .LFB178: +4007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle SPI FIFO Communication Timeout. +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Fifo Fifo to check +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param State Fifo state to check +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +4017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout, uint32_t Tickstart) +4020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 213 .loc 1 4020 1 is_stmt 1 view -0 + 214 .cfi_startproc + 215 @ args = 4, pretend = 0, frame = 8 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 .loc 1 4020 1 is_stmt 0 view .LVU58 + 218 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 219 .cfi_def_cfa_offset 32 + 220 .cfi_offset 4, -32 + 221 .cfi_offset 5, -28 + 222 .cfi_offset 6, -24 + 223 .cfi_offset 7, -20 + 224 .cfi_offset 8, -16 + 225 .cfi_offset 9, -12 + 226 .cfi_offset 10, -8 + 227 .cfi_offset 14, -4 + 228 0004 82B0 sub sp, sp, #8 + 229 .cfi_def_cfa_offset 40 + 230 0006 0646 mov r6, r0 + 231 0008 0C46 mov r4, r1 + 232 000a 1546 mov r5, r2 + 233 000c 1F46 mov r7, r3 +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 234 .loc 1 4021 3 is_stmt 1 view .LVU59 +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_timeout; + ARM GAS /tmp/ccZ0BHQJ.s page 76 + + + 235 .loc 1 4022 3 view .LVU60 +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_tickstart; + 236 .loc 1 4023 3 view .LVU61 +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; + 237 .loc 1 4024 3 view .LVU62 +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; + 238 .loc 1 4025 3 view .LVU63 + 239 .loc 1 4025 17 is_stmt 0 view .LVU64 + 240 000e 0023 movs r3, #0 + 241 .LVL11: + 242 .loc 1 4025 17 view .LVU65 + 243 0010 8DF80330 strb r3, [sp, #3] +4026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Adjust Timeout value in case of end of transfer */ +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); + 244 .loc 1 4028 3 is_stmt 1 view .LVU66 + 245 .loc 1 4028 28 is_stmt 0 view .LVU67 + 246 0014 FFF7FEFF bl HAL_GetTick + 247 .LVL12: + 248 .loc 1 4028 42 discriminator 1 view .LVU68 + 249 0018 0A9B ldr r3, [sp, #40] + 250 001a 1B1A subs r3, r3, r0 + 251 .loc 1 4028 15 discriminator 1 view .LVU69 + 252 001c 03EB0708 add r8, r3, r7 + 253 .LVL13: +4029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_tickstart = HAL_GetTick(); + 254 .loc 1 4029 3 is_stmt 1 view .LVU70 + 255 .loc 1 4029 19 is_stmt 0 view .LVU71 + 256 0020 FFF7FEFF bl HAL_GetTick + 257 .LVL14: + 258 0024 8146 mov r9, r0 + 259 .LVL15: +4030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +4032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; + 260 .loc 1 4032 3 is_stmt 1 view .LVU72 + 261 .loc 1 4032 35 is_stmt 0 view .LVU73 + 262 0026 D6F800A0 ldr r10, [r6] + 263 .LVL16: +4033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U); + 264 .loc 1 4035 3 is_stmt 1 view .LVU74 + 265 .loc 1 4035 43 is_stmt 0 view .LVU75 + 266 002a 304B ldr r3, .L35 + 267 002c 1B68 ldr r3, [r3] + 268 002e 03EB8303 add r3, r3, r3, lsl #2 + 269 0032 C3EBC303 rsb r3, r3, r3, lsl #3 + 270 .loc 1 4035 50 view .LVU76 + 271 0036 1B0D lsrs r3, r3, #20 + 272 .loc 1 4035 23 view .LVU77 + 273 0038 08FB03F3 mul r3, r8, r3 + 274 .loc 1 4035 9 view .LVU78 + 275 003c 0193 str r3, [sp, #4] +4036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((hspi->Instance->SR & Fifo) != State) + 276 .loc 1 4037 3 is_stmt 1 view .LVU79 + ARM GAS /tmp/ccZ0BHQJ.s page 77 + + + 277 .loc 1 4037 9 is_stmt 0 view .LVU80 + 278 003e 02E0 b .L21 + 279 .LVL17: + 280 .L20: +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY)) +4040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Flush Data Register by a blank read */ +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +4044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +4045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (Timeout != HAL_MAX_DELAY) + 281 .loc 1 4047 5 is_stmt 1 view .LVU81 + 282 .loc 1 4047 8 is_stmt 0 view .LVU82 + 283 0040 B7F1FF3F cmp r7, #-1 + 284 0044 12D1 bne .L30 + 285 .L21: +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 286 .loc 1 4037 38 is_stmt 1 view .LVU83 +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 287 .loc 1 4037 15 is_stmt 0 view .LVU84 + 288 0046 3368 ldr r3, [r6] +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 289 .loc 1 4037 25 view .LVU85 + 290 0048 9B68 ldr r3, [r3, #8] +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 291 .loc 1 4037 30 view .LVU86 + 292 004a 03EA040C and ip, r3, r4 +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 293 .loc 1 4037 38 view .LVU87 + 294 004e AC45 cmp ip, r5 + 295 0050 47D0 beq .L31 +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 296 .loc 1 4039 5 is_stmt 1 view .LVU88 +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 297 .loc 1 4039 8 is_stmt 0 view .LVU89 + 298 0052 B4F5C06F cmp r4, #1536 + 299 0056 F3D1 bne .L20 +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 300 .loc 1 4039 32 discriminator 1 view .LVU90 + 301 0058 002D cmp r5, #0 + 302 005a F1D1 bne .L20 +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ + 303 .loc 1 4042 7 is_stmt 1 view .LVU91 +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ + 304 .loc 1 4042 17 is_stmt 0 view .LVU92 + 305 005c 9AF80C30 ldrb r3, [r10, #12] @ zero_extendqisi2 + 306 0060 DBB2 uxtb r3, r3 +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ + 307 .loc 1 4042 15 view .LVU93 + 308 0062 8DF80330 strb r3, [sp, #3] +4044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 309 .loc 1 4044 7 is_stmt 1 view .LVU94 + 310 0066 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 311 006a E9E7 b .L20 + ARM GAS /tmp/ccZ0BHQJ.s page 78 + + + 312 .L30: +4048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) + 313 .loc 1 4049 7 view .LVU95 + 314 .loc 1 4049 13 is_stmt 0 view .LVU96 + 315 006c FFF7FEFF bl HAL_GetTick + 316 .LVL18: + 317 .loc 1 4049 27 discriminator 1 view .LVU97 + 318 0070 A0EB0900 sub r0, r0, r9 + 319 .loc 1 4049 10 discriminator 1 view .LVU98 + 320 0074 4045 cmp r0, r8 + 321 0076 07D2 bcs .L32 +4050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI and reset the CRC: the CRC value should be cleared +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** on both master and slave sides in order to resynchronize the master +4053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and slave for their respective CRC calculation */ +4054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ +4056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN +4060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI peripheral */ +4062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop proced +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 322 .loc 1 4079 7 is_stmt 1 view .LVU99 + 323 .loc 1 4079 17 is_stmt 0 view .LVU100 + 324 0078 019A ldr r2, [sp, #4] + 325 .loc 1 4079 10 view .LVU101 + 326 007a 02B1 cbz r2, .L27 + 327 007c 4246 mov r2, r8 + 328 .L27: + 329 .LVL19: +4080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = 0U; +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 330 .loc 1 4083 7 is_stmt 1 view .LVU102 + 331 .loc 1 4083 12 is_stmt 0 view .LVU103 + 332 007e 019B ldr r3, [sp, #4] + ARM GAS /tmp/ccZ0BHQJ.s page 79 + + + 333 0080 013B subs r3, r3, #1 + 334 0082 0193 str r3, [sp, #4] + 335 0084 9046 mov r8, r2 + 336 0086 DEE7 b .L21 + 337 .LVL20: + 338 .L32: +4056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 339 .loc 1 4056 9 is_stmt 1 view .LVU104 + 340 0088 3268 ldr r2, [r6] + 341 008a 5368 ldr r3, [r2, #4] + 342 008c 23F0E003 bic r3, r3, #224 + 343 0090 5360 str r3, [r2, #4] +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 344 .loc 1 4058 9 view .LVU105 +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 345 .loc 1 4058 24 is_stmt 0 view .LVU106 + 346 0092 7368 ldr r3, [r6, #4] +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 347 .loc 1 4058 12 view .LVU107 + 348 0094 B3F5827F cmp r3, #260 + 349 0098 0BD0 beq .L33 + 350 .L23: +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 351 .loc 1 4066 9 is_stmt 1 view .LVU108 +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 352 .loc 1 4066 23 is_stmt 0 view .LVU109 + 353 009a B36A ldr r3, [r6, #40] +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 354 .loc 1 4066 12 view .LVU110 + 355 009c B3F5005F cmp r3, #8192 + 356 00a0 14D0 beq .L34 + 357 .L25: +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 358 .loc 1 4068 11 is_stmt 1 discriminator 1 view .LVU111 +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 359 .loc 1 4071 9 view .LVU112 +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 360 .loc 1 4071 21 is_stmt 0 view .LVU113 + 361 00a2 0123 movs r3, #1 + 362 00a4 86F85D30 strb r3, [r6, #93] +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 363 .loc 1 4074 9 is_stmt 1 view .LVU114 +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 364 .loc 1 4074 9 view .LVU115 + 365 00a8 0023 movs r3, #0 + 366 00aa 86F85C30 strb r3, [r6, #92] +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 367 .loc 1 4074 9 view .LVU116 +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 368 .loc 1 4076 9 view .LVU117 +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 369 .loc 1 4076 16 is_stmt 0 view .LVU118 + 370 00ae 0320 movs r0, #3 + 371 00b0 18E0 b .L26 + 372 .L33: +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 373 .loc 1 4058 65 discriminator 1 view .LVU119 + ARM GAS /tmp/ccZ0BHQJ.s page 80 + + + 374 00b2 B368 ldr r3, [r6, #8] +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 375 .loc 1 4058 50 discriminator 1 view .LVU120 + 376 00b4 B3F5004F cmp r3, #32768 + 377 00b8 02D0 beq .L24 +4059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 378 .loc 1 4059 54 view .LVU121 + 379 00ba B3F5806F cmp r3, #1024 + 380 00be ECD1 bne .L23 + 381 .L24: +4062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 382 .loc 1 4062 11 is_stmt 1 view .LVU122 + 383 00c0 3268 ldr r2, [r6] + 384 00c2 1368 ldr r3, [r2] + 385 00c4 23F04003 bic r3, r3, #64 + 386 00c8 1360 str r3, [r2] + 387 00ca E6E7 b .L23 + 388 .L34: +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 389 .loc 1 4068 11 view .LVU123 +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 390 .loc 1 4068 11 view .LVU124 + 391 00cc 3268 ldr r2, [r6] + 392 00ce 1368 ldr r3, [r2] + 393 00d0 23F40053 bic r3, r3, #8192 + 394 00d4 1360 str r3, [r2] +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 395 .loc 1 4068 11 view .LVU125 + 396 00d6 3268 ldr r2, [r6] + 397 00d8 1368 ldr r3, [r2] + 398 00da 43F40053 orr r3, r3, #8192 + 399 00de 1360 str r3, [r2] + 400 00e0 DFE7 b .L25 + 401 .L31: +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 402 .loc 1 4087 10 is_stmt 0 view .LVU126 + 403 00e2 0020 movs r0, #0 + 404 .L26: +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 405 .loc 1 4088 1 view .LVU127 + 406 00e4 02B0 add sp, sp, #8 + 407 .cfi_def_cfa_offset 32 + 408 @ sp needed + 409 00e6 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 410 .LVL21: + 411 .L36: + 412 .loc 1 4088 1 view .LVU128 + 413 00ea 00BF .align 2 + 414 .L35: + 415 00ec 00000000 .word SystemCoreClock + 416 .cfi_endproc + 417 .LFE178: + 419 .section .text.SPI_EndRxTxTransaction,"ax",%progbits + 420 .align 1 + ARM GAS /tmp/ccZ0BHQJ.s page 81 + + + 421 .syntax unified + 422 .thumb + 423 .thumb_func + 425 SPI_EndRxTxTransaction: + 426 .LVL22: + 427 .LFB180: +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the check of the RX transaction complete. +4092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +4095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO +4102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI peripheral */ +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +4105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != +4119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the check of the RXTX or TX transaction complete. +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 428 .loc 1 4135 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 0 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccZ0BHQJ.s page 82 + + + 432 .loc 1 4135 1 is_stmt 0 view .LVU130 + 433 0000 70B5 push {r4, r5, r6, lr} + 434 .cfi_def_cfa_offset 16 + 435 .cfi_offset 4, -16 + 436 .cfi_offset 5, -12 + 437 .cfi_offset 6, -8 + 438 .cfi_offset 14, -4 + 439 0002 82B0 sub sp, sp, #8 + 440 .cfi_def_cfa_offset 24 + 441 0004 0446 mov r4, r0 + 442 0006 0D46 mov r5, r1 + 443 0008 1646 mov r6, r2 +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control if the TX fifo is empty */ +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != H + 444 .loc 1 4137 3 is_stmt 1 view .LVU131 + 445 .loc 1 4137 7 is_stmt 0 view .LVU132 + 446 000a 0092 str r2, [sp] + 447 000c 0B46 mov r3, r1 + 448 000e 0022 movs r2, #0 + 449 .LVL23: + 450 .loc 1 4137 7 view .LVU133 + 451 0010 4FF4C051 mov r1, #6144 + 452 .LVL24: + 453 .loc 1 4137 7 view .LVU134 + 454 0014 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 455 .LVL25: + 456 .loc 1 4137 6 discriminator 1 view .LVU135 + 457 0018 B0B9 cbnz r0, .L42 +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) + 458 .loc 1 4144 3 is_stmt 1 view .LVU136 + 459 .loc 1 4144 7 is_stmt 0 view .LVU137 + 460 001a 0096 str r6, [sp] + 461 001c 2B46 mov r3, r5 + 462 001e 0022 movs r2, #0 + 463 0020 8021 movs r1, #128 + 464 0022 2046 mov r0, r4 + 465 0024 FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 466 .LVL26: + 467 .loc 1 4144 6 discriminator 1 view .LVU138 + 468 0028 A8B9 cbnz r0, .L43 +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control if the RX fifo is empty */ +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != H + 469 .loc 1 4151 3 is_stmt 1 view .LVU139 + 470 .loc 1 4151 7 is_stmt 0 view .LVU140 + 471 002a 0096 str r6, [sp] + 472 002c 2B46 mov r3, r5 + ARM GAS /tmp/ccZ0BHQJ.s page 83 + + + 473 002e 0022 movs r2, #0 + 474 0030 4FF4C061 mov r1, #1536 + 475 0034 2046 mov r0, r4 + 476 0036 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 477 .LVL27: + 478 .loc 1 4151 6 discriminator 1 view .LVU141 + 479 003a 50B1 cbz r0, .L39 +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 480 .loc 1 4153 5 is_stmt 1 view .LVU142 + 481 003c 236E ldr r3, [r4, #96] + 482 003e 43F02003 orr r3, r3, #32 + 483 0042 2366 str r3, [r4, #96] +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 484 .loc 1 4154 5 view .LVU143 + 485 .loc 1 4154 12 is_stmt 0 view .LVU144 + 486 0044 0320 movs r0, #3 + 487 0046 04E0 b .L39 + 488 .L42: +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 489 .loc 1 4139 5 is_stmt 1 view .LVU145 + 490 0048 236E ldr r3, [r4, #96] + 491 004a 43F02003 orr r3, r3, #32 + 492 004e 2366 str r3, [r4, #96] +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 493 .loc 1 4140 5 view .LVU146 +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 494 .loc 1 4140 12 is_stmt 0 view .LVU147 + 495 0050 0320 movs r0, #3 + 496 .L39: +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 497 .loc 1 4158 1 view .LVU148 + 498 0052 02B0 add sp, sp, #8 + 499 .cfi_remember_state + 500 .cfi_def_cfa_offset 16 + 501 @ sp needed + 502 0054 70BD pop {r4, r5, r6, pc} + 503 .LVL28: + 504 .L43: + 505 .cfi_restore_state +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 506 .loc 1 4146 5 is_stmt 1 view .LVU149 + 507 0056 236E ldr r3, [r4, #96] + 508 0058 43F02003 orr r3, r3, #32 + 509 005c 2366 str r3, [r4, #96] +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 510 .loc 1 4147 5 view .LVU150 +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 511 .loc 1 4147 12 is_stmt 0 view .LVU151 + 512 005e 0320 movs r0, #3 + 513 0060 F7E7 b .L39 + 514 .cfi_endproc + 515 .LFE180: + 517 .section .text.SPI_EndRxTransaction,"ax",%progbits + ARM GAS /tmp/ccZ0BHQJ.s page 84 + + + 518 .align 1 + 519 .syntax unified + 520 .thumb + 521 .thumb_func + 523 SPI_EndRxTransaction: + 524 .LVL29: + 525 .LFB179: +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 526 .loc 1 4099 1 is_stmt 1 view -0 + 527 .cfi_startproc + 528 @ args = 0, pretend = 0, frame = 0 + 529 @ frame_needed = 0, uses_anonymous_args = 0 +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 530 .loc 1 4099 1 is_stmt 0 view .LVU153 + 531 0000 70B5 push {r4, r5, r6, lr} + 532 .cfi_def_cfa_offset 16 + 533 .cfi_offset 4, -16 + 534 .cfi_offset 5, -12 + 535 .cfi_offset 6, -8 + 536 .cfi_offset 14, -4 + 537 0002 82B0 sub sp, sp, #8 + 538 .cfi_def_cfa_offset 24 + 539 0004 0446 mov r4, r0 + 540 0006 0D46 mov r5, r1 + 541 0008 1646 mov r6, r2 +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 542 .loc 1 4100 3 is_stmt 1 view .LVU154 +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 543 .loc 1 4100 18 is_stmt 0 view .LVU155 + 544 000a 4368 ldr r3, [r0, #4] +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 545 .loc 1 4100 6 view .LVU156 + 546 000c B3F5827F cmp r3, #260 + 547 0010 0DD0 beq .L51 + 548 .LVL30: + 549 .L45: +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 550 .loc 1 4108 3 is_stmt 1 view .LVU157 +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 551 .loc 1 4108 7 is_stmt 0 view .LVU158 + 552 0012 0096 str r6, [sp] + 553 0014 2B46 mov r3, r5 + 554 0016 0022 movs r2, #0 + 555 0018 8021 movs r1, #128 + 556 .LVL31: +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 557 .loc 1 4108 7 view .LVU159 + 558 001a 2046 mov r0, r4 + 559 .LVL32: +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 560 .loc 1 4108 7 view .LVU160 + 561 001c FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 562 .LVL33: +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 563 .loc 1 4108 6 discriminator 1 view .LVU161 + 564 0020 90B9 cbnz r0, .L52 +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + ARM GAS /tmp/ccZ0BHQJ.s page 85 + + + 565 .loc 1 4114 3 is_stmt 1 view .LVU162 +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 566 .loc 1 4114 18 is_stmt 0 view .LVU163 + 567 0022 6368 ldr r3, [r4, #4] +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 568 .loc 1 4114 6 view .LVU164 + 569 0024 B3F5827F cmp r3, #260 + 570 0028 14D0 beq .L53 + 571 .L48: +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 572 .loc 1 4125 1 view .LVU165 + 573 002a 02B0 add sp, sp, #8 + 574 .cfi_remember_state + 575 .cfi_def_cfa_offset 16 + 576 @ sp needed + 577 002c 70BD pop {r4, r5, r6, pc} + 578 .LVL34: + 579 .L51: + 580 .cfi_restore_state +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 581 .loc 1 4100 59 discriminator 1 view .LVU166 + 582 002e 8368 ldr r3, [r0, #8] +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 583 .loc 1 4100 44 discriminator 1 view .LVU167 + 584 0030 B3F5004F cmp r3, #32768 + 585 0034 02D0 beq .L46 +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 586 .loc 1 4101 48 view .LVU168 + 587 0036 B3F5806F cmp r3, #1024 + 588 003a EAD1 bne .L45 + 589 .L46: +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 590 .loc 1 4104 5 is_stmt 1 view .LVU169 + 591 003c 2268 ldr r2, [r4] + 592 .LVL35: +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 593 .loc 1 4104 5 is_stmt 0 view .LVU170 + 594 003e 1368 ldr r3, [r2] + 595 0040 23F04003 bic r3, r3, #64 + 596 0044 1360 str r3, [r2] + 597 0046 E4E7 b .L45 + 598 .LVL36: + 599 .L52: +4110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 600 .loc 1 4110 5 is_stmt 1 view .LVU171 + 601 0048 236E ldr r3, [r4, #96] + 602 004a 43F02003 orr r3, r3, #32 + 603 004e 2366 str r3, [r4, #96] +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 604 .loc 1 4111 5 view .LVU172 +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 605 .loc 1 4111 12 is_stmt 0 view .LVU173 + 606 0050 0320 movs r0, #3 + 607 0052 EAE7 b .L48 + 608 .L53: +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 609 .loc 1 4114 59 discriminator 1 view .LVU174 + ARM GAS /tmp/ccZ0BHQJ.s page 86 + + + 610 0054 A368 ldr r3, [r4, #8] +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 611 .loc 1 4114 44 discriminator 1 view .LVU175 + 612 0056 B3F5004F cmp r3, #32768 + 613 005a 02D0 beq .L49 +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 614 .loc 1 4115 48 view .LVU176 + 615 005c B3F5806F cmp r3, #1024 + 616 0060 E3D1 bne .L48 + 617 .L49: +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 618 .loc 1 4118 5 is_stmt 1 view .LVU177 +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 619 .loc 1 4118 9 is_stmt 0 view .LVU178 + 620 0062 0096 str r6, [sp] + 621 0064 2B46 mov r3, r5 + 622 0066 0022 movs r2, #0 + 623 0068 4FF4C061 mov r1, #1536 + 624 006c 2046 mov r0, r4 + 625 006e FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 626 .LVL37: +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 627 .loc 1 4118 8 discriminator 1 view .LVU179 + 628 0072 0028 cmp r0, #0 + 629 0074 D9D0 beq .L48 +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 630 .loc 1 4120 7 is_stmt 1 view .LVU180 + 631 0076 236E ldr r3, [r4, #96] + 632 0078 43F02003 orr r3, r3, #32 + 633 007c 2366 str r3, [r4, #96] +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 634 .loc 1 4121 7 view .LVU181 +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 635 .loc 1 4121 14 is_stmt 0 view .LVU182 + 636 007e 0320 movs r0, #3 + 637 0080 D3E7 b .L48 + 638 .cfi_endproc + 639 .LFE179: + 641 .section .text.SPI_AbortRx_ISR,"ax",%progbits + 642 .align 1 + 643 .syntax unified + 644 .thumb + 645 .thumb_func + 647 SPI_AbortRx_ISR: + 648 .LVL38: + 649 .LFB184: +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the end of the RXTX transaction. +4162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi) +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 87 + + +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management */ +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +4174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +4175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +4178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +4184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) +4185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State == HAL_SPI_STATE_BUSY_RX) +4202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +4205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback(hspi); +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxCpltCallback(hspi); +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ +4215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback(hspi); +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxRxCpltCallback(hspi); +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + ARM GAS /tmp/ccZ0BHQJ.s page 88 + + +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the end of the RX transaction. +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi) +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +4257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +4261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback(hspi); +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxCpltCallback(hspi); +4278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + ARM GAS /tmp/ccZ0BHQJ.s page 89 + + +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the end of the TX transaction. +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi) +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE and ERR interrupt */ +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear overrun flag in 2 Lines communication mode because received is not read */ +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_2LINES) +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +4324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback(hspi); +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxCpltCallback(hspi); +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 90 + + +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle abort a Rx transaction. +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi) +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 650 .loc 1 4350 1 is_stmt 1 view -0 + 651 .cfi_startproc + 652 @ args = 0, pretend = 0, frame = 8 + 653 @ frame_needed = 0, uses_anonymous_args = 0 + 654 .loc 1 4350 1 is_stmt 0 view .LVU184 + 655 0000 10B5 push {r4, lr} + 656 .cfi_def_cfa_offset 8 + 657 .cfi_offset 4, -8 + 658 .cfi_offset 14, -4 + 659 0002 84B0 sub sp, sp, #16 + 660 .cfi_def_cfa_offset 24 + 661 0004 0446 mov r4, r0 +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 662 .loc 1 4351 3 is_stmt 1 view .LVU185 +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 663 .loc 1 4354 3 view .LVU186 + 664 0006 0268 ldr r2, [r0] + 665 0008 1368 ldr r3, [r2] + 666 000a 23F04003 bic r3, r3, #64 + 667 000e 1360 str r3, [r2] +4355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 668 .loc 1 4356 3 view .LVU187 + 669 .loc 1 4356 56 is_stmt 0 view .LVU188 + 670 0010 1D4B ldr r3, .L62 + 671 0012 1B68 ldr r3, [r3] + 672 0014 1D4A ldr r2, .L62+4 + 673 0016 A2FB0323 umull r2, r3, r2, r3 + 674 001a 5B0A lsrs r3, r3, #9 + 675 .loc 1 4356 31 view .LVU189 + 676 001c 6422 movs r2, #100 + 677 001e 02FB03F3 mul r3, r2, r3 + 678 .loc 1 4356 9 view .LVU190 + 679 0022 0393 str r3, [sp, #12] +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNEIE interrupt */ +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXNEIE)); + 680 .loc 1 4359 3 is_stmt 1 view .LVU191 + 681 0024 0268 ldr r2, [r0] + 682 0026 5368 ldr r3, [r2, #4] + 683 0028 23F04003 bic r3, r3, #64 + 684 002c 5360 str r3, [r2, #4] + 685 .L57: +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check RXNEIE is disabled */ + ARM GAS /tmp/ccZ0BHQJ.s page 91 + + +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do + 686 .loc 1 4362 3 view .LVU192 +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 687 .loc 1 4364 5 view .LVU193 + 688 .loc 1 4364 15 is_stmt 0 view .LVU194 + 689 002e 039B ldr r3, [sp, #12] + 690 .loc 1 4364 8 view .LVU195 + 691 0030 43B1 cbz r3, .L61 +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +4367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 692 .loc 1 4369 5 is_stmt 1 view .LVU196 + 693 .loc 1 4369 10 is_stmt 0 view .LVU197 + 694 0032 039B ldr r3, [sp, #12] + 695 0034 013B subs r3, r3, #1 + 696 0036 0393 str r3, [sp, #12] +4370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)); + 697 .loc 1 4370 12 is_stmt 1 view .LVU198 + 698 0038 2368 ldr r3, [r4] + 699 003a 5B68 ldr r3, [r3, #4] + 700 003c 13F0400F tst r3, #64 + 701 0040 F5D1 bne .L57 + 702 0042 03E0 b .L56 + 703 .L61: +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 704 .loc 1 4366 7 view .LVU199 + 705 0044 236E ldr r3, [r4, #96] + 706 0046 43F04003 orr r3, r3, #64 + 707 004a 2366 str r3, [r4, #96] +4367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 708 .loc 1 4367 7 view .LVU200 + 709 .L56: +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) + 710 .loc 1 4373 3 view .LVU201 + 711 .loc 1 4373 7 is_stmt 0 view .LVU202 + 712 004c FFF7FEFF bl HAL_GetTick + 713 .LVL39: + 714 .loc 1 4373 7 discriminator 1 view .LVU203 + 715 0050 0090 str r0, [sp] + 716 0052 6423 movs r3, #100 + 717 0054 0022 movs r2, #0 + 718 0056 8021 movs r1, #128 + 719 0058 2046 mov r0, r4 + 720 005a FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 721 .LVL40: + 722 .loc 1 4373 6 discriminator 2 view .LVU204 + 723 005e 08B1 cbz r0, .L58 +4374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 724 .loc 1 4375 5 is_stmt 1 view .LVU205 + 725 .loc 1 4375 21 is_stmt 0 view .LVU206 + 726 0060 4023 movs r3, #64 + ARM GAS /tmp/ccZ0BHQJ.s page 92 + + + 727 0062 2366 str r3, [r4, #96] + 728 .L58: +4376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL + 729 .loc 1 4379 3 is_stmt 1 view .LVU207 + 730 .loc 1 4379 7 is_stmt 0 view .LVU208 + 731 0064 FFF7FEFF bl HAL_GetTick + 732 .LVL41: + 733 .loc 1 4379 7 discriminator 1 view .LVU209 + 734 0068 0090 str r0, [sp] + 735 006a 6423 movs r3, #100 + 736 006c 0022 movs r2, #0 + 737 006e 4FF4C061 mov r1, #1536 + 738 0072 2046 mov r0, r4 + 739 0074 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 740 .LVL42: + 741 .loc 1 4379 6 discriminator 2 view .LVU210 + 742 0078 08B1 cbz r0, .L59 +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 743 .loc 1 4381 5 is_stmt 1 view .LVU211 + 744 .loc 1 4381 21 is_stmt 0 view .LVU212 + 745 007a 4023 movs r3, #64 + 746 007c 2366 str r3, [r4, #96] + 747 .L59: +4382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_ABORT; + 748 .loc 1 4384 3 is_stmt 1 view .LVU213 + 749 .loc 1 4384 15 is_stmt 0 view .LVU214 + 750 007e 0723 movs r3, #7 + 751 0080 84F85D30 strb r3, [r4, #93] +4385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 752 .loc 1 4385 1 view .LVU215 + 753 0084 04B0 add sp, sp, #16 + 754 .cfi_def_cfa_offset 8 + 755 @ sp needed + 756 0086 10BD pop {r4, pc} + 757 .LVL43: + 758 .L63: + 759 .loc 1 4385 1 view .LVU216 + 760 .align 2 + 761 .L62: + 762 0088 00000000 .word SystemCoreClock + 763 008c F1197605 .word 91625969 + 764 .cfi_endproc + 765 .LFE184: + 767 .section .text.SPI_AbortTx_ISR,"ax",%progbits + 768 .align 1 + 769 .syntax unified + 770 .thumb + 771 .thumb_func + 773 SPI_AbortTx_ISR: + 774 .LVL44: + 775 .LFB185: + ARM GAS /tmp/ccZ0BHQJ.s page 93 + + +4386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle abort a Tx or Rx/Tx transaction. +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi) +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 776 .loc 1 4394 1 is_stmt 1 view -0 + 777 .cfi_startproc + 778 @ args = 0, pretend = 0, frame = 8 + 779 @ frame_needed = 0, uses_anonymous_args = 0 + 780 .loc 1 4394 1 is_stmt 0 view .LVU218 + 781 0000 10B5 push {r4, lr} + 782 .cfi_def_cfa_offset 8 + 783 .cfi_offset 4, -8 + 784 .cfi_offset 14, -4 + 785 0002 84B0 sub sp, sp, #16 + 786 .cfi_def_cfa_offset 24 + 787 0004 0446 mov r4, r0 +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 788 .loc 1 4395 3 is_stmt 1 view .LVU219 +4396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 789 .loc 1 4397 3 view .LVU220 + 790 .loc 1 4397 56 is_stmt 0 view .LVU221 + 791 0006 384B ldr r3, .L78 + 792 0008 1B68 ldr r3, [r3] + 793 000a 384A ldr r2, .L78+4 + 794 000c A2FB0323 umull r2, r3, r2, r3 + 795 0010 5B0A lsrs r3, r3, #9 + 796 .loc 1 4397 31 view .LVU222 + 797 0012 6422 movs r2, #100 + 798 0014 02FB03F3 mul r3, r2, r3 + 799 .loc 1 4397 9 view .LVU223 + 800 0018 0393 str r3, [sp, #12] +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXEIE interrupt */ +4400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE)); + 801 .loc 1 4400 3 is_stmt 1 view .LVU224 + 802 001a 0268 ldr r2, [r0] + 803 001c 5368 ldr r3, [r2, #4] + 804 001e 23F08003 bic r3, r3, #128 + 805 0022 5360 str r3, [r2, #4] + 806 .L67: +4401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check TXEIE is disabled */ +4403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do + 807 .loc 1 4403 3 view .LVU225 +4404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 808 .loc 1 4405 5 view .LVU226 + 809 .loc 1 4405 15 is_stmt 0 view .LVU227 + 810 0024 039B ldr r3, [sp, #12] + 811 .loc 1 4405 8 view .LVU228 + 812 0026 43B1 cbz r3, .L76 + ARM GAS /tmp/ccZ0BHQJ.s page 94 + + +4406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +4409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 813 .loc 1 4410 5 is_stmt 1 view .LVU229 + 814 .loc 1 4410 10 is_stmt 0 view .LVU230 + 815 0028 039B ldr r3, [sp, #12] + 816 002a 013B subs r3, r3, #1 + 817 002c 0393 str r3, [sp, #12] +4411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)); + 818 .loc 1 4411 12 is_stmt 1 view .LVU231 + 819 002e 2368 ldr r3, [r4] + 820 0030 5B68 ldr r3, [r3, #4] + 821 0032 13F0800F tst r3, #128 + 822 0036 F5D1 bne .L67 + 823 0038 03E0 b .L66 + 824 .L76: +4407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 825 .loc 1 4407 7 view .LVU232 + 826 003a 236E ldr r3, [r4, #96] + 827 003c 43F04003 orr r3, r3, #64 + 828 0040 2366 str r3, [r4, #96] +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 829 .loc 1 4408 7 view .LVU233 + 830 .L66: +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + 831 .loc 1 4413 3 view .LVU234 + 832 .loc 1 4413 7 is_stmt 0 view .LVU235 + 833 0042 FFF7FEFF bl HAL_GetTick + 834 .LVL45: + 835 .loc 1 4413 7 view .LVU236 + 836 0046 0246 mov r2, r0 + 837 .loc 1 4413 7 discriminator 1 view .LVU237 + 838 0048 6421 movs r1, #100 + 839 004a 2046 mov r0, r4 + 840 004c FFF7FEFF bl SPI_EndRxTxTransaction + 841 .LVL46: + 842 .loc 1 4413 6 discriminator 2 view .LVU238 + 843 0050 08B1 cbz r0, .L68 +4414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 844 .loc 1 4415 5 is_stmt 1 view .LVU239 + 845 .loc 1 4415 21 is_stmt 0 view .LVU240 + 846 0052 4023 movs r3, #64 + 847 0054 2366 str r3, [r4, #96] + 848 .L68: +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 849 .loc 1 4419 3 is_stmt 1 view .LVU241 + 850 0056 2268 ldr r2, [r4] + 851 0058 1368 ldr r3, [r2] + 852 005a 23F04003 bic r3, r3, #64 + 853 005e 1360 str r3, [r2] + ARM GAS /tmp/ccZ0BHQJ.s page 95 + + +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL + 854 .loc 1 4422 3 view .LVU242 + 855 .loc 1 4422 7 is_stmt 0 view .LVU243 + 856 0060 FFF7FEFF bl HAL_GetTick + 857 .LVL47: + 858 .loc 1 4422 7 discriminator 1 view .LVU244 + 859 0064 0090 str r0, [sp] + 860 0066 6423 movs r3, #100 + 861 0068 0022 movs r2, #0 + 862 006a 4FF4C061 mov r1, #1536 + 863 006e 2046 mov r0, r4 + 864 0070 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 865 .LVL48: + 866 .loc 1 4422 6 discriminator 2 view .LVU245 + 867 0074 08B1 cbz r0, .L69 +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 868 .loc 1 4424 5 is_stmt 1 view .LVU246 + 869 .loc 1 4424 21 is_stmt 0 view .LVU247 + 870 0076 4023 movs r3, #64 + 871 0078 2366 str r3, [r4, #96] + 872 .L69: +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check case of Full-Duplex Mode and disable directly RXNEIE interrupt */ +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) + 873 .loc 1 4428 3 is_stmt 1 view .LVU248 + 874 .loc 1 4428 7 is_stmt 0 view .LVU249 + 875 007a 2368 ldr r3, [r4] + 876 007c 5A68 ldr r2, [r3, #4] + 877 .loc 1 4428 6 view .LVU250 + 878 007e 12F0400F tst r2, #64 + 879 0082 2BD0 beq .L70 +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNEIE interrupt */ +4431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXNEIE)); + 880 .loc 1 4431 5 is_stmt 1 view .LVU251 + 881 0084 5A68 ldr r2, [r3, #4] + 882 0086 22F04002 bic r2, r2, #64 + 883 008a 5A60 str r2, [r3, #4] + 884 .L73: +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check RXNEIE is disabled */ +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do + 885 .loc 1 4434 5 view .LVU252 +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 886 .loc 1 4436 7 view .LVU253 + 887 .loc 1 4436 17 is_stmt 0 view .LVU254 + 888 008c 039B ldr r3, [sp, #12] + 889 .loc 1 4436 10 view .LVU255 + 890 008e 43B1 cbz r3, .L77 +4437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + ARM GAS /tmp/ccZ0BHQJ.s page 96 + + +4440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 891 .loc 1 4441 7 is_stmt 1 view .LVU256 + 892 .loc 1 4441 12 is_stmt 0 view .LVU257 + 893 0090 039B ldr r3, [sp, #12] + 894 0092 013B subs r3, r3, #1 + 895 0094 0393 str r3, [sp, #12] +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)); + 896 .loc 1 4442 14 is_stmt 1 view .LVU258 + 897 0096 2368 ldr r3, [r4] + 898 0098 5B68 ldr r3, [r3, #4] + 899 009a 13F0400F tst r3, #64 + 900 009e F5D1 bne .L73 + 901 00a0 03E0 b .L72 + 902 .L77: +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 903 .loc 1 4438 9 view .LVU259 + 904 00a2 236E ldr r3, [r4, #96] + 905 00a4 43F04003 orr r3, r3, #64 + 906 00a8 2366 str r3, [r4, #96] +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 907 .loc 1 4439 9 view .LVU260 + 908 .L72: +4443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick() + 909 .loc 1 4445 5 view .LVU261 + 910 .loc 1 4445 9 is_stmt 0 view .LVU262 + 911 00aa FFF7FEFF bl HAL_GetTick + 912 .LVL49: + 913 .loc 1 4445 9 discriminator 1 view .LVU263 + 914 00ae 0090 str r0, [sp] + 915 00b0 6423 movs r3, #100 + 916 00b2 0022 movs r2, #0 + 917 00b4 8021 movs r1, #128 + 918 00b6 2046 mov r0, r4 + 919 00b8 FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 920 .LVL50: + 921 .loc 1 4445 8 discriminator 2 view .LVU264 + 922 00bc 08B1 cbz r0, .L74 +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 923 .loc 1 4447 7 is_stmt 1 view .LVU265 + 924 .loc 1 4447 23 is_stmt 0 view .LVU266 + 925 00be 4023 movs r3, #64 + 926 00c0 2366 str r3, [r4, #96] + 927 .L74: +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, H + 928 .loc 1 4451 5 is_stmt 1 view .LVU267 + 929 .loc 1 4451 9 is_stmt 0 view .LVU268 + 930 00c2 FFF7FEFF bl HAL_GetTick + 931 .LVL51: + 932 .loc 1 4451 9 discriminator 1 view .LVU269 + 933 00c6 0090 str r0, [sp] + ARM GAS /tmp/ccZ0BHQJ.s page 97 + + + 934 00c8 6423 movs r3, #100 + 935 00ca 0022 movs r2, #0 + 936 00cc 4FF4C061 mov r1, #1536 + 937 00d0 2046 mov r0, r4 + 938 00d2 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 939 .LVL52: + 940 .loc 1 4451 8 discriminator 2 view .LVU270 + 941 00d6 08B1 cbz r0, .L70 +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 942 .loc 1 4453 7 is_stmt 1 view .LVU271 + 943 .loc 1 4453 23 is_stmt 0 view .LVU272 + 944 00d8 4023 movs r3, #64 + 945 00da 2366 str r3, [r4, #96] + 946 .L70: +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_ABORT; + 947 .loc 1 4456 3 is_stmt 1 view .LVU273 + 948 .loc 1 4456 15 is_stmt 0 view .LVU274 + 949 00dc 0723 movs r3, #7 + 950 00de 84F85D30 strb r3, [r4, #93] +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 951 .loc 1 4457 1 view .LVU275 + 952 00e2 04B0 add sp, sp, #16 + 953 .cfi_def_cfa_offset 8 + 954 @ sp needed + 955 00e4 10BD pop {r4, pc} + 956 .LVL53: + 957 .L79: + 958 .loc 1 4457 1 view .LVU276 + 959 00e6 00BF .align 2 + 960 .L78: + 961 00e8 00000000 .word SystemCoreClock + 962 00ec F1197605 .word 91625969 + 963 .cfi_endproc + 964 .LFE185: + 966 .section .text.HAL_SPI_MspInit,"ax",%progbits + 967 .align 1 + 968 .weak HAL_SPI_MspInit + 969 .syntax unified + 970 .thumb + 971 .thumb_func + 973 HAL_SPI_MspInit: + 974 .LVL54: + 975 .LFB132: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 976 .loc 1 534 1 is_stmt 1 view -0 + 977 .cfi_startproc + 978 @ args = 0, pretend = 0, frame = 0 + 979 @ frame_needed = 0, uses_anonymous_args = 0 + 980 @ link register save eliminated. + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 981 .loc 1 536 3 view .LVU278 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 982 .loc 1 541 1 is_stmt 0 view .LVU279 + 983 0000 7047 bx lr + ARM GAS /tmp/ccZ0BHQJ.s page 98 + + + 984 .cfi_endproc + 985 .LFE132: + 987 .section .text.HAL_SPI_Init,"ax",%progbits + 988 .align 1 + 989 .global HAL_SPI_Init + 990 .syntax unified + 991 .thumb + 992 .thumb_func + 994 HAL_SPI_Init: + 995 .LVL55: + 996 .LFB130: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t frxth; + 997 .loc 1 315 1 is_stmt 1 view -0 + 998 .cfi_startproc + 999 @ args = 0, pretend = 0, frame = 0 + 1000 @ frame_needed = 0, uses_anonymous_args = 0 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1001 .loc 1 316 3 view .LVU281 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1002 .loc 1 319 3 view .LVU282 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1003 .loc 1 319 6 is_stmt 0 view .LVU283 + 1004 0000 0028 cmp r0, #0 + 1005 0002 6FD0 beq .L88 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t frxth; + 1006 .loc 1 315 1 view .LVU284 + 1007 0004 10B5 push {r4, lr} + 1008 .cfi_def_cfa_offset 8 + 1009 .cfi_offset 4, -8 + 1010 .cfi_offset 14, -4 + 1011 0006 0446 mov r4, r0 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_MODE(hspi->Init.Mode)); + 1012 .loc 1 325 3 is_stmt 1 view .LVU285 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION(hspi->Init.Direction)); + 1013 .loc 1 326 3 view .LVU286 + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); + 1014 .loc 1 327 3 view .LVU287 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSS(hspi->Init.NSS)); + 1015 .loc 1 328 3 view .LVU288 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); + 1016 .loc 1 329 3 view .LVU289 + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 1017 .loc 1 330 3 view .LVU290 + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); + 1018 .loc 1 331 3 view .LVU291 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); + 1019 .loc 1 332 3 view .LVU292 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) + 1020 .loc 1 333 3 view .LVU293 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1021 .loc 1 334 3 view .LVU294 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1022 .loc 1 334 17 is_stmt 0 view .LVU295 + 1023 0008 436A ldr r3, [r0, #36] + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1024 .loc 1 334 6 view .LVU296 + 1025 000a 33B9 cbnz r3, .L83 + ARM GAS /tmp/ccZ0BHQJ.s page 99 + + + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); + 1026 .loc 1 336 5 is_stmt 1 view .LVU297 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1027 .loc 1 337 5 view .LVU298 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1028 .loc 1 339 5 view .LVU299 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1029 .loc 1 339 19 is_stmt 0 view .LVU300 + 1030 000c 4368 ldr r3, [r0, #4] + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1031 .loc 1 339 8 view .LVU301 + 1032 000e B3F5827F cmp r3, #260 + 1033 0012 05D0 beq .L84 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1034 .loc 1 346 7 is_stmt 1 view .LVU302 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1035 .loc 1 346 36 is_stmt 0 view .LVU303 + 1036 0014 0023 movs r3, #0 + 1037 0016 C361 str r3, [r0, #28] + 1038 0018 02E0 b .L84 + 1039 .L83: + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1040 .loc 1 351 5 is_stmt 1 view .LVU304 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPhase = SPI_PHASE_1EDGE; + 1041 .loc 1 354 5 view .LVU305 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPhase = SPI_PHASE_1EDGE; + 1042 .loc 1 354 28 is_stmt 0 view .LVU306 + 1043 001a 0023 movs r3, #0 + 1044 001c 0361 str r3, [r0, #16] + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1045 .loc 1 355 5 is_stmt 1 view .LVU307 + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1046 .loc 1 355 28 is_stmt 0 view .LVU308 + 1047 001e 4361 str r3, [r0, #20] + 1048 .L84: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 1049 .loc 1 365 3 is_stmt 1 view .LVU309 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 1050 .loc 1 365 29 is_stmt 0 view .LVU310 + 1051 0020 0023 movs r3, #0 + 1052 0022 A362 str r3, [r4, #40] + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1053 .loc 1 368 3 is_stmt 1 view .LVU311 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1054 .loc 1 368 11 is_stmt 0 view .LVU312 + 1055 0024 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1056 .loc 1 368 6 view .LVU313 + 1057 0028 002B cmp r3, #0 + 1058 002a 52D0 beq .L94 + 1059 .LVL56: + 1060 .L85: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1061 .loc 1 397 3 is_stmt 1 view .LVU314 + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1062 .loc 1 397 15 is_stmt 0 view .LVU315 + 1063 002c 0223 movs r3, #2 + ARM GAS /tmp/ccZ0BHQJ.s page 100 + + + 1064 002e 84F85D30 strb r3, [r4, #93] + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1065 .loc 1 400 3 is_stmt 1 view .LVU316 + 1066 0032 2268 ldr r2, [r4] + 1067 0034 1368 ldr r3, [r2] + 1068 0036 23F04003 bic r3, r3, #64 + 1069 003a 1360 str r3, [r2] + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1070 .loc 1 403 3 view .LVU317 + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1071 .loc 1 403 17 is_stmt 0 view .LVU318 + 1072 003c E368 ldr r3, [r4, #12] + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1073 .loc 1 403 6 view .LVU319 + 1074 003e B3F5E06F cmp r3, #1792 + 1075 0042 4CD9 bls .L89 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1076 .loc 1 405 11 view .LVU320 + 1077 0044 0022 movs r2, #0 + 1078 .L86: + 1079 .LVL57: + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1080 .loc 1 413 3 is_stmt 1 view .LVU321 + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1081 .loc 1 413 6 is_stmt 0 view .LVU322 + 1082 0046 B3F5706F cmp r3, #3840 + 1083 004a 04D0 beq .L87 + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1084 .loc 1 413 51 discriminator 1 view .LVU323 + 1085 004c B3F5E06F cmp r3, #1792 + 1086 0050 01D0 beq .L87 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1087 .loc 1 416 5 is_stmt 1 view .LVU324 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1088 .loc 1 416 31 is_stmt 0 view .LVU325 + 1089 0052 0023 movs r3, #0 + 1090 0054 A362 str r3, [r4, #40] + 1091 .L87: + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) | + 1092 .loc 1 422 3 is_stmt 1 view .LVU326 + 1093 0056 6368 ldr r3, [r4, #4] + 1094 0058 03F48273 and r3, r3, #260 + 1095 005c A168 ldr r1, [r4, #8] + 1096 005e 01F40441 and r1, r1, #33792 + 1097 0062 0B43 orrs r3, r3, r1 + 1098 0064 2169 ldr r1, [r4, #16] + 1099 0066 01F00201 and r1, r1, #2 + 1100 006a 0B43 orrs r3, r3, r1 + 1101 006c 6169 ldr r1, [r4, #20] + 1102 006e 01F00101 and r1, r1, #1 + 1103 0072 0B43 orrs r3, r3, r1 + 1104 0074 A169 ldr r1, [r4, #24] + 1105 0076 01F40071 and r1, r1, #512 + 1106 007a 0B43 orrs r3, r3, r1 + 1107 007c E169 ldr r1, [r4, #28] + 1108 007e 01F03801 and r1, r1, #56 + 1109 0082 0B43 orrs r3, r3, r1 + ARM GAS /tmp/ccZ0BHQJ.s page 101 + + + 1110 0084 216A ldr r1, [r4, #32] + 1111 0086 01F08001 and r1, r1, #128 + 1112 008a 0B43 orrs r3, r3, r1 + 1113 008c A16A ldr r1, [r4, #40] + 1114 008e 01F40051 and r1, r1, #8192 + 1115 0092 2068 ldr r0, [r4] + 1116 0094 0B43 orrs r3, r3, r1 + 1117 0096 0360 str r3, [r0] + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.TIMode & SPI_CR2_FRF) | + 1118 .loc 1 457 3 view .LVU327 + 1119 0098 638B ldrh r3, [r4, #26] + 1120 009a 03F00403 and r3, r3, #4 + 1121 009e 616A ldr r1, [r4, #36] + 1122 00a0 01F01001 and r1, r1, #16 + 1123 00a4 0B43 orrs r3, r3, r1 + 1124 00a6 616B ldr r1, [r4, #52] + 1125 00a8 01F00801 and r1, r1, #8 + 1126 00ac 0B43 orrs r3, r3, r1 + 1127 00ae E168 ldr r1, [r4, #12] + 1128 00b0 01F47061 and r1, r1, #3840 + 1129 00b4 0B43 orrs r3, r3, r1 + 1130 00b6 2168 ldr r1, [r4] + 1131 00b8 1343 orrs r3, r3, r2 + 1132 00ba 4B60 str r3, [r1, #4] + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* SPI_I2SCFGR_I2SMOD */ + 1133 .loc 1 474 3 view .LVU328 + 1134 00bc 2268 ldr r2, [r4] + 1135 .LVL58: + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* SPI_I2SCFGR_I2SMOD */ + 1136 .loc 1 474 3 is_stmt 0 view .LVU329 + 1137 00be D369 ldr r3, [r2, #28] + 1138 00c0 23F40063 bic r3, r3, #2048 + 1139 00c4 D361 str r3, [r2, #28] + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1140 .loc 1 477 3 is_stmt 1 view .LVU330 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1141 .loc 1 477 19 is_stmt 0 view .LVU331 + 1142 00c6 0020 movs r0, #0 + 1143 00c8 2066 str r0, [r4, #96] + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1144 .loc 1 478 3 is_stmt 1 view .LVU332 + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1145 .loc 1 478 19 is_stmt 0 view .LVU333 + 1146 00ca 0123 movs r3, #1 + 1147 00cc 84F85D30 strb r3, [r4, #93] + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1148 .loc 1 480 3 is_stmt 1 view .LVU334 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1149 .loc 1 481 1 is_stmt 0 view .LVU335 + 1150 00d0 10BD pop {r4, pc} + 1151 .LVL59: + 1152 .L94: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1153 .loc 1 371 5 is_stmt 1 view .LVU336 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1154 .loc 1 371 16 is_stmt 0 view .LVU337 + 1155 00d2 84F85C30 strb r3, [r4, #92] + ARM GAS /tmp/ccZ0BHQJ.s page 102 + + + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 1156 .loc 1 393 5 is_stmt 1 view .LVU338 + 1157 00d6 2046 mov r0, r4 + 1158 .LVL60: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 1159 .loc 1 393 5 is_stmt 0 view .LVU339 + 1160 00d8 FFF7FEFF bl HAL_SPI_MspInit + 1161 .LVL61: + 1162 00dc A6E7 b .L85 + 1163 .L89: + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1164 .loc 1 409 11 view .LVU340 + 1165 00de 4FF48052 mov r2, #4096 + 1166 00e2 B0E7 b .L86 + 1167 .LVL62: + 1168 .L88: + 1169 .cfi_def_cfa_offset 0 + 1170 .cfi_restore 4 + 1171 .cfi_restore 14 + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1172 .loc 1 321 12 view .LVU341 + 1173 00e4 0120 movs r0, #1 + 1174 .LVL63: + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1175 .loc 1 481 1 view .LVU342 + 1176 00e6 7047 bx lr + 1177 .cfi_endproc + 1178 .LFE130: + 1180 .section .text.HAL_SPI_MspDeInit,"ax",%progbits + 1181 .align 1 + 1182 .weak HAL_SPI_MspDeInit + 1183 .syntax unified + 1184 .thumb + 1185 .thumb_func + 1187 HAL_SPI_MspDeInit: + 1188 .LVL64: + 1189 .LFB133: + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 1190 .loc 1 550 1 is_stmt 1 view -0 + 1191 .cfi_startproc + 1192 @ args = 0, pretend = 0, frame = 0 + 1193 @ frame_needed = 0, uses_anonymous_args = 0 + 1194 @ link register save eliminated. + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1195 .loc 1 552 3 view .LVU344 + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1196 .loc 1 557 1 is_stmt 0 view .LVU345 + 1197 0000 7047 bx lr + 1198 .cfi_endproc + 1199 .LFE133: + 1201 .section .text.HAL_SPI_DeInit,"ax",%progbits + 1202 .align 1 + 1203 .global HAL_SPI_DeInit + 1204 .syntax unified + 1205 .thumb + 1206 .thumb_func + 1208 HAL_SPI_DeInit: + ARM GAS /tmp/ccZ0BHQJ.s page 103 + + + 1209 .LVL65: + 1210 .LFB131: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 1211 .loc 1 490 1 is_stmt 1 view -0 + 1212 .cfi_startproc + 1213 @ args = 0, pretend = 0, frame = 0 + 1214 @ frame_needed = 0, uses_anonymous_args = 0 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1215 .loc 1 492 3 view .LVU347 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1216 .loc 1 492 6 is_stmt 0 view .LVU348 + 1217 0000 90B1 cbz r0, .L98 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 1218 .loc 1 490 1 view .LVU349 + 1219 0002 10B5 push {r4, lr} + 1220 .cfi_def_cfa_offset 8 + 1221 .cfi_offset 4, -8 + 1222 .cfi_offset 14, -4 + 1223 0004 0446 mov r4, r0 + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1224 .loc 1 498 3 is_stmt 1 view .LVU350 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1225 .loc 1 500 3 view .LVU351 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1226 .loc 1 500 15 is_stmt 0 view .LVU352 + 1227 0006 0223 movs r3, #2 + 1228 0008 80F85D30 strb r3, [r0, #93] + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1229 .loc 1 503 3 is_stmt 1 view .LVU353 + 1230 000c 0268 ldr r2, [r0] + 1231 000e 1368 ldr r3, [r2] + 1232 0010 23F04003 bic r3, r3, #64 + 1233 0014 1360 str r3, [r2] + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 1234 .loc 1 515 3 view .LVU354 + 1235 0016 FFF7FEFF bl HAL_SPI_MspDeInit + 1236 .LVL66: + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_RESET; + 1237 .loc 1 518 3 view .LVU355 + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_RESET; + 1238 .loc 1 518 19 is_stmt 0 view .LVU356 + 1239 001a 0020 movs r0, #0 + 1240 001c 2066 str r0, [r4, #96] + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1241 .loc 1 519 3 is_stmt 1 view .LVU357 + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1242 .loc 1 519 15 is_stmt 0 view .LVU358 + 1243 001e 84F85D00 strb r0, [r4, #93] + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1244 .loc 1 522 3 is_stmt 1 view .LVU359 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1245 .loc 1 522 3 view .LVU360 + 1246 0022 84F85C00 strb r0, [r4, #92] + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1247 .loc 1 522 3 view .LVU361 + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1248 .loc 1 524 3 view .LVU362 + ARM GAS /tmp/ccZ0BHQJ.s page 104 + + + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1249 .loc 1 525 1 is_stmt 0 view .LVU363 + 1250 0026 10BD pop {r4, pc} + 1251 .LVL67: + 1252 .L98: + 1253 .cfi_def_cfa_offset 0 + 1254 .cfi_restore 4 + 1255 .cfi_restore 14 + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1256 .loc 1 494 12 view .LVU364 + 1257 0028 0120 movs r0, #1 + 1258 .LVL68: + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1259 .loc 1 525 1 view .LVU365 + 1260 002a 7047 bx lr + 1261 .cfi_endproc + 1262 .LFE131: + 1264 .section .text.HAL_SPI_Transmit,"ax",%progbits + 1265 .align 1 + 1266 .global HAL_SPI_Transmit + 1267 .syntax unified + 1268 .thumb + 1269 .thumb_func + 1271 HAL_SPI_Transmit: + 1272 .LVL69: + 1273 .LFB134: + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 1274 .loc 1 822 1 is_stmt 1 view -0 + 1275 .cfi_startproc + 1276 @ args = 0, pretend = 0, frame = 8 + 1277 @ frame_needed = 0, uses_anonymous_args = 0 + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 1278 .loc 1 822 1 is_stmt 0 view .LVU367 + 1279 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 1280 .cfi_def_cfa_offset 28 + 1281 .cfi_offset 4, -28 + 1282 .cfi_offset 5, -24 + 1283 .cfi_offset 6, -20 + 1284 .cfi_offset 7, -16 + 1285 .cfi_offset 8, -12 + 1286 .cfi_offset 9, -8 + 1287 .cfi_offset 14, -4 + 1288 0004 83B0 sub sp, sp, #12 + 1289 .cfi_def_cfa_offset 40 + 1290 0006 1D46 mov r5, r3 + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 1291 .loc 1 823 3 is_stmt 1 view .LVU368 + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1292 .loc 1 824 3 view .LVU369 + 1293 .LVL70: + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1294 .loc 1 825 3 view .LVU370 + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1295 .loc 1 828 3 view .LVU371 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1296 .loc 1 831 3 view .LVU372 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 105 + + + 1297 .loc 1 831 3 view .LVU373 + 1298 0008 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 1299 .LVL71: + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1300 .loc 1 831 3 is_stmt 0 view .LVU374 + 1301 000c 012B cmp r3, #1 + 1302 000e 00F0F480 beq .L130 + 1303 0012 0446 mov r4, r0 + 1304 0014 8846 mov r8, r1 + 1305 0016 9146 mov r9, r2 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1306 .loc 1 831 3 is_stmt 1 discriminator 2 view .LVU375 + 1307 0018 0123 movs r3, #1 + 1308 001a 80F85C30 strb r3, [r0, #92] + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1309 .loc 1 831 3 discriminator 2 view .LVU376 + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1310 .loc 1 834 3 view .LVU377 + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1311 .loc 1 834 15 is_stmt 0 view .LVU378 + 1312 001e FFF7FEFF bl HAL_GetTick + 1313 .LVL72: + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1314 .loc 1 834 15 view .LVU379 + 1315 0022 0746 mov r7, r0 + 1316 .LVL73: + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1317 .loc 1 835 3 is_stmt 1 view .LVU380 + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1318 .loc 1 837 3 view .LVU381 + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1319 .loc 1 837 11 is_stmt 0 view .LVU382 + 1320 0024 94F85D60 ldrb r6, [r4, #93] @ zero_extendqisi2 + 1321 0028 F6B2 uxtb r6, r6 + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1322 .loc 1 837 6 view .LVU383 + 1323 002a 012E cmp r6, #1 + 1324 002c 40F0DD80 bne .L131 + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1325 .loc 1 843 3 is_stmt 1 view .LVU384 + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1326 .loc 1 843 6 is_stmt 0 view .LVU385 + 1327 0030 B8F1000F cmp r8, #0 + 1328 0034 00F0DA80 beq .L105 + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1329 .loc 1 843 23 discriminator 1 view .LVU386 + 1330 0038 B9F1000F cmp r9, #0 + 1331 003c 00F0D680 beq .L105 + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 1332 .loc 1 850 3 is_stmt 1 view .LVU387 + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 1333 .loc 1 850 21 is_stmt 0 view .LVU388 + 1334 0040 0323 movs r3, #3 + 1335 0042 84F85D30 strb r3, [r4, #93] + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 1336 .loc 1 851 3 is_stmt 1 view .LVU389 + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + ARM GAS /tmp/ccZ0BHQJ.s page 106 + + + 1337 .loc 1 851 21 is_stmt 0 view .LVU390 + 1338 0046 0023 movs r3, #0 + 1339 0048 2366 str r3, [r4, #96] + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1340 .loc 1 852 3 is_stmt 1 view .LVU391 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1341 .loc 1 852 21 is_stmt 0 view .LVU392 + 1342 004a C4F83880 str r8, [r4, #56] + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1343 .loc 1 853 3 is_stmt 1 view .LVU393 + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1344 .loc 1 853 21 is_stmt 0 view .LVU394 + 1345 004e A4F83C90 strh r9, [r4, #60] @ movhi + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1346 .loc 1 854 3 is_stmt 1 view .LVU395 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1347 .loc 1 854 21 is_stmt 0 view .LVU396 + 1348 0052 A4F83E90 strh r9, [r4, #62] @ movhi + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 1349 .loc 1 857 3 is_stmt 1 view .LVU397 + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 1350 .loc 1 857 21 is_stmt 0 view .LVU398 + 1351 0056 2364 str r3, [r4, #64] + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 1352 .loc 1 858 3 is_stmt 1 view .LVU399 + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 1353 .loc 1 858 21 is_stmt 0 view .LVU400 + 1354 0058 A4F84430 strh r3, [r4, #68] @ movhi + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1355 .loc 1 859 3 is_stmt 1 view .LVU401 + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1356 .loc 1 859 21 is_stmt 0 view .LVU402 + 1357 005c A4F84630 strh r3, [r4, #70] @ movhi + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 1358 .loc 1 860 3 is_stmt 1 view .LVU403 + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 1359 .loc 1 860 21 is_stmt 0 view .LVU404 + 1360 0060 2365 str r3, [r4, #80] + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1361 .loc 1 861 3 is_stmt 1 view .LVU405 + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1362 .loc 1 861 21 is_stmt 0 view .LVU406 + 1363 0062 E364 str r3, [r4, #76] + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1364 .loc 1 864 3 is_stmt 1 view .LVU407 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1365 .loc 1 864 17 is_stmt 0 view .LVU408 + 1366 0064 A368 ldr r3, [r4, #8] + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1367 .loc 1 864 6 view .LVU409 + 1368 0066 B3F5004F cmp r3, #32768 + 1369 006a 1ED0 beq .L133 + 1370 .L106: + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1371 .loc 1 880 3 is_stmt 1 view .LVU410 + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1372 .loc 1 880 12 is_stmt 0 view .LVU411 + ARM GAS /tmp/ccZ0BHQJ.s page 107 + + + 1373 006c 2368 ldr r3, [r4] + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1374 .loc 1 880 22 view .LVU412 + 1375 006e 1A68 ldr r2, [r3] + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1376 .loc 1 880 6 view .LVU413 + 1377 0070 12F0400F tst r2, #64 + 1378 0074 03D1 bne .L107 + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1379 .loc 1 883 5 is_stmt 1 view .LVU414 + 1380 0076 1A68 ldr r2, [r3] + 1381 0078 42F04002 orr r2, r2, #64 + 1382 007c 1A60 str r2, [r3] + 1383 .L107: + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1384 .loc 1 887 3 view .LVU415 + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1385 .loc 1 887 17 is_stmt 0 view .LVU416 + 1386 007e E368 ldr r3, [r4, #12] + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1387 .loc 1 887 6 view .LVU417 + 1388 0080 B3F5E06F cmp r3, #1792 + 1389 0084 44D9 bls .L108 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1390 .loc 1 889 5 is_stmt 1 view .LVU418 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1391 .loc 1 889 20 is_stmt 0 view .LVU419 + 1392 0086 6368 ldr r3, [r4, #4] + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1393 .loc 1 889 8 view .LVU420 + 1394 0088 13B1 cbz r3, .L109 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1395 .loc 1 889 45 discriminator 1 view .LVU421 + 1396 008a B9F1010F cmp r9, #1 + 1397 008e 20D1 bne .L111 + 1398 .L109: + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1399 .loc 1 891 7 is_stmt 1 view .LVU422 + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1400 .loc 1 891 46 is_stmt 0 view .LVU423 + 1401 0090 A26B ldr r2, [r4, #56] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1402 .loc 1 891 11 view .LVU424 + 1403 0092 2368 ldr r3, [r4] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1404 .loc 1 891 28 view .LVU425 + 1405 0094 1288 ldrh r2, [r2] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1406 .loc 1 891 26 view .LVU426 + 1407 0096 DA60 str r2, [r3, #12] + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1408 .loc 1 892 7 is_stmt 1 view .LVU427 + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1409 .loc 1 892 11 is_stmt 0 view .LVU428 + 1410 0098 A36B ldr r3, [r4, #56] + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1411 .loc 1 892 24 view .LVU429 + ARM GAS /tmp/ccZ0BHQJ.s page 108 + + + 1412 009a 0233 adds r3, r3, #2 + 1413 009c A363 str r3, [r4, #56] + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1414 .loc 1 893 7 is_stmt 1 view .LVU430 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1415 .loc 1 893 11 is_stmt 0 view .LVU431 + 1416 009e E38F ldrh r3, [r4, #62] + 1417 00a0 9BB2 uxth r3, r3 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1418 .loc 1 893 24 view .LVU432 + 1419 00a2 013B subs r3, r3, #1 + 1420 00a4 9BB2 uxth r3, r3 + 1421 00a6 E387 strh r3, [r4, #62] @ movhi + 1422 00a8 13E0 b .L111 + 1423 .L133: + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 1424 .loc 1 867 5 is_stmt 1 view .LVU433 + 1425 00aa 2268 ldr r2, [r4] + 1426 00ac 1368 ldr r3, [r2] + 1427 00ae 23F04003 bic r3, r3, #64 + 1428 00b2 1360 str r3, [r2] + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1429 .loc 1 868 5 view .LVU434 + 1430 00b4 2268 ldr r2, [r4] + 1431 00b6 1368 ldr r3, [r2] + 1432 00b8 43F48043 orr r3, r3, #16384 + 1433 00bc 1360 str r3, [r2] + 1434 00be D5E7 b .L106 + 1435 .LVL74: + 1436 .L112: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1437 .loc 1 908 9 view .LVU435 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1438 .loc 1 908 16 is_stmt 0 view .LVU436 + 1439 00c0 FFF7FEFF bl HAL_GetTick + 1440 .LVL75: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1441 .loc 1 908 30 discriminator 1 view .LVU437 + 1442 00c4 C01B subs r0, r0, r7 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1443 .loc 1 908 12 discriminator 1 view .LVU438 + 1444 00c6 A842 cmp r0, r5 + 1445 00c8 02D3 bcc .L114 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1446 .loc 1 908 56 discriminator 1 view .LVU439 + 1447 00ca B5F1FF3F cmp r5, #-1 + 1448 00ce 1AD1 bne .L115 + 1449 .L114: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1450 .loc 1 908 87 discriminator 3 view .LVU440 + 1451 00d0 CDB1 cbz r5, .L115 + 1452 .L111: + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1453 .loc 1 896 30 is_stmt 1 view .LVU441 + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1454 .loc 1 896 16 is_stmt 0 view .LVU442 + 1455 00d2 E38F ldrh r3, [r4, #62] + ARM GAS /tmp/ccZ0BHQJ.s page 109 + + + 1456 00d4 9BB2 uxth r3, r3 + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1457 .loc 1 896 30 view .LVU443 + 1458 00d6 002B cmp r3, #0 + 1459 00d8 6FD0 beq .L117 + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1460 .loc 1 899 7 is_stmt 1 view .LVU444 + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1461 .loc 1 899 11 is_stmt 0 view .LVU445 + 1462 00da 2368 ldr r3, [r4] + 1463 00dc 9A68 ldr r2, [r3, #8] + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1464 .loc 1 899 10 view .LVU446 + 1465 00de 12F0020F tst r2, #2 + 1466 00e2 EDD0 beq .L112 + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1467 .loc 1 901 9 is_stmt 1 view .LVU447 + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1468 .loc 1 901 48 is_stmt 0 view .LVU448 + 1469 00e4 A26B ldr r2, [r4, #56] + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1470 .loc 1 901 30 view .LVU449 + 1471 00e6 1288 ldrh r2, [r2] + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1472 .loc 1 901 28 view .LVU450 + 1473 00e8 DA60 str r2, [r3, #12] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1474 .loc 1 902 9 is_stmt 1 view .LVU451 + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1475 .loc 1 902 13 is_stmt 0 view .LVU452 + 1476 00ea A36B ldr r3, [r4, #56] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1477 .loc 1 902 26 view .LVU453 + 1478 00ec 0233 adds r3, r3, #2 + 1479 00ee A363 str r3, [r4, #56] + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1480 .loc 1 903 9 is_stmt 1 view .LVU454 + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1481 .loc 1 903 13 is_stmt 0 view .LVU455 + 1482 00f0 B4F83EC0 ldrh ip, [r4, #62] + 1483 00f4 1FFA8CFC uxth ip, ip + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1484 .loc 1 903 26 view .LVU456 + 1485 00f8 0CF1FF3C add ip, ip, #-1 + 1486 00fc 1FFA8CFC uxth ip, ip + 1487 0100 A4F83EC0 strh ip, [r4, #62] @ movhi + 1488 0104 E5E7 b .L111 + 1489 .L115: + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1490 .loc 1 910 11 is_stmt 1 view .LVU457 + 1491 .LVL76: + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1492 .loc 1 911 11 view .LVU458 + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1493 .loc 1 911 23 is_stmt 0 view .LVU459 + 1494 0106 0123 movs r3, #1 + 1495 0108 84F85D30 strb r3, [r4, #93] + ARM GAS /tmp/ccZ0BHQJ.s page 110 + + + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1496 .loc 1 912 11 is_stmt 1 view .LVU460 + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1497 .loc 1 910 21 is_stmt 0 view .LVU461 + 1498 010c 0326 movs r6, #3 + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1499 .loc 1 912 11 view .LVU462 + 1500 010e 6DE0 b .L105 + 1501 .LVL77: + 1502 .L108: + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1503 .loc 1 920 5 is_stmt 1 view .LVU463 + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1504 .loc 1 920 20 is_stmt 0 view .LVU464 + 1505 0110 6368 ldr r3, [r4, #4] + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1506 .loc 1 920 8 view .LVU465 + 1507 0112 13B1 cbz r3, .L118 + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1508 .loc 1 920 45 discriminator 1 view .LVU466 + 1509 0114 B9F1010F cmp r9, #1 + 1510 0118 32D1 bne .L121 + 1511 .L118: + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1512 .loc 1 922 7 is_stmt 1 view .LVU467 + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1513 .loc 1 922 15 is_stmt 0 view .LVU468 + 1514 011a E38F ldrh r3, [r4, #62] + 1515 011c 9BB2 uxth r3, r3 + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1516 .loc 1 922 10 view .LVU469 + 1517 011e 012B cmp r3, #1 + 1518 0120 0CD9 bls .L120 + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1519 .loc 1 925 9 is_stmt 1 view .LVU470 + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1520 .loc 1 925 48 is_stmt 0 view .LVU471 + 1521 0122 A26B ldr r2, [r4, #56] + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1522 .loc 1 925 13 view .LVU472 + 1523 0124 2368 ldr r3, [r4] + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1524 .loc 1 925 30 view .LVU473 + 1525 0126 1288 ldrh r2, [r2] + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1526 .loc 1 925 28 view .LVU474 + 1527 0128 DA60 str r2, [r3, #12] + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1528 .loc 1 926 9 is_stmt 1 view .LVU475 + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1529 .loc 1 926 13 is_stmt 0 view .LVU476 + 1530 012a A36B ldr r3, [r4, #56] + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1531 .loc 1 926 26 view .LVU477 + 1532 012c 0233 adds r3, r3, #2 + 1533 012e A363 str r3, [r4, #56] + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 111 + + + 1534 .loc 1 927 9 is_stmt 1 view .LVU478 + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1535 .loc 1 927 13 is_stmt 0 view .LVU479 + 1536 0130 E38F ldrh r3, [r4, #62] + 1537 0132 9BB2 uxth r3, r3 + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1538 .loc 1 927 27 view .LVU480 + 1539 0134 023B subs r3, r3, #2 + 1540 0136 9BB2 uxth r3, r3 + 1541 0138 E387 strh r3, [r4, #62] @ movhi + 1542 013a 21E0 b .L121 + 1543 .L120: + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1544 .loc 1 931 9 is_stmt 1 view .LVU481 + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1545 .loc 1 931 56 is_stmt 0 view .LVU482 + 1546 013c A26B ldr r2, [r4, #56] + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1547 .loc 1 931 32 view .LVU483 + 1548 013e 2368 ldr r3, [r4] + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1549 .loc 1 931 51 view .LVU484 + 1550 0140 1278 ldrb r2, [r2] @ zero_extendqisi2 + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1551 .loc 1 931 48 view .LVU485 + 1552 0142 1A73 strb r2, [r3, #12] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1553 .loc 1 932 9 is_stmt 1 view .LVU486 + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1554 .loc 1 932 13 is_stmt 0 view .LVU487 + 1555 0144 A36B ldr r3, [r4, #56] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1556 .loc 1 932 26 view .LVU488 + 1557 0146 0133 adds r3, r3, #1 + 1558 0148 A363 str r3, [r4, #56] + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1559 .loc 1 933 9 is_stmt 1 view .LVU489 + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1560 .loc 1 933 13 is_stmt 0 view .LVU490 + 1561 014a E38F ldrh r3, [r4, #62] + 1562 014c 9BB2 uxth r3, r3 + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1563 .loc 1 933 26 view .LVU491 + 1564 014e 013B subs r3, r3, #1 + 1565 0150 9BB2 uxth r3, r3 + 1566 0152 E387 strh r3, [r4, #62] @ movhi + 1567 0154 14E0 b .L121 + 1568 .LVL78: + 1569 .L123: + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1570 .loc 1 950 11 is_stmt 1 view .LVU492 + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1571 .loc 1 950 58 is_stmt 0 view .LVU493 + 1572 0156 A36B ldr r3, [r4, #56] + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1573 .loc 1 950 53 view .LVU494 + 1574 0158 1B78 ldrb r3, [r3] @ zero_extendqisi2 + ARM GAS /tmp/ccZ0BHQJ.s page 112 + + + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1575 .loc 1 950 50 view .LVU495 + 1576 015a 1373 strb r3, [r2, #12] + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1577 .loc 1 951 11 is_stmt 1 view .LVU496 + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1578 .loc 1 951 15 is_stmt 0 view .LVU497 + 1579 015c A36B ldr r3, [r4, #56] + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1580 .loc 1 951 27 view .LVU498 + 1581 015e 0133 adds r3, r3, #1 + 1582 0160 A363 str r3, [r4, #56] + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1583 .loc 1 952 11 is_stmt 1 view .LVU499 + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1584 .loc 1 952 15 is_stmt 0 view .LVU500 + 1585 0162 E38F ldrh r3, [r4, #62] + 1586 0164 9BB2 uxth r3, r3 + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1587 .loc 1 952 28 view .LVU501 + 1588 0166 013B subs r3, r3, #1 + 1589 0168 9BB2 uxth r3, r3 + 1590 016a E387 strh r3, [r4, #62] @ movhi + 1591 016c 08E0 b .L121 + 1592 .L122: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1593 .loc 1 958 9 is_stmt 1 view .LVU502 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1594 .loc 1 958 16 is_stmt 0 view .LVU503 + 1595 016e FFF7FEFF bl HAL_GetTick + 1596 .LVL79: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1597 .loc 1 958 30 discriminator 1 view .LVU504 + 1598 0172 C01B subs r0, r0, r7 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1599 .loc 1 958 12 discriminator 1 view .LVU505 + 1600 0174 A842 cmp r0, r5 + 1601 0176 02D3 bcc .L125 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1602 .loc 1 958 56 discriminator 1 view .LVU506 + 1603 0178 B5F1FF3F cmp r5, #-1 + 1604 017c 18D1 bne .L126 + 1605 .L125: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1606 .loc 1 958 87 discriminator 3 view .LVU507 + 1607 017e BDB1 cbz r5, .L126 + 1608 .L121: + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1609 .loc 1 936 30 is_stmt 1 view .LVU508 + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1610 .loc 1 936 16 is_stmt 0 view .LVU509 + 1611 0180 E38F ldrh r3, [r4, #62] + 1612 0182 9BB2 uxth r3, r3 + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1613 .loc 1 936 30 view .LVU510 + 1614 0184 CBB1 cbz r3, .L117 + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 113 + + + 1615 .loc 1 939 7 is_stmt 1 view .LVU511 + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1616 .loc 1 939 11 is_stmt 0 view .LVU512 + 1617 0186 2268 ldr r2, [r4] + 1618 0188 9368 ldr r3, [r2, #8] + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1619 .loc 1 939 10 view .LVU513 + 1620 018a 13F0020F tst r3, #2 + 1621 018e EED0 beq .L122 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1622 .loc 1 941 9 is_stmt 1 view .LVU514 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1623 .loc 1 941 17 is_stmt 0 view .LVU515 + 1624 0190 E38F ldrh r3, [r4, #62] + 1625 0192 9BB2 uxth r3, r3 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1626 .loc 1 941 12 view .LVU516 + 1627 0194 012B cmp r3, #1 + 1628 0196 DED9 bls .L123 + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1629 .loc 1 944 11 is_stmt 1 view .LVU517 + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1630 .loc 1 944 50 is_stmt 0 view .LVU518 + 1631 0198 A36B ldr r3, [r4, #56] + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1632 .loc 1 944 32 view .LVU519 + 1633 019a 1B88 ldrh r3, [r3] + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1634 .loc 1 944 30 view .LVU520 + 1635 019c D360 str r3, [r2, #12] + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1636 .loc 1 945 11 is_stmt 1 view .LVU521 + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1637 .loc 1 945 15 is_stmt 0 view .LVU522 + 1638 019e A36B ldr r3, [r4, #56] + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1639 .loc 1 945 28 view .LVU523 + 1640 01a0 0233 adds r3, r3, #2 + 1641 01a2 A363 str r3, [r4, #56] + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1642 .loc 1 946 11 is_stmt 1 view .LVU524 + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1643 .loc 1 946 15 is_stmt 0 view .LVU525 + 1644 01a4 E38F ldrh r3, [r4, #62] + 1645 01a6 9BB2 uxth r3, r3 + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1646 .loc 1 946 29 view .LVU526 + 1647 01a8 023B subs r3, r3, #2 + 1648 01aa 9BB2 uxth r3, r3 + 1649 01ac E387 strh r3, [r4, #62] @ movhi + 1650 01ae E7E7 b .L121 + 1651 .L126: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1652 .loc 1 960 11 is_stmt 1 view .LVU527 + 1653 .LVL80: + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1654 .loc 1 961 11 view .LVU528 + ARM GAS /tmp/ccZ0BHQJ.s page 114 + + + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1655 .loc 1 961 23 is_stmt 0 view .LVU529 + 1656 01b0 0123 movs r3, #1 + 1657 01b2 84F85D30 strb r3, [r4, #93] + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1658 .loc 1 962 11 is_stmt 1 view .LVU530 + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1659 .loc 1 960 21 is_stmt 0 view .LVU531 + 1660 01b6 0326 movs r6, #3 + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1661 .loc 1 962 11 view .LVU532 + 1662 01b8 18E0 b .L105 + 1663 .LVL81: + 1664 .L117: + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1665 .loc 1 976 3 is_stmt 1 view .LVU533 + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1666 .loc 1 976 7 is_stmt 0 view .LVU534 + 1667 01ba 3A46 mov r2, r7 + 1668 01bc 2946 mov r1, r5 + 1669 01be 2046 mov r0, r4 + 1670 01c0 FFF7FEFF bl SPI_EndRxTxTransaction + 1671 .LVL82: + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1672 .loc 1 976 6 discriminator 1 view .LVU535 + 1673 01c4 08B1 cbz r0, .L128 + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1674 .loc 1 978 5 is_stmt 1 view .LVU536 + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1675 .loc 1 978 21 is_stmt 0 view .LVU537 + 1676 01c6 2023 movs r3, #32 + 1677 01c8 2366 str r3, [r4, #96] + 1678 .L128: + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1679 .loc 1 982 3 is_stmt 1 view .LVU538 + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1680 .loc 1 982 17 is_stmt 0 view .LVU539 + 1681 01ca A368 ldr r3, [r4, #8] + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1682 .loc 1 982 6 view .LVU540 + 1683 01cc 33B9 cbnz r3, .L129 + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1684 .loc 1 984 5 is_stmt 1 view .LVU541 + 1685 .LBB2: + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1686 .loc 1 984 5 view .LVU542 + 1687 01ce 0193 str r3, [sp, #4] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1688 .loc 1 984 5 view .LVU543 + 1689 01d0 2368 ldr r3, [r4] + 1690 01d2 DA68 ldr r2, [r3, #12] + 1691 01d4 0192 str r2, [sp, #4] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1692 .loc 1 984 5 view .LVU544 + 1693 01d6 9B68 ldr r3, [r3, #8] + 1694 01d8 0193 str r3, [sp, #4] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 115 + + + 1695 .loc 1 984 5 view .LVU545 + 1696 01da 019B ldr r3, [sp, #4] + 1697 .L129: + 1698 .LBE2: + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1699 .loc 1 984 5 discriminator 1 view .LVU546 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1700 .loc 1 987 3 view .LVU547 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1701 .loc 1 987 11 is_stmt 0 view .LVU548 + 1702 01dc 236E ldr r3, [r4, #96] + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1703 .loc 1 987 6 view .LVU549 + 1704 01de 2BB9 cbnz r3, .L105 + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1705 .loc 1 993 5 is_stmt 1 view .LVU550 + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1706 .loc 1 993 17 is_stmt 0 view .LVU551 + 1707 01e0 0123 movs r3, #1 + 1708 01e2 84F85D30 strb r3, [r4, #93] + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1709 .loc 1 824 21 view .LVU552 + 1710 01e6 0026 movs r6, #0 + 1711 01e8 00E0 b .L105 + 1712 .LVL83: + 1713 .L131: + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1714 .loc 1 839 15 view .LVU553 + 1715 01ea 0226 movs r6, #2 + 1716 .LVL84: + 1717 .L105: + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 1718 .loc 1 998 3 is_stmt 1 view .LVU554 + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 1719 .loc 1 998 3 view .LVU555 + 1720 01ec 0023 movs r3, #0 + 1721 01ee 84F85C30 strb r3, [r4, #92] + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 1722 .loc 1 998 3 view .LVU556 + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1723 .loc 1 999 3 view .LVU557 + 1724 .LVL85: + 1725 .L104: +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1726 .loc 1 1000 1 is_stmt 0 view .LVU558 + 1727 01f2 3046 mov r0, r6 + 1728 01f4 03B0 add sp, sp, #12 + 1729 .cfi_remember_state + 1730 .cfi_def_cfa_offset 28 + 1731 @ sp needed + 1732 01f6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 1733 .LVL86: + 1734 .L130: + 1735 .cfi_restore_state + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1736 .loc 1 831 3 discriminator 1 view .LVU559 + 1737 01fa 0226 movs r6, #2 + ARM GAS /tmp/ccZ0BHQJ.s page 116 + + + 1738 01fc F9E7 b .L104 + 1739 .cfi_endproc + 1740 .LFE134: + 1742 .section .text.HAL_SPI_TransmitReceive,"ax",%progbits + 1743 .align 1 + 1744 .global HAL_SPI_TransmitReceive + 1745 .syntax unified + 1746 .thumb + 1747 .thumb_func + 1749 HAL_SPI_TransmitReceive: + 1750 .LVL87: + 1751 .LFB136: +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1752 .loc 1 1258 1 is_stmt 1 view -0 + 1753 .cfi_startproc + 1754 @ args = 4, pretend = 0, frame = 0 + 1755 @ frame_needed = 0, uses_anonymous_args = 0 +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1756 .loc 1 1258 1 is_stmt 0 view .LVU561 + 1757 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 1758 .cfi_def_cfa_offset 32 + 1759 .cfi_offset 3, -32 + 1760 .cfi_offset 4, -28 + 1761 .cfi_offset 5, -24 + 1762 .cfi_offset 6, -20 + 1763 .cfi_offset 7, -16 + 1764 .cfi_offset 8, -12 + 1765 .cfi_offset 9, -8 + 1766 .cfi_offset 14, -4 + 1767 0004 1F46 mov r7, r3 + 1768 0006 089D ldr r5, [sp, #32] +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_RxXferCount; + 1769 .loc 1 1259 3 is_stmt 1 view .LVU562 +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 1770 .loc 1 1260 3 view .LVU563 +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; + 1771 .loc 1 1261 3 view .LVU564 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 1772 .loc 1 1262 3 view .LVU565 +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 1773 .loc 1 1263 3 view .LVU566 +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 1774 .loc 1 1273 3 view .LVU567 + 1775 .LVL88: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1776 .loc 1 1274 3 view .LVU568 +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1777 .loc 1 1277 3 view .LVU569 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1778 .loc 1 1280 3 view .LVU570 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1779 .loc 1 1280 3 view .LVU571 + 1780 0008 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 1781 .LVL89: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1782 .loc 1 1280 3 is_stmt 0 view .LVU572 + 1783 000c 012B cmp r3, #1 + ARM GAS /tmp/ccZ0BHQJ.s page 117 + + + 1784 000e 00F06B81 beq .L163 + 1785 0012 0446 mov r4, r0 + 1786 0014 8846 mov r8, r1 + 1787 0016 9146 mov r9, r2 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1788 .loc 1 1280 3 is_stmt 1 discriminator 2 view .LVU573 + 1789 0018 0123 movs r3, #1 + 1790 001a 80F85C30 strb r3, [r0, #92] +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1791 .loc 1 1280 3 discriminator 2 view .LVU574 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1792 .loc 1 1283 3 view .LVU575 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1793 .loc 1 1283 15 is_stmt 0 view .LVU576 + 1794 001e FFF7FEFF bl HAL_GetTick + 1795 .LVL90: +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1796 .loc 1 1283 15 view .LVU577 + 1797 0022 0646 mov r6, r0 + 1798 .LVL91: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 1799 .loc 1 1286 3 is_stmt 1 view .LVU578 +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 1800 .loc 1 1286 23 is_stmt 0 view .LVU579 + 1801 0024 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 1802 0028 DBB2 uxtb r3, r3 + 1803 .LVL92: +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1804 .loc 1 1287 3 is_stmt 1 view .LVU580 +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1805 .loc 1 1287 23 is_stmt 0 view .LVU581 + 1806 002a 6268 ldr r2, [r4, #4] + 1807 .LVL93: +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_RxXferCount = Size; + 1808 .loc 1 1288 3 is_stmt 1 view .LVU582 +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 1809 .loc 1 1289 3 view .LVU583 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 1810 .loc 1 1295 3 view .LVU584 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 1811 .loc 1 1295 6 is_stmt 0 view .LVU585 + 1812 002c 012B cmp r3, #1 + 1813 002e 0AD0 beq .L136 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 1814 .loc 1 1295 7 discriminator 1 view .LVU586 + 1815 0030 B2F5827F cmp r2, #260 + 1816 0034 40F04681 bne .L164 +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1817 .loc 1 1296 54 view .LVU587 + 1818 0038 A268 ldr r2, [r4, #8] + 1819 .LVL94: +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1820 .loc 1 1296 40 view .LVU588 + 1821 003a 002A cmp r2, #0 + 1822 003c 40F04881 bne .L165 +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1823 .loc 1 1296 90 discriminator 1 view .LVU589 + ARM GAS /tmp/ccZ0BHQJ.s page 118 + + + 1824 0040 042B cmp r3, #4 + 1825 0042 40F04781 bne .L166 + 1826 .L136: +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1827 .loc 1 1302 3 is_stmt 1 view .LVU590 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1828 .loc 1 1302 6 is_stmt 0 view .LVU591 + 1829 0046 B8F1000F cmp r8, #0 + 1830 004a 00F04581 beq .L167 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1831 .loc 1 1302 25 discriminator 1 view .LVU592 + 1832 004e B9F1000F cmp r9, #0 + 1833 0052 00F04381 beq .L168 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1834 .loc 1 1302 46 discriminator 2 view .LVU593 + 1835 0056 002F cmp r7, #0 + 1836 0058 00F04281 beq .L169 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1837 .loc 1 1309 3 is_stmt 1 view .LVU594 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1838 .loc 1 1309 11 is_stmt 0 view .LVU595 + 1839 005c 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 1840 .LVL95: +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1841 .loc 1 1309 11 view .LVU596 + 1842 0060 DBB2 uxtb r3, r3 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1843 .loc 1 1309 6 view .LVU597 + 1844 0062 042B cmp r3, #4 + 1845 0064 02D0 beq .L138 +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1846 .loc 1 1311 5 is_stmt 1 view .LVU598 +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1847 .loc 1 1311 17 is_stmt 0 view .LVU599 + 1848 0066 0523 movs r3, #5 + 1849 0068 84F85D30 strb r3, [r4, #93] + 1850 .L138: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 1851 .loc 1 1315 3 is_stmt 1 view .LVU600 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 1852 .loc 1 1315 21 is_stmt 0 view .LVU601 + 1853 006c 0023 movs r3, #0 + 1854 006e 2366 str r3, [r4, #96] +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 1855 .loc 1 1316 3 is_stmt 1 view .LVU602 +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 1856 .loc 1 1316 21 is_stmt 0 view .LVU603 + 1857 0070 C4F84090 str r9, [r4, #64] +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 1858 .loc 1 1317 3 is_stmt 1 view .LVU604 +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 1859 .loc 1 1317 21 is_stmt 0 view .LVU605 + 1860 0074 A4F84670 strh r7, [r4, #70] @ movhi +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 1861 .loc 1 1318 3 is_stmt 1 view .LVU606 +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 1862 .loc 1 1318 21 is_stmt 0 view .LVU607 + ARM GAS /tmp/ccZ0BHQJ.s page 119 + + + 1863 0078 A4F84470 strh r7, [r4, #68] @ movhi +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1864 .loc 1 1319 3 is_stmt 1 view .LVU608 +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1865 .loc 1 1319 21 is_stmt 0 view .LVU609 + 1866 007c C4F83880 str r8, [r4, #56] +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1867 .loc 1 1320 3 is_stmt 1 view .LVU610 +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1868 .loc 1 1320 21 is_stmt 0 view .LVU611 + 1869 0080 E787 strh r7, [r4, #62] @ movhi +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1870 .loc 1 1321 3 is_stmt 1 view .LVU612 +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1871 .loc 1 1321 21 is_stmt 0 view .LVU613 + 1872 0082 A787 strh r7, [r4, #60] @ movhi +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1873 .loc 1 1324 3 is_stmt 1 view .LVU614 +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1874 .loc 1 1324 21 is_stmt 0 view .LVU615 + 1875 0084 E364 str r3, [r4, #76] +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1876 .loc 1 1325 3 is_stmt 1 view .LVU616 +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1877 .loc 1 1325 21 is_stmt 0 view .LVU617 + 1878 0086 2365 str r3, [r4, #80] +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1879 .loc 1 1336 3 is_stmt 1 view .LVU618 +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1880 .loc 1 1336 18 is_stmt 0 view .LVU619 + 1881 0088 E368 ldr r3, [r4, #12] +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1882 .loc 1 1336 6 view .LVU620 + 1883 008a B3F5E06F cmp r3, #1792 + 1884 008e 01D8 bhi .L139 +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1885 .loc 1 1336 49 discriminator 1 view .LVU621 + 1886 0090 012F cmp r7, #1 + 1887 0092 23D9 bls .L140 + 1888 .L139: +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1889 .loc 1 1339 5 is_stmt 1 view .LVU622 + 1890 0094 2268 ldr r2, [r4] + 1891 0096 5368 ldr r3, [r2, #4] + 1892 0098 23F48053 bic r3, r3, #4096 + 1893 009c 5360 str r3, [r2, #4] + 1894 .LVL96: + 1895 .L141: +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1896 .loc 1 1348 3 view .LVU623 +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1897 .loc 1 1348 12 is_stmt 0 view .LVU624 + 1898 009e 2368 ldr r3, [r4] +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1899 .loc 1 1348 22 view .LVU625 + 1900 00a0 1A68 ldr r2, [r3] +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 120 + + + 1901 .loc 1 1348 6 view .LVU626 + 1902 00a2 12F0400F tst r2, #64 + 1903 00a6 03D1 bne .L142 +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1904 .loc 1 1351 5 is_stmt 1 view .LVU627 + 1905 00a8 1A68 ldr r2, [r3] + 1906 00aa 42F04002 orr r2, r2, #64 + 1907 00ae 1A60 str r2, [r3] + 1908 .L142: +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1909 .loc 1 1355 3 view .LVU628 +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1910 .loc 1 1355 17 is_stmt 0 view .LVU629 + 1911 00b0 E368 ldr r3, [r4, #12] +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1912 .loc 1 1355 6 view .LVU630 + 1913 00b2 B3F5E06F cmp r3, #1792 + 1914 00b6 5CD9 bls .L143 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1915 .loc 1 1357 5 is_stmt 1 view .LVU631 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1916 .loc 1 1357 20 is_stmt 0 view .LVU632 + 1917 00b8 6368 ldr r3, [r4, #4] +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1918 .loc 1 1357 8 view .LVU633 + 1919 00ba 0BB1 cbz r3, .L144 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1920 .loc 1 1357 45 discriminator 1 view .LVU634 + 1921 00bc 012F cmp r7, #1 + 1922 00be 0BD1 bne .L145 + 1923 .L144: +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1924 .loc 1 1359 7 is_stmt 1 view .LVU635 +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1925 .loc 1 1359 46 is_stmt 0 view .LVU636 + 1926 00c0 A26B ldr r2, [r4, #56] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1927 .loc 1 1359 11 view .LVU637 + 1928 00c2 2368 ldr r3, [r4] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1929 .loc 1 1359 28 view .LVU638 + 1930 00c4 1288 ldrh r2, [r2] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1931 .loc 1 1359 26 view .LVU639 + 1932 00c6 DA60 str r2, [r3, #12] +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1933 .loc 1 1360 7 is_stmt 1 view .LVU640 +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1934 .loc 1 1360 11 is_stmt 0 view .LVU641 + 1935 00c8 A36B ldr r3, [r4, #56] +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1936 .loc 1 1360 24 view .LVU642 + 1937 00ca 0233 adds r3, r3, #2 + 1938 00cc A363 str r3, [r4, #56] +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1939 .loc 1 1361 7 is_stmt 1 view .LVU643 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 121 + + + 1940 .loc 1 1361 11 is_stmt 0 view .LVU644 + 1941 00ce E38F ldrh r3, [r4, #62] + 1942 00d0 9BB2 uxth r3, r3 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1943 .loc 1 1361 24 view .LVU645 + 1944 00d2 013B subs r3, r3, #1 + 1945 00d4 9BB2 uxth r3, r3 + 1946 00d6 E387 strh r3, [r4, #62] @ movhi + 1947 .L145: +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1948 .loc 1 1395 19 view .LVU646 + 1949 00d8 0127 movs r7, #1 + 1950 .LVL97: +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1951 .loc 1 1395 19 view .LVU647 + 1952 00da 30E0 b .L146 + 1953 .LVL98: + 1954 .L140: +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1955 .loc 1 1344 5 is_stmt 1 view .LVU648 + 1956 00dc 2268 ldr r2, [r4] + 1957 00de 5368 ldr r3, [r2, #4] + 1958 00e0 43F48053 orr r3, r3, #4096 + 1959 00e4 5360 str r3, [r2, #4] + 1960 .LVL99: +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1961 .loc 1 1344 5 is_stmt 0 view .LVU649 + 1962 00e6 DAE7 b .L141 + 1963 .LVL100: + 1964 .L174: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1965 .loc 1 1368 9 is_stmt 1 view .LVU650 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1966 .loc 1 1368 48 is_stmt 0 view .LVU651 + 1967 00e8 A26B ldr r2, [r4, #56] +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1968 .loc 1 1368 30 view .LVU652 + 1969 00ea 1288 ldrh r2, [r2] +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1970 .loc 1 1368 28 view .LVU653 + 1971 00ec DA60 str r2, [r3, #12] +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1972 .loc 1 1369 9 is_stmt 1 view .LVU654 +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1973 .loc 1 1369 13 is_stmt 0 view .LVU655 + 1974 00ee A36B ldr r3, [r4, #56] +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1975 .loc 1 1369 26 view .LVU656 + 1976 00f0 0233 adds r3, r3, #2 + 1977 00f2 A363 str r3, [r4, #56] +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ + 1978 .loc 1 1370 9 is_stmt 1 view .LVU657 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ + 1979 .loc 1 1370 13 is_stmt 0 view .LVU658 + 1980 00f4 E38F ldrh r3, [r4, #62] + 1981 00f6 9BB2 uxth r3, r3 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ + ARM GAS /tmp/ccZ0BHQJ.s page 122 + + + 1982 .loc 1 1370 26 view .LVU659 + 1983 00f8 013B subs r3, r3, #1 + 1984 00fa 9BB2 uxth r3, r3 + 1985 00fc E387 strh r3, [r4, #62] @ movhi +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1986 .loc 1 1372 9 is_stmt 1 view .LVU660 + 1987 .LVL101: +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1988 .loc 1 1372 19 is_stmt 0 view .LVU661 + 1989 00fe 0027 movs r7, #0 + 1990 .LVL102: + 1991 .L147: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1992 .loc 1 1389 7 is_stmt 1 view .LVU662 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1993 .loc 1 1389 12 is_stmt 0 view .LVU663 + 1994 0100 2368 ldr r3, [r4] + 1995 0102 9A68 ldr r2, [r3, #8] +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1996 .loc 1 1389 10 view .LVU664 + 1997 0104 12F0010F tst r2, #1 + 1998 0108 11D0 beq .L148 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1999 .loc 1 1389 61 discriminator 1 view .LVU665 + 2000 010a B4F84620 ldrh r2, [r4, #70] + 2001 010e 92B2 uxth r2, r2 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2002 .loc 1 1389 53 discriminator 1 view .LVU666 + 2003 0110 6AB1 cbz r2, .L148 +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2004 .loc 1 1391 9 is_stmt 1 view .LVU667 +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2005 .loc 1 1391 67 is_stmt 0 view .LVU668 + 2006 0112 DA68 ldr r2, [r3, #12] +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2007 .loc 1 1391 27 view .LVU669 + 2008 0114 236C ldr r3, [r4, #64] +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2009 .loc 1 1391 41 view .LVU670 + 2010 0116 1A80 strh r2, [r3] @ movhi +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2011 .loc 1 1392 9 is_stmt 1 view .LVU671 +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2012 .loc 1 1392 13 is_stmt 0 view .LVU672 + 2013 0118 236C ldr r3, [r4, #64] +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2014 .loc 1 1392 26 view .LVU673 + 2015 011a 0233 adds r3, r3, #2 + 2016 011c 2364 str r3, [r4, #64] +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ + 2017 .loc 1 1393 9 is_stmt 1 view .LVU674 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ + 2018 .loc 1 1393 13 is_stmt 0 view .LVU675 + 2019 011e B4F84630 ldrh r3, [r4, #70] + 2020 0122 9BB2 uxth r3, r3 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ + 2021 .loc 1 1393 26 view .LVU676 + ARM GAS /tmp/ccZ0BHQJ.s page 123 + + + 2022 0124 013B subs r3, r3, #1 + 2023 0126 9BB2 uxth r3, r3 + 2024 0128 A4F84630 strh r3, [r4, #70] @ movhi +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2025 .loc 1 1395 9 is_stmt 1 view .LVU677 + 2026 .LVL103: +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2027 .loc 1 1395 19 is_stmt 0 view .LVU678 + 2028 012c 0127 movs r7, #1 + 2029 .LVL104: + 2030 .L148: +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2031 .loc 1 1397 7 is_stmt 1 view .LVU679 +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2032 .loc 1 1397 13 is_stmt 0 view .LVU680 + 2033 012e FFF7FEFF bl HAL_GetTick + 2034 .LVL105: +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2035 .loc 1 1397 27 discriminator 1 view .LVU681 + 2036 0132 831B subs r3, r0, r6 +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2037 .loc 1 1397 10 discriminator 1 view .LVU682 + 2038 0134 AB42 cmp r3, r5 + 2039 0136 02D3 bcc .L146 +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2040 .loc 1 1397 53 discriminator 1 view .LVU683 + 2041 0138 B5F1FF3F cmp r5, #-1 + 2042 013c 14D1 bne .L173 + 2043 .LVL106: + 2044 .L146: +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2045 .loc 1 1363 37 is_stmt 1 view .LVU684 +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2046 .loc 1 1363 17 is_stmt 0 view .LVU685 + 2047 013e E38F ldrh r3, [r4, #62] + 2048 0140 9BB2 uxth r3, r3 +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2049 .loc 1 1363 37 view .LVU686 + 2050 0142 2BB9 cbnz r3, .L149 +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2051 .loc 1 1363 45 discriminator 1 view .LVU687 + 2052 0144 B4F84630 ldrh r3, [r4, #70] + 2053 0148 9BB2 uxth r3, r3 +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2054 .loc 1 1363 37 discriminator 1 view .LVU688 + 2055 014a 002B cmp r3, #0 + 2056 014c 00F0AB80 beq .L150 + 2057 .L149: +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2058 .loc 1 1366 7 is_stmt 1 view .LVU689 +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2059 .loc 1 1366 12 is_stmt 0 view .LVU690 + 2060 0150 2368 ldr r3, [r4] + 2061 0152 9A68 ldr r2, [r3, #8] +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2062 .loc 1 1366 10 view .LVU691 + 2063 0154 12F0020F tst r2, #2 + ARM GAS /tmp/ccZ0BHQJ.s page 124 + + + 2064 0158 D2D0 beq .L147 +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2065 .loc 1 1366 60 discriminator 1 view .LVU692 + 2066 015a E28F ldrh r2, [r4, #62] + 2067 015c 92B2 uxth r2, r2 +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2068 .loc 1 1366 52 discriminator 1 view .LVU693 + 2069 015e 002A cmp r2, #0 + 2070 0160 CED0 beq .L147 +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2071 .loc 1 1366 80 discriminator 2 view .LVU694 + 2072 0162 002F cmp r7, #0 + 2073 0164 CCD0 beq .L147 + 2074 0166 BFE7 b .L174 + 2075 .L173: +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2076 .loc 1 1399 9 is_stmt 1 view .LVU695 + 2077 .LVL107: +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2078 .loc 1 1400 9 view .LVU696 +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2079 .loc 1 1400 21 is_stmt 0 view .LVU697 + 2080 0168 0123 movs r3, #1 + 2081 016a 84F85D30 strb r3, [r4, #93] +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2082 .loc 1 1401 9 is_stmt 1 view .LVU698 +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2083 .loc 1 1399 19 is_stmt 0 view .LVU699 + 2084 016e 0320 movs r0, #3 +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2085 .loc 1 1401 9 view .LVU700 + 2086 0170 A9E0 b .L137 + 2087 .LVL108: + 2088 .L143: +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2089 .loc 1 1408 5 is_stmt 1 view .LVU701 +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2090 .loc 1 1408 20 is_stmt 0 view .LVU702 + 2091 0172 6368 ldr r3, [r4, #4] +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2092 .loc 1 1408 8 view .LVU703 + 2093 0174 0BB1 cbz r3, .L151 +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2094 .loc 1 1408 45 discriminator 1 view .LVU704 + 2095 0176 012F cmp r7, #1 + 2096 0178 0FD1 bne .L152 + 2097 .L151: +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2098 .loc 1 1410 7 is_stmt 1 view .LVU705 +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2099 .loc 1 1410 15 is_stmt 0 view .LVU706 + 2100 017a E38F ldrh r3, [r4, #62] + 2101 017c 9BB2 uxth r3, r3 +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2102 .loc 1 1410 10 view .LVU707 + 2103 017e 012B cmp r3, #1 + 2104 0180 0DD9 bls .L153 + ARM GAS /tmp/ccZ0BHQJ.s page 125 + + +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2105 .loc 1 1412 9 is_stmt 1 view .LVU708 +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2106 .loc 1 1412 48 is_stmt 0 view .LVU709 + 2107 0182 A26B ldr r2, [r4, #56] +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2108 .loc 1 1412 13 view .LVU710 + 2109 0184 2368 ldr r3, [r4] +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2110 .loc 1 1412 30 view .LVU711 + 2111 0186 1288 ldrh r2, [r2] +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2112 .loc 1 1412 28 view .LVU712 + 2113 0188 DA60 str r2, [r3, #12] +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2114 .loc 1 1413 9 is_stmt 1 view .LVU713 +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2115 .loc 1 1413 13 is_stmt 0 view .LVU714 + 2116 018a A36B ldr r3, [r4, #56] +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2117 .loc 1 1413 26 view .LVU715 + 2118 018c 0233 adds r3, r3, #2 + 2119 018e A363 str r3, [r4, #56] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2120 .loc 1 1414 9 is_stmt 1 view .LVU716 +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2121 .loc 1 1414 13 is_stmt 0 view .LVU717 + 2122 0190 E38F ldrh r3, [r4, #62] + 2123 0192 9BB2 uxth r3, r3 +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2124 .loc 1 1414 27 view .LVU718 + 2125 0194 023B subs r3, r3, #2 + 2126 0196 9BB2 uxth r3, r3 + 2127 0198 E387 strh r3, [r4, #62] @ movhi + 2128 .L152: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2129 .loc 1 1478 19 view .LVU719 + 2130 019a 0127 movs r7, #1 + 2131 .LVL109: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2132 .loc 1 1478 19 view .LVU720 + 2133 019c 49E0 b .L160 + 2134 .LVL110: + 2135 .L153: +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2136 .loc 1 1418 9 is_stmt 1 view .LVU721 +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2137 .loc 1 1418 54 is_stmt 0 view .LVU722 + 2138 019e A26B ldr r2, [r4, #56] +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2139 .loc 1 1418 31 view .LVU723 + 2140 01a0 2368 ldr r3, [r4] +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2141 .loc 1 1418 49 view .LVU724 + 2142 01a2 1278 ldrb r2, [r2] @ zero_extendqisi2 +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2143 .loc 1 1418 46 view .LVU725 + ARM GAS /tmp/ccZ0BHQJ.s page 126 + + + 2144 01a4 1A73 strb r2, [r3, #12] +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2145 .loc 1 1419 9 is_stmt 1 view .LVU726 +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2146 .loc 1 1419 13 is_stmt 0 view .LVU727 + 2147 01a6 A36B ldr r3, [r4, #56] +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2148 .loc 1 1419 25 view .LVU728 + 2149 01a8 0133 adds r3, r3, #1 + 2150 01aa A363 str r3, [r4, #56] +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2151 .loc 1 1420 9 is_stmt 1 view .LVU729 +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2152 .loc 1 1420 13 is_stmt 0 view .LVU730 + 2153 01ac E38F ldrh r3, [r4, #62] + 2154 01ae 9BB2 uxth r3, r3 +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2155 .loc 1 1420 26 view .LVU731 + 2156 01b0 013B subs r3, r3, #1 + 2157 01b2 9BB2 uxth r3, r3 + 2158 01b4 E387 strh r3, [r4, #62] @ movhi + 2159 01b6 F0E7 b .L152 + 2160 .LVL111: + 2161 .L175: +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2162 .loc 1 1428 9 is_stmt 1 view .LVU732 +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2163 .loc 1 1428 17 is_stmt 0 view .LVU733 + 2164 01b8 E28F ldrh r2, [r4, #62] + 2165 01ba 92B2 uxth r2, r2 +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2166 .loc 1 1428 12 view .LVU734 + 2167 01bc 012A cmp r2, #1 + 2168 01be 0CD9 bls .L155 +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2169 .loc 1 1430 11 is_stmt 1 view .LVU735 +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2170 .loc 1 1430 50 is_stmt 0 view .LVU736 + 2171 01c0 A26B ldr r2, [r4, #56] +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2172 .loc 1 1430 32 view .LVU737 + 2173 01c2 1288 ldrh r2, [r2] +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2174 .loc 1 1430 30 view .LVU738 + 2175 01c4 DA60 str r2, [r3, #12] +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2176 .loc 1 1431 11 is_stmt 1 view .LVU739 +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2177 .loc 1 1431 15 is_stmt 0 view .LVU740 + 2178 01c6 A36B ldr r3, [r4, #56] +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2179 .loc 1 1431 28 view .LVU741 + 2180 01c8 0233 adds r3, r3, #2 + 2181 01ca A363 str r3, [r4, #56] +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2182 .loc 1 1432 11 is_stmt 1 view .LVU742 +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 127 + + + 2183 .loc 1 1432 15 is_stmt 0 view .LVU743 + 2184 01cc E38F ldrh r3, [r4, #62] + 2185 01ce 9BB2 uxth r3, r3 +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2186 .loc 1 1432 29 view .LVU744 + 2187 01d0 023B subs r3, r3, #2 + 2188 01d2 9BB2 uxth r3, r3 + 2189 01d4 E387 strh r3, [r4, #62] @ movhi +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2190 .loc 1 1441 19 view .LVU745 + 2191 01d6 0027 movs r7, #0 + 2192 .LVL112: +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2193 .loc 1 1441 19 view .LVU746 + 2194 01d8 3DE0 b .L154 + 2195 .LVL113: + 2196 .L155: +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2197 .loc 1 1436 11 is_stmt 1 view .LVU747 +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2198 .loc 1 1436 56 is_stmt 0 view .LVU748 + 2199 01da A26B ldr r2, [r4, #56] +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2200 .loc 1 1436 51 view .LVU749 + 2201 01dc 1278 ldrb r2, [r2] @ zero_extendqisi2 +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2202 .loc 1 1436 48 view .LVU750 + 2203 01de 1A73 strb r2, [r3, #12] +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2204 .loc 1 1437 11 is_stmt 1 view .LVU751 +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2205 .loc 1 1437 15 is_stmt 0 view .LVU752 + 2206 01e0 A36B ldr r3, [r4, #56] +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2207 .loc 1 1437 27 view .LVU753 + 2208 01e2 0133 adds r3, r3, #1 + 2209 01e4 A363 str r3, [r4, #56] +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2210 .loc 1 1438 11 is_stmt 1 view .LVU754 +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2211 .loc 1 1438 15 is_stmt 0 view .LVU755 + 2212 01e6 E38F ldrh r3, [r4, #62] + 2213 01e8 9BB2 uxth r3, r3 +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2214 .loc 1 1438 28 view .LVU756 + 2215 01ea 013B subs r3, r3, #1 + 2216 01ec 9BB2 uxth r3, r3 + 2217 01ee E387 strh r3, [r4, #62] @ movhi +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2218 .loc 1 1441 19 view .LVU757 + 2219 01f0 0027 movs r7, #0 + 2220 .LVL114: +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2221 .loc 1 1441 19 view .LVU758 + 2222 01f2 30E0 b .L154 + 2223 .LVL115: + 2224 .L176: + ARM GAS /tmp/ccZ0BHQJ.s page 128 + + +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2225 .loc 1 1468 13 is_stmt 1 view .LVU759 + 2226 01f4 2268 ldr r2, [r4] + 2227 01f6 5368 ldr r3, [r2, #4] + 2228 01f8 43F48053 orr r3, r3, #4096 + 2229 01fc 5360 str r3, [r2, #4] +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2230 .loc 1 1478 19 is_stmt 0 view .LVU760 + 2231 01fe 0127 movs r7, #1 + 2232 .LVL116: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2233 .loc 1 1478 19 view .LVU761 + 2234 0200 0DE0 b .L156 + 2235 .LVL117: + 2236 .L157: +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2237 .loc 1 1473 11 is_stmt 1 view .LVU762 +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2238 .loc 1 1473 28 is_stmt 0 view .LVU763 + 2239 0202 226C ldr r2, [r4, #64] +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2240 .loc 1 1473 44 view .LVU764 + 2241 0204 1B7B ldrb r3, [r3, #12] @ zero_extendqisi2 +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2242 .loc 1 1473 42 view .LVU765 + 2243 0206 1370 strb r3, [r2] +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2244 .loc 1 1474 11 is_stmt 1 view .LVU766 +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2245 .loc 1 1474 15 is_stmt 0 view .LVU767 + 2246 0208 236C ldr r3, [r4, #64] +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2247 .loc 1 1474 27 view .LVU768 + 2248 020a 0133 adds r3, r3, #1 + 2249 020c 2364 str r3, [r4, #64] +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2250 .loc 1 1475 11 is_stmt 1 view .LVU769 +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2251 .loc 1 1475 15 is_stmt 0 view .LVU770 + 2252 020e B4F84630 ldrh r3, [r4, #70] + 2253 0212 9BB2 uxth r3, r3 +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2254 .loc 1 1475 28 view .LVU771 + 2255 0214 013B subs r3, r3, #1 + 2256 0216 9BB2 uxth r3, r3 + 2257 0218 A4F84630 strh r3, [r4, #70] @ movhi +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2258 .loc 1 1478 19 view .LVU772 + 2259 021c 0127 movs r7, #1 + 2260 .LVL118: + 2261 .L156: +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2262 .loc 1 1480 7 is_stmt 1 view .LVU773 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2263 .loc 1 1480 14 is_stmt 0 view .LVU774 + 2264 021e FFF7FEFF bl HAL_GetTick + 2265 .LVL119: + ARM GAS /tmp/ccZ0BHQJ.s page 129 + + +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2266 .loc 1 1480 28 discriminator 1 view .LVU775 + 2267 0222 801B subs r0, r0, r6 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2268 .loc 1 1480 10 discriminator 1 view .LVU776 + 2269 0224 A842 cmp r0, r5 + 2270 0226 02D3 bcc .L158 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2271 .loc 1 1480 54 discriminator 1 view .LVU777 + 2272 0228 B5F1FF3F cmp r5, #-1 + 2273 022c 36D1 bne .L159 + 2274 .L158: +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2275 .loc 1 1480 87 discriminator 3 view .LVU778 + 2276 022e 002D cmp r5, #0 + 2277 0230 34D0 beq .L159 + 2278 .LVL120: + 2279 .L160: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2280 .loc 1 1423 37 is_stmt 1 view .LVU779 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2281 .loc 1 1423 17 is_stmt 0 view .LVU780 + 2282 0232 E38F ldrh r3, [r4, #62] + 2283 0234 9BB2 uxth r3, r3 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2284 .loc 1 1423 37 view .LVU781 + 2285 0236 23B9 cbnz r3, .L161 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2286 .loc 1 1423 45 discriminator 1 view .LVU782 + 2287 0238 B4F84630 ldrh r3, [r4, #70] + 2288 023c 9BB2 uxth r3, r3 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2289 .loc 1 1423 37 discriminator 1 view .LVU783 + 2290 023e 002B cmp r3, #0 + 2291 0240 31D0 beq .L150 + 2292 .L161: +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2293 .loc 1 1426 7 is_stmt 1 view .LVU784 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2294 .loc 1 1426 12 is_stmt 0 view .LVU785 + 2295 0242 2368 ldr r3, [r4] + 2296 0244 9A68 ldr r2, [r3, #8] +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2297 .loc 1 1426 10 view .LVU786 + 2298 0246 12F0020F tst r2, #2 + 2299 024a 04D0 beq .L154 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2300 .loc 1 1426 60 discriminator 1 view .LVU787 + 2301 024c E28F ldrh r2, [r4, #62] + 2302 024e 92B2 uxth r2, r2 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2303 .loc 1 1426 52 discriminator 1 view .LVU788 + 2304 0250 0AB1 cbz r2, .L154 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2305 .loc 1 1426 80 discriminator 2 view .LVU789 + 2306 0252 002F cmp r7, #0 + 2307 0254 B0D1 bne .L175 + ARM GAS /tmp/ccZ0BHQJ.s page 130 + + + 2308 .LVL121: + 2309 .L154: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2310 .loc 1 1458 7 is_stmt 1 view .LVU790 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2311 .loc 1 1458 12 is_stmt 0 view .LVU791 + 2312 0256 2368 ldr r3, [r4] + 2313 0258 9A68 ldr r2, [r3, #8] +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2314 .loc 1 1458 10 view .LVU792 + 2315 025a 12F0010F tst r2, #1 + 2316 025e DED0 beq .L156 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2317 .loc 1 1458 61 discriminator 1 view .LVU793 + 2318 0260 B4F84620 ldrh r2, [r4, #70] + 2319 0264 92B2 uxth r2, r2 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2320 .loc 1 1458 53 discriminator 1 view .LVU794 + 2321 0266 002A cmp r2, #0 + 2322 0268 D9D0 beq .L156 +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2323 .loc 1 1460 9 is_stmt 1 view .LVU795 +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2324 .loc 1 1460 17 is_stmt 0 view .LVU796 + 2325 026a B4F84620 ldrh r2, [r4, #70] + 2326 026e 92B2 uxth r2, r2 +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2327 .loc 1 1460 12 view .LVU797 + 2328 0270 012A cmp r2, #1 + 2329 0272 C6D9 bls .L157 +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2330 .loc 1 1462 11 is_stmt 1 view .LVU798 +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2331 .loc 1 1462 69 is_stmt 0 view .LVU799 + 2332 0274 DA68 ldr r2, [r3, #12] +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2333 .loc 1 1462 29 view .LVU800 + 2334 0276 236C ldr r3, [r4, #64] +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2335 .loc 1 1462 43 view .LVU801 + 2336 0278 1A80 strh r2, [r3] @ movhi +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 2337 .loc 1 1463 11 is_stmt 1 view .LVU802 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 2338 .loc 1 1463 15 is_stmt 0 view .LVU803 + 2339 027a 236C ldr r3, [r4, #64] +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 2340 .loc 1 1463 28 view .LVU804 + 2341 027c 0233 adds r3, r3, #2 + 2342 027e 2364 str r3, [r4, #64] +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) + 2343 .loc 1 1464 11 is_stmt 1 view .LVU805 +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) + 2344 .loc 1 1464 15 is_stmt 0 view .LVU806 + 2345 0280 B4F84630 ldrh r3, [r4, #70] + 2346 0284 9BB2 uxth r3, r3 +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) + ARM GAS /tmp/ccZ0BHQJ.s page 131 + + + 2347 .loc 1 1464 29 view .LVU807 + 2348 0286 023B subs r3, r3, #2 + 2349 0288 9BB2 uxth r3, r3 + 2350 028a A4F84630 strh r3, [r4, #70] @ movhi +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2351 .loc 1 1465 11 is_stmt 1 view .LVU808 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2352 .loc 1 1465 19 is_stmt 0 view .LVU809 + 2353 028e B4F84630 ldrh r3, [r4, #70] + 2354 0292 9BB2 uxth r3, r3 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2355 .loc 1 1465 14 view .LVU810 + 2356 0294 012B cmp r3, #1 + 2357 0296 ADD9 bls .L176 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2358 .loc 1 1478 19 view .LVU811 + 2359 0298 0127 movs r7, #1 + 2360 .LVL122: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2361 .loc 1 1478 19 view .LVU812 + 2362 029a C0E7 b .L156 + 2363 .LVL123: + 2364 .L159: +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2365 .loc 1 1482 9 is_stmt 1 view .LVU813 +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2366 .loc 1 1483 9 view .LVU814 +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2367 .loc 1 1483 21 is_stmt 0 view .LVU815 + 2368 029c 0123 movs r3, #1 + 2369 029e 84F85D30 strb r3, [r4, #93] +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2370 .loc 1 1484 9 is_stmt 1 view .LVU816 +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2371 .loc 1 1482 19 is_stmt 0 view .LVU817 + 2372 02a2 0320 movs r0, #3 +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2373 .loc 1 1484 9 view .LVU818 + 2374 02a4 0FE0 b .L137 + 2375 .LVL124: + 2376 .L150: +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2377 .loc 1 1547 3 is_stmt 1 view .LVU819 +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2378 .loc 1 1547 7 is_stmt 0 view .LVU820 + 2379 02a6 3246 mov r2, r6 + 2380 02a8 2946 mov r1, r5 + 2381 02aa 2046 mov r0, r4 + 2382 02ac FFF7FEFF bl SPI_EndRxTxTransaction + 2383 .LVL125: +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2384 .loc 1 1547 6 discriminator 1 view .LVU821 + 2385 02b0 10B1 cbz r0, .L162 +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 2386 .loc 1 1549 5 is_stmt 1 view .LVU822 + 2387 .LVL126: +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 132 + + + 2388 .loc 1 1550 5 view .LVU823 +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2389 .loc 1 1550 21 is_stmt 0 view .LVU824 + 2390 02b2 2023 movs r3, #32 + 2391 02b4 2366 str r3, [r4, #96] +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 2392 .loc 1 1549 15 view .LVU825 + 2393 02b6 0120 movs r0, #1 + 2394 .LVL127: + 2395 .L162: +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2396 .loc 1 1553 3 is_stmt 1 view .LVU826 +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2397 .loc 1 1553 11 is_stmt 0 view .LVU827 + 2398 02b8 236E ldr r3, [r4, #96] +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2399 .loc 1 1553 6 view .LVU828 + 2400 02ba 9BB9 cbnz r3, .L171 +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2401 .loc 1 1559 5 is_stmt 1 view .LVU829 +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2402 .loc 1 1559 17 is_stmt 0 view .LVU830 + 2403 02bc 0123 movs r3, #1 + 2404 02be 84F85D30 strb r3, [r4, #93] + 2405 02c2 00E0 b .L137 + 2406 .LVL128: + 2407 .L164: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2408 .loc 1 1298 15 view .LVU831 + 2409 02c4 0220 movs r0, #2 + 2410 .LVL129: + 2411 .L137: +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2412 .loc 1 1563 3 is_stmt 1 view .LVU832 +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2413 .loc 1 1563 3 view .LVU833 + 2414 02c6 0023 movs r3, #0 + 2415 02c8 84F85C30 strb r3, [r4, #92] +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2416 .loc 1 1563 3 view .LVU834 +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2417 .loc 1 1564 3 view .LVU835 + 2418 .LVL130: + 2419 .L135: +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2420 .loc 1 1565 1 is_stmt 0 view .LVU836 + 2421 02cc BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 2422 .LVL131: + 2423 .L165: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2424 .loc 1 1298 15 view .LVU837 + 2425 02d0 0220 movs r0, #2 + 2426 .LVL132: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2427 .loc 1 1298 15 view .LVU838 + 2428 02d2 F8E7 b .L137 + 2429 .LVL133: + ARM GAS /tmp/ccZ0BHQJ.s page 133 + + + 2430 .L166: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2431 .loc 1 1298 15 view .LVU839 + 2432 02d4 0220 movs r0, #2 + 2433 .LVL134: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2434 .loc 1 1298 15 view .LVU840 + 2435 02d6 F6E7 b .L137 + 2436 .LVL135: + 2437 .L167: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2438 .loc 1 1304 15 view .LVU841 + 2439 02d8 0120 movs r0, #1 + 2440 .LVL136: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2441 .loc 1 1304 15 view .LVU842 + 2442 02da F4E7 b .L137 + 2443 .LVL137: + 2444 .L168: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2445 .loc 1 1304 15 view .LVU843 + 2446 02dc 0120 movs r0, #1 + 2447 .LVL138: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2448 .loc 1 1304 15 view .LVU844 + 2449 02de F2E7 b .L137 + 2450 .LVL139: + 2451 .L169: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2452 .loc 1 1304 15 view .LVU845 + 2453 02e0 0120 movs r0, #1 + 2454 .LVL140: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2455 .loc 1 1304 15 view .LVU846 + 2456 02e2 F0E7 b .L137 + 2457 .LVL141: + 2458 .L171: +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2459 .loc 1 1555 15 view .LVU847 + 2460 02e4 0120 movs r0, #1 + 2461 .LVL142: +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2462 .loc 1 1555 15 view .LVU848 + 2463 02e6 EEE7 b .L137 + 2464 .LVL143: + 2465 .L163: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2466 .loc 1 1280 3 discriminator 1 view .LVU849 + 2467 02e8 0220 movs r0, #2 + 2468 .LVL144: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2469 .loc 1 1280 3 discriminator 1 view .LVU850 + 2470 02ea EFE7 b .L135 + 2471 .cfi_endproc + 2472 .LFE136: + 2474 .section .text.HAL_SPI_Receive,"ax",%progbits + 2475 .align 1 + ARM GAS /tmp/ccZ0BHQJ.s page 134 + + + 2476 .global HAL_SPI_Receive + 2477 .syntax unified + 2478 .thumb + 2479 .thumb_func + 2481 HAL_SPI_Receive: + 2482 .LVL145: + 2483 .LFB135: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 2484 .loc 1 1012 1 is_stmt 1 view -0 + 2485 .cfi_startproc + 2486 @ args = 0, pretend = 0, frame = 0 + 2487 @ frame_needed = 0, uses_anonymous_args = 0 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 2488 .loc 1 1012 1 is_stmt 0 view .LVU852 + 2489 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 2490 .cfi_def_cfa_offset 28 + 2491 .cfi_offset 4, -28 + 2492 .cfi_offset 5, -24 + 2493 .cfi_offset 6, -20 + 2494 .cfi_offset 7, -16 + 2495 .cfi_offset 8, -12 + 2496 .cfi_offset 9, -8 + 2497 .cfi_offset 14, -4 + 2498 0004 83B0 sub sp, sp, #12 + 2499 .cfi_def_cfa_offset 40 + 2500 0006 0446 mov r4, r0 +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 2501 .loc 1 1018 3 is_stmt 1 view .LVU853 +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2502 .loc 1 1019 3 view .LVU854 + 2503 .LVL146: +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2504 .loc 1 1021 3 view .LVU855 +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2505 .loc 1 1021 11 is_stmt 0 view .LVU856 + 2506 0008 90F85D60 ldrb r6, [r0, #93] @ zero_extendqisi2 + 2507 000c F6B2 uxtb r6, r6 +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2508 .loc 1 1021 6 view .LVU857 + 2509 000e 012E cmp r6, #1 + 2510 0010 40F0C080 bne .L199 + 2511 0014 8846 mov r8, r1 + 2512 0016 9146 mov r9, r2 + 2513 0018 1D46 mov r5, r3 +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2514 .loc 1 1027 3 is_stmt 1 view .LVU858 +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2515 .loc 1 1027 18 is_stmt 0 view .LVU859 + 2516 001a 4368 ldr r3, [r0, #4] + 2517 .LVL147: +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2518 .loc 1 1027 6 view .LVU860 + 2519 001c B3F5827F cmp r3, #260 + 2520 0020 3DD0 beq .L202 + 2521 .L179: +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2522 .loc 1 1035 3 is_stmt 1 view .LVU861 + ARM GAS /tmp/ccZ0BHQJ.s page 135 + + +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2523 .loc 1 1035 3 view .LVU862 + 2524 0022 94F85C30 ldrb r3, [r4, #92] @ zero_extendqisi2 + 2525 0026 012B cmp r3, #1 + 2526 0028 00F0BC80 beq .L200 +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2527 .loc 1 1035 3 discriminator 2 view .LVU863 + 2528 002c 0123 movs r3, #1 + 2529 002e 84F85C30 strb r3, [r4, #92] +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2530 .loc 1 1035 3 discriminator 2 view .LVU864 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2531 .loc 1 1038 3 view .LVU865 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2532 .loc 1 1038 15 is_stmt 0 view .LVU866 + 2533 0032 FFF7FEFF bl HAL_GetTick + 2534 .LVL148: +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2535 .loc 1 1038 15 view .LVU867 + 2536 0036 0746 mov r7, r0 + 2537 .LVL149: +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2538 .loc 1 1040 3 is_stmt 1 view .LVU868 +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2539 .loc 1 1040 6 is_stmt 0 view .LVU869 + 2540 0038 B8F1000F cmp r8, #0 + 2541 003c 00F0AB80 beq .L178 +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2542 .loc 1 1040 23 discriminator 1 view .LVU870 + 2543 0040 B9F1000F cmp r9, #0 + 2544 0044 00F0A780 beq .L178 +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2545 .loc 1 1047 3 is_stmt 1 view .LVU871 +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2546 .loc 1 1047 21 is_stmt 0 view .LVU872 + 2547 0048 0423 movs r3, #4 + 2548 004a 84F85D30 strb r3, [r4, #93] +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 2549 .loc 1 1048 3 is_stmt 1 view .LVU873 +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 2550 .loc 1 1048 21 is_stmt 0 view .LVU874 + 2551 004e 0023 movs r3, #0 + 2552 0050 2366 str r3, [r4, #96] +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 2553 .loc 1 1049 3 is_stmt 1 view .LVU875 +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 2554 .loc 1 1049 21 is_stmt 0 view .LVU876 + 2555 0052 C4F84080 str r8, [r4, #64] +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 2556 .loc 1 1050 3 is_stmt 1 view .LVU877 +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 2557 .loc 1 1050 21 is_stmt 0 view .LVU878 + 2558 0056 A4F84490 strh r9, [r4, #68] @ movhi +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2559 .loc 1 1051 3 is_stmt 1 view .LVU879 +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2560 .loc 1 1051 21 is_stmt 0 view .LVU880 + ARM GAS /tmp/ccZ0BHQJ.s page 136 + + + 2561 005a A4F84690 strh r9, [r4, #70] @ movhi +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 2562 .loc 1 1054 3 is_stmt 1 view .LVU881 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 2563 .loc 1 1054 21 is_stmt 0 view .LVU882 + 2564 005e A363 str r3, [r4, #56] +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 2565 .loc 1 1055 3 is_stmt 1 view .LVU883 +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 2566 .loc 1 1055 21 is_stmt 0 view .LVU884 + 2567 0060 A387 strh r3, [r4, #60] @ movhi +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2568 .loc 1 1056 3 is_stmt 1 view .LVU885 +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2569 .loc 1 1056 21 is_stmt 0 view .LVU886 + 2570 0062 E387 strh r3, [r4, #62] @ movhi +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 2571 .loc 1 1057 3 is_stmt 1 view .LVU887 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 2572 .loc 1 1057 21 is_stmt 0 view .LVU888 + 2573 0064 E364 str r3, [r4, #76] +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2574 .loc 1 1058 3 is_stmt 1 view .LVU889 +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2575 .loc 1 1058 21 is_stmt 0 view .LVU890 + 2576 0066 2365 str r3, [r4, #80] +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2577 .loc 1 1071 3 is_stmt 1 view .LVU891 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2578 .loc 1 1071 17 is_stmt 0 view .LVU892 + 2579 0068 E368 ldr r3, [r4, #12] +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2580 .loc 1 1071 6 view .LVU893 + 2581 006a B3F5E06F cmp r3, #1792 + 2582 006e 23D9 bls .L181 +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2583 .loc 1 1074 5 is_stmt 1 view .LVU894 + 2584 0070 2268 ldr r2, [r4] + 2585 0072 5368 ldr r3, [r2, #4] + 2586 0074 23F48053 bic r3, r3, #4096 + 2587 0078 5360 str r3, [r2, #4] + 2588 .L182: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2589 .loc 1 1083 3 view .LVU895 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2590 .loc 1 1083 17 is_stmt 0 view .LVU896 + 2591 007a A368 ldr r3, [r4, #8] +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2592 .loc 1 1083 6 view .LVU897 + 2593 007c B3F5004F cmp r3, #32768 + 2594 0080 20D0 beq .L203 + 2595 .L183: +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2596 .loc 1 1091 3 is_stmt 1 view .LVU898 +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2597 .loc 1 1091 12 is_stmt 0 view .LVU899 + 2598 0082 2368 ldr r3, [r4] + ARM GAS /tmp/ccZ0BHQJ.s page 137 + + +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2599 .loc 1 1091 22 view .LVU900 + 2600 0084 1A68 ldr r2, [r3] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2601 .loc 1 1091 6 view .LVU901 + 2602 0086 12F0400F tst r2, #64 + 2603 008a 03D1 bne .L184 +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2604 .loc 1 1094 5 is_stmt 1 view .LVU902 + 2605 008c 1A68 ldr r2, [r3] + 2606 008e 42F04002 orr r2, r2, #64 + 2607 0092 1A60 str r2, [r3] + 2608 .L184: +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2609 .loc 1 1098 3 view .LVU903 +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2610 .loc 1 1098 17 is_stmt 0 view .LVU904 + 2611 0094 E368 ldr r3, [r4, #12] +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2612 .loc 1 1098 6 view .LVU905 + 2613 0096 B3F5E06F cmp r3, #1792 + 2614 009a 27D9 bls .L185 + 2615 009c 4CE0 b .L186 + 2616 .LVL150: + 2617 .L202: +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2618 .loc 1 1027 58 discriminator 1 view .LVU906 + 2619 009e 8368 ldr r3, [r0, #8] +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2620 .loc 1 1027 44 discriminator 1 view .LVU907 + 2621 00a0 002B cmp r3, #0 + 2622 00a2 BED1 bne .L179 +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 2623 .loc 1 1029 5 is_stmt 1 view .LVU908 +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 2624 .loc 1 1029 17 is_stmt 0 view .LVU909 + 2625 00a4 0423 movs r3, #4 + 2626 00a6 80F85D30 strb r3, [r0, #93] +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2627 .loc 1 1031 5 is_stmt 1 view .LVU910 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2628 .loc 1 1031 12 is_stmt 0 view .LVU911 + 2629 00aa 0095 str r5, [sp] + 2630 00ac 1346 mov r3, r2 + 2631 00ae 0A46 mov r2, r1 + 2632 .LVL151: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2633 .loc 1 1031 12 view .LVU912 + 2634 00b0 FFF7FEFF bl HAL_SPI_TransmitReceive + 2635 .LVL152: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2636 .loc 1 1031 12 view .LVU913 + 2637 00b4 0646 mov r6, r0 + 2638 00b6 71E0 b .L180 + 2639 .LVL153: + 2640 .L181: +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 138 + + + 2641 .loc 1 1079 5 is_stmt 1 view .LVU914 + 2642 00b8 2268 ldr r2, [r4] + 2643 00ba 5368 ldr r3, [r2, #4] + 2644 00bc 43F48053 orr r3, r3, #4096 + 2645 00c0 5360 str r3, [r2, #4] + 2646 00c2 DAE7 b .L182 + 2647 .L203: +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 2648 .loc 1 1086 5 view .LVU915 + 2649 00c4 2268 ldr r2, [r4] + 2650 00c6 1368 ldr r3, [r2] + 2651 00c8 23F04003 bic r3, r3, #64 + 2652 00cc 1360 str r3, [r2] +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2653 .loc 1 1087 5 view .LVU916 + 2654 00ce 2268 ldr r2, [r4] + 2655 00d0 1368 ldr r3, [r2] + 2656 00d2 23F48043 bic r3, r3, #16384 + 2657 00d6 1360 str r3, [r2] + 2658 00d8 D3E7 b .L183 + 2659 .LVL154: + 2660 .L187: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2661 .loc 1 1114 9 view .LVU917 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2662 .loc 1 1114 16 is_stmt 0 view .LVU918 + 2663 00da FFF7FEFF bl HAL_GetTick + 2664 .LVL155: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2665 .loc 1 1114 30 discriminator 1 view .LVU919 + 2666 00de C01B subs r0, r0, r7 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2667 .loc 1 1114 12 discriminator 1 view .LVU920 + 2668 00e0 A842 cmp r0, r5 + 2669 00e2 02D3 bcc .L189 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2670 .loc 1 1114 56 discriminator 1 view .LVU921 + 2671 00e4 B5F1FF3F cmp r5, #-1 + 2672 00e8 18D1 bne .L190 + 2673 .L189: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2674 .loc 1 1114 87 discriminator 3 view .LVU922 + 2675 00ea BDB1 cbz r5, .L190 + 2676 .L185: +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2677 .loc 1 1101 30 is_stmt 1 view .LVU923 +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2678 .loc 1 1101 16 is_stmt 0 view .LVU924 + 2679 00ec B4F84630 ldrh r3, [r4, #70] + 2680 00f0 9BB2 uxth r3, r3 +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2681 .loc 1 1101 30 view .LVU925 + 2682 00f2 002B cmp r3, #0 + 2683 00f4 3FD0 beq .L192 +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2684 .loc 1 1104 7 is_stmt 1 view .LVU926 +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 139 + + + 2685 .loc 1 1104 11 is_stmt 0 view .LVU927 + 2686 00f6 2368 ldr r3, [r4] + 2687 00f8 9A68 ldr r2, [r3, #8] +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2688 .loc 1 1104 10 view .LVU928 + 2689 00fa 12F0010F tst r2, #1 + 2690 00fe ECD0 beq .L187 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2691 .loc 1 1107 9 is_stmt 1 view .LVU929 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2692 .loc 1 1107 27 is_stmt 0 view .LVU930 + 2693 0100 226C ldr r2, [r4, #64] +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2694 .loc 1 1107 43 view .LVU931 + 2695 0102 1B7B ldrb r3, [r3, #12] @ zero_extendqisi2 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2696 .loc 1 1107 41 view .LVU932 + 2697 0104 1370 strb r3, [r2] +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2698 .loc 1 1108 9 is_stmt 1 view .LVU933 +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2699 .loc 1 1108 13 is_stmt 0 view .LVU934 + 2700 0106 236C ldr r3, [r4, #64] +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2701 .loc 1 1108 26 view .LVU935 + 2702 0108 0133 adds r3, r3, #1 + 2703 010a 2364 str r3, [r4, #64] +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2704 .loc 1 1109 9 is_stmt 1 view .LVU936 +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2705 .loc 1 1109 13 is_stmt 0 view .LVU937 + 2706 010c B4F84630 ldrh r3, [r4, #70] + 2707 0110 9BB2 uxth r3, r3 +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2708 .loc 1 1109 26 view .LVU938 + 2709 0112 013B subs r3, r3, #1 + 2710 0114 9BB2 uxth r3, r3 + 2711 0116 A4F84630 strh r3, [r4, #70] @ movhi + 2712 011a E7E7 b .L185 + 2713 .L190: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2714 .loc 1 1116 11 is_stmt 1 view .LVU939 + 2715 .LVL156: +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2716 .loc 1 1117 11 view .LVU940 +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2717 .loc 1 1117 23 is_stmt 0 view .LVU941 + 2718 011c 0123 movs r3, #1 + 2719 011e 84F85D30 strb r3, [r4, #93] +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2720 .loc 1 1118 11 is_stmt 1 view .LVU942 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2721 .loc 1 1116 21 is_stmt 0 view .LVU943 + 2722 0122 0326 movs r6, #3 +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2723 .loc 1 1118 11 view .LVU944 + 2724 0124 37E0 b .L178 + ARM GAS /tmp/ccZ0BHQJ.s page 140 + + + 2725 .LVL157: + 2726 .L193: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2727 .loc 1 1138 9 is_stmt 1 view .LVU945 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2728 .loc 1 1138 16 is_stmt 0 view .LVU946 + 2729 0126 FFF7FEFF bl HAL_GetTick + 2730 .LVL158: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2731 .loc 1 1138 30 discriminator 1 view .LVU947 + 2732 012a C01B subs r0, r0, r7 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2733 .loc 1 1138 12 discriminator 1 view .LVU948 + 2734 012c A842 cmp r0, r5 + 2735 012e 02D3 bcc .L195 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2736 .loc 1 1138 56 discriminator 1 view .LVU949 + 2737 0130 B5F1FF3F cmp r5, #-1 + 2738 0134 1AD1 bne .L196 + 2739 .L195: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2740 .loc 1 1138 87 discriminator 3 view .LVU950 + 2741 0136 CDB1 cbz r5, .L196 + 2742 .L186: +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2743 .loc 1 1126 30 is_stmt 1 view .LVU951 +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2744 .loc 1 1126 16 is_stmt 0 view .LVU952 + 2745 0138 B4F84630 ldrh r3, [r4, #70] + 2746 013c 9BB2 uxth r3, r3 +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2747 .loc 1 1126 30 view .LVU953 + 2748 013e D3B1 cbz r3, .L192 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2749 .loc 1 1129 7 is_stmt 1 view .LVU954 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2750 .loc 1 1129 11 is_stmt 0 view .LVU955 + 2751 0140 2368 ldr r3, [r4] + 2752 0142 9A68 ldr r2, [r3, #8] +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2753 .loc 1 1129 10 view .LVU956 + 2754 0144 12F0010F tst r2, #1 + 2755 0148 EDD0 beq .L193 +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2756 .loc 1 1131 9 is_stmt 1 view .LVU957 +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2757 .loc 1 1131 67 is_stmt 0 view .LVU958 + 2758 014a DA68 ldr r2, [r3, #12] +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2759 .loc 1 1131 27 view .LVU959 + 2760 014c 236C ldr r3, [r4, #64] +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2761 .loc 1 1131 41 view .LVU960 + 2762 014e 1A80 strh r2, [r3] @ movhi +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2763 .loc 1 1132 9 is_stmt 1 view .LVU961 +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + ARM GAS /tmp/ccZ0BHQJ.s page 141 + + + 2764 .loc 1 1132 13 is_stmt 0 view .LVU962 + 2765 0150 236C ldr r3, [r4, #64] +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2766 .loc 1 1132 26 view .LVU963 + 2767 0152 0233 adds r3, r3, #2 + 2768 0154 2364 str r3, [r4, #64] +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2769 .loc 1 1133 9 is_stmt 1 view .LVU964 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2770 .loc 1 1133 13 is_stmt 0 view .LVU965 + 2771 0156 B4F846C0 ldrh ip, [r4, #70] + 2772 015a 1FFA8CFC uxth ip, ip +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2773 .loc 1 1133 26 view .LVU966 + 2774 015e 0CF1FF3C add ip, ip, #-1 + 2775 0162 1FFA8CFC uxth ip, ip + 2776 0166 A4F846C0 strh ip, [r4, #70] @ movhi + 2777 016a E5E7 b .L186 + 2778 .L196: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2779 .loc 1 1140 11 is_stmt 1 view .LVU967 + 2780 .LVL159: +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2781 .loc 1 1141 11 view .LVU968 +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2782 .loc 1 1141 23 is_stmt 0 view .LVU969 + 2783 016c 0123 movs r3, #1 + 2784 016e 84F85D30 strb r3, [r4, #93] +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2785 .loc 1 1142 11 is_stmt 1 view .LVU970 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2786 .loc 1 1140 21 is_stmt 0 view .LVU971 + 2787 0172 0326 movs r6, #3 +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2788 .loc 1 1142 11 view .LVU972 + 2789 0174 0FE0 b .L178 + 2790 .LVL160: + 2791 .L192: +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2792 .loc 1 1218 3 is_stmt 1 view .LVU973 +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2793 .loc 1 1218 7 is_stmt 0 view .LVU974 + 2794 0176 3A46 mov r2, r7 + 2795 0178 2946 mov r1, r5 + 2796 017a 2046 mov r0, r4 + 2797 017c FFF7FEFF bl SPI_EndRxTransaction + 2798 .LVL161: +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2799 .loc 1 1218 6 discriminator 1 view .LVU975 + 2800 0180 08B1 cbz r0, .L198 +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2801 .loc 1 1220 5 is_stmt 1 view .LVU976 +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2802 .loc 1 1220 21 is_stmt 0 view .LVU977 + 2803 0182 2023 movs r3, #32 + 2804 0184 2366 str r3, [r4, #96] + 2805 .L198: + ARM GAS /tmp/ccZ0BHQJ.s page 142 + + +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2806 .loc 1 1232 3 is_stmt 1 view .LVU978 +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2807 .loc 1 1232 11 is_stmt 0 view .LVU979 + 2808 0186 236E ldr r3, [r4, #96] +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2809 .loc 1 1232 6 view .LVU980 + 2810 0188 2BB9 cbnz r3, .L178 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2811 .loc 1 1238 5 is_stmt 1 view .LVU981 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2812 .loc 1 1238 17 is_stmt 0 view .LVU982 + 2813 018a 0123 movs r3, #1 + 2814 018c 84F85D30 strb r3, [r4, #93] +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2815 .loc 1 1019 21 view .LVU983 + 2816 0190 0026 movs r6, #0 + 2817 0192 00E0 b .L178 + 2818 .LVL162: + 2819 .L199: +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2820 .loc 1 1023 15 view .LVU984 + 2821 0194 0226 movs r6, #2 + 2822 .LVL163: + 2823 .L178: +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2824 .loc 1 1242 3 is_stmt 1 view .LVU985 +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2825 .loc 1 1242 3 view .LVU986 + 2826 0196 0023 movs r3, #0 + 2827 0198 84F85C30 strb r3, [r4, #92] +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2828 .loc 1 1242 3 view .LVU987 +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2829 .loc 1 1243 3 view .LVU988 + 2830 .LVL164: + 2831 .L180: +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2832 .loc 1 1244 1 is_stmt 0 view .LVU989 + 2833 019c 3046 mov r0, r6 + 2834 019e 03B0 add sp, sp, #12 + 2835 .cfi_remember_state + 2836 .cfi_def_cfa_offset 28 + 2837 @ sp needed + 2838 01a0 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 2839 .LVL165: + 2840 .L200: + 2841 .cfi_restore_state +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2842 .loc 1 1035 3 discriminator 1 view .LVU990 + 2843 01a4 0226 movs r6, #2 + 2844 01a6 F9E7 b .L180 + 2845 .cfi_endproc + 2846 .LFE135: + 2848 .section .text.HAL_SPI_Transmit_IT,"ax",%progbits + 2849 .align 1 + 2850 .global HAL_SPI_Transmit_IT + ARM GAS /tmp/ccZ0BHQJ.s page 143 + + + 2851 .syntax unified + 2852 .thumb + 2853 .thumb_func + 2855 HAL_SPI_Transmit_IT: + 2856 .LVL166: + 2857 .LFB137: +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 2858 .loc 1 1576 1 is_stmt 1 view -0 + 2859 .cfi_startproc + 2860 @ args = 0, pretend = 0, frame = 0 + 2861 @ frame_needed = 0, uses_anonymous_args = 0 + 2862 @ link register save eliminated. +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 2863 .loc 1 1576 1 is_stmt 0 view .LVU992 + 2864 0000 0346 mov r3, r0 +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2865 .loc 1 1577 3 is_stmt 1 view .LVU993 + 2866 .LVL167: +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2867 .loc 1 1580 3 view .LVU994 +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2868 .loc 1 1583 3 view .LVU995 +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2869 .loc 1 1583 3 view .LVU996 + 2870 0002 90F85C00 ldrb r0, [r0, #92] @ zero_extendqisi2 + 2871 .LVL168: +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2872 .loc 1 1583 3 is_stmt 0 view .LVU997 + 2873 0006 0128 cmp r0, #1 + 2874 0008 4CD0 beq .L210 +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2875 .loc 1 1583 3 is_stmt 1 discriminator 2 view .LVU998 + 2876 000a 0120 movs r0, #1 + 2877 000c 83F85C00 strb r0, [r3, #92] +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2878 .loc 1 1583 3 discriminator 2 view .LVU999 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2879 .loc 1 1585 3 view .LVU1000 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2880 .loc 1 1585 6 is_stmt 0 view .LVU1001 + 2881 0010 0029 cmp r1, #0 + 2882 0012 3CD0 beq .L211 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2883 .loc 1 1585 23 discriminator 1 view .LVU1002 + 2884 0014 002A cmp r2, #0 + 2885 0016 3CD0 beq .L212 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2886 .loc 1 1591 3 is_stmt 1 view .LVU1003 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2887 .loc 1 1591 11 is_stmt 0 view .LVU1004 + 2888 0018 93F85D00 ldrb r0, [r3, #93] @ zero_extendqisi2 + 2889 001c C0B2 uxtb r0, r0 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2890 .loc 1 1591 6 view .LVU1005 + 2891 001e 0128 cmp r0, #1 + 2892 0020 3CD1 bne .L213 +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + ARM GAS /tmp/ccZ0BHQJ.s page 144 + + + 2893 .loc 1 1598 3 is_stmt 1 view .LVU1006 +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2894 .loc 1 1598 21 is_stmt 0 view .LVU1007 + 2895 0022 0320 movs r0, #3 + 2896 0024 83F85D00 strb r0, [r3, #93] +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 2897 .loc 1 1599 3 is_stmt 1 view .LVU1008 +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 2898 .loc 1 1599 21 is_stmt 0 view .LVU1009 + 2899 0028 0020 movs r0, #0 + 2900 002a 1866 str r0, [r3, #96] +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 2901 .loc 1 1600 3 is_stmt 1 view .LVU1010 +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 2902 .loc 1 1600 21 is_stmt 0 view .LVU1011 + 2903 002c 9963 str r1, [r3, #56] +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 2904 .loc 1 1601 3 is_stmt 1 view .LVU1012 +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 2905 .loc 1 1601 21 is_stmt 0 view .LVU1013 + 2906 002e 9A87 strh r2, [r3, #60] @ movhi +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2907 .loc 1 1602 3 is_stmt 1 view .LVU1014 +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2908 .loc 1 1602 21 is_stmt 0 view .LVU1015 + 2909 0030 DA87 strh r2, [r3, #62] @ movhi +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 2910 .loc 1 1605 3 is_stmt 1 view .LVU1016 +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 2911 .loc 1 1605 21 is_stmt 0 view .LVU1017 + 2912 0032 1864 str r0, [r3, #64] +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 2913 .loc 1 1606 3 is_stmt 1 view .LVU1018 +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 2914 .loc 1 1606 21 is_stmt 0 view .LVU1019 + 2915 0034 A3F84400 strh r0, [r3, #68] @ movhi +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2916 .loc 1 1607 3 is_stmt 1 view .LVU1020 +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2917 .loc 1 1607 21 is_stmt 0 view .LVU1021 + 2918 0038 A3F84600 strh r0, [r3, #70] @ movhi +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2919 .loc 1 1608 3 is_stmt 1 view .LVU1022 +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2920 .loc 1 1608 21 is_stmt 0 view .LVU1023 + 2921 003c D864 str r0, [r3, #76] +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2922 .loc 1 1611 3 is_stmt 1 view .LVU1024 +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2923 .loc 1 1611 17 is_stmt 0 view .LVU1025 + 2924 003e DA68 ldr r2, [r3, #12] + 2925 .LVL169: +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2926 .loc 1 1611 6 view .LVU1026 + 2927 0040 B2F5E06F cmp r2, #1792 + 2928 0044 15D9 bls .L207 +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 145 + + + 2929 .loc 1 1613 5 is_stmt 1 view .LVU1027 +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2930 .loc 1 1613 17 is_stmt 0 view .LVU1028 + 2931 0046 184A ldr r2, .L216 + 2932 0048 1A65 str r2, [r3, #80] + 2933 .L208: +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2934 .loc 1 1621 3 is_stmt 1 view .LVU1029 +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2935 .loc 1 1621 17 is_stmt 0 view .LVU1030 + 2936 004a 9A68 ldr r2, [r3, #8] +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2937 .loc 1 1621 6 view .LVU1031 + 2938 004c B2F5004F cmp r2, #32768 + 2939 0050 12D0 beq .L215 + 2940 .LVL170: + 2941 .L209: +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2942 .loc 1 1637 3 is_stmt 1 view .LVU1032 + 2943 0052 1968 ldr r1, [r3] + 2944 0054 4A68 ldr r2, [r1, #4] + 2945 0056 42F0A002 orr r2, r2, #160 + 2946 005a 4A60 str r2, [r1, #4] +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2947 .loc 1 1641 3 view .LVU1033 +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2948 .loc 1 1641 12 is_stmt 0 view .LVU1034 + 2949 005c 1A68 ldr r2, [r3] +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2950 .loc 1 1641 22 view .LVU1035 + 2951 005e 1168 ldr r1, [r2] +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2952 .loc 1 1641 6 view .LVU1036 + 2953 0060 11F0400F tst r1, #64 + 2954 0064 1CD1 bne .L214 +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2955 .loc 1 1644 5 is_stmt 1 view .LVU1037 + 2956 0066 1168 ldr r1, [r2] + 2957 0068 41F04001 orr r1, r1, #64 + 2958 006c 1160 str r1, [r2] +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2959 .loc 1 1577 21 is_stmt 0 view .LVU1038 + 2960 006e 0020 movs r0, #0 + 2961 0070 10E0 b .L206 + 2962 .LVL171: + 2963 .L207: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2964 .loc 1 1617 5 is_stmt 1 view .LVU1039 +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2965 .loc 1 1617 17 is_stmt 0 view .LVU1040 + 2966 0072 0E4A ldr r2, .L216+4 + 2967 0074 1A65 str r2, [r3, #80] + 2968 0076 E8E7 b .L208 + 2969 .L215: +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 2970 .loc 1 1624 5 is_stmt 1 view .LVU1041 + 2971 0078 1968 ldr r1, [r3] + ARM GAS /tmp/ccZ0BHQJ.s page 146 + + + 2972 .LVL172: +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 2973 .loc 1 1624 5 is_stmt 0 view .LVU1042 + 2974 007a 0A68 ldr r2, [r1] + 2975 007c 22F04002 bic r2, r2, #64 + 2976 0080 0A60 str r2, [r1] + 2977 .LVL173: +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2978 .loc 1 1625 5 is_stmt 1 view .LVU1043 + 2979 0082 1968 ldr r1, [r3] + 2980 0084 0A68 ldr r2, [r1] + 2981 0086 42F48042 orr r2, r2, #16384 + 2982 008a 0A60 str r2, [r1] + 2983 008c E1E7 b .L209 + 2984 .LVL174: + 2985 .L211: +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2986 .loc 1 1587 15 is_stmt 0 view .LVU1044 + 2987 008e 0120 movs r0, #1 + 2988 0090 00E0 b .L206 + 2989 .L212: + 2990 0092 0120 movs r0, #1 + 2991 .LVL175: + 2992 .L206: +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2993 .loc 1 1648 3 is_stmt 1 view .LVU1045 +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2994 .loc 1 1648 3 view .LVU1046 + 2995 0094 0022 movs r2, #0 + 2996 0096 83F85C20 strb r2, [r3, #92] +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2997 .loc 1 1648 3 view .LVU1047 +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2998 .loc 1 1649 3 view .LVU1048 +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2999 .loc 1 1649 10 is_stmt 0 view .LVU1049 + 3000 009a 7047 bx lr + 3001 .LVL176: + 3002 .L213: +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3003 .loc 1 1593 15 view .LVU1050 + 3004 009c 0220 movs r0, #2 + 3005 009e F9E7 b .L206 + 3006 .LVL177: + 3007 .L214: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3008 .loc 1 1577 21 view .LVU1051 + 3009 00a0 0020 movs r0, #0 + 3010 00a2 F7E7 b .L206 + 3011 .LVL178: + 3012 .L210: +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3013 .loc 1 1583 3 discriminator 1 view .LVU1052 + 3014 00a4 0220 movs r0, #2 +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3015 .loc 1 1650 1 view .LVU1053 + 3016 00a6 7047 bx lr + ARM GAS /tmp/ccZ0BHQJ.s page 147 + + + 3017 .L217: + 3018 .align 2 + 3019 .L216: + 3020 00a8 00000000 .word SPI_TxISR_16BIT + 3021 00ac 00000000 .word SPI_TxISR_8BIT + 3022 .cfi_endproc + 3023 .LFE137: + 3025 .section .text.HAL_SPI_TransmitReceive_IT,"ax",%progbits + 3026 .align 1 + 3027 .global HAL_SPI_TransmitReceive_IT + 3028 .syntax unified + 3029 .thumb + 3030 .thumb_func + 3032 HAL_SPI_TransmitReceive_IT: + 3033 .LVL179: + 3034 .LFB139: +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3035 .loc 1 1769 1 is_stmt 1 view -0 + 3036 .cfi_startproc + 3037 @ args = 0, pretend = 0, frame = 0 + 3038 @ frame_needed = 0, uses_anonymous_args = 0 + 3039 @ link register save eliminated. +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3040 .loc 1 1769 1 is_stmt 0 view .LVU1055 + 3041 0000 8446 mov ip, r0 +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; + 3042 .loc 1 1770 3 is_stmt 1 view .LVU1056 +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3043 .loc 1 1771 3 view .LVU1057 +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3044 .loc 1 1772 3 view .LVU1058 + 3045 .LVL180: +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3046 .loc 1 1775 3 view .LVU1059 +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3047 .loc 1 1778 3 view .LVU1060 +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3048 .loc 1 1778 3 view .LVU1061 + 3049 0002 90F85C00 ldrb r0, [r0, #92] @ zero_extendqisi2 + 3050 .LVL181: +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3051 .loc 1 1778 3 is_stmt 0 view .LVU1062 + 3052 0006 0128 cmp r0, #1 + 3053 0008 79D0 beq .L228 +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3054 .loc 1 1769 1 view .LVU1063 + 3055 000a 10B4 push {r4} + 3056 .cfi_def_cfa_offset 4 + 3057 .cfi_offset 4, -4 +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3058 .loc 1 1778 3 is_stmt 1 discriminator 2 view .LVU1064 + 3059 000c 0120 movs r0, #1 + 3060 000e 8CF85C00 strb r0, [ip, #92] +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3061 .loc 1 1778 3 discriminator 2 view .LVU1065 +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3062 .loc 1 1781 3 view .LVU1066 + ARM GAS /tmp/ccZ0BHQJ.s page 148 + + +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3063 .loc 1 1781 23 is_stmt 0 view .LVU1067 + 3064 0012 9CF85D00 ldrb r0, [ip, #93] @ zero_extendqisi2 + 3065 0016 C0B2 uxtb r0, r0 + 3066 .LVL182: +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3067 .loc 1 1782 3 is_stmt 1 view .LVU1068 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3068 .loc 1 1782 23 is_stmt 0 view .LVU1069 + 3069 0018 DCF80440 ldr r4, [ip, #4] + 3070 .LVL183: +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3071 .loc 1 1784 3 is_stmt 1 view .LVU1070 +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3072 .loc 1 1784 6 is_stmt 0 view .LVU1071 + 3073 001c 0128 cmp r0, #1 + 3074 001e 08D0 beq .L220 +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3075 .loc 1 1784 7 discriminator 1 view .LVU1072 + 3076 0020 B4F5827F cmp r4, #260 + 3077 0024 58D1 bne .L229 +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3078 .loc 1 1785 54 view .LVU1073 + 3079 0026 DCF80840 ldr r4, [ip, #8] + 3080 .LVL184: +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3081 .loc 1 1785 40 view .LVU1074 + 3082 002a 002C cmp r4, #0 + 3083 002c 5BD1 bne .L230 +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3084 .loc 1 1785 90 discriminator 1 view .LVU1075 + 3085 002e 0428 cmp r0, #4 + 3086 0030 5BD1 bne .L231 + 3087 .L220: +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3088 .loc 1 1791 3 is_stmt 1 view .LVU1076 +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3089 .loc 1 1791 6 is_stmt 0 view .LVU1077 + 3090 0032 0029 cmp r1, #0 + 3091 0034 5BD0 beq .L232 +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3092 .loc 1 1791 25 discriminator 1 view .LVU1078 + 3093 0036 002A cmp r2, #0 + 3094 0038 5BD0 beq .L233 +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3095 .loc 1 1791 46 discriminator 2 view .LVU1079 + 3096 003a 002B cmp r3, #0 + 3097 003c 5BD0 beq .L234 +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3098 .loc 1 1798 3 is_stmt 1 view .LVU1080 +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3099 .loc 1 1798 11 is_stmt 0 view .LVU1081 + 3100 003e 9CF85D00 ldrb r0, [ip, #93] @ zero_extendqisi2 + 3101 .LVL185: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3102 .loc 1 1798 11 view .LVU1082 + 3103 0042 C0B2 uxtb r0, r0 + ARM GAS /tmp/ccZ0BHQJ.s page 149 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3104 .loc 1 1798 6 view .LVU1083 + 3105 0044 0428 cmp r0, #4 + 3106 0046 02D0 beq .L222 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3107 .loc 1 1800 5 is_stmt 1 view .LVU1084 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3108 .loc 1 1800 17 is_stmt 0 view .LVU1085 + 3109 0048 0520 movs r0, #5 + 3110 004a 8CF85D00 strb r0, [ip, #93] + 3111 .L222: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3112 .loc 1 1804 3 is_stmt 1 view .LVU1086 +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3113 .loc 1 1804 21 is_stmt 0 view .LVU1087 + 3114 004e 0020 movs r0, #0 + 3115 0050 CCF86000 str r0, [ip, #96] +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3116 .loc 1 1805 3 is_stmt 1 view .LVU1088 +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3117 .loc 1 1805 21 is_stmt 0 view .LVU1089 + 3118 0054 CCF83810 str r1, [ip, #56] +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3119 .loc 1 1806 3 is_stmt 1 view .LVU1090 +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3120 .loc 1 1806 21 is_stmt 0 view .LVU1091 + 3121 0058 ACF83C30 strh r3, [ip, #60] @ movhi +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3122 .loc 1 1807 3 is_stmt 1 view .LVU1092 +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3123 .loc 1 1807 21 is_stmt 0 view .LVU1093 + 3124 005c ACF83E30 strh r3, [ip, #62] @ movhi +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3125 .loc 1 1808 3 is_stmt 1 view .LVU1094 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3126 .loc 1 1808 21 is_stmt 0 view .LVU1095 + 3127 0060 CCF84020 str r2, [ip, #64] +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3128 .loc 1 1809 3 is_stmt 1 view .LVU1096 +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3129 .loc 1 1809 21 is_stmt 0 view .LVU1097 + 3130 0064 ACF84430 strh r3, [ip, #68] @ movhi +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3131 .loc 1 1810 3 is_stmt 1 view .LVU1098 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3132 .loc 1 1810 21 is_stmt 0 view .LVU1099 + 3133 0068 ACF84630 strh r3, [ip, #70] @ movhi +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3134 .loc 1 1813 3 is_stmt 1 view .LVU1100 +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3135 .loc 1 1813 17 is_stmt 0 view .LVU1101 + 3136 006c DCF80C20 ldr r2, [ip, #12] + 3137 .LVL186: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3138 .loc 1 1813 6 view .LVU1102 + 3139 0070 B2F5E06F cmp r2, #1792 + 3140 0074 22D9 bls .L223 + ARM GAS /tmp/ccZ0BHQJ.s page 150 + + +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; + 3141 .loc 1 1815 5 is_stmt 1 view .LVU1103 +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; + 3142 .loc 1 1815 21 is_stmt 0 view .LVU1104 + 3143 0076 2349 ldr r1, .L240 + 3144 .LVL187: +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; + 3145 .loc 1 1815 21 view .LVU1105 + 3146 0078 CCF84C10 str r1, [ip, #76] +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3147 .loc 1 1816 5 is_stmt 1 view .LVU1106 +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3148 .loc 1 1816 21 is_stmt 0 view .LVU1107 + 3149 007c 2249 ldr r1, .L240+4 + 3150 007e CCF85010 str r1, [ip, #80] + 3151 .L224: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3152 .loc 1 1842 3 is_stmt 1 view .LVU1108 +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3153 .loc 1 1842 6 is_stmt 0 view .LVU1109 + 3154 0082 B2F5E06F cmp r2, #1792 + 3155 0086 01D8 bhi .L225 +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3156 .loc 1 1842 49 discriminator 1 view .LVU1110 + 3157 0088 012B cmp r3, #1 + 3158 008a 1ED9 bls .L226 + 3159 .L225: +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3160 .loc 1 1845 5 is_stmt 1 view .LVU1111 + 3161 008c DCF80020 ldr r2, [ip] + 3162 0090 5368 ldr r3, [r2, #4] + 3163 .LVL188: +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3164 .loc 1 1845 5 is_stmt 0 view .LVU1112 + 3165 0092 23F48053 bic r3, r3, #4096 + 3166 0096 5360 str r3, [r2, #4] + 3167 .LVL189: + 3168 .L227: +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3169 .loc 1 1854 3 is_stmt 1 view .LVU1113 + 3170 0098 DCF80020 ldr r2, [ip] + 3171 009c 5368 ldr r3, [r2, #4] + 3172 009e 43F0E003 orr r3, r3, #224 + 3173 00a2 5360 str r3, [r2, #4] +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3174 .loc 1 1857 3 view .LVU1114 +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3175 .loc 1 1857 12 is_stmt 0 view .LVU1115 + 3176 00a4 DCF80030 ldr r3, [ip] +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3177 .loc 1 1857 22 view .LVU1116 + 3178 00a8 1A68 ldr r2, [r3] +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3179 .loc 1 1857 6 view .LVU1117 + 3180 00aa 12F0400F tst r2, #64 + 3181 00ae 24D1 bne .L235 +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 151 + + + 3182 .loc 1 1860 5 is_stmt 1 view .LVU1118 + 3183 00b0 1A68 ldr r2, [r3] + 3184 00b2 42F04002 orr r2, r2, #64 + 3185 00b6 1A60 str r2, [r3] +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3186 .loc 1 1772 24 is_stmt 0 view .LVU1119 + 3187 00b8 0020 movs r0, #0 + 3188 00ba 0EE0 b .L221 + 3189 .LVL190: + 3190 .L223: +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; + 3191 .loc 1 1820 5 is_stmt 1 view .LVU1120 +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; + 3192 .loc 1 1820 21 is_stmt 0 view .LVU1121 + 3193 00bc 1349 ldr r1, .L240+8 + 3194 .LVL191: +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; + 3195 .loc 1 1820 21 view .LVU1122 + 3196 00be CCF84C10 str r1, [ip, #76] +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3197 .loc 1 1821 5 is_stmt 1 view .LVU1123 +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3198 .loc 1 1821 21 is_stmt 0 view .LVU1124 + 3199 00c2 1349 ldr r1, .L240+12 + 3200 00c4 CCF85010 str r1, [ip, #80] + 3201 00c8 DBE7 b .L224 + 3202 .L226: +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3203 .loc 1 1850 5 is_stmt 1 view .LVU1125 + 3204 00ca DCF80020 ldr r2, [ip] + 3205 00ce 5368 ldr r3, [r2, #4] + 3206 .LVL192: +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3207 .loc 1 1850 5 is_stmt 0 view .LVU1126 + 3208 00d0 43F48053 orr r3, r3, #4096 + 3209 00d4 5360 str r3, [r2, #4] + 3210 .LVL193: +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3211 .loc 1 1850 5 view .LVU1127 + 3212 00d6 DFE7 b .L227 + 3213 .LVL194: + 3214 .L229: +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3215 .loc 1 1787 15 view .LVU1128 + 3216 00d8 0220 movs r0, #2 + 3217 .LVL195: + 3218 .L221: +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3219 .loc 1 1865 3 is_stmt 1 view .LVU1129 +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3220 .loc 1 1865 3 view .LVU1130 + 3221 00da 0023 movs r3, #0 + 3222 00dc 8CF85C30 strb r3, [ip, #92] +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3223 .loc 1 1865 3 view .LVU1131 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3224 .loc 1 1866 3 view .LVU1132 + ARM GAS /tmp/ccZ0BHQJ.s page 152 + + +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3225 .loc 1 1867 1 is_stmt 0 view .LVU1133 + 3226 00e0 5DF8044B ldr r4, [sp], #4 + 3227 .cfi_remember_state + 3228 .cfi_restore 4 + 3229 .cfi_def_cfa_offset 0 + 3230 00e4 7047 bx lr + 3231 .LVL196: + 3232 .L230: + 3233 .cfi_restore_state +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3234 .loc 1 1787 15 view .LVU1134 + 3235 00e6 0220 movs r0, #2 + 3236 .LVL197: +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3237 .loc 1 1787 15 view .LVU1135 + 3238 00e8 F7E7 b .L221 + 3239 .LVL198: + 3240 .L231: +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3241 .loc 1 1787 15 view .LVU1136 + 3242 00ea 0220 movs r0, #2 + 3243 .LVL199: +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3244 .loc 1 1787 15 view .LVU1137 + 3245 00ec F5E7 b .L221 + 3246 .LVL200: + 3247 .L232: +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3248 .loc 1 1793 15 view .LVU1138 + 3249 00ee 0120 movs r0, #1 + 3250 .LVL201: +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3251 .loc 1 1793 15 view .LVU1139 + 3252 00f0 F3E7 b .L221 + 3253 .LVL202: + 3254 .L233: +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3255 .loc 1 1793 15 view .LVU1140 + 3256 00f2 0120 movs r0, #1 + 3257 .LVL203: +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3258 .loc 1 1793 15 view .LVU1141 + 3259 00f4 F1E7 b .L221 + 3260 .LVL204: + 3261 .L234: +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3262 .loc 1 1793 15 view .LVU1142 + 3263 00f6 0120 movs r0, #1 + 3264 .LVL205: +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3265 .loc 1 1793 15 view .LVU1143 + 3266 00f8 EFE7 b .L221 + 3267 .LVL206: + 3268 .L235: +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3269 .loc 1 1772 24 view .LVU1144 + ARM GAS /tmp/ccZ0BHQJ.s page 153 + + + 3270 00fa 0020 movs r0, #0 + 3271 00fc EDE7 b .L221 + 3272 .LVL207: + 3273 .L228: + 3274 .cfi_def_cfa_offset 0 + 3275 .cfi_restore 4 +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3276 .loc 1 1778 3 discriminator 1 view .LVU1145 + 3277 00fe 0220 movs r0, #2 +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3278 .loc 1 1867 1 view .LVU1146 + 3279 0100 7047 bx lr + 3280 .L241: + 3281 0102 00BF .align 2 + 3282 .L240: + 3283 0104 00000000 .word SPI_2linesRxISR_16BIT + 3284 0108 00000000 .word SPI_2linesTxISR_16BIT + 3285 010c 00000000 .word SPI_2linesRxISR_8BIT + 3286 0110 00000000 .word SPI_2linesTxISR_8BIT + 3287 .cfi_endproc + 3288 .LFE139: + 3290 .section .text.HAL_SPI_Receive_IT,"ax",%progbits + 3291 .align 1 + 3292 .global HAL_SPI_Receive_IT + 3293 .syntax unified + 3294 .thumb + 3295 .thumb_func + 3297 HAL_SPI_Receive_IT: + 3298 .LVL208: + 3299 .LFB138: +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3300 .loc 1 1661 1 is_stmt 1 view -0 + 3301 .cfi_startproc + 3302 @ args = 0, pretend = 0, frame = 0 + 3303 @ frame_needed = 0, uses_anonymous_args = 0 +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3304 .loc 1 1661 1 is_stmt 0 view .LVU1148 + 3305 0000 08B5 push {r3, lr} + 3306 .cfi_def_cfa_offset 8 + 3307 .cfi_offset 3, -8 + 3308 .cfi_offset 14, -4 + 3309 0002 8446 mov ip, r0 +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3310 .loc 1 1662 3 is_stmt 1 view .LVU1149 + 3311 .LVL209: +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3312 .loc 1 1665 3 view .LVU1150 +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3313 .loc 1 1665 11 is_stmt 0 view .LVU1151 + 3314 0004 90F85D00 ldrb r0, [r0, #93] @ zero_extendqisi2 + 3315 .LVL210: +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3316 .loc 1 1665 11 view .LVU1152 + 3317 0008 C0B2 uxtb r0, r0 +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3318 .loc 1 1665 6 view .LVU1153 + 3319 000a 0128 cmp r0, #1 + ARM GAS /tmp/ccZ0BHQJ.s page 154 + + + 3320 000c 6BD1 bne .L249 +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3321 .loc 1 1671 3 is_stmt 1 view .LVU1154 +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3322 .loc 1 1671 18 is_stmt 0 view .LVU1155 + 3323 000e DCF80830 ldr r3, [ip, #8] +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3324 .loc 1 1671 6 view .LVU1156 + 3325 0012 23B9 cbnz r3, .L244 +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3326 .loc 1 1671 68 discriminator 1 view .LVU1157 + 3327 0014 DCF80430 ldr r3, [ip, #4] +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3328 .loc 1 1671 54 discriminator 1 view .LVU1158 + 3329 0018 B3F5827F cmp r3, #260 + 3330 001c 43D0 beq .L253 + 3331 .L244: +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3332 .loc 1 1679 3 is_stmt 1 view .LVU1159 +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3333 .loc 1 1679 3 view .LVU1160 + 3334 001e 9CF85C30 ldrb r3, [ip, #92] @ zero_extendqisi2 + 3335 0022 012B cmp r3, #1 + 3336 0024 66D0 beq .L250 +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3337 .loc 1 1679 3 discriminator 2 view .LVU1161 + 3338 0026 0123 movs r3, #1 + 3339 0028 8CF85C30 strb r3, [ip, #92] +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3340 .loc 1 1679 3 discriminator 2 view .LVU1162 +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3341 .loc 1 1681 3 view .LVU1163 +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3342 .loc 1 1681 6 is_stmt 0 view .LVU1164 + 3343 002c 0029 cmp r1, #0 + 3344 002e 5BD0 beq .L243 +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3345 .loc 1 1681 23 discriminator 1 view .LVU1165 + 3346 0030 002A cmp r2, #0 + 3347 0032 59D0 beq .L243 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3348 .loc 1 1688 3 is_stmt 1 view .LVU1166 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3349 .loc 1 1688 21 is_stmt 0 view .LVU1167 + 3350 0034 0423 movs r3, #4 + 3351 0036 8CF85D30 strb r3, [ip, #93] +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 3352 .loc 1 1689 3 is_stmt 1 view .LVU1168 +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 3353 .loc 1 1689 21 is_stmt 0 view .LVU1169 + 3354 003a 0023 movs r3, #0 + 3355 003c CCF86030 str r3, [ip, #96] +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3356 .loc 1 1690 3 is_stmt 1 view .LVU1170 +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3357 .loc 1 1690 21 is_stmt 0 view .LVU1171 + 3358 0040 CCF84010 str r1, [ip, #64] + ARM GAS /tmp/ccZ0BHQJ.s page 155 + + +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3359 .loc 1 1691 3 is_stmt 1 view .LVU1172 +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3360 .loc 1 1691 21 is_stmt 0 view .LVU1173 + 3361 0044 ACF84420 strh r2, [ip, #68] @ movhi +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3362 .loc 1 1692 3 is_stmt 1 view .LVU1174 +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3363 .loc 1 1692 21 is_stmt 0 view .LVU1175 + 3364 0048 ACF84620 strh r2, [ip, #70] @ movhi +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 3365 .loc 1 1695 3 is_stmt 1 view .LVU1176 +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 3366 .loc 1 1695 21 is_stmt 0 view .LVU1177 + 3367 004c CCF83830 str r3, [ip, #56] +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 3368 .loc 1 1696 3 is_stmt 1 view .LVU1178 +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 3369 .loc 1 1696 21 is_stmt 0 view .LVU1179 + 3370 0050 ACF83C30 strh r3, [ip, #60] @ movhi +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3371 .loc 1 1697 3 is_stmt 1 view .LVU1180 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3372 .loc 1 1697 21 is_stmt 0 view .LVU1181 + 3373 0054 ACF83E30 strh r3, [ip, #62] @ movhi +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3374 .loc 1 1698 3 is_stmt 1 view .LVU1182 +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3375 .loc 1 1698 21 is_stmt 0 view .LVU1183 + 3376 0058 CCF85030 str r3, [ip, #80] +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3377 .loc 1 1701 3 is_stmt 1 view .LVU1184 +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3378 .loc 1 1701 17 is_stmt 0 view .LVU1185 + 3379 005c DCF80C30 ldr r3, [ip, #12] +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3380 .loc 1 1701 6 view .LVU1186 + 3381 0060 B3F5E06F cmp r3, #1792 + 3382 0064 28D9 bls .L246 +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BIT; + 3383 .loc 1 1704 5 is_stmt 1 view .LVU1187 + 3384 0066 DCF80020 ldr r2, [ip] + 3385 .LVL211: +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BIT; + 3386 .loc 1 1704 5 is_stmt 0 view .LVU1188 + 3387 006a 5368 ldr r3, [r2, #4] + 3388 006c 23F48053 bic r3, r3, #4096 + 3389 0070 5360 str r3, [r2, #4] + 3390 .LVL212: +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3391 .loc 1 1705 5 is_stmt 1 view .LVU1189 +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3392 .loc 1 1705 17 is_stmt 0 view .LVU1190 + 3393 0072 214B ldr r3, .L255 + 3394 0074 CCF84C30 str r3, [ip, #76] + 3395 .L247: +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 156 + + + 3396 .loc 1 1715 3 is_stmt 1 view .LVU1191 +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3397 .loc 1 1715 17 is_stmt 0 view .LVU1192 + 3398 0078 DCF80830 ldr r3, [ip, #8] +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3399 .loc 1 1715 6 view .LVU1193 + 3400 007c B3F5004F cmp r3, #32768 + 3401 0080 24D0 beq .L254 + 3402 .L248: +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3403 .loc 1 1740 3 is_stmt 1 view .LVU1194 + 3404 0082 DCF80020 ldr r2, [ip] + 3405 0086 5368 ldr r3, [r2, #4] + 3406 0088 43F06003 orr r3, r3, #96 + 3407 008c 5360 str r3, [r2, #4] +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3408 .loc 1 1747 3 view .LVU1195 +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3409 .loc 1 1747 12 is_stmt 0 view .LVU1196 + 3410 008e DCF80030 ldr r3, [ip] +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3411 .loc 1 1747 22 view .LVU1197 + 3412 0092 1A68 ldr r2, [r3] +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3413 .loc 1 1747 6 view .LVU1198 + 3414 0094 12F0400F tst r2, #64 + 3415 0098 2AD1 bne .L251 +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3416 .loc 1 1750 5 is_stmt 1 view .LVU1199 + 3417 009a 1A68 ldr r2, [r3] + 3418 009c 42F04002 orr r2, r2, #64 + 3419 00a0 1A60 str r2, [r3] +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3420 .loc 1 1662 21 is_stmt 0 view .LVU1200 + 3421 00a2 0020 movs r0, #0 + 3422 00a4 20E0 b .L243 + 3423 .LVL213: + 3424 .L253: +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 3425 .loc 1 1673 5 is_stmt 1 view .LVU1201 +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 3426 .loc 1 1673 17 is_stmt 0 view .LVU1202 + 3427 00a6 0423 movs r3, #4 + 3428 00a8 8CF85D30 strb r3, [ip, #93] +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3429 .loc 1 1675 5 is_stmt 1 view .LVU1203 +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3430 .loc 1 1675 12 is_stmt 0 view .LVU1204 + 3431 00ac 1346 mov r3, r2 + 3432 00ae 0A46 mov r2, r1 + 3433 .LVL214: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3434 .loc 1 1675 12 view .LVU1205 + 3435 00b0 6046 mov r0, ip + 3436 00b2 FFF7FEFF bl HAL_SPI_TransmitReceive_IT + 3437 .LVL215: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 157 + + + 3438 .loc 1 1675 12 view .LVU1206 + 3439 00b6 1AE0 b .L245 + 3440 .LVL216: + 3441 .L246: +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BIT; + 3442 .loc 1 1710 5 is_stmt 1 view .LVU1207 + 3443 00b8 DCF80020 ldr r2, [ip] + 3444 .LVL217: +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BIT; + 3445 .loc 1 1710 5 is_stmt 0 view .LVU1208 + 3446 00bc 5368 ldr r3, [r2, #4] + 3447 00be 43F48053 orr r3, r3, #4096 + 3448 00c2 5360 str r3, [r2, #4] + 3449 .LVL218: +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3450 .loc 1 1711 5 is_stmt 1 view .LVU1209 +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3451 .loc 1 1711 17 is_stmt 0 view .LVU1210 + 3452 00c4 0D4B ldr r3, .L255+4 + 3453 00c6 CCF84C30 str r3, [ip, #76] + 3454 00ca D5E7 b .L247 + 3455 .L254: +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 3456 .loc 1 1718 5 is_stmt 1 view .LVU1211 + 3457 00cc DCF80020 ldr r2, [ip] + 3458 00d0 1368 ldr r3, [r2] + 3459 00d2 23F04003 bic r3, r3, #64 + 3460 00d6 1360 str r3, [r2] +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3461 .loc 1 1719 5 view .LVU1212 + 3462 00d8 DCF80020 ldr r2, [ip] + 3463 00dc 1368 ldr r3, [r2] + 3464 00de 23F48043 bic r3, r3, #16384 + 3465 00e2 1360 str r3, [r2] + 3466 00e4 CDE7 b .L248 + 3467 .LVL219: + 3468 .L249: +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3469 .loc 1 1667 15 is_stmt 0 view .LVU1213 + 3470 00e6 0220 movs r0, #2 + 3471 .LVL220: + 3472 .L243: +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3473 .loc 1 1755 3 is_stmt 1 view .LVU1214 +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3474 .loc 1 1755 3 view .LVU1215 + 3475 00e8 0023 movs r3, #0 + 3476 00ea 8CF85C30 strb r3, [ip, #92] +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3477 .loc 1 1755 3 view .LVU1216 +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3478 .loc 1 1756 3 view .LVU1217 + 3479 .LVL221: + 3480 .L245: +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3481 .loc 1 1757 1 is_stmt 0 view .LVU1218 + 3482 00ee 08BD pop {r3, pc} + ARM GAS /tmp/ccZ0BHQJ.s page 158 + + + 3483 .LVL222: + 3484 .L251: +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3485 .loc 1 1662 21 view .LVU1219 + 3486 00f0 0020 movs r0, #0 + 3487 00f2 F9E7 b .L243 + 3488 .LVL223: + 3489 .L250: +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3490 .loc 1 1679 3 discriminator 1 view .LVU1220 + 3491 00f4 0220 movs r0, #2 + 3492 00f6 FAE7 b .L245 + 3493 .L256: + 3494 .align 2 + 3495 .L255: + 3496 00f8 00000000 .word SPI_RxISR_16BIT + 3497 00fc 00000000 .word SPI_RxISR_8BIT + 3498 .cfi_endproc + 3499 .LFE138: + 3501 .section .text.HAL_SPI_Transmit_DMA,"ax",%progbits + 3502 .align 1 + 3503 .global HAL_SPI_Transmit_DMA + 3504 .syntax unified + 3505 .thumb + 3506 .thumb_func + 3508 HAL_SPI_Transmit_DMA: + 3509 .LVL224: + 3510 .LFB140: +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3511 .loc 1 1878 1 is_stmt 1 view -0 + 3512 .cfi_startproc + 3513 @ args = 0, pretend = 0, frame = 0 + 3514 @ frame_needed = 0, uses_anonymous_args = 0 +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3515 .loc 1 1878 1 is_stmt 0 view .LVU1222 + 3516 0000 38B5 push {r3, r4, r5, lr} + 3517 .cfi_def_cfa_offset 16 + 3518 .cfi_offset 3, -16 + 3519 .cfi_offset 4, -12 + 3520 .cfi_offset 5, -8 + 3521 .cfi_offset 14, -4 +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3522 .loc 1 1879 3 is_stmt 1 view .LVU1223 + 3523 .LVL225: +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3524 .loc 1 1882 3 view .LVU1224 +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3525 .loc 1 1885 3 view .LVU1225 +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3526 .loc 1 1888 3 view .LVU1226 +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3527 .loc 1 1888 3 view .LVU1227 + 3528 0002 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 3529 0006 012B cmp r3, #1 + 3530 0008 00F08980 beq .L265 + 3531 000c 0446 mov r4, r0 +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 159 + + + 3532 .loc 1 1888 3 discriminator 2 view .LVU1228 + 3533 000e 0123 movs r3, #1 + 3534 0010 80F85C30 strb r3, [r0, #92] +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3535 .loc 1 1888 3 discriminator 2 view .LVU1229 +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3536 .loc 1 1890 3 view .LVU1230 +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3537 .loc 1 1890 11 is_stmt 0 view .LVU1231 + 3538 0014 90F85D50 ldrb r5, [r0, #93] @ zero_extendqisi2 + 3539 0018 EDB2 uxtb r5, r5 +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3540 .loc 1 1890 6 view .LVU1232 + 3541 001a 9D42 cmp r5, r3 + 3542 001c 79D1 bne .L266 +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3543 .loc 1 1896 3 is_stmt 1 view .LVU1233 +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3544 .loc 1 1896 6 is_stmt 0 view .LVU1234 + 3545 001e 0029 cmp r1, #0 + 3546 0020 78D0 beq .L259 +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3547 .loc 1 1896 23 discriminator 1 view .LVU1235 + 3548 0022 002A cmp r2, #0 + 3549 0024 76D0 beq .L259 +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3550 .loc 1 1903 3 is_stmt 1 view .LVU1236 +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3551 .loc 1 1903 21 is_stmt 0 view .LVU1237 + 3552 0026 0323 movs r3, #3 + 3553 0028 80F85D30 strb r3, [r0, #93] +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 3554 .loc 1 1904 3 is_stmt 1 view .LVU1238 +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 3555 .loc 1 1904 21 is_stmt 0 view .LVU1239 + 3556 002c 0023 movs r3, #0 + 3557 002e 0366 str r3, [r0, #96] +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3558 .loc 1 1905 3 is_stmt 1 view .LVU1240 +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3559 .loc 1 1905 21 is_stmt 0 view .LVU1241 + 3560 0030 8163 str r1, [r0, #56] +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3561 .loc 1 1906 3 is_stmt 1 view .LVU1242 +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3562 .loc 1 1906 21 is_stmt 0 view .LVU1243 + 3563 0032 8287 strh r2, [r0, #60] @ movhi +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3564 .loc 1 1907 3 is_stmt 1 view .LVU1244 +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3565 .loc 1 1907 21 is_stmt 0 view .LVU1245 + 3566 0034 C287 strh r2, [r0, #62] @ movhi +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3567 .loc 1 1910 3 is_stmt 1 view .LVU1246 +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3568 .loc 1 1910 21 is_stmt 0 view .LVU1247 + 3569 0036 0364 str r3, [r0, #64] + ARM GAS /tmp/ccZ0BHQJ.s page 160 + + +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 3570 .loc 1 1911 3 is_stmt 1 view .LVU1248 +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 3571 .loc 1 1911 21 is_stmt 0 view .LVU1249 + 3572 0038 0365 str r3, [r0, #80] +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 3573 .loc 1 1912 3 is_stmt 1 view .LVU1250 +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 3574 .loc 1 1912 21 is_stmt 0 view .LVU1251 + 3575 003a C364 str r3, [r0, #76] +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 3576 .loc 1 1913 3 is_stmt 1 view .LVU1252 +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 3577 .loc 1 1913 21 is_stmt 0 view .LVU1253 + 3578 003c A0F84430 strh r3, [r0, #68] @ movhi +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3579 .loc 1 1914 3 is_stmt 1 view .LVU1254 +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3580 .loc 1 1914 21 is_stmt 0 view .LVU1255 + 3581 0040 A0F84630 strh r3, [r0, #70] @ movhi +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3582 .loc 1 1917 3 is_stmt 1 view .LVU1256 +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3583 .loc 1 1917 17 is_stmt 0 view .LVU1257 + 3584 0044 8368 ldr r3, [r0, #8] +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3585 .loc 1 1917 6 view .LVU1258 + 3586 0046 B3F5004F cmp r3, #32768 + 3587 004a 39D0 beq .L268 + 3588 .LVL226: + 3589 .L260: +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3590 .loc 1 1933 3 is_stmt 1 view .LVU1259 +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3591 .loc 1 1933 7 is_stmt 0 view .LVU1260 + 3592 004c 636D ldr r3, [r4, #84] +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3593 .loc 1 1933 38 view .LVU1261 + 3594 004e 354A ldr r2, .L271 + 3595 0050 DA62 str r2, [r3, #44] +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3596 .loc 1 1936 3 is_stmt 1 view .LVU1262 +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3597 .loc 1 1936 7 is_stmt 0 view .LVU1263 + 3598 0052 636D ldr r3, [r4, #84] +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3599 .loc 1 1936 34 view .LVU1264 + 3600 0054 344A ldr r2, .L271+4 + 3601 0056 9A62 str r2, [r3, #40] +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3602 .loc 1 1939 3 is_stmt 1 view .LVU1265 +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3603 .loc 1 1939 7 is_stmt 0 view .LVU1266 + 3604 0058 636D ldr r3, [r4, #84] +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3605 .loc 1 1939 35 view .LVU1267 + 3606 005a 344A ldr r2, .L271+8 + ARM GAS /tmp/ccZ0BHQJ.s page 161 + + + 3607 005c 1A63 str r2, [r3, #48] +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3608 .loc 1 1942 3 is_stmt 1 view .LVU1268 +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3609 .loc 1 1942 7 is_stmt 0 view .LVU1269 + 3610 005e 636D ldr r3, [r4, #84] +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3611 .loc 1 1942 35 view .LVU1270 + 3612 0060 0022 movs r2, #0 + 3613 0062 5A63 str r2, [r3, #52] +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode is enabled only if the DMA setting is HALWORD */ + 3614 .loc 1 1944 3 is_stmt 1 view .LVU1271 + 3615 0064 2268 ldr r2, [r4] + 3616 0066 5368 ldr r3, [r2, #4] + 3617 0068 23F48043 bic r3, r3, #16384 + 3618 006c 5360 str r3, [r2, #4] +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3619 .loc 1 1946 3 view .LVU1272 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3620 .loc 1 1946 18 is_stmt 0 view .LVU1273 + 3621 006e E368 ldr r3, [r4, #12] +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3622 .loc 1 1946 6 view .LVU1274 + 3623 0070 B3F5E06F cmp r3, #1792 + 3624 0074 04D8 bhi .L261 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3625 .loc 1 1946 58 discriminator 1 view .LVU1275 + 3626 0076 636D ldr r3, [r4, #84] +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3627 .loc 1 1946 72 discriminator 1 view .LVU1276 + 3628 0078 5B69 ldr r3, [r3, #20] +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3629 .loc 1 1946 50 discriminator 1 view .LVU1277 + 3630 007a B3F5806F cmp r3, #1024 + 3631 007e 2AD0 beq .L269 + 3632 .L261: +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3633 .loc 1 1962 3 is_stmt 1 view .LVU1278 +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3634 .loc 1 1962 91 is_stmt 0 view .LVU1279 + 3635 0080 2268 ldr r2, [r4] +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3636 .loc 1 1963 38 view .LVU1280 + 3637 0082 E38F ldrh r3, [r4, #62] +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3638 .loc 1 1962 17 view .LVU1281 + 3639 0084 9BB2 uxth r3, r3 + 3640 0086 0C32 adds r2, r2, #12 + 3641 0088 A16B ldr r1, [r4, #56] + 3642 .LVL227: +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3643 .loc 1 1962 17 view .LVU1282 + 3644 008a 606D ldr r0, [r4, #84] + 3645 .LVL228: +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3646 .loc 1 1962 17 view .LVU1283 + 3647 008c FFF7FEFF bl HAL_DMA_Start_IT + ARM GAS /tmp/ccZ0BHQJ.s page 162 + + + 3648 .LVL229: +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3649 .loc 1 1962 6 discriminator 1 view .LVU1284 + 3650 0090 0146 mov r1, r0 + 3651 0092 0028 cmp r0, #0 + 3652 0094 38D1 bne .L270 +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3653 .loc 1 1973 3 is_stmt 1 view .LVU1285 +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3654 .loc 1 1973 12 is_stmt 0 view .LVU1286 + 3655 0096 2368 ldr r3, [r4] +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3656 .loc 1 1973 22 view .LVU1287 + 3657 0098 1A68 ldr r2, [r3] +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3658 .loc 1 1973 6 view .LVU1288 + 3659 009a 12F0400F tst r2, #64 + 3660 009e 03D1 bne .L264 +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3661 .loc 1 1976 5 is_stmt 1 view .LVU1289 + 3662 00a0 1A68 ldr r2, [r3] + 3663 00a2 42F04002 orr r2, r2, #64 + 3664 00a6 1A60 str r2, [r3] + 3665 .L264: +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3666 .loc 1 1980 3 view .LVU1290 + 3667 00a8 2268 ldr r2, [r4] + 3668 00aa 5368 ldr r3, [r2, #4] + 3669 00ac 43F02003 orr r3, r3, #32 + 3670 00b0 5360 str r3, [r2, #4] +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3671 .loc 1 1983 3 view .LVU1291 + 3672 00b2 2268 ldr r2, [r4] + 3673 00b4 5368 ldr r3, [r2, #4] + 3674 00b6 43F00203 orr r3, r3, #2 + 3675 00ba 5360 str r3, [r2, #4] +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3676 .loc 1 1879 21 is_stmt 0 view .LVU1292 + 3677 00bc 0D46 mov r5, r1 + 3678 00be 29E0 b .L259 + 3679 .LVL230: + 3680 .L268: +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 3681 .loc 1 1920 5 is_stmt 1 view .LVU1293 + 3682 00c0 0268 ldr r2, [r0] + 3683 .LVL231: +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 3684 .loc 1 1920 5 is_stmt 0 view .LVU1294 + 3685 00c2 1368 ldr r3, [r2] + 3686 00c4 23F04003 bic r3, r3, #64 + 3687 00c8 1360 str r3, [r2] + 3688 .LVL232: +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3689 .loc 1 1921 5 is_stmt 1 view .LVU1295 + 3690 00ca 0268 ldr r2, [r0] + 3691 00cc 1368 ldr r3, [r2] + 3692 00ce 43F48043 orr r3, r3, #16384 + ARM GAS /tmp/ccZ0BHQJ.s page 163 + + + 3693 00d2 1360 str r3, [r2] + 3694 00d4 BAE7 b .L260 + 3695 .L269: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3696 .loc 1 1949 5 view .LVU1296 +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3697 .loc 1 1949 14 is_stmt 0 view .LVU1297 + 3698 00d6 E38F ldrh r3, [r4, #62] +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3699 .loc 1 1949 8 view .LVU1298 + 3700 00d8 13F0010F tst r3, #1 + 3701 00dc 09D1 bne .L262 +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U); + 3702 .loc 1 1951 7 is_stmt 1 view .LVU1299 + 3703 00de 2268 ldr r2, [r4] + 3704 00e0 5368 ldr r3, [r2, #4] + 3705 00e2 23F48043 bic r3, r3, #16384 + 3706 00e6 5360 str r3, [r2, #4] +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3707 .loc 1 1952 7 view .LVU1300 +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3708 .loc 1 1952 32 is_stmt 0 view .LVU1301 + 3709 00e8 E38F ldrh r3, [r4, #62] +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3710 .loc 1 1952 25 view .LVU1302 + 3711 00ea C3F34E03 ubfx r3, r3, #1, #15 + 3712 00ee E387 strh r3, [r4, #62] @ movhi + 3713 00f0 C6E7 b .L261 + 3714 .L262: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; + 3715 .loc 1 1956 7 is_stmt 1 view .LVU1303 + 3716 00f2 2268 ldr r2, [r4] + 3717 00f4 5368 ldr r3, [r2, #4] + 3718 00f6 43F48043 orr r3, r3, #16384 + 3719 00fa 5360 str r3, [r2, #4] +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3720 .loc 1 1957 7 view .LVU1304 +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3721 .loc 1 1957 32 is_stmt 0 view .LVU1305 + 3722 00fc E38F ldrh r3, [r4, #62] +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3723 .loc 1 1957 53 view .LVU1306 + 3724 00fe C3F34E03 ubfx r3, r3, #1, #15 + 3725 0102 0133 adds r3, r3, #1 +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3726 .loc 1 1957 25 view .LVU1307 + 3727 0104 E387 strh r3, [r4, #62] @ movhi + 3728 0106 BBE7 b .L261 + 3729 .LVL233: + 3730 .L270: +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 3731 .loc 1 1966 5 is_stmt 1 view .LVU1308 + 3732 0108 236E ldr r3, [r4, #96] + 3733 010a 43F01003 orr r3, r3, #16 + 3734 010e 2366 str r3, [r4, #96] +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3735 .loc 1 1967 5 view .LVU1309 + ARM GAS /tmp/ccZ0BHQJ.s page 164 + + + 3736 .LVL234: +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3737 .loc 1 1969 5 view .LVU1310 + 3738 0110 00E0 b .L259 + 3739 .LVL235: + 3740 .L266: +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3741 .loc 1 1892 15 is_stmt 0 view .LVU1311 + 3742 0112 0225 movs r5, #2 + 3743 .LVL236: + 3744 .L259: +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3745 .loc 1 1987 3 is_stmt 1 view .LVU1312 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3746 .loc 1 1987 3 view .LVU1313 + 3747 0114 0023 movs r3, #0 + 3748 0116 84F85C30 strb r3, [r4, #92] +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3749 .loc 1 1987 3 view .LVU1314 +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3750 .loc 1 1988 3 view .LVU1315 + 3751 .LVL237: + 3752 .L258: +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3753 .loc 1 1989 1 is_stmt 0 view .LVU1316 + 3754 011a 2846 mov r0, r5 + 3755 011c 38BD pop {r3, r4, r5, pc} + 3756 .LVL238: + 3757 .L265: +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3758 .loc 1 1888 3 discriminator 1 view .LVU1317 + 3759 011e 0225 movs r5, #2 + 3760 0120 FBE7 b .L258 + 3761 .L272: + 3762 0122 00BF .align 2 + 3763 .L271: + 3764 0124 00000000 .word SPI_DMAHalfTransmitCplt + 3765 0128 00000000 .word SPI_DMATransmitCplt + 3766 012c 00000000 .word SPI_DMAError + 3767 .cfi_endproc + 3768 .LFE140: + 3770 .section .text.HAL_SPI_TransmitReceive_DMA,"ax",%progbits + 3771 .align 1 + 3772 .global HAL_SPI_TransmitReceive_DMA + 3773 .syntax unified + 3774 .thumb + 3775 .thumb_func + 3777 HAL_SPI_TransmitReceive_DMA: + 3778 .LVL239: + 3779 .LFB142: +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3780 .loc 1 2156 1 is_stmt 1 view -0 + 3781 .cfi_startproc + 3782 @ args = 0, pretend = 0, frame = 0 + 3783 @ frame_needed = 0, uses_anonymous_args = 0 +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3784 .loc 1 2156 1 is_stmt 0 view .LVU1319 + ARM GAS /tmp/ccZ0BHQJ.s page 165 + + + 3785 0000 38B5 push {r3, r4, r5, lr} + 3786 .cfi_def_cfa_offset 16 + 3787 .cfi_offset 3, -16 + 3788 .cfi_offset 4, -12 + 3789 .cfi_offset 5, -8 + 3790 .cfi_offset 14, -4 + 3791 0002 0446 mov r4, r0 +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; + 3792 .loc 1 2157 3 is_stmt 1 view .LVU1320 +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3793 .loc 1 2158 3 view .LVU1321 +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3794 .loc 1 2159 3 view .LVU1322 + 3795 .LVL240: +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); + 3796 .loc 1 2162 3 view .LVU1323 +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3797 .loc 1 2163 3 view .LVU1324 +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3798 .loc 1 2166 3 view .LVU1325 +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3799 .loc 1 2169 3 view .LVU1326 +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3800 .loc 1 2169 3 view .LVU1327 + 3801 0004 90F85C00 ldrb r0, [r0, #92] @ zero_extendqisi2 + 3802 .LVL241: +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3803 .loc 1 2169 3 is_stmt 0 view .LVU1328 + 3804 0008 0128 cmp r0, #1 + 3805 000a 00F0FF80 beq .L289 +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3806 .loc 1 2169 3 is_stmt 1 discriminator 2 view .LVU1329 + 3807 000e 0120 movs r0, #1 + 3808 0010 84F85C00 strb r0, [r4, #92] +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3809 .loc 1 2169 3 discriminator 2 view .LVU1330 +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3810 .loc 1 2172 3 view .LVU1331 +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3811 .loc 1 2172 23 is_stmt 0 view .LVU1332 + 3812 0014 94F85D00 ldrb r0, [r4, #93] @ zero_extendqisi2 + 3813 0018 C0B2 uxtb r0, r0 + 3814 .LVL242: +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3815 .loc 1 2173 3 is_stmt 1 view .LVU1333 +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3816 .loc 1 2173 23 is_stmt 0 view .LVU1334 + 3817 001a 6568 ldr r5, [r4, #4] + 3818 .LVL243: +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3819 .loc 1 2175 3 is_stmt 1 view .LVU1335 +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3820 .loc 1 2175 6 is_stmt 0 view .LVU1336 + 3821 001c 0128 cmp r0, #1 + 3822 001e 0AD0 beq .L275 +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3823 .loc 1 2175 7 discriminator 1 view .LVU1337 + ARM GAS /tmp/ccZ0BHQJ.s page 166 + + + 3824 0020 B5F5827F cmp r5, #260 + 3825 0024 40F0E180 bne .L290 +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3826 .loc 1 2176 54 view .LVU1338 + 3827 0028 A568 ldr r5, [r4, #8] + 3828 .LVL244: +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3829 .loc 1 2176 40 view .LVU1339 + 3830 002a 002D cmp r5, #0 + 3831 002c 40F0E280 bne .L291 +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3832 .loc 1 2176 90 discriminator 1 view .LVU1340 + 3833 0030 0428 cmp r0, #4 + 3834 0032 40F0E180 bne .L292 + 3835 .L275: +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3836 .loc 1 2182 3 is_stmt 1 view .LVU1341 +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3837 .loc 1 2182 6 is_stmt 0 view .LVU1342 + 3838 0036 0029 cmp r1, #0 + 3839 0038 00F0E080 beq .L293 +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3840 .loc 1 2182 25 discriminator 1 view .LVU1343 + 3841 003c 002A cmp r2, #0 + 3842 003e 00F0DF80 beq .L294 +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3843 .loc 1 2182 46 discriminator 2 view .LVU1344 + 3844 0042 002B cmp r3, #0 + 3845 0044 00F0DE80 beq .L295 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3846 .loc 1 2189 3 is_stmt 1 view .LVU1345 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3847 .loc 1 2189 11 is_stmt 0 view .LVU1346 + 3848 0048 94F85D00 ldrb r0, [r4, #93] @ zero_extendqisi2 + 3849 .LVL245: +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3850 .loc 1 2189 11 view .LVU1347 + 3851 004c C0B2 uxtb r0, r0 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3852 .loc 1 2189 6 view .LVU1348 + 3853 004e 0428 cmp r0, #4 + 3854 0050 02D0 beq .L277 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3855 .loc 1 2191 5 is_stmt 1 view .LVU1349 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3856 .loc 1 2191 17 is_stmt 0 view .LVU1350 + 3857 0052 0520 movs r0, #5 + 3858 0054 84F85D00 strb r0, [r4, #93] + 3859 .L277: +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3860 .loc 1 2195 3 is_stmt 1 view .LVU1351 +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3861 .loc 1 2195 21 is_stmt 0 view .LVU1352 + 3862 0058 0020 movs r0, #0 + 3863 005a 2066 str r0, [r4, #96] +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3864 .loc 1 2196 3 is_stmt 1 view .LVU1353 + ARM GAS /tmp/ccZ0BHQJ.s page 167 + + +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3865 .loc 1 2196 21 is_stmt 0 view .LVU1354 + 3866 005c A163 str r1, [r4, #56] +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3867 .loc 1 2197 3 is_stmt 1 view .LVU1355 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3868 .loc 1 2197 21 is_stmt 0 view .LVU1356 + 3869 005e A387 strh r3, [r4, #60] @ movhi +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3870 .loc 1 2198 3 is_stmt 1 view .LVU1357 +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3871 .loc 1 2198 21 is_stmt 0 view .LVU1358 + 3872 0060 E387 strh r3, [r4, #62] @ movhi +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3873 .loc 1 2199 3 is_stmt 1 view .LVU1359 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3874 .loc 1 2199 21 is_stmt 0 view .LVU1360 + 3875 0062 2264 str r2, [r4, #64] +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3876 .loc 1 2200 3 is_stmt 1 view .LVU1361 +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3877 .loc 1 2200 21 is_stmt 0 view .LVU1362 + 3878 0064 A4F84430 strh r3, [r4, #68] @ movhi +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3879 .loc 1 2201 3 is_stmt 1 view .LVU1363 +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3880 .loc 1 2201 21 is_stmt 0 view .LVU1364 + 3881 0068 A4F84630 strh r3, [r4, #70] @ movhi +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3882 .loc 1 2204 3 is_stmt 1 view .LVU1365 +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3883 .loc 1 2204 21 is_stmt 0 view .LVU1366 + 3884 006c E064 str r0, [r4, #76] +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3885 .loc 1 2205 3 is_stmt 1 view .LVU1367 +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3886 .loc 1 2205 21 is_stmt 0 view .LVU1368 + 3887 006e 2065 str r0, [r4, #80] +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3888 .loc 1 2217 3 is_stmt 1 view .LVU1369 +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3889 .loc 1 2217 18 is_stmt 0 view .LVU1370 + 3890 0070 E368 ldr r3, [r4, #12] + 3891 .LVL246: +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3892 .loc 1 2217 6 view .LVU1371 + 3893 0072 B3F5E06F cmp r3, #1792 + 3894 0076 05D8 bhi .L278 +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3895 .loc 1 2217 58 discriminator 1 view .LVU1372 + 3896 0078 A36D ldr r3, [r4, #88] +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3897 .loc 1 2217 72 discriminator 1 view .LVU1373 + 3898 007a 5B69 ldr r3, [r3, #20] +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3899 .loc 1 2217 50 discriminator 1 view .LVU1374 + 3900 007c B3F5806F cmp r3, #1024 + ARM GAS /tmp/ccZ0BHQJ.s page 168 + + + 3901 0080 00F0C280 beq .L296 + 3902 .L278: +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3903 .loc 1 2226 3 is_stmt 1 view .LVU1375 + 3904 0084 2268 ldr r2, [r4] + 3905 .LVL247: +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3906 .loc 1 2226 3 is_stmt 0 view .LVU1376 + 3907 0086 5368 ldr r3, [r2, #4] + 3908 0088 23F4C043 bic r3, r3, #24576 + 3909 008c 5360 str r3, [r2, #4] + 3910 .LVL248: +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3911 .loc 1 2229 3 is_stmt 1 view .LVU1377 +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3912 .loc 1 2229 17 is_stmt 0 view .LVU1378 + 3913 008e E368 ldr r3, [r4, #12] +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3914 .loc 1 2229 6 view .LVU1379 + 3915 0090 B3F5E06F cmp r3, #1792 + 3916 0094 26D9 bls .L279 +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3917 .loc 1 2232 5 is_stmt 1 view .LVU1380 + 3918 0096 2268 ldr r2, [r4] + 3919 0098 5368 ldr r3, [r2, #4] + 3920 009a 23F48053 bic r3, r3, #4096 + 3921 009e 5360 str r3, [r2, #4] + 3922 .L280: +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3923 .loc 1 2272 3 view .LVU1381 +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3924 .loc 1 2272 11 is_stmt 0 view .LVU1382 + 3925 00a0 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 3926 00a4 DBB2 uxtb r3, r3 +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3927 .loc 1 2272 6 view .LVU1383 + 3928 00a6 042B cmp r3, #4 + 3929 00a8 67D0 beq .L298 +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; + 3930 .loc 1 2281 5 is_stmt 1 view .LVU1384 +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; + 3931 .loc 1 2281 9 is_stmt 0 view .LVU1385 + 3932 00aa A36D ldr r3, [r4, #88] +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; + 3933 .loc 1 2281 40 view .LVU1386 + 3934 00ac 584A ldr r2, .L301 + 3935 00ae DA62 str r2, [r3, #44] +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3936 .loc 1 2282 5 is_stmt 1 view .LVU1387 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3937 .loc 1 2282 9 is_stmt 0 view .LVU1388 + 3938 00b0 A36D ldr r3, [r4, #88] +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3939 .loc 1 2282 40 view .LVU1389 + 3940 00b2 584A ldr r2, .L301+4 + 3941 00b4 9A62 str r2, [r3, #40] + 3942 .L285: + ARM GAS /tmp/ccZ0BHQJ.s page 169 + + +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3943 .loc 1 2286 3 is_stmt 1 view .LVU1390 +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3944 .loc 1 2286 7 is_stmt 0 view .LVU1391 + 3945 00b6 A36D ldr r3, [r4, #88] +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3946 .loc 1 2286 35 view .LVU1392 + 3947 00b8 574A ldr r2, .L301+8 + 3948 00ba 1A63 str r2, [r3, #48] +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3949 .loc 1 2289 3 is_stmt 1 view .LVU1393 +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3950 .loc 1 2289 7 is_stmt 0 view .LVU1394 + 3951 00bc A36D ldr r3, [r4, #88] +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3952 .loc 1 2289 35 view .LVU1395 + 3953 00be 0022 movs r2, #0 + 3954 00c0 5A63 str r2, [r3, #52] +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3955 .loc 1 2292 3 is_stmt 1 view .LVU1396 +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3956 .loc 1 2292 63 is_stmt 0 view .LVU1397 + 3957 00c2 2168 ldr r1, [r4] + 3958 .LVL249: +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3959 .loc 1 2293 38 view .LVU1398 + 3960 00c4 B4F84630 ldrh r3, [r4, #70] +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3961 .loc 1 2292 17 view .LVU1399 + 3962 00c8 9BB2 uxth r3, r3 + 3963 00ca 226C ldr r2, [r4, #64] + 3964 00cc 0C31 adds r1, r1, #12 + 3965 00ce A06D ldr r0, [r4, #88] + 3966 00d0 FFF7FEFF bl HAL_DMA_Start_IT + 3967 .LVL250: +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3968 .loc 1 2292 6 discriminator 1 view .LVU1400 + 3969 00d4 0028 cmp r0, #0 + 3970 00d6 57D0 beq .L286 +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 3971 .loc 1 2296 5 is_stmt 1 view .LVU1401 + 3972 00d8 236E ldr r3, [r4, #96] + 3973 00da 43F01003 orr r3, r3, #16 + 3974 00de 2366 str r3, [r4, #96] +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3975 .loc 1 2297 5 view .LVU1402 + 3976 .LVL251: +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3977 .loc 1 2299 5 view .LVU1403 +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3978 .loc 1 2297 15 is_stmt 0 view .LVU1404 + 3979 00e0 0120 movs r0, #1 +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3980 .loc 1 2299 5 view .LVU1405 + 3981 00e2 83E0 b .L276 + 3982 .LVL252: + 3983 .L279: + ARM GAS /tmp/ccZ0BHQJ.s page 170 + + +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3984 .loc 1 2237 5 is_stmt 1 view .LVU1406 + 3985 00e4 2268 ldr r2, [r4] + 3986 00e6 5368 ldr r3, [r2, #4] + 3987 00e8 43F48053 orr r3, r3, #4096 + 3988 00ec 5360 str r3, [r2, #4] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3989 .loc 1 2239 5 view .LVU1407 +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3990 .loc 1 2239 13 is_stmt 0 view .LVU1408 + 3991 00ee 636D ldr r3, [r4, #84] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3992 .loc 1 2239 27 view .LVU1409 + 3993 00f0 5B69 ldr r3, [r3, #20] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3994 .loc 1 2239 8 view .LVU1410 + 3995 00f2 B3F5806F cmp r3, #1024 + 3996 00f6 1AD0 beq .L299 + 3997 .L281: +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3998 .loc 1 2253 5 is_stmt 1 view .LVU1411 +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3999 .loc 1 2253 13 is_stmt 0 view .LVU1412 + 4000 00f8 A36D ldr r3, [r4, #88] +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4001 .loc 1 2253 27 view .LVU1413 + 4002 00fa 5B69 ldr r3, [r3, #20] +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4003 .loc 1 2253 8 view .LVU1414 + 4004 00fc B3F5806F cmp r3, #1024 + 4005 0100 CED1 bne .L280 +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4006 .loc 1 2256 7 is_stmt 1 view .LVU1415 + 4007 0102 2268 ldr r2, [r4] + 4008 0104 5368 ldr r3, [r2, #4] + 4009 0106 23F48053 bic r3, r3, #4096 + 4010 010a 5360 str r3, [r2, #4] +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4011 .loc 1 2258 7 view .LVU1416 +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4012 .loc 1 2258 16 is_stmt 0 view .LVU1417 + 4013 010c B4F84630 ldrh r3, [r4, #70] +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4014 .loc 1 2258 10 view .LVU1418 + 4015 0110 13F0010F tst r3, #1 + 4016 0114 24D1 bne .L283 +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; + 4017 .loc 1 2260 9 is_stmt 1 view .LVU1419 + 4018 0116 2268 ldr r2, [r4] + 4019 0118 5368 ldr r3, [r2, #4] + 4020 011a 23F40053 bic r3, r3, #8192 + 4021 011e 5360 str r3, [r2, #4] +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4022 .loc 1 2261 9 view .LVU1420 +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4023 .loc 1 2261 33 is_stmt 0 view .LVU1421 + 4024 0120 B4F84630 ldrh r3, [r4, #70] + ARM GAS /tmp/ccZ0BHQJ.s page 171 + + +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4025 .loc 1 2261 27 view .LVU1422 + 4026 0124 C3F34E03 ubfx r3, r3, #1, #15 + 4027 0128 A4F84630 strh r3, [r4, #70] @ movhi + 4028 012c B8E7 b .L280 + 4029 .L299: +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4030 .loc 1 2241 7 is_stmt 1 view .LVU1423 +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4031 .loc 1 2241 16 is_stmt 0 view .LVU1424 + 4032 012e A38F ldrh r3, [r4, #60] +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4033 .loc 1 2241 10 view .LVU1425 + 4034 0130 13F0010F tst r3, #1 + 4035 0134 09D1 bne .L282 +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = hspi->TxXferCount >> 1U; + 4036 .loc 1 2243 9 is_stmt 1 view .LVU1426 + 4037 0136 2268 ldr r2, [r4] + 4038 0138 5368 ldr r3, [r2, #4] + 4039 013a 23F48043 bic r3, r3, #16384 + 4040 013e 5360 str r3, [r2, #4] +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4041 .loc 1 2244 9 view .LVU1427 +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4042 .loc 1 2244 33 is_stmt 0 view .LVU1428 + 4043 0140 E38F ldrh r3, [r4, #62] +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4044 .loc 1 2244 27 view .LVU1429 + 4045 0142 C3F34E03 ubfx r3, r3, #1, #15 + 4046 0146 E387 strh r3, [r4, #62] @ movhi + 4047 0148 D6E7 b .L281 + 4048 .L282: +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; + 4049 .loc 1 2248 9 is_stmt 1 view .LVU1430 + 4050 014a 2268 ldr r2, [r4] + 4051 014c 5368 ldr r3, [r2, #4] + 4052 014e 43F48043 orr r3, r3, #16384 + 4053 0152 5360 str r3, [r2, #4] +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4054 .loc 1 2249 9 view .LVU1431 +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4055 .loc 1 2249 34 is_stmt 0 view .LVU1432 + 4056 0154 E38F ldrh r3, [r4, #62] +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4057 .loc 1 2249 55 view .LVU1433 + 4058 0156 C3F34E03 ubfx r3, r3, #1, #15 + 4059 015a 0133 adds r3, r3, #1 +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4060 .loc 1 2249 27 view .LVU1434 + 4061 015c E387 strh r3, [r4, #62] @ movhi + 4062 015e CBE7 b .L281 + 4063 .L283: +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; + 4064 .loc 1 2265 9 is_stmt 1 view .LVU1435 + 4065 0160 2268 ldr r2, [r4] + 4066 0162 5368 ldr r3, [r2, #4] + 4067 0164 43F40053 orr r3, r3, #8192 + ARM GAS /tmp/ccZ0BHQJ.s page 172 + + + 4068 0168 5360 str r3, [r2, #4] +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4069 .loc 1 2266 9 view .LVU1436 +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4070 .loc 1 2266 34 is_stmt 0 view .LVU1437 + 4071 016a B4F84630 ldrh r3, [r4, #70] +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4072 .loc 1 2266 55 view .LVU1438 + 4073 016e C3F34E03 ubfx r3, r3, #1, #15 + 4074 0172 0133 adds r3, r3, #1 +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4075 .loc 1 2266 27 view .LVU1439 + 4076 0174 A4F84630 strh r3, [r4, #70] @ movhi + 4077 0178 92E7 b .L280 + 4078 .L298: +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; + 4079 .loc 1 2275 5 is_stmt 1 view .LVU1440 +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; + 4080 .loc 1 2275 9 is_stmt 0 view .LVU1441 + 4081 017a A36D ldr r3, [r4, #88] +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; + 4082 .loc 1 2275 40 view .LVU1442 + 4083 017c 274A ldr r2, .L301+12 + 4084 017e DA62 str r2, [r3, #44] +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4085 .loc 1 2276 5 is_stmt 1 view .LVU1443 +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4086 .loc 1 2276 9 is_stmt 0 view .LVU1444 + 4087 0180 A36D ldr r3, [r4, #88] +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4088 .loc 1 2276 40 view .LVU1445 + 4089 0182 274A ldr r2, .L301+16 + 4090 0184 9A62 str r2, [r3, #40] + 4091 0186 96E7 b .L285 + 4092 .LVL253: + 4093 .L286: +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4094 .loc 1 2303 3 is_stmt 1 view .LVU1446 + 4095 0188 2268 ldr r2, [r4] + 4096 018a 5368 ldr r3, [r2, #4] + 4097 018c 43F00103 orr r3, r3, #1 + 4098 0190 5360 str r3, [r2, #4] +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; + 4099 .loc 1 2307 3 view .LVU1447 +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; + 4100 .loc 1 2307 7 is_stmt 0 view .LVU1448 + 4101 0192 626D ldr r2, [r4, #84] +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; + 4102 .loc 1 2307 38 view .LVU1449 + 4103 0194 0023 movs r3, #0 + 4104 0196 D362 str r3, [r2, #44] +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; + 4105 .loc 1 2308 3 is_stmt 1 view .LVU1450 +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; + 4106 .loc 1 2308 7 is_stmt 0 view .LVU1451 + 4107 0198 626D ldr r2, [r4, #84] +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; + ARM GAS /tmp/ccZ0BHQJ.s page 173 + + + 4108 .loc 1 2308 38 view .LVU1452 + 4109 019a 9362 str r3, [r2, #40] +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + 4110 .loc 1 2309 3 is_stmt 1 view .LVU1453 +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + 4111 .loc 1 2309 7 is_stmt 0 view .LVU1454 + 4112 019c 626D ldr r2, [r4, #84] +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + 4113 .loc 1 2309 38 view .LVU1455 + 4114 019e 1363 str r3, [r2, #48] +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4115 .loc 1 2310 3 is_stmt 1 view .LVU1456 +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4116 .loc 1 2310 7 is_stmt 0 view .LVU1457 + 4117 01a0 626D ldr r2, [r4, #84] +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4118 .loc 1 2310 38 view .LVU1458 + 4119 01a2 5363 str r3, [r2, #52] +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4120 .loc 1 2313 3 is_stmt 1 view .LVU1459 +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4121 .loc 1 2313 91 is_stmt 0 view .LVU1460 + 4122 01a4 2268 ldr r2, [r4] +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4123 .loc 1 2314 38 view .LVU1461 + 4124 01a6 E38F ldrh r3, [r4, #62] +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4125 .loc 1 2313 17 view .LVU1462 + 4126 01a8 9BB2 uxth r3, r3 + 4127 01aa 0C32 adds r2, r2, #12 + 4128 01ac A16B ldr r1, [r4, #56] + 4129 01ae 606D ldr r0, [r4, #84] + 4130 01b0 FFF7FEFF bl HAL_DMA_Start_IT + 4131 .LVL254: +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4132 .loc 1 2313 6 discriminator 1 view .LVU1463 + 4133 01b4 98B9 cbnz r0, .L300 +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4134 .loc 1 2324 3 is_stmt 1 view .LVU1464 +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4135 .loc 1 2324 12 is_stmt 0 view .LVU1465 + 4136 01b6 2368 ldr r3, [r4] +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4137 .loc 1 2324 22 view .LVU1466 + 4138 01b8 1A68 ldr r2, [r3] +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4139 .loc 1 2324 6 view .LVU1467 + 4140 01ba 12F0400F tst r2, #64 + 4141 01be 03D1 bne .L288 +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4142 .loc 1 2327 5 is_stmt 1 view .LVU1468 + 4143 01c0 1A68 ldr r2, [r3] + 4144 01c2 42F04002 orr r2, r2, #64 + 4145 01c6 1A60 str r2, [r3] + 4146 .L288: +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4147 .loc 1 2330 3 view .LVU1469 + ARM GAS /tmp/ccZ0BHQJ.s page 174 + + + 4148 01c8 2268 ldr r2, [r4] + 4149 01ca 5368 ldr r3, [r2, #4] + 4150 01cc 43F02003 orr r3, r3, #32 + 4151 01d0 5360 str r3, [r2, #4] +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4152 .loc 1 2333 3 view .LVU1470 + 4153 01d2 2268 ldr r2, [r4] + 4154 01d4 5368 ldr r3, [r2, #4] + 4155 01d6 43F00203 orr r3, r3, #2 + 4156 01da 5360 str r3, [r2, #4] + 4157 01dc 06E0 b .L276 + 4158 .L300: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 4159 .loc 1 2317 5 view .LVU1471 + 4160 01de 236E ldr r3, [r4, #96] + 4161 01e0 43F01003 orr r3, r3, #16 + 4162 01e4 2366 str r3, [r4, #96] +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4163 .loc 1 2318 5 view .LVU1472 + 4164 .LVL255: +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4165 .loc 1 2320 5 view .LVU1473 +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4166 .loc 1 2318 15 is_stmt 0 view .LVU1474 + 4167 01e6 0120 movs r0, #1 +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4168 .loc 1 2320 5 view .LVU1475 + 4169 01e8 00E0 b .L276 + 4170 .LVL256: + 4171 .L290: +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4172 .loc 1 2178 15 view .LVU1476 + 4173 01ea 0220 movs r0, #2 + 4174 .LVL257: + 4175 .L276: +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4176 .loc 1 2337 3 is_stmt 1 view .LVU1477 +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4177 .loc 1 2337 3 view .LVU1478 + 4178 01ec 0023 movs r3, #0 + 4179 01ee 84F85C30 strb r3, [r4, #92] +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4180 .loc 1 2337 3 view .LVU1479 +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4181 .loc 1 2338 3 view .LVU1480 + 4182 .LVL258: + 4183 .L274: +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4184 .loc 1 2339 1 is_stmt 0 view .LVU1481 + 4185 01f2 38BD pop {r3, r4, r5, pc} + 4186 .LVL259: + 4187 .L291: +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4188 .loc 1 2178 15 view .LVU1482 + 4189 01f4 0220 movs r0, #2 + 4190 .LVL260: +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + ARM GAS /tmp/ccZ0BHQJ.s page 175 + + + 4191 .loc 1 2178 15 view .LVU1483 + 4192 01f6 F9E7 b .L276 + 4193 .LVL261: + 4194 .L292: +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4195 .loc 1 2178 15 view .LVU1484 + 4196 01f8 0220 movs r0, #2 + 4197 .LVL262: +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4198 .loc 1 2178 15 view .LVU1485 + 4199 01fa F7E7 b .L276 + 4200 .LVL263: + 4201 .L293: +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4202 .loc 1 2184 15 view .LVU1486 + 4203 01fc 0120 movs r0, #1 + 4204 .LVL264: +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4205 .loc 1 2184 15 view .LVU1487 + 4206 01fe F5E7 b .L276 + 4207 .LVL265: + 4208 .L294: +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4209 .loc 1 2184 15 view .LVU1488 + 4210 0200 0120 movs r0, #1 + 4211 .LVL266: +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4212 .loc 1 2184 15 view .LVU1489 + 4213 0202 F3E7 b .L276 + 4214 .LVL267: + 4215 .L295: +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4216 .loc 1 2184 15 view .LVU1490 + 4217 0204 0120 movs r0, #1 + 4218 .LVL268: +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4219 .loc 1 2184 15 view .LVU1491 + 4220 0206 F1E7 b .L276 + 4221 .LVL269: + 4222 .L296: +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4223 .loc 1 2220 15 view .LVU1492 + 4224 0208 0120 movs r0, #1 + 4225 020a EFE7 b .L276 + 4226 .LVL270: + 4227 .L289: +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4228 .loc 1 2169 3 discriminator 1 view .LVU1493 + 4229 020c 0220 movs r0, #2 + 4230 020e F0E7 b .L274 + 4231 .L302: + 4232 .align 2 + 4233 .L301: + 4234 0210 00000000 .word SPI_DMAHalfTransmitReceiveCplt + 4235 0214 00000000 .word SPI_DMATransmitReceiveCplt + 4236 0218 00000000 .word SPI_DMAError + 4237 021c 00000000 .word SPI_DMAHalfReceiveCplt + ARM GAS /tmp/ccZ0BHQJ.s page 176 + + + 4238 0220 00000000 .word SPI_DMAReceiveCplt + 4239 .cfi_endproc + 4240 .LFE142: + 4242 .section .text.HAL_SPI_Receive_DMA,"ax",%progbits + 4243 .align 1 + 4244 .global HAL_SPI_Receive_DMA + 4245 .syntax unified + 4246 .thumb + 4247 .thumb_func + 4249 HAL_SPI_Receive_DMA: + 4250 .LVL271: + 4251 .LFB141: +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 4252 .loc 1 2002 1 is_stmt 1 view -0 + 4253 .cfi_startproc + 4254 @ args = 0, pretend = 0, frame = 0 + 4255 @ frame_needed = 0, uses_anonymous_args = 0 +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 4256 .loc 1 2002 1 is_stmt 0 view .LVU1495 + 4257 0000 38B5 push {r3, r4, r5, lr} + 4258 .cfi_def_cfa_offset 16 + 4259 .cfi_offset 3, -16 + 4260 .cfi_offset 4, -12 + 4261 .cfi_offset 5, -8 + 4262 .cfi_offset 14, -4 + 4263 0002 0446 mov r4, r0 +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4264 .loc 1 2003 3 is_stmt 1 view .LVU1496 + 4265 .LVL272: +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4266 .loc 1 2006 3 view .LVU1497 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4267 .loc 1 2008 3 view .LVU1498 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4268 .loc 1 2008 11 is_stmt 0 view .LVU1499 + 4269 0004 90F85D50 ldrb r5, [r0, #93] @ zero_extendqisi2 + 4270 0008 EDB2 uxtb r5, r5 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4271 .loc 1 2008 6 view .LVU1500 + 4272 000a 012D cmp r5, #1 + 4273 000c 40F0B180 bne .L314 +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4274 .loc 1 2014 3 is_stmt 1 view .LVU1501 +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4275 .loc 1 2014 18 is_stmt 0 view .LVU1502 + 4276 0010 8068 ldr r0, [r0, #8] + 4277 .LVL273: +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4278 .loc 1 2014 6 view .LVU1503 + 4279 0012 18B9 cbnz r0, .L305 +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4280 .loc 1 2014 68 discriminator 1 view .LVU1504 + 4281 0014 6368 ldr r3, [r4, #4] +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4282 .loc 1 2014 54 discriminator 1 view .LVU1505 + 4283 0016 B3F5827F cmp r3, #260 + 4284 001a 63D0 beq .L317 + ARM GAS /tmp/ccZ0BHQJ.s page 177 + + + 4285 .L305: +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4286 .loc 1 2026 3 is_stmt 1 view .LVU1506 +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4287 .loc 1 2026 3 view .LVU1507 + 4288 001c 94F85C30 ldrb r3, [r4, #92] @ zero_extendqisi2 + 4289 0020 012B cmp r3, #1 + 4290 0022 00F0AC80 beq .L315 +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4291 .loc 1 2026 3 discriminator 2 view .LVU1508 + 4292 0026 0123 movs r3, #1 + 4293 0028 84F85C30 strb r3, [r4, #92] +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4294 .loc 1 2026 3 discriminator 2 view .LVU1509 +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4295 .loc 1 2028 3 view .LVU1510 +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4296 .loc 1 2028 6 is_stmt 0 view .LVU1511 + 4297 002c 0029 cmp r1, #0 + 4298 002e 00F0A180 beq .L304 +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4299 .loc 1 2028 23 discriminator 1 view .LVU1512 + 4300 0032 002A cmp r2, #0 + 4301 0034 00F09E80 beq .L304 +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 4302 .loc 1 2035 3 is_stmt 1 view .LVU1513 +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 4303 .loc 1 2035 21 is_stmt 0 view .LVU1514 + 4304 0038 0423 movs r3, #4 + 4305 003a 84F85D30 strb r3, [r4, #93] +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 4306 .loc 1 2036 3 is_stmt 1 view .LVU1515 +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 4307 .loc 1 2036 21 is_stmt 0 view .LVU1516 + 4308 003e 0023 movs r3, #0 + 4309 0040 2366 str r3, [r4, #96] +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 4310 .loc 1 2037 3 is_stmt 1 view .LVU1517 +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 4311 .loc 1 2037 21 is_stmt 0 view .LVU1518 + 4312 0042 2164 str r1, [r4, #64] +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 4313 .loc 1 2038 3 is_stmt 1 view .LVU1519 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 4314 .loc 1 2038 21 is_stmt 0 view .LVU1520 + 4315 0044 A4F84420 strh r2, [r4, #68] @ movhi +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4316 .loc 1 2039 3 is_stmt 1 view .LVU1521 +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4317 .loc 1 2039 21 is_stmt 0 view .LVU1522 + 4318 0048 A4F84620 strh r2, [r4, #70] @ movhi +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 4319 .loc 1 2042 3 is_stmt 1 view .LVU1523 +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 4320 .loc 1 2042 21 is_stmt 0 view .LVU1524 + 4321 004c E364 str r3, [r4, #76] +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + ARM GAS /tmp/ccZ0BHQJ.s page 178 + + + 4322 .loc 1 2043 3 is_stmt 1 view .LVU1525 +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 4323 .loc 1 2043 21 is_stmt 0 view .LVU1526 + 4324 004e 2365 str r3, [r4, #80] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4325 .loc 1 2044 3 is_stmt 1 view .LVU1527 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4326 .loc 1 2044 21 is_stmt 0 view .LVU1528 + 4327 0050 A387 strh r3, [r4, #60] @ movhi +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4328 .loc 1 2045 3 is_stmt 1 view .LVU1529 +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4329 .loc 1 2045 21 is_stmt 0 view .LVU1530 + 4330 0052 E387 strh r3, [r4, #62] @ movhi +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4331 .loc 1 2048 3 is_stmt 1 view .LVU1531 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4332 .loc 1 2048 6 is_stmt 0 view .LVU1532 + 4333 0054 B0F5004F cmp r0, #32768 + 4334 0058 4ED0 beq .L318 + 4335 .LVL274: + 4336 .L307: +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4337 .loc 1 2065 3 is_stmt 1 view .LVU1533 +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4338 .loc 1 2065 18 is_stmt 0 view .LVU1534 + 4339 005a E368 ldr r3, [r4, #12] +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4340 .loc 1 2065 6 view .LVU1535 + 4341 005c B3F5E06F cmp r3, #1792 + 4342 0060 05D8 bhi .L308 +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4343 .loc 1 2065 58 discriminator 1 view .LVU1536 + 4344 0062 A36D ldr r3, [r4, #88] +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4345 .loc 1 2065 72 discriminator 1 view .LVU1537 + 4346 0064 5B69 ldr r3, [r3, #20] +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4347 .loc 1 2065 50 discriminator 1 view .LVU1538 + 4348 0066 B3F5806F cmp r3, #1024 + 4349 006a 00F08380 beq .L304 + 4350 .L308: +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 4351 .loc 1 2073 3 is_stmt 1 view .LVU1539 + 4352 006e 2268 ldr r2, [r4] + 4353 0070 5368 ldr r3, [r2, #4] + 4354 0072 23F40053 bic r3, r3, #8192 + 4355 0076 5360 str r3, [r2, #4] +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4356 .loc 1 2074 3 view .LVU1540 +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4357 .loc 1 2074 17 is_stmt 0 view .LVU1541 + 4358 0078 E368 ldr r3, [r4, #12] +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4359 .loc 1 2074 6 view .LVU1542 + 4360 007a B3F5E06F cmp r3, #1792 + 4361 007e 46D9 bls .L309 + ARM GAS /tmp/ccZ0BHQJ.s page 179 + + +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4362 .loc 1 2077 5 is_stmt 1 view .LVU1543 + 4363 0080 2268 ldr r2, [r4] + 4364 0082 5368 ldr r3, [r2, #4] + 4365 0084 23F48053 bic r3, r3, #4096 + 4366 0088 5360 str r3, [r2, #4] + 4367 .L310: +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4368 .loc 1 2103 3 view .LVU1544 +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4369 .loc 1 2103 7 is_stmt 0 view .LVU1545 + 4370 008a A36D ldr r3, [r4, #88] +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4371 .loc 1 2103 38 view .LVU1546 + 4372 008c 3D4A ldr r2, .L320 + 4373 008e DA62 str r2, [r3, #44] +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4374 .loc 1 2106 3 is_stmt 1 view .LVU1547 +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4375 .loc 1 2106 7 is_stmt 0 view .LVU1548 + 4376 0090 A36D ldr r3, [r4, #88] +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4377 .loc 1 2106 34 view .LVU1549 + 4378 0092 3D4A ldr r2, .L320+4 + 4379 0094 9A62 str r2, [r3, #40] +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4380 .loc 1 2109 3 is_stmt 1 view .LVU1550 +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4381 .loc 1 2109 7 is_stmt 0 view .LVU1551 + 4382 0096 A36D ldr r3, [r4, #88] +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4383 .loc 1 2109 35 view .LVU1552 + 4384 0098 3C4A ldr r2, .L320+8 + 4385 009a 1A63 str r2, [r3, #48] +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4386 .loc 1 2112 3 is_stmt 1 view .LVU1553 +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4387 .loc 1 2112 7 is_stmt 0 view .LVU1554 + 4388 009c A36D ldr r3, [r4, #88] +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4389 .loc 1 2112 35 view .LVU1555 + 4390 009e 0022 movs r2, #0 + 4391 00a0 5A63 str r2, [r3, #52] +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4392 .loc 1 2115 3 is_stmt 1 view .LVU1556 +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4393 .loc 1 2115 63 is_stmt 0 view .LVU1557 + 4394 00a2 2168 ldr r1, [r4] + 4395 .LVL275: +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4396 .loc 1 2116 38 view .LVU1558 + 4397 00a4 B4F84630 ldrh r3, [r4, #70] +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4398 .loc 1 2115 17 view .LVU1559 + 4399 00a8 9BB2 uxth r3, r3 + 4400 00aa 226C ldr r2, [r4, #64] + 4401 00ac 0C31 adds r1, r1, #12 + ARM GAS /tmp/ccZ0BHQJ.s page 180 + + + 4402 00ae A06D ldr r0, [r4, #88] + 4403 00b0 FFF7FEFF bl HAL_DMA_Start_IT + 4404 .LVL276: +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4405 .loc 1 2115 6 discriminator 1 view .LVU1560 + 4406 00b4 0146 mov r1, r0 + 4407 00b6 0028 cmp r0, #0 + 4408 00b8 56D1 bne .L319 +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4409 .loc 1 2126 3 is_stmt 1 view .LVU1561 +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4410 .loc 1 2126 12 is_stmt 0 view .LVU1562 + 4411 00ba 2368 ldr r3, [r4] +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4412 .loc 1 2126 22 view .LVU1563 + 4413 00bc 1A68 ldr r2, [r3] +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4414 .loc 1 2126 6 view .LVU1564 + 4415 00be 12F0400F tst r2, #64 + 4416 00c2 03D1 bne .L313 +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4417 .loc 1 2129 5 is_stmt 1 view .LVU1565 + 4418 00c4 1A68 ldr r2, [r3] + 4419 00c6 42F04002 orr r2, r2, #64 + 4420 00ca 1A60 str r2, [r3] + 4421 .L313: +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4422 .loc 1 2133 3 view .LVU1566 + 4423 00cc 2268 ldr r2, [r4] + 4424 00ce 5368 ldr r3, [r2, #4] + 4425 00d0 43F02003 orr r3, r3, #32 + 4426 00d4 5360 str r3, [r2, #4] +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4427 .loc 1 2136 3 view .LVU1567 + 4428 00d6 2268 ldr r2, [r4] + 4429 00d8 5368 ldr r3, [r2, #4] + 4430 00da 43F00103 orr r3, r3, #1 + 4431 00de 5360 str r3, [r2, #4] +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4432 .loc 1 2003 21 is_stmt 0 view .LVU1568 + 4433 00e0 0D46 mov r5, r1 + 4434 00e2 47E0 b .L304 + 4435 .LVL277: + 4436 .L317: +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4437 .loc 1 2016 5 is_stmt 1 view .LVU1569 +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4438 .loc 1 2016 17 is_stmt 0 view .LVU1570 + 4439 00e4 0423 movs r3, #4 + 4440 00e6 84F85D30 strb r3, [r4, #93] +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4441 .loc 1 2019 5 is_stmt 1 view .LVU1571 +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4442 .loc 1 2022 5 view .LVU1572 +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4443 .loc 1 2022 12 is_stmt 0 view .LVU1573 + 4444 00ea 1346 mov r3, r2 + ARM GAS /tmp/ccZ0BHQJ.s page 181 + + + 4445 00ec 0A46 mov r2, r1 + 4446 .LVL278: +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4447 .loc 1 2022 12 view .LVU1574 + 4448 00ee 2046 mov r0, r4 + 4449 00f0 FFF7FEFF bl HAL_SPI_TransmitReceive_DMA + 4450 .LVL279: +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4451 .loc 1 2022 12 view .LVU1575 + 4452 00f4 0546 mov r5, r0 + 4453 00f6 40E0 b .L306 + 4454 .LVL280: + 4455 .L318: +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 4456 .loc 1 2051 5 is_stmt 1 view .LVU1576 + 4457 00f8 2268 ldr r2, [r4] + 4458 .LVL281: +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 4459 .loc 1 2051 5 is_stmt 0 view .LVU1577 + 4460 00fa 1368 ldr r3, [r2] + 4461 00fc 23F04003 bic r3, r3, #64 + 4462 0100 1360 str r3, [r2] + 4463 .LVL282: +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4464 .loc 1 2052 5 is_stmt 1 view .LVU1578 + 4465 0102 2268 ldr r2, [r4] + 4466 0104 1368 ldr r3, [r2] + 4467 0106 23F48043 bic r3, r3, #16384 + 4468 010a 1360 str r3, [r2] + 4469 010c A5E7 b .L307 + 4470 .L309: +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4471 .loc 1 2082 5 view .LVU1579 + 4472 010e 2268 ldr r2, [r4] + 4473 0110 5368 ldr r3, [r2, #4] + 4474 0112 43F48053 orr r3, r3, #4096 + 4475 0116 5360 str r3, [r2, #4] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4476 .loc 1 2084 5 view .LVU1580 +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4477 .loc 1 2084 13 is_stmt 0 view .LVU1581 + 4478 0118 A36D ldr r3, [r4, #88] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4479 .loc 1 2084 27 view .LVU1582 + 4480 011a 5B69 ldr r3, [r3, #20] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4481 .loc 1 2084 8 view .LVU1583 + 4482 011c B3F5806F cmp r3, #1024 + 4483 0120 B3D1 bne .L310 +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4484 .loc 1 2087 7 is_stmt 1 view .LVU1584 + 4485 0122 2268 ldr r2, [r4] + 4486 0124 5368 ldr r3, [r2, #4] + 4487 0126 23F48053 bic r3, r3, #4096 + 4488 012a 5360 str r3, [r2, #4] +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4489 .loc 1 2089 7 view .LVU1585 + ARM GAS /tmp/ccZ0BHQJ.s page 182 + + +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4490 .loc 1 2089 16 is_stmt 0 view .LVU1586 + 4491 012c B4F84630 ldrh r3, [r4, #70] +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4492 .loc 1 2089 10 view .LVU1587 + 4493 0130 13F0010F tst r3, #1 + 4494 0134 0BD1 bne .L311 +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; + 4495 .loc 1 2091 9 is_stmt 1 view .LVU1588 + 4496 0136 2268 ldr r2, [r4] + 4497 0138 5368 ldr r3, [r2, #4] + 4498 013a 23F40053 bic r3, r3, #8192 + 4499 013e 5360 str r3, [r2, #4] +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4500 .loc 1 2092 9 view .LVU1589 +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4501 .loc 1 2092 33 is_stmt 0 view .LVU1590 + 4502 0140 B4F84630 ldrh r3, [r4, #70] +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4503 .loc 1 2092 27 view .LVU1591 + 4504 0144 C3F34E03 ubfx r3, r3, #1, #15 + 4505 0148 A4F84630 strh r3, [r4, #70] @ movhi + 4506 014c 9DE7 b .L310 + 4507 .L311: +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; + 4508 .loc 1 2096 9 is_stmt 1 view .LVU1592 + 4509 014e 2268 ldr r2, [r4] + 4510 0150 5368 ldr r3, [r2, #4] + 4511 0152 43F40053 orr r3, r3, #8192 + 4512 0156 5360 str r3, [r2, #4] +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4513 .loc 1 2097 9 view .LVU1593 +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4514 .loc 1 2097 34 is_stmt 0 view .LVU1594 + 4515 0158 B4F84630 ldrh r3, [r4, #70] +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4516 .loc 1 2097 55 view .LVU1595 + 4517 015c C3F34E03 ubfx r3, r3, #1, #15 + 4518 0160 0133 adds r3, r3, #1 +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4519 .loc 1 2097 27 view .LVU1596 + 4520 0162 A4F84630 strh r3, [r4, #70] @ movhi + 4521 0166 90E7 b .L310 + 4522 .LVL283: + 4523 .L319: +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 4524 .loc 1 2119 5 is_stmt 1 view .LVU1597 + 4525 0168 236E ldr r3, [r4, #96] + 4526 016a 43F01003 orr r3, r3, #16 + 4527 016e 2366 str r3, [r4, #96] +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4528 .loc 1 2120 5 view .LVU1598 + 4529 .LVL284: +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4530 .loc 1 2122 5 view .LVU1599 + 4531 0170 00E0 b .L304 + 4532 .LVL285: + ARM GAS /tmp/ccZ0BHQJ.s page 183 + + + 4533 .L314: +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4534 .loc 1 2010 15 is_stmt 0 view .LVU1600 + 4535 0172 0225 movs r5, #2 + 4536 .LVL286: + 4537 .L304: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4538 .loc 1 2140 3 is_stmt 1 view .LVU1601 +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4539 .loc 1 2140 3 view .LVU1602 + 4540 0174 0023 movs r3, #0 + 4541 0176 84F85C30 strb r3, [r4, #92] +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4542 .loc 1 2140 3 view .LVU1603 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4543 .loc 1 2141 3 view .LVU1604 + 4544 .LVL287: + 4545 .L306: +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4546 .loc 1 2142 1 is_stmt 0 view .LVU1605 + 4547 017a 2846 mov r0, r5 + 4548 017c 38BD pop {r3, r4, r5, pc} + 4549 .LVL288: + 4550 .L315: +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4551 .loc 1 2026 3 discriminator 1 view .LVU1606 + 4552 017e 0225 movs r5, #2 + 4553 0180 FBE7 b .L306 + 4554 .L321: + 4555 0182 00BF .align 2 + 4556 .L320: + 4557 0184 00000000 .word SPI_DMAHalfReceiveCplt + 4558 0188 00000000 .word SPI_DMAReceiveCplt + 4559 018c 00000000 .word SPI_DMAError + 4560 .cfi_endproc + 4561 .LFE141: + 4563 .section .text.HAL_SPI_Abort,"ax",%progbits + 4564 .align 1 + 4565 .global HAL_SPI_Abort + 4566 .syntax unified + 4567 .thumb + 4568 .thumb_func + 4570 HAL_SPI_Abort: + 4571 .LVL289: + 4572 .LFB143: +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 4573 .loc 1 2355 1 is_stmt 1 view -0 + 4574 .cfi_startproc + 4575 @ args = 0, pretend = 0, frame = 16 + 4576 @ frame_needed = 0, uses_anonymous_args = 0 +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 4577 .loc 1 2355 1 is_stmt 0 view .LVU1608 + 4578 0000 10B5 push {r4, lr} + 4579 .cfi_def_cfa_offset 8 + 4580 .cfi_offset 4, -8 + 4581 .cfi_offset 14, -4 + 4582 0002 86B0 sub sp, sp, #24 + ARM GAS /tmp/ccZ0BHQJ.s page 184 + + + 4583 .cfi_def_cfa_offset 32 + 4584 0004 0446 mov r4, r0 +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 4585 .loc 1 2356 3 is_stmt 1 view .LVU1609 +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; + 4586 .loc 1 2357 3 view .LVU1610 +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4587 .loc 1 2358 3 view .LVU1611 +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 4588 .loc 1 2361 3 view .LVU1612 + 4589 .LVL290: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4590 .loc 1 2362 3 view .LVU1613 +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4591 .loc 1 2362 61 is_stmt 0 view .LVU1614 + 4592 0006 5E4B ldr r3, .L343 + 4593 0008 1B68 ldr r3, [r3] + 4594 000a 5E4A ldr r2, .L343+4 + 4595 000c A2FB0323 umull r2, r3, r2, r3 + 4596 0010 5B0A lsrs r3, r3, #9 +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4597 .loc 1 2362 36 view .LVU1615 + 4598 0012 6422 movs r2, #100 + 4599 0014 02FB03F3 mul r3, r2, r3 +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4600 .loc 1 2362 14 view .LVU1616 + 4601 0018 0493 str r3, [sp, #16] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4602 .loc 1 2363 3 is_stmt 1 view .LVU1617 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4603 .loc 1 2363 9 is_stmt 0 view .LVU1618 + 4604 001a 049B ldr r3, [sp, #16] + 4605 001c 0593 str r3, [sp, #20] +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4606 .loc 1 2366 3 is_stmt 1 view .LVU1619 + 4607 001e 0268 ldr r2, [r0] + 4608 0020 5368 ldr r3, [r2, #4] + 4609 0022 23F02003 bic r3, r3, #32 + 4610 0026 5360 str r3, [r2, #4] +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4611 .loc 1 2369 3 view .LVU1620 +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4612 .loc 1 2369 7 is_stmt 0 view .LVU1621 + 4613 0028 0268 ldr r2, [r0] + 4614 002a 5368 ldr r3, [r2, #4] +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4615 .loc 1 2369 6 view .LVU1622 + 4616 002c 13F0800F tst r3, #128 + 4617 0030 12D0 beq .L323 +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4618 .loc 1 2371 5 is_stmt 1 view .LVU1623 +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4619 .loc 1 2371 17 is_stmt 0 view .LVU1624 + 4620 0032 554B ldr r3, .L343+8 + 4621 0034 0365 str r3, [r0, #80] + 4622 .L326: +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 185 + + + 4623 .loc 1 2373 5 is_stmt 1 view .LVU1625 +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4624 .loc 1 2375 7 view .LVU1626 +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4625 .loc 1 2375 17 is_stmt 0 view .LVU1627 + 4626 0036 059B ldr r3, [sp, #20] +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4627 .loc 1 2375 10 view .LVU1628 + 4628 0038 43B1 cbz r3, .L341 +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4629 .loc 1 2380 7 is_stmt 1 view .LVU1629 +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4630 .loc 1 2380 12 is_stmt 0 view .LVU1630 + 4631 003a 059B ldr r3, [sp, #20] + 4632 003c 013B subs r3, r3, #1 + 4633 003e 0593 str r3, [sp, #20] +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4634 .loc 1 2381 26 is_stmt 1 view .LVU1631 +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4635 .loc 1 2381 18 is_stmt 0 view .LVU1632 + 4636 0040 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 4637 0044 DBB2 uxtb r3, r3 +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4638 .loc 1 2381 26 view .LVU1633 + 4639 0046 072B cmp r3, #7 + 4640 0048 F5D1 bne .L326 + 4641 004a 03E0 b .L325 + 4642 .L341: +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 4643 .loc 1 2377 9 is_stmt 1 view .LVU1634 + 4644 004c 236E ldr r3, [r4, #96] + 4645 004e 43F04003 orr r3, r3, #64 + 4646 0052 2366 str r3, [r4, #96] +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4647 .loc 1 2378 9 view .LVU1635 + 4648 .L325: +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4649 .loc 1 2383 5 view .LVU1636 +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4650 .loc 1 2383 11 is_stmt 0 view .LVU1637 + 4651 0054 049B ldr r3, [sp, #16] + 4652 0056 0593 str r3, [sp, #20] + 4653 .L323: +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4654 .loc 1 2386 3 is_stmt 1 view .LVU1638 +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4655 .loc 1 2386 7 is_stmt 0 view .LVU1639 + 4656 0058 5368 ldr r3, [r2, #4] +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4657 .loc 1 2386 6 view .LVU1640 + 4658 005a 13F0400F tst r3, #64 + 4659 005e 12D0 beq .L327 +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4660 .loc 1 2388 5 is_stmt 1 view .LVU1641 +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4661 .loc 1 2388 17 is_stmt 0 view .LVU1642 + 4662 0060 4A4B ldr r3, .L343+12 + ARM GAS /tmp/ccZ0BHQJ.s page 186 + + + 4663 0062 E364 str r3, [r4, #76] + 4664 .L330: +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4665 .loc 1 2390 5 is_stmt 1 view .LVU1643 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4666 .loc 1 2392 7 view .LVU1644 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4667 .loc 1 2392 17 is_stmt 0 view .LVU1645 + 4668 0064 059B ldr r3, [sp, #20] +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4669 .loc 1 2392 10 view .LVU1646 + 4670 0066 43B1 cbz r3, .L342 +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4671 .loc 1 2397 7 is_stmt 1 view .LVU1647 +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4672 .loc 1 2397 12 is_stmt 0 view .LVU1648 + 4673 0068 059B ldr r3, [sp, #20] + 4674 006a 013B subs r3, r3, #1 + 4675 006c 0593 str r3, [sp, #20] +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4676 .loc 1 2398 26 is_stmt 1 view .LVU1649 +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4677 .loc 1 2398 18 is_stmt 0 view .LVU1650 + 4678 006e 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 4679 0072 DBB2 uxtb r3, r3 +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4680 .loc 1 2398 26 view .LVU1651 + 4681 0074 072B cmp r3, #7 + 4682 0076 F5D1 bne .L330 + 4683 0078 03E0 b .L329 + 4684 .L342: +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 4685 .loc 1 2394 9 is_stmt 1 view .LVU1652 + 4686 007a 236E ldr r3, [r4, #96] + 4687 007c 43F04003 orr r3, r3, #64 + 4688 0080 2366 str r3, [r4, #96] +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4689 .loc 1 2395 9 view .LVU1653 + 4690 .L329: +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4691 .loc 1 2400 5 view .LVU1654 +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4692 .loc 1 2400 11 is_stmt 0 view .LVU1655 + 4693 0082 049B ldr r3, [sp, #16] + 4694 0084 0593 str r3, [sp, #20] + 4695 .L327: +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4696 .loc 1 2404 3 is_stmt 1 view .LVU1656 +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4697 .loc 1 2404 7 is_stmt 0 view .LVU1657 + 4698 0086 5368 ldr r3, [r2, #4] +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4699 .loc 1 2404 6 view .LVU1658 + 4700 0088 13F0020F tst r3, #2 + 4701 008c 2AD0 beq .L331 +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4702 .loc 1 2407 5 is_stmt 1 view .LVU1659 + ARM GAS /tmp/ccZ0BHQJ.s page 187 + + +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4703 .loc 1 2407 13 is_stmt 0 view .LVU1660 + 4704 008e 636D ldr r3, [r4, #84] +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4705 .loc 1 2407 8 view .LVU1661 + 4706 0090 43B3 cbz r3, .L331 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4707 .loc 1 2411 7 is_stmt 1 view .LVU1662 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4708 .loc 1 2411 39 is_stmt 0 view .LVU1663 + 4709 0092 0022 movs r2, #0 + 4710 0094 5A63 str r2, [r3, #52] +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4711 .loc 1 2414 7 is_stmt 1 view .LVU1664 +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4712 .loc 1 2414 11 is_stmt 0 view .LVU1665 + 4713 0096 606D ldr r0, [r4, #84] + 4714 .LVL291: +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4715 .loc 1 2414 11 view .LVU1666 + 4716 0098 FFF7FEFF bl HAL_DMA_Abort + 4717 .LVL292: +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4718 .loc 1 2414 10 discriminator 1 view .LVU1667 + 4719 009c 08B1 cbz r0, .L332 +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4720 .loc 1 2416 9 is_stmt 1 view .LVU1668 +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4721 .loc 1 2416 25 is_stmt 0 view .LVU1669 + 4722 009e 4023 movs r3, #64 + 4723 00a0 2366 str r3, [r4, #96] + 4724 .L332: +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4725 .loc 1 2420 7 is_stmt 1 view .LVU1670 + 4726 00a2 2268 ldr r2, [r4] + 4727 00a4 5368 ldr r3, [r2, #4] + 4728 00a6 23F00203 bic r3, r3, #2 + 4729 00aa 5360 str r3, [r2, #4] +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4730 .loc 1 2422 7 view .LVU1671 +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4731 .loc 1 2422 11 is_stmt 0 view .LVU1672 + 4732 00ac FFF7FEFF bl HAL_GetTick + 4733 .LVL293: + 4734 00b0 0246 mov r2, r0 +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4735 .loc 1 2422 11 discriminator 1 view .LVU1673 + 4736 00b2 6421 movs r1, #100 + 4737 00b4 2046 mov r0, r4 + 4738 00b6 FFF7FEFF bl SPI_EndRxTxTransaction + 4739 .LVL294: +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4740 .loc 1 2422 10 discriminator 2 view .LVU1674 + 4741 00ba 08B1 cbz r0, .L333 +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4742 .loc 1 2424 9 is_stmt 1 view .LVU1675 +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 188 + + + 4743 .loc 1 2424 25 is_stmt 0 view .LVU1676 + 4744 00bc 4023 movs r3, #64 + 4745 00be 2366 str r3, [r4, #96] + 4746 .L333: +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4747 .loc 1 2428 7 is_stmt 1 view .LVU1677 + 4748 00c0 2268 ldr r2, [r4] + 4749 00c2 1368 ldr r3, [r2] + 4750 00c4 23F04003 bic r3, r3, #64 + 4751 00c8 1360 str r3, [r2] +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4752 .loc 1 2431 7 view .LVU1678 +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4753 .loc 1 2431 11 is_stmt 0 view .LVU1679 + 4754 00ca FFF7FEFF bl HAL_GetTick + 4755 .LVL295: +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4756 .loc 1 2431 11 discriminator 1 view .LVU1680 + 4757 00ce 0090 str r0, [sp] + 4758 00d0 6423 movs r3, #100 + 4759 00d2 0022 movs r2, #0 + 4760 00d4 4FF4C061 mov r1, #1536 + 4761 00d8 2046 mov r0, r4 + 4762 00da FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 4763 .LVL296: +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4764 .loc 1 2431 10 discriminator 2 view .LVU1681 + 4765 00de 08B1 cbz r0, .L331 +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4766 .loc 1 2433 9 is_stmt 1 view .LVU1682 +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4767 .loc 1 2433 25 is_stmt 0 view .LVU1683 + 4768 00e0 4023 movs r3, #64 + 4769 00e2 2366 str r3, [r4, #96] + 4770 .L331: +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4771 .loc 1 2439 3 is_stmt 1 view .LVU1684 +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4772 .loc 1 2439 7 is_stmt 0 view .LVU1685 + 4773 00e4 2368 ldr r3, [r4] + 4774 00e6 5B68 ldr r3, [r3, #4] +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4775 .loc 1 2439 6 view .LVU1686 + 4776 00e8 13F0010F tst r3, #1 + 4777 00ec 2CD0 beq .L334 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4778 .loc 1 2442 5 is_stmt 1 view .LVU1687 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4779 .loc 1 2442 13 is_stmt 0 view .LVU1688 + 4780 00ee A36D ldr r3, [r4, #88] +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4781 .loc 1 2442 8 view .LVU1689 + 4782 00f0 53B3 cbz r3, .L334 +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4783 .loc 1 2446 7 is_stmt 1 view .LVU1690 +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4784 .loc 1 2446 39 is_stmt 0 view .LVU1691 + ARM GAS /tmp/ccZ0BHQJ.s page 189 + + + 4785 00f2 0022 movs r2, #0 + 4786 00f4 5A63 str r2, [r3, #52] +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4787 .loc 1 2449 7 is_stmt 1 view .LVU1692 +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4788 .loc 1 2449 11 is_stmt 0 view .LVU1693 + 4789 00f6 A06D ldr r0, [r4, #88] + 4790 00f8 FFF7FEFF bl HAL_DMA_Abort + 4791 .LVL297: +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4792 .loc 1 2449 10 discriminator 1 view .LVU1694 + 4793 00fc 08B1 cbz r0, .L335 +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4794 .loc 1 2451 9 is_stmt 1 view .LVU1695 +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4795 .loc 1 2451 25 is_stmt 0 view .LVU1696 + 4796 00fe 4023 movs r3, #64 + 4797 0100 2366 str r3, [r4, #96] + 4798 .L335: +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4799 .loc 1 2455 7 is_stmt 1 view .LVU1697 + 4800 0102 2268 ldr r2, [r4] + 4801 0104 1368 ldr r3, [r2] + 4802 0106 23F04003 bic r3, r3, #64 + 4803 010a 1360 str r3, [r2] +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4804 .loc 1 2458 7 view .LVU1698 +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4805 .loc 1 2458 11 is_stmt 0 view .LVU1699 + 4806 010c FFF7FEFF bl HAL_GetTick + 4807 .LVL298: +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4808 .loc 1 2458 11 discriminator 1 view .LVU1700 + 4809 0110 0090 str r0, [sp] + 4810 0112 6423 movs r3, #100 + 4811 0114 0022 movs r2, #0 + 4812 0116 8021 movs r1, #128 + 4813 0118 2046 mov r0, r4 + 4814 011a FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 4815 .LVL299: +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4816 .loc 1 2458 10 discriminator 2 view .LVU1701 + 4817 011e 08B1 cbz r0, .L336 +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4818 .loc 1 2460 9 is_stmt 1 view .LVU1702 +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4819 .loc 1 2460 25 is_stmt 0 view .LVU1703 + 4820 0120 4023 movs r3, #64 + 4821 0122 2366 str r3, [r4, #96] + 4822 .L336: +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4823 .loc 1 2464 7 is_stmt 1 view .LVU1704 +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4824 .loc 1 2464 11 is_stmt 0 view .LVU1705 + 4825 0124 FFF7FEFF bl HAL_GetTick + 4826 .LVL300: +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 190 + + + 4827 .loc 1 2464 11 discriminator 1 view .LVU1706 + 4828 0128 0090 str r0, [sp] + 4829 012a 6423 movs r3, #100 + 4830 012c 0022 movs r2, #0 + 4831 012e 4FF4C061 mov r1, #1536 + 4832 0132 2046 mov r0, r4 + 4833 0134 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 4834 .LVL301: +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4835 .loc 1 2464 10 discriminator 2 view .LVU1707 + 4836 0138 08B1 cbz r0, .L337 +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4837 .loc 1 2466 9 is_stmt 1 view .LVU1708 +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4838 .loc 1 2466 25 is_stmt 0 view .LVU1709 + 4839 013a 4023 movs r3, #64 + 4840 013c 2366 str r3, [r4, #96] + 4841 .L337: +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4842 .loc 1 2470 7 is_stmt 1 view .LVU1710 + 4843 013e 2268 ldr r2, [r4] + 4844 0140 5368 ldr r3, [r2, #4] + 4845 0142 23F00103 bic r3, r3, #1 + 4846 0146 5360 str r3, [r2, #4] + 4847 .L334: +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4848 .loc 1 2474 3 view .LVU1711 +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4849 .loc 1 2474 21 is_stmt 0 view .LVU1712 + 4850 0148 0023 movs r3, #0 + 4851 014a A4F84630 strh r3, [r4, #70] @ movhi +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4852 .loc 1 2475 3 is_stmt 1 view .LVU1713 +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4853 .loc 1 2475 21 is_stmt 0 view .LVU1714 + 4854 014e E387 strh r3, [r4, #62] @ movhi +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4855 .loc 1 2478 3 is_stmt 1 view .LVU1715 +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4856 .loc 1 2478 11 is_stmt 0 view .LVU1716 + 4857 0150 236E ldr r3, [r4, #96] +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4858 .loc 1 2478 6 view .LVU1717 + 4859 0152 402B cmp r3, #64 + 4860 0154 12D0 beq .L339 +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4861 .loc 1 2486 5 is_stmt 1 view .LVU1718 +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4862 .loc 1 2486 21 is_stmt 0 view .LVU1719 + 4863 0156 0020 movs r0, #0 + 4864 0158 2066 str r0, [r4, #96] + 4865 .L338: + 4866 .LVL302: +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4867 .loc 1 2490 3 is_stmt 1 view .LVU1720 + 4868 .LBB3: +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + ARM GAS /tmp/ccZ0BHQJ.s page 191 + + + 4869 .loc 1 2490 3 view .LVU1721 + 4870 015a 0022 movs r2, #0 + 4871 015c 0292 str r2, [sp, #8] +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4872 .loc 1 2490 3 view .LVU1722 + 4873 015e 2368 ldr r3, [r4] + 4874 0160 D968 ldr r1, [r3, #12] + 4875 0162 0291 str r1, [sp, #8] +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4876 .loc 1 2490 3 view .LVU1723 + 4877 0164 9968 ldr r1, [r3, #8] + 4878 0166 0291 str r1, [sp, #8] +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4879 .loc 1 2490 3 view .LVU1724 + 4880 0168 0299 ldr r1, [sp, #8] + 4881 .LBE3: +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4882 .loc 1 2490 3 view .LVU1725 +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4883 .loc 1 2491 3 view .LVU1726 + 4884 .LBB4: +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4885 .loc 1 2491 3 view .LVU1727 + 4886 016a 0392 str r2, [sp, #12] +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4887 .loc 1 2491 3 view .LVU1728 + 4888 016c 9B68 ldr r3, [r3, #8] + 4889 016e 0393 str r3, [sp, #12] +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4890 .loc 1 2491 3 view .LVU1729 + 4891 0170 039B ldr r3, [sp, #12] + 4892 .LBE4: +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4893 .loc 1 2491 3 view .LVU1730 +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4894 .loc 1 2494 3 view .LVU1731 +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4895 .loc 1 2494 15 is_stmt 0 view .LVU1732 + 4896 0172 0123 movs r3, #1 + 4897 0174 84F85D30 strb r3, [r4, #93] +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4898 .loc 1 2496 3 is_stmt 1 view .LVU1733 +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4899 .loc 1 2497 1 is_stmt 0 view .LVU1734 + 4900 0178 06B0 add sp, sp, #24 + 4901 .cfi_remember_state + 4902 .cfi_def_cfa_offset 8 + 4903 @ sp needed + 4904 017a 10BD pop {r4, pc} + 4905 .LVL303: + 4906 .L339: + 4907 .cfi_restore_state +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4908 .loc 1 2481 15 view .LVU1735 + 4909 017c 0120 movs r0, #1 + 4910 017e ECE7 b .L338 + 4911 .L344: + ARM GAS /tmp/ccZ0BHQJ.s page 192 + + + 4912 .align 2 + 4913 .L343: + 4914 0180 00000000 .word SystemCoreClock + 4915 0184 F1197605 .word 91625969 + 4916 0188 00000000 .word SPI_AbortTx_ISR + 4917 018c 00000000 .word SPI_AbortRx_ISR + 4918 .cfi_endproc + 4919 .LFE143: + 4921 .section .text.HAL_SPI_DMAPause,"ax",%progbits + 4922 .align 1 + 4923 .global HAL_SPI_DMAPause + 4924 .syntax unified + 4925 .thumb + 4926 .thumb_func + 4928 HAL_SPI_DMAPause: + 4929 .LVL304: + 4930 .LFB145: +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + 4931 .loc 1 2676 1 is_stmt 1 view -0 + 4932 .cfi_startproc + 4933 @ args = 0, pretend = 0, frame = 0 + 4934 @ frame_needed = 0, uses_anonymous_args = 0 + 4935 @ link register save eliminated. +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4936 .loc 1 2678 3 view .LVU1737 +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4937 .loc 1 2678 3 view .LVU1738 + 4938 0000 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 4939 0004 012B cmp r3, #1 + 4940 0006 0CD0 beq .L347 +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4941 .loc 1 2678 3 discriminator 2 view .LVU1739 + 4942 0008 0123 movs r3, #1 + 4943 000a 80F85C30 strb r3, [r0, #92] +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4944 .loc 1 2678 3 discriminator 2 view .LVU1740 +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4945 .loc 1 2681 3 view .LVU1741 + 4946 000e 0268 ldr r2, [r0] + 4947 0010 5368 ldr r3, [r2, #4] + 4948 0012 23F00303 bic r3, r3, #3 + 4949 0016 5360 str r3, [r2, #4] +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4950 .loc 1 2684 3 view .LVU1742 +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4951 .loc 1 2684 3 view .LVU1743 + 4952 0018 0023 movs r3, #0 + 4953 001a 80F85C30 strb r3, [r0, #92] +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4954 .loc 1 2684 3 view .LVU1744 +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4955 .loc 1 2686 3 view .LVU1745 +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4956 .loc 1 2686 10 is_stmt 0 view .LVU1746 + 4957 001e 1846 mov r0, r3 + 4958 .LVL305: +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 193 + + + 4959 .loc 1 2686 10 view .LVU1747 + 4960 0020 7047 bx lr + 4961 .LVL306: + 4962 .L347: +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4963 .loc 1 2678 3 discriminator 1 view .LVU1748 + 4964 0022 0220 movs r0, #2 + 4965 .LVL307: +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4966 .loc 1 2687 1 view .LVU1749 + 4967 0024 7047 bx lr + 4968 .cfi_endproc + 4969 .LFE145: + 4971 .section .text.HAL_SPI_DMAResume,"ax",%progbits + 4972 .align 1 + 4973 .global HAL_SPI_DMAResume + 4974 .syntax unified + 4975 .thumb + 4976 .thumb_func + 4978 HAL_SPI_DMAResume: + 4979 .LVL308: + 4980 .LFB146: +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + 4981 .loc 1 2696 1 is_stmt 1 view -0 + 4982 .cfi_startproc + 4983 @ args = 0, pretend = 0, frame = 0 + 4984 @ frame_needed = 0, uses_anonymous_args = 0 + 4985 @ link register save eliminated. +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4986 .loc 1 2698 3 view .LVU1751 +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4987 .loc 1 2698 3 view .LVU1752 + 4988 0000 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 4989 0004 012B cmp r3, #1 + 4990 0006 0CD0 beq .L350 +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4991 .loc 1 2698 3 discriminator 2 view .LVU1753 + 4992 0008 0123 movs r3, #1 + 4993 000a 80F85C30 strb r3, [r0, #92] +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4994 .loc 1 2698 3 discriminator 2 view .LVU1754 +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4995 .loc 1 2701 3 view .LVU1755 + 4996 000e 0268 ldr r2, [r0] + 4997 0010 5368 ldr r3, [r2, #4] + 4998 0012 43F00303 orr r3, r3, #3 + 4999 0016 5360 str r3, [r2, #4] +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5000 .loc 1 2704 3 view .LVU1756 +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5001 .loc 1 2704 3 view .LVU1757 + 5002 0018 0023 movs r3, #0 + 5003 001a 80F85C30 strb r3, [r0, #92] +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5004 .loc 1 2704 3 view .LVU1758 +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5005 .loc 1 2706 3 view .LVU1759 + ARM GAS /tmp/ccZ0BHQJ.s page 194 + + +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5006 .loc 1 2706 10 is_stmt 0 view .LVU1760 + 5007 001e 1846 mov r0, r3 + 5008 .LVL309: +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5009 .loc 1 2706 10 view .LVU1761 + 5010 0020 7047 bx lr + 5011 .LVL310: + 5012 .L350: +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5013 .loc 1 2698 3 discriminator 1 view .LVU1762 + 5014 0022 0220 movs r0, #2 + 5015 .LVL311: +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5016 .loc 1 2707 1 view .LVU1763 + 5017 0024 7047 bx lr + 5018 .cfi_endproc + 5019 .LFE146: + 5021 .section .text.HAL_SPI_DMAStop,"ax",%progbits + 5022 .align 1 + 5023 .global HAL_SPI_DMAStop + 5024 .syntax unified + 5025 .thumb + 5026 .thumb_func + 5028 HAL_SPI_DMAStop: + 5029 .LVL312: + 5030 .LFB147: +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 5031 .loc 1 2716 1 is_stmt 1 view -0 + 5032 .cfi_startproc + 5033 @ args = 0, pretend = 0, frame = 0 + 5034 @ frame_needed = 0, uses_anonymous_args = 0 +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 5035 .loc 1 2716 1 is_stmt 0 view .LVU1765 + 5036 0000 38B5 push {r3, r4, r5, lr} + 5037 .cfi_def_cfa_offset 16 + 5038 .cfi_offset 3, -16 + 5039 .cfi_offset 4, -12 + 5040 .cfi_offset 5, -8 + 5041 .cfi_offset 14, -4 + 5042 0002 0446 mov r4, r0 +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The Lock is not implemented on this API to allow the user application + 5043 .loc 1 2717 3 is_stmt 1 view .LVU1766 + 5044 .LVL313: +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5045 .loc 1 2725 3 view .LVU1767 +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5046 .loc 1 2725 11 is_stmt 0 view .LVU1768 + 5047 0004 406D ldr r0, [r0, #84] + 5048 .LVL314: +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5049 .loc 1 2725 6 view .LVU1769 + 5050 0006 48B1 cbz r0, .L354 +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5051 .loc 1 2727 5 is_stmt 1 view .LVU1770 +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5052 .loc 1 2727 19 is_stmt 0 view .LVU1771 + ARM GAS /tmp/ccZ0BHQJ.s page 195 + + + 5053 0008 FFF7FEFF bl HAL_DMA_Abort + 5054 .LVL315: +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5055 .loc 1 2727 8 discriminator 1 view .LVU1772 + 5056 000c 0546 mov r5, r0 + 5057 000e 30B1 cbz r0, .L352 +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 5058 .loc 1 2729 7 is_stmt 1 view .LVU1773 + 5059 0010 236E ldr r3, [r4, #96] + 5060 0012 43F01003 orr r3, r3, #16 + 5061 0016 2366 str r3, [r4, #96] +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5062 .loc 1 2730 7 view .LVU1774 + 5063 .LVL316: +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5064 .loc 1 2730 17 is_stmt 0 view .LVU1775 + 5065 0018 0125 movs r5, #1 + 5066 001a 00E0 b .L352 + 5067 .LVL317: + 5068 .L354: +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The Lock is not implemented on this API to allow the user application + 5069 .loc 1 2717 21 view .LVU1776 + 5070 001c 0025 movs r5, #0 + 5071 .LVL318: + 5072 .L352: +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5073 .loc 1 2734 3 is_stmt 1 view .LVU1777 +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5074 .loc 1 2734 11 is_stmt 0 view .LVU1778 + 5075 001e A06D ldr r0, [r4, #88] +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5076 .loc 1 2734 6 view .LVU1779 + 5077 0020 38B1 cbz r0, .L353 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5078 .loc 1 2736 5 is_stmt 1 view .LVU1780 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5079 .loc 1 2736 19 is_stmt 0 view .LVU1781 + 5080 0022 FFF7FEFF bl HAL_DMA_Abort + 5081 .LVL319: +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5082 .loc 1 2736 8 discriminator 1 view .LVU1782 + 5083 0026 20B1 cbz r0, .L353 +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 5084 .loc 1 2738 7 is_stmt 1 view .LVU1783 + 5085 0028 236E ldr r3, [r4, #96] + 5086 002a 43F01003 orr r3, r3, #16 + 5087 002e 2366 str r3, [r4, #96] +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5088 .loc 1 2739 7 view .LVU1784 + 5089 .LVL320: +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5090 .loc 1 2739 17 is_stmt 0 view .LVU1785 + 5091 0030 0125 movs r5, #1 + 5092 .LVL321: + 5093 .L353: +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 5094 .loc 1 2744 3 is_stmt 1 view .LVU1786 + ARM GAS /tmp/ccZ0BHQJ.s page 196 + + + 5095 0032 2268 ldr r2, [r4] + 5096 0034 5368 ldr r3, [r2, #4] + 5097 0036 23F00303 bic r3, r3, #3 + 5098 003a 5360 str r3, [r2, #4] +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 5099 .loc 1 2745 3 view .LVU1787 +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 5100 .loc 1 2745 15 is_stmt 0 view .LVU1788 + 5101 003c 0123 movs r3, #1 + 5102 003e 84F85D30 strb r3, [r4, #93] +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5103 .loc 1 2746 3 is_stmt 1 view .LVU1789 +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5104 .loc 1 2747 1 is_stmt 0 view .LVU1790 + 5105 0042 2846 mov r0, r5 + 5106 0044 38BD pop {r3, r4, r5, pc} +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5107 .loc 1 2747 1 view .LVU1791 + 5108 .cfi_endproc + 5109 .LFE147: + 5111 .section .text.HAL_SPI_TxCpltCallback,"ax",%progbits + 5112 .align 1 + 5113 .weak HAL_SPI_TxCpltCallback + 5114 .syntax unified + 5115 .thumb + 5116 .thumb_func + 5118 HAL_SPI_TxCpltCallback: + 5119 .LVL322: + 5120 .LFB149: +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5121 .loc 1 2863 1 is_stmt 1 view -0 + 5122 .cfi_startproc + 5123 @ args = 0, pretend = 0, frame = 0 + 5124 @ frame_needed = 0, uses_anonymous_args = 0 + 5125 @ link register save eliminated. +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5126 .loc 1 2865 3 view .LVU1793 +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5127 .loc 1 2870 1 is_stmt 0 view .LVU1794 + 5128 0000 7047 bx lr + 5129 .cfi_endproc + 5130 .LFE149: + 5132 .section .text.HAL_SPI_RxCpltCallback,"ax",%progbits + 5133 .align 1 + 5134 .weak HAL_SPI_RxCpltCallback + 5135 .syntax unified + 5136 .thumb + 5137 .thumb_func + 5139 HAL_SPI_RxCpltCallback: + 5140 .LVL323: + 5141 .LFB150: +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5142 .loc 1 2879 1 is_stmt 1 view -0 + 5143 .cfi_startproc + 5144 @ args = 0, pretend = 0, frame = 0 + 5145 @ frame_needed = 0, uses_anonymous_args = 0 + 5146 @ link register save eliminated. + ARM GAS /tmp/ccZ0BHQJ.s page 197 + + +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5147 .loc 1 2881 3 view .LVU1796 +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5148 .loc 1 2886 1 is_stmt 0 view .LVU1797 + 5149 0000 7047 bx lr + 5150 .cfi_endproc + 5151 .LFE150: + 5153 .section .text.HAL_SPI_TxRxCpltCallback,"ax",%progbits + 5154 .align 1 + 5155 .weak HAL_SPI_TxRxCpltCallback + 5156 .syntax unified + 5157 .thumb + 5158 .thumb_func + 5160 HAL_SPI_TxRxCpltCallback: + 5161 .LVL324: + 5162 .LFB151: +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5163 .loc 1 2895 1 is_stmt 1 view -0 + 5164 .cfi_startproc + 5165 @ args = 0, pretend = 0, frame = 0 + 5166 @ frame_needed = 0, uses_anonymous_args = 0 + 5167 @ link register save eliminated. +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5168 .loc 1 2897 3 view .LVU1799 +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5169 .loc 1 2902 1 is_stmt 0 view .LVU1800 + 5170 0000 7047 bx lr + 5171 .cfi_endproc + 5172 .LFE151: + 5174 .section .text.HAL_SPI_TxHalfCpltCallback,"ax",%progbits + 5175 .align 1 + 5176 .weak HAL_SPI_TxHalfCpltCallback + 5177 .syntax unified + 5178 .thumb + 5179 .thumb_func + 5181 HAL_SPI_TxHalfCpltCallback: + 5182 .LVL325: + 5183 .LFB152: +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5184 .loc 1 2911 1 is_stmt 1 view -0 + 5185 .cfi_startproc + 5186 @ args = 0, pretend = 0, frame = 0 + 5187 @ frame_needed = 0, uses_anonymous_args = 0 + 5188 @ link register save eliminated. +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5189 .loc 1 2913 3 view .LVU1802 +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5190 .loc 1 2918 1 is_stmt 0 view .LVU1803 + 5191 0000 7047 bx lr + 5192 .cfi_endproc + 5193 .LFE152: + 5195 .section .text.SPI_DMAHalfTransmitCplt,"ax",%progbits + 5196 .align 1 + 5197 .syntax unified + 5198 .thumb + 5199 .thumb_func + 5201 SPI_DMAHalfTransmitCplt: + ARM GAS /tmp/ccZ0BHQJ.s page 198 + + + 5202 .LVL326: + 5203 .LFB162: +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5204 .loc 1 3323 1 is_stmt 1 view -0 + 5205 .cfi_startproc + 5206 @ args = 0, pretend = 0, frame = 0 + 5207 @ frame_needed = 0, uses_anonymous_args = 0 +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5208 .loc 1 3323 1 is_stmt 0 view .LVU1805 + 5209 0000 08B5 push {r3, lr} + 5210 .cfi_def_cfa_offset 8 + 5211 .cfi_offset 3, -8 + 5212 .cfi_offset 14, -4 +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5213 .loc 1 3324 3 is_stmt 1 view .LVU1806 + 5214 .LVL327: +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5215 .loc 1 3330 3 view .LVU1807 + 5216 0002 406A ldr r0, [r0, #36] + 5217 .LVL328: +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5218 .loc 1 3330 3 is_stmt 0 view .LVU1808 + 5219 0004 FFF7FEFF bl HAL_SPI_TxHalfCpltCallback + 5220 .LVL329: +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5221 .loc 1 3332 1 view .LVU1809 + 5222 0008 08BD pop {r3, pc} + 5223 .cfi_endproc + 5224 .LFE162: + 5226 .section .text.HAL_SPI_RxHalfCpltCallback,"ax",%progbits + 5227 .align 1 + 5228 .weak HAL_SPI_RxHalfCpltCallback + 5229 .syntax unified + 5230 .thumb + 5231 .thumb_func + 5233 HAL_SPI_RxHalfCpltCallback: + 5234 .LVL330: + 5235 .LFB153: +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5236 .loc 1 2927 1 is_stmt 1 view -0 + 5237 .cfi_startproc + 5238 @ args = 0, pretend = 0, frame = 0 + 5239 @ frame_needed = 0, uses_anonymous_args = 0 + 5240 @ link register save eliminated. +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5241 .loc 1 2929 3 view .LVU1811 +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5242 .loc 1 2934 1 is_stmt 0 view .LVU1812 + 5243 0000 7047 bx lr + 5244 .cfi_endproc + 5245 .LFE153: + 5247 .section .text.SPI_DMAHalfReceiveCplt,"ax",%progbits + 5248 .align 1 + 5249 .syntax unified + 5250 .thumb + 5251 .thumb_func + 5253 SPI_DMAHalfReceiveCplt: + ARM GAS /tmp/ccZ0BHQJ.s page 199 + + + 5254 .LVL331: + 5255 .LFB163: +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5256 .loc 1 3341 1 is_stmt 1 view -0 + 5257 .cfi_startproc + 5258 @ args = 0, pretend = 0, frame = 0 + 5259 @ frame_needed = 0, uses_anonymous_args = 0 +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5260 .loc 1 3341 1 is_stmt 0 view .LVU1814 + 5261 0000 08B5 push {r3, lr} + 5262 .cfi_def_cfa_offset 8 + 5263 .cfi_offset 3, -8 + 5264 .cfi_offset 14, -4 +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5265 .loc 1 3342 3 is_stmt 1 view .LVU1815 + 5266 .LVL332: +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5267 .loc 1 3348 3 view .LVU1816 + 5268 0002 406A ldr r0, [r0, #36] + 5269 .LVL333: +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5270 .loc 1 3348 3 is_stmt 0 view .LVU1817 + 5271 0004 FFF7FEFF bl HAL_SPI_RxHalfCpltCallback + 5272 .LVL334: +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5273 .loc 1 3350 1 view .LVU1818 + 5274 0008 08BD pop {r3, pc} + 5275 .cfi_endproc + 5276 .LFE163: + 5278 .section .text.HAL_SPI_TxRxHalfCpltCallback,"ax",%progbits + 5279 .align 1 + 5280 .weak HAL_SPI_TxRxHalfCpltCallback + 5281 .syntax unified + 5282 .thumb + 5283 .thumb_func + 5285 HAL_SPI_TxRxHalfCpltCallback: + 5286 .LVL335: + 5287 .LFB154: +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5288 .loc 1 2943 1 is_stmt 1 view -0 + 5289 .cfi_startproc + 5290 @ args = 0, pretend = 0, frame = 0 + 5291 @ frame_needed = 0, uses_anonymous_args = 0 + 5292 @ link register save eliminated. +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5293 .loc 1 2945 3 view .LVU1820 +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5294 .loc 1 2950 1 is_stmt 0 view .LVU1821 + 5295 0000 7047 bx lr + 5296 .cfi_endproc + 5297 .LFE154: + 5299 .section .text.SPI_DMAHalfTransmitReceiveCplt,"ax",%progbits + 5300 .align 1 + 5301 .syntax unified + 5302 .thumb + 5303 .thumb_func + 5305 SPI_DMAHalfTransmitReceiveCplt: + ARM GAS /tmp/ccZ0BHQJ.s page 200 + + + 5306 .LVL336: + 5307 .LFB164: +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5308 .loc 1 3359 1 is_stmt 1 view -0 + 5309 .cfi_startproc + 5310 @ args = 0, pretend = 0, frame = 0 + 5311 @ frame_needed = 0, uses_anonymous_args = 0 +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5312 .loc 1 3359 1 is_stmt 0 view .LVU1823 + 5313 0000 08B5 push {r3, lr} + 5314 .cfi_def_cfa_offset 8 + 5315 .cfi_offset 3, -8 + 5316 .cfi_offset 14, -4 +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5317 .loc 1 3360 3 is_stmt 1 view .LVU1824 + 5318 .LVL337: +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5319 .loc 1 3366 3 view .LVU1825 + 5320 0002 406A ldr r0, [r0, #36] + 5321 .LVL338: +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5322 .loc 1 3366 3 is_stmt 0 view .LVU1826 + 5323 0004 FFF7FEFF bl HAL_SPI_TxRxHalfCpltCallback + 5324 .LVL339: +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5325 .loc 1 3368 1 view .LVU1827 + 5326 0008 08BD pop {r3, pc} + 5327 .cfi_endproc + 5328 .LFE164: + 5330 .section .text.HAL_SPI_ErrorCallback,"ax",%progbits + 5331 .align 1 + 5332 .weak HAL_SPI_ErrorCallback + 5333 .syntax unified + 5334 .thumb + 5335 .thumb_func + 5337 HAL_SPI_ErrorCallback: + 5338 .LVL340: + 5339 .LFB155: +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5340 .loc 1 2959 1 is_stmt 1 view -0 + 5341 .cfi_startproc + 5342 @ args = 0, pretend = 0, frame = 0 + 5343 @ frame_needed = 0, uses_anonymous_args = 0 + 5344 @ link register save eliminated. +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5345 .loc 1 2961 3 view .LVU1829 +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5346 .loc 1 2969 1 is_stmt 0 view .LVU1830 + 5347 0000 7047 bx lr + 5348 .cfi_endproc + 5349 .LFE155: + 5351 .section .text.SPI_CloseTx_ISR,"ax",%progbits + 5352 .align 1 + 5353 .syntax unified + 5354 .thumb + 5355 .thumb_func + 5357 SPI_CloseTx_ISR: + ARM GAS /tmp/ccZ0BHQJ.s page 201 + + + 5358 .LVL341: + 5359 .LFB183: +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5360 .loc 1 4301 1 is_stmt 1 view -0 + 5361 .cfi_startproc + 5362 @ args = 0, pretend = 0, frame = 8 + 5363 @ frame_needed = 0, uses_anonymous_args = 0 +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5364 .loc 1 4301 1 is_stmt 0 view .LVU1832 + 5365 0000 10B5 push {r4, lr} + 5366 .cfi_def_cfa_offset 8 + 5367 .cfi_offset 4, -8 + 5368 .cfi_offset 14, -4 + 5369 0002 82B0 sub sp, sp, #8 + 5370 .cfi_def_cfa_offset 16 + 5371 0004 0446 mov r4, r0 +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5372 .loc 1 4302 3 is_stmt 1 view .LVU1833 +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5373 .loc 1 4305 3 view .LVU1834 +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5374 .loc 1 4305 15 is_stmt 0 view .LVU1835 + 5375 0006 FFF7FEFF bl HAL_GetTick + 5376 .LVL342: +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5377 .loc 1 4305 15 view .LVU1836 + 5378 000a 0246 mov r2, r0 + 5379 .LVL343: +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5380 .loc 1 4308 3 is_stmt 1 view .LVU1837 + 5381 000c 2168 ldr r1, [r4] + 5382 000e 4B68 ldr r3, [r1, #4] + 5383 0010 23F0A003 bic r3, r3, #160 + 5384 0014 4B60 str r3, [r1, #4] +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5385 .loc 1 4311 3 view .LVU1838 +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5386 .loc 1 4311 7 is_stmt 0 view .LVU1839 + 5387 0016 6421 movs r1, #100 + 5388 0018 2046 mov r0, r4 + 5389 .LVL344: +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5390 .loc 1 4311 7 view .LVU1840 + 5391 001a FFF7FEFF bl SPI_EndRxTxTransaction + 5392 .LVL345: +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5393 .loc 1 4311 6 discriminator 1 view .LVU1841 + 5394 001e 18B1 cbz r0, .L370 +4313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5395 .loc 1 4313 5 is_stmt 1 view .LVU1842 + 5396 0020 236E ldr r3, [r4, #96] + 5397 0022 43F02003 orr r3, r3, #32 + 5398 0026 2366 str r3, [r4, #96] + 5399 .L370: +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5400 .loc 1 4317 3 view .LVU1843 +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 202 + + + 5401 .loc 1 4317 17 is_stmt 0 view .LVU1844 + 5402 0028 A368 ldr r3, [r4, #8] +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5403 .loc 1 4317 6 view .LVU1845 + 5404 002a 33B9 cbnz r3, .L371 +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5405 .loc 1 4319 5 is_stmt 1 view .LVU1846 + 5406 .LBB5: +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5407 .loc 1 4319 5 view .LVU1847 + 5408 002c 0193 str r3, [sp, #4] +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5409 .loc 1 4319 5 view .LVU1848 + 5410 002e 2368 ldr r3, [r4] + 5411 0030 DA68 ldr r2, [r3, #12] + 5412 0032 0192 str r2, [sp, #4] +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5413 .loc 1 4319 5 view .LVU1849 + 5414 0034 9B68 ldr r3, [r3, #8] + 5415 0036 0193 str r3, [sp, #4] +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5416 .loc 1 4319 5 view .LVU1850 + 5417 0038 019B ldr r3, [sp, #4] + 5418 .L371: + 5419 .LBE5: +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5420 .loc 1 4319 5 discriminator 1 view .LVU1851 +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 5421 .loc 1 4322 3 view .LVU1852 +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 5422 .loc 1 4322 15 is_stmt 0 view .LVU1853 + 5423 003a 0123 movs r3, #1 + 5424 003c 84F85D30 strb r3, [r4, #93] +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5425 .loc 1 4323 3 is_stmt 1 view .LVU1854 +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5426 .loc 1 4323 11 is_stmt 0 view .LVU1855 + 5427 0040 236E ldr r3, [r4, #96] +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5428 .loc 1 4323 6 view .LVU1856 + 5429 0042 23B1 cbz r3, .L372 +4329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5430 .loc 1 4329 5 is_stmt 1 view .LVU1857 + 5431 0044 2046 mov r0, r4 + 5432 0046 FFF7FEFF bl HAL_SPI_ErrorCallback + 5433 .LVL346: + 5434 .L369: +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5435 .loc 1 4341 1 is_stmt 0 view .LVU1858 + 5436 004a 02B0 add sp, sp, #8 + 5437 .cfi_remember_state + 5438 .cfi_def_cfa_offset 8 + 5439 @ sp needed + 5440 004c 10BD pop {r4, pc} + 5441 .LVL347: + 5442 .L372: + 5443 .cfi_restore_state + ARM GAS /tmp/ccZ0BHQJ.s page 203 + + +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5444 .loc 1 4338 5 is_stmt 1 view .LVU1859 + 5445 004e 2046 mov r0, r4 + 5446 0050 FFF7FEFF bl HAL_SPI_TxCpltCallback + 5447 .LVL348: +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5448 .loc 1 4341 1 is_stmt 0 view .LVU1860 + 5449 0054 F9E7 b .L369 + 5450 .cfi_endproc + 5451 .LFE183: + 5453 .section .text.SPI_TxISR_8BIT,"ax",%progbits + 5454 .align 1 + 5455 .syntax unified + 5456 .thumb + 5457 .thumb_func + 5459 SPI_TxISR_8BIT: + 5460 .LVL349: + 5461 .LFB175: +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + 5462 .loc 1 3895 1 is_stmt 1 view -0 + 5463 .cfi_startproc + 5464 @ args = 0, pretend = 0, frame = 0 + 5465 @ frame_needed = 0, uses_anonymous_args = 0 +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + 5466 .loc 1 3895 1 is_stmt 0 view .LVU1862 + 5467 0000 08B5 push {r3, lr} + 5468 .cfi_def_cfa_offset 8 + 5469 .cfi_offset 3, -8 + 5470 .cfi_offset 14, -4 +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5471 .loc 1 3896 3 is_stmt 1 view .LVU1863 +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5472 .loc 1 3896 48 is_stmt 0 view .LVU1864 + 5473 0002 826B ldr r2, [r0, #56] +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5474 .loc 1 3896 25 view .LVU1865 + 5475 0004 0368 ldr r3, [r0] +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5476 .loc 1 3896 43 view .LVU1866 + 5477 0006 1278 ldrb r2, [r2] @ zero_extendqisi2 +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5478 .loc 1 3896 40 view .LVU1867 + 5479 0008 1A73 strb r2, [r3, #12] +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5480 .loc 1 3897 3 is_stmt 1 view .LVU1868 +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5481 .loc 1 3897 7 is_stmt 0 view .LVU1869 + 5482 000a 836B ldr r3, [r0, #56] +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5483 .loc 1 3897 19 view .LVU1870 + 5484 000c 0133 adds r3, r3, #1 + 5485 000e 8363 str r3, [r0, #56] +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5486 .loc 1 3898 3 is_stmt 1 view .LVU1871 +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5487 .loc 1 3898 7 is_stmt 0 view .LVU1872 + 5488 0010 C38F ldrh r3, [r0, #62] + ARM GAS /tmp/ccZ0BHQJ.s page 204 + + + 5489 0012 9BB2 uxth r3, r3 +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5490 .loc 1 3898 20 view .LVU1873 + 5491 0014 013B subs r3, r3, #1 + 5492 0016 9BB2 uxth r3, r3 + 5493 0018 C387 strh r3, [r0, #62] @ movhi +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5494 .loc 1 3900 3 is_stmt 1 view .LVU1874 +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5495 .loc 1 3900 11 is_stmt 0 view .LVU1875 + 5496 001a C38F ldrh r3, [r0, #62] + 5497 001c 9BB2 uxth r3, r3 +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5498 .loc 1 3900 6 view .LVU1876 + 5499 001e 03B1 cbz r3, .L378 + 5500 .LVL350: + 5501 .L375: +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5502 .loc 1 3911 1 view .LVU1877 + 5503 0020 08BD pop {r3, pc} + 5504 .LVL351: + 5505 .L378: +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5506 .loc 1 3909 5 is_stmt 1 view .LVU1878 + 5507 0022 FFF7FEFF bl SPI_CloseTx_ISR + 5508 .LVL352: +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5509 .loc 1 3911 1 is_stmt 0 view .LVU1879 + 5510 0026 FBE7 b .L375 + 5511 .cfi_endproc + 5512 .LFE175: + 5514 .section .text.SPI_TxISR_16BIT,"ax",%progbits + 5515 .align 1 + 5516 .syntax unified + 5517 .thumb + 5518 .thumb_func + 5520 SPI_TxISR_16BIT: + 5521 .LVL353: + 5522 .LFB176: +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 5523 .loc 1 3920 1 is_stmt 1 view -0 + 5524 .cfi_startproc + 5525 @ args = 0, pretend = 0, frame = 0 + 5526 @ frame_needed = 0, uses_anonymous_args = 0 +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 5527 .loc 1 3920 1 is_stmt 0 view .LVU1881 + 5528 0000 08B5 push {r3, lr} + 5529 .cfi_def_cfa_offset 8 + 5530 .cfi_offset 3, -8 + 5531 .cfi_offset 14, -4 +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5532 .loc 1 3922 3 is_stmt 1 view .LVU1882 +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5533 .loc 1 3922 42 is_stmt 0 view .LVU1883 + 5534 0002 826B ldr r2, [r0, #56] +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5535 .loc 1 3922 7 view .LVU1884 + ARM GAS /tmp/ccZ0BHQJ.s page 205 + + + 5536 0004 0368 ldr r3, [r0] +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5537 .loc 1 3922 24 view .LVU1885 + 5538 0006 1288 ldrh r2, [r2] +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5539 .loc 1 3922 22 view .LVU1886 + 5540 0008 DA60 str r2, [r3, #12] +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5541 .loc 1 3923 3 is_stmt 1 view .LVU1887 +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5542 .loc 1 3923 7 is_stmt 0 view .LVU1888 + 5543 000a 836B ldr r3, [r0, #56] +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5544 .loc 1 3923 20 view .LVU1889 + 5545 000c 0233 adds r3, r3, #2 + 5546 000e 8363 str r3, [r0, #56] +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5547 .loc 1 3924 3 is_stmt 1 view .LVU1890 +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5548 .loc 1 3924 7 is_stmt 0 view .LVU1891 + 5549 0010 C38F ldrh r3, [r0, #62] + 5550 0012 9BB2 uxth r3, r3 +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5551 .loc 1 3924 20 view .LVU1892 + 5552 0014 013B subs r3, r3, #1 + 5553 0016 9BB2 uxth r3, r3 + 5554 0018 C387 strh r3, [r0, #62] @ movhi +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5555 .loc 1 3926 3 is_stmt 1 view .LVU1893 +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5556 .loc 1 3926 11 is_stmt 0 view .LVU1894 + 5557 001a C38F ldrh r3, [r0, #62] + 5558 001c 9BB2 uxth r3, r3 +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5559 .loc 1 3926 6 view .LVU1895 + 5560 001e 03B1 cbz r3, .L382 + 5561 .LVL354: + 5562 .L379: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5563 .loc 1 3937 1 view .LVU1896 + 5564 0020 08BD pop {r3, pc} + 5565 .LVL355: + 5566 .L382: +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5567 .loc 1 3935 5 is_stmt 1 view .LVU1897 + 5568 0022 FFF7FEFF bl SPI_CloseTx_ISR + 5569 .LVL356: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5570 .loc 1 3937 1 is_stmt 0 view .LVU1898 + 5571 0026 FBE7 b .L379 + 5572 .cfi_endproc + 5573 .LFE176: + 5575 .section .text.SPI_CloseRx_ISR,"ax",%progbits + 5576 .align 1 + 5577 .syntax unified + 5578 .thumb + 5579 .thumb_func + ARM GAS /tmp/ccZ0BHQJ.s page 206 + + + 5581 SPI_CloseRx_ISR: + 5582 .LVL357: + 5583 .LFB182: +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ + 5584 .loc 1 4244 1 is_stmt 1 view -0 + 5585 .cfi_startproc + 5586 @ args = 0, pretend = 0, frame = 0 + 5587 @ frame_needed = 0, uses_anonymous_args = 0 +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ + 5588 .loc 1 4244 1 is_stmt 0 view .LVU1900 + 5589 0000 10B5 push {r4, lr} + 5590 .cfi_def_cfa_offset 8 + 5591 .cfi_offset 4, -8 + 5592 .cfi_offset 14, -4 + 5593 0002 0446 mov r4, r0 +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5594 .loc 1 4246 3 is_stmt 1 view .LVU1901 + 5595 0004 0268 ldr r2, [r0] + 5596 0006 5368 ldr r3, [r2, #4] + 5597 0008 23F06003 bic r3, r3, #96 + 5598 000c 5360 str r3, [r2, #4] +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5599 .loc 1 4249 3 view .LVU1902 +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5600 .loc 1 4249 7 is_stmt 0 view .LVU1903 + 5601 000e FFF7FEFF bl HAL_GetTick + 5602 .LVL358: +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5603 .loc 1 4249 7 view .LVU1904 + 5604 0012 0246 mov r2, r0 +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5605 .loc 1 4249 7 discriminator 1 view .LVU1905 + 5606 0014 6421 movs r1, #100 + 5607 0016 2046 mov r0, r4 + 5608 0018 FFF7FEFF bl SPI_EndRxTransaction + 5609 .LVL359: +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5610 .loc 1 4249 6 discriminator 2 view .LVU1906 + 5611 001c 18B1 cbz r0, .L384 +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5612 .loc 1 4251 5 is_stmt 1 view .LVU1907 + 5613 001e 236E ldr r3, [r4, #96] + 5614 0020 43F02003 orr r3, r3, #32 + 5615 0024 2366 str r3, [r4, #96] + 5616 .L384: +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5617 .loc 1 4253 3 view .LVU1908 +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5618 .loc 1 4253 15 is_stmt 0 view .LVU1909 + 5619 0026 0123 movs r3, #1 + 5620 0028 84F85D30 strb r3, [r4, #93] +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5621 .loc 1 4271 5 is_stmt 1 view .LVU1910 +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5622 .loc 1 4271 13 is_stmt 0 view .LVU1911 + 5623 002c 236E ldr r3, [r4, #96] +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 207 + + + 5624 .loc 1 4271 8 view .LVU1912 + 5625 002e 1BB9 cbnz r3, .L385 +4277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5626 .loc 1 4277 7 is_stmt 1 view .LVU1913 + 5627 0030 2046 mov r0, r4 + 5628 0032 FFF7FEFF bl HAL_SPI_RxCpltCallback + 5629 .LVL360: + 5630 .L383: +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5631 .loc 1 4292 1 is_stmt 0 view .LVU1914 + 5632 0036 10BD pop {r4, pc} + 5633 .LVL361: + 5634 .L385: +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5635 .loc 1 4286 7 is_stmt 1 view .LVU1915 + 5636 0038 2046 mov r0, r4 + 5637 003a FFF7FEFF bl HAL_SPI_ErrorCallback + 5638 .LVL362: +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5639 .loc 1 4292 1 is_stmt 0 view .LVU1916 + 5640 003e FAE7 b .L383 + 5641 .cfi_endproc + 5642 .LFE182: + 5644 .section .text.SPI_RxISR_8BIT,"ax",%progbits + 5645 .align 1 + 5646 .syntax unified + 5647 .thumb + 5648 .thumb_func + 5650 SPI_RxISR_8BIT: + 5651 .LVL363: + 5652 .LFB173: +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); + 5653 .loc 1 3806 1 is_stmt 1 view -0 + 5654 .cfi_startproc + 5655 @ args = 0, pretend = 0, frame = 0 + 5656 @ frame_needed = 0, uses_anonymous_args = 0 +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); + 5657 .loc 1 3806 1 is_stmt 0 view .LVU1918 + 5658 0000 08B5 push {r3, lr} + 5659 .cfi_def_cfa_offset 8 + 5660 .cfi_offset 3, -8 + 5661 .cfi_offset 14, -4 +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5662 .loc 1 3807 3 is_stmt 1 view .LVU1919 +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5663 .loc 1 3807 46 is_stmt 0 view .LVU1920 + 5664 0002 0268 ldr r2, [r0] +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5665 .loc 1 3807 8 view .LVU1921 + 5666 0004 036C ldr r3, [r0, #64] +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5667 .loc 1 3807 24 view .LVU1922 + 5668 0006 127B ldrb r2, [r2, #12] @ zero_extendqisi2 +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5669 .loc 1 3807 21 view .LVU1923 + 5670 0008 1A70 strb r2, [r3] +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + ARM GAS /tmp/ccZ0BHQJ.s page 208 + + + 5671 .loc 1 3808 3 is_stmt 1 view .LVU1924 +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5672 .loc 1 3808 7 is_stmt 0 view .LVU1925 + 5673 000a 036C ldr r3, [r0, #64] +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5674 .loc 1 3808 19 view .LVU1926 + 5675 000c 0133 adds r3, r3, #1 + 5676 000e 0364 str r3, [r0, #64] +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5677 .loc 1 3809 3 is_stmt 1 view .LVU1927 +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5678 .loc 1 3809 7 is_stmt 0 view .LVU1928 + 5679 0010 B0F84630 ldrh r3, [r0, #70] + 5680 0014 9BB2 uxth r3, r3 +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5681 .loc 1 3809 20 view .LVU1929 + 5682 0016 013B subs r3, r3, #1 + 5683 0018 9BB2 uxth r3, r3 + 5684 001a A0F84630 strh r3, [r0, #70] @ movhi +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5685 .loc 1 3819 3 is_stmt 1 view .LVU1930 +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5686 .loc 1 3819 11 is_stmt 0 view .LVU1931 + 5687 001e B0F84630 ldrh r3, [r0, #70] + 5688 0022 9BB2 uxth r3, r3 +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5689 .loc 1 3819 6 view .LVU1932 + 5690 0024 03B1 cbz r3, .L391 + 5691 .LVL364: + 5692 .L388: +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5693 .loc 1 3830 1 view .LVU1933 + 5694 0026 08BD pop {r3, pc} + 5695 .LVL365: + 5696 .L391: +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5697 .loc 1 3828 5 is_stmt 1 view .LVU1934 + 5698 0028 FFF7FEFF bl SPI_CloseRx_ISR + 5699 .LVL366: +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5700 .loc 1 3830 1 is_stmt 0 view .LVU1935 + 5701 002c FBE7 b .L388 + 5702 .cfi_endproc + 5703 .LFE173: + 5705 .section .text.SPI_RxISR_16BIT,"ax",%progbits + 5706 .align 1 + 5707 .syntax unified + 5708 .thumb + 5709 .thumb_func + 5711 SPI_RxISR_16BIT: + 5712 .LVL367: + 5713 .LFB174: +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); + 5714 .loc 1 3862 1 is_stmt 1 view -0 + 5715 .cfi_startproc + 5716 @ args = 0, pretend = 0, frame = 0 + 5717 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccZ0BHQJ.s page 209 + + +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); + 5718 .loc 1 3862 1 is_stmt 0 view .LVU1937 + 5719 0000 08B5 push {r3, lr} + 5720 .cfi_def_cfa_offset 8 + 5721 .cfi_offset 3, -8 + 5722 .cfi_offset 14, -4 +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5723 .loc 1 3863 3 is_stmt 1 view .LVU1938 +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5724 .loc 1 3863 52 is_stmt 0 view .LVU1939 + 5725 0002 0368 ldr r3, [r0] +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5726 .loc 1 3863 62 view .LVU1940 + 5727 0004 DA68 ldr r2, [r3, #12] +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5728 .loc 1 3863 21 view .LVU1941 + 5729 0006 036C ldr r3, [r0, #64] +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5730 .loc 1 3863 35 view .LVU1942 + 5731 0008 1A80 strh r2, [r3] @ movhi +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5732 .loc 1 3864 3 is_stmt 1 view .LVU1943 +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5733 .loc 1 3864 7 is_stmt 0 view .LVU1944 + 5734 000a 036C ldr r3, [r0, #64] +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5735 .loc 1 3864 20 view .LVU1945 + 5736 000c 0233 adds r3, r3, #2 + 5737 000e 0364 str r3, [r0, #64] +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5738 .loc 1 3865 3 is_stmt 1 view .LVU1946 +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5739 .loc 1 3865 7 is_stmt 0 view .LVU1947 + 5740 0010 B0F84630 ldrh r3, [r0, #70] + 5741 0014 9BB2 uxth r3, r3 +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5742 .loc 1 3865 20 view .LVU1948 + 5743 0016 013B subs r3, r3, #1 + 5744 0018 9BB2 uxth r3, r3 + 5745 001a A0F84630 strh r3, [r0, #70] @ movhi +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5746 .loc 1 3875 3 is_stmt 1 view .LVU1949 +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5747 .loc 1 3875 11 is_stmt 0 view .LVU1950 + 5748 001e B0F84630 ldrh r3, [r0, #70] + 5749 0022 9BB2 uxth r3, r3 +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5750 .loc 1 3875 6 view .LVU1951 + 5751 0024 03B1 cbz r3, .L395 + 5752 .LVL368: + 5753 .L392: +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5754 .loc 1 3886 1 view .LVU1952 + 5755 0026 08BD pop {r3, pc} + 5756 .LVL369: + 5757 .L395: +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccZ0BHQJ.s page 210 + + + 5758 .loc 1 3884 5 is_stmt 1 view .LVU1953 + 5759 0028 FFF7FEFF bl SPI_CloseRx_ISR + 5760 .LVL370: +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5761 .loc 1 3886 1 is_stmt 0 view .LVU1954 + 5762 002c FBE7 b .L392 + 5763 .cfi_endproc + 5764 .LFE174: + 5766 .section .text.SPI_CloseRxTx_ISR,"ax",%progbits + 5767 .align 1 + 5768 .syntax unified + 5769 .thumb + 5770 .thumb_func + 5772 SPI_CloseRxTx_ISR: + 5773 .LVL371: + 5774 .LFB181: +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5775 .loc 1 4167 1 is_stmt 1 view -0 + 5776 .cfi_startproc + 5777 @ args = 0, pretend = 0, frame = 0 + 5778 @ frame_needed = 0, uses_anonymous_args = 0 +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5779 .loc 1 4167 1 is_stmt 0 view .LVU1956 + 5780 0000 10B5 push {r4, lr} + 5781 .cfi_def_cfa_offset 8 + 5782 .cfi_offset 4, -8 + 5783 .cfi_offset 14, -4 + 5784 0002 0446 mov r4, r0 +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5785 .loc 1 4168 3 is_stmt 1 view .LVU1957 +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5786 .loc 1 4171 3 view .LVU1958 +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5787 .loc 1 4171 15 is_stmt 0 view .LVU1959 + 5788 0004 FFF7FEFF bl HAL_GetTick + 5789 .LVL372: +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5790 .loc 1 4171 15 view .LVU1960 + 5791 0008 0246 mov r2, r0 + 5792 .LVL373: +4174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5793 .loc 1 4174 3 is_stmt 1 view .LVU1961 + 5794 000a 2168 ldr r1, [r4] + 5795 000c 4B68 ldr r3, [r1, #4] + 5796 000e 23F02003 bic r3, r3, #32 + 5797 0012 4B60 str r3, [r1, #4] +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5798 .loc 1 4177 3 view .LVU1962 +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5799 .loc 1 4177 7 is_stmt 0 view .LVU1963 + 5800 0014 6421 movs r1, #100 + 5801 0016 2046 mov r0, r4 + 5802 .LVL374: +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5803 .loc 1 4177 7 view .LVU1964 + 5804 0018 FFF7FEFF bl SPI_EndRxTxTransaction + 5805 .LVL375: + ARM GAS /tmp/ccZ0BHQJ.s page 211 + + +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5806 .loc 1 4177 6 discriminator 1 view .LVU1965 + 5807 001c 18B1 cbz r0, .L397 +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5808 .loc 1 4179 5 is_stmt 1 view .LVU1966 + 5809 001e 236E ldr r3, [r4, #96] + 5810 0020 43F02003 orr r3, r3, #32 + 5811 0024 2366 str r3, [r4, #96] + 5812 .L397: +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5813 .loc 1 4199 5 view .LVU1967 +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5814 .loc 1 4199 13 is_stmt 0 view .LVU1968 + 5815 0026 236E ldr r3, [r4, #96] +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5816 .loc 1 4199 8 view .LVU1969 + 5817 0028 93B9 cbnz r3, .L398 +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5818 .loc 1 4201 7 is_stmt 1 view .LVU1970 +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5819 .loc 1 4201 15 is_stmt 0 view .LVU1971 + 5820 002a 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 5821 002e DBB2 uxtb r3, r3 +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5822 .loc 1 4201 10 view .LVU1972 + 5823 0030 042B cmp r3, #4 + 5824 0032 06D0 beq .L402 +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ + 5825 .loc 1 4213 9 is_stmt 1 view .LVU1973 +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ + 5826 .loc 1 4213 21 is_stmt 0 view .LVU1974 + 5827 0034 0123 movs r3, #1 + 5828 0036 84F85D30 strb r3, [r4, #93] +4218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5829 .loc 1 4218 9 is_stmt 1 view .LVU1975 + 5830 003a 2046 mov r0, r4 + 5831 003c FFF7FEFF bl HAL_SPI_TxRxCpltCallback + 5832 .LVL376: + 5833 .L396: +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5834 .loc 1 4235 1 is_stmt 0 view .LVU1976 + 5835 0040 10BD pop {r4, pc} + 5836 .LVL377: + 5837 .L402: +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ + 5838 .loc 1 4203 9 is_stmt 1 view .LVU1977 +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ + 5839 .loc 1 4203 21 is_stmt 0 view .LVU1978 + 5840 0042 0123 movs r3, #1 + 5841 0044 84F85D30 strb r3, [r4, #93] +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5842 .loc 1 4208 9 is_stmt 1 view .LVU1979 + 5843 0048 2046 mov r0, r4 + 5844 004a FFF7FEFF bl HAL_SPI_RxCpltCallback + 5845 .LVL378: + 5846 004e F7E7 b .L396 + 5847 .L398: + ARM GAS /tmp/ccZ0BHQJ.s page 212 + + +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 5848 .loc 1 4224 7 view .LVU1980 +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 5849 .loc 1 4224 19 is_stmt 0 view .LVU1981 + 5850 0050 0123 movs r3, #1 + 5851 0052 84F85D30 strb r3, [r4, #93] +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5852 .loc 1 4229 7 is_stmt 1 view .LVU1982 + 5853 0056 2046 mov r0, r4 + 5854 0058 FFF7FEFF bl HAL_SPI_ErrorCallback + 5855 .LVL379: +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5856 .loc 1 4235 1 is_stmt 0 view .LVU1983 + 5857 005c F0E7 b .L396 + 5858 .cfi_endproc + 5859 .LFE181: + 5861 .section .text.SPI_2linesTxISR_8BIT,"ax",%progbits + 5862 .align 1 + 5863 .syntax unified + 5864 .thumb + 5865 .thumb_func + 5867 SPI_2linesTxISR_8BIT: + 5868 .LVL380: + 5869 .LFB170: +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in packing Bit mode */ + 5870 .loc 1 3638 1 is_stmt 1 view -0 + 5871 .cfi_startproc + 5872 @ args = 0, pretend = 0, frame = 0 + 5873 @ frame_needed = 0, uses_anonymous_args = 0 +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in packing Bit mode */ + 5874 .loc 1 3638 1 is_stmt 0 view .LVU1985 + 5875 0000 08B5 push {r3, lr} + 5876 .cfi_def_cfa_offset 8 + 5877 .cfi_offset 3, -8 + 5878 .cfi_offset 14, -4 +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5879 .loc 1 3640 3 is_stmt 1 view .LVU1986 +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5880 .loc 1 3640 11 is_stmt 0 view .LVU1987 + 5881 0002 C38F ldrh r3, [r0, #62] + 5882 0004 9BB2 uxth r3, r3 +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5883 .loc 1 3640 6 view .LVU1988 + 5884 0006 012B cmp r3, #1 + 5885 0008 18D9 bls .L404 +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5886 .loc 1 3642 5 is_stmt 1 view .LVU1989 +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5887 .loc 1 3642 44 is_stmt 0 view .LVU1990 + 5888 000a 826B ldr r2, [r0, #56] +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5889 .loc 1 3642 9 view .LVU1991 + 5890 000c 0368 ldr r3, [r0] +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5891 .loc 1 3642 26 view .LVU1992 + 5892 000e 1288 ldrh r2, [r2] +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + ARM GAS /tmp/ccZ0BHQJ.s page 213 + + + 5893 .loc 1 3642 24 view .LVU1993 + 5894 0010 DA60 str r2, [r3, #12] +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 5895 .loc 1 3643 5 is_stmt 1 view .LVU1994 +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 5896 .loc 1 3643 9 is_stmt 0 view .LVU1995 + 5897 0012 836B ldr r3, [r0, #56] +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 5898 .loc 1 3643 22 view .LVU1996 + 5899 0014 0233 adds r3, r3, #2 + 5900 0016 8363 str r3, [r0, #56] +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5901 .loc 1 3644 5 is_stmt 1 view .LVU1997 +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5902 .loc 1 3644 9 is_stmt 0 view .LVU1998 + 5903 0018 C38F ldrh r3, [r0, #62] + 5904 001a 9BB2 uxth r3, r3 +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5905 .loc 1 3644 23 view .LVU1999 + 5906 001c 023B subs r3, r3, #2 + 5907 001e 9BB2 uxth r3, r3 + 5908 0020 C387 strh r3, [r0, #62] @ movhi + 5909 .L405: +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5910 .loc 1 3655 3 is_stmt 1 view .LVU2000 +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5911 .loc 1 3655 11 is_stmt 0 view .LVU2001 + 5912 0022 C38F ldrh r3, [r0, #62] + 5913 0024 9BB2 uxth r3, r3 +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5914 .loc 1 3655 6 view .LVU2002 + 5915 0026 43B9 cbnz r3, .L403 +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5916 .loc 1 3669 5 is_stmt 1 view .LVU2003 + 5917 0028 0268 ldr r2, [r0] + 5918 002a 5368 ldr r3, [r2, #4] + 5919 002c 23F08003 bic r3, r3, #128 + 5920 0030 5360 str r3, [r2, #4] +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5921 .loc 1 3671 5 view .LVU2004 +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5922 .loc 1 3671 13 is_stmt 0 view .LVU2005 + 5923 0032 B0F84630 ldrh r3, [r0, #70] + 5924 0036 9BB2 uxth r3, r3 +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5925 .loc 1 3671 8 view .LVU2006 + 5926 0038 6BB1 cbz r3, .L408 + 5927 .LVL381: + 5928 .L403: +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5929 .loc 1 3676 1 view .LVU2007 + 5930 003a 08BD pop {r3, pc} + 5931 .LVL382: + 5932 .L404: +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5933 .loc 1 3649 5 is_stmt 1 view .LVU2008 +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + ARM GAS /tmp/ccZ0BHQJ.s page 214 + + + 5934 .loc 1 3649 50 is_stmt 0 view .LVU2009 + 5935 003c 826B ldr r2, [r0, #56] +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5936 .loc 1 3649 27 view .LVU2010 + 5937 003e 0368 ldr r3, [r0] +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5938 .loc 1 3649 45 view .LVU2011 + 5939 0040 1278 ldrb r2, [r2] @ zero_extendqisi2 +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5940 .loc 1 3649 42 view .LVU2012 + 5941 0042 1A73 strb r2, [r3, #12] +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5942 .loc 1 3650 5 is_stmt 1 view .LVU2013 +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5943 .loc 1 3650 9 is_stmt 0 view .LVU2014 + 5944 0044 836B ldr r3, [r0, #56] +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5945 .loc 1 3650 21 view .LVU2015 + 5946 0046 0133 adds r3, r3, #1 + 5947 0048 8363 str r3, [r0, #56] +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5948 .loc 1 3651 5 is_stmt 1 view .LVU2016 +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5949 .loc 1 3651 9 is_stmt 0 view .LVU2017 + 5950 004a C38F ldrh r3, [r0, #62] + 5951 004c 9BB2 uxth r3, r3 +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5952 .loc 1 3651 22 view .LVU2018 + 5953 004e 013B subs r3, r3, #1 + 5954 0050 9BB2 uxth r3, r3 + 5955 0052 C387 strh r3, [r0, #62] @ movhi + 5956 0054 E5E7 b .L405 + 5957 .L408: +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5958 .loc 1 3673 7 is_stmt 1 view .LVU2019 + 5959 0056 FFF7FEFF bl SPI_CloseRxTx_ISR + 5960 .LVL383: +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5961 .loc 1 3676 1 is_stmt 0 view .LVU2020 + 5962 005a EEE7 b .L403 + 5963 .cfi_endproc + 5964 .LFE170: + 5966 .section .text.SPI_2linesRxISR_8BIT,"ax",%progbits + 5967 .align 1 + 5968 .syntax unified + 5969 .thumb + 5970 .thumb_func + 5972 SPI_2linesRxISR_8BIT: + 5973 .LVL384: + 5974 .LFB169: +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in packing mode */ + 5975 .loc 1 3553 1 is_stmt 1 view -0 + 5976 .cfi_startproc + 5977 @ args = 0, pretend = 0, frame = 0 + 5978 @ frame_needed = 0, uses_anonymous_args = 0 +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in packing mode */ + 5979 .loc 1 3553 1 is_stmt 0 view .LVU2022 + ARM GAS /tmp/ccZ0BHQJ.s page 215 + + + 5980 0000 08B5 push {r3, lr} + 5981 .cfi_def_cfa_offset 8 + 5982 .cfi_offset 3, -8 + 5983 .cfi_offset 14, -4 +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5984 .loc 1 3555 3 is_stmt 1 view .LVU2023 +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5985 .loc 1 3555 11 is_stmt 0 view .LVU2024 + 5986 0002 B0F84630 ldrh r3, [r0, #70] + 5987 0006 9BB2 uxth r3, r3 +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5988 .loc 1 3555 6 view .LVU2025 + 5989 0008 012B cmp r3, #1 + 5990 000a 18D9 bls .L410 +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5991 .loc 1 3557 5 is_stmt 1 view .LVU2026 +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5992 .loc 1 3557 54 is_stmt 0 view .LVU2027 + 5993 000c 0368 ldr r3, [r0] +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5994 .loc 1 3557 64 view .LVU2028 + 5995 000e DA68 ldr r2, [r3, #12] +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5996 .loc 1 3557 23 view .LVU2029 + 5997 0010 036C ldr r3, [r0, #64] +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5998 .loc 1 3557 37 view .LVU2030 + 5999 0012 1A80 strh r2, [r3] @ movhi +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 6000 .loc 1 3558 5 is_stmt 1 view .LVU2031 +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 6001 .loc 1 3558 9 is_stmt 0 view .LVU2032 + 6002 0014 036C ldr r3, [r0, #64] +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 6003 .loc 1 3558 22 view .LVU2033 + 6004 0016 0233 adds r3, r3, #2 + 6005 0018 0364 str r3, [r0, #64] +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) + 6006 .loc 1 3559 5 is_stmt 1 view .LVU2034 +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) + 6007 .loc 1 3559 9 is_stmt 0 view .LVU2035 + 6008 001a B0F84630 ldrh r3, [r0, #70] + 6009 001e 9BB2 uxth r3, r3 +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) + 6010 .loc 1 3559 23 view .LVU2036 + 6011 0020 023B subs r3, r3, #2 + 6012 0022 9BB2 uxth r3, r3 + 6013 0024 A0F84630 strh r3, [r0, #70] @ movhi +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6014 .loc 1 3560 5 is_stmt 1 view .LVU2037 +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6015 .loc 1 3560 13 is_stmt 0 view .LVU2038 + 6016 0028 B0F84630 ldrh r3, [r0, #70] + 6017 002c 9BB2 uxth r3, r3 +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6018 .loc 1 3560 8 view .LVU2039 + 6019 002e 012B cmp r3, #1 + ARM GAS /tmp/ccZ0BHQJ.s page 216 + + + 6020 0030 13D1 bne .L411 +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6021 .loc 1 3563 7 is_stmt 1 view .LVU2040 + 6022 0032 0268 ldr r2, [r0] + 6023 0034 5368 ldr r3, [r2, #4] + 6024 0036 43F48053 orr r3, r3, #4096 + 6025 003a 5360 str r3, [r2, #4] + 6026 003c 0DE0 b .L411 + 6027 .L410: +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6028 .loc 1 3569 5 view .LVU2041 +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6029 .loc 1 3569 48 is_stmt 0 view .LVU2042 + 6030 003e 0268 ldr r2, [r0] +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6031 .loc 1 3569 10 view .LVU2043 + 6032 0040 036C ldr r3, [r0, #64] +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6033 .loc 1 3569 25 view .LVU2044 + 6034 0042 127B ldrb r2, [r2, #12] @ zero_extendqisi2 +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6035 .loc 1 3569 23 view .LVU2045 + 6036 0044 1A70 strb r2, [r3] +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6037 .loc 1 3570 5 is_stmt 1 view .LVU2046 +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6038 .loc 1 3570 9 is_stmt 0 view .LVU2047 + 6039 0046 036C ldr r3, [r0, #64] +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6040 .loc 1 3570 21 view .LVU2048 + 6041 0048 0133 adds r3, r3, #1 + 6042 004a 0364 str r3, [r0, #64] +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6043 .loc 1 3571 5 is_stmt 1 view .LVU2049 +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6044 .loc 1 3571 9 is_stmt 0 view .LVU2050 + 6045 004c B0F84630 ldrh r3, [r0, #70] + 6046 0050 9BB2 uxth r3, r3 +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6047 .loc 1 3571 22 view .LVU2051 + 6048 0052 013B subs r3, r3, #1 + 6049 0054 9BB2 uxth r3, r3 + 6050 0056 A0F84630 strh r3, [r0, #70] @ movhi + 6051 .L411: +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6052 .loc 1 3575 3 is_stmt 1 view .LVU2052 +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6053 .loc 1 3575 11 is_stmt 0 view .LVU2053 + 6054 005a B0F84630 ldrh r3, [r0, #70] + 6055 005e 9BB2 uxth r3, r3 +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6056 .loc 1 3575 6 view .LVU2054 + 6057 0060 3BB9 cbnz r3, .L409 +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6058 .loc 1 3587 5 is_stmt 1 view .LVU2055 + 6059 0062 0268 ldr r2, [r0] + 6060 0064 5368 ldr r3, [r2, #4] + ARM GAS /tmp/ccZ0BHQJ.s page 217 + + + 6061 0066 23F06003 bic r3, r3, #96 + 6062 006a 5360 str r3, [r2, #4] +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6063 .loc 1 3589 5 view .LVU2056 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6064 .loc 1 3589 13 is_stmt 0 view .LVU2057 + 6065 006c C38F ldrh r3, [r0, #62] + 6066 006e 9BB2 uxth r3, r3 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6067 .loc 1 3589 8 view .LVU2058 + 6068 0070 03B1 cbz r3, .L414 + 6069 .LVL385: + 6070 .L409: +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6071 .loc 1 3594 1 view .LVU2059 + 6072 0072 08BD pop {r3, pc} + 6073 .LVL386: + 6074 .L414: +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6075 .loc 1 3591 7 is_stmt 1 view .LVU2060 + 6076 0074 FFF7FEFF bl SPI_CloseRxTx_ISR + 6077 .LVL387: +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6078 .loc 1 3594 1 is_stmt 0 view .LVU2061 + 6079 0078 FBE7 b .L409 + 6080 .cfi_endproc + 6081 .LFE169: + 6083 .section .text.SPI_2linesTxISR_16BIT,"ax",%progbits + 6084 .align 1 + 6085 .syntax unified + 6086 .thumb + 6087 .thumb_func + 6089 SPI_2linesTxISR_16BIT: + 6090 .LVL388: + 6091 .LFB172: +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 6092 .loc 1 3741 1 is_stmt 1 view -0 + 6093 .cfi_startproc + 6094 @ args = 0, pretend = 0, frame = 0 + 6095 @ frame_needed = 0, uses_anonymous_args = 0 +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 6096 .loc 1 3741 1 is_stmt 0 view .LVU2063 + 6097 0000 08B5 push {r3, lr} + 6098 .cfi_def_cfa_offset 8 + 6099 .cfi_offset 3, -8 + 6100 .cfi_offset 14, -4 +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6101 .loc 1 3743 3 is_stmt 1 view .LVU2064 +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6102 .loc 1 3743 42 is_stmt 0 view .LVU2065 + 6103 0002 826B ldr r2, [r0, #56] +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6104 .loc 1 3743 7 view .LVU2066 + 6105 0004 0368 ldr r3, [r0] +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6106 .loc 1 3743 24 view .LVU2067 + 6107 0006 1288 ldrh r2, [r2] + ARM GAS /tmp/ccZ0BHQJ.s page 218 + + +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6108 .loc 1 3743 22 view .LVU2068 + 6109 0008 DA60 str r2, [r3, #12] +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 6110 .loc 1 3744 3 is_stmt 1 view .LVU2069 +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 6111 .loc 1 3744 7 is_stmt 0 view .LVU2070 + 6112 000a 836B ldr r3, [r0, #56] +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 6113 .loc 1 3744 20 view .LVU2071 + 6114 000c 0233 adds r3, r3, #2 + 6115 000e 8363 str r3, [r0, #56] +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6116 .loc 1 3745 3 is_stmt 1 view .LVU2072 +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6117 .loc 1 3745 7 is_stmt 0 view .LVU2073 + 6118 0010 C38F ldrh r3, [r0, #62] + 6119 0012 9BB2 uxth r3, r3 +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6120 .loc 1 3745 20 view .LVU2074 + 6121 0014 013B subs r3, r3, #1 + 6122 0016 9BB2 uxth r3, r3 + 6123 0018 C387 strh r3, [r0, #62] @ movhi +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6124 .loc 1 3748 3 is_stmt 1 view .LVU2075 +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6125 .loc 1 3748 11 is_stmt 0 view .LVU2076 + 6126 001a C38F ldrh r3, [r0, #62] + 6127 001c 9BB2 uxth r3, r3 +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6128 .loc 1 3748 6 view .LVU2077 + 6129 001e 43B9 cbnz r3, .L415 +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6130 .loc 1 3762 5 is_stmt 1 view .LVU2078 + 6131 0020 0268 ldr r2, [r0] + 6132 0022 5368 ldr r3, [r2, #4] + 6133 0024 23F08003 bic r3, r3, #128 + 6134 0028 5360 str r3, [r2, #4] +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6135 .loc 1 3764 5 view .LVU2079 +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6136 .loc 1 3764 13 is_stmt 0 view .LVU2080 + 6137 002a B0F84630 ldrh r3, [r0, #70] + 6138 002e 9BB2 uxth r3, r3 +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6139 .loc 1 3764 8 view .LVU2081 + 6140 0030 03B1 cbz r3, .L418 + 6141 .LVL389: + 6142 .L415: +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6143 .loc 1 3769 1 view .LVU2082 + 6144 0032 08BD pop {r3, pc} + 6145 .LVL390: + 6146 .L418: +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6147 .loc 1 3766 7 is_stmt 1 view .LVU2083 + 6148 0034 FFF7FEFF bl SPI_CloseRxTx_ISR + ARM GAS /tmp/ccZ0BHQJ.s page 219 + + + 6149 .LVL391: +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6150 .loc 1 3769 1 is_stmt 0 view .LVU2084 + 6151 0038 FBE7 b .L415 + 6152 .cfi_endproc + 6153 .LFE172: + 6155 .section .text.SPI_2linesRxISR_16BIT,"ax",%progbits + 6156 .align 1 + 6157 .syntax unified + 6158 .thumb + 6159 .thumb_func + 6161 SPI_2linesRxISR_16BIT: + 6162 .LVL392: + 6163 .LFB171: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 16 Bit mode */ + 6164 .loc 1 3685 1 is_stmt 1 view -0 + 6165 .cfi_startproc + 6166 @ args = 0, pretend = 0, frame = 0 + 6167 @ frame_needed = 0, uses_anonymous_args = 0 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 16 Bit mode */ + 6168 .loc 1 3685 1 is_stmt 0 view .LVU2086 + 6169 0000 08B5 push {r3, lr} + 6170 .cfi_def_cfa_offset 8 + 6171 .cfi_offset 3, -8 + 6172 .cfi_offset 14, -4 +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6173 .loc 1 3687 3 is_stmt 1 view .LVU2087 +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6174 .loc 1 3687 52 is_stmt 0 view .LVU2088 + 6175 0002 0368 ldr r3, [r0] +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6176 .loc 1 3687 62 view .LVU2089 + 6177 0004 DA68 ldr r2, [r3, #12] +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6178 .loc 1 3687 21 view .LVU2090 + 6179 0006 036C ldr r3, [r0, #64] +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6180 .loc 1 3687 35 view .LVU2091 + 6181 0008 1A80 strh r2, [r3] @ movhi +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6182 .loc 1 3688 3 is_stmt 1 view .LVU2092 +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6183 .loc 1 3688 7 is_stmt 0 view .LVU2093 + 6184 000a 036C ldr r3, [r0, #64] +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6185 .loc 1 3688 20 view .LVU2094 + 6186 000c 0233 adds r3, r3, #2 + 6187 000e 0364 str r3, [r0, #64] +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6188 .loc 1 3689 3 is_stmt 1 view .LVU2095 +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6189 .loc 1 3689 7 is_stmt 0 view .LVU2096 + 6190 0010 B0F84630 ldrh r3, [r0, #70] + 6191 0014 9BB2 uxth r3, r3 +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6192 .loc 1 3689 20 view .LVU2097 + 6193 0016 013B subs r3, r3, #1 + ARM GAS /tmp/ccZ0BHQJ.s page 220 + + + 6194 0018 9BB2 uxth r3, r3 + 6195 001a A0F84630 strh r3, [r0, #70] @ movhi +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6196 .loc 1 3691 3 is_stmt 1 view .LVU2098 +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6197 .loc 1 3691 11 is_stmt 0 view .LVU2099 + 6198 001e B0F84630 ldrh r3, [r0, #70] + 6199 0022 9BB2 uxth r3, r3 +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6200 .loc 1 3691 6 view .LVU2100 + 6201 0024 3BB9 cbnz r3, .L419 +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6202 .loc 1 3702 5 is_stmt 1 view .LVU2101 + 6203 0026 0268 ldr r2, [r0] + 6204 0028 5368 ldr r3, [r2, #4] + 6205 002a 23F04003 bic r3, r3, #64 + 6206 002e 5360 str r3, [r2, #4] +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6207 .loc 1 3704 5 view .LVU2102 +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6208 .loc 1 3704 13 is_stmt 0 view .LVU2103 + 6209 0030 C38F ldrh r3, [r0, #62] + 6210 0032 9BB2 uxth r3, r3 +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6211 .loc 1 3704 8 view .LVU2104 + 6212 0034 03B1 cbz r3, .L422 + 6213 .LVL393: + 6214 .L419: +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6215 .loc 1 3709 1 view .LVU2105 + 6216 0036 08BD pop {r3, pc} + 6217 .LVL394: + 6218 .L422: +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6219 .loc 1 3706 7 is_stmt 1 view .LVU2106 + 6220 0038 FFF7FEFF bl SPI_CloseRxTx_ISR + 6221 .LVL395: +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6222 .loc 1 3709 1 is_stmt 0 view .LVU2107 + 6223 003c FBE7 b .L419 + 6224 .cfi_endproc + 6225 .LFE171: + 6227 .section .text.SPI_DMAError,"ax",%progbits + 6228 .align 1 + 6229 .syntax unified + 6230 .thumb + 6231 .thumb_func + 6233 SPI_DMAError: + 6234 .LVL396: + 6235 .LFB165: +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6236 .loc 1 3377 1 is_stmt 1 view -0 + 6237 .cfi_startproc + 6238 @ args = 0, pretend = 0, frame = 0 + 6239 @ frame_needed = 0, uses_anonymous_args = 0 +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6240 .loc 1 3377 1 is_stmt 0 view .LVU2109 + ARM GAS /tmp/ccZ0BHQJ.s page 221 + + + 6241 0000 08B5 push {r3, lr} + 6242 .cfi_def_cfa_offset 8 + 6243 .cfi_offset 3, -8 + 6244 .cfi_offset 14, -4 +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6245 .loc 1 3378 3 is_stmt 1 view .LVU2110 +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6246 .loc 1 3378 22 is_stmt 0 view .LVU2111 + 6247 0002 406A ldr r0, [r0, #36] + 6248 .LVL397: +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6249 .loc 1 3381 3 is_stmt 1 view .LVU2112 + 6250 0004 0268 ldr r2, [r0] + 6251 0006 5368 ldr r3, [r2, #4] + 6252 0008 23F00303 bic r3, r3, #3 + 6253 000c 5360 str r3, [r2, #4] +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6254 .loc 1 3383 3 view .LVU2113 + 6255 000e 036E ldr r3, [r0, #96] + 6256 0010 43F01003 orr r3, r3, #16 + 6257 0014 0366 str r3, [r0, #96] +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 6258 .loc 1 3384 3 view .LVU2114 +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 6259 .loc 1 3384 15 is_stmt 0 view .LVU2115 + 6260 0016 0123 movs r3, #1 + 6261 0018 80F85D30 strb r3, [r0, #93] +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6262 .loc 1 3389 3 is_stmt 1 view .LVU2116 + 6263 001c FFF7FEFF bl HAL_SPI_ErrorCallback + 6264 .LVL398: +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6265 .loc 1 3391 1 is_stmt 0 view .LVU2117 + 6266 0020 08BD pop {r3, pc} + 6267 .cfi_endproc + 6268 .LFE165: + 6270 .section .text.SPI_DMATransmitCplt,"ax",%progbits + 6271 .align 1 + 6272 .syntax unified + 6273 .thumb + 6274 .thumb_func + 6276 SPI_DMATransmitCplt: + 6277 .LVL399: + 6278 .LFB159: +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6279 .loc 1 3049 1 is_stmt 1 view -0 + 6280 .cfi_startproc + 6281 @ args = 0, pretend = 0, frame = 8 + 6282 @ frame_needed = 0, uses_anonymous_args = 0 +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6283 .loc 1 3049 1 is_stmt 0 view .LVU2119 + 6284 0000 30B5 push {r4, r5, lr} + 6285 .cfi_def_cfa_offset 12 + 6286 .cfi_offset 4, -12 + 6287 .cfi_offset 5, -8 + 6288 .cfi_offset 14, -4 + 6289 0002 83B0 sub sp, sp, #12 + ARM GAS /tmp/ccZ0BHQJ.s page 222 + + + 6290 .cfi_def_cfa_offset 24 + 6291 0004 0546 mov r5, r0 +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6292 .loc 1 3050 3 is_stmt 1 view .LVU2120 +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6293 .loc 1 3050 22 is_stmt 0 view .LVU2121 + 6294 0006 446A ldr r4, [r0, #36] + 6295 .LVL400: +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6296 .loc 1 3051 3 is_stmt 1 view .LVU2122 +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6297 .loc 1 3054 3 view .LVU2123 +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6298 .loc 1 3054 15 is_stmt 0 view .LVU2124 + 6299 0008 FFF7FEFF bl HAL_GetTick + 6300 .LVL401: +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6301 .loc 1 3057 3 is_stmt 1 view .LVU2125 +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6302 .loc 1 3057 12 is_stmt 0 view .LVU2126 + 6303 000c 2B68 ldr r3, [r5] +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6304 .loc 1 3057 22 view .LVU2127 + 6305 000e 1B68 ldr r3, [r3] +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6306 .loc 1 3057 6 view .LVU2128 + 6307 0010 13F0200F tst r3, #32 + 6308 0014 23D1 bne .L426 + 6309 0016 0246 mov r2, r0 +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6310 .loc 1 3060 5 is_stmt 1 view .LVU2129 + 6311 0018 2168 ldr r1, [r4] + 6312 001a 4B68 ldr r3, [r1, #4] + 6313 001c 23F02003 bic r3, r3, #32 + 6314 0020 4B60 str r3, [r1, #4] +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6315 .loc 1 3063 5 view .LVU2130 + 6316 0022 2168 ldr r1, [r4] + 6317 0024 4B68 ldr r3, [r1, #4] + 6318 0026 23F00203 bic r3, r3, #2 + 6319 002a 4B60 str r3, [r1, #4] +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6320 .loc 1 3066 5 view .LVU2131 +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6321 .loc 1 3066 9 is_stmt 0 view .LVU2132 + 6322 002c 6421 movs r1, #100 + 6323 002e 2046 mov r0, r4 + 6324 .LVL402: +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6325 .loc 1 3066 9 view .LVU2133 + 6326 0030 FFF7FEFF bl SPI_EndRxTxTransaction + 6327 .LVL403: +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6328 .loc 1 3066 8 discriminator 1 view .LVU2134 + 6329 0034 18B1 cbz r0, .L427 +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6330 .loc 1 3068 7 is_stmt 1 view .LVU2135 + ARM GAS /tmp/ccZ0BHQJ.s page 223 + + + 6331 0036 236E ldr r3, [r4, #96] + 6332 0038 43F02003 orr r3, r3, #32 + 6333 003c 2366 str r3, [r4, #96] + 6334 .L427: +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6335 .loc 1 3072 5 view .LVU2136 +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6336 .loc 1 3072 19 is_stmt 0 view .LVU2137 + 6337 003e A368 ldr r3, [r4, #8] +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6338 .loc 1 3072 8 view .LVU2138 + 6339 0040 33B9 cbnz r3, .L428 +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6340 .loc 1 3074 7 is_stmt 1 view .LVU2139 + 6341 .LBB6: +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6342 .loc 1 3074 7 view .LVU2140 + 6343 0042 0193 str r3, [sp, #4] +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6344 .loc 1 3074 7 view .LVU2141 + 6345 0044 2368 ldr r3, [r4] + 6346 0046 DA68 ldr r2, [r3, #12] + 6347 0048 0192 str r2, [sp, #4] +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6348 .loc 1 3074 7 view .LVU2142 + 6349 004a 9B68 ldr r3, [r3, #8] + 6350 004c 0193 str r3, [sp, #4] +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6351 .loc 1 3074 7 view .LVU2143 + 6352 004e 019B ldr r3, [sp, #4] + 6353 .L428: + 6354 .LBE6: +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6355 .loc 1 3074 7 discriminator 1 view .LVU2144 +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6356 .loc 1 3077 5 view .LVU2145 +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6357 .loc 1 3077 23 is_stmt 0 view .LVU2146 + 6358 0050 0023 movs r3, #0 + 6359 0052 E387 strh r3, [r4, #62] @ movhi +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6360 .loc 1 3078 5 is_stmt 1 view .LVU2147 +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6361 .loc 1 3078 17 is_stmt 0 view .LVU2148 + 6362 0054 0123 movs r3, #1 + 6363 0056 84F85D30 strb r3, [r4, #93] +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6364 .loc 1 3080 5 is_stmt 1 view .LVU2149 +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6365 .loc 1 3080 13 is_stmt 0 view .LVU2150 + 6366 005a 236E ldr r3, [r4, #96] +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6367 .loc 1 3080 8 view .LVU2151 + 6368 005c 23B9 cbnz r3, .L431 + 6369 .L426: +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6370 .loc 1 3095 3 is_stmt 1 view .LVU2152 + ARM GAS /tmp/ccZ0BHQJ.s page 224 + + + 6371 005e 2046 mov r0, r4 + 6372 0060 FFF7FEFF bl HAL_SPI_TxCpltCallback + 6373 .LVL404: + 6374 .L425: +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6375 .loc 1 3097 1 is_stmt 0 view .LVU2153 + 6376 0064 03B0 add sp, sp, #12 + 6377 .cfi_remember_state + 6378 .cfi_def_cfa_offset 12 + 6379 @ sp needed + 6380 0066 30BD pop {r4, r5, pc} + 6381 .LVL405: + 6382 .L431: + 6383 .cfi_restore_state +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6384 .loc 1 3086 7 is_stmt 1 view .LVU2154 + 6385 0068 2046 mov r0, r4 + 6386 006a FFF7FEFF bl HAL_SPI_ErrorCallback + 6387 .LVL406: +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6388 .loc 1 3088 7 view .LVU2155 + 6389 006e F9E7 b .L425 + 6390 .cfi_endproc + 6391 .LFE159: + 6393 .section .text.SPI_DMAReceiveCplt,"ax",%progbits + 6394 .align 1 + 6395 .syntax unified + 6396 .thumb + 6397 .thumb_func + 6399 SPI_DMAReceiveCplt: + 6400 .LVL407: + 6401 .LFB160: +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6402 .loc 1 3106 1 view -0 + 6403 .cfi_startproc + 6404 @ args = 0, pretend = 0, frame = 0 + 6405 @ frame_needed = 0, uses_anonymous_args = 0 +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6406 .loc 1 3106 1 is_stmt 0 view .LVU2157 + 6407 0000 38B5 push {r3, r4, r5, lr} + 6408 .cfi_def_cfa_offset 16 + 6409 .cfi_offset 3, -16 + 6410 .cfi_offset 4, -12 + 6411 .cfi_offset 5, -8 + 6412 .cfi_offset 14, -4 + 6413 0002 0546 mov r5, r0 +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6414 .loc 1 3107 3 is_stmt 1 view .LVU2158 +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6415 .loc 1 3107 22 is_stmt 0 view .LVU2159 + 6416 0004 446A ldr r4, [r0, #36] + 6417 .LVL408: +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 6418 .loc 1 3108 3 is_stmt 1 view .LVU2160 +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6419 .loc 1 3116 3 view .LVU2161 +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 225 + + + 6420 .loc 1 3116 15 is_stmt 0 view .LVU2162 + 6421 0006 FFF7FEFF bl HAL_GetTick + 6422 .LVL409: +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6423 .loc 1 3119 3 is_stmt 1 view .LVU2163 +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6424 .loc 1 3119 12 is_stmt 0 view .LVU2164 + 6425 000a 2B68 ldr r3, [r5] +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6426 .loc 1 3119 22 view .LVU2165 + 6427 000c 1B68 ldr r3, [r3] +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6428 .loc 1 3119 6 view .LVU2166 + 6429 000e 13F0200F tst r3, #32 + 6430 0012 1FD1 bne .L433 + 6431 0014 0246 mov r2, r0 +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6432 .loc 1 3122 5 is_stmt 1 view .LVU2167 + 6433 0016 2168 ldr r1, [r4] + 6434 0018 4B68 ldr r3, [r1, #4] + 6435 001a 23F02003 bic r3, r3, #32 + 6436 001e 4B60 str r3, [r1, #4] +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6437 .loc 1 3168 5 view .LVU2168 +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6438 .loc 1 3168 20 is_stmt 0 view .LVU2169 + 6439 0020 A368 ldr r3, [r4, #8] +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6440 .loc 1 3168 8 view .LVU2170 + 6441 0022 1BB9 cbnz r3, .L434 +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6442 .loc 1 3168 70 discriminator 1 view .LVU2171 + 6443 0024 6368 ldr r3, [r4, #4] +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6444 .loc 1 3168 56 discriminator 1 view .LVU2172 + 6445 0026 B3F5827F cmp r3, #260 + 6446 002a 17D0 beq .L439 + 6447 .L434: +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6448 .loc 1 3176 7 is_stmt 1 view .LVU2173 + 6449 002c 2168 ldr r1, [r4] + 6450 002e 4B68 ldr r3, [r1, #4] + 6451 0030 23F00103 bic r3, r3, #1 + 6452 0034 4B60 str r3, [r1, #4] + 6453 .L435: +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6454 .loc 1 3180 5 view .LVU2174 +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6455 .loc 1 3180 9 is_stmt 0 view .LVU2175 + 6456 0036 6421 movs r1, #100 + 6457 0038 2046 mov r0, r4 + 6458 .LVL410: +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6459 .loc 1 3180 9 view .LVU2176 + 6460 003a FFF7FEFF bl SPI_EndRxTransaction + 6461 .LVL411: +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 226 + + + 6462 .loc 1 3180 8 discriminator 1 view .LVU2177 + 6463 003e 08B1 cbz r0, .L436 +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6464 .loc 1 3182 7 is_stmt 1 view .LVU2178 +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6465 .loc 1 3182 23 is_stmt 0 view .LVU2179 + 6466 0040 2023 movs r3, #32 + 6467 0042 2366 str r3, [r4, #96] + 6468 .L436: +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6469 .loc 1 3185 5 is_stmt 1 view .LVU2180 +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6470 .loc 1 3185 23 is_stmt 0 view .LVU2181 + 6471 0044 0023 movs r3, #0 + 6472 0046 A4F84630 strh r3, [r4, #70] @ movhi +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6473 .loc 1 3186 5 is_stmt 1 view .LVU2182 +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6474 .loc 1 3186 17 is_stmt 0 view .LVU2183 + 6475 004a 0123 movs r3, #1 + 6476 004c 84F85D30 strb r3, [r4, #93] +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6477 .loc 1 3197 5 is_stmt 1 view .LVU2184 +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6478 .loc 1 3197 13 is_stmt 0 view .LVU2185 + 6479 0050 236E ldr r3, [r4, #96] +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6480 .loc 1 3197 8 view .LVU2186 + 6481 0052 4BB9 cbnz r3, .L440 + 6482 .L433: +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6483 .loc 1 3212 3 is_stmt 1 view .LVU2187 + 6484 0054 2046 mov r0, r4 + 6485 0056 FFF7FEFF bl HAL_SPI_RxCpltCallback + 6486 .LVL412: + 6487 .L432: +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6488 .loc 1 3214 1 is_stmt 0 view .LVU2188 + 6489 005a 38BD pop {r3, r4, r5, pc} + 6490 .LVL413: + 6491 .L439: +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6492 .loc 1 3171 7 is_stmt 1 view .LVU2189 + 6493 005c 2168 ldr r1, [r4] + 6494 005e 4B68 ldr r3, [r1, #4] + 6495 0060 23F00303 bic r3, r3, #3 + 6496 0064 4B60 str r3, [r1, #4] + 6497 0066 E6E7 b .L435 + 6498 .LVL414: + 6499 .L440: +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6500 .loc 1 3203 7 view .LVU2190 + 6501 0068 2046 mov r0, r4 + 6502 006a FFF7FEFF bl HAL_SPI_ErrorCallback + 6503 .LVL415: +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6504 .loc 1 3205 7 view .LVU2191 + ARM GAS /tmp/ccZ0BHQJ.s page 227 + + + 6505 006e F4E7 b .L432 + 6506 .cfi_endproc + 6507 .LFE160: + 6509 .section .text.SPI_DMATransmitReceiveCplt,"ax",%progbits + 6510 .align 1 + 6511 .syntax unified + 6512 .thumb + 6513 .thumb_func + 6515 SPI_DMATransmitReceiveCplt: + 6516 .LVL416: + 6517 .LFB161: +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6518 .loc 1 3223 1 view -0 + 6519 .cfi_startproc + 6520 @ args = 0, pretend = 0, frame = 0 + 6521 @ frame_needed = 0, uses_anonymous_args = 0 +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6522 .loc 1 3223 1 is_stmt 0 view .LVU2193 + 6523 0000 38B5 push {r3, r4, r5, lr} + 6524 .cfi_def_cfa_offset 16 + 6525 .cfi_offset 3, -16 + 6526 .cfi_offset 4, -12 + 6527 .cfi_offset 5, -8 + 6528 .cfi_offset 14, -4 + 6529 0002 0546 mov r5, r0 +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6530 .loc 1 3224 3 is_stmt 1 view .LVU2194 +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6531 .loc 1 3224 22 is_stmt 0 view .LVU2195 + 6532 0004 446A ldr r4, [r0, #36] + 6533 .LVL417: +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 6534 .loc 1 3225 3 is_stmt 1 view .LVU2196 +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6535 .loc 1 3233 3 view .LVU2197 +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6536 .loc 1 3233 15 is_stmt 0 view .LVU2198 + 6537 0006 FFF7FEFF bl HAL_GetTick + 6538 .LVL418: +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6539 .loc 1 3236 3 is_stmt 1 view .LVU2199 +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6540 .loc 1 3236 12 is_stmt 0 view .LVU2200 + 6541 000a 2B68 ldr r3, [r5] +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6542 .loc 1 3236 22 view .LVU2201 + 6543 000c 1B68 ldr r3, [r3] +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6544 .loc 1 3236 6 view .LVU2202 + 6545 000e 13F0200F tst r3, #32 + 6546 0012 1CD1 bne .L442 + 6547 0014 0246 mov r2, r0 +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6548 .loc 1 3239 5 is_stmt 1 view .LVU2203 + 6549 0016 2168 ldr r1, [r4] + 6550 0018 4B68 ldr r3, [r1, #4] + 6551 001a 23F02003 bic r3, r3, #32 + ARM GAS /tmp/ccZ0BHQJ.s page 228 + + + 6552 001e 4B60 str r3, [r1, #4] +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6553 .loc 1 3276 5 view .LVU2204 +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6554 .loc 1 3276 9 is_stmt 0 view .LVU2205 + 6555 0020 6421 movs r1, #100 + 6556 0022 2046 mov r0, r4 + 6557 .LVL419: +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6558 .loc 1 3276 9 view .LVU2206 + 6559 0024 FFF7FEFF bl SPI_EndRxTxTransaction + 6560 .LVL420: +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6561 .loc 1 3276 8 discriminator 1 view .LVU2207 + 6562 0028 18B1 cbz r0, .L443 +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6563 .loc 1 3278 7 is_stmt 1 view .LVU2208 + 6564 002a 236E ldr r3, [r4, #96] + 6565 002c 43F02003 orr r3, r3, #32 + 6566 0030 2366 str r3, [r4, #96] + 6567 .L443: +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6568 .loc 1 3282 5 view .LVU2209 + 6569 0032 2268 ldr r2, [r4] + 6570 0034 5368 ldr r3, [r2, #4] + 6571 0036 23F00303 bic r3, r3, #3 + 6572 003a 5360 str r3, [r2, #4] +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6573 .loc 1 3284 5 view .LVU2210 +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6574 .loc 1 3284 23 is_stmt 0 view .LVU2211 + 6575 003c 0023 movs r3, #0 + 6576 003e E387 strh r3, [r4, #62] @ movhi +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6577 .loc 1 3285 5 is_stmt 1 view .LVU2212 +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6578 .loc 1 3285 23 is_stmt 0 view .LVU2213 + 6579 0040 A4F84630 strh r3, [r4, #70] @ movhi +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6580 .loc 1 3286 5 is_stmt 1 view .LVU2214 +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6581 .loc 1 3286 17 is_stmt 0 view .LVU2215 + 6582 0044 0123 movs r3, #1 + 6583 0046 84F85D30 strb r3, [r4, #93] +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6584 .loc 1 3297 5 is_stmt 1 view .LVU2216 +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6585 .loc 1 3297 13 is_stmt 0 view .LVU2217 + 6586 004a 236E ldr r3, [r4, #96] +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6587 .loc 1 3297 8 view .LVU2218 + 6588 004c 1BB9 cbnz r3, .L446 + 6589 .L442: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6590 .loc 1 3312 3 is_stmt 1 view .LVU2219 + 6591 004e 2046 mov r0, r4 + 6592 0050 FFF7FEFF bl HAL_SPI_TxRxCpltCallback + ARM GAS /tmp/ccZ0BHQJ.s page 229 + + + 6593 .LVL421: + 6594 .L441: +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6595 .loc 1 3314 1 is_stmt 0 view .LVU2220 + 6596 0054 38BD pop {r3, r4, r5, pc} + 6597 .LVL422: + 6598 .L446: +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6599 .loc 1 3303 7 is_stmt 1 view .LVU2221 + 6600 0056 2046 mov r0, r4 + 6601 0058 FFF7FEFF bl HAL_SPI_ErrorCallback + 6602 .LVL423: +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6603 .loc 1 3305 7 view .LVU2222 + 6604 005c FAE7 b .L441 + 6605 .cfi_endproc + 6606 .LFE161: + 6608 .section .text.HAL_SPI_IRQHandler,"ax",%progbits + 6609 .align 1 + 6610 .global HAL_SPI_IRQHandler + 6611 .syntax unified + 6612 .thumb + 6613 .thumb_func + 6615 HAL_SPI_IRQHandler: + 6616 .LVL424: + 6617 .LFB148: +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itsource = hspi->Instance->CR2; + 6618 .loc 1 2756 1 view -0 + 6619 .cfi_startproc + 6620 @ args = 0, pretend = 0, frame = 16 + 6621 @ frame_needed = 0, uses_anonymous_args = 0 +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itsource = hspi->Instance->CR2; + 6622 .loc 1 2756 1 is_stmt 0 view .LVU2224 + 6623 0000 30B5 push {r4, r5, lr} + 6624 .cfi_def_cfa_offset 12 + 6625 .cfi_offset 4, -12 + 6626 .cfi_offset 5, -8 + 6627 .cfi_offset 14, -4 + 6628 0002 85B0 sub sp, sp, #20 + 6629 .cfi_def_cfa_offset 32 + 6630 0004 0446 mov r4, r0 +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; + 6631 .loc 1 2757 3 is_stmt 1 view .LVU2225 +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; + 6632 .loc 1 2757 27 is_stmt 0 view .LVU2226 + 6633 0006 0268 ldr r2, [r0] +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; + 6634 .loc 1 2757 12 view .LVU2227 + 6635 0008 5168 ldr r1, [r2, #4] + 6636 .LVL425: +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6637 .loc 1 2758 3 is_stmt 1 view .LVU2228 +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6638 .loc 1 2758 12 is_stmt 0 view .LVU2229 + 6639 000a 9368 ldr r3, [r2, #8] + 6640 .LVL426: +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN + ARM GAS /tmp/ccZ0BHQJ.s page 230 + + + 6641 .loc 1 2761 3 is_stmt 1 view .LVU2230 + 6642 000c C3F38010 ubfx r0, r3, #6, #1 + 6643 .LVL427: +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN + 6644 .loc 1 2761 6 is_stmt 0 view .LVU2231 + 6645 0010 13F0400F tst r3, #64 + 6646 0014 05D1 bne .L448 +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN + 6647 .loc 1 2761 55 discriminator 1 view .LVU2232 + 6648 0016 13F0010F tst r3, #1 + 6649 001a 02D0 beq .L448 +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6650 .loc 1 2762 56 view .LVU2233 + 6651 001c 11F0400F tst r1, #64 + 6652 0020 69D1 bne .L460 + 6653 .L448: +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6654 .loc 1 2769 3 is_stmt 1 view .LVU2234 +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6655 .loc 1 2769 6 is_stmt 0 view .LVU2235 + 6656 0022 13F0020F tst r3, #2 + 6657 0026 02D0 beq .L450 +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6658 .loc 1 2769 55 discriminator 1 view .LVU2236 + 6659 0028 11F0800F tst r1, #128 + 6660 002c 67D1 bne .L461 + 6661 .L450: +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT + 6662 .loc 1 2776 3 is_stmt 1 view .LVU2237 + 6663 002e C3F34015 ubfx r5, r3, #5, #1 +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT + 6664 .loc 1 2776 6 is_stmt 0 view .LVU2238 + 6665 0032 13F0200F tst r3, #32 + 6666 0036 03D1 bne .L451 +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT + 6667 .loc 1 2776 57 discriminator 1 view .LVU2239 + 6668 0038 10B9 cbnz r0, .L451 +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6669 .loc 1 2777 8 view .LVU2240 + 6670 003a 13F4807F tst r3, #256 + 6671 003e 61D0 beq .L447 + 6672 .L451: +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6673 .loc 1 2777 60 discriminator 1 view .LVU2241 + 6674 0040 11F0200F tst r1, #32 + 6675 0044 5ED0 beq .L447 +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6676 .loc 1 2780 5 is_stmt 1 view .LVU2242 +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6677 .loc 1 2780 8 is_stmt 0 view .LVU2243 + 6678 0046 78B1 cbz r0, .L452 +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6679 .loc 1 2782 7 is_stmt 1 view .LVU2244 +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6680 .loc 1 2782 15 is_stmt 0 view .LVU2245 + 6681 0048 94F85D00 ldrb r0, [r4, #93] @ zero_extendqisi2 + 6682 004c C0B2 uxtb r0, r0 + ARM GAS /tmp/ccZ0BHQJ.s page 231 + + +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6683 .loc 1 2782 10 view .LVU2246 + 6684 004e 0328 cmp r0, #3 + 6685 0050 5AD0 beq .L453 +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); + 6686 .loc 1 2784 9 is_stmt 1 view .LVU2247 + 6687 0052 206E ldr r0, [r4, #96] + 6688 0054 40F00400 orr r0, r0, #4 + 6689 0058 2066 str r0, [r4, #96] +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6690 .loc 1 2785 9 view .LVU2248 + 6691 .LBB7: +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6692 .loc 1 2785 9 view .LVU2249 + 6693 005a 0020 movs r0, #0 + 6694 005c 0090 str r0, [sp] +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6695 .loc 1 2785 9 view .LVU2250 + 6696 005e D068 ldr r0, [r2, #12] + 6697 0060 0090 str r0, [sp] +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6698 .loc 1 2785 9 view .LVU2251 + 6699 0062 9068 ldr r0, [r2, #8] + 6700 0064 0090 str r0, [sp] +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6701 .loc 1 2785 9 view .LVU2252 + 6702 0066 0098 ldr r0, [sp] + 6703 .LBE7: +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6704 .loc 1 2785 9 view .LVU2253 + 6705 .L452: +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6706 .loc 1 2795 5 view .LVU2254 +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6707 .loc 1 2795 8 is_stmt 0 view .LVU2255 + 6708 0068 65B1 cbz r5, .L454 +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_MODFFLAG(hspi); + 6709 .loc 1 2797 7 is_stmt 1 view .LVU2256 + 6710 006a 206E ldr r0, [r4, #96] + 6711 006c 40F00100 orr r0, r0, #1 + 6712 0070 2066 str r0, [r4, #96] +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6713 .loc 1 2798 7 view .LVU2257 + 6714 .LBB8: +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6715 .loc 1 2798 7 view .LVU2258 + 6716 0072 0020 movs r0, #0 + 6717 0074 0290 str r0, [sp, #8] +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6718 .loc 1 2798 7 view .LVU2259 + 6719 0076 9068 ldr r0, [r2, #8] + 6720 0078 0290 str r0, [sp, #8] +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6721 .loc 1 2798 7 view .LVU2260 + 6722 007a 1068 ldr r0, [r2] + 6723 007c 20F04000 bic r0, r0, #64 + 6724 0080 1060 str r0, [r2] + ARM GAS /tmp/ccZ0BHQJ.s page 232 + + +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6725 .loc 1 2798 7 view .LVU2261 + 6726 0082 029A ldr r2, [sp, #8] + 6727 .L454: +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6728 .loc 1 2798 7 is_stmt 0 view .LVU2262 + 6729 .LBE8: +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6730 .loc 1 2798 7 is_stmt 1 discriminator 1 view .LVU2263 +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6731 .loc 1 2802 5 view .LVU2264 +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6732 .loc 1 2802 8 is_stmt 0 view .LVU2265 + 6733 0084 13F4807F tst r3, #256 + 6734 0088 09D0 beq .L455 +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 6735 .loc 1 2804 7 is_stmt 1 view .LVU2266 + 6736 008a 236E ldr r3, [r4, #96] + 6737 .LVL428: +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 6738 .loc 1 2804 7 is_stmt 0 view .LVU2267 + 6739 008c 43F00803 orr r3, r3, #8 + 6740 0090 2366 str r3, [r4, #96] +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6741 .loc 1 2805 7 is_stmt 1 view .LVU2268 + 6742 .LBB9: +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6743 .loc 1 2805 7 view .LVU2269 + 6744 0092 0023 movs r3, #0 + 6745 0094 0393 str r3, [sp, #12] +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6746 .loc 1 2805 7 view .LVU2270 + 6747 0096 2368 ldr r3, [r4] + 6748 0098 9B68 ldr r3, [r3, #8] + 6749 009a 0393 str r3, [sp, #12] +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6750 .loc 1 2805 7 view .LVU2271 + 6751 009c 039B ldr r3, [sp, #12] + 6752 .L455: +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6753 .loc 1 2805 7 is_stmt 0 view .LVU2272 + 6754 .LBE9: +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6755 .loc 1 2805 7 is_stmt 1 discriminator 1 view .LVU2273 +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6756 .loc 1 2808 5 view .LVU2274 +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6757 .loc 1 2808 13 is_stmt 0 view .LVU2275 + 6758 009e 236E ldr r3, [r4, #96] +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6759 .loc 1 2808 8 view .LVU2276 + 6760 00a0 002B cmp r3, #0 + 6761 00a2 2FD0 beq .L447 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6762 .loc 1 2811 7 is_stmt 1 view .LVU2277 + 6763 00a4 2268 ldr r2, [r4] + 6764 00a6 5368 ldr r3, [r2, #4] + ARM GAS /tmp/ccZ0BHQJ.s page 233 + + + 6765 00a8 23F0E003 bic r3, r3, #224 + 6766 00ac 5360 str r3, [r2, #4] +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA requests if enabled */ + 6767 .loc 1 2813 7 view .LVU2278 +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA requests if enabled */ + 6768 .loc 1 2813 19 is_stmt 0 view .LVU2279 + 6769 00ae 0123 movs r3, #1 + 6770 00b0 84F85D30 strb r3, [r4, #93] +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6771 .loc 1 2815 7 is_stmt 1 view .LVU2280 +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6772 .loc 1 2815 10 is_stmt 0 view .LVU2281 + 6773 00b4 11F0030F tst r1, #3 + 6774 00b8 2ED0 beq .L457 +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6775 .loc 1 2817 9 is_stmt 1 view .LVU2282 + 6776 00ba 2268 ldr r2, [r4] + 6777 00bc 5368 ldr r3, [r2, #4] + 6778 00be 23F00303 bic r3, r3, #3 + 6779 00c2 5360 str r3, [r2, #4] +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6780 .loc 1 2820 9 view .LVU2283 +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6781 .loc 1 2820 17 is_stmt 0 view .LVU2284 + 6782 00c4 A36D ldr r3, [r4, #88] +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6783 .loc 1 2820 12 view .LVU2285 + 6784 00c6 4BB1 cbz r3, .L458 +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) + 6785 .loc 1 2824 11 is_stmt 1 view .LVU2286 +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) + 6786 .loc 1 2824 43 is_stmt 0 view .LVU2287 + 6787 00c8 154A ldr r2, .L462 + 6788 00ca 5A63 str r2, [r3, #52] +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6789 .loc 1 2825 11 is_stmt 1 view .LVU2288 +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6790 .loc 1 2825 25 is_stmt 0 view .LVU2289 + 6791 00cc A06D ldr r0, [r4, #88] + 6792 00ce FFF7FEFF bl HAL_DMA_Abort_IT + 6793 .LVL429: +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6794 .loc 1 2825 14 discriminator 1 view .LVU2290 + 6795 00d2 18B1 cbz r0, .L458 +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6796 .loc 1 2827 13 is_stmt 1 view .LVU2291 + 6797 00d4 236E ldr r3, [r4, #96] + 6798 00d6 43F04003 orr r3, r3, #64 + 6799 00da 2366 str r3, [r4, #96] + 6800 .L458: +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6801 .loc 1 2831 9 view .LVU2292 +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6802 .loc 1 2831 17 is_stmt 0 view .LVU2293 + 6803 00dc 636D ldr r3, [r4, #84] +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6804 .loc 1 2831 12 view .LVU2294 + ARM GAS /tmp/ccZ0BHQJ.s page 234 + + + 6805 00de 8BB1 cbz r3, .L447 +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) + 6806 .loc 1 2835 11 is_stmt 1 view .LVU2295 +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) + 6807 .loc 1 2835 43 is_stmt 0 view .LVU2296 + 6808 00e0 0F4A ldr r2, .L462 + 6809 00e2 5A63 str r2, [r3, #52] +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6810 .loc 1 2836 11 is_stmt 1 view .LVU2297 +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6811 .loc 1 2836 25 is_stmt 0 view .LVU2298 + 6812 00e4 606D ldr r0, [r4, #84] + 6813 00e6 FFF7FEFF bl HAL_DMA_Abort_IT + 6814 .LVL430: +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6815 .loc 1 2836 14 discriminator 1 view .LVU2299 + 6816 00ea 58B1 cbz r0, .L447 +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6817 .loc 1 2838 13 is_stmt 1 view .LVU2300 + 6818 00ec 236E ldr r3, [r4, #96] + 6819 00ee 43F04003 orr r3, r3, #64 + 6820 00f2 2366 str r3, [r4, #96] + 6821 00f4 06E0 b .L447 + 6822 .LVL431: + 6823 .L460: +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6824 .loc 1 2764 5 view .LVU2301 +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6825 .loc 1 2764 9 is_stmt 0 view .LVU2302 + 6826 00f6 E36C ldr r3, [r4, #76] + 6827 .LVL432: +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6828 .loc 1 2764 5 view .LVU2303 + 6829 00f8 2046 mov r0, r4 + 6830 00fa 9847 blx r3 + 6831 .LVL433: +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6832 .loc 1 2765 5 is_stmt 1 view .LVU2304 + 6833 00fc 02E0 b .L447 + 6834 .LVL434: + 6835 .L461: +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6836 .loc 1 2771 5 view .LVU2305 +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6837 .loc 1 2771 9 is_stmt 0 view .LVU2306 + 6838 00fe 236D ldr r3, [r4, #80] + 6839 .LVL435: +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6840 .loc 1 2771 5 view .LVU2307 + 6841 0100 2046 mov r0, r4 + 6842 0102 9847 blx r3 + 6843 .LVL436: +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6844 .loc 1 2772 5 is_stmt 1 view .LVU2308 + 6845 .L447: +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6846 .loc 1 2854 1 is_stmt 0 view .LVU2309 + ARM GAS /tmp/ccZ0BHQJ.s page 235 + + + 6847 0104 05B0 add sp, sp, #20 + 6848 .cfi_remember_state + 6849 .cfi_def_cfa_offset 12 + 6850 @ sp needed + 6851 0106 30BD pop {r4, r5, pc} + 6852 .LVL437: + 6853 .L453: + 6854 .cfi_restore_state +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6855 .loc 1 2789 9 is_stmt 1 view .LVU2310 + 6856 .LBB10: +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6857 .loc 1 2789 9 view .LVU2311 + 6858 0108 0023 movs r3, #0 + 6859 .LVL438: +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6860 .loc 1 2789 9 is_stmt 0 view .LVU2312 + 6861 010a 0193 str r3, [sp, #4] +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6862 .loc 1 2789 9 is_stmt 1 view .LVU2313 + 6863 010c D368 ldr r3, [r2, #12] + 6864 010e 0193 str r3, [sp, #4] +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6865 .loc 1 2789 9 view .LVU2314 + 6866 0110 9368 ldr r3, [r2, #8] + 6867 0112 0193 str r3, [sp, #4] +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6868 .loc 1 2789 9 view .LVU2315 + 6869 0114 019B ldr r3, [sp, #4] + 6870 .LBE10: +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6871 .loc 1 2789 9 view .LVU2316 +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6872 .loc 1 2790 9 view .LVU2317 + 6873 0116 F5E7 b .L447 + 6874 .L457: +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6875 .loc 1 2848 9 view .LVU2318 + 6876 0118 2046 mov r0, r4 + 6877 011a FFF7FEFF bl HAL_SPI_ErrorCallback + 6878 .LVL439: +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6879 .loc 1 2852 5 view .LVU2319 + 6880 011e F1E7 b .L447 + 6881 .L463: + 6882 .align 2 + 6883 .L462: + 6884 0120 00000000 .word SPI_DMAAbortOnError + 6885 .cfi_endproc + 6886 .LFE148: + 6888 .section .text.SPI_DMAAbortOnError,"ax",%progbits + 6889 .align 1 + 6890 .syntax unified + 6891 .thumb + 6892 .thumb_func + 6894 SPI_DMAAbortOnError: + 6895 .LVL440: + ARM GAS /tmp/ccZ0BHQJ.s page 236 + + + 6896 .LFB166: +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6897 .loc 1 3400 1 view -0 + 6898 .cfi_startproc + 6899 @ args = 0, pretend = 0, frame = 0 + 6900 @ frame_needed = 0, uses_anonymous_args = 0 +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6901 .loc 1 3400 1 is_stmt 0 view .LVU2321 + 6902 0000 08B5 push {r3, lr} + 6903 .cfi_def_cfa_offset 8 + 6904 .cfi_offset 3, -8 + 6905 .cfi_offset 14, -4 +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6906 .loc 1 3401 3 is_stmt 1 view .LVU2322 +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6907 .loc 1 3401 22 is_stmt 0 view .LVU2323 + 6908 0002 406A ldr r0, [r0, #36] + 6909 .LVL441: +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 6910 .loc 1 3402 3 is_stmt 1 view .LVU2324 +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 6911 .loc 1 3402 21 is_stmt 0 view .LVU2325 + 6912 0004 0023 movs r3, #0 + 6913 0006 A0F84630 strh r3, [r0, #70] @ movhi +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6914 .loc 1 3403 3 is_stmt 1 view .LVU2326 +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6915 .loc 1 3403 21 is_stmt 0 view .LVU2327 + 6916 000a C387 strh r3, [r0, #62] @ movhi +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6917 .loc 1 3409 3 is_stmt 1 view .LVU2328 + 6918 000c FFF7FEFF bl HAL_SPI_ErrorCallback + 6919 .LVL442: +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6920 .loc 1 3411 1 is_stmt 0 view .LVU2329 + 6921 0010 08BD pop {r3, pc} + 6922 .cfi_endproc + 6923 .LFE166: + 6925 .section .text.HAL_SPI_AbortCpltCallback,"ax",%progbits + 6926 .align 1 + 6927 .weak HAL_SPI_AbortCpltCallback + 6928 .syntax unified + 6929 .thumb + 6930 .thumb_func + 6932 HAL_SPI_AbortCpltCallback: + 6933 .LVL443: + 6934 .LFB156: +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 6935 .loc 1 2977 1 is_stmt 1 view -0 + 6936 .cfi_startproc + 6937 @ args = 0, pretend = 0, frame = 0 + 6938 @ frame_needed = 0, uses_anonymous_args = 0 + 6939 @ link register save eliminated. +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6940 .loc 1 2979 3 view .LVU2331 +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6941 .loc 1 2984 1 is_stmt 0 view .LVU2332 + ARM GAS /tmp/ccZ0BHQJ.s page 237 + + + 6942 0000 7047 bx lr + 6943 .cfi_endproc + 6944 .LFE156: + 6946 .section .text.HAL_SPI_Abort_IT,"ax",%progbits + 6947 .align 1 + 6948 .global HAL_SPI_Abort_IT + 6949 .syntax unified + 6950 .thumb + 6951 .thumb_func + 6953 HAL_SPI_Abort_IT: + 6954 .LVL444: + 6955 .LFB144: +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 6956 .loc 1 2515 1 is_stmt 1 view -0 + 6957 .cfi_startproc + 6958 @ args = 0, pretend = 0, frame = 16 + 6959 @ frame_needed = 0, uses_anonymous_args = 0 +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 6960 .loc 1 2515 1 is_stmt 0 view .LVU2334 + 6961 0000 70B5 push {r4, r5, r6, lr} + 6962 .cfi_def_cfa_offset 16 + 6963 .cfi_offset 4, -16 + 6964 .cfi_offset 5, -12 + 6965 .cfi_offset 6, -8 + 6966 .cfi_offset 14, -4 + 6967 0002 84B0 sub sp, sp, #16 + 6968 .cfi_def_cfa_offset 32 + 6969 0004 0446 mov r4, r0 +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t abortcplt ; + 6970 .loc 1 2516 3 is_stmt 1 view .LVU2335 +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 6971 .loc 1 2517 3 view .LVU2336 +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; + 6972 .loc 1 2518 3 view .LVU2337 +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6973 .loc 1 2519 3 view .LVU2338 +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 1U; + 6974 .loc 1 2522 3 view .LVU2339 + 6975 .LVL445: +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 6976 .loc 1 2523 3 view .LVU2340 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6977 .loc 1 2524 3 view .LVU2341 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6978 .loc 1 2524 61 is_stmt 0 view .LVU2342 + 6979 0006 504B ldr r3, .L493 + 6980 0008 1B68 ldr r3, [r3] + 6981 000a 504A ldr r2, .L493+4 + 6982 000c A2FB0323 umull r2, r3, r2, r3 + 6983 0010 5B0A lsrs r3, r3, #9 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6984 .loc 1 2524 36 view .LVU2343 + 6985 0012 6422 movs r2, #100 + 6986 0014 02FB03F3 mul r3, r2, r3 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6987 .loc 1 2524 14 view .LVU2344 + 6988 0018 0293 str r3, [sp, #8] + ARM GAS /tmp/ccZ0BHQJ.s page 238 + + +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6989 .loc 1 2525 3 is_stmt 1 view .LVU2345 +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6990 .loc 1 2525 9 is_stmt 0 view .LVU2346 + 6991 001a 029B ldr r3, [sp, #8] + 6992 001c 0393 str r3, [sp, #12] +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6993 .loc 1 2528 3 is_stmt 1 view .LVU2347 + 6994 001e 0268 ldr r2, [r0] + 6995 0020 5368 ldr r3, [r2, #4] + 6996 0022 23F02003 bic r3, r3, #32 + 6997 0026 5360 str r3, [r2, #4] +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6998 .loc 1 2531 3 view .LVU2348 +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6999 .loc 1 2531 7 is_stmt 0 view .LVU2349 + 7000 0028 0268 ldr r2, [r0] + 7001 002a 5368 ldr r3, [r2, #4] +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7002 .loc 1 2531 6 view .LVU2350 + 7003 002c 13F0800F tst r3, #128 + 7004 0030 12D0 beq .L468 +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 7005 .loc 1 2533 5 is_stmt 1 view .LVU2351 +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 7006 .loc 1 2533 17 is_stmt 0 view .LVU2352 + 7007 0032 474B ldr r3, .L493+8 + 7008 0034 0365 str r3, [r0, #80] + 7009 .L471: +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7010 .loc 1 2535 5 is_stmt 1 view .LVU2353 +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7011 .loc 1 2537 7 view .LVU2354 +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7012 .loc 1 2537 17 is_stmt 0 view .LVU2355 + 7013 0036 039B ldr r3, [sp, #12] +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7014 .loc 1 2537 10 view .LVU2356 + 7015 0038 43B1 cbz r3, .L490 +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 7016 .loc 1 2542 7 is_stmt 1 view .LVU2357 +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 7017 .loc 1 2542 12 is_stmt 0 view .LVU2358 + 7018 003a 039B ldr r3, [sp, #12] + 7019 003c 013B subs r3, r3, #1 + 7020 003e 0393 str r3, [sp, #12] +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7021 .loc 1 2543 26 is_stmt 1 view .LVU2359 +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7022 .loc 1 2543 18 is_stmt 0 view .LVU2360 + 7023 0040 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 7024 0044 DBB2 uxtb r3, r3 +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7025 .loc 1 2543 26 view .LVU2361 + 7026 0046 072B cmp r3, #7 + 7027 0048 F5D1 bne .L471 + 7028 004a 03E0 b .L470 + ARM GAS /tmp/ccZ0BHQJ.s page 239 + + + 7029 .L490: +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 7030 .loc 1 2539 9 is_stmt 1 view .LVU2362 + 7031 004c 236E ldr r3, [r4, #96] + 7032 004e 43F04003 orr r3, r3, #64 + 7033 0052 2366 str r3, [r4, #96] +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7034 .loc 1 2540 9 view .LVU2363 + 7035 .L470: +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7036 .loc 1 2545 5 view .LVU2364 +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7037 .loc 1 2545 11 is_stmt 0 view .LVU2365 + 7038 0054 029B ldr r3, [sp, #8] + 7039 0056 0393 str r3, [sp, #12] + 7040 .L468: +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7041 .loc 1 2548 3 is_stmt 1 view .LVU2366 +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7042 .loc 1 2548 7 is_stmt 0 view .LVU2367 + 7043 0058 5368 ldr r3, [r2, #4] +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7044 .loc 1 2548 6 view .LVU2368 + 7045 005a 13F0400F tst r3, #64 + 7046 005e 12D0 beq .L472 +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 7047 .loc 1 2550 5 is_stmt 1 view .LVU2369 +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 7048 .loc 1 2550 17 is_stmt 0 view .LVU2370 + 7049 0060 3C4B ldr r3, .L493+12 + 7050 0062 E364 str r3, [r4, #76] + 7051 .L475: +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7052 .loc 1 2552 5 is_stmt 1 view .LVU2371 +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7053 .loc 1 2554 7 view .LVU2372 +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7054 .loc 1 2554 17 is_stmt 0 view .LVU2373 + 7055 0064 039B ldr r3, [sp, #12] +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7056 .loc 1 2554 10 view .LVU2374 + 7057 0066 43B1 cbz r3, .L491 +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 7058 .loc 1 2559 7 is_stmt 1 view .LVU2375 +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 7059 .loc 1 2559 12 is_stmt 0 view .LVU2376 + 7060 0068 039B ldr r3, [sp, #12] + 7061 006a 013B subs r3, r3, #1 + 7062 006c 0393 str r3, [sp, #12] +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7063 .loc 1 2560 26 is_stmt 1 view .LVU2377 +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7064 .loc 1 2560 18 is_stmt 0 view .LVU2378 + 7065 006e 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 7066 0072 DBB2 uxtb r3, r3 +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7067 .loc 1 2560 26 view .LVU2379 + ARM GAS /tmp/ccZ0BHQJ.s page 240 + + + 7068 0074 072B cmp r3, #7 + 7069 0076 F5D1 bne .L475 + 7070 0078 03E0 b .L474 + 7071 .L491: +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 7072 .loc 1 2556 9 is_stmt 1 view .LVU2380 + 7073 007a 236E ldr r3, [r4, #96] + 7074 007c 43F04003 orr r3, r3, #64 + 7075 0080 2366 str r3, [r4, #96] +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7076 .loc 1 2557 9 view .LVU2381 + 7077 .L474: +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7078 .loc 1 2562 5 view .LVU2382 +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7079 .loc 1 2562 11 is_stmt 0 view .LVU2383 + 7080 0082 029B ldr r3, [sp, #8] + 7081 0084 0393 str r3, [sp, #12] + 7082 .L472: +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7083 .loc 1 2568 3 is_stmt 1 view .LVU2384 +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7084 .loc 1 2568 11 is_stmt 0 view .LVU2385 + 7085 0086 636D ldr r3, [r4, #84] +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7086 .loc 1 2568 6 view .LVU2386 + 7087 0088 2BB1 cbz r3, .L476 +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7088 .loc 1 2572 5 is_stmt 1 view .LVU2387 +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7089 .loc 1 2572 9 is_stmt 0 view .LVU2388 + 7090 008a 5268 ldr r2, [r2, #4] +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7091 .loc 1 2572 8 view .LVU2389 + 7092 008c 12F0020F tst r2, #2 + 7093 0090 1BD0 beq .L477 +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7094 .loc 1 2574 7 is_stmt 1 view .LVU2390 +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7095 .loc 1 2574 39 is_stmt 0 view .LVU2391 + 7096 0092 314A ldr r2, .L493+16 + 7097 0094 5A63 str r2, [r3, #52] + 7098 .L476: +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7099 .loc 1 2582 3 is_stmt 1 view .LVU2392 +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7100 .loc 1 2582 11 is_stmt 0 view .LVU2393 + 7101 0096 A36D ldr r3, [r4, #88] +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7102 .loc 1 2582 6 view .LVU2394 + 7103 0098 33B1 cbz r3, .L478 +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7104 .loc 1 2586 5 is_stmt 1 view .LVU2395 +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7105 .loc 1 2586 9 is_stmt 0 view .LVU2396 + 7106 009a 2268 ldr r2, [r4] + 7107 009c 5268 ldr r2, [r2, #4] + ARM GAS /tmp/ccZ0BHQJ.s page 241 + + +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7108 .loc 1 2586 8 view .LVU2397 + 7109 009e 12F0010F tst r2, #1 + 7110 00a2 15D0 beq .L479 +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7111 .loc 1 2588 7 is_stmt 1 view .LVU2398 +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7112 .loc 1 2588 39 is_stmt 0 view .LVU2399 + 7113 00a4 2D4A ldr r2, .L493+20 + 7114 00a6 5A63 str r2, [r3, #52] + 7115 .L478: +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7116 .loc 1 2597 3 is_stmt 1 view .LVU2400 +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7117 .loc 1 2597 7 is_stmt 0 view .LVU2401 + 7118 00a8 2368 ldr r3, [r4] + 7119 00aa 5B68 ldr r3, [r3, #4] +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7120 .loc 1 2597 6 view .LVU2402 + 7121 00ac 13F0020F tst r3, #2 + 7122 00b0 11D0 beq .L484 +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7123 .loc 1 2600 5 is_stmt 1 view .LVU2403 +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7124 .loc 1 2600 13 is_stmt 0 view .LVU2404 + 7125 00b2 606D ldr r0, [r4, #84] + 7126 .LVL446: +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7127 .loc 1 2600 8 view .LVU2405 + 7128 00b4 28B3 cbz r0, .L485 +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7129 .loc 1 2603 7 is_stmt 1 view .LVU2406 +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7130 .loc 1 2603 11 is_stmt 0 view .LVU2407 + 7131 00b6 FFF7FEFF bl HAL_DMA_Abort_IT + 7132 .LVL447: +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7133 .loc 1 2603 10 discriminator 1 view .LVU2408 + 7134 00ba 20B3 cbz r0, .L486 +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7135 .loc 1 2605 9 is_stmt 1 view .LVU2409 +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7136 .loc 1 2605 13 is_stmt 0 view .LVU2410 + 7137 00bc 636D ldr r3, [r4, #84] +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7138 .loc 1 2605 41 view .LVU2411 + 7139 00be 0022 movs r2, #0 + 7140 00c0 5A63 str r2, [r3, #52] +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7141 .loc 1 2606 9 is_stmt 1 view .LVU2412 +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7142 .loc 1 2606 25 is_stmt 0 view .LVU2413 + 7143 00c2 4023 movs r3, #64 + 7144 00c4 2366 str r3, [r4, #96] +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 7145 .loc 1 2523 13 view .LVU2414 + 7146 00c6 0126 movs r6, #1 + ARM GAS /tmp/ccZ0BHQJ.s page 242 + + + 7147 00c8 06E0 b .L480 + 7148 .LVL448: + 7149 .L477: +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7150 .loc 1 2578 7 is_stmt 1 view .LVU2415 +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7151 .loc 1 2578 39 is_stmt 0 view .LVU2416 + 7152 00ca 0022 movs r2, #0 + 7153 00cc 5A63 str r2, [r3, #52] + 7154 00ce E2E7 b .L476 + 7155 .L479: +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7156 .loc 1 2592 7 is_stmt 1 view .LVU2417 +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7157 .loc 1 2592 39 is_stmt 0 view .LVU2418 + 7158 00d0 0022 movs r2, #0 + 7159 00d2 5A63 str r2, [r3, #52] + 7160 00d4 E8E7 b .L478 + 7161 .L484: +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 7162 .loc 1 2523 13 view .LVU2419 + 7163 00d6 0126 movs r6, #1 + 7164 .LVL449: + 7165 .L480: +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7166 .loc 1 2615 3 is_stmt 1 view .LVU2420 +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7167 .loc 1 2615 7 is_stmt 0 view .LVU2421 + 7168 00d8 2368 ldr r3, [r4] + 7169 00da 5B68 ldr r3, [r3, #4] +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7170 .loc 1 2615 6 view .LVU2422 + 7171 00dc 13F0010F tst r3, #1 + 7172 00e0 0AD0 beq .L481 +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7173 .loc 1 2618 5 is_stmt 1 view .LVU2423 +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7174 .loc 1 2618 13 is_stmt 0 view .LVU2424 + 7175 00e2 A06D ldr r0, [r4, #88] +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7176 .loc 1 2618 8 view .LVU2425 + 7177 00e4 40B1 cbz r0, .L481 +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7178 .loc 1 2621 7 is_stmt 1 view .LVU2426 +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7179 .loc 1 2621 11 is_stmt 0 view .LVU2427 + 7180 00e6 FFF7FEFF bl HAL_DMA_Abort_IT + 7181 .LVL450: +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7182 .loc 1 2621 10 discriminator 1 view .LVU2428 + 7183 00ea 0546 mov r5, r0 + 7184 00ec 30B1 cbz r0, .L482 +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7185 .loc 1 2623 9 is_stmt 1 view .LVU2429 +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7186 .loc 1 2623 13 is_stmt 0 view .LVU2430 + 7187 00ee A36D ldr r3, [r4, #88] + ARM GAS /tmp/ccZ0BHQJ.s page 243 + + +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7188 .loc 1 2623 41 view .LVU2431 + 7189 00f0 0022 movs r2, #0 + 7190 00f2 5A63 str r2, [r3, #52] +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7191 .loc 1 2624 9 is_stmt 1 view .LVU2432 +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7192 .loc 1 2624 25 is_stmt 0 view .LVU2433 + 7193 00f4 4023 movs r3, #64 + 7194 00f6 2366 str r3, [r4, #96] + 7195 .L481: +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7196 .loc 1 2633 3 is_stmt 1 view .LVU2434 +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7197 .loc 1 2633 6 is_stmt 0 view .LVU2435 + 7198 00f8 3EB9 cbnz r6, .L492 +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 1U; + 7199 .loc 1 2522 13 view .LVU2436 + 7200 00fa 0025 movs r5, #0 + 7201 .LVL451: + 7202 .L482: +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7203 .loc 1 2666 3 is_stmt 1 view .LVU2437 +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7204 .loc 1 2667 1 is_stmt 0 view .LVU2438 + 7205 00fc 2846 mov r0, r5 + 7206 00fe 04B0 add sp, sp, #16 + 7207 .cfi_remember_state + 7208 .cfi_def_cfa_offset 16 + 7209 @ sp needed + 7210 0100 70BD pop {r4, r5, r6, pc} + 7211 .LVL452: + 7212 .L485: + 7213 .cfi_restore_state +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 7214 .loc 1 2523 13 view .LVU2439 + 7215 0102 0126 movs r6, #1 + 7216 0104 E8E7 b .L480 + 7217 .L486: +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7218 .loc 1 2610 19 view .LVU2440 + 7219 0106 0026 movs r6, #0 + 7220 0108 E6E7 b .L480 + 7221 .LVL453: + 7222 .L492: +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7223 .loc 1 2636 5 is_stmt 1 view .LVU2441 +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7224 .loc 1 2636 23 is_stmt 0 view .LVU2442 + 7225 010a 0023 movs r3, #0 + 7226 010c A4F84630 strh r3, [r4, #70] @ movhi +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7227 .loc 1 2637 5 is_stmt 1 view .LVU2443 +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7228 .loc 1 2637 23 is_stmt 0 view .LVU2444 + 7229 0110 E387 strh r3, [r4, #62] @ movhi +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccZ0BHQJ.s page 244 + + + 7230 .loc 1 2640 5 is_stmt 1 view .LVU2445 +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7231 .loc 1 2640 13 is_stmt 0 view .LVU2446 + 7232 0112 236E ldr r3, [r4, #96] +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7233 .loc 1 2640 8 view .LVU2447 + 7234 0114 402B cmp r3, #64 + 7235 0116 14D0 beq .L488 +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7236 .loc 1 2648 7 is_stmt 1 view .LVU2448 +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7237 .loc 1 2648 23 is_stmt 0 view .LVU2449 + 7238 0118 0025 movs r5, #0 + 7239 011a 2566 str r5, [r4, #96] + 7240 .L483: + 7241 .LVL454: +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7242 .loc 1 2652 5 is_stmt 1 view .LVU2450 + 7243 .LBB11: +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7244 .loc 1 2652 5 view .LVU2451 + 7245 011c 0022 movs r2, #0 + 7246 011e 0092 str r2, [sp] +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7247 .loc 1 2652 5 view .LVU2452 + 7248 0120 2368 ldr r3, [r4] + 7249 0122 D968 ldr r1, [r3, #12] + 7250 0124 0091 str r1, [sp] +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7251 .loc 1 2652 5 view .LVU2453 + 7252 0126 9968 ldr r1, [r3, #8] + 7253 0128 0091 str r1, [sp] +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7254 .loc 1 2652 5 view .LVU2454 + 7255 012a 0099 ldr r1, [sp] + 7256 .LBE11: +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7257 .loc 1 2652 5 view .LVU2455 +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7258 .loc 1 2653 5 view .LVU2456 + 7259 .LBB12: +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7260 .loc 1 2653 5 view .LVU2457 + 7261 012c 0192 str r2, [sp, #4] +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7262 .loc 1 2653 5 view .LVU2458 + 7263 012e 9B68 ldr r3, [r3, #8] + 7264 0130 0193 str r3, [sp, #4] +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7265 .loc 1 2653 5 view .LVU2459 + 7266 0132 019B ldr r3, [sp, #4] + 7267 .LBE12: +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7268 .loc 1 2653 5 view .LVU2460 +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7269 .loc 1 2656 5 view .LVU2461 +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccZ0BHQJ.s page 245 + + + 7270 .loc 1 2656 17 is_stmt 0 view .LVU2462 + 7271 0134 0123 movs r3, #1 + 7272 0136 84F85D30 strb r3, [r4, #93] +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 7273 .loc 1 2662 5 is_stmt 1 view .LVU2463 + 7274 013a 2046 mov r0, r4 + 7275 013c FFF7FEFF bl HAL_SPI_AbortCpltCallback + 7276 .LVL455: + 7277 0140 DCE7 b .L482 + 7278 .LVL456: + 7279 .L488: +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7280 .loc 1 2643 17 is_stmt 0 view .LVU2464 + 7281 0142 0125 movs r5, #1 + 7282 0144 EAE7 b .L483 + 7283 .L494: + 7284 0146 00BF .align 2 + 7285 .L493: + 7286 0148 00000000 .word SystemCoreClock + 7287 014c F1197605 .word 91625969 + 7288 0150 00000000 .word SPI_AbortTx_ISR + 7289 0154 00000000 .word SPI_AbortRx_ISR + 7290 0158 00000000 .word SPI_DMATxAbortCallback + 7291 015c 00000000 .word SPI_DMARxAbortCallback + 7292 .cfi_endproc + 7293 .LFE144: + 7295 .section .text.SPI_DMARxAbortCallback,"ax",%progbits + 7296 .align 1 + 7297 .syntax unified + 7298 .thumb + 7299 .thumb_func + 7301 SPI_DMARxAbortCallback: + 7302 .LVL457: + 7303 .LFB168: +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7304 .loc 1 3488 1 is_stmt 1 view -0 + 7305 .cfi_startproc + 7306 @ args = 0, pretend = 0, frame = 8 + 7307 @ frame_needed = 0, uses_anonymous_args = 0 +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7308 .loc 1 3488 1 is_stmt 0 view .LVU2466 + 7309 0000 30B5 push {r4, r5, lr} + 7310 .cfi_def_cfa_offset 12 + 7311 .cfi_offset 4, -12 + 7312 .cfi_offset 5, -8 + 7313 .cfi_offset 14, -4 + 7314 0002 85B0 sub sp, sp, #20 + 7315 .cfi_def_cfa_offset 32 +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7316 .loc 1 3489 3 is_stmt 1 view .LVU2467 +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7317 .loc 1 3489 22 is_stmt 0 view .LVU2468 + 7318 0004 446A ldr r4, [r0, #36] + 7319 .LVL458: +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7320 .loc 1 3492 3 is_stmt 1 view .LVU2469 + 7321 0006 2268 ldr r2, [r4] + ARM GAS /tmp/ccZ0BHQJ.s page 246 + + + 7322 0008 1368 ldr r3, [r2] + 7323 000a 23F04003 bic r3, r3, #64 + 7324 000e 1360 str r3, [r2] +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7325 .loc 1 3494 3 view .LVU2470 +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7326 .loc 1 3494 7 is_stmt 0 view .LVU2471 + 7327 0010 A36D ldr r3, [r4, #88] +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7328 .loc 1 3494 35 view .LVU2472 + 7329 0012 0025 movs r5, #0 + 7330 0014 5D63 str r5, [r3, #52] +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7331 .loc 1 3497 3 is_stmt 1 view .LVU2473 + 7332 0016 2268 ldr r2, [r4] + 7333 0018 5368 ldr r3, [r2, #4] + 7334 001a 23F00103 bic r3, r3, #1 + 7335 001e 5360 str r3, [r2, #4] +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7336 .loc 1 3500 3 view .LVU2474 +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7337 .loc 1 3500 7 is_stmt 0 view .LVU2475 + 7338 0020 FFF7FEFF bl HAL_GetTick + 7339 .LVL459: +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7340 .loc 1 3500 7 discriminator 1 view .LVU2476 + 7341 0024 0090 str r0, [sp] + 7342 0026 6423 movs r3, #100 + 7343 0028 2A46 mov r2, r5 + 7344 002a 8021 movs r1, #128 + 7345 002c 2046 mov r0, r4 + 7346 002e FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 7347 .LVL460: +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7348 .loc 1 3500 6 discriminator 2 view .LVU2477 + 7349 0032 08B1 cbz r0, .L496 +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7350 .loc 1 3502 5 is_stmt 1 view .LVU2478 +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7351 .loc 1 3502 21 is_stmt 0 view .LVU2479 + 7352 0034 4023 movs r3, #64 + 7353 0036 2366 str r3, [r4, #96] + 7354 .L496: +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7355 .loc 1 3506 3 is_stmt 1 view .LVU2480 +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7356 .loc 1 3506 7 is_stmt 0 view .LVU2481 + 7357 0038 FFF7FEFF bl HAL_GetTick + 7358 .LVL461: +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7359 .loc 1 3506 7 discriminator 1 view .LVU2482 + 7360 003c 0090 str r0, [sp] + 7361 003e 6423 movs r3, #100 + 7362 0040 0022 movs r2, #0 + 7363 0042 4FF4C061 mov r1, #1536 + 7364 0046 2046 mov r0, r4 + 7365 0048 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + ARM GAS /tmp/ccZ0BHQJ.s page 247 + + + 7366 .LVL462: +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7367 .loc 1 3506 6 discriminator 2 view .LVU2483 + 7368 004c 08B1 cbz r0, .L497 +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7369 .loc 1 3508 5 is_stmt 1 view .LVU2484 +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7370 .loc 1 3508 21 is_stmt 0 view .LVU2485 + 7371 004e 4023 movs r3, #64 + 7372 0050 2366 str r3, [r4, #96] + 7373 .L497: +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7374 .loc 1 3512 3 is_stmt 1 view .LVU2486 +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7375 .loc 1 3512 11 is_stmt 0 view .LVU2487 + 7376 0052 636D ldr r3, [r4, #84] +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7377 .loc 1 3512 6 view .LVU2488 + 7378 0054 0BB1 cbz r3, .L498 +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7379 .loc 1 3514 5 is_stmt 1 view .LVU2489 +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7380 .loc 1 3514 21 is_stmt 0 view .LVU2490 + 7381 0056 5B6B ldr r3, [r3, #52] +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7382 .loc 1 3514 8 view .LVU2491 + 7383 0058 D3B9 cbnz r3, .L495 + 7384 .L498: +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7385 .loc 1 3521 3 is_stmt 1 view .LVU2492 +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7386 .loc 1 3521 21 is_stmt 0 view .LVU2493 + 7387 005a 0023 movs r3, #0 + 7388 005c A4F84630 strh r3, [r4, #70] @ movhi +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7389 .loc 1 3522 3 is_stmt 1 view .LVU2494 +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7390 .loc 1 3522 21 is_stmt 0 view .LVU2495 + 7391 0060 E387 strh r3, [r4, #62] @ movhi +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7392 .loc 1 3525 3 is_stmt 1 view .LVU2496 +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7393 .loc 1 3525 11 is_stmt 0 view .LVU2497 + 7394 0062 236E ldr r3, [r4, #96] +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7395 .loc 1 3525 6 view .LVU2498 + 7396 0064 402B cmp r3, #64 + 7397 0066 01D0 beq .L500 +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7398 .loc 1 3528 5 is_stmt 1 view .LVU2499 +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7399 .loc 1 3528 21 is_stmt 0 view .LVU2500 + 7400 0068 0023 movs r3, #0 + 7401 006a 2366 str r3, [r4, #96] + 7402 .L500: +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7403 .loc 1 3532 3 is_stmt 1 view .LVU2501 + ARM GAS /tmp/ccZ0BHQJ.s page 248 + + + 7404 .LBB13: +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7405 .loc 1 3532 3 view .LVU2502 + 7406 006c 0022 movs r2, #0 + 7407 006e 0292 str r2, [sp, #8] +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7408 .loc 1 3532 3 view .LVU2503 + 7409 0070 2368 ldr r3, [r4] + 7410 0072 D968 ldr r1, [r3, #12] + 7411 0074 0291 str r1, [sp, #8] +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7412 .loc 1 3532 3 view .LVU2504 + 7413 0076 9968 ldr r1, [r3, #8] + 7414 0078 0291 str r1, [sp, #8] +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7415 .loc 1 3532 3 view .LVU2505 + 7416 007a 0299 ldr r1, [sp, #8] + 7417 .LBE13: +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7418 .loc 1 3532 3 view .LVU2506 +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7419 .loc 1 3533 3 view .LVU2507 + 7420 .LBB14: +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7421 .loc 1 3533 3 view .LVU2508 + 7422 007c 0392 str r2, [sp, #12] +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7423 .loc 1 3533 3 view .LVU2509 + 7424 007e 9B68 ldr r3, [r3, #8] + 7425 0080 0393 str r3, [sp, #12] +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7426 .loc 1 3533 3 view .LVU2510 + 7427 0082 039B ldr r3, [sp, #12] + 7428 .LBE14: +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7429 .loc 1 3533 3 view .LVU2511 +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7430 .loc 1 3536 3 view .LVU2512 +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7431 .loc 1 3536 16 is_stmt 0 view .LVU2513 + 7432 0084 0123 movs r3, #1 + 7433 0086 84F85D30 strb r3, [r4, #93] +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 7434 .loc 1 3542 3 is_stmt 1 view .LVU2514 + 7435 008a 2046 mov r0, r4 + 7436 008c FFF7FEFF bl HAL_SPI_AbortCpltCallback + 7437 .LVL463: + 7438 .L495: +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7439 .loc 1 3544 1 is_stmt 0 view .LVU2515 + 7440 0090 05B0 add sp, sp, #20 + 7441 .cfi_def_cfa_offset 12 + 7442 @ sp needed + 7443 0092 30BD pop {r4, r5, pc} +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7444 .loc 1 3544 1 view .LVU2516 + 7445 .cfi_endproc + ARM GAS /tmp/ccZ0BHQJ.s page 249 + + + 7446 .LFE168: + 7448 .section .text.SPI_DMATxAbortCallback,"ax",%progbits + 7449 .align 1 + 7450 .syntax unified + 7451 .thumb + 7452 .thumb_func + 7454 SPI_DMATxAbortCallback: + 7455 .LVL464: + 7456 .LFB167: +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7457 .loc 1 3422 1 is_stmt 1 view -0 + 7458 .cfi_startproc + 7459 @ args = 0, pretend = 0, frame = 8 + 7460 @ frame_needed = 0, uses_anonymous_args = 0 +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7461 .loc 1 3422 1 is_stmt 0 view .LVU2518 + 7462 0000 10B5 push {r4, lr} + 7463 .cfi_def_cfa_offset 8 + 7464 .cfi_offset 4, -8 + 7465 .cfi_offset 14, -4 + 7466 0002 84B0 sub sp, sp, #16 + 7467 .cfi_def_cfa_offset 24 +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7468 .loc 1 3423 3 is_stmt 1 view .LVU2519 +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7469 .loc 1 3423 22 is_stmt 0 view .LVU2520 + 7470 0004 446A ldr r4, [r0, #36] + 7471 .LVL465: +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7472 .loc 1 3425 3 is_stmt 1 view .LVU2521 +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7473 .loc 1 3425 7 is_stmt 0 view .LVU2522 + 7474 0006 636D ldr r3, [r4, #84] +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7475 .loc 1 3425 35 view .LVU2523 + 7476 0008 0022 movs r2, #0 + 7477 000a 5A63 str r2, [r3, #52] +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7478 .loc 1 3428 3 is_stmt 1 view .LVU2524 + 7479 000c 2268 ldr r2, [r4] + 7480 000e 5368 ldr r3, [r2, #4] + 7481 0010 23F00203 bic r3, r3, #2 + 7482 0014 5360 str r3, [r2, #4] +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7483 .loc 1 3430 3 view .LVU2525 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7484 .loc 1 3430 7 is_stmt 0 view .LVU2526 + 7485 0016 FFF7FEFF bl HAL_GetTick + 7486 .LVL466: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7487 .loc 1 3430 7 view .LVU2527 + 7488 001a 0246 mov r2, r0 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7489 .loc 1 3430 7 discriminator 1 view .LVU2528 + 7490 001c 6421 movs r1, #100 + 7491 001e 2046 mov r0, r4 + 7492 0020 FFF7FEFF bl SPI_EndRxTxTransaction + ARM GAS /tmp/ccZ0BHQJ.s page 250 + + + 7493 .LVL467: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7494 .loc 1 3430 6 discriminator 2 view .LVU2529 + 7495 0024 08B1 cbz r0, .L503 +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7496 .loc 1 3432 5 is_stmt 1 view .LVU2530 +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7497 .loc 1 3432 21 is_stmt 0 view .LVU2531 + 7498 0026 4023 movs r3, #64 + 7499 0028 2366 str r3, [r4, #96] + 7500 .L503: +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7501 .loc 1 3436 3 is_stmt 1 view .LVU2532 + 7502 002a 2268 ldr r2, [r4] + 7503 002c 1368 ldr r3, [r2] + 7504 002e 23F04003 bic r3, r3, #64 + 7505 0032 1360 str r3, [r2] +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7506 .loc 1 3439 3 view .LVU2533 +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7507 .loc 1 3439 7 is_stmt 0 view .LVU2534 + 7508 0034 FFF7FEFF bl HAL_GetTick + 7509 .LVL468: +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7510 .loc 1 3439 7 discriminator 1 view .LVU2535 + 7511 0038 0090 str r0, [sp] + 7512 003a 6423 movs r3, #100 + 7513 003c 0022 movs r2, #0 + 7514 003e 4FF4C061 mov r1, #1536 + 7515 0042 2046 mov r0, r4 + 7516 0044 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 7517 .LVL469: +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7518 .loc 1 3439 6 discriminator 2 view .LVU2536 + 7519 0048 08B1 cbz r0, .L504 +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7520 .loc 1 3441 5 is_stmt 1 view .LVU2537 +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7521 .loc 1 3441 21 is_stmt 0 view .LVU2538 + 7522 004a 4023 movs r3, #64 + 7523 004c 2366 str r3, [r4, #96] + 7524 .L504: +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7525 .loc 1 3445 3 is_stmt 1 view .LVU2539 +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7526 .loc 1 3445 11 is_stmt 0 view .LVU2540 + 7527 004e A36D ldr r3, [r4, #88] +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7528 .loc 1 3445 6 view .LVU2541 + 7529 0050 0BB1 cbz r3, .L505 +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7530 .loc 1 3447 5 is_stmt 1 view .LVU2542 +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7531 .loc 1 3447 21 is_stmt 0 view .LVU2543 + 7532 0052 5B6B ldr r3, [r3, #52] +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7533 .loc 1 3447 8 view .LVU2544 + ARM GAS /tmp/ccZ0BHQJ.s page 251 + + + 7534 0054 D3B9 cbnz r3, .L502 + 7535 .L505: +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7536 .loc 1 3454 3 is_stmt 1 view .LVU2545 +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7537 .loc 1 3454 21 is_stmt 0 view .LVU2546 + 7538 0056 0023 movs r3, #0 + 7539 0058 A4F84630 strh r3, [r4, #70] @ movhi +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7540 .loc 1 3455 3 is_stmt 1 view .LVU2547 +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7541 .loc 1 3455 21 is_stmt 0 view .LVU2548 + 7542 005c E387 strh r3, [r4, #62] @ movhi +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7543 .loc 1 3458 3 is_stmt 1 view .LVU2549 +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7544 .loc 1 3458 11 is_stmt 0 view .LVU2550 + 7545 005e 236E ldr r3, [r4, #96] +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7546 .loc 1 3458 6 view .LVU2551 + 7547 0060 402B cmp r3, #64 + 7548 0062 01D0 beq .L507 +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7549 .loc 1 3461 5 is_stmt 1 view .LVU2552 +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7550 .loc 1 3461 21 is_stmt 0 view .LVU2553 + 7551 0064 0023 movs r3, #0 + 7552 0066 2366 str r3, [r4, #96] + 7553 .L507: +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7554 .loc 1 3465 3 is_stmt 1 view .LVU2554 + 7555 .LBB15: +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7556 .loc 1 3465 3 view .LVU2555 + 7557 0068 0022 movs r2, #0 + 7558 006a 0292 str r2, [sp, #8] +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7559 .loc 1 3465 3 view .LVU2556 + 7560 006c 2368 ldr r3, [r4] + 7561 006e D968 ldr r1, [r3, #12] + 7562 0070 0291 str r1, [sp, #8] +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7563 .loc 1 3465 3 view .LVU2557 + 7564 0072 9968 ldr r1, [r3, #8] + 7565 0074 0291 str r1, [sp, #8] +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7566 .loc 1 3465 3 view .LVU2558 + 7567 0076 0299 ldr r1, [sp, #8] + 7568 .LBE15: +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7569 .loc 1 3465 3 view .LVU2559 +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7570 .loc 1 3466 3 view .LVU2560 + 7571 .LBB16: +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7572 .loc 1 3466 3 view .LVU2561 + 7573 0078 0392 str r2, [sp, #12] + ARM GAS /tmp/ccZ0BHQJ.s page 252 + + +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7574 .loc 1 3466 3 view .LVU2562 + 7575 007a 9B68 ldr r3, [r3, #8] + 7576 007c 0393 str r3, [sp, #12] +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7577 .loc 1 3466 3 view .LVU2563 + 7578 007e 039B ldr r3, [sp, #12] + 7579 .LBE16: +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7580 .loc 1 3466 3 view .LVU2564 +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7581 .loc 1 3469 3 view .LVU2565 +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7582 .loc 1 3469 16 is_stmt 0 view .LVU2566 + 7583 0080 0123 movs r3, #1 + 7584 0082 84F85D30 strb r3, [r4, #93] +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 7585 .loc 1 3475 3 is_stmt 1 view .LVU2567 + 7586 0086 2046 mov r0, r4 + 7587 0088 FFF7FEFF bl HAL_SPI_AbortCpltCallback + 7588 .LVL470: + 7589 .L502: +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7590 .loc 1 3477 1 is_stmt 0 view .LVU2568 + 7591 008c 04B0 add sp, sp, #16 + 7592 .cfi_def_cfa_offset 8 + 7593 @ sp needed + 7594 008e 10BD pop {r4, pc} +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7595 .loc 1 3477 1 view .LVU2569 + 7596 .cfi_endproc + 7597 .LFE167: + 7599 .section .text.HAL_SPI_GetState,"ax",%progbits + 7600 .align 1 + 7601 .global HAL_SPI_GetState + 7602 .syntax unified + 7603 .thumb + 7604 .thumb_func + 7606 HAL_SPI_GetState: + 7607 .LVL471: + 7608 .LFB157: +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI handle state */ + 7609 .loc 1 3012 1 is_stmt 1 view -0 + 7610 .cfi_startproc + 7611 @ args = 0, pretend = 0, frame = 0 + 7612 @ frame_needed = 0, uses_anonymous_args = 0 + 7613 @ link register save eliminated. +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7614 .loc 1 3014 3 view .LVU2571 +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7615 .loc 1 3014 14 is_stmt 0 view .LVU2572 + 7616 0000 90F85D00 ldrb r0, [r0, #93] @ zero_extendqisi2 + 7617 .LVL472: +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7618 .loc 1 3015 1 view .LVU2573 + 7619 0004 7047 bx lr + 7620 .cfi_endproc + ARM GAS /tmp/ccZ0BHQJ.s page 253 + + + 7621 .LFE157: + 7623 .section .text.HAL_SPI_GetError,"ax",%progbits + 7624 .align 1 + 7625 .global HAL_SPI_GetError + 7626 .syntax unified + 7627 .thumb + 7628 .thumb_func + 7630 HAL_SPI_GetError: + 7631 .LVL473: + 7632 .LFB158: +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI ErrorCode */ + 7633 .loc 1 3024 1 is_stmt 1 view -0 + 7634 .cfi_startproc + 7635 @ args = 0, pretend = 0, frame = 0 + 7636 @ frame_needed = 0, uses_anonymous_args = 0 + 7637 @ link register save eliminated. +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7638 .loc 1 3026 3 view .LVU2575 +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7639 .loc 1 3026 14 is_stmt 0 view .LVU2576 + 7640 0000 006E ldr r0, [r0, #96] + 7641 .LVL474: +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7642 .loc 1 3027 1 view .LVU2577 + 7643 0002 7047 bx lr + 7644 .cfi_endproc + 7645 .LFE158: + 7647 .text + 7648 .Letext0: + 7649 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 7650 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 7651 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 7652 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 7653 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 7654 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 7655 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 7656 .file 9 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 7657 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccZ0BHQJ.s page 254 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_spi.c + /tmp/ccZ0BHQJ.s:21 .text.SPI_WaitFlagStateUntilTimeout:00000000 $t + /tmp/ccZ0BHQJ.s:26 .text.SPI_WaitFlagStateUntilTimeout:00000000 SPI_WaitFlagStateUntilTimeout + /tmp/ccZ0BHQJ.s:200 .text.SPI_WaitFlagStateUntilTimeout:000000c4 $d + /tmp/ccZ0BHQJ.s:205 .text.SPI_WaitFifoStateUntilTimeout:00000000 $t + /tmp/ccZ0BHQJ.s:210 .text.SPI_WaitFifoStateUntilTimeout:00000000 SPI_WaitFifoStateUntilTimeout + /tmp/ccZ0BHQJ.s:415 .text.SPI_WaitFifoStateUntilTimeout:000000ec $d + /tmp/ccZ0BHQJ.s:420 .text.SPI_EndRxTxTransaction:00000000 $t + /tmp/ccZ0BHQJ.s:425 .text.SPI_EndRxTxTransaction:00000000 SPI_EndRxTxTransaction + /tmp/ccZ0BHQJ.s:518 .text.SPI_EndRxTransaction:00000000 $t + /tmp/ccZ0BHQJ.s:523 .text.SPI_EndRxTransaction:00000000 SPI_EndRxTransaction + /tmp/ccZ0BHQJ.s:642 .text.SPI_AbortRx_ISR:00000000 $t + /tmp/ccZ0BHQJ.s:647 .text.SPI_AbortRx_ISR:00000000 SPI_AbortRx_ISR + /tmp/ccZ0BHQJ.s:762 .text.SPI_AbortRx_ISR:00000088 $d + /tmp/ccZ0BHQJ.s:768 .text.SPI_AbortTx_ISR:00000000 $t + /tmp/ccZ0BHQJ.s:773 .text.SPI_AbortTx_ISR:00000000 SPI_AbortTx_ISR + /tmp/ccZ0BHQJ.s:961 .text.SPI_AbortTx_ISR:000000e8 $d + /tmp/ccZ0BHQJ.s:967 .text.HAL_SPI_MspInit:00000000 $t + /tmp/ccZ0BHQJ.s:973 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit + /tmp/ccZ0BHQJ.s:988 .text.HAL_SPI_Init:00000000 $t + /tmp/ccZ0BHQJ.s:994 .text.HAL_SPI_Init:00000000 HAL_SPI_Init + /tmp/ccZ0BHQJ.s:1181 .text.HAL_SPI_MspDeInit:00000000 $t + /tmp/ccZ0BHQJ.s:1187 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit + /tmp/ccZ0BHQJ.s:1202 .text.HAL_SPI_DeInit:00000000 $t + /tmp/ccZ0BHQJ.s:1208 .text.HAL_SPI_DeInit:00000000 HAL_SPI_DeInit + /tmp/ccZ0BHQJ.s:1265 .text.HAL_SPI_Transmit:00000000 $t + /tmp/ccZ0BHQJ.s:1271 .text.HAL_SPI_Transmit:00000000 HAL_SPI_Transmit + /tmp/ccZ0BHQJ.s:1743 .text.HAL_SPI_TransmitReceive:00000000 $t + /tmp/ccZ0BHQJ.s:1749 .text.HAL_SPI_TransmitReceive:00000000 HAL_SPI_TransmitReceive + /tmp/ccZ0BHQJ.s:2475 .text.HAL_SPI_Receive:00000000 $t + /tmp/ccZ0BHQJ.s:2481 .text.HAL_SPI_Receive:00000000 HAL_SPI_Receive + /tmp/ccZ0BHQJ.s:2849 .text.HAL_SPI_Transmit_IT:00000000 $t + /tmp/ccZ0BHQJ.s:2855 .text.HAL_SPI_Transmit_IT:00000000 HAL_SPI_Transmit_IT + /tmp/ccZ0BHQJ.s:3020 .text.HAL_SPI_Transmit_IT:000000a8 $d + /tmp/ccZ0BHQJ.s:5520 .text.SPI_TxISR_16BIT:00000000 SPI_TxISR_16BIT + /tmp/ccZ0BHQJ.s:5459 .text.SPI_TxISR_8BIT:00000000 SPI_TxISR_8BIT + /tmp/ccZ0BHQJ.s:3026 .text.HAL_SPI_TransmitReceive_IT:00000000 $t + /tmp/ccZ0BHQJ.s:3032 .text.HAL_SPI_TransmitReceive_IT:00000000 HAL_SPI_TransmitReceive_IT + /tmp/ccZ0BHQJ.s:3283 .text.HAL_SPI_TransmitReceive_IT:00000104 $d + /tmp/ccZ0BHQJ.s:6161 .text.SPI_2linesRxISR_16BIT:00000000 SPI_2linesRxISR_16BIT + /tmp/ccZ0BHQJ.s:6089 .text.SPI_2linesTxISR_16BIT:00000000 SPI_2linesTxISR_16BIT + /tmp/ccZ0BHQJ.s:5972 .text.SPI_2linesRxISR_8BIT:00000000 SPI_2linesRxISR_8BIT + /tmp/ccZ0BHQJ.s:5867 .text.SPI_2linesTxISR_8BIT:00000000 SPI_2linesTxISR_8BIT + /tmp/ccZ0BHQJ.s:3291 .text.HAL_SPI_Receive_IT:00000000 $t + /tmp/ccZ0BHQJ.s:3297 .text.HAL_SPI_Receive_IT:00000000 HAL_SPI_Receive_IT + /tmp/ccZ0BHQJ.s:3496 .text.HAL_SPI_Receive_IT:000000f8 $d + /tmp/ccZ0BHQJ.s:5711 .text.SPI_RxISR_16BIT:00000000 SPI_RxISR_16BIT + /tmp/ccZ0BHQJ.s:5650 .text.SPI_RxISR_8BIT:00000000 SPI_RxISR_8BIT + /tmp/ccZ0BHQJ.s:3502 .text.HAL_SPI_Transmit_DMA:00000000 $t + /tmp/ccZ0BHQJ.s:3508 .text.HAL_SPI_Transmit_DMA:00000000 HAL_SPI_Transmit_DMA + /tmp/ccZ0BHQJ.s:3764 .text.HAL_SPI_Transmit_DMA:00000124 $d + /tmp/ccZ0BHQJ.s:5201 .text.SPI_DMAHalfTransmitCplt:00000000 SPI_DMAHalfTransmitCplt + /tmp/ccZ0BHQJ.s:6276 .text.SPI_DMATransmitCplt:00000000 SPI_DMATransmitCplt + /tmp/ccZ0BHQJ.s:6233 .text.SPI_DMAError:00000000 SPI_DMAError + /tmp/ccZ0BHQJ.s:3771 .text.HAL_SPI_TransmitReceive_DMA:00000000 $t + /tmp/ccZ0BHQJ.s:3777 .text.HAL_SPI_TransmitReceive_DMA:00000000 HAL_SPI_TransmitReceive_DMA + ARM GAS /tmp/ccZ0BHQJ.s page 255 + + + /tmp/ccZ0BHQJ.s:4234 .text.HAL_SPI_TransmitReceive_DMA:00000210 $d + /tmp/ccZ0BHQJ.s:5305 .text.SPI_DMAHalfTransmitReceiveCplt:00000000 SPI_DMAHalfTransmitReceiveCplt + /tmp/ccZ0BHQJ.s:6515 .text.SPI_DMATransmitReceiveCplt:00000000 SPI_DMATransmitReceiveCplt + /tmp/ccZ0BHQJ.s:5253 .text.SPI_DMAHalfReceiveCplt:00000000 SPI_DMAHalfReceiveCplt + /tmp/ccZ0BHQJ.s:6399 .text.SPI_DMAReceiveCplt:00000000 SPI_DMAReceiveCplt + /tmp/ccZ0BHQJ.s:4243 .text.HAL_SPI_Receive_DMA:00000000 $t + /tmp/ccZ0BHQJ.s:4249 .text.HAL_SPI_Receive_DMA:00000000 HAL_SPI_Receive_DMA + /tmp/ccZ0BHQJ.s:4557 .text.HAL_SPI_Receive_DMA:00000184 $d + /tmp/ccZ0BHQJ.s:4564 .text.HAL_SPI_Abort:00000000 $t + /tmp/ccZ0BHQJ.s:4570 .text.HAL_SPI_Abort:00000000 HAL_SPI_Abort + /tmp/ccZ0BHQJ.s:4914 .text.HAL_SPI_Abort:00000180 $d + /tmp/ccZ0BHQJ.s:4922 .text.HAL_SPI_DMAPause:00000000 $t + /tmp/ccZ0BHQJ.s:4928 .text.HAL_SPI_DMAPause:00000000 HAL_SPI_DMAPause + /tmp/ccZ0BHQJ.s:4972 .text.HAL_SPI_DMAResume:00000000 $t + /tmp/ccZ0BHQJ.s:4978 .text.HAL_SPI_DMAResume:00000000 HAL_SPI_DMAResume + /tmp/ccZ0BHQJ.s:5022 .text.HAL_SPI_DMAStop:00000000 $t + /tmp/ccZ0BHQJ.s:5028 .text.HAL_SPI_DMAStop:00000000 HAL_SPI_DMAStop + /tmp/ccZ0BHQJ.s:5112 .text.HAL_SPI_TxCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5118 .text.HAL_SPI_TxCpltCallback:00000000 HAL_SPI_TxCpltCallback + /tmp/ccZ0BHQJ.s:5133 .text.HAL_SPI_RxCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5139 .text.HAL_SPI_RxCpltCallback:00000000 HAL_SPI_RxCpltCallback + /tmp/ccZ0BHQJ.s:5154 .text.HAL_SPI_TxRxCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5160 .text.HAL_SPI_TxRxCpltCallback:00000000 HAL_SPI_TxRxCpltCallback + /tmp/ccZ0BHQJ.s:5175 .text.HAL_SPI_TxHalfCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5181 .text.HAL_SPI_TxHalfCpltCallback:00000000 HAL_SPI_TxHalfCpltCallback + /tmp/ccZ0BHQJ.s:5196 .text.SPI_DMAHalfTransmitCplt:00000000 $t + /tmp/ccZ0BHQJ.s:5227 .text.HAL_SPI_RxHalfCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5233 .text.HAL_SPI_RxHalfCpltCallback:00000000 HAL_SPI_RxHalfCpltCallback + /tmp/ccZ0BHQJ.s:5248 .text.SPI_DMAHalfReceiveCplt:00000000 $t + /tmp/ccZ0BHQJ.s:5279 .text.HAL_SPI_TxRxHalfCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5285 .text.HAL_SPI_TxRxHalfCpltCallback:00000000 HAL_SPI_TxRxHalfCpltCallback + /tmp/ccZ0BHQJ.s:5300 .text.SPI_DMAHalfTransmitReceiveCplt:00000000 $t + /tmp/ccZ0BHQJ.s:5331 .text.HAL_SPI_ErrorCallback:00000000 $t + /tmp/ccZ0BHQJ.s:5337 .text.HAL_SPI_ErrorCallback:00000000 HAL_SPI_ErrorCallback + /tmp/ccZ0BHQJ.s:5352 .text.SPI_CloseTx_ISR:00000000 $t + /tmp/ccZ0BHQJ.s:5357 .text.SPI_CloseTx_ISR:00000000 SPI_CloseTx_ISR + /tmp/ccZ0BHQJ.s:5454 .text.SPI_TxISR_8BIT:00000000 $t + /tmp/ccZ0BHQJ.s:5515 .text.SPI_TxISR_16BIT:00000000 $t + /tmp/ccZ0BHQJ.s:5576 .text.SPI_CloseRx_ISR:00000000 $t + /tmp/ccZ0BHQJ.s:5581 .text.SPI_CloseRx_ISR:00000000 SPI_CloseRx_ISR + /tmp/ccZ0BHQJ.s:5645 .text.SPI_RxISR_8BIT:00000000 $t + /tmp/ccZ0BHQJ.s:5706 .text.SPI_RxISR_16BIT:00000000 $t + /tmp/ccZ0BHQJ.s:5767 .text.SPI_CloseRxTx_ISR:00000000 $t + /tmp/ccZ0BHQJ.s:5772 .text.SPI_CloseRxTx_ISR:00000000 SPI_CloseRxTx_ISR + /tmp/ccZ0BHQJ.s:5862 .text.SPI_2linesTxISR_8BIT:00000000 $t + /tmp/ccZ0BHQJ.s:5967 .text.SPI_2linesRxISR_8BIT:00000000 $t + /tmp/ccZ0BHQJ.s:6084 .text.SPI_2linesTxISR_16BIT:00000000 $t + /tmp/ccZ0BHQJ.s:6156 .text.SPI_2linesRxISR_16BIT:00000000 $t + /tmp/ccZ0BHQJ.s:6228 .text.SPI_DMAError:00000000 $t + /tmp/ccZ0BHQJ.s:6271 .text.SPI_DMATransmitCplt:00000000 $t + /tmp/ccZ0BHQJ.s:6394 .text.SPI_DMAReceiveCplt:00000000 $t + /tmp/ccZ0BHQJ.s:6510 .text.SPI_DMATransmitReceiveCplt:00000000 $t + /tmp/ccZ0BHQJ.s:6609 .text.HAL_SPI_IRQHandler:00000000 $t + /tmp/ccZ0BHQJ.s:6615 .text.HAL_SPI_IRQHandler:00000000 HAL_SPI_IRQHandler + /tmp/ccZ0BHQJ.s:6884 .text.HAL_SPI_IRQHandler:00000120 $d + /tmp/ccZ0BHQJ.s:6894 .text.SPI_DMAAbortOnError:00000000 SPI_DMAAbortOnError + /tmp/ccZ0BHQJ.s:6889 .text.SPI_DMAAbortOnError:00000000 $t + ARM GAS /tmp/ccZ0BHQJ.s page 256 + + + /tmp/ccZ0BHQJ.s:6926 .text.HAL_SPI_AbortCpltCallback:00000000 $t + /tmp/ccZ0BHQJ.s:6932 .text.HAL_SPI_AbortCpltCallback:00000000 HAL_SPI_AbortCpltCallback + /tmp/ccZ0BHQJ.s:6947 .text.HAL_SPI_Abort_IT:00000000 $t + /tmp/ccZ0BHQJ.s:6953 .text.HAL_SPI_Abort_IT:00000000 HAL_SPI_Abort_IT + /tmp/ccZ0BHQJ.s:7286 .text.HAL_SPI_Abort_IT:00000148 $d + /tmp/ccZ0BHQJ.s:7454 .text.SPI_DMATxAbortCallback:00000000 SPI_DMATxAbortCallback + /tmp/ccZ0BHQJ.s:7301 .text.SPI_DMARxAbortCallback:00000000 SPI_DMARxAbortCallback + /tmp/ccZ0BHQJ.s:7296 .text.SPI_DMARxAbortCallback:00000000 $t + /tmp/ccZ0BHQJ.s:7449 .text.SPI_DMATxAbortCallback:00000000 $t + /tmp/ccZ0BHQJ.s:7600 .text.HAL_SPI_GetState:00000000 $t + /tmp/ccZ0BHQJ.s:7606 .text.HAL_SPI_GetState:00000000 HAL_SPI_GetState + /tmp/ccZ0BHQJ.s:7624 .text.HAL_SPI_GetError:00000000 $t + /tmp/ccZ0BHQJ.s:7630 .text.HAL_SPI_GetError:00000000 HAL_SPI_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +SystemCoreClock +HAL_DMA_Start_IT +HAL_DMA_Abort +HAL_DMA_Abort_IT diff --git a/build/stm32f3xx_hal_spi.o b/build/stm32f3xx_hal_spi.o new file mode 100644 index 0000000..ad2cd2c Binary files /dev/null and b/build/stm32f3xx_hal_spi.o differ diff --git a/build/stm32f3xx_hal_spi_ex.d b/build/stm32f3xx_hal_spi_ex.d new file mode 100644 index 0000000..40c6015 --- /dev/null +++ b/build/stm32f3xx_hal_spi_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_spi_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_spi_ex.lst b/build/stm32f3xx_hal_spi_ex.lst new file mode 100644 index 0000000..e1496e9 --- /dev/null +++ b/build/stm32f3xx_hal_spi_ex.lst @@ -0,0 +1,235 @@ +ARM GAS /tmp/ccBq5tVX.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_spi_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c" + 20 .section .text.HAL_SPIEx_FlushRxFifo,"ax",%progbits + 21 .align 1 + 22 .global HAL_SPIEx_FlushRxFifo + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_SPIEx_FlushRxFifo: + 28 .LVL0: + 29 .LFB130: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @file stm32f3xx_hal_spi_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Extended SPI HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * SPI peripheral extended functionalities : + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + IO operation functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ****************************************************************************** + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @attention + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * All rights reserved. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * in the root directory of this software component. + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ****************************************************************************** + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Includes ------------------------------------------------------------------*/ + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #include "stm32f3xx_hal.h" + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + ARM GAS /tmp/ccBq5tVX.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx SPIEx + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief SPI Extended HAL module driver + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #ifdef HAL_SPI_MODULE_ENABLED + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private defines -----------------------------------------------------------*/ + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Private_Constants SPIEx Private Constants + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #define SPI_FIFO_SIZE 4UL + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @} + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private macros ------------------------------------------------------------*/ + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private variables ---------------------------------------------------------*/ + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Exported functions --------------------------------------------------------*/ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Data transfers functions + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** @verbatim + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ============================================================================== + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ##### IO operation functions ##### + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** =============================================================================== + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** [..] + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** This subsection provides a set of extended functions to manage the SPI + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** data transfers. + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** (#) Rx data flush function: + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** (++) HAL_SPIEx_FlushRxFifo() + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** @endverbatim + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Flush the RX fifo. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * the configuration information for the specified SPI module. + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @retval HAL status + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi) + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** { + 30 .loc 1 80 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 8 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** __IO uint32_t tmpreg; + ARM GAS /tmp/ccBq5tVX.s page 3 + + + 35 .loc 1 81 3 view .LVU1 + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** uint8_t count = 0U; + 36 .loc 1 82 3 view .LVU2 + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) + 37 .loc 1 83 3 view .LVU3 + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** uint8_t count = 0U; + 38 .loc 1 82 12 is_stmt 0 view .LVU4 + 39 0000 0023 movs r3, #0 + 40 .LVL1: + 41 .loc 1 83 48 is_stmt 1 view .LVU5 + 42 .loc 1 83 15 is_stmt 0 view .LVU6 + 43 0002 0268 ldr r2, [r0] + 44 .loc 1 83 25 view .LVU7 + 45 0004 9168 ldr r1, [r2, #8] + 46 .loc 1 83 48 view .LVU8 + 47 0006 11F4C06F tst r1, #1536 + 48 000a 12D0 beq .L10 + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** __IO uint32_t tmpreg; + 49 .loc 1 80 1 view .LVU9 + 50 000c 82B0 sub sp, sp, #8 + 51 .cfi_def_cfa_offset 8 + 52 000e 04E0 b .L4 + 53 .L12: + 54 .loc 1 83 48 is_stmt 1 view .LVU10 + 55 .loc 1 83 15 is_stmt 0 view .LVU11 + 56 0010 0268 ldr r2, [r0] + 57 .loc 1 83 25 view .LVU12 + 58 0012 9168 ldr r1, [r2, #8] + 59 .loc 1 83 48 view .LVU13 + 60 0014 11F4C06F tst r1, #1536 + 61 0018 09D0 beq .L11 + 62 .L4: + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** { + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** count++; + 63 .loc 1 85 5 is_stmt 1 view .LVU14 + 64 .loc 1 85 10 is_stmt 0 view .LVU15 + 65 001a 0133 adds r3, r3, #1 + 66 .LVL2: + 67 .loc 1 85 10 view .LVU16 + 68 001c DBB2 uxtb r3, r3 + 69 .LVL3: + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** tmpreg = hspi->Instance->DR; + 70 .loc 1 86 5 is_stmt 1 view .LVU17 + 71 .loc 1 86 28 is_stmt 0 view .LVU18 + 72 001e D268 ldr r2, [r2, #12] + 73 .loc 1 86 12 view .LVU19 + 74 0020 0192 str r2, [sp, #4] + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** UNUSED(tmpreg); /* To avoid GCC warning */ + 75 .loc 1 87 5 is_stmt 1 view .LVU20 + 76 0022 019A ldr r2, [sp, #4] + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** if (count == SPI_FIFO_SIZE) + 77 .loc 1 88 5 view .LVU21 + 78 .loc 1 88 8 is_stmt 0 view .LVU22 + 79 0024 042B cmp r3, #4 + 80 0026 F3D1 bne .L12 + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** { + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** return HAL_TIMEOUT; + ARM GAS /tmp/ccBq5tVX.s page 4 + + + 81 .loc 1 90 14 view .LVU23 + 82 0028 0320 movs r0, #3 + 83 .LVL4: + 84 .L3: + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** return HAL_OK; + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 85 .loc 1 94 1 view .LVU24 + 86 002a 02B0 add sp, sp, #8 + 87 .cfi_remember_state + 88 .cfi_def_cfa_offset 0 + 89 @ sp needed + 90 002c 7047 bx lr + 91 .LVL5: + 92 .L11: + 93 .cfi_restore_state + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 94 .loc 1 93 10 view .LVU25 + 95 002e 0020 movs r0, #0 + 96 .LVL6: + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 97 .loc 1 93 10 view .LVU26 + 98 0030 FBE7 b .L3 + 99 .LVL7: + 100 .L10: + 101 .cfi_def_cfa_offset 0 + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 102 .loc 1 93 10 view .LVU27 + 103 0032 0020 movs r0, #0 + 104 .LVL8: + 105 .loc 1 94 1 view .LVU28 + 106 0034 7047 bx lr + 107 .cfi_endproc + 108 .LFE130: + 110 .text + 111 .Letext0: + 112 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 113 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 114 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 115 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 116 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 117 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + ARM GAS /tmp/ccBq5tVX.s page 5 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_spi_ex.c + /tmp/ccBq5tVX.s:21 .text.HAL_SPIEx_FlushRxFifo:00000000 $t + /tmp/ccBq5tVX.s:27 .text.HAL_SPIEx_FlushRxFifo:00000000 HAL_SPIEx_FlushRxFifo + +NO UNDEFINED SYMBOLS diff --git a/build/stm32f3xx_hal_spi_ex.o b/build/stm32f3xx_hal_spi_ex.o new file mode 100644 index 0000000..1b1dcf6 Binary files /dev/null and b/build/stm32f3xx_hal_spi_ex.o differ diff --git a/build/stm32f3xx_hal_tim.d b/build/stm32f3xx_hal_tim.d new file mode 100644 index 0000000..498cea5 --- /dev/null +++ b/build/stm32f3xx_hal_tim.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_tim.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_tim.lst b/build/stm32f3xx_hal_tim.lst new file mode 100644 index 0000000..c8f6858 --- /dev/null +++ b/build/stm32f3xx_hal_tim.lst @@ -0,0 +1,30084 @@ +ARM GAS /tmp/cc0aF2h1.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_tim.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c" + 20 .section .text.TIM_OC1_SetConfig,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 TIM_OC1_SetConfig: + 27 .LVL0: + 28 .LFB235: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @file stm32f3xx_hal_tim.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * functionalities of the Timer (TIM) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Time Base Initialization + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Time Base Start + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Time Base Start Interruption + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Time Base Start DMA + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Output Compare/PWM Initialization + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Output Compare/PWM Channel Configuration + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Output Compare/PWM Start + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Output Compare/PWM Start Interruption + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Output Compare/PWM Start DMA + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Input Capture Initialization + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Input Capture Channel Configuration + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Input Capture Start + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Input Capture Start Interruption + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Input Capture Start DMA + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM One Pulse Initialization + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM One Pulse Channel Configuration + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM One Pulse Start + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Encoder Interface Initialization + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Encoder Interface Start + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Encoder Interface Start Interruption + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM Encoder Interface Start DMA + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + Commutation Event configuration with Interruption and DMA + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM OCRef clear configuration + ARM GAS /tmp/cc0aF2h1.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + TIM External Clock configuration + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ****************************************************************************** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @attention + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Copyright (c) 2016 STMicroelectronics. + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * All rights reserved. + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This software is licensed under terms that can be found in the LICENSE file + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * in the root directory of this software component. + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ****************************************************************************** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIMER Generic features ##### + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] The Timer features include: + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) 16-bit up, down, up/down auto-reload counter. + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) 16-bit programmable prescaler allowing dividing (also on the fly) the + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** counter clock frequency either by any factor between 1 and 65536. + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Up to 4 independent channels for: + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Input Capture + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Output Compare + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) PWM generation (Edge and Center-aligned Mode) + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) One-pulse mode output + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Synchronization circuit to control the timer with external signals and to interconnect + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** several timers together. + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Supports incremental encoder for positioning purposes + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### How to use this driver ##### + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Initialize the TIM low level resources by implementing the following functions + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** depending on the selected feature: + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Time Base : HAL_TIM_Base_MspInit() + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Input Capture : HAL_TIM_IC_MspInit() + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Output Compare : HAL_TIM_OC_MspInit() + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) PWM generation : HAL_TIM_PWM_MspInit() + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit() + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Encoder mode output : HAL_TIM_Encoder_MspInit() + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Initialize the TIM low level resources : + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (##) TIM pins configuration + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+++) Enable the clock for the TIM GPIOs using the following function: + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_RCC_GPIOx_CLK_ENABLE(); + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) The external Clock can be configured, if needed (the default clock is the + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** internal clock from the APBx), using the following function: + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ConfigClockSource, the clock configuration should be done before + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** any start function. + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Configure the TIM in the desired functioning mode using one of the + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Initialization function of this driver: + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an + ARM GAS /tmp/cc0aF2h1.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Output Compare signal. + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** PWM signal. + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** external signal. + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** in One Pulse Mode. + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface. + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) Activate the TIM peripheral using one of the start functions depending from the feature us + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT() + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT() + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT() + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT() + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (#) The DMA Burst is managed with the two following functions: + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_DMABurst_WriteStart() + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_DMABurst_ReadStart() + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** *** Callback registration *** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================= + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** The compilation define USE_HAL_TIM_REGISTER_CALLBACKS when set to 1 + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** allows the user to configure dynamically the driver callbacks. + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Use Function HAL_TIM_RegisterCallback() to register a callback. + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle, + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the Callback ID and a pointer to the user callback function. + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Use function HAL_TIM_UnRegisterCallback() to reset a callback to the default + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** weak function. + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle, + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** and the Callback ID. + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** These functions allow to register/unregister following callbacks: + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Base_MspInitCallback : TIM Base Msp Init Callback. + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Base_MspDeInitCallback : TIM Base Msp DeInit Callback. + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) IC_MspInitCallback : TIM IC Msp Init Callback. + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) IC_MspDeInitCallback : TIM IC Msp DeInit Callback. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) OC_MspInitCallback : TIM OC Msp Init Callback. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) OC_MspDeInitCallback : TIM OC Msp DeInit Callback. + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) PWM_MspInitCallback : TIM PWM Msp Init Callback. + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) PWM_MspDeInitCallback : TIM PWM Msp DeInit Callback. + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) OnePulse_MspInitCallback : TIM One Pulse Msp Init Callback. + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) OnePulse_MspDeInitCallback : TIM One Pulse Msp DeInit Callback. + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Encoder_MspInitCallback : TIM Encoder Msp Init Callback. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Encoder_MspDeInitCallback : TIM Encoder Msp DeInit Callback. + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) HallSensor_MspInitCallback : TIM Hall Sensor Msp Init Callback. + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) HallSensor_MspDeInitCallback : TIM Hall Sensor Msp DeInit Callback. + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) PeriodElapsedCallback : TIM Period Elapsed Callback. + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) PeriodElapsedHalfCpltCallback : TIM Period Elapsed half complete Callback. + ARM GAS /tmp/cc0aF2h1.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TriggerCallback : TIM Trigger Callback. + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TriggerHalfCpltCallback : TIM Trigger half complete Callback. + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) IC_CaptureCallback : TIM Input Capture Callback. + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) IC_CaptureHalfCpltCallback : TIM Input Capture half complete Callback. + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) OC_DelayElapsedCallback : TIM Output Compare Delay Elapsed Callback. + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) PWM_PulseFinishedCallback : TIM PWM Pulse Finished Callback. + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) PWM_PulseFinishedHalfCpltCallback : TIM PWM Pulse Finished half complete Callback. + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) ErrorCallback : TIM Error Callback. + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) CommutationCallback : TIM Commutation Callback. + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) CommutationHalfCpltCallback : TIM Commutation half complete Callback. + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) BreakCallback : TIM Break Callback. + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Break2Callback : TIM Break2 Callback (when supported). + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** By default, after the Init and when the state is HAL_TIM_STATE_RESET + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** all interrupt callbacks are set to the corresponding weak functions: + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** examples HAL_TIM_TriggerCallback(), HAL_TIM_ErrorCallback(). + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Exception done for MspInit and MspDeInit functions that are reset to the legacy weak + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** functionalities in the Init / DeInit only when these callbacks are null + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init / DeInit + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** keep and use the user MspInit / MspDeInit callbacks(registered beforehand) + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Callbacks can be registered / unregistered in HAL_TIM_STATE_READY state only. + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Exception done MspInit / MspDeInit that can be registered / unregistered + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** in HAL_TIM_STATE_READY or HAL_TIM_STATE_RESET state, + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** thus registered(user) MspInit / DeInit callbacks can be used during the Init / DeInit. + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** In that case first register the MspInit/MspDeInit user callbacks + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** using HAL_TIM_RegisterCallback() before calling DeInit or Init function. + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** When The compilation define USE_HAL_TIM_REGISTER_CALLBACKS is set to 0 or + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** not defined, the callback registration feature is not available and all callbacks + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** are set to the corresponding weak functions. + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ****************************************************************************** + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Includes ------------------------------------------------------------------*/ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #include "stm32f3xx_hal.h" + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @addtogroup STM32F3xx_HAL_Driver + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM TIM + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM HAL module driver + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #ifdef HAL_TIM_MODULE_ENABLED + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Private typedef -----------------------------------------------------------*/ + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Private define ------------------------------------------------------------*/ + ARM GAS /tmp/cc0aF2h1.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Private macros ------------------------------------------------------------*/ + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Private variables ---------------------------------------------------------*/ + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Private function prototypes -----------------------------------------------*/ + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @addtogroup TIM_Private_Functions + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC5E) + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC5E */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC6E) + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC6E */ + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter); + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter); + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter); + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource); + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma); + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma); + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma); + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma); + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig); + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Exported functions --------------------------------------------------------*/ + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions TIM Exported Functions + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group1 TIM Time Base functions + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Time Base functions + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### Time Base functions ##### + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Initialize and configure the TIM base. + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) De-initialize the TIM base. + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the Time Base. + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the Time Base. + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the Time Base and enable interrupt. + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the Time Base and disable interrupt. + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the Time Base and enable DMA transfer. + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the Time Base and disable DMA transfer. + ARM GAS /tmp/cc0aF2h1.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Time base Unit according to the specified + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initialize the associated handle. + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim == NULL) + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Allocate lock resource and initialize it */ + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ResetCallback(htim); + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->Base_MspInitCallback == NULL) + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspInitCallback(htim); + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_Base_MspInit(htim); + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Time Base configuration */ + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the DMA burst operation state */ + ARM GAS /tmp/cc0aF2h1.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM channels state */ + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM state*/ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes the TIM Base peripheral + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->Base_MspDeInitCallback == NULL) + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware */ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspDeInitCallback(htim); + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_Base_MspDeInit(htim); + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the TIM channels state */ + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change TIM state */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Release Lock */ + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Base MSP. + ARM GAS /tmp/cc0aF2h1.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_Base_MspInit could be implemented in the user file + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes TIM Base MSP. + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_Base_MspDeInit could be implemented in the user file + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Base generation. + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM state */ + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State != HAL_TIM_STATE_READY) + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + ARM GAS /tmp/cc0aF2h1.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Base generation. + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Base generation in interrupt mode. + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM state */ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State != HAL_TIM_STATE_READY) + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Update interrupt */ + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + ARM GAS /tmp/cc0aF2h1.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Base generation in interrupt mode. + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Update interrupt */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Base generation in DMA mode. + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pData The source Buffer address. + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to peripheral. + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t L + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_BUSY) + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; + ARM GAS /tmp/cc0aF2h1.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_READY) + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->A + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Update DMA request */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Base generation in DMA mode. + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + ARM GAS /tmp/cc0aF2h1.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Update DMA request */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group2 TIM Output Compare functions + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM Output Compare functions + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIM Output Compare functions ##### + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Initialize and configure the TIM Output Compare. + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) De-initialize the TIM Output Compare. + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Output Compare. + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Output Compare. + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Output Compare and enable interrupt. + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Output Compare and disable interrupt. + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Output Compare and enable DMA transfer. + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Output Compare and disable DMA transfer. + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Output Compare according to the specified + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) + ARM GAS /tmp/cc0aF2h1.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim == NULL) + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Allocate lock resource and initialize it */ + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ResetCallback(htim); + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->OC_MspInitCallback == NULL) + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspInitCallback(htim); + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OC_MspInit(htim); + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the base time for the Output Compare */ + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the DMA burst operation state */ + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM channels state */ + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM state*/ + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + ARM GAS /tmp/cc0aF2h1.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->OC_MspDeInitCallback == NULL) + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware */ + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspDeInitCallback(htim); + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OC_MspDeInit(htim); + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the TIM channels state */ + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change TIM state */ + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Release Lock */ + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Output Compare MSP. + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_OC_MspInit could be implemented in the user file + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes TIM Output Compare MSP. + ARM GAS /tmp/cc0aF2h1.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_OC_MspDeInit could be implemented in the user file + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation. + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be enabled + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected (*) + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channel state */ + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Output compare channel */ + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/cc0aF2h1.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation. + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be disabled + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected (*) + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Output compare channel */ + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation in interrupt mode. + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be enabled + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + ARM GAS /tmp/cc0aF2h1.s page 17 + + + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channel state */ + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 18 + + + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Output compare channel */ + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation in interrupt mode. + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be disabled + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 19 + + +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Output compare channel */ +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation in DMA mode. +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be enabled +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + ARM GAS /tmp/cc0aF2h1.s page 20 + + +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pData The source Buffer address. +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *p +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint16_t Length) +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 21 + + +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance-> +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 22 + + +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Output compare channel */ +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode. +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be disabled +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cc0aF2h1.s page 23 + + +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Output compare channel */ +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 24 + + +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group3 TIM PWM functions +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM PWM functions +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIM PWM functions ##### +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Initialize and configure the TIM PWM. +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) De-initialize the TIM PWM. +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM PWM. +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM PWM. +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM PWM and enable interrupt. +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM PWM and disable interrupt. +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM PWM and enable DMA transfer. +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM PWM and disable DMA transfer. +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM PWM Time Base according to the specified +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim == NULL) +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + ARM GAS /tmp/cc0aF2h1.s page 25 + + +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ResetCallback(htim); +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->PWM_MspInitCallback == NULL) +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspInitCallback(htim); +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_MspInit(htim); +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the base time for the PWM */ +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM channels state */ +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM state*/ +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + ARM GAS /tmp/cc0aF2h1.s page 26 + + +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->PWM_MspDeInitCallback == NULL) +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware */ +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspDeInitCallback(htim); +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_MspDeInit(htim); +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the TIM channels state */ +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change TIM state */ +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Release Lock */ +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM PWM MSP. +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_PWM_MspInit could be implemented in the user file +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes TIM PWM MSP. +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_PWM_MspDeInit could be implemented in the user file +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 27 + + +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the PWM signal generation. +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected (*) +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channel state */ +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare channel */ +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 28 + + +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the PWM signal generation. +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected (*) +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Capture compare channel */ +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the PWM signal generation in interrupt mode. +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to be enabled +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 29 + + +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channel state */ +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare channel */ +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + ARM GAS /tmp/cc0aF2h1.s page 30 + + +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the PWM signal generation in interrupt mode. +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 31 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Capture compare channel */ +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM PWM signal generation in DMA mode. +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pData The source Buffer address. +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t * +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint16_t Length) +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 32 + + +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/cc0aF2h1.s page 33 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Output Capture/Compare 3 request */ +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance-> +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) + ARM GAS /tmp/cc0aF2h1.s page 34 + + +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare channel */ +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM PWM signal generation in DMA mode. +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 35 + + +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Capture compare channel */ +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group4 TIM Input Capture functions +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM Input Capture functions + ARM GAS /tmp/cc0aF2h1.s page 36 + + +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIM Input Capture functions ##### +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Initialize and configure the TIM Input Capture. +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) De-initialize the TIM Input Capture. +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Input Capture. +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Input Capture. +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Input Capture and enable interrupt. +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Input Capture and disable interrupt. +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Input Capture and enable DMA transfer. +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Input Capture and disable DMA transfer. +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Input Capture Time base according to the specified +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim == NULL) +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ResetCallback(htim); +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->IC_MspInitCallback == NULL) +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 37 + + +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspInitCallback(htim); +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_MspInit(htim); +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the base time for the input capture */ +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM channels state */ +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM state*/ +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->IC_MspDeInitCallback == NULL) +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware */ +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspDeInitCallback(htim); +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_MspDeInit(htim); +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 38 + + +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the TIM channels state */ +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change TIM state */ +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Release Lock */ +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Input Capture MSP. +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_IC_MspInit could be implemented in the user file +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes TIM Input Capture MSP. +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_IC_MspDeInit could be implemented in the user file +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement. +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + ARM GAS /tmp/cc0aF2h1.s page 39 + + +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channel state */ +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Input Capture channel */ +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement. +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Input Capture channel */ +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 40 + + +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement in interrupt mode. +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channel state */ +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + ARM GAS /tmp/cc0aF2h1.s page 41 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Input Capture channel */ +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement in interrupt mode. +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + ARM GAS /tmp/cc0aF2h1.s page 42 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Input Capture channel */ +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; + ARM GAS /tmp/cc0aF2h1.s page 43 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement in DMA mode. +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pData The destination Buffer address. +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_state == HAL_TIM_CHANNEL_STATE_BUSY) +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY) +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Input Capture channel */ +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: + ARM GAS /tmp/cc0aF2h1.s page 44 + + +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)p +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 45 + + +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)p +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement in DMA mode. +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Input Capture handle +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + ARM GAS /tmp/cc0aF2h1.s page 46 + + +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Input Capture channel */ +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 DMA request */ +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + ARM GAS /tmp/cc0aF2h1.s page 47 + + +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group5 TIM One Pulse functions +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM One Pulse functions +2611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIM One Pulse functions ##### +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Initialize and configure the TIM One Pulse. +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) De-initialize the TIM One Pulse. +2620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM One Pulse. +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM One Pulse. +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM One Pulse and enable interrupt. +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM One Pulse and disable interrupt. +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM One Pulse and enable DMA transfer. +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM One Pulse and disable DMA transfer. +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM One Pulse Time Base according to the specified +2632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init() +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note When the timer instance is initialized in One Pulse mode, timer +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * channels 1 and channel 2 are reserved and cannot be used for other +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * purpose. +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OnePulseMode Select the One pulse mode. +2642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. +2644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim == NULL) +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + ARM GAS /tmp/cc0aF2h1.s page 48 + + +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ResetCallback(htim); +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->OnePulse_MspInitCallback == NULL) +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspInitCallback(htim); +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OnePulse_MspInit(htim); +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Time base in the One Pulse Mode */ +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the OPM Bit */ +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CR1 &= ~TIM_CR1_OPM; +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the OPM Mode */ +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CR1 |= OnePulseMode; +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM channels state */ +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM state*/ +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 49 + + +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes the TIM One Pulse +2713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->OnePulse_MspDeInitCallback == NULL) +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware */ +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback(htim); +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OnePulse_MspDeInit(htim); +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel state */ +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change TIM state */ +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +2749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Release Lock */ +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM One Pulse MSP. +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/cc0aF2h1.s page 50 + + +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_OnePulse_MspInit could be implemented in the user file +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes TIM One Pulse MSP. +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file +2783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation. +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OutputChannel See note above +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(OutputChannel); +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channels state */ +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channels state */ +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare and the Input Capture channels +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2 +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and + ARM GAS /tmp/cc0aF2h1.s page 51 + + +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** No need to enable the counter, it's enabled automatically by hardware +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (the counter starts in response to a stimulus and generate a pulse */ +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM One Pulse signal generation. +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OutputChannel See note above +2851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(OutputChannel); +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Capture compare and the Input Capture channels +2859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) +2860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channels state */ +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/cc0aF2h1.s page 52 + + +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode. +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OutputChannel See note above +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(OutputChannel); +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM channels state */ +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channels state */ +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare and the Input Capture channels +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2 +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** No need to enable the counter, it's enabled automatically by hardware +2928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (the counter starts in response to a stimulus and generate a pulse */ +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + ARM GAS /tmp/cc0aF2h1.s page 53 + + +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the main output */ +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM One Pulse signal generation in interrupt mode. +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OutputChannel See note above +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(OutputChannel); +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Capture compare and the Input Capture channels +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Main Output */ +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channels state */ +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + ARM GAS /tmp/cc0aF2h1.s page 54 + + +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group6 TIM Encoder functions +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM Encoder functions +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +3006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIM Encoder functions ##### +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Initialize and configure the TIM Encoder. +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) De-initialize the TIM Encoder. +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Encoder. +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Encoder. +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Encoder and enable interrupt. +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Encoder and disable interrupt. +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Start the TIM Encoder and enable DMA transfer. +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Stop the TIM Encoder and disable DMA transfer. +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +3021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Encoder Interface and initialize the associated handle. +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init() +3028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Encoder mode and External clock mode 2 are not compatible and must not be selected toge +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * Ex: A call for @ref HAL_TIM_Encoder_Init will erase the settings of @ref HAL_TIM_Config +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * using TIM_CLOCKSOURCE_ETRMODE2 and vice versa +3031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note When the timer instance is initialized in Encoder mode, timer +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * channels 1 and channel 2 are reserved and cannot be used for other +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * purpose. +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sConfig TIM Encoder Interface configuration structure +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sCon +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; +3043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim == NULL) +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); + ARM GAS /tmp/cc0aF2h1.s page 55 + + +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +3070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +3073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ResetCallback(htim); +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->Encoder_MspInitCallback == NULL) +3076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspInitCallback(htim); +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_Encoder_MspInit(htim); +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM state */ +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the SMS and ECE bits */ +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Time base in the Encoder Mode */ +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = htim->Instance->CCER; +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the encoder Mode */ +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= sConfig->EncoderMode; +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Capture Compare 1 and the Capture Compare 2 as input */ + ARM GAS /tmp/cc0aF2h1.s page 56 + + +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); +3111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); +3117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TI1 and the TI2 Polarities */ +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 = tmpccmr1; +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER = tmpccer; +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channels state */ +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Initialize the TIM state*/ +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes the TIM Encoder interface +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->Encoder_MspDeInitCallback == NULL) +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 57 + + +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +3167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware */ +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspDeInitCallback(htim); +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_Encoder_MspDeInit(htim); +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channels state */ +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change TIM state */ +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Release Lock */ +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Encoder Interface MSP. +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_Encoder_MspInit could be implemented in the user file +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief DeInitializes TIM Encoder Interface MSP. +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_Encoder_MspDeInit could be implemented in the user file +3220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 58 + + +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface. +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else + ARM GAS /tmp/cc0aF2h1.s page 59 + + +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the encoder interface channels */ +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +3292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +3304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral */ +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface. +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +3321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: + ARM GAS /tmp/cc0aF2h1.s page 60 + + +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +3349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface in interrupt mode. +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 61 + + +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the encoder interface channels */ +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the capture compare Interrupts 1 and/or 2 */ +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + ARM GAS /tmp/cc0aF2h1.s page 62 + + +3451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral */ +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface in interrupt mode. +3479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the capture compare Interrupts 1 */ +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the capture compare Interrupts 2 */ +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 63 + + +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the capture compare Interrupts 1 and 2 */ +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface in DMA mode. +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pData1 The destination Buffer address for IC1. +3548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pData2 The destination Buffer address for IC2. +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pD +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t *pData2, uint16_t Length) +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) + ARM GAS /tmp/cc0aF2h1.s page 64 + + +3565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((pData1 == NULL) || (Length == 0U)) +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY) +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((pData2 == NULL) || (Length == 0U)) +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; + ARM GAS /tmp/cc0aF2h1.s page 65 + + +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U)) +3629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +3647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +3656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +3666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare channel */ +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral */ +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ + ARM GAS /tmp/cc0aF2h1.s page 66 + + +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +3693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare channel */ +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral */ +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +3711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) +3730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ + ARM GAS /tmp/cc0aF2h1.s page 67 + + +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +3737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Capture compare channel */ +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the Peripheral */ +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface in DMA mode. +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the capture compare DMA Request 1 */ +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the capture compare DMA Request 2 */ +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 68 + + +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the capture compare DMA Request 1 and 2 */ +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +3798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Peripheral */ +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +3823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM IRQ handler management +3826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +3829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### IRQ handler management ##### +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +3831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides Timer IRQ handler function. +3833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief This function handles TIM interrupts requests. +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Capture compare 1 event */ +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 69 + + +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Output compare event */ +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Capture compare 2 event */ +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Output compare event */ +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 70 + + +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Capture compare 3 event */ +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Output compare event */ +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Capture compare 4 event */ +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +3944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Output compare event */ +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 71 + + +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TIM Update event */ +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); +3973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedCallback(htim); +3975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PeriodElapsedCallback(htim); +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TIM Break input event */ +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) +3982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->BreakCallback(htim); +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIMEx_BreakCallback(htim); +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +3993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_BDTR_BK2E) +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TIM Break2 input event */ +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) +3996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); +4000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Break2Callback(htim); +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIMEx_Break2Callback(htim); +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_BDTR_BK2E */ +4008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TIM Trigger detection event */ +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerCallback(htim); +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +4017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_TriggerCallback(htim); +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 72 + + +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TIM commutation event */ +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->CommutationCallback(htim); +4029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +4030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIMEx_CommutCallback(htim); +4031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +4032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group8 TIM Peripheral Control functions +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM Peripheral Control functions +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +4044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +4045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### Peripheral Control functions ##### +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +4047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +4048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides functions allowing to: +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. +4050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Configure External Clock source. +4051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Configure Complementary channels, break features and dead time. +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Configure Master and the Slave synchronization. +4053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) Configure the DMA Burst Mode. +4054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +4056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Output Compare Channels according to the specified +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_OC_InitTypeDef. +4062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sConfig TIM Output Compare configuration structure +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to configure +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected (*) +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices +4073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_OC_InitTypeDef *sConfig, +4077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t Channel) + ARM GAS /tmp/cc0aF2h1.s page 73 + + +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); +4083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); +4085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +4090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +4092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the TIM Channel 1 in Output Compare */ +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, sConfig); +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +4102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the TIM Channel 2 in Output Compare */ +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, sConfig); +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +4112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the TIM Channel 3 in Output Compare */ +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC3_SetConfig(htim->Instance, sConfig); +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +4122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the TIM Channel 4 in Output Compare */ +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC4_SetConfig(htim->Instance, sConfig); +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC5E) +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_5: +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + ARM GAS /tmp/cc0aF2h1.s page 74 + + +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the TIM Channel 5 in Output Compare */ +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC5_SetConfig(htim->Instance, sConfig); +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC5E */ +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC6E) +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_6: +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the TIM Channel 6 in Output Compare */ +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC6_SetConfig(htim->Instance, sConfig); +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC6E */ +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +4156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +4157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +4161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM Input Capture Channels according to the specified +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_IC_InitTypeDef. +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM IC handle +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sConfig TIM Input Capture configuration structure +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel to configure +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConf +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); +4185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); +4186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 75 + + +4192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +4193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TI1 Configuration */ +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI1_SetConfig(htim->Instance, +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, +4198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICFilter); +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the IC1PSC Bits */ +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; +4202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the IC1PSC value */ +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->ICPrescaler; +4205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TI2 Configuration */ +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI2_SetConfig(htim->Instance, +4212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, +4214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICFilter); +4215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the IC2PSC Bits */ +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; +4218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the IC2PSC value */ +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_3) +4223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TI3 Configuration */ +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI3_SetConfig(htim->Instance, +4228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, +4230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICFilter); +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the IC3PSC Bits */ +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; +4234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the IC3PSC value */ +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->ICPrescaler; +4237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_4) +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* TI4 Configuration */ +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI4_SetConfig(htim->Instance, +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, +4245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICFilter); +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the IC4PSC Bits */ + ARM GAS /tmp/cc0aF2h1.s page 76 + + +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the IC4PSC value */ +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +4257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM PWM channels according to the specified +4266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_OC_InitTypeDef. +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM PWM handle +4268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sConfig TIM PWM configuration structure +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be configured +4270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected (*) +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected (*) +4277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices +4278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, +4281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_OC_InitTypeDef *sConfig, +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t Channel) +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); +4291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Channel 1 in PWM mode */ +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, sConfig); +4304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Preload enable bit for channel1 */ + ARM GAS /tmp/cc0aF2h1.s page 77 + + +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Output Fast mode */ +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +4315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Channel 2 in PWM mode */ +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, sConfig); +4321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Preload enable bit for channel2 */ +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; +4324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Output Fast mode */ +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +4332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Channel 3 in PWM mode */ +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC3_SetConfig(htim->Instance, sConfig); +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Preload enable bit for channel3 */ +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Output Fast mode */ +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Channel 4 in PWM mode */ +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC4_SetConfig(htim->Instance, sConfig); +4355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Preload enable bit for channel4 */ +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Output Fast mode */ +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + ARM GAS /tmp/cc0aF2h1.s page 78 + + +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC5E) +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_5: +4367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); +4370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Channel 5 in PWM mode */ +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC5_SetConfig(htim->Instance, sConfig); +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Preload enable bit for channel5*/ +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; +4376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Output Fast mode */ +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode; +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC5E */ +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC6E) +4385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_6: +4386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Channel 6 in PWM mode */ +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC6_SetConfig(htim->Instance, sConfig); +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Preload enable bit for channel6 */ +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the Output Fast mode */ +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC6E */ +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +4404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +4409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Initializes the TIM One Pulse Channels according to the specified +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * parameters in the TIM_OnePulse_InitTypeDef. +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM One Pulse handle +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sConfig TIM One Pulse configuration structure +4418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OutputChannel TIM output channel to configure +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: + ARM GAS /tmp/cc0aF2h1.s page 79 + + +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param InputChannel TIM input Channel to configure +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note To output a waveform with a minimum delay user can enable the fast +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * mode by calling the @ref __HAL_TIM_ENABLE_OCxFAST macro. Then CCx +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * output is forced in response to the edge detection on TIx input, +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * without taking in account the comparison. +4430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef +4433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t OutputChannel, uint32_t InputChannel) +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; +4437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(OutputChannel)); +4440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); +4441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (OutputChannel != InputChannel) +4443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Extract the Output compare configuration from sConfig structure */ +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCMode = sConfig->OCMode; +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; +4456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (OutputChannel) +4458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, &temp1); +4464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, &temp1); +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +4476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; + ARM GAS /tmp/cc0aF2h1.s page 80 + + +4477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +4481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (InputChannel) +4483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +4485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, +4489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); +4490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the IC1PSC Bits */ +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; +4493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Trigger source */ +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; +4497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Slave Mode */ +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; +4501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +4505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); +4510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the IC2PSC Bits */ +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; +4513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Trigger source */ +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; +4517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Slave Mode */ +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; +4521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +4525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +4526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +4531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +4533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 81 + + +4534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +4537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral +4544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +4545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write +4546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_OR +4566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR3 (*) +4567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR5 (*) +4568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR6 (*) +4569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) value not defined in all devices +4570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note This function should be used only when BurstLength is equal to DMA data transfer length +4583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, +4586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t BurstRequestSrc, const uint32_t *BurstBuffer +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status; +4589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, B + ARM GAS /tmp/cc0aF2h1.s page 82 + + +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); +4592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral +4600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +4601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write +4602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_OR +4622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR3 (*) +4623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR5 (*) +4624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR6 (*) +4625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) value not defined in all devices +4626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param DataLength Data length. This parameter can be one value +4639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * between 1 and 0xFFFF. +4640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddre +4643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t BurstRequestSrc, const uint32_t *BurstB +4644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t BurstLength, uint32_t DataLength) +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 83 + + +4648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +4650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); +4651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); +4653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); +4654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY) +4656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +4658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) +4660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((BurstBuffer == NULL) && (BurstLength > 0U)) +4662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +4666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY; +4668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +4671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* nothing to do */ +4673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (BurstRequestSrc) +4676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_UPDATE: +4678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; +4681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; +4682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; +4685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, +4688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC1: +4696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +4703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ + ARM GAS /tmp/cc0aF2h1.s page 84 + + +4705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, +4706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC2: +4714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +4721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +4723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, +4724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC3: +4732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +4735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +4739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, +4742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC4: +4750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +4753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +4757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, +4760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 85 + + +4762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_COM: +4768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA commutation callbacks */ +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +4771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +4772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; +4775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, +4778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_TRIGGER: +4786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA trigger callbacks */ +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; +4789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; +4790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +4792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; +4793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, +4796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +4799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +4800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +4804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +4805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +4809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the DMA Burst Mode */ +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->DCR = (BurstBaseAddress | BurstLength); +4812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM DMA Request */ +4813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +4817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 86 + + +4819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stops the TIM DMA Burst mode +4822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +4823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable +4824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) +4827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Abort the DMA transfer (at least disable the DMA channel) */ +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (BurstRequestSrc) +4835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_UPDATE: +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); +4839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC1: +4842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +4844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC2: +4847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC3: +4852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC4: +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +4859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_COM: +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_TRIGGER: +4867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); +4869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +4872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +4873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 87 + + +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +4877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Update DMA request */ +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); +4880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ +4882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +4883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +4886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory +4891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +4892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read +4893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_OR +4913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR3 (*) +4914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR5 (*) +4915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR6 (*) +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) value not defined in all devices +4917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note This function should be used only when BurstLength is equal to DMA data transfer length +4930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, + ARM GAS /tmp/cc0aF2h1.s page 88 + + +4933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint +4934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status; +4936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, Bu +4938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); +4939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +4943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +4945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +4947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read +4948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_OR +4968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR3 (*) +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR5 (*) +4970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMABASE_CCR6 (*) +4971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) value not defined in all devices +4972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param DataLength Data length. This parameter can be one value +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * between 1 and 0xFFFF. +4986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +4987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddres +4989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t BurstRequestSrc, uint32_t *BurstBuffer, + ARM GAS /tmp/cc0aF2h1.s page 89 + + +4990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t BurstLength, uint32_t DataLength) +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +4992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +4995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +4996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); +5000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY) +5002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_BUSY; +5004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) +5006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if ((BurstBuffer == NULL) && (BurstLength > 0U)) +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY; +5014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* nothing to do */ +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (BurstRequestSrc) +5021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_UPDATE: +5023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; +5026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +5029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; +5030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_ +5033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC1: +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +5045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ + ARM GAS /tmp/cc0aF2h1.s page 90 + + +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +5048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +5051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC2: +5059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +5062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +5063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +5065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +5066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC3: +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +5081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +5083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +5084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +5087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC4: +5095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA capture callbacks */ +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; +5098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +5099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +5102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ + ARM GAS /tmp/cc0aF2h1.s page 91 + + +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_COM: +5113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA commutation callbacks */ +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +5117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; +5120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (ui +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_TRIGGER: +5131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA trigger callbacks */ +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; +5135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the DMA error callback */ +5137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; +5138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32 +5141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +5144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +5149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +5150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +5154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the DMA Burst Mode */ +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->DCR = (BurstBaseAddress | BurstLength); +5157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM DMA Request */ +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); +5160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 92 + + +5161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Stop the DMA burst reading +5168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable. +5170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +5178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Abort the DMA transfer (at least disable the DMA channel) */ +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (BurstRequestSrc) +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_UPDATE: +5183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); +5185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC1: +5188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +5190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC2: +5193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +5195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC3: +5198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_CC4: +5203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +5205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_COM: +5208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); +5210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_DMA_TRIGGER: +5213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: + ARM GAS /tmp/cc0aF2h1.s page 93 + + +5218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +5223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the TIM Update DMA request */ +5225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); +5226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the DMA burst operation state */ +5228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +5229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +5232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +5233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Generate a software event +5237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param EventSource specifies the event source. +5239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source +5241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source +5242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source +5243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source +5245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_COM: Timer COM event source +5246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source +5248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source +5249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note Basic timers can only generate an update event. +5250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note TIM_EVENTSOURCE_COM is relevant only with advanced timer instances. +5251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note TIM_EVENTSOURCE_BREAK are relevant only for timer instances +5252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * supporting a break input. +5253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +5260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_EVENT_SOURCE(EventSource)); +5261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the TIM state */ +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the event sources */ +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->EGR = EventSource; +5270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Change the TIM state */ +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + ARM GAS /tmp/cc0aF2h1.s page 94 + + +5275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return function status */ +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +5278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configures the OCRef clear feature +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that +5284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * contains the OCREF clear feature and parameters for the TIM peripheral. +5285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel specifies the TIM Channel +5286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +5287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +5288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +5290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 (*) +5292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 (*) +5293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (*) Value not defined for all devices +5294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, +5297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_ClearInputConfigTypeDef *sClearInputConfig, +5298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t Channel) +5299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); +5304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); +5305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +5308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (sClearInputConfig->ClearInputSource) +5312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_NONE: +5314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Clear the OCREF clear selection bit and the the ETR Bits */ +5316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_SMCR_OCCS) +5317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_OCCS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE +5318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP)) +5320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_SMCR_OCCS */ +5321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_SMCR_OCCS) +5324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_OCREFCLR: +5325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Clear the OCREF clear selection bit */ +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); +5328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_SMCR_OCCS */ +5331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 95 + + +5332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_ETR: +5333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); +5336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); +5337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* When OCRef clear feature is used with ETR source, ETR prescaler must be off */ +5340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputPrescaler != TIM_CLEARINPUTPRESCALER_DIV1) +5341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, +5349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClearInputConfig->ClearInputPolarity, +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClearInputConfig->ClearInputFilter); +5351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_SMCR_OCCS) +5352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the OCREF clear selection bit */ +5354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); +5355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_SMCR_OCCS */ +5356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +5361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (status == HAL_OK) +5365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +5367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +5369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 1 */ +5373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 1 */ +5378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); +5379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +5383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 2 */ +5387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); +5388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 96 + + +5389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 2 */ +5392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); +5393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +5397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 3 */ +5401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); +5402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 3 */ +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); +5407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +5411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 4 */ +5415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); +5416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 4 */ +5420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); +5421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC5E) +5425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_5: +5426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 5 */ +5430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); +5431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 5 */ +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); +5436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC5E */ +5440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC6E) +5441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_6: +5442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 6 */ + ARM GAS /tmp/cc0aF2h1.s page 97 + + +5446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); +5447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +5449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 6 */ +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); +5452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC6E */ +5456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +5466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configures the clock source to be used +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that +5472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * contains the clock source information for the TIM peripheral. +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef * +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +5479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Process Locked */ +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); +5487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +5490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); +5491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); +5492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +5493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (sClockSourceConfig->ClockSource) +5495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_INTERNAL: +5497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +5499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_ETRMODE1: + ARM GAS /tmp/cc0aF2h1.s page 98 + + +5503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/ +5505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); +5506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ +5508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the ETR Clock source */ +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, +5515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the External clock mode1 and the ETRF trigger */ +5519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); +5521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ +5522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +5523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_ETRMODE2: +5527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/ +5529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); +5530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); +5533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the ETR Clock source */ +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, +5539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the External clock mode2 */ +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SMCR_ECE; +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI1: +5547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 */ +5549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check TI1 input conditioning related parameters */ +5552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +5556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); +5559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + ARM GAS /tmp/cc0aF2h1.s page 99 + + +5560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI2: +5563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/ +5565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check TI2 input conditioning related parameters */ +5568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI2_ConfigInputStage(htim->Instance, +5572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); +5575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI1ED: +5579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 */ +5581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check TI1 input conditioning related parameters */ +5584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +5588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR0: +5595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR1: +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR2: +5597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR3: +5598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check whether or not the timer instance supports internal trigger input */ +5600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); +5601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +5608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +5615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 100 + + +5617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Selects the signal connected to the TI1 input: direct from CH1_input +5619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * or a XOR combination between CH1_input, CH2_input & CH3_input +5620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle. +5621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TI1_Selection Indicate whether or not channel 1 is connected to the +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * output of a XOR gate. +5623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +5624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input +5625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 +5626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * pins are connected to the TI1 input (XOR combination) +5627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) +5630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; +5632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); +5635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); +5636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = htim->Instance->CR2; +5639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the TI1 selection */ +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_TI1S; +5642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the TI1 selection */ +5644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= TI1_Selection; +5645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMxCR2 */ +5647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CR2 = tmpcr2; +5648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +5650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configures the TIM in Slave mode +5654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle. +5655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that +5656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * contains the selected trigger (internal trigger input, filtered +5657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * timer input or external trigger input) and the Slave mode +5658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (Disable, Reset, Gated, Trigger, External clock mode 1). +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); +5665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); +5666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +5669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) +5673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 101 + + +5674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable Trigger Interrupt */ +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable Trigger DMA request */ +5683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); +5684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configures the TIM in Slave mode in interrupt mode +5694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle. +5695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * contains the selected trigger (internal trigger input, filtered +5697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * timer input or external trigger input) and the Slave mode +5698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (Disable, Reset, Gated, Trigger, External clock mode 1). +5699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL status +5700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, +5702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) +5703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); +5706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); +5707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); +5708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_LOCK(htim); +5710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +5718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable Trigger Interrupt */ +5721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); +5722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable Trigger DMA request */ +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); +5725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); +5729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_OK; + ARM GAS /tmp/cc0aF2h1.s page 102 + + +5731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Read the captured value from Capture Compare unit +5735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle. +5736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +5738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +5739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +5740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +5742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval Captured value +5743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel) +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpreg = 0U; +5747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (Channel) +5749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_1: +5751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +5754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return the capture 1 value */ +5756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpreg = htim->Instance->CCR1; +5757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_2: +5761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +5764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return the capture 2 value */ +5766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpreg = htim->Instance->CCR2; +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_3: +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return the capture 3 value */ +5777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpreg = htim->Instance->CCR3; +5778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_CHANNEL_4: +5783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +5785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +5786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return the capture 4 value */ + ARM GAS /tmp/cc0aF2h1.s page 103 + + +5788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpreg = htim->Instance->CCR4; +5789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +5794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +5795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return tmpreg; +5798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +5802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions +5805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM Callbacks functions +5806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +5807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +5808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +5809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### TIM Callbacks functions ##### +5810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +5811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +5812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This section provides TIM callback functions: +5813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TIM Period elapsed callback +5814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TIM Output Compare callback +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TIM Input capture callback +5816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TIM Trigger callback +5817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (+) TIM Error callback +5818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +5820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +5821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Period elapsed callback in non-blocking mode +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +5829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_PeriodElapsedCallback could be implemented in the user file +5835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Period elapsed half complete callback in non-blocking mode +5840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim) +5844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 104 + + +5845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_PeriodElapsedHalfCpltCallback could be implemented in the user file +5850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Output Compare callback in non-blocking mode +5855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM OC handle +5856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +5859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file +5865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Input Capture callback in non-blocking mode +5870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM IC handle +5871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) +5874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_IC_CaptureCallback could be implemented in the user file +5880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Input Capture half complete callback in non-blocking mode +5885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM IC handle +5886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim) +5889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_IC_CaptureHalfCpltCallback could be implemented in the user file +5895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief PWM Pulse finished callback in non-blocking mode +5900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None + ARM GAS /tmp/cc0aF2h1.s page 105 + + +5902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) +5904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file +5910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief PWM Pulse finished half complete callback in non-blocking mode +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim) +5919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_PWM_PulseFinishedHalfCpltCallback could be implemented in the user file +5925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Hall Trigger detection callback in non-blocking mode +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) +5934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_TriggerCallback could be implemented in the user file +5940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Hall Trigger detection half complete callback in non-blocking mode +5945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim) +5949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_TriggerHalfCpltCallback could be implemented in the user file +5955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + ARM GAS /tmp/cc0aF2h1.s page 106 + + +5959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer error callback in non-blocking mode +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +5961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +5962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) +5964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +5965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** UNUSED(htim); +5967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** the HAL_TIM_ErrorCallback could be implemented in the user file +5970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +5974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +5975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Register a User TIM callback to be used instead of the weak predefined callback +5976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim tim handle +5977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param CallbackID ID of the callback to be registered +5978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +5979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID +5980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID +5981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID +5983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID +5984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID +5985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID +5986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID +5987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID +5988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID +5989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID +5990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID +5992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID +5993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID +5994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID +5995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID +5996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID +5997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID +5998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID +5999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID +6000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID +6001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callb +6002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID +6003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID +6004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID +6005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID +6006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_BDTR_BK2E) +6007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK2_CB_ID Break2 Callback ID +6008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif +6009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param pCallback pointer to the callback function +6010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval status +6011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Callb +6013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** pTIM_CallbackTypeDef pCallback) +6014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cc0aF2h1.s page 107 + + +6016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (pCallback == NULL) +6018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +6020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_READY) +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (CallbackID) +6025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspInitCallback = pCallback; +6028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspDeInitCallback = pCallback; +6032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspInitCallback = pCallback; +6036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspInitCallback = pCallback; +6044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; +6048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspInitCallback = pCallback; +6052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspDeInitCallback = pCallback; +6056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspInitCallback = pCallback; +6060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = pCallback; +6064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspInitCallback = pCallback; +6068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = pCallback; +6072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + ARM GAS /tmp/cc0aF2h1.s page 108 + + +6073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspInitCallback = pCallback; +6076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = pCallback; +6080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedCallback = pCallback; +6084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : +6087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback = pCallback; +6088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_TRIGGER_CB_ID : +6091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerCallback = pCallback; +6092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_TRIGGER_HALF_CB_ID : +6095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerHalfCpltCallback = pCallback; +6096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_CB_ID : +6099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback = pCallback; +6100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : +6103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = pCallback; +6104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : +6107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_DelayElapsedCallback = pCallback; +6108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : +6111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback = pCallback; +6112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : +6115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback = pCallback; +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ERROR_CB_ID : +6119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->ErrorCallback = pCallback; +6120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_COMMUTATION_CB_ID : +6123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->CommutationCallback = pCallback; +6124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : +6127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->CommutationHalfCpltCallback = pCallback; +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 109 + + +6130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BREAK_CB_ID : +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->BreakCallback = pCallback; +6132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_BDTR_BK2E) +6134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BREAK2_CB_ID : +6136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Break2Callback = pCallback; +6137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_BDTR_BK2E */ +6139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +6141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +6142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +6143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_RESET) +6147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (CallbackID) +6149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspInitCallback = pCallback; +6152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspDeInitCallback = pCallback; +6156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspInitCallback = pCallback; +6160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspInitCallback = pCallback; +6168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspInitCallback = pCallback; +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspDeInitCallback = pCallback; +6180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspInitCallback = pCallback; +6184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : + ARM GAS /tmp/cc0aF2h1.s page 110 + + +6187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = pCallback; +6188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspInitCallback = pCallback; +6192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = pCallback; +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspInitCallback = pCallback; +6200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = pCallback; +6204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +6207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +6208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +6209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +6215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +6216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +6219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Unregister a TIM callback +6223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * TIM callback is redirected to the weak predefined callback +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim tim handle +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param CallbackID ID of the callback to be unregistered +6226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +6227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID +6228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID +6229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID +6230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID +6231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID +6233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID +6234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID +6236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID +6237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID +6238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID +6239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID +6240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID +6242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID +6243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID + ARM GAS /tmp/cc0aF2h1.s page 111 + + +6244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID +6245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID +6246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID +6247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID +6249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callb +6250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID +6252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID +6253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID +6254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_BDTR_BK2E) +6255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK2_CB_ID Break2 Callback ID +6256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif +6257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval status +6258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Cal +6260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_READY) +6264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (CallbackID) +6266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Base MspInit Callback */ +6269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; +6270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Base Msp DeInit Callback */ +6274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; +6275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ +6279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +6280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak IC Msp DeInit Callback */ +6284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +6285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak OC Msp Init Callback */ +6289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; +6290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak OC Msp DeInit Callback */ +6294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; +6295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ +6299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +6300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + ARM GAS /tmp/cc0aF2h1.s page 112 + + +6301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak PWM Msp DeInit Callback */ +6304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +6305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak One Pulse Msp Init Callback */ +6309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +6310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak One Pulse Msp DeInit Callback */ +6314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +6315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Encoder Msp Init Callback */ +6319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +6320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Encoder Msp DeInit Callback */ +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +6325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp Init Callback */ +6329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; +6330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp DeInit Callback */ +6334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; +6335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : +6338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Period Elapsed Callback */ +6339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; +6340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : +6343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Period Elapsed half complete Callback */ +6344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; +6345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_TRIGGER_CB_ID : +6348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Trigger Callback */ +6349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerCallback = HAL_TIM_TriggerCallback; +6350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_TRIGGER_HALF_CB_ID : +6353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Trigger half complete Callback */ +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; +6355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_CB_ID : + ARM GAS /tmp/cc0aF2h1.s page 113 + + +6358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak IC Capture Callback */ +6359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; +6360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak IC Capture half complete Callback */ +6364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; +6365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : +6368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak OC Delay Elapsed Callback */ +6369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak PWM Pulse Finished Callback */ +6374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; +6375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak PWM Pulse Finished half complete Callback */ +6379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ERROR_CB_ID : +6383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Error Callback */ +6384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->ErrorCallback = HAL_TIM_ErrorCallback; +6385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_COMMUTATION_CB_ID : +6388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Commutation Callback */ +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->CommutationCallback = HAL_TIMEx_CommutCallback; +6390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : +6393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Commutation half complete Callback */ +6394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BREAK_CB_ID : +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Break Callback */ +6399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->BreakCallback = HAL_TIMEx_BreakCallback; +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_BDTR_BK2E) +6402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BREAK2_CB_ID : +6404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Break2 Callback */ +6405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Break2Callback = HAL_TIMEx_Break2Callback; +6406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_BDTR_BK2E */ +6408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +6410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +6411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +6412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 114 + + +6415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_RESET) +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (CallbackID) +6418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Base MspInit Callback */ +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; +6422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Base Msp DeInit Callback */ +6426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; +6427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ +6431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +6432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak IC Msp DeInit Callback */ +6436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +6437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak OC Msp Init Callback */ +6441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; +6442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak OC Msp DeInit Callback */ +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; +6447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ +6451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +6452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak PWM Msp DeInit Callback */ +6456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +6457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak One Pulse Msp Init Callback */ +6461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +6462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak One Pulse Msp DeInit Callback */ +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +6467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Encoder Msp Init Callback */ +6471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; + ARM GAS /tmp/cc0aF2h1.s page 115 + + +6472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Encoder Msp DeInit Callback */ +6476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +6477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp Init Callback */ +6481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; +6482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp DeInit Callback */ +6486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default : +6490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +6491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +6492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +6493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Return error status */ +6498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +6499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +6502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +6507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions +6510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM Peripheral State functions +6511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * +6512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @verbatim +6513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +6514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ##### Peripheral State functions ##### +6515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ============================================================================== +6516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** [..] +6517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** This subsection permits to get in run-time the status of the peripheral +6518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** and the data flow. +6519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** @endverbatim +6521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +6522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM Base handle state. +6526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Base handle +6527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL state +6528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + ARM GAS /tmp/cc0aF2h1.s page 116 + + +6529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim) +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; +6532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM OC handle state. +6536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Output Compare handle +6537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL state +6538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim) +6540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM PWM handle state. +6546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +6547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL state +6548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim) +6550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; +6552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM Input Capture handle state. +6556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM IC handle +6557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL state +6558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim) +6560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM One Pulse Mode handle state. +6566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM OPM handle +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL state +6568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim) +6570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; +6572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM Encoder Mode handle state. +6576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +6577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval HAL state +6578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim) +6580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; +6582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return the TIM Encoder Mode handle state. + ARM GAS /tmp/cc0aF2h1.s page 117 + + +6586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +6587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval Active channel +6588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim) +6590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->Channel; +6592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return actual state of the TIM channel. +6596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +6597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel TIM Channel +6598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +6599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +6600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +6601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +6602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +6603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 +6604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval TIM Channel state +6606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channe +6608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state; +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +6612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +6615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return channel_state; +6617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Return actual state of a DMA burst operation. +6621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval DMA burst state +6623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim) +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +6627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +6628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->DMABurstState; +6630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +6634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @} +6638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** @defgroup TIM_Private_Functions TIM Private Functions +6641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @{ +6642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ + ARM GAS /tmp/cc0aF2h1.s page 118 + + +6643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA error callback +6646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_DMAError(DMA_HandleTypeDef *hdma) +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->ErrorCallback(htim); +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ErrorCallback(htim); +6682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Delay Pulse complete callback. +6689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma) +6693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 119 + + +6700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* nothing to do */ +6735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Delay Pulse half complete callback. +6748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma) +6752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 120 + + +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* nothing to do */ +6774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback(htim); +6778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedHalfCpltCallback(htim); +6780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Capture complete callback. +6787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma) +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 121 + + +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* nothing to do */ +6837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +6841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +6843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Capture half complete callback. +6850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma) +6854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 122 + + +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +6874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* nothing to do */ +6876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback(htim); +6880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_IC_CaptureHalfCpltCallback(htim); +6882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Period Elapse complete callback. +6889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma) +6893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->hdma[TIM_DMA_ID_UPDATE]->Init.Mode == DMA_NORMAL) +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedCallback(htim); +6903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PeriodElapsedCallback(htim); +6905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Period Elapse half complete callback. +6910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma) +6914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback(htim); +6919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PeriodElapsedHalfCpltCallback(htim); +6921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Trigger callback. +6926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None + ARM GAS /tmp/cc0aF2h1.s page 123 + + +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma) +6930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (htim->hdma[TIM_DMA_ID_TRIGGER]->Init.Mode == DMA_NORMAL) +6934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerCallback(htim); +6940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_TriggerCallback(htim); +6942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief TIM DMA Trigger half complete callback. +6947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma) +6951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->TriggerHalfCpltCallback(htim); +6956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_TriggerHalfCpltCallback(htim); +6958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +6962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Time Base configuration +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx TIM peripheral +6964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Structure TIM Base configuration structure +6965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +6966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) +6968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr1; +6970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 = TIMx->CR1; +6971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set TIM Time Base Unit parameters ---------------------------------------*/ +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) +6974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Counter Mode */ +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; +6978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) +6981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +6982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the clock division */ +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 &= ~TIM_CR1_CKD; +6984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + ARM GAS /tmp/cc0aF2h1.s page 124 + + +6985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +6986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the auto-reload preload */ +6988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); +6989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR1 = tmpcr1; +6991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Autoreload value */ +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->ARR = (uint32_t)Structure->Period ; +6994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Prescaler value */ +6996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->PSC = Structure->Prescaler; +6997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Repetition Counter value */ +7001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->RCR = Structure->RepetitionCounter; +7002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Generate an update event to reload the Prescaler +7005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** and the repetition counter (only for advanced timer) value immediately */ +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->EGR = TIM_EGR_UG; +7007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer Output Compare 1 configuration +7011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OC_Config The output configuration structure +7013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +7016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 29 .loc 1 7016 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 34 .loc 1 7016 1 is_stmt 0 view .LVU1 + 35 0000 30B4 push {r4, r5} + 36 .cfi_def_cfa_offset 8 + 37 .cfi_offset 4, -8 + 38 .cfi_offset 5, -4 +7017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 39 .loc 1 7017 3 is_stmt 1 view .LVU2 +7018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 40 .loc 1 7018 3 view .LVU3 +7019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 41 .loc 1 7019 3 view .LVU4 +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 42 .loc 1 7022 3 view .LVU5 + 43 .loc 1 7022 7 is_stmt 0 view .LVU6 + 44 0002 036A ldr r3, [r0, #32] + 45 .loc 1 7022 14 view .LVU7 + 46 0004 23F00103 bic r3, r3, #1 + 47 0008 0362 str r3, [r0, #32] + ARM GAS /tmp/cc0aF2h1.s page 125 + + +7023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 48 .loc 1 7025 3 is_stmt 1 view .LVU8 + 49 .loc 1 7025 11 is_stmt 0 view .LVU9 + 50 000a 026A ldr r2, [r0, #32] + 51 .LVL1: +7026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 52 .loc 1 7027 3 is_stmt 1 view .LVU10 + 53 .loc 1 7027 10 is_stmt 0 view .LVU11 + 54 000c 4468 ldr r4, [r0, #4] + 55 .LVL2: +7028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +7030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx = TIMx->CCMR1; + 56 .loc 1 7030 3 is_stmt 1 view .LVU12 + 57 .loc 1 7030 12 is_stmt 0 view .LVU13 + 58 000e 8369 ldr r3, [r0, #24] + 59 .LVL3: +7031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare Mode Bits */ +7033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_OC1M; + 60 .loc 1 7033 3 is_stmt 1 view .LVU14 +7034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC1S; + 61 .loc 1 7034 3 view .LVU15 + 62 .loc 1 7034 12 is_stmt 0 view .LVU16 + 63 0010 23F48033 bic r3, r3, #65536 + 64 .LVL4: + 65 .loc 1 7034 12 view .LVU17 + 66 0014 23F07303 bic r3, r3, #115 + 67 .LVL5: +7035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Output Compare Mode */ +7036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 68 .loc 1 7036 3 is_stmt 1 view .LVU18 + 69 .loc 1 7036 24 is_stmt 0 view .LVU19 + 70 0018 0D68 ldr r5, [r1] + 71 .loc 1 7036 12 view .LVU20 + 72 001a 1D43 orrs r5, r5, r3 + 73 .LVL6: +7037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Polarity level */ +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1P; + 74 .loc 1 7039 3 is_stmt 1 view .LVU21 + 75 .loc 1 7039 11 is_stmt 0 view .LVU22 + 76 001c 22F00202 bic r2, r2, #2 + 77 .LVL7: +7040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= OC_Config->OCPolarity; + 78 .loc 1 7041 3 is_stmt 1 view .LVU23 + 79 .loc 1 7041 23 is_stmt 0 view .LVU24 + 80 0020 8B68 ldr r3, [r1, #8] + 81 .loc 1 7041 11 view .LVU25 + 82 0022 1343 orrs r3, r3, r2 + 83 .LVL8: +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) + ARM GAS /tmp/cc0aF2h1.s page 126 + + + 84 .loc 1 7043 3 is_stmt 1 view .LVU26 + 85 .loc 1 7043 6 is_stmt 0 view .LVU27 + 86 0024 184A ldr r2, .L7 + 87 0026 9042 cmp r0, r2 + 88 0028 0BD0 beq .L2 + 89 .loc 1 7043 7 discriminator 1 view .LVU28 + 90 002a 02F5A052 add r2, r2, #5120 + 91 002e 9042 cmp r0, r2 + 92 0030 07D0 beq .L2 + 93 .loc 1 7043 7 discriminator 2 view .LVU29 + 94 0032 02F58062 add r2, r2, #1024 + 95 0036 9042 cmp r0, r2 + 96 0038 03D0 beq .L2 + 97 .loc 1 7043 7 discriminator 3 view .LVU30 + 98 003a 02F58062 add r2, r2, #1024 + 99 003e 9042 cmp r0, r2 + 100 0040 05D1 bne .L3 + 101 .L2: +7044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check parameters */ +7046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + 102 .loc 1 7046 5 is_stmt 1 view .LVU31 +7047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N Polarity level */ +7049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1NP; + 103 .loc 1 7049 5 view .LVU32 + 104 .loc 1 7049 13 is_stmt 0 view .LVU33 + 105 0042 23F00803 bic r3, r3, #8 + 106 .LVL9: +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ +7051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= OC_Config->OCNPolarity; + 107 .loc 1 7051 5 is_stmt 1 view .LVU34 + 108 .loc 1 7051 25 is_stmt 0 view .LVU35 + 109 0046 CA68 ldr r2, [r1, #12] + 110 .loc 1 7051 13 view .LVU36 + 111 0048 1A43 orrs r2, r2, r3 + 112 .LVL10: +7052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ +7053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1NE; + 113 .loc 1 7053 5 is_stmt 1 view .LVU37 + 114 .loc 1 7053 13 is_stmt 0 view .LVU38 + 115 004a 22F00403 bic r3, r2, #4 + 116 .LVL11: + 117 .L3: +7054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 118 .loc 1 7056 3 is_stmt 1 view .LVU39 + 119 .loc 1 7056 6 is_stmt 0 view .LVU40 + 120 004e 0E4A ldr r2, .L7 + 121 0050 9042 cmp r0, r2 + 122 0052 0BD0 beq .L4 + 123 .loc 1 7056 7 discriminator 1 view .LVU41 + 124 0054 02F5A052 add r2, r2, #5120 + 125 0058 9042 cmp r0, r2 + 126 005a 07D0 beq .L4 + 127 .loc 1 7056 7 discriminator 2 view .LVU42 + ARM GAS /tmp/cc0aF2h1.s page 127 + + + 128 005c 02F58062 add r2, r2, #1024 + 129 0060 9042 cmp r0, r2 + 130 0062 03D0 beq .L4 + 131 .loc 1 7056 7 discriminator 3 view .LVU43 + 132 0064 02F58062 add r2, r2, #1024 + 133 0068 9042 cmp r0, r2 + 134 006a 05D1 bne .L5 + 135 .L4: +7057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check parameters */ +7059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + 136 .loc 1 7059 5 is_stmt 1 view .LVU44 +7060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 137 .loc 1 7060 5 view .LVU45 +7061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +7063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS1; + 138 .loc 1 7063 5 view .LVU46 + 139 .LVL12: +7064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS1N; + 140 .loc 1 7064 5 view .LVU47 + 141 .loc 1 7064 12 is_stmt 0 view .LVU48 + 142 006c 24F44074 bic r4, r4, #768 + 143 .LVL13: +7065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Idle state */ +7066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= OC_Config->OCIdleState; + 144 .loc 1 7066 5 is_stmt 1 view .LVU49 + 145 .loc 1 7066 24 is_stmt 0 view .LVU50 + 146 0070 4A69 ldr r2, [r1, #20] + 147 .loc 1 7066 12 view .LVU51 + 148 0072 2243 orrs r2, r2, r4 + 149 .LVL14: +7067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Idle state */ +7068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= OC_Config->OCNIdleState; + 150 .loc 1 7068 5 is_stmt 1 view .LVU52 + 151 .loc 1 7068 24 is_stmt 0 view .LVU53 + 152 0074 8C69 ldr r4, [r1, #24] + 153 .loc 1 7068 12 view .LVU54 + 154 0076 1443 orrs r4, r4, r2 + 155 .LVL15: + 156 .L5: +7069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CR2 */ +7072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 157 .loc 1 7072 3 is_stmt 1 view .LVU55 + 158 .loc 1 7072 13 is_stmt 0 view .LVU56 + 159 0078 4460 str r4, [r0, #4] +7073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +7075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; + 160 .loc 1 7075 3 is_stmt 1 view .LVU57 + 161 .loc 1 7075 15 is_stmt 0 view .LVU58 + 162 007a 8561 str r5, [r0, #24] +7076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCR1 = OC_Config->Pulse; + ARM GAS /tmp/cc0aF2h1.s page 128 + + + 163 .loc 1 7078 3 is_stmt 1 view .LVU59 + 164 .loc 1 7078 25 is_stmt 0 view .LVU60 + 165 007c 4A68 ldr r2, [r1, #4] + 166 .loc 1 7078 14 view .LVU61 + 167 007e 4263 str r2, [r0, #52] +7079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +7081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 168 .loc 1 7081 3 is_stmt 1 view .LVU62 + 169 .loc 1 7081 14 is_stmt 0 view .LVU63 + 170 0080 0362 str r3, [r0, #32] +7082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 171 .loc 1 7082 1 view .LVU64 + 172 0082 30BC pop {r4, r5} + 173 .cfi_restore 5 + 174 .cfi_restore 4 + 175 .cfi_def_cfa_offset 0 + 176 .LVL16: + 177 .loc 1 7082 1 view .LVU65 + 178 0084 7047 bx lr + 179 .L8: + 180 0086 00BF .align 2 + 181 .L7: + 182 0088 002C0140 .word 1073818624 + 183 .cfi_endproc + 184 .LFE235: + 186 .section .text.TIM_OC3_SetConfig,"ax",%progbits + 187 .align 1 + 188 .syntax unified + 189 .thumb + 190 .thumb_func + 192 TIM_OC3_SetConfig: + 193 .LVL17: + 194 .LFB237: +7083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer Output Compare 2 configuration +7086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OC_Config The output configuration structure +7088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; +7094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; +7095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; +7098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; +7101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = TIMx->CR2; +7103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +7105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx = TIMx->CCMR1; + ARM GAS /tmp/cc0aF2h1.s page 129 + + +7106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +7108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_OC2M; +7109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; +7110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Output Compare Mode */ +7112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); +7113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Polarity level */ +7115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2P; +7116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 4U); +7118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); +7122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N Polarity level */ +7124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2NP; +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ +7126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCNPolarity << 4U); +7127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ +7128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2NE; +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) +7133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check parameters */ +7135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); +7136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); +7137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +7139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2; +7140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CR2_OIS2N) +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2N; +7142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CR2_OIS2N */ +7143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Idle state */ +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 2U); +7145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Idle state */ +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCNIdleState << 2U); +7147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CR2 */ +7150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR2 = tmpcr2; +7151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; +7154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCR2 = OC_Config->Pulse; +7157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +7159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; +7160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + ARM GAS /tmp/cc0aF2h1.s page 130 + + +7163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer Output Compare 3 configuration +7164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OC_Config The output configuration structure +7166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +7169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 195 .loc 1 7169 1 is_stmt 1 view -0 + 196 .cfi_startproc + 197 @ args = 0, pretend = 0, frame = 0 + 198 @ frame_needed = 0, uses_anonymous_args = 0 + 199 @ link register save eliminated. + 200 .loc 1 7169 1 is_stmt 0 view .LVU67 + 201 0000 30B4 push {r4, r5} + 202 .cfi_def_cfa_offset 8 + 203 .cfi_offset 4, -8 + 204 .cfi_offset 5, -4 +7170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 205 .loc 1 7170 3 is_stmt 1 view .LVU68 +7171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 206 .loc 1 7171 3 view .LVU69 +7172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 207 .loc 1 7172 3 view .LVU70 +7173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 3: Reset the CC2E Bit */ +7175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC3E; + 208 .loc 1 7175 3 view .LVU71 + 209 .loc 1 7175 7 is_stmt 0 view .LVU72 + 210 0002 036A ldr r3, [r0, #32] + 211 .loc 1 7175 14 view .LVU73 + 212 0004 23F48073 bic r3, r3, #256 + 213 0008 0362 str r3, [r0, #32] +7176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 214 .loc 1 7178 3 is_stmt 1 view .LVU74 + 215 .loc 1 7178 11 is_stmt 0 view .LVU75 + 216 000a 036A ldr r3, [r0, #32] + 217 .LVL18: +7179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 218 .loc 1 7180 3 is_stmt 1 view .LVU76 + 219 .loc 1 7180 10 is_stmt 0 view .LVU77 + 220 000c 4268 ldr r2, [r0, #4] + 221 .LVL19: +7181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR2 register value */ +7183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; + 222 .loc 1 7183 3 is_stmt 1 view .LVU78 + 223 .loc 1 7183 12 is_stmt 0 view .LVU79 + 224 000e C469 ldr r4, [r0, #28] + 225 .LVL20: +7184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +7186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_OC3M; + 226 .loc 1 7186 3 is_stmt 1 view .LVU80 +7187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_CC3S; + ARM GAS /tmp/cc0aF2h1.s page 131 + + + 227 .loc 1 7187 3 view .LVU81 + 228 .loc 1 7187 12 is_stmt 0 view .LVU82 + 229 0010 24F4803C bic ip, r4, #65536 + 230 0014 2CF0730C bic ip, ip, #115 + 231 .LVL21: +7188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Output Compare Mode */ +7189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 232 .loc 1 7189 3 is_stmt 1 view .LVU83 + 233 .loc 1 7189 24 is_stmt 0 view .LVU84 + 234 0018 0C68 ldr r4, [r1] + 235 .loc 1 7189 12 view .LVU85 + 236 001a 44EA0C05 orr r5, r4, ip + 237 .LVL22: +7190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Polarity level */ +7192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3P; + 238 .loc 1 7192 3 is_stmt 1 view .LVU86 + 239 .loc 1 7192 11 is_stmt 0 view .LVU87 + 240 001e 23F40073 bic r3, r3, #512 + 241 .LVL23: +7193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 8U); + 242 .loc 1 7194 3 is_stmt 1 view .LVU88 + 243 .loc 1 7194 24 is_stmt 0 view .LVU89 + 244 0022 8C68 ldr r4, [r1, #8] + 245 .loc 1 7194 11 view .LVU90 + 246 0024 43EA0423 orr r3, r3, r4, lsl #8 + 247 .LVL24: +7195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) + 248 .loc 1 7196 3 is_stmt 1 view .LVU91 + 249 .loc 1 7196 6 is_stmt 0 view .LVU92 + 250 0028 124C ldr r4, .L15 + 251 002a A042 cmp r0, r4 + 252 002c 0BD0 beq .L14 +7197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); +7199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N Polarity level */ +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3NP; +7202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ +7203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCNPolarity << 8U); +7204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ +7205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3NE; +7206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CR2_OIS3) +7209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 253 .loc 1 7209 3 is_stmt 1 view .LVU93 + 254 .loc 1 7209 7 is_stmt 0 discriminator 1 view .LVU94 + 255 002e 124C ldr r4, .L15+4 + 256 0030 A042 cmp r0, r4 + 257 0032 0FD0 beq .L11 + 258 .loc 1 7209 7 discriminator 2 view .LVU95 + 259 0034 04F58064 add r4, r4, #1024 + 260 0038 A042 cmp r0, r4 + 261 003a 0BD0 beq .L11 + ARM GAS /tmp/cc0aF2h1.s page 132 + + + 262 .loc 1 7209 7 discriminator 3 view .LVU96 + 263 003c 04F58064 add r4, r4, #1024 + 264 0040 A042 cmp r0, r4 + 265 0042 0FD1 bne .L12 + 266 0044 06E0 b .L11 + 267 .L14: +7198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 268 .loc 1 7198 5 is_stmt 1 view .LVU97 +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ + 269 .loc 1 7201 5 view .LVU98 +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ + 270 .loc 1 7201 13 is_stmt 0 view .LVU99 + 271 0046 23F40063 bic r3, r3, #2048 + 272 .LVL25: +7203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ + 273 .loc 1 7203 5 is_stmt 1 view .LVU100 +7203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ + 274 .loc 1 7203 26 is_stmt 0 view .LVU101 + 275 004a CC68 ldr r4, [r1, #12] +7203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ + 276 .loc 1 7203 13 view .LVU102 + 277 004c 43EA0423 orr r3, r3, r4, lsl #8 + 278 .LVL26: +7205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 279 .loc 1 7205 5 is_stmt 1 view .LVU103 +7205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 280 .loc 1 7205 13 is_stmt 0 view .LVU104 + 281 0050 23F48063 bic r3, r3, #1024 + 282 .LVL27: + 283 .loc 1 7209 3 is_stmt 1 view .LVU105 + 284 .L11: +7210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check parameters */ +7212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + 285 .loc 1 7212 5 view .LVU106 +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 286 .loc 1 7213 5 view .LVU107 +7214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +7216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS3; + 287 .loc 1 7216 5 view .LVU108 +7217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS3N; + 288 .loc 1 7217 5 view .LVU109 + 289 .loc 1 7217 12 is_stmt 0 view .LVU110 + 290 0054 22F44052 bic r2, r2, #12288 + 291 .LVL28: +7218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Idle state */ +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 4U); + 292 .loc 1 7219 5 is_stmt 1 view .LVU111 + 293 .loc 1 7219 25 is_stmt 0 view .LVU112 + 294 0058 4C69 ldr r4, [r1, #20] + 295 .loc 1 7219 12 view .LVU113 + 296 005a 42EA0412 orr r2, r2, r4, lsl #4 + 297 .LVL29: +7220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Idle state */ +7221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCNIdleState << 4U); + 298 .loc 1 7221 5 is_stmt 1 view .LVU114 + ARM GAS /tmp/cc0aF2h1.s page 133 + + + 299 .loc 1 7221 25 is_stmt 0 view .LVU115 + 300 005e 8C69 ldr r4, [r1, #24] + 301 .loc 1 7221 12 view .LVU116 + 302 0060 42EA0412 orr r2, r2, r4, lsl #4 + 303 .LVL30: + 304 .L12: +7222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CR2_OIS3 */ +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CR2 */ +7226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 305 .loc 1 7226 3 is_stmt 1 view .LVU117 + 306 .loc 1 7226 13 is_stmt 0 view .LVU118 + 307 0064 4260 str r2, [r0, #4] +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR2 */ +7229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR2 = tmpccmrx; + 308 .loc 1 7229 3 is_stmt 1 view .LVU119 + 309 .loc 1 7229 15 is_stmt 0 view .LVU120 + 310 0066 C561 str r5, [r0, #28] +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCR3 = OC_Config->Pulse; + 311 .loc 1 7232 3 is_stmt 1 view .LVU121 + 312 .loc 1 7232 25 is_stmt 0 view .LVU122 + 313 0068 4A68 ldr r2, [r1, #4] + 314 .LVL31: + 315 .loc 1 7232 14 view .LVU123 + 316 006a C263 str r2, [r0, #60] +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +7235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 317 .loc 1 7235 3 is_stmt 1 view .LVU124 + 318 .loc 1 7235 14 is_stmt 0 view .LVU125 + 319 006c 0362 str r3, [r0, #32] +7236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 320 .loc 1 7236 1 view .LVU126 + 321 006e 30BC pop {r4, r5} + 322 .cfi_restore 5 + 323 .cfi_restore 4 + 324 .cfi_def_cfa_offset 0 + 325 .LVL32: + 326 .loc 1 7236 1 view .LVU127 + 327 0070 7047 bx lr + 328 .L16: + 329 0072 00BF .align 2 + 330 .L15: + 331 0074 002C0140 .word 1073818624 + 332 0078 00400140 .word 1073823744 + 333 .cfi_endproc + 334 .LFE237: + 336 .section .text.TIM_OC4_SetConfig,"ax",%progbits + 337 .align 1 + 338 .syntax unified + 339 .thumb + 340 .thumb_func + 342 TIM_OC4_SetConfig: + ARM GAS /tmp/cc0aF2h1.s page 134 + + + 343 .LVL33: + 344 .LFB238: +7237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer Output Compare 4 configuration +7240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OC_Config The output configuration structure +7242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +7245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 345 .loc 1 7245 1 is_stmt 1 view -0 + 346 .cfi_startproc + 347 @ args = 0, pretend = 0, frame = 0 + 348 @ frame_needed = 0, uses_anonymous_args = 0 + 349 @ link register save eliminated. + 350 .loc 1 7245 1 is_stmt 0 view .LVU129 + 351 0000 30B4 push {r4, r5} + 352 .cfi_def_cfa_offset 8 + 353 .cfi_offset 4, -8 + 354 .cfi_offset 5, -4 +7246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 355 .loc 1 7246 3 is_stmt 1 view .LVU130 +7247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 356 .loc 1 7247 3 view .LVU131 +7248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 357 .loc 1 7248 3 view .LVU132 +7249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ +7251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC4E; + 358 .loc 1 7251 3 view .LVU133 + 359 .loc 1 7251 7 is_stmt 0 view .LVU134 + 360 0002 036A ldr r3, [r0, #32] + 361 .loc 1 7251 14 view .LVU135 + 362 0004 23F48053 bic r3, r3, #4096 + 363 0008 0362 str r3, [r0, #32] +7252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 364 .loc 1 7254 3 is_stmt 1 view .LVU136 + 365 .loc 1 7254 11 is_stmt 0 view .LVU137 + 366 000a 026A ldr r2, [r0, #32] + 367 .LVL34: +7255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 368 .loc 1 7256 3 is_stmt 1 view .LVU138 + 369 .loc 1 7256 10 is_stmt 0 view .LVU139 + 370 000c 4468 ldr r4, [r0, #4] + 371 .LVL35: +7257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR2 register value */ +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; + 372 .loc 1 7259 3 is_stmt 1 view .LVU140 + 373 .loc 1 7259 12 is_stmt 0 view .LVU141 + 374 000e C369 ldr r3, [r0, #28] + 375 .LVL36: +7260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 135 + + +7261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +7262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_OC4M; + 376 .loc 1 7262 3 is_stmt 1 view .LVU142 +7263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_CC4S; + 377 .loc 1 7263 3 view .LVU143 + 378 .loc 1 7263 12 is_stmt 0 view .LVU144 + 379 0010 23F08073 bic r3, r3, #16777216 + 380 .LVL37: + 381 .loc 1 7263 12 view .LVU145 + 382 0014 23F4E643 bic r3, r3, #29440 + 383 .LVL38: +7264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Output Compare Mode */ +7266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); + 384 .loc 1 7266 3 is_stmt 1 view .LVU146 + 385 .loc 1 7266 25 is_stmt 0 view .LVU147 + 386 0018 0D68 ldr r5, [r1] + 387 .loc 1 7266 12 view .LVU148 + 388 001a 43EA0523 orr r3, r3, r5, lsl #8 + 389 .LVL39: +7267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Polarity level */ +7269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC4P; + 390 .loc 1 7269 3 is_stmt 1 view .LVU149 + 391 .loc 1 7269 11 is_stmt 0 view .LVU150 + 392 001e 22F40052 bic r2, r2, #8192 + 393 .LVL40: +7270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 12U); + 394 .loc 1 7271 3 is_stmt 1 view .LVU151 + 395 .loc 1 7271 24 is_stmt 0 view .LVU152 + 396 0022 8D68 ldr r5, [r1, #8] + 397 .loc 1 7271 11 view .LVU153 + 398 0024 42EA0532 orr r2, r2, r5, lsl #12 + 399 .LVL41: +7272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CR2_OIS4) +7274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 400 .loc 1 7274 3 is_stmt 1 view .LVU154 + 401 .loc 1 7274 6 is_stmt 0 view .LVU155 + 402 0028 0D4D ldr r5, .L21 + 403 002a A842 cmp r0, r5 + 404 002c 0BD0 beq .L18 + 405 .loc 1 7274 7 discriminator 1 view .LVU156 + 406 002e 05F5A055 add r5, r5, #5120 + 407 0032 A842 cmp r0, r5 + 408 0034 07D0 beq .L18 + 409 .loc 1 7274 7 discriminator 2 view .LVU157 + 410 0036 05F58065 add r5, r5, #1024 + 411 003a A842 cmp r0, r5 + 412 003c 03D0 beq .L18 + 413 .loc 1 7274 7 discriminator 3 view .LVU158 + 414 003e 05F58065 add r5, r5, #1024 + 415 0042 A842 cmp r0, r5 + 416 0044 04D1 bne .L19 + 417 .L18: +7275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 136 + + +7276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check parameters */ +7277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 418 .loc 1 7277 5 is_stmt 1 view .LVU159 +7278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare IDLE State */ +7280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS4; + 419 .loc 1 7280 5 view .LVU160 + 420 .loc 1 7280 12 is_stmt 0 view .LVU161 + 421 0046 24F48044 bic r4, r4, #16384 + 422 .LVL42: +7281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Idle state */ +7283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 6U); + 423 .loc 1 7283 5 is_stmt 1 view .LVU162 + 424 .loc 1 7283 25 is_stmt 0 view .LVU163 + 425 004a 4D69 ldr r5, [r1, #20] + 426 .loc 1 7283 12 view .LVU164 + 427 004c 44EA8514 orr r4, r4, r5, lsl #6 + 428 .LVL43: + 429 .L19: +7284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CR2_OIS4 */ +7286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CR2 */ +7288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 430 .loc 1 7288 3 is_stmt 1 view .LVU165 + 431 .loc 1 7288 13 is_stmt 0 view .LVU166 + 432 0050 4460 str r4, [r0, #4] +7289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR2 */ +7291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR2 = tmpccmrx; + 433 .loc 1 7291 3 is_stmt 1 view .LVU167 + 434 .loc 1 7291 15 is_stmt 0 view .LVU168 + 435 0052 C361 str r3, [r0, #28] +7292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCR4 = OC_Config->Pulse; + 436 .loc 1 7294 3 is_stmt 1 view .LVU169 + 437 .loc 1 7294 25 is_stmt 0 view .LVU170 + 438 0054 4B68 ldr r3, [r1, #4] + 439 .LVL44: + 440 .loc 1 7294 14 view .LVU171 + 441 0056 0364 str r3, [r0, #64] + 442 .LVL45: +7295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +7297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 443 .loc 1 7297 3 is_stmt 1 view .LVU172 + 444 .loc 1 7297 14 is_stmt 0 view .LVU173 + 445 0058 0262 str r2, [r0, #32] +7298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 446 .loc 1 7298 1 view .LVU174 + 447 005a 30BC pop {r4, r5} + 448 .cfi_restore 5 + 449 .cfi_restore 4 + 450 .cfi_def_cfa_offset 0 + 451 .LVL46: + ARM GAS /tmp/cc0aF2h1.s page 137 + + + 452 .loc 1 7298 1 view .LVU175 + 453 005c 7047 bx lr + 454 .L22: + 455 005e 00BF .align 2 + 456 .L21: + 457 0060 002C0140 .word 1073818624 + 458 .cfi_endproc + 459 .LFE238: + 461 .section .text.TIM_OC5_SetConfig,"ax",%progbits + 462 .align 1 + 463 .syntax unified + 464 .thumb + 465 .thumb_func + 467 TIM_OC5_SetConfig: + 468 .LVL47: + 469 .LFB239: +7299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC5E) +7301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer Output Compare 5 configuration +7303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OC_Config The output configuration structure +7305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, +7308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_OC_InitTypeDef *OC_Config) +7309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 470 .loc 1 7309 1 is_stmt 1 view -0 + 471 .cfi_startproc + 472 @ args = 0, pretend = 0, frame = 0 + 473 @ frame_needed = 0, uses_anonymous_args = 0 + 474 @ link register save eliminated. + 475 .loc 1 7309 1 is_stmt 0 view .LVU177 + 476 0000 30B4 push {r4, r5} + 477 .cfi_def_cfa_offset 8 + 478 .cfi_offset 4, -8 + 479 .cfi_offset 5, -4 +7310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 480 .loc 1 7310 3 is_stmt 1 view .LVU178 +7311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 481 .loc 1 7311 3 view .LVU179 +7312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 482 .loc 1 7312 3 view .LVU180 +7313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the output: Reset the CCxE Bit */ +7315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC5E; + 483 .loc 1 7315 3 view .LVU181 + 484 .loc 1 7315 7 is_stmt 0 view .LVU182 + 485 0002 036A ldr r3, [r0, #32] + 486 .loc 1 7315 14 view .LVU183 + 487 0004 23F48033 bic r3, r3, #65536 + 488 0008 0362 str r3, [r0, #32] +7316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 489 .loc 1 7318 3 is_stmt 1 view .LVU184 + 490 .loc 1 7318 11 is_stmt 0 view .LVU185 + ARM GAS /tmp/cc0aF2h1.s page 138 + + + 491 000a 036A ldr r3, [r0, #32] + 492 .LVL48: +7319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 493 .loc 1 7320 3 is_stmt 1 view .LVU186 + 494 .loc 1 7320 10 is_stmt 0 view .LVU187 + 495 000c 4468 ldr r4, [r0, #4] + 496 .LVL49: +7321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +7322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx = TIMx->CCMR3; + 497 .loc 1 7322 3 is_stmt 1 view .LVU188 + 498 .loc 1 7322 12 is_stmt 0 view .LVU189 + 499 000e 426D ldr r2, [r0, #84] + 500 .LVL50: +7323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare Mode Bits */ +7325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~(TIM_CCMR3_OC5M); + 501 .loc 1 7325 3 is_stmt 1 view .LVU190 + 502 .loc 1 7325 12 is_stmt 0 view .LVU191 + 503 0010 22F48032 bic r2, r2, #65536 + 504 .LVL51: + 505 .loc 1 7325 12 view .LVU192 + 506 0014 22F07002 bic r2, r2, #112 + 507 .LVL52: +7326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Output Compare Mode */ +7327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 508 .loc 1 7327 3 is_stmt 1 view .LVU193 + 509 .loc 1 7327 12 is_stmt 0 view .LVU194 + 510 0018 0D68 ldr r5, [r1] + 511 001a 2A43 orrs r2, r2, r5 + 512 .LVL53: +7328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Polarity level */ +7330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC5P; + 513 .loc 1 7330 3 is_stmt 1 view .LVU195 + 514 .loc 1 7330 11 is_stmt 0 view .LVU196 + 515 001c 23F40033 bic r3, r3, #131072 + 516 .LVL54: +7331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 16U); + 517 .loc 1 7332 3 is_stmt 1 view .LVU197 + 518 .loc 1 7332 24 is_stmt 0 view .LVU198 + 519 0020 8D68 ldr r5, [r1, #8] + 520 .loc 1 7332 11 view .LVU199 + 521 0022 43EA0543 orr r3, r3, r5, lsl #16 + 522 .LVL55: +7333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 523 .loc 1 7334 3 is_stmt 1 view .LVU200 + 524 .loc 1 7334 6 is_stmt 0 view .LVU201 + 525 0026 0D4D ldr r5, .L27 + 526 0028 A842 cmp r0, r5 + 527 002a 0BD0 beq .L24 + 528 .loc 1 7334 7 discriminator 1 view .LVU202 + 529 002c 05F5A055 add r5, r5, #5120 + 530 0030 A842 cmp r0, r5 + 531 0032 07D0 beq .L24 + ARM GAS /tmp/cc0aF2h1.s page 139 + + + 532 .loc 1 7334 7 discriminator 2 view .LVU203 + 533 0034 05F58065 add r5, r5, #1024 + 534 0038 A842 cmp r0, r5 + 535 003a 03D0 beq .L24 + 536 .loc 1 7334 7 discriminator 3 view .LVU204 + 537 003c 05F58065 add r5, r5, #1024 + 538 0040 A842 cmp r0, r5 + 539 0042 04D1 bne .L25 + 540 .L24: +7335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare IDLE State */ +7337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS5; + 541 .loc 1 7337 5 is_stmt 1 view .LVU205 + 542 .loc 1 7337 12 is_stmt 0 view .LVU206 + 543 0044 24F48034 bic r4, r4, #65536 + 544 .LVL56: +7338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Idle state */ +7339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 8U); + 545 .loc 1 7339 5 is_stmt 1 view .LVU207 + 546 .loc 1 7339 25 is_stmt 0 view .LVU208 + 547 0048 4D69 ldr r5, [r1, #20] + 548 .loc 1 7339 12 view .LVU209 + 549 004a 44EA0524 orr r4, r4, r5, lsl #8 + 550 .LVL57: + 551 .L25: +7340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CR2 */ +7342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 552 .loc 1 7342 3 is_stmt 1 view .LVU210 + 553 .loc 1 7342 13 is_stmt 0 view .LVU211 + 554 004e 4460 str r4, [r0, #4] +7343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR3 */ +7345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR3 = tmpccmrx; + 555 .loc 1 7345 3 is_stmt 1 view .LVU212 + 556 .loc 1 7345 15 is_stmt 0 view .LVU213 + 557 0050 4265 str r2, [r0, #84] +7346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCR5 = OC_Config->Pulse; + 558 .loc 1 7348 3 is_stmt 1 view .LVU214 + 559 .loc 1 7348 25 is_stmt 0 view .LVU215 + 560 0052 4A68 ldr r2, [r1, #4] + 561 .LVL58: + 562 .loc 1 7348 14 view .LVU216 + 563 0054 8265 str r2, [r0, #88] + 564 .LVL59: +7349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +7351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 565 .loc 1 7351 3 is_stmt 1 view .LVU217 + 566 .loc 1 7351 14 is_stmt 0 view .LVU218 + 567 0056 0362 str r3, [r0, #32] +7352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 568 .loc 1 7352 1 view .LVU219 + 569 0058 30BC pop {r4, r5} + 570 .cfi_restore 5 + ARM GAS /tmp/cc0aF2h1.s page 140 + + + 571 .cfi_restore 4 + 572 .cfi_def_cfa_offset 0 + 573 .LVL60: + 574 .loc 1 7352 1 view .LVU220 + 575 005a 7047 bx lr + 576 .L28: + 577 .align 2 + 578 .L27: + 579 005c 002C0140 .word 1073818624 + 580 .cfi_endproc + 581 .LFE239: + 583 .section .text.TIM_OC6_SetConfig,"ax",%progbits + 584 .align 1 + 585 .syntax unified + 586 .thumb + 587 .thumb_func + 589 TIM_OC6_SetConfig: + 590 .LVL61: + 591 .LFB240: +7353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC5E */ +7354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CCER_CC6E) +7356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Timer Output Compare 6 configuration +7358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param OC_Config The output configuration structure +7360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, +7363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_OC_InitTypeDef *OC_Config) +7364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 592 .loc 1 7364 1 is_stmt 1 view -0 + 593 .cfi_startproc + 594 @ args = 0, pretend = 0, frame = 0 + 595 @ frame_needed = 0, uses_anonymous_args = 0 + 596 @ link register save eliminated. + 597 .loc 1 7364 1 is_stmt 0 view .LVU222 + 598 0000 30B4 push {r4, r5} + 599 .cfi_def_cfa_offset 8 + 600 .cfi_offset 4, -8 + 601 .cfi_offset 5, -4 +7365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 602 .loc 1 7365 3 is_stmt 1 view .LVU223 +7366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 603 .loc 1 7366 3 view .LVU224 +7367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 604 .loc 1 7367 3 view .LVU225 +7368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the output: Reset the CCxE Bit */ +7370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC6E; + 605 .loc 1 7370 3 view .LVU226 + 606 .loc 1 7370 7 is_stmt 0 view .LVU227 + 607 0002 036A ldr r3, [r0, #32] + 608 .loc 1 7370 14 view .LVU228 + 609 0004 23F48013 bic r3, r3, #1048576 + 610 0008 0362 str r3, [r0, #32] +7371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 141 + + +7372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 611 .loc 1 7373 3 is_stmt 1 view .LVU229 + 612 .loc 1 7373 11 is_stmt 0 view .LVU230 + 613 000a 026A ldr r2, [r0, #32] + 614 .LVL62: +7374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 615 .loc 1 7375 3 is_stmt 1 view .LVU231 + 616 .loc 1 7375 10 is_stmt 0 view .LVU232 + 617 000c 4468 ldr r4, [r0, #4] + 618 .LVL63: +7376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +7377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx = TIMx->CCMR3; + 619 .loc 1 7377 3 is_stmt 1 view .LVU233 + 620 .loc 1 7377 12 is_stmt 0 view .LVU234 + 621 000e 436D ldr r3, [r0, #84] + 622 .LVL64: +7378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare Mode Bits */ +7380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~(TIM_CCMR3_OC6M); + 623 .loc 1 7380 3 is_stmt 1 view .LVU235 + 624 .loc 1 7380 12 is_stmt 0 view .LVU236 + 625 0010 23F08073 bic r3, r3, #16777216 + 626 .LVL65: + 627 .loc 1 7380 12 view .LVU237 + 628 0014 23F4E043 bic r3, r3, #28672 + 629 .LVL66: +7381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Output Compare Mode */ +7382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); + 630 .loc 1 7382 3 is_stmt 1 view .LVU238 + 631 .loc 1 7382 25 is_stmt 0 view .LVU239 + 632 0018 0D68 ldr r5, [r1] + 633 .loc 1 7382 12 view .LVU240 + 634 001a 43EA0523 orr r3, r3, r5, lsl #8 + 635 .LVL67: +7383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Polarity level */ +7385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= (uint32_t)~TIM_CCER_CC6P; + 636 .loc 1 7385 3 is_stmt 1 view .LVU241 + 637 .loc 1 7385 11 is_stmt 0 view .LVU242 + 638 001e 22F40012 bic r2, r2, #2097152 + 639 .LVL68: +7386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 20U); + 640 .loc 1 7387 3 is_stmt 1 view .LVU243 + 641 .loc 1 7387 24 is_stmt 0 view .LVU244 + 642 0022 8D68 ldr r5, [r1, #8] + 643 .loc 1 7387 11 view .LVU245 + 644 0024 42EA0552 orr r2, r2, r5, lsl #20 + 645 .LVL69: +7388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 646 .loc 1 7389 3 is_stmt 1 view .LVU246 + 647 .loc 1 7389 6 is_stmt 0 view .LVU247 + 648 0028 0D4D ldr r5, .L33 + 649 002a A842 cmp r0, r5 + ARM GAS /tmp/cc0aF2h1.s page 142 + + + 650 002c 0BD0 beq .L30 + 651 .loc 1 7389 7 discriminator 1 view .LVU248 + 652 002e 05F5A055 add r5, r5, #5120 + 653 0032 A842 cmp r0, r5 + 654 0034 07D0 beq .L30 + 655 .loc 1 7389 7 discriminator 2 view .LVU249 + 656 0036 05F58065 add r5, r5, #1024 + 657 003a A842 cmp r0, r5 + 658 003c 03D0 beq .L30 + 659 .loc 1 7389 7 discriminator 3 view .LVU250 + 660 003e 05F58065 add r5, r5, #1024 + 661 0042 A842 cmp r0, r5 + 662 0044 04D1 bne .L31 + 663 .L30: +7390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output Compare IDLE State */ +7392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS6; + 664 .loc 1 7392 5 is_stmt 1 view .LVU251 + 665 .loc 1 7392 12 is_stmt 0 view .LVU252 + 666 0046 24F48024 bic r4, r4, #262144 + 667 .LVL70: +7393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Idle state */ +7394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 10U); + 668 .loc 1 7394 5 is_stmt 1 view .LVU253 + 669 .loc 1 7394 25 is_stmt 0 view .LVU254 + 670 004a 4D69 ldr r5, [r1, #20] + 671 .loc 1 7394 12 view .LVU255 + 672 004c 44EA8524 orr r4, r4, r5, lsl #10 + 673 .LVL71: + 674 .L31: +7395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CR2 */ +7398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 675 .loc 1 7398 3 is_stmt 1 view .LVU256 + 676 .loc 1 7398 13 is_stmt 0 view .LVU257 + 677 0050 4460 str r4, [r0, #4] +7399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR3 */ +7401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR3 = tmpccmrx; + 678 .loc 1 7401 3 is_stmt 1 view .LVU258 + 679 .loc 1 7401 15 is_stmt 0 view .LVU259 + 680 0052 4365 str r3, [r0, #84] +7402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCR6 = OC_Config->Pulse; + 681 .loc 1 7404 3 is_stmt 1 view .LVU260 + 682 .loc 1 7404 25 is_stmt 0 view .LVU261 + 683 0054 4B68 ldr r3, [r1, #4] + 684 .LVL72: + 685 .loc 1 7404 14 view .LVU262 + 686 0056 C365 str r3, [r0, #92] + 687 .LVL73: +7405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCER */ +7407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 688 .loc 1 7407 3 is_stmt 1 view .LVU263 + ARM GAS /tmp/cc0aF2h1.s page 143 + + + 689 .loc 1 7407 14 is_stmt 0 view .LVU264 + 690 0058 0262 str r2, [r0, #32] +7408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 691 .loc 1 7408 1 view .LVU265 + 692 005a 30BC pop {r4, r5} + 693 .cfi_restore 5 + 694 .cfi_restore 4 + 695 .cfi_def_cfa_offset 0 + 696 .LVL74: + 697 .loc 1 7408 1 view .LVU266 + 698 005c 7047 bx lr + 699 .L34: + 700 005e 00BF .align 2 + 701 .L33: + 702 0060 002C0140 .word 1073818624 + 703 .cfi_endproc + 704 .LFE240: + 706 .section .text.TIM_TI1_ConfigInputStage,"ax",%progbits + 707 .align 1 + 708 .syntax unified + 709 .thumb + 710 .thumb_func + 712 TIM_TI1_ConfigInputStage: + 713 .LVL75: + 714 .LFB243: +7409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CCER_CC6E */ +7410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Slave Timer configuration function +7413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param htim TIM handle +7414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param sSlaveConfig Slave timer configuration +7415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, +7418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) +7419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +7421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; +7422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; +7423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; +7424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +7426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +7427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Trigger Selection Bits */ +7429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_TS; +7430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Input Trigger source */ +7431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= sSlaveConfig->InputTrigger; +7432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the slave mode Bits */ +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_SMS; +7435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the slave mode */ +7436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= sSlaveConfig->SlaveMode; +7437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ +7439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +7440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 144 + + +7441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the trigger prescaler, filter, and polarity */ +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (sSlaveConfig->InputTrigger) +7443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_ETRF: +7445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +7447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); +7448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); +7449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the ETR Trigger source */ +7452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +7453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, +7454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +7457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_TI1F_ED: +7460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +7462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +7463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) +7466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; +7468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = htim->Instance->CCER; +7472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; +7473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; +7474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; +7477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); +7478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 = tmpccmr1; +7481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER = tmpccer; +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +7483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_TI1FP1: +7486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +7488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +7489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure TI1 Filter and Polarity */ +7493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +7494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +7497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 145 + + +7498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_TI2FP2: +7500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +7502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +7503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure TI2 Filter and Polarity */ +7507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_TI2_ConfigInputStage(htim->Instance, +7508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +7511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_ITR0: +7514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_ITR1: +7515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_ITR2: +7516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** case TIM_TS_ITR3: +7517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameter */ +7519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +7520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +7521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** default: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** status = HAL_ERROR; +7525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; +7526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return status; +7529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the TI1 as Input. +7533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 1 is selected to be connected to IC1. +7542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 1 is selected to be connected to IC2. +7543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 1 is selected to be connected to TRC. +7544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 +7548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (on channel2 path) is used as the input signal. Therefore CCMR1 must be +7549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter) +7553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + ARM GAS /tmp/cc0aF2h1.s page 146 + + +7555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; +7556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; +7559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; +7560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; +7561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Input */ +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) +7564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC1S; +7566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; +7567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** else +7569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { +7570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= TIM_CCMR1_CC1S_0; +7571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; +7575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); +7576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Polarity and set the CC1E Bit */ +7578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); +7579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); +7580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1; +7583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; +7584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } +7585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the Polarity and Filter for TI1. +7588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil +7599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 715 .loc 1 7599 1 is_stmt 1 view -0 + 716 .cfi_startproc + 717 @ args = 0, pretend = 0, frame = 0 + 718 @ frame_needed = 0, uses_anonymous_args = 0 + 719 @ link register save eliminated. + 720 .loc 1 7599 1 is_stmt 0 view .LVU268 + 721 0000 10B4 push {r4} + 722 .cfi_def_cfa_offset 4 + 723 .cfi_offset 4, -4 +7600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 724 .loc 1 7600 3 is_stmt 1 view .LVU269 +7601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + ARM GAS /tmp/cc0aF2h1.s page 147 + + + 725 .loc 1 7601 3 view .LVU270 +7602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 726 .loc 1 7604 3 view .LVU271 + 727 .loc 1 7604 11 is_stmt 0 view .LVU272 + 728 0002 036A ldr r3, [r0, #32] + 729 .LVL76: +7605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 730 .loc 1 7605 3 is_stmt 1 view .LVU273 + 731 .loc 1 7605 7 is_stmt 0 view .LVU274 + 732 0004 046A ldr r4, [r0, #32] + 733 .loc 1 7605 14 view .LVU275 + 734 0006 24F00104 bic r4, r4, #1 + 735 000a 0462 str r4, [r0, #32] +7606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 736 .loc 1 7606 3 is_stmt 1 view .LVU276 + 737 .loc 1 7606 12 is_stmt 0 view .LVU277 + 738 000c 8469 ldr r4, [r0, #24] + 739 .LVL77: +7607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; + 740 .loc 1 7609 3 is_stmt 1 view .LVU278 + 741 .loc 1 7609 12 is_stmt 0 view .LVU279 + 742 000e 24F0F00C bic ip, r4, #240 + 743 .LVL78: +7610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (TIM_ICFilter << 4U); + 744 .loc 1 7610 3 is_stmt 1 view .LVU280 + 745 .loc 1 7610 12 is_stmt 0 view .LVU281 + 746 0012 4CEA0212 orr r2, ip, r2, lsl #4 + 747 .LVL79: +7611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Polarity and set the CC1E Bit */ +7613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 748 .loc 1 7613 3 is_stmt 1 view .LVU282 + 749 .loc 1 7613 11 is_stmt 0 view .LVU283 + 750 0016 23F00A03 bic r3, r3, #10 + 751 .LVL80: +7614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= TIM_ICPolarity; + 752 .loc 1 7614 3 is_stmt 1 view .LVU284 + 753 .loc 1 7614 11 is_stmt 0 view .LVU285 + 754 001a 0B43 orrs r3, r3, r1 + 755 .LVL81: +7615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1; + 756 .loc 1 7617 3 is_stmt 1 view .LVU286 + 757 .loc 1 7617 15 is_stmt 0 view .LVU287 + 758 001c 8261 str r2, [r0, #24] +7618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 759 .loc 1 7618 3 is_stmt 1 view .LVU288 + 760 .loc 1 7618 14 is_stmt 0 view .LVU289 + 761 001e 0362 str r3, [r0, #32] +7619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 762 .loc 1 7619 1 view .LVU290 + 763 0020 5DF8044B ldr r4, [sp], #4 + ARM GAS /tmp/cc0aF2h1.s page 148 + + + 764 .cfi_restore 4 + 765 .cfi_def_cfa_offset 0 + 766 0024 7047 bx lr + 767 .cfi_endproc + 768 .LFE243: + 770 .section .text.TIM_TI2_SetConfig,"ax",%progbits + 771 .align 1 + 772 .syntax unified + 773 .thumb + 774 .thumb_func + 776 TIM_TI2_SetConfig: + 777 .LVL82: + 778 .LFB244: +7620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the TI2 as Input. +7623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 2 is selected to be connected to IC2. +7632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 2 is selected to be connected to IC1. +7633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 2 is selected to be connected to TRC. +7634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 +7638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR1 must be +7639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter) +7643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 779 .loc 1 7643 1 is_stmt 1 view -0 + 780 .cfi_startproc + 781 @ args = 0, pretend = 0, frame = 0 + 782 @ frame_needed = 0, uses_anonymous_args = 0 + 783 @ link register save eliminated. + 784 .loc 1 7643 1 is_stmt 0 view .LVU292 + 785 0000 30B4 push {r4, r5} + 786 .cfi_def_cfa_offset 8 + 787 .cfi_offset 4, -8 + 788 .cfi_offset 5, -4 +7644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 789 .loc 1 7644 3 is_stmt 1 view .LVU293 +7645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 790 .loc 1 7645 3 view .LVU294 +7646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; + 791 .loc 1 7648 3 view .LVU295 + 792 .loc 1 7648 7 is_stmt 0 view .LVU296 + 793 0002 046A ldr r4, [r0, #32] + ARM GAS /tmp/cc0aF2h1.s page 149 + + + 794 .loc 1 7648 14 view .LVU297 + 795 0004 24F01004 bic r4, r4, #16 + 796 0008 0462 str r4, [r0, #32] +7649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 797 .loc 1 7649 3 is_stmt 1 view .LVU298 + 798 .loc 1 7649 12 is_stmt 0 view .LVU299 + 799 000a 8469 ldr r4, [r0, #24] + 800 .LVL83: +7650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 801 .loc 1 7650 3 is_stmt 1 view .LVU300 + 802 .loc 1 7650 11 is_stmt 0 view .LVU301 + 803 000c 056A ldr r5, [r0, #32] + 804 .LVL84: +7651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Input */ +7653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC2S; + 805 .loc 1 7653 3 is_stmt 1 view .LVU302 + 806 .loc 1 7653 12 is_stmt 0 view .LVU303 + 807 000e 24F4407C bic ip, r4, #768 + 808 .LVL85: +7654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (TIM_ICSelection << 8U); + 809 .loc 1 7654 3 is_stmt 1 view .LVU304 + 810 .loc 1 7654 12 is_stmt 0 view .LVU305 + 811 0012 4CEA022C orr ip, ip, r2, lsl #8 + 812 .LVL86: +7655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC2F; + 813 .loc 1 7657 3 is_stmt 1 view .LVU306 + 814 .loc 1 7657 12 is_stmt 0 view .LVU307 + 815 0016 2CF4704C bic ip, ip, #61440 + 816 .LVL87: +7658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F); + 817 .loc 1 7658 3 is_stmt 1 view .LVU308 + 818 .loc 1 7658 30 is_stmt 0 view .LVU309 + 819 001a 1B03 lsls r3, r3, #12 + 820 .LVL88: + 821 .loc 1 7658 38 view .LVU310 + 822 001c 9BB2 uxth r3, r3 + 823 .loc 1 7658 12 view .LVU311 + 824 001e 43EA0C03 orr r3, r3, ip + 825 .LVL89: +7659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Polarity and set the CC2E Bit */ +7661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 826 .loc 1 7661 3 is_stmt 1 view .LVU312 + 827 .loc 1 7661 11 is_stmt 0 view .LVU313 + 828 0022 25F0A005 bic r5, r5, #160 + 829 .LVL90: +7662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); + 830 .loc 1 7662 3 is_stmt 1 view .LVU314 + 831 .loc 1 7662 31 is_stmt 0 view .LVU315 + 832 0026 0901 lsls r1, r1, #4 + 833 .LVL91: + 834 .loc 1 7662 38 view .LVU316 + 835 0028 01F0A001 and r1, r1, #160 + 836 .loc 1 7662 11 view .LVU317 + ARM GAS /tmp/cc0aF2h1.s page 150 + + + 837 002c 2943 orrs r1, r1, r5 + 838 .LVL92: +7663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1 ; + 839 .loc 1 7665 3 is_stmt 1 view .LVU318 + 840 .loc 1 7665 15 is_stmt 0 view .LVU319 + 841 002e 8361 str r3, [r0, #24] +7666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 842 .loc 1 7666 3 is_stmt 1 view .LVU320 + 843 .loc 1 7666 14 is_stmt 0 view .LVU321 + 844 0030 0162 str r1, [r0, #32] +7667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 845 .loc 1 7667 1 view .LVU322 + 846 0032 30BC pop {r4, r5} + 847 .cfi_restore 5 + 848 .cfi_restore 4 + 849 .cfi_def_cfa_offset 0 + 850 0034 7047 bx lr + 851 .cfi_endproc + 852 .LFE244: + 854 .section .text.TIM_TI2_ConfigInputStage,"ax",%progbits + 855 .align 1 + 856 .syntax unified + 857 .thumb + 858 .thumb_func + 860 TIM_TI2_ConfigInputStage: + 861 .LVL93: + 862 .LFB245: +7668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the Polarity and Filter for TI2. +7671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil +7682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 863 .loc 1 7682 1 is_stmt 1 view -0 + 864 .cfi_startproc + 865 @ args = 0, pretend = 0, frame = 0 + 866 @ frame_needed = 0, uses_anonymous_args = 0 + 867 @ link register save eliminated. + 868 .loc 1 7682 1 is_stmt 0 view .LVU324 + 869 0000 10B4 push {r4} + 870 .cfi_def_cfa_offset 4 + 871 .cfi_offset 4, -4 +7683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 872 .loc 1 7683 3 is_stmt 1 view .LVU325 +7684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 873 .loc 1 7684 3 view .LVU326 + ARM GAS /tmp/cc0aF2h1.s page 151 + + +7685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; + 874 .loc 1 7687 3 view .LVU327 + 875 .loc 1 7687 7 is_stmt 0 view .LVU328 + 876 0002 036A ldr r3, [r0, #32] + 877 .loc 1 7687 14 view .LVU329 + 878 0004 23F01003 bic r3, r3, #16 + 879 0008 0362 str r3, [r0, #32] +7688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 880 .loc 1 7688 3 is_stmt 1 view .LVU330 + 881 .loc 1 7688 12 is_stmt 0 view .LVU331 + 882 000a 8469 ldr r4, [r0, #24] + 883 .LVL94: +7689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 884 .loc 1 7689 3 is_stmt 1 view .LVU332 + 885 .loc 1 7689 11 is_stmt 0 view .LVU333 + 886 000c 036A ldr r3, [r0, #32] + 887 .LVL95: +7690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC2F; + 888 .loc 1 7692 3 is_stmt 1 view .LVU334 + 889 .loc 1 7692 12 is_stmt 0 view .LVU335 + 890 000e 24F4704C bic ip, r4, #61440 + 891 .LVL96: +7693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (TIM_ICFilter << 12U); + 892 .loc 1 7693 3 is_stmt 1 view .LVU336 + 893 .loc 1 7693 12 is_stmt 0 view .LVU337 + 894 0012 4CEA0232 orr r2, ip, r2, lsl #12 + 895 .LVL97: +7694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Polarity and set the CC2E Bit */ +7696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 896 .loc 1 7696 3 is_stmt 1 view .LVU338 + 897 .loc 1 7696 11 is_stmt 0 view .LVU339 + 898 0016 23F0A003 bic r3, r3, #160 + 899 .LVL98: +7697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity << 4U); + 900 .loc 1 7697 3 is_stmt 1 view .LVU340 + 901 .loc 1 7697 11 is_stmt 0 view .LVU341 + 902 001a 43EA0113 orr r3, r3, r1, lsl #4 + 903 .LVL99: +7698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1 ; + 904 .loc 1 7700 3 is_stmt 1 view .LVU342 + 905 .loc 1 7700 15 is_stmt 0 view .LVU343 + 906 001e 8261 str r2, [r0, #24] +7701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 907 .loc 1 7701 3 is_stmt 1 view .LVU344 + 908 .loc 1 7701 14 is_stmt 0 view .LVU345 + 909 0020 0362 str r3, [r0, #32] +7702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 910 .loc 1 7702 1 view .LVU346 + 911 0022 5DF8044B ldr r4, [sp], #4 + 912 .cfi_restore 4 + ARM GAS /tmp/cc0aF2h1.s page 152 + + + 913 .cfi_def_cfa_offset 0 + 914 0026 7047 bx lr + 915 .cfi_endproc + 916 .LFE245: + 918 .section .text.TIM_TI3_SetConfig,"ax",%progbits + 919 .align 1 + 920 .syntax unified + 921 .thumb + 922 .thumb_func + 924 TIM_TI3_SetConfig: + 925 .LVL100: + 926 .LFB246: +7703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the TI3 as Input. +7706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 3 is selected to be connected to IC3. +7715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 3 is selected to be connected to IC4. +7716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 3 is selected to be connected to TRC. +7717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 +7721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR2 must be +7722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter) +7726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 927 .loc 1 7726 1 is_stmt 1 view -0 + 928 .cfi_startproc + 929 @ args = 0, pretend = 0, frame = 0 + 930 @ frame_needed = 0, uses_anonymous_args = 0 + 931 @ link register save eliminated. + 932 .loc 1 7726 1 is_stmt 0 view .LVU348 + 933 0000 30B4 push {r4, r5} + 934 .cfi_def_cfa_offset 8 + 935 .cfi_offset 4, -8 + 936 .cfi_offset 5, -4 +7727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr2; + 937 .loc 1 7727 3 is_stmt 1 view .LVU349 +7728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 938 .loc 1 7728 3 view .LVU350 +7729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ +7731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC3E; + 939 .loc 1 7731 3 view .LVU351 + 940 .loc 1 7731 7 is_stmt 0 view .LVU352 + 941 0002 046A ldr r4, [r0, #32] + 942 .loc 1 7731 14 view .LVU353 + ARM GAS /tmp/cc0aF2h1.s page 153 + + + 943 0004 24F48074 bic r4, r4, #256 + 944 0008 0462 str r4, [r0, #32] +7732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 = TIMx->CCMR2; + 945 .loc 1 7732 3 is_stmt 1 view .LVU354 + 946 .loc 1 7732 12 is_stmt 0 view .LVU355 + 947 000a C469 ldr r4, [r0, #28] + 948 .LVL101: +7733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 949 .loc 1 7733 3 is_stmt 1 view .LVU356 + 950 .loc 1 7733 11 is_stmt 0 view .LVU357 + 951 000c 056A ldr r5, [r0, #32] + 952 .LVL102: +7734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Input */ +7736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_CC3S; + 953 .loc 1 7736 3 is_stmt 1 view .LVU358 + 954 .loc 1 7736 12 is_stmt 0 view .LVU359 + 955 000e 24F0030C bic ip, r4, #3 + 956 .LVL103: +7737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 |= TIM_ICSelection; + 957 .loc 1 7737 3 is_stmt 1 view .LVU360 + 958 .loc 1 7737 12 is_stmt 0 view .LVU361 + 959 0012 4CEA020C orr ip, ip, r2 + 960 .LVL104: +7738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_IC3F; + 961 .loc 1 7740 3 is_stmt 1 view .LVU362 + 962 .loc 1 7740 12 is_stmt 0 view .LVU363 + 963 0016 2CF0F00C bic ip, ip, #240 + 964 .LVL105: +7741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); + 965 .loc 1 7741 3 is_stmt 1 view .LVU364 + 966 .loc 1 7741 30 is_stmt 0 view .LVU365 + 967 001a 1B01 lsls r3, r3, #4 + 968 .LVL106: + 969 .loc 1 7741 37 view .LVU366 + 970 001c DBB2 uxtb r3, r3 + 971 .loc 1 7741 12 view .LVU367 + 972 001e 43EA0C03 orr r3, r3, ip + 973 .LVL107: +7742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Polarity and set the CC3E Bit */ +7744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); + 974 .loc 1 7744 3 is_stmt 1 view .LVU368 + 975 .loc 1 7744 11 is_stmt 0 view .LVU369 + 976 0022 25F42065 bic r5, r5, #2560 + 977 .LVL108: +7745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); + 978 .loc 1 7745 3 is_stmt 1 view .LVU370 + 979 .loc 1 7745 31 is_stmt 0 view .LVU371 + 980 0026 0902 lsls r1, r1, #8 + 981 .LVL109: + 982 .loc 1 7745 38 view .LVU372 + 983 0028 01F42061 and r1, r1, #2560 + 984 .loc 1 7745 11 view .LVU373 + 985 002c 2943 orrs r1, r1, r5 + ARM GAS /tmp/cc0aF2h1.s page 154 + + + 986 .LVL110: +7746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR2 and CCER registers */ +7748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR2 = tmpccmr2; + 987 .loc 1 7748 3 is_stmt 1 view .LVU374 + 988 .loc 1 7748 15 is_stmt 0 view .LVU375 + 989 002e C361 str r3, [r0, #28] +7749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 990 .loc 1 7749 3 is_stmt 1 view .LVU376 + 991 .loc 1 7749 14 is_stmt 0 view .LVU377 + 992 0030 0162 str r1, [r0, #32] +7750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 993 .loc 1 7750 1 view .LVU378 + 994 0032 30BC pop {r4, r5} + 995 .cfi_restore 5 + 996 .cfi_restore 4 + 997 .cfi_def_cfa_offset 0 + 998 0034 7047 bx lr + 999 .cfi_endproc + 1000 .LFE246: + 1002 .section .text.TIM_TI4_SetConfig,"ax",%progbits + 1003 .align 1 + 1004 .syntax unified + 1005 .thumb + 1006 .thumb_func + 1008 TIM_TI4_SetConfig: + 1009 .LVL111: + 1010 .LFB247: +7751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configure the TI4 as Input. +7754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 4 is selected to be connected to IC4. +7763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 4 is selected to be connected to IC3. +7764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 4 is selected to be connected to TRC. +7765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 +7768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR2 must be +7769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ICFilter) +7774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1011 .loc 1 7774 1 is_stmt 1 view -0 + 1012 .cfi_startproc + 1013 @ args = 0, pretend = 0, frame = 0 + 1014 @ frame_needed = 0, uses_anonymous_args = 0 + 1015 @ link register save eliminated. + ARM GAS /tmp/cc0aF2h1.s page 155 + + + 1016 .loc 1 7774 1 is_stmt 0 view .LVU380 + 1017 0000 30B4 push {r4, r5} + 1018 .cfi_def_cfa_offset 8 + 1019 .cfi_offset 4, -8 + 1020 .cfi_offset 5, -4 +7775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr2; + 1021 .loc 1 7775 3 is_stmt 1 view .LVU381 +7776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 1022 .loc 1 7776 3 view .LVU382 +7777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ +7779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC4E; + 1023 .loc 1 7779 3 view .LVU383 + 1024 .loc 1 7779 7 is_stmt 0 view .LVU384 + 1025 0002 046A ldr r4, [r0, #32] + 1026 .loc 1 7779 14 view .LVU385 + 1027 0004 24F48054 bic r4, r4, #4096 + 1028 0008 0462 str r4, [r0, #32] +7780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 = TIMx->CCMR2; + 1029 .loc 1 7780 3 is_stmt 1 view .LVU386 + 1030 .loc 1 7780 12 is_stmt 0 view .LVU387 + 1031 000a C469 ldr r4, [r0, #28] + 1032 .LVL112: +7781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 1033 .loc 1 7781 3 is_stmt 1 view .LVU388 + 1034 .loc 1 7781 11 is_stmt 0 view .LVU389 + 1035 000c 056A ldr r5, [r0, #32] + 1036 .LVL113: +7782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Input */ +7784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_CC4S; + 1037 .loc 1 7784 3 is_stmt 1 view .LVU390 + 1038 .loc 1 7784 12 is_stmt 0 view .LVU391 + 1039 000e 24F4407C bic ip, r4, #768 + 1040 .LVL114: +7785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 |= (TIM_ICSelection << 8U); + 1041 .loc 1 7785 3 is_stmt 1 view .LVU392 + 1042 .loc 1 7785 12 is_stmt 0 view .LVU393 + 1043 0012 4CEA022C orr ip, ip, r2, lsl #8 + 1044 .LVL115: +7786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the filter */ +7788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_IC4F; + 1045 .loc 1 7788 3 is_stmt 1 view .LVU394 + 1046 .loc 1 7788 12 is_stmt 0 view .LVU395 + 1047 0016 2CF4704C bic ip, ip, #61440 + 1048 .LVL116: +7789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F); + 1049 .loc 1 7789 3 is_stmt 1 view .LVU396 + 1050 .loc 1 7789 30 is_stmt 0 view .LVU397 + 1051 001a 1B03 lsls r3, r3, #12 + 1052 .LVL117: + 1053 .loc 1 7789 38 view .LVU398 + 1054 001c 9BB2 uxth r3, r3 + 1055 .loc 1 7789 12 view .LVU399 + 1056 001e 43EA0C03 orr r3, r3, ip + 1057 .LVL118: + ARM GAS /tmp/cc0aF2h1.s page 156 + + +7790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Select the Polarity and set the CC4E Bit */ +7792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); + 1058 .loc 1 7792 3 is_stmt 1 view .LVU400 + 1059 .loc 1 7792 11 is_stmt 0 view .LVU401 + 1060 0022 25F42045 bic r5, r5, #40960 + 1061 .LVL119: +7793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); + 1062 .loc 1 7793 3 is_stmt 1 view .LVU402 + 1063 .loc 1 7793 31 is_stmt 0 view .LVU403 + 1064 0026 0903 lsls r1, r1, #12 + 1065 .LVL120: + 1066 .loc 1 7793 39 view .LVU404 + 1067 0028 01F42041 and r1, r1, #40960 + 1068 .loc 1 7793 11 view .LVU405 + 1069 002c 2943 orrs r1, r1, r5 + 1070 .LVL121: +7794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx CCMR2 and CCER registers */ +7796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCMR2 = tmpccmr2; + 1071 .loc 1 7796 3 is_stmt 1 view .LVU406 + 1072 .loc 1 7796 15 is_stmt 0 view .LVU407 + 1073 002e C361 str r3, [r0, #28] +7797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer ; + 1074 .loc 1 7797 3 is_stmt 1 view .LVU408 + 1075 .loc 1 7797 14 is_stmt 0 view .LVU409 + 1076 0030 0162 str r1, [r0, #32] +7798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1077 .loc 1 7798 1 view .LVU410 + 1078 0032 30BC pop {r4, r5} + 1079 .cfi_restore 5 + 1080 .cfi_restore 4 + 1081 .cfi_def_cfa_offset 0 + 1082 0034 7047 bx lr + 1083 .cfi_endproc + 1084 .LFE247: + 1086 .section .text.TIM_ITRx_SetConfig,"ax",%progbits + 1087 .align 1 + 1088 .syntax unified + 1089 .thumb + 1090 .thumb_func + 1092 TIM_ITRx_SetConfig: + 1093 .LVL122: + 1094 .LFB248: +7799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Selects the Input Trigger source +7802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param InputTriggerSource The Input Trigger source. +7804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_ITR0: Internal Trigger 0 +7806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_ITR1: Internal Trigger 1 +7807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_ITR2: Internal Trigger 2 +7808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_ITR3: Internal Trigger 3 +7809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_TI1F_ED: TI1 Edge Detector +7810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 +7811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + ARM GAS /tmp/cc0aF2h1.s page 157 + + +7812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_TS_ETRF: External Trigger input +7813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +7816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1095 .loc 1 7816 1 is_stmt 1 view -0 + 1096 .cfi_startproc + 1097 @ args = 0, pretend = 0, frame = 0 + 1098 @ frame_needed = 0, uses_anonymous_args = 0 + 1099 @ link register save eliminated. +7817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 1100 .loc 1 7817 3 view .LVU412 +7818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +7820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = TIMx->SMCR; + 1101 .loc 1 7820 3 view .LVU413 + 1102 .loc 1 7820 11 is_stmt 0 view .LVU414 + 1103 0000 8368 ldr r3, [r0, #8] + 1104 .LVL123: +7821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the TS Bits */ +7822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_TS; + 1105 .loc 1 7822 3 is_stmt 1 view .LVU415 + 1106 .loc 1 7822 11 is_stmt 0 view .LVU416 + 1107 0002 23F07003 bic r3, r3, #112 + 1108 .LVL124: +7823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Input Trigger source and the slave mode*/ +7824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 1109 .loc 1 7824 3 is_stmt 1 view .LVU417 + 1110 .loc 1 7824 11 is_stmt 0 view .LVU418 + 1111 0006 0B43 orrs r3, r3, r1 + 1112 .LVL125: + 1113 .loc 1 7824 11 view .LVU419 + 1114 0008 43F00703 orr r3, r3, #7 + 1115 .LVL126: +7825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ +7826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->SMCR = tmpsmcr; + 1116 .loc 1 7826 3 is_stmt 1 view .LVU420 + 1117 .loc 1 7826 14 is_stmt 0 view .LVU421 + 1118 000c 8360 str r3, [r0, #8] +7827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1119 .loc 1 7827 1 view .LVU422 + 1120 000e 7047 bx lr + 1121 .cfi_endproc + 1122 .LFE248: + 1124 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits + 1125 .align 1 + 1126 .weak HAL_TIM_Base_MspInit + 1127 .syntax unified + 1128 .thumb + 1129 .thumb_func + 1131 HAL_TIM_Base_MspInit: + 1132 .LVL127: + 1133 .LFB132: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1134 .loc 1 377 1 is_stmt 1 view -0 + 1135 .cfi_startproc + 1136 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc0aF2h1.s page 158 + + + 1137 @ frame_needed = 0, uses_anonymous_args = 0 + 1138 @ link register save eliminated. + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1139 .loc 1 379 3 view .LVU424 + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1140 .loc 1 384 1 is_stmt 0 view .LVU425 + 1141 0000 7047 bx lr + 1142 .cfi_endproc + 1143 .LFE132: + 1145 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits + 1146 .align 1 + 1147 .weak HAL_TIM_Base_MspDeInit + 1148 .syntax unified + 1149 .thumb + 1150 .thumb_func + 1152 HAL_TIM_Base_MspDeInit: + 1153 .LVL128: + 1154 .LFB133: + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1155 .loc 1 392 1 is_stmt 1 view -0 + 1156 .cfi_startproc + 1157 @ args = 0, pretend = 0, frame = 0 + 1158 @ frame_needed = 0, uses_anonymous_args = 0 + 1159 @ link register save eliminated. + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1160 .loc 1 394 3 view .LVU427 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1161 .loc 1 399 1 is_stmt 0 view .LVU428 + 1162 0000 7047 bx lr + 1163 .cfi_endproc + 1164 .LFE133: + 1166 .section .text.HAL_TIM_Base_DeInit,"ax",%progbits + 1167 .align 1 + 1168 .global HAL_TIM_Base_DeInit + 1169 .syntax unified + 1170 .thumb + 1171 .thumb_func + 1173 HAL_TIM_Base_DeInit: + 1174 .LVL129: + 1175 .LFB131: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1176 .loc 1 334 1 is_stmt 1 view -0 + 1177 .cfi_startproc + 1178 @ args = 0, pretend = 0, frame = 0 + 1179 @ frame_needed = 0, uses_anonymous_args = 0 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1180 .loc 1 334 1 is_stmt 0 view .LVU430 + 1181 0000 10B5 push {r4, lr} + 1182 .cfi_def_cfa_offset 8 + 1183 .cfi_offset 4, -8 + 1184 .cfi_offset 14, -4 + 1185 0002 0446 mov r4, r0 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1186 .loc 1 336 3 is_stmt 1 view .LVU431 + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1187 .loc 1 338 3 view .LVU432 + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 159 + + + 1188 .loc 1 338 15 is_stmt 0 view .LVU433 + 1189 0004 0223 movs r3, #2 + 1190 0006 80F83D30 strb r3, [r0, #61] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1191 .loc 1 341 3 is_stmt 1 view .LVU434 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1192 .loc 1 341 3 view .LVU435 + 1193 000a 0368 ldr r3, [r0] + 1194 000c 196A ldr r1, [r3, #32] + 1195 000e 41F21112 movw r2, #4369 + 1196 0012 1142 tst r1, r2 + 1197 0014 08D1 bne .L49 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1198 .loc 1 341 3 discriminator 1 view .LVU436 + 1199 0016 196A ldr r1, [r3, #32] + 1200 0018 40F24442 movw r2, #1092 + 1201 001c 1142 tst r1, r2 + 1202 001e 03D1 bne .L49 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1203 .loc 1 341 3 discriminator 3 view .LVU437 + 1204 0020 1A68 ldr r2, [r3] + 1205 0022 22F00102 bic r2, r2, #1 + 1206 0026 1A60 str r2, [r3] + 1207 .L49: + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1208 .loc 1 341 3 discriminator 5 view .LVU438 + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1209 .loc 1 352 3 view .LVU439 + 1210 0028 2046 mov r0, r4 + 1211 .LVL130: + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1212 .loc 1 352 3 is_stmt 0 view .LVU440 + 1213 002a FFF7FEFF bl HAL_TIM_Base_MspDeInit + 1214 .LVL131: + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1215 .loc 1 356 3 is_stmt 1 view .LVU441 + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1216 .loc 1 356 23 is_stmt 0 view .LVU442 + 1217 002e 0020 movs r0, #0 + 1218 0030 84F84800 strb r0, [r4, #72] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1219 .loc 1 359 3 is_stmt 1 view .LVU443 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1220 .loc 1 359 3 view .LVU444 + 1221 0034 84F83E00 strb r0, [r4, #62] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1222 .loc 1 359 3 view .LVU445 + 1223 0038 84F83F00 strb r0, [r4, #63] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1224 .loc 1 359 3 view .LVU446 + 1225 003c 84F84000 strb r0, [r4, #64] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1226 .loc 1 359 3 view .LVU447 + 1227 0040 84F84100 strb r0, [r4, #65] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1228 .loc 1 359 3 view .LVU448 + 1229 0044 84F84200 strb r0, [r4, #66] + ARM GAS /tmp/cc0aF2h1.s page 160 + + + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1230 .loc 1 359 3 view .LVU449 + 1231 0048 84F84300 strb r0, [r4, #67] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1232 .loc 1 359 3 view .LVU450 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1233 .loc 1 360 3 view .LVU451 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1234 .loc 1 360 3 view .LVU452 + 1235 004c 84F84400 strb r0, [r4, #68] + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1236 .loc 1 360 3 view .LVU453 + 1237 0050 84F84500 strb r0, [r4, #69] + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1238 .loc 1 360 3 view .LVU454 + 1239 0054 84F84600 strb r0, [r4, #70] + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1240 .loc 1 360 3 view .LVU455 + 1241 0058 84F84700 strb r0, [r4, #71] + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1242 .loc 1 360 3 view .LVU456 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1243 .loc 1 363 3 view .LVU457 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1244 .loc 1 363 15 is_stmt 0 view .LVU458 + 1245 005c 84F83D00 strb r0, [r4, #61] + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1246 .loc 1 366 3 is_stmt 1 view .LVU459 + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1247 .loc 1 366 3 view .LVU460 + 1248 0060 84F83C00 strb r0, [r4, #60] + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1249 .loc 1 366 3 view .LVU461 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1250 .loc 1 368 3 view .LVU462 + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1251 .loc 1 369 1 is_stmt 0 view .LVU463 + 1252 0064 10BD pop {r4, pc} + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1253 .loc 1 369 1 view .LVU464 + 1254 .cfi_endproc + 1255 .LFE131: + 1257 .section .text.HAL_TIM_Base_Start,"ax",%progbits + 1258 .align 1 + 1259 .global HAL_TIM_Base_Start + 1260 .syntax unified + 1261 .thumb + 1262 .thumb_func + 1264 HAL_TIM_Base_Start: + 1265 .LVL132: + 1266 .LFB134: + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 1267 .loc 1 408 1 is_stmt 1 view -0 + 1268 .cfi_startproc + 1269 @ args = 0, pretend = 0, frame = 0 + 1270 @ frame_needed = 0, uses_anonymous_args = 0 + 1271 @ link register save eliminated. + ARM GAS /tmp/cc0aF2h1.s page 161 + + + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1272 .loc 1 409 3 view .LVU466 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1273 .loc 1 412 3 view .LVU467 + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1274 .loc 1 415 3 view .LVU468 + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1275 .loc 1 415 11 is_stmt 0 view .LVU469 + 1276 0000 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 1277 0004 DBB2 uxtb r3, r3 + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1278 .loc 1 415 6 view .LVU470 + 1279 0006 012B cmp r3, #1 + 1280 0008 29D1 bne .L55 + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1281 .loc 1 421 3 is_stmt 1 view .LVU471 + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1282 .loc 1 421 15 is_stmt 0 view .LVU472 + 1283 000a 0223 movs r3, #2 + 1284 000c 80F83D30 strb r3, [r0, #61] + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1285 .loc 1 424 3 is_stmt 1 view .LVU473 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1286 .loc 1 424 7 is_stmt 0 view .LVU474 + 1287 0010 0368 ldr r3, [r0] + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1288 .loc 1 424 6 view .LVU475 + 1289 0012 164A ldr r2, .L58 + 1290 0014 9342 cmp r3, r2 + 1291 0016 14D0 beq .L53 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1292 .loc 1 424 7 discriminator 1 view .LVU476 + 1293 0018 B3F1804F cmp r3, #1073741824 + 1294 001c 11D0 beq .L53 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1295 .loc 1 424 7 discriminator 2 view .LVU477 + 1296 001e A2F59432 sub r2, r2, #75776 + 1297 0022 9342 cmp r3, r2 + 1298 0024 0DD0 beq .L53 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1299 .loc 1 424 7 discriminator 3 view .LVU478 + 1300 0026 02F58062 add r2, r2, #1024 + 1301 002a 9342 cmp r3, r2 + 1302 002c 09D0 beq .L53 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1303 .loc 1 424 7 discriminator 4 view .LVU479 + 1304 002e 02F59C32 add r2, r2, #79872 + 1305 0032 9342 cmp r3, r2 + 1306 0034 05D0 beq .L53 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1307 .loc 1 434 5 is_stmt 1 view .LVU480 + 1308 0036 1A68 ldr r2, [r3] + 1309 0038 42F00102 orr r2, r2, #1 + 1310 003c 1A60 str r2, [r3] + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1311 .loc 1 438 10 is_stmt 0 view .LVU481 + 1312 003e 0020 movs r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 162 + + + 1313 .LVL133: + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1314 .loc 1 438 10 view .LVU482 + 1315 0040 7047 bx lr + 1316 .LVL134: + 1317 .L53: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1318 .loc 1 426 5 is_stmt 1 view .LVU483 + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1319 .loc 1 426 29 is_stmt 0 view .LVU484 + 1320 0042 9968 ldr r1, [r3, #8] + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1321 .loc 1 426 13 view .LVU485 + 1322 0044 0A4A ldr r2, .L58+4 + 1323 0046 0A40 ands r2, r2, r1 + 1324 .LVL135: + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1325 .loc 1 427 5 is_stmt 1 view .LVU486 + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1326 .loc 1 427 8 is_stmt 0 view .LVU487 + 1327 0048 062A cmp r2, #6 + 1328 004a 0AD0 beq .L56 + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1329 .loc 1 427 9 discriminator 1 view .LVU488 + 1330 004c B2F5803F cmp r2, #65536 + 1331 0050 09D0 beq .L57 + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1332 .loc 1 429 7 is_stmt 1 view .LVU489 + 1333 0052 1A68 ldr r2, [r3] + 1334 .LVL136: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1335 .loc 1 429 7 is_stmt 0 view .LVU490 + 1336 0054 42F00102 orr r2, r2, #1 + 1337 0058 1A60 str r2, [r3] + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1338 .loc 1 438 10 view .LVU491 + 1339 005a 0020 movs r0, #0 + 1340 .LVL137: + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1341 .loc 1 438 10 view .LVU492 + 1342 005c 7047 bx lr + 1343 .LVL138: + 1344 .L55: + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1345 .loc 1 417 12 view .LVU493 + 1346 005e 0120 movs r0, #1 + 1347 .LVL139: + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1348 .loc 1 417 12 view .LVU494 + 1349 0060 7047 bx lr + 1350 .LVL140: + 1351 .L56: + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1352 .loc 1 438 10 view .LVU495 + 1353 0062 0020 movs r0, #0 + 1354 .LVL141: + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 163 + + + 1355 .loc 1 438 10 view .LVU496 + 1356 0064 7047 bx lr + 1357 .LVL142: + 1358 .L57: + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1359 .loc 1 438 10 view .LVU497 + 1360 0066 0020 movs r0, #0 + 1361 .LVL143: + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1362 .loc 1 439 1 view .LVU498 + 1363 0068 7047 bx lr + 1364 .L59: + 1365 006a 00BF .align 2 + 1366 .L58: + 1367 006c 002C0140 .word 1073818624 + 1368 0070 07000100 .word 65543 + 1369 .cfi_endproc + 1370 .LFE134: + 1372 .section .text.HAL_TIM_Base_Stop,"ax",%progbits + 1373 .align 1 + 1374 .global HAL_TIM_Base_Stop + 1375 .syntax unified + 1376 .thumb + 1377 .thumb_func + 1379 HAL_TIM_Base_Stop: + 1380 .LVL144: + 1381 .LFB135: + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1382 .loc 1 447 1 is_stmt 1 view -0 + 1383 .cfi_startproc + 1384 @ args = 0, pretend = 0, frame = 0 + 1385 @ frame_needed = 0, uses_anonymous_args = 0 + 1386 @ link register save eliminated. + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1387 .loc 1 449 3 view .LVU500 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1388 .loc 1 452 3 view .LVU501 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1389 .loc 1 452 3 view .LVU502 + 1390 0000 0368 ldr r3, [r0] + 1391 0002 196A ldr r1, [r3, #32] + 1392 0004 41F21112 movw r2, #4369 + 1393 0008 1142 tst r1, r2 + 1394 000a 08D1 bne .L61 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1395 .loc 1 452 3 discriminator 1 view .LVU503 + 1396 000c 196A ldr r1, [r3, #32] + 1397 000e 40F24442 movw r2, #1092 + 1398 0012 1142 tst r1, r2 + 1399 0014 03D1 bne .L61 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1400 .loc 1 452 3 discriminator 3 view .LVU504 + 1401 0016 1A68 ldr r2, [r3] + 1402 0018 22F00102 bic r2, r2, #1 + 1403 001c 1A60 str r2, [r3] + 1404 .L61: + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 164 + + + 1405 .loc 1 452 3 discriminator 5 view .LVU505 + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1406 .loc 1 455 3 view .LVU506 + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1407 .loc 1 455 15 is_stmt 0 view .LVU507 + 1408 001e 0123 movs r3, #1 + 1409 0020 80F83D30 strb r3, [r0, #61] + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1410 .loc 1 458 3 is_stmt 1 view .LVU508 + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1411 .loc 1 459 1 is_stmt 0 view .LVU509 + 1412 0024 0020 movs r0, #0 + 1413 .LVL145: + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1414 .loc 1 459 1 view .LVU510 + 1415 0026 7047 bx lr + 1416 .cfi_endproc + 1417 .LFE135: + 1419 .section .text.HAL_TIM_Base_Start_IT,"ax",%progbits + 1420 .align 1 + 1421 .global HAL_TIM_Base_Start_IT + 1422 .syntax unified + 1423 .thumb + 1424 .thumb_func + 1426 HAL_TIM_Base_Start_IT: + 1427 .LVL146: + 1428 .LFB136: + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 1429 .loc 1 467 1 is_stmt 1 view -0 + 1430 .cfi_startproc + 1431 @ args = 0, pretend = 0, frame = 0 + 1432 @ frame_needed = 0, uses_anonymous_args = 0 + 1433 @ link register save eliminated. + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1434 .loc 1 468 3 view .LVU512 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1435 .loc 1 471 3 view .LVU513 + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1436 .loc 1 474 3 view .LVU514 + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1437 .loc 1 474 11 is_stmt 0 view .LVU515 + 1438 0000 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 1439 0004 DBB2 uxtb r3, r3 + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1440 .loc 1 474 6 view .LVU516 + 1441 0006 012B cmp r3, #1 + 1442 0008 2ED1 bne .L66 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1443 .loc 1 480 3 is_stmt 1 view .LVU517 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1444 .loc 1 480 15 is_stmt 0 view .LVU518 + 1445 000a 0223 movs r3, #2 + 1446 000c 80F83D30 strb r3, [r0, #61] + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1447 .loc 1 483 3 is_stmt 1 view .LVU519 + 1448 0010 0268 ldr r2, [r0] + 1449 0012 D368 ldr r3, [r2, #12] + ARM GAS /tmp/cc0aF2h1.s page 165 + + + 1450 0014 43F00103 orr r3, r3, #1 + 1451 0018 D360 str r3, [r2, #12] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1452 .loc 1 486 3 view .LVU520 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1453 .loc 1 486 7 is_stmt 0 view .LVU521 + 1454 001a 0368 ldr r3, [r0] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1455 .loc 1 486 6 view .LVU522 + 1456 001c 154A ldr r2, .L69 + 1457 001e 9342 cmp r3, r2 + 1458 0020 14D0 beq .L64 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1459 .loc 1 486 7 discriminator 1 view .LVU523 + 1460 0022 B3F1804F cmp r3, #1073741824 + 1461 0026 11D0 beq .L64 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1462 .loc 1 486 7 discriminator 2 view .LVU524 + 1463 0028 A2F59432 sub r2, r2, #75776 + 1464 002c 9342 cmp r3, r2 + 1465 002e 0DD0 beq .L64 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1466 .loc 1 486 7 discriminator 3 view .LVU525 + 1467 0030 02F58062 add r2, r2, #1024 + 1468 0034 9342 cmp r3, r2 + 1469 0036 09D0 beq .L64 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1470 .loc 1 486 7 discriminator 4 view .LVU526 + 1471 0038 02F59C32 add r2, r2, #79872 + 1472 003c 9342 cmp r3, r2 + 1473 003e 05D0 beq .L64 + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1474 .loc 1 496 5 is_stmt 1 view .LVU527 + 1475 0040 1A68 ldr r2, [r3] + 1476 0042 42F00102 orr r2, r2, #1 + 1477 0046 1A60 str r2, [r3] + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1478 .loc 1 500 10 is_stmt 0 view .LVU528 + 1479 0048 0020 movs r0, #0 + 1480 .LVL147: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1481 .loc 1 500 10 view .LVU529 + 1482 004a 7047 bx lr + 1483 .LVL148: + 1484 .L64: + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1485 .loc 1 488 5 is_stmt 1 view .LVU530 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1486 .loc 1 488 29 is_stmt 0 view .LVU531 + 1487 004c 9968 ldr r1, [r3, #8] + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1488 .loc 1 488 13 view .LVU532 + 1489 004e 0A4A ldr r2, .L69+4 + 1490 0050 0A40 ands r2, r2, r1 + 1491 .LVL149: + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1492 .loc 1 489 5 is_stmt 1 view .LVU533 + ARM GAS /tmp/cc0aF2h1.s page 166 + + + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1493 .loc 1 489 8 is_stmt 0 view .LVU534 + 1494 0052 062A cmp r2, #6 + 1495 0054 0AD0 beq .L67 + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1496 .loc 1 489 9 discriminator 1 view .LVU535 + 1497 0056 B2F5803F cmp r2, #65536 + 1498 005a 09D0 beq .L68 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1499 .loc 1 491 7 is_stmt 1 view .LVU536 + 1500 005c 1A68 ldr r2, [r3] + 1501 .LVL150: + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1502 .loc 1 491 7 is_stmt 0 view .LVU537 + 1503 005e 42F00102 orr r2, r2, #1 + 1504 0062 1A60 str r2, [r3] + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1505 .loc 1 500 10 view .LVU538 + 1506 0064 0020 movs r0, #0 + 1507 .LVL151: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1508 .loc 1 500 10 view .LVU539 + 1509 0066 7047 bx lr + 1510 .LVL152: + 1511 .L66: + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1512 .loc 1 476 12 view .LVU540 + 1513 0068 0120 movs r0, #1 + 1514 .LVL153: + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1515 .loc 1 476 12 view .LVU541 + 1516 006a 7047 bx lr + 1517 .LVL154: + 1518 .L67: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1519 .loc 1 500 10 view .LVU542 + 1520 006c 0020 movs r0, #0 + 1521 .LVL155: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1522 .loc 1 500 10 view .LVU543 + 1523 006e 7047 bx lr + 1524 .LVL156: + 1525 .L68: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1526 .loc 1 500 10 view .LVU544 + 1527 0070 0020 movs r0, #0 + 1528 .LVL157: + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1529 .loc 1 501 1 view .LVU545 + 1530 0072 7047 bx lr + 1531 .L70: + 1532 .align 2 + 1533 .L69: + 1534 0074 002C0140 .word 1073818624 + 1535 0078 07000100 .word 65543 + 1536 .cfi_endproc + 1537 .LFE136: + ARM GAS /tmp/cc0aF2h1.s page 167 + + + 1539 .section .text.HAL_TIM_Base_Stop_IT,"ax",%progbits + 1540 .align 1 + 1541 .global HAL_TIM_Base_Stop_IT + 1542 .syntax unified + 1543 .thumb + 1544 .thumb_func + 1546 HAL_TIM_Base_Stop_IT: + 1547 .LVL158: + 1548 .LFB137: + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1549 .loc 1 509 1 is_stmt 1 view -0 + 1550 .cfi_startproc + 1551 @ args = 0, pretend = 0, frame = 0 + 1552 @ frame_needed = 0, uses_anonymous_args = 0 + 1553 @ link register save eliminated. + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1554 .loc 1 511 3 view .LVU547 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1555 .loc 1 514 3 view .LVU548 + 1556 0000 0268 ldr r2, [r0] + 1557 0002 D368 ldr r3, [r2, #12] + 1558 0004 23F00103 bic r3, r3, #1 + 1559 0008 D360 str r3, [r2, #12] + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1560 .loc 1 517 3 view .LVU549 + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1561 .loc 1 517 3 view .LVU550 + 1562 000a 0368 ldr r3, [r0] + 1563 000c 196A ldr r1, [r3, #32] + 1564 000e 41F21112 movw r2, #4369 + 1565 0012 1142 tst r1, r2 + 1566 0014 08D1 bne .L72 + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1567 .loc 1 517 3 discriminator 1 view .LVU551 + 1568 0016 196A ldr r1, [r3, #32] + 1569 0018 40F24442 movw r2, #1092 + 1570 001c 1142 tst r1, r2 + 1571 001e 03D1 bne .L72 + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1572 .loc 1 517 3 discriminator 3 view .LVU552 + 1573 0020 1A68 ldr r2, [r3] + 1574 0022 22F00102 bic r2, r2, #1 + 1575 0026 1A60 str r2, [r3] + 1576 .L72: + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1577 .loc 1 517 3 discriminator 5 view .LVU553 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1578 .loc 1 520 3 view .LVU554 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1579 .loc 1 520 15 is_stmt 0 view .LVU555 + 1580 0028 0123 movs r3, #1 + 1581 002a 80F83D30 strb r3, [r0, #61] + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1582 .loc 1 523 3 is_stmt 1 view .LVU556 + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1583 .loc 1 524 1 is_stmt 0 view .LVU557 + 1584 002e 0020 movs r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 168 + + + 1585 .LVL159: + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1586 .loc 1 524 1 view .LVU558 + 1587 0030 7047 bx lr + 1588 .cfi_endproc + 1589 .LFE137: + 1591 .section .text.HAL_TIM_Base_Start_DMA,"ax",%progbits + 1592 .align 1 + 1593 .global HAL_TIM_Base_Start_DMA + 1594 .syntax unified + 1595 .thumb + 1596 .thumb_func + 1598 HAL_TIM_Base_Start_DMA: + 1599 .LVL160: + 1600 .LFB138: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 1601 .loc 1 534 1 is_stmt 1 view -0 + 1602 .cfi_startproc + 1603 @ args = 0, pretend = 0, frame = 0 + 1604 @ frame_needed = 0, uses_anonymous_args = 0 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 1605 .loc 1 534 1 is_stmt 0 view .LVU560 + 1606 0000 38B5 push {r3, r4, r5, lr} + 1607 .cfi_def_cfa_offset 16 + 1608 .cfi_offset 3, -16 + 1609 .cfi_offset 4, -12 + 1610 .cfi_offset 5, -8 + 1611 .cfi_offset 14, -4 + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1612 .loc 1 535 3 is_stmt 1 view .LVU561 + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1613 .loc 1 538 3 view .LVU562 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1614 .loc 1 541 3 view .LVU563 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1615 .loc 1 541 11 is_stmt 0 view .LVU564 + 1616 0002 90F83D40 ldrb r4, [r0, #61] @ zero_extendqisi2 + 1617 0006 E4B2 uxtb r4, r4 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1618 .loc 1 541 6 view .LVU565 + 1619 0008 022C cmp r4, #2 + 1620 000a 4BD0 beq .L74 + 1621 000c 0546 mov r5, r0 + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1622 .loc 1 545 8 is_stmt 1 view .LVU566 + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1623 .loc 1 545 16 is_stmt 0 view .LVU567 + 1624 000e 90F83D40 ldrb r4, [r0, #61] @ zero_extendqisi2 + 1625 0012 E4B2 uxtb r4, r4 + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1626 .loc 1 545 11 view .LVU568 + 1627 0014 012C cmp r4, #1 + 1628 0016 44D1 bne .L77 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1629 .loc 1 547 5 is_stmt 1 view .LVU569 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1630 .loc 1 547 8 is_stmt 0 view .LVU570 + ARM GAS /tmp/cc0aF2h1.s page 169 + + + 1631 0018 0029 cmp r1, #0 + 1632 001a 43D0 beq .L74 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1633 .loc 1 547 25 discriminator 1 view .LVU571 + 1634 001c 002A cmp r2, #0 + 1635 001e 41D0 beq .L74 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1636 .loc 1 553 7 is_stmt 1 view .LVU572 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1637 .loc 1 553 19 is_stmt 0 view .LVU573 + 1638 0020 0223 movs r3, #2 + 1639 0022 80F83D30 strb r3, [r0, #61] + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1640 .loc 1 562 3 is_stmt 1 view .LVU574 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1641 .loc 1 562 13 is_stmt 0 view .LVU575 + 1642 0026 036A ldr r3, [r0, #32] + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1643 .loc 1 562 51 view .LVU576 + 1644 0028 2148 ldr r0, .L81 + 1645 .LVL161: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1646 .loc 1 562 51 view .LVU577 + 1647 002a 9862 str r0, [r3, #40] + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1648 .loc 1 563 3 is_stmt 1 view .LVU578 + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1649 .loc 1 563 13 is_stmt 0 view .LVU579 + 1650 002c 2B6A ldr r3, [r5, #32] + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1651 .loc 1 563 55 view .LVU580 + 1652 002e 2148 ldr r0, .L81+4 + 1653 0030 D862 str r0, [r3, #44] + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1654 .loc 1 566 3 is_stmt 1 view .LVU581 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1655 .loc 1 566 13 is_stmt 0 view .LVU582 + 1656 0032 2B6A ldr r3, [r5, #32] + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1657 .loc 1 566 52 view .LVU583 + 1658 0034 2048 ldr r0, .L81+8 + 1659 0036 1863 str r0, [r3, #48] + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 1660 .loc 1 569 3 is_stmt 1 view .LVU584 + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 1661 .loc 1 569 87 is_stmt 0 view .LVU585 + 1662 0038 2868 ldr r0, [r5] + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 1663 .loc 1 569 7 view .LVU586 + 1664 003a 1346 mov r3, r2 + 1665 003c 00F12C02 add r2, r0, #44 + 1666 .LVL162: + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 1667 .loc 1 569 7 view .LVU587 + 1668 0040 286A ldr r0, [r5, #32] + 1669 0042 FFF7FEFF bl HAL_DMA_Start_IT + 1670 .LVL163: + ARM GAS /tmp/cc0aF2h1.s page 170 + + + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 1671 .loc 1 569 6 discriminator 1 view .LVU588 + 1672 0046 0146 mov r1, r0 + 1673 0048 60BB cbnz r0, .L74 + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1674 .loc 1 577 3 is_stmt 1 view .LVU589 + 1675 004a 2A68 ldr r2, [r5] + 1676 004c D368 ldr r3, [r2, #12] + 1677 004e 43F48073 orr r3, r3, #256 + 1678 0052 D360 str r3, [r2, #12] + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1679 .loc 1 580 3 view .LVU590 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1680 .loc 1 580 7 is_stmt 0 view .LVU591 + 1681 0054 2B68 ldr r3, [r5] + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1682 .loc 1 580 6 view .LVU592 + 1683 0056 194A ldr r2, .L81+12 + 1684 0058 9342 cmp r3, r2 + 1685 005a 14D0 beq .L75 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1686 .loc 1 580 7 discriminator 1 view .LVU593 + 1687 005c B3F1804F cmp r3, #1073741824 + 1688 0060 11D0 beq .L75 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1689 .loc 1 580 7 discriminator 2 view .LVU594 + 1690 0062 A2F59432 sub r2, r2, #75776 + 1691 0066 9342 cmp r3, r2 + 1692 0068 0DD0 beq .L75 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1693 .loc 1 580 7 discriminator 3 view .LVU595 + 1694 006a 02F58062 add r2, r2, #1024 + 1695 006e 9342 cmp r3, r2 + 1696 0070 09D0 beq .L75 + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1697 .loc 1 580 7 discriminator 4 view .LVU596 + 1698 0072 02F59C32 add r2, r2, #79872 + 1699 0076 9342 cmp r3, r2 + 1700 0078 05D0 beq .L75 + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1701 .loc 1 590 5 is_stmt 1 view .LVU597 + 1702 007a 1A68 ldr r2, [r3] + 1703 007c 42F00102 orr r2, r2, #1 + 1704 0080 1A60 str r2, [r3] + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1705 .loc 1 594 10 is_stmt 0 view .LVU598 + 1706 0082 0446 mov r4, r0 + 1707 0084 0EE0 b .L74 + 1708 .L75: + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1709 .loc 1 582 5 is_stmt 1 view .LVU599 + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1710 .loc 1 582 29 is_stmt 0 view .LVU600 + 1711 0086 9868 ldr r0, [r3, #8] + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1712 .loc 1 582 13 view .LVU601 + 1713 0088 0D4A ldr r2, .L81+16 + ARM GAS /tmp/cc0aF2h1.s page 171 + + + 1714 008a 0240 ands r2, r2, r0 + 1715 .LVL164: + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1716 .loc 1 583 5 is_stmt 1 view .LVU602 + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1717 .loc 1 583 8 is_stmt 0 view .LVU603 + 1718 008c 062A cmp r2, #6 + 1719 008e 0BD0 beq .L78 + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 1720 .loc 1 583 9 discriminator 1 view .LVU604 + 1721 0090 B2F5803F cmp r2, #65536 + 1722 0094 0AD0 beq .L79 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1723 .loc 1 585 7 is_stmt 1 view .LVU605 + 1724 0096 1A68 ldr r2, [r3] + 1725 .LVL165: + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1726 .loc 1 585 7 is_stmt 0 view .LVU606 + 1727 0098 42F00102 orr r2, r2, #1 + 1728 009c 1A60 str r2, [r3] + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1729 .loc 1 594 10 view .LVU607 + 1730 009e 0C46 mov r4, r1 + 1731 00a0 00E0 b .L74 + 1732 .LVL166: + 1733 .L77: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1734 .loc 1 558 12 view .LVU608 + 1735 00a2 0124 movs r4, #1 + 1736 .LVL167: + 1737 .L74: + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1738 .loc 1 595 1 view .LVU609 + 1739 00a4 2046 mov r0, r4 + 1740 00a6 38BD pop {r3, r4, r5, pc} + 1741 .LVL168: + 1742 .L78: + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1743 .loc 1 594 10 view .LVU610 + 1744 00a8 0C46 mov r4, r1 + 1745 00aa FBE7 b .L74 + 1746 .L79: + 1747 00ac 0C46 mov r4, r1 + 1748 00ae F9E7 b .L74 + 1749 .L82: + 1750 .align 2 + 1751 .L81: + 1752 00b0 00000000 .word TIM_DMAPeriodElapsedCplt + 1753 00b4 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 1754 00b8 00000000 .word TIM_DMAError + 1755 00bc 002C0140 .word 1073818624 + 1756 00c0 07000100 .word 65543 + 1757 .cfi_endproc + 1758 .LFE138: + 1760 .section .text.HAL_TIM_Base_Stop_DMA,"ax",%progbits + 1761 .align 1 + 1762 .global HAL_TIM_Base_Stop_DMA + ARM GAS /tmp/cc0aF2h1.s page 172 + + + 1763 .syntax unified + 1764 .thumb + 1765 .thumb_func + 1767 HAL_TIM_Base_Stop_DMA: + 1768 .LVL169: + 1769 .LFB139: + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1770 .loc 1 603 1 is_stmt 1 view -0 + 1771 .cfi_startproc + 1772 @ args = 0, pretend = 0, frame = 0 + 1773 @ frame_needed = 0, uses_anonymous_args = 0 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1774 .loc 1 603 1 is_stmt 0 view .LVU612 + 1775 0000 10B5 push {r4, lr} + 1776 .cfi_def_cfa_offset 8 + 1777 .cfi_offset 4, -8 + 1778 .cfi_offset 14, -4 + 1779 0002 0446 mov r4, r0 + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1780 .loc 1 605 3 is_stmt 1 view .LVU613 + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1781 .loc 1 608 3 view .LVU614 + 1782 0004 0268 ldr r2, [r0] + 1783 0006 D368 ldr r3, [r2, #12] + 1784 0008 23F48073 bic r3, r3, #256 + 1785 000c D360 str r3, [r2, #12] + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1786 .loc 1 610 3 view .LVU615 + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1787 .loc 1 610 9 is_stmt 0 view .LVU616 + 1788 000e 006A ldr r0, [r0, #32] + 1789 .LVL170: + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1790 .loc 1 610 9 view .LVU617 + 1791 0010 FFF7FEFF bl HAL_DMA_Abort_IT + 1792 .LVL171: + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1793 .loc 1 613 3 is_stmt 1 view .LVU618 + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1794 .loc 1 613 3 view .LVU619 + 1795 0014 2368 ldr r3, [r4] + 1796 0016 196A ldr r1, [r3, #32] + 1797 0018 41F21112 movw r2, #4369 + 1798 001c 1142 tst r1, r2 + 1799 001e 08D1 bne .L84 + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1800 .loc 1 613 3 discriminator 1 view .LVU620 + 1801 0020 196A ldr r1, [r3, #32] + 1802 0022 40F24442 movw r2, #1092 + 1803 0026 1142 tst r1, r2 + 1804 0028 03D1 bne .L84 + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1805 .loc 1 613 3 discriminator 3 view .LVU621 + 1806 002a 1A68 ldr r2, [r3] + 1807 002c 22F00102 bic r2, r2, #1 + 1808 0030 1A60 str r2, [r3] + 1809 .L84: + ARM GAS /tmp/cc0aF2h1.s page 173 + + + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1810 .loc 1 613 3 discriminator 5 view .LVU622 + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1811 .loc 1 616 3 view .LVU623 + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1812 .loc 1 616 15 is_stmt 0 view .LVU624 + 1813 0032 0123 movs r3, #1 + 1814 0034 84F83D30 strb r3, [r4, #61] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1815 .loc 1 619 3 is_stmt 1 view .LVU625 + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1816 .loc 1 620 1 is_stmt 0 view .LVU626 + 1817 0038 0020 movs r0, #0 + 1818 003a 10BD pop {r4, pc} + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1819 .loc 1 620 1 view .LVU627 + 1820 .cfi_endproc + 1821 .LFE139: + 1823 .section .text.HAL_TIM_OC_MspInit,"ax",%progbits + 1824 .align 1 + 1825 .weak HAL_TIM_OC_MspInit + 1826 .syntax unified + 1827 .thumb + 1828 .thumb_func + 1830 HAL_TIM_OC_MspInit: + 1831 .LVL172: + 1832 .LFB142: + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1833 .loc 1 761 1 is_stmt 1 view -0 + 1834 .cfi_startproc + 1835 @ args = 0, pretend = 0, frame = 0 + 1836 @ frame_needed = 0, uses_anonymous_args = 0 + 1837 @ link register save eliminated. + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1838 .loc 1 763 3 view .LVU629 + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1839 .loc 1 768 1 is_stmt 0 view .LVU630 + 1840 0000 7047 bx lr + 1841 .cfi_endproc + 1842 .LFE142: + 1844 .section .text.HAL_TIM_OC_MspDeInit,"ax",%progbits + 1845 .align 1 + 1846 .weak HAL_TIM_OC_MspDeInit + 1847 .syntax unified + 1848 .thumb + 1849 .thumb_func + 1851 HAL_TIM_OC_MspDeInit: + 1852 .LVL173: + 1853 .LFB143: + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1854 .loc 1 776 1 is_stmt 1 view -0 + 1855 .cfi_startproc + 1856 @ args = 0, pretend = 0, frame = 0 + 1857 @ frame_needed = 0, uses_anonymous_args = 0 + 1858 @ link register save eliminated. + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1859 .loc 1 778 3 view .LVU632 + ARM GAS /tmp/cc0aF2h1.s page 174 + + + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1860 .loc 1 783 1 is_stmt 0 view .LVU633 + 1861 0000 7047 bx lr + 1862 .cfi_endproc + 1863 .LFE143: + 1865 .section .text.HAL_TIM_OC_DeInit,"ax",%progbits + 1866 .align 1 + 1867 .global HAL_TIM_OC_DeInit + 1868 .syntax unified + 1869 .thumb + 1870 .thumb_func + 1872 HAL_TIM_OC_DeInit: + 1873 .LVL174: + 1874 .LFB141: + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1875 .loc 1 718 1 is_stmt 1 view -0 + 1876 .cfi_startproc + 1877 @ args = 0, pretend = 0, frame = 0 + 1878 @ frame_needed = 0, uses_anonymous_args = 0 + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 1879 .loc 1 718 1 is_stmt 0 view .LVU635 + 1880 0000 10B5 push {r4, lr} + 1881 .cfi_def_cfa_offset 8 + 1882 .cfi_offset 4, -8 + 1883 .cfi_offset 14, -4 + 1884 0002 0446 mov r4, r0 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1885 .loc 1 720 3 is_stmt 1 view .LVU636 + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1886 .loc 1 722 3 view .LVU637 + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1887 .loc 1 722 15 is_stmt 0 view .LVU638 + 1888 0004 0223 movs r3, #2 + 1889 0006 80F83D30 strb r3, [r0, #61] + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1890 .loc 1 725 3 is_stmt 1 view .LVU639 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1891 .loc 1 725 3 view .LVU640 + 1892 000a 0368 ldr r3, [r0] + 1893 000c 196A ldr r1, [r3, #32] + 1894 000e 41F21112 movw r2, #4369 + 1895 0012 1142 tst r1, r2 + 1896 0014 08D1 bne .L89 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1897 .loc 1 725 3 discriminator 1 view .LVU641 + 1898 0016 196A ldr r1, [r3, #32] + 1899 0018 40F24442 movw r2, #1092 + 1900 001c 1142 tst r1, r2 + 1901 001e 03D1 bne .L89 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1902 .loc 1 725 3 discriminator 3 view .LVU642 + 1903 0020 1A68 ldr r2, [r3] + 1904 0022 22F00102 bic r2, r2, #1 + 1905 0026 1A60 str r2, [r3] + 1906 .L89: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1907 .loc 1 725 3 discriminator 5 view .LVU643 + ARM GAS /tmp/cc0aF2h1.s page 175 + + + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1908 .loc 1 736 3 view .LVU644 + 1909 0028 2046 mov r0, r4 + 1910 .LVL175: + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1911 .loc 1 736 3 is_stmt 0 view .LVU645 + 1912 002a FFF7FEFF bl HAL_TIM_OC_MspDeInit + 1913 .LVL176: + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1914 .loc 1 740 3 is_stmt 1 view .LVU646 + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1915 .loc 1 740 23 is_stmt 0 view .LVU647 + 1916 002e 0020 movs r0, #0 + 1917 0030 84F84800 strb r0, [r4, #72] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1918 .loc 1 743 3 is_stmt 1 view .LVU648 + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1919 .loc 1 743 3 view .LVU649 + 1920 0034 84F83E00 strb r0, [r4, #62] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1921 .loc 1 743 3 view .LVU650 + 1922 0038 84F83F00 strb r0, [r4, #63] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1923 .loc 1 743 3 view .LVU651 + 1924 003c 84F84000 strb r0, [r4, #64] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1925 .loc 1 743 3 view .LVU652 + 1926 0040 84F84100 strb r0, [r4, #65] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1927 .loc 1 743 3 view .LVU653 + 1928 0044 84F84200 strb r0, [r4, #66] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1929 .loc 1 743 3 view .LVU654 + 1930 0048 84F84300 strb r0, [r4, #67] + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1931 .loc 1 743 3 view .LVU655 + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1932 .loc 1 744 3 view .LVU656 + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1933 .loc 1 744 3 view .LVU657 + 1934 004c 84F84400 strb r0, [r4, #68] + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1935 .loc 1 744 3 view .LVU658 + 1936 0050 84F84500 strb r0, [r4, #69] + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1937 .loc 1 744 3 view .LVU659 + 1938 0054 84F84600 strb r0, [r4, #70] + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1939 .loc 1 744 3 view .LVU660 + 1940 0058 84F84700 strb r0, [r4, #71] + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1941 .loc 1 744 3 view .LVU661 + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1942 .loc 1 747 3 view .LVU662 + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1943 .loc 1 747 15 is_stmt 0 view .LVU663 + 1944 005c 84F83D00 strb r0, [r4, #61] + ARM GAS /tmp/cc0aF2h1.s page 176 + + + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1945 .loc 1 750 3 is_stmt 1 view .LVU664 + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1946 .loc 1 750 3 view .LVU665 + 1947 0060 84F83C00 strb r0, [r4, #60] + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1948 .loc 1 750 3 view .LVU666 + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 1949 .loc 1 752 3 view .LVU667 + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1950 .loc 1 753 1 is_stmt 0 view .LVU668 + 1951 0064 10BD pop {r4, pc} + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1952 .loc 1 753 1 view .LVU669 + 1953 .cfi_endproc + 1954 .LFE141: + 1956 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits + 1957 .align 1 + 1958 .weak HAL_TIM_PWM_MspInit + 1959 .syntax unified + 1960 .thumb + 1961 .thumb_func + 1963 HAL_TIM_PWM_MspInit: + 1964 .LVL177: + 1965 .LFB152: +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1966 .loc 1 1432 1 is_stmt 1 view -0 + 1967 .cfi_startproc + 1968 @ args = 0, pretend = 0, frame = 0 + 1969 @ frame_needed = 0, uses_anonymous_args = 0 + 1970 @ link register save eliminated. +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1971 .loc 1 1434 3 view .LVU671 +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1972 .loc 1 1439 1 is_stmt 0 view .LVU672 + 1973 0000 7047 bx lr + 1974 .cfi_endproc + 1975 .LFE152: + 1977 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits + 1978 .align 1 + 1979 .weak HAL_TIM_PWM_MspDeInit + 1980 .syntax unified + 1981 .thumb + 1982 .thumb_func + 1984 HAL_TIM_PWM_MspDeInit: + 1985 .LVL178: + 1986 .LFB153: +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1987 .loc 1 1447 1 is_stmt 1 view -0 + 1988 .cfi_startproc + 1989 @ args = 0, pretend = 0, frame = 0 + 1990 @ frame_needed = 0, uses_anonymous_args = 0 + 1991 @ link register save eliminated. +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1992 .loc 1 1449 3 view .LVU674 +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 1993 .loc 1 1454 1 is_stmt 0 view .LVU675 + ARM GAS /tmp/cc0aF2h1.s page 177 + + + 1994 0000 7047 bx lr + 1995 .cfi_endproc + 1996 .LFE153: + 1998 .section .text.HAL_TIM_PWM_DeInit,"ax",%progbits + 1999 .align 1 + 2000 .global HAL_TIM_PWM_DeInit + 2001 .syntax unified + 2002 .thumb + 2003 .thumb_func + 2005 HAL_TIM_PWM_DeInit: + 2006 .LVL179: + 2007 .LFB151: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2008 .loc 1 1389 1 is_stmt 1 view -0 + 2009 .cfi_startproc + 2010 @ args = 0, pretend = 0, frame = 0 + 2011 @ frame_needed = 0, uses_anonymous_args = 0 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2012 .loc 1 1389 1 is_stmt 0 view .LVU677 + 2013 0000 10B5 push {r4, lr} + 2014 .cfi_def_cfa_offset 8 + 2015 .cfi_offset 4, -8 + 2016 .cfi_offset 14, -4 + 2017 0002 0446 mov r4, r0 +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2018 .loc 1 1391 3 is_stmt 1 view .LVU678 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2019 .loc 1 1393 3 view .LVU679 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2020 .loc 1 1393 15 is_stmt 0 view .LVU680 + 2021 0004 0223 movs r3, #2 + 2022 0006 80F83D30 strb r3, [r0, #61] +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2023 .loc 1 1396 3 is_stmt 1 view .LVU681 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2024 .loc 1 1396 3 view .LVU682 + 2025 000a 0368 ldr r3, [r0] + 2026 000c 196A ldr r1, [r3, #32] + 2027 000e 41F21112 movw r2, #4369 + 2028 0012 1142 tst r1, r2 + 2029 0014 08D1 bne .L94 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2030 .loc 1 1396 3 discriminator 1 view .LVU683 + 2031 0016 196A ldr r1, [r3, #32] + 2032 0018 40F24442 movw r2, #1092 + 2033 001c 1142 tst r1, r2 + 2034 001e 03D1 bne .L94 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2035 .loc 1 1396 3 discriminator 3 view .LVU684 + 2036 0020 1A68 ldr r2, [r3] + 2037 0022 22F00102 bic r2, r2, #1 + 2038 0026 1A60 str r2, [r3] + 2039 .L94: +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2040 .loc 1 1396 3 discriminator 5 view .LVU685 +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2041 .loc 1 1407 3 view .LVU686 + ARM GAS /tmp/cc0aF2h1.s page 178 + + + 2042 0028 2046 mov r0, r4 + 2043 .LVL180: +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2044 .loc 1 1407 3 is_stmt 0 view .LVU687 + 2045 002a FFF7FEFF bl HAL_TIM_PWM_MspDeInit + 2046 .LVL181: +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2047 .loc 1 1411 3 is_stmt 1 view .LVU688 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2048 .loc 1 1411 23 is_stmt 0 view .LVU689 + 2049 002e 0020 movs r0, #0 + 2050 0030 84F84800 strb r0, [r4, #72] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2051 .loc 1 1414 3 is_stmt 1 view .LVU690 +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2052 .loc 1 1414 3 view .LVU691 + 2053 0034 84F83E00 strb r0, [r4, #62] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2054 .loc 1 1414 3 view .LVU692 + 2055 0038 84F83F00 strb r0, [r4, #63] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2056 .loc 1 1414 3 view .LVU693 + 2057 003c 84F84000 strb r0, [r4, #64] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2058 .loc 1 1414 3 view .LVU694 + 2059 0040 84F84100 strb r0, [r4, #65] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2060 .loc 1 1414 3 view .LVU695 + 2061 0044 84F84200 strb r0, [r4, #66] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2062 .loc 1 1414 3 view .LVU696 + 2063 0048 84F84300 strb r0, [r4, #67] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2064 .loc 1 1414 3 view .LVU697 +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2065 .loc 1 1415 3 view .LVU698 +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2066 .loc 1 1415 3 view .LVU699 + 2067 004c 84F84400 strb r0, [r4, #68] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2068 .loc 1 1415 3 view .LVU700 + 2069 0050 84F84500 strb r0, [r4, #69] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2070 .loc 1 1415 3 view .LVU701 + 2071 0054 84F84600 strb r0, [r4, #70] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2072 .loc 1 1415 3 view .LVU702 + 2073 0058 84F84700 strb r0, [r4, #71] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2074 .loc 1 1415 3 view .LVU703 +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2075 .loc 1 1418 3 view .LVU704 +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2076 .loc 1 1418 15 is_stmt 0 view .LVU705 + 2077 005c 84F83D00 strb r0, [r4, #61] +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2078 .loc 1 1421 3 is_stmt 1 view .LVU706 + ARM GAS /tmp/cc0aF2h1.s page 179 + + +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2079 .loc 1 1421 3 view .LVU707 + 2080 0060 84F83C00 strb r0, [r4, #60] +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2081 .loc 1 1421 3 view .LVU708 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2082 .loc 1 1423 3 view .LVU709 +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2083 .loc 1 1424 1 is_stmt 0 view .LVU710 + 2084 0064 10BD pop {r4, pc} +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2085 .loc 1 1424 1 view .LVU711 + 2086 .cfi_endproc + 2087 .LFE151: + 2089 .section .text.HAL_TIM_IC_MspInit,"ax",%progbits + 2090 .align 1 + 2091 .weak HAL_TIM_IC_MspInit + 2092 .syntax unified + 2093 .thumb + 2094 .thumb_func + 2096 HAL_TIM_IC_MspInit: + 2097 .LVL182: + 2098 .LFB162: +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2099 .loc 1 2102 1 is_stmt 1 view -0 + 2100 .cfi_startproc + 2101 @ args = 0, pretend = 0, frame = 0 + 2102 @ frame_needed = 0, uses_anonymous_args = 0 + 2103 @ link register save eliminated. +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2104 .loc 1 2104 3 view .LVU713 +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2105 .loc 1 2109 1 is_stmt 0 view .LVU714 + 2106 0000 7047 bx lr + 2107 .cfi_endproc + 2108 .LFE162: + 2110 .section .text.HAL_TIM_IC_MspDeInit,"ax",%progbits + 2111 .align 1 + 2112 .weak HAL_TIM_IC_MspDeInit + 2113 .syntax unified + 2114 .thumb + 2115 .thumb_func + 2117 HAL_TIM_IC_MspDeInit: + 2118 .LVL183: + 2119 .LFB163: +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2120 .loc 1 2117 1 is_stmt 1 view -0 + 2121 .cfi_startproc + 2122 @ args = 0, pretend = 0, frame = 0 + 2123 @ frame_needed = 0, uses_anonymous_args = 0 + 2124 @ link register save eliminated. +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2125 .loc 1 2119 3 view .LVU716 +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2126 .loc 1 2124 1 is_stmt 0 view .LVU717 + 2127 0000 7047 bx lr + 2128 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 180 + + + 2129 .LFE163: + 2131 .section .text.HAL_TIM_IC_DeInit,"ax",%progbits + 2132 .align 1 + 2133 .global HAL_TIM_IC_DeInit + 2134 .syntax unified + 2135 .thumb + 2136 .thumb_func + 2138 HAL_TIM_IC_DeInit: + 2139 .LVL184: + 2140 .LFB161: +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2141 .loc 1 2059 1 is_stmt 1 view -0 + 2142 .cfi_startproc + 2143 @ args = 0, pretend = 0, frame = 0 + 2144 @ frame_needed = 0, uses_anonymous_args = 0 +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2145 .loc 1 2059 1 is_stmt 0 view .LVU719 + 2146 0000 10B5 push {r4, lr} + 2147 .cfi_def_cfa_offset 8 + 2148 .cfi_offset 4, -8 + 2149 .cfi_offset 14, -4 + 2150 0002 0446 mov r4, r0 +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2151 .loc 1 2061 3 is_stmt 1 view .LVU720 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2152 .loc 1 2063 3 view .LVU721 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2153 .loc 1 2063 15 is_stmt 0 view .LVU722 + 2154 0004 0223 movs r3, #2 + 2155 0006 80F83D30 strb r3, [r0, #61] +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2156 .loc 1 2066 3 is_stmt 1 view .LVU723 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2157 .loc 1 2066 3 view .LVU724 + 2158 000a 0368 ldr r3, [r0] + 2159 000c 196A ldr r1, [r3, #32] + 2160 000e 41F21112 movw r2, #4369 + 2161 0012 1142 tst r1, r2 + 2162 0014 08D1 bne .L99 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2163 .loc 1 2066 3 discriminator 1 view .LVU725 + 2164 0016 196A ldr r1, [r3, #32] + 2165 0018 40F24442 movw r2, #1092 + 2166 001c 1142 tst r1, r2 + 2167 001e 03D1 bne .L99 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2168 .loc 1 2066 3 discriminator 3 view .LVU726 + 2169 0020 1A68 ldr r2, [r3] + 2170 0022 22F00102 bic r2, r2, #1 + 2171 0026 1A60 str r2, [r3] + 2172 .L99: +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2173 .loc 1 2066 3 discriminator 5 view .LVU727 +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2174 .loc 1 2077 3 view .LVU728 + 2175 0028 2046 mov r0, r4 + 2176 .LVL185: + ARM GAS /tmp/cc0aF2h1.s page 181 + + +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2177 .loc 1 2077 3 is_stmt 0 view .LVU729 + 2178 002a FFF7FEFF bl HAL_TIM_IC_MspDeInit + 2179 .LVL186: +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2180 .loc 1 2081 3 is_stmt 1 view .LVU730 +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2181 .loc 1 2081 23 is_stmt 0 view .LVU731 + 2182 002e 0020 movs r0, #0 + 2183 0030 84F84800 strb r0, [r4, #72] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2184 .loc 1 2084 3 is_stmt 1 view .LVU732 +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2185 .loc 1 2084 3 view .LVU733 + 2186 0034 84F83E00 strb r0, [r4, #62] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2187 .loc 1 2084 3 view .LVU734 + 2188 0038 84F83F00 strb r0, [r4, #63] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2189 .loc 1 2084 3 view .LVU735 + 2190 003c 84F84000 strb r0, [r4, #64] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2191 .loc 1 2084 3 view .LVU736 + 2192 0040 84F84100 strb r0, [r4, #65] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2193 .loc 1 2084 3 view .LVU737 + 2194 0044 84F84200 strb r0, [r4, #66] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2195 .loc 1 2084 3 view .LVU738 + 2196 0048 84F84300 strb r0, [r4, #67] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2197 .loc 1 2084 3 view .LVU739 +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2198 .loc 1 2085 3 view .LVU740 +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2199 .loc 1 2085 3 view .LVU741 + 2200 004c 84F84400 strb r0, [r4, #68] +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2201 .loc 1 2085 3 view .LVU742 + 2202 0050 84F84500 strb r0, [r4, #69] +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2203 .loc 1 2085 3 view .LVU743 + 2204 0054 84F84600 strb r0, [r4, #70] +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2205 .loc 1 2085 3 view .LVU744 + 2206 0058 84F84700 strb r0, [r4, #71] +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2207 .loc 1 2085 3 view .LVU745 +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2208 .loc 1 2088 3 view .LVU746 +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2209 .loc 1 2088 15 is_stmt 0 view .LVU747 + 2210 005c 84F83D00 strb r0, [r4, #61] +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2211 .loc 1 2091 3 is_stmt 1 view .LVU748 +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2212 .loc 1 2091 3 view .LVU749 + ARM GAS /tmp/cc0aF2h1.s page 182 + + + 2213 0060 84F83C00 strb r0, [r4, #60] +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2214 .loc 1 2091 3 view .LVU750 +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2215 .loc 1 2093 3 view .LVU751 +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2216 .loc 1 2094 1 is_stmt 0 view .LVU752 + 2217 0064 10BD pop {r4, pc} +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2218 .loc 1 2094 1 view .LVU753 + 2219 .cfi_endproc + 2220 .LFE161: + 2222 .section .text.HAL_TIM_OnePulse_MspInit,"ax",%progbits + 2223 .align 1 + 2224 .weak HAL_TIM_OnePulse_MspInit + 2225 .syntax unified + 2226 .thumb + 2227 .thumb_func + 2229 HAL_TIM_OnePulse_MspInit: + 2230 .LVL187: + 2231 .LFB172: +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2232 .loc 1 2762 1 is_stmt 1 view -0 + 2233 .cfi_startproc + 2234 @ args = 0, pretend = 0, frame = 0 + 2235 @ frame_needed = 0, uses_anonymous_args = 0 + 2236 @ link register save eliminated. +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2237 .loc 1 2764 3 view .LVU755 +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2238 .loc 1 2769 1 is_stmt 0 view .LVU756 + 2239 0000 7047 bx lr + 2240 .cfi_endproc + 2241 .LFE172: + 2243 .section .text.HAL_TIM_OnePulse_MspDeInit,"ax",%progbits + 2244 .align 1 + 2245 .weak HAL_TIM_OnePulse_MspDeInit + 2246 .syntax unified + 2247 .thumb + 2248 .thumb_func + 2250 HAL_TIM_OnePulse_MspDeInit: + 2251 .LVL188: + 2252 .LFB173: +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2253 .loc 1 2777 1 is_stmt 1 view -0 + 2254 .cfi_startproc + 2255 @ args = 0, pretend = 0, frame = 0 + 2256 @ frame_needed = 0, uses_anonymous_args = 0 + 2257 @ link register save eliminated. +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2258 .loc 1 2779 3 view .LVU758 +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2259 .loc 1 2784 1 is_stmt 0 view .LVU759 + 2260 0000 7047 bx lr + 2261 .cfi_endproc + 2262 .LFE173: + 2264 .section .text.HAL_TIM_OnePulse_DeInit,"ax",%progbits + ARM GAS /tmp/cc0aF2h1.s page 183 + + + 2265 .align 1 + 2266 .global HAL_TIM_OnePulse_DeInit + 2267 .syntax unified + 2268 .thumb + 2269 .thumb_func + 2271 HAL_TIM_OnePulse_DeInit: + 2272 .LVL189: + 2273 .LFB171: +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2274 .loc 1 2717 1 is_stmt 1 view -0 + 2275 .cfi_startproc + 2276 @ args = 0, pretend = 0, frame = 0 + 2277 @ frame_needed = 0, uses_anonymous_args = 0 +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2278 .loc 1 2717 1 is_stmt 0 view .LVU761 + 2279 0000 10B5 push {r4, lr} + 2280 .cfi_def_cfa_offset 8 + 2281 .cfi_offset 4, -8 + 2282 .cfi_offset 14, -4 + 2283 0002 0446 mov r4, r0 +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2284 .loc 1 2719 3 is_stmt 1 view .LVU762 +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2285 .loc 1 2721 3 view .LVU763 +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2286 .loc 1 2721 15 is_stmt 0 view .LVU764 + 2287 0004 0223 movs r3, #2 + 2288 0006 80F83D30 strb r3, [r0, #61] +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2289 .loc 1 2724 3 is_stmt 1 view .LVU765 +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2290 .loc 1 2724 3 view .LVU766 + 2291 000a 0368 ldr r3, [r0] + 2292 000c 196A ldr r1, [r3, #32] + 2293 000e 41F21112 movw r2, #4369 + 2294 0012 1142 tst r1, r2 + 2295 0014 08D1 bne .L104 +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2296 .loc 1 2724 3 discriminator 1 view .LVU767 + 2297 0016 196A ldr r1, [r3, #32] + 2298 0018 40F24442 movw r2, #1092 + 2299 001c 1142 tst r1, r2 + 2300 001e 03D1 bne .L104 +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2301 .loc 1 2724 3 discriminator 3 view .LVU768 + 2302 0020 1A68 ldr r2, [r3] + 2303 0022 22F00102 bic r2, r2, #1 + 2304 0026 1A60 str r2, [r3] + 2305 .L104: +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2306 .loc 1 2724 3 discriminator 5 view .LVU769 +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2307 .loc 1 2735 3 view .LVU770 + 2308 0028 2046 mov r0, r4 + 2309 .LVL190: +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2310 .loc 1 2735 3 is_stmt 0 view .LVU771 + ARM GAS /tmp/cc0aF2h1.s page 184 + + + 2311 002a FFF7FEFF bl HAL_TIM_OnePulse_MspDeInit + 2312 .LVL191: +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2313 .loc 1 2739 3 is_stmt 1 view .LVU772 +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2314 .loc 1 2739 23 is_stmt 0 view .LVU773 + 2315 002e 0020 movs r0, #0 + 2316 0030 84F84800 strb r0, [r4, #72] +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2317 .loc 1 2742 3 is_stmt 1 view .LVU774 + 2318 0034 84F83E00 strb r0, [r4, #62] +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 2319 .loc 1 2743 3 view .LVU775 + 2320 0038 84F83F00 strb r0, [r4, #63] +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2321 .loc 1 2744 3 view .LVU776 + 2322 003c 84F84400 strb r0, [r4, #68] +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2323 .loc 1 2745 3 view .LVU777 + 2324 0040 84F84500 strb r0, [r4, #69] +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2325 .loc 1 2748 3 view .LVU778 +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2326 .loc 1 2748 15 is_stmt 0 view .LVU779 + 2327 0044 84F83D00 strb r0, [r4, #61] +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2328 .loc 1 2751 3 is_stmt 1 view .LVU780 +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2329 .loc 1 2751 3 view .LVU781 + 2330 0048 84F83C00 strb r0, [r4, #60] +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2331 .loc 1 2751 3 view .LVU782 +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2332 .loc 1 2753 3 view .LVU783 +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2333 .loc 1 2754 1 is_stmt 0 view .LVU784 + 2334 004c 10BD pop {r4, pc} +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2335 .loc 1 2754 1 view .LVU785 + 2336 .cfi_endproc + 2337 .LFE171: + 2339 .section .text.HAL_TIM_Encoder_MspInit,"ax",%progbits + 2340 .align 1 + 2341 .weak HAL_TIM_Encoder_MspInit + 2342 .syntax unified + 2343 .thumb + 2344 .thumb_func + 2346 HAL_TIM_Encoder_MspInit: + 2347 .LVL192: + 2348 .LFB180: +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2349 .loc 1 3199 1 is_stmt 1 view -0 + 2350 .cfi_startproc + 2351 @ args = 0, pretend = 0, frame = 0 + 2352 @ frame_needed = 0, uses_anonymous_args = 0 + 2353 @ link register save eliminated. +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 185 + + + 2354 .loc 1 3201 3 view .LVU787 +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2355 .loc 1 3206 1 is_stmt 0 view .LVU788 + 2356 0000 7047 bx lr + 2357 .cfi_endproc + 2358 .LFE180: + 2360 .section .text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits + 2361 .align 1 + 2362 .weak HAL_TIM_Encoder_MspDeInit + 2363 .syntax unified + 2364 .thumb + 2365 .thumb_func + 2367 HAL_TIM_Encoder_MspDeInit: + 2368 .LVL193: + 2369 .LFB181: +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2370 .loc 1 3214 1 is_stmt 1 view -0 + 2371 .cfi_startproc + 2372 @ args = 0, pretend = 0, frame = 0 + 2373 @ frame_needed = 0, uses_anonymous_args = 0 + 2374 @ link register save eliminated. +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2375 .loc 1 3216 3 view .LVU790 +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2376 .loc 1 3221 1 is_stmt 0 view .LVU791 + 2377 0000 7047 bx lr + 2378 .cfi_endproc + 2379 .LFE181: + 2381 .section .text.HAL_TIM_Encoder_DeInit,"ax",%progbits + 2382 .align 1 + 2383 .global HAL_TIM_Encoder_DeInit + 2384 .syntax unified + 2385 .thumb + 2386 .thumb_func + 2388 HAL_TIM_Encoder_DeInit: + 2389 .LVL194: + 2390 .LFB179: +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2391 .loc 1 3154 1 is_stmt 1 view -0 + 2392 .cfi_startproc + 2393 @ args = 0, pretend = 0, frame = 0 + 2394 @ frame_needed = 0, uses_anonymous_args = 0 +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 2395 .loc 1 3154 1 is_stmt 0 view .LVU793 + 2396 0000 10B5 push {r4, lr} + 2397 .cfi_def_cfa_offset 8 + 2398 .cfi_offset 4, -8 + 2399 .cfi_offset 14, -4 + 2400 0002 0446 mov r4, r0 +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2401 .loc 1 3156 3 is_stmt 1 view .LVU794 +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2402 .loc 1 3158 3 view .LVU795 +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2403 .loc 1 3158 15 is_stmt 0 view .LVU796 + 2404 0004 0223 movs r3, #2 + 2405 0006 80F83D30 strb r3, [r0, #61] + ARM GAS /tmp/cc0aF2h1.s page 186 + + +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2406 .loc 1 3161 3 is_stmt 1 view .LVU797 +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2407 .loc 1 3161 3 view .LVU798 + 2408 000a 0368 ldr r3, [r0] + 2409 000c 196A ldr r1, [r3, #32] + 2410 000e 41F21112 movw r2, #4369 + 2411 0012 1142 tst r1, r2 + 2412 0014 08D1 bne .L109 +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2413 .loc 1 3161 3 discriminator 1 view .LVU799 + 2414 0016 196A ldr r1, [r3, #32] + 2415 0018 40F24442 movw r2, #1092 + 2416 001c 1142 tst r1, r2 + 2417 001e 03D1 bne .L109 +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2418 .loc 1 3161 3 discriminator 3 view .LVU800 + 2419 0020 1A68 ldr r2, [r3] + 2420 0022 22F00102 bic r2, r2, #1 + 2421 0026 1A60 str r2, [r3] + 2422 .L109: +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2423 .loc 1 3161 3 discriminator 5 view .LVU801 +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2424 .loc 1 3172 3 view .LVU802 + 2425 0028 2046 mov r0, r4 + 2426 .LVL195: +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2427 .loc 1 3172 3 is_stmt 0 view .LVU803 + 2428 002a FFF7FEFF bl HAL_TIM_Encoder_MspDeInit + 2429 .LVL196: +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2430 .loc 1 3176 3 is_stmt 1 view .LVU804 +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2431 .loc 1 3176 23 is_stmt 0 view .LVU805 + 2432 002e 0020 movs r0, #0 + 2433 0030 84F84800 strb r0, [r4, #72] +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2434 .loc 1 3179 3 is_stmt 1 view .LVU806 + 2435 0034 84F83E00 strb r0, [r4, #62] +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 2436 .loc 1 3180 3 view .LVU807 + 2437 0038 84F83F00 strb r0, [r4, #63] +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2438 .loc 1 3181 3 view .LVU808 + 2439 003c 84F84400 strb r0, [r4, #68] +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2440 .loc 1 3182 3 view .LVU809 + 2441 0040 84F84500 strb r0, [r4, #69] +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2442 .loc 1 3185 3 view .LVU810 +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2443 .loc 1 3185 15 is_stmt 0 view .LVU811 + 2444 0044 84F83D00 strb r0, [r4, #61] +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2445 .loc 1 3188 3 is_stmt 1 view .LVU812 +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 187 + + + 2446 .loc 1 3188 3 view .LVU813 + 2447 0048 84F83C00 strb r0, [r4, #60] +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2448 .loc 1 3188 3 view .LVU814 +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2449 .loc 1 3190 3 view .LVU815 +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2450 .loc 1 3191 1 is_stmt 0 view .LVU816 + 2451 004c 10BD pop {r4, pc} +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2452 .loc 1 3191 1 view .LVU817 + 2453 .cfi_endproc + 2454 .LFE179: + 2456 .section .text.HAL_TIM_DMABurst_MultiWriteStart,"ax",%progbits + 2457 .align 1 + 2458 .global HAL_TIM_DMABurst_MultiWriteStart + 2459 .syntax unified + 2460 .thumb + 2461 .thumb_func + 2463 HAL_TIM_DMABurst_MultiWriteStart: + 2464 .LVL197: + 2465 .LFB194: +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2466 .loc 1 4645 1 is_stmt 1 view -0 + 2467 .cfi_startproc + 2468 @ args = 8, pretend = 0, frame = 0 + 2469 @ frame_needed = 0, uses_anonymous_args = 0 +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2470 .loc 1 4645 1 is_stmt 0 view .LVU819 + 2471 0000 70B5 push {r4, r5, r6, lr} + 2472 .cfi_def_cfa_offset 16 + 2473 .cfi_offset 4, -16 + 2474 .cfi_offset 5, -12 + 2475 .cfi_offset 6, -8 + 2476 .cfi_offset 14, -4 + 2477 0002 0446 mov r4, r0 +4646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2478 .loc 1 4646 3 is_stmt 1 view .LVU820 + 2479 .LVL198: +4649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); + 2480 .loc 1 4649 3 view .LVU821 +4650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); + 2481 .loc 1 4650 3 view .LVU822 +4651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); + 2482 .loc 1 4651 3 view .LVU823 +4652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + 2483 .loc 1 4652 3 view .LVU824 +4653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2484 .loc 1 4653 3 view .LVU825 +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2485 .loc 1 4655 3 view .LVU826 +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2486 .loc 1 4655 11 is_stmt 0 view .LVU827 + 2487 0004 90F84800 ldrb r0, [r0, #72] @ zero_extendqisi2 + 2488 .LVL199: +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2489 .loc 1 4655 11 view .LVU828 + ARM GAS /tmp/cc0aF2h1.s page 188 + + + 2490 0008 C0B2 uxtb r0, r0 +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2491 .loc 1 4655 6 view .LVU829 + 2492 000a 0228 cmp r0, #2 + 2493 000c 2FD0 beq .L112 + 2494 000e 0E46 mov r6, r1 + 2495 0010 1546 mov r5, r2 + 2496 0012 1946 mov r1, r3 + 2497 .LVL200: +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2498 .loc 1 4659 8 is_stmt 1 view .LVU830 +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2499 .loc 1 4659 16 is_stmt 0 view .LVU831 + 2500 0014 94F84800 ldrb r0, [r4, #72] @ zero_extendqisi2 + 2501 0018 C0B2 uxtb r0, r0 +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2502 .loc 1 4659 11 view .LVU832 + 2503 001a 0128 cmp r0, #1 + 2504 001c 28D0 beq .L132 + 2505 .LVL201: + 2506 .L113: +4673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2507 .loc 1 4673 3 is_stmt 1 view .LVU833 +4675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2508 .loc 1 4675 3 view .LVU834 + 2509 001e B5F5006F cmp r5, #2048 + 2510 0022 74D0 beq .L115 + 2511 0024 2FD8 bhi .L116 + 2512 0026 B5F5007F cmp r5, #512 + 2513 002a 4AD0 beq .L117 + 2514 002c B5F5806F cmp r5, #1024 + 2515 0030 5AD0 beq .L118 + 2516 0032 B5F5807F cmp r5, #256 + 2517 0036 24D1 bne .L133 +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2518 .loc 1 4680 7 view .LVU835 +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2519 .loc 1 4680 17 is_stmt 0 view .LVU836 + 2520 0038 236A ldr r3, [r4, #32] +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2521 .loc 1 4680 55 view .LVU837 + 2522 003a 534A ldr r2, .L137 + 2523 .LVL202: +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2524 .loc 1 4680 55 view .LVU838 + 2525 003c 9A62 str r2, [r3, #40] +4681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2526 .loc 1 4681 7 is_stmt 1 view .LVU839 +4681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2527 .loc 1 4681 17 is_stmt 0 view .LVU840 + 2528 003e 236A ldr r3, [r4, #32] +4681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2529 .loc 1 4681 59 view .LVU841 + 2530 0040 524A ldr r2, .L137+4 + 2531 0042 DA62 str r2, [r3, #44] +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2532 .loc 1 4684 7 is_stmt 1 view .LVU842 + ARM GAS /tmp/cc0aF2h1.s page 189 + + +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2533 .loc 1 4684 17 is_stmt 0 view .LVU843 + 2534 0044 236A ldr r3, [r4, #32] +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2535 .loc 1 4684 56 view .LVU844 + 2536 0046 524A ldr r2, .L137+8 + 2537 0048 1A63 str r2, [r3, #48] +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2538 .loc 1 4687 7 is_stmt 1 view .LVU845 +4688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2539 .loc 1 4688 43 is_stmt 0 view .LVU846 + 2540 004a 2268 ldr r2, [r4] +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2541 .loc 1 4687 11 view .LVU847 + 2542 004c 059B ldr r3, [sp, #20] + 2543 004e 4C32 adds r2, r2, #76 + 2544 0050 206A ldr r0, [r4, #32] + 2545 0052 FFF7FEFF bl HAL_DMA_Start_IT + 2546 .LVL203: +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2547 .loc 1 4687 10 discriminator 1 view .LVU848 + 2548 0056 0028 cmp r0, #0 + 2549 0058 40F09380 bne .L134 + 2550 .L123: + 2551 .LVL204: +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2552 .loc 1 4811 5 is_stmt 1 view .LVU849 +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2553 .loc 1 4811 9 is_stmt 0 view .LVU850 + 2554 005c 2368 ldr r3, [r4] +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2555 .loc 1 4811 45 view .LVU851 + 2556 005e 049A ldr r2, [sp, #16] + 2557 0060 1643 orrs r6, r6, r2 + 2558 .LVL205: +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2559 .loc 1 4811 25 view .LVU852 + 2560 0062 9E64 str r6, [r3, #72] +4813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2561 .loc 1 4813 5 is_stmt 1 view .LVU853 + 2562 0064 2268 ldr r2, [r4] + 2563 0066 D368 ldr r3, [r2, #12] + 2564 0068 2B43 orrs r3, r3, r5 + 2565 006a D360 str r3, [r2, #12] + 2566 006c 0020 movs r0, #0 + 2567 .LVL206: + 2568 .L112: +4818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2569 .loc 1 4818 1 is_stmt 0 view .LVU854 + 2570 006e 70BD pop {r4, r5, r6, pc} + 2571 .LVL207: + 2572 .L132: +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2573 .loc 1 4661 5 is_stmt 1 view .LVU855 +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2574 .loc 1 4661 8 is_stmt 0 view .LVU856 + 2575 0070 1BB1 cbz r3, .L135 + ARM GAS /tmp/cc0aF2h1.s page 190 + + + 2576 .L114: +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2577 .loc 1 4667 7 is_stmt 1 view .LVU857 +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2578 .loc 1 4667 27 is_stmt 0 view .LVU858 + 2579 0072 0223 movs r3, #2 + 2580 0074 84F84830 strb r3, [r4, #72] + 2581 0078 D1E7 b .L113 + 2582 .L135: +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2583 .loc 1 4661 31 discriminator 1 view .LVU859 + 2584 007a 049B ldr r3, [sp, #16] + 2585 007c 002B cmp r3, #0 + 2586 007e F8D0 beq .L114 + 2587 0080 F5E7 b .L112 + 2588 .L133: +4675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2589 .loc 1 4675 3 view .LVU860 + 2590 0082 0120 movs r0, #1 + 2591 0084 F3E7 b .L112 + 2592 .L116: + 2593 0086 B5F5005F cmp r5, #8192 + 2594 008a 53D0 beq .L120 + 2595 008c B5F5804F cmp r5, #16384 + 2596 0090 63D0 beq .L121 + 2597 0092 B5F5805F cmp r5, #4096 + 2598 0096 12D1 bne .L136 +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2599 .loc 1 4752 7 is_stmt 1 view .LVU861 +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2600 .loc 1 4752 17 is_stmt 0 view .LVU862 + 2601 0098 236B ldr r3, [r4, #48] +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2602 .loc 1 4752 52 view .LVU863 + 2603 009a 3E4A ldr r2, .L137+12 + 2604 .LVL208: +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2605 .loc 1 4752 52 view .LVU864 + 2606 009c 9A62 str r2, [r3, #40] +4753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2607 .loc 1 4753 7 is_stmt 1 view .LVU865 +4753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2608 .loc 1 4753 17 is_stmt 0 view .LVU866 + 2609 009e 236B ldr r3, [r4, #48] +4753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2610 .loc 1 4753 56 view .LVU867 + 2611 00a0 3D4A ldr r2, .L137+16 + 2612 00a2 DA62 str r2, [r3, #44] +4756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2613 .loc 1 4756 7 is_stmt 1 view .LVU868 +4756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2614 .loc 1 4756 17 is_stmt 0 view .LVU869 + 2615 00a4 236B ldr r3, [r4, #48] +4756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2616 .loc 1 4756 53 view .LVU870 + 2617 00a6 3A4A ldr r2, .L137+8 + 2618 00a8 1A63 str r2, [r3, #48] + ARM GAS /tmp/cc0aF2h1.s page 191 + + +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2619 .loc 1 4759 7 is_stmt 1 view .LVU871 +4760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2620 .loc 1 4760 43 is_stmt 0 view .LVU872 + 2621 00aa 2268 ldr r2, [r4] +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2622 .loc 1 4759 11 view .LVU873 + 2623 00ac 059B ldr r3, [sp, #20] + 2624 00ae 4C32 adds r2, r2, #76 + 2625 00b0 206B ldr r0, [r4, #48] + 2626 00b2 FFF7FEFF bl HAL_DMA_Start_IT + 2627 .LVL209: +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2628 .loc 1 4759 10 discriminator 1 view .LVU874 + 2629 00b6 0028 cmp r0, #0 + 2630 00b8 D0D0 beq .L123 +4763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2631 .loc 1 4763 16 view .LVU875 + 2632 00ba 0120 movs r0, #1 + 2633 00bc D7E7 b .L112 + 2634 .LVL210: + 2635 .L136: +4675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2636 .loc 1 4675 3 view .LVU876 + 2637 00be 0120 movs r0, #1 + 2638 00c0 D5E7 b .L112 + 2639 .L117: +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2640 .loc 1 4698 7 is_stmt 1 view .LVU877 +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2641 .loc 1 4698 17 is_stmt 0 view .LVU878 + 2642 00c2 636A ldr r3, [r4, #36] +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2643 .loc 1 4698 52 view .LVU879 + 2644 00c4 334A ldr r2, .L137+12 + 2645 .LVL211: +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2646 .loc 1 4698 52 view .LVU880 + 2647 00c6 9A62 str r2, [r3, #40] +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2648 .loc 1 4699 7 is_stmt 1 view .LVU881 +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2649 .loc 1 4699 17 is_stmt 0 view .LVU882 + 2650 00c8 636A ldr r3, [r4, #36] +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2651 .loc 1 4699 56 view .LVU883 + 2652 00ca 334A ldr r2, .L137+16 + 2653 00cc DA62 str r2, [r3, #44] +4702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2654 .loc 1 4702 7 is_stmt 1 view .LVU884 +4702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2655 .loc 1 4702 17 is_stmt 0 view .LVU885 + 2656 00ce 636A ldr r3, [r4, #36] +4702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2657 .loc 1 4702 53 view .LVU886 + 2658 00d0 2F4A ldr r2, .L137+8 + 2659 00d2 1A63 str r2, [r3, #48] + ARM GAS /tmp/cc0aF2h1.s page 192 + + +4705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2660 .loc 1 4705 7 is_stmt 1 view .LVU887 +4706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2661 .loc 1 4706 43 is_stmt 0 view .LVU888 + 2662 00d4 2268 ldr r2, [r4] +4705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2663 .loc 1 4705 11 view .LVU889 + 2664 00d6 059B ldr r3, [sp, #20] + 2665 00d8 4C32 adds r2, r2, #76 + 2666 00da 606A ldr r0, [r4, #36] + 2667 00dc FFF7FEFF bl HAL_DMA_Start_IT + 2668 .LVL212: +4705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2669 .loc 1 4705 10 discriminator 1 view .LVU890 + 2670 00e0 0028 cmp r0, #0 + 2671 00e2 BBD0 beq .L123 +4709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2672 .loc 1 4709 16 view .LVU891 + 2673 00e4 0120 movs r0, #1 + 2674 00e6 C2E7 b .L112 + 2675 .LVL213: + 2676 .L118: +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2677 .loc 1 4716 7 is_stmt 1 view .LVU892 +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2678 .loc 1 4716 17 is_stmt 0 view .LVU893 + 2679 00e8 A36A ldr r3, [r4, #40] +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2680 .loc 1 4716 52 view .LVU894 + 2681 00ea 2A4A ldr r2, .L137+12 + 2682 .LVL214: +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2683 .loc 1 4716 52 view .LVU895 + 2684 00ec 9A62 str r2, [r3, #40] +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2685 .loc 1 4717 7 is_stmt 1 view .LVU896 +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2686 .loc 1 4717 17 is_stmt 0 view .LVU897 + 2687 00ee A36A ldr r3, [r4, #40] +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2688 .loc 1 4717 56 view .LVU898 + 2689 00f0 294A ldr r2, .L137+16 + 2690 00f2 DA62 str r2, [r3, #44] +4720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2691 .loc 1 4720 7 is_stmt 1 view .LVU899 +4720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2692 .loc 1 4720 17 is_stmt 0 view .LVU900 + 2693 00f4 A36A ldr r3, [r4, #40] +4720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2694 .loc 1 4720 53 view .LVU901 + 2695 00f6 264A ldr r2, .L137+8 + 2696 00f8 1A63 str r2, [r3, #48] +4723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2697 .loc 1 4723 7 is_stmt 1 view .LVU902 +4724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2698 .loc 1 4724 43 is_stmt 0 view .LVU903 + 2699 00fa 2268 ldr r2, [r4] + ARM GAS /tmp/cc0aF2h1.s page 193 + + +4723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2700 .loc 1 4723 11 view .LVU904 + 2701 00fc 059B ldr r3, [sp, #20] + 2702 00fe 4C32 adds r2, r2, #76 + 2703 0100 A06A ldr r0, [r4, #40] + 2704 0102 FFF7FEFF bl HAL_DMA_Start_IT + 2705 .LVL215: +4723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2706 .loc 1 4723 10 discriminator 1 view .LVU905 + 2707 0106 0028 cmp r0, #0 + 2708 0108 A8D0 beq .L123 +4727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2709 .loc 1 4727 16 view .LVU906 + 2710 010a 0120 movs r0, #1 + 2711 010c AFE7 b .L112 + 2712 .LVL216: + 2713 .L115: +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2714 .loc 1 4734 7 is_stmt 1 view .LVU907 +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2715 .loc 1 4734 17 is_stmt 0 view .LVU908 + 2716 010e E36A ldr r3, [r4, #44] +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2717 .loc 1 4734 52 view .LVU909 + 2718 0110 204A ldr r2, .L137+12 + 2719 .LVL217: +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2720 .loc 1 4734 52 view .LVU910 + 2721 0112 9A62 str r2, [r3, #40] +4735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2722 .loc 1 4735 7 is_stmt 1 view .LVU911 +4735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2723 .loc 1 4735 17 is_stmt 0 view .LVU912 + 2724 0114 E36A ldr r3, [r4, #44] +4735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2725 .loc 1 4735 56 view .LVU913 + 2726 0116 204A ldr r2, .L137+16 + 2727 0118 DA62 str r2, [r3, #44] +4738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2728 .loc 1 4738 7 is_stmt 1 view .LVU914 +4738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2729 .loc 1 4738 17 is_stmt 0 view .LVU915 + 2730 011a E36A ldr r3, [r4, #44] +4738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2731 .loc 1 4738 53 view .LVU916 + 2732 011c 1C4A ldr r2, .L137+8 + 2733 011e 1A63 str r2, [r3, #48] +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2734 .loc 1 4741 7 is_stmt 1 view .LVU917 +4742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2735 .loc 1 4742 43 is_stmt 0 view .LVU918 + 2736 0120 2268 ldr r2, [r4] +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2737 .loc 1 4741 11 view .LVU919 + 2738 0122 059B ldr r3, [sp, #20] + 2739 0124 4C32 adds r2, r2, #76 + 2740 0126 E06A ldr r0, [r4, #44] + ARM GAS /tmp/cc0aF2h1.s page 194 + + + 2741 0128 FFF7FEFF bl HAL_DMA_Start_IT + 2742 .LVL218: +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2743 .loc 1 4741 10 discriminator 1 view .LVU920 + 2744 012c 0028 cmp r0, #0 + 2745 012e 95D0 beq .L123 +4745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2746 .loc 1 4745 16 view .LVU921 + 2747 0130 0120 movs r0, #1 + 2748 0132 9CE7 b .L112 + 2749 .LVL219: + 2750 .L120: +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2751 .loc 1 4770 7 is_stmt 1 view .LVU922 +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2752 .loc 1 4770 17 is_stmt 0 view .LVU923 + 2753 0134 636B ldr r3, [r4, #52] +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2754 .loc 1 4770 60 view .LVU924 + 2755 0136 194A ldr r2, .L137+20 + 2756 .LVL220: +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2757 .loc 1 4770 60 view .LVU925 + 2758 0138 9A62 str r2, [r3, #40] +4771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2759 .loc 1 4771 7 is_stmt 1 view .LVU926 +4771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2760 .loc 1 4771 17 is_stmt 0 view .LVU927 + 2761 013a 636B ldr r3, [r4, #52] +4771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2762 .loc 1 4771 64 view .LVU928 + 2763 013c 184A ldr r2, .L137+24 + 2764 013e DA62 str r2, [r3, #44] +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2765 .loc 1 4774 7 is_stmt 1 view .LVU929 +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2766 .loc 1 4774 17 is_stmt 0 view .LVU930 + 2767 0140 636B ldr r3, [r4, #52] +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2768 .loc 1 4774 61 view .LVU931 + 2769 0142 134A ldr r2, .L137+8 + 2770 0144 1A63 str r2, [r3, #48] +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2771 .loc 1 4777 7 is_stmt 1 view .LVU932 +4778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2772 .loc 1 4778 43 is_stmt 0 view .LVU933 + 2773 0146 2268 ldr r2, [r4] +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2774 .loc 1 4777 11 view .LVU934 + 2775 0148 059B ldr r3, [sp, #20] + 2776 014a 4C32 adds r2, r2, #76 + 2777 014c 606B ldr r0, [r4, #52] + 2778 014e FFF7FEFF bl HAL_DMA_Start_IT + 2779 .LVL221: +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2780 .loc 1 4777 10 discriminator 1 view .LVU935 + 2781 0152 0028 cmp r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 195 + + + 2782 0154 82D0 beq .L123 +4781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2783 .loc 1 4781 16 view .LVU936 + 2784 0156 0120 movs r0, #1 + 2785 0158 89E7 b .L112 + 2786 .LVL222: + 2787 .L121: +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2788 .loc 1 4788 7 is_stmt 1 view .LVU937 +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2789 .loc 1 4788 17 is_stmt 0 view .LVU938 + 2790 015a A36B ldr r3, [r4, #56] +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2791 .loc 1 4788 56 view .LVU939 + 2792 015c 114A ldr r2, .L137+28 + 2793 .LVL223: +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2794 .loc 1 4788 56 view .LVU940 + 2795 015e 9A62 str r2, [r3, #40] +4789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2796 .loc 1 4789 7 is_stmt 1 view .LVU941 +4789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2797 .loc 1 4789 17 is_stmt 0 view .LVU942 + 2798 0160 A36B ldr r3, [r4, #56] +4789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2799 .loc 1 4789 60 view .LVU943 + 2800 0162 114A ldr r2, .L137+32 + 2801 0164 DA62 str r2, [r3, #44] +4792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2802 .loc 1 4792 7 is_stmt 1 view .LVU944 +4792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2803 .loc 1 4792 17 is_stmt 0 view .LVU945 + 2804 0166 A36B ldr r3, [r4, #56] +4792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2805 .loc 1 4792 57 view .LVU946 + 2806 0168 094A ldr r2, .L137+8 + 2807 016a 1A63 str r2, [r3, #48] +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2808 .loc 1 4795 7 is_stmt 1 view .LVU947 +4796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2809 .loc 1 4796 43 is_stmt 0 view .LVU948 + 2810 016c 2268 ldr r2, [r4] +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2811 .loc 1 4795 11 view .LVU949 + 2812 016e 059B ldr r3, [sp, #20] + 2813 0170 4C32 adds r2, r2, #76 + 2814 0172 A06B ldr r0, [r4, #56] + 2815 0174 FFF7FEFF bl HAL_DMA_Start_IT + 2816 .LVL224: +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2817 .loc 1 4795 10 discriminator 1 view .LVU950 + 2818 0178 0028 cmp r0, #0 + 2819 017a 3FF46FAF beq .L123 +4799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2820 .loc 1 4799 16 view .LVU951 + 2821 017e 0120 movs r0, #1 + 2822 0180 75E7 b .L112 + ARM GAS /tmp/cc0aF2h1.s page 196 + + + 2823 .L134: +4691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2824 .loc 1 4691 16 view .LVU952 + 2825 0182 0120 movs r0, #1 + 2826 0184 73E7 b .L112 + 2827 .L138: + 2828 0186 00BF .align 2 + 2829 .L137: + 2830 0188 00000000 .word TIM_DMAPeriodElapsedCplt + 2831 018c 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 2832 0190 00000000 .word TIM_DMAError + 2833 0194 00000000 .word TIM_DMADelayPulseCplt + 2834 0198 00000000 .word TIM_DMADelayPulseHalfCplt + 2835 019c 00000000 .word TIMEx_DMACommutationCplt + 2836 01a0 00000000 .word TIMEx_DMACommutationHalfCplt + 2837 01a4 00000000 .word TIM_DMATriggerCplt + 2838 01a8 00000000 .word TIM_DMATriggerHalfCplt + 2839 .cfi_endproc + 2840 .LFE194: + 2842 .section .text.HAL_TIM_DMABurst_WriteStart,"ax",%progbits + 2843 .align 1 + 2844 .global HAL_TIM_DMABurst_WriteStart + 2845 .syntax unified + 2846 .thumb + 2847 .thumb_func + 2849 HAL_TIM_DMABurst_WriteStart: + 2850 .LVL225: + 2851 .LFB193: +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status; + 2852 .loc 1 4587 1 is_stmt 1 view -0 + 2853 .cfi_startproc + 2854 @ args = 4, pretend = 0, frame = 0 + 2855 @ frame_needed = 0, uses_anonymous_args = 0 +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status; + 2856 .loc 1 4587 1 is_stmt 0 view .LVU954 + 2857 0000 30B5 push {r4, r5, lr} + 2858 .cfi_def_cfa_offset 12 + 2859 .cfi_offset 4, -12 + 2860 .cfi_offset 5, -8 + 2861 .cfi_offset 14, -4 + 2862 0002 83B0 sub sp, sp, #12 + 2863 .cfi_def_cfa_offset 24 + 2864 0004 069D ldr r5, [sp, #24] +4588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2865 .loc 1 4588 3 is_stmt 1 view .LVU955 +4590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 2866 .loc 1 4590 3 view .LVU956 +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2867 .loc 1 4591 60 is_stmt 0 view .LVU957 + 2868 0006 2C0A lsrs r4, r5, #8 +4590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 2869 .loc 1 4590 12 view .LVU958 + 2870 0008 0134 adds r4, r4, #1 + 2871 000a 0194 str r4, [sp, #4] + 2872 000c 0095 str r5, [sp] + 2873 000e FFF7FEFF bl HAL_TIM_DMABurst_MultiWriteStart + 2874 .LVL226: + ARM GAS /tmp/cc0aF2h1.s page 197 + + +4595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2875 .loc 1 4595 3 is_stmt 1 view .LVU959 +4596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2876 .loc 1 4596 1 is_stmt 0 view .LVU960 + 2877 0012 03B0 add sp, sp, #12 + 2878 .cfi_def_cfa_offset 12 + 2879 @ sp needed + 2880 0014 30BD pop {r4, r5, pc} +4596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2881 .loc 1 4596 1 view .LVU961 + 2882 .cfi_endproc + 2883 .LFE193: + 2885 .section .text.HAL_TIM_DMABurst_WriteStop,"ax",%progbits + 2886 .align 1 + 2887 .global HAL_TIM_DMABurst_WriteStop + 2888 .syntax unified + 2889 .thumb + 2890 .thumb_func + 2892 HAL_TIM_DMABurst_WriteStop: + 2893 .LVL227: + 2894 .LFB195: +4827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2895 .loc 1 4827 1 is_stmt 1 view -0 + 2896 .cfi_startproc + 2897 @ args = 0, pretend = 0, frame = 0 + 2898 @ frame_needed = 0, uses_anonymous_args = 0 +4827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2899 .loc 1 4827 1 is_stmt 0 view .LVU963 + 2900 0000 38B5 push {r3, r4, r5, lr} + 2901 .cfi_def_cfa_offset 16 + 2902 .cfi_offset 3, -16 + 2903 .cfi_offset 4, -12 + 2904 .cfi_offset 5, -8 + 2905 .cfi_offset 14, -4 + 2906 0002 0546 mov r5, r0 + 2907 0004 0C46 mov r4, r1 +4828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2908 .loc 1 4828 3 is_stmt 1 view .LVU964 + 2909 .LVL228: +4831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2910 .loc 1 4831 3 view .LVU965 +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2911 .loc 1 4834 3 view .LVU966 + 2912 0006 B1F5006F cmp r1, #2048 + 2913 000a 2FD0 beq .L142 + 2914 000c 17D8 bhi .L143 + 2915 000e B1F5007F cmp r1, #512 + 2916 0012 23D0 beq .L144 + 2917 0014 B1F5806F cmp r1, #1024 + 2918 0018 24D0 beq .L145 + 2919 001a B1F5807F cmp r1, #256 + 2920 001e 0CD1 bne .L153 +4838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2921 .loc 1 4838 7 view .LVU967 +4838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2922 .loc 1 4838 13 is_stmt 0 view .LVU968 + 2923 0020 006A ldr r0, [r0, #32] + ARM GAS /tmp/cc0aF2h1.s page 198 + + + 2924 .LVL229: +4838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2925 .loc 1 4838 13 view .LVU969 + 2926 0022 FFF7FEFF bl HAL_DMA_Abort_IT + 2927 .LVL230: +4839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2928 .loc 1 4839 7 is_stmt 1 view .LVU970 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2929 .loc 1 4876 3 view .LVU971 + 2930 .L151: +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2931 .loc 1 4879 5 view .LVU972 + 2932 0026 2A68 ldr r2, [r5] + 2933 0028 D368 ldr r3, [r2, #12] + 2934 002a 23EA0403 bic r3, r3, r4 + 2935 002e D360 str r3, [r2, #12] +4882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2936 .loc 1 4882 5 view .LVU973 +4882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2937 .loc 1 4882 25 is_stmt 0 view .LVU974 + 2938 0030 0123 movs r3, #1 + 2939 0032 85F84830 strb r3, [r5, #72] + 2940 0036 0020 movs r0, #0 + 2941 .L147: + 2942 .LVL231: +4886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2943 .loc 1 4886 3 is_stmt 1 view .LVU975 +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 2944 .loc 1 4887 1 is_stmt 0 view .LVU976 + 2945 0038 38BD pop {r3, r4, r5, pc} + 2946 .LVL232: + 2947 .L153: +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2948 .loc 1 4834 3 view .LVU977 + 2949 003a 0120 movs r0, #1 + 2950 .LVL233: +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2951 .loc 1 4834 3 view .LVU978 + 2952 003c FCE7 b .L147 + 2953 .LVL234: + 2954 .L143: +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2955 .loc 1 4834 3 view .LVU979 + 2956 003e B1F5005F cmp r1, #8192 + 2957 0042 17D0 beq .L148 + 2958 0044 B1F5804F cmp r1, #16384 + 2959 0048 18D0 beq .L149 + 2960 004a B1F5805F cmp r1, #4096 + 2961 004e 03D1 bne .L154 +4858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2962 .loc 1 4858 7 is_stmt 1 view .LVU980 +4858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2963 .loc 1 4858 13 is_stmt 0 view .LVU981 + 2964 0050 006B ldr r0, [r0, #48] + 2965 .LVL235: +4858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2966 .loc 1 4858 13 view .LVU982 + ARM GAS /tmp/cc0aF2h1.s page 199 + + + 2967 0052 FFF7FEFF bl HAL_DMA_Abort_IT + 2968 .LVL236: +4859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2969 .loc 1 4859 7 is_stmt 1 view .LVU983 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2970 .loc 1 4876 3 view .LVU984 + 2971 0056 E6E7 b .L151 + 2972 .LVL237: + 2973 .L154: +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2974 .loc 1 4834 3 is_stmt 0 view .LVU985 + 2975 0058 0120 movs r0, #1 + 2976 .LVL238: +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2977 .loc 1 4834 3 view .LVU986 + 2978 005a EDE7 b .L147 + 2979 .LVL239: + 2980 .L144: +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2981 .loc 1 4843 7 is_stmt 1 view .LVU987 +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2982 .loc 1 4843 13 is_stmt 0 view .LVU988 + 2983 005c 406A ldr r0, [r0, #36] + 2984 .LVL240: +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2985 .loc 1 4843 13 view .LVU989 + 2986 005e FFF7FEFF bl HAL_DMA_Abort_IT + 2987 .LVL241: +4844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 2988 .loc 1 4844 7 is_stmt 1 view .LVU990 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 2989 .loc 1 4876 3 view .LVU991 + 2990 0062 E0E7 b .L151 + 2991 .LVL242: + 2992 .L145: +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2993 .loc 1 4848 7 view .LVU992 +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2994 .loc 1 4848 13 is_stmt 0 view .LVU993 + 2995 0064 806A ldr r0, [r0, #40] + 2996 .LVL243: +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 2997 .loc 1 4848 13 view .LVU994 + 2998 0066 FFF7FEFF bl HAL_DMA_Abort_IT + 2999 .LVL244: +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3000 .loc 1 4849 7 is_stmt 1 view .LVU995 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3001 .loc 1 4876 3 view .LVU996 + 3002 006a DCE7 b .L151 + 3003 .LVL245: + 3004 .L142: +4853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3005 .loc 1 4853 7 view .LVU997 +4853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3006 .loc 1 4853 13 is_stmt 0 view .LVU998 + 3007 006c C06A ldr r0, [r0, #44] + ARM GAS /tmp/cc0aF2h1.s page 200 + + + 3008 .LVL246: +4853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3009 .loc 1 4853 13 view .LVU999 + 3010 006e FFF7FEFF bl HAL_DMA_Abort_IT + 3011 .LVL247: +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3012 .loc 1 4854 7 is_stmt 1 view .LVU1000 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3013 .loc 1 4876 3 view .LVU1001 + 3014 0072 D8E7 b .L151 + 3015 .LVL248: + 3016 .L148: +4863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3017 .loc 1 4863 7 view .LVU1002 +4863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3018 .loc 1 4863 13 is_stmt 0 view .LVU1003 + 3019 0074 406B ldr r0, [r0, #52] + 3020 .LVL249: +4863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3021 .loc 1 4863 13 view .LVU1004 + 3022 0076 FFF7FEFF bl HAL_DMA_Abort_IT + 3023 .LVL250: +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3024 .loc 1 4864 7 is_stmt 1 view .LVU1005 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3025 .loc 1 4876 3 view .LVU1006 + 3026 007a D4E7 b .L151 + 3027 .LVL251: + 3028 .L149: +4868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3029 .loc 1 4868 7 view .LVU1007 +4868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3030 .loc 1 4868 13 is_stmt 0 view .LVU1008 + 3031 007c 806B ldr r0, [r0, #56] + 3032 .LVL252: +4868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3033 .loc 1 4868 13 view .LVU1009 + 3034 007e FFF7FEFF bl HAL_DMA_Abort_IT + 3035 .LVL253: +4869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3036 .loc 1 4869 7 is_stmt 1 view .LVU1010 +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3037 .loc 1 4876 3 view .LVU1011 + 3038 0082 D0E7 b .L151 + 3039 .cfi_endproc + 3040 .LFE195: + 3042 .section .text.HAL_TIM_DMABurst_MultiReadStart,"ax",%progbits + 3043 .align 1 + 3044 .global HAL_TIM_DMABurst_MultiReadStart + 3045 .syntax unified + 3046 .thumb + 3047 .thumb_func + 3049 HAL_TIM_DMABurst_MultiReadStart: + 3050 .LVL254: + 3051 .LFB197: +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3052 .loc 1 4991 1 view -0 + ARM GAS /tmp/cc0aF2h1.s page 201 + + + 3053 .cfi_startproc + 3054 @ args = 8, pretend = 0, frame = 0 + 3055 @ frame_needed = 0, uses_anonymous_args = 0 +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3056 .loc 1 4991 1 is_stmt 0 view .LVU1013 + 3057 0000 70B5 push {r4, r5, r6, lr} + 3058 .cfi_def_cfa_offset 16 + 3059 .cfi_offset 4, -16 + 3060 .cfi_offset 5, -12 + 3061 .cfi_offset 6, -8 + 3062 .cfi_offset 14, -4 + 3063 0002 0446 mov r4, r0 +4992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3064 .loc 1 4992 3 is_stmt 1 view .LVU1014 + 3065 .LVL255: +4995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); + 3066 .loc 1 4995 3 view .LVU1015 +4996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); + 3067 .loc 1 4996 3 view .LVU1016 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); + 3068 .loc 1 4997 3 view .LVU1017 +4998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + 3069 .loc 1 4998 3 view .LVU1018 +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3070 .loc 1 4999 3 view .LVU1019 +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3071 .loc 1 5001 3 view .LVU1020 +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3072 .loc 1 5001 11 is_stmt 0 view .LVU1021 + 3073 0004 90F84800 ldrb r0, [r0, #72] @ zero_extendqisi2 + 3074 .LVL256: +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3075 .loc 1 5001 11 view .LVU1022 + 3076 0008 C0B2 uxtb r0, r0 +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3077 .loc 1 5001 6 view .LVU1023 + 3078 000a 0228 cmp r0, #2 + 3079 000c 2FD0 beq .L156 + 3080 000e 0E46 mov r6, r1 + 3081 0010 1546 mov r5, r2 + 3082 0012 1A46 mov r2, r3 + 3083 .LVL257: +5005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3084 .loc 1 5005 8 is_stmt 1 view .LVU1024 +5005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3085 .loc 1 5005 16 is_stmt 0 view .LVU1025 + 3086 0014 94F84800 ldrb r0, [r4, #72] @ zero_extendqisi2 + 3087 0018 C0B2 uxtb r0, r0 +5005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3088 .loc 1 5005 11 view .LVU1026 + 3089 001a 0128 cmp r0, #1 + 3090 001c 28D0 beq .L176 + 3091 .LVL258: + 3092 .L157: +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** switch (BurstRequestSrc) + 3093 .loc 1 5019 3 is_stmt 1 view .LVU1027 +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 202 + + + 3094 .loc 1 5020 3 view .LVU1028 + 3095 001e B5F5006F cmp r5, #2048 + 3096 0022 74D0 beq .L159 + 3097 0024 2FD8 bhi .L160 + 3098 0026 B5F5007F cmp r5, #512 + 3099 002a 4AD0 beq .L161 + 3100 002c B5F5806F cmp r5, #1024 + 3101 0030 5AD0 beq .L162 + 3102 0032 B5F5807F cmp r5, #256 + 3103 0036 24D1 bne .L177 +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3104 .loc 1 5025 7 view .LVU1029 +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3105 .loc 1 5025 17 is_stmt 0 view .LVU1030 + 3106 0038 236A ldr r3, [r4, #32] +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3107 .loc 1 5025 55 view .LVU1031 + 3108 003a 5349 ldr r1, .L181 + 3109 .LVL259: +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3110 .loc 1 5025 55 view .LVU1032 + 3111 003c 9962 str r1, [r3, #40] +5026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3112 .loc 1 5026 7 is_stmt 1 view .LVU1033 +5026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3113 .loc 1 5026 17 is_stmt 0 view .LVU1034 + 3114 003e 236A ldr r3, [r4, #32] +5026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3115 .loc 1 5026 59 view .LVU1035 + 3116 0040 5249 ldr r1, .L181+4 + 3117 0042 D962 str r1, [r3, #44] +5029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3118 .loc 1 5029 7 is_stmt 1 view .LVU1036 +5029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3119 .loc 1 5029 17 is_stmt 0 view .LVU1037 + 3120 0044 236A ldr r3, [r4, #32] +5029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3121 .loc 1 5029 56 view .LVU1038 + 3122 0046 5249 ldr r1, .L181+8 + 3123 0048 1963 str r1, [r3, #48] +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3124 .loc 1 5032 7 is_stmt 1 view .LVU1039 +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3125 .loc 1 5032 74 is_stmt 0 view .LVU1040 + 3126 004a 2168 ldr r1, [r4] +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3127 .loc 1 5032 11 view .LVU1041 + 3128 004c 059B ldr r3, [sp, #20] + 3129 004e 4C31 adds r1, r1, #76 + 3130 0050 206A ldr r0, [r4, #32] + 3131 0052 FFF7FEFF bl HAL_DMA_Start_IT + 3132 .LVL260: +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3133 .loc 1 5032 10 discriminator 1 view .LVU1042 + 3134 0056 0028 cmp r0, #0 + 3135 0058 40F09380 bne .L178 + 3136 .L167: + ARM GAS /tmp/cc0aF2h1.s page 203 + + + 3137 .LVL261: +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3138 .loc 1 5156 5 is_stmt 1 view .LVU1043 +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3139 .loc 1 5156 9 is_stmt 0 view .LVU1044 + 3140 005c 2368 ldr r3, [r4] +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3141 .loc 1 5156 45 view .LVU1045 + 3142 005e 049A ldr r2, [sp, #16] + 3143 0060 1643 orrs r6, r6, r2 + 3144 .LVL262: +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3145 .loc 1 5156 25 view .LVU1046 + 3146 0062 9E64 str r6, [r3, #72] +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3147 .loc 1 5159 5 is_stmt 1 view .LVU1047 + 3148 0064 2268 ldr r2, [r4] + 3149 0066 D368 ldr r3, [r2, #12] + 3150 0068 2B43 orrs r3, r3, r5 + 3151 006a D360 str r3, [r2, #12] + 3152 006c 0020 movs r0, #0 + 3153 .LVL263: + 3154 .L156: +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3155 .loc 1 5164 1 is_stmt 0 view .LVU1048 + 3156 006e 70BD pop {r4, r5, r6, pc} + 3157 .LVL264: + 3158 .L176: +5007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3159 .loc 1 5007 5 is_stmt 1 view .LVU1049 +5007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3160 .loc 1 5007 8 is_stmt 0 view .LVU1050 + 3161 0070 1BB1 cbz r3, .L179 + 3162 .L158: +5013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3163 .loc 1 5013 7 is_stmt 1 view .LVU1051 +5013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3164 .loc 1 5013 27 is_stmt 0 view .LVU1052 + 3165 0072 0223 movs r3, #2 + 3166 0074 84F84830 strb r3, [r4, #72] + 3167 0078 D1E7 b .L157 + 3168 .L179: +5007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3169 .loc 1 5007 31 discriminator 1 view .LVU1053 + 3170 007a 049B ldr r3, [sp, #16] + 3171 007c 002B cmp r3, #0 + 3172 007e F8D0 beq .L158 + 3173 0080 F5E7 b .L156 + 3174 .L177: +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3175 .loc 1 5020 3 view .LVU1054 + 3176 0082 0120 movs r0, #1 + 3177 0084 F3E7 b .L156 + 3178 .L160: + 3179 0086 B5F5005F cmp r5, #8192 + 3180 008a 53D0 beq .L164 + 3181 008c B5F5804F cmp r5, #16384 + ARM GAS /tmp/cc0aF2h1.s page 204 + + + 3182 0090 63D0 beq .L165 + 3183 0092 B5F5805F cmp r5, #4096 + 3184 0096 12D1 bne .L180 +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3185 .loc 1 5097 7 is_stmt 1 view .LVU1055 +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3186 .loc 1 5097 17 is_stmt 0 view .LVU1056 + 3187 0098 236B ldr r3, [r4, #48] +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3188 .loc 1 5097 52 view .LVU1057 + 3189 009a 3E49 ldr r1, .L181+12 + 3190 .LVL265: +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3191 .loc 1 5097 52 view .LVU1058 + 3192 009c 9962 str r1, [r3, #40] +5098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3193 .loc 1 5098 7 is_stmt 1 view .LVU1059 +5098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3194 .loc 1 5098 17 is_stmt 0 view .LVU1060 + 3195 009e 236B ldr r3, [r4, #48] +5098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3196 .loc 1 5098 56 view .LVU1061 + 3197 00a0 3D49 ldr r1, .L181+16 + 3198 00a2 D962 str r1, [r3, #44] +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3199 .loc 1 5101 7 is_stmt 1 view .LVU1062 +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3200 .loc 1 5101 17 is_stmt 0 view .LVU1063 + 3201 00a4 236B ldr r3, [r4, #48] +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3202 .loc 1 5101 53 view .LVU1064 + 3203 00a6 3A49 ldr r1, .L181+8 + 3204 00a8 1963 str r1, [r3, #48] +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3205 .loc 1 5104 7 is_stmt 1 view .LVU1065 +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3206 .loc 1 5104 71 is_stmt 0 view .LVU1066 + 3207 00aa 2168 ldr r1, [r4] +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3208 .loc 1 5104 11 view .LVU1067 + 3209 00ac 059B ldr r3, [sp, #20] + 3210 00ae 4C31 adds r1, r1, #76 + 3211 00b0 206B ldr r0, [r4, #48] + 3212 00b2 FFF7FEFF bl HAL_DMA_Start_IT + 3213 .LVL266: +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3214 .loc 1 5104 10 discriminator 1 view .LVU1068 + 3215 00b6 0028 cmp r0, #0 + 3216 00b8 D0D0 beq .L167 +5108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3217 .loc 1 5108 16 view .LVU1069 + 3218 00ba 0120 movs r0, #1 + 3219 00bc D7E7 b .L156 + 3220 .LVL267: + 3221 .L180: +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3222 .loc 1 5020 3 view .LVU1070 + ARM GAS /tmp/cc0aF2h1.s page 205 + + + 3223 00be 0120 movs r0, #1 + 3224 00c0 D5E7 b .L156 + 3225 .L161: +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3226 .loc 1 5043 7 is_stmt 1 view .LVU1071 +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3227 .loc 1 5043 17 is_stmt 0 view .LVU1072 + 3228 00c2 636A ldr r3, [r4, #36] +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3229 .loc 1 5043 52 view .LVU1073 + 3230 00c4 3349 ldr r1, .L181+12 + 3231 .LVL268: +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3232 .loc 1 5043 52 view .LVU1074 + 3233 00c6 9962 str r1, [r3, #40] +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3234 .loc 1 5044 7 is_stmt 1 view .LVU1075 +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3235 .loc 1 5044 17 is_stmt 0 view .LVU1076 + 3236 00c8 636A ldr r3, [r4, #36] +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3237 .loc 1 5044 56 view .LVU1077 + 3238 00ca 3349 ldr r1, .L181+16 + 3239 00cc D962 str r1, [r3, #44] +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3240 .loc 1 5047 7 is_stmt 1 view .LVU1078 +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3241 .loc 1 5047 17 is_stmt 0 view .LVU1079 + 3242 00ce 636A ldr r3, [r4, #36] +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3243 .loc 1 5047 53 view .LVU1080 + 3244 00d0 2F49 ldr r1, .L181+8 + 3245 00d2 1963 str r1, [r3, #48] +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3246 .loc 1 5050 7 is_stmt 1 view .LVU1081 +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3247 .loc 1 5050 71 is_stmt 0 view .LVU1082 + 3248 00d4 2168 ldr r1, [r4] +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3249 .loc 1 5050 11 view .LVU1083 + 3250 00d6 059B ldr r3, [sp, #20] + 3251 00d8 4C31 adds r1, r1, #76 + 3252 00da 606A ldr r0, [r4, #36] + 3253 00dc FFF7FEFF bl HAL_DMA_Start_IT + 3254 .LVL269: +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3255 .loc 1 5050 10 discriminator 1 view .LVU1084 + 3256 00e0 0028 cmp r0, #0 + 3257 00e2 BBD0 beq .L167 +5054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3258 .loc 1 5054 16 view .LVU1085 + 3259 00e4 0120 movs r0, #1 + 3260 00e6 C2E7 b .L156 + 3261 .LVL270: + 3262 .L162: +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3263 .loc 1 5061 7 is_stmt 1 view .LVU1086 + ARM GAS /tmp/cc0aF2h1.s page 206 + + +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3264 .loc 1 5061 17 is_stmt 0 view .LVU1087 + 3265 00e8 A36A ldr r3, [r4, #40] +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3266 .loc 1 5061 52 view .LVU1088 + 3267 00ea 2A49 ldr r1, .L181+12 + 3268 .LVL271: +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3269 .loc 1 5061 52 view .LVU1089 + 3270 00ec 9962 str r1, [r3, #40] +5062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3271 .loc 1 5062 7 is_stmt 1 view .LVU1090 +5062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3272 .loc 1 5062 17 is_stmt 0 view .LVU1091 + 3273 00ee A36A ldr r3, [r4, #40] +5062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3274 .loc 1 5062 56 view .LVU1092 + 3275 00f0 2949 ldr r1, .L181+16 + 3276 00f2 D962 str r1, [r3, #44] +5065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3277 .loc 1 5065 7 is_stmt 1 view .LVU1093 +5065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3278 .loc 1 5065 17 is_stmt 0 view .LVU1094 + 3279 00f4 A36A ldr r3, [r4, #40] +5065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3280 .loc 1 5065 53 view .LVU1095 + 3281 00f6 2649 ldr r1, .L181+8 + 3282 00f8 1963 str r1, [r3, #48] +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3283 .loc 1 5068 7 is_stmt 1 view .LVU1096 +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3284 .loc 1 5068 71 is_stmt 0 view .LVU1097 + 3285 00fa 2168 ldr r1, [r4] +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3286 .loc 1 5068 11 view .LVU1098 + 3287 00fc 059B ldr r3, [sp, #20] + 3288 00fe 4C31 adds r1, r1, #76 + 3289 0100 A06A ldr r0, [r4, #40] + 3290 0102 FFF7FEFF bl HAL_DMA_Start_IT + 3291 .LVL272: +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3292 .loc 1 5068 10 discriminator 1 view .LVU1099 + 3293 0106 0028 cmp r0, #0 + 3294 0108 A8D0 beq .L167 +5072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3295 .loc 1 5072 16 view .LVU1100 + 3296 010a 0120 movs r0, #1 + 3297 010c AFE7 b .L156 + 3298 .LVL273: + 3299 .L159: +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3300 .loc 1 5079 7 is_stmt 1 view .LVU1101 +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3301 .loc 1 5079 17 is_stmt 0 view .LVU1102 + 3302 010e E36A ldr r3, [r4, #44] +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3303 .loc 1 5079 52 view .LVU1103 + ARM GAS /tmp/cc0aF2h1.s page 207 + + + 3304 0110 2049 ldr r1, .L181+12 + 3305 .LVL274: +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3306 .loc 1 5079 52 view .LVU1104 + 3307 0112 9962 str r1, [r3, #40] +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3308 .loc 1 5080 7 is_stmt 1 view .LVU1105 +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3309 .loc 1 5080 17 is_stmt 0 view .LVU1106 + 3310 0114 E36A ldr r3, [r4, #44] +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3311 .loc 1 5080 56 view .LVU1107 + 3312 0116 2049 ldr r1, .L181+16 + 3313 0118 D962 str r1, [r3, #44] +5083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3314 .loc 1 5083 7 is_stmt 1 view .LVU1108 +5083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3315 .loc 1 5083 17 is_stmt 0 view .LVU1109 + 3316 011a E36A ldr r3, [r4, #44] +5083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3317 .loc 1 5083 53 view .LVU1110 + 3318 011c 1C49 ldr r1, .L181+8 + 3319 011e 1963 str r1, [r3, #48] +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3320 .loc 1 5086 7 is_stmt 1 view .LVU1111 +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3321 .loc 1 5086 71 is_stmt 0 view .LVU1112 + 3322 0120 2168 ldr r1, [r4] +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3323 .loc 1 5086 11 view .LVU1113 + 3324 0122 059B ldr r3, [sp, #20] + 3325 0124 4C31 adds r1, r1, #76 + 3326 0126 E06A ldr r0, [r4, #44] + 3327 0128 FFF7FEFF bl HAL_DMA_Start_IT + 3328 .LVL275: +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3329 .loc 1 5086 10 discriminator 1 view .LVU1114 + 3330 012c 0028 cmp r0, #0 + 3331 012e 95D0 beq .L167 +5090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3332 .loc 1 5090 16 view .LVU1115 + 3333 0130 0120 movs r0, #1 + 3334 0132 9CE7 b .L156 + 3335 .LVL276: + 3336 .L164: +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3337 .loc 1 5115 7 is_stmt 1 view .LVU1116 +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3338 .loc 1 5115 17 is_stmt 0 view .LVU1117 + 3339 0134 636B ldr r3, [r4, #52] +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3340 .loc 1 5115 60 view .LVU1118 + 3341 0136 1949 ldr r1, .L181+20 + 3342 .LVL277: +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3343 .loc 1 5115 60 view .LVU1119 + 3344 0138 9962 str r1, [r3, #40] + ARM GAS /tmp/cc0aF2h1.s page 208 + + +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3345 .loc 1 5116 7 is_stmt 1 view .LVU1120 +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3346 .loc 1 5116 17 is_stmt 0 view .LVU1121 + 3347 013a 636B ldr r3, [r4, #52] +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3348 .loc 1 5116 64 view .LVU1122 + 3349 013c 1849 ldr r1, .L181+24 + 3350 013e D962 str r1, [r3, #44] +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3351 .loc 1 5119 7 is_stmt 1 view .LVU1123 +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3352 .loc 1 5119 17 is_stmt 0 view .LVU1124 + 3353 0140 636B ldr r3, [r4, #52] +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3354 .loc 1 5119 61 view .LVU1125 + 3355 0142 1349 ldr r1, .L181+8 + 3356 0144 1963 str r1, [r3, #48] +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3357 .loc 1 5122 7 is_stmt 1 view .LVU1126 +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3358 .loc 1 5122 79 is_stmt 0 view .LVU1127 + 3359 0146 2168 ldr r1, [r4] +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3360 .loc 1 5122 11 view .LVU1128 + 3361 0148 059B ldr r3, [sp, #20] + 3362 014a 4C31 adds r1, r1, #76 + 3363 014c 606B ldr r0, [r4, #52] + 3364 014e FFF7FEFF bl HAL_DMA_Start_IT + 3365 .LVL278: +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3366 .loc 1 5122 10 discriminator 1 view .LVU1129 + 3367 0152 0028 cmp r0, #0 + 3368 0154 82D0 beq .L167 +5126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3369 .loc 1 5126 16 view .LVU1130 + 3370 0156 0120 movs r0, #1 + 3371 0158 89E7 b .L156 + 3372 .LVL279: + 3373 .L165: +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3374 .loc 1 5133 7 is_stmt 1 view .LVU1131 +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3375 .loc 1 5133 17 is_stmt 0 view .LVU1132 + 3376 015a A36B ldr r3, [r4, #56] +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3377 .loc 1 5133 56 view .LVU1133 + 3378 015c 1149 ldr r1, .L181+28 + 3379 .LVL280: +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3380 .loc 1 5133 56 view .LVU1134 + 3381 015e 9962 str r1, [r3, #40] +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3382 .loc 1 5134 7 is_stmt 1 view .LVU1135 +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3383 .loc 1 5134 17 is_stmt 0 view .LVU1136 + 3384 0160 A36B ldr r3, [r4, #56] + ARM GAS /tmp/cc0aF2h1.s page 209 + + +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3385 .loc 1 5134 60 view .LVU1137 + 3386 0162 1149 ldr r1, .L181+32 + 3387 0164 D962 str r1, [r3, #44] +5137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3388 .loc 1 5137 7 is_stmt 1 view .LVU1138 +5137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3389 .loc 1 5137 17 is_stmt 0 view .LVU1139 + 3390 0166 A36B ldr r3, [r4, #56] +5137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3391 .loc 1 5137 57 view .LVU1140 + 3392 0168 0949 ldr r1, .L181+8 + 3393 016a 1963 str r1, [r3, #48] +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3394 .loc 1 5140 7 is_stmt 1 view .LVU1141 +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3395 .loc 1 5140 75 is_stmt 0 view .LVU1142 + 3396 016c 2168 ldr r1, [r4] +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3397 .loc 1 5140 11 view .LVU1143 + 3398 016e 059B ldr r3, [sp, #20] + 3399 0170 4C31 adds r1, r1, #76 + 3400 0172 A06B ldr r0, [r4, #56] + 3401 0174 FFF7FEFF bl HAL_DMA_Start_IT + 3402 .LVL281: +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** DataLength) != HAL_OK) + 3403 .loc 1 5140 10 discriminator 1 view .LVU1144 + 3404 0178 0028 cmp r0, #0 + 3405 017a 3FF46FAF beq .L167 +5144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3406 .loc 1 5144 16 view .LVU1145 + 3407 017e 0120 movs r0, #1 + 3408 0180 75E7 b .L156 + 3409 .L178: +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3410 .loc 1 5036 16 view .LVU1146 + 3411 0182 0120 movs r0, #1 + 3412 0184 73E7 b .L156 + 3413 .L182: + 3414 0186 00BF .align 2 + 3415 .L181: + 3416 0188 00000000 .word TIM_DMAPeriodElapsedCplt + 3417 018c 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 3418 0190 00000000 .word TIM_DMAError + 3419 0194 00000000 .word TIM_DMACaptureCplt + 3420 0198 00000000 .word TIM_DMACaptureHalfCplt + 3421 019c 00000000 .word TIMEx_DMACommutationCplt + 3422 01a0 00000000 .word TIMEx_DMACommutationHalfCplt + 3423 01a4 00000000 .word TIM_DMATriggerCplt + 3424 01a8 00000000 .word TIM_DMATriggerHalfCplt + 3425 .cfi_endproc + 3426 .LFE197: + 3428 .section .text.HAL_TIM_DMABurst_ReadStart,"ax",%progbits + 3429 .align 1 + 3430 .global HAL_TIM_DMABurst_ReadStart + 3431 .syntax unified + 3432 .thumb + ARM GAS /tmp/cc0aF2h1.s page 210 + + + 3433 .thumb_func + 3435 HAL_TIM_DMABurst_ReadStart: + 3436 .LVL282: + 3437 .LFB196: +4934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status; + 3438 .loc 1 4934 1 is_stmt 1 view -0 + 3439 .cfi_startproc + 3440 @ args = 4, pretend = 0, frame = 0 + 3441 @ frame_needed = 0, uses_anonymous_args = 0 +4934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status; + 3442 .loc 1 4934 1 is_stmt 0 view .LVU1148 + 3443 0000 30B5 push {r4, r5, lr} + 3444 .cfi_def_cfa_offset 12 + 3445 .cfi_offset 4, -12 + 3446 .cfi_offset 5, -8 + 3447 .cfi_offset 14, -4 + 3448 0002 83B0 sub sp, sp, #12 + 3449 .cfi_def_cfa_offset 24 + 3450 0004 069D ldr r5, [sp, #24] +4935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3451 .loc 1 4935 3 is_stmt 1 view .LVU1149 +4937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 3452 .loc 1 4937 3 view .LVU1150 +4938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3453 .loc 1 4938 59 is_stmt 0 view .LVU1151 + 3454 0006 2C0A lsrs r4, r5, #8 +4937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 3455 .loc 1 4937 12 view .LVU1152 + 3456 0008 0134 adds r4, r4, #1 + 3457 000a 0194 str r4, [sp, #4] + 3458 000c 0095 str r5, [sp] + 3459 000e FFF7FEFF bl HAL_TIM_DMABurst_MultiReadStart + 3460 .LVL283: +4941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3461 .loc 1 4941 3 is_stmt 1 view .LVU1153 +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3462 .loc 1 4942 1 is_stmt 0 view .LVU1154 + 3463 0012 03B0 add sp, sp, #12 + 3464 .cfi_def_cfa_offset 12 + 3465 @ sp needed + 3466 0014 30BD pop {r4, r5, pc} +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3467 .loc 1 4942 1 view .LVU1155 + 3468 .cfi_endproc + 3469 .LFE196: + 3471 .section .text.HAL_TIM_DMABurst_ReadStop,"ax",%progbits + 3472 .align 1 + 3473 .global HAL_TIM_DMABurst_ReadStop + 3474 .syntax unified + 3475 .thumb + 3476 .thumb_func + 3478 HAL_TIM_DMABurst_ReadStop: + 3479 .LVL284: + 3480 .LFB198: +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3481 .loc 1 5173 1 is_stmt 1 view -0 + 3482 .cfi_startproc + ARM GAS /tmp/cc0aF2h1.s page 211 + + + 3483 @ args = 0, pretend = 0, frame = 0 + 3484 @ frame_needed = 0, uses_anonymous_args = 0 +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3485 .loc 1 5173 1 is_stmt 0 view .LVU1157 + 3486 0000 38B5 push {r3, r4, r5, lr} + 3487 .cfi_def_cfa_offset 16 + 3488 .cfi_offset 3, -16 + 3489 .cfi_offset 4, -12 + 3490 .cfi_offset 5, -8 + 3491 .cfi_offset 14, -4 + 3492 0002 0546 mov r5, r0 + 3493 0004 0C46 mov r4, r1 +5174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3494 .loc 1 5174 3 is_stmt 1 view .LVU1158 + 3495 .LVL285: +5177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3496 .loc 1 5177 3 view .LVU1159 +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3497 .loc 1 5180 3 view .LVU1160 + 3498 0006 B1F5006F cmp r1, #2048 + 3499 000a 2FD0 beq .L186 + 3500 000c 17D8 bhi .L187 + 3501 000e B1F5007F cmp r1, #512 + 3502 0012 23D0 beq .L188 + 3503 0014 B1F5806F cmp r1, #1024 + 3504 0018 24D0 beq .L189 + 3505 001a B1F5807F cmp r1, #256 + 3506 001e 0CD1 bne .L197 +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3507 .loc 1 5184 7 view .LVU1161 +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3508 .loc 1 5184 13 is_stmt 0 view .LVU1162 + 3509 0020 006A ldr r0, [r0, #32] + 3510 .LVL286: +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3511 .loc 1 5184 13 view .LVU1163 + 3512 0022 FFF7FEFF bl HAL_DMA_Abort_IT + 3513 .LVL287: +5185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3514 .loc 1 5185 7 is_stmt 1 view .LVU1164 +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3515 .loc 1 5222 3 view .LVU1165 + 3516 .L195: +5225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3517 .loc 1 5225 5 view .LVU1166 + 3518 0026 2A68 ldr r2, [r5] + 3519 0028 D368 ldr r3, [r2, #12] + 3520 002a 23EA0403 bic r3, r3, r4 + 3521 002e D360 str r3, [r2, #12] +5228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3522 .loc 1 5228 5 view .LVU1167 +5228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3523 .loc 1 5228 25 is_stmt 0 view .LVU1168 + 3524 0030 0123 movs r3, #1 + 3525 0032 85F84830 strb r3, [r5, #72] + 3526 0036 0020 movs r0, #0 + 3527 .L191: + ARM GAS /tmp/cc0aF2h1.s page 212 + + + 3528 .LVL288: +5232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3529 .loc 1 5232 3 is_stmt 1 view .LVU1169 +5233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3530 .loc 1 5233 1 is_stmt 0 view .LVU1170 + 3531 0038 38BD pop {r3, r4, r5, pc} + 3532 .LVL289: + 3533 .L197: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3534 .loc 1 5180 3 view .LVU1171 + 3535 003a 0120 movs r0, #1 + 3536 .LVL290: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3537 .loc 1 5180 3 view .LVU1172 + 3538 003c FCE7 b .L191 + 3539 .LVL291: + 3540 .L187: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3541 .loc 1 5180 3 view .LVU1173 + 3542 003e B1F5005F cmp r1, #8192 + 3543 0042 17D0 beq .L192 + 3544 0044 B1F5804F cmp r1, #16384 + 3545 0048 18D0 beq .L193 + 3546 004a B1F5805F cmp r1, #4096 + 3547 004e 03D1 bne .L198 +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3548 .loc 1 5204 7 is_stmt 1 view .LVU1174 +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3549 .loc 1 5204 13 is_stmt 0 view .LVU1175 + 3550 0050 006B ldr r0, [r0, #48] + 3551 .LVL292: +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3552 .loc 1 5204 13 view .LVU1176 + 3553 0052 FFF7FEFF bl HAL_DMA_Abort_IT + 3554 .LVL293: +5205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3555 .loc 1 5205 7 is_stmt 1 view .LVU1177 +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3556 .loc 1 5222 3 view .LVU1178 + 3557 0056 E6E7 b .L195 + 3558 .LVL294: + 3559 .L198: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3560 .loc 1 5180 3 is_stmt 0 view .LVU1179 + 3561 0058 0120 movs r0, #1 + 3562 .LVL295: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3563 .loc 1 5180 3 view .LVU1180 + 3564 005a EDE7 b .L191 + 3565 .LVL296: + 3566 .L188: +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3567 .loc 1 5189 7 is_stmt 1 view .LVU1181 +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3568 .loc 1 5189 13 is_stmt 0 view .LVU1182 + 3569 005c 406A ldr r0, [r0, #36] + 3570 .LVL297: + ARM GAS /tmp/cc0aF2h1.s page 213 + + +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3571 .loc 1 5189 13 view .LVU1183 + 3572 005e FFF7FEFF bl HAL_DMA_Abort_IT + 3573 .LVL298: +5190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3574 .loc 1 5190 7 is_stmt 1 view .LVU1184 +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3575 .loc 1 5222 3 view .LVU1185 + 3576 0062 E0E7 b .L195 + 3577 .LVL299: + 3578 .L189: +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3579 .loc 1 5194 7 view .LVU1186 +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3580 .loc 1 5194 13 is_stmt 0 view .LVU1187 + 3581 0064 806A ldr r0, [r0, #40] + 3582 .LVL300: +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3583 .loc 1 5194 13 view .LVU1188 + 3584 0066 FFF7FEFF bl HAL_DMA_Abort_IT + 3585 .LVL301: +5195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3586 .loc 1 5195 7 is_stmt 1 view .LVU1189 +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3587 .loc 1 5222 3 view .LVU1190 + 3588 006a DCE7 b .L195 + 3589 .LVL302: + 3590 .L186: +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3591 .loc 1 5199 7 view .LVU1191 +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3592 .loc 1 5199 13 is_stmt 0 view .LVU1192 + 3593 006c C06A ldr r0, [r0, #44] + 3594 .LVL303: +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3595 .loc 1 5199 13 view .LVU1193 + 3596 006e FFF7FEFF bl HAL_DMA_Abort_IT + 3597 .LVL304: +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3598 .loc 1 5200 7 is_stmt 1 view .LVU1194 +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3599 .loc 1 5222 3 view .LVU1195 + 3600 0072 D8E7 b .L195 + 3601 .LVL305: + 3602 .L192: +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3603 .loc 1 5209 7 view .LVU1196 +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3604 .loc 1 5209 13 is_stmt 0 view .LVU1197 + 3605 0074 406B ldr r0, [r0, #52] + 3606 .LVL306: +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3607 .loc 1 5209 13 view .LVU1198 + 3608 0076 FFF7FEFF bl HAL_DMA_Abort_IT + 3609 .LVL307: +5210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3610 .loc 1 5210 7 is_stmt 1 view .LVU1199 + ARM GAS /tmp/cc0aF2h1.s page 214 + + +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3611 .loc 1 5222 3 view .LVU1200 + 3612 007a D4E7 b .L195 + 3613 .LVL308: + 3614 .L193: +5214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3615 .loc 1 5214 7 view .LVU1201 +5214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3616 .loc 1 5214 13 is_stmt 0 view .LVU1202 + 3617 007c 806B ldr r0, [r0, #56] + 3618 .LVL309: +5214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 3619 .loc 1 5214 13 view .LVU1203 + 3620 007e FFF7FEFF bl HAL_DMA_Abort_IT + 3621 .LVL310: +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3622 .loc 1 5215 7 is_stmt 1 view .LVU1204 +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3623 .loc 1 5222 3 view .LVU1205 + 3624 0082 D0E7 b .L195 + 3625 .cfi_endproc + 3626 .LFE198: + 3628 .section .text.HAL_TIM_GenerateEvent,"ax",%progbits + 3629 .align 1 + 3630 .global HAL_TIM_GenerateEvent + 3631 .syntax unified + 3632 .thumb + 3633 .thumb_func + 3635 HAL_TIM_GenerateEvent: + 3636 .LVL311: + 3637 .LFB199: +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 3638 .loc 1 5257 1 view -0 + 3639 .cfi_startproc + 3640 @ args = 0, pretend = 0, frame = 0 + 3641 @ frame_needed = 0, uses_anonymous_args = 0 + 3642 @ link register save eliminated. +5259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_EVENT_SOURCE(EventSource)); + 3643 .loc 1 5259 3 view .LVU1207 +5260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3644 .loc 1 5260 3 view .LVU1208 +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3645 .loc 1 5263 3 view .LVU1209 +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3646 .loc 1 5263 3 view .LVU1210 + 3647 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 3648 0004 012B cmp r3, #1 + 3649 0006 0ED0 beq .L201 +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3650 .loc 1 5263 3 discriminator 2 view .LVU1211 + 3651 0008 0123 movs r3, #1 + 3652 000a 80F83C30 strb r3, [r0, #60] +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3653 .loc 1 5263 3 discriminator 2 view .LVU1212 +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3654 .loc 1 5266 3 view .LVU1213 +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 215 + + + 3655 .loc 1 5266 15 is_stmt 0 view .LVU1214 + 3656 000e 0222 movs r2, #2 + 3657 0010 80F83D20 strb r2, [r0, #61] +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3658 .loc 1 5269 3 is_stmt 1 view .LVU1215 +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3659 .loc 1 5269 7 is_stmt 0 view .LVU1216 + 3660 0014 0268 ldr r2, [r0] +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3661 .loc 1 5269 23 view .LVU1217 + 3662 0016 5161 str r1, [r2, #20] +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3663 .loc 1 5272 3 is_stmt 1 view .LVU1218 +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3664 .loc 1 5272 15 is_stmt 0 view .LVU1219 + 3665 0018 80F83D30 strb r3, [r0, #61] +5274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3666 .loc 1 5274 3 is_stmt 1 view .LVU1220 +5274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3667 .loc 1 5274 3 view .LVU1221 + 3668 001c 0023 movs r3, #0 + 3669 001e 80F83C30 strb r3, [r0, #60] +5274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3670 .loc 1 5274 3 view .LVU1222 +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3671 .loc 1 5277 3 view .LVU1223 +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3672 .loc 1 5277 10 is_stmt 0 view .LVU1224 + 3673 0022 1846 mov r0, r3 + 3674 .LVL312: +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3675 .loc 1 5277 10 view .LVU1225 + 3676 0024 7047 bx lr + 3677 .LVL313: + 3678 .L201: +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3679 .loc 1 5263 3 discriminator 1 view .LVU1226 + 3680 0026 0220 movs r0, #2 + 3681 .LVL314: +5278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3682 .loc 1 5278 1 view .LVU1227 + 3683 0028 7047 bx lr + 3684 .cfi_endproc + 3685 .LFE199: + 3687 .section .text.HAL_TIM_ConfigTI1Input,"ax",%progbits + 3688 .align 1 + 3689 .global HAL_TIM_ConfigTI1Input + 3690 .syntax unified + 3691 .thumb + 3692 .thumb_func + 3694 HAL_TIM_ConfigTI1Input: + 3695 .LVL315: + 3696 .LFB202: +5630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 3697 .loc 1 5630 1 is_stmt 1 view -0 + 3698 .cfi_startproc + 3699 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc0aF2h1.s page 216 + + + 3700 @ frame_needed = 0, uses_anonymous_args = 0 + 3701 @ link register save eliminated. +5631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3702 .loc 1 5631 3 view .LVU1229 +5634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); + 3703 .loc 1 5634 3 view .LVU1230 +5635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3704 .loc 1 5635 3 view .LVU1231 +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3705 .loc 1 5638 3 view .LVU1232 +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3706 .loc 1 5638 16 is_stmt 0 view .LVU1233 + 3707 0000 0268 ldr r2, [r0] +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3708 .loc 1 5638 10 view .LVU1234 + 3709 0002 5368 ldr r3, [r2, #4] + 3710 .LVL316: +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3711 .loc 1 5641 3 is_stmt 1 view .LVU1235 +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3712 .loc 1 5641 10 is_stmt 0 view .LVU1236 + 3713 0004 23F08003 bic r3, r3, #128 + 3714 .LVL317: +5644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3715 .loc 1 5644 3 is_stmt 1 view .LVU1237 +5644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3716 .loc 1 5644 10 is_stmt 0 view .LVU1238 + 3717 0008 0B43 orrs r3, r3, r1 + 3718 .LVL318: +5647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3719 .loc 1 5647 3 is_stmt 1 view .LVU1239 +5647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3720 .loc 1 5647 23 is_stmt 0 view .LVU1240 + 3721 000a 5360 str r3, [r2, #4] +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3722 .loc 1 5649 3 is_stmt 1 view .LVU1241 +5650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3723 .loc 1 5650 1 is_stmt 0 view .LVU1242 + 3724 000c 0020 movs r0, #0 + 3725 .LVL319: +5650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3726 .loc 1 5650 1 view .LVU1243 + 3727 000e 7047 bx lr + 3728 .cfi_endproc + 3729 .LFE202: + 3731 .section .text.HAL_TIM_ReadCapturedValue,"ax",%progbits + 3732 .align 1 + 3733 .global HAL_TIM_ReadCapturedValue + 3734 .syntax unified + 3735 .thumb + 3736 .thumb_func + 3738 HAL_TIM_ReadCapturedValue: + 3739 .LVL320: + 3740 .LFB205: +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpreg = 0U; + 3741 .loc 1 5745 1 is_stmt 1 view -0 + 3742 .cfi_startproc + ARM GAS /tmp/cc0aF2h1.s page 217 + + + 3743 @ args = 0, pretend = 0, frame = 0 + 3744 @ frame_needed = 0, uses_anonymous_args = 0 + 3745 @ link register save eliminated. +5746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3746 .loc 1 5746 3 view .LVU1245 +5748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3747 .loc 1 5748 3 view .LVU1246 + 3748 0000 0C29 cmp r1, #12 + 3749 0002 14D8 bhi .L210 + 3750 0004 DFE801F0 tbb [pc, r1] + 3751 .L206: + 3752 0008 07 .byte (.L209-.L206)/2 + 3753 0009 13 .byte (.L210-.L206)/2 + 3754 000a 13 .byte (.L210-.L206)/2 + 3755 000b 13 .byte (.L210-.L206)/2 + 3756 000c 0A .byte (.L208-.L206)/2 + 3757 000d 13 .byte (.L210-.L206)/2 + 3758 000e 13 .byte (.L210-.L206)/2 + 3759 000f 13 .byte (.L210-.L206)/2 + 3760 0010 0D .byte (.L207-.L206)/2 + 3761 0011 13 .byte (.L210-.L206)/2 + 3762 0012 13 .byte (.L210-.L206)/2 + 3763 0013 13 .byte (.L210-.L206)/2 + 3764 0014 10 .byte (.L205-.L206)/2 + 3765 0015 00 .p2align 1 + 3766 .L209: +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3767 .loc 1 5753 7 view .LVU1247 +5756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3768 .loc 1 5756 7 view .LVU1248 +5756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3769 .loc 1 5756 21 is_stmt 0 view .LVU1249 + 3770 0016 0368 ldr r3, [r0] +5756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3771 .loc 1 5756 14 view .LVU1250 + 3772 0018 586B ldr r0, [r3, #52] + 3773 .LVL321: +5758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3774 .loc 1 5758 7 is_stmt 1 view .LVU1251 + 3775 001a 7047 bx lr + 3776 .LVL322: + 3777 .L208: +5763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3778 .loc 1 5763 7 view .LVU1252 +5766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3779 .loc 1 5766 7 view .LVU1253 +5766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3780 .loc 1 5766 22 is_stmt 0 view .LVU1254 + 3781 001c 0368 ldr r3, [r0] +5766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3782 .loc 1 5766 14 view .LVU1255 + 3783 001e 986B ldr r0, [r3, #56] + 3784 .LVL323: +5768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3785 .loc 1 5768 7 is_stmt 1 view .LVU1256 + 3786 0020 7047 bx lr + 3787 .LVL324: + ARM GAS /tmp/cc0aF2h1.s page 218 + + + 3788 .L207: +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3789 .loc 1 5774 7 view .LVU1257 +5777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3790 .loc 1 5777 7 view .LVU1258 +5777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3791 .loc 1 5777 22 is_stmt 0 view .LVU1259 + 3792 0022 0368 ldr r3, [r0] +5777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3793 .loc 1 5777 14 view .LVU1260 + 3794 0024 D86B ldr r0, [r3, #60] + 3795 .LVL325: +5779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3796 .loc 1 5779 7 is_stmt 1 view .LVU1261 + 3797 0026 7047 bx lr + 3798 .LVL326: + 3799 .L205: +5785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3800 .loc 1 5785 7 view .LVU1262 +5788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3801 .loc 1 5788 7 view .LVU1263 +5788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3802 .loc 1 5788 22 is_stmt 0 view .LVU1264 + 3803 0028 0368 ldr r3, [r0] +5788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3804 .loc 1 5788 14 view .LVU1265 + 3805 002a 186C ldr r0, [r3, #64] + 3806 .LVL327: +5790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3807 .loc 1 5790 7 is_stmt 1 view .LVU1266 + 3808 002c 7047 bx lr + 3809 .LVL328: + 3810 .L210: +5748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3811 .loc 1 5748 3 is_stmt 0 view .LVU1267 + 3812 002e 0020 movs r0, #0 + 3813 .LVL329: +5797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3814 .loc 1 5797 3 is_stmt 1 view .LVU1268 +5798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3815 .loc 1 5798 1 is_stmt 0 view .LVU1269 + 3816 0030 7047 bx lr + 3817 .cfi_endproc + 3818 .LFE205: + 3820 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits + 3821 .align 1 + 3822 .weak HAL_TIM_PeriodElapsedCallback + 3823 .syntax unified + 3824 .thumb + 3825 .thumb_func + 3827 HAL_TIM_PeriodElapsedCallback: + 3828 .LVL330: + 3829 .LFB206: +5829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3830 .loc 1 5829 1 is_stmt 1 view -0 + 3831 .cfi_startproc + 3832 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc0aF2h1.s page 219 + + + 3833 @ frame_needed = 0, uses_anonymous_args = 0 + 3834 @ link register save eliminated. +5831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3835 .loc 1 5831 3 view .LVU1271 +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3836 .loc 1 5836 1 is_stmt 0 view .LVU1272 + 3837 0000 7047 bx lr + 3838 .cfi_endproc + 3839 .LFE206: + 3841 .section .text.TIM_DMAPeriodElapsedCplt,"ax",%progbits + 3842 .align 1 + 3843 .syntax unified + 3844 .thumb + 3845 .thumb_func + 3847 TIM_DMAPeriodElapsedCplt: + 3848 .LVL331: + 3849 .LFB230: +6893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3850 .loc 1 6893 1 is_stmt 1 view -0 + 3851 .cfi_startproc + 3852 @ args = 0, pretend = 0, frame = 0 + 3853 @ frame_needed = 0, uses_anonymous_args = 0 +6893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3854 .loc 1 6893 1 is_stmt 0 view .LVU1274 + 3855 0000 08B5 push {r3, lr} + 3856 .cfi_def_cfa_offset 8 + 3857 .cfi_offset 3, -8 + 3858 .cfi_offset 14, -4 +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3859 .loc 1 6894 3 is_stmt 1 view .LVU1275 +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3860 .loc 1 6894 22 is_stmt 0 view .LVU1276 + 3861 0002 406A ldr r0, [r0, #36] + 3862 .LVL332: +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3863 .loc 1 6896 3 is_stmt 1 view .LVU1277 +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3864 .loc 1 6896 17 is_stmt 0 view .LVU1278 + 3865 0004 036A ldr r3, [r0, #32] +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3866 .loc 1 6896 42 view .LVU1279 + 3867 0006 9B69 ldr r3, [r3, #24] +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 3868 .loc 1 6896 6 view .LVU1280 + 3869 0008 13B9 cbnz r3, .L213 +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3870 .loc 1 6898 5 is_stmt 1 view .LVU1281 +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 3871 .loc 1 6898 17 is_stmt 0 view .LVU1282 + 3872 000a 0123 movs r3, #1 + 3873 000c 80F83D30 strb r3, [r0, #61] + 3874 .L213: +6904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3875 .loc 1 6904 3 is_stmt 1 view .LVU1283 + 3876 0010 FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 3877 .LVL333: +6906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 220 + + + 3878 .loc 1 6906 1 is_stmt 0 view .LVU1284 + 3879 0014 08BD pop {r3, pc} + 3880 .cfi_endproc + 3881 .LFE230: + 3883 .section .text.HAL_TIM_PeriodElapsedHalfCpltCallback,"ax",%progbits + 3884 .align 1 + 3885 .weak HAL_TIM_PeriodElapsedHalfCpltCallback + 3886 .syntax unified + 3887 .thumb + 3888 .thumb_func + 3890 HAL_TIM_PeriodElapsedHalfCpltCallback: + 3891 .LVL334: + 3892 .LFB207: +5844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3893 .loc 1 5844 1 is_stmt 1 view -0 + 3894 .cfi_startproc + 3895 @ args = 0, pretend = 0, frame = 0 + 3896 @ frame_needed = 0, uses_anonymous_args = 0 + 3897 @ link register save eliminated. +5846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3898 .loc 1 5846 3 view .LVU1286 +5851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3899 .loc 1 5851 1 is_stmt 0 view .LVU1287 + 3900 0000 7047 bx lr + 3901 .cfi_endproc + 3902 .LFE207: + 3904 .section .text.TIM_DMAPeriodElapsedHalfCplt,"ax",%progbits + 3905 .align 1 + 3906 .syntax unified + 3907 .thumb + 3908 .thumb_func + 3910 TIM_DMAPeriodElapsedHalfCplt: + 3911 .LVL335: + 3912 .LFB231: +6914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3913 .loc 1 6914 1 is_stmt 1 view -0 + 3914 .cfi_startproc + 3915 @ args = 0, pretend = 0, frame = 0 + 3916 @ frame_needed = 0, uses_anonymous_args = 0 +6914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3917 .loc 1 6914 1 is_stmt 0 view .LVU1289 + 3918 0000 08B5 push {r3, lr} + 3919 .cfi_def_cfa_offset 8 + 3920 .cfi_offset 3, -8 + 3921 .cfi_offset 14, -4 +6915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3922 .loc 1 6915 3 is_stmt 1 view .LVU1290 + 3923 .LVL336: +6920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3924 .loc 1 6920 3 view .LVU1291 + 3925 0002 406A ldr r0, [r0, #36] + 3926 .LVL337: +6920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3927 .loc 1 6920 3 is_stmt 0 view .LVU1292 + 3928 0004 FFF7FEFF bl HAL_TIM_PeriodElapsedHalfCpltCallback + 3929 .LVL338: +6922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 221 + + + 3930 .loc 1 6922 1 view .LVU1293 + 3931 0008 08BD pop {r3, pc} + 3932 .cfi_endproc + 3933 .LFE231: + 3935 .section .text.HAL_TIM_OC_DelayElapsedCallback,"ax",%progbits + 3936 .align 1 + 3937 .weak HAL_TIM_OC_DelayElapsedCallback + 3938 .syntax unified + 3939 .thumb + 3940 .thumb_func + 3942 HAL_TIM_OC_DelayElapsedCallback: + 3943 .LVL339: + 3944 .LFB208: +5859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3945 .loc 1 5859 1 is_stmt 1 view -0 + 3946 .cfi_startproc + 3947 @ args = 0, pretend = 0, frame = 0 + 3948 @ frame_needed = 0, uses_anonymous_args = 0 + 3949 @ link register save eliminated. +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3950 .loc 1 5861 3 view .LVU1295 +5866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3951 .loc 1 5866 1 is_stmt 0 view .LVU1296 + 3952 0000 7047 bx lr + 3953 .cfi_endproc + 3954 .LFE208: + 3956 .section .text.HAL_TIM_IC_CaptureCallback,"ax",%progbits + 3957 .align 1 + 3958 .weak HAL_TIM_IC_CaptureCallback + 3959 .syntax unified + 3960 .thumb + 3961 .thumb_func + 3963 HAL_TIM_IC_CaptureCallback: + 3964 .LVL340: + 3965 .LFB209: +5874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3966 .loc 1 5874 1 is_stmt 1 view -0 + 3967 .cfi_startproc + 3968 @ args = 0, pretend = 0, frame = 0 + 3969 @ frame_needed = 0, uses_anonymous_args = 0 + 3970 @ link register save eliminated. +5876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3971 .loc 1 5876 3 view .LVU1298 +5881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3972 .loc 1 5881 1 is_stmt 0 view .LVU1299 + 3973 0000 7047 bx lr + 3974 .cfi_endproc + 3975 .LFE209: + 3977 .section .text.TIM_DMACaptureCplt,"ax",%progbits + 3978 .align 1 + 3979 .global TIM_DMACaptureCplt + 3980 .syntax unified + 3981 .thumb + 3982 .thumb_func + 3984 TIM_DMACaptureCplt: + 3985 .LVL341: + 3986 .LFB228: + ARM GAS /tmp/cc0aF2h1.s page 222 + + +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3987 .loc 1 6791 1 is_stmt 1 view -0 + 3988 .cfi_startproc + 3989 @ args = 0, pretend = 0, frame = 0 + 3990 @ frame_needed = 0, uses_anonymous_args = 0 +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3991 .loc 1 6791 1 is_stmt 0 view .LVU1301 + 3992 0000 10B5 push {r4, lr} + 3993 .cfi_def_cfa_offset 8 + 3994 .cfi_offset 4, -8 + 3995 .cfi_offset 14, -4 +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3996 .loc 1 6792 3 is_stmt 1 view .LVU1302 +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 3997 .loc 1 6792 22 is_stmt 0 view .LVU1303 + 3998 0002 446A ldr r4, [r0, #36] + 3999 .LVL342: +6794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4000 .loc 1 6794 3 is_stmt 1 view .LVU1304 +6794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4001 .loc 1 6794 25 is_stmt 0 view .LVU1305 + 4002 0004 636A ldr r3, [r4, #36] +6794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4003 .loc 1 6794 6 view .LVU1306 + 4004 0006 8342 cmp r3, r0 + 4005 0008 0ED0 beq .L226 +6804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4006 .loc 1 6804 8 is_stmt 1 view .LVU1307 +6804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4007 .loc 1 6804 30 is_stmt 0 view .LVU1308 + 4008 000a A36A ldr r3, [r4, #40] +6804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4009 .loc 1 6804 11 view .LVU1309 + 4010 000c 8342 cmp r3, r0 + 4011 000e 16D0 beq .L227 +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4012 .loc 1 6814 8 is_stmt 1 view .LVU1310 +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4013 .loc 1 6814 30 is_stmt 0 view .LVU1311 + 4014 0010 E36A ldr r3, [r4, #44] +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4015 .loc 1 6814 11 view .LVU1312 + 4016 0012 8342 cmp r3, r0 + 4017 0014 1ED0 beq .L228 +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4018 .loc 1 6824 8 is_stmt 1 view .LVU1313 +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4019 .loc 1 6824 30 is_stmt 0 view .LVU1314 + 4020 0016 236B ldr r3, [r4, #48] +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4021 .loc 1 6824 11 view .LVU1315 + 4022 0018 8342 cmp r3, r0 + 4023 001a 26D0 beq .L229 + 4024 .L222: +6837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4025 .loc 1 6837 3 is_stmt 1 view .LVU1316 +6842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + ARM GAS /tmp/cc0aF2h1.s page 223 + + + 4026 .loc 1 6842 3 view .LVU1317 + 4027 001c 2046 mov r0, r4 + 4028 .LVL343: +6842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4029 .loc 1 6842 3 is_stmt 0 view .LVU1318 + 4030 001e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4031 .LVL344: +6845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4032 .loc 1 6845 3 is_stmt 1 view .LVU1319 +6845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4033 .loc 1 6845 17 is_stmt 0 view .LVU1320 + 4034 0022 0023 movs r3, #0 + 4035 0024 2377 strb r3, [r4, #28] +6846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4036 .loc 1 6846 1 view .LVU1321 + 4037 0026 10BD pop {r4, pc} + 4038 .LVL345: + 4039 .L226: +6796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4040 .loc 1 6796 5 is_stmt 1 view .LVU1322 +6796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4041 .loc 1 6796 19 is_stmt 0 view .LVU1323 + 4042 0028 0123 movs r3, #1 + 4043 002a 2377 strb r3, [r4, #28] +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4044 .loc 1 6798 5 is_stmt 1 view .LVU1324 +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4045 .loc 1 6798 19 is_stmt 0 view .LVU1325 + 4046 002c 8369 ldr r3, [r0, #24] +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4047 .loc 1 6798 8 view .LVU1326 + 4048 002e 002B cmp r3, #0 + 4049 0030 F4D1 bne .L222 +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4050 .loc 1 6800 7 is_stmt 1 view .LVU1327 + 4051 0032 0123 movs r3, #1 + 4052 0034 84F83E30 strb r3, [r4, #62] +6801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4053 .loc 1 6801 7 view .LVU1328 + 4054 0038 84F84430 strb r3, [r4, #68] + 4055 003c EEE7 b .L222 + 4056 .L227: +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4057 .loc 1 6806 5 view .LVU1329 +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4058 .loc 1 6806 19 is_stmt 0 view .LVU1330 + 4059 003e 0223 movs r3, #2 + 4060 0040 2377 strb r3, [r4, #28] +6808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4061 .loc 1 6808 5 is_stmt 1 view .LVU1331 +6808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4062 .loc 1 6808 19 is_stmt 0 view .LVU1332 + 4063 0042 8369 ldr r3, [r0, #24] +6808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4064 .loc 1 6808 8 view .LVU1333 + 4065 0044 002B cmp r3, #0 + 4066 0046 E9D1 bne .L222 + ARM GAS /tmp/cc0aF2h1.s page 224 + + +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4067 .loc 1 6810 7 is_stmt 1 view .LVU1334 + 4068 0048 0123 movs r3, #1 + 4069 004a 84F83F30 strb r3, [r4, #63] +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4070 .loc 1 6811 7 view .LVU1335 + 4071 004e 84F84530 strb r3, [r4, #69] + 4072 0052 E3E7 b .L222 + 4073 .L228: +6816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4074 .loc 1 6816 5 view .LVU1336 +6816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4075 .loc 1 6816 19 is_stmt 0 view .LVU1337 + 4076 0054 0423 movs r3, #4 + 4077 0056 2377 strb r3, [r4, #28] +6818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4078 .loc 1 6818 5 is_stmt 1 view .LVU1338 +6818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4079 .loc 1 6818 19 is_stmt 0 view .LVU1339 + 4080 0058 8369 ldr r3, [r0, #24] +6818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4081 .loc 1 6818 8 view .LVU1340 + 4082 005a 002B cmp r3, #0 + 4083 005c DED1 bne .L222 +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 4084 .loc 1 6820 7 is_stmt 1 view .LVU1341 + 4085 005e 0123 movs r3, #1 + 4086 0060 84F84030 strb r3, [r4, #64] +6821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4087 .loc 1 6821 7 view .LVU1342 + 4088 0064 84F84630 strb r3, [r4, #70] + 4089 0068 D8E7 b .L222 + 4090 .L229: +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4091 .loc 1 6826 5 view .LVU1343 +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4092 .loc 1 6826 19 is_stmt 0 view .LVU1344 + 4093 006a 0823 movs r3, #8 + 4094 006c 2377 strb r3, [r4, #28] +6828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4095 .loc 1 6828 5 is_stmt 1 view .LVU1345 +6828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4096 .loc 1 6828 19 is_stmt 0 view .LVU1346 + 4097 006e 8369 ldr r3, [r0, #24] +6828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4098 .loc 1 6828 8 view .LVU1347 + 4099 0070 002B cmp r3, #0 + 4100 0072 D3D1 bne .L222 +6830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 4101 .loc 1 6830 7 is_stmt 1 view .LVU1348 + 4102 0074 0123 movs r3, #1 + 4103 0076 84F84130 strb r3, [r4, #65] +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4104 .loc 1 6831 7 view .LVU1349 + 4105 007a 84F84730 strb r3, [r4, #71] + 4106 007e CDE7 b .L222 + 4107 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 225 + + + 4108 .LFE228: + 4110 .section .text.HAL_TIM_IC_CaptureHalfCpltCallback,"ax",%progbits + 4111 .align 1 + 4112 .weak HAL_TIM_IC_CaptureHalfCpltCallback + 4113 .syntax unified + 4114 .thumb + 4115 .thumb_func + 4117 HAL_TIM_IC_CaptureHalfCpltCallback: + 4118 .LVL346: + 4119 .LFB210: +5889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4120 .loc 1 5889 1 view -0 + 4121 .cfi_startproc + 4122 @ args = 0, pretend = 0, frame = 0 + 4123 @ frame_needed = 0, uses_anonymous_args = 0 + 4124 @ link register save eliminated. +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4125 .loc 1 5891 3 view .LVU1351 +5896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4126 .loc 1 5896 1 is_stmt 0 view .LVU1352 + 4127 0000 7047 bx lr + 4128 .cfi_endproc + 4129 .LFE210: + 4131 .section .text.TIM_DMACaptureHalfCplt,"ax",%progbits + 4132 .align 1 + 4133 .global TIM_DMACaptureHalfCplt + 4134 .syntax unified + 4135 .thumb + 4136 .thumb_func + 4138 TIM_DMACaptureHalfCplt: + 4139 .LVL347: + 4140 .LFB229: +6854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4141 .loc 1 6854 1 is_stmt 1 view -0 + 4142 .cfi_startproc + 4143 @ args = 0, pretend = 0, frame = 0 + 4144 @ frame_needed = 0, uses_anonymous_args = 0 +6854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4145 .loc 1 6854 1 is_stmt 0 view .LVU1354 + 4146 0000 10B5 push {r4, lr} + 4147 .cfi_def_cfa_offset 8 + 4148 .cfi_offset 4, -8 + 4149 .cfi_offset 14, -4 +6855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4150 .loc 1 6855 3 is_stmt 1 view .LVU1355 +6855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4151 .loc 1 6855 22 is_stmt 0 view .LVU1356 + 4152 0002 446A ldr r4, [r0, #36] + 4153 .LVL348: +6857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4154 .loc 1 6857 3 is_stmt 1 view .LVU1357 +6857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4155 .loc 1 6857 25 is_stmt 0 view .LVU1358 + 4156 0004 636A ldr r3, [r4, #36] +6857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4157 .loc 1 6857 6 view .LVU1359 + 4158 0006 8342 cmp r3, r0 + ARM GAS /tmp/cc0aF2h1.s page 226 + + + 4159 0008 0BD0 beq .L237 +6861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4160 .loc 1 6861 8 is_stmt 1 view .LVU1360 +6861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4161 .loc 1 6861 30 is_stmt 0 view .LVU1361 + 4162 000a A36A ldr r3, [r4, #40] +6861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4163 .loc 1 6861 11 view .LVU1362 + 4164 000c 8342 cmp r3, r0 + 4165 000e 10D0 beq .L238 +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4166 .loc 1 6865 8 is_stmt 1 view .LVU1363 +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4167 .loc 1 6865 30 is_stmt 0 view .LVU1364 + 4168 0010 E36A ldr r3, [r4, #44] +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4169 .loc 1 6865 11 view .LVU1365 + 4170 0012 8342 cmp r3, r0 + 4171 0014 10D0 beq .L239 +6869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4172 .loc 1 6869 8 is_stmt 1 view .LVU1366 +6869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4173 .loc 1 6869 30 is_stmt 0 view .LVU1367 + 4174 0016 236B ldr r3, [r4, #48] +6869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4175 .loc 1 6869 11 view .LVU1368 + 4176 0018 8342 cmp r3, r0 + 4177 001a 04D1 bne .L233 +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4178 .loc 1 6871 5 is_stmt 1 view .LVU1369 +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4179 .loc 1 6871 19 is_stmt 0 view .LVU1370 + 4180 001c 0823 movs r3, #8 + 4181 001e 2377 strb r3, [r4, #28] + 4182 0020 01E0 b .L233 + 4183 .L237: +6859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4184 .loc 1 6859 5 is_stmt 1 view .LVU1371 +6859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4185 .loc 1 6859 19 is_stmt 0 view .LVU1372 + 4186 0022 0123 movs r3, #1 + 4187 0024 2377 strb r3, [r4, #28] + 4188 .L233: +6876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4189 .loc 1 6876 3 is_stmt 1 view .LVU1373 +6881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4190 .loc 1 6881 3 view .LVU1374 + 4191 0026 2046 mov r0, r4 + 4192 .LVL349: +6881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4193 .loc 1 6881 3 is_stmt 0 view .LVU1375 + 4194 0028 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 4195 .LVL350: +6884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4196 .loc 1 6884 3 is_stmt 1 view .LVU1376 +6884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4197 .loc 1 6884 17 is_stmt 0 view .LVU1377 + ARM GAS /tmp/cc0aF2h1.s page 227 + + + 4198 002c 0023 movs r3, #0 + 4199 002e 2377 strb r3, [r4, #28] +6885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4200 .loc 1 6885 1 view .LVU1378 + 4201 0030 10BD pop {r4, pc} + 4202 .LVL351: + 4203 .L238: +6863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4204 .loc 1 6863 5 is_stmt 1 view .LVU1379 +6863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4205 .loc 1 6863 19 is_stmt 0 view .LVU1380 + 4206 0032 0223 movs r3, #2 + 4207 0034 2377 strb r3, [r4, #28] + 4208 0036 F6E7 b .L233 + 4209 .L239: +6867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4210 .loc 1 6867 5 is_stmt 1 view .LVU1381 +6867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4211 .loc 1 6867 19 is_stmt 0 view .LVU1382 + 4212 0038 0423 movs r3, #4 + 4213 003a 2377 strb r3, [r4, #28] + 4214 003c F3E7 b .L233 + 4215 .cfi_endproc + 4216 .LFE229: + 4218 .section .text.HAL_TIM_PWM_PulseFinishedCallback,"ax",%progbits + 4219 .align 1 + 4220 .weak HAL_TIM_PWM_PulseFinishedCallback + 4221 .syntax unified + 4222 .thumb + 4223 .thumb_func + 4225 HAL_TIM_PWM_PulseFinishedCallback: + 4226 .LVL352: + 4227 .LFB211: +5904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4228 .loc 1 5904 1 is_stmt 1 view -0 + 4229 .cfi_startproc + 4230 @ args = 0, pretend = 0, frame = 0 + 4231 @ frame_needed = 0, uses_anonymous_args = 0 + 4232 @ link register save eliminated. +5906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4233 .loc 1 5906 3 view .LVU1384 +5911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4234 .loc 1 5911 1 is_stmt 0 view .LVU1385 + 4235 0000 7047 bx lr + 4236 .cfi_endproc + 4237 .LFE211: + 4239 .section .text.TIM_DMADelayPulseCplt,"ax",%progbits + 4240 .align 1 + 4241 .syntax unified + 4242 .thumb + 4243 .thumb_func + 4245 TIM_DMADelayPulseCplt: + 4246 .LVL353: + 4247 .LFB226: +6693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4248 .loc 1 6693 1 is_stmt 1 view -0 + 4249 .cfi_startproc + ARM GAS /tmp/cc0aF2h1.s page 228 + + + 4250 @ args = 0, pretend = 0, frame = 0 + 4251 @ frame_needed = 0, uses_anonymous_args = 0 +6693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4252 .loc 1 6693 1 is_stmt 0 view .LVU1387 + 4253 0000 10B5 push {r4, lr} + 4254 .cfi_def_cfa_offset 8 + 4255 .cfi_offset 4, -8 + 4256 .cfi_offset 14, -4 +6694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4257 .loc 1 6694 3 is_stmt 1 view .LVU1388 +6694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4258 .loc 1 6694 22 is_stmt 0 view .LVU1389 + 4259 0002 446A ldr r4, [r0, #36] + 4260 .LVL354: +6696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4261 .loc 1 6696 3 is_stmt 1 view .LVU1390 +6696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4262 .loc 1 6696 25 is_stmt 0 view .LVU1391 + 4263 0004 636A ldr r3, [r4, #36] +6696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4264 .loc 1 6696 6 view .LVU1392 + 4265 0006 8342 cmp r3, r0 + 4266 0008 0ED0 beq .L247 +6705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4267 .loc 1 6705 8 is_stmt 1 view .LVU1393 +6705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4268 .loc 1 6705 30 is_stmt 0 view .LVU1394 + 4269 000a A36A ldr r3, [r4, #40] +6705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4270 .loc 1 6705 11 view .LVU1395 + 4271 000c 8342 cmp r3, r0 + 4272 000e 14D0 beq .L248 +6714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4273 .loc 1 6714 8 is_stmt 1 view .LVU1396 +6714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4274 .loc 1 6714 30 is_stmt 0 view .LVU1397 + 4275 0010 E36A ldr r3, [r4, #44] +6714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4276 .loc 1 6714 11 view .LVU1398 + 4277 0012 8342 cmp r3, r0 + 4278 0014 1AD0 beq .L249 +6723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4279 .loc 1 6723 8 is_stmt 1 view .LVU1399 +6723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4280 .loc 1 6723 30 is_stmt 0 view .LVU1400 + 4281 0016 236B ldr r3, [r4, #48] +6723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4282 .loc 1 6723 11 view .LVU1401 + 4283 0018 8342 cmp r3, r0 + 4284 001a 20D0 beq .L250 + 4285 .L243: +6735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4286 .loc 1 6735 3 is_stmt 1 view .LVU1402 +6740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4287 .loc 1 6740 3 view .LVU1403 + 4288 001c 2046 mov r0, r4 + 4289 .LVL355: + ARM GAS /tmp/cc0aF2h1.s page 229 + + +6740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4290 .loc 1 6740 3 is_stmt 0 view .LVU1404 + 4291 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4292 .LVL356: +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4293 .loc 1 6743 3 is_stmt 1 view .LVU1405 +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4294 .loc 1 6743 17 is_stmt 0 view .LVU1406 + 4295 0022 0023 movs r3, #0 + 4296 0024 2377 strb r3, [r4, #28] +6744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4297 .loc 1 6744 1 view .LVU1407 + 4298 0026 10BD pop {r4, pc} + 4299 .LVL357: + 4300 .L247: +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4301 .loc 1 6698 5 is_stmt 1 view .LVU1408 +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4302 .loc 1 6698 19 is_stmt 0 view .LVU1409 + 4303 0028 0123 movs r3, #1 + 4304 002a 2377 strb r3, [r4, #28] +6700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4305 .loc 1 6700 5 is_stmt 1 view .LVU1410 +6700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4306 .loc 1 6700 19 is_stmt 0 view .LVU1411 + 4307 002c 8369 ldr r3, [r0, #24] +6700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4308 .loc 1 6700 8 view .LVU1412 + 4309 002e 002B cmp r3, #0 + 4310 0030 F4D1 bne .L243 +6702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4311 .loc 1 6702 7 is_stmt 1 view .LVU1413 + 4312 0032 0123 movs r3, #1 + 4313 0034 84F83E30 strb r3, [r4, #62] + 4314 0038 F0E7 b .L243 + 4315 .L248: +6707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4316 .loc 1 6707 5 view .LVU1414 +6707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4317 .loc 1 6707 19 is_stmt 0 view .LVU1415 + 4318 003a 0223 movs r3, #2 + 4319 003c 2377 strb r3, [r4, #28] +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4320 .loc 1 6709 5 is_stmt 1 view .LVU1416 +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4321 .loc 1 6709 19 is_stmt 0 view .LVU1417 + 4322 003e 8369 ldr r3, [r0, #24] +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4323 .loc 1 6709 8 view .LVU1418 + 4324 0040 002B cmp r3, #0 + 4325 0042 EBD1 bne .L243 +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4326 .loc 1 6711 7 is_stmt 1 view .LVU1419 + 4327 0044 0123 movs r3, #1 + 4328 0046 84F83F30 strb r3, [r4, #63] + 4329 004a E7E7 b .L243 + 4330 .L249: + ARM GAS /tmp/cc0aF2h1.s page 230 + + +6716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4331 .loc 1 6716 5 view .LVU1420 +6716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4332 .loc 1 6716 19 is_stmt 0 view .LVU1421 + 4333 004c 0423 movs r3, #4 + 4334 004e 2377 strb r3, [r4, #28] +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4335 .loc 1 6718 5 is_stmt 1 view .LVU1422 +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4336 .loc 1 6718 19 is_stmt 0 view .LVU1423 + 4337 0050 8369 ldr r3, [r0, #24] +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4338 .loc 1 6718 8 view .LVU1424 + 4339 0052 002B cmp r3, #0 + 4340 0054 E2D1 bne .L243 +6720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4341 .loc 1 6720 7 is_stmt 1 view .LVU1425 + 4342 0056 0123 movs r3, #1 + 4343 0058 84F84030 strb r3, [r4, #64] + 4344 005c DEE7 b .L243 + 4345 .L250: +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4346 .loc 1 6725 5 view .LVU1426 +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4347 .loc 1 6725 19 is_stmt 0 view .LVU1427 + 4348 005e 0823 movs r3, #8 + 4349 0060 2377 strb r3, [r4, #28] +6727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4350 .loc 1 6727 5 is_stmt 1 view .LVU1428 +6727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4351 .loc 1 6727 19 is_stmt 0 view .LVU1429 + 4352 0062 8369 ldr r3, [r0, #24] +6727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4353 .loc 1 6727 8 view .LVU1430 + 4354 0064 002B cmp r3, #0 + 4355 0066 D9D1 bne .L243 +6729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4356 .loc 1 6729 7 is_stmt 1 view .LVU1431 + 4357 0068 0123 movs r3, #1 + 4358 006a 84F84130 strb r3, [r4, #65] + 4359 006e D5E7 b .L243 + 4360 .cfi_endproc + 4361 .LFE226: + 4363 .section .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback,"ax",%progbits + 4364 .align 1 + 4365 .weak HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 4366 .syntax unified + 4367 .thumb + 4368 .thumb_func + 4370 HAL_TIM_PWM_PulseFinishedHalfCpltCallback: + 4371 .LVL358: + 4372 .LFB212: +5919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4373 .loc 1 5919 1 view -0 + 4374 .cfi_startproc + 4375 @ args = 0, pretend = 0, frame = 0 + 4376 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cc0aF2h1.s page 231 + + + 4377 @ link register save eliminated. +5921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4378 .loc 1 5921 3 view .LVU1433 +5926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4379 .loc 1 5926 1 is_stmt 0 view .LVU1434 + 4380 0000 7047 bx lr + 4381 .cfi_endproc + 4382 .LFE212: + 4384 .section .text.TIM_DMADelayPulseHalfCplt,"ax",%progbits + 4385 .align 1 + 4386 .global TIM_DMADelayPulseHalfCplt + 4387 .syntax unified + 4388 .thumb + 4389 .thumb_func + 4391 TIM_DMADelayPulseHalfCplt: + 4392 .LVL359: + 4393 .LFB227: +6752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4394 .loc 1 6752 1 is_stmt 1 view -0 + 4395 .cfi_startproc + 4396 @ args = 0, pretend = 0, frame = 0 + 4397 @ frame_needed = 0, uses_anonymous_args = 0 +6752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4398 .loc 1 6752 1 is_stmt 0 view .LVU1436 + 4399 0000 10B5 push {r4, lr} + 4400 .cfi_def_cfa_offset 8 + 4401 .cfi_offset 4, -8 + 4402 .cfi_offset 14, -4 +6753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4403 .loc 1 6753 3 is_stmt 1 view .LVU1437 +6753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4404 .loc 1 6753 22 is_stmt 0 view .LVU1438 + 4405 0002 446A ldr r4, [r0, #36] + 4406 .LVL360: +6755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4407 .loc 1 6755 3 is_stmt 1 view .LVU1439 +6755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4408 .loc 1 6755 25 is_stmt 0 view .LVU1440 + 4409 0004 636A ldr r3, [r4, #36] +6755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4410 .loc 1 6755 6 view .LVU1441 + 4411 0006 8342 cmp r3, r0 + 4412 0008 0BD0 beq .L258 +6759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4413 .loc 1 6759 8 is_stmt 1 view .LVU1442 +6759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4414 .loc 1 6759 30 is_stmt 0 view .LVU1443 + 4415 000a A36A ldr r3, [r4, #40] +6759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4416 .loc 1 6759 11 view .LVU1444 + 4417 000c 8342 cmp r3, r0 + 4418 000e 10D0 beq .L259 +6763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4419 .loc 1 6763 8 is_stmt 1 view .LVU1445 +6763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4420 .loc 1 6763 30 is_stmt 0 view .LVU1446 + 4421 0010 E36A ldr r3, [r4, #44] + ARM GAS /tmp/cc0aF2h1.s page 232 + + +6763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4422 .loc 1 6763 11 view .LVU1447 + 4423 0012 8342 cmp r3, r0 + 4424 0014 10D0 beq .L260 +6767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4425 .loc 1 6767 8 is_stmt 1 view .LVU1448 +6767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4426 .loc 1 6767 30 is_stmt 0 view .LVU1449 + 4427 0016 236B ldr r3, [r4, #48] +6767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4428 .loc 1 6767 11 view .LVU1450 + 4429 0018 8342 cmp r3, r0 + 4430 001a 04D1 bne .L254 +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4431 .loc 1 6769 5 is_stmt 1 view .LVU1451 +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4432 .loc 1 6769 19 is_stmt 0 view .LVU1452 + 4433 001c 0823 movs r3, #8 + 4434 001e 2377 strb r3, [r4, #28] + 4435 0020 01E0 b .L254 + 4436 .L258: +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4437 .loc 1 6757 5 is_stmt 1 view .LVU1453 +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4438 .loc 1 6757 19 is_stmt 0 view .LVU1454 + 4439 0022 0123 movs r3, #1 + 4440 0024 2377 strb r3, [r4, #28] + 4441 .L254: +6774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4442 .loc 1 6774 3 is_stmt 1 view .LVU1455 +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4443 .loc 1 6779 3 view .LVU1456 + 4444 0026 2046 mov r0, r4 + 4445 .LVL361: +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4446 .loc 1 6779 3 is_stmt 0 view .LVU1457 + 4447 0028 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 4448 .LVL362: +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4449 .loc 1 6782 3 is_stmt 1 view .LVU1458 +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4450 .loc 1 6782 17 is_stmt 0 view .LVU1459 + 4451 002c 0023 movs r3, #0 + 4452 002e 2377 strb r3, [r4, #28] +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4453 .loc 1 6783 1 view .LVU1460 + 4454 0030 10BD pop {r4, pc} + 4455 .LVL363: + 4456 .L259: +6761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4457 .loc 1 6761 5 is_stmt 1 view .LVU1461 +6761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4458 .loc 1 6761 19 is_stmt 0 view .LVU1462 + 4459 0032 0223 movs r3, #2 + 4460 0034 2377 strb r3, [r4, #28] + 4461 0036 F6E7 b .L254 + 4462 .L260: + ARM GAS /tmp/cc0aF2h1.s page 233 + + +6765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4463 .loc 1 6765 5 is_stmt 1 view .LVU1463 +6765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4464 .loc 1 6765 19 is_stmt 0 view .LVU1464 + 4465 0038 0423 movs r3, #4 + 4466 003a 2377 strb r3, [r4, #28] + 4467 003c F3E7 b .L254 + 4468 .cfi_endproc + 4469 .LFE227: + 4471 .section .text.HAL_TIM_TriggerCallback,"ax",%progbits + 4472 .align 1 + 4473 .weak HAL_TIM_TriggerCallback + 4474 .syntax unified + 4475 .thumb + 4476 .thumb_func + 4478 HAL_TIM_TriggerCallback: + 4479 .LVL364: + 4480 .LFB213: +5934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4481 .loc 1 5934 1 is_stmt 1 view -0 + 4482 .cfi_startproc + 4483 @ args = 0, pretend = 0, frame = 0 + 4484 @ frame_needed = 0, uses_anonymous_args = 0 + 4485 @ link register save eliminated. +5936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4486 .loc 1 5936 3 view .LVU1466 +5941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4487 .loc 1 5941 1 is_stmt 0 view .LVU1467 + 4488 0000 7047 bx lr + 4489 .cfi_endproc + 4490 .LFE213: + 4492 .section .text.HAL_TIM_IRQHandler,"ax",%progbits + 4493 .align 1 + 4494 .global HAL_TIM_IRQHandler + 4495 .syntax unified + 4496 .thumb + 4497 .thumb_func + 4499 HAL_TIM_IRQHandler: + 4500 .LVL365: + 4501 .LFB188: +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Capture compare 1 event */ + 4502 .loc 1 3843 1 is_stmt 1 view -0 + 4503 .cfi_startproc + 4504 @ args = 0, pretend = 0, frame = 0 + 4505 @ frame_needed = 0, uses_anonymous_args = 0 +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Capture compare 1 event */ + 4506 .loc 1 3843 1 is_stmt 0 view .LVU1469 + 4507 0000 10B5 push {r4, lr} + 4508 .cfi_def_cfa_offset 8 + 4509 .cfi_offset 4, -8 + 4510 .cfi_offset 14, -4 + 4511 0002 0446 mov r4, r0 +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4512 .loc 1 3845 3 is_stmt 1 view .LVU1470 +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4513 .loc 1 3845 7 is_stmt 0 view .LVU1471 + 4514 0004 0368 ldr r3, [r0] + ARM GAS /tmp/cc0aF2h1.s page 234 + + + 4515 0006 1A69 ldr r2, [r3, #16] +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4516 .loc 1 3845 6 view .LVU1472 + 4517 0008 12F0020F tst r2, #2 + 4518 000c 11D0 beq .L263 +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4519 .loc 1 3847 5 is_stmt 1 view .LVU1473 +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4520 .loc 1 3847 9 is_stmt 0 view .LVU1474 + 4521 000e DA68 ldr r2, [r3, #12] +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4522 .loc 1 3847 8 view .LVU1475 + 4523 0010 12F0020F tst r2, #2 + 4524 0014 0DD0 beq .L263 +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; + 4525 .loc 1 3850 9 is_stmt 1 view .LVU1476 + 4526 0016 6FF00202 mvn r2, #2 + 4527 001a 1A61 str r2, [r3, #16] +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4528 .loc 1 3851 9 view .LVU1477 +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4529 .loc 1 3851 23 is_stmt 0 view .LVU1478 + 4530 001c 0123 movs r3, #1 + 4531 001e 0377 strb r3, [r0, #28] +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4532 .loc 1 3854 9 is_stmt 1 view .LVU1479 +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4533 .loc 1 3854 18 is_stmt 0 view .LVU1480 + 4534 0020 0368 ldr r3, [r0] +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4535 .loc 1 3854 28 view .LVU1481 + 4536 0022 9B69 ldr r3, [r3, #24] +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4537 .loc 1 3854 12 view .LVU1482 + 4538 0024 13F0030F tst r3, #3 + 4539 0028 79D0 beq .L264 +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4540 .loc 1 3859 11 is_stmt 1 view .LVU1483 + 4541 002a FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4542 .LVL366: + 4543 .L265: +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4544 .loc 1 3873 9 view .LVU1484 +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4545 .loc 1 3873 23 is_stmt 0 view .LVU1485 + 4546 002e 0023 movs r3, #0 + 4547 0030 2377 strb r3, [r4, #28] + 4548 .L263: +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4549 .loc 1 3878 3 is_stmt 1 view .LVU1486 +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4550 .loc 1 3878 7 is_stmt 0 view .LVU1487 + 4551 0032 2368 ldr r3, [r4] + 4552 0034 1A69 ldr r2, [r3, #16] +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4553 .loc 1 3878 6 view .LVU1488 + 4554 0036 12F0040F tst r2, #4 + ARM GAS /tmp/cc0aF2h1.s page 235 + + + 4555 003a 12D0 beq .L266 +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4556 .loc 1 3880 5 is_stmt 1 view .LVU1489 +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4557 .loc 1 3880 9 is_stmt 0 view .LVU1490 + 4558 003c DA68 ldr r2, [r3, #12] +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4559 .loc 1 3880 8 view .LVU1491 + 4560 003e 12F0040F tst r2, #4 + 4561 0042 0ED0 beq .L266 +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; + 4562 .loc 1 3882 7 is_stmt 1 view .LVU1492 + 4563 0044 6FF00402 mvn r2, #4 + 4564 0048 1A61 str r2, [r3, #16] +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ + 4565 .loc 1 3883 7 view .LVU1493 +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ + 4566 .loc 1 3883 21 is_stmt 0 view .LVU1494 + 4567 004a 0223 movs r3, #2 + 4568 004c 2377 strb r3, [r4, #28] +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4569 .loc 1 3885 7 is_stmt 1 view .LVU1495 +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4570 .loc 1 3885 16 is_stmt 0 view .LVU1496 + 4571 004e 2368 ldr r3, [r4] +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4572 .loc 1 3885 26 view .LVU1497 + 4573 0050 9B69 ldr r3, [r3, #24] +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4574 .loc 1 3885 10 view .LVU1498 + 4575 0052 13F4407F tst r3, #768 + 4576 0056 68D0 beq .L267 +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4577 .loc 1 3890 9 is_stmt 1 view .LVU1499 + 4578 0058 2046 mov r0, r4 + 4579 005a FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4580 .LVL367: + 4581 .L268: +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4582 .loc 1 3904 7 view .LVU1500 +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4583 .loc 1 3904 21 is_stmt 0 view .LVU1501 + 4584 005e 0023 movs r3, #0 + 4585 0060 2377 strb r3, [r4, #28] + 4586 .L266: +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4587 .loc 1 3908 3 is_stmt 1 view .LVU1502 +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4588 .loc 1 3908 7 is_stmt 0 view .LVU1503 + 4589 0062 2368 ldr r3, [r4] + 4590 0064 1A69 ldr r2, [r3, #16] +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4591 .loc 1 3908 6 view .LVU1504 + 4592 0066 12F0080F tst r2, #8 + 4593 006a 12D0 beq .L269 +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4594 .loc 1 3910 5 is_stmt 1 view .LVU1505 + ARM GAS /tmp/cc0aF2h1.s page 236 + + +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4595 .loc 1 3910 9 is_stmt 0 view .LVU1506 + 4596 006c DA68 ldr r2, [r3, #12] +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4597 .loc 1 3910 8 view .LVU1507 + 4598 006e 12F0080F tst r2, #8 + 4599 0072 0ED0 beq .L269 +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; + 4600 .loc 1 3912 7 is_stmt 1 view .LVU1508 + 4601 0074 6FF00802 mvn r2, #8 + 4602 0078 1A61 str r2, [r3, #16] +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ + 4603 .loc 1 3913 7 view .LVU1509 +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ + 4604 .loc 1 3913 21 is_stmt 0 view .LVU1510 + 4605 007a 0423 movs r3, #4 + 4606 007c 2377 strb r3, [r4, #28] +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4607 .loc 1 3915 7 is_stmt 1 view .LVU1511 +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4608 .loc 1 3915 16 is_stmt 0 view .LVU1512 + 4609 007e 2368 ldr r3, [r4] +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4610 .loc 1 3915 26 view .LVU1513 + 4611 0080 DB69 ldr r3, [r3, #28] +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4612 .loc 1 3915 10 view .LVU1514 + 4613 0082 13F0030F tst r3, #3 + 4614 0086 57D0 beq .L270 +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4615 .loc 1 3920 9 is_stmt 1 view .LVU1515 + 4616 0088 2046 mov r0, r4 + 4617 008a FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4618 .LVL368: + 4619 .L271: +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4620 .loc 1 3934 7 view .LVU1516 +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4621 .loc 1 3934 21 is_stmt 0 view .LVU1517 + 4622 008e 0023 movs r3, #0 + 4623 0090 2377 strb r3, [r4, #28] + 4624 .L269: +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4625 .loc 1 3938 3 is_stmt 1 view .LVU1518 +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4626 .loc 1 3938 7 is_stmt 0 view .LVU1519 + 4627 0092 2368 ldr r3, [r4] + 4628 0094 1A69 ldr r2, [r3, #16] +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4629 .loc 1 3938 6 view .LVU1520 + 4630 0096 12F0100F tst r2, #16 + 4631 009a 12D0 beq .L272 +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4632 .loc 1 3940 5 is_stmt 1 view .LVU1521 +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4633 .loc 1 3940 9 is_stmt 0 view .LVU1522 + 4634 009c DA68 ldr r2, [r3, #12] + ARM GAS /tmp/cc0aF2h1.s page 237 + + +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4635 .loc 1 3940 8 view .LVU1523 + 4636 009e 12F0100F tst r2, #16 + 4637 00a2 0ED0 beq .L272 +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; + 4638 .loc 1 3942 7 is_stmt 1 view .LVU1524 + 4639 00a4 6FF01002 mvn r2, #16 + 4640 00a8 1A61 str r2, [r3, #16] +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ + 4641 .loc 1 3943 7 view .LVU1525 +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Input capture event */ + 4642 .loc 1 3943 21 is_stmt 0 view .LVU1526 + 4643 00aa 0823 movs r3, #8 + 4644 00ac 2377 strb r3, [r4, #28] +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4645 .loc 1 3945 7 is_stmt 1 view .LVU1527 +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4646 .loc 1 3945 16 is_stmt 0 view .LVU1528 + 4647 00ae 2368 ldr r3, [r4] +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4648 .loc 1 3945 26 view .LVU1529 + 4649 00b0 DB69 ldr r3, [r3, #28] +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4650 .loc 1 3945 10 view .LVU1530 + 4651 00b2 13F4407F tst r3, #768 + 4652 00b6 46D0 beq .L273 +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4653 .loc 1 3950 9 is_stmt 1 view .LVU1531 + 4654 00b8 2046 mov r0, r4 + 4655 00ba FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4656 .LVL369: + 4657 .L274: +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4658 .loc 1 3964 7 view .LVU1532 +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4659 .loc 1 3964 21 is_stmt 0 view .LVU1533 + 4660 00be 0023 movs r3, #0 + 4661 00c0 2377 strb r3, [r4, #28] + 4662 .L272: +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4663 .loc 1 3968 3 is_stmt 1 view .LVU1534 +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4664 .loc 1 3968 7 is_stmt 0 view .LVU1535 + 4665 00c2 2368 ldr r3, [r4] + 4666 00c4 1A69 ldr r2, [r3, #16] +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4667 .loc 1 3968 6 view .LVU1536 + 4668 00c6 12F0010F tst r2, #1 + 4669 00ca 03D0 beq .L275 +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4670 .loc 1 3970 5 is_stmt 1 view .LVU1537 +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4671 .loc 1 3970 9 is_stmt 0 view .LVU1538 + 4672 00cc DA68 ldr r2, [r3, #12] +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4673 .loc 1 3970 8 view .LVU1539 + 4674 00ce 12F0010F tst r2, #1 + ARM GAS /tmp/cc0aF2h1.s page 238 + + + 4675 00d2 3FD1 bne .L281 + 4676 .L275: +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4677 .loc 1 3981 3 is_stmt 1 view .LVU1540 +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4678 .loc 1 3981 7 is_stmt 0 view .LVU1541 + 4679 00d4 2368 ldr r3, [r4] + 4680 00d6 1A69 ldr r2, [r3, #16] +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4681 .loc 1 3981 6 view .LVU1542 + 4682 00d8 12F0800F tst r2, #128 + 4683 00dc 03D0 beq .L276 +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4684 .loc 1 3983 5 is_stmt 1 view .LVU1543 +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4685 .loc 1 3983 9 is_stmt 0 view .LVU1544 + 4686 00de DA68 ldr r2, [r3, #12] +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4687 .loc 1 3983 8 view .LVU1545 + 4688 00e0 12F0800F tst r2, #128 + 4689 00e4 3DD1 bne .L282 + 4690 .L276: +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4691 .loc 1 3995 3 is_stmt 1 view .LVU1546 +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4692 .loc 1 3995 7 is_stmt 0 view .LVU1547 + 4693 00e6 2368 ldr r3, [r4] + 4694 00e8 1A69 ldr r2, [r3, #16] +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4695 .loc 1 3995 6 view .LVU1548 + 4696 00ea 12F4807F tst r2, #256 + 4697 00ee 03D0 beq .L277 +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4698 .loc 1 3997 5 is_stmt 1 view .LVU1549 +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4699 .loc 1 3997 9 is_stmt 0 view .LVU1550 + 4700 00f0 DA68 ldr r2, [r3, #12] +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4701 .loc 1 3997 8 view .LVU1551 + 4702 00f2 12F0800F tst r2, #128 + 4703 00f6 3BD1 bne .L283 + 4704 .L277: +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4705 .loc 1 4009 3 is_stmt 1 view .LVU1552 +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4706 .loc 1 4009 7 is_stmt 0 view .LVU1553 + 4707 00f8 2368 ldr r3, [r4] + 4708 00fa 1A69 ldr r2, [r3, #16] +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4709 .loc 1 4009 6 view .LVU1554 + 4710 00fc 12F0400F tst r2, #64 + 4711 0100 03D0 beq .L278 +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4712 .loc 1 4011 5 is_stmt 1 view .LVU1555 +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4713 .loc 1 4011 9 is_stmt 0 view .LVU1556 + 4714 0102 DA68 ldr r2, [r3, #12] + ARM GAS /tmp/cc0aF2h1.s page 239 + + +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4715 .loc 1 4011 8 view .LVU1557 + 4716 0104 12F0400F tst r2, #64 + 4717 0108 39D1 bne .L284 + 4718 .L278: +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4719 .loc 1 4022 3 is_stmt 1 view .LVU1558 +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4720 .loc 1 4022 7 is_stmt 0 view .LVU1559 + 4721 010a 2368 ldr r3, [r4] + 4722 010c 1A69 ldr r2, [r3, #16] +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4723 .loc 1 4022 6 view .LVU1560 + 4724 010e 12F0200F tst r2, #32 + 4725 0112 03D0 beq .L262 +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4726 .loc 1 4024 5 is_stmt 1 view .LVU1561 +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4727 .loc 1 4024 9 is_stmt 0 view .LVU1562 + 4728 0114 DA68 ldr r2, [r3, #12] +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4729 .loc 1 4024 8 view .LVU1563 + 4730 0116 12F0200F tst r2, #32 + 4731 011a 37D1 bne .L285 + 4732 .L262: +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4733 .loc 1 4034 1 view .LVU1564 + 4734 011c 10BD pop {r4, pc} + 4735 .LVL370: + 4736 .L264: +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4737 .loc 1 3869 11 is_stmt 1 view .LVU1565 + 4738 011e FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4739 .LVL371: +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4740 .loc 1 3870 11 view .LVU1566 + 4741 0122 2046 mov r0, r4 + 4742 0124 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4743 .LVL372: + 4744 0128 81E7 b .L265 + 4745 .L267: +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4746 .loc 1 3900 9 view .LVU1567 + 4747 012a 2046 mov r0, r4 + 4748 012c FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4749 .LVL373: +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4750 .loc 1 3901 9 view .LVU1568 + 4751 0130 2046 mov r0, r4 + 4752 0132 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4753 .LVL374: + 4754 0136 92E7 b .L268 + 4755 .L270: +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4756 .loc 1 3930 9 view .LVU1569 + 4757 0138 2046 mov r0, r4 + 4758 013a FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + ARM GAS /tmp/cc0aF2h1.s page 240 + + + 4759 .LVL375: +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4760 .loc 1 3931 9 view .LVU1570 + 4761 013e 2046 mov r0, r4 + 4762 0140 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4763 .LVL376: + 4764 0144 A3E7 b .L271 + 4765 .L273: +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4766 .loc 1 3960 9 view .LVU1571 + 4767 0146 2046 mov r0, r4 + 4768 0148 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4769 .LVL377: +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4770 .loc 1 3961 9 view .LVU1572 + 4771 014c 2046 mov r0, r4 + 4772 014e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4773 .LVL378: + 4774 0152 B4E7 b .L274 + 4775 .L281: +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4776 .loc 1 3972 7 view .LVU1573 + 4777 0154 6FF00102 mvn r2, #1 + 4778 0158 1A61 str r2, [r3, #16] +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4779 .loc 1 3976 7 view .LVU1574 + 4780 015a 2046 mov r0, r4 + 4781 015c FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 4782 .LVL379: + 4783 0160 B8E7 b .L275 + 4784 .L282: +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4785 .loc 1 3985 7 view .LVU1575 + 4786 0162 6FF08002 mvn r2, #128 + 4787 0166 1A61 str r2, [r3, #16] +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4788 .loc 1 3989 7 view .LVU1576 + 4789 0168 2046 mov r0, r4 + 4790 016a FFF7FEFF bl HAL_TIMEx_BreakCallback + 4791 .LVL380: + 4792 016e BAE7 b .L276 + 4793 .L283: +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4794 .loc 1 3999 7 view .LVU1577 + 4795 0170 6FF48072 mvn r2, #256 + 4796 0174 1A61 str r2, [r3, #16] +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4797 .loc 1 4003 7 view .LVU1578 + 4798 0176 2046 mov r0, r4 + 4799 0178 FFF7FEFF bl HAL_TIMEx_Break2Callback + 4800 .LVL381: + 4801 017c BCE7 b .L277 + 4802 .L284: +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4803 .loc 1 4013 7 view .LVU1579 + 4804 017e 6FF04002 mvn r2, #64 + 4805 0182 1A61 str r2, [r3, #16] + ARM GAS /tmp/cc0aF2h1.s page 241 + + +4017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4806 .loc 1 4017 7 view .LVU1580 + 4807 0184 2046 mov r0, r4 + 4808 0186 FFF7FEFF bl HAL_TIM_TriggerCallback + 4809 .LVL382: + 4810 018a BEE7 b .L278 + 4811 .L285: +4026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4812 .loc 1 4026 7 view .LVU1581 + 4813 018c 6FF02002 mvn r2, #32 + 4814 0190 1A61 str r2, [r3, #16] +4030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4815 .loc 1 4030 7 view .LVU1582 + 4816 0192 2046 mov r0, r4 + 4817 0194 FFF7FEFF bl HAL_TIMEx_CommutCallback + 4818 .LVL383: +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4819 .loc 1 4034 1 is_stmt 0 view .LVU1583 + 4820 0198 C0E7 b .L262 + 4821 .cfi_endproc + 4822 .LFE188: + 4824 .section .text.TIM_DMATriggerCplt,"ax",%progbits + 4825 .align 1 + 4826 .syntax unified + 4827 .thumb + 4828 .thumb_func + 4830 TIM_DMATriggerCplt: + 4831 .LVL384: + 4832 .LFB232: +6930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4833 .loc 1 6930 1 is_stmt 1 view -0 + 4834 .cfi_startproc + 4835 @ args = 0, pretend = 0, frame = 0 + 4836 @ frame_needed = 0, uses_anonymous_args = 0 +6930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4837 .loc 1 6930 1 is_stmt 0 view .LVU1585 + 4838 0000 08B5 push {r3, lr} + 4839 .cfi_def_cfa_offset 8 + 4840 .cfi_offset 3, -8 + 4841 .cfi_offset 14, -4 +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4842 .loc 1 6931 3 is_stmt 1 view .LVU1586 +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4843 .loc 1 6931 22 is_stmt 0 view .LVU1587 + 4844 0002 406A ldr r0, [r0, #36] + 4845 .LVL385: +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4846 .loc 1 6933 3 is_stmt 1 view .LVU1588 +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4847 .loc 1 6933 17 is_stmt 0 view .LVU1589 + 4848 0004 836B ldr r3, [r0, #56] +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4849 .loc 1 6933 43 view .LVU1590 + 4850 0006 9B69 ldr r3, [r3, #24] +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4851 .loc 1 6933 6 view .LVU1591 + 4852 0008 13B9 cbnz r3, .L287 + ARM GAS /tmp/cc0aF2h1.s page 242 + + +6935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4853 .loc 1 6935 5 is_stmt 1 view .LVU1592 +6935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4854 .loc 1 6935 17 is_stmt 0 view .LVU1593 + 4855 000a 0123 movs r3, #1 + 4856 000c 80F83D30 strb r3, [r0, #61] + 4857 .L287: +6941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4858 .loc 1 6941 3 is_stmt 1 view .LVU1594 + 4859 0010 FFF7FEFF bl HAL_TIM_TriggerCallback + 4860 .LVL386: +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4861 .loc 1 6943 1 is_stmt 0 view .LVU1595 + 4862 0014 08BD pop {r3, pc} + 4863 .cfi_endproc + 4864 .LFE232: + 4866 .section .text.HAL_TIM_TriggerHalfCpltCallback,"ax",%progbits + 4867 .align 1 + 4868 .weak HAL_TIM_TriggerHalfCpltCallback + 4869 .syntax unified + 4870 .thumb + 4871 .thumb_func + 4873 HAL_TIM_TriggerHalfCpltCallback: + 4874 .LVL387: + 4875 .LFB214: +5949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4876 .loc 1 5949 1 is_stmt 1 view -0 + 4877 .cfi_startproc + 4878 @ args = 0, pretend = 0, frame = 0 + 4879 @ frame_needed = 0, uses_anonymous_args = 0 + 4880 @ link register save eliminated. +5951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4881 .loc 1 5951 3 view .LVU1597 +5956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4882 .loc 1 5956 1 is_stmt 0 view .LVU1598 + 4883 0000 7047 bx lr + 4884 .cfi_endproc + 4885 .LFE214: + 4887 .section .text.TIM_DMATriggerHalfCplt,"ax",%progbits + 4888 .align 1 + 4889 .syntax unified + 4890 .thumb + 4891 .thumb_func + 4893 TIM_DMATriggerHalfCplt: + 4894 .LVL388: + 4895 .LFB233: +6951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4896 .loc 1 6951 1 is_stmt 1 view -0 + 4897 .cfi_startproc + 4898 @ args = 0, pretend = 0, frame = 0 + 4899 @ frame_needed = 0, uses_anonymous_args = 0 +6951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4900 .loc 1 6951 1 is_stmt 0 view .LVU1600 + 4901 0000 08B5 push {r3, lr} + 4902 .cfi_def_cfa_offset 8 + 4903 .cfi_offset 3, -8 + 4904 .cfi_offset 14, -4 + ARM GAS /tmp/cc0aF2h1.s page 243 + + +6952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4905 .loc 1 6952 3 is_stmt 1 view .LVU1601 + 4906 .LVL389: +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4907 .loc 1 6957 3 view .LVU1602 + 4908 0002 406A ldr r0, [r0, #36] + 4909 .LVL390: +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4910 .loc 1 6957 3 is_stmt 0 view .LVU1603 + 4911 0004 FFF7FEFF bl HAL_TIM_TriggerHalfCpltCallback + 4912 .LVL391: +6959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4913 .loc 1 6959 1 view .LVU1604 + 4914 0008 08BD pop {r3, pc} + 4915 .cfi_endproc + 4916 .LFE233: + 4918 .section .text.HAL_TIM_ErrorCallback,"ax",%progbits + 4919 .align 1 + 4920 .weak HAL_TIM_ErrorCallback + 4921 .syntax unified + 4922 .thumb + 4923 .thumb_func + 4925 HAL_TIM_ErrorCallback: + 4926 .LVL392: + 4927 .LFB215: +5964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4928 .loc 1 5964 1 is_stmt 1 view -0 + 4929 .cfi_startproc + 4930 @ args = 0, pretend = 0, frame = 0 + 4931 @ frame_needed = 0, uses_anonymous_args = 0 + 4932 @ link register save eliminated. +5966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4933 .loc 1 5966 3 view .LVU1606 +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4934 .loc 1 5971 1 is_stmt 0 view .LVU1607 + 4935 0000 7047 bx lr + 4936 .cfi_endproc + 4937 .LFE215: + 4939 .section .text.TIM_DMAError,"ax",%progbits + 4940 .align 1 + 4941 .global TIM_DMAError + 4942 .syntax unified + 4943 .thumb + 4944 .thumb_func + 4946 TIM_DMAError: + 4947 .LVL393: + 4948 .LFB225: +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4949 .loc 1 6650 1 is_stmt 1 view -0 + 4950 .cfi_startproc + 4951 @ args = 0, pretend = 0, frame = 0 + 4952 @ frame_needed = 0, uses_anonymous_args = 0 +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4953 .loc 1 6650 1 is_stmt 0 view .LVU1609 + 4954 0000 10B5 push {r4, lr} + 4955 .cfi_def_cfa_offset 8 + 4956 .cfi_offset 4, -8 + ARM GAS /tmp/cc0aF2h1.s page 244 + + + 4957 .cfi_offset 14, -4 +6651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4958 .loc 1 6651 3 is_stmt 1 view .LVU1610 +6651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 4959 .loc 1 6651 22 is_stmt 0 view .LVU1611 + 4960 0002 446A ldr r4, [r0, #36] + 4961 .LVL394: +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4962 .loc 1 6653 3 is_stmt 1 view .LVU1612 +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4963 .loc 1 6653 25 is_stmt 0 view .LVU1613 + 4964 0004 636A ldr r3, [r4, #36] +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4965 .loc 1 6653 6 view .LVU1614 + 4966 0006 8342 cmp r3, r0 + 4967 0008 0CD0 beq .L300 +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4968 .loc 1 6658 8 is_stmt 1 view .LVU1615 +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4969 .loc 1 6658 30 is_stmt 0 view .LVU1616 + 4970 000a A36A ldr r3, [r4, #40] +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4971 .loc 1 6658 11 view .LVU1617 + 4972 000c 8342 cmp r3, r0 + 4973 000e 13D0 beq .L301 +6663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4974 .loc 1 6663 8 is_stmt 1 view .LVU1618 +6663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4975 .loc 1 6663 30 is_stmt 0 view .LVU1619 + 4976 0010 E36A ldr r3, [r4, #44] +6663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4977 .loc 1 6663 11 view .LVU1620 + 4978 0012 8342 cmp r3, r0 + 4979 0014 16D0 beq .L302 +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4980 .loc 1 6668 8 is_stmt 1 view .LVU1621 +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4981 .loc 1 6668 30 is_stmt 0 view .LVU1622 + 4982 0016 236B ldr r3, [r4, #48] +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 4983 .loc 1 6668 11 view .LVU1623 + 4984 0018 8342 cmp r3, r0 + 4985 001a 19D0 beq .L303 +6675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4986 .loc 1 6675 5 is_stmt 1 view .LVU1624 +6675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4987 .loc 1 6675 17 is_stmt 0 view .LVU1625 + 4988 001c 0123 movs r3, #1 + 4989 001e 84F83D30 strb r3, [r4, #61] + 4990 0022 03E0 b .L295 + 4991 .L300: +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4992 .loc 1 6655 5 is_stmt 1 view .LVU1626 +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4993 .loc 1 6655 19 is_stmt 0 view .LVU1627 + 4994 0024 0123 movs r3, #1 + 4995 0026 2377 strb r3, [r4, #28] + ARM GAS /tmp/cc0aF2h1.s page 245 + + +6656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 4996 .loc 1 6656 5 is_stmt 1 view .LVU1628 + 4997 0028 84F83E30 strb r3, [r4, #62] + 4998 .L295: +6681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4999 .loc 1 6681 3 view .LVU1629 + 5000 002c 2046 mov r0, r4 + 5001 .LVL395: +6681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5002 .loc 1 6681 3 is_stmt 0 view .LVU1630 + 5003 002e FFF7FEFF bl HAL_TIM_ErrorCallback + 5004 .LVL396: +6684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5005 .loc 1 6684 3 is_stmt 1 view .LVU1631 +6684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5006 .loc 1 6684 17 is_stmt 0 view .LVU1632 + 5007 0032 0023 movs r3, #0 + 5008 0034 2377 strb r3, [r4, #28] +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5009 .loc 1 6685 1 view .LVU1633 + 5010 0036 10BD pop {r4, pc} + 5011 .LVL397: + 5012 .L301: +6660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5013 .loc 1 6660 5 is_stmt 1 view .LVU1634 +6660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5014 .loc 1 6660 19 is_stmt 0 view .LVU1635 + 5015 0038 0223 movs r3, #2 + 5016 003a 2377 strb r3, [r4, #28] +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5017 .loc 1 6661 5 is_stmt 1 view .LVU1636 + 5018 003c 0123 movs r3, #1 + 5019 003e 84F83F30 strb r3, [r4, #63] + 5020 0042 F3E7 b .L295 + 5021 .L302: +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 5022 .loc 1 6665 5 view .LVU1637 +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 5023 .loc 1 6665 19 is_stmt 0 view .LVU1638 + 5024 0044 0423 movs r3, #4 + 5025 0046 2377 strb r3, [r4, #28] +6666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5026 .loc 1 6666 5 is_stmt 1 view .LVU1639 + 5027 0048 0123 movs r3, #1 + 5028 004a 84F84030 strb r3, [r4, #64] + 5029 004e EDE7 b .L295 + 5030 .L303: +6670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 5031 .loc 1 6670 5 view .LVU1640 +6670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 5032 .loc 1 6670 19 is_stmt 0 view .LVU1641 + 5033 0050 0823 movs r3, #8 + 5034 0052 2377 strb r3, [r4, #28] +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5035 .loc 1 6671 5 is_stmt 1 view .LVU1642 + 5036 0054 0123 movs r3, #1 + 5037 0056 84F84130 strb r3, [r4, #65] + ARM GAS /tmp/cc0aF2h1.s page 246 + + + 5038 005a E7E7 b .L295 + 5039 .cfi_endproc + 5040 .LFE225: + 5042 .section .text.HAL_TIM_Base_GetState,"ax",%progbits + 5043 .align 1 + 5044 .global HAL_TIM_Base_GetState + 5045 .syntax unified + 5046 .thumb + 5047 .thumb_func + 5049 HAL_TIM_Base_GetState: + 5050 .LVL398: + 5051 .LFB216: +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; + 5052 .loc 1 6530 1 view -0 + 5053 .cfi_startproc + 5054 @ args = 0, pretend = 0, frame = 0 + 5055 @ frame_needed = 0, uses_anonymous_args = 0 + 5056 @ link register save eliminated. +6531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5057 .loc 1 6531 3 view .LVU1644 +6531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5058 .loc 1 6531 14 is_stmt 0 view .LVU1645 + 5059 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5060 .LVL399: +6532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5061 .loc 1 6532 1 view .LVU1646 + 5062 0004 7047 bx lr + 5063 .cfi_endproc + 5064 .LFE216: + 5066 .section .text.HAL_TIM_OC_GetState,"ax",%progbits + 5067 .align 1 + 5068 .global HAL_TIM_OC_GetState + 5069 .syntax unified + 5070 .thumb + 5071 .thumb_func + 5073 HAL_TIM_OC_GetState: + 5074 .LVL400: + 5075 .LFB217: +6540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; + 5076 .loc 1 6540 1 is_stmt 1 view -0 + 5077 .cfi_startproc + 5078 @ args = 0, pretend = 0, frame = 0 + 5079 @ frame_needed = 0, uses_anonymous_args = 0 + 5080 @ link register save eliminated. +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5081 .loc 1 6541 3 view .LVU1648 +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5082 .loc 1 6541 14 is_stmt 0 view .LVU1649 + 5083 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5084 .LVL401: +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5085 .loc 1 6542 1 view .LVU1650 + 5086 0004 7047 bx lr + 5087 .cfi_endproc + 5088 .LFE217: + 5090 .section .text.HAL_TIM_PWM_GetState,"ax",%progbits + 5091 .align 1 + ARM GAS /tmp/cc0aF2h1.s page 247 + + + 5092 .global HAL_TIM_PWM_GetState + 5093 .syntax unified + 5094 .thumb + 5095 .thumb_func + 5097 HAL_TIM_PWM_GetState: + 5098 .LVL402: + 5099 .LFB218: +6550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; + 5100 .loc 1 6550 1 is_stmt 1 view -0 + 5101 .cfi_startproc + 5102 @ args = 0, pretend = 0, frame = 0 + 5103 @ frame_needed = 0, uses_anonymous_args = 0 + 5104 @ link register save eliminated. +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5105 .loc 1 6551 3 view .LVU1652 +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5106 .loc 1 6551 14 is_stmt 0 view .LVU1653 + 5107 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5108 .LVL403: +6552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5109 .loc 1 6552 1 view .LVU1654 + 5110 0004 7047 bx lr + 5111 .cfi_endproc + 5112 .LFE218: + 5114 .section .text.HAL_TIM_IC_GetState,"ax",%progbits + 5115 .align 1 + 5116 .global HAL_TIM_IC_GetState + 5117 .syntax unified + 5118 .thumb + 5119 .thumb_func + 5121 HAL_TIM_IC_GetState: + 5122 .LVL404: + 5123 .LFB219: +6560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; + 5124 .loc 1 6560 1 is_stmt 1 view -0 + 5125 .cfi_startproc + 5126 @ args = 0, pretend = 0, frame = 0 + 5127 @ frame_needed = 0, uses_anonymous_args = 0 + 5128 @ link register save eliminated. +6561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5129 .loc 1 6561 3 view .LVU1656 +6561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5130 .loc 1 6561 14 is_stmt 0 view .LVU1657 + 5131 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5132 .LVL405: +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5133 .loc 1 6562 1 view .LVU1658 + 5134 0004 7047 bx lr + 5135 .cfi_endproc + 5136 .LFE219: + 5138 .section .text.HAL_TIM_OnePulse_GetState,"ax",%progbits + 5139 .align 1 + 5140 .global HAL_TIM_OnePulse_GetState + 5141 .syntax unified + 5142 .thumb + 5143 .thumb_func + 5145 HAL_TIM_OnePulse_GetState: + ARM GAS /tmp/cc0aF2h1.s page 248 + + + 5146 .LVL406: + 5147 .LFB220: +6570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; + 5148 .loc 1 6570 1 is_stmt 1 view -0 + 5149 .cfi_startproc + 5150 @ args = 0, pretend = 0, frame = 0 + 5151 @ frame_needed = 0, uses_anonymous_args = 0 + 5152 @ link register save eliminated. +6571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5153 .loc 1 6571 3 view .LVU1660 +6571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5154 .loc 1 6571 14 is_stmt 0 view .LVU1661 + 5155 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5156 .LVL407: +6572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5157 .loc 1 6572 1 view .LVU1662 + 5158 0004 7047 bx lr + 5159 .cfi_endproc + 5160 .LFE220: + 5162 .section .text.HAL_TIM_Encoder_GetState,"ax",%progbits + 5163 .align 1 + 5164 .global HAL_TIM_Encoder_GetState + 5165 .syntax unified + 5166 .thumb + 5167 .thumb_func + 5169 HAL_TIM_Encoder_GetState: + 5170 .LVL408: + 5171 .LFB221: +6580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->State; + 5172 .loc 1 6580 1 is_stmt 1 view -0 + 5173 .cfi_startproc + 5174 @ args = 0, pretend = 0, frame = 0 + 5175 @ frame_needed = 0, uses_anonymous_args = 0 + 5176 @ link register save eliminated. +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5177 .loc 1 6581 3 view .LVU1664 +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5178 .loc 1 6581 14 is_stmt 0 view .LVU1665 + 5179 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5180 .LVL409: +6582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5181 .loc 1 6582 1 view .LVU1666 + 5182 0004 7047 bx lr + 5183 .cfi_endproc + 5184 .LFE221: + 5186 .section .text.HAL_TIM_GetActiveChannel,"ax",%progbits + 5187 .align 1 + 5188 .global HAL_TIM_GetActiveChannel + 5189 .syntax unified + 5190 .thumb + 5191 .thumb_func + 5193 HAL_TIM_GetActiveChannel: + 5194 .LVL410: + 5195 .LFB222: +6590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return htim->Channel; + 5196 .loc 1 6590 1 is_stmt 1 view -0 + 5197 .cfi_startproc + ARM GAS /tmp/cc0aF2h1.s page 249 + + + 5198 @ args = 0, pretend = 0, frame = 0 + 5199 @ frame_needed = 0, uses_anonymous_args = 0 + 5200 @ link register save eliminated. +6591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5201 .loc 1 6591 3 view .LVU1668 +6592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5202 .loc 1 6592 1 is_stmt 0 view .LVU1669 + 5203 0000 007F ldrb r0, [r0, #28] @ zero_extendqisi2 + 5204 .LVL411: +6592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5205 .loc 1 6592 1 view .LVU1670 + 5206 0002 7047 bx lr + 5207 .cfi_endproc + 5208 .LFE222: + 5210 .section .text.HAL_TIM_GetChannelState,"ax",%progbits + 5211 .align 1 + 5212 .global HAL_TIM_GetChannelState + 5213 .syntax unified + 5214 .thumb + 5215 .thumb_func + 5217 HAL_TIM_GetChannelState: + 5218 .LVL412: + 5219 .LFB223: +6608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state; + 5220 .loc 1 6608 1 is_stmt 1 view -0 + 5221 .cfi_startproc + 5222 @ args = 0, pretend = 0, frame = 0 + 5223 @ frame_needed = 0, uses_anonymous_args = 0 + 5224 @ link register save eliminated. +6609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5225 .loc 1 6609 3 view .LVU1672 +6612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5226 .loc 1 6612 3 view .LVU1673 +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5227 .loc 1 6614 3 view .LVU1674 + 5228 0000 1029 cmp r1, #16 + 5229 0002 1ED8 bhi .L312 + 5230 0004 DFE801F0 tbb [pc, r1] + 5231 .L314: + 5232 0008 09 .byte (.L318-.L314)/2 + 5233 0009 1D .byte (.L312-.L314)/2 + 5234 000a 1D .byte (.L312-.L314)/2 + 5235 000b 1D .byte (.L312-.L314)/2 + 5236 000c 0D .byte (.L317-.L314)/2 + 5237 000d 1D .byte (.L312-.L314)/2 + 5238 000e 1D .byte (.L312-.L314)/2 + 5239 000f 1D .byte (.L312-.L314)/2 + 5240 0010 11 .byte (.L316-.L314)/2 + 5241 0011 1D .byte (.L312-.L314)/2 + 5242 0012 1D .byte (.L312-.L314)/2 + 5243 0013 1D .byte (.L312-.L314)/2 + 5244 0014 15 .byte (.L315-.L314)/2 + 5245 0015 1D .byte (.L312-.L314)/2 + 5246 0016 1D .byte (.L312-.L314)/2 + 5247 0017 1D .byte (.L312-.L314)/2 + 5248 0018 19 .byte (.L313-.L314)/2 + 5249 0019 00 .p2align 1 + ARM GAS /tmp/cc0aF2h1.s page 250 + + + 5250 .L318: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5251 .loc 1 6614 19 is_stmt 0 discriminator 1 view .LVU1675 + 5252 001a 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 5253 .LVL413: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5254 .loc 1 6614 19 discriminator 1 view .LVU1676 + 5255 001e C0B2 uxtb r0, r0 + 5256 0020 7047 bx lr + 5257 .LVL414: + 5258 .L317: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5259 .loc 1 6614 19 discriminator 4 view .LVU1677 + 5260 0022 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 5261 .LVL415: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5262 .loc 1 6614 19 discriminator 4 view .LVU1678 + 5263 0026 C0B2 uxtb r0, r0 + 5264 0028 7047 bx lr + 5265 .LVL416: + 5266 .L316: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5267 .loc 1 6614 19 discriminator 7 view .LVU1679 + 5268 002a 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 5269 .LVL417: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5270 .loc 1 6614 19 discriminator 7 view .LVU1680 + 5271 002e C0B2 uxtb r0, r0 + 5272 0030 7047 bx lr + 5273 .LVL418: + 5274 .L315: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5275 .loc 1 6614 19 discriminator 10 view .LVU1681 + 5276 0032 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 5277 .LVL419: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5278 .loc 1 6614 19 discriminator 10 view .LVU1682 + 5279 0036 C0B2 uxtb r0, r0 + 5280 0038 7047 bx lr + 5281 .LVL420: + 5282 .L313: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5283 .loc 1 6614 19 discriminator 13 view .LVU1683 + 5284 003a 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 5285 .LVL421: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5286 .loc 1 6614 19 discriminator 13 view .LVU1684 + 5287 003e C0B2 uxtb r0, r0 + 5288 0040 7047 bx lr + 5289 .LVL422: + 5290 .L312: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5291 .loc 1 6614 19 discriminator 14 view .LVU1685 + 5292 0042 90F84300 ldrb r0, [r0, #67] @ zero_extendqisi2 + 5293 .LVL423: +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5294 .loc 1 6614 19 discriminator 14 view .LVU1686 + ARM GAS /tmp/cc0aF2h1.s page 251 + + + 5295 0046 C0B2 uxtb r0, r0 + 5296 .LVL424: +6616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5297 .loc 1 6616 3 is_stmt 1 view .LVU1687 +6617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5298 .loc 1 6617 1 is_stmt 0 view .LVU1688 + 5299 0048 7047 bx lr + 5300 .cfi_endproc + 5301 .LFE223: + 5303 .section .text.HAL_TIM_DMABurstState,"ax",%progbits + 5304 .align 1 + 5305 .global HAL_TIM_DMABurstState + 5306 .syntax unified + 5307 .thumb + 5308 .thumb_func + 5310 HAL_TIM_DMABurstState: + 5311 .LVL425: + 5312 .LFB224: +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 5313 .loc 1 6625 1 is_stmt 1 view -0 + 5314 .cfi_startproc + 5315 @ args = 0, pretend = 0, frame = 0 + 5316 @ frame_needed = 0, uses_anonymous_args = 0 + 5317 @ link register save eliminated. +6627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5318 .loc 1 6627 3 view .LVU1690 +6629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5319 .loc 1 6629 3 view .LVU1691 +6629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5320 .loc 1 6629 14 is_stmt 0 view .LVU1692 + 5321 0000 90F84800 ldrb r0, [r0, #72] @ zero_extendqisi2 + 5322 .LVL426: +6630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5323 .loc 1 6630 1 view .LVU1693 + 5324 0004 7047 bx lr + 5325 .cfi_endproc + 5326 .LFE224: + 5328 .section .text.TIM_Base_SetConfig,"ax",%progbits + 5329 .align 1 + 5330 .global TIM_Base_SetConfig + 5331 .syntax unified + 5332 .thumb + 5333 .thumb_func + 5335 TIM_Base_SetConfig: + 5336 .LVL427: + 5337 .LFB234: +6968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr1; + 5338 .loc 1 6968 1 is_stmt 1 view -0 + 5339 .cfi_startproc + 5340 @ args = 0, pretend = 0, frame = 0 + 5341 @ frame_needed = 0, uses_anonymous_args = 0 + 5342 @ link register save eliminated. +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 = TIMx->CR1; + 5343 .loc 1 6969 3 view .LVU1695 +6970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5344 .loc 1 6970 3 view .LVU1696 +6970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 252 + + + 5345 .loc 1 6970 10 is_stmt 0 view .LVU1697 + 5346 0000 0368 ldr r3, [r0] + 5347 .LVL428: +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5348 .loc 1 6973 3 is_stmt 1 view .LVU1698 +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5349 .loc 1 6973 6 is_stmt 0 view .LVU1699 + 5350 0002 264A ldr r2, .L328 + 5351 0004 9042 cmp r0, r2 + 5352 0006 0AD0 beq .L322 +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5353 .loc 1 6973 7 discriminator 1 view .LVU1700 + 5354 0008 B0F1804F cmp r0, #1073741824 + 5355 000c 07D0 beq .L322 +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5356 .loc 1 6973 7 discriminator 2 view .LVU1701 + 5357 000e A2F59432 sub r2, r2, #75776 + 5358 0012 9042 cmp r0, r2 + 5359 0014 03D0 beq .L322 +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5360 .loc 1 6973 7 discriminator 3 view .LVU1702 + 5361 0016 02F58062 add r2, r2, #1024 + 5362 001a 9042 cmp r0, r2 + 5363 001c 03D1 bne .L323 + 5364 .L322: +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; + 5365 .loc 1 6976 5 is_stmt 1 view .LVU1703 +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; + 5366 .loc 1 6976 12 is_stmt 0 view .LVU1704 + 5367 001e 23F07003 bic r3, r3, #112 + 5368 .LVL429: +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5369 .loc 1 6977 5 is_stmt 1 view .LVU1705 +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5370 .loc 1 6977 24 is_stmt 0 view .LVU1706 + 5371 0022 4A68 ldr r2, [r1, #4] +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5372 .loc 1 6977 12 view .LVU1707 + 5373 0024 1343 orrs r3, r3, r2 + 5374 .LVL430: + 5375 .L323: +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5376 .loc 1 6980 3 is_stmt 1 view .LVU1708 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5377 .loc 1 6980 6 is_stmt 0 view .LVU1709 + 5378 0026 1D4A ldr r2, .L328 + 5379 0028 9042 cmp r0, r2 + 5380 002a 16D0 beq .L324 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5381 .loc 1 6980 7 discriminator 1 view .LVU1710 + 5382 002c B0F1804F cmp r0, #1073741824 + 5383 0030 13D0 beq .L324 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5384 .loc 1 6980 7 discriminator 2 view .LVU1711 + 5385 0032 A2F59432 sub r2, r2, #75776 + 5386 0036 9042 cmp r0, r2 + 5387 0038 0FD0 beq .L324 + ARM GAS /tmp/cc0aF2h1.s page 253 + + +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5388 .loc 1 6980 7 discriminator 3 view .LVU1712 + 5389 003a 02F58062 add r2, r2, #1024 + 5390 003e 9042 cmp r0, r2 + 5391 0040 0BD0 beq .L324 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5392 .loc 1 6980 7 discriminator 4 view .LVU1713 + 5393 0042 02F59C32 add r2, r2, #79872 + 5394 0046 9042 cmp r0, r2 + 5395 0048 07D0 beq .L324 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5396 .loc 1 6980 7 discriminator 5 view .LVU1714 + 5397 004a 02F58062 add r2, r2, #1024 + 5398 004e 9042 cmp r0, r2 + 5399 0050 03D0 beq .L324 +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5400 .loc 1 6980 7 discriminator 6 view .LVU1715 + 5401 0052 02F58062 add r2, r2, #1024 + 5402 0056 9042 cmp r0, r2 + 5403 0058 03D1 bne .L325 + 5404 .L324: +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + 5405 .loc 1 6983 5 is_stmt 1 view .LVU1716 +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + 5406 .loc 1 6983 12 is_stmt 0 view .LVU1717 + 5407 005a 23F44073 bic r3, r3, #768 + 5408 .LVL431: +6984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5409 .loc 1 6984 5 is_stmt 1 view .LVU1718 +6984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5410 .loc 1 6984 34 is_stmt 0 view .LVU1719 + 5411 005e CA68 ldr r2, [r1, #12] +6984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5412 .loc 1 6984 12 view .LVU1720 + 5413 0060 1343 orrs r3, r3, r2 + 5414 .LVL432: + 5415 .L325: +6988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5416 .loc 1 6988 3 is_stmt 1 view .LVU1721 + 5417 0062 23F08003 bic r3, r3, #128 + 5418 .LVL433: +6988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5419 .loc 1 6988 3 is_stmt 0 view .LVU1722 + 5420 0066 4A69 ldr r2, [r1, #20] + 5421 0068 1343 orrs r3, r3, r2 + 5422 .LVL434: +6990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5423 .loc 1 6990 3 is_stmt 1 view .LVU1723 +6990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5424 .loc 1 6990 13 is_stmt 0 view .LVU1724 + 5425 006a 0360 str r3, [r0] +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5426 .loc 1 6993 3 is_stmt 1 view .LVU1725 +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5427 .loc 1 6993 34 is_stmt 0 view .LVU1726 + 5428 006c 8B68 ldr r3, [r1, #8] + 5429 .LVL435: + ARM GAS /tmp/cc0aF2h1.s page 254 + + +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5430 .loc 1 6993 13 view .LVU1727 + 5431 006e C362 str r3, [r0, #44] + 5432 .LVL436: +6996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5433 .loc 1 6996 3 is_stmt 1 view .LVU1728 +6996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5434 .loc 1 6996 24 is_stmt 0 view .LVU1729 + 5435 0070 0B68 ldr r3, [r1] +6996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5436 .loc 1 6996 13 view .LVU1730 + 5437 0072 8362 str r3, [r0, #40] +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5438 .loc 1 6998 3 is_stmt 1 view .LVU1731 +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5439 .loc 1 6998 6 is_stmt 0 view .LVU1732 + 5440 0074 094B ldr r3, .L328 + 5441 0076 9842 cmp r0, r3 + 5442 0078 0BD0 beq .L326 +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5443 .loc 1 6998 7 discriminator 1 view .LVU1733 + 5444 007a 03F5A053 add r3, r3, #5120 + 5445 007e 9842 cmp r0, r3 + 5446 0080 07D0 beq .L326 +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5447 .loc 1 6998 7 discriminator 2 view .LVU1734 + 5448 0082 03F58063 add r3, r3, #1024 + 5449 0086 9842 cmp r0, r3 + 5450 0088 03D0 beq .L326 +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5451 .loc 1 6998 7 discriminator 3 view .LVU1735 + 5452 008a 03F58063 add r3, r3, #1024 + 5453 008e 9842 cmp r0, r3 + 5454 0090 01D1 bne .L327 + 5455 .L326: +7001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5456 .loc 1 7001 5 is_stmt 1 view .LVU1736 +7001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5457 .loc 1 7001 26 is_stmt 0 view .LVU1737 + 5458 0092 0B69 ldr r3, [r1, #16] +7001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5459 .loc 1 7001 15 view .LVU1738 + 5460 0094 0363 str r3, [r0, #48] + 5461 .L327: +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5462 .loc 1 7006 3 is_stmt 1 view .LVU1739 +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5463 .loc 1 7006 13 is_stmt 0 view .LVU1740 + 5464 0096 0123 movs r3, #1 + 5465 0098 4361 str r3, [r0, #20] +7007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5466 .loc 1 7007 1 view .LVU1741 + 5467 009a 7047 bx lr + 5468 .L329: + 5469 .align 2 + 5470 .L328: + 5471 009c 002C0140 .word 1073818624 + ARM GAS /tmp/cc0aF2h1.s page 255 + + + 5472 .cfi_endproc + 5473 .LFE234: + 5475 .section .text.HAL_TIM_Base_Init,"ax",%progbits + 5476 .align 1 + 5477 .global HAL_TIM_Base_Init + 5478 .syntax unified + 5479 .thumb + 5480 .thumb_func + 5482 HAL_TIM_Base_Init: + 5483 .LVL437: + 5484 .LFB130: + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5485 .loc 1 274 1 is_stmt 1 view -0 + 5486 .cfi_startproc + 5487 @ args = 0, pretend = 0, frame = 0 + 5488 @ frame_needed = 0, uses_anonymous_args = 0 + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5489 .loc 1 276 3 view .LVU1743 + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5490 .loc 1 276 6 is_stmt 0 view .LVU1744 + 5491 0000 60B3 cbz r0, .L333 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5492 .loc 1 274 1 view .LVU1745 + 5493 0002 10B5 push {r4, lr} + 5494 .cfi_def_cfa_offset 8 + 5495 .cfi_offset 4, -8 + 5496 .cfi_offset 14, -4 + 5497 0004 0446 mov r4, r0 + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5498 .loc 1 282 3 is_stmt 1 view .LVU1746 + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5499 .loc 1 283 3 view .LVU1747 + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5500 .loc 1 284 3 view .LVU1748 + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5501 .loc 1 285 3 view .LVU1749 + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5502 .loc 1 286 3 view .LVU1750 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5503 .loc 1 288 3 view .LVU1751 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5504 .loc 1 288 11 is_stmt 0 view .LVU1752 + 5505 0006 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5506 .loc 1 288 6 view .LVU1753 + 5507 000a 13B3 cbz r3, .L338 + 5508 .LVL438: + 5509 .L332: + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5510 .loc 1 310 3 is_stmt 1 view .LVU1754 + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5511 .loc 1 310 15 is_stmt 0 view .LVU1755 + 5512 000c 0223 movs r3, #2 + 5513 000e 84F83D30 strb r3, [r4, #61] + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5514 .loc 1 313 3 is_stmt 1 view .LVU1756 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 256 + + + 5515 .loc 1 313 38 is_stmt 0 view .LVU1757 + 5516 0012 2146 mov r1, r4 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5517 .loc 1 313 3 view .LVU1758 + 5518 0014 51F8040B ldr r0, [r1], #4 + 5519 0018 FFF7FEFF bl TIM_Base_SetConfig + 5520 .LVL439: + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5521 .loc 1 316 3 is_stmt 1 view .LVU1759 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5522 .loc 1 316 23 is_stmt 0 view .LVU1760 + 5523 001c 0123 movs r3, #1 + 5524 001e 84F84830 strb r3, [r4, #72] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5525 .loc 1 319 3 is_stmt 1 view .LVU1761 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5526 .loc 1 319 3 view .LVU1762 + 5527 0022 84F83E30 strb r3, [r4, #62] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5528 .loc 1 319 3 view .LVU1763 + 5529 0026 84F83F30 strb r3, [r4, #63] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5530 .loc 1 319 3 view .LVU1764 + 5531 002a 84F84030 strb r3, [r4, #64] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5532 .loc 1 319 3 view .LVU1765 + 5533 002e 84F84130 strb r3, [r4, #65] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5534 .loc 1 319 3 view .LVU1766 + 5535 0032 84F84230 strb r3, [r4, #66] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5536 .loc 1 319 3 view .LVU1767 + 5537 0036 84F84330 strb r3, [r4, #67] + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5538 .loc 1 319 3 view .LVU1768 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5539 .loc 1 320 3 view .LVU1769 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5540 .loc 1 320 3 view .LVU1770 + 5541 003a 84F84430 strb r3, [r4, #68] + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5542 .loc 1 320 3 view .LVU1771 + 5543 003e 84F84530 strb r3, [r4, #69] + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5544 .loc 1 320 3 view .LVU1772 + 5545 0042 84F84630 strb r3, [r4, #70] + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5546 .loc 1 320 3 view .LVU1773 + 5547 0046 84F84730 strb r3, [r4, #71] + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5548 .loc 1 320 3 view .LVU1774 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5549 .loc 1 323 3 view .LVU1775 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5550 .loc 1 323 15 is_stmt 0 view .LVU1776 + 5551 004a 84F83D30 strb r3, [r4, #61] + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 257 + + + 5552 .loc 1 325 3 is_stmt 1 view .LVU1777 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5553 .loc 1 325 10 is_stmt 0 view .LVU1778 + 5554 004e 0020 movs r0, #0 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5555 .loc 1 326 1 view .LVU1779 + 5556 0050 10BD pop {r4, pc} + 5557 .LVL440: + 5558 .L338: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5559 .loc 1 291 5 is_stmt 1 view .LVU1780 + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5560 .loc 1 291 16 is_stmt 0 view .LVU1781 + 5561 0052 80F83C30 strb r3, [r0, #60] + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5562 .loc 1 305 5 is_stmt 1 view .LVU1782 + 5563 0056 FFF7FEFF bl HAL_TIM_Base_MspInit + 5564 .LVL441: + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5565 .loc 1 305 5 is_stmt 0 view .LVU1783 + 5566 005a D7E7 b .L332 + 5567 .LVL442: + 5568 .L333: + 5569 .cfi_def_cfa_offset 0 + 5570 .cfi_restore 4 + 5571 .cfi_restore 14 + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5572 .loc 1 278 12 view .LVU1784 + 5573 005c 0120 movs r0, #1 + 5574 .LVL443: + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5575 .loc 1 326 1 view .LVU1785 + 5576 005e 7047 bx lr + 5577 .cfi_endproc + 5578 .LFE130: + 5580 .section .text.HAL_TIM_OC_Init,"ax",%progbits + 5581 .align 1 + 5582 .global HAL_TIM_OC_Init + 5583 .syntax unified + 5584 .thumb + 5585 .thumb_func + 5587 HAL_TIM_OC_Init: + 5588 .LVL444: + 5589 .LFB140: + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5590 .loc 1 658 1 is_stmt 1 view -0 + 5591 .cfi_startproc + 5592 @ args = 0, pretend = 0, frame = 0 + 5593 @ frame_needed = 0, uses_anonymous_args = 0 + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5594 .loc 1 660 3 view .LVU1787 + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5595 .loc 1 660 6 is_stmt 0 view .LVU1788 + 5596 0000 60B3 cbz r0, .L342 + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5597 .loc 1 658 1 view .LVU1789 + 5598 0002 10B5 push {r4, lr} + ARM GAS /tmp/cc0aF2h1.s page 258 + + + 5599 .cfi_def_cfa_offset 8 + 5600 .cfi_offset 4, -8 + 5601 .cfi_offset 14, -4 + 5602 0004 0446 mov r4, r0 + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5603 .loc 1 666 3 is_stmt 1 view .LVU1790 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5604 .loc 1 667 3 view .LVU1791 + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5605 .loc 1 668 3 view .LVU1792 + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5606 .loc 1 669 3 view .LVU1793 + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5607 .loc 1 670 3 view .LVU1794 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5608 .loc 1 672 3 view .LVU1795 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5609 .loc 1 672 11 is_stmt 0 view .LVU1796 + 5610 0006 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5611 .loc 1 672 6 view .LVU1797 + 5612 000a 13B3 cbz r3, .L347 + 5613 .LVL445: + 5614 .L341: + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5615 .loc 1 694 3 is_stmt 1 view .LVU1798 + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5616 .loc 1 694 15 is_stmt 0 view .LVU1799 + 5617 000c 0223 movs r3, #2 + 5618 000e 84F83D30 strb r3, [r4, #61] + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5619 .loc 1 697 3 is_stmt 1 view .LVU1800 + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5620 .loc 1 697 39 is_stmt 0 view .LVU1801 + 5621 0012 2146 mov r1, r4 + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5622 .loc 1 697 3 view .LVU1802 + 5623 0014 51F8040B ldr r0, [r1], #4 + 5624 0018 FFF7FEFF bl TIM_Base_SetConfig + 5625 .LVL446: + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5626 .loc 1 700 3 is_stmt 1 view .LVU1803 + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5627 .loc 1 700 23 is_stmt 0 view .LVU1804 + 5628 001c 0123 movs r3, #1 + 5629 001e 84F84830 strb r3, [r4, #72] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5630 .loc 1 703 3 is_stmt 1 view .LVU1805 + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5631 .loc 1 703 3 view .LVU1806 + 5632 0022 84F83E30 strb r3, [r4, #62] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5633 .loc 1 703 3 view .LVU1807 + 5634 0026 84F83F30 strb r3, [r4, #63] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5635 .loc 1 703 3 view .LVU1808 + 5636 002a 84F84030 strb r3, [r4, #64] + ARM GAS /tmp/cc0aF2h1.s page 259 + + + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5637 .loc 1 703 3 view .LVU1809 + 5638 002e 84F84130 strb r3, [r4, #65] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5639 .loc 1 703 3 view .LVU1810 + 5640 0032 84F84230 strb r3, [r4, #66] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5641 .loc 1 703 3 view .LVU1811 + 5642 0036 84F84330 strb r3, [r4, #67] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5643 .loc 1 703 3 view .LVU1812 + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5644 .loc 1 704 3 view .LVU1813 + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5645 .loc 1 704 3 view .LVU1814 + 5646 003a 84F84430 strb r3, [r4, #68] + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5647 .loc 1 704 3 view .LVU1815 + 5648 003e 84F84530 strb r3, [r4, #69] + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5649 .loc 1 704 3 view .LVU1816 + 5650 0042 84F84630 strb r3, [r4, #70] + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5651 .loc 1 704 3 view .LVU1817 + 5652 0046 84F84730 strb r3, [r4, #71] + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5653 .loc 1 704 3 view .LVU1818 + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5654 .loc 1 707 3 view .LVU1819 + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5655 .loc 1 707 15 is_stmt 0 view .LVU1820 + 5656 004a 84F83D30 strb r3, [r4, #61] + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5657 .loc 1 709 3 is_stmt 1 view .LVU1821 + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5658 .loc 1 709 10 is_stmt 0 view .LVU1822 + 5659 004e 0020 movs r0, #0 + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5660 .loc 1 710 1 view .LVU1823 + 5661 0050 10BD pop {r4, pc} + 5662 .LVL447: + 5663 .L347: + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5664 .loc 1 675 5 is_stmt 1 view .LVU1824 + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5665 .loc 1 675 16 is_stmt 0 view .LVU1825 + 5666 0052 80F83C30 strb r3, [r0, #60] + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5667 .loc 1 689 5 is_stmt 1 view .LVU1826 + 5668 0056 FFF7FEFF bl HAL_TIM_OC_MspInit + 5669 .LVL448: + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5670 .loc 1 689 5 is_stmt 0 view .LVU1827 + 5671 005a D7E7 b .L341 + 5672 .LVL449: + 5673 .L342: + 5674 .cfi_def_cfa_offset 0 + ARM GAS /tmp/cc0aF2h1.s page 260 + + + 5675 .cfi_restore 4 + 5676 .cfi_restore 14 + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5677 .loc 1 662 12 view .LVU1828 + 5678 005c 0120 movs r0, #1 + 5679 .LVL450: + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5680 .loc 1 710 1 view .LVU1829 + 5681 005e 7047 bx lr + 5682 .cfi_endproc + 5683 .LFE140: + 5685 .section .text.HAL_TIM_PWM_Init,"ax",%progbits + 5686 .align 1 + 5687 .global HAL_TIM_PWM_Init + 5688 .syntax unified + 5689 .thumb + 5690 .thumb_func + 5692 HAL_TIM_PWM_Init: + 5693 .LVL451: + 5694 .LFB150: +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5695 .loc 1 1329 1 is_stmt 1 view -0 + 5696 .cfi_startproc + 5697 @ args = 0, pretend = 0, frame = 0 + 5698 @ frame_needed = 0, uses_anonymous_args = 0 +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5699 .loc 1 1331 3 view .LVU1831 +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5700 .loc 1 1331 6 is_stmt 0 view .LVU1832 + 5701 0000 60B3 cbz r0, .L351 +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5702 .loc 1 1329 1 view .LVU1833 + 5703 0002 10B5 push {r4, lr} + 5704 .cfi_def_cfa_offset 8 + 5705 .cfi_offset 4, -8 + 5706 .cfi_offset 14, -4 + 5707 0004 0446 mov r4, r0 +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5708 .loc 1 1337 3 is_stmt 1 view .LVU1834 +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5709 .loc 1 1338 3 view .LVU1835 +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5710 .loc 1 1339 3 view .LVU1836 +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5711 .loc 1 1340 3 view .LVU1837 +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5712 .loc 1 1341 3 view .LVU1838 +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5713 .loc 1 1343 3 view .LVU1839 +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5714 .loc 1 1343 11 is_stmt 0 view .LVU1840 + 5715 0006 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5716 .loc 1 1343 6 view .LVU1841 + 5717 000a 13B3 cbz r3, .L356 + 5718 .LVL452: + 5719 .L350: + ARM GAS /tmp/cc0aF2h1.s page 261 + + +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5720 .loc 1 1365 3 is_stmt 1 view .LVU1842 +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5721 .loc 1 1365 15 is_stmt 0 view .LVU1843 + 5722 000c 0223 movs r3, #2 + 5723 000e 84F83D30 strb r3, [r4, #61] +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5724 .loc 1 1368 3 is_stmt 1 view .LVU1844 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5725 .loc 1 1368 38 is_stmt 0 view .LVU1845 + 5726 0012 2146 mov r1, r4 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5727 .loc 1 1368 3 view .LVU1846 + 5728 0014 51F8040B ldr r0, [r1], #4 + 5729 0018 FFF7FEFF bl TIM_Base_SetConfig + 5730 .LVL453: +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5731 .loc 1 1371 3 is_stmt 1 view .LVU1847 +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5732 .loc 1 1371 23 is_stmt 0 view .LVU1848 + 5733 001c 0123 movs r3, #1 + 5734 001e 84F84830 strb r3, [r4, #72] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5735 .loc 1 1374 3 is_stmt 1 view .LVU1849 +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5736 .loc 1 1374 3 view .LVU1850 + 5737 0022 84F83E30 strb r3, [r4, #62] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5738 .loc 1 1374 3 view .LVU1851 + 5739 0026 84F83F30 strb r3, [r4, #63] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5740 .loc 1 1374 3 view .LVU1852 + 5741 002a 84F84030 strb r3, [r4, #64] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5742 .loc 1 1374 3 view .LVU1853 + 5743 002e 84F84130 strb r3, [r4, #65] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5744 .loc 1 1374 3 view .LVU1854 + 5745 0032 84F84230 strb r3, [r4, #66] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5746 .loc 1 1374 3 view .LVU1855 + 5747 0036 84F84330 strb r3, [r4, #67] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5748 .loc 1 1374 3 view .LVU1856 +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5749 .loc 1 1375 3 view .LVU1857 +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5750 .loc 1 1375 3 view .LVU1858 + 5751 003a 84F84430 strb r3, [r4, #68] +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5752 .loc 1 1375 3 view .LVU1859 + 5753 003e 84F84530 strb r3, [r4, #69] +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5754 .loc 1 1375 3 view .LVU1860 + 5755 0042 84F84630 strb r3, [r4, #70] +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5756 .loc 1 1375 3 view .LVU1861 + ARM GAS /tmp/cc0aF2h1.s page 262 + + + 5757 0046 84F84730 strb r3, [r4, #71] +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5758 .loc 1 1375 3 view .LVU1862 +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5759 .loc 1 1378 3 view .LVU1863 +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5760 .loc 1 1378 15 is_stmt 0 view .LVU1864 + 5761 004a 84F83D30 strb r3, [r4, #61] +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5762 .loc 1 1380 3 is_stmt 1 view .LVU1865 +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5763 .loc 1 1380 10 is_stmt 0 view .LVU1866 + 5764 004e 0020 movs r0, #0 +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5765 .loc 1 1381 1 view .LVU1867 + 5766 0050 10BD pop {r4, pc} + 5767 .LVL454: + 5768 .L356: +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5769 .loc 1 1346 5 is_stmt 1 view .LVU1868 +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5770 .loc 1 1346 16 is_stmt 0 view .LVU1869 + 5771 0052 80F83C30 strb r3, [r0, #60] +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5772 .loc 1 1360 5 is_stmt 1 view .LVU1870 + 5773 0056 FFF7FEFF bl HAL_TIM_PWM_MspInit + 5774 .LVL455: +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5775 .loc 1 1360 5 is_stmt 0 view .LVU1871 + 5776 005a D7E7 b .L350 + 5777 .LVL456: + 5778 .L351: + 5779 .cfi_def_cfa_offset 0 + 5780 .cfi_restore 4 + 5781 .cfi_restore 14 +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5782 .loc 1 1333 12 view .LVU1872 + 5783 005c 0120 movs r0, #1 + 5784 .LVL457: +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5785 .loc 1 1381 1 view .LVU1873 + 5786 005e 7047 bx lr + 5787 .cfi_endproc + 5788 .LFE150: + 5790 .section .text.HAL_TIM_IC_Init,"ax",%progbits + 5791 .align 1 + 5792 .global HAL_TIM_IC_Init + 5793 .syntax unified + 5794 .thumb + 5795 .thumb_func + 5797 HAL_TIM_IC_Init: + 5798 .LVL458: + 5799 .LFB160: +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5800 .loc 1 1999 1 is_stmt 1 view -0 + 5801 .cfi_startproc + 5802 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc0aF2h1.s page 263 + + + 5803 @ frame_needed = 0, uses_anonymous_args = 0 +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5804 .loc 1 2001 3 view .LVU1875 +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5805 .loc 1 2001 6 is_stmt 0 view .LVU1876 + 5806 0000 60B3 cbz r0, .L360 +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5807 .loc 1 1999 1 view .LVU1877 + 5808 0002 10B5 push {r4, lr} + 5809 .cfi_def_cfa_offset 8 + 5810 .cfi_offset 4, -8 + 5811 .cfi_offset 14, -4 + 5812 0004 0446 mov r4, r0 +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5813 .loc 1 2007 3 is_stmt 1 view .LVU1878 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5814 .loc 1 2008 3 view .LVU1879 +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5815 .loc 1 2009 3 view .LVU1880 +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5816 .loc 1 2010 3 view .LVU1881 +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5817 .loc 1 2011 3 view .LVU1882 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5818 .loc 1 2013 3 view .LVU1883 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5819 .loc 1 2013 11 is_stmt 0 view .LVU1884 + 5820 0006 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5821 .loc 1 2013 6 view .LVU1885 + 5822 000a 13B3 cbz r3, .L365 + 5823 .LVL459: + 5824 .L359: +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5825 .loc 1 2035 3 is_stmt 1 view .LVU1886 +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5826 .loc 1 2035 15 is_stmt 0 view .LVU1887 + 5827 000c 0223 movs r3, #2 + 5828 000e 84F83D30 strb r3, [r4, #61] +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5829 .loc 1 2038 3 is_stmt 1 view .LVU1888 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5830 .loc 1 2038 38 is_stmt 0 view .LVU1889 + 5831 0012 2146 mov r1, r4 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5832 .loc 1 2038 3 view .LVU1890 + 5833 0014 51F8040B ldr r0, [r1], #4 + 5834 0018 FFF7FEFF bl TIM_Base_SetConfig + 5835 .LVL460: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5836 .loc 1 2041 3 is_stmt 1 view .LVU1891 +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5837 .loc 1 2041 23 is_stmt 0 view .LVU1892 + 5838 001c 0123 movs r3, #1 + 5839 001e 84F84830 strb r3, [r4, #72] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5840 .loc 1 2044 3 is_stmt 1 view .LVU1893 + ARM GAS /tmp/cc0aF2h1.s page 264 + + +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5841 .loc 1 2044 3 view .LVU1894 + 5842 0022 84F83E30 strb r3, [r4, #62] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5843 .loc 1 2044 3 view .LVU1895 + 5844 0026 84F83F30 strb r3, [r4, #63] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5845 .loc 1 2044 3 view .LVU1896 + 5846 002a 84F84030 strb r3, [r4, #64] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5847 .loc 1 2044 3 view .LVU1897 + 5848 002e 84F84130 strb r3, [r4, #65] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5849 .loc 1 2044 3 view .LVU1898 + 5850 0032 84F84230 strb r3, [r4, #66] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5851 .loc 1 2044 3 view .LVU1899 + 5852 0036 84F84330 strb r3, [r4, #67] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5853 .loc 1 2044 3 view .LVU1900 +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5854 .loc 1 2045 3 view .LVU1901 +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5855 .loc 1 2045 3 view .LVU1902 + 5856 003a 84F84430 strb r3, [r4, #68] +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5857 .loc 1 2045 3 view .LVU1903 + 5858 003e 84F84530 strb r3, [r4, #69] +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5859 .loc 1 2045 3 view .LVU1904 + 5860 0042 84F84630 strb r3, [r4, #70] +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5861 .loc 1 2045 3 view .LVU1905 + 5862 0046 84F84730 strb r3, [r4, #71] +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5863 .loc 1 2045 3 view .LVU1906 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5864 .loc 1 2048 3 view .LVU1907 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5865 .loc 1 2048 15 is_stmt 0 view .LVU1908 + 5866 004a 84F83D30 strb r3, [r4, #61] +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5867 .loc 1 2050 3 is_stmt 1 view .LVU1909 +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5868 .loc 1 2050 10 is_stmt 0 view .LVU1910 + 5869 004e 0020 movs r0, #0 +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5870 .loc 1 2051 1 view .LVU1911 + 5871 0050 10BD pop {r4, pc} + 5872 .LVL461: + 5873 .L365: +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5874 .loc 1 2016 5 is_stmt 1 view .LVU1912 +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5875 .loc 1 2016 16 is_stmt 0 view .LVU1913 + 5876 0052 80F83C30 strb r3, [r0, #60] +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + ARM GAS /tmp/cc0aF2h1.s page 265 + + + 5877 .loc 1 2030 5 is_stmt 1 view .LVU1914 + 5878 0056 FFF7FEFF bl HAL_TIM_IC_MspInit + 5879 .LVL462: +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5880 .loc 1 2030 5 is_stmt 0 view .LVU1915 + 5881 005a D7E7 b .L359 + 5882 .LVL463: + 5883 .L360: + 5884 .cfi_def_cfa_offset 0 + 5885 .cfi_restore 4 + 5886 .cfi_restore 14 +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5887 .loc 1 2003 12 view .LVU1916 + 5888 005c 0120 movs r0, #1 + 5889 .LVL464: +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5890 .loc 1 2051 1 view .LVU1917 + 5891 005e 7047 bx lr + 5892 .cfi_endproc + 5893 .LFE160: + 5895 .section .text.HAL_TIM_OnePulse_Init,"ax",%progbits + 5896 .align 1 + 5897 .global HAL_TIM_OnePulse_Init + 5898 .syntax unified + 5899 .thumb + 5900 .thumb_func + 5902 HAL_TIM_OnePulse_Init: + 5903 .LVL465: + 5904 .LFB170: +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5905 .loc 1 2648 1 is_stmt 1 view -0 + 5906 .cfi_startproc + 5907 @ args = 0, pretend = 0, frame = 0 + 5908 @ frame_needed = 0, uses_anonymous_args = 0 +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5909 .loc 1 2650 3 view .LVU1919 +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5910 .loc 1 2650 6 is_stmt 0 view .LVU1920 + 5911 0000 50B3 cbz r0, .L369 +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5912 .loc 1 2648 1 view .LVU1921 + 5913 0002 38B5 push {r3, r4, r5, lr} + 5914 .cfi_def_cfa_offset 16 + 5915 .cfi_offset 3, -16 + 5916 .cfi_offset 4, -12 + 5917 .cfi_offset 5, -8 + 5918 .cfi_offset 14, -4 + 5919 0004 0D46 mov r5, r1 + 5920 0006 0446 mov r4, r0 +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5921 .loc 1 2656 3 is_stmt 1 view .LVU1922 +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5922 .loc 1 2657 3 view .LVU1923 +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); + 5923 .loc 1 2658 3 view .LVU1924 +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5924 .loc 1 2659 3 view .LVU1925 + ARM GAS /tmp/cc0aF2h1.s page 266 + + +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5925 .loc 1 2660 3 view .LVU1926 +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5926 .loc 1 2661 3 view .LVU1927 +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5927 .loc 1 2663 3 view .LVU1928 +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5928 .loc 1 2663 11 is_stmt 0 view .LVU1929 + 5929 0008 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 5930 .loc 1 2663 6 view .LVU1930 + 5931 000c FBB1 cbz r3, .L374 + 5932 .LVL466: + 5933 .L368: +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5934 .loc 1 2685 3 is_stmt 1 view .LVU1931 +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5935 .loc 1 2685 15 is_stmt 0 view .LVU1932 + 5936 000e 0223 movs r3, #2 + 5937 0010 84F83D30 strb r3, [r4, #61] +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5938 .loc 1 2688 3 is_stmt 1 view .LVU1933 +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5939 .loc 1 2688 38 is_stmt 0 view .LVU1934 + 5940 0014 2146 mov r1, r4 +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5941 .loc 1 2688 3 view .LVU1935 + 5942 0016 51F8040B ldr r0, [r1], #4 + 5943 001a FFF7FEFF bl TIM_Base_SetConfig + 5944 .LVL467: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5945 .loc 1 2691 3 is_stmt 1 view .LVU1936 +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5946 .loc 1 2691 7 is_stmt 0 view .LVU1937 + 5947 001e 2268 ldr r2, [r4] +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5948 .loc 1 2691 17 view .LVU1938 + 5949 0020 1368 ldr r3, [r2] +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5950 .loc 1 2691 23 view .LVU1939 + 5951 0022 23F00803 bic r3, r3, #8 + 5952 0026 1360 str r3, [r2] +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5953 .loc 1 2694 3 is_stmt 1 view .LVU1940 +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5954 .loc 1 2694 7 is_stmt 0 view .LVU1941 + 5955 0028 2268 ldr r2, [r4] +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5956 .loc 1 2694 17 view .LVU1942 + 5957 002a 1368 ldr r3, [r2] +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5958 .loc 1 2694 23 view .LVU1943 + 5959 002c 2B43 orrs r3, r3, r5 + 5960 002e 1360 str r3, [r2] +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5961 .loc 1 2697 3 is_stmt 1 view .LVU1944 +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 267 + + + 5962 .loc 1 2697 23 is_stmt 0 view .LVU1945 + 5963 0030 0123 movs r3, #1 + 5964 0032 84F84830 strb r3, [r4, #72] +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5965 .loc 1 2700 3 is_stmt 1 view .LVU1946 + 5966 0036 84F83E30 strb r3, [r4, #62] +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 5967 .loc 1 2701 3 view .LVU1947 + 5968 003a 84F83F30 strb r3, [r4, #63] +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5969 .loc 1 2702 3 view .LVU1948 + 5970 003e 84F84430 strb r3, [r4, #68] +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5971 .loc 1 2703 3 view .LVU1949 + 5972 0042 84F84530 strb r3, [r4, #69] +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5973 .loc 1 2706 3 view .LVU1950 +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5974 .loc 1 2706 15 is_stmt 0 view .LVU1951 + 5975 0046 84F83D30 strb r3, [r4, #61] +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5976 .loc 1 2708 3 is_stmt 1 view .LVU1952 +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5977 .loc 1 2708 10 is_stmt 0 view .LVU1953 + 5978 004a 0020 movs r0, #0 +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5979 .loc 1 2709 1 view .LVU1954 + 5980 004c 38BD pop {r3, r4, r5, pc} + 5981 .LVL468: + 5982 .L374: +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5983 .loc 1 2666 5 is_stmt 1 view .LVU1955 +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 5984 .loc 1 2666 16 is_stmt 0 view .LVU1956 + 5985 004e 80F83C30 strb r3, [r0, #60] +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5986 .loc 1 2680 5 is_stmt 1 view .LVU1957 + 5987 0052 FFF7FEFF bl HAL_TIM_OnePulse_MspInit + 5988 .LVL469: +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5989 .loc 1 2680 5 is_stmt 0 view .LVU1958 + 5990 0056 DAE7 b .L368 + 5991 .LVL470: + 5992 .L369: + 5993 .cfi_def_cfa_offset 0 + 5994 .cfi_restore 3 + 5995 .cfi_restore 4 + 5996 .cfi_restore 5 + 5997 .cfi_restore 14 +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 5998 .loc 1 2652 12 view .LVU1959 + 5999 0058 0120 movs r0, #1 + 6000 .LVL471: +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6001 .loc 1 2709 1 view .LVU1960 + 6002 005a 7047 bx lr + 6003 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 268 + + + 6004 .LFE170: + 6006 .section .text.HAL_TIM_Encoder_Init,"ax",%progbits + 6007 .align 1 + 6008 .global HAL_TIM_Encoder_Init + 6009 .syntax unified + 6010 .thumb + 6011 .thumb_func + 6013 HAL_TIM_Encoder_Init: + 6014 .LVL472: + 6015 .LFB178: +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 6016 .loc 1 3039 1 is_stmt 1 view -0 + 6017 .cfi_startproc + 6018 @ args = 0, pretend = 0, frame = 0 + 6019 @ frame_needed = 0, uses_anonymous_args = 0 +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 6020 .loc 1 3040 3 view .LVU1962 +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 6021 .loc 1 3041 3 view .LVU1963 +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6022 .loc 1 3042 3 view .LVU1964 +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6023 .loc 1 3045 3 view .LVU1965 +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6024 .loc 1 3045 6 is_stmt 0 view .LVU1966 + 6025 0000 0028 cmp r0, #0 + 6026 0002 53D0 beq .L378 +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 6027 .loc 1 3039 1 view .LVU1967 + 6028 0004 F8B5 push {r3, r4, r5, r6, r7, lr} + 6029 .cfi_def_cfa_offset 24 + 6030 .cfi_offset 3, -24 + 6031 .cfi_offset 4, -20 + 6032 .cfi_offset 5, -16 + 6033 .cfi_offset 6, -12 + 6034 .cfi_offset 7, -8 + 6035 .cfi_offset 14, -4 + 6036 0006 0D46 mov r5, r1 + 6037 0008 0446 mov r4, r0 +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 6038 .loc 1 3051 3 is_stmt 1 view .LVU1968 +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 6039 .loc 1 3052 3 view .LVU1969 +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 6040 .loc 1 3053 3 view .LVU1970 +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); + 6041 .loc 1 3054 3 view .LVU1971 +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); + 6042 .loc 1 3055 3 view .LVU1972 +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); + 6043 .loc 1 3056 3 view .LVU1973 +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); + 6044 .loc 1 3057 3 view .LVU1974 +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); + 6045 .loc 1 3058 3 view .LVU1975 +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 6046 .loc 1 3059 3 view .LVU1976 + ARM GAS /tmp/cc0aF2h1.s page 269 + + +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); + 6047 .loc 1 3060 3 view .LVU1977 +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 6048 .loc 1 3061 3 view .LVU1978 +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); + 6049 .loc 1 3062 3 view .LVU1979 +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 6050 .loc 1 3063 3 view .LVU1980 +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6051 .loc 1 3064 3 view .LVU1981 +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6052 .loc 1 3066 3 view .LVU1982 +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6053 .loc 1 3066 11 is_stmt 0 view .LVU1983 + 6054 000a 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6055 .loc 1 3066 6 view .LVU1984 + 6056 000e 002B cmp r3, #0 + 6057 0010 47D0 beq .L383 + 6058 .LVL473: + 6059 .L377: +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6060 .loc 1 3088 3 is_stmt 1 view .LVU1985 +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6061 .loc 1 3088 15 is_stmt 0 view .LVU1986 + 6062 0012 0223 movs r3, #2 + 6063 0014 84F83D30 strb r3, [r4, #61] +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6064 .loc 1 3091 3 is_stmt 1 view .LVU1987 +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6065 .loc 1 3091 7 is_stmt 0 view .LVU1988 + 6066 0018 2268 ldr r2, [r4] +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6067 .loc 1 3091 17 view .LVU1989 + 6068 001a 9368 ldr r3, [r2, #8] +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6069 .loc 1 3091 24 view .LVU1990 + 6070 001c 23F4A033 bic r3, r3, #81920 + 6071 0020 23F00703 bic r3, r3, #7 + 6072 0024 9360 str r3, [r2, #8] +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6073 .loc 1 3094 3 is_stmt 1 view .LVU1991 +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6074 .loc 1 3094 38 is_stmt 0 view .LVU1992 + 6075 0026 2146 mov r1, r4 +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6076 .loc 1 3094 3 view .LVU1993 + 6077 0028 51F8040B ldr r0, [r1], #4 + 6078 002c FFF7FEFF bl TIM_Base_SetConfig + 6079 .LVL474: +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6080 .loc 1 3097 3 is_stmt 1 view .LVU1994 +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6081 .loc 1 3097 17 is_stmt 0 view .LVU1995 + 6082 0030 2168 ldr r1, [r4] +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6083 .loc 1 3097 11 view .LVU1996 + ARM GAS /tmp/cc0aF2h1.s page 270 + + + 6084 0032 8B68 ldr r3, [r1, #8] + 6085 .LVL475: +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6086 .loc 1 3100 3 is_stmt 1 view .LVU1997 +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6087 .loc 1 3100 12 is_stmt 0 view .LVU1998 + 6088 0034 8A69 ldr r2, [r1, #24] + 6089 .LVL476: +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6090 .loc 1 3103 3 is_stmt 1 view .LVU1999 +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6091 .loc 1 3103 11 is_stmt 0 view .LVU2000 + 6092 0036 0E6A ldr r6, [r1, #32] + 6093 .LVL477: +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6094 .loc 1 3106 3 is_stmt 1 view .LVU2001 +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6095 .loc 1 3106 21 is_stmt 0 view .LVU2002 + 6096 0038 2868 ldr r0, [r5] +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6097 .loc 1 3106 11 view .LVU2003 + 6098 003a 1843 orrs r0, r0, r3 + 6099 .LVL478: +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6100 .loc 1 3109 3 is_stmt 1 view .LVU2004 +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6101 .loc 1 3109 12 is_stmt 0 view .LVU2005 + 6102 003c 22F44072 bic r2, r2, #768 + 6103 .LVL479: +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6104 .loc 1 3109 12 view .LVU2006 + 6105 0040 22F00302 bic r2, r2, #3 + 6106 .LVL480: +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6107 .loc 1 3110 3 is_stmt 1 view .LVU2007 +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6108 .loc 1 3110 23 is_stmt 0 view .LVU2008 + 6109 0044 AB68 ldr r3, [r5, #8] +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6110 .loc 1 3110 38 view .LVU2009 + 6111 0046 AF69 ldr r7, [r5, #24] + 6112 0048 43EA0723 orr r3, r3, r7, lsl #8 +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6113 .loc 1 3110 12 view .LVU2010 + 6114 004c 1343 orrs r3, r3, r2 + 6115 .LVL481: +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); + 6116 .loc 1 3113 3 is_stmt 1 view .LVU2011 +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6117 .loc 1 3114 3 view .LVU2012 +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6118 .loc 1 3114 12 is_stmt 0 view .LVU2013 + 6119 004e 23F47C43 bic r3, r3, #64512 + 6120 .LVL482: +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6121 .loc 1 3114 12 view .LVU2014 + 6122 0052 23F0FC03 bic r3, r3, #252 + ARM GAS /tmp/cc0aF2h1.s page 271 + + + 6123 .LVL483: +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6124 .loc 1 3115 3 is_stmt 1 view .LVU2015 +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6125 .loc 1 3115 22 is_stmt 0 view .LVU2016 + 6126 0056 EA68 ldr r2, [r5, #12] +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6127 .loc 1 3115 37 view .LVU2017 + 6128 0058 EF69 ldr r7, [r5, #28] + 6129 005a 42EA0722 orr r2, r2, r7, lsl #8 +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6130 .loc 1 3115 12 view .LVU2018 + 6131 005e 1A43 orrs r2, r2, r3 + 6132 .LVL484: +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6133 .loc 1 3116 3 is_stmt 1 view .LVU2019 +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6134 .loc 1 3116 52 is_stmt 0 view .LVU2020 + 6135 0060 2B6A ldr r3, [r5, #32] +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6136 .loc 1 3116 64 view .LVU2021 + 6137 0062 1B03 lsls r3, r3, #12 +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6138 .loc 1 3116 42 view .LVU2022 + 6139 0064 2F69 ldr r7, [r5, #16] + 6140 0066 43EA0713 orr r3, r3, r7, lsl #4 +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6141 .loc 1 3116 12 view .LVU2023 + 6142 006a 1343 orrs r3, r3, r2 + 6143 .LVL485: +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); + 6144 .loc 1 3119 3 is_stmt 1 view .LVU2024 +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 6145 .loc 1 3120 3 view .LVU2025 +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 6146 .loc 1 3120 11 is_stmt 0 view .LVU2026 + 6147 006c 26F0AA06 bic r6, r6, #170 + 6148 .LVL486: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6149 .loc 1 3121 3 is_stmt 1 view .LVU2027 +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6150 .loc 1 3121 21 is_stmt 0 view .LVU2028 + 6151 0070 6A68 ldr r2, [r5, #4] +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6152 .loc 1 3121 45 view .LVU2029 + 6153 0072 6D69 ldr r5, [r5, #20] + 6154 .LVL487: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6155 .loc 1 3121 35 view .LVU2030 + 6156 0074 42EA0512 orr r2, r2, r5, lsl #4 +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6157 .loc 1 3121 11 view .LVU2031 + 6158 0078 3243 orrs r2, r2, r6 + 6159 .LVL488: +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6160 .loc 1 3124 3 is_stmt 1 view .LVU2032 +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 272 + + + 6161 .loc 1 3124 24 is_stmt 0 view .LVU2033 + 6162 007a 8860 str r0, [r1, #8] +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6163 .loc 1 3127 3 is_stmt 1 view .LVU2034 +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6164 .loc 1 3127 7 is_stmt 0 view .LVU2035 + 6165 007c 2168 ldr r1, [r4] +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6166 .loc 1 3127 25 view .LVU2036 + 6167 007e 8B61 str r3, [r1, #24] +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6168 .loc 1 3130 3 is_stmt 1 view .LVU2037 +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6169 .loc 1 3130 7 is_stmt 0 view .LVU2038 + 6170 0080 2368 ldr r3, [r4] + 6171 .LVL489: +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6172 .loc 1 3130 24 view .LVU2039 + 6173 0082 1A62 str r2, [r3, #32] + 6174 .LVL490: +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6175 .loc 1 3133 3 is_stmt 1 view .LVU2040 +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6176 .loc 1 3133 23 is_stmt 0 view .LVU2041 + 6177 0084 0123 movs r3, #1 + 6178 0086 84F84830 strb r3, [r4, #72] +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6179 .loc 1 3136 3 is_stmt 1 view .LVU2042 + 6180 008a 84F83E30 strb r3, [r4, #62] +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 6181 .loc 1 3137 3 view .LVU2043 + 6182 008e 84F83F30 strb r3, [r4, #63] +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6183 .loc 1 3138 3 view .LVU2044 + 6184 0092 84F84430 strb r3, [r4, #68] +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6185 .loc 1 3139 3 view .LVU2045 + 6186 0096 84F84530 strb r3, [r4, #69] +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6187 .loc 1 3142 3 view .LVU2046 +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6188 .loc 1 3142 15 is_stmt 0 view .LVU2047 + 6189 009a 84F83D30 strb r3, [r4, #61] +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6190 .loc 1 3144 3 is_stmt 1 view .LVU2048 +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6191 .loc 1 3144 10 is_stmt 0 view .LVU2049 + 6192 009e 0020 movs r0, #0 + 6193 .LVL491: +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6194 .loc 1 3145 1 view .LVU2050 + 6195 00a0 F8BD pop {r3, r4, r5, r6, r7, pc} + 6196 .LVL492: + 6197 .L383: +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6198 .loc 1 3069 5 is_stmt 1 view .LVU2051 +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 273 + + + 6199 .loc 1 3069 16 is_stmt 0 view .LVU2052 + 6200 00a2 80F83C30 strb r3, [r0, #60] +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6201 .loc 1 3083 5 is_stmt 1 view .LVU2053 + 6202 00a6 FFF7FEFF bl HAL_TIM_Encoder_MspInit + 6203 .LVL493: +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6204 .loc 1 3083 5 is_stmt 0 view .LVU2054 + 6205 00aa B2E7 b .L377 + 6206 .LVL494: + 6207 .L378: + 6208 .cfi_def_cfa_offset 0 + 6209 .cfi_restore 3 + 6210 .cfi_restore 4 + 6211 .cfi_restore 5 + 6212 .cfi_restore 6 + 6213 .cfi_restore 7 + 6214 .cfi_restore 14 +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6215 .loc 1 3047 12 view .LVU2055 + 6216 00ac 0120 movs r0, #1 + 6217 .LVL495: +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6218 .loc 1 3145 1 view .LVU2056 + 6219 00ae 7047 bx lr + 6220 .cfi_endproc + 6221 .LFE178: + 6223 .section .text.TIM_OC2_SetConfig,"ax",%progbits + 6224 .align 1 + 6225 .global TIM_OC2_SetConfig + 6226 .syntax unified + 6227 .thumb + 6228 .thumb_func + 6230 TIM_OC2_SetConfig: + 6231 .LVL496: + 6232 .LFB236: +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 6233 .loc 1 7091 1 is_stmt 1 view -0 + 6234 .cfi_startproc + 6235 @ args = 0, pretend = 0, frame = 0 + 6236 @ frame_needed = 0, uses_anonymous_args = 0 + 6237 @ link register save eliminated. +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmrx; + 6238 .loc 1 7091 1 is_stmt 0 view .LVU2058 + 6239 0000 30B4 push {r4, r5} + 6240 .cfi_def_cfa_offset 8 + 6241 .cfi_offset 4, -8 + 6242 .cfi_offset 5, -4 +7092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 6243 .loc 1 7092 3 is_stmt 1 view .LVU2059 +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpcr2; + 6244 .loc 1 7093 3 view .LVU2060 +7094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6245 .loc 1 7094 3 view .LVU2061 +7097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6246 .loc 1 7097 3 view .LVU2062 +7097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 274 + + + 6247 .loc 1 7097 7 is_stmt 0 view .LVU2063 + 6248 0002 036A ldr r3, [r0, #32] +7097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6249 .loc 1 7097 14 view .LVU2064 + 6250 0004 23F01003 bic r3, r3, #16 + 6251 0008 0362 str r3, [r0, #32] +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ + 6252 .loc 1 7100 3 is_stmt 1 view .LVU2065 +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Get the TIMx CR2 register value */ + 6253 .loc 1 7100 11 is_stmt 0 view .LVU2066 + 6254 000a 036A ldr r3, [r0, #32] + 6255 .LVL497: +7102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6256 .loc 1 7102 3 is_stmt 1 view .LVU2067 +7102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6257 .loc 1 7102 10 is_stmt 0 view .LVU2068 + 6258 000c 4268 ldr r2, [r0, #4] + 6259 .LVL498: +7105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6260 .loc 1 7105 3 is_stmt 1 view .LVU2069 +7105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6261 .loc 1 7105 12 is_stmt 0 view .LVU2070 + 6262 000e 8469 ldr r4, [r0, #24] + 6263 .LVL499: +7108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; + 6264 .loc 1 7108 3 is_stmt 1 view .LVU2071 +7109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6265 .loc 1 7109 3 view .LVU2072 +7109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6266 .loc 1 7109 12 is_stmt 0 view .LVU2073 + 6267 0010 24F0807C bic ip, r4, #16777216 + 6268 0014 2CF4E64C bic ip, ip, #29440 + 6269 .LVL500: +7112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6270 .loc 1 7112 3 is_stmt 1 view .LVU2074 +7112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6271 .loc 1 7112 25 is_stmt 0 view .LVU2075 + 6272 0018 0C68 ldr r4, [r1] +7112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6273 .loc 1 7112 12 view .LVU2076 + 6274 001a 4CEA0424 orr r4, ip, r4, lsl #8 + 6275 .LVL501: +7115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ + 6276 .loc 1 7115 3 is_stmt 1 view .LVU2077 +7115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output Compare Polarity */ + 6277 .loc 1 7115 11 is_stmt 0 view .LVU2078 + 6278 001e 23F02003 bic r3, r3, #32 + 6279 .LVL502: +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6280 .loc 1 7117 3 is_stmt 1 view .LVU2079 +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6281 .loc 1 7117 24 is_stmt 0 view .LVU2080 + 6282 0022 8D68 ldr r5, [r1, #8] +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6283 .loc 1 7117 11 view .LVU2081 + 6284 0024 43EA0513 orr r3, r3, r5, lsl #4 + 6285 .LVL503: + ARM GAS /tmp/cc0aF2h1.s page 275 + + +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6286 .loc 1 7119 3 is_stmt 1 view .LVU2082 +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6287 .loc 1 7119 6 is_stmt 0 view .LVU2083 + 6288 0028 124D ldr r5, .L390 + 6289 002a A842 cmp r0, r5 + 6290 002c 0BD0 beq .L389 +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6291 .loc 1 7132 3 is_stmt 1 view .LVU2084 +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6292 .loc 1 7132 7 is_stmt 0 discriminator 1 view .LVU2085 + 6293 002e 124D ldr r5, .L390+4 + 6294 0030 A842 cmp r0, r5 + 6295 0032 0FD0 beq .L386 +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6296 .loc 1 7132 7 discriminator 2 view .LVU2086 + 6297 0034 05F58065 add r5, r5, #1024 + 6298 0038 A842 cmp r0, r5 + 6299 003a 0BD0 beq .L386 +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6300 .loc 1 7132 7 discriminator 3 view .LVU2087 + 6301 003c 05F58065 add r5, r5, #1024 + 6302 0040 A842 cmp r0, r5 + 6303 0042 0FD1 bne .L387 + 6304 0044 06E0 b .L386 + 6305 .L389: +7121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6306 .loc 1 7121 5 is_stmt 1 view .LVU2088 +7124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ + 6307 .loc 1 7124 5 view .LVU2089 +7124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Polarity */ + 6308 .loc 1 7124 13 is_stmt 0 view .LVU2090 + 6309 0046 23F08003 bic r3, r3, #128 + 6310 .LVL504: +7126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ + 6311 .loc 1 7126 5 is_stmt 1 view .LVU2091 +7126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ + 6312 .loc 1 7126 26 is_stmt 0 view .LVU2092 + 6313 004a CD68 ldr r5, [r1, #12] +7126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the Output N State */ + 6314 .loc 1 7126 13 view .LVU2093 + 6315 004c 43EA0513 orr r3, r3, r5, lsl #4 + 6316 .LVL505: +7128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6317 .loc 1 7128 5 is_stmt 1 view .LVU2094 +7128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6318 .loc 1 7128 13 is_stmt 0 view .LVU2095 + 6319 0050 23F04003 bic r3, r3, #64 + 6320 .LVL506: +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6321 .loc 1 7132 3 is_stmt 1 view .LVU2096 + 6322 .L386: +7135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 6323 .loc 1 7135 5 view .LVU2097 +7136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6324 .loc 1 7136 5 view .LVU2098 +7139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #if defined(TIM_CR2_OIS2N) + ARM GAS /tmp/cc0aF2h1.s page 276 + + + 6325 .loc 1 7139 5 view .LVU2099 +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CR2_OIS2N */ + 6326 .loc 1 7141 5 view .LVU2100 +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_CR2_OIS2N */ + 6327 .loc 1 7141 12 is_stmt 0 view .LVU2101 + 6328 0054 22F44062 bic r2, r2, #3072 + 6329 .LVL507: +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Idle state */ + 6330 .loc 1 7144 5 is_stmt 1 view .LVU2102 +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Idle state */ + 6331 .loc 1 7144 25 is_stmt 0 view .LVU2103 + 6332 0058 4D69 ldr r5, [r1, #20] +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Output N Idle state */ + 6333 .loc 1 7144 12 view .LVU2104 + 6334 005a 42EA8502 orr r2, r2, r5, lsl #2 + 6335 .LVL508: +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6336 .loc 1 7146 5 is_stmt 1 view .LVU2105 +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6337 .loc 1 7146 25 is_stmt 0 view .LVU2106 + 6338 005e 8D69 ldr r5, [r1, #24] +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6339 .loc 1 7146 12 view .LVU2107 + 6340 0060 42EA8502 orr r2, r2, r5, lsl #2 + 6341 .LVL509: + 6342 .L387: +7150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6343 .loc 1 7150 3 is_stmt 1 view .LVU2108 +7150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6344 .loc 1 7150 13 is_stmt 0 view .LVU2109 + 6345 0064 4260 str r2, [r0, #4] +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6346 .loc 1 7153 3 is_stmt 1 view .LVU2110 +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6347 .loc 1 7153 15 is_stmt 0 view .LVU2111 + 6348 0066 8461 str r4, [r0, #24] +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6349 .loc 1 7156 3 is_stmt 1 view .LVU2112 +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6350 .loc 1 7156 25 is_stmt 0 view .LVU2113 + 6351 0068 4A68 ldr r2, [r1, #4] + 6352 .LVL510: +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6353 .loc 1 7156 14 view .LVU2114 + 6354 006a 8263 str r2, [r0, #56] +7159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6355 .loc 1 7159 3 is_stmt 1 view .LVU2115 +7159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6356 .loc 1 7159 14 is_stmt 0 view .LVU2116 + 6357 006c 0362 str r3, [r0, #32] +7160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6358 .loc 1 7160 1 view .LVU2117 + 6359 006e 30BC pop {r4, r5} + 6360 .cfi_restore 5 + 6361 .cfi_restore 4 + 6362 .cfi_def_cfa_offset 0 + 6363 .LVL511: + ARM GAS /tmp/cc0aF2h1.s page 277 + + +7160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6364 .loc 1 7160 1 view .LVU2118 + 6365 0070 7047 bx lr + 6366 .L391: + 6367 0072 00BF .align 2 + 6368 .L390: + 6369 0074 002C0140 .word 1073818624 + 6370 0078 00400140 .word 1073823744 + 6371 .cfi_endproc + 6372 .LFE236: + 6374 .section .text.HAL_TIM_OC_ConfigChannel,"ax",%progbits + 6375 .align 1 + 6376 .global HAL_TIM_OC_ConfigChannel + 6377 .syntax unified + 6378 .thumb + 6379 .thumb_func + 6381 HAL_TIM_OC_ConfigChannel: + 6382 .LVL512: + 6383 .LFB189: +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6384 .loc 1 4078 1 is_stmt 1 view -0 + 6385 .cfi_startproc + 6386 @ args = 0, pretend = 0, frame = 0 + 6387 @ frame_needed = 0, uses_anonymous_args = 0 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6388 .loc 1 4079 3 view .LVU2120 +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); + 6389 .loc 1 4082 3 view .LVU2121 +4083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + 6390 .loc 1 4083 3 view .LVU2122 +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6391 .loc 1 4084 3 view .LVU2123 +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6392 .loc 1 4087 3 view .LVU2124 +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6393 .loc 1 4087 3 view .LVU2125 + 6394 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 6395 0004 012B cmp r3, #1 + 6396 0006 36D0 beq .L402 +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6397 .loc 1 4078 1 is_stmt 0 view .LVU2126 + 6398 0008 10B5 push {r4, lr} + 6399 .cfi_def_cfa_offset 8 + 6400 .cfi_offset 4, -8 + 6401 .cfi_offset 14, -4 + 6402 000a 0446 mov r4, r0 +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6403 .loc 1 4087 3 is_stmt 1 discriminator 2 view .LVU2127 + 6404 000c 0123 movs r3, #1 + 6405 000e 80F83C30 strb r3, [r0, #60] +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6406 .loc 1 4087 3 discriminator 2 view .LVU2128 +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6407 .loc 1 4089 3 view .LVU2129 + 6408 0012 142A cmp r2, #20 + 6409 0014 2AD8 bhi .L403 + 6410 0016 DFE802F0 tbb [pc, r2] + ARM GAS /tmp/cc0aF2h1.s page 278 + + + 6411 .L396: + 6412 001a 0B .byte (.L401-.L396)/2 + 6413 001b 29 .byte (.L403-.L396)/2 + 6414 001c 29 .byte (.L403-.L396)/2 + 6415 001d 29 .byte (.L403-.L396)/2 + 6416 001e 10 .byte (.L400-.L396)/2 + 6417 001f 29 .byte (.L403-.L396)/2 + 6418 0020 29 .byte (.L403-.L396)/2 + 6419 0021 29 .byte (.L403-.L396)/2 + 6420 0022 15 .byte (.L399-.L396)/2 + 6421 0023 29 .byte (.L403-.L396)/2 + 6422 0024 29 .byte (.L403-.L396)/2 + 6423 0025 29 .byte (.L403-.L396)/2 + 6424 0026 1A .byte (.L398-.L396)/2 + 6425 0027 29 .byte (.L403-.L396)/2 + 6426 0028 29 .byte (.L403-.L396)/2 + 6427 0029 29 .byte (.L403-.L396)/2 + 6428 002a 1F .byte (.L397-.L396)/2 + 6429 002b 29 .byte (.L403-.L396)/2 + 6430 002c 29 .byte (.L403-.L396)/2 + 6431 002d 29 .byte (.L403-.L396)/2 + 6432 002e 24 .byte (.L395-.L396)/2 + 6433 002f 00 .p2align 1 + 6434 .L401: +4094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6435 .loc 1 4094 7 view .LVU2130 +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6436 .loc 1 4097 7 view .LVU2131 + 6437 0030 0068 ldr r0, [r0] + 6438 .LVL513: +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6439 .loc 1 4097 7 is_stmt 0 view .LVU2132 + 6440 0032 FFF7FEFF bl TIM_OC1_SetConfig + 6441 .LVL514: +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6442 .loc 1 4098 7 is_stmt 1 view .LVU2133 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6443 .loc 1 4079 21 is_stmt 0 view .LVU2134 + 6444 0036 0020 movs r0, #0 +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6445 .loc 1 4098 7 view .LVU2135 + 6446 0038 19E0 b .L394 + 6447 .LVL515: + 6448 .L400: +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6449 .loc 1 4104 7 is_stmt 1 view .LVU2136 +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6450 .loc 1 4107 7 view .LVU2137 + 6451 003a 0068 ldr r0, [r0] + 6452 .LVL516: +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6453 .loc 1 4107 7 is_stmt 0 view .LVU2138 + 6454 003c FFF7FEFF bl TIM_OC2_SetConfig + 6455 .LVL517: +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6456 .loc 1 4108 7 is_stmt 1 view .LVU2139 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 279 + + + 6457 .loc 1 4079 21 is_stmt 0 view .LVU2140 + 6458 0040 0020 movs r0, #0 +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6459 .loc 1 4108 7 view .LVU2141 + 6460 0042 14E0 b .L394 + 6461 .LVL518: + 6462 .L399: +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6463 .loc 1 4114 7 is_stmt 1 view .LVU2142 +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6464 .loc 1 4117 7 view .LVU2143 + 6465 0044 0068 ldr r0, [r0] + 6466 .LVL519: +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6467 .loc 1 4117 7 is_stmt 0 view .LVU2144 + 6468 0046 FFF7FEFF bl TIM_OC3_SetConfig + 6469 .LVL520: +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6470 .loc 1 4118 7 is_stmt 1 view .LVU2145 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6471 .loc 1 4079 21 is_stmt 0 view .LVU2146 + 6472 004a 0020 movs r0, #0 +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6473 .loc 1 4118 7 view .LVU2147 + 6474 004c 0FE0 b .L394 + 6475 .LVL521: + 6476 .L398: +4124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6477 .loc 1 4124 7 is_stmt 1 view .LVU2148 +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6478 .loc 1 4127 7 view .LVU2149 + 6479 004e 0068 ldr r0, [r0] + 6480 .LVL522: +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6481 .loc 1 4127 7 is_stmt 0 view .LVU2150 + 6482 0050 FFF7FEFF bl TIM_OC4_SetConfig + 6483 .LVL523: +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6484 .loc 1 4128 7 is_stmt 1 view .LVU2151 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6485 .loc 1 4079 21 is_stmt 0 view .LVU2152 + 6486 0054 0020 movs r0, #0 +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6487 .loc 1 4128 7 view .LVU2153 + 6488 0056 0AE0 b .L394 + 6489 .LVL524: + 6490 .L397: +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6491 .loc 1 4135 7 is_stmt 1 view .LVU2154 +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6492 .loc 1 4138 7 view .LVU2155 + 6493 0058 0068 ldr r0, [r0] + 6494 .LVL525: +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6495 .loc 1 4138 7 is_stmt 0 view .LVU2156 + 6496 005a FFF7FEFF bl TIM_OC5_SetConfig + 6497 .LVL526: + ARM GAS /tmp/cc0aF2h1.s page 280 + + +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6498 .loc 1 4139 7 is_stmt 1 view .LVU2157 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6499 .loc 1 4079 21 is_stmt 0 view .LVU2158 + 6500 005e 0020 movs r0, #0 +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6501 .loc 1 4139 7 view .LVU2159 + 6502 0060 05E0 b .L394 + 6503 .LVL527: + 6504 .L395: +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6505 .loc 1 4147 7 is_stmt 1 view .LVU2160 +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6506 .loc 1 4150 7 view .LVU2161 + 6507 0062 0068 ldr r0, [r0] + 6508 .LVL528: +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6509 .loc 1 4150 7 is_stmt 0 view .LVU2162 + 6510 0064 FFF7FEFF bl TIM_OC6_SetConfig + 6511 .LVL529: +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6512 .loc 1 4151 7 is_stmt 1 view .LVU2163 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6513 .loc 1 4079 21 is_stmt 0 view .LVU2164 + 6514 0068 0020 movs r0, #0 +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6515 .loc 1 4151 7 view .LVU2165 + 6516 006a 00E0 b .L394 + 6517 .LVL530: + 6518 .L403: +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6519 .loc 1 4089 3 view .LVU2166 + 6520 006c 0120 movs r0, #1 + 6521 .LVL531: + 6522 .L394: +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6523 .loc 1 4160 3 is_stmt 1 view .LVU2167 +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6524 .loc 1 4160 3 view .LVU2168 + 6525 006e 0023 movs r3, #0 + 6526 0070 84F83C30 strb r3, [r4, #60] +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6527 .loc 1 4160 3 view .LVU2169 +4162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6528 .loc 1 4162 3 view .LVU2170 +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6529 .loc 1 4163 1 is_stmt 0 view .LVU2171 + 6530 0074 10BD pop {r4, pc} + 6531 .LVL532: + 6532 .L402: + 6533 .cfi_def_cfa_offset 0 + 6534 .cfi_restore 4 + 6535 .cfi_restore 14 +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6536 .loc 1 4087 3 discriminator 1 view .LVU2172 + 6537 0076 0220 movs r0, #2 + 6538 .LVL533: + ARM GAS /tmp/cc0aF2h1.s page 281 + + +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6539 .loc 1 4163 1 view .LVU2173 + 6540 0078 7047 bx lr + 6541 .cfi_endproc + 6542 .LFE189: + 6544 .section .text.HAL_TIM_PWM_ConfigChannel,"ax",%progbits + 6545 .align 1 + 6546 .global HAL_TIM_PWM_ConfigChannel + 6547 .syntax unified + 6548 .thumb + 6549 .thumb_func + 6551 HAL_TIM_PWM_ConfigChannel: + 6552 .LVL534: + 6553 .LFB191: +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6554 .loc 1 4283 1 is_stmt 1 view -0 + 6555 .cfi_startproc + 6556 @ args = 0, pretend = 0, frame = 0 + 6557 @ frame_needed = 0, uses_anonymous_args = 0 +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6558 .loc 1 4283 1 is_stmt 0 view .LVU2175 + 6559 0000 38B5 push {r3, r4, r5, lr} + 6560 .cfi_def_cfa_offset 16 + 6561 .cfi_offset 3, -16 + 6562 .cfi_offset 4, -12 + 6563 .cfi_offset 5, -8 + 6564 .cfi_offset 14, -4 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6565 .loc 1 4284 3 is_stmt 1 view .LVU2176 + 6566 .LVL535: +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); + 6567 .loc 1 4287 3 view .LVU2177 +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + 6568 .loc 1 4288 3 view .LVU2178 +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); + 6569 .loc 1 4289 3 view .LVU2179 +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6570 .loc 1 4290 3 view .LVU2180 +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6571 .loc 1 4293 3 view .LVU2181 +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6572 .loc 1 4293 3 view .LVU2182 + 6573 0002 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 6574 0006 012B cmp r3, #1 + 6575 0008 00F09580 beq .L418 + 6576 000c 0446 mov r4, r0 + 6577 000e 0D46 mov r5, r1 +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6578 .loc 1 4293 3 discriminator 2 view .LVU2183 + 6579 0010 0123 movs r3, #1 + 6580 0012 80F83C30 strb r3, [r0, #60] +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6581 .loc 1 4293 3 discriminator 2 view .LVU2184 +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6582 .loc 1 4295 3 view .LVU2185 + 6583 0016 142A cmp r2, #20 + 6584 0018 00F28880 bhi .L419 + ARM GAS /tmp/cc0aF2h1.s page 282 + + + 6585 001c DFE802F0 tbb [pc, r2] + 6586 .L412: + 6587 0020 0B .byte (.L417-.L412)/2 + 6588 0021 86 .byte (.L419-.L412)/2 + 6589 0022 86 .byte (.L419-.L412)/2 + 6590 0023 86 .byte (.L419-.L412)/2 + 6591 0024 1F .byte (.L416-.L412)/2 + 6592 0025 86 .byte (.L419-.L412)/2 + 6593 0026 86 .byte (.L419-.L412)/2 + 6594 0027 86 .byte (.L419-.L412)/2 + 6595 0028 34 .byte (.L415-.L412)/2 + 6596 0029 86 .byte (.L419-.L412)/2 + 6597 002a 86 .byte (.L419-.L412)/2 + 6598 002b 86 .byte (.L419-.L412)/2 + 6599 002c 48 .byte (.L414-.L412)/2 + 6600 002d 86 .byte (.L419-.L412)/2 + 6601 002e 86 .byte (.L419-.L412)/2 + 6602 002f 86 .byte (.L419-.L412)/2 + 6603 0030 5D .byte (.L413-.L412)/2 + 6604 0031 86 .byte (.L419-.L412)/2 + 6605 0032 86 .byte (.L419-.L412)/2 + 6606 0033 86 .byte (.L419-.L412)/2 + 6607 0034 71 .byte (.L411-.L412)/2 + 6608 0035 00 .p2align 1 + 6609 .L417: +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6610 .loc 1 4300 7 view .LVU2186 +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6611 .loc 1 4303 7 view .LVU2187 + 6612 0036 0068 ldr r0, [r0] + 6613 .LVL536: +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6614 .loc 1 4303 7 is_stmt 0 view .LVU2188 + 6615 0038 FFF7FEFF bl TIM_OC1_SetConfig + 6616 .LVL537: +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6617 .loc 1 4306 7 is_stmt 1 view .LVU2189 +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6618 .loc 1 4306 11 is_stmt 0 view .LVU2190 + 6619 003c 2268 ldr r2, [r4] +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6620 .loc 1 4306 21 view .LVU2191 + 6621 003e 9369 ldr r3, [r2, #24] +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6622 .loc 1 4306 29 view .LVU2192 + 6623 0040 43F00803 orr r3, r3, #8 + 6624 0044 9361 str r3, [r2, #24] +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6625 .loc 1 4309 7 is_stmt 1 view .LVU2193 +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6626 .loc 1 4309 11 is_stmt 0 view .LVU2194 + 6627 0046 2268 ldr r2, [r4] +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6628 .loc 1 4309 21 view .LVU2195 + 6629 0048 9369 ldr r3, [r2, #24] +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6630 .loc 1 4309 29 view .LVU2196 + ARM GAS /tmp/cc0aF2h1.s page 283 + + + 6631 004a 23F00403 bic r3, r3, #4 + 6632 004e 9361 str r3, [r2, #24] +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6633 .loc 1 4310 7 is_stmt 1 view .LVU2197 +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6634 .loc 1 4310 11 is_stmt 0 view .LVU2198 + 6635 0050 2268 ldr r2, [r4] +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6636 .loc 1 4310 21 view .LVU2199 + 6637 0052 9369 ldr r3, [r2, #24] +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6638 .loc 1 4310 39 view .LVU2200 + 6639 0054 2969 ldr r1, [r5, #16] +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6640 .loc 1 4310 29 view .LVU2201 + 6641 0056 0B43 orrs r3, r3, r1 + 6642 0058 9361 str r3, [r2, #24] +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6643 .loc 1 4311 7 is_stmt 1 view .LVU2202 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6644 .loc 1 4284 21 is_stmt 0 view .LVU2203 + 6645 005a 0020 movs r0, #0 +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6646 .loc 1 4311 7 view .LVU2204 + 6647 005c 67E0 b .L410 + 6648 .LVL538: + 6649 .L416: +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6650 .loc 1 4317 7 is_stmt 1 view .LVU2205 +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6651 .loc 1 4320 7 view .LVU2206 + 6652 005e 0068 ldr r0, [r0] + 6653 .LVL539: +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6654 .loc 1 4320 7 is_stmt 0 view .LVU2207 + 6655 0060 FFF7FEFF bl TIM_OC2_SetConfig + 6656 .LVL540: +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6657 .loc 1 4323 7 is_stmt 1 view .LVU2208 +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6658 .loc 1 4323 11 is_stmt 0 view .LVU2209 + 6659 0064 2268 ldr r2, [r4] +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6660 .loc 1 4323 21 view .LVU2210 + 6661 0066 9369 ldr r3, [r2, #24] +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6662 .loc 1 4323 29 view .LVU2211 + 6663 0068 43F40063 orr r3, r3, #2048 + 6664 006c 9361 str r3, [r2, #24] +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6665 .loc 1 4326 7 is_stmt 1 view .LVU2212 +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6666 .loc 1 4326 11 is_stmt 0 view .LVU2213 + 6667 006e 2268 ldr r2, [r4] +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6668 .loc 1 4326 21 view .LVU2214 + 6669 0070 9369 ldr r3, [r2, #24] + ARM GAS /tmp/cc0aF2h1.s page 284 + + +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6670 .loc 1 4326 29 view .LVU2215 + 6671 0072 23F48063 bic r3, r3, #1024 + 6672 0076 9361 str r3, [r2, #24] +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6673 .loc 1 4327 7 is_stmt 1 view .LVU2216 +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6674 .loc 1 4327 11 is_stmt 0 view .LVU2217 + 6675 0078 2268 ldr r2, [r4] +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6676 .loc 1 4327 21 view .LVU2218 + 6677 007a 9369 ldr r3, [r2, #24] +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6678 .loc 1 4327 39 view .LVU2219 + 6679 007c 2969 ldr r1, [r5, #16] +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6680 .loc 1 4327 29 view .LVU2220 + 6681 007e 43EA0123 orr r3, r3, r1, lsl #8 + 6682 0082 9361 str r3, [r2, #24] +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6683 .loc 1 4328 7 is_stmt 1 view .LVU2221 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6684 .loc 1 4284 21 is_stmt 0 view .LVU2222 + 6685 0084 0020 movs r0, #0 +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6686 .loc 1 4328 7 view .LVU2223 + 6687 0086 52E0 b .L410 + 6688 .LVL541: + 6689 .L415: +4334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6690 .loc 1 4334 7 is_stmt 1 view .LVU2224 +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6691 .loc 1 4337 7 view .LVU2225 + 6692 0088 0068 ldr r0, [r0] + 6693 .LVL542: +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6694 .loc 1 4337 7 is_stmt 0 view .LVU2226 + 6695 008a FFF7FEFF bl TIM_OC3_SetConfig + 6696 .LVL543: +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6697 .loc 1 4340 7 is_stmt 1 view .LVU2227 +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6698 .loc 1 4340 11 is_stmt 0 view .LVU2228 + 6699 008e 2268 ldr r2, [r4] +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6700 .loc 1 4340 21 view .LVU2229 + 6701 0090 D369 ldr r3, [r2, #28] +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6702 .loc 1 4340 29 view .LVU2230 + 6703 0092 43F00803 orr r3, r3, #8 + 6704 0096 D361 str r3, [r2, #28] +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6705 .loc 1 4343 7 is_stmt 1 view .LVU2231 +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6706 .loc 1 4343 11 is_stmt 0 view .LVU2232 + 6707 0098 2268 ldr r2, [r4] +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + ARM GAS /tmp/cc0aF2h1.s page 285 + + + 6708 .loc 1 4343 21 view .LVU2233 + 6709 009a D369 ldr r3, [r2, #28] +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6710 .loc 1 4343 29 view .LVU2234 + 6711 009c 23F00403 bic r3, r3, #4 + 6712 00a0 D361 str r3, [r2, #28] +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6713 .loc 1 4344 7 is_stmt 1 view .LVU2235 +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6714 .loc 1 4344 11 is_stmt 0 view .LVU2236 + 6715 00a2 2268 ldr r2, [r4] +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6716 .loc 1 4344 21 view .LVU2237 + 6717 00a4 D369 ldr r3, [r2, #28] +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6718 .loc 1 4344 39 view .LVU2238 + 6719 00a6 2969 ldr r1, [r5, #16] +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6720 .loc 1 4344 29 view .LVU2239 + 6721 00a8 0B43 orrs r3, r3, r1 + 6722 00aa D361 str r3, [r2, #28] +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6723 .loc 1 4345 7 is_stmt 1 view .LVU2240 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6724 .loc 1 4284 21 is_stmt 0 view .LVU2241 + 6725 00ac 0020 movs r0, #0 +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6726 .loc 1 4345 7 view .LVU2242 + 6727 00ae 3EE0 b .L410 + 6728 .LVL544: + 6729 .L414: +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6730 .loc 1 4351 7 is_stmt 1 view .LVU2243 +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6731 .loc 1 4354 7 view .LVU2244 + 6732 00b0 0068 ldr r0, [r0] + 6733 .LVL545: +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6734 .loc 1 4354 7 is_stmt 0 view .LVU2245 + 6735 00b2 FFF7FEFF bl TIM_OC4_SetConfig + 6736 .LVL546: +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6737 .loc 1 4357 7 is_stmt 1 view .LVU2246 +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6738 .loc 1 4357 11 is_stmt 0 view .LVU2247 + 6739 00b6 2268 ldr r2, [r4] +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6740 .loc 1 4357 21 view .LVU2248 + 6741 00b8 D369 ldr r3, [r2, #28] +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6742 .loc 1 4357 29 view .LVU2249 + 6743 00ba 43F40063 orr r3, r3, #2048 + 6744 00be D361 str r3, [r2, #28] +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6745 .loc 1 4360 7 is_stmt 1 view .LVU2250 +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6746 .loc 1 4360 11 is_stmt 0 view .LVU2251 + ARM GAS /tmp/cc0aF2h1.s page 286 + + + 6747 00c0 2268 ldr r2, [r4] +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6748 .loc 1 4360 21 view .LVU2252 + 6749 00c2 D369 ldr r3, [r2, #28] +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6750 .loc 1 4360 29 view .LVU2253 + 6751 00c4 23F48063 bic r3, r3, #1024 + 6752 00c8 D361 str r3, [r2, #28] +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6753 .loc 1 4361 7 is_stmt 1 view .LVU2254 +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6754 .loc 1 4361 11 is_stmt 0 view .LVU2255 + 6755 00ca 2268 ldr r2, [r4] +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6756 .loc 1 4361 21 view .LVU2256 + 6757 00cc D369 ldr r3, [r2, #28] +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6758 .loc 1 4361 39 view .LVU2257 + 6759 00ce 2969 ldr r1, [r5, #16] +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6760 .loc 1 4361 29 view .LVU2258 + 6761 00d0 43EA0123 orr r3, r3, r1, lsl #8 + 6762 00d4 D361 str r3, [r2, #28] +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6763 .loc 1 4362 7 is_stmt 1 view .LVU2259 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6764 .loc 1 4284 21 is_stmt 0 view .LVU2260 + 6765 00d6 0020 movs r0, #0 +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6766 .loc 1 4362 7 view .LVU2261 + 6767 00d8 29E0 b .L410 + 6768 .LVL547: + 6769 .L413: +4369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6770 .loc 1 4369 7 is_stmt 1 view .LVU2262 +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6771 .loc 1 4372 7 view .LVU2263 + 6772 00da 0068 ldr r0, [r0] + 6773 .LVL548: +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6774 .loc 1 4372 7 is_stmt 0 view .LVU2264 + 6775 00dc FFF7FEFF bl TIM_OC5_SetConfig + 6776 .LVL549: +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6777 .loc 1 4375 7 is_stmt 1 view .LVU2265 +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6778 .loc 1 4375 11 is_stmt 0 view .LVU2266 + 6779 00e0 2268 ldr r2, [r4] +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6780 .loc 1 4375 21 view .LVU2267 + 6781 00e2 536D ldr r3, [r2, #84] +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6782 .loc 1 4375 29 view .LVU2268 + 6783 00e4 43F00803 orr r3, r3, #8 + 6784 00e8 5365 str r3, [r2, #84] +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode; + 6785 .loc 1 4378 7 is_stmt 1 view .LVU2269 + ARM GAS /tmp/cc0aF2h1.s page 287 + + +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode; + 6786 .loc 1 4378 11 is_stmt 0 view .LVU2270 + 6787 00ea 2268 ldr r2, [r4] +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode; + 6788 .loc 1 4378 21 view .LVU2271 + 6789 00ec 536D ldr r3, [r2, #84] +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode; + 6790 .loc 1 4378 29 view .LVU2272 + 6791 00ee 23F00403 bic r3, r3, #4 + 6792 00f2 5365 str r3, [r2, #84] +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6793 .loc 1 4379 7 is_stmt 1 view .LVU2273 +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6794 .loc 1 4379 11 is_stmt 0 view .LVU2274 + 6795 00f4 2268 ldr r2, [r4] +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6796 .loc 1 4379 21 view .LVU2275 + 6797 00f6 536D ldr r3, [r2, #84] +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6798 .loc 1 4379 39 view .LVU2276 + 6799 00f8 2969 ldr r1, [r5, #16] +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6800 .loc 1 4379 29 view .LVU2277 + 6801 00fa 0B43 orrs r3, r3, r1 + 6802 00fc 5365 str r3, [r2, #84] +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6803 .loc 1 4380 7 is_stmt 1 view .LVU2278 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6804 .loc 1 4284 21 is_stmt 0 view .LVU2279 + 6805 00fe 0020 movs r0, #0 +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6806 .loc 1 4380 7 view .LVU2280 + 6807 0100 15E0 b .L410 + 6808 .LVL550: + 6809 .L411: +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6810 .loc 1 4388 7 is_stmt 1 view .LVU2281 +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6811 .loc 1 4391 7 view .LVU2282 + 6812 0102 0068 ldr r0, [r0] + 6813 .LVL551: +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6814 .loc 1 4391 7 is_stmt 0 view .LVU2283 + 6815 0104 FFF7FEFF bl TIM_OC6_SetConfig + 6816 .LVL552: +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6817 .loc 1 4394 7 is_stmt 1 view .LVU2284 +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6818 .loc 1 4394 11 is_stmt 0 view .LVU2285 + 6819 0108 2268 ldr r2, [r4] +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6820 .loc 1 4394 21 view .LVU2286 + 6821 010a 536D ldr r3, [r2, #84] +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6822 .loc 1 4394 29 view .LVU2287 + 6823 010c 43F40063 orr r3, r3, #2048 + 6824 0110 5365 str r3, [r2, #84] + ARM GAS /tmp/cc0aF2h1.s page 288 + + +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 6825 .loc 1 4397 7 is_stmt 1 view .LVU2288 +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 6826 .loc 1 4397 11 is_stmt 0 view .LVU2289 + 6827 0112 2268 ldr r2, [r4] +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 6828 .loc 1 4397 21 view .LVU2290 + 6829 0114 536D ldr r3, [r2, #84] +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U; + 6830 .loc 1 4397 29 view .LVU2291 + 6831 0116 23F48063 bic r3, r3, #1024 + 6832 011a 5365 str r3, [r2, #84] +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6833 .loc 1 4398 7 is_stmt 1 view .LVU2292 +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6834 .loc 1 4398 11 is_stmt 0 view .LVU2293 + 6835 011c 2268 ldr r2, [r4] +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6836 .loc 1 4398 21 view .LVU2294 + 6837 011e 536D ldr r3, [r2, #84] +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6838 .loc 1 4398 39 view .LVU2295 + 6839 0120 2969 ldr r1, [r5, #16] +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 6840 .loc 1 4398 29 view .LVU2296 + 6841 0122 43EA0123 orr r3, r3, r1, lsl #8 + 6842 0126 5365 str r3, [r2, #84] +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6843 .loc 1 4399 7 is_stmt 1 view .LVU2297 +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6844 .loc 1 4284 21 is_stmt 0 view .LVU2298 + 6845 0128 0020 movs r0, #0 +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6846 .loc 1 4399 7 view .LVU2299 + 6847 012a 00E0 b .L410 + 6848 .LVL553: + 6849 .L419: +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6850 .loc 1 4295 3 view .LVU2300 + 6851 012c 0120 movs r0, #1 + 6852 .LVL554: + 6853 .L410: +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6854 .loc 1 4408 3 is_stmt 1 view .LVU2301 +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6855 .loc 1 4408 3 view .LVU2302 + 6856 012e 0023 movs r3, #0 + 6857 0130 84F83C30 strb r3, [r4, #60] +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6858 .loc 1 4408 3 view .LVU2303 +4410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6859 .loc 1 4410 3 view .LVU2304 + 6860 .LVL555: + 6861 .L409: +4411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6862 .loc 1 4411 1 is_stmt 0 view .LVU2305 + 6863 0134 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/cc0aF2h1.s page 289 + + + 6864 .LVL556: + 6865 .L418: +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6866 .loc 1 4293 3 discriminator 1 view .LVU2306 + 6867 0136 0220 movs r0, #2 + 6868 .LVL557: +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6869 .loc 1 4293 3 discriminator 1 view .LVU2307 + 6870 0138 FCE7 b .L409 + 6871 .cfi_endproc + 6872 .LFE191: + 6874 .section .text.TIM_TI1_SetConfig,"ax",%progbits + 6875 .align 1 + 6876 .global TIM_TI1_SetConfig + 6877 .syntax unified + 6878 .thumb + 6879 .thumb_func + 6881 TIM_TI1_SetConfig: + 6882 .LVL558: + 6883 .LFB242: +7553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 6884 .loc 1 7553 1 is_stmt 1 view -0 + 6885 .cfi_startproc + 6886 @ args = 0, pretend = 0, frame = 0 + 6887 @ frame_needed = 0, uses_anonymous_args = 0 + 6888 @ link register save eliminated. +7553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 6889 .loc 1 7553 1 is_stmt 0 view .LVU2309 + 6890 0000 70B4 push {r4, r5, r6} + 6891 .cfi_def_cfa_offset 12 + 6892 .cfi_offset 4, -12 + 6893 .cfi_offset 5, -8 + 6894 .cfi_offset 6, -4 + 6895 0002 9446 mov ip, r2 +7554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 6896 .loc 1 7554 3 is_stmt 1 view .LVU2310 +7555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6897 .loc 1 7555 3 view .LVU2311 +7558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 6898 .loc 1 7558 3 view .LVU2312 +7558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 6899 .loc 1 7558 7 is_stmt 0 view .LVU2313 + 6900 0004 046A ldr r4, [r0, #32] +7558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 6901 .loc 1 7558 14 view .LVU2314 + 6902 0006 24F00104 bic r4, r4, #1 + 6903 000a 0462 str r4, [r0, #32] +7559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 6904 .loc 1 7559 3 is_stmt 1 view .LVU2315 +7559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer = TIMx->CCER; + 6905 .loc 1 7559 12 is_stmt 0 view .LVU2316 + 6906 000c 8469 ldr r4, [r0, #24] + 6907 .LVL559: +7560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6908 .loc 1 7560 3 is_stmt 1 view .LVU2317 +7560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6909 .loc 1 7560 11 is_stmt 0 view .LVU2318 + ARM GAS /tmp/cc0aF2h1.s page 290 + + + 6910 000e 066A ldr r6, [r0, #32] + 6911 .LVL560: +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6912 .loc 1 7563 3 is_stmt 1 view .LVU2319 +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6913 .loc 1 7563 7 is_stmt 0 view .LVU2320 + 6914 0010 124D ldr r5, .L425 + 6915 0012 A842 cmp r0, r5 + 6916 0014 10D0 beq .L422 +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6917 .loc 1 7563 7 discriminator 2 view .LVU2321 + 6918 0016 B0F1804F cmp r0, #1073741824 + 6919 001a 0DD0 beq .L422 +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6920 .loc 1 7563 7 discriminator 4 view .LVU2322 + 6921 001c 104A ldr r2, .L425+4 + 6922 .LVL561: +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6923 .loc 1 7563 7 discriminator 4 view .LVU2323 + 6924 001e 9042 cmp r0, r2 + 6925 0020 0AD0 beq .L422 +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6926 .loc 1 7563 7 discriminator 6 view .LVU2324 + 6927 0022 02F58062 add r2, r2, #1024 + 6928 0026 9042 cmp r0, r2 + 6929 0028 06D0 beq .L422 +7563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 6930 .loc 1 7563 7 discriminator 8 view .LVU2325 + 6931 002a 02F59C32 add r2, r2, #79872 + 6932 002e 9042 cmp r0, r2 + 6933 0030 02D0 beq .L422 +7570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6934 .loc 1 7570 5 is_stmt 1 view .LVU2326 +7570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6935 .loc 1 7570 14 is_stmt 0 view .LVU2327 + 6936 0032 44F00102 orr r2, r4, #1 + 6937 .LVL562: +7570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6938 .loc 1 7570 14 view .LVU2328 + 6939 0036 03E0 b .L423 + 6940 .LVL563: + 6941 .L422: +7565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; + 6942 .loc 1 7565 5 is_stmt 1 view .LVU2329 +7565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; + 6943 .loc 1 7565 14 is_stmt 0 view .LVU2330 + 6944 0038 24F00302 bic r2, r4, #3 + 6945 .LVL564: +7566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6946 .loc 1 7566 5 is_stmt 1 view .LVU2331 +7566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6947 .loc 1 7566 14 is_stmt 0 view .LVU2332 + 6948 003c 42EA0C02 orr r2, r2, ip + 6949 .LVL565: + 6950 .L423: +7574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); + 6951 .loc 1 7574 3 is_stmt 1 view .LVU2333 + ARM GAS /tmp/cc0aF2h1.s page 291 + + +7574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); + 6952 .loc 1 7574 12 is_stmt 0 view .LVU2334 + 6953 0040 22F0F002 bic r2, r2, #240 + 6954 .LVL566: +7575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6955 .loc 1 7575 3 is_stmt 1 view .LVU2335 +7575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6956 .loc 1 7575 30 is_stmt 0 view .LVU2336 + 6957 0044 1B01 lsls r3, r3, #4 + 6958 .LVL567: +7575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6959 .loc 1 7575 37 view .LVU2337 + 6960 0046 DBB2 uxtb r3, r3 +7575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6961 .loc 1 7575 12 view .LVU2338 + 6962 0048 1343 orrs r3, r3, r2 + 6963 .LVL568: +7578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); + 6964 .loc 1 7578 3 is_stmt 1 view .LVU2339 +7578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); + 6965 .loc 1 7578 11 is_stmt 0 view .LVU2340 + 6966 004a 26F00A02 bic r2, r6, #10 + 6967 .LVL569: +7579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6968 .loc 1 7579 3 is_stmt 1 view .LVU2341 +7579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6969 .loc 1 7579 30 is_stmt 0 view .LVU2342 + 6970 004e 01F00A01 and r1, r1, #10 + 6971 .LVL570: +7579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6972 .loc 1 7579 11 view .LVU2343 + 6973 0052 1143 orrs r1, r1, r2 + 6974 .LVL571: +7582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 6975 .loc 1 7582 3 is_stmt 1 view .LVU2344 +7582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER = tmpccer; + 6976 .loc 1 7582 15 is_stmt 0 view .LVU2345 + 6977 0054 8361 str r3, [r0, #24] +7583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6978 .loc 1 7583 3 is_stmt 1 view .LVU2346 +7583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 6979 .loc 1 7583 14 is_stmt 0 view .LVU2347 + 6980 0056 0162 str r1, [r0, #32] +7584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 6981 .loc 1 7584 1 view .LVU2348 + 6982 0058 70BC pop {r4, r5, r6} + 6983 .cfi_restore 6 + 6984 .cfi_restore 5 + 6985 .cfi_restore 4 + 6986 .cfi_def_cfa_offset 0 + 6987 005a 7047 bx lr + 6988 .L426: + 6989 .align 2 + 6990 .L425: + 6991 005c 002C0140 .word 1073818624 + 6992 0060 00040040 .word 1073742848 + 6993 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 292 + + + 6994 .LFE242: + 6996 .section .text.HAL_TIM_IC_ConfigChannel,"ax",%progbits + 6997 .align 1 + 6998 .global HAL_TIM_IC_ConfigChannel + 6999 .syntax unified + 7000 .thumb + 7001 .thumb_func + 7003 HAL_TIM_IC_ConfigChannel: + 7004 .LVL572: + 7005 .LFB190: +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7006 .loc 1 4179 1 is_stmt 1 view -0 + 7007 .cfi_startproc + 7008 @ args = 0, pretend = 0, frame = 0 + 7009 @ frame_needed = 0, uses_anonymous_args = 0 +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7010 .loc 1 4179 1 is_stmt 0 view .LVU2350 + 7011 0000 38B5 push {r3, r4, r5, lr} + 7012 .cfi_def_cfa_offset 16 + 7013 .cfi_offset 3, -16 + 7014 .cfi_offset 4, -12 + 7015 .cfi_offset 5, -8 + 7016 .cfi_offset 14, -4 +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7017 .loc 1 4180 3 is_stmt 1 view .LVU2351 + 7018 .LVL573: +4183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); + 7019 .loc 1 4183 3 view .LVU2352 +4184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); + 7020 .loc 1 4184 3 view .LVU2353 +4185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); + 7021 .loc 1 4185 3 view .LVU2354 +4186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); + 7022 .loc 1 4186 3 view .LVU2355 +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7023 .loc 1 4187 3 view .LVU2356 +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7024 .loc 1 4190 3 view .LVU2357 +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7025 .loc 1 4190 3 view .LVU2358 + 7026 0002 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7027 0006 012B cmp r3, #1 + 7028 0008 5ED0 beq .L435 + 7029 000a 0446 mov r4, r0 + 7030 000c 0D46 mov r5, r1 +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7031 .loc 1 4190 3 discriminator 2 view .LVU2359 + 7032 000e 0123 movs r3, #1 + 7033 0010 80F83C30 strb r3, [r0, #60] +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7034 .loc 1 4190 3 discriminator 2 view .LVU2360 +4192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7035 .loc 1 4192 3 view .LVU2361 + 7036 0014 0C2A cmp r2, #12 + 7037 0016 52D8 bhi .L436 + 7038 0018 DFE802F0 tbb [pc, r2] + 7039 .L431: + ARM GAS /tmp/cc0aF2h1.s page 293 + + + 7040 001c 07 .byte (.L434-.L431)/2 + 7041 001d 51 .byte (.L436-.L431)/2 + 7042 001e 51 .byte (.L436-.L431)/2 + 7043 001f 51 .byte (.L436-.L431)/2 + 7044 0020 19 .byte (.L433-.L431)/2 + 7045 0021 51 .byte (.L436-.L431)/2 + 7046 0022 51 .byte (.L436-.L431)/2 + 7047 0023 51 .byte (.L436-.L431)/2 + 7048 0024 2C .byte (.L432-.L431)/2 + 7049 0025 51 .byte (.L436-.L431)/2 + 7050 0026 51 .byte (.L436-.L431)/2 + 7051 0027 51 .byte (.L436-.L431)/2 + 7052 0028 3E .byte (.L430-.L431)/2 + 7053 0029 00 .p2align 1 + 7054 .L434: +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7055 .loc 1 4195 5 view .LVU2362 + 7056 002a CB68 ldr r3, [r1, #12] + 7057 002c 4A68 ldr r2, [r1, #4] + 7058 .LVL574: +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7059 .loc 1 4195 5 is_stmt 0 view .LVU2363 + 7060 002e 0968 ldr r1, [r1] + 7061 .LVL575: +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7062 .loc 1 4195 5 view .LVU2364 + 7063 0030 0068 ldr r0, [r0] + 7064 .LVL576: +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7065 .loc 1 4195 5 view .LVU2365 + 7066 0032 FFF7FEFF bl TIM_TI1_SetConfig + 7067 .LVL577: +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7068 .loc 1 4201 5 is_stmt 1 view .LVU2366 +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7069 .loc 1 4201 9 is_stmt 0 view .LVU2367 + 7070 0036 2268 ldr r2, [r4] +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7071 .loc 1 4201 19 view .LVU2368 + 7072 0038 9369 ldr r3, [r2, #24] +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7073 .loc 1 4201 27 view .LVU2369 + 7074 003a 23F00C03 bic r3, r3, #12 + 7075 003e 9361 str r3, [r2, #24] +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7076 .loc 1 4204 5 is_stmt 1 view .LVU2370 +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7077 .loc 1 4204 9 is_stmt 0 view .LVU2371 + 7078 0040 2268 ldr r2, [r4] +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7079 .loc 1 4204 19 view .LVU2372 + 7080 0042 9369 ldr r3, [r2, #24] +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7081 .loc 1 4204 37 view .LVU2373 + 7082 0044 A968 ldr r1, [r5, #8] +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7083 .loc 1 4204 27 view .LVU2374 + ARM GAS /tmp/cc0aF2h1.s page 294 + + + 7084 0046 0B43 orrs r3, r3, r1 + 7085 0048 9361 str r3, [r2, #24] +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7086 .loc 1 4180 21 view .LVU2375 + 7087 004a 0020 movs r0, #0 + 7088 004c 38E0 b .L429 + 7089 .LVL578: + 7090 .L433: +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7091 .loc 1 4209 5 is_stmt 1 view .LVU2376 +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7092 .loc 1 4211 5 view .LVU2377 + 7093 004e CB68 ldr r3, [r1, #12] + 7094 0050 4A68 ldr r2, [r1, #4] + 7095 .LVL579: +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7096 .loc 1 4211 5 is_stmt 0 view .LVU2378 + 7097 0052 0968 ldr r1, [r1] + 7098 .LVL580: +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7099 .loc 1 4211 5 view .LVU2379 + 7100 0054 0068 ldr r0, [r0] + 7101 .LVL581: +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7102 .loc 1 4211 5 view .LVU2380 + 7103 0056 FFF7FEFF bl TIM_TI2_SetConfig + 7104 .LVL582: +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7105 .loc 1 4217 5 is_stmt 1 view .LVU2381 +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7106 .loc 1 4217 9 is_stmt 0 view .LVU2382 + 7107 005a 2268 ldr r2, [r4] +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7108 .loc 1 4217 19 view .LVU2383 + 7109 005c 9369 ldr r3, [r2, #24] +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7110 .loc 1 4217 27 view .LVU2384 + 7111 005e 23F44063 bic r3, r3, #3072 + 7112 0062 9361 str r3, [r2, #24] +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7113 .loc 1 4220 5 is_stmt 1 view .LVU2385 +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7114 .loc 1 4220 9 is_stmt 0 view .LVU2386 + 7115 0064 2268 ldr r2, [r4] +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7116 .loc 1 4220 19 view .LVU2387 + 7117 0066 9369 ldr r3, [r2, #24] +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7118 .loc 1 4220 38 view .LVU2388 + 7119 0068 A968 ldr r1, [r5, #8] +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7120 .loc 1 4220 27 view .LVU2389 + 7121 006a 43EA0123 orr r3, r3, r1, lsl #8 + 7122 006e 9361 str r3, [r2, #24] +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7123 .loc 1 4180 21 view .LVU2390 + 7124 0070 0020 movs r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 295 + + + 7125 0072 25E0 b .L429 + 7126 .LVL583: + 7127 .L432: +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7128 .loc 1 4225 5 is_stmt 1 view .LVU2391 +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7129 .loc 1 4227 5 view .LVU2392 + 7130 0074 CB68 ldr r3, [r1, #12] + 7131 0076 4A68 ldr r2, [r1, #4] + 7132 .LVL584: +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7133 .loc 1 4227 5 is_stmt 0 view .LVU2393 + 7134 0078 0968 ldr r1, [r1] + 7135 .LVL585: +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7136 .loc 1 4227 5 view .LVU2394 + 7137 007a 0068 ldr r0, [r0] + 7138 .LVL586: +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7139 .loc 1 4227 5 view .LVU2395 + 7140 007c FFF7FEFF bl TIM_TI3_SetConfig + 7141 .LVL587: +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7142 .loc 1 4233 5 is_stmt 1 view .LVU2396 +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7143 .loc 1 4233 9 is_stmt 0 view .LVU2397 + 7144 0080 2268 ldr r2, [r4] +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7145 .loc 1 4233 19 view .LVU2398 + 7146 0082 D369 ldr r3, [r2, #28] +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7147 .loc 1 4233 27 view .LVU2399 + 7148 0084 23F00C03 bic r3, r3, #12 + 7149 0088 D361 str r3, [r2, #28] +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7150 .loc 1 4236 5 is_stmt 1 view .LVU2400 +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7151 .loc 1 4236 9 is_stmt 0 view .LVU2401 + 7152 008a 2268 ldr r2, [r4] +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7153 .loc 1 4236 19 view .LVU2402 + 7154 008c D369 ldr r3, [r2, #28] +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7155 .loc 1 4236 37 view .LVU2403 + 7156 008e A968 ldr r1, [r5, #8] +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7157 .loc 1 4236 27 view .LVU2404 + 7158 0090 0B43 orrs r3, r3, r1 + 7159 0092 D361 str r3, [r2, #28] +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7160 .loc 1 4180 21 view .LVU2405 + 7161 0094 0020 movs r0, #0 + 7162 0096 13E0 b .L429 + 7163 .LVL588: + 7164 .L430: +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7165 .loc 1 4241 5 is_stmt 1 view .LVU2406 + ARM GAS /tmp/cc0aF2h1.s page 296 + + +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7166 .loc 1 4243 5 view .LVU2407 + 7167 0098 CB68 ldr r3, [r1, #12] + 7168 009a 4A68 ldr r2, [r1, #4] + 7169 .LVL589: +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7170 .loc 1 4243 5 is_stmt 0 view .LVU2408 + 7171 009c 0968 ldr r1, [r1] + 7172 .LVL590: +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7173 .loc 1 4243 5 view .LVU2409 + 7174 009e 0068 ldr r0, [r0] + 7175 .LVL591: +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICPolarity, + 7176 .loc 1 4243 5 view .LVU2410 + 7177 00a0 FFF7FEFF bl TIM_TI4_SetConfig + 7178 .LVL592: +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7179 .loc 1 4249 5 is_stmt 1 view .LVU2411 +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7180 .loc 1 4249 9 is_stmt 0 view .LVU2412 + 7181 00a4 2268 ldr r2, [r4] +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7182 .loc 1 4249 19 view .LVU2413 + 7183 00a6 D369 ldr r3, [r2, #28] +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7184 .loc 1 4249 27 view .LVU2414 + 7185 00a8 23F44063 bic r3, r3, #3072 + 7186 00ac D361 str r3, [r2, #28] +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7187 .loc 1 4252 5 is_stmt 1 view .LVU2415 +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7188 .loc 1 4252 9 is_stmt 0 view .LVU2416 + 7189 00ae 2268 ldr r2, [r4] +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7190 .loc 1 4252 19 view .LVU2417 + 7191 00b0 D369 ldr r3, [r2, #28] +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7192 .loc 1 4252 38 view .LVU2418 + 7193 00b2 A968 ldr r1, [r5, #8] +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7194 .loc 1 4252 27 view .LVU2419 + 7195 00b4 43EA0123 orr r3, r3, r1, lsl #8 + 7196 00b8 D361 str r3, [r2, #28] +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7197 .loc 1 4180 21 view .LVU2420 + 7198 00ba 0020 movs r0, #0 + 7199 00bc 00E0 b .L429 + 7200 .LVL593: + 7201 .L436: +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7202 .loc 1 4190 3 discriminator 2 view .LVU2421 + 7203 00be 0120 movs r0, #1 + 7204 .LVL594: + 7205 .L429: +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7206 .loc 1 4259 3 is_stmt 1 view .LVU2422 + ARM GAS /tmp/cc0aF2h1.s page 297 + + +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7207 .loc 1 4259 3 view .LVU2423 + 7208 00c0 0023 movs r3, #0 + 7209 00c2 84F83C30 strb r3, [r4, #60] +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7210 .loc 1 4259 3 view .LVU2424 +4261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7211 .loc 1 4261 3 view .LVU2425 + 7212 .LVL595: + 7213 .L428: +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7214 .loc 1 4262 1 is_stmt 0 view .LVU2426 + 7215 00c6 38BD pop {r3, r4, r5, pc} + 7216 .LVL596: + 7217 .L435: +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7218 .loc 1 4190 3 discriminator 1 view .LVU2427 + 7219 00c8 0220 movs r0, #2 + 7220 .LVL597: +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7221 .loc 1 4190 3 discriminator 1 view .LVU2428 + 7222 00ca FCE7 b .L428 + 7223 .cfi_endproc + 7224 .LFE190: + 7226 .section .text.HAL_TIM_OnePulse_ConfigChannel,"ax",%progbits + 7227 .align 1 + 7228 .global HAL_TIM_OnePulse_ConfigChannel + 7229 .syntax unified + 7230 .thumb + 7231 .thumb_func + 7233 HAL_TIM_OnePulse_ConfigChannel: + 7234 .LVL598: + 7235 .LFB192: +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7236 .loc 1 4434 1 is_stmt 1 view -0 + 7237 .cfi_startproc + 7238 @ args = 0, pretend = 0, frame = 32 + 7239 @ frame_needed = 0, uses_anonymous_args = 0 +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; + 7240 .loc 1 4435 3 view .LVU2430 +4436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7241 .loc 1 4436 3 view .LVU2431 +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); + 7242 .loc 1 4439 3 view .LVU2432 +4440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7243 .loc 1 4440 3 view .LVU2433 +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7244 .loc 1 4442 3 view .LVU2434 +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7245 .loc 1 4442 6 is_stmt 0 view .LVU2435 + 7246 0000 9A42 cmp r2, r3 + 7247 0002 7AD0 beq .L446 +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7248 .loc 1 4434 1 view .LVU2436 + 7249 0004 70B5 push {r4, r5, r6, lr} + 7250 .cfi_def_cfa_offset 16 + 7251 .cfi_offset 4, -16 + ARM GAS /tmp/cc0aF2h1.s page 298 + + + 7252 .cfi_offset 5, -12 + 7253 .cfi_offset 6, -8 + 7254 .cfi_offset 14, -4 + 7255 0006 88B0 sub sp, sp, #32 + 7256 .cfi_def_cfa_offset 48 + 7257 0008 0446 mov r4, r0 + 7258 000a 0D46 mov r5, r1 + 7259 000c 1E46 mov r6, r3 +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7260 .loc 1 4445 5 is_stmt 1 view .LVU2437 +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7261 .loc 1 4445 5 view .LVU2438 + 7262 000e 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7263 .LVL599: +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7264 .loc 1 4445 5 is_stmt 0 view .LVU2439 + 7265 0012 012B cmp r3, #1 + 7266 0014 73D0 beq .L447 +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7267 .loc 1 4445 5 is_stmt 1 discriminator 2 view .LVU2440 + 7268 0016 0123 movs r3, #1 + 7269 0018 80F83C30 strb r3, [r0, #60] +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7270 .loc 1 4445 5 discriminator 2 view .LVU2441 +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7271 .loc 1 4447 5 view .LVU2442 +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7272 .loc 1 4447 17 is_stmt 0 view .LVU2443 + 7273 001c 0223 movs r3, #2 + 7274 001e 80F83D30 strb r3, [r0, #61] +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7275 .loc 1 4450 5 is_stmt 1 view .LVU2444 +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7276 .loc 1 4450 27 is_stmt 0 view .LVU2445 + 7277 0022 0B68 ldr r3, [r1] +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7278 .loc 1 4450 18 view .LVU2446 + 7279 0024 0193 str r3, [sp, #4] +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7280 .loc 1 4451 5 is_stmt 1 view .LVU2447 +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7281 .loc 1 4451 26 is_stmt 0 view .LVU2448 + 7282 0026 4B68 ldr r3, [r1, #4] +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7283 .loc 1 4451 17 view .LVU2449 + 7284 0028 0293 str r3, [sp, #8] +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7285 .loc 1 4452 5 is_stmt 1 view .LVU2450 +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7286 .loc 1 4452 31 is_stmt 0 view .LVU2451 + 7287 002a 8B68 ldr r3, [r1, #8] +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7288 .loc 1 4452 22 view .LVU2452 + 7289 002c 0393 str r3, [sp, #12] +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7290 .loc 1 4453 5 is_stmt 1 view .LVU2453 +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + ARM GAS /tmp/cc0aF2h1.s page 299 + + + 7291 .loc 1 4453 32 is_stmt 0 view .LVU2454 + 7292 002e CB68 ldr r3, [r1, #12] +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7293 .loc 1 4453 23 view .LVU2455 + 7294 0030 0493 str r3, [sp, #16] +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7295 .loc 1 4454 5 is_stmt 1 view .LVU2456 +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7296 .loc 1 4454 32 is_stmt 0 view .LVU2457 + 7297 0032 0B69 ldr r3, [r1, #16] +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7298 .loc 1 4454 23 view .LVU2458 + 7299 0034 0693 str r3, [sp, #24] +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7300 .loc 1 4455 5 is_stmt 1 view .LVU2459 +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7301 .loc 1 4455 33 is_stmt 0 view .LVU2460 + 7302 0036 4B69 ldr r3, [r1, #20] +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7303 .loc 1 4455 24 view .LVU2461 + 7304 0038 0793 str r3, [sp, #28] +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7305 .loc 1 4457 5 is_stmt 1 view .LVU2462 + 7306 003a 52B1 cbz r2, .L440 + 7307 003c 042A cmp r2, #4 + 7308 003e 11D0 beq .L441 + 7309 0040 0120 movs r0, #1 + 7310 .LVL600: + 7311 .L442: +4530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7312 .loc 1 4530 5 view .LVU2463 +4530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7313 .loc 1 4530 17 is_stmt 0 view .LVU2464 + 7314 0042 0123 movs r3, #1 + 7315 0044 84F83D30 strb r3, [r4, #61] +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7316 .loc 1 4532 5 is_stmt 1 view .LVU2465 +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7317 .loc 1 4532 5 view .LVU2466 + 7318 0048 0023 movs r3, #0 + 7319 004a 84F83C30 strb r3, [r4, #60] +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7320 .loc 1 4532 5 view .LVU2467 +4534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7321 .loc 1 4534 5 view .LVU2468 + 7322 .LVL601: + 7323 .L439: +4540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7324 .loc 1 4540 1 is_stmt 0 view .LVU2469 + 7325 004e 08B0 add sp, sp, #32 + 7326 .cfi_remember_state + 7327 .cfi_def_cfa_offset 16 + 7328 @ sp needed + 7329 0050 70BD pop {r4, r5, r6, pc} + 7330 .LVL602: + 7331 .L440: + 7332 .cfi_restore_state + ARM GAS /tmp/cc0aF2h1.s page 300 + + +4461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7333 .loc 1 4461 9 is_stmt 1 view .LVU2470 +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7334 .loc 1 4463 9 view .LVU2471 + 7335 0052 01A9 add r1, sp, #4 + 7336 .LVL603: +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7337 .loc 1 4463 9 is_stmt 0 view .LVU2472 + 7338 0054 0068 ldr r0, [r0] + 7339 .LVL604: +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7340 .loc 1 4463 9 view .LVU2473 + 7341 0056 FFF7FEFF bl TIM_OC1_SetConfig + 7342 .LVL605: +4464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7343 .loc 1 4464 9 is_stmt 1 view .LVU2474 +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7344 .loc 1 4480 5 view .LVU2475 + 7345 .L443: +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7346 .loc 1 4482 7 view .LVU2476 + 7347 005a 46B1 cbz r6, .L444 + 7348 005c 042E cmp r6, #4 + 7349 005e 29D0 beq .L445 + 7350 0060 0120 movs r0, #1 + 7351 0062 EEE7 b .L442 + 7352 .LVL606: + 7353 .L441: +4469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7354 .loc 1 4469 9 view .LVU2477 +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7355 .loc 1 4471 9 view .LVU2478 + 7356 0064 01A9 add r1, sp, #4 + 7357 .LVL607: +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7358 .loc 1 4471 9 is_stmt 0 view .LVU2479 + 7359 0066 0068 ldr r0, [r0] + 7360 .LVL608: +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7361 .loc 1 4471 9 view .LVU2480 + 7362 0068 FFF7FEFF bl TIM_OC2_SetConfig + 7363 .LVL609: +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7364 .loc 1 4472 9 is_stmt 1 view .LVU2481 +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7365 .loc 1 4480 5 view .LVU2482 + 7366 006c F5E7 b .L443 + 7367 .L444: +4486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7368 .loc 1 4486 11 view .LVU2483 +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); + 7369 .loc 1 4488 11 view .LVU2484 + 7370 006e 2B6A ldr r3, [r5, #32] + 7371 0070 EA69 ldr r2, [r5, #28] + 7372 0072 A969 ldr r1, [r5, #24] + 7373 0074 2068 ldr r0, [r4] + 7374 0076 FFF7FEFF bl TIM_TI1_SetConfig + ARM GAS /tmp/cc0aF2h1.s page 301 + + + 7375 .LVL610: +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7376 .loc 1 4492 11 view .LVU2485 +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7377 .loc 1 4492 15 is_stmt 0 view .LVU2486 + 7378 007a 2268 ldr r2, [r4] +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7379 .loc 1 4492 25 view .LVU2487 + 7380 007c 9369 ldr r3, [r2, #24] +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7381 .loc 1 4492 33 view .LVU2488 + 7382 007e 23F00C03 bic r3, r3, #12 + 7383 0082 9361 str r3, [r2, #24] +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7384 .loc 1 4495 11 is_stmt 1 view .LVU2489 +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7385 .loc 1 4495 15 is_stmt 0 view .LVU2490 + 7386 0084 2268 ldr r2, [r4] +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7387 .loc 1 4495 25 view .LVU2491 + 7388 0086 9368 ldr r3, [r2, #8] +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7389 .loc 1 4495 32 view .LVU2492 + 7390 0088 23F07003 bic r3, r3, #112 + 7391 008c 9360 str r3, [r2, #8] +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7392 .loc 1 4496 11 is_stmt 1 view .LVU2493 +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7393 .loc 1 4496 15 is_stmt 0 view .LVU2494 + 7394 008e 2268 ldr r2, [r4] +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7395 .loc 1 4496 25 view .LVU2495 + 7396 0090 9368 ldr r3, [r2, #8] +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7397 .loc 1 4496 32 view .LVU2496 + 7398 0092 43F05003 orr r3, r3, #80 + 7399 0096 9360 str r3, [r2, #8] +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7400 .loc 1 4499 11 is_stmt 1 view .LVU2497 +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7401 .loc 1 4499 15 is_stmt 0 view .LVU2498 + 7402 0098 2268 ldr r2, [r4] +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7403 .loc 1 4499 25 view .LVU2499 + 7404 009a 9368 ldr r3, [r2, #8] +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7405 .loc 1 4499 32 view .LVU2500 + 7406 009c 23F48033 bic r3, r3, #65536 + 7407 00a0 23F00703 bic r3, r3, #7 + 7408 00a4 9360 str r3, [r2, #8] +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7409 .loc 1 4500 11 is_stmt 1 view .LVU2501 +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7410 .loc 1 4500 15 is_stmt 0 view .LVU2502 + 7411 00a6 2268 ldr r2, [r4] +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7412 .loc 1 4500 25 view .LVU2503 + ARM GAS /tmp/cc0aF2h1.s page 302 + + + 7413 00a8 9368 ldr r3, [r2, #8] +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7414 .loc 1 4500 32 view .LVU2504 + 7415 00aa 43F00603 orr r3, r3, #6 + 7416 00ae 9360 str r3, [r2, #8] +4501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7417 .loc 1 4501 11 is_stmt 1 view .LVU2505 + 7418 00b0 0020 movs r0, #0 + 7419 00b2 C6E7 b .L442 + 7420 .L445: +4506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7421 .loc 1 4506 11 view .LVU2506 +4508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); + 7422 .loc 1 4508 11 view .LVU2507 + 7423 00b4 2B6A ldr r3, [r5, #32] + 7424 00b6 EA69 ldr r2, [r5, #28] + 7425 00b8 A969 ldr r1, [r5, #24] + 7426 00ba 2068 ldr r0, [r4] + 7427 00bc FFF7FEFF bl TIM_TI2_SetConfig + 7428 .LVL611: +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7429 .loc 1 4512 11 view .LVU2508 +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7430 .loc 1 4512 15 is_stmt 0 view .LVU2509 + 7431 00c0 2268 ldr r2, [r4] +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7432 .loc 1 4512 25 view .LVU2510 + 7433 00c2 9369 ldr r3, [r2, #24] +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7434 .loc 1 4512 33 view .LVU2511 + 7435 00c4 23F44063 bic r3, r3, #3072 + 7436 00c8 9361 str r3, [r2, #24] +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7437 .loc 1 4515 11 is_stmt 1 view .LVU2512 +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7438 .loc 1 4515 15 is_stmt 0 view .LVU2513 + 7439 00ca 2268 ldr r2, [r4] +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7440 .loc 1 4515 25 view .LVU2514 + 7441 00cc 9368 ldr r3, [r2, #8] +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7442 .loc 1 4515 32 view .LVU2515 + 7443 00ce 23F07003 bic r3, r3, #112 + 7444 00d2 9360 str r3, [r2, #8] +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7445 .loc 1 4516 11 is_stmt 1 view .LVU2516 +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7446 .loc 1 4516 15 is_stmt 0 view .LVU2517 + 7447 00d4 2268 ldr r2, [r4] +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7448 .loc 1 4516 25 view .LVU2518 + 7449 00d6 9368 ldr r3, [r2, #8] +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7450 .loc 1 4516 32 view .LVU2519 + 7451 00d8 43F06003 orr r3, r3, #96 + 7452 00dc 9360 str r3, [r2, #8] +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + ARM GAS /tmp/cc0aF2h1.s page 303 + + + 7453 .loc 1 4519 11 is_stmt 1 view .LVU2520 +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7454 .loc 1 4519 15 is_stmt 0 view .LVU2521 + 7455 00de 2268 ldr r2, [r4] +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7456 .loc 1 4519 25 view .LVU2522 + 7457 00e0 9368 ldr r3, [r2, #8] +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7458 .loc 1 4519 32 view .LVU2523 + 7459 00e2 23F48033 bic r3, r3, #65536 + 7460 00e6 23F00703 bic r3, r3, #7 + 7461 00ea 9360 str r3, [r2, #8] +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7462 .loc 1 4520 11 is_stmt 1 view .LVU2524 +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7463 .loc 1 4520 15 is_stmt 0 view .LVU2525 + 7464 00ec 2268 ldr r2, [r4] +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7465 .loc 1 4520 25 view .LVU2526 + 7466 00ee 9368 ldr r3, [r2, #8] +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7467 .loc 1 4520 32 view .LVU2527 + 7468 00f0 43F00603 orr r3, r3, #6 + 7469 00f4 9360 str r3, [r2, #8] +4521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7470 .loc 1 4521 11 is_stmt 1 view .LVU2528 + 7471 00f6 0020 movs r0, #0 + 7472 00f8 A3E7 b .L442 + 7473 .LVL612: + 7474 .L446: + 7475 .cfi_def_cfa_offset 0 + 7476 .cfi_restore 4 + 7477 .cfi_restore 5 + 7478 .cfi_restore 6 + 7479 .cfi_restore 14 +4538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7480 .loc 1 4538 12 is_stmt 0 view .LVU2529 + 7481 00fa 0120 movs r0, #1 + 7482 .LVL613: +4540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7483 .loc 1 4540 1 view .LVU2530 + 7484 00fc 7047 bx lr + 7485 .LVL614: + 7486 .L447: + 7487 .cfi_def_cfa_offset 48 + 7488 .cfi_offset 4, -16 + 7489 .cfi_offset 5, -12 + 7490 .cfi_offset 6, -8 + 7491 .cfi_offset 14, -4 +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7492 .loc 1 4445 5 discriminator 1 view .LVU2531 + 7493 00fe 0220 movs r0, #2 + 7494 .LVL615: +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7495 .loc 1 4445 5 discriminator 1 view .LVU2532 + 7496 0100 A5E7 b .L439 + 7497 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 304 + + + 7498 .LFE192: + 7500 .section .text.TIM_ETR_SetConfig,"ax",%progbits + 7501 .align 1 + 7502 .global TIM_ETR_SetConfig + 7503 .syntax unified + 7504 .thumb + 7505 .thumb_func + 7507 TIM_ETR_SetConfig: + 7508 .LVL616: + 7509 .LFB249: +7828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Configures the TIMx External Trigger (ETR). +7830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ExtTRGPrescaler The external Trigger Prescaler. +7832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV1: ETRP Prescaler OFF. +7834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV2: ETRP frequency divided by 2. +7835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV4: ETRP frequency divided by 4. +7836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV8: ETRP frequency divided by 8. +7837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIM_ExtTRGPolarity The external Trigger Polarity. +7838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ETRPOLARITY_INVERTED: active low or falling edge active. +7840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_ETRPOLARITY_NONINVERTED: active high or rising edge active. +7841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param ExtTRGFilter External Trigger Filter. +7842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F +7843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, +7846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) +7847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7510 .loc 1 7847 1 is_stmt 1 view -0 + 7511 .cfi_startproc + 7512 @ args = 0, pretend = 0, frame = 0 + 7513 @ frame_needed = 0, uses_anonymous_args = 0 + 7514 @ link register save eliminated. + 7515 .loc 1 7847 1 is_stmt 0 view .LVU2534 + 7516 0000 10B4 push {r4} + 7517 .cfi_def_cfa_offset 4 + 7518 .cfi_offset 4, -4 +7848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 7519 .loc 1 7848 3 is_stmt 1 view .LVU2535 +7849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr = TIMx->SMCR; + 7520 .loc 1 7850 3 view .LVU2536 + 7521 .loc 1 7850 11 is_stmt 0 view .LVU2537 + 7522 0002 8468 ldr r4, [r0, #8] + 7523 .LVL617: +7851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the ETR Bits */ +7853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 7524 .loc 1 7853 3 is_stmt 1 view .LVU2538 + 7525 .loc 1 7853 11 is_stmt 0 view .LVU2539 + 7526 0004 24F47F4C bic ip, r4, #65280 + 7527 .LVL618: +7854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Prescaler, the Filter value and the Polarity */ +7856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); + ARM GAS /tmp/cc0aF2h1.s page 305 + + + 7528 .loc 1 7856 3 is_stmt 1 view .LVU2540 + 7529 .loc 1 7856 67 is_stmt 0 view .LVU2541 + 7530 0008 42EA0322 orr r2, r2, r3, lsl #8 + 7531 .LVL619: + 7532 .loc 1 7856 45 view .LVU2542 + 7533 000c 0A43 orrs r2, r2, r1 + 7534 .loc 1 7856 11 view .LVU2543 + 7535 000e 42EA0C02 orr r2, r2, ip + 7536 .LVL620: +7857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ +7859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->SMCR = tmpsmcr; + 7537 .loc 1 7859 3 is_stmt 1 view .LVU2544 + 7538 .loc 1 7859 14 is_stmt 0 view .LVU2545 + 7539 0012 8260 str r2, [r0, #8] +7860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7540 .loc 1 7860 1 view .LVU2546 + 7541 0014 5DF8044B ldr r4, [sp], #4 + 7542 .cfi_restore 4 + 7543 .cfi_def_cfa_offset 0 + 7544 0018 7047 bx lr + 7545 .cfi_endproc + 7546 .LFE249: + 7548 .section .text.HAL_TIM_ConfigOCrefClear,"ax",%progbits + 7549 .align 1 + 7550 .global HAL_TIM_ConfigOCrefClear + 7551 .syntax unified + 7552 .thumb + 7553 .thumb_func + 7555 HAL_TIM_ConfigOCrefClear: + 7556 .LVL621: + 7557 .LFB200: +5299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7558 .loc 1 5299 1 is_stmt 1 view -0 + 7559 .cfi_startproc + 7560 @ args = 0, pretend = 0, frame = 0 + 7561 @ frame_needed = 0, uses_anonymous_args = 0 +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7562 .loc 1 5300 3 view .LVU2548 +5303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); + 7563 .loc 1 5303 3 view .LVU2549 +5304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7564 .loc 1 5304 3 view .LVU2550 +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7565 .loc 1 5307 3 view .LVU2551 +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7566 .loc 1 5307 3 view .LVU2552 + 7567 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7568 0004 012B cmp r3, #1 + 7569 0006 00F0AD80 beq .L474 +5299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7570 .loc 1 5299 1 is_stmt 0 view .LVU2553 + 7571 000a 70B5 push {r4, r5, r6, lr} + 7572 .cfi_def_cfa_offset 16 + 7573 .cfi_offset 4, -16 + 7574 .cfi_offset 5, -12 + 7575 .cfi_offset 6, -8 + ARM GAS /tmp/cc0aF2h1.s page 306 + + + 7576 .cfi_offset 14, -4 + 7577 000c 0446 mov r4, r0 + 7578 000e 0D46 mov r5, r1 + 7579 0010 1646 mov r6, r2 +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7580 .loc 1 5307 3 is_stmt 1 discriminator 2 view .LVU2554 + 7581 0012 0123 movs r3, #1 + 7582 0014 80F83C30 strb r3, [r0, #60] +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7583 .loc 1 5307 3 discriminator 2 view .LVU2555 +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7584 .loc 1 5309 3 view .LVU2556 +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7585 .loc 1 5309 15 is_stmt 0 view .LVU2557 + 7586 0018 0223 movs r3, #2 + 7587 001a 80F83D30 strb r3, [r0, #61] +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7588 .loc 1 5311 3 is_stmt 1 view .LVU2558 +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7589 .loc 1 5311 28 is_stmt 0 view .LVU2559 + 7590 001e 4B68 ldr r3, [r1, #4] +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7591 .loc 1 5311 3 view .LVU2560 + 7592 0020 012B cmp r3, #1 + 7593 0022 21D0 beq .L456 + 7594 0024 022B cmp r3, #2 + 7595 0026 19D0 beq .L457 + 7596 0028 002B cmp r3, #0 + 7597 002a 40F09180 bne .L475 +5317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else + 7598 .loc 1 5317 7 is_stmt 1 view .LVU2561 + 7599 002e 0268 ldr r2, [r0] + 7600 .LVL622: +5317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #else + 7601 .loc 1 5317 7 is_stmt 0 view .LVU2562 + 7602 0030 9368 ldr r3, [r2, #8] + 7603 0032 23F47F43 bic r3, r3, #65280 + 7604 0036 23F00803 bic r3, r3, #8 + 7605 003a 9360 str r3, [r2, #8] +5321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7606 .loc 1 5321 7 is_stmt 1 view .LVU2563 +5364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7607 .loc 1 5364 3 view .LVU2564 + 7608 .LVL623: + 7609 .L459: +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7610 .loc 1 5366 5 view .LVU2565 + 7611 003c 142E cmp r6, #20 + 7612 003e 00F28980 bhi .L476 + 7613 0042 DFE806F0 tbb [pc, r6] + 7614 .L462: + 7615 0046 25 .byte (.L467-.L462)/2 + 7616 0047 87 .byte (.L476-.L462)/2 + 7617 0048 87 .byte (.L476-.L462)/2 + 7618 0049 87 .byte (.L476-.L462)/2 + 7619 004a 35 .byte (.L466-.L462)/2 + 7620 004b 87 .byte (.L476-.L462)/2 + ARM GAS /tmp/cc0aF2h1.s page 307 + + + 7621 004c 87 .byte (.L476-.L462)/2 + 7622 004d 87 .byte (.L476-.L462)/2 + 7623 004e 45 .byte (.L465-.L462)/2 + 7624 004f 87 .byte (.L476-.L462)/2 + 7625 0050 87 .byte (.L476-.L462)/2 + 7626 0051 87 .byte (.L476-.L462)/2 + 7627 0052 55 .byte (.L464-.L462)/2 + 7628 0053 87 .byte (.L476-.L462)/2 + 7629 0054 87 .byte (.L476-.L462)/2 + 7630 0055 87 .byte (.L476-.L462)/2 + 7631 0056 65 .byte (.L463-.L462)/2 + 7632 0057 87 .byte (.L476-.L462)/2 + 7633 0058 87 .byte (.L476-.L462)/2 + 7634 0059 87 .byte (.L476-.L462)/2 + 7635 005a 75 .byte (.L461-.L462)/2 + 7636 .LVL624: + 7637 005b 00 .p2align 1 + 7638 .L457: +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7639 .loc 1 5327 7 view .LVU2566 + 7640 005c 0268 ldr r2, [r0] + 7641 .LVL625: +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7642 .loc 1 5327 7 is_stmt 0 view .LVU2567 + 7643 005e 9368 ldr r3, [r2, #8] + 7644 0060 23F00803 bic r3, r3, #8 + 7645 0064 9360 str r3, [r2, #8] +5328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7646 .loc 1 5328 7 is_stmt 1 view .LVU2568 +5364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7647 .loc 1 5364 3 view .LVU2569 + 7648 0066 E9E7 b .L459 + 7649 .LVL626: + 7650 .L456: +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); + 7651 .loc 1 5335 7 view .LVU2570 +5336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); + 7652 .loc 1 5336 7 view .LVU2571 +5337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7653 .loc 1 5337 7 view .LVU2572 +5340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7654 .loc 1 5340 7 view .LVU2573 +5340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7655 .loc 1 5340 28 is_stmt 0 view .LVU2574 + 7656 0068 C968 ldr r1, [r1, #12] + 7657 .LVL627: +5340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7658 .loc 1 5340 10 view .LVU2575 + 7659 006a 31B1 cbz r1, .L460 +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7660 .loc 1 5342 9 is_stmt 1 view .LVU2576 +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7661 .loc 1 5342 21 is_stmt 0 view .LVU2577 + 7662 006c 0120 movs r0, #1 + 7663 .LVL628: +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7664 .loc 1 5342 21 view .LVU2578 + ARM GAS /tmp/cc0aF2h1.s page 308 + + + 7665 006e 84F83D00 strb r0, [r4, #61] +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 7666 .loc 1 5343 9 is_stmt 1 view .LVU2579 +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 7667 .loc 1 5343 9 view .LVU2580 + 7668 0072 0023 movs r3, #0 + 7669 0074 84F83C30 strb r3, [r4, #60] +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 7670 .loc 1 5343 9 view .LVU2581 +5344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7671 .loc 1 5344 9 view .LVU2582 +5344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7672 .loc 1 5344 16 is_stmt 0 view .LVU2583 + 7673 0078 73E0 b .L455 + 7674 .LVL629: + 7675 .L460: +5347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7676 .loc 1 5347 7 is_stmt 1 view .LVU2584 + 7677 007a 2B69 ldr r3, [r5, #16] + 7678 007c AA68 ldr r2, [r5, #8] + 7679 .LVL630: +5347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7680 .loc 1 5347 7 is_stmt 0 view .LVU2585 + 7681 007e 0068 ldr r0, [r0] + 7682 .LVL631: +5347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7683 .loc 1 5347 7 view .LVU2586 + 7684 0080 FFF7FEFF bl TIM_ETR_SetConfig + 7685 .LVL632: +5354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** #endif /* TIM_SMCR_OCCS */ + 7686 .loc 1 5354 7 is_stmt 1 view .LVU2587 + 7687 0084 2268 ldr r2, [r4] + 7688 0086 9368 ldr r3, [r2, #8] + 7689 0088 43F00803 orr r3, r3, #8 + 7690 008c 9360 str r3, [r2, #8] +5356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7691 .loc 1 5356 7 view .LVU2588 +5364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7692 .loc 1 5364 3 view .LVU2589 + 7693 008e D5E7 b .L459 + 7694 .L467: +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7695 .loc 1 5370 9 view .LVU2590 +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7696 .loc 1 5370 30 is_stmt 0 view .LVU2591 + 7697 0090 2B68 ldr r3, [r5] +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7698 .loc 1 5370 12 view .LVU2592 + 7699 0092 33B1 cbz r3, .L468 +5373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7700 .loc 1 5373 11 is_stmt 1 view .LVU2593 + 7701 0094 2268 ldr r2, [r4] + 7702 0096 9369 ldr r3, [r2, #24] + 7703 0098 43F08003 orr r3, r3, #128 + 7704 009c 9361 str r3, [r2, #24] + 7705 009e 0020 movs r0, #0 + 7706 00a0 59E0 b .L458 + ARM GAS /tmp/cc0aF2h1.s page 309 + + + 7707 .L468: +5378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7708 .loc 1 5378 11 view .LVU2594 + 7709 00a2 2268 ldr r2, [r4] + 7710 00a4 9369 ldr r3, [r2, #24] + 7711 00a6 23F08003 bic r3, r3, #128 + 7712 00aa 9361 str r3, [r2, #24] + 7713 00ac 0020 movs r0, #0 + 7714 00ae 52E0 b .L458 + 7715 .L466: +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7716 .loc 1 5384 9 view .LVU2595 +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7717 .loc 1 5384 30 is_stmt 0 view .LVU2596 + 7718 00b0 2B68 ldr r3, [r5] +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7719 .loc 1 5384 12 view .LVU2597 + 7720 00b2 33B1 cbz r3, .L469 +5387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7721 .loc 1 5387 11 is_stmt 1 view .LVU2598 + 7722 00b4 2268 ldr r2, [r4] + 7723 00b6 9369 ldr r3, [r2, #24] + 7724 00b8 43F40043 orr r3, r3, #32768 + 7725 00bc 9361 str r3, [r2, #24] + 7726 00be 0020 movs r0, #0 + 7727 00c0 49E0 b .L458 + 7728 .L469: +5392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7729 .loc 1 5392 11 view .LVU2599 + 7730 00c2 2268 ldr r2, [r4] + 7731 00c4 9369 ldr r3, [r2, #24] + 7732 00c6 23F40043 bic r3, r3, #32768 + 7733 00ca 9361 str r3, [r2, #24] + 7734 00cc 0020 movs r0, #0 + 7735 00ce 42E0 b .L458 + 7736 .L465: +5398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7737 .loc 1 5398 9 view .LVU2600 +5398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7738 .loc 1 5398 30 is_stmt 0 view .LVU2601 + 7739 00d0 2B68 ldr r3, [r5] +5398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7740 .loc 1 5398 12 view .LVU2602 + 7741 00d2 33B1 cbz r3, .L470 +5401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7742 .loc 1 5401 11 is_stmt 1 view .LVU2603 + 7743 00d4 2268 ldr r2, [r4] + 7744 00d6 D369 ldr r3, [r2, #28] + 7745 00d8 43F08003 orr r3, r3, #128 + 7746 00dc D361 str r3, [r2, #28] + 7747 00de 0020 movs r0, #0 + 7748 00e0 39E0 b .L458 + 7749 .L470: +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7750 .loc 1 5406 11 view .LVU2604 + 7751 00e2 2268 ldr r2, [r4] + 7752 00e4 D369 ldr r3, [r2, #28] + ARM GAS /tmp/cc0aF2h1.s page 310 + + + 7753 00e6 23F08003 bic r3, r3, #128 + 7754 00ea D361 str r3, [r2, #28] + 7755 00ec 0020 movs r0, #0 + 7756 00ee 32E0 b .L458 + 7757 .L464: +5412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7758 .loc 1 5412 9 view .LVU2605 +5412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7759 .loc 1 5412 30 is_stmt 0 view .LVU2606 + 7760 00f0 2B68 ldr r3, [r5] +5412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7761 .loc 1 5412 12 view .LVU2607 + 7762 00f2 33B1 cbz r3, .L471 +5415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7763 .loc 1 5415 11 is_stmt 1 view .LVU2608 + 7764 00f4 2268 ldr r2, [r4] + 7765 00f6 D369 ldr r3, [r2, #28] + 7766 00f8 43F40043 orr r3, r3, #32768 + 7767 00fc D361 str r3, [r2, #28] + 7768 00fe 0020 movs r0, #0 + 7769 0100 29E0 b .L458 + 7770 .L471: +5420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7771 .loc 1 5420 11 view .LVU2609 + 7772 0102 2268 ldr r2, [r4] + 7773 0104 D369 ldr r3, [r2, #28] + 7774 0106 23F40043 bic r3, r3, #32768 + 7775 010a D361 str r3, [r2, #28] + 7776 010c 0020 movs r0, #0 + 7777 010e 22E0 b .L458 + 7778 .L463: +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7779 .loc 1 5427 9 view .LVU2610 +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7780 .loc 1 5427 30 is_stmt 0 view .LVU2611 + 7781 0110 2B68 ldr r3, [r5] +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7782 .loc 1 5427 12 view .LVU2612 + 7783 0112 33B1 cbz r3, .L472 +5430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7784 .loc 1 5430 11 is_stmt 1 view .LVU2613 + 7785 0114 2268 ldr r2, [r4] + 7786 0116 536D ldr r3, [r2, #84] + 7787 0118 43F08003 orr r3, r3, #128 + 7788 011c 5365 str r3, [r2, #84] + 7789 011e 0020 movs r0, #0 + 7790 0120 19E0 b .L458 + 7791 .L472: +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7792 .loc 1 5435 11 view .LVU2614 + 7793 0122 2268 ldr r2, [r4] + 7794 0124 536D ldr r3, [r2, #84] + 7795 0126 23F08003 bic r3, r3, #128 + 7796 012a 5365 str r3, [r2, #84] + 7797 012c 0020 movs r0, #0 + 7798 012e 12E0 b .L458 + 7799 .L461: + ARM GAS /tmp/cc0aF2h1.s page 311 + + +5443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7800 .loc 1 5443 9 view .LVU2615 +5443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7801 .loc 1 5443 30 is_stmt 0 view .LVU2616 + 7802 0130 2B68 ldr r3, [r5] +5443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7803 .loc 1 5443 12 view .LVU2617 + 7804 0132 33B1 cbz r3, .L473 +5446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7805 .loc 1 5446 11 is_stmt 1 view .LVU2618 + 7806 0134 2268 ldr r2, [r4] + 7807 0136 536D ldr r3, [r2, #84] + 7808 0138 43F40043 orr r3, r3, #32768 + 7809 013c 5365 str r3, [r2, #84] + 7810 013e 0020 movs r0, #0 + 7811 0140 09E0 b .L458 + 7812 .L473: +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7813 .loc 1 5451 11 view .LVU2619 + 7814 0142 2268 ldr r2, [r4] + 7815 0144 536D ldr r3, [r2, #84] + 7816 0146 23F40043 bic r3, r3, #32768 + 7817 014a 5365 str r3, [r2, #84] + 7818 014c 0020 movs r0, #0 + 7819 014e 02E0 b .L458 + 7820 .LVL633: + 7821 .L475: +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7822 .loc 1 5311 3 is_stmt 0 view .LVU2620 + 7823 0150 0120 movs r0, #1 + 7824 .LVL634: +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7825 .loc 1 5311 3 view .LVU2621 + 7826 0152 00E0 b .L458 + 7827 .LVL635: + 7828 .L476: +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7829 .loc 1 5366 5 view .LVU2622 + 7830 0154 0020 movs r0, #0 + 7831 .L458: + 7832 .LVL636: +5461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7833 .loc 1 5461 3 is_stmt 1 view .LVU2623 +5461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7834 .loc 1 5461 15 is_stmt 0 view .LVU2624 + 7835 0156 0123 movs r3, #1 + 7836 0158 84F83D30 strb r3, [r4, #61] +5463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7837 .loc 1 5463 3 is_stmt 1 view .LVU2625 +5463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7838 .loc 1 5463 3 view .LVU2626 + 7839 015c 0023 movs r3, #0 + 7840 015e 84F83C30 strb r3, [r4, #60] +5463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7841 .loc 1 5463 3 view .LVU2627 +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7842 .loc 1 5465 3 view .LVU2628 + ARM GAS /tmp/cc0aF2h1.s page 312 + + + 7843 .L455: +5466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7844 .loc 1 5466 1 is_stmt 0 view .LVU2629 + 7845 0162 70BD pop {r4, r5, r6, pc} + 7846 .LVL637: + 7847 .L474: + 7848 .cfi_def_cfa_offset 0 + 7849 .cfi_restore 4 + 7850 .cfi_restore 5 + 7851 .cfi_restore 6 + 7852 .cfi_restore 14 +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7853 .loc 1 5307 3 discriminator 1 view .LVU2630 + 7854 0164 0220 movs r0, #2 + 7855 .LVL638: +5466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7856 .loc 1 5466 1 view .LVU2631 + 7857 0166 7047 bx lr + 7858 .cfi_endproc + 7859 .LFE200: + 7861 .section .text.HAL_TIM_ConfigClockSource,"ax",%progbits + 7862 .align 1 + 7863 .global HAL_TIM_ConfigClockSource + 7864 .syntax unified + 7865 .thumb + 7866 .thumb_func + 7868 HAL_TIM_ConfigClockSource: + 7869 .LVL639: + 7870 .LFB201: +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7871 .loc 1 5476 1 is_stmt 1 view -0 + 7872 .cfi_startproc + 7873 @ args = 0, pretend = 0, frame = 0 + 7874 @ frame_needed = 0, uses_anonymous_args = 0 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 7875 .loc 1 5477 3 view .LVU2633 +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7876 .loc 1 5478 3 view .LVU2634 +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7877 .loc 1 5481 3 view .LVU2635 +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7878 .loc 1 5481 3 view .LVU2636 + 7879 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7880 0004 012B cmp r3, #1 + 7881 0006 76D0 beq .L492 +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7882 .loc 1 5476 1 is_stmt 0 view .LVU2637 + 7883 0008 10B5 push {r4, lr} + 7884 .cfi_def_cfa_offset 8 + 7885 .cfi_offset 4, -8 + 7886 .cfi_offset 14, -4 + 7887 000a 0446 mov r4, r0 +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7888 .loc 1 5481 3 is_stmt 1 discriminator 2 view .LVU2638 + 7889 000c 0123 movs r3, #1 + 7890 000e 80F83C30 strb r3, [r0, #60] +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 313 + + + 7891 .loc 1 5481 3 discriminator 2 view .LVU2639 +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7892 .loc 1 5483 3 view .LVU2640 +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7893 .loc 1 5483 15 is_stmt 0 view .LVU2641 + 7894 0012 0223 movs r3, #2 + 7895 0014 80F83D30 strb r3, [r0, #61] +5486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7896 .loc 1 5486 3 is_stmt 1 view .LVU2642 +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 7897 .loc 1 5489 3 view .LVU2643 +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 7898 .loc 1 5489 17 is_stmt 0 view .LVU2644 + 7899 0018 0268 ldr r2, [r0] +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 7900 .loc 1 5489 11 view .LVU2645 + 7901 001a 9068 ldr r0, [r2, #8] + 7902 .LVL640: +5490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 7903 .loc 1 5490 3 is_stmt 1 view .LVU2646 +5491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 7904 .loc 1 5491 3 view .LVU2647 +5491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 7905 .loc 1 5491 11 is_stmt 0 view .LVU2648 + 7906 001c 374B ldr r3, .L501 + 7907 001e 0340 ands r3, r3, r0 + 7908 .LVL641: +5492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7909 .loc 1 5492 3 is_stmt 1 view .LVU2649 +5492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7910 .loc 1 5492 24 is_stmt 0 view .LVU2650 + 7911 0020 9360 str r3, [r2, #8] +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7912 .loc 1 5494 3 is_stmt 1 view .LVU2651 +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7913 .loc 1 5494 29 is_stmt 0 view .LVU2652 + 7914 0022 0B68 ldr r3, [r1] + 7915 .LVL642: +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7916 .loc 1 5494 3 view .LVU2653 + 7917 0024 602B cmp r3, #96 + 7918 0026 4CD0 beq .L483 + 7919 0028 23D8 bhi .L484 + 7920 002a 402B cmp r3, #64 + 7921 002c 54D0 beq .L485 + 7922 002e 11D8 bhi .L486 + 7923 0030 202B cmp r3, #32 + 7924 0032 03D0 beq .L487 + 7925 0034 0AD8 bhi .L488 + 7926 0036 0BB1 cbz r3, .L487 + 7927 0038 102B cmp r3, #16 + 7928 003a 05D1 bne .L499 + 7929 .L487: +5600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7930 .loc 1 5600 7 is_stmt 1 view .LVU2654 +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7931 .loc 1 5602 7 view .LVU2655 + ARM GAS /tmp/cc0aF2h1.s page 314 + + + 7932 003c 1946 mov r1, r3 + 7933 .LVL643: +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7934 .loc 1 5602 7 is_stmt 0 view .LVU2656 + 7935 003e 2068 ldr r0, [r4] + 7936 0040 FFF7FEFF bl TIM_ITRx_SetConfig + 7937 .LVL644: +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7938 .loc 1 5603 7 is_stmt 1 view .LVU2657 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 7939 .loc 1 5477 21 is_stmt 0 view .LVU2658 + 7940 0044 0020 movs r0, #0 +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7941 .loc 1 5603 7 view .LVU2659 + 7942 0046 28E0 b .L489 + 7943 .LVL645: + 7944 .L499: +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7945 .loc 1 5607 14 view .LVU2660 + 7946 0048 0120 movs r0, #1 + 7947 004a 26E0 b .L489 + 7948 .L488: +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7949 .loc 1 5494 3 view .LVU2661 + 7950 004c 302B cmp r3, #48 + 7951 004e F5D0 beq .L487 +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7952 .loc 1 5607 14 view .LVU2662 + 7953 0050 0120 movs r0, #1 + 7954 0052 22E0 b .L489 + 7955 .L486: +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7956 .loc 1 5494 3 view .LVU2663 + 7957 0054 502B cmp r3, #80 + 7958 0056 0AD1 bne .L500 +5549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7959 .loc 1 5549 7 is_stmt 1 view .LVU2664 +5552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 7960 .loc 1 5552 7 view .LVU2665 +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7961 .loc 1 5553 7 view .LVU2666 +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 7962 .loc 1 5555 7 view .LVU2667 + 7963 0058 CA68 ldr r2, [r1, #12] + 7964 .LVL646: +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 7965 .loc 1 5555 7 is_stmt 0 view .LVU2668 + 7966 005a 4968 ldr r1, [r1, #4] + 7967 .LVL647: +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 7968 .loc 1 5555 7 view .LVU2669 + 7969 005c 2068 ldr r0, [r4] + 7970 .LVL648: +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 7971 .loc 1 5555 7 view .LVU2670 + 7972 005e FFF7FEFF bl TIM_TI1_ConfigInputStage + 7973 .LVL649: + ARM GAS /tmp/cc0aF2h1.s page 315 + + +5558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7974 .loc 1 5558 7 is_stmt 1 view .LVU2671 + 7975 0062 5021 movs r1, #80 + 7976 0064 2068 ldr r0, [r4] + 7977 0066 FFF7FEFF bl TIM_ITRx_SetConfig + 7978 .LVL650: +5559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7979 .loc 1 5559 7 view .LVU2672 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 7980 .loc 1 5477 21 is_stmt 0 view .LVU2673 + 7981 006a 0020 movs r0, #0 +5559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 7982 .loc 1 5559 7 view .LVU2674 + 7983 006c 15E0 b .L489 + 7984 .LVL651: + 7985 .L500: +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 7986 .loc 1 5607 14 view .LVU2675 + 7987 006e 0120 movs r0, #1 + 7988 0070 13E0 b .L489 + 7989 .L484: +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 7990 .loc 1 5494 3 view .LVU2676 + 7991 0072 B3F5805F cmp r3, #4096 + 7992 0076 3AD0 beq .L493 + 7993 0078 B3F5005F cmp r3, #8192 + 7994 007c 14D0 beq .L491 + 7995 007e 702B cmp r3, #112 + 7996 0080 37D1 bne .L494 +5505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 7997 .loc 1 5505 7 is_stmt 1 view .LVU2677 +5508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + 7998 .loc 1 5508 7 view .LVU2678 +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 7999 .loc 1 5509 7 view .LVU2679 +5510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8000 .loc 1 5510 7 view .LVU2680 +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8001 .loc 1 5513 7 view .LVU2681 + 8002 0082 CB68 ldr r3, [r1, #12] + 8003 0084 4A68 ldr r2, [r1, #4] + 8004 .LVL652: +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8005 .loc 1 5513 7 is_stmt 0 view .LVU2682 + 8006 0086 8968 ldr r1, [r1, #8] + 8007 .LVL653: +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8008 .loc 1 5513 7 view .LVU2683 + 8009 0088 2068 ldr r0, [r4] + 8010 .LVL654: +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8011 .loc 1 5513 7 view .LVU2684 + 8012 008a FFF7FEFF bl TIM_ETR_SetConfig + 8013 .LVL655: +5519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8014 .loc 1 5519 7 is_stmt 1 view .LVU2685 +5519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + ARM GAS /tmp/cc0aF2h1.s page 316 + + + 8015 .loc 1 5519 21 is_stmt 0 view .LVU2686 + 8016 008e 2268 ldr r2, [r4] +5519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8017 .loc 1 5519 15 view .LVU2687 + 8018 0090 9368 ldr r3, [r2, #8] + 8019 .LVL656: +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ + 8020 .loc 1 5520 7 is_stmt 1 view .LVU2688 +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Write to TIMx SMCR */ + 8021 .loc 1 5520 15 is_stmt 0 view .LVU2689 + 8022 0092 43F07703 orr r3, r3, #119 + 8023 .LVL657: +5522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8024 .loc 1 5522 7 is_stmt 1 view .LVU2690 +5522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8025 .loc 1 5522 28 is_stmt 0 view .LVU2691 + 8026 0096 9360 str r3, [r2, #8] +5523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8027 .loc 1 5523 7 is_stmt 1 view .LVU2692 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8028 .loc 1 5477 21 is_stmt 0 view .LVU2693 + 8029 0098 0020 movs r0, #0 + 8030 .LVL658: + 8031 .L489: +5610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8032 .loc 1 5610 3 is_stmt 1 view .LVU2694 +5610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8033 .loc 1 5610 15 is_stmt 0 view .LVU2695 + 8034 009a 0123 movs r3, #1 + 8035 009c 84F83D30 strb r3, [r4, #61] +5612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8036 .loc 1 5612 3 is_stmt 1 view .LVU2696 +5612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8037 .loc 1 5612 3 view .LVU2697 + 8038 00a0 0023 movs r3, #0 + 8039 00a2 84F83C30 strb r3, [r4, #60] +5612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8040 .loc 1 5612 3 view .LVU2698 +5614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8041 .loc 1 5614 3 view .LVU2699 +5615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8042 .loc 1 5615 1 is_stmt 0 view .LVU2700 + 8043 00a6 10BD pop {r4, pc} + 8044 .LVL659: + 8045 .L491: +5529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8046 .loc 1 5529 7 is_stmt 1 view .LVU2701 +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + 8047 .loc 1 5532 7 view .LVU2702 +5533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8048 .loc 1 5533 7 view .LVU2703 +5534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8049 .loc 1 5534 7 view .LVU2704 +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8050 .loc 1 5537 7 view .LVU2705 + 8051 00a8 CB68 ldr r3, [r1, #12] + 8052 00aa 4A68 ldr r2, [r1, #4] + ARM GAS /tmp/cc0aF2h1.s page 317 + + + 8053 .LVL660: +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8054 .loc 1 5537 7 is_stmt 0 view .LVU2706 + 8055 00ac 8968 ldr r1, [r1, #8] + 8056 .LVL661: +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8057 .loc 1 5537 7 view .LVU2707 + 8058 00ae 2068 ldr r0, [r4] + 8059 .LVL662: +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8060 .loc 1 5537 7 view .LVU2708 + 8061 00b0 FFF7FEFF bl TIM_ETR_SetConfig + 8062 .LVL663: +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8063 .loc 1 5542 7 is_stmt 1 view .LVU2709 +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8064 .loc 1 5542 11 is_stmt 0 view .LVU2710 + 8065 00b4 2268 ldr r2, [r4] +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8066 .loc 1 5542 21 view .LVU2711 + 8067 00b6 9368 ldr r3, [r2, #8] +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8068 .loc 1 5542 28 view .LVU2712 + 8069 00b8 43F48043 orr r3, r3, #16384 + 8070 00bc 9360 str r3, [r2, #8] +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8071 .loc 1 5543 7 is_stmt 1 view .LVU2713 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8072 .loc 1 5477 21 is_stmt 0 view .LVU2714 + 8073 00be 0020 movs r0, #0 +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8074 .loc 1 5543 7 view .LVU2715 + 8075 00c0 EBE7 b .L489 + 8076 .LVL664: + 8077 .L483: +5565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8078 .loc 1 5565 7 is_stmt 1 view .LVU2716 +5568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8079 .loc 1 5568 7 view .LVU2717 +5569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8080 .loc 1 5569 7 view .LVU2718 +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8081 .loc 1 5571 7 view .LVU2719 + 8082 00c2 CA68 ldr r2, [r1, #12] + 8083 .LVL665: +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8084 .loc 1 5571 7 is_stmt 0 view .LVU2720 + 8085 00c4 4968 ldr r1, [r1, #4] + 8086 .LVL666: +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8087 .loc 1 5571 7 view .LVU2721 + 8088 00c6 2068 ldr r0, [r4] + 8089 .LVL667: +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8090 .loc 1 5571 7 view .LVU2722 + 8091 00c8 FFF7FEFF bl TIM_TI2_ConfigInputStage + 8092 .LVL668: + ARM GAS /tmp/cc0aF2h1.s page 318 + + +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8093 .loc 1 5574 7 is_stmt 1 view .LVU2723 + 8094 00cc 6021 movs r1, #96 + 8095 00ce 2068 ldr r0, [r4] + 8096 00d0 FFF7FEFF bl TIM_ITRx_SetConfig + 8097 .LVL669: +5575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8098 .loc 1 5575 7 view .LVU2724 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8099 .loc 1 5477 21 is_stmt 0 view .LVU2725 + 8100 00d4 0020 movs r0, #0 +5575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8101 .loc 1 5575 7 view .LVU2726 + 8102 00d6 E0E7 b .L489 + 8103 .LVL670: + 8104 .L485: +5581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8105 .loc 1 5581 7 is_stmt 1 view .LVU2727 +5584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8106 .loc 1 5584 7 view .LVU2728 +5585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8107 .loc 1 5585 7 view .LVU2729 +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8108 .loc 1 5587 7 view .LVU2730 + 8109 00d8 CA68 ldr r2, [r1, #12] + 8110 .LVL671: +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8111 .loc 1 5587 7 is_stmt 0 view .LVU2731 + 8112 00da 4968 ldr r1, [r1, #4] + 8113 .LVL672: +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8114 .loc 1 5587 7 view .LVU2732 + 8115 00dc 2068 ldr r0, [r4] + 8116 .LVL673: +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8117 .loc 1 5587 7 view .LVU2733 + 8118 00de FFF7FEFF bl TIM_TI1_ConfigInputStage + 8119 .LVL674: +5590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8120 .loc 1 5590 7 is_stmt 1 view .LVU2734 + 8121 00e2 4021 movs r1, #64 + 8122 00e4 2068 ldr r0, [r4] + 8123 00e6 FFF7FEFF bl TIM_ITRx_SetConfig + 8124 .LVL675: +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8125 .loc 1 5591 7 view .LVU2735 +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8126 .loc 1 5477 21 is_stmt 0 view .LVU2736 + 8127 00ea 0020 movs r0, #0 +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8128 .loc 1 5591 7 view .LVU2737 + 8129 00ec D5E7 b .L489 + 8130 .LVL676: + 8131 .L493: +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8132 .loc 1 5494 3 view .LVU2738 + 8133 00ee 0020 movs r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 319 + + + 8134 00f0 D3E7 b .L489 + 8135 .L494: +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8136 .loc 1 5607 14 view .LVU2739 + 8137 00f2 0120 movs r0, #1 + 8138 00f4 D1E7 b .L489 + 8139 .LVL677: + 8140 .L492: + 8141 .cfi_def_cfa_offset 0 + 8142 .cfi_restore 4 + 8143 .cfi_restore 14 +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8144 .loc 1 5481 3 discriminator 1 view .LVU2740 + 8145 00f6 0220 movs r0, #2 + 8146 .LVL678: +5615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8147 .loc 1 5615 1 view .LVU2741 + 8148 00f8 7047 bx lr + 8149 .L502: + 8150 00fa 00BF .align 2 + 8151 .L501: + 8152 00fc 8800FEFF .word -130936 + 8153 .cfi_endproc + 8154 .LFE201: + 8156 .section .text.TIM_SlaveTimer_SetConfig,"ax",%progbits + 8157 .align 1 + 8158 .syntax unified + 8159 .thumb + 8160 .thumb_func + 8162 TIM_SlaveTimer_SetConfig: + 8163 .LVL679: + 8164 .LFB241: +7419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8165 .loc 1 7419 1 is_stmt 1 view -0 + 8166 .cfi_startproc + 8167 @ args = 0, pretend = 0, frame = 0 + 8168 @ frame_needed = 0, uses_anonymous_args = 0 +7419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8169 .loc 1 7419 1 is_stmt 0 view .LVU2743 + 8170 0000 10B5 push {r4, lr} + 8171 .cfi_def_cfa_offset 8 + 8172 .cfi_offset 4, -8 + 8173 .cfi_offset 14, -4 +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8174 .loc 1 7420 3 is_stmt 1 view .LVU2744 + 8175 .LVL680: +7421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccmr1; + 8176 .loc 1 7421 3 view .LVU2745 +7422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpccer; + 8177 .loc 1 7422 3 view .LVU2746 +7423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8178 .loc 1 7423 3 view .LVU2747 +7426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8179 .loc 1 7426 3 view .LVU2748 +7426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8180 .loc 1 7426 17 is_stmt 0 view .LVU2749 + 8181 0002 0468 ldr r4, [r0] + ARM GAS /tmp/cc0aF2h1.s page 320 + + +7426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8182 .loc 1 7426 11 view .LVU2750 + 8183 0004 A268 ldr r2, [r4, #8] + 8184 .LVL681: +7429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Input Trigger source */ + 8185 .loc 1 7429 3 is_stmt 1 view .LVU2751 +7429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the Input Trigger source */ + 8186 .loc 1 7429 11 is_stmt 0 view .LVU2752 + 8187 0006 22F07002 bic r2, r2, #112 + 8188 .LVL682: +7431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8189 .loc 1 7431 3 is_stmt 1 view .LVU2753 +7431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8190 .loc 1 7431 26 is_stmt 0 view .LVU2754 + 8191 000a 4B68 ldr r3, [r1, #4] +7431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8192 .loc 1 7431 11 view .LVU2755 + 8193 000c 1343 orrs r3, r3, r2 + 8194 .LVL683: +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the slave mode */ + 8195 .loc 1 7434 3 is_stmt 1 view .LVU2756 +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the slave mode */ + 8196 .loc 1 7434 11 is_stmt 0 view .LVU2757 + 8197 000e 23F48033 bic r3, r3, #65536 + 8198 .LVL684: +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set the slave mode */ + 8199 .loc 1 7434 11 view .LVU2758 + 8200 0012 23F00703 bic r3, r3, #7 + 8201 .LVL685: +7436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8202 .loc 1 7436 3 is_stmt 1 view .LVU2759 +7436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8203 .loc 1 7436 26 is_stmt 0 view .LVU2760 + 8204 0016 0A68 ldr r2, [r1] +7436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8205 .loc 1 7436 11 view .LVU2761 + 8206 0018 1A43 orrs r2, r2, r3 + 8207 .LVL686: +7439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8208 .loc 1 7439 3 is_stmt 1 view .LVU2762 +7439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8209 .loc 1 7439 24 is_stmt 0 view .LVU2763 + 8210 001a A260 str r2, [r4, #8] +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8211 .loc 1 7442 3 is_stmt 1 view .LVU2764 +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8212 .loc 1 7442 23 is_stmt 0 view .LVU2765 + 8213 001c 4B68 ldr r3, [r1, #4] +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8214 .loc 1 7442 3 view .LVU2766 + 8215 001e 502B cmp r3, #80 + 8216 0020 30D0 beq .L504 + 8217 0022 0BD9 bls .L518 + 8218 0024 602B cmp r3, #96 + 8219 0026 34D0 beq .L509 + 8220 0028 702B cmp r3, #112 + 8221 002a 43D1 bne .L515 + ARM GAS /tmp/cc0aF2h1.s page 321 + + +7447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); + 8222 .loc 1 7447 7 is_stmt 1 view .LVU2767 +7448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8223 .loc 1 7448 7 view .LVU2768 +7449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8224 .loc 1 7449 7 view .LVU2769 +7450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Configure the ETR Trigger source */ + 8225 .loc 1 7450 7 view .LVU2770 +7452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8226 .loc 1 7452 7 view .LVU2771 + 8227 002c 0B69 ldr r3, [r1, #16] + 8228 002e 8A68 ldr r2, [r1, #8] + 8229 .LVL687: +7452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8230 .loc 1 7452 7 is_stmt 0 view .LVU2772 + 8231 0030 C968 ldr r1, [r1, #12] + 8232 .LVL688: +7452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8233 .loc 1 7452 7 view .LVU2773 + 8234 0032 0068 ldr r0, [r0] + 8235 .LVL689: +7452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8236 .loc 1 7452 7 view .LVU2774 + 8237 0034 FFF7FEFF bl TIM_ETR_SetConfig + 8238 .LVL690: +7456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8239 .loc 1 7456 7 is_stmt 1 view .LVU2775 +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8240 .loc 1 7420 21 is_stmt 0 view .LVU2776 + 8241 0038 0020 movs r0, #0 + 8242 .L507: + 8243 .LVL691: +7529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8244 .loc 1 7529 1 view .LVU2777 + 8245 003a 10BD pop {r4, pc} + 8246 .LVL692: + 8247 .L518: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8248 .loc 1 7442 3 view .LVU2778 + 8249 003c 402B cmp r3, #64 + 8250 003e 0CD0 beq .L506 + 8251 0040 2ED8 bhi .L510 + 8252 0042 202B cmp r3, #32 + 8253 0044 2ED0 beq .L511 + 8254 0046 04D8 bhi .L508 + 8255 0048 73B3 cbz r3, .L512 + 8256 004a 102B cmp r3, #16 + 8257 004c 2ED1 bne .L513 + 8258 004e 0020 movs r0, #0 + 8259 .LVL693: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8260 .loc 1 7442 3 view .LVU2779 + 8261 0050 F3E7 b .L507 + 8262 .LVL694: + 8263 .L508: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8264 .loc 1 7442 3 view .LVU2780 + ARM GAS /tmp/cc0aF2h1.s page 322 + + + 8265 0052 302B cmp r3, #48 + 8266 0054 2CD1 bne .L514 + 8267 0056 0020 movs r0, #0 + 8268 .LVL695: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8269 .loc 1 7442 3 view .LVU2781 + 8270 0058 EFE7 b .L507 + 8271 .LVL696: + 8272 .L506: +7462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8273 .loc 1 7462 7 is_stmt 1 view .LVU2782 +7463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8274 .loc 1 7463 7 view .LVU2783 +7465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8275 .loc 1 7465 7 view .LVU2784 +7465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8276 .loc 1 7465 23 is_stmt 0 view .LVU2785 + 8277 005a 0B68 ldr r3, [r1] +7465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8278 .loc 1 7465 10 view .LVU2786 + 8279 005c 052B cmp r3, #5 + 8280 005e 2BD0 beq .L516 +7471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8281 .loc 1 7471 7 is_stmt 1 view .LVU2787 +7471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8282 .loc 1 7471 21 is_stmt 0 view .LVU2788 + 8283 0060 0368 ldr r3, [r0] +7471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8284 .loc 1 7471 15 view .LVU2789 + 8285 0062 1C6A ldr r4, [r3, #32] + 8286 .LVL697: +7472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8287 .loc 1 7472 7 is_stmt 1 view .LVU2790 +7472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8288 .loc 1 7472 21 is_stmt 0 view .LVU2791 + 8289 0064 1A6A ldr r2, [r3, #32] + 8290 .LVL698: +7472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8291 .loc 1 7472 28 view .LVU2792 + 8292 0066 22F00102 bic r2, r2, #1 + 8293 006a 1A62 str r2, [r3, #32] +7473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8294 .loc 1 7473 7 is_stmt 1 view .LVU2793 +7473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8295 .loc 1 7473 22 is_stmt 0 view .LVU2794 + 8296 006c 0268 ldr r2, [r0] +7473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8297 .loc 1 7473 16 view .LVU2795 + 8298 006e 9369 ldr r3, [r2, #24] + 8299 .LVL699: +7476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); + 8300 .loc 1 7476 7 is_stmt 1 view .LVU2796 +7476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); + 8301 .loc 1 7476 16 is_stmt 0 view .LVU2797 + 8302 0070 23F0F003 bic r3, r3, #240 + 8303 .LVL700: +7477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 323 + + + 8304 .loc 1 7477 7 is_stmt 1 view .LVU2798 +7477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8305 .loc 1 7477 33 is_stmt 0 view .LVU2799 + 8306 0074 0969 ldr r1, [r1, #16] + 8307 .LVL701: +7477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8308 .loc 1 7477 16 view .LVU2800 + 8309 0076 43EA0113 orr r3, r3, r1, lsl #4 + 8310 .LVL702: +7480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER = tmpccer; + 8311 .loc 1 7480 7 is_stmt 1 view .LVU2801 +7480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->Instance->CCER = tmpccer; + 8312 .loc 1 7480 29 is_stmt 0 view .LVU2802 + 8313 007a 9361 str r3, [r2, #24] +7481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8314 .loc 1 7481 7 is_stmt 1 view .LVU2803 +7481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8315 .loc 1 7481 11 is_stmt 0 view .LVU2804 + 8316 007c 0368 ldr r3, [r0] + 8317 .LVL703: +7481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8318 .loc 1 7481 28 view .LVU2805 + 8319 007e 1C62 str r4, [r3, #32] + 8320 .LVL704: +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8321 .loc 1 7482 7 is_stmt 1 view .LVU2806 +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8322 .loc 1 7420 21 is_stmt 0 view .LVU2807 + 8323 0080 0020 movs r0, #0 + 8324 .LVL705: +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8325 .loc 1 7482 7 view .LVU2808 + 8326 0082 DAE7 b .L507 + 8327 .LVL706: + 8328 .L504: +7488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8329 .loc 1 7488 7 is_stmt 1 view .LVU2809 +7489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8330 .loc 1 7489 7 view .LVU2810 +7490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8331 .loc 1 7490 7 view .LVU2811 +7493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8332 .loc 1 7493 7 view .LVU2812 + 8333 0084 0A69 ldr r2, [r1, #16] + 8334 .LVL707: +7493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8335 .loc 1 7493 7 is_stmt 0 view .LVU2813 + 8336 0086 8968 ldr r1, [r1, #8] + 8337 .LVL708: +7493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8338 .loc 1 7493 7 view .LVU2814 + 8339 0088 0068 ldr r0, [r0] + 8340 .LVL709: +7493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8341 .loc 1 7493 7 view .LVU2815 + 8342 008a FFF7FEFF bl TIM_TI1_ConfigInputStage + 8343 .LVL710: + ARM GAS /tmp/cc0aF2h1.s page 324 + + +7496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8344 .loc 1 7496 7 is_stmt 1 view .LVU2816 +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8345 .loc 1 7420 21 is_stmt 0 view .LVU2817 + 8346 008e 0020 movs r0, #0 +7496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8347 .loc 1 7496 7 view .LVU2818 + 8348 0090 D3E7 b .L507 + 8349 .LVL711: + 8350 .L509: +7502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8351 .loc 1 7502 7 is_stmt 1 view .LVU2819 +7503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8352 .loc 1 7503 7 view .LVU2820 +7504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8353 .loc 1 7504 7 view .LVU2821 +7507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8354 .loc 1 7507 7 view .LVU2822 + 8355 0092 0A69 ldr r2, [r1, #16] + 8356 .LVL712: +7507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8357 .loc 1 7507 7 is_stmt 0 view .LVU2823 + 8358 0094 8968 ldr r1, [r1, #8] + 8359 .LVL713: +7507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8360 .loc 1 7507 7 view .LVU2824 + 8361 0096 0068 ldr r0, [r0] + 8362 .LVL714: +7507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8363 .loc 1 7507 7 view .LVU2825 + 8364 0098 FFF7FEFF bl TIM_TI2_ConfigInputStage + 8365 .LVL715: +7510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8366 .loc 1 7510 7 is_stmt 1 view .LVU2826 +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8367 .loc 1 7420 21 is_stmt 0 view .LVU2827 + 8368 009c 0020 movs r0, #0 +7510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8369 .loc 1 7510 7 view .LVU2828 + 8370 009e CCE7 b .L507 + 8371 .LVL716: + 8372 .L510: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8373 .loc 1 7524 14 view .LVU2829 + 8374 00a0 0120 movs r0, #1 + 8375 .LVL717: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8376 .loc 1 7524 14 view .LVU2830 + 8377 00a2 CAE7 b .L507 + 8378 .LVL718: + 8379 .L511: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8380 .loc 1 7442 3 view .LVU2831 + 8381 00a4 0020 movs r0, #0 + 8382 .LVL719: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8383 .loc 1 7442 3 view .LVU2832 + ARM GAS /tmp/cc0aF2h1.s page 325 + + + 8384 00a6 C8E7 b .L507 + 8385 .LVL720: + 8386 .L512: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8387 .loc 1 7442 3 view .LVU2833 + 8388 00a8 0020 movs r0, #0 + 8389 .LVL721: +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8390 .loc 1 7442 3 view .LVU2834 + 8391 00aa C6E7 b .L507 + 8392 .LVL722: + 8393 .L513: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8394 .loc 1 7524 14 view .LVU2835 + 8395 00ac 0120 movs r0, #1 + 8396 .LVL723: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8397 .loc 1 7524 14 view .LVU2836 + 8398 00ae C4E7 b .L507 + 8399 .LVL724: + 8400 .L514: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8401 .loc 1 7524 14 view .LVU2837 + 8402 00b0 0120 movs r0, #1 + 8403 .LVL725: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8404 .loc 1 7524 14 view .LVU2838 + 8405 00b2 C2E7 b .L507 + 8406 .LVL726: + 8407 .L515: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8408 .loc 1 7524 14 view .LVU2839 + 8409 00b4 0120 movs r0, #1 + 8410 .LVL727: +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 8411 .loc 1 7524 14 view .LVU2840 + 8412 00b6 C0E7 b .L507 + 8413 .LVL728: + 8414 .L516: +7467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8415 .loc 1 7467 16 view .LVU2841 + 8416 00b8 0120 movs r0, #1 + 8417 .LVL729: +7467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8418 .loc 1 7467 16 view .LVU2842 + 8419 00ba BEE7 b .L507 + 8420 .cfi_endproc + 8421 .LFE241: + 8423 .section .text.HAL_TIM_SlaveConfigSynchro,"ax",%progbits + 8424 .align 1 + 8425 .global HAL_TIM_SlaveConfigSynchro + 8426 .syntax unified + 8427 .thumb + 8428 .thumb_func + 8430 HAL_TIM_SlaveConfigSynchro: + 8431 .LVL730: + 8432 .LFB203: + ARM GAS /tmp/cc0aF2h1.s page 326 + + +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 8433 .loc 1 5662 1 is_stmt 1 view -0 + 8434 .cfi_startproc + 8435 @ args = 0, pretend = 0, frame = 0 + 8436 @ frame_needed = 0, uses_anonymous_args = 0 +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); + 8437 .loc 1 5664 3 view .LVU2844 +5665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + 8438 .loc 1 5665 3 view .LVU2845 +5666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8439 .loc 1 5666 3 view .LVU2846 +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8440 .loc 1 5668 3 view .LVU2847 +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8441 .loc 1 5668 3 view .LVU2848 + 8442 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 8443 0004 012B cmp r3, #1 + 8444 0006 22D0 beq .L522 +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 8445 .loc 1 5662 1 is_stmt 0 view .LVU2849 + 8446 0008 10B5 push {r4, lr} + 8447 .cfi_def_cfa_offset 8 + 8448 .cfi_offset 4, -8 + 8449 .cfi_offset 14, -4 + 8450 000a 0446 mov r4, r0 +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8451 .loc 1 5668 3 is_stmt 1 discriminator 2 view .LVU2850 + 8452 000c 0123 movs r3, #1 + 8453 000e 80F83C30 strb r3, [r0, #60] +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8454 .loc 1 5668 3 discriminator 2 view .LVU2851 +5670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8455 .loc 1 5670 3 view .LVU2852 +5670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8456 .loc 1 5670 15 is_stmt 0 view .LVU2853 + 8457 0012 0223 movs r3, #2 + 8458 0014 80F83D30 strb r3, [r0, #61] +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8459 .loc 1 5672 3 is_stmt 1 view .LVU2854 +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8460 .loc 1 5672 7 is_stmt 0 view .LVU2855 + 8461 0018 FFF7FEFF bl TIM_SlaveTimer_SetConfig + 8462 .LVL731: +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8463 .loc 1 5672 6 discriminator 1 view .LVU2856 + 8464 001c 80B9 cbnz r0, .L527 +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8465 .loc 1 5680 3 is_stmt 1 view .LVU2857 + 8466 001e 2268 ldr r2, [r4] + 8467 0020 D368 ldr r3, [r2, #12] + 8468 0022 23F04003 bic r3, r3, #64 + 8469 0026 D360 str r3, [r2, #12] +5683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8470 .loc 1 5683 3 view .LVU2858 + 8471 0028 2268 ldr r2, [r4] + 8472 002a D368 ldr r3, [r2, #12] + 8473 002c 23F48043 bic r3, r3, #16384 + ARM GAS /tmp/cc0aF2h1.s page 327 + + + 8474 0030 D360 str r3, [r2, #12] +5685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8475 .loc 1 5685 3 view .LVU2859 +5685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8476 .loc 1 5685 15 is_stmt 0 view .LVU2860 + 8477 0032 0123 movs r3, #1 + 8478 0034 84F83D30 strb r3, [r4, #61] +5687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8479 .loc 1 5687 3 is_stmt 1 view .LVU2861 +5687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8480 .loc 1 5687 3 view .LVU2862 + 8481 0038 0023 movs r3, #0 + 8482 003a 84F83C30 strb r3, [r4, #60] +5687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8483 .loc 1 5687 3 view .LVU2863 +5689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8484 .loc 1 5689 3 view .LVU2864 + 8485 .L520: +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8486 .loc 1 5690 1 is_stmt 0 view .LVU2865 + 8487 003e 10BD pop {r4, pc} + 8488 .LVL732: + 8489 .L527: +5674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8490 .loc 1 5674 5 is_stmt 1 view .LVU2866 +5674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8491 .loc 1 5674 17 is_stmt 0 view .LVU2867 + 8492 0040 0120 movs r0, #1 + 8493 0042 84F83D00 strb r0, [r4, #61] +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 8494 .loc 1 5675 5 is_stmt 1 view .LVU2868 +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 8495 .loc 1 5675 5 view .LVU2869 + 8496 0046 0023 movs r3, #0 + 8497 0048 84F83C30 strb r3, [r4, #60] +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 8498 .loc 1 5675 5 view .LVU2870 +5676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8499 .loc 1 5676 5 view .LVU2871 +5676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8500 .loc 1 5676 12 is_stmt 0 view .LVU2872 + 8501 004c F7E7 b .L520 + 8502 .LVL733: + 8503 .L522: + 8504 .cfi_def_cfa_offset 0 + 8505 .cfi_restore 4 + 8506 .cfi_restore 14 +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8507 .loc 1 5668 3 discriminator 1 view .LVU2873 + 8508 004e 0220 movs r0, #2 + 8509 .LVL734: +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8510 .loc 1 5690 1 view .LVU2874 + 8511 0050 7047 bx lr + 8512 .cfi_endproc + 8513 .LFE203: + 8515 .section .text.HAL_TIM_SlaveConfigSynchro_IT,"ax",%progbits + ARM GAS /tmp/cc0aF2h1.s page 328 + + + 8516 .align 1 + 8517 .global HAL_TIM_SlaveConfigSynchro_IT + 8518 .syntax unified + 8519 .thumb + 8520 .thumb_func + 8522 HAL_TIM_SlaveConfigSynchro_IT: + 8523 .LVL735: + 8524 .LFB204: +5703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 8525 .loc 1 5703 1 is_stmt 1 view -0 + 8526 .cfi_startproc + 8527 @ args = 0, pretend = 0, frame = 0 + 8528 @ frame_needed = 0, uses_anonymous_args = 0 +5705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); + 8529 .loc 1 5705 3 view .LVU2876 +5706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + 8530 .loc 1 5706 3 view .LVU2877 +5707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8531 .loc 1 5707 3 view .LVU2878 +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8532 .loc 1 5709 3 view .LVU2879 +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8533 .loc 1 5709 3 view .LVU2880 + 8534 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 8535 0004 012B cmp r3, #1 + 8536 0006 22D0 beq .L531 +5703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 8537 .loc 1 5703 1 is_stmt 0 view .LVU2881 + 8538 0008 10B5 push {r4, lr} + 8539 .cfi_def_cfa_offset 8 + 8540 .cfi_offset 4, -8 + 8541 .cfi_offset 14, -4 + 8542 000a 0446 mov r4, r0 +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8543 .loc 1 5709 3 is_stmt 1 discriminator 2 view .LVU2882 + 8544 000c 0123 movs r3, #1 + 8545 000e 80F83C30 strb r3, [r0, #60] +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8546 .loc 1 5709 3 discriminator 2 view .LVU2883 +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8547 .loc 1 5711 3 view .LVU2884 +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8548 .loc 1 5711 15 is_stmt 0 view .LVU2885 + 8549 0012 0223 movs r3, #2 + 8550 0014 80F83D30 strb r3, [r0, #61] +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8551 .loc 1 5713 3 is_stmt 1 view .LVU2886 +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8552 .loc 1 5713 7 is_stmt 0 view .LVU2887 + 8553 0018 FFF7FEFF bl TIM_SlaveTimer_SetConfig + 8554 .LVL736: +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8555 .loc 1 5713 6 discriminator 1 view .LVU2888 + 8556 001c 80B9 cbnz r0, .L536 +5721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8557 .loc 1 5721 3 is_stmt 1 view .LVU2889 + 8558 001e 2268 ldr r2, [r4] + ARM GAS /tmp/cc0aF2h1.s page 329 + + + 8559 0020 D368 ldr r3, [r2, #12] + 8560 0022 43F04003 orr r3, r3, #64 + 8561 0026 D360 str r3, [r2, #12] +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8562 .loc 1 5724 3 view .LVU2890 + 8563 0028 2268 ldr r2, [r4] + 8564 002a D368 ldr r3, [r2, #12] + 8565 002c 23F48043 bic r3, r3, #16384 + 8566 0030 D360 str r3, [r2, #12] +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8567 .loc 1 5726 3 view .LVU2891 +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8568 .loc 1 5726 15 is_stmt 0 view .LVU2892 + 8569 0032 0123 movs r3, #1 + 8570 0034 84F83D30 strb r3, [r4, #61] +5728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8571 .loc 1 5728 3 is_stmt 1 view .LVU2893 +5728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8572 .loc 1 5728 3 view .LVU2894 + 8573 0038 0023 movs r3, #0 + 8574 003a 84F83C30 strb r3, [r4, #60] +5728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8575 .loc 1 5728 3 view .LVU2895 +5730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8576 .loc 1 5730 3 view .LVU2896 + 8577 .L529: +5731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8578 .loc 1 5731 1 is_stmt 0 view .LVU2897 + 8579 003e 10BD pop {r4, pc} + 8580 .LVL737: + 8581 .L536: +5715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8582 .loc 1 5715 5 is_stmt 1 view .LVU2898 +5715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8583 .loc 1 5715 17 is_stmt 0 view .LVU2899 + 8584 0040 0120 movs r0, #1 + 8585 0042 84F83D00 strb r0, [r4, #61] +5716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 8586 .loc 1 5716 5 is_stmt 1 view .LVU2900 +5716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 8587 .loc 1 5716 5 view .LVU2901 + 8588 0046 0023 movs r3, #0 + 8589 0048 84F83C30 strb r3, [r4, #60] +5716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** return HAL_ERROR; + 8590 .loc 1 5716 5 view .LVU2902 +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8591 .loc 1 5717 5 view .LVU2903 +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8592 .loc 1 5717 12 is_stmt 0 view .LVU2904 + 8593 004c F7E7 b .L529 + 8594 .LVL738: + 8595 .L531: + 8596 .cfi_def_cfa_offset 0 + 8597 .cfi_restore 4 + 8598 .cfi_restore 14 +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8599 .loc 1 5709 3 discriminator 1 view .LVU2905 + ARM GAS /tmp/cc0aF2h1.s page 330 + + + 8600 004e 0220 movs r0, #2 + 8601 .LVL739: +5731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8602 .loc 1 5731 1 view .LVU2906 + 8603 0050 7047 bx lr + 8604 .cfi_endproc + 8605 .LFE204: + 8607 .section .text.TIM_CCxChannelCmd,"ax",%progbits + 8608 .align 1 + 8609 .global TIM_CCxChannelCmd + 8610 .syntax unified + 8611 .thumb + 8612 .thumb_func + 8614 TIM_CCxChannelCmd: + 8615 .LVL740: + 8616 .LFB250: +7861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** +7863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @brief Enables or disables the TIM Capture Compare Channel x. +7864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param Channel specifies the TIM Channel +7866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be one of the following values: +7867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +7868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +7869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +7870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +7871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 selected +7872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 selected +7873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @param ChannelState specifies the TIM Channel CCxE bit new state. +7874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. +7875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** * @retval None +7876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** */ +7877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) +7878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8617 .loc 1 7878 1 is_stmt 1 view -0 + 8618 .cfi_startproc + 8619 @ args = 0, pretend = 0, frame = 0 + 8620 @ frame_needed = 0, uses_anonymous_args = 0 + 8621 @ link register save eliminated. +7879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmp; + 8622 .loc 1 7879 3 view .LVU2908 +7880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ +7882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); + 8623 .loc 1 7882 3 view .LVU2909 +7883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); + 8624 .loc 1 7883 3 view .LVU2910 +7884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + 8625 .loc 1 7885 3 view .LVU2911 + 8626 .loc 1 7885 35 is_stmt 0 view .LVU2912 + 8627 0000 01F01F01 and r1, r1, #31 + 8628 .LVL741: + 8629 .loc 1 7885 7 view .LVU2913 + 8630 0004 4FF0010C mov ip, #1 + 8631 0008 0CFA01FC lsl ip, ip, r1 + 8632 .LVL742: + ARM GAS /tmp/cc0aF2h1.s page 331 + + +7886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Reset the CCxE Bit */ +7888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER &= ~tmp; + 8633 .loc 1 7888 3 is_stmt 1 view .LVU2914 + 8634 .loc 1 7888 7 is_stmt 0 view .LVU2915 + 8635 000c 036A ldr r3, [r0, #32] + 8636 .loc 1 7888 14 view .LVU2916 + 8637 000e 23EA0C03 bic r3, r3, ip + 8638 0012 0362 str r3, [r0, #32] +7889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** +7890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Set or reset the CCxE Bit */ +7891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + 8639 .loc 1 7891 3 is_stmt 1 view .LVU2917 + 8640 .loc 1 7891 7 is_stmt 0 view .LVU2918 + 8641 0014 036A ldr r3, [r0, #32] + 8642 .loc 1 7891 41 view .LVU2919 + 8643 0016 8A40 lsls r2, r2, r1 + 8644 .LVL743: + 8645 .loc 1 7891 14 view .LVU2920 + 8646 0018 1343 orrs r3, r3, r2 + 8647 001a 0362 str r3, [r0, #32] +7892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8648 .loc 1 7892 1 view .LVU2921 + 8649 001c 7047 bx lr + 8650 .cfi_endproc + 8651 .LFE250: + 8653 .section .text.HAL_TIM_OC_Start,"ax",%progbits + 8654 .align 1 + 8655 .global HAL_TIM_OC_Start + 8656 .syntax unified + 8657 .thumb + 8658 .thumb_func + 8660 HAL_TIM_OC_Start: + 8661 .LVL744: + 8662 .LFB144: + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8663 .loc 1 800 1 is_stmt 1 view -0 + 8664 .cfi_startproc + 8665 @ args = 0, pretend = 0, frame = 0 + 8666 @ frame_needed = 0, uses_anonymous_args = 0 + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 8667 .loc 1 800 1 is_stmt 0 view .LVU2923 + 8668 0000 10B5 push {r4, lr} + 8669 .cfi_def_cfa_offset 8 + 8670 .cfi_offset 4, -8 + 8671 .cfi_offset 14, -4 + 8672 0002 0446 mov r4, r0 + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8673 .loc 1 801 3 is_stmt 1 view .LVU2924 + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8674 .loc 1 804 3 view .LVU2925 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8675 .loc 1 807 3 view .LVU2926 + 8676 0004 1029 cmp r1, #16 + 8677 0006 3CD8 bhi .L539 + 8678 0008 DFE801F0 tbb [pc, r1] + 8679 .L541: + ARM GAS /tmp/cc0aF2h1.s page 332 + + + 8680 000c 09 .byte (.L545-.L541)/2 + 8681 000d 3B .byte (.L539-.L541)/2 + 8682 000e 3B .byte (.L539-.L541)/2 + 8683 000f 3B .byte (.L539-.L541)/2 + 8684 0010 1F .byte (.L544-.L541)/2 + 8685 0011 3B .byte (.L539-.L541)/2 + 8686 0012 3B .byte (.L539-.L541)/2 + 8687 0013 3B .byte (.L539-.L541)/2 + 8688 0014 26 .byte (.L543-.L541)/2 + 8689 0015 3B .byte (.L539-.L541)/2 + 8690 0016 3B .byte (.L539-.L541)/2 + 8691 0017 3B .byte (.L539-.L541)/2 + 8692 0018 2D .byte (.L542-.L541)/2 + 8693 0019 3B .byte (.L539-.L541)/2 + 8694 001a 3B .byte (.L539-.L541)/2 + 8695 001b 3B .byte (.L539-.L541)/2 + 8696 001c 34 .byte (.L540-.L541)/2 + 8697 001d 00 .p2align 1 + 8698 .L545: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8699 .loc 1 807 7 is_stmt 0 discriminator 1 view .LVU2927 + 8700 001e 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 8701 0022 DBB2 uxtb r3, r3 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8702 .loc 1 807 44 discriminator 1 view .LVU2928 + 8703 0024 013B subs r3, r3, #1 + 8704 0026 18BF it ne + 8705 0028 0123 movne r3, #1 + 8706 .L546: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8707 .loc 1 807 6 discriminator 20 view .LVU2929 + 8708 002a 002B cmp r3, #0 + 8709 002c 40F08680 bne .L560 + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8710 .loc 1 813 3 is_stmt 1 view .LVU2930 + 8711 0030 1029 cmp r1, #16 + 8712 0032 71D8 bhi .L548 + 8713 0034 DFE801F0 tbb [pc, r1] + 8714 .L550: + 8715 0038 2C .byte (.L554-.L550)/2 + 8716 0039 70 .byte (.L548-.L550)/2 + 8717 003a 70 .byte (.L548-.L550)/2 + 8718 003b 70 .byte (.L548-.L550)/2 + 8719 003c 60 .byte (.L553-.L550)/2 + 8720 003d 70 .byte (.L548-.L550)/2 + 8721 003e 70 .byte (.L548-.L550)/2 + 8722 003f 70 .byte (.L548-.L550)/2 + 8723 0040 64 .byte (.L552-.L550)/2 + 8724 0041 70 .byte (.L548-.L550)/2 + 8725 0042 70 .byte (.L548-.L550)/2 + 8726 0043 70 .byte (.L548-.L550)/2 + 8727 0044 68 .byte (.L551-.L550)/2 + 8728 0045 70 .byte (.L548-.L550)/2 + 8729 0046 70 .byte (.L548-.L550)/2 + 8730 0047 70 .byte (.L548-.L550)/2 + 8731 0048 6C .byte (.L549-.L550)/2 + 8732 0049 00 .p2align 1 + ARM GAS /tmp/cc0aF2h1.s page 333 + + + 8733 .L544: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8734 .loc 1 807 7 is_stmt 0 discriminator 4 view .LVU2931 + 8735 004a 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 8736 004e DBB2 uxtb r3, r3 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8737 .loc 1 807 44 discriminator 4 view .LVU2932 + 8738 0050 013B subs r3, r3, #1 + 8739 0052 18BF it ne + 8740 0054 0123 movne r3, #1 + 8741 0056 E8E7 b .L546 + 8742 .L543: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8743 .loc 1 807 7 discriminator 7 view .LVU2933 + 8744 0058 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 8745 005c DBB2 uxtb r3, r3 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8746 .loc 1 807 44 discriminator 7 view .LVU2934 + 8747 005e 013B subs r3, r3, #1 + 8748 0060 18BF it ne + 8749 0062 0123 movne r3, #1 + 8750 0064 E1E7 b .L546 + 8751 .L542: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8752 .loc 1 807 7 discriminator 10 view .LVU2935 + 8753 0066 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 8754 006a DBB2 uxtb r3, r3 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8755 .loc 1 807 44 discriminator 10 view .LVU2936 + 8756 006c 013B subs r3, r3, #1 + 8757 006e 18BF it ne + 8758 0070 0123 movne r3, #1 + 8759 0072 DAE7 b .L546 + 8760 .L540: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8761 .loc 1 807 7 discriminator 13 view .LVU2937 + 8762 0074 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 8763 0078 DBB2 uxtb r3, r3 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8764 .loc 1 807 44 discriminator 13 view .LVU2938 + 8765 007a 013B subs r3, r3, #1 + 8766 007c 18BF it ne + 8767 007e 0123 movne r3, #1 + 8768 0080 D3E7 b .L546 + 8769 .L539: + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8770 .loc 1 807 7 discriminator 14 view .LVU2939 + 8771 0082 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 8772 0086 DBB2 uxtb r3, r3 + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8773 .loc 1 807 44 discriminator 14 view .LVU2940 + 8774 0088 013B subs r3, r3, #1 + 8775 008a 18BF it ne + 8776 008c 0123 movne r3, #1 + 8777 008e CCE7 b .L546 + 8778 .L554: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 334 + + + 8779 .loc 1 813 3 discriminator 1 view .LVU2941 + 8780 0090 0223 movs r3, #2 + 8781 0092 84F83E30 strb r3, [r4, #62] + 8782 .L555: + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8783 .loc 1 816 3 is_stmt 1 view .LVU2942 + 8784 0096 0122 movs r2, #1 + 8785 0098 2068 ldr r0, [r4] + 8786 .LVL745: + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8787 .loc 1 816 3 is_stmt 0 view .LVU2943 + 8788 009a FFF7FEFF bl TIM_CCxChannelCmd + 8789 .LVL746: + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8790 .loc 1 818 3 is_stmt 1 view .LVU2944 + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8791 .loc 1 818 7 is_stmt 0 view .LVU2945 + 8792 009e 2368 ldr r3, [r4] + 8793 00a0 294A ldr r2, .L564 + 8794 00a2 9342 cmp r3, r2 + 8795 00a4 0BD0 beq .L556 + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8796 .loc 1 818 7 discriminator 2 view .LVU2946 + 8797 00a6 02F5A052 add r2, r2, #5120 + 8798 00aa 9342 cmp r3, r2 + 8799 00ac 07D0 beq .L556 + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8800 .loc 1 818 7 discriminator 4 view .LVU2947 + 8801 00ae 02F58062 add r2, r2, #1024 + 8802 00b2 9342 cmp r3, r2 + 8803 00b4 03D0 beq .L556 + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8804 .loc 1 818 7 discriminator 6 view .LVU2948 + 8805 00b6 02F58062 add r2, r2, #1024 + 8806 00ba 9342 cmp r3, r2 + 8807 00bc 03D1 bne .L557 + 8808 .L556: + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8809 .loc 1 821 5 is_stmt 1 view .LVU2949 + 8810 00be 5A6C ldr r2, [r3, #68] + 8811 00c0 42F40042 orr r2, r2, #32768 + 8812 00c4 5A64 str r2, [r3, #68] + 8813 .L557: + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8814 .loc 1 825 3 view .LVU2950 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8815 .loc 1 825 7 is_stmt 0 view .LVU2951 + 8816 00c6 2368 ldr r3, [r4] + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8817 .loc 1 825 6 view .LVU2952 + 8818 00c8 1F4A ldr r2, .L564 + 8819 00ca 9342 cmp r3, r2 + 8820 00cc 28D0 beq .L558 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8821 .loc 1 825 7 discriminator 1 view .LVU2953 + 8822 00ce B3F1804F cmp r3, #1073741824 + 8823 00d2 25D0 beq .L558 + ARM GAS /tmp/cc0aF2h1.s page 335 + + + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8824 .loc 1 825 7 discriminator 2 view .LVU2954 + 8825 00d4 A2F59432 sub r2, r2, #75776 + 8826 00d8 9342 cmp r3, r2 + 8827 00da 21D0 beq .L558 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8828 .loc 1 825 7 discriminator 3 view .LVU2955 + 8829 00dc 02F58062 add r2, r2, #1024 + 8830 00e0 9342 cmp r3, r2 + 8831 00e2 1DD0 beq .L558 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8832 .loc 1 825 7 discriminator 4 view .LVU2956 + 8833 00e4 02F59C32 add r2, r2, #79872 + 8834 00e8 9342 cmp r3, r2 + 8835 00ea 19D0 beq .L558 + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8836 .loc 1 835 5 is_stmt 1 view .LVU2957 + 8837 00ec 1A68 ldr r2, [r3] + 8838 00ee 42F00102 orr r2, r2, #1 + 8839 00f2 1A60 str r2, [r3] + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8840 .loc 1 839 10 is_stmt 0 view .LVU2958 + 8841 00f4 0020 movs r0, #0 + 8842 00f6 22E0 b .L547 + 8843 .LVL747: + 8844 .L553: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8845 .loc 1 813 3 discriminator 3 view .LVU2959 + 8846 00f8 0223 movs r3, #2 + 8847 00fa 84F83F30 strb r3, [r4, #63] + 8848 00fe CAE7 b .L555 + 8849 .L552: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8850 .loc 1 813 3 discriminator 6 view .LVU2960 + 8851 0100 0223 movs r3, #2 + 8852 0102 84F84030 strb r3, [r4, #64] + 8853 0106 C6E7 b .L555 + 8854 .L551: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8855 .loc 1 813 3 discriminator 9 view .LVU2961 + 8856 0108 0223 movs r3, #2 + 8857 010a 84F84130 strb r3, [r4, #65] + 8858 010e C2E7 b .L555 + 8859 .L549: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8860 .loc 1 813 3 discriminator 12 view .LVU2962 + 8861 0110 0223 movs r3, #2 + 8862 0112 84F84230 strb r3, [r4, #66] + 8863 0116 BEE7 b .L555 + 8864 .L548: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8865 .loc 1 813 3 discriminator 13 view .LVU2963 + 8866 0118 0223 movs r3, #2 + 8867 011a 84F84330 strb r3, [r4, #67] + 8868 011e BAE7 b .L555 + 8869 .LVL748: + 8870 .L558: + ARM GAS /tmp/cc0aF2h1.s page 336 + + + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8871 .loc 1 827 5 is_stmt 1 view .LVU2964 + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8872 .loc 1 827 29 is_stmt 0 view .LVU2965 + 8873 0120 9968 ldr r1, [r3, #8] + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8874 .loc 1 827 13 view .LVU2966 + 8875 0122 0A4A ldr r2, .L564+4 + 8876 0124 0A40 ands r2, r2, r1 + 8877 .LVL749: + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8878 .loc 1 828 5 is_stmt 1 view .LVU2967 + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8879 .loc 1 828 8 is_stmt 0 view .LVU2968 + 8880 0126 062A cmp r2, #6 + 8881 0128 0AD0 beq .L561 + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8882 .loc 1 828 9 discriminator 1 view .LVU2969 + 8883 012a B2F5803F cmp r2, #65536 + 8884 012e 09D0 beq .L562 + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8885 .loc 1 830 7 is_stmt 1 view .LVU2970 + 8886 0130 1A68 ldr r2, [r3] + 8887 .LVL750: + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8888 .loc 1 830 7 is_stmt 0 view .LVU2971 + 8889 0132 42F00102 orr r2, r2, #1 + 8890 0136 1A60 str r2, [r3] + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8891 .loc 1 839 10 view .LVU2972 + 8892 0138 0020 movs r0, #0 + 8893 013a 00E0 b .L547 + 8894 .LVL751: + 8895 .L560: + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8896 .loc 1 809 12 view .LVU2973 + 8897 013c 0120 movs r0, #1 + 8898 .LVL752: + 8899 .L547: + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8900 .loc 1 840 1 view .LVU2974 + 8901 013e 10BD pop {r4, pc} + 8902 .LVL753: + 8903 .L561: + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8904 .loc 1 839 10 view .LVU2975 + 8905 0140 0020 movs r0, #0 + 8906 0142 FCE7 b .L547 + 8907 .L562: + 8908 0144 0020 movs r0, #0 + 8909 0146 FAE7 b .L547 + 8910 .L565: + 8911 .align 2 + 8912 .L564: + 8913 0148 002C0140 .word 1073818624 + 8914 014c 07000100 .word 65543 + 8915 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 337 + + + 8916 .LFE144: + 8918 .section .text.HAL_TIM_OC_Stop,"ax",%progbits + 8919 .align 1 + 8920 .global HAL_TIM_OC_Stop + 8921 .syntax unified + 8922 .thumb + 8923 .thumb_func + 8925 HAL_TIM_OC_Stop: + 8926 .LVL754: + 8927 .LFB145: + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 8928 .loc 1 857 1 is_stmt 1 view -0 + 8929 .cfi_startproc + 8930 @ args = 0, pretend = 0, frame = 0 + 8931 @ frame_needed = 0, uses_anonymous_args = 0 + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 8932 .loc 1 857 1 is_stmt 0 view .LVU2977 + 8933 0000 38B5 push {r3, r4, r5, lr} + 8934 .cfi_def_cfa_offset 16 + 8935 .cfi_offset 3, -16 + 8936 .cfi_offset 4, -12 + 8937 .cfi_offset 5, -8 + 8938 .cfi_offset 14, -4 + 8939 0002 0446 mov r4, r0 + 8940 0004 0D46 mov r5, r1 + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8941 .loc 1 859 3 is_stmt 1 view .LVU2978 + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8942 .loc 1 862 3 view .LVU2979 + 8943 0006 0022 movs r2, #0 + 8944 0008 0068 ldr r0, [r0] + 8945 .LVL755: + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8946 .loc 1 862 3 is_stmt 0 view .LVU2980 + 8947 000a FFF7FEFF bl TIM_CCxChannelCmd + 8948 .LVL756: + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8949 .loc 1 864 3 is_stmt 1 view .LVU2981 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8950 .loc 1 864 7 is_stmt 0 view .LVU2982 + 8951 000e 2368 ldr r3, [r4] + 8952 0010 294A ldr r2, .L579 + 8953 0012 9342 cmp r3, r2 + 8954 0014 27D0 beq .L567 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8955 .loc 1 864 7 discriminator 2 view .LVU2983 + 8956 0016 02F5A052 add r2, r2, #5120 + 8957 001a 9342 cmp r3, r2 + 8958 001c 23D0 beq .L567 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8959 .loc 1 864 7 discriminator 4 view .LVU2984 + 8960 001e 02F58062 add r2, r2, #1024 + 8961 0022 9342 cmp r3, r2 + 8962 0024 1FD0 beq .L567 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 8963 .loc 1 864 7 discriminator 6 view .LVU2985 + 8964 0026 02F58062 add r2, r2, #1024 + ARM GAS /tmp/cc0aF2h1.s page 338 + + + 8965 002a 9342 cmp r3, r2 + 8966 002c 1BD0 beq .L567 + 8967 .L568: + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 8968 .loc 1 867 5 is_stmt 1 discriminator 5 view .LVU2986 + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8969 .loc 1 871 3 view .LVU2987 + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8970 .loc 1 871 3 view .LVU2988 + 8971 002e 2368 ldr r3, [r4] + 8972 0030 196A ldr r1, [r3, #32] + 8973 0032 41F21112 movw r2, #4369 + 8974 0036 1142 tst r1, r2 + 8975 0038 08D1 bne .L569 + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8976 .loc 1 871 3 discriminator 1 view .LVU2989 + 8977 003a 196A ldr r1, [r3, #32] + 8978 003c 40F24442 movw r2, #1092 + 8979 0040 1142 tst r1, r2 + 8980 0042 03D1 bne .L569 + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8981 .loc 1 871 3 discriminator 3 view .LVU2990 + 8982 0044 1A68 ldr r2, [r3] + 8983 0046 22F00102 bic r2, r2, #1 + 8984 004a 1A60 str r2, [r3] + 8985 .L569: + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8986 .loc 1 871 3 discriminator 5 view .LVU2991 + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 8987 .loc 1 874 3 view .LVU2992 + 8988 004c 102D cmp r5, #16 + 8989 004e 2ED8 bhi .L570 + 8990 0050 DFE805F0 tbb [pc, r5] + 8991 .L572: + 8992 0054 18 .byte (.L576-.L572)/2 + 8993 0055 2D .byte (.L570-.L572)/2 + 8994 0056 2D .byte (.L570-.L572)/2 + 8995 0057 2D .byte (.L570-.L572)/2 + 8996 0058 1D .byte (.L575-.L572)/2 + 8997 0059 2D .byte (.L570-.L572)/2 + 8998 005a 2D .byte (.L570-.L572)/2 + 8999 005b 2D .byte (.L570-.L572)/2 + 9000 005c 21 .byte (.L574-.L572)/2 + 9001 005d 2D .byte (.L570-.L572)/2 + 9002 005e 2D .byte (.L570-.L572)/2 + 9003 005f 2D .byte (.L570-.L572)/2 + 9004 0060 25 .byte (.L573-.L572)/2 + 9005 0061 2D .byte (.L570-.L572)/2 + 9006 0062 2D .byte (.L570-.L572)/2 + 9007 0063 2D .byte (.L570-.L572)/2 + 9008 0064 29 .byte (.L571-.L572)/2 + 9009 0065 00 .p2align 1 + 9010 .L567: + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9011 .loc 1 867 5 view .LVU2993 + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9012 .loc 1 867 5 view .LVU2994 + ARM GAS /tmp/cc0aF2h1.s page 339 + + + 9013 0066 196A ldr r1, [r3, #32] + 9014 0068 41F21112 movw r2, #4369 + 9015 006c 1142 tst r1, r2 + 9016 006e DED1 bne .L568 + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9017 .loc 1 867 5 discriminator 1 view .LVU2995 + 9018 0070 196A ldr r1, [r3, #32] + 9019 0072 40F24442 movw r2, #1092 + 9020 0076 1142 tst r1, r2 + 9021 0078 D9D1 bne .L568 + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9022 .loc 1 867 5 discriminator 3 view .LVU2996 + 9023 007a 5A6C ldr r2, [r3, #68] + 9024 007c 22F40042 bic r2, r2, #32768 + 9025 0080 5A64 str r2, [r3, #68] + 9026 0082 D4E7 b .L568 + 9027 .L576: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9028 .loc 1 874 3 is_stmt 0 discriminator 1 view .LVU2997 + 9029 0084 0123 movs r3, #1 + 9030 0086 84F83E30 strb r3, [r4, #62] + 9031 .L577: + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9032 .loc 1 877 3 is_stmt 1 view .LVU2998 + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9033 .loc 1 878 1 is_stmt 0 view .LVU2999 + 9034 008a 0020 movs r0, #0 + 9035 008c 38BD pop {r3, r4, r5, pc} + 9036 .LVL757: + 9037 .L575: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9038 .loc 1 874 3 discriminator 3 view .LVU3000 + 9039 008e 0123 movs r3, #1 + 9040 0090 84F83F30 strb r3, [r4, #63] + 9041 0094 F9E7 b .L577 + 9042 .L574: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9043 .loc 1 874 3 discriminator 6 view .LVU3001 + 9044 0096 0123 movs r3, #1 + 9045 0098 84F84030 strb r3, [r4, #64] + 9046 009c F5E7 b .L577 + 9047 .L573: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9048 .loc 1 874 3 discriminator 9 view .LVU3002 + 9049 009e 0123 movs r3, #1 + 9050 00a0 84F84130 strb r3, [r4, #65] + 9051 00a4 F1E7 b .L577 + 9052 .L571: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9053 .loc 1 874 3 discriminator 12 view .LVU3003 + 9054 00a6 0123 movs r3, #1 + 9055 00a8 84F84230 strb r3, [r4, #66] + 9056 00ac EDE7 b .L577 + 9057 .L570: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9058 .loc 1 874 3 discriminator 13 view .LVU3004 + 9059 00ae 0123 movs r3, #1 + ARM GAS /tmp/cc0aF2h1.s page 340 + + + 9060 00b0 84F84330 strb r3, [r4, #67] + 9061 00b4 E9E7 b .L577 + 9062 .L580: + 9063 00b6 00BF .align 2 + 9064 .L579: + 9065 00b8 002C0140 .word 1073818624 + 9066 .cfi_endproc + 9067 .LFE145: + 9069 .section .text.HAL_TIM_OC_Start_IT,"ax",%progbits + 9070 .align 1 + 9071 .global HAL_TIM_OC_Start_IT + 9072 .syntax unified + 9073 .thumb + 9074 .thumb_func + 9076 HAL_TIM_OC_Start_IT: + 9077 .LVL758: + 9078 .LFB146: + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9079 .loc 1 892 1 is_stmt 1 view -0 + 9080 .cfi_startproc + 9081 @ args = 0, pretend = 0, frame = 0 + 9082 @ frame_needed = 0, uses_anonymous_args = 0 + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9083 .loc 1 892 1 is_stmt 0 view .LVU3006 + 9084 0000 10B5 push {r4, lr} + 9085 .cfi_def_cfa_offset 8 + 9086 .cfi_offset 4, -8 + 9087 .cfi_offset 14, -4 + 9088 0002 0446 mov r4, r0 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 9089 .loc 1 893 3 is_stmt 1 view .LVU3007 + 9090 .LVL759: + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9091 .loc 1 894 3 view .LVU3008 + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9092 .loc 1 897 3 view .LVU3009 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9093 .loc 1 900 3 view .LVU3010 + 9094 0004 1029 cmp r1, #16 + 9095 0006 3DD8 bhi .L582 + 9096 0008 DFE801F0 tbb [pc, r1] + 9097 .L584: + 9098 000c 09 .byte (.L588-.L584)/2 + 9099 000d 3C .byte (.L582-.L584)/2 + 9100 000e 3C .byte (.L582-.L584)/2 + 9101 000f 3C .byte (.L582-.L584)/2 + 9102 0010 20 .byte (.L587-.L584)/2 + 9103 0011 3C .byte (.L582-.L584)/2 + 9104 0012 3C .byte (.L582-.L584)/2 + 9105 0013 3C .byte (.L582-.L584)/2 + 9106 0014 27 .byte (.L586-.L584)/2 + 9107 0015 3C .byte (.L582-.L584)/2 + 9108 0016 3C .byte (.L582-.L584)/2 + 9109 0017 3C .byte (.L582-.L584)/2 + 9110 0018 2E .byte (.L585-.L584)/2 + 9111 0019 3C .byte (.L582-.L584)/2 + 9112 001a 3C .byte (.L582-.L584)/2 + ARM GAS /tmp/cc0aF2h1.s page 341 + + + 9113 001b 3C .byte (.L582-.L584)/2 + 9114 001c 35 .byte (.L583-.L584)/2 + 9115 001d 00 .p2align 1 + 9116 .L588: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9117 .loc 1 900 7 is_stmt 0 discriminator 1 view .LVU3011 + 9118 001e 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 9119 0022 DBB2 uxtb r3, r3 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9120 .loc 1 900 44 discriminator 1 view .LVU3012 + 9121 0024 013B subs r3, r3, #1 + 9122 0026 18BF it ne + 9123 0028 0123 movne r3, #1 + 9124 .L589: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9125 .loc 1 900 6 discriminator 20 view .LVU3013 + 9126 002a 002B cmp r3, #0 + 9127 002c 40F0BA80 bne .L608 + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9128 .loc 1 906 3 is_stmt 1 view .LVU3014 + 9129 0030 1029 cmp r1, #16 + 9130 0032 00F28780 bhi .L591 + 9131 0036 DFE801F0 tbb [pc, r1] + 9132 .L593: + 9133 003a 2C .byte (.L597-.L593)/2 + 9134 003b 85 .byte (.L591-.L593)/2 + 9135 003c 85 .byte (.L591-.L593)/2 + 9136 003d 85 .byte (.L591-.L593)/2 + 9137 003e 65 .byte (.L596-.L593)/2 + 9138 003f 85 .byte (.L591-.L593)/2 + 9139 0040 85 .byte (.L591-.L593)/2 + 9140 0041 85 .byte (.L591-.L593)/2 + 9141 0042 6E .byte (.L595-.L593)/2 + 9142 0043 85 .byte (.L591-.L593)/2 + 9143 0044 85 .byte (.L591-.L593)/2 + 9144 0045 85 .byte (.L591-.L593)/2 + 9145 0046 77 .byte (.L594-.L593)/2 + 9146 0047 85 .byte (.L591-.L593)/2 + 9147 0048 85 .byte (.L591-.L593)/2 + 9148 0049 85 .byte (.L591-.L593)/2 + 9149 004a 80 .byte (.L592-.L593)/2 + 9150 004b 00 .p2align 1 + 9151 .L587: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9152 .loc 1 900 7 is_stmt 0 discriminator 4 view .LVU3015 + 9153 004c 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 9154 0050 DBB2 uxtb r3, r3 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9155 .loc 1 900 44 discriminator 4 view .LVU3016 + 9156 0052 013B subs r3, r3, #1 + 9157 0054 18BF it ne + 9158 0056 0123 movne r3, #1 + 9159 0058 E7E7 b .L589 + 9160 .L586: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9161 .loc 1 900 7 discriminator 7 view .LVU3017 + 9162 005a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + ARM GAS /tmp/cc0aF2h1.s page 342 + + + 9163 005e DBB2 uxtb r3, r3 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9164 .loc 1 900 44 discriminator 7 view .LVU3018 + 9165 0060 013B subs r3, r3, #1 + 9166 0062 18BF it ne + 9167 0064 0123 movne r3, #1 + 9168 0066 E0E7 b .L589 + 9169 .L585: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9170 .loc 1 900 7 discriminator 10 view .LVU3019 + 9171 0068 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9172 006c DBB2 uxtb r3, r3 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9173 .loc 1 900 44 discriminator 10 view .LVU3020 + 9174 006e 013B subs r3, r3, #1 + 9175 0070 18BF it ne + 9176 0072 0123 movne r3, #1 + 9177 0074 D9E7 b .L589 + 9178 .L583: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9179 .loc 1 900 7 discriminator 13 view .LVU3021 + 9180 0076 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 9181 007a DBB2 uxtb r3, r3 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9182 .loc 1 900 44 discriminator 13 view .LVU3022 + 9183 007c 013B subs r3, r3, #1 + 9184 007e 18BF it ne + 9185 0080 0123 movne r3, #1 + 9186 0082 D2E7 b .L589 + 9187 .L582: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9188 .loc 1 900 7 discriminator 14 view .LVU3023 + 9189 0084 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 9190 0088 DBB2 uxtb r3, r3 + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9191 .loc 1 900 44 discriminator 14 view .LVU3024 + 9192 008a 013B subs r3, r3, #1 + 9193 008c 18BF it ne + 9194 008e 0123 movne r3, #1 + 9195 0090 CBE7 b .L589 + 9196 .L597: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9197 .loc 1 906 3 discriminator 1 view .LVU3025 + 9198 0092 0223 movs r3, #2 + 9199 0094 84F83E30 strb r3, [r4, #62] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9200 .loc 1 908 3 is_stmt 1 view .LVU3026 + 9201 .L598: + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9202 .loc 1 913 7 view .LVU3027 + 9203 0098 2268 ldr r2, [r4] + 9204 009a D368 ldr r3, [r2, #12] + 9205 009c 43F00203 orr r3, r3, #2 + 9206 00a0 D360 str r3, [r2, #12] + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9207 .loc 1 914 7 view .LVU3028 + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 343 + + + 9208 .loc 1 943 3 view .LVU3029 + 9209 .L603: + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9210 .loc 1 946 5 view .LVU3030 + 9211 00a2 0122 movs r2, #1 + 9212 00a4 2068 ldr r0, [r4] + 9213 .LVL760: + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9214 .loc 1 946 5 is_stmt 0 view .LVU3031 + 9215 00a6 FFF7FEFF bl TIM_CCxChannelCmd + 9216 .LVL761: + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9217 .loc 1 948 5 is_stmt 1 view .LVU3032 + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9218 .loc 1 948 9 is_stmt 0 view .LVU3033 + 9219 00aa 2368 ldr r3, [r4] + 9220 00ac 414A ldr r2, .L617 + 9221 00ae 9342 cmp r3, r2 + 9222 00b0 0BD0 beq .L604 + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9223 .loc 1 948 9 discriminator 2 view .LVU3034 + 9224 00b2 02F5A052 add r2, r2, #5120 + 9225 00b6 9342 cmp r3, r2 + 9226 00b8 07D0 beq .L604 + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9227 .loc 1 948 9 discriminator 4 view .LVU3035 + 9228 00ba 02F58062 add r2, r2, #1024 + 9229 00be 9342 cmp r3, r2 + 9230 00c0 03D0 beq .L604 + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9231 .loc 1 948 9 discriminator 6 view .LVU3036 + 9232 00c2 02F58062 add r2, r2, #1024 + 9233 00c6 9342 cmp r3, r2 + 9234 00c8 03D1 bne .L605 + 9235 .L604: + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9236 .loc 1 951 7 is_stmt 1 view .LVU3037 + 9237 00ca 5A6C ldr r2, [r3, #68] + 9238 00cc 42F40042 orr r2, r2, #32768 + 9239 00d0 5A64 str r2, [r3, #68] + 9240 .L605: + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9241 .loc 1 955 5 view .LVU3038 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9242 .loc 1 955 9 is_stmt 0 view .LVU3039 + 9243 00d2 2368 ldr r3, [r4] + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9244 .loc 1 955 8 view .LVU3040 + 9245 00d4 374A ldr r2, .L617 + 9246 00d6 9342 cmp r3, r2 + 9247 00d8 56D0 beq .L606 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9248 .loc 1 955 9 discriminator 1 view .LVU3041 + 9249 00da B3F1804F cmp r3, #1073741824 + 9250 00de 53D0 beq .L606 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9251 .loc 1 955 9 discriminator 2 view .LVU3042 + ARM GAS /tmp/cc0aF2h1.s page 344 + + + 9252 00e0 A2F59432 sub r2, r2, #75776 + 9253 00e4 9342 cmp r3, r2 + 9254 00e6 4FD0 beq .L606 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9255 .loc 1 955 9 discriminator 3 view .LVU3043 + 9256 00e8 02F58062 add r2, r2, #1024 + 9257 00ec 9342 cmp r3, r2 + 9258 00ee 4BD0 beq .L606 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9259 .loc 1 955 9 discriminator 4 view .LVU3044 + 9260 00f0 02F59C32 add r2, r2, #79872 + 9261 00f4 9342 cmp r3, r2 + 9262 00f6 47D0 beq .L606 + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9263 .loc 1 965 7 is_stmt 1 view .LVU3045 + 9264 00f8 1A68 ldr r2, [r3] + 9265 00fa 42F00102 orr r2, r2, #1 + 9266 00fe 1A60 str r2, [r3] + 9267 0100 0020 movs r0, #0 + 9268 0102 50E0 b .L590 + 9269 .LVL762: + 9270 .L596: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9271 .loc 1 906 3 is_stmt 0 discriminator 3 view .LVU3046 + 9272 0104 0223 movs r3, #2 + 9273 0106 84F83F30 strb r3, [r4, #63] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9274 .loc 1 908 3 is_stmt 1 view .LVU3047 + 9275 .L599: + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9276 .loc 1 920 7 view .LVU3048 + 9277 010a 2268 ldr r2, [r4] + 9278 010c D368 ldr r3, [r2, #12] + 9279 010e 43F00403 orr r3, r3, #4 + 9280 0112 D360 str r3, [r2, #12] + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9281 .loc 1 921 7 view .LVU3049 + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9282 .loc 1 943 3 view .LVU3050 + 9283 0114 C5E7 b .L603 + 9284 .L595: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9285 .loc 1 906 3 is_stmt 0 discriminator 6 view .LVU3051 + 9286 0116 0223 movs r3, #2 + 9287 0118 84F84030 strb r3, [r4, #64] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9288 .loc 1 908 3 is_stmt 1 view .LVU3052 + 9289 .L600: + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9290 .loc 1 927 7 view .LVU3053 + 9291 011c 2268 ldr r2, [r4] + 9292 011e D368 ldr r3, [r2, #12] + 9293 0120 43F00803 orr r3, r3, #8 + 9294 0124 D360 str r3, [r2, #12] + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9295 .loc 1 928 7 view .LVU3054 + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 345 + + + 9296 .loc 1 943 3 view .LVU3055 + 9297 0126 BCE7 b .L603 + 9298 .L594: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9299 .loc 1 906 3 is_stmt 0 discriminator 9 view .LVU3056 + 9300 0128 0223 movs r3, #2 + 9301 012a 84F84130 strb r3, [r4, #65] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9302 .loc 1 908 3 is_stmt 1 view .LVU3057 + 9303 .L601: + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9304 .loc 1 934 7 view .LVU3058 + 9305 012e 2268 ldr r2, [r4] + 9306 0130 D368 ldr r3, [r2, #12] + 9307 0132 43F01003 orr r3, r3, #16 + 9308 0136 D360 str r3, [r2, #12] + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9309 .loc 1 935 7 view .LVU3059 + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9310 .loc 1 943 3 view .LVU3060 + 9311 0138 B3E7 b .L603 + 9312 .L592: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9313 .loc 1 906 3 is_stmt 0 discriminator 12 view .LVU3061 + 9314 013a 0223 movs r3, #2 + 9315 013c 84F84230 strb r3, [r4, #66] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9316 .loc 1 908 3 is_stmt 1 view .LVU3062 + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9317 .loc 1 906 3 is_stmt 0 discriminator 12 view .LVU3063 + 9318 0140 0120 movs r0, #1 + 9319 .LVL763: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9320 .loc 1 906 3 discriminator 12 view .LVU3064 + 9321 0142 30E0 b .L590 + 9322 .LVL764: + 9323 .L591: + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9324 .loc 1 906 3 discriminator 13 view .LVU3065 + 9325 0144 0223 movs r3, #2 + 9326 0146 84F84330 strb r3, [r4, #67] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9327 .loc 1 908 3 is_stmt 1 view .LVU3066 + 9328 014a 0C29 cmp r1, #12 + 9329 014c 2CD8 bhi .L609 + 9330 014e 01A3 adr r3, .L602 + 9331 0150 53F821F0 ldr pc, [r3, r1, lsl #2] + 9332 .p2align 2 + 9333 .L602: + 9334 0154 99000000 .word .L598+1 + 9335 0158 A9010000 .word .L609+1 + 9336 015c A9010000 .word .L609+1 + 9337 0160 A9010000 .word .L609+1 + 9338 0164 0B010000 .word .L599+1 + 9339 0168 A9010000 .word .L609+1 + 9340 016c A9010000 .word .L609+1 + 9341 0170 A9010000 .word .L609+1 + ARM GAS /tmp/cc0aF2h1.s page 346 + + + 9342 0174 1D010000 .word .L600+1 + 9343 0178 A9010000 .word .L609+1 + 9344 017c A9010000 .word .L609+1 + 9345 0180 A9010000 .word .L609+1 + 9346 0184 2F010000 .word .L601+1 + 9347 .LVL765: + 9348 .p2align 1 + 9349 .L606: + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9350 .loc 1 957 7 view .LVU3067 + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9351 .loc 1 957 31 is_stmt 0 view .LVU3068 + 9352 0188 9968 ldr r1, [r3, #8] + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9353 .loc 1 957 15 view .LVU3069 + 9354 018a 0B4A ldr r2, .L617+4 + 9355 018c 0A40 ands r2, r2, r1 + 9356 .LVL766: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9357 .loc 1 958 7 is_stmt 1 view .LVU3070 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9358 .loc 1 958 10 is_stmt 0 view .LVU3071 + 9359 018e 062A cmp r2, #6 + 9360 0190 0CD0 beq .L610 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9361 .loc 1 958 11 discriminator 1 view .LVU3072 + 9362 0192 B2F5803F cmp r2, #65536 + 9363 0196 0BD0 beq .L611 + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9364 .loc 1 960 9 is_stmt 1 view .LVU3073 + 9365 0198 1A68 ldr r2, [r3] + 9366 .LVL767: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9367 .loc 1 960 9 is_stmt 0 view .LVU3074 + 9368 019a 42F00102 orr r2, r2, #1 + 9369 019e 1A60 str r2, [r3] + 9370 01a0 0020 movs r0, #0 + 9371 01a2 00E0 b .L590 + 9372 .LVL768: + 9373 .L608: + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9374 .loc 1 902 12 view .LVU3075 + 9375 01a4 0120 movs r0, #1 + 9376 .LVL769: + 9377 .L590: + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9378 .loc 1 971 1 view .LVU3076 + 9379 01a6 10BD pop {r4, pc} + 9380 .LVL770: + 9381 .L609: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9382 .loc 1 908 3 view .LVU3077 + 9383 01a8 0120 movs r0, #1 + 9384 .LVL771: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9385 .loc 1 908 3 view .LVU3078 + 9386 01aa FCE7 b .L590 + ARM GAS /tmp/cc0aF2h1.s page 347 + + + 9387 .LVL772: + 9388 .L610: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9389 .loc 1 908 3 view .LVU3079 + 9390 01ac 0020 movs r0, #0 + 9391 01ae FAE7 b .L590 + 9392 .L611: + 9393 01b0 0020 movs r0, #0 + 9394 01b2 F8E7 b .L590 + 9395 .L618: + 9396 .align 2 + 9397 .L617: + 9398 01b4 002C0140 .word 1073818624 + 9399 01b8 07000100 .word 65543 + 9400 .cfi_endproc + 9401 .LFE146: + 9403 .section .text.HAL_TIM_OC_Stop_IT,"ax",%progbits + 9404 .align 1 + 9405 .global HAL_TIM_OC_Stop_IT + 9406 .syntax unified + 9407 .thumb + 9408 .thumb_func + 9410 HAL_TIM_OC_Stop_IT: + 9411 .LVL773: + 9412 .LFB147: + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9413 .loc 1 985 1 is_stmt 1 view -0 + 9414 .cfi_startproc + 9415 @ args = 0, pretend = 0, frame = 0 + 9416 @ frame_needed = 0, uses_anonymous_args = 0 + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9417 .loc 1 985 1 is_stmt 0 view .LVU3081 + 9418 0000 38B5 push {r3, r4, r5, lr} + 9419 .cfi_def_cfa_offset 16 + 9420 .cfi_offset 3, -16 + 9421 .cfi_offset 4, -12 + 9422 .cfi_offset 5, -8 + 9423 .cfi_offset 14, -4 + 9424 0002 0546 mov r5, r0 + 9425 0004 0C46 mov r4, r1 + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9426 .loc 1 986 3 is_stmt 1 view .LVU3082 + 9427 .LVL774: + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9428 .loc 1 989 3 view .LVU3083 + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9429 .loc 1 991 3 view .LVU3084 + 9430 0006 0C29 cmp r1, #12 + 9431 0008 7DD8 bhi .L637 + 9432 000a DFE801F0 tbb [pc, r1] + 9433 .L622: + 9434 000e 07 .byte (.L625-.L622)/2 + 9435 000f 7C .byte (.L637-.L622)/2 + 9436 0010 7C .byte (.L637-.L622)/2 + 9437 0011 7C .byte (.L637-.L622)/2 + 9438 0012 3D .byte (.L624-.L622)/2 + 9439 0013 7C .byte (.L637-.L622)/2 + ARM GAS /tmp/cc0aF2h1.s page 348 + + + 9440 0014 7C .byte (.L637-.L622)/2 + 9441 0015 7C .byte (.L637-.L622)/2 + 9442 0016 43 .byte (.L623-.L622)/2 + 9443 0017 7C .byte (.L637-.L622)/2 + 9444 0018 7C .byte (.L637-.L622)/2 + 9445 0019 7C .byte (.L637-.L622)/2 + 9446 001a 49 .byte (.L621-.L622)/2 + 9447 001b 00 .p2align 1 + 9448 .L625: + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9449 .loc 1 996 7 view .LVU3085 + 9450 001c 0268 ldr r2, [r0] + 9451 001e D368 ldr r3, [r2, #12] + 9452 0020 23F00203 bic r3, r3, #2 + 9453 0024 D360 str r3, [r2, #12] + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9454 .loc 1 997 7 view .LVU3086 +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9455 .loc 1 1026 3 view .LVU3087 + 9456 .L626: +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9457 .loc 1 1029 5 view .LVU3088 + 9458 0026 0022 movs r2, #0 + 9459 0028 2146 mov r1, r4 + 9460 .LVL775: +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9461 .loc 1 1029 5 is_stmt 0 view .LVU3089 + 9462 002a 2868 ldr r0, [r5] + 9463 .LVL776: +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9464 .loc 1 1029 5 view .LVU3090 + 9465 002c FFF7FEFF bl TIM_CCxChannelCmd + 9466 .LVL777: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9467 .loc 1 1031 5 is_stmt 1 view .LVU3091 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9468 .loc 1 1031 9 is_stmt 0 view .LVU3092 + 9469 0030 2B68 ldr r3, [r5] + 9470 0032 364A ldr r2, .L639 + 9471 0034 9342 cmp r3, r2 + 9472 0036 39D0 beq .L627 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9473 .loc 1 1031 9 discriminator 2 view .LVU3093 + 9474 0038 02F5A052 add r2, r2, #5120 + 9475 003c 9342 cmp r3, r2 + 9476 003e 35D0 beq .L627 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9477 .loc 1 1031 9 discriminator 4 view .LVU3094 + 9478 0040 02F58062 add r2, r2, #1024 + 9479 0044 9342 cmp r3, r2 + 9480 0046 31D0 beq .L627 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9481 .loc 1 1031 9 discriminator 6 view .LVU3095 + 9482 0048 02F58062 add r2, r2, #1024 + 9483 004c 9342 cmp r3, r2 + 9484 004e 2DD0 beq .L627 + 9485 .L628: + ARM GAS /tmp/cc0aF2h1.s page 349 + + +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9486 .loc 1 1034 7 is_stmt 1 discriminator 5 view .LVU3096 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9487 .loc 1 1038 5 view .LVU3097 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9488 .loc 1 1038 5 view .LVU3098 + 9489 0050 2B68 ldr r3, [r5] + 9490 0052 196A ldr r1, [r3, #32] + 9491 0054 41F21112 movw r2, #4369 + 9492 0058 1142 tst r1, r2 + 9493 005a 08D1 bne .L629 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9494 .loc 1 1038 5 discriminator 1 view .LVU3099 + 9495 005c 196A ldr r1, [r3, #32] + 9496 005e 40F24442 movw r2, #1092 + 9497 0062 1142 tst r1, r2 + 9498 0064 03D1 bne .L629 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9499 .loc 1 1038 5 discriminator 3 view .LVU3100 + 9500 0066 1A68 ldr r2, [r3] + 9501 0068 22F00102 bic r2, r2, #1 + 9502 006c 1A60 str r2, [r3] + 9503 .L629: +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9504 .loc 1 1038 5 discriminator 5 view .LVU3101 +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9505 .loc 1 1041 5 view .LVU3102 + 9506 006e 102C cmp r4, #16 + 9507 0070 44D8 bhi .L630 + 9508 0072 DFE804F0 tbb [pc, r4] + 9509 .L632: + 9510 0076 2A .byte (.L636-.L632)/2 + 9511 0077 43 .byte (.L630-.L632)/2 + 9512 0078 43 .byte (.L630-.L632)/2 + 9513 0079 43 .byte (.L630-.L632)/2 + 9514 007a 2F .byte (.L635-.L632)/2 + 9515 007b 43 .byte (.L630-.L632)/2 + 9516 007c 43 .byte (.L630-.L632)/2 + 9517 007d 43 .byte (.L630-.L632)/2 + 9518 007e 34 .byte (.L634-.L632)/2 + 9519 007f 43 .byte (.L630-.L632)/2 + 9520 0080 43 .byte (.L630-.L632)/2 + 9521 0081 43 .byte (.L630-.L632)/2 + 9522 0082 39 .byte (.L633-.L632)/2 + 9523 0083 43 .byte (.L630-.L632)/2 + 9524 0084 43 .byte (.L630-.L632)/2 + 9525 0085 43 .byte (.L630-.L632)/2 + 9526 0086 3E .byte (.L631-.L632)/2 + 9527 .LVL778: + 9528 0087 00 .p2align 1 + 9529 .L624: +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9530 .loc 1 1003 7 view .LVU3103 + 9531 0088 0268 ldr r2, [r0] + 9532 008a D368 ldr r3, [r2, #12] + 9533 008c 23F00403 bic r3, r3, #4 + 9534 0090 D360 str r3, [r2, #12] + ARM GAS /tmp/cc0aF2h1.s page 350 + + +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9535 .loc 1 1004 7 view .LVU3104 +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9536 .loc 1 1026 3 view .LVU3105 + 9537 0092 C8E7 b .L626 + 9538 .L623: +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9539 .loc 1 1010 7 view .LVU3106 + 9540 0094 0268 ldr r2, [r0] + 9541 0096 D368 ldr r3, [r2, #12] + 9542 0098 23F00803 bic r3, r3, #8 + 9543 009c D360 str r3, [r2, #12] +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9544 .loc 1 1011 7 view .LVU3107 +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9545 .loc 1 1026 3 view .LVU3108 + 9546 009e C2E7 b .L626 + 9547 .L621: +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9548 .loc 1 1017 7 view .LVU3109 + 9549 00a0 0268 ldr r2, [r0] + 9550 00a2 D368 ldr r3, [r2, #12] + 9551 00a4 23F01003 bic r3, r3, #16 + 9552 00a8 D360 str r3, [r2, #12] +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9553 .loc 1 1018 7 view .LVU3110 +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9554 .loc 1 1026 3 view .LVU3111 + 9555 00aa BCE7 b .L626 + 9556 .LVL779: + 9557 .L627: +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9558 .loc 1 1034 7 view .LVU3112 +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9559 .loc 1 1034 7 view .LVU3113 + 9560 00ac 196A ldr r1, [r3, #32] + 9561 00ae 41F21112 movw r2, #4369 + 9562 00b2 1142 tst r1, r2 + 9563 00b4 CCD1 bne .L628 +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9564 .loc 1 1034 7 discriminator 1 view .LVU3114 + 9565 00b6 196A ldr r1, [r3, #32] + 9566 00b8 40F24442 movw r2, #1092 + 9567 00bc 1142 tst r1, r2 + 9568 00be C7D1 bne .L628 +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9569 .loc 1 1034 7 discriminator 3 view .LVU3115 + 9570 00c0 5A6C ldr r2, [r3, #68] + 9571 00c2 22F40042 bic r2, r2, #32768 + 9572 00c6 5A64 str r2, [r3, #68] + 9573 00c8 C2E7 b .L628 + 9574 .L636: +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9575 .loc 1 1041 5 is_stmt 0 discriminator 1 view .LVU3116 + 9576 00ca 0123 movs r3, #1 + 9577 00cc 85F83E30 strb r3, [r5, #62] + 9578 00d0 0020 movs r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 351 + + + 9579 00d2 19E0 b .L620 + 9580 .L635: +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9581 .loc 1 1041 5 discriminator 3 view .LVU3117 + 9582 00d4 0123 movs r3, #1 + 9583 00d6 85F83F30 strb r3, [r5, #63] + 9584 00da 0020 movs r0, #0 + 9585 00dc 14E0 b .L620 + 9586 .L634: +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9587 .loc 1 1041 5 discriminator 6 view .LVU3118 + 9588 00de 0123 movs r3, #1 + 9589 00e0 85F84030 strb r3, [r5, #64] + 9590 00e4 0020 movs r0, #0 + 9591 00e6 0FE0 b .L620 + 9592 .L633: +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9593 .loc 1 1041 5 discriminator 9 view .LVU3119 + 9594 00e8 0123 movs r3, #1 + 9595 00ea 85F84130 strb r3, [r5, #65] + 9596 00ee 0020 movs r0, #0 + 9597 00f0 0AE0 b .L620 + 9598 .L631: +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9599 .loc 1 1041 5 discriminator 12 view .LVU3120 + 9600 00f2 0123 movs r3, #1 + 9601 00f4 85F84230 strb r3, [r5, #66] + 9602 00f8 0020 movs r0, #0 + 9603 00fa 05E0 b .L620 + 9604 .L630: +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9605 .loc 1 1041 5 discriminator 13 view .LVU3121 + 9606 00fc 0123 movs r3, #1 + 9607 00fe 85F84330 strb r3, [r5, #67] + 9608 0102 0020 movs r0, #0 + 9609 0104 00E0 b .L620 + 9610 .LVL780: + 9611 .L637: + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9612 .loc 1 991 3 view .LVU3122 + 9613 0106 0120 movs r0, #1 + 9614 .LVL781: + 9615 .L620: +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9616 .loc 1 1045 3 is_stmt 1 view .LVU3123 +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9617 .loc 1 1046 1 is_stmt 0 view .LVU3124 + 9618 0108 38BD pop {r3, r4, r5, pc} + 9619 .LVL782: + 9620 .L640: +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9621 .loc 1 1046 1 view .LVU3125 + 9622 010a 00BF .align 2 + 9623 .L639: + 9624 010c 002C0140 .word 1073818624 + 9625 .cfi_endproc + 9626 .LFE147: + ARM GAS /tmp/cc0aF2h1.s page 352 + + + 9628 .section .text.HAL_TIM_OC_Start_DMA,"ax",%progbits + 9629 .align 1 + 9630 .global HAL_TIM_OC_Start_DMA + 9631 .syntax unified + 9632 .thumb + 9633 .thumb_func + 9635 HAL_TIM_OC_Start_DMA: + 9636 .LVL783: + 9637 .LFB148: +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9638 .loc 1 1063 1 is_stmt 1 view -0 + 9639 .cfi_startproc + 9640 @ args = 0, pretend = 0, frame = 0 + 9641 @ frame_needed = 0, uses_anonymous_args = 0 +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9642 .loc 1 1063 1 is_stmt 0 view .LVU3127 + 9643 0000 38B5 push {r3, r4, r5, lr} + 9644 .cfi_def_cfa_offset 16 + 9645 .cfi_offset 3, -16 + 9646 .cfi_offset 4, -12 + 9647 .cfi_offset 5, -8 + 9648 .cfi_offset 14, -4 + 9649 0002 0546 mov r5, r0 + 9650 0004 0C46 mov r4, r1 + 9651 0006 1146 mov r1, r2 + 9652 .LVL784: +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 9653 .loc 1 1064 3 is_stmt 1 view .LVU3128 +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9654 .loc 1 1065 3 view .LVU3129 +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9655 .loc 1 1068 3 view .LVU3130 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9656 .loc 1 1071 3 view .LVU3131 + 9657 0008 102C cmp r4, #16 + 9658 000a 41D8 bhi .L642 + 9659 000c DFE804F0 tbb [pc, r4] + 9660 .LVL785: + 9661 .L644: + 9662 0010 09 .byte (.L648-.L644)/2 + 9663 0011 40 .byte (.L642-.L644)/2 + 9664 0012 40 .byte (.L642-.L644)/2 + 9665 0013 40 .byte (.L642-.L644)/2 + 9666 0014 20 .byte (.L647-.L644)/2 + 9667 0015 40 .byte (.L642-.L644)/2 + 9668 0016 40 .byte (.L642-.L644)/2 + 9669 0017 40 .byte (.L642-.L644)/2 + 9670 0018 28 .byte (.L646-.L644)/2 + 9671 0019 40 .byte (.L642-.L644)/2 + 9672 001a 40 .byte (.L642-.L644)/2 + 9673 001b 40 .byte (.L642-.L644)/2 + 9674 001c 30 .byte (.L645-.L644)/2 + 9675 001d 40 .byte (.L642-.L644)/2 + 9676 001e 40 .byte (.L642-.L644)/2 + 9677 001f 40 .byte (.L642-.L644)/2 + 9678 0020 38 .byte (.L643-.L644)/2 + 9679 0021 00 .p2align 1 + ARM GAS /tmp/cc0aF2h1.s page 353 + + + 9680 .L648: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9681 .loc 1 1071 7 is_stmt 0 discriminator 1 view .LVU3132 + 9682 0022 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 9683 .LVL786: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9684 .loc 1 1071 7 discriminator 1 view .LVU3133 + 9685 0026 C0B2 uxtb r0, r0 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9686 .loc 1 1071 44 discriminator 1 view .LVU3134 + 9687 0028 0228 cmp r0, #2 + 9688 002a 14BF ite ne + 9689 002c 0020 movne r0, #0 + 9690 002e 0120 moveq r0, #1 + 9691 .L649: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9692 .loc 1 1071 6 discriminator 20 view .LVU3135 + 9693 0030 0028 cmp r0, #0 + 9694 0032 40F05181 bne .L676 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9695 .loc 1 1075 8 is_stmt 1 view .LVU3136 + 9696 0036 102C cmp r4, #16 + 9697 0038 78D8 bhi .L651 + 9698 003a DFE804F0 tbb [pc, r4] + 9699 .L653: + 9700 003e 31 .byte (.L657-.L653)/2 + 9701 003f 77 .byte (.L651-.L653)/2 + 9702 0040 77 .byte (.L651-.L653)/2 + 9703 0041 77 .byte (.L651-.L653)/2 + 9704 0042 57 .byte (.L656-.L653)/2 + 9705 0043 77 .byte (.L651-.L653)/2 + 9706 0044 77 .byte (.L651-.L653)/2 + 9707 0045 77 .byte (.L651-.L653)/2 + 9708 0046 5F .byte (.L655-.L653)/2 + 9709 0047 77 .byte (.L651-.L653)/2 + 9710 0048 77 .byte (.L651-.L653)/2 + 9711 0049 77 .byte (.L651-.L653)/2 + 9712 004a 67 .byte (.L654-.L653)/2 + 9713 004b 77 .byte (.L651-.L653)/2 + 9714 004c 77 .byte (.L651-.L653)/2 + 9715 004d 77 .byte (.L651-.L653)/2 + 9716 004e 6F .byte (.L652-.L653)/2 + 9717 .LVL787: + 9718 004f 00 .p2align 1 + 9719 .L647: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9720 .loc 1 1071 7 is_stmt 0 discriminator 4 view .LVU3137 + 9721 0050 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 9722 .LVL788: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9723 .loc 1 1071 7 discriminator 4 view .LVU3138 + 9724 0054 C0B2 uxtb r0, r0 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9725 .loc 1 1071 44 discriminator 4 view .LVU3139 + 9726 0056 0228 cmp r0, #2 + 9727 0058 14BF ite ne + 9728 005a 0020 movne r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 354 + + + 9729 005c 0120 moveq r0, #1 + 9730 005e E7E7 b .L649 + 9731 .LVL789: + 9732 .L646: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9733 .loc 1 1071 7 discriminator 7 view .LVU3140 + 9734 0060 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 9735 .LVL790: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9736 .loc 1 1071 7 discriminator 7 view .LVU3141 + 9737 0064 C0B2 uxtb r0, r0 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9738 .loc 1 1071 44 discriminator 7 view .LVU3142 + 9739 0066 0228 cmp r0, #2 + 9740 0068 14BF ite ne + 9741 006a 0020 movne r0, #0 + 9742 006c 0120 moveq r0, #1 + 9743 006e DFE7 b .L649 + 9744 .LVL791: + 9745 .L645: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9746 .loc 1 1071 7 discriminator 10 view .LVU3143 + 9747 0070 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 9748 .LVL792: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9749 .loc 1 1071 7 discriminator 10 view .LVU3144 + 9750 0074 C0B2 uxtb r0, r0 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9751 .loc 1 1071 44 discriminator 10 view .LVU3145 + 9752 0076 0228 cmp r0, #2 + 9753 0078 14BF ite ne + 9754 007a 0020 movne r0, #0 + 9755 007c 0120 moveq r0, #1 + 9756 007e D7E7 b .L649 + 9757 .LVL793: + 9758 .L643: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9759 .loc 1 1071 7 discriminator 13 view .LVU3146 + 9760 0080 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 9761 .LVL794: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9762 .loc 1 1071 7 discriminator 13 view .LVU3147 + 9763 0084 C0B2 uxtb r0, r0 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9764 .loc 1 1071 44 discriminator 13 view .LVU3148 + 9765 0086 0228 cmp r0, #2 + 9766 0088 14BF ite ne + 9767 008a 0020 movne r0, #0 + 9768 008c 0120 moveq r0, #1 + 9769 008e CFE7 b .L649 + 9770 .LVL795: + 9771 .L642: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9772 .loc 1 1071 7 discriminator 14 view .LVU3149 + 9773 0090 90F84300 ldrb r0, [r0, #67] @ zero_extendqisi2 + 9774 .LVL796: +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 355 + + + 9775 .loc 1 1071 7 discriminator 14 view .LVU3150 + 9776 0094 C0B2 uxtb r0, r0 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9777 .loc 1 1071 44 discriminator 14 view .LVU3151 + 9778 0096 0228 cmp r0, #2 + 9779 0098 14BF ite ne + 9780 009a 0020 movne r0, #0 + 9781 009c 0120 moveq r0, #1 + 9782 009e C7E7 b .L649 + 9783 .L657: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9784 .loc 1 1075 12 discriminator 1 view .LVU3152 + 9785 00a0 95F83E20 ldrb r2, [r5, #62] @ zero_extendqisi2 + 9786 00a4 D2B2 uxtb r2, r2 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9787 .loc 1 1075 49 discriminator 1 view .LVU3153 + 9788 00a6 012A cmp r2, #1 + 9789 00a8 14BF ite ne + 9790 00aa 0022 movne r2, #0 + 9791 00ac 0122 moveq r2, #1 + 9792 .L658: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9793 .loc 1 1075 11 discriminator 20 view .LVU3154 + 9794 00ae 002A cmp r2, #0 + 9795 00b0 00F01481 beq .L677 +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9796 .loc 1 1077 5 is_stmt 1 view .LVU3155 +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9797 .loc 1 1077 8 is_stmt 0 view .LVU3156 + 9798 00b4 0029 cmp r1, #0 + 9799 00b6 00F01381 beq .L678 +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9800 .loc 1 1077 25 discriminator 1 view .LVU3157 + 9801 00ba 002B cmp r3, #0 + 9802 00bc 00F01281 beq .L679 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9803 .loc 1 1083 7 is_stmt 1 view .LVU3158 + 9804 00c0 102C cmp r4, #16 + 9805 00c2 00F2D980 bhi .L659 + 9806 00c6 DFE814F0 tbh [pc, r4, lsl #1] + 9807 .L661: + 9808 00ca 3900 .2byte (.L665-.L661)/2 + 9809 00cc D700 .2byte (.L659-.L661)/2 + 9810 00ce D700 .2byte (.L659-.L661)/2 + 9811 00d0 D700 .2byte (.L659-.L661)/2 + 9812 00d2 8700 .2byte (.L664-.L661)/2 + 9813 00d4 D700 .2byte (.L659-.L661)/2 + 9814 00d6 D700 .2byte (.L659-.L661)/2 + 9815 00d8 D700 .2byte (.L659-.L661)/2 + 9816 00da A000 .2byte (.L663-.L661)/2 + 9817 00dc D700 .2byte (.L659-.L661)/2 + 9818 00de D700 .2byte (.L659-.L661)/2 + 9819 00e0 D700 .2byte (.L659-.L661)/2 + 9820 00e2 B900 .2byte (.L662-.L661)/2 + 9821 00e4 D700 .2byte (.L659-.L661)/2 + 9822 00e6 D700 .2byte (.L659-.L661)/2 + 9823 00e8 D700 .2byte (.L659-.L661)/2 + ARM GAS /tmp/cc0aF2h1.s page 356 + + + 9824 00ea D200 .2byte (.L660-.L661)/2 + 9825 .p2align 1 + 9826 .L656: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9827 .loc 1 1075 12 is_stmt 0 discriminator 4 view .LVU3159 + 9828 00ec 95F83F20 ldrb r2, [r5, #63] @ zero_extendqisi2 + 9829 00f0 D2B2 uxtb r2, r2 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9830 .loc 1 1075 49 discriminator 4 view .LVU3160 + 9831 00f2 012A cmp r2, #1 + 9832 00f4 14BF ite ne + 9833 00f6 0022 movne r2, #0 + 9834 00f8 0122 moveq r2, #1 + 9835 00fa D8E7 b .L658 + 9836 .L655: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9837 .loc 1 1075 12 discriminator 7 view .LVU3161 + 9838 00fc 95F84020 ldrb r2, [r5, #64] @ zero_extendqisi2 + 9839 0100 D2B2 uxtb r2, r2 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9840 .loc 1 1075 49 discriminator 7 view .LVU3162 + 9841 0102 012A cmp r2, #1 + 9842 0104 14BF ite ne + 9843 0106 0022 movne r2, #0 + 9844 0108 0122 moveq r2, #1 + 9845 010a D0E7 b .L658 + 9846 .L654: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9847 .loc 1 1075 12 discriminator 10 view .LVU3163 + 9848 010c 95F84120 ldrb r2, [r5, #65] @ zero_extendqisi2 + 9849 0110 D2B2 uxtb r2, r2 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9850 .loc 1 1075 49 discriminator 10 view .LVU3164 + 9851 0112 012A cmp r2, #1 + 9852 0114 14BF ite ne + 9853 0116 0022 movne r2, #0 + 9854 0118 0122 moveq r2, #1 + 9855 011a C8E7 b .L658 + 9856 .L652: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9857 .loc 1 1075 12 discriminator 13 view .LVU3165 + 9858 011c 95F84220 ldrb r2, [r5, #66] @ zero_extendqisi2 + 9859 0120 D2B2 uxtb r2, r2 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9860 .loc 1 1075 49 discriminator 13 view .LVU3166 + 9861 0122 012A cmp r2, #1 + 9862 0124 14BF ite ne + 9863 0126 0022 movne r2, #0 + 9864 0128 0122 moveq r2, #1 + 9865 012a C0E7 b .L658 + 9866 .L651: +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9867 .loc 1 1075 12 discriminator 14 view .LVU3167 + 9868 012c 95F84320 ldrb r2, [r5, #67] @ zero_extendqisi2 + 9869 0130 D2B2 uxtb r2, r2 +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9870 .loc 1 1075 49 discriminator 14 view .LVU3168 + ARM GAS /tmp/cc0aF2h1.s page 357 + + + 9871 0132 012A cmp r2, #1 + 9872 0134 14BF ite ne + 9873 0136 0022 movne r2, #0 + 9874 0138 0122 moveq r2, #1 + 9875 013a B8E7 b .L658 + 9876 .L665: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9877 .loc 1 1083 7 discriminator 1 view .LVU3169 + 9878 013c 0222 movs r2, #2 + 9879 013e 85F83E20 strb r2, [r5, #62] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9880 .loc 1 1091 3 is_stmt 1 view .LVU3170 + 9881 .L666: +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9882 .loc 1 1096 7 view .LVU3171 +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9883 .loc 1 1096 17 is_stmt 0 view .LVU3172 + 9884 0142 6A6A ldr r2, [r5, #36] +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9885 .loc 1 1096 52 view .LVU3173 + 9886 0144 6F48 ldr r0, .L692 + 9887 0146 9062 str r0, [r2, #40] +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9888 .loc 1 1097 7 is_stmt 1 view .LVU3174 +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9889 .loc 1 1097 17 is_stmt 0 view .LVU3175 + 9890 0148 6A6A ldr r2, [r5, #36] +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9891 .loc 1 1097 56 view .LVU3176 + 9892 014a 6F48 ldr r0, .L692+4 + 9893 014c D062 str r0, [r2, #44] +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9894 .loc 1 1100 7 is_stmt 1 view .LVU3177 +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9895 .loc 1 1100 17 is_stmt 0 view .LVU3178 + 9896 014e 6A6A ldr r2, [r5, #36] +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9897 .loc 1 1100 53 view .LVU3179 + 9898 0150 6E48 ldr r0, .L692+8 + 9899 0152 1063 str r0, [r2, #48] +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 9900 .loc 1 1103 7 is_stmt 1 view .LVU3180 +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 9901 .loc 1 1103 88 is_stmt 0 view .LVU3181 + 9902 0154 2A68 ldr r2, [r5] +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 9903 .loc 1 1103 11 view .LVU3182 + 9904 0156 3432 adds r2, r2, #52 + 9905 0158 686A ldr r0, [r5, #36] + 9906 015a FFF7FEFF bl HAL_DMA_Start_IT + 9907 .LVL797: +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 9908 .loc 1 1103 10 discriminator 1 view .LVU3183 + 9909 015e 0028 cmp r0, #0 + 9910 0160 40F0C480 bne .L681 +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 9911 .loc 1 1111 7 is_stmt 1 view .LVU3184 + ARM GAS /tmp/cc0aF2h1.s page 358 + + + 9912 0164 2A68 ldr r2, [r5] + 9913 0166 D368 ldr r3, [r2, #12] + 9914 0168 43F40073 orr r3, r3, #512 + 9915 016c D360 str r3, [r2, #12] +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9916 .loc 1 1112 7 view .LVU3185 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9917 .loc 1 1184 3 view .LVU3186 + 9918 .L671: +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9919 .loc 1 1187 5 view .LVU3187 + 9920 016e 0122 movs r2, #1 + 9921 0170 2146 mov r1, r4 + 9922 0172 2868 ldr r0, [r5] + 9923 0174 FFF7FEFF bl TIM_CCxChannelCmd + 9924 .LVL798: +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9925 .loc 1 1189 5 view .LVU3188 +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9926 .loc 1 1189 9 is_stmt 0 view .LVU3189 + 9927 0178 2B68 ldr r3, [r5] + 9928 017a 654A ldr r2, .L692+12 + 9929 017c 9342 cmp r3, r2 + 9930 017e 0BD0 beq .L672 +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9931 .loc 1 1189 9 discriminator 2 view .LVU3190 + 9932 0180 02F5A052 add r2, r2, #5120 + 9933 0184 9342 cmp r3, r2 + 9934 0186 07D0 beq .L672 +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9935 .loc 1 1189 9 discriminator 4 view .LVU3191 + 9936 0188 02F58062 add r2, r2, #1024 + 9937 018c 9342 cmp r3, r2 + 9938 018e 03D0 beq .L672 +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9939 .loc 1 1189 9 discriminator 6 view .LVU3192 + 9940 0190 02F58062 add r2, r2, #1024 + 9941 0194 9342 cmp r3, r2 + 9942 0196 03D1 bne .L673 + 9943 .L672: +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9944 .loc 1 1192 7 is_stmt 1 view .LVU3193 + 9945 0198 5A6C ldr r2, [r3, #68] + 9946 019a 42F40042 orr r2, r2, #32768 + 9947 019e 5A64 str r2, [r3, #68] + 9948 .L673: +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9949 .loc 1 1196 5 view .LVU3194 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9950 .loc 1 1196 9 is_stmt 0 view .LVU3195 + 9951 01a0 2B68 ldr r3, [r5] +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9952 .loc 1 1196 8 view .LVU3196 + 9953 01a2 5B4A ldr r2, .L692+12 + 9954 01a4 9342 cmp r3, r2 + 9955 01a6 00F08980 beq .L674 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 359 + + + 9956 .loc 1 1196 9 discriminator 1 view .LVU3197 + 9957 01aa B3F1804F cmp r3, #1073741824 + 9958 01ae 00F08580 beq .L674 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9959 .loc 1 1196 9 discriminator 2 view .LVU3198 + 9960 01b2 A2F59432 sub r2, r2, #75776 + 9961 01b6 9342 cmp r3, r2 + 9962 01b8 00F08080 beq .L674 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9963 .loc 1 1196 9 discriminator 3 view .LVU3199 + 9964 01bc 02F58062 add r2, r2, #1024 + 9965 01c0 9342 cmp r3, r2 + 9966 01c2 7BD0 beq .L674 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9967 .loc 1 1196 9 discriminator 4 view .LVU3200 + 9968 01c4 02F59C32 add r2, r2, #79872 + 9969 01c8 9342 cmp r3, r2 + 9970 01ca 77D0 beq .L674 +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9971 .loc 1 1206 7 is_stmt 1 view .LVU3201 + 9972 01cc 1A68 ldr r2, [r3] + 9973 01ce 42F00102 orr r2, r2, #1 + 9974 01d2 1A60 str r2, [r3] + 9975 01d4 0020 movs r0, #0 + 9976 01d6 82E0 b .L650 + 9977 .LVL799: + 9978 .L664: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 9979 .loc 1 1083 7 is_stmt 0 discriminator 3 view .LVU3202 + 9980 01d8 0222 movs r2, #2 + 9981 01da 85F83F20 strb r2, [r5, #63] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 9982 .loc 1 1091 3 is_stmt 1 view .LVU3203 + 9983 .L667: +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9984 .loc 1 1118 7 view .LVU3204 +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9985 .loc 1 1118 17 is_stmt 0 view .LVU3205 + 9986 01de AA6A ldr r2, [r5, #40] +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9987 .loc 1 1118 52 view .LVU3206 + 9988 01e0 4848 ldr r0, .L692 + 9989 01e2 9062 str r0, [r2, #40] +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9990 .loc 1 1119 7 is_stmt 1 view .LVU3207 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9991 .loc 1 1119 17 is_stmt 0 view .LVU3208 + 9992 01e4 AA6A ldr r2, [r5, #40] +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9993 .loc 1 1119 56 view .LVU3209 + 9994 01e6 4848 ldr r0, .L692+4 + 9995 01e8 D062 str r0, [r2, #44] +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9996 .loc 1 1122 7 is_stmt 1 view .LVU3210 +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9997 .loc 1 1122 17 is_stmt 0 view .LVU3211 + 9998 01ea AA6A ldr r2, [r5, #40] + ARM GAS /tmp/cc0aF2h1.s page 360 + + +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 9999 .loc 1 1122 53 view .LVU3212 + 10000 01ec 4748 ldr r0, .L692+8 + 10001 01ee 1063 str r0, [r2, #48] +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10002 .loc 1 1125 7 is_stmt 1 view .LVU3213 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10003 .loc 1 1125 88 is_stmt 0 view .LVU3214 + 10004 01f0 2A68 ldr r2, [r5] +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10005 .loc 1 1125 11 view .LVU3215 + 10006 01f2 3832 adds r2, r2, #56 + 10007 01f4 A86A ldr r0, [r5, #40] + 10008 01f6 FFF7FEFF bl HAL_DMA_Start_IT + 10009 .LVL800: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10010 .loc 1 1125 10 discriminator 1 view .LVU3216 + 10011 01fa 0028 cmp r0, #0 + 10012 01fc 78D1 bne .L682 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10013 .loc 1 1133 7 is_stmt 1 view .LVU3217 + 10014 01fe 2A68 ldr r2, [r5] + 10015 0200 D368 ldr r3, [r2, #12] + 10016 0202 43F48063 orr r3, r3, #1024 + 10017 0206 D360 str r3, [r2, #12] +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10018 .loc 1 1134 7 view .LVU3218 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10019 .loc 1 1184 3 view .LVU3219 + 10020 0208 B1E7 b .L671 + 10021 .LVL801: + 10022 .L663: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10023 .loc 1 1083 7 is_stmt 0 discriminator 6 view .LVU3220 + 10024 020a 0222 movs r2, #2 + 10025 020c 85F84020 strb r2, [r5, #64] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10026 .loc 1 1091 3 is_stmt 1 view .LVU3221 + 10027 .L668: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10028 .loc 1 1140 7 view .LVU3222 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10029 .loc 1 1140 17 is_stmt 0 view .LVU3223 + 10030 0210 EA6A ldr r2, [r5, #44] +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10031 .loc 1 1140 52 view .LVU3224 + 10032 0212 3C48 ldr r0, .L692 + 10033 0214 9062 str r0, [r2, #40] +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10034 .loc 1 1141 7 is_stmt 1 view .LVU3225 +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10035 .loc 1 1141 17 is_stmt 0 view .LVU3226 + 10036 0216 EA6A ldr r2, [r5, #44] +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10037 .loc 1 1141 56 view .LVU3227 + 10038 0218 3B48 ldr r0, .L692+4 + 10039 021a D062 str r0, [r2, #44] + ARM GAS /tmp/cc0aF2h1.s page 361 + + +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10040 .loc 1 1144 7 is_stmt 1 view .LVU3228 +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10041 .loc 1 1144 17 is_stmt 0 view .LVU3229 + 10042 021c EA6A ldr r2, [r5, #44] +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10043 .loc 1 1144 53 view .LVU3230 + 10044 021e 3B48 ldr r0, .L692+8 + 10045 0220 1063 str r0, [r2, #48] +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10046 .loc 1 1147 7 is_stmt 1 view .LVU3231 +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10047 .loc 1 1147 88 is_stmt 0 view .LVU3232 + 10048 0222 2A68 ldr r2, [r5] +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10049 .loc 1 1147 11 view .LVU3233 + 10050 0224 3C32 adds r2, r2, #60 + 10051 0226 E86A ldr r0, [r5, #44] + 10052 0228 FFF7FEFF bl HAL_DMA_Start_IT + 10053 .LVL802: +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10054 .loc 1 1147 10 discriminator 1 view .LVU3234 + 10055 022c 0028 cmp r0, #0 + 10056 022e 61D1 bne .L683 +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10057 .loc 1 1154 7 is_stmt 1 view .LVU3235 + 10058 0230 2A68 ldr r2, [r5] + 10059 0232 D368 ldr r3, [r2, #12] + 10060 0234 43F40063 orr r3, r3, #2048 + 10061 0238 D360 str r3, [r2, #12] +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10062 .loc 1 1155 7 view .LVU3236 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10063 .loc 1 1184 3 view .LVU3237 + 10064 023a 98E7 b .L671 + 10065 .LVL803: + 10066 .L662: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10067 .loc 1 1083 7 is_stmt 0 discriminator 9 view .LVU3238 + 10068 023c 0222 movs r2, #2 + 10069 023e 85F84120 strb r2, [r5, #65] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10070 .loc 1 1091 3 is_stmt 1 view .LVU3239 + 10071 .L669: +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10072 .loc 1 1161 7 view .LVU3240 +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10073 .loc 1 1161 17 is_stmt 0 view .LVU3241 + 10074 0242 2A6B ldr r2, [r5, #48] +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10075 .loc 1 1161 52 view .LVU3242 + 10076 0244 2F48 ldr r0, .L692 + 10077 0246 9062 str r0, [r2, #40] +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10078 .loc 1 1162 7 is_stmt 1 view .LVU3243 +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10079 .loc 1 1162 17 is_stmt 0 view .LVU3244 + ARM GAS /tmp/cc0aF2h1.s page 362 + + + 10080 0248 2A6B ldr r2, [r5, #48] +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10081 .loc 1 1162 56 view .LVU3245 + 10082 024a 2F48 ldr r0, .L692+4 + 10083 024c D062 str r0, [r2, #44] +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10084 .loc 1 1165 7 is_stmt 1 view .LVU3246 +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10085 .loc 1 1165 17 is_stmt 0 view .LVU3247 + 10086 024e 2A6B ldr r2, [r5, #48] +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10087 .loc 1 1165 53 view .LVU3248 + 10088 0250 2E48 ldr r0, .L692+8 + 10089 0252 1063 str r0, [r2, #48] +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10090 .loc 1 1168 7 is_stmt 1 view .LVU3249 +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10091 .loc 1 1168 88 is_stmt 0 view .LVU3250 + 10092 0254 2A68 ldr r2, [r5] +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10093 .loc 1 1168 11 view .LVU3251 + 10094 0256 4032 adds r2, r2, #64 + 10095 0258 286B ldr r0, [r5, #48] + 10096 025a FFF7FEFF bl HAL_DMA_Start_IT + 10097 .LVL804: +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 10098 .loc 1 1168 10 discriminator 1 view .LVU3252 + 10099 025e 0028 cmp r0, #0 + 10100 0260 4AD1 bne .L684 +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10101 .loc 1 1175 7 is_stmt 1 view .LVU3253 + 10102 0262 2A68 ldr r2, [r5] + 10103 0264 D368 ldr r3, [r2, #12] + 10104 0266 43F48053 orr r3, r3, #4096 + 10105 026a D360 str r3, [r2, #12] +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10106 .loc 1 1176 7 view .LVU3254 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10107 .loc 1 1184 3 view .LVU3255 + 10108 026c 7FE7 b .L671 + 10109 .LVL805: + 10110 .L660: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10111 .loc 1 1083 7 is_stmt 0 discriminator 12 view .LVU3256 + 10112 026e 0223 movs r3, #2 + 10113 .LVL806: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10114 .loc 1 1083 7 discriminator 12 view .LVU3257 + 10115 0270 85F84230 strb r3, [r5, #66] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10116 .loc 1 1091 3 is_stmt 1 view .LVU3258 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10117 .loc 1 1083 7 is_stmt 0 discriminator 12 view .LVU3259 + 10118 0274 0120 movs r0, #1 + 10119 0276 32E0 b .L650 + 10120 .LVL807: + 10121 .L659: + ARM GAS /tmp/cc0aF2h1.s page 363 + + +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10122 .loc 1 1083 7 discriminator 13 view .LVU3260 + 10123 0278 0222 movs r2, #2 + 10124 027a 85F84320 strb r2, [r5, #67] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10125 .loc 1 1091 3 is_stmt 1 view .LVU3261 + 10126 027e 0C2C cmp r4, #12 + 10127 0280 32D8 bhi .L680 + 10128 0282 01A2 adr r2, .L670 + 10129 0284 52F824F0 ldr pc, [r2, r4, lsl #2] + 10130 .p2align 2 + 10131 .L670: + 10132 0288 43010000 .word .L666+1 + 10133 028c E9020000 .word .L680+1 + 10134 0290 E9020000 .word .L680+1 + 10135 0294 E9020000 .word .L680+1 + 10136 0298 DF010000 .word .L667+1 + 10137 029c E9020000 .word .L680+1 + 10138 02a0 E9020000 .word .L680+1 + 10139 02a4 E9020000 .word .L680+1 + 10140 02a8 11020000 .word .L668+1 + 10141 02ac E9020000 .word .L680+1 + 10142 02b0 E9020000 .word .L680+1 + 10143 02b4 E9020000 .word .L680+1 + 10144 02b8 43020000 .word .L669+1 + 10145 .LVL808: + 10146 .p2align 1 + 10147 .L674: +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10148 .loc 1 1198 7 view .LVU3262 +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10149 .loc 1 1198 31 is_stmt 0 view .LVU3263 + 10150 02bc 9968 ldr r1, [r3, #8] +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10151 .loc 1 1198 15 view .LVU3264 + 10152 02be 154A ldr r2, .L692+16 + 10153 02c0 0A40 ands r2, r2, r1 + 10154 .LVL809: +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10155 .loc 1 1199 7 is_stmt 1 view .LVU3265 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10156 .loc 1 1199 10 is_stmt 0 view .LVU3266 + 10157 02c2 062A cmp r2, #6 + 10158 02c4 1AD0 beq .L685 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10159 .loc 1 1199 11 discriminator 1 view .LVU3267 + 10160 02c6 B2F5803F cmp r2, #65536 + 10161 02ca 19D0 beq .L686 +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10162 .loc 1 1201 9 is_stmt 1 view .LVU3268 + 10163 02cc 1A68 ldr r2, [r3] + 10164 .LVL810: +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10165 .loc 1 1201 9 is_stmt 0 view .LVU3269 + 10166 02ce 42F00102 orr r2, r2, #1 + 10167 02d2 1A60 str r2, [r3] + 10168 02d4 0020 movs r0, #0 + ARM GAS /tmp/cc0aF2h1.s page 364 + + + 10169 02d6 02E0 b .L650 + 10170 .LVL811: + 10171 .L676: +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10172 .loc 1 1073 12 view .LVU3270 + 10173 02d8 0220 movs r0, #2 + 10174 02da 00E0 b .L650 + 10175 .L677: +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10176 .loc 1 1088 12 view .LVU3271 + 10177 02dc 0120 movs r0, #1 + 10178 .LVL812: + 10179 .L650: +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10180 .loc 1 1212 1 view .LVU3272 + 10181 02de 38BD pop {r3, r4, r5, pc} + 10182 .LVL813: + 10183 .L678: +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10184 .loc 1 1079 14 view .LVU3273 + 10185 02e0 0120 movs r0, #1 + 10186 02e2 FCE7 b .L650 + 10187 .L679: + 10188 02e4 0120 movs r0, #1 + 10189 02e6 FAE7 b .L650 + 10190 .L680: +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10191 .loc 1 1091 3 view .LVU3274 + 10192 02e8 0120 movs r0, #1 + 10193 02ea F8E7 b .L650 + 10194 .LVL814: + 10195 .L681: +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10196 .loc 1 1107 16 view .LVU3275 + 10197 02ec 0120 movs r0, #1 + 10198 02ee F6E7 b .L650 + 10199 .L682: +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10200 .loc 1 1129 16 view .LVU3276 + 10201 02f0 0120 movs r0, #1 + 10202 02f2 F4E7 b .L650 + 10203 .L683: +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10204 .loc 1 1151 16 view .LVU3277 + 10205 02f4 0120 movs r0, #1 + 10206 02f6 F2E7 b .L650 + 10207 .L684: +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10208 .loc 1 1172 16 view .LVU3278 + 10209 02f8 0120 movs r0, #1 + 10210 02fa F0E7 b .L650 + 10211 .LVL815: + 10212 .L685: +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10213 .loc 1 1172 16 view .LVU3279 + 10214 02fc 0020 movs r0, #0 + 10215 02fe EEE7 b .L650 + ARM GAS /tmp/cc0aF2h1.s page 365 + + + 10216 .L686: + 10217 0300 0020 movs r0, #0 + 10218 0302 ECE7 b .L650 + 10219 .L693: + 10220 .align 2 + 10221 .L692: + 10222 0304 00000000 .word TIM_DMADelayPulseCplt + 10223 0308 00000000 .word TIM_DMADelayPulseHalfCplt + 10224 030c 00000000 .word TIM_DMAError + 10225 0310 002C0140 .word 1073818624 + 10226 0314 07000100 .word 65543 + 10227 .cfi_endproc + 10228 .LFE148: + 10230 .section .text.HAL_TIM_OC_Stop_DMA,"ax",%progbits + 10231 .align 1 + 10232 .global HAL_TIM_OC_Stop_DMA + 10233 .syntax unified + 10234 .thumb + 10235 .thumb_func + 10237 HAL_TIM_OC_Stop_DMA: + 10238 .LVL816: + 10239 .LFB149: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10240 .loc 1 1226 1 is_stmt 1 view -0 + 10241 .cfi_startproc + 10242 @ args = 0, pretend = 0, frame = 0 + 10243 @ frame_needed = 0, uses_anonymous_args = 0 +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10244 .loc 1 1226 1 is_stmt 0 view .LVU3281 + 10245 0000 38B5 push {r3, r4, r5, lr} + 10246 .cfi_def_cfa_offset 16 + 10247 .cfi_offset 3, -16 + 10248 .cfi_offset 4, -12 + 10249 .cfi_offset 5, -8 + 10250 .cfi_offset 14, -4 + 10251 0002 0446 mov r4, r0 + 10252 0004 0D46 mov r5, r1 +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10253 .loc 1 1227 3 is_stmt 1 view .LVU3282 + 10254 .LVL817: +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10255 .loc 1 1230 3 view .LVU3283 +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10256 .loc 1 1232 3 view .LVU3284 + 10257 0006 0C29 cmp r1, #12 + 10258 0008 00F28A80 bhi .L712 + 10259 000c DFE801F0 tbb [pc, r1] + 10260 .L697: + 10261 0010 07 .byte (.L700-.L697)/2 + 10262 0011 88 .byte (.L712-.L697)/2 + 10263 0012 88 .byte (.L712-.L697)/2 + 10264 0013 88 .byte (.L712-.L697)/2 + 10265 0014 40 .byte (.L699-.L697)/2 + 10266 0015 88 .byte (.L712-.L697)/2 + 10267 0016 88 .byte (.L712-.L697)/2 + 10268 0017 88 .byte (.L712-.L697)/2 + 10269 0018 49 .byte (.L698-.L697)/2 + ARM GAS /tmp/cc0aF2h1.s page 366 + + + 10270 0019 88 .byte (.L712-.L697)/2 + 10271 001a 88 .byte (.L712-.L697)/2 + 10272 001b 88 .byte (.L712-.L697)/2 + 10273 001c 52 .byte (.L696-.L697)/2 + 10274 001d 00 .p2align 1 + 10275 .L700: +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 10276 .loc 1 1237 7 view .LVU3285 + 10277 001e 0268 ldr r2, [r0] + 10278 0020 D368 ldr r3, [r2, #12] + 10279 0022 23F40073 bic r3, r3, #512 + 10280 0026 D360 str r3, [r2, #12] +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10281 .loc 1 1238 7 view .LVU3286 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10282 .loc 1 1238 13 is_stmt 0 view .LVU3287 + 10283 0028 406A ldr r0, [r0, #36] + 10284 .LVL818: +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10285 .loc 1 1238 13 view .LVU3288 + 10286 002a FFF7FEFF bl HAL_DMA_Abort_IT + 10287 .LVL819: +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10288 .loc 1 1239 7 is_stmt 1 view .LVU3289 +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10289 .loc 1 1271 3 view .LVU3290 + 10290 .L701: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10291 .loc 1 1274 5 view .LVU3291 + 10292 002e 0022 movs r2, #0 + 10293 0030 2946 mov r1, r5 + 10294 0032 2068 ldr r0, [r4] + 10295 0034 FFF7FEFF bl TIM_CCxChannelCmd + 10296 .LVL820: +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10297 .loc 1 1276 5 view .LVU3292 +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10298 .loc 1 1276 9 is_stmt 0 view .LVU3293 + 10299 0038 2368 ldr r3, [r4] + 10300 003a 3A4A ldr r2, .L714 + 10301 003c 9342 cmp r3, r2 + 10302 003e 42D0 beq .L702 +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10303 .loc 1 1276 9 discriminator 2 view .LVU3294 + 10304 0040 02F5A052 add r2, r2, #5120 + 10305 0044 9342 cmp r3, r2 + 10306 0046 3ED0 beq .L702 +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10307 .loc 1 1276 9 discriminator 4 view .LVU3295 + 10308 0048 02F58062 add r2, r2, #1024 + 10309 004c 9342 cmp r3, r2 + 10310 004e 3AD0 beq .L702 +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10311 .loc 1 1276 9 discriminator 6 view .LVU3296 + 10312 0050 02F58062 add r2, r2, #1024 + 10313 0054 9342 cmp r3, r2 + 10314 0056 36D0 beq .L702 + ARM GAS /tmp/cc0aF2h1.s page 367 + + + 10315 .L703: +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10316 .loc 1 1279 7 is_stmt 1 discriminator 5 view .LVU3297 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10317 .loc 1 1283 5 view .LVU3298 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10318 .loc 1 1283 5 view .LVU3299 + 10319 0058 2368 ldr r3, [r4] + 10320 005a 196A ldr r1, [r3, #32] + 10321 005c 41F21112 movw r2, #4369 + 10322 0060 1142 tst r1, r2 + 10323 0062 08D1 bne .L704 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10324 .loc 1 1283 5 discriminator 1 view .LVU3300 + 10325 0064 196A ldr r1, [r3, #32] + 10326 0066 40F24442 movw r2, #1092 + 10327 006a 1142 tst r1, r2 + 10328 006c 03D1 bne .L704 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10329 .loc 1 1283 5 discriminator 3 view .LVU3301 + 10330 006e 1A68 ldr r2, [r3] + 10331 0070 22F00102 bic r2, r2, #1 + 10332 0074 1A60 str r2, [r3] + 10333 .L704: +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10334 .loc 1 1283 5 discriminator 5 view .LVU3302 +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10335 .loc 1 1286 5 view .LVU3303 + 10336 0076 102D cmp r5, #16 + 10337 0078 4DD8 bhi .L705 + 10338 007a DFE805F0 tbb [pc, r5] + 10339 .L707: + 10340 007e 33 .byte (.L711-.L707)/2 + 10341 007f 4C .byte (.L705-.L707)/2 + 10342 0080 4C .byte (.L705-.L707)/2 + 10343 0081 4C .byte (.L705-.L707)/2 + 10344 0082 38 .byte (.L710-.L707)/2 + 10345 0083 4C .byte (.L705-.L707)/2 + 10346 0084 4C .byte (.L705-.L707)/2 + 10347 0085 4C .byte (.L705-.L707)/2 + 10348 0086 3D .byte (.L709-.L707)/2 + 10349 0087 4C .byte (.L705-.L707)/2 + 10350 0088 4C .byte (.L705-.L707)/2 + 10351 0089 4C .byte (.L705-.L707)/2 + 10352 008a 42 .byte (.L708-.L707)/2 + 10353 008b 4C .byte (.L705-.L707)/2 + 10354 008c 4C .byte (.L705-.L707)/2 + 10355 008d 4C .byte (.L705-.L707)/2 + 10356 008e 47 .byte (.L706-.L707)/2 + 10357 .LVL821: + 10358 008f 00 .p2align 1 + 10359 .L699: +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 10360 .loc 1 1245 7 view .LVU3304 + 10361 0090 0268 ldr r2, [r0] + 10362 0092 D368 ldr r3, [r2, #12] + 10363 0094 23F48063 bic r3, r3, #1024 + ARM GAS /tmp/cc0aF2h1.s page 368 + + + 10364 0098 D360 str r3, [r2, #12] +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10365 .loc 1 1246 7 view .LVU3305 +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10366 .loc 1 1246 13 is_stmt 0 view .LVU3306 + 10367 009a 806A ldr r0, [r0, #40] + 10368 .LVL822: +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10369 .loc 1 1246 13 view .LVU3307 + 10370 009c FFF7FEFF bl HAL_DMA_Abort_IT + 10371 .LVL823: +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10372 .loc 1 1247 7 is_stmt 1 view .LVU3308 +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10373 .loc 1 1271 3 view .LVU3309 + 10374 00a0 C5E7 b .L701 + 10375 .LVL824: + 10376 .L698: +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 10377 .loc 1 1253 7 view .LVU3310 + 10378 00a2 0268 ldr r2, [r0] + 10379 00a4 D368 ldr r3, [r2, #12] + 10380 00a6 23F40063 bic r3, r3, #2048 + 10381 00aa D360 str r3, [r2, #12] +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10382 .loc 1 1254 7 view .LVU3311 +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10383 .loc 1 1254 13 is_stmt 0 view .LVU3312 + 10384 00ac C06A ldr r0, [r0, #44] + 10385 .LVL825: +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10386 .loc 1 1254 13 view .LVU3313 + 10387 00ae FFF7FEFF bl HAL_DMA_Abort_IT + 10388 .LVL826: +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10389 .loc 1 1255 7 is_stmt 1 view .LVU3314 +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10390 .loc 1 1271 3 view .LVU3315 + 10391 00b2 BCE7 b .L701 + 10392 .LVL827: + 10393 .L696: +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 10394 .loc 1 1261 7 view .LVU3316 + 10395 00b4 0268 ldr r2, [r0] + 10396 00b6 D368 ldr r3, [r2, #12] + 10397 00b8 23F48053 bic r3, r3, #4096 + 10398 00bc D360 str r3, [r2, #12] +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10399 .loc 1 1262 7 view .LVU3317 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10400 .loc 1 1262 13 is_stmt 0 view .LVU3318 + 10401 00be 006B ldr r0, [r0, #48] + 10402 .LVL828: +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 10403 .loc 1 1262 13 view .LVU3319 + 10404 00c0 FFF7FEFF bl HAL_DMA_Abort_IT + 10405 .LVL829: + ARM GAS /tmp/cc0aF2h1.s page 369 + + +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10406 .loc 1 1263 7 is_stmt 1 view .LVU3320 +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10407 .loc 1 1271 3 view .LVU3321 + 10408 00c4 B3E7 b .L701 + 10409 .L702: +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10410 .loc 1 1279 7 view .LVU3322 +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10411 .loc 1 1279 7 view .LVU3323 + 10412 00c6 196A ldr r1, [r3, #32] + 10413 00c8 41F21112 movw r2, #4369 + 10414 00cc 1142 tst r1, r2 + 10415 00ce C3D1 bne .L703 +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10416 .loc 1 1279 7 discriminator 1 view .LVU3324 + 10417 00d0 196A ldr r1, [r3, #32] + 10418 00d2 40F24442 movw r2, #1092 + 10419 00d6 1142 tst r1, r2 + 10420 00d8 BED1 bne .L703 +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10421 .loc 1 1279 7 discriminator 3 view .LVU3325 + 10422 00da 5A6C ldr r2, [r3, #68] + 10423 00dc 22F40042 bic r2, r2, #32768 + 10424 00e0 5A64 str r2, [r3, #68] + 10425 00e2 B9E7 b .L703 + 10426 .L711: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10427 .loc 1 1286 5 is_stmt 0 discriminator 1 view .LVU3326 + 10428 00e4 0123 movs r3, #1 + 10429 00e6 84F83E30 strb r3, [r4, #62] + 10430 00ea 0020 movs r0, #0 + 10431 00ec 19E0 b .L695 + 10432 .L710: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10433 .loc 1 1286 5 discriminator 3 view .LVU3327 + 10434 00ee 0123 movs r3, #1 + 10435 00f0 84F83F30 strb r3, [r4, #63] + 10436 00f4 0020 movs r0, #0 + 10437 00f6 14E0 b .L695 + 10438 .L709: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10439 .loc 1 1286 5 discriminator 6 view .LVU3328 + 10440 00f8 0123 movs r3, #1 + 10441 00fa 84F84030 strb r3, [r4, #64] + 10442 00fe 0020 movs r0, #0 + 10443 0100 0FE0 b .L695 + 10444 .L708: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10445 .loc 1 1286 5 discriminator 9 view .LVU3329 + 10446 0102 0123 movs r3, #1 + 10447 0104 84F84130 strb r3, [r4, #65] + 10448 0108 0020 movs r0, #0 + 10449 010a 0AE0 b .L695 + 10450 .L706: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10451 .loc 1 1286 5 discriminator 12 view .LVU3330 + ARM GAS /tmp/cc0aF2h1.s page 370 + + + 10452 010c 0123 movs r3, #1 + 10453 010e 84F84230 strb r3, [r4, #66] + 10454 0112 0020 movs r0, #0 + 10455 0114 05E0 b .L695 + 10456 .L705: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10457 .loc 1 1286 5 discriminator 13 view .LVU3331 + 10458 0116 0123 movs r3, #1 + 10459 0118 84F84330 strb r3, [r4, #67] + 10460 011c 0020 movs r0, #0 + 10461 011e 00E0 b .L695 + 10462 .LVL830: + 10463 .L712: +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10464 .loc 1 1232 3 view .LVU3332 + 10465 0120 0120 movs r0, #1 + 10466 .LVL831: + 10467 .L695: +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10468 .loc 1 1290 3 is_stmt 1 view .LVU3333 +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10469 .loc 1 1291 1 is_stmt 0 view .LVU3334 + 10470 0122 38BD pop {r3, r4, r5, pc} + 10471 .LVL832: + 10472 .L715: +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10473 .loc 1 1291 1 view .LVU3335 + 10474 .align 2 + 10475 .L714: + 10476 0124 002C0140 .word 1073818624 + 10477 .cfi_endproc + 10478 .LFE149: + 10480 .section .text.HAL_TIM_PWM_Start,"ax",%progbits + 10481 .align 1 + 10482 .global HAL_TIM_PWM_Start + 10483 .syntax unified + 10484 .thumb + 10485 .thumb_func + 10487 HAL_TIM_PWM_Start: + 10488 .LVL833: + 10489 .LFB154: +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 10490 .loc 1 1471 1 is_stmt 1 view -0 + 10491 .cfi_startproc + 10492 @ args = 0, pretend = 0, frame = 0 + 10493 @ frame_needed = 0, uses_anonymous_args = 0 +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 10494 .loc 1 1471 1 is_stmt 0 view .LVU3337 + 10495 0000 10B5 push {r4, lr} + 10496 .cfi_def_cfa_offset 8 + 10497 .cfi_offset 4, -8 + 10498 .cfi_offset 14, -4 + 10499 0002 0446 mov r4, r0 +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10500 .loc 1 1472 3 is_stmt 1 view .LVU3338 +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10501 .loc 1 1475 3 view .LVU3339 + ARM GAS /tmp/cc0aF2h1.s page 371 + + +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10502 .loc 1 1478 3 view .LVU3340 + 10503 0004 1029 cmp r1, #16 + 10504 0006 3CD8 bhi .L717 + 10505 0008 DFE801F0 tbb [pc, r1] + 10506 .L719: + 10507 000c 09 .byte (.L723-.L719)/2 + 10508 000d 3B .byte (.L717-.L719)/2 + 10509 000e 3B .byte (.L717-.L719)/2 + 10510 000f 3B .byte (.L717-.L719)/2 + 10511 0010 1F .byte (.L722-.L719)/2 + 10512 0011 3B .byte (.L717-.L719)/2 + 10513 0012 3B .byte (.L717-.L719)/2 + 10514 0013 3B .byte (.L717-.L719)/2 + 10515 0014 26 .byte (.L721-.L719)/2 + 10516 0015 3B .byte (.L717-.L719)/2 + 10517 0016 3B .byte (.L717-.L719)/2 + 10518 0017 3B .byte (.L717-.L719)/2 + 10519 0018 2D .byte (.L720-.L719)/2 + 10520 0019 3B .byte (.L717-.L719)/2 + 10521 001a 3B .byte (.L717-.L719)/2 + 10522 001b 3B .byte (.L717-.L719)/2 + 10523 001c 34 .byte (.L718-.L719)/2 + 10524 001d 00 .p2align 1 + 10525 .L723: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10526 .loc 1 1478 7 is_stmt 0 discriminator 1 view .LVU3341 + 10527 001e 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 10528 0022 DBB2 uxtb r3, r3 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10529 .loc 1 1478 44 discriminator 1 view .LVU3342 + 10530 0024 013B subs r3, r3, #1 + 10531 0026 18BF it ne + 10532 0028 0123 movne r3, #1 + 10533 .L724: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10534 .loc 1 1478 6 discriminator 20 view .LVU3343 + 10535 002a 002B cmp r3, #0 + 10536 002c 40F08680 bne .L738 +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10537 .loc 1 1484 3 is_stmt 1 view .LVU3344 + 10538 0030 1029 cmp r1, #16 + 10539 0032 71D8 bhi .L726 + 10540 0034 DFE801F0 tbb [pc, r1] + 10541 .L728: + 10542 0038 2C .byte (.L732-.L728)/2 + 10543 0039 70 .byte (.L726-.L728)/2 + 10544 003a 70 .byte (.L726-.L728)/2 + 10545 003b 70 .byte (.L726-.L728)/2 + 10546 003c 60 .byte (.L731-.L728)/2 + 10547 003d 70 .byte (.L726-.L728)/2 + 10548 003e 70 .byte (.L726-.L728)/2 + 10549 003f 70 .byte (.L726-.L728)/2 + 10550 0040 64 .byte (.L730-.L728)/2 + 10551 0041 70 .byte (.L726-.L728)/2 + 10552 0042 70 .byte (.L726-.L728)/2 + 10553 0043 70 .byte (.L726-.L728)/2 + ARM GAS /tmp/cc0aF2h1.s page 372 + + + 10554 0044 68 .byte (.L729-.L728)/2 + 10555 0045 70 .byte (.L726-.L728)/2 + 10556 0046 70 .byte (.L726-.L728)/2 + 10557 0047 70 .byte (.L726-.L728)/2 + 10558 0048 6C .byte (.L727-.L728)/2 + 10559 0049 00 .p2align 1 + 10560 .L722: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10561 .loc 1 1478 7 is_stmt 0 discriminator 4 view .LVU3345 + 10562 004a 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 10563 004e DBB2 uxtb r3, r3 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10564 .loc 1 1478 44 discriminator 4 view .LVU3346 + 10565 0050 013B subs r3, r3, #1 + 10566 0052 18BF it ne + 10567 0054 0123 movne r3, #1 + 10568 0056 E8E7 b .L724 + 10569 .L721: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10570 .loc 1 1478 7 discriminator 7 view .LVU3347 + 10571 0058 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 10572 005c DBB2 uxtb r3, r3 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10573 .loc 1 1478 44 discriminator 7 view .LVU3348 + 10574 005e 013B subs r3, r3, #1 + 10575 0060 18BF it ne + 10576 0062 0123 movne r3, #1 + 10577 0064 E1E7 b .L724 + 10578 .L720: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10579 .loc 1 1478 7 discriminator 10 view .LVU3349 + 10580 0066 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10581 006a DBB2 uxtb r3, r3 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10582 .loc 1 1478 44 discriminator 10 view .LVU3350 + 10583 006c 013B subs r3, r3, #1 + 10584 006e 18BF it ne + 10585 0070 0123 movne r3, #1 + 10586 0072 DAE7 b .L724 + 10587 .L718: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10588 .loc 1 1478 7 discriminator 13 view .LVU3351 + 10589 0074 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 10590 0078 DBB2 uxtb r3, r3 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10591 .loc 1 1478 44 discriminator 13 view .LVU3352 + 10592 007a 013B subs r3, r3, #1 + 10593 007c 18BF it ne + 10594 007e 0123 movne r3, #1 + 10595 0080 D3E7 b .L724 + 10596 .L717: +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10597 .loc 1 1478 7 discriminator 14 view .LVU3353 + 10598 0082 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 10599 0086 DBB2 uxtb r3, r3 +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10600 .loc 1 1478 44 discriminator 14 view .LVU3354 + ARM GAS /tmp/cc0aF2h1.s page 373 + + + 10601 0088 013B subs r3, r3, #1 + 10602 008a 18BF it ne + 10603 008c 0123 movne r3, #1 + 10604 008e CCE7 b .L724 + 10605 .L732: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10606 .loc 1 1484 3 discriminator 1 view .LVU3355 + 10607 0090 0223 movs r3, #2 + 10608 0092 84F83E30 strb r3, [r4, #62] + 10609 .L733: +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10610 .loc 1 1487 3 is_stmt 1 view .LVU3356 + 10611 0096 0122 movs r2, #1 + 10612 0098 2068 ldr r0, [r4] + 10613 .LVL834: +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10614 .loc 1 1487 3 is_stmt 0 view .LVU3357 + 10615 009a FFF7FEFF bl TIM_CCxChannelCmd + 10616 .LVL835: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10617 .loc 1 1489 3 is_stmt 1 view .LVU3358 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10618 .loc 1 1489 7 is_stmt 0 view .LVU3359 + 10619 009e 2368 ldr r3, [r4] + 10620 00a0 294A ldr r2, .L742 + 10621 00a2 9342 cmp r3, r2 + 10622 00a4 0BD0 beq .L734 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10623 .loc 1 1489 7 discriminator 2 view .LVU3360 + 10624 00a6 02F5A052 add r2, r2, #5120 + 10625 00aa 9342 cmp r3, r2 + 10626 00ac 07D0 beq .L734 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10627 .loc 1 1489 7 discriminator 4 view .LVU3361 + 10628 00ae 02F58062 add r2, r2, #1024 + 10629 00b2 9342 cmp r3, r2 + 10630 00b4 03D0 beq .L734 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10631 .loc 1 1489 7 discriminator 6 view .LVU3362 + 10632 00b6 02F58062 add r2, r2, #1024 + 10633 00ba 9342 cmp r3, r2 + 10634 00bc 03D1 bne .L735 + 10635 .L734: +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10636 .loc 1 1492 5 is_stmt 1 view .LVU3363 + 10637 00be 5A6C ldr r2, [r3, #68] + 10638 00c0 42F40042 orr r2, r2, #32768 + 10639 00c4 5A64 str r2, [r3, #68] + 10640 .L735: +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10641 .loc 1 1496 3 view .LVU3364 +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10642 .loc 1 1496 7 is_stmt 0 view .LVU3365 + 10643 00c6 2368 ldr r3, [r4] +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10644 .loc 1 1496 6 view .LVU3366 + 10645 00c8 1F4A ldr r2, .L742 + ARM GAS /tmp/cc0aF2h1.s page 374 + + + 10646 00ca 9342 cmp r3, r2 + 10647 00cc 28D0 beq .L736 +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10648 .loc 1 1496 7 discriminator 1 view .LVU3367 + 10649 00ce B3F1804F cmp r3, #1073741824 + 10650 00d2 25D0 beq .L736 +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10651 .loc 1 1496 7 discriminator 2 view .LVU3368 + 10652 00d4 A2F59432 sub r2, r2, #75776 + 10653 00d8 9342 cmp r3, r2 + 10654 00da 21D0 beq .L736 +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10655 .loc 1 1496 7 discriminator 3 view .LVU3369 + 10656 00dc 02F58062 add r2, r2, #1024 + 10657 00e0 9342 cmp r3, r2 + 10658 00e2 1DD0 beq .L736 +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10659 .loc 1 1496 7 discriminator 4 view .LVU3370 + 10660 00e4 02F59C32 add r2, r2, #79872 + 10661 00e8 9342 cmp r3, r2 + 10662 00ea 19D0 beq .L736 +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10663 .loc 1 1506 5 is_stmt 1 view .LVU3371 + 10664 00ec 1A68 ldr r2, [r3] + 10665 00ee 42F00102 orr r2, r2, #1 + 10666 00f2 1A60 str r2, [r3] +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10667 .loc 1 1510 10 is_stmt 0 view .LVU3372 + 10668 00f4 0020 movs r0, #0 + 10669 00f6 22E0 b .L725 + 10670 .LVL836: + 10671 .L731: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10672 .loc 1 1484 3 discriminator 3 view .LVU3373 + 10673 00f8 0223 movs r3, #2 + 10674 00fa 84F83F30 strb r3, [r4, #63] + 10675 00fe CAE7 b .L733 + 10676 .L730: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10677 .loc 1 1484 3 discriminator 6 view .LVU3374 + 10678 0100 0223 movs r3, #2 + 10679 0102 84F84030 strb r3, [r4, #64] + 10680 0106 C6E7 b .L733 + 10681 .L729: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10682 .loc 1 1484 3 discriminator 9 view .LVU3375 + 10683 0108 0223 movs r3, #2 + 10684 010a 84F84130 strb r3, [r4, #65] + 10685 010e C2E7 b .L733 + 10686 .L727: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10687 .loc 1 1484 3 discriminator 12 view .LVU3376 + 10688 0110 0223 movs r3, #2 + 10689 0112 84F84230 strb r3, [r4, #66] + 10690 0116 BEE7 b .L733 + 10691 .L726: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 375 + + + 10692 .loc 1 1484 3 discriminator 13 view .LVU3377 + 10693 0118 0223 movs r3, #2 + 10694 011a 84F84330 strb r3, [r4, #67] + 10695 011e BAE7 b .L733 + 10696 .LVL837: + 10697 .L736: +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10698 .loc 1 1498 5 is_stmt 1 view .LVU3378 +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10699 .loc 1 1498 29 is_stmt 0 view .LVU3379 + 10700 0120 9968 ldr r1, [r3, #8] +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10701 .loc 1 1498 13 view .LVU3380 + 10702 0122 0A4A ldr r2, .L742+4 + 10703 0124 0A40 ands r2, r2, r1 + 10704 .LVL838: +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10705 .loc 1 1499 5 is_stmt 1 view .LVU3381 +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10706 .loc 1 1499 8 is_stmt 0 view .LVU3382 + 10707 0126 062A cmp r2, #6 + 10708 0128 0AD0 beq .L739 +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10709 .loc 1 1499 9 discriminator 1 view .LVU3383 + 10710 012a B2F5803F cmp r2, #65536 + 10711 012e 09D0 beq .L740 +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10712 .loc 1 1501 7 is_stmt 1 view .LVU3384 + 10713 0130 1A68 ldr r2, [r3] + 10714 .LVL839: +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10715 .loc 1 1501 7 is_stmt 0 view .LVU3385 + 10716 0132 42F00102 orr r2, r2, #1 + 10717 0136 1A60 str r2, [r3] +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10718 .loc 1 1510 10 view .LVU3386 + 10719 0138 0020 movs r0, #0 + 10720 013a 00E0 b .L725 + 10721 .LVL840: + 10722 .L738: +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10723 .loc 1 1480 12 view .LVU3387 + 10724 013c 0120 movs r0, #1 + 10725 .LVL841: + 10726 .L725: +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10727 .loc 1 1511 1 view .LVU3388 + 10728 013e 10BD pop {r4, pc} + 10729 .LVL842: + 10730 .L739: +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10731 .loc 1 1510 10 view .LVU3389 + 10732 0140 0020 movs r0, #0 + 10733 0142 FCE7 b .L725 + 10734 .L740: + 10735 0144 0020 movs r0, #0 + 10736 0146 FAE7 b .L725 + ARM GAS /tmp/cc0aF2h1.s page 376 + + + 10737 .L743: + 10738 .align 2 + 10739 .L742: + 10740 0148 002C0140 .word 1073818624 + 10741 014c 07000100 .word 65543 + 10742 .cfi_endproc + 10743 .LFE154: + 10745 .section .text.HAL_TIM_PWM_Stop,"ax",%progbits + 10746 .align 1 + 10747 .global HAL_TIM_PWM_Stop + 10748 .syntax unified + 10749 .thumb + 10750 .thumb_func + 10752 HAL_TIM_PWM_Stop: + 10753 .LVL843: + 10754 .LFB155: +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 10755 .loc 1 1528 1 is_stmt 1 view -0 + 10756 .cfi_startproc + 10757 @ args = 0, pretend = 0, frame = 0 + 10758 @ frame_needed = 0, uses_anonymous_args = 0 +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 10759 .loc 1 1528 1 is_stmt 0 view .LVU3391 + 10760 0000 38B5 push {r3, r4, r5, lr} + 10761 .cfi_def_cfa_offset 16 + 10762 .cfi_offset 3, -16 + 10763 .cfi_offset 4, -12 + 10764 .cfi_offset 5, -8 + 10765 .cfi_offset 14, -4 + 10766 0002 0446 mov r4, r0 + 10767 0004 0D46 mov r5, r1 +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10768 .loc 1 1530 3 is_stmt 1 view .LVU3392 +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10769 .loc 1 1533 3 view .LVU3393 + 10770 0006 0022 movs r2, #0 + 10771 0008 0068 ldr r0, [r0] + 10772 .LVL844: +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10773 .loc 1 1533 3 is_stmt 0 view .LVU3394 + 10774 000a FFF7FEFF bl TIM_CCxChannelCmd + 10775 .LVL845: +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10776 .loc 1 1535 3 is_stmt 1 view .LVU3395 +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10777 .loc 1 1535 7 is_stmt 0 view .LVU3396 + 10778 000e 2368 ldr r3, [r4] + 10779 0010 294A ldr r2, .L757 + 10780 0012 9342 cmp r3, r2 + 10781 0014 27D0 beq .L745 +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10782 .loc 1 1535 7 discriminator 2 view .LVU3397 + 10783 0016 02F5A052 add r2, r2, #5120 + 10784 001a 9342 cmp r3, r2 + 10785 001c 23D0 beq .L745 +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10786 .loc 1 1535 7 discriminator 4 view .LVU3398 + ARM GAS /tmp/cc0aF2h1.s page 377 + + + 10787 001e 02F58062 add r2, r2, #1024 + 10788 0022 9342 cmp r3, r2 + 10789 0024 1FD0 beq .L745 +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10790 .loc 1 1535 7 discriminator 6 view .LVU3399 + 10791 0026 02F58062 add r2, r2, #1024 + 10792 002a 9342 cmp r3, r2 + 10793 002c 1BD0 beq .L745 + 10794 .L746: +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10795 .loc 1 1538 5 is_stmt 1 discriminator 5 view .LVU3400 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10796 .loc 1 1542 3 view .LVU3401 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10797 .loc 1 1542 3 view .LVU3402 + 10798 002e 2368 ldr r3, [r4] + 10799 0030 196A ldr r1, [r3, #32] + 10800 0032 41F21112 movw r2, #4369 + 10801 0036 1142 tst r1, r2 + 10802 0038 08D1 bne .L747 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10803 .loc 1 1542 3 discriminator 1 view .LVU3403 + 10804 003a 196A ldr r1, [r3, #32] + 10805 003c 40F24442 movw r2, #1092 + 10806 0040 1142 tst r1, r2 + 10807 0042 03D1 bne .L747 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10808 .loc 1 1542 3 discriminator 3 view .LVU3404 + 10809 0044 1A68 ldr r2, [r3] + 10810 0046 22F00102 bic r2, r2, #1 + 10811 004a 1A60 str r2, [r3] + 10812 .L747: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10813 .loc 1 1542 3 discriminator 5 view .LVU3405 +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10814 .loc 1 1545 3 view .LVU3406 + 10815 004c 102D cmp r5, #16 + 10816 004e 2ED8 bhi .L748 + 10817 0050 DFE805F0 tbb [pc, r5] + 10818 .L750: + 10819 0054 18 .byte (.L754-.L750)/2 + 10820 0055 2D .byte (.L748-.L750)/2 + 10821 0056 2D .byte (.L748-.L750)/2 + 10822 0057 2D .byte (.L748-.L750)/2 + 10823 0058 1D .byte (.L753-.L750)/2 + 10824 0059 2D .byte (.L748-.L750)/2 + 10825 005a 2D .byte (.L748-.L750)/2 + 10826 005b 2D .byte (.L748-.L750)/2 + 10827 005c 21 .byte (.L752-.L750)/2 + 10828 005d 2D .byte (.L748-.L750)/2 + 10829 005e 2D .byte (.L748-.L750)/2 + 10830 005f 2D .byte (.L748-.L750)/2 + 10831 0060 25 .byte (.L751-.L750)/2 + 10832 0061 2D .byte (.L748-.L750)/2 + 10833 0062 2D .byte (.L748-.L750)/2 + 10834 0063 2D .byte (.L748-.L750)/2 + 10835 0064 29 .byte (.L749-.L750)/2 + ARM GAS /tmp/cc0aF2h1.s page 378 + + + 10836 0065 00 .p2align 1 + 10837 .L745: +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10838 .loc 1 1538 5 view .LVU3407 +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10839 .loc 1 1538 5 view .LVU3408 + 10840 0066 196A ldr r1, [r3, #32] + 10841 0068 41F21112 movw r2, #4369 + 10842 006c 1142 tst r1, r2 + 10843 006e DED1 bne .L746 +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10844 .loc 1 1538 5 discriminator 1 view .LVU3409 + 10845 0070 196A ldr r1, [r3, #32] + 10846 0072 40F24442 movw r2, #1092 + 10847 0076 1142 tst r1, r2 + 10848 0078 D9D1 bne .L746 +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10849 .loc 1 1538 5 discriminator 3 view .LVU3410 + 10850 007a 5A6C ldr r2, [r3, #68] + 10851 007c 22F40042 bic r2, r2, #32768 + 10852 0080 5A64 str r2, [r3, #68] + 10853 0082 D4E7 b .L746 + 10854 .L754: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10855 .loc 1 1545 3 is_stmt 0 discriminator 1 view .LVU3411 + 10856 0084 0123 movs r3, #1 + 10857 0086 84F83E30 strb r3, [r4, #62] + 10858 .L755: +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 10859 .loc 1 1548 3 is_stmt 1 view .LVU3412 +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10860 .loc 1 1549 1 is_stmt 0 view .LVU3413 + 10861 008a 0020 movs r0, #0 + 10862 008c 38BD pop {r3, r4, r5, pc} + 10863 .LVL846: + 10864 .L753: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10865 .loc 1 1545 3 discriminator 3 view .LVU3414 + 10866 008e 0123 movs r3, #1 + 10867 0090 84F83F30 strb r3, [r4, #63] + 10868 0094 F9E7 b .L755 + 10869 .L752: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10870 .loc 1 1545 3 discriminator 6 view .LVU3415 + 10871 0096 0123 movs r3, #1 + 10872 0098 84F84030 strb r3, [r4, #64] + 10873 009c F5E7 b .L755 + 10874 .L751: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10875 .loc 1 1545 3 discriminator 9 view .LVU3416 + 10876 009e 0123 movs r3, #1 + 10877 00a0 84F84130 strb r3, [r4, #65] + 10878 00a4 F1E7 b .L755 + 10879 .L749: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10880 .loc 1 1545 3 discriminator 12 view .LVU3417 + 10881 00a6 0123 movs r3, #1 + ARM GAS /tmp/cc0aF2h1.s page 379 + + + 10882 00a8 84F84230 strb r3, [r4, #66] + 10883 00ac EDE7 b .L755 + 10884 .L748: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10885 .loc 1 1545 3 discriminator 13 view .LVU3418 + 10886 00ae 0123 movs r3, #1 + 10887 00b0 84F84330 strb r3, [r4, #67] + 10888 00b4 E9E7 b .L755 + 10889 .L758: + 10890 00b6 00BF .align 2 + 10891 .L757: + 10892 00b8 002C0140 .word 1073818624 + 10893 .cfi_endproc + 10894 .LFE155: + 10896 .section .text.HAL_TIM_PWM_Start_IT,"ax",%progbits + 10897 .align 1 + 10898 .global HAL_TIM_PWM_Start_IT + 10899 .syntax unified + 10900 .thumb + 10901 .thumb_func + 10903 HAL_TIM_PWM_Start_IT: + 10904 .LVL847: + 10905 .LFB156: +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10906 .loc 1 1563 1 is_stmt 1 view -0 + 10907 .cfi_startproc + 10908 @ args = 0, pretend = 0, frame = 0 + 10909 @ frame_needed = 0, uses_anonymous_args = 0 +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10910 .loc 1 1563 1 is_stmt 0 view .LVU3420 + 10911 0000 10B5 push {r4, lr} + 10912 .cfi_def_cfa_offset 8 + 10913 .cfi_offset 4, -8 + 10914 .cfi_offset 14, -4 + 10915 0002 0446 mov r4, r0 +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 10916 .loc 1 1564 3 is_stmt 1 view .LVU3421 + 10917 .LVL848: +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10918 .loc 1 1565 3 view .LVU3422 +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10919 .loc 1 1568 3 view .LVU3423 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10920 .loc 1 1571 3 view .LVU3424 + 10921 0004 1029 cmp r1, #16 + 10922 0006 3DD8 bhi .L760 + 10923 0008 DFE801F0 tbb [pc, r1] + 10924 .L762: + 10925 000c 09 .byte (.L766-.L762)/2 + 10926 000d 3C .byte (.L760-.L762)/2 + 10927 000e 3C .byte (.L760-.L762)/2 + 10928 000f 3C .byte (.L760-.L762)/2 + 10929 0010 20 .byte (.L765-.L762)/2 + 10930 0011 3C .byte (.L760-.L762)/2 + 10931 0012 3C .byte (.L760-.L762)/2 + 10932 0013 3C .byte (.L760-.L762)/2 + 10933 0014 27 .byte (.L764-.L762)/2 + ARM GAS /tmp/cc0aF2h1.s page 380 + + + 10934 0015 3C .byte (.L760-.L762)/2 + 10935 0016 3C .byte (.L760-.L762)/2 + 10936 0017 3C .byte (.L760-.L762)/2 + 10937 0018 2E .byte (.L763-.L762)/2 + 10938 0019 3C .byte (.L760-.L762)/2 + 10939 001a 3C .byte (.L760-.L762)/2 + 10940 001b 3C .byte (.L760-.L762)/2 + 10941 001c 35 .byte (.L761-.L762)/2 + 10942 001d 00 .p2align 1 + 10943 .L766: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10944 .loc 1 1571 7 is_stmt 0 discriminator 1 view .LVU3425 + 10945 001e 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 10946 0022 DBB2 uxtb r3, r3 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10947 .loc 1 1571 44 discriminator 1 view .LVU3426 + 10948 0024 013B subs r3, r3, #1 + 10949 0026 18BF it ne + 10950 0028 0123 movne r3, #1 + 10951 .L767: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10952 .loc 1 1571 6 discriminator 20 view .LVU3427 + 10953 002a 002B cmp r3, #0 + 10954 002c 40F0BA80 bne .L786 +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 10955 .loc 1 1577 3 is_stmt 1 view .LVU3428 + 10956 0030 1029 cmp r1, #16 + 10957 0032 00F28780 bhi .L769 + 10958 0036 DFE801F0 tbb [pc, r1] + 10959 .L771: + 10960 003a 2C .byte (.L775-.L771)/2 + 10961 003b 85 .byte (.L769-.L771)/2 + 10962 003c 85 .byte (.L769-.L771)/2 + 10963 003d 85 .byte (.L769-.L771)/2 + 10964 003e 65 .byte (.L774-.L771)/2 + 10965 003f 85 .byte (.L769-.L771)/2 + 10966 0040 85 .byte (.L769-.L771)/2 + 10967 0041 85 .byte (.L769-.L771)/2 + 10968 0042 6E .byte (.L773-.L771)/2 + 10969 0043 85 .byte (.L769-.L771)/2 + 10970 0044 85 .byte (.L769-.L771)/2 + 10971 0045 85 .byte (.L769-.L771)/2 + 10972 0046 77 .byte (.L772-.L771)/2 + 10973 0047 85 .byte (.L769-.L771)/2 + 10974 0048 85 .byte (.L769-.L771)/2 + 10975 0049 85 .byte (.L769-.L771)/2 + 10976 004a 80 .byte (.L770-.L771)/2 + 10977 004b 00 .p2align 1 + 10978 .L765: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10979 .loc 1 1571 7 is_stmt 0 discriminator 4 view .LVU3429 + 10980 004c 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 10981 0050 DBB2 uxtb r3, r3 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10982 .loc 1 1571 44 discriminator 4 view .LVU3430 + 10983 0052 013B subs r3, r3, #1 + 10984 0054 18BF it ne + ARM GAS /tmp/cc0aF2h1.s page 381 + + + 10985 0056 0123 movne r3, #1 + 10986 0058 E7E7 b .L767 + 10987 .L764: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10988 .loc 1 1571 7 discriminator 7 view .LVU3431 + 10989 005a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 10990 005e DBB2 uxtb r3, r3 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10991 .loc 1 1571 44 discriminator 7 view .LVU3432 + 10992 0060 013B subs r3, r3, #1 + 10993 0062 18BF it ne + 10994 0064 0123 movne r3, #1 + 10995 0066 E0E7 b .L767 + 10996 .L763: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 10997 .loc 1 1571 7 discriminator 10 view .LVU3433 + 10998 0068 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10999 006c DBB2 uxtb r3, r3 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11000 .loc 1 1571 44 discriminator 10 view .LVU3434 + 11001 006e 013B subs r3, r3, #1 + 11002 0070 18BF it ne + 11003 0072 0123 movne r3, #1 + 11004 0074 D9E7 b .L767 + 11005 .L761: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11006 .loc 1 1571 7 discriminator 13 view .LVU3435 + 11007 0076 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 11008 007a DBB2 uxtb r3, r3 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11009 .loc 1 1571 44 discriminator 13 view .LVU3436 + 11010 007c 013B subs r3, r3, #1 + 11011 007e 18BF it ne + 11012 0080 0123 movne r3, #1 + 11013 0082 D2E7 b .L767 + 11014 .L760: +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11015 .loc 1 1571 7 discriminator 14 view .LVU3437 + 11016 0084 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 11017 0088 DBB2 uxtb r3, r3 +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11018 .loc 1 1571 44 discriminator 14 view .LVU3438 + 11019 008a 013B subs r3, r3, #1 + 11020 008c 18BF it ne + 11021 008e 0123 movne r3, #1 + 11022 0090 CBE7 b .L767 + 11023 .L775: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11024 .loc 1 1577 3 discriminator 1 view .LVU3439 + 11025 0092 0223 movs r3, #2 + 11026 0094 84F83E30 strb r3, [r4, #62] +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11027 .loc 1 1579 3 is_stmt 1 view .LVU3440 + 11028 .L776: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11029 .loc 1 1584 7 view .LVU3441 + 11030 0098 2268 ldr r2, [r4] + ARM GAS /tmp/cc0aF2h1.s page 382 + + + 11031 009a D368 ldr r3, [r2, #12] + 11032 009c 43F00203 orr r3, r3, #2 + 11033 00a0 D360 str r3, [r2, #12] +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11034 .loc 1 1585 7 view .LVU3442 +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11035 .loc 1 1614 3 view .LVU3443 + 11036 .L781: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11037 .loc 1 1617 5 view .LVU3444 + 11038 00a2 0122 movs r2, #1 + 11039 00a4 2068 ldr r0, [r4] + 11040 .LVL849: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11041 .loc 1 1617 5 is_stmt 0 view .LVU3445 + 11042 00a6 FFF7FEFF bl TIM_CCxChannelCmd + 11043 .LVL850: +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11044 .loc 1 1619 5 is_stmt 1 view .LVU3446 +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11045 .loc 1 1619 9 is_stmt 0 view .LVU3447 + 11046 00aa 2368 ldr r3, [r4] + 11047 00ac 414A ldr r2, .L795 + 11048 00ae 9342 cmp r3, r2 + 11049 00b0 0BD0 beq .L782 +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11050 .loc 1 1619 9 discriminator 2 view .LVU3448 + 11051 00b2 02F5A052 add r2, r2, #5120 + 11052 00b6 9342 cmp r3, r2 + 11053 00b8 07D0 beq .L782 +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11054 .loc 1 1619 9 discriminator 4 view .LVU3449 + 11055 00ba 02F58062 add r2, r2, #1024 + 11056 00be 9342 cmp r3, r2 + 11057 00c0 03D0 beq .L782 +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11058 .loc 1 1619 9 discriminator 6 view .LVU3450 + 11059 00c2 02F58062 add r2, r2, #1024 + 11060 00c6 9342 cmp r3, r2 + 11061 00c8 03D1 bne .L783 + 11062 .L782: +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11063 .loc 1 1622 7 is_stmt 1 view .LVU3451 + 11064 00ca 5A6C ldr r2, [r3, #68] + 11065 00cc 42F40042 orr r2, r2, #32768 + 11066 00d0 5A64 str r2, [r3, #68] + 11067 .L783: +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11068 .loc 1 1626 5 view .LVU3452 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11069 .loc 1 1626 9 is_stmt 0 view .LVU3453 + 11070 00d2 2368 ldr r3, [r4] +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11071 .loc 1 1626 8 view .LVU3454 + 11072 00d4 374A ldr r2, .L795 + 11073 00d6 9342 cmp r3, r2 + 11074 00d8 56D0 beq .L784 + ARM GAS /tmp/cc0aF2h1.s page 383 + + +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11075 .loc 1 1626 9 discriminator 1 view .LVU3455 + 11076 00da B3F1804F cmp r3, #1073741824 + 11077 00de 53D0 beq .L784 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11078 .loc 1 1626 9 discriminator 2 view .LVU3456 + 11079 00e0 A2F59432 sub r2, r2, #75776 + 11080 00e4 9342 cmp r3, r2 + 11081 00e6 4FD0 beq .L784 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11082 .loc 1 1626 9 discriminator 3 view .LVU3457 + 11083 00e8 02F58062 add r2, r2, #1024 + 11084 00ec 9342 cmp r3, r2 + 11085 00ee 4BD0 beq .L784 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11086 .loc 1 1626 9 discriminator 4 view .LVU3458 + 11087 00f0 02F59C32 add r2, r2, #79872 + 11088 00f4 9342 cmp r3, r2 + 11089 00f6 47D0 beq .L784 +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11090 .loc 1 1636 7 is_stmt 1 view .LVU3459 + 11091 00f8 1A68 ldr r2, [r3] + 11092 00fa 42F00102 orr r2, r2, #1 + 11093 00fe 1A60 str r2, [r3] + 11094 0100 0020 movs r0, #0 + 11095 0102 50E0 b .L768 + 11096 .LVL851: + 11097 .L774: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11098 .loc 1 1577 3 is_stmt 0 discriminator 3 view .LVU3460 + 11099 0104 0223 movs r3, #2 + 11100 0106 84F83F30 strb r3, [r4, #63] +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11101 .loc 1 1579 3 is_stmt 1 view .LVU3461 + 11102 .L777: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11103 .loc 1 1591 7 view .LVU3462 + 11104 010a 2268 ldr r2, [r4] + 11105 010c D368 ldr r3, [r2, #12] + 11106 010e 43F00403 orr r3, r3, #4 + 11107 0112 D360 str r3, [r2, #12] +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11108 .loc 1 1592 7 view .LVU3463 +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11109 .loc 1 1614 3 view .LVU3464 + 11110 0114 C5E7 b .L781 + 11111 .L773: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11112 .loc 1 1577 3 is_stmt 0 discriminator 6 view .LVU3465 + 11113 0116 0223 movs r3, #2 + 11114 0118 84F84030 strb r3, [r4, #64] +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11115 .loc 1 1579 3 is_stmt 1 view .LVU3466 + 11116 .L778: +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11117 .loc 1 1598 7 view .LVU3467 + 11118 011c 2268 ldr r2, [r4] + ARM GAS /tmp/cc0aF2h1.s page 384 + + + 11119 011e D368 ldr r3, [r2, #12] + 11120 0120 43F00803 orr r3, r3, #8 + 11121 0124 D360 str r3, [r2, #12] +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11122 .loc 1 1599 7 view .LVU3468 +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11123 .loc 1 1614 3 view .LVU3469 + 11124 0126 BCE7 b .L781 + 11125 .L772: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11126 .loc 1 1577 3 is_stmt 0 discriminator 9 view .LVU3470 + 11127 0128 0223 movs r3, #2 + 11128 012a 84F84130 strb r3, [r4, #65] +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11129 .loc 1 1579 3 is_stmt 1 view .LVU3471 + 11130 .L779: +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11131 .loc 1 1605 7 view .LVU3472 + 11132 012e 2268 ldr r2, [r4] + 11133 0130 D368 ldr r3, [r2, #12] + 11134 0132 43F01003 orr r3, r3, #16 + 11135 0136 D360 str r3, [r2, #12] +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11136 .loc 1 1606 7 view .LVU3473 +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11137 .loc 1 1614 3 view .LVU3474 + 11138 0138 B3E7 b .L781 + 11139 .L770: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11140 .loc 1 1577 3 is_stmt 0 discriminator 12 view .LVU3475 + 11141 013a 0223 movs r3, #2 + 11142 013c 84F84230 strb r3, [r4, #66] +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11143 .loc 1 1579 3 is_stmt 1 view .LVU3476 +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11144 .loc 1 1577 3 is_stmt 0 discriminator 12 view .LVU3477 + 11145 0140 0120 movs r0, #1 + 11146 .LVL852: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11147 .loc 1 1577 3 discriminator 12 view .LVU3478 + 11148 0142 30E0 b .L768 + 11149 .LVL853: + 11150 .L769: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11151 .loc 1 1577 3 discriminator 13 view .LVU3479 + 11152 0144 0223 movs r3, #2 + 11153 0146 84F84330 strb r3, [r4, #67] +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11154 .loc 1 1579 3 is_stmt 1 view .LVU3480 + 11155 014a 0C29 cmp r1, #12 + 11156 014c 2CD8 bhi .L787 + 11157 014e 01A3 adr r3, .L780 + 11158 0150 53F821F0 ldr pc, [r3, r1, lsl #2] + 11159 .p2align 2 + 11160 .L780: + 11161 0154 99000000 .word .L776+1 + 11162 0158 A9010000 .word .L787+1 + ARM GAS /tmp/cc0aF2h1.s page 385 + + + 11163 015c A9010000 .word .L787+1 + 11164 0160 A9010000 .word .L787+1 + 11165 0164 0B010000 .word .L777+1 + 11166 0168 A9010000 .word .L787+1 + 11167 016c A9010000 .word .L787+1 + 11168 0170 A9010000 .word .L787+1 + 11169 0174 1D010000 .word .L778+1 + 11170 0178 A9010000 .word .L787+1 + 11171 017c A9010000 .word .L787+1 + 11172 0180 A9010000 .word .L787+1 + 11173 0184 2F010000 .word .L779+1 + 11174 .LVL854: + 11175 .p2align 1 + 11176 .L784: +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11177 .loc 1 1628 7 view .LVU3481 +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11178 .loc 1 1628 31 is_stmt 0 view .LVU3482 + 11179 0188 9968 ldr r1, [r3, #8] +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11180 .loc 1 1628 15 view .LVU3483 + 11181 018a 0B4A ldr r2, .L795+4 + 11182 018c 0A40 ands r2, r2, r1 + 11183 .LVL855: +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11184 .loc 1 1629 7 is_stmt 1 view .LVU3484 +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11185 .loc 1 1629 10 is_stmt 0 view .LVU3485 + 11186 018e 062A cmp r2, #6 + 11187 0190 0CD0 beq .L788 +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11188 .loc 1 1629 11 discriminator 1 view .LVU3486 + 11189 0192 B2F5803F cmp r2, #65536 + 11190 0196 0BD0 beq .L789 +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11191 .loc 1 1631 9 is_stmt 1 view .LVU3487 + 11192 0198 1A68 ldr r2, [r3] + 11193 .LVL856: +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11194 .loc 1 1631 9 is_stmt 0 view .LVU3488 + 11195 019a 42F00102 orr r2, r2, #1 + 11196 019e 1A60 str r2, [r3] + 11197 01a0 0020 movs r0, #0 + 11198 01a2 00E0 b .L768 + 11199 .LVL857: + 11200 .L786: +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11201 .loc 1 1573 12 view .LVU3489 + 11202 01a4 0120 movs r0, #1 + 11203 .LVL858: + 11204 .L768: +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11205 .loc 1 1642 1 view .LVU3490 + 11206 01a6 10BD pop {r4, pc} + 11207 .LVL859: + 11208 .L787: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + ARM GAS /tmp/cc0aF2h1.s page 386 + + + 11209 .loc 1 1579 3 view .LVU3491 + 11210 01a8 0120 movs r0, #1 + 11211 .LVL860: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11212 .loc 1 1579 3 view .LVU3492 + 11213 01aa FCE7 b .L768 + 11214 .LVL861: + 11215 .L788: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11216 .loc 1 1579 3 view .LVU3493 + 11217 01ac 0020 movs r0, #0 + 11218 01ae FAE7 b .L768 + 11219 .L789: + 11220 01b0 0020 movs r0, #0 + 11221 01b2 F8E7 b .L768 + 11222 .L796: + 11223 .align 2 + 11224 .L795: + 11225 01b4 002C0140 .word 1073818624 + 11226 01b8 07000100 .word 65543 + 11227 .cfi_endproc + 11228 .LFE156: + 11230 .section .text.HAL_TIM_PWM_Stop_IT,"ax",%progbits + 11231 .align 1 + 11232 .global HAL_TIM_PWM_Stop_IT + 11233 .syntax unified + 11234 .thumb + 11235 .thumb_func + 11237 HAL_TIM_PWM_Stop_IT: + 11238 .LVL862: + 11239 .LFB157: +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11240 .loc 1 1656 1 is_stmt 1 view -0 + 11241 .cfi_startproc + 11242 @ args = 0, pretend = 0, frame = 0 + 11243 @ frame_needed = 0, uses_anonymous_args = 0 +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11244 .loc 1 1656 1 is_stmt 0 view .LVU3495 + 11245 0000 38B5 push {r3, r4, r5, lr} + 11246 .cfi_def_cfa_offset 16 + 11247 .cfi_offset 3, -16 + 11248 .cfi_offset 4, -12 + 11249 .cfi_offset 5, -8 + 11250 .cfi_offset 14, -4 + 11251 0002 0546 mov r5, r0 + 11252 0004 0C46 mov r4, r1 +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11253 .loc 1 1657 3 is_stmt 1 view .LVU3496 + 11254 .LVL863: +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11255 .loc 1 1660 3 view .LVU3497 +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11256 .loc 1 1662 3 view .LVU3498 + 11257 0006 0C29 cmp r1, #12 + 11258 0008 7DD8 bhi .L815 + 11259 000a DFE801F0 tbb [pc, r1] + 11260 .L800: + ARM GAS /tmp/cc0aF2h1.s page 387 + + + 11261 000e 07 .byte (.L803-.L800)/2 + 11262 000f 7C .byte (.L815-.L800)/2 + 11263 0010 7C .byte (.L815-.L800)/2 + 11264 0011 7C .byte (.L815-.L800)/2 + 11265 0012 3D .byte (.L802-.L800)/2 + 11266 0013 7C .byte (.L815-.L800)/2 + 11267 0014 7C .byte (.L815-.L800)/2 + 11268 0015 7C .byte (.L815-.L800)/2 + 11269 0016 43 .byte (.L801-.L800)/2 + 11270 0017 7C .byte (.L815-.L800)/2 + 11271 0018 7C .byte (.L815-.L800)/2 + 11272 0019 7C .byte (.L815-.L800)/2 + 11273 001a 49 .byte (.L799-.L800)/2 + 11274 001b 00 .p2align 1 + 11275 .L803: +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11276 .loc 1 1667 7 view .LVU3499 + 11277 001c 0268 ldr r2, [r0] + 11278 001e D368 ldr r3, [r2, #12] + 11279 0020 23F00203 bic r3, r3, #2 + 11280 0024 D360 str r3, [r2, #12] +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11281 .loc 1 1668 7 view .LVU3500 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11282 .loc 1 1697 3 view .LVU3501 + 11283 .L804: +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11284 .loc 1 1700 5 view .LVU3502 + 11285 0026 0022 movs r2, #0 + 11286 0028 2146 mov r1, r4 + 11287 .LVL864: +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11288 .loc 1 1700 5 is_stmt 0 view .LVU3503 + 11289 002a 2868 ldr r0, [r5] + 11290 .LVL865: +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11291 .loc 1 1700 5 view .LVU3504 + 11292 002c FFF7FEFF bl TIM_CCxChannelCmd + 11293 .LVL866: +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11294 .loc 1 1702 5 is_stmt 1 view .LVU3505 +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11295 .loc 1 1702 9 is_stmt 0 view .LVU3506 + 11296 0030 2B68 ldr r3, [r5] + 11297 0032 364A ldr r2, .L817 + 11298 0034 9342 cmp r3, r2 + 11299 0036 39D0 beq .L805 +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11300 .loc 1 1702 9 discriminator 2 view .LVU3507 + 11301 0038 02F5A052 add r2, r2, #5120 + 11302 003c 9342 cmp r3, r2 + 11303 003e 35D0 beq .L805 +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11304 .loc 1 1702 9 discriminator 4 view .LVU3508 + 11305 0040 02F58062 add r2, r2, #1024 + 11306 0044 9342 cmp r3, r2 + 11307 0046 31D0 beq .L805 + ARM GAS /tmp/cc0aF2h1.s page 388 + + +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11308 .loc 1 1702 9 discriminator 6 view .LVU3509 + 11309 0048 02F58062 add r2, r2, #1024 + 11310 004c 9342 cmp r3, r2 + 11311 004e 2DD0 beq .L805 + 11312 .L806: +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11313 .loc 1 1705 7 is_stmt 1 discriminator 5 view .LVU3510 +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11314 .loc 1 1709 5 view .LVU3511 +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11315 .loc 1 1709 5 view .LVU3512 + 11316 0050 2B68 ldr r3, [r5] + 11317 0052 196A ldr r1, [r3, #32] + 11318 0054 41F21112 movw r2, #4369 + 11319 0058 1142 tst r1, r2 + 11320 005a 08D1 bne .L807 +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11321 .loc 1 1709 5 discriminator 1 view .LVU3513 + 11322 005c 196A ldr r1, [r3, #32] + 11323 005e 40F24442 movw r2, #1092 + 11324 0062 1142 tst r1, r2 + 11325 0064 03D1 bne .L807 +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11326 .loc 1 1709 5 discriminator 3 view .LVU3514 + 11327 0066 1A68 ldr r2, [r3] + 11328 0068 22F00102 bic r2, r2, #1 + 11329 006c 1A60 str r2, [r3] + 11330 .L807: +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11331 .loc 1 1709 5 discriminator 5 view .LVU3515 +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11332 .loc 1 1712 5 view .LVU3516 + 11333 006e 102C cmp r4, #16 + 11334 0070 44D8 bhi .L808 + 11335 0072 DFE804F0 tbb [pc, r4] + 11336 .L810: + 11337 0076 2A .byte (.L814-.L810)/2 + 11338 0077 43 .byte (.L808-.L810)/2 + 11339 0078 43 .byte (.L808-.L810)/2 + 11340 0079 43 .byte (.L808-.L810)/2 + 11341 007a 2F .byte (.L813-.L810)/2 + 11342 007b 43 .byte (.L808-.L810)/2 + 11343 007c 43 .byte (.L808-.L810)/2 + 11344 007d 43 .byte (.L808-.L810)/2 + 11345 007e 34 .byte (.L812-.L810)/2 + 11346 007f 43 .byte (.L808-.L810)/2 + 11347 0080 43 .byte (.L808-.L810)/2 + 11348 0081 43 .byte (.L808-.L810)/2 + 11349 0082 39 .byte (.L811-.L810)/2 + 11350 0083 43 .byte (.L808-.L810)/2 + 11351 0084 43 .byte (.L808-.L810)/2 + 11352 0085 43 .byte (.L808-.L810)/2 + 11353 0086 3E .byte (.L809-.L810)/2 + 11354 .LVL867: + 11355 0087 00 .p2align 1 + 11356 .L802: + ARM GAS /tmp/cc0aF2h1.s page 389 + + +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11357 .loc 1 1674 7 view .LVU3517 + 11358 0088 0268 ldr r2, [r0] + 11359 008a D368 ldr r3, [r2, #12] + 11360 008c 23F00403 bic r3, r3, #4 + 11361 0090 D360 str r3, [r2, #12] +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11362 .loc 1 1675 7 view .LVU3518 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11363 .loc 1 1697 3 view .LVU3519 + 11364 0092 C8E7 b .L804 + 11365 .L801: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11366 .loc 1 1681 7 view .LVU3520 + 11367 0094 0268 ldr r2, [r0] + 11368 0096 D368 ldr r3, [r2, #12] + 11369 0098 23F00803 bic r3, r3, #8 + 11370 009c D360 str r3, [r2, #12] +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11371 .loc 1 1682 7 view .LVU3521 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11372 .loc 1 1697 3 view .LVU3522 + 11373 009e C2E7 b .L804 + 11374 .L799: +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11375 .loc 1 1688 7 view .LVU3523 + 11376 00a0 0268 ldr r2, [r0] + 11377 00a2 D368 ldr r3, [r2, #12] + 11378 00a4 23F01003 bic r3, r3, #16 + 11379 00a8 D360 str r3, [r2, #12] +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11380 .loc 1 1689 7 view .LVU3524 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11381 .loc 1 1697 3 view .LVU3525 + 11382 00aa BCE7 b .L804 + 11383 .LVL868: + 11384 .L805: +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11385 .loc 1 1705 7 view .LVU3526 +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11386 .loc 1 1705 7 view .LVU3527 + 11387 00ac 196A ldr r1, [r3, #32] + 11388 00ae 41F21112 movw r2, #4369 + 11389 00b2 1142 tst r1, r2 + 11390 00b4 CCD1 bne .L806 +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11391 .loc 1 1705 7 discriminator 1 view .LVU3528 + 11392 00b6 196A ldr r1, [r3, #32] + 11393 00b8 40F24442 movw r2, #1092 + 11394 00bc 1142 tst r1, r2 + 11395 00be C7D1 bne .L806 +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11396 .loc 1 1705 7 discriminator 3 view .LVU3529 + 11397 00c0 5A6C ldr r2, [r3, #68] + 11398 00c2 22F40042 bic r2, r2, #32768 + 11399 00c6 5A64 str r2, [r3, #68] + 11400 00c8 C2E7 b .L806 + ARM GAS /tmp/cc0aF2h1.s page 390 + + + 11401 .L814: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11402 .loc 1 1712 5 is_stmt 0 discriminator 1 view .LVU3530 + 11403 00ca 0123 movs r3, #1 + 11404 00cc 85F83E30 strb r3, [r5, #62] + 11405 00d0 0020 movs r0, #0 + 11406 00d2 19E0 b .L798 + 11407 .L813: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11408 .loc 1 1712 5 discriminator 3 view .LVU3531 + 11409 00d4 0123 movs r3, #1 + 11410 00d6 85F83F30 strb r3, [r5, #63] + 11411 00da 0020 movs r0, #0 + 11412 00dc 14E0 b .L798 + 11413 .L812: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11414 .loc 1 1712 5 discriminator 6 view .LVU3532 + 11415 00de 0123 movs r3, #1 + 11416 00e0 85F84030 strb r3, [r5, #64] + 11417 00e4 0020 movs r0, #0 + 11418 00e6 0FE0 b .L798 + 11419 .L811: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11420 .loc 1 1712 5 discriminator 9 view .LVU3533 + 11421 00e8 0123 movs r3, #1 + 11422 00ea 85F84130 strb r3, [r5, #65] + 11423 00ee 0020 movs r0, #0 + 11424 00f0 0AE0 b .L798 + 11425 .L809: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11426 .loc 1 1712 5 discriminator 12 view .LVU3534 + 11427 00f2 0123 movs r3, #1 + 11428 00f4 85F84230 strb r3, [r5, #66] + 11429 00f8 0020 movs r0, #0 + 11430 00fa 05E0 b .L798 + 11431 .L808: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11432 .loc 1 1712 5 discriminator 13 view .LVU3535 + 11433 00fc 0123 movs r3, #1 + 11434 00fe 85F84330 strb r3, [r5, #67] + 11435 0102 0020 movs r0, #0 + 11436 0104 00E0 b .L798 + 11437 .LVL869: + 11438 .L815: +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11439 .loc 1 1662 3 view .LVU3536 + 11440 0106 0120 movs r0, #1 + 11441 .LVL870: + 11442 .L798: +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11443 .loc 1 1716 3 is_stmt 1 view .LVU3537 +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11444 .loc 1 1717 1 is_stmt 0 view .LVU3538 + 11445 0108 38BD pop {r3, r4, r5, pc} + 11446 .LVL871: + 11447 .L818: +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 391 + + + 11448 .loc 1 1717 1 view .LVU3539 + 11449 010a 00BF .align 2 + 11450 .L817: + 11451 010c 002C0140 .word 1073818624 + 11452 .cfi_endproc + 11453 .LFE157: + 11455 .section .text.HAL_TIM_PWM_Start_DMA,"ax",%progbits + 11456 .align 1 + 11457 .global HAL_TIM_PWM_Start_DMA + 11458 .syntax unified + 11459 .thumb + 11460 .thumb_func + 11462 HAL_TIM_PWM_Start_DMA: + 11463 .LVL872: + 11464 .LFB158: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11465 .loc 1 1734 1 is_stmt 1 view -0 + 11466 .cfi_startproc + 11467 @ args = 0, pretend = 0, frame = 0 + 11468 @ frame_needed = 0, uses_anonymous_args = 0 +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11469 .loc 1 1734 1 is_stmt 0 view .LVU3541 + 11470 0000 38B5 push {r3, r4, r5, lr} + 11471 .cfi_def_cfa_offset 16 + 11472 .cfi_offset 3, -16 + 11473 .cfi_offset 4, -12 + 11474 .cfi_offset 5, -8 + 11475 .cfi_offset 14, -4 + 11476 0002 0546 mov r5, r0 + 11477 0004 0C46 mov r4, r1 + 11478 0006 1146 mov r1, r2 + 11479 .LVL873: +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 11480 .loc 1 1735 3 is_stmt 1 view .LVU3542 +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11481 .loc 1 1736 3 view .LVU3543 +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11482 .loc 1 1739 3 view .LVU3544 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11483 .loc 1 1742 3 view .LVU3545 + 11484 0008 102C cmp r4, #16 + 11485 000a 41D8 bhi .L820 + 11486 000c DFE804F0 tbb [pc, r4] + 11487 .LVL874: + 11488 .L822: + 11489 0010 09 .byte (.L826-.L822)/2 + 11490 0011 40 .byte (.L820-.L822)/2 + 11491 0012 40 .byte (.L820-.L822)/2 + 11492 0013 40 .byte (.L820-.L822)/2 + 11493 0014 20 .byte (.L825-.L822)/2 + 11494 0015 40 .byte (.L820-.L822)/2 + 11495 0016 40 .byte (.L820-.L822)/2 + 11496 0017 40 .byte (.L820-.L822)/2 + 11497 0018 28 .byte (.L824-.L822)/2 + 11498 0019 40 .byte (.L820-.L822)/2 + 11499 001a 40 .byte (.L820-.L822)/2 + 11500 001b 40 .byte (.L820-.L822)/2 + ARM GAS /tmp/cc0aF2h1.s page 392 + + + 11501 001c 30 .byte (.L823-.L822)/2 + 11502 001d 40 .byte (.L820-.L822)/2 + 11503 001e 40 .byte (.L820-.L822)/2 + 11504 001f 40 .byte (.L820-.L822)/2 + 11505 0020 38 .byte (.L821-.L822)/2 + 11506 0021 00 .p2align 1 + 11507 .L826: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11508 .loc 1 1742 7 is_stmt 0 discriminator 1 view .LVU3546 + 11509 0022 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 11510 .LVL875: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11511 .loc 1 1742 7 discriminator 1 view .LVU3547 + 11512 0026 C0B2 uxtb r0, r0 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11513 .loc 1 1742 44 discriminator 1 view .LVU3548 + 11514 0028 0228 cmp r0, #2 + 11515 002a 14BF ite ne + 11516 002c 0020 movne r0, #0 + 11517 002e 0120 moveq r0, #1 + 11518 .L827: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11519 .loc 1 1742 6 discriminator 20 view .LVU3549 + 11520 0030 0028 cmp r0, #0 + 11521 0032 40F05181 bne .L854 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11522 .loc 1 1746 8 is_stmt 1 view .LVU3550 + 11523 0036 102C cmp r4, #16 + 11524 0038 78D8 bhi .L829 + 11525 003a DFE804F0 tbb [pc, r4] + 11526 .L831: + 11527 003e 31 .byte (.L835-.L831)/2 + 11528 003f 77 .byte (.L829-.L831)/2 + 11529 0040 77 .byte (.L829-.L831)/2 + 11530 0041 77 .byte (.L829-.L831)/2 + 11531 0042 57 .byte (.L834-.L831)/2 + 11532 0043 77 .byte (.L829-.L831)/2 + 11533 0044 77 .byte (.L829-.L831)/2 + 11534 0045 77 .byte (.L829-.L831)/2 + 11535 0046 5F .byte (.L833-.L831)/2 + 11536 0047 77 .byte (.L829-.L831)/2 + 11537 0048 77 .byte (.L829-.L831)/2 + 11538 0049 77 .byte (.L829-.L831)/2 + 11539 004a 67 .byte (.L832-.L831)/2 + 11540 004b 77 .byte (.L829-.L831)/2 + 11541 004c 77 .byte (.L829-.L831)/2 + 11542 004d 77 .byte (.L829-.L831)/2 + 11543 004e 6F .byte (.L830-.L831)/2 + 11544 .LVL876: + 11545 004f 00 .p2align 1 + 11546 .L825: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11547 .loc 1 1742 7 is_stmt 0 discriminator 4 view .LVU3551 + 11548 0050 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 11549 .LVL877: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11550 .loc 1 1742 7 discriminator 4 view .LVU3552 + ARM GAS /tmp/cc0aF2h1.s page 393 + + + 11551 0054 C0B2 uxtb r0, r0 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11552 .loc 1 1742 44 discriminator 4 view .LVU3553 + 11553 0056 0228 cmp r0, #2 + 11554 0058 14BF ite ne + 11555 005a 0020 movne r0, #0 + 11556 005c 0120 moveq r0, #1 + 11557 005e E7E7 b .L827 + 11558 .LVL878: + 11559 .L824: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11560 .loc 1 1742 7 discriminator 7 view .LVU3554 + 11561 0060 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 11562 .LVL879: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11563 .loc 1 1742 7 discriminator 7 view .LVU3555 + 11564 0064 C0B2 uxtb r0, r0 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11565 .loc 1 1742 44 discriminator 7 view .LVU3556 + 11566 0066 0228 cmp r0, #2 + 11567 0068 14BF ite ne + 11568 006a 0020 movne r0, #0 + 11569 006c 0120 moveq r0, #1 + 11570 006e DFE7 b .L827 + 11571 .LVL880: + 11572 .L823: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11573 .loc 1 1742 7 discriminator 10 view .LVU3557 + 11574 0070 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 11575 .LVL881: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11576 .loc 1 1742 7 discriminator 10 view .LVU3558 + 11577 0074 C0B2 uxtb r0, r0 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11578 .loc 1 1742 44 discriminator 10 view .LVU3559 + 11579 0076 0228 cmp r0, #2 + 11580 0078 14BF ite ne + 11581 007a 0020 movne r0, #0 + 11582 007c 0120 moveq r0, #1 + 11583 007e D7E7 b .L827 + 11584 .LVL882: + 11585 .L821: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11586 .loc 1 1742 7 discriminator 13 view .LVU3560 + 11587 0080 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 11588 .LVL883: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11589 .loc 1 1742 7 discriminator 13 view .LVU3561 + 11590 0084 C0B2 uxtb r0, r0 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11591 .loc 1 1742 44 discriminator 13 view .LVU3562 + 11592 0086 0228 cmp r0, #2 + 11593 0088 14BF ite ne + 11594 008a 0020 movne r0, #0 + 11595 008c 0120 moveq r0, #1 + 11596 008e CFE7 b .L827 + 11597 .LVL884: + ARM GAS /tmp/cc0aF2h1.s page 394 + + + 11598 .L820: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11599 .loc 1 1742 7 discriminator 14 view .LVU3563 + 11600 0090 90F84300 ldrb r0, [r0, #67] @ zero_extendqisi2 + 11601 .LVL885: +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11602 .loc 1 1742 7 discriminator 14 view .LVU3564 + 11603 0094 C0B2 uxtb r0, r0 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11604 .loc 1 1742 44 discriminator 14 view .LVU3565 + 11605 0096 0228 cmp r0, #2 + 11606 0098 14BF ite ne + 11607 009a 0020 movne r0, #0 + 11608 009c 0120 moveq r0, #1 + 11609 009e C7E7 b .L827 + 11610 .L835: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11611 .loc 1 1746 12 discriminator 1 view .LVU3566 + 11612 00a0 95F83E20 ldrb r2, [r5, #62] @ zero_extendqisi2 + 11613 00a4 D2B2 uxtb r2, r2 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11614 .loc 1 1746 49 discriminator 1 view .LVU3567 + 11615 00a6 012A cmp r2, #1 + 11616 00a8 14BF ite ne + 11617 00aa 0022 movne r2, #0 + 11618 00ac 0122 moveq r2, #1 + 11619 .L836: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11620 .loc 1 1746 11 discriminator 20 view .LVU3568 + 11621 00ae 002A cmp r2, #0 + 11622 00b0 00F01481 beq .L855 +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11623 .loc 1 1748 5 is_stmt 1 view .LVU3569 +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11624 .loc 1 1748 8 is_stmt 0 view .LVU3570 + 11625 00b4 0029 cmp r1, #0 + 11626 00b6 00F01381 beq .L856 +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11627 .loc 1 1748 25 discriminator 1 view .LVU3571 + 11628 00ba 002B cmp r3, #0 + 11629 00bc 00F01281 beq .L857 +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11630 .loc 1 1754 7 is_stmt 1 view .LVU3572 + 11631 00c0 102C cmp r4, #16 + 11632 00c2 00F2D980 bhi .L837 + 11633 00c6 DFE814F0 tbh [pc, r4, lsl #1] + 11634 .L839: + 11635 00ca 3900 .2byte (.L843-.L839)/2 + 11636 00cc D700 .2byte (.L837-.L839)/2 + 11637 00ce D700 .2byte (.L837-.L839)/2 + 11638 00d0 D700 .2byte (.L837-.L839)/2 + 11639 00d2 8700 .2byte (.L842-.L839)/2 + 11640 00d4 D700 .2byte (.L837-.L839)/2 + 11641 00d6 D700 .2byte (.L837-.L839)/2 + 11642 00d8 D700 .2byte (.L837-.L839)/2 + 11643 00da A000 .2byte (.L841-.L839)/2 + 11644 00dc D700 .2byte (.L837-.L839)/2 + ARM GAS /tmp/cc0aF2h1.s page 395 + + + 11645 00de D700 .2byte (.L837-.L839)/2 + 11646 00e0 D700 .2byte (.L837-.L839)/2 + 11647 00e2 B900 .2byte (.L840-.L839)/2 + 11648 00e4 D700 .2byte (.L837-.L839)/2 + 11649 00e6 D700 .2byte (.L837-.L839)/2 + 11650 00e8 D700 .2byte (.L837-.L839)/2 + 11651 00ea D200 .2byte (.L838-.L839)/2 + 11652 .p2align 1 + 11653 .L834: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11654 .loc 1 1746 12 is_stmt 0 discriminator 4 view .LVU3573 + 11655 00ec 95F83F20 ldrb r2, [r5, #63] @ zero_extendqisi2 + 11656 00f0 D2B2 uxtb r2, r2 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11657 .loc 1 1746 49 discriminator 4 view .LVU3574 + 11658 00f2 012A cmp r2, #1 + 11659 00f4 14BF ite ne + 11660 00f6 0022 movne r2, #0 + 11661 00f8 0122 moveq r2, #1 + 11662 00fa D8E7 b .L836 + 11663 .L833: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11664 .loc 1 1746 12 discriminator 7 view .LVU3575 + 11665 00fc 95F84020 ldrb r2, [r5, #64] @ zero_extendqisi2 + 11666 0100 D2B2 uxtb r2, r2 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11667 .loc 1 1746 49 discriminator 7 view .LVU3576 + 11668 0102 012A cmp r2, #1 + 11669 0104 14BF ite ne + 11670 0106 0022 movne r2, #0 + 11671 0108 0122 moveq r2, #1 + 11672 010a D0E7 b .L836 + 11673 .L832: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11674 .loc 1 1746 12 discriminator 10 view .LVU3577 + 11675 010c 95F84120 ldrb r2, [r5, #65] @ zero_extendqisi2 + 11676 0110 D2B2 uxtb r2, r2 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11677 .loc 1 1746 49 discriminator 10 view .LVU3578 + 11678 0112 012A cmp r2, #1 + 11679 0114 14BF ite ne + 11680 0116 0022 movne r2, #0 + 11681 0118 0122 moveq r2, #1 + 11682 011a C8E7 b .L836 + 11683 .L830: +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11684 .loc 1 1746 12 discriminator 13 view .LVU3579 + 11685 011c 95F84220 ldrb r2, [r5, #66] @ zero_extendqisi2 + 11686 0120 D2B2 uxtb r2, r2 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11687 .loc 1 1746 49 discriminator 13 view .LVU3580 + 11688 0122 012A cmp r2, #1 + 11689 0124 14BF ite ne + 11690 0126 0022 movne r2, #0 + 11691 0128 0122 moveq r2, #1 + 11692 012a C0E7 b .L836 + 11693 .L829: + ARM GAS /tmp/cc0aF2h1.s page 396 + + +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11694 .loc 1 1746 12 discriminator 14 view .LVU3581 + 11695 012c 95F84320 ldrb r2, [r5, #67] @ zero_extendqisi2 + 11696 0130 D2B2 uxtb r2, r2 +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11697 .loc 1 1746 49 discriminator 14 view .LVU3582 + 11698 0132 012A cmp r2, #1 + 11699 0134 14BF ite ne + 11700 0136 0022 movne r2, #0 + 11701 0138 0122 moveq r2, #1 + 11702 013a B8E7 b .L836 + 11703 .L843: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11704 .loc 1 1754 7 discriminator 1 view .LVU3583 + 11705 013c 0222 movs r2, #2 + 11706 013e 85F83E20 strb r2, [r5, #62] +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11707 .loc 1 1762 3 is_stmt 1 view .LVU3584 + 11708 .L844: +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11709 .loc 1 1767 7 view .LVU3585 +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11710 .loc 1 1767 17 is_stmt 0 view .LVU3586 + 11711 0142 6A6A ldr r2, [r5, #36] +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11712 .loc 1 1767 52 view .LVU3587 + 11713 0144 6F48 ldr r0, .L870 + 11714 0146 9062 str r0, [r2, #40] +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11715 .loc 1 1768 7 is_stmt 1 view .LVU3588 +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11716 .loc 1 1768 17 is_stmt 0 view .LVU3589 + 11717 0148 6A6A ldr r2, [r5, #36] +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11718 .loc 1 1768 56 view .LVU3590 + 11719 014a 6F48 ldr r0, .L870+4 + 11720 014c D062 str r0, [r2, #44] +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11721 .loc 1 1771 7 is_stmt 1 view .LVU3591 +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11722 .loc 1 1771 17 is_stmt 0 view .LVU3592 + 11723 014e 6A6A ldr r2, [r5, #36] +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11724 .loc 1 1771 53 view .LVU3593 + 11725 0150 6E48 ldr r0, .L870+8 + 11726 0152 1063 str r0, [r2, #48] +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11727 .loc 1 1774 7 is_stmt 1 view .LVU3594 +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11728 .loc 1 1774 88 is_stmt 0 view .LVU3595 + 11729 0154 2A68 ldr r2, [r5] +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11730 .loc 1 1774 11 view .LVU3596 + 11731 0156 3432 adds r2, r2, #52 + 11732 0158 686A ldr r0, [r5, #36] + 11733 015a FFF7FEFF bl HAL_DMA_Start_IT + 11734 .LVL886: + ARM GAS /tmp/cc0aF2h1.s page 397 + + +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11735 .loc 1 1774 10 discriminator 1 view .LVU3597 + 11736 015e 0028 cmp r0, #0 + 11737 0160 40F0C480 bne .L859 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11738 .loc 1 1782 7 is_stmt 1 view .LVU3598 + 11739 0164 2A68 ldr r2, [r5] + 11740 0166 D368 ldr r3, [r2, #12] + 11741 0168 43F40073 orr r3, r3, #512 + 11742 016c D360 str r3, [r2, #12] +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11743 .loc 1 1783 7 view .LVU3599 +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11744 .loc 1 1854 3 view .LVU3600 + 11745 .L849: +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11746 .loc 1 1857 5 view .LVU3601 + 11747 016e 0122 movs r2, #1 + 11748 0170 2146 mov r1, r4 + 11749 0172 2868 ldr r0, [r5] + 11750 0174 FFF7FEFF bl TIM_CCxChannelCmd + 11751 .LVL887: +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11752 .loc 1 1859 5 view .LVU3602 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11753 .loc 1 1859 9 is_stmt 0 view .LVU3603 + 11754 0178 2B68 ldr r3, [r5] + 11755 017a 654A ldr r2, .L870+12 + 11756 017c 9342 cmp r3, r2 + 11757 017e 0BD0 beq .L850 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11758 .loc 1 1859 9 discriminator 2 view .LVU3604 + 11759 0180 02F5A052 add r2, r2, #5120 + 11760 0184 9342 cmp r3, r2 + 11761 0186 07D0 beq .L850 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11762 .loc 1 1859 9 discriminator 4 view .LVU3605 + 11763 0188 02F58062 add r2, r2, #1024 + 11764 018c 9342 cmp r3, r2 + 11765 018e 03D0 beq .L850 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11766 .loc 1 1859 9 discriminator 6 view .LVU3606 + 11767 0190 02F58062 add r2, r2, #1024 + 11768 0194 9342 cmp r3, r2 + 11769 0196 03D1 bne .L851 + 11770 .L850: +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11771 .loc 1 1862 7 is_stmt 1 view .LVU3607 + 11772 0198 5A6C ldr r2, [r3, #68] + 11773 019a 42F40042 orr r2, r2, #32768 + 11774 019e 5A64 str r2, [r3, #68] + 11775 .L851: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11776 .loc 1 1866 5 view .LVU3608 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11777 .loc 1 1866 9 is_stmt 0 view .LVU3609 + 11778 01a0 2B68 ldr r3, [r5] + ARM GAS /tmp/cc0aF2h1.s page 398 + + +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11779 .loc 1 1866 8 view .LVU3610 + 11780 01a2 5B4A ldr r2, .L870+12 + 11781 01a4 9342 cmp r3, r2 + 11782 01a6 00F08980 beq .L852 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11783 .loc 1 1866 9 discriminator 1 view .LVU3611 + 11784 01aa B3F1804F cmp r3, #1073741824 + 11785 01ae 00F08580 beq .L852 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11786 .loc 1 1866 9 discriminator 2 view .LVU3612 + 11787 01b2 A2F59432 sub r2, r2, #75776 + 11788 01b6 9342 cmp r3, r2 + 11789 01b8 00F08080 beq .L852 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11790 .loc 1 1866 9 discriminator 3 view .LVU3613 + 11791 01bc 02F58062 add r2, r2, #1024 + 11792 01c0 9342 cmp r3, r2 + 11793 01c2 7BD0 beq .L852 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11794 .loc 1 1866 9 discriminator 4 view .LVU3614 + 11795 01c4 02F59C32 add r2, r2, #79872 + 11796 01c8 9342 cmp r3, r2 + 11797 01ca 77D0 beq .L852 +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11798 .loc 1 1876 7 is_stmt 1 view .LVU3615 + 11799 01cc 1A68 ldr r2, [r3] + 11800 01ce 42F00102 orr r2, r2, #1 + 11801 01d2 1A60 str r2, [r3] + 11802 01d4 0020 movs r0, #0 + 11803 01d6 82E0 b .L828 + 11804 .LVL888: + 11805 .L842: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11806 .loc 1 1754 7 is_stmt 0 discriminator 3 view .LVU3616 + 11807 01d8 0222 movs r2, #2 + 11808 01da 85F83F20 strb r2, [r5, #63] +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11809 .loc 1 1762 3 is_stmt 1 view .LVU3617 + 11810 .L845: +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11811 .loc 1 1789 7 view .LVU3618 +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11812 .loc 1 1789 17 is_stmt 0 view .LVU3619 + 11813 01de AA6A ldr r2, [r5, #40] +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11814 .loc 1 1789 52 view .LVU3620 + 11815 01e0 4848 ldr r0, .L870 + 11816 01e2 9062 str r0, [r2, #40] +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11817 .loc 1 1790 7 is_stmt 1 view .LVU3621 +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11818 .loc 1 1790 17 is_stmt 0 view .LVU3622 + 11819 01e4 AA6A ldr r2, [r5, #40] +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11820 .loc 1 1790 56 view .LVU3623 + 11821 01e6 4848 ldr r0, .L870+4 + ARM GAS /tmp/cc0aF2h1.s page 399 + + + 11822 01e8 D062 str r0, [r2, #44] +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11823 .loc 1 1793 7 is_stmt 1 view .LVU3624 +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11824 .loc 1 1793 17 is_stmt 0 view .LVU3625 + 11825 01ea AA6A ldr r2, [r5, #40] +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11826 .loc 1 1793 53 view .LVU3626 + 11827 01ec 4748 ldr r0, .L870+8 + 11828 01ee 1063 str r0, [r2, #48] +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11829 .loc 1 1796 7 is_stmt 1 view .LVU3627 +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11830 .loc 1 1796 88 is_stmt 0 view .LVU3628 + 11831 01f0 2A68 ldr r2, [r5] +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11832 .loc 1 1796 11 view .LVU3629 + 11833 01f2 3832 adds r2, r2, #56 + 11834 01f4 A86A ldr r0, [r5, #40] + 11835 01f6 FFF7FEFF bl HAL_DMA_Start_IT + 11836 .LVL889: +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11837 .loc 1 1796 10 discriminator 1 view .LVU3630 + 11838 01fa 0028 cmp r0, #0 + 11839 01fc 78D1 bne .L860 +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11840 .loc 1 1803 7 is_stmt 1 view .LVU3631 + 11841 01fe 2A68 ldr r2, [r5] + 11842 0200 D368 ldr r3, [r2, #12] + 11843 0202 43F48063 orr r3, r3, #1024 + 11844 0206 D360 str r3, [r2, #12] +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11845 .loc 1 1804 7 view .LVU3632 +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11846 .loc 1 1854 3 view .LVU3633 + 11847 0208 B1E7 b .L849 + 11848 .LVL890: + 11849 .L841: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11850 .loc 1 1754 7 is_stmt 0 discriminator 6 view .LVU3634 + 11851 020a 0222 movs r2, #2 + 11852 020c 85F84020 strb r2, [r5, #64] +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11853 .loc 1 1762 3 is_stmt 1 view .LVU3635 + 11854 .L846: +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11855 .loc 1 1810 7 view .LVU3636 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11856 .loc 1 1810 17 is_stmt 0 view .LVU3637 + 11857 0210 EA6A ldr r2, [r5, #44] +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11858 .loc 1 1810 52 view .LVU3638 + 11859 0212 3C48 ldr r0, .L870 + 11860 0214 9062 str r0, [r2, #40] +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11861 .loc 1 1811 7 is_stmt 1 view .LVU3639 +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 400 + + + 11862 .loc 1 1811 17 is_stmt 0 view .LVU3640 + 11863 0216 EA6A ldr r2, [r5, #44] +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11864 .loc 1 1811 56 view .LVU3641 + 11865 0218 3B48 ldr r0, .L870+4 + 11866 021a D062 str r0, [r2, #44] +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11867 .loc 1 1814 7 is_stmt 1 view .LVU3642 +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11868 .loc 1 1814 17 is_stmt 0 view .LVU3643 + 11869 021c EA6A ldr r2, [r5, #44] +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11870 .loc 1 1814 53 view .LVU3644 + 11871 021e 3B48 ldr r0, .L870+8 + 11872 0220 1063 str r0, [r2, #48] +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11873 .loc 1 1817 7 is_stmt 1 view .LVU3645 +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11874 .loc 1 1817 88 is_stmt 0 view .LVU3646 + 11875 0222 2A68 ldr r2, [r5] +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11876 .loc 1 1817 11 view .LVU3647 + 11877 0224 3C32 adds r2, r2, #60 + 11878 0226 E86A ldr r0, [r5, #44] + 11879 0228 FFF7FEFF bl HAL_DMA_Start_IT + 11880 .LVL891: +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11881 .loc 1 1817 10 discriminator 1 view .LVU3648 + 11882 022c 0028 cmp r0, #0 + 11883 022e 61D1 bne .L861 +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11884 .loc 1 1824 7 is_stmt 1 view .LVU3649 + 11885 0230 2A68 ldr r2, [r5] + 11886 0232 D368 ldr r3, [r2, #12] + 11887 0234 43F40063 orr r3, r3, #2048 + 11888 0238 D360 str r3, [r2, #12] +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11889 .loc 1 1825 7 view .LVU3650 +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11890 .loc 1 1854 3 view .LVU3651 + 11891 023a 98E7 b .L849 + 11892 .LVL892: + 11893 .L840: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11894 .loc 1 1754 7 is_stmt 0 discriminator 9 view .LVU3652 + 11895 023c 0222 movs r2, #2 + 11896 023e 85F84120 strb r2, [r5, #65] +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11897 .loc 1 1762 3 is_stmt 1 view .LVU3653 + 11898 .L847: +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11899 .loc 1 1831 7 view .LVU3654 +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11900 .loc 1 1831 17 is_stmt 0 view .LVU3655 + 11901 0242 2A6B ldr r2, [r5, #48] +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11902 .loc 1 1831 52 view .LVU3656 + ARM GAS /tmp/cc0aF2h1.s page 401 + + + 11903 0244 2F48 ldr r0, .L870 + 11904 0246 9062 str r0, [r2, #40] +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11905 .loc 1 1832 7 is_stmt 1 view .LVU3657 +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11906 .loc 1 1832 17 is_stmt 0 view .LVU3658 + 11907 0248 2A6B ldr r2, [r5, #48] +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11908 .loc 1 1832 56 view .LVU3659 + 11909 024a 2F48 ldr r0, .L870+4 + 11910 024c D062 str r0, [r2, #44] +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11911 .loc 1 1835 7 is_stmt 1 view .LVU3660 +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11912 .loc 1 1835 17 is_stmt 0 view .LVU3661 + 11913 024e 2A6B ldr r2, [r5, #48] +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 11914 .loc 1 1835 53 view .LVU3662 + 11915 0250 2E48 ldr r0, .L870+8 + 11916 0252 1063 str r0, [r2, #48] +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11917 .loc 1 1838 7 is_stmt 1 view .LVU3663 +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11918 .loc 1 1838 88 is_stmt 0 view .LVU3664 + 11919 0254 2A68 ldr r2, [r5] +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11920 .loc 1 1838 11 view .LVU3665 + 11921 0256 4032 adds r2, r2, #64 + 11922 0258 286B ldr r0, [r5, #48] + 11923 025a FFF7FEFF bl HAL_DMA_Start_IT + 11924 .LVL893: +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 11925 .loc 1 1838 10 discriminator 1 view .LVU3666 + 11926 025e 0028 cmp r0, #0 + 11927 0260 4AD1 bne .L862 +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 11928 .loc 1 1845 7 is_stmt 1 view .LVU3667 + 11929 0262 2A68 ldr r2, [r5] + 11930 0264 D368 ldr r3, [r2, #12] + 11931 0266 43F48053 orr r3, r3, #4096 + 11932 026a D360 str r3, [r2, #12] +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11933 .loc 1 1846 7 view .LVU3668 +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11934 .loc 1 1854 3 view .LVU3669 + 11935 026c 7FE7 b .L849 + 11936 .LVL894: + 11937 .L838: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11938 .loc 1 1754 7 is_stmt 0 discriminator 12 view .LVU3670 + 11939 026e 0223 movs r3, #2 + 11940 .LVL895: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11941 .loc 1 1754 7 discriminator 12 view .LVU3671 + 11942 0270 85F84230 strb r3, [r5, #66] +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11943 .loc 1 1762 3 is_stmt 1 view .LVU3672 + ARM GAS /tmp/cc0aF2h1.s page 402 + + +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11944 .loc 1 1754 7 is_stmt 0 discriminator 12 view .LVU3673 + 11945 0274 0120 movs r0, #1 + 11946 0276 32E0 b .L828 + 11947 .LVL896: + 11948 .L837: +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11949 .loc 1 1754 7 discriminator 13 view .LVU3674 + 11950 0278 0222 movs r2, #2 + 11951 027a 85F84320 strb r2, [r5, #67] +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11952 .loc 1 1762 3 is_stmt 1 view .LVU3675 + 11953 027e 0C2C cmp r4, #12 + 11954 0280 32D8 bhi .L858 + 11955 0282 01A2 adr r2, .L848 + 11956 0284 52F824F0 ldr pc, [r2, r4, lsl #2] + 11957 .p2align 2 + 11958 .L848: + 11959 0288 43010000 .word .L844+1 + 11960 028c E9020000 .word .L858+1 + 11961 0290 E9020000 .word .L858+1 + 11962 0294 E9020000 .word .L858+1 + 11963 0298 DF010000 .word .L845+1 + 11964 029c E9020000 .word .L858+1 + 11965 02a0 E9020000 .word .L858+1 + 11966 02a4 E9020000 .word .L858+1 + 11967 02a8 11020000 .word .L846+1 + 11968 02ac E9020000 .word .L858+1 + 11969 02b0 E9020000 .word .L858+1 + 11970 02b4 E9020000 .word .L858+1 + 11971 02b8 43020000 .word .L847+1 + 11972 .LVL897: + 11973 .p2align 1 + 11974 .L852: +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11975 .loc 1 1868 7 view .LVU3676 +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11976 .loc 1 1868 31 is_stmt 0 view .LVU3677 + 11977 02bc 9968 ldr r1, [r3, #8] +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11978 .loc 1 1868 15 view .LVU3678 + 11979 02be 154A ldr r2, .L870+16 + 11980 02c0 0A40 ands r2, r2, r1 + 11981 .LVL898: +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11982 .loc 1 1869 7 is_stmt 1 view .LVU3679 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11983 .loc 1 1869 10 is_stmt 0 view .LVU3680 + 11984 02c2 062A cmp r2, #6 + 11985 02c4 1AD0 beq .L863 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 11986 .loc 1 1869 11 discriminator 1 view .LVU3681 + 11987 02c6 B2F5803F cmp r2, #65536 + 11988 02ca 19D0 beq .L864 +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11989 .loc 1 1871 9 is_stmt 1 view .LVU3682 + 11990 02cc 1A68 ldr r2, [r3] + ARM GAS /tmp/cc0aF2h1.s page 403 + + + 11991 .LVL899: +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11992 .loc 1 1871 9 is_stmt 0 view .LVU3683 + 11993 02ce 42F00102 orr r2, r2, #1 + 11994 02d2 1A60 str r2, [r3] + 11995 02d4 0020 movs r0, #0 + 11996 02d6 02E0 b .L828 + 11997 .LVL900: + 11998 .L854: +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 11999 .loc 1 1744 12 view .LVU3684 + 12000 02d8 0220 movs r0, #2 + 12001 02da 00E0 b .L828 + 12002 .L855: +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12003 .loc 1 1759 12 view .LVU3685 + 12004 02dc 0120 movs r0, #1 + 12005 .LVL901: + 12006 .L828: +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12007 .loc 1 1882 1 view .LVU3686 + 12008 02de 38BD pop {r3, r4, r5, pc} + 12009 .LVL902: + 12010 .L856: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12011 .loc 1 1750 14 view .LVU3687 + 12012 02e0 0120 movs r0, #1 + 12013 02e2 FCE7 b .L828 + 12014 .L857: + 12015 02e4 0120 movs r0, #1 + 12016 02e6 FAE7 b .L828 + 12017 .L858: +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12018 .loc 1 1762 3 view .LVU3688 + 12019 02e8 0120 movs r0, #1 + 12020 02ea F8E7 b .L828 + 12021 .LVL903: + 12022 .L859: +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12023 .loc 1 1778 16 view .LVU3689 + 12024 02ec 0120 movs r0, #1 + 12025 02ee F6E7 b .L828 + 12026 .L860: +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12027 .loc 1 1800 16 view .LVU3690 + 12028 02f0 0120 movs r0, #1 + 12029 02f2 F4E7 b .L828 + 12030 .L861: +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12031 .loc 1 1821 16 view .LVU3691 + 12032 02f4 0120 movs r0, #1 + 12033 02f6 F2E7 b .L828 + 12034 .L862: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12035 .loc 1 1842 16 view .LVU3692 + 12036 02f8 0120 movs r0, #1 + 12037 02fa F0E7 b .L828 + ARM GAS /tmp/cc0aF2h1.s page 404 + + + 12038 .LVL904: + 12039 .L863: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12040 .loc 1 1842 16 view .LVU3693 + 12041 02fc 0020 movs r0, #0 + 12042 02fe EEE7 b .L828 + 12043 .L864: + 12044 0300 0020 movs r0, #0 + 12045 0302 ECE7 b .L828 + 12046 .L871: + 12047 .align 2 + 12048 .L870: + 12049 0304 00000000 .word TIM_DMADelayPulseCplt + 12050 0308 00000000 .word TIM_DMADelayPulseHalfCplt + 12051 030c 00000000 .word TIM_DMAError + 12052 0310 002C0140 .word 1073818624 + 12053 0314 07000100 .word 65543 + 12054 .cfi_endproc + 12055 .LFE158: + 12057 .section .text.HAL_TIM_PWM_Stop_DMA,"ax",%progbits + 12058 .align 1 + 12059 .global HAL_TIM_PWM_Stop_DMA + 12060 .syntax unified + 12061 .thumb + 12062 .thumb_func + 12064 HAL_TIM_PWM_Stop_DMA: + 12065 .LVL905: + 12066 .LFB159: +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12067 .loc 1 1896 1 is_stmt 1 view -0 + 12068 .cfi_startproc + 12069 @ args = 0, pretend = 0, frame = 0 + 12070 @ frame_needed = 0, uses_anonymous_args = 0 +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12071 .loc 1 1896 1 is_stmt 0 view .LVU3695 + 12072 0000 38B5 push {r3, r4, r5, lr} + 12073 .cfi_def_cfa_offset 16 + 12074 .cfi_offset 3, -16 + 12075 .cfi_offset 4, -12 + 12076 .cfi_offset 5, -8 + 12077 .cfi_offset 14, -4 + 12078 0002 0446 mov r4, r0 + 12079 0004 0D46 mov r5, r1 +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12080 .loc 1 1897 3 is_stmt 1 view .LVU3696 + 12081 .LVL906: +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12082 .loc 1 1900 3 view .LVU3697 +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12083 .loc 1 1902 3 view .LVU3698 + 12084 0006 0C29 cmp r1, #12 + 12085 0008 00F28A80 bhi .L890 + 12086 000c DFE801F0 tbb [pc, r1] + 12087 .L875: + 12088 0010 07 .byte (.L878-.L875)/2 + 12089 0011 88 .byte (.L890-.L875)/2 + 12090 0012 88 .byte (.L890-.L875)/2 + ARM GAS /tmp/cc0aF2h1.s page 405 + + + 12091 0013 88 .byte (.L890-.L875)/2 + 12092 0014 40 .byte (.L877-.L875)/2 + 12093 0015 88 .byte (.L890-.L875)/2 + 12094 0016 88 .byte (.L890-.L875)/2 + 12095 0017 88 .byte (.L890-.L875)/2 + 12096 0018 49 .byte (.L876-.L875)/2 + 12097 0019 88 .byte (.L890-.L875)/2 + 12098 001a 88 .byte (.L890-.L875)/2 + 12099 001b 88 .byte (.L890-.L875)/2 + 12100 001c 52 .byte (.L874-.L875)/2 + 12101 001d 00 .p2align 1 + 12102 .L878: +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 12103 .loc 1 1907 7 view .LVU3699 + 12104 001e 0268 ldr r2, [r0] + 12105 0020 D368 ldr r3, [r2, #12] + 12106 0022 23F40073 bic r3, r3, #512 + 12107 0026 D360 str r3, [r2, #12] +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12108 .loc 1 1908 7 view .LVU3700 +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12109 .loc 1 1908 13 is_stmt 0 view .LVU3701 + 12110 0028 406A ldr r0, [r0, #36] + 12111 .LVL907: +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12112 .loc 1 1908 13 view .LVU3702 + 12113 002a FFF7FEFF bl HAL_DMA_Abort_IT + 12114 .LVL908: +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12115 .loc 1 1909 7 is_stmt 1 view .LVU3703 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12116 .loc 1 1941 3 view .LVU3704 + 12117 .L879: +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12118 .loc 1 1944 5 view .LVU3705 + 12119 002e 0022 movs r2, #0 + 12120 0030 2946 mov r1, r5 + 12121 0032 2068 ldr r0, [r4] + 12122 0034 FFF7FEFF bl TIM_CCxChannelCmd + 12123 .LVL909: +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12124 .loc 1 1946 5 view .LVU3706 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12125 .loc 1 1946 9 is_stmt 0 view .LVU3707 + 12126 0038 2368 ldr r3, [r4] + 12127 003a 3A4A ldr r2, .L892 + 12128 003c 9342 cmp r3, r2 + 12129 003e 42D0 beq .L880 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12130 .loc 1 1946 9 discriminator 2 view .LVU3708 + 12131 0040 02F5A052 add r2, r2, #5120 + 12132 0044 9342 cmp r3, r2 + 12133 0046 3ED0 beq .L880 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12134 .loc 1 1946 9 discriminator 4 view .LVU3709 + 12135 0048 02F58062 add r2, r2, #1024 + 12136 004c 9342 cmp r3, r2 + ARM GAS /tmp/cc0aF2h1.s page 406 + + + 12137 004e 3AD0 beq .L880 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12138 .loc 1 1946 9 discriminator 6 view .LVU3710 + 12139 0050 02F58062 add r2, r2, #1024 + 12140 0054 9342 cmp r3, r2 + 12141 0056 36D0 beq .L880 + 12142 .L881: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12143 .loc 1 1949 7 is_stmt 1 discriminator 5 view .LVU3711 +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12144 .loc 1 1953 5 view .LVU3712 +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12145 .loc 1 1953 5 view .LVU3713 + 12146 0058 2368 ldr r3, [r4] + 12147 005a 196A ldr r1, [r3, #32] + 12148 005c 41F21112 movw r2, #4369 + 12149 0060 1142 tst r1, r2 + 12150 0062 08D1 bne .L882 +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12151 .loc 1 1953 5 discriminator 1 view .LVU3714 + 12152 0064 196A ldr r1, [r3, #32] + 12153 0066 40F24442 movw r2, #1092 + 12154 006a 1142 tst r1, r2 + 12155 006c 03D1 bne .L882 +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12156 .loc 1 1953 5 discriminator 3 view .LVU3715 + 12157 006e 1A68 ldr r2, [r3] + 12158 0070 22F00102 bic r2, r2, #1 + 12159 0074 1A60 str r2, [r3] + 12160 .L882: +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12161 .loc 1 1953 5 discriminator 5 view .LVU3716 +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12162 .loc 1 1956 5 view .LVU3717 + 12163 0076 102D cmp r5, #16 + 12164 0078 4DD8 bhi .L883 + 12165 007a DFE805F0 tbb [pc, r5] + 12166 .L885: + 12167 007e 33 .byte (.L889-.L885)/2 + 12168 007f 4C .byte (.L883-.L885)/2 + 12169 0080 4C .byte (.L883-.L885)/2 + 12170 0081 4C .byte (.L883-.L885)/2 + 12171 0082 38 .byte (.L888-.L885)/2 + 12172 0083 4C .byte (.L883-.L885)/2 + 12173 0084 4C .byte (.L883-.L885)/2 + 12174 0085 4C .byte (.L883-.L885)/2 + 12175 0086 3D .byte (.L887-.L885)/2 + 12176 0087 4C .byte (.L883-.L885)/2 + 12177 0088 4C .byte (.L883-.L885)/2 + 12178 0089 4C .byte (.L883-.L885)/2 + 12179 008a 42 .byte (.L886-.L885)/2 + 12180 008b 4C .byte (.L883-.L885)/2 + 12181 008c 4C .byte (.L883-.L885)/2 + 12182 008d 4C .byte (.L883-.L885)/2 + 12183 008e 47 .byte (.L884-.L885)/2 + 12184 .LVL910: + 12185 008f 00 .p2align 1 + ARM GAS /tmp/cc0aF2h1.s page 407 + + + 12186 .L877: +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 12187 .loc 1 1915 7 view .LVU3718 + 12188 0090 0268 ldr r2, [r0] + 12189 0092 D368 ldr r3, [r2, #12] + 12190 0094 23F48063 bic r3, r3, #1024 + 12191 0098 D360 str r3, [r2, #12] +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12192 .loc 1 1916 7 view .LVU3719 +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12193 .loc 1 1916 13 is_stmt 0 view .LVU3720 + 12194 009a 806A ldr r0, [r0, #40] + 12195 .LVL911: +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12196 .loc 1 1916 13 view .LVU3721 + 12197 009c FFF7FEFF bl HAL_DMA_Abort_IT + 12198 .LVL912: +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12199 .loc 1 1917 7 is_stmt 1 view .LVU3722 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12200 .loc 1 1941 3 view .LVU3723 + 12201 00a0 C5E7 b .L879 + 12202 .LVL913: + 12203 .L876: +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 12204 .loc 1 1923 7 view .LVU3724 + 12205 00a2 0268 ldr r2, [r0] + 12206 00a4 D368 ldr r3, [r2, #12] + 12207 00a6 23F40063 bic r3, r3, #2048 + 12208 00aa D360 str r3, [r2, #12] +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12209 .loc 1 1924 7 view .LVU3725 +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12210 .loc 1 1924 13 is_stmt 0 view .LVU3726 + 12211 00ac C06A ldr r0, [r0, #44] + 12212 .LVL914: +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12213 .loc 1 1924 13 view .LVU3727 + 12214 00ae FFF7FEFF bl HAL_DMA_Abort_IT + 12215 .LVL915: +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12216 .loc 1 1925 7 is_stmt 1 view .LVU3728 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12217 .loc 1 1941 3 view .LVU3729 + 12218 00b2 BCE7 b .L879 + 12219 .LVL916: + 12220 .L874: +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 12221 .loc 1 1931 7 view .LVU3730 + 12222 00b4 0268 ldr r2, [r0] + 12223 00b6 D368 ldr r3, [r2, #12] + 12224 00b8 23F48053 bic r3, r3, #4096 + 12225 00bc D360 str r3, [r2, #12] +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12226 .loc 1 1932 7 view .LVU3731 +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12227 .loc 1 1932 13 is_stmt 0 view .LVU3732 + ARM GAS /tmp/cc0aF2h1.s page 408 + + + 12228 00be 006B ldr r0, [r0, #48] + 12229 .LVL917: +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12230 .loc 1 1932 13 view .LVU3733 + 12231 00c0 FFF7FEFF bl HAL_DMA_Abort_IT + 12232 .LVL918: +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12233 .loc 1 1933 7 is_stmt 1 view .LVU3734 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12234 .loc 1 1941 3 view .LVU3735 + 12235 00c4 B3E7 b .L879 + 12236 .L880: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12237 .loc 1 1949 7 view .LVU3736 +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12238 .loc 1 1949 7 view .LVU3737 + 12239 00c6 196A ldr r1, [r3, #32] + 12240 00c8 41F21112 movw r2, #4369 + 12241 00cc 1142 tst r1, r2 + 12242 00ce C3D1 bne .L881 +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12243 .loc 1 1949 7 discriminator 1 view .LVU3738 + 12244 00d0 196A ldr r1, [r3, #32] + 12245 00d2 40F24442 movw r2, #1092 + 12246 00d6 1142 tst r1, r2 + 12247 00d8 BED1 bne .L881 +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12248 .loc 1 1949 7 discriminator 3 view .LVU3739 + 12249 00da 5A6C ldr r2, [r3, #68] + 12250 00dc 22F40042 bic r2, r2, #32768 + 12251 00e0 5A64 str r2, [r3, #68] + 12252 00e2 B9E7 b .L881 + 12253 .L889: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12254 .loc 1 1956 5 is_stmt 0 discriminator 1 view .LVU3740 + 12255 00e4 0123 movs r3, #1 + 12256 00e6 84F83E30 strb r3, [r4, #62] + 12257 00ea 0020 movs r0, #0 + 12258 00ec 19E0 b .L873 + 12259 .L888: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12260 .loc 1 1956 5 discriminator 3 view .LVU3741 + 12261 00ee 0123 movs r3, #1 + 12262 00f0 84F83F30 strb r3, [r4, #63] + 12263 00f4 0020 movs r0, #0 + 12264 00f6 14E0 b .L873 + 12265 .L887: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12266 .loc 1 1956 5 discriminator 6 view .LVU3742 + 12267 00f8 0123 movs r3, #1 + 12268 00fa 84F84030 strb r3, [r4, #64] + 12269 00fe 0020 movs r0, #0 + 12270 0100 0FE0 b .L873 + 12271 .L886: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12272 .loc 1 1956 5 discriminator 9 view .LVU3743 + 12273 0102 0123 movs r3, #1 + ARM GAS /tmp/cc0aF2h1.s page 409 + + + 12274 0104 84F84130 strb r3, [r4, #65] + 12275 0108 0020 movs r0, #0 + 12276 010a 0AE0 b .L873 + 12277 .L884: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12278 .loc 1 1956 5 discriminator 12 view .LVU3744 + 12279 010c 0123 movs r3, #1 + 12280 010e 84F84230 strb r3, [r4, #66] + 12281 0112 0020 movs r0, #0 + 12282 0114 05E0 b .L873 + 12283 .L883: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12284 .loc 1 1956 5 discriminator 13 view .LVU3745 + 12285 0116 0123 movs r3, #1 + 12286 0118 84F84330 strb r3, [r4, #67] + 12287 011c 0020 movs r0, #0 + 12288 011e 00E0 b .L873 + 12289 .LVL919: + 12290 .L890: +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12291 .loc 1 1902 3 view .LVU3746 + 12292 0120 0120 movs r0, #1 + 12293 .LVL920: + 12294 .L873: +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12295 .loc 1 1960 3 is_stmt 1 view .LVU3747 +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12296 .loc 1 1961 1 is_stmt 0 view .LVU3748 + 12297 0122 38BD pop {r3, r4, r5, pc} + 12298 .LVL921: + 12299 .L893: +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12300 .loc 1 1961 1 view .LVU3749 + 12301 .align 2 + 12302 .L892: + 12303 0124 002C0140 .word 1073818624 + 12304 .cfi_endproc + 12305 .LFE159: + 12307 .section .text.HAL_TIM_IC_Start,"ax",%progbits + 12308 .align 1 + 12309 .global HAL_TIM_IC_Start + 12310 .syntax unified + 12311 .thumb + 12312 .thumb_func + 12314 HAL_TIM_IC_Start: + 12315 .LVL922: + 12316 .LFB164: +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 12317 .loc 1 2138 1 is_stmt 1 view -0 + 12318 .cfi_startproc + 12319 @ args = 0, pretend = 0, frame = 0 + 12320 @ frame_needed = 0, uses_anonymous_args = 0 +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 12321 .loc 1 2138 1 is_stmt 0 view .LVU3751 + 12322 0000 10B5 push {r4, lr} + 12323 .cfi_def_cfa_offset 8 + 12324 .cfi_offset 4, -8 + ARM GAS /tmp/cc0aF2h1.s page 410 + + + 12325 .cfi_offset 14, -4 + 12326 0002 0446 mov r4, r0 +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); + 12327 .loc 1 2139 3 is_stmt 1 view .LVU3752 +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12328 .loc 1 2140 3 view .LVU3753 + 12329 0004 1029 cmp r1, #16 + 12330 0006 34D8 bhi .L895 + 12331 0008 DFE801F0 tbb [pc, r1] + 12332 .L897: + 12333 000c 09 .byte (.L901-.L897)/2 + 12334 000d 33 .byte (.L895-.L897)/2 + 12335 000e 33 .byte (.L895-.L897)/2 + 12336 000f 33 .byte (.L895-.L897)/2 + 12337 0010 23 .byte (.L900-.L897)/2 + 12338 0011 33 .byte (.L895-.L897)/2 + 12339 0012 33 .byte (.L895-.L897)/2 + 12340 0013 33 .byte (.L895-.L897)/2 + 12341 0014 27 .byte (.L899-.L897)/2 + 12342 0015 33 .byte (.L895-.L897)/2 + 12343 0016 33 .byte (.L895-.L897)/2 + 12344 0017 33 .byte (.L895-.L897)/2 + 12345 0018 2B .byte (.L898-.L897)/2 + 12346 0019 33 .byte (.L895-.L897)/2 + 12347 001a 33 .byte (.L895-.L897)/2 + 12348 001b 33 .byte (.L895-.L897)/2 + 12349 001c 2F .byte (.L896-.L897)/2 + 12350 001d 00 .p2align 1 + 12351 .L901: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12352 .loc 1 2140 47 is_stmt 0 discriminator 1 view .LVU3754 + 12353 001e 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 12354 .LVL923: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12355 .loc 1 2140 47 discriminator 1 view .LVU3755 + 12356 0022 C0B2 uxtb r0, r0 + 12357 .L902: + 12358 .LVL924: +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12359 .loc 1 2141 3 is_stmt 1 view .LVU3756 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12360 .loc 1 2141 61 is_stmt 0 view .LVU3757 + 12361 0024 49BB cbnz r1, .L903 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12362 .loc 1 2141 61 discriminator 1 view .LVU3758 + 12363 0026 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 + 12364 002a DBB2 uxtb r3, r3 + 12365 .L904: + 12366 .LVL925: +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12367 .loc 1 2144 3 is_stmt 1 view .LVU3759 +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12368 .loc 1 2147 3 view .LVU3760 +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12369 .loc 1 2147 6 is_stmt 0 view .LVU3761 + 12370 002c 0128 cmp r0, #1 + 12371 002e 40F08780 bne .L921 + ARM GAS /tmp/cc0aF2h1.s page 411 + + +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12372 .loc 1 2148 7 view .LVU3762 + 12373 0032 012B cmp r3, #1 + 12374 0034 40F08580 bne .L907 +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12375 .loc 1 2154 3 is_stmt 1 view .LVU3763 + 12376 0038 1029 cmp r1, #16 + 12377 003a 67D8 bhi .L908 + 12378 003c DFE801F0 tbb [pc, r1] + 12379 .LVL926: + 12380 .L910: + 12381 0040 2D .byte (.L914-.L910)/2 + 12382 0041 66 .byte (.L908-.L910)/2 + 12383 0042 66 .byte (.L908-.L910)/2 + 12384 0043 66 .byte (.L908-.L910)/2 + 12385 0044 33 .byte (.L913-.L910)/2 + 12386 0045 66 .byte (.L908-.L910)/2 + 12387 0046 66 .byte (.L908-.L910)/2 + 12388 0047 66 .byte (.L908-.L910)/2 + 12389 0048 5A .byte (.L912-.L910)/2 + 12390 0049 66 .byte (.L908-.L910)/2 + 12391 004a 66 .byte (.L908-.L910)/2 + 12392 004b 66 .byte (.L908-.L910)/2 + 12393 004c 5E .byte (.L911-.L910)/2 + 12394 004d 66 .byte (.L908-.L910)/2 + 12395 004e 66 .byte (.L908-.L910)/2 + 12396 004f 66 .byte (.L908-.L910)/2 + 12397 0050 62 .byte (.L909-.L910)/2 + 12398 0051 00 .p2align 1 + 12399 .L900: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12400 .loc 1 2140 47 is_stmt 0 discriminator 4 view .LVU3764 + 12401 0052 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 12402 .LVL927: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12403 .loc 1 2140 47 discriminator 4 view .LVU3765 + 12404 0056 C0B2 uxtb r0, r0 + 12405 0058 E4E7 b .L902 + 12406 .LVL928: + 12407 .L899: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12408 .loc 1 2140 47 discriminator 7 view .LVU3766 + 12409 005a 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 12410 .LVL929: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12411 .loc 1 2140 47 discriminator 7 view .LVU3767 + 12412 005e C0B2 uxtb r0, r0 + 12413 0060 E0E7 b .L902 + 12414 .LVL930: + 12415 .L898: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12416 .loc 1 2140 47 discriminator 10 view .LVU3768 + 12417 0062 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 12418 .LVL931: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12419 .loc 1 2140 47 discriminator 10 view .LVU3769 + 12420 0066 C0B2 uxtb r0, r0 + ARM GAS /tmp/cc0aF2h1.s page 412 + + + 12421 0068 DCE7 b .L902 + 12422 .LVL932: + 12423 .L896: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12424 .loc 1 2140 47 discriminator 13 view .LVU3770 + 12425 006a 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 12426 .LVL933: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12427 .loc 1 2140 47 discriminator 13 view .LVU3771 + 12428 006e C0B2 uxtb r0, r0 + 12429 0070 D8E7 b .L902 + 12430 .LVL934: + 12431 .L895: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12432 .loc 1 2140 47 discriminator 14 view .LVU3772 + 12433 0072 90F84300 ldrb r0, [r0, #67] @ zero_extendqisi2 + 12434 .LVL935: +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12435 .loc 1 2140 47 discriminator 14 view .LVU3773 + 12436 0076 C0B2 uxtb r0, r0 + 12437 0078 D4E7 b .L902 + 12438 .LVL936: + 12439 .L903: +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12440 .loc 1 2141 61 discriminator 2 view .LVU3774 + 12441 007a 0429 cmp r1, #4 + 12442 007c 05D0 beq .L925 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12443 .loc 1 2141 61 discriminator 5 view .LVU3775 + 12444 007e 0829 cmp r1, #8 + 12445 0080 07D0 beq .L926 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12446 .loc 1 2141 61 discriminator 8 view .LVU3776 + 12447 0082 94F84730 ldrb r3, [r4, #71] @ zero_extendqisi2 + 12448 0086 DBB2 uxtb r3, r3 + 12449 0088 D0E7 b .L904 + 12450 .L925: +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12451 .loc 1 2141 61 discriminator 4 view .LVU3777 + 12452 008a 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 12453 008e DBB2 uxtb r3, r3 + 12454 0090 CCE7 b .L904 + 12455 .L926: +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12456 .loc 1 2141 61 discriminator 7 view .LVU3778 + 12457 0092 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 + 12458 0096 DBB2 uxtb r3, r3 + 12459 0098 C8E7 b .L904 + 12460 .LVL937: + 12461 .L914: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12462 .loc 1 2154 3 discriminator 1 view .LVU3779 + 12463 009a 0223 movs r3, #2 + 12464 009c 84F83E30 strb r3, [r4, #62] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12465 .loc 1 2155 3 is_stmt 1 view .LVU3780 +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 413 + + + 12466 .loc 1 2155 3 is_stmt 0 discriminator 1 view .LVU3781 + 12467 00a0 84F84430 strb r3, [r4, #68] + 12468 00a4 09E0 b .L915 + 12469 .L913: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12470 .loc 1 2154 3 discriminator 3 view .LVU3782 + 12471 00a6 0223 movs r3, #2 + 12472 00a8 84F83F30 strb r3, [r4, #63] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12473 .loc 1 2155 3 is_stmt 1 view .LVU3783 + 12474 .L916: +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12475 .loc 1 2155 3 is_stmt 0 discriminator 2 view .LVU3784 + 12476 00ac 0429 cmp r1, #4 + 12477 00ae 31D0 beq .L927 +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12478 .loc 1 2155 3 discriminator 4 view .LVU3785 + 12479 00b0 0829 cmp r1, #8 + 12480 00b2 33D0 beq .L928 +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12481 .loc 1 2155 3 discriminator 7 view .LVU3786 + 12482 00b4 0223 movs r3, #2 + 12483 00b6 84F84730 strb r3, [r4, #71] + 12484 .L915: +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12485 .loc 1 2158 3 is_stmt 1 view .LVU3787 + 12486 00ba 0122 movs r2, #1 + 12487 00bc 2068 ldr r0, [r4] + 12488 .LVL938: +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12489 .loc 1 2158 3 is_stmt 0 view .LVU3788 + 12490 00be FFF7FEFF bl TIM_CCxChannelCmd + 12491 .LVL939: +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12492 .loc 1 2161 3 is_stmt 1 view .LVU3789 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12493 .loc 1 2161 7 is_stmt 0 view .LVU3790 + 12494 00c2 2368 ldr r3, [r4] +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12495 .loc 1 2161 6 view .LVU3791 + 12496 00c4 214A ldr r2, .L929 + 12497 00c6 9342 cmp r3, r2 + 12498 00c8 2CD0 beq .L919 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12499 .loc 1 2161 7 discriminator 1 view .LVU3792 + 12500 00ca B3F1804F cmp r3, #1073741824 + 12501 00ce 29D0 beq .L919 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12502 .loc 1 2161 7 discriminator 2 view .LVU3793 + 12503 00d0 A2F59432 sub r2, r2, #75776 + 12504 00d4 9342 cmp r3, r2 + 12505 00d6 25D0 beq .L919 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12506 .loc 1 2161 7 discriminator 3 view .LVU3794 + 12507 00d8 02F58062 add r2, r2, #1024 + 12508 00dc 9342 cmp r3, r2 + 12509 00de 21D0 beq .L919 + ARM GAS /tmp/cc0aF2h1.s page 414 + + +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12510 .loc 1 2161 7 discriminator 4 view .LVU3795 + 12511 00e0 02F59C32 add r2, r2, #79872 + 12512 00e4 9342 cmp r3, r2 + 12513 00e6 1DD0 beq .L919 +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12514 .loc 1 2171 5 is_stmt 1 view .LVU3796 + 12515 00e8 1A68 ldr r2, [r3] + 12516 00ea 42F00102 orr r2, r2, #1 + 12517 00ee 1A60 str r2, [r3] +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12518 .loc 1 2175 10 is_stmt 0 view .LVU3797 + 12519 00f0 0020 movs r0, #0 + 12520 00f2 26E0 b .L907 + 12521 .LVL940: + 12522 .L912: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12523 .loc 1 2154 3 discriminator 6 view .LVU3798 + 12524 00f4 0223 movs r3, #2 + 12525 00f6 84F84030 strb r3, [r4, #64] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12526 .loc 1 2155 3 is_stmt 1 view .LVU3799 + 12527 00fa D7E7 b .L916 + 12528 .L911: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12529 .loc 1 2154 3 is_stmt 0 discriminator 9 view .LVU3800 + 12530 00fc 0223 movs r3, #2 + 12531 00fe 84F84130 strb r3, [r4, #65] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12532 .loc 1 2155 3 is_stmt 1 view .LVU3801 + 12533 0102 D3E7 b .L916 + 12534 .L909: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12535 .loc 1 2154 3 is_stmt 0 discriminator 12 view .LVU3802 + 12536 0104 0223 movs r3, #2 + 12537 0106 84F84230 strb r3, [r4, #66] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12538 .loc 1 2155 3 is_stmt 1 view .LVU3803 + 12539 010a CFE7 b .L916 + 12540 .L908: +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12541 .loc 1 2154 3 is_stmt 0 discriminator 13 view .LVU3804 + 12542 010c 0223 movs r3, #2 + 12543 010e 84F84330 strb r3, [r4, #67] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12544 .loc 1 2155 3 is_stmt 1 view .LVU3805 + 12545 0112 CBE7 b .L916 + 12546 .L927: +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12547 .loc 1 2155 3 is_stmt 0 discriminator 3 view .LVU3806 + 12548 0114 0223 movs r3, #2 + 12549 0116 84F84530 strb r3, [r4, #69] + 12550 011a CEE7 b .L915 + 12551 .L928: +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12552 .loc 1 2155 3 discriminator 6 view .LVU3807 + 12553 011c 0223 movs r3, #2 + ARM GAS /tmp/cc0aF2h1.s page 415 + + + 12554 011e 84F84630 strb r3, [r4, #70] + 12555 0122 CAE7 b .L915 + 12556 .LVL941: + 12557 .L919: +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12558 .loc 1 2163 5 is_stmt 1 view .LVU3808 +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12559 .loc 1 2163 29 is_stmt 0 view .LVU3809 + 12560 0124 9968 ldr r1, [r3, #8] +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12561 .loc 1 2163 13 view .LVU3810 + 12562 0126 0A4A ldr r2, .L929+4 + 12563 0128 0A40 ands r2, r2, r1 + 12564 .LVL942: +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12565 .loc 1 2164 5 is_stmt 1 view .LVU3811 +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12566 .loc 1 2164 8 is_stmt 0 view .LVU3812 + 12567 012a 062A cmp r2, #6 + 12568 012c 0AD0 beq .L922 +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12569 .loc 1 2164 9 discriminator 1 view .LVU3813 + 12570 012e B2F5803F cmp r2, #65536 + 12571 0132 09D0 beq .L923 +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12572 .loc 1 2166 7 is_stmt 1 view .LVU3814 + 12573 0134 1A68 ldr r2, [r3] + 12574 .LVL943: +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12575 .loc 1 2166 7 is_stmt 0 view .LVU3815 + 12576 0136 42F00102 orr r2, r2, #1 + 12577 013a 1A60 str r2, [r3] +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12578 .loc 1 2175 10 view .LVU3816 + 12579 013c 0020 movs r0, #0 + 12580 013e 00E0 b .L907 + 12581 .LVL944: + 12582 .L921: +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12583 .loc 1 2150 12 view .LVU3817 + 12584 0140 0120 movs r0, #1 + 12585 .LVL945: + 12586 .L907: +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12587 .loc 1 2176 1 view .LVU3818 + 12588 0142 10BD pop {r4, pc} + 12589 .LVL946: + 12590 .L922: +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12591 .loc 1 2175 10 view .LVU3819 + 12592 0144 0020 movs r0, #0 + 12593 0146 FCE7 b .L907 + 12594 .L923: + 12595 0148 0020 movs r0, #0 + 12596 014a FAE7 b .L907 + 12597 .L930: + 12598 .align 2 + ARM GAS /tmp/cc0aF2h1.s page 416 + + + 12599 .L929: + 12600 014c 002C0140 .word 1073818624 + 12601 0150 07000100 .word 65543 + 12602 .cfi_endproc + 12603 .LFE164: + 12605 .section .text.HAL_TIM_IC_Stop,"ax",%progbits + 12606 .align 1 + 12607 .global HAL_TIM_IC_Stop + 12608 .syntax unified + 12609 .thumb + 12610 .thumb_func + 12612 HAL_TIM_IC_Stop: + 12613 .LVL947: + 12614 .LFB165: +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 12615 .loc 1 2190 1 is_stmt 1 view -0 + 12616 .cfi_startproc + 12617 @ args = 0, pretend = 0, frame = 0 + 12618 @ frame_needed = 0, uses_anonymous_args = 0 +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 12619 .loc 1 2190 1 is_stmt 0 view .LVU3821 + 12620 0000 38B5 push {r3, r4, r5, lr} + 12621 .cfi_def_cfa_offset 16 + 12622 .cfi_offset 3, -16 + 12623 .cfi_offset 4, -12 + 12624 .cfi_offset 5, -8 + 12625 .cfi_offset 14, -4 + 12626 0002 0446 mov r4, r0 + 12627 0004 0D46 mov r5, r1 +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12628 .loc 1 2192 3 is_stmt 1 view .LVU3822 +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12629 .loc 1 2195 3 view .LVU3823 + 12630 0006 0022 movs r2, #0 + 12631 0008 0068 ldr r0, [r0] + 12632 .LVL948: +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12633 .loc 1 2195 3 is_stmt 0 view .LVU3824 + 12634 000a FFF7FEFF bl TIM_CCxChannelCmd + 12635 .LVL949: +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12636 .loc 1 2198 3 is_stmt 1 view .LVU3825 +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12637 .loc 1 2198 3 view .LVU3826 + 12638 000e 2368 ldr r3, [r4] + 12639 0010 196A ldr r1, [r3, #32] + 12640 0012 41F21112 movw r2, #4369 + 12641 0016 1142 tst r1, r2 + 12642 0018 08D1 bne .L932 +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12643 .loc 1 2198 3 discriminator 1 view .LVU3827 + 12644 001a 196A ldr r1, [r3, #32] + 12645 001c 40F24442 movw r2, #1092 + 12646 0020 1142 tst r1, r2 + 12647 0022 03D1 bne .L932 +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12648 .loc 1 2198 3 discriminator 3 view .LVU3828 + ARM GAS /tmp/cc0aF2h1.s page 417 + + + 12649 0024 1A68 ldr r2, [r3] + 12650 0026 22F00102 bic r2, r2, #1 + 12651 002a 1A60 str r2, [r3] + 12652 .L932: +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12653 .loc 1 2198 3 discriminator 5 view .LVU3829 +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12654 .loc 1 2201 3 view .LVU3830 + 12655 002c 102D cmp r5, #16 + 12656 002e 28D8 bhi .L933 + 12657 0030 DFE805F0 tbb [pc, r5] + 12658 .L935: + 12659 0034 09 .byte (.L939-.L935)/2 + 12660 0035 27 .byte (.L933-.L935)/2 + 12661 0036 27 .byte (.L933-.L935)/2 + 12662 0037 27 .byte (.L933-.L935)/2 + 12663 0038 0F .byte (.L938-.L935)/2 + 12664 0039 27 .byte (.L933-.L935)/2 + 12665 003a 27 .byte (.L933-.L935)/2 + 12666 003b 27 .byte (.L933-.L935)/2 + 12667 003c 1B .byte (.L937-.L935)/2 + 12668 003d 27 .byte (.L933-.L935)/2 + 12669 003e 27 .byte (.L933-.L935)/2 + 12670 003f 27 .byte (.L933-.L935)/2 + 12671 0040 1F .byte (.L936-.L935)/2 + 12672 0041 27 .byte (.L933-.L935)/2 + 12673 0042 27 .byte (.L933-.L935)/2 + 12674 0043 27 .byte (.L933-.L935)/2 + 12675 0044 23 .byte (.L934-.L935)/2 + 12676 0045 00 .p2align 1 + 12677 .L939: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12678 .loc 1 2201 3 is_stmt 0 discriminator 1 view .LVU3831 + 12679 0046 0123 movs r3, #1 + 12680 0048 84F83E30 strb r3, [r4, #62] +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12681 .loc 1 2202 3 is_stmt 1 view .LVU3832 +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12682 .loc 1 2202 3 is_stmt 0 discriminator 1 view .LVU3833 + 12683 004c 84F84430 strb r3, [r4, #68] + 12684 0050 09E0 b .L940 + 12685 .L938: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12686 .loc 1 2201 3 discriminator 3 view .LVU3834 + 12687 0052 0123 movs r3, #1 + 12688 0054 84F83F30 strb r3, [r4, #63] +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12689 .loc 1 2202 3 is_stmt 1 view .LVU3835 + 12690 .L941: +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12691 .loc 1 2202 3 is_stmt 0 discriminator 2 view .LVU3836 + 12692 0058 042D cmp r5, #4 + 12693 005a 16D0 beq .L945 +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12694 .loc 1 2202 3 discriminator 4 view .LVU3837 + 12695 005c 082D cmp r5, #8 + 12696 005e 18D0 beq .L946 + ARM GAS /tmp/cc0aF2h1.s page 418 + + +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12697 .loc 1 2202 3 discriminator 7 view .LVU3838 + 12698 0060 0123 movs r3, #1 + 12699 0062 84F84730 strb r3, [r4, #71] + 12700 .L940: +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12701 .loc 1 2205 3 is_stmt 1 view .LVU3839 +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12702 .loc 1 2206 1 is_stmt 0 view .LVU3840 + 12703 0066 0020 movs r0, #0 + 12704 0068 38BD pop {r3, r4, r5, pc} + 12705 .LVL950: + 12706 .L937: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12707 .loc 1 2201 3 discriminator 6 view .LVU3841 + 12708 006a 0123 movs r3, #1 + 12709 006c 84F84030 strb r3, [r4, #64] +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12710 .loc 1 2202 3 is_stmt 1 view .LVU3842 + 12711 0070 F2E7 b .L941 + 12712 .L936: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12713 .loc 1 2201 3 is_stmt 0 discriminator 9 view .LVU3843 + 12714 0072 0123 movs r3, #1 + 12715 0074 84F84130 strb r3, [r4, #65] +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12716 .loc 1 2202 3 is_stmt 1 view .LVU3844 + 12717 0078 EEE7 b .L941 + 12718 .L934: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12719 .loc 1 2201 3 is_stmt 0 discriminator 12 view .LVU3845 + 12720 007a 0123 movs r3, #1 + 12721 007c 84F84230 strb r3, [r4, #66] +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12722 .loc 1 2202 3 is_stmt 1 view .LVU3846 + 12723 0080 EAE7 b .L941 + 12724 .L933: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12725 .loc 1 2201 3 is_stmt 0 discriminator 13 view .LVU3847 + 12726 0082 0123 movs r3, #1 + 12727 0084 84F84330 strb r3, [r4, #67] +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12728 .loc 1 2202 3 is_stmt 1 view .LVU3848 + 12729 0088 E6E7 b .L941 + 12730 .L945: +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12731 .loc 1 2202 3 is_stmt 0 discriminator 3 view .LVU3849 + 12732 008a 0123 movs r3, #1 + 12733 008c 84F84530 strb r3, [r4, #69] + 12734 0090 E9E7 b .L940 + 12735 .L946: +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12736 .loc 1 2202 3 discriminator 6 view .LVU3850 + 12737 0092 0123 movs r3, #1 + 12738 0094 84F84630 strb r3, [r4, #70] + 12739 0098 E5E7 b .L940 + 12740 .cfi_endproc + ARM GAS /tmp/cc0aF2h1.s page 419 + + + 12741 .LFE165: + 12743 .section .text.HAL_TIM_IC_Start_IT,"ax",%progbits + 12744 .align 1 + 12745 .global HAL_TIM_IC_Start_IT + 12746 .syntax unified + 12747 .thumb + 12748 .thumb_func + 12750 HAL_TIM_IC_Start_IT: + 12751 .LVL951: + 12752 .LFB166: +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12753 .loc 1 2220 1 is_stmt 1 view -0 + 12754 .cfi_startproc + 12755 @ args = 0, pretend = 0, frame = 0 + 12756 @ frame_needed = 0, uses_anonymous_args = 0 +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12757 .loc 1 2220 1 is_stmt 0 view .LVU3852 + 12758 0000 10B5 push {r4, lr} + 12759 .cfi_def_cfa_offset 8 + 12760 .cfi_offset 4, -8 + 12761 .cfi_offset 14, -4 + 12762 0002 0446 mov r4, r0 +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 12763 .loc 1 2221 3 is_stmt 1 view .LVU3853 + 12764 .LVL952: +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12765 .loc 1 2222 3 view .LVU3854 +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12766 .loc 1 2224 3 view .LVU3855 + 12767 0004 1029 cmp r1, #16 + 12768 0006 34D8 bhi .L948 + 12769 0008 DFE801F0 tbb [pc, r1] + 12770 .L950: + 12771 000c 09 .byte (.L954-.L950)/2 + 12772 000d 33 .byte (.L948-.L950)/2 + 12773 000e 33 .byte (.L948-.L950)/2 + 12774 000f 33 .byte (.L948-.L950)/2 + 12775 0010 23 .byte (.L953-.L950)/2 + 12776 0011 33 .byte (.L948-.L950)/2 + 12777 0012 33 .byte (.L948-.L950)/2 + 12778 0013 33 .byte (.L948-.L950)/2 + 12779 0014 27 .byte (.L952-.L950)/2 + 12780 0015 33 .byte (.L948-.L950)/2 + 12781 0016 33 .byte (.L948-.L950)/2 + 12782 0017 33 .byte (.L948-.L950)/2 + 12783 0018 2B .byte (.L951-.L950)/2 + 12784 0019 33 .byte (.L948-.L950)/2 + 12785 001a 33 .byte (.L948-.L950)/2 + 12786 001b 33 .byte (.L948-.L950)/2 + 12787 001c 2F .byte (.L949-.L950)/2 + 12788 001d 00 .p2align 1 + 12789 .L954: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12790 .loc 1 2224 47 is_stmt 0 discriminator 1 view .LVU3856 + 12791 001e 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 12792 .LVL953: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + ARM GAS /tmp/cc0aF2h1.s page 420 + + + 12793 .loc 1 2224 47 discriminator 1 view .LVU3857 + 12794 0022 C0B2 uxtb r0, r0 + 12795 .L955: + 12796 .LVL954: +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12797 .loc 1 2225 3 is_stmt 1 view .LVU3858 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12798 .loc 1 2225 61 is_stmt 0 view .LVU3859 + 12799 0024 49BB cbnz r1, .L956 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12800 .loc 1 2225 61 discriminator 1 view .LVU3860 + 12801 0026 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 + 12802 002a DBB2 uxtb r3, r3 + 12803 .L957: + 12804 .LVL955: +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12805 .loc 1 2228 3 is_stmt 1 view .LVU3861 +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12806 .loc 1 2231 3 view .LVU3862 +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12807 .loc 1 2231 6 is_stmt 0 view .LVU3863 + 12808 002c 0128 cmp r0, #1 + 12809 002e 40F0A780 bne .L980 +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12810 .loc 1 2232 7 view .LVU3864 + 12811 0032 012B cmp r3, #1 + 12812 0034 40F0A580 bne .L960 +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12813 .loc 1 2238 3 is_stmt 1 view .LVU3865 + 12814 0038 1029 cmp r1, #16 + 12815 003a 55D8 bhi .L961 + 12816 003c DFE801F0 tbb [pc, r1] + 12817 .L963: + 12818 0040 2D .byte (.L967-.L963)/2 + 12819 0041 54 .byte (.L961-.L963)/2 + 12820 0042 54 .byte (.L961-.L963)/2 + 12821 0043 54 .byte (.L961-.L963)/2 + 12822 0044 33 .byte (.L966-.L963)/2 + 12823 0045 54 .byte (.L961-.L963)/2 + 12824 0046 54 .byte (.L961-.L963)/2 + 12825 0047 54 .byte (.L961-.L963)/2 + 12826 0048 48 .byte (.L965-.L963)/2 + 12827 0049 54 .byte (.L961-.L963)/2 + 12828 004a 54 .byte (.L961-.L963)/2 + 12829 004b 54 .byte (.L961-.L963)/2 + 12830 004c 4C .byte (.L964-.L963)/2 + 12831 004d 54 .byte (.L961-.L963)/2 + 12832 004e 54 .byte (.L961-.L963)/2 + 12833 004f 54 .byte (.L961-.L963)/2 + 12834 0050 50 .byte (.L962-.L963)/2 + 12835 .LVL956: + 12836 0051 00 .p2align 1 + 12837 .L953: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12838 .loc 1 2224 47 is_stmt 0 discriminator 4 view .LVU3866 + 12839 0052 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 12840 .LVL957: + ARM GAS /tmp/cc0aF2h1.s page 421 + + +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12841 .loc 1 2224 47 discriminator 4 view .LVU3867 + 12842 0056 C0B2 uxtb r0, r0 + 12843 0058 E4E7 b .L955 + 12844 .LVL958: + 12845 .L952: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12846 .loc 1 2224 47 discriminator 7 view .LVU3868 + 12847 005a 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 12848 .LVL959: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12849 .loc 1 2224 47 discriminator 7 view .LVU3869 + 12850 005e C0B2 uxtb r0, r0 + 12851 0060 E0E7 b .L955 + 12852 .LVL960: + 12853 .L951: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12854 .loc 1 2224 47 discriminator 10 view .LVU3870 + 12855 0062 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 12856 .LVL961: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12857 .loc 1 2224 47 discriminator 10 view .LVU3871 + 12858 0066 C0B2 uxtb r0, r0 + 12859 0068 DCE7 b .L955 + 12860 .LVL962: + 12861 .L949: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12862 .loc 1 2224 47 discriminator 13 view .LVU3872 + 12863 006a 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 12864 .LVL963: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12865 .loc 1 2224 47 discriminator 13 view .LVU3873 + 12866 006e C0B2 uxtb r0, r0 + 12867 0070 D8E7 b .L955 + 12868 .LVL964: + 12869 .L948: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12870 .loc 1 2224 47 discriminator 14 view .LVU3874 + 12871 0072 90F84300 ldrb r0, [r0, #67] @ zero_extendqisi2 + 12872 .LVL965: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12873 .loc 1 2224 47 discriminator 14 view .LVU3875 + 12874 0076 C0B2 uxtb r0, r0 + 12875 0078 D4E7 b .L955 + 12876 .LVL966: + 12877 .L956: +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12878 .loc 1 2225 61 discriminator 2 view .LVU3876 + 12879 007a 0429 cmp r1, #4 + 12880 007c 05D0 beq .L987 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12881 .loc 1 2225 61 discriminator 5 view .LVU3877 + 12882 007e 0829 cmp r1, #8 + 12883 0080 07D0 beq .L988 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12884 .loc 1 2225 61 discriminator 8 view .LVU3878 + 12885 0082 94F84730 ldrb r3, [r4, #71] @ zero_extendqisi2 + ARM GAS /tmp/cc0aF2h1.s page 422 + + + 12886 0086 DBB2 uxtb r3, r3 + 12887 0088 D0E7 b .L957 + 12888 .L987: +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12889 .loc 1 2225 61 discriminator 4 view .LVU3879 + 12890 008a 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 12891 008e DBB2 uxtb r3, r3 + 12892 0090 CCE7 b .L957 + 12893 .L988: +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12894 .loc 1 2225 61 discriminator 7 view .LVU3880 + 12895 0092 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 + 12896 0096 DBB2 uxtb r3, r3 + 12897 0098 C8E7 b .L957 + 12898 .LVL967: + 12899 .L967: +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12900 .loc 1 2238 3 discriminator 1 view .LVU3881 + 12901 009a 0222 movs r2, #2 + 12902 009c 84F83E20 strb r2, [r4, #62] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12903 .loc 1 2239 3 is_stmt 1 view .LVU3882 +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12904 .loc 1 2239 3 is_stmt 0 discriminator 1 view .LVU3883 + 12905 00a0 84F84420 strb r2, [r4, #68] + 12906 00a4 09E0 b .L968 + 12907 .L966: +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12908 .loc 1 2238 3 discriminator 3 view .LVU3884 + 12909 00a6 0222 movs r2, #2 + 12910 00a8 84F83F20 strb r2, [r4, #63] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12911 .loc 1 2239 3 is_stmt 1 view .LVU3885 + 12912 .L969: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12913 .loc 1 2239 3 is_stmt 0 discriminator 2 view .LVU3886 + 12914 00ac 0429 cmp r1, #4 + 12915 00ae 1FD0 beq .L989 +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12916 .loc 1 2239 3 discriminator 4 view .LVU3887 + 12917 00b0 0829 cmp r1, #8 + 12918 00b2 42D0 beq .L990 +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12919 .loc 1 2239 3 discriminator 7 view .LVU3888 + 12920 00b4 0222 movs r2, #2 + 12921 00b6 84F84720 strb r2, [r4, #71] + 12922 .L968: +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12923 .loc 1 2241 3 is_stmt 1 view .LVU3889 + 12924 00ba 0C29 cmp r1, #12 + 12925 00bc 62D8 bhi .L981 + 12926 00be DFE801F0 tbb [pc, r1] + 12927 .L975: + 12928 00c2 45 .byte (.L976-.L975)/2 + 12929 00c3 61 .byte (.L981-.L975)/2 + 12930 00c4 61 .byte (.L981-.L975)/2 + 12931 00c5 61 .byte (.L981-.L975)/2 + ARM GAS /tmp/cc0aF2h1.s page 423 + + + 12932 00c6 1A .byte (.L971-.L975)/2 + 12933 00c7 61 .byte (.L981-.L975)/2 + 12934 00c8 61 .byte (.L981-.L975)/2 + 12935 00c9 61 .byte (.L981-.L975)/2 + 12936 00ca 3F .byte (.L973-.L975)/2 + 12937 00cb 61 .byte (.L981-.L975)/2 + 12938 00cc 61 .byte (.L981-.L975)/2 + 12939 00cd 61 .byte (.L981-.L975)/2 + 12940 00ce 4B .byte (.L974-.L975)/2 + 12941 00cf 00 .p2align 1 + 12942 .L965: +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12943 .loc 1 2238 3 is_stmt 0 discriminator 6 view .LVU3890 + 12944 00d0 0222 movs r2, #2 + 12945 00d2 84F84020 strb r2, [r4, #64] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12946 .loc 1 2239 3 is_stmt 1 view .LVU3891 + 12947 00d6 E9E7 b .L969 + 12948 .L964: +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12949 .loc 1 2238 3 is_stmt 0 discriminator 9 view .LVU3892 + 12950 00d8 0222 movs r2, #2 + 12951 00da 84F84120 strb r2, [r4, #65] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12952 .loc 1 2239 3 is_stmt 1 view .LVU3893 + 12953 00de E5E7 b .L969 + 12954 .L962: +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12955 .loc 1 2238 3 is_stmt 0 discriminator 12 view .LVU3894 + 12956 00e0 0222 movs r2, #2 + 12957 00e2 84F84220 strb r2, [r4, #66] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12958 .loc 1 2239 3 is_stmt 1 view .LVU3895 + 12959 00e6 E1E7 b .L969 + 12960 .L961: +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12961 .loc 1 2238 3 is_stmt 0 discriminator 13 view .LVU3896 + 12962 00e8 0222 movs r2, #2 + 12963 00ea 84F84320 strb r2, [r4, #67] +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12964 .loc 1 2239 3 is_stmt 1 view .LVU3897 + 12965 00ee DDE7 b .L969 + 12966 .L989: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12967 .loc 1 2239 3 is_stmt 0 discriminator 3 view .LVU3898 + 12968 00f0 0223 movs r3, #2 + 12969 .LVL968: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12970 .loc 1 2239 3 discriminator 3 view .LVU3899 + 12971 00f2 84F84530 strb r3, [r4, #69] +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12972 .loc 1 2241 3 is_stmt 1 view .LVU3900 + 12973 .L971: +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 12974 .loc 1 2253 7 view .LVU3901 + 12975 00f6 2268 ldr r2, [r4] + 12976 00f8 D368 ldr r3, [r2, #12] + ARM GAS /tmp/cc0aF2h1.s page 424 + + + 12977 00fa 43F00403 orr r3, r3, #4 + 12978 00fe D360 str r3, [r2, #12] +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 12979 .loc 1 2254 7 view .LVU3902 +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12980 .loc 1 2276 3 view .LVU3903 + 12981 .L977: +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12982 .loc 1 2279 5 view .LVU3904 + 12983 0100 0122 movs r2, #1 + 12984 0102 2068 ldr r0, [r4] + 12985 .LVL969: +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 12986 .loc 1 2279 5 is_stmt 0 view .LVU3905 + 12987 0104 FFF7FEFF bl TIM_CCxChannelCmd + 12988 .LVL970: +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12989 .loc 1 2282 5 is_stmt 1 view .LVU3906 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12990 .loc 1 2282 9 is_stmt 0 view .LVU3907 + 12991 0108 2368 ldr r3, [r4] +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12992 .loc 1 2282 8 view .LVU3908 + 12993 010a 214A ldr r2, .L991 + 12994 010c 9342 cmp r3, r2 + 12995 010e 29D0 beq .L978 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12996 .loc 1 2282 9 discriminator 1 view .LVU3909 + 12997 0110 B3F1804F cmp r3, #1073741824 + 12998 0114 26D0 beq .L978 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 12999 .loc 1 2282 9 discriminator 2 view .LVU3910 + 13000 0116 A2F59432 sub r2, r2, #75776 + 13001 011a 9342 cmp r3, r2 + 13002 011c 22D0 beq .L978 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13003 .loc 1 2282 9 discriminator 3 view .LVU3911 + 13004 011e 02F58062 add r2, r2, #1024 + 13005 0122 9342 cmp r3, r2 + 13006 0124 1ED0 beq .L978 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13007 .loc 1 2282 9 discriminator 4 view .LVU3912 + 13008 0126 02F59C32 add r2, r2, #79872 + 13009 012a 9342 cmp r3, r2 + 13010 012c 1AD0 beq .L978 +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13011 .loc 1 2292 7 is_stmt 1 view .LVU3913 + 13012 012e 1A68 ldr r2, [r3] + 13013 0130 42F00102 orr r2, r2, #1 + 13014 0134 1A60 str r2, [r3] + 13015 0136 0020 movs r0, #0 + 13016 0138 23E0 b .L960 + 13017 .LVL971: + 13018 .L990: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13019 .loc 1 2239 3 is_stmt 0 discriminator 6 view .LVU3914 + 13020 013a 0223 movs r3, #2 + ARM GAS /tmp/cc0aF2h1.s page 425 + + + 13021 .LVL972: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13022 .loc 1 2239 3 discriminator 6 view .LVU3915 + 13023 013c 84F84630 strb r3, [r4, #70] +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13024 .loc 1 2241 3 is_stmt 1 view .LVU3916 + 13025 .L973: +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13026 .loc 1 2260 7 view .LVU3917 + 13027 0140 2268 ldr r2, [r4] + 13028 0142 D368 ldr r3, [r2, #12] + 13029 0144 43F00803 orr r3, r3, #8 + 13030 0148 D360 str r3, [r2, #12] +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13031 .loc 1 2261 7 view .LVU3918 +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13032 .loc 1 2276 3 view .LVU3919 + 13033 014a D9E7 b .L977 + 13034 .LVL973: + 13035 .L976: +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13036 .loc 1 2246 7 view .LVU3920 + 13037 014c 2268 ldr r2, [r4] + 13038 014e D368 ldr r3, [r2, #12] + 13039 .LVL974: +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13040 .loc 1 2246 7 is_stmt 0 view .LVU3921 + 13041 0150 43F00203 orr r3, r3, #2 + 13042 0154 D360 str r3, [r2, #12] +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13043 .loc 1 2247 7 is_stmt 1 view .LVU3922 +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13044 .loc 1 2276 3 view .LVU3923 + 13045 0156 D3E7 b .L977 + 13046 .LVL975: + 13047 .L974: +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13048 .loc 1 2267 7 view .LVU3924 + 13049 0158 2268 ldr r2, [r4] + 13050 015a D368 ldr r3, [r2, #12] + 13051 .LVL976: +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13052 .loc 1 2267 7 is_stmt 0 view .LVU3925 + 13053 015c 43F01003 orr r3, r3, #16 + 13054 0160 D360 str r3, [r2, #12] +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13055 .loc 1 2268 7 is_stmt 1 view .LVU3926 +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13056 .loc 1 2276 3 view .LVU3927 + 13057 0162 CDE7 b .L977 + 13058 .LVL977: + 13059 .L978: +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13060 .loc 1 2284 7 view .LVU3928 +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13061 .loc 1 2284 31 is_stmt 0 view .LVU3929 + 13062 0164 9968 ldr r1, [r3, #8] + ARM GAS /tmp/cc0aF2h1.s page 426 + + +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13063 .loc 1 2284 15 view .LVU3930 + 13064 0166 0B4A ldr r2, .L991+4 + 13065 0168 0A40 ands r2, r2, r1 + 13066 .LVL978: +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13067 .loc 1 2285 7 is_stmt 1 view .LVU3931 +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13068 .loc 1 2285 10 is_stmt 0 view .LVU3932 + 13069 016a 062A cmp r2, #6 + 13070 016c 0CD0 beq .L982 +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13071 .loc 1 2285 11 discriminator 1 view .LVU3933 + 13072 016e B2F5803F cmp r2, #65536 + 13073 0172 0BD0 beq .L983 +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13074 .loc 1 2287 9 is_stmt 1 view .LVU3934 + 13075 0174 1A68 ldr r2, [r3] + 13076 .LVL979: +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13077 .loc 1 2287 9 is_stmt 0 view .LVU3935 + 13078 0176 42F00102 orr r2, r2, #1 + 13079 017a 1A60 str r2, [r3] + 13080 017c 0020 movs r0, #0 + 13081 017e 00E0 b .L960 + 13082 .LVL980: + 13083 .L980: +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13084 .loc 1 2234 12 view .LVU3936 + 13085 0180 0120 movs r0, #1 + 13086 .LVL981: + 13087 .L960: +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13088 .loc 1 2298 1 view .LVU3937 + 13089 0182 10BD pop {r4, pc} + 13090 .LVL982: + 13091 .L981: +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13092 .loc 1 2241 3 view .LVU3938 + 13093 0184 1846 mov r0, r3 + 13094 .LVL983: +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13095 .loc 1 2241 3 view .LVU3939 + 13096 0186 FCE7 b .L960 + 13097 .LVL984: + 13098 .L982: +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13099 .loc 1 2241 3 view .LVU3940 + 13100 0188 0020 movs r0, #0 + 13101 018a FAE7 b .L960 + 13102 .L983: + 13103 018c 0020 movs r0, #0 + 13104 018e F8E7 b .L960 + 13105 .L992: + 13106 .align 2 + 13107 .L991: + 13108 0190 002C0140 .word 1073818624 + ARM GAS /tmp/cc0aF2h1.s page 427 + + + 13109 0194 07000100 .word 65543 + 13110 .cfi_endproc + 13111 .LFE166: + 13113 .section .text.HAL_TIM_IC_Stop_IT,"ax",%progbits + 13114 .align 1 + 13115 .global HAL_TIM_IC_Stop_IT + 13116 .syntax unified + 13117 .thumb + 13118 .thumb_func + 13120 HAL_TIM_IC_Stop_IT: + 13121 .LVL985: + 13122 .LFB167: +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13123 .loc 1 2312 1 is_stmt 1 view -0 + 13124 .cfi_startproc + 13125 @ args = 0, pretend = 0, frame = 0 + 13126 @ frame_needed = 0, uses_anonymous_args = 0 +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13127 .loc 1 2312 1 is_stmt 0 view .LVU3942 + 13128 0000 38B5 push {r3, r4, r5, lr} + 13129 .cfi_def_cfa_offset 16 + 13130 .cfi_offset 3, -16 + 13131 .cfi_offset 4, -12 + 13132 .cfi_offset 5, -8 + 13133 .cfi_offset 14, -4 + 13134 0002 0546 mov r5, r0 + 13135 0004 0C46 mov r4, r1 +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13136 .loc 1 2313 3 is_stmt 1 view .LVU3943 + 13137 .LVL986: +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13138 .loc 1 2316 3 view .LVU3944 +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13139 .loc 1 2318 3 view .LVU3945 + 13140 0006 0C29 cmp r1, #12 + 13141 0008 6DD8 bhi .L1012 + 13142 000a DFE801F0 tbb [pc, r1] + 13143 .L996: + 13144 000e 07 .byte (.L999-.L996)/2 + 13145 000f 6C .byte (.L1012-.L996)/2 + 13146 0010 6C .byte (.L1012-.L996)/2 + 13147 0011 6C .byte (.L1012-.L996)/2 + 13148 0012 2D .byte (.L998-.L996)/2 + 13149 0013 6C .byte (.L1012-.L996)/2 + 13150 0014 6C .byte (.L1012-.L996)/2 + 13151 0015 6C .byte (.L1012-.L996)/2 + 13152 0016 33 .byte (.L997-.L996)/2 + 13153 0017 6C .byte (.L1012-.L996)/2 + 13154 0018 6C .byte (.L1012-.L996)/2 + 13155 0019 6C .byte (.L1012-.L996)/2 + 13156 001a 39 .byte (.L995-.L996)/2 + 13157 001b 00 .p2align 1 + 13158 .L999: +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13159 .loc 1 2323 7 view .LVU3946 + 13160 001c 0268 ldr r2, [r0] + 13161 001e D368 ldr r3, [r2, #12] + ARM GAS /tmp/cc0aF2h1.s page 428 + + + 13162 0020 23F00203 bic r3, r3, #2 + 13163 0024 D360 str r3, [r2, #12] +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13164 .loc 1 2324 7 view .LVU3947 +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13165 .loc 1 2353 3 view .LVU3948 + 13166 .L1000: +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13167 .loc 1 2356 5 view .LVU3949 + 13168 0026 0022 movs r2, #0 + 13169 0028 2146 mov r1, r4 + 13170 .LVL987: +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13171 .loc 1 2356 5 is_stmt 0 view .LVU3950 + 13172 002a 2868 ldr r0, [r5] + 13173 .LVL988: +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13174 .loc 1 2356 5 view .LVU3951 + 13175 002c FFF7FEFF bl TIM_CCxChannelCmd + 13176 .LVL989: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13177 .loc 1 2359 5 is_stmt 1 view .LVU3952 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13178 .loc 1 2359 5 view .LVU3953 + 13179 0030 2B68 ldr r3, [r5] + 13180 0032 196A ldr r1, [r3, #32] + 13181 0034 41F21112 movw r2, #4369 + 13182 0038 1142 tst r1, r2 + 13183 003a 08D1 bne .L1001 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13184 .loc 1 2359 5 discriminator 1 view .LVU3954 + 13185 003c 196A ldr r1, [r3, #32] + 13186 003e 40F24442 movw r2, #1092 + 13187 0042 1142 tst r1, r2 + 13188 0044 03D1 bne .L1001 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13189 .loc 1 2359 5 discriminator 3 view .LVU3955 + 13190 0046 1A68 ldr r2, [r3] + 13191 0048 22F00102 bic r2, r2, #1 + 13192 004c 1A60 str r2, [r3] + 13193 .L1001: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13194 .loc 1 2359 5 discriminator 5 view .LVU3956 +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13195 .loc 1 2362 5 view .LVU3957 + 13196 004e 102C cmp r4, #16 + 13197 0050 3BD8 bhi .L1002 + 13198 0052 DFE804F0 tbb [pc, r4] + 13199 .L1004: + 13200 0056 1B .byte (.L1008-.L1004)/2 + 13201 0057 3A .byte (.L1002-.L1004)/2 + 13202 0058 3A .byte (.L1002-.L1004)/2 + 13203 0059 3A .byte (.L1002-.L1004)/2 + 13204 005a 22 .byte (.L1007-.L1004)/2 + 13205 005b 3A .byte (.L1002-.L1004)/2 + 13206 005c 3A .byte (.L1002-.L1004)/2 + 13207 005d 3A .byte (.L1002-.L1004)/2 + ARM GAS /tmp/cc0aF2h1.s page 429 + + + 13208 005e 2E .byte (.L1006-.L1004)/2 + 13209 005f 3A .byte (.L1002-.L1004)/2 + 13210 0060 3A .byte (.L1002-.L1004)/2 + 13211 0061 3A .byte (.L1002-.L1004)/2 + 13212 0062 32 .byte (.L1005-.L1004)/2 + 13213 0063 3A .byte (.L1002-.L1004)/2 + 13214 0064 3A .byte (.L1002-.L1004)/2 + 13215 0065 3A .byte (.L1002-.L1004)/2 + 13216 0066 36 .byte (.L1003-.L1004)/2 + 13217 .LVL990: + 13218 0067 00 .p2align 1 + 13219 .L998: +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13220 .loc 1 2330 7 view .LVU3958 + 13221 0068 0268 ldr r2, [r0] + 13222 006a D368 ldr r3, [r2, #12] + 13223 006c 23F00403 bic r3, r3, #4 + 13224 0070 D360 str r3, [r2, #12] +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13225 .loc 1 2331 7 view .LVU3959 +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13226 .loc 1 2353 3 view .LVU3960 + 13227 0072 D8E7 b .L1000 + 13228 .L997: +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13229 .loc 1 2337 7 view .LVU3961 + 13230 0074 0268 ldr r2, [r0] + 13231 0076 D368 ldr r3, [r2, #12] + 13232 0078 23F00803 bic r3, r3, #8 + 13233 007c D360 str r3, [r2, #12] +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13234 .loc 1 2338 7 view .LVU3962 +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13235 .loc 1 2353 3 view .LVU3963 + 13236 007e D2E7 b .L1000 + 13237 .L995: +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13238 .loc 1 2344 7 view .LVU3964 + 13239 0080 0268 ldr r2, [r0] + 13240 0082 D368 ldr r3, [r2, #12] + 13241 0084 23F01003 bic r3, r3, #16 + 13242 0088 D360 str r3, [r2, #12] +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13243 .loc 1 2345 7 view .LVU3965 +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13244 .loc 1 2353 3 view .LVU3966 + 13245 008a CCE7 b .L1000 + 13246 .LVL991: + 13247 .L1008: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13248 .loc 1 2362 5 is_stmt 0 discriminator 1 view .LVU3967 + 13249 008c 0123 movs r3, #1 + 13250 008e 85F83E30 strb r3, [r5, #62] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13251 .loc 1 2363 5 is_stmt 1 view .LVU3968 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13252 .loc 1 2363 5 is_stmt 0 discriminator 1 view .LVU3969 + ARM GAS /tmp/cc0aF2h1.s page 430 + + + 13253 0092 85F84430 strb r3, [r5, #68] + 13254 0096 0020 movs r0, #0 + 13255 0098 26E0 b .L994 + 13256 .L1007: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13257 .loc 1 2362 5 discriminator 3 view .LVU3970 + 13258 009a 0123 movs r3, #1 + 13259 009c 85F83F30 strb r3, [r5, #63] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13260 .loc 1 2363 5 is_stmt 1 view .LVU3971 + 13261 .L1009: +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13262 .loc 1 2363 5 is_stmt 0 discriminator 2 view .LVU3972 + 13263 00a0 042C cmp r4, #4 + 13264 00a2 16D0 beq .L1014 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13265 .loc 1 2363 5 discriminator 4 view .LVU3973 + 13266 00a4 082C cmp r4, #8 + 13267 00a6 19D0 beq .L1015 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13268 .loc 1 2363 5 discriminator 7 view .LVU3974 + 13269 00a8 0123 movs r3, #1 + 13270 00aa 85F84730 strb r3, [r5, #71] + 13271 00ae 0020 movs r0, #0 + 13272 00b0 1AE0 b .L994 + 13273 .L1006: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13274 .loc 1 2362 5 discriminator 6 view .LVU3975 + 13275 00b2 0123 movs r3, #1 + 13276 00b4 85F84030 strb r3, [r5, #64] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13277 .loc 1 2363 5 is_stmt 1 view .LVU3976 + 13278 00b8 F2E7 b .L1009 + 13279 .L1005: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13280 .loc 1 2362 5 is_stmt 0 discriminator 9 view .LVU3977 + 13281 00ba 0123 movs r3, #1 + 13282 00bc 85F84130 strb r3, [r5, #65] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13283 .loc 1 2363 5 is_stmt 1 view .LVU3978 + 13284 00c0 EEE7 b .L1009 + 13285 .L1003: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13286 .loc 1 2362 5 is_stmt 0 discriminator 12 view .LVU3979 + 13287 00c2 0123 movs r3, #1 + 13288 00c4 85F84230 strb r3, [r5, #66] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13289 .loc 1 2363 5 is_stmt 1 view .LVU3980 + 13290 00c8 EAE7 b .L1009 + 13291 .L1002: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13292 .loc 1 2362 5 is_stmt 0 discriminator 13 view .LVU3981 + 13293 00ca 0123 movs r3, #1 + 13294 00cc 85F84330 strb r3, [r5, #67] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13295 .loc 1 2363 5 is_stmt 1 view .LVU3982 + 13296 00d0 E6E7 b .L1009 + ARM GAS /tmp/cc0aF2h1.s page 431 + + + 13297 .L1014: +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13298 .loc 1 2363 5 is_stmt 0 discriminator 3 view .LVU3983 + 13299 00d2 0123 movs r3, #1 + 13300 00d4 85F84530 strb r3, [r5, #69] + 13301 00d8 0020 movs r0, #0 + 13302 00da 05E0 b .L994 + 13303 .L1015: +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13304 .loc 1 2363 5 discriminator 6 view .LVU3984 + 13305 00dc 0123 movs r3, #1 + 13306 00de 85F84630 strb r3, [r5, #70] + 13307 00e2 0020 movs r0, #0 + 13308 00e4 00E0 b .L994 + 13309 .LVL992: + 13310 .L1012: +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13311 .loc 1 2318 3 view .LVU3985 + 13312 00e6 0120 movs r0, #1 + 13313 .LVL993: + 13314 .L994: +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13315 .loc 1 2367 3 is_stmt 1 view .LVU3986 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13316 .loc 1 2368 1 is_stmt 0 view .LVU3987 + 13317 00e8 38BD pop {r3, r4, r5, pc} +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13318 .loc 1 2368 1 view .LVU3988 + 13319 .cfi_endproc + 13320 .LFE167: + 13322 .section .text.HAL_TIM_IC_Start_DMA,"ax",%progbits + 13323 .align 1 + 13324 .global HAL_TIM_IC_Start_DMA + 13325 .syntax unified + 13326 .thumb + 13327 .thumb_func + 13329 HAL_TIM_IC_Start_DMA: + 13330 .LVL994: + 13331 .LFB168: +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13332 .loc 1 2384 1 is_stmt 1 view -0 + 13333 .cfi_startproc + 13334 @ args = 0, pretend = 0, frame = 0 + 13335 @ frame_needed = 0, uses_anonymous_args = 0 +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13336 .loc 1 2384 1 is_stmt 0 view .LVU3990 + 13337 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 13338 .cfi_def_cfa_offset 24 + 13339 .cfi_offset 4, -24 + 13340 .cfi_offset 5, -20 + 13341 .cfi_offset 6, -16 + 13342 .cfi_offset 7, -12 + 13343 .cfi_offset 8, -8 + 13344 .cfi_offset 14, -4 + 13345 0004 0546 mov r5, r0 + 13346 0006 0C46 mov r4, r1 + 13347 0008 1646 mov r6, r2 + ARM GAS /tmp/cc0aF2h1.s page 432 + + + 13348 000a 1F46 mov r7, r3 +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 13349 .loc 1 2385 3 is_stmt 1 view .LVU3991 + 13350 .LVL995: +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13351 .loc 1 2386 3 view .LVU3992 +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13352 .loc 1 2388 3 view .LVU3993 + 13353 000c 1029 cmp r1, #16 + 13354 000e 44D8 bhi .L1017 + 13355 0010 DFE801F0 tbb [pc, r1] + 13356 .LVL996: + 13357 .L1019: + 13358 0014 09 .byte (.L1023-.L1019)/2 + 13359 0015 43 .byte (.L1017-.L1019)/2 + 13360 0016 43 .byte (.L1017-.L1019)/2 + 13361 0017 43 .byte (.L1017-.L1019)/2 + 13362 0018 33 .byte (.L1022-.L1019)/2 + 13363 0019 43 .byte (.L1017-.L1019)/2 + 13364 001a 43 .byte (.L1017-.L1019)/2 + 13365 001b 43 .byte (.L1017-.L1019)/2 + 13366 001c 37 .byte (.L1021-.L1019)/2 + 13367 001d 43 .byte (.L1017-.L1019)/2 + 13368 001e 43 .byte (.L1017-.L1019)/2 + 13369 001f 43 .byte (.L1017-.L1019)/2 + 13370 0020 3B .byte (.L1020-.L1019)/2 + 13371 0021 43 .byte (.L1017-.L1019)/2 + 13372 0022 43 .byte (.L1017-.L1019)/2 + 13373 0023 43 .byte (.L1017-.L1019)/2 + 13374 0024 3F .byte (.L1018-.L1019)/2 + 13375 0025 00 .p2align 1 + 13376 .L1023: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13377 .loc 1 2388 47 is_stmt 0 discriminator 1 view .LVU3994 + 13378 0026 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 13379 .LVL997: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13380 .loc 1 2388 47 discriminator 1 view .LVU3995 + 13381 002a C0B2 uxtb r0, r0 + 13382 .LVL998: + 13383 .L1024: +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13384 .loc 1 2389 3 is_stmt 1 view .LVU3996 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13385 .loc 1 2389 61 is_stmt 0 view .LVU3997 + 13386 002c 002C cmp r4, #0 + 13387 002e 38D1 bne .L1025 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13388 .loc 1 2389 61 discriminator 1 view .LVU3998 + 13389 0030 95F84480 ldrb r8, [r5, #68] @ zero_extendqisi2 + 13390 0034 5FFA88F8 uxtb r8, r8 + 13391 .L1026: + 13392 .LVL999: +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); + 13393 .loc 1 2392 3 is_stmt 1 view .LVU3999 +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13394 .loc 1 2393 3 view .LVU4000 + ARM GAS /tmp/cc0aF2h1.s page 433 + + +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 13395 .loc 1 2396 3 view .LVU4001 +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 13396 .loc 1 2396 6 is_stmt 0 view .LVU4002 + 13397 0038 0228 cmp r0, #2 + 13398 003a 00F00981 beq .L1029 +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13399 .loc 1 2397 7 view .LVU4003 + 13400 003e B8F1020F cmp r8, #2 + 13401 0042 00F00281 beq .L1049 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) + 13402 .loc 1 2401 8 is_stmt 1 view .LVU4004 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) + 13403 .loc 1 2401 11 is_stmt 0 view .LVU4005 + 13404 0046 0128 cmp r0, #1 + 13405 0048 40F00181 bne .L1050 +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13406 .loc 1 2402 12 view .LVU4006 + 13407 004c B8F1010F cmp r8, #1 + 13408 0050 40F0FE80 bne .L1029 +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13409 .loc 1 2404 5 is_stmt 1 view .LVU4007 +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13410 .loc 1 2404 8 is_stmt 0 view .LVU4008 + 13411 0054 002E cmp r6, #0 + 13412 0056 00F0FD80 beq .L1051 +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13413 .loc 1 2404 25 discriminator 1 view .LVU4009 + 13414 005a 002F cmp r7, #0 + 13415 005c 00F0FC80 beq .L1052 +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13416 .loc 1 2410 7 is_stmt 1 view .LVU4010 + 13417 0060 102C cmp r4, #16 + 13418 0062 5DD8 bhi .L1030 + 13419 0064 DFE804F0 tbb [pc, r4] + 13420 .L1032: + 13421 0068 30 .byte (.L1036-.L1032)/2 + 13422 0069 5C .byte (.L1030-.L1032)/2 + 13423 006a 5C .byte (.L1030-.L1032)/2 + 13424 006b 5C .byte (.L1030-.L1032)/2 + 13425 006c 36 .byte (.L1035-.L1032)/2 + 13426 006d 5C .byte (.L1030-.L1032)/2 + 13427 006e 5C .byte (.L1030-.L1032)/2 + 13428 006f 5C .byte (.L1030-.L1032)/2 + 13429 0070 50 .byte (.L1034-.L1032)/2 + 13430 0071 5C .byte (.L1030-.L1032)/2 + 13431 0072 5C .byte (.L1030-.L1032)/2 + 13432 0073 5C .byte (.L1030-.L1032)/2 + 13433 0074 54 .byte (.L1033-.L1032)/2 + 13434 0075 5C .byte (.L1030-.L1032)/2 + 13435 0076 5C .byte (.L1030-.L1032)/2 + 13436 0077 5C .byte (.L1030-.L1032)/2 + 13437 0078 58 .byte (.L1031-.L1032)/2 + 13438 .LVL1000: + 13439 0079 00 .p2align 1 + 13440 .L1022: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + ARM GAS /tmp/cc0aF2h1.s page 434 + + + 13441 .loc 1 2388 47 is_stmt 0 discriminator 4 view .LVU4011 + 13442 007a 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 13443 .LVL1001: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13444 .loc 1 2388 47 discriminator 4 view .LVU4012 + 13445 007e C0B2 uxtb r0, r0 + 13446 0080 D4E7 b .L1024 + 13447 .LVL1002: + 13448 .L1021: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13449 .loc 1 2388 47 discriminator 7 view .LVU4013 + 13450 0082 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 13451 .LVL1003: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13452 .loc 1 2388 47 discriminator 7 view .LVU4014 + 13453 0086 C0B2 uxtb r0, r0 + 13454 0088 D0E7 b .L1024 + 13455 .LVL1004: + 13456 .L1020: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13457 .loc 1 2388 47 discriminator 10 view .LVU4015 + 13458 008a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 13459 .LVL1005: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13460 .loc 1 2388 47 discriminator 10 view .LVU4016 + 13461 008e C8B2 uxtb r0, r1 + 13462 .LVL1006: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13463 .loc 1 2388 47 discriminator 10 view .LVU4017 + 13464 0090 CCE7 b .L1024 + 13465 .LVL1007: + 13466 .L1018: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13467 .loc 1 2388 47 discriminator 13 view .LVU4018 + 13468 0092 90F84210 ldrb r1, [r0, #66] @ zero_extendqisi2 + 13469 .LVL1008: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13470 .loc 1 2388 47 discriminator 13 view .LVU4019 + 13471 0096 C8B2 uxtb r0, r1 + 13472 .LVL1009: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13473 .loc 1 2388 47 discriminator 13 view .LVU4020 + 13474 0098 C8E7 b .L1024 + 13475 .LVL1010: + 13476 .L1017: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13477 .loc 1 2388 47 discriminator 14 view .LVU4021 + 13478 009a 90F84310 ldrb r1, [r0, #67] @ zero_extendqisi2 + 13479 .LVL1011: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13480 .loc 1 2388 47 discriminator 14 view .LVU4022 + 13481 009e C8B2 uxtb r0, r1 + 13482 .LVL1012: +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13483 .loc 1 2388 47 discriminator 14 view .LVU4023 + 13484 00a0 C4E7 b .L1024 + 13485 .LVL1013: + ARM GAS /tmp/cc0aF2h1.s page 435 + + + 13486 .L1025: +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13487 .loc 1 2389 61 discriminator 2 view .LVU4024 + 13488 00a2 042C cmp r4, #4 + 13489 00a4 06D0 beq .L1061 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13490 .loc 1 2389 61 discriminator 5 view .LVU4025 + 13491 00a6 082C cmp r4, #8 + 13492 00a8 09D0 beq .L1062 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13493 .loc 1 2389 61 discriminator 8 view .LVU4026 + 13494 00aa 95F84780 ldrb r8, [r5, #71] @ zero_extendqisi2 + 13495 00ae 5FFA88F8 uxtb r8, r8 + 13496 00b2 C1E7 b .L1026 + 13497 .L1061: +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13498 .loc 1 2389 61 discriminator 4 view .LVU4027 + 13499 00b4 95F84580 ldrb r8, [r5, #69] @ zero_extendqisi2 + 13500 00b8 5FFA88F8 uxtb r8, r8 + 13501 00bc BCE7 b .L1026 + 13502 .L1062: +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13503 .loc 1 2389 61 discriminator 7 view .LVU4028 + 13504 00be 95F84680 ldrb r8, [r5, #70] @ zero_extendqisi2 + 13505 00c2 5FFA88F8 uxtb r8, r8 + 13506 00c6 B7E7 b .L1026 + 13507 .LVL1014: + 13508 .L1036: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13509 .loc 1 2410 7 discriminator 1 view .LVU4029 + 13510 00c8 0223 movs r3, #2 + 13511 00ca 85F83E30 strb r3, [r5, #62] +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13512 .loc 1 2411 7 is_stmt 1 view .LVU4030 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13513 .loc 1 2411 7 is_stmt 0 discriminator 1 view .LVU4031 + 13514 00ce 85F84430 strb r3, [r5, #68] + 13515 00d2 09E0 b .L1037 + 13516 .L1035: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13517 .loc 1 2410 7 discriminator 3 view .LVU4032 + 13518 00d4 0223 movs r3, #2 + 13519 00d6 85F83F30 strb r3, [r5, #63] +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13520 .loc 1 2411 7 is_stmt 1 view .LVU4033 + 13521 .L1038: +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13522 .loc 1 2411 7 is_stmt 0 discriminator 2 view .LVU4034 + 13523 00da 042C cmp r4, #4 + 13524 00dc 24D0 beq .L1063 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13525 .loc 1 2411 7 discriminator 4 view .LVU4035 + 13526 00de 082C cmp r4, #8 + 13527 00e0 26D0 beq .L1064 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13528 .loc 1 2411 7 discriminator 7 view .LVU4036 + 13529 00e2 0223 movs r3, #2 + ARM GAS /tmp/cc0aF2h1.s page 436 + + + 13530 00e4 85F84730 strb r3, [r5, #71] + 13531 .L1037: +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13532 .loc 1 2420 3 is_stmt 1 view .LVU4037 + 13533 00e8 0122 movs r2, #1 + 13534 .LVL1015: +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13535 .loc 1 2420 3 is_stmt 0 view .LVU4038 + 13536 00ea 2146 mov r1, r4 + 13537 00ec 2868 ldr r0, [r5] + 13538 .LVL1016: +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13539 .loc 1 2420 3 view .LVU4039 + 13540 00ee FFF7FEFF bl TIM_CCxChannelCmd + 13541 .LVL1017: +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13542 .loc 1 2422 3 is_stmt 1 view .LVU4040 + 13543 00f2 0C2C cmp r4, #12 + 13544 00f4 38D8 bhi .L1041 + 13545 00f6 DFE804F0 tbb [pc, r4] + 13546 .L1043: + 13547 00fa 1F .byte (.L1046-.L1043)/2 + 13548 00fb 37 .byte (.L1041-.L1043)/2 + 13549 00fc 37 .byte (.L1041-.L1043)/2 + 13550 00fd 37 .byte (.L1041-.L1043)/2 + 13551 00fe 50 .byte (.L1045-.L1043)/2 + 13552 00ff 37 .byte (.L1041-.L1043)/2 + 13553 0100 37 .byte (.L1041-.L1043)/2 + 13554 0101 37 .byte (.L1041-.L1043)/2 + 13555 0102 69 .byte (.L1044-.L1043)/2 + 13556 0103 37 .byte (.L1041-.L1043)/2 + 13557 0104 37 .byte (.L1041-.L1043)/2 + 13558 0105 37 .byte (.L1041-.L1043)/2 + 13559 0106 82 .byte (.L1042-.L1043)/2 + 13560 .LVL1018: + 13561 0107 00 .p2align 1 + 13562 .L1034: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13563 .loc 1 2410 7 is_stmt 0 discriminator 6 view .LVU4041 + 13564 0108 0223 movs r3, #2 + 13565 010a 85F84030 strb r3, [r5, #64] +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13566 .loc 1 2411 7 is_stmt 1 view .LVU4042 + 13567 010e E4E7 b .L1038 + 13568 .L1033: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13569 .loc 1 2410 7 is_stmt 0 discriminator 9 view .LVU4043 + 13570 0110 0223 movs r3, #2 + 13571 0112 85F84130 strb r3, [r5, #65] +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13572 .loc 1 2411 7 is_stmt 1 view .LVU4044 + 13573 0116 E0E7 b .L1038 + 13574 .L1031: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13575 .loc 1 2410 7 is_stmt 0 discriminator 12 view .LVU4045 + 13576 0118 0223 movs r3, #2 + 13577 011a 85F84230 strb r3, [r5, #66] + ARM GAS /tmp/cc0aF2h1.s page 437 + + +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13578 .loc 1 2411 7 is_stmt 1 view .LVU4046 + 13579 011e DCE7 b .L1038 + 13580 .L1030: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13581 .loc 1 2410 7 is_stmt 0 discriminator 13 view .LVU4047 + 13582 0120 0223 movs r3, #2 + 13583 0122 85F84330 strb r3, [r5, #67] +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13584 .loc 1 2411 7 is_stmt 1 view .LVU4048 + 13585 0126 D8E7 b .L1038 + 13586 .L1063: +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13587 .loc 1 2411 7 is_stmt 0 discriminator 3 view .LVU4049 + 13588 0128 0223 movs r3, #2 + 13589 012a 85F84530 strb r3, [r5, #69] + 13590 012e DBE7 b .L1037 + 13591 .L1064: +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13592 .loc 1 2411 7 discriminator 6 view .LVU4050 + 13593 0130 0223 movs r3, #2 + 13594 0132 85F84630 strb r3, [r5, #70] + 13595 0136 D7E7 b .L1037 + 13596 .LVL1019: + 13597 .L1046: +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13598 .loc 1 2427 7 is_stmt 1 view .LVU4051 +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13599 .loc 1 2427 17 is_stmt 0 view .LVU4052 + 13600 0138 6B6A ldr r3, [r5, #36] +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13601 .loc 1 2427 52 view .LVU4053 + 13602 013a 4E4A ldr r2, .L1065 + 13603 013c 9A62 str r2, [r3, #40] +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13604 .loc 1 2428 7 is_stmt 1 view .LVU4054 +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13605 .loc 1 2428 17 is_stmt 0 view .LVU4055 + 13606 013e 6B6A ldr r3, [r5, #36] +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13607 .loc 1 2428 56 view .LVU4056 + 13608 0140 4D4A ldr r2, .L1065+4 + 13609 0142 DA62 str r2, [r3, #44] +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13610 .loc 1 2431 7 is_stmt 1 view .LVU4057 +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13611 .loc 1 2431 17 is_stmt 0 view .LVU4058 + 13612 0144 6B6A ldr r3, [r5, #36] +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13613 .loc 1 2431 53 view .LVU4059 + 13614 0146 4D4A ldr r2, .L1065+8 + 13615 0148 1A63 str r2, [r3, #48] +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13616 .loc 1 2434 7 is_stmt 1 view .LVU4060 +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13617 .loc 1 2434 71 is_stmt 0 view .LVU4061 + 13618 014a 2968 ldr r1, [r5] + ARM GAS /tmp/cc0aF2h1.s page 438 + + +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13619 .loc 1 2434 11 view .LVU4062 + 13620 014c 3B46 mov r3, r7 + 13621 014e 3246 mov r2, r6 + 13622 0150 3431 adds r1, r1, #52 + 13623 0152 686A ldr r0, [r5, #36] + 13624 0154 FFF7FEFF bl HAL_DMA_Start_IT + 13625 .LVL1020: +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13626 .loc 1 2434 10 discriminator 1 view .LVU4063 + 13627 0158 0028 cmp r0, #0 + 13628 015a 7FD1 bne .L1053 +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13629 .loc 1 2441 7 is_stmt 1 view .LVU4064 + 13630 015c 2A68 ldr r2, [r5] + 13631 015e D368 ldr r3, [r2, #12] + 13632 0160 43F40073 orr r3, r3, #512 + 13633 0164 D360 str r3, [r2, #12] +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13634 .loc 1 2442 7 view .LVU4065 +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 13635 .loc 1 2385 21 is_stmt 0 view .LVU4066 + 13636 0166 8046 mov r8, r0 + 13637 .LVL1021: + 13638 .L1041: +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13639 .loc 1 2514 3 is_stmt 1 view .LVU4067 +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13640 .loc 1 2514 7 is_stmt 0 view .LVU4068 + 13641 0168 2B68 ldr r3, [r5] +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13642 .loc 1 2514 6 view .LVU4069 + 13643 016a 454A ldr r2, .L1065+12 + 13644 016c 9342 cmp r3, r2 + 13645 016e 5ED0 beq .L1047 +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13646 .loc 1 2514 7 discriminator 1 view .LVU4070 + 13647 0170 B3F1804F cmp r3, #1073741824 + 13648 0174 5BD0 beq .L1047 +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13649 .loc 1 2514 7 discriminator 2 view .LVU4071 + 13650 0176 A2F59432 sub r2, r2, #75776 + 13651 017a 9342 cmp r3, r2 + 13652 017c 57D0 beq .L1047 +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13653 .loc 1 2514 7 discriminator 3 view .LVU4072 + 13654 017e 02F58062 add r2, r2, #1024 + 13655 0182 9342 cmp r3, r2 + 13656 0184 53D0 beq .L1047 +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13657 .loc 1 2514 7 discriminator 4 view .LVU4073 + 13658 0186 02F59C32 add r2, r2, #79872 + 13659 018a 9342 cmp r3, r2 + 13660 018c 4FD0 beq .L1047 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13661 .loc 1 2524 5 is_stmt 1 view .LVU4074 + 13662 018e 1A68 ldr r2, [r3] + ARM GAS /tmp/cc0aF2h1.s page 439 + + + 13663 0190 42F00102 orr r2, r2, #1 + 13664 0194 1A60 str r2, [r3] +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13665 .loc 1 2528 10 is_stmt 0 view .LVU4075 + 13666 0196 4046 mov r0, r8 + 13667 0198 5AE0 b .L1029 + 13668 .LVL1022: + 13669 .L1045: +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13670 .loc 1 2448 7 is_stmt 1 view .LVU4076 +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13671 .loc 1 2448 17 is_stmt 0 view .LVU4077 + 13672 019a AB6A ldr r3, [r5, #40] +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13673 .loc 1 2448 52 view .LVU4078 + 13674 019c 354A ldr r2, .L1065 + 13675 019e 9A62 str r2, [r3, #40] +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13676 .loc 1 2449 7 is_stmt 1 view .LVU4079 +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13677 .loc 1 2449 17 is_stmt 0 view .LVU4080 + 13678 01a0 AB6A ldr r3, [r5, #40] +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13679 .loc 1 2449 56 view .LVU4081 + 13680 01a2 354A ldr r2, .L1065+4 + 13681 01a4 DA62 str r2, [r3, #44] +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13682 .loc 1 2452 7 is_stmt 1 view .LVU4082 +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13683 .loc 1 2452 17 is_stmt 0 view .LVU4083 + 13684 01a6 AB6A ldr r3, [r5, #40] +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13685 .loc 1 2452 53 view .LVU4084 + 13686 01a8 344A ldr r2, .L1065+8 + 13687 01aa 1A63 str r2, [r3, #48] +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13688 .loc 1 2455 7 is_stmt 1 view .LVU4085 +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13689 .loc 1 2455 71 is_stmt 0 view .LVU4086 + 13690 01ac 2968 ldr r1, [r5] +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13691 .loc 1 2455 11 view .LVU4087 + 13692 01ae 3B46 mov r3, r7 + 13693 01b0 3246 mov r2, r6 + 13694 01b2 3831 adds r1, r1, #56 + 13695 01b4 A86A ldr r0, [r5, #40] + 13696 01b6 FFF7FEFF bl HAL_DMA_Start_IT + 13697 .LVL1023: +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13698 .loc 1 2455 10 discriminator 1 view .LVU4088 + 13699 01ba 0028 cmp r0, #0 + 13700 01bc 50D1 bne .L1054 +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13701 .loc 1 2462 7 is_stmt 1 view .LVU4089 + 13702 01be 2A68 ldr r2, [r5] + 13703 01c0 D368 ldr r3, [r2, #12] + 13704 01c2 43F48063 orr r3, r3, #1024 + ARM GAS /tmp/cc0aF2h1.s page 440 + + + 13705 01c6 D360 str r3, [r2, #12] +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13706 .loc 1 2463 7 view .LVU4090 +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 13707 .loc 1 2385 21 is_stmt 0 view .LVU4091 + 13708 01c8 8046 mov r8, r0 + 13709 .LVL1024: +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13710 .loc 1 2463 7 view .LVU4092 + 13711 01ca CDE7 b .L1041 + 13712 .LVL1025: + 13713 .L1044: +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13714 .loc 1 2469 7 is_stmt 1 view .LVU4093 +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13715 .loc 1 2469 17 is_stmt 0 view .LVU4094 + 13716 01cc EB6A ldr r3, [r5, #44] +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13717 .loc 1 2469 52 view .LVU4095 + 13718 01ce 294A ldr r2, .L1065 + 13719 01d0 9A62 str r2, [r3, #40] +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13720 .loc 1 2470 7 is_stmt 1 view .LVU4096 +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13721 .loc 1 2470 17 is_stmt 0 view .LVU4097 + 13722 01d2 EB6A ldr r3, [r5, #44] +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13723 .loc 1 2470 56 view .LVU4098 + 13724 01d4 284A ldr r2, .L1065+4 + 13725 01d6 DA62 str r2, [r3, #44] +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13726 .loc 1 2473 7 is_stmt 1 view .LVU4099 +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13727 .loc 1 2473 17 is_stmt 0 view .LVU4100 + 13728 01d8 EB6A ldr r3, [r5, #44] +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13729 .loc 1 2473 53 view .LVU4101 + 13730 01da 284A ldr r2, .L1065+8 + 13731 01dc 1A63 str r2, [r3, #48] +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13732 .loc 1 2476 7 is_stmt 1 view .LVU4102 +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13733 .loc 1 2476 71 is_stmt 0 view .LVU4103 + 13734 01de 2968 ldr r1, [r5] +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13735 .loc 1 2476 11 view .LVU4104 + 13736 01e0 3B46 mov r3, r7 + 13737 01e2 3246 mov r2, r6 + 13738 01e4 3C31 adds r1, r1, #60 + 13739 01e6 E86A ldr r0, [r5, #44] + 13740 01e8 FFF7FEFF bl HAL_DMA_Start_IT + 13741 .LVL1026: +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13742 .loc 1 2476 10 discriminator 1 view .LVU4105 + 13743 01ec 0028 cmp r0, #0 + 13744 01ee 39D1 bne .L1055 +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + ARM GAS /tmp/cc0aF2h1.s page 441 + + + 13745 .loc 1 2483 7 is_stmt 1 view .LVU4106 + 13746 01f0 2A68 ldr r2, [r5] + 13747 01f2 D368 ldr r3, [r2, #12] + 13748 01f4 43F40063 orr r3, r3, #2048 + 13749 01f8 D360 str r3, [r2, #12] +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13750 .loc 1 2484 7 view .LVU4107 +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 13751 .loc 1 2385 21 is_stmt 0 view .LVU4108 + 13752 01fa 8046 mov r8, r0 + 13753 .LVL1027: +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13754 .loc 1 2484 7 view .LVU4109 + 13755 01fc B4E7 b .L1041 + 13756 .LVL1028: + 13757 .L1042: +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13758 .loc 1 2490 7 is_stmt 1 view .LVU4110 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13759 .loc 1 2490 17 is_stmt 0 view .LVU4111 + 13760 01fe 2B6B ldr r3, [r5, #48] +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13761 .loc 1 2490 52 view .LVU4112 + 13762 0200 1C4A ldr r2, .L1065 + 13763 0202 9A62 str r2, [r3, #40] +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13764 .loc 1 2491 7 is_stmt 1 view .LVU4113 +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13765 .loc 1 2491 17 is_stmt 0 view .LVU4114 + 13766 0204 2B6B ldr r3, [r5, #48] +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13767 .loc 1 2491 56 view .LVU4115 + 13768 0206 1C4A ldr r2, .L1065+4 + 13769 0208 DA62 str r2, [r3, #44] +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13770 .loc 1 2494 7 is_stmt 1 view .LVU4116 +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13771 .loc 1 2494 17 is_stmt 0 view .LVU4117 + 13772 020a 2B6B ldr r3, [r5, #48] +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13773 .loc 1 2494 53 view .LVU4118 + 13774 020c 1B4A ldr r2, .L1065+8 + 13775 020e 1A63 str r2, [r3, #48] +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13776 .loc 1 2497 7 is_stmt 1 view .LVU4119 +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13777 .loc 1 2497 71 is_stmt 0 view .LVU4120 + 13778 0210 2968 ldr r1, [r5] +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 13779 .loc 1 2497 11 view .LVU4121 + 13780 0212 3B46 mov r3, r7 + 13781 0214 3246 mov r2, r6 + 13782 0216 4031 adds r1, r1, #64 + 13783 0218 286B ldr r0, [r5, #48] + 13784 021a FFF7FEFF bl HAL_DMA_Start_IT + 13785 .LVL1029: +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/cc0aF2h1.s page 442 + + + 13786 .loc 1 2497 10 discriminator 1 view .LVU4122 + 13787 021e 18BB cbnz r0, .L1056 +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13788 .loc 1 2504 7 is_stmt 1 view .LVU4123 + 13789 0220 2A68 ldr r2, [r5] + 13790 0222 D368 ldr r3, [r2, #12] + 13791 0224 43F48053 orr r3, r3, #4096 + 13792 0228 D360 str r3, [r2, #12] +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13793 .loc 1 2505 7 view .LVU4124 +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** uint32_t tmpsmcr; + 13794 .loc 1 2385 21 is_stmt 0 view .LVU4125 + 13795 022a 8046 mov r8, r0 + 13796 .LVL1030: +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13797 .loc 1 2505 7 view .LVU4126 + 13798 022c 9CE7 b .L1041 + 13799 .LVL1031: + 13800 .L1047: +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13801 .loc 1 2516 5 is_stmt 1 view .LVU4127 +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13802 .loc 1 2516 29 is_stmt 0 view .LVU4128 + 13803 022e 9968 ldr r1, [r3, #8] +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13804 .loc 1 2516 13 view .LVU4129 + 13805 0230 144A ldr r2, .L1065+16 + 13806 0232 0A40 ands r2, r2, r1 + 13807 .LVL1032: +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13808 .loc 1 2517 5 is_stmt 1 view .LVU4130 +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13809 .loc 1 2517 8 is_stmt 0 view .LVU4131 + 13810 0234 062A cmp r2, #6 + 13811 0236 19D0 beq .L1057 +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13812 .loc 1 2517 9 discriminator 1 view .LVU4132 + 13813 0238 B2F5803F cmp r2, #65536 + 13814 023c 18D0 beq .L1058 +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13815 .loc 1 2519 7 is_stmt 1 view .LVU4133 + 13816 023e 1A68 ldr r2, [r3] + 13817 .LVL1033: +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13818 .loc 1 2519 7 is_stmt 0 view .LVU4134 + 13819 0240 42F00102 orr r2, r2, #1 + 13820 0244 1A60 str r2, [r3] +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13821 .loc 1 2528 10 view .LVU4135 + 13822 0246 4046 mov r0, r8 + 13823 0248 02E0 b .L1029 + 13824 .LVL1034: + 13825 .L1049: +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13826 .loc 1 2399 12 view .LVU4136 + 13827 024a 4046 mov r0, r8 + 13828 .LVL1035: + ARM GAS /tmp/cc0aF2h1.s page 443 + + +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13829 .loc 1 2399 12 view .LVU4137 + 13830 024c 00E0 b .L1029 + 13831 .LVL1036: + 13832 .L1050: +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13833 .loc 1 2416 12 view .LVU4138 + 13834 024e 0120 movs r0, #1 + 13835 .LVL1037: + 13836 .L1029: +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13837 .loc 1 2529 1 view .LVU4139 + 13838 0250 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 13839 .LVL1038: + 13840 .L1051: +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13841 .loc 1 2406 14 view .LVU4140 + 13842 0254 4046 mov r0, r8 + 13843 .LVL1039: +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13844 .loc 1 2406 14 view .LVU4141 + 13845 0256 FBE7 b .L1029 + 13846 .LVL1040: + 13847 .L1052: +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13848 .loc 1 2406 14 view .LVU4142 + 13849 0258 4046 mov r0, r8 + 13850 .LVL1041: +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13851 .loc 1 2406 14 view .LVU4143 + 13852 025a F9E7 b .L1029 + 13853 .LVL1042: + 13854 .L1053: +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13855 .loc 1 2438 16 view .LVU4144 + 13856 025c 4046 mov r0, r8 + 13857 025e F7E7 b .L1029 + 13858 .L1054: +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13859 .loc 1 2459 16 view .LVU4145 + 13860 0260 4046 mov r0, r8 + 13861 0262 F5E7 b .L1029 + 13862 .L1055: +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13863 .loc 1 2480 16 view .LVU4146 + 13864 0264 4046 mov r0, r8 + 13865 0266 F3E7 b .L1029 + 13866 .L1056: +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13867 .loc 1 2501 16 view .LVU4147 + 13868 0268 4046 mov r0, r8 + 13869 026a F1E7 b .L1029 + 13870 .LVL1043: + 13871 .L1057: +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13872 .loc 1 2528 10 view .LVU4148 + 13873 026c 4046 mov r0, r8 + ARM GAS /tmp/cc0aF2h1.s page 444 + + + 13874 026e EFE7 b .L1029 + 13875 .L1058: + 13876 0270 4046 mov r0, r8 + 13877 0272 EDE7 b .L1029 + 13878 .L1066: + 13879 .align 2 + 13880 .L1065: + 13881 0274 00000000 .word TIM_DMACaptureCplt + 13882 0278 00000000 .word TIM_DMACaptureHalfCplt + 13883 027c 00000000 .word TIM_DMAError + 13884 0280 002C0140 .word 1073818624 + 13885 0284 07000100 .word 65543 + 13886 .cfi_endproc + 13887 .LFE168: + 13889 .section .text.HAL_TIM_IC_Stop_DMA,"ax",%progbits + 13890 .align 1 + 13891 .global HAL_TIM_IC_Stop_DMA + 13892 .syntax unified + 13893 .thumb + 13894 .thumb_func + 13896 HAL_TIM_IC_Stop_DMA: + 13897 .LVL1044: + 13898 .LFB169: +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13899 .loc 1 2543 1 is_stmt 1 view -0 + 13900 .cfi_startproc + 13901 @ args = 0, pretend = 0, frame = 0 + 13902 @ frame_needed = 0, uses_anonymous_args = 0 +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13903 .loc 1 2543 1 is_stmt 0 view .LVU4150 + 13904 0000 38B5 push {r3, r4, r5, lr} + 13905 .cfi_def_cfa_offset 16 + 13906 .cfi_offset 3, -16 + 13907 .cfi_offset 4, -12 + 13908 .cfi_offset 5, -8 + 13909 .cfi_offset 14, -4 + 13910 0002 0446 mov r4, r0 + 13911 0004 0D46 mov r5, r1 +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13912 .loc 1 2544 3 is_stmt 1 view .LVU4151 + 13913 .LVL1045: +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); + 13914 .loc 1 2547 3 view .LVU4152 +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13915 .loc 1 2548 3 view .LVU4153 +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13916 .loc 1 2551 3 view .LVU4154 + 13917 0006 0022 movs r2, #0 + 13918 0008 0068 ldr r0, [r0] + 13919 .LVL1046: +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13920 .loc 1 2551 3 is_stmt 0 view .LVU4155 + 13921 000a FFF7FEFF bl TIM_CCxChannelCmd + 13922 .LVL1047: +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13923 .loc 1 2553 3 is_stmt 1 view .LVU4156 + 13924 000e 0C2D cmp r5, #12 + ARM GAS /tmp/cc0aF2h1.s page 445 + + + 13925 0010 74D8 bhi .L1086 + 13926 0012 DFE805F0 tbb [pc, r5] + 13927 .L1070: + 13928 0016 07 .byte (.L1073-.L1070)/2 + 13929 0017 73 .byte (.L1086-.L1070)/2 + 13930 0018 73 .byte (.L1086-.L1070)/2 + 13931 0019 73 .byte (.L1086-.L1070)/2 + 13932 001a 2B .byte (.L1072-.L1070)/2 + 13933 001b 73 .byte (.L1086-.L1070)/2 + 13934 001c 73 .byte (.L1086-.L1070)/2 + 13935 001d 73 .byte (.L1086-.L1070)/2 + 13936 001e 34 .byte (.L1071-.L1070)/2 + 13937 001f 73 .byte (.L1086-.L1070)/2 + 13938 0020 73 .byte (.L1086-.L1070)/2 + 13939 0021 73 .byte (.L1086-.L1070)/2 + 13940 0022 3D .byte (.L1069-.L1070)/2 + 13941 0023 00 .p2align 1 + 13942 .L1073: +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 13943 .loc 1 2558 7 view .LVU4157 + 13944 0024 2268 ldr r2, [r4] + 13945 0026 D368 ldr r3, [r2, #12] + 13946 0028 23F40073 bic r3, r3, #512 + 13947 002c D360 str r3, [r2, #12] +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13948 .loc 1 2559 7 view .LVU4158 +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 13949 .loc 1 2559 13 is_stmt 0 view .LVU4159 + 13950 002e 606A ldr r0, [r4, #36] + 13951 0030 FFF7FEFF bl HAL_DMA_Abort_IT + 13952 .LVL1048: +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 13953 .loc 1 2560 7 is_stmt 1 view .LVU4160 +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 13954 .loc 1 2592 3 view .LVU4161 + 13955 .L1074: +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13956 .loc 1 2595 5 view .LVU4162 +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13957 .loc 1 2595 5 view .LVU4163 + 13958 0034 2368 ldr r3, [r4] + 13959 0036 196A ldr r1, [r3, #32] + 13960 0038 41F21112 movw r2, #4369 + 13961 003c 1142 tst r1, r2 + 13962 003e 08D1 bne .L1075 +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13963 .loc 1 2595 5 discriminator 1 view .LVU4164 + 13964 0040 196A ldr r1, [r3, #32] + 13965 0042 40F24442 movw r2, #1092 + 13966 0046 1142 tst r1, r2 + 13967 0048 03D1 bne .L1075 +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13968 .loc 1 2595 5 discriminator 3 view .LVU4165 + 13969 004a 1A68 ldr r2, [r3] + 13970 004c 22F00102 bic r2, r2, #1 + 13971 0050 1A60 str r2, [r3] + 13972 .L1075: + ARM GAS /tmp/cc0aF2h1.s page 446 + + +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 13973 .loc 1 2595 5 discriminator 5 view .LVU4166 +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13974 .loc 1 2598 5 view .LVU4167 + 13975 0052 102D cmp r5, #16 + 13976 0054 44D8 bhi .L1076 + 13977 0056 DFE805F0 tbb [pc, r5] + 13978 .L1078: + 13979 005a 24 .byte (.L1082-.L1078)/2 + 13980 005b 43 .byte (.L1076-.L1078)/2 + 13981 005c 43 .byte (.L1076-.L1078)/2 + 13982 005d 43 .byte (.L1076-.L1078)/2 + 13983 005e 2B .byte (.L1081-.L1078)/2 + 13984 005f 43 .byte (.L1076-.L1078)/2 + 13985 0060 43 .byte (.L1076-.L1078)/2 + 13986 0061 43 .byte (.L1076-.L1078)/2 + 13987 0062 37 .byte (.L1080-.L1078)/2 + 13988 0063 43 .byte (.L1076-.L1078)/2 + 13989 0064 43 .byte (.L1076-.L1078)/2 + 13990 0065 43 .byte (.L1076-.L1078)/2 + 13991 0066 3B .byte (.L1079-.L1078)/2 + 13992 0067 43 .byte (.L1076-.L1078)/2 + 13993 0068 43 .byte (.L1076-.L1078)/2 + 13994 0069 43 .byte (.L1076-.L1078)/2 + 13995 006a 3F .byte (.L1077-.L1078)/2 + 13996 006b 00 .p2align 1 + 13997 .L1072: +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 13998 .loc 1 2566 7 view .LVU4168 + 13999 006c 2268 ldr r2, [r4] + 14000 006e D368 ldr r3, [r2, #12] + 14001 0070 23F48063 bic r3, r3, #1024 + 14002 0074 D360 str r3, [r2, #12] +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14003 .loc 1 2567 7 view .LVU4169 +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14004 .loc 1 2567 13 is_stmt 0 view .LVU4170 + 14005 0076 A06A ldr r0, [r4, #40] + 14006 0078 FFF7FEFF bl HAL_DMA_Abort_IT + 14007 .LVL1049: +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14008 .loc 1 2568 7 is_stmt 1 view .LVU4171 +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14009 .loc 1 2592 3 view .LVU4172 + 14010 007c DAE7 b .L1074 + 14011 .L1071: +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 14012 .loc 1 2574 7 view .LVU4173 + 14013 007e 2268 ldr r2, [r4] + 14014 0080 D368 ldr r3, [r2, #12] + 14015 0082 23F40063 bic r3, r3, #2048 + 14016 0086 D360 str r3, [r2, #12] +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14017 .loc 1 2575 7 view .LVU4174 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14018 .loc 1 2575 13 is_stmt 0 view .LVU4175 + 14019 0088 E06A ldr r0, [r4, #44] + ARM GAS /tmp/cc0aF2h1.s page 447 + + + 14020 008a FFF7FEFF bl HAL_DMA_Abort_IT + 14021 .LVL1050: +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14022 .loc 1 2576 7 is_stmt 1 view .LVU4176 +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14023 .loc 1 2592 3 view .LVU4177 + 14024 008e D1E7 b .L1074 + 14025 .L1069: +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 14026 .loc 1 2582 7 view .LVU4178 + 14027 0090 2268 ldr r2, [r4] + 14028 0092 D368 ldr r3, [r2, #12] + 14029 0094 23F48053 bic r3, r3, #4096 + 14030 0098 D360 str r3, [r2, #12] +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14031 .loc 1 2583 7 view .LVU4179 +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14032 .loc 1 2583 13 is_stmt 0 view .LVU4180 + 14033 009a 206B ldr r0, [r4, #48] + 14034 009c FFF7FEFF bl HAL_DMA_Abort_IT + 14035 .LVL1051: +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14036 .loc 1 2584 7 is_stmt 1 view .LVU4181 +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14037 .loc 1 2592 3 view .LVU4182 + 14038 00a0 C8E7 b .L1074 + 14039 .L1082: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14040 .loc 1 2598 5 is_stmt 0 discriminator 1 view .LVU4183 + 14041 00a2 0123 movs r3, #1 + 14042 00a4 84F83E30 strb r3, [r4, #62] +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14043 .loc 1 2599 5 is_stmt 1 view .LVU4184 +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14044 .loc 1 2599 5 is_stmt 0 discriminator 1 view .LVU4185 + 14045 00a8 84F84430 strb r3, [r4, #68] + 14046 00ac 0020 movs r0, #0 + 14047 00ae 26E0 b .L1068 + 14048 .L1081: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14049 .loc 1 2598 5 discriminator 3 view .LVU4186 + 14050 00b0 0123 movs r3, #1 + 14051 00b2 84F83F30 strb r3, [r4, #63] +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14052 .loc 1 2599 5 is_stmt 1 view .LVU4187 + 14053 .L1083: +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14054 .loc 1 2599 5 is_stmt 0 discriminator 2 view .LVU4188 + 14055 00b6 042D cmp r5, #4 + 14056 00b8 16D0 beq .L1088 +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14057 .loc 1 2599 5 discriminator 4 view .LVU4189 + 14058 00ba 082D cmp r5, #8 + 14059 00bc 19D0 beq .L1089 +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14060 .loc 1 2599 5 discriminator 7 view .LVU4190 + 14061 00be 0123 movs r3, #1 + ARM GAS /tmp/cc0aF2h1.s page 448 + + + 14062 00c0 84F84730 strb r3, [r4, #71] + 14063 00c4 0020 movs r0, #0 + 14064 00c6 1AE0 b .L1068 + 14065 .L1080: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14066 .loc 1 2598 5 discriminator 6 view .LVU4191 + 14067 00c8 0123 movs r3, #1 + 14068 00ca 84F84030 strb r3, [r4, #64] +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14069 .loc 1 2599 5 is_stmt 1 view .LVU4192 + 14070 00ce F2E7 b .L1083 + 14071 .L1079: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14072 .loc 1 2598 5 is_stmt 0 discriminator 9 view .LVU4193 + 14073 00d0 0123 movs r3, #1 + 14074 00d2 84F84130 strb r3, [r4, #65] +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14075 .loc 1 2599 5 is_stmt 1 view .LVU4194 + 14076 00d6 EEE7 b .L1083 + 14077 .L1077: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14078 .loc 1 2598 5 is_stmt 0 discriminator 12 view .LVU4195 + 14079 00d8 0123 movs r3, #1 + 14080 00da 84F84230 strb r3, [r4, #66] +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14081 .loc 1 2599 5 is_stmt 1 view .LVU4196 + 14082 00de EAE7 b .L1083 + 14083 .L1076: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14084 .loc 1 2598 5 is_stmt 0 discriminator 13 view .LVU4197 + 14085 00e0 0123 movs r3, #1 + 14086 00e2 84F84330 strb r3, [r4, #67] +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14087 .loc 1 2599 5 is_stmt 1 view .LVU4198 + 14088 00e6 E6E7 b .L1083 + 14089 .L1088: +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14090 .loc 1 2599 5 is_stmt 0 discriminator 3 view .LVU4199 + 14091 00e8 0123 movs r3, #1 + 14092 00ea 84F84530 strb r3, [r4, #69] + 14093 00ee 0020 movs r0, #0 + 14094 00f0 05E0 b .L1068 + 14095 .L1089: +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14096 .loc 1 2599 5 discriminator 6 view .LVU4200 + 14097 00f2 0123 movs r3, #1 + 14098 00f4 84F84630 strb r3, [r4, #70] + 14099 00f8 0020 movs r0, #0 + 14100 00fa 00E0 b .L1068 + 14101 .L1086: +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14102 .loc 1 2553 3 view .LVU4201 + 14103 00fc 0120 movs r0, #1 + 14104 .L1068: + 14105 .LVL1052: +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14106 .loc 1 2603 3 is_stmt 1 view .LVU4202 + ARM GAS /tmp/cc0aF2h1.s page 449 + + +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 14107 .loc 1 2604 1 is_stmt 0 view .LVU4203 + 14108 00fe 38BD pop {r3, r4, r5, pc} +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /** + 14109 .loc 1 2604 1 view .LVU4204 + 14110 .cfi_endproc + 14111 .LFE169: + 14113 .section .text.HAL_TIM_OnePulse_Start,"ax",%progbits + 14114 .align 1 + 14115 .global HAL_TIM_OnePulse_Start + 14116 .syntax unified + 14117 .thumb + 14118 .thumb_func + 14120 HAL_TIM_OnePulse_Start: + 14121 .LVL1053: + 14122 .LFB174: +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14123 .loc 1 2797 1 is_stmt 1 view -0 + 14124 .cfi_startproc + 14125 @ args = 0, pretend = 0, frame = 0 + 14126 @ frame_needed = 0, uses_anonymous_args = 0 +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14127 .loc 1 2797 1 is_stmt 0 view .LVU4206 + 14128 0000 10B5 push {r4, lr} + 14129 .cfi_def_cfa_offset 8 + 14130 .cfi_offset 4, -8 + 14131 .cfi_offset 14, -4 + 14132 0002 0446 mov r4, r0 +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14133 .loc 1 2798 3 is_stmt 1 view .LVU4207 +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14134 .loc 1 2798 31 is_stmt 0 view .LVU4208 + 14135 0004 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 14136 .LVL1054: +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14137 .loc 1 2798 31 view .LVU4209 + 14138 0008 C0B2 uxtb r0, r0 + 14139 .LVL1055: +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14140 .loc 1 2799 3 is_stmt 1 view .LVU4210 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14141 .loc 1 2799 31 is_stmt 0 view .LVU4211 + 14142 000a 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 14143 .LVL1056: +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14144 .loc 1 2800 3 is_stmt 1 view .LVU4212 +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14145 .loc 1 2800 31 is_stmt 0 view .LVU4213 + 14146 000e 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 14147 .LVL1057: +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14148 .loc 1 2801 3 is_stmt 1 view .LVU4214 +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14149 .loc 1 2801 31 is_stmt 0 view .LVU4215 + 14150 0012 94F84510 ldrb r1, [r4, #69] @ zero_extendqisi2 + 14151 .LVL1058: +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 450 + + + 14152 .loc 1 2804 3 is_stmt 1 view .LVU4216 +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14153 .loc 1 2807 3 view .LVU4217 +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14154 .loc 1 2807 6 is_stmt 0 view .LVU4218 + 14155 0016 0128 cmp r0, #1 + 14156 0018 34D1 bne .L1093 + 14157 001a DBB2 uxtb r3, r3 +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14158 .loc 1 2807 6 view .LVU4219 + 14159 001c D2B2 uxtb r2, r2 +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14160 .loc 1 2807 6 view .LVU4220 + 14161 001e C9B2 uxtb r1, r1 +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14162 .loc 1 2808 7 view .LVU4221 + 14163 0020 012B cmp r3, #1 + 14164 0022 30D1 bne .L1091 +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14165 .loc 1 2809 7 view .LVU4222 + 14166 0024 012A cmp r2, #1 + 14167 0026 2FD1 bne .L1094 +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14168 .loc 1 2810 7 view .LVU4223 + 14169 0028 0129 cmp r1, #1 + 14170 002a 01D0 beq .L1098 +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14171 .loc 1 2812 12 view .LVU4224 + 14172 002c 1046 mov r0, r2 + 14173 .LVL1059: +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14174 .loc 1 2812 12 view .LVU4225 + 14175 002e 2AE0 b .L1091 + 14176 .LVL1060: + 14177 .L1098: +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14178 .loc 1 2816 3 is_stmt 1 view .LVU4226 + 14179 0030 0223 movs r3, #2 + 14180 .LVL1061: +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14181 .loc 1 2816 3 is_stmt 0 view .LVU4227 + 14182 0032 84F83E30 strb r3, [r4, #62] +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14183 .loc 1 2817 3 is_stmt 1 view .LVU4228 + 14184 0036 84F83F30 strb r3, [r4, #63] +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14185 .loc 1 2818 3 view .LVU4229 + 14186 003a 84F84430 strb r3, [r4, #68] +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14187 .loc 1 2819 3 view .LVU4230 + 14188 003e 84F84530 strb r3, [r4, #69] +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14189 .loc 1 2830 3 view .LVU4231 + 14190 0042 0021 movs r1, #0 + 14191 .LVL1062: +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14192 .loc 1 2830 3 is_stmt 0 view .LVU4232 + ARM GAS /tmp/cc0aF2h1.s page 451 + + + 14193 0044 2068 ldr r0, [r4] + 14194 .LVL1063: +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14195 .loc 1 2830 3 view .LVU4233 + 14196 0046 FFF7FEFF bl TIM_CCxChannelCmd + 14197 .LVL1064: +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14198 .loc 1 2831 3 is_stmt 1 view .LVU4234 + 14199 004a 0122 movs r2, #1 + 14200 004c 0421 movs r1, #4 + 14201 004e 2068 ldr r0, [r4] + 14202 0050 FFF7FEFF bl TIM_CCxChannelCmd + 14203 .LVL1065: +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14204 .loc 1 2833 3 view .LVU4235 +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14205 .loc 1 2833 7 is_stmt 0 view .LVU4236 + 14206 0054 2368 ldr r3, [r4] + 14207 0056 0D4A ldr r2, .L1099 + 14208 0058 9342 cmp r3, r2 + 14209 005a 0DD0 beq .L1092 +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14210 .loc 1 2833 7 discriminator 2 view .LVU4237 + 14211 005c 02F5A052 add r2, r2, #5120 + 14212 0060 9342 cmp r3, r2 + 14213 0062 09D0 beq .L1092 +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14214 .loc 1 2833 7 discriminator 4 view .LVU4238 + 14215 0064 02F58062 add r2, r2, #1024 + 14216 0068 9342 cmp r3, r2 + 14217 006a 05D0 beq .L1092 +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14218 .loc 1 2833 7 discriminator 6 view .LVU4239 + 14219 006c 02F58062 add r2, r2, #1024 + 14220 0070 9342 cmp r3, r2 + 14221 0072 01D0 beq .L1092 +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14222 .loc 1 2840 10 view .LVU4240 + 14223 0074 0020 movs r0, #0 + 14224 0076 06E0 b .L1091 + 14225 .L1092: +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14226 .loc 1 2836 5 is_stmt 1 view .LVU4241 + 14227 0078 5A6C ldr r2, [r3, #68] + 14228 007a 42F40042 orr r2, r2, #32768 + 14229 007e 5A64 str r2, [r3, #68] +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14230 .loc 1 2840 10 is_stmt 0 view .LVU4242 + 14231 0080 0020 movs r0, #0 + 14232 0082 00E0 b .L1091 + 14233 .LVL1066: + 14234 .L1093: +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14235 .loc 1 2812 12 view .LVU4243 + 14236 0084 0120 movs r0, #1 + 14237 .LVL1067: + 14238 .L1091: + ARM GAS /tmp/cc0aF2h1.s page 452 + + +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14239 .loc 1 2841 1 view .LVU4244 + 14240 0086 10BD pop {r4, pc} + 14241 .LVL1068: + 14242 .L1094: +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14243 .loc 1 2812 12 view .LVU4245 + 14244 0088 1846 mov r0, r3 + 14245 .LVL1069: +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14246 .loc 1 2812 12 view .LVU4246 + 14247 008a FCE7 b .L1091 + 14248 .L1100: + 14249 .align 2 + 14250 .L1099: + 14251 008c 002C0140 .word 1073818624 + 14252 .cfi_endproc + 14253 .LFE174: + 14255 .section .text.HAL_TIM_OnePulse_Stop,"ax",%progbits + 14256 .align 1 + 14257 .global HAL_TIM_OnePulse_Stop + 14258 .syntax unified + 14259 .thumb + 14260 .thumb_func + 14262 HAL_TIM_OnePulse_Stop: + 14263 .LVL1070: + 14264 .LFB175: +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14265 .loc 1 2854 1 is_stmt 1 view -0 + 14266 .cfi_startproc + 14267 @ args = 0, pretend = 0, frame = 0 + 14268 @ frame_needed = 0, uses_anonymous_args = 0 +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14269 .loc 1 2854 1 is_stmt 0 view .LVU4248 + 14270 0000 10B5 push {r4, lr} + 14271 .cfi_def_cfa_offset 8 + 14272 .cfi_offset 4, -8 + 14273 .cfi_offset 14, -4 + 14274 0002 0446 mov r4, r0 +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14275 .loc 1 2856 3 is_stmt 1 view .LVU4249 +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14276 .loc 1 2864 3 view .LVU4250 + 14277 0004 0022 movs r2, #0 + 14278 0006 1146 mov r1, r2 + 14279 .LVL1071: +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14280 .loc 1 2864 3 is_stmt 0 view .LVU4251 + 14281 0008 0068 ldr r0, [r0] + 14282 .LVL1072: +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14283 .loc 1 2864 3 view .LVU4252 + 14284 000a FFF7FEFF bl TIM_CCxChannelCmd + 14285 .LVL1073: +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14286 .loc 1 2865 3 is_stmt 1 view .LVU4253 + 14287 000e 0022 movs r2, #0 + ARM GAS /tmp/cc0aF2h1.s page 453 + + + 14288 0010 0421 movs r1, #4 + 14289 0012 2068 ldr r0, [r4] + 14290 0014 FFF7FEFF bl TIM_CCxChannelCmd + 14291 .LVL1074: +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14292 .loc 1 2867 3 view .LVU4254 +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14293 .loc 1 2867 7 is_stmt 0 view .LVU4255 + 14294 0018 2368 ldr r3, [r4] + 14295 001a 1C4A ldr r2, .L1106 + 14296 001c 9342 cmp r3, r2 + 14297 001e 25D0 beq .L1102 +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14298 .loc 1 2867 7 discriminator 2 view .LVU4256 + 14299 0020 02F5A052 add r2, r2, #5120 + 14300 0024 9342 cmp r3, r2 + 14301 0026 21D0 beq .L1102 +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14302 .loc 1 2867 7 discriminator 4 view .LVU4257 + 14303 0028 02F58062 add r2, r2, #1024 + 14304 002c 9342 cmp r3, r2 + 14305 002e 1DD0 beq .L1102 +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14306 .loc 1 2867 7 discriminator 6 view .LVU4258 + 14307 0030 02F58062 add r2, r2, #1024 + 14308 0034 9342 cmp r3, r2 + 14309 0036 19D0 beq .L1102 + 14310 .L1103: +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14311 .loc 1 2870 5 is_stmt 1 discriminator 5 view .LVU4259 +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14312 .loc 1 2874 3 view .LVU4260 +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14313 .loc 1 2874 3 view .LVU4261 + 14314 0038 2368 ldr r3, [r4] + 14315 003a 196A ldr r1, [r3, #32] + 14316 003c 41F21112 movw r2, #4369 + 14317 0040 1142 tst r1, r2 + 14318 0042 08D1 bne .L1104 +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14319 .loc 1 2874 3 discriminator 1 view .LVU4262 + 14320 0044 196A ldr r1, [r3, #32] + 14321 0046 40F24442 movw r2, #1092 + 14322 004a 1142 tst r1, r2 + 14323 004c 03D1 bne .L1104 +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14324 .loc 1 2874 3 discriminator 3 view .LVU4263 + 14325 004e 1A68 ldr r2, [r3] + 14326 0050 22F00102 bic r2, r2, #1 + 14327 0054 1A60 str r2, [r3] + 14328 .L1104: +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14329 .loc 1 2874 3 discriminator 5 view .LVU4264 +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14330 .loc 1 2877 3 view .LVU4265 + 14331 0056 0123 movs r3, #1 + 14332 0058 84F83E30 strb r3, [r4, #62] + ARM GAS /tmp/cc0aF2h1.s page 454 + + +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14333 .loc 1 2878 3 view .LVU4266 + 14334 005c 84F83F30 strb r3, [r4, #63] +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14335 .loc 1 2879 3 view .LVU4267 + 14336 0060 84F84430 strb r3, [r4, #68] +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14337 .loc 1 2880 3 view .LVU4268 + 14338 0064 84F84530 strb r3, [r4, #69] +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14339 .loc 1 2883 3 view .LVU4269 +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14340 .loc 1 2884 1 is_stmt 0 view .LVU4270 + 14341 0068 0020 movs r0, #0 + 14342 006a 10BD pop {r4, pc} + 14343 .LVL1075: + 14344 .L1102: +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14345 .loc 1 2870 5 is_stmt 1 view .LVU4271 +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14346 .loc 1 2870 5 view .LVU4272 + 14347 006c 196A ldr r1, [r3, #32] + 14348 006e 41F21112 movw r2, #4369 + 14349 0072 1142 tst r1, r2 + 14350 0074 E0D1 bne .L1103 +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14351 .loc 1 2870 5 discriminator 1 view .LVU4273 + 14352 0076 196A ldr r1, [r3, #32] + 14353 0078 40F24442 movw r2, #1092 + 14354 007c 1142 tst r1, r2 + 14355 007e DBD1 bne .L1103 +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14356 .loc 1 2870 5 discriminator 3 view .LVU4274 + 14357 0080 5A6C ldr r2, [r3, #68] + 14358 0082 22F40042 bic r2, r2, #32768 + 14359 0086 5A64 str r2, [r3, #68] + 14360 0088 D6E7 b .L1103 + 14361 .L1107: + 14362 008a 00BF .align 2 + 14363 .L1106: + 14364 008c 002C0140 .word 1073818624 + 14365 .cfi_endproc + 14366 .LFE175: + 14368 .section .text.HAL_TIM_OnePulse_Start_IT,"ax",%progbits + 14369 .align 1 + 14370 .global HAL_TIM_OnePulse_Start_IT + 14371 .syntax unified + 14372 .thumb + 14373 .thumb_func + 14375 HAL_TIM_OnePulse_Start_IT: + 14376 .LVL1076: + 14377 .LFB176: +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14378 .loc 1 2897 1 view -0 + 14379 .cfi_startproc + 14380 @ args = 0, pretend = 0, frame = 0 + 14381 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cc0aF2h1.s page 455 + + +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14382 .loc 1 2897 1 is_stmt 0 view .LVU4276 + 14383 0000 10B5 push {r4, lr} + 14384 .cfi_def_cfa_offset 8 + 14385 .cfi_offset 4, -8 + 14386 .cfi_offset 14, -4 + 14387 0002 0446 mov r4, r0 +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14388 .loc 1 2898 3 is_stmt 1 view .LVU4277 +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14389 .loc 1 2898 31 is_stmt 0 view .LVU4278 + 14390 0004 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 14391 .LVL1077: +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14392 .loc 1 2898 31 view .LVU4279 + 14393 0008 C0B2 uxtb r0, r0 + 14394 .LVL1078: +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14395 .loc 1 2899 3 is_stmt 1 view .LVU4280 +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14396 .loc 1 2899 31 is_stmt 0 view .LVU4281 + 14397 000a 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 14398 .LVL1079: +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14399 .loc 1 2900 3 is_stmt 1 view .LVU4282 +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14400 .loc 1 2900 31 is_stmt 0 view .LVU4283 + 14401 000e 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 14402 .LVL1080: +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14403 .loc 1 2901 3 is_stmt 1 view .LVU4284 +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14404 .loc 1 2901 31 is_stmt 0 view .LVU4285 + 14405 0012 94F84510 ldrb r1, [r4, #69] @ zero_extendqisi2 + 14406 .LVL1081: +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14407 .loc 1 2904 3 is_stmt 1 view .LVU4286 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14408 .loc 1 2907 3 view .LVU4287 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14409 .loc 1 2907 6 is_stmt 0 view .LVU4288 + 14410 0016 0128 cmp r0, #1 + 14411 0018 3FD1 bne .L1111 + 14412 001a DBB2 uxtb r3, r3 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14413 .loc 1 2907 6 view .LVU4289 + 14414 001c D2B2 uxtb r2, r2 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14415 .loc 1 2907 6 view .LVU4290 + 14416 001e C9B2 uxtb r1, r1 +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14417 .loc 1 2908 7 view .LVU4291 + 14418 0020 012B cmp r3, #1 + 14419 0022 3BD1 bne .L1109 +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14420 .loc 1 2909 7 view .LVU4292 + 14421 0024 012A cmp r2, #1 + ARM GAS /tmp/cc0aF2h1.s page 456 + + + 14422 0026 3AD1 bne .L1112 +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14423 .loc 1 2910 7 view .LVU4293 + 14424 0028 0129 cmp r1, #1 + 14425 002a 01D0 beq .L1116 +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14426 .loc 1 2912 12 view .LVU4294 + 14427 002c 1046 mov r0, r2 + 14428 .LVL1082: +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14429 .loc 1 2912 12 view .LVU4295 + 14430 002e 35E0 b .L1109 + 14431 .LVL1083: + 14432 .L1116: +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14433 .loc 1 2916 3 is_stmt 1 view .LVU4296 + 14434 0030 0223 movs r3, #2 + 14435 .LVL1084: +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14436 .loc 1 2916 3 is_stmt 0 view .LVU4297 + 14437 0032 84F83E30 strb r3, [r4, #62] +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14438 .loc 1 2917 3 is_stmt 1 view .LVU4298 + 14439 0036 84F83F30 strb r3, [r4, #63] +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14440 .loc 1 2918 3 view .LVU4299 + 14441 003a 84F84430 strb r3, [r4, #68] +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14442 .loc 1 2919 3 view .LVU4300 + 14443 003e 84F84530 strb r3, [r4, #69] +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14444 .loc 1 2931 3 view .LVU4301 + 14445 0042 2268 ldr r2, [r4] + 14446 .LVL1085: +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14447 .loc 1 2931 3 is_stmt 0 view .LVU4302 + 14448 0044 D368 ldr r3, [r2, #12] + 14449 0046 43F00203 orr r3, r3, #2 + 14450 004a D360 str r3, [r2, #12] +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14451 .loc 1 2934 3 is_stmt 1 view .LVU4303 + 14452 004c 2268 ldr r2, [r4] + 14453 004e D368 ldr r3, [r2, #12] + 14454 0050 43F00403 orr r3, r3, #4 + 14455 0054 D360 str r3, [r2, #12] +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14456 .loc 1 2936 3 view .LVU4304 + 14457 0056 0122 movs r2, #1 + 14458 0058 0021 movs r1, #0 + 14459 .LVL1086: +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14460 .loc 1 2936 3 is_stmt 0 view .LVU4305 + 14461 005a 2068 ldr r0, [r4] + 14462 .LVL1087: +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14463 .loc 1 2936 3 view .LVU4306 + 14464 005c FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/cc0aF2h1.s page 457 + + + 14465 .LVL1088: +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14466 .loc 1 2937 3 is_stmt 1 view .LVU4307 + 14467 0060 0122 movs r2, #1 + 14468 0062 0421 movs r1, #4 + 14469 0064 2068 ldr r0, [r4] + 14470 0066 FFF7FEFF bl TIM_CCxChannelCmd + 14471 .LVL1089: +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14472 .loc 1 2939 3 view .LVU4308 +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14473 .loc 1 2939 7 is_stmt 0 view .LVU4309 + 14474 006a 2368 ldr r3, [r4] + 14475 006c 0D4A ldr r2, .L1117 + 14476 006e 9342 cmp r3, r2 + 14477 0070 0DD0 beq .L1110 +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14478 .loc 1 2939 7 discriminator 2 view .LVU4310 + 14479 0072 02F5A052 add r2, r2, #5120 + 14480 0076 9342 cmp r3, r2 + 14481 0078 09D0 beq .L1110 +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14482 .loc 1 2939 7 discriminator 4 view .LVU4311 + 14483 007a 02F58062 add r2, r2, #1024 + 14484 007e 9342 cmp r3, r2 + 14485 0080 05D0 beq .L1110 +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14486 .loc 1 2939 7 discriminator 6 view .LVU4312 + 14487 0082 02F58062 add r2, r2, #1024 + 14488 0086 9342 cmp r3, r2 + 14489 0088 01D0 beq .L1110 +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14490 .loc 1 2946 10 view .LVU4313 + 14491 008a 0020 movs r0, #0 + 14492 008c 06E0 b .L1109 + 14493 .L1110: +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14494 .loc 1 2942 5 is_stmt 1 view .LVU4314 + 14495 008e 5A6C ldr r2, [r3, #68] + 14496 0090 42F40042 orr r2, r2, #32768 + 14497 0094 5A64 str r2, [r3, #68] +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14498 .loc 1 2946 10 is_stmt 0 view .LVU4315 + 14499 0096 0020 movs r0, #0 + 14500 0098 00E0 b .L1109 + 14501 .LVL1090: + 14502 .L1111: +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14503 .loc 1 2912 12 view .LVU4316 + 14504 009a 0120 movs r0, #1 + 14505 .LVL1091: + 14506 .L1109: +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14507 .loc 1 2947 1 view .LVU4317 + 14508 009c 10BD pop {r4, pc} + 14509 .LVL1092: + 14510 .L1112: + ARM GAS /tmp/cc0aF2h1.s page 458 + + +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14511 .loc 1 2912 12 view .LVU4318 + 14512 009e 1846 mov r0, r3 + 14513 .LVL1093: +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14514 .loc 1 2912 12 view .LVU4319 + 14515 00a0 FCE7 b .L1109 + 14516 .L1118: + 14517 00a2 00BF .align 2 + 14518 .L1117: + 14519 00a4 002C0140 .word 1073818624 + 14520 .cfi_endproc + 14521 .LFE176: + 14523 .section .text.HAL_TIM_OnePulse_Stop_IT,"ax",%progbits + 14524 .align 1 + 14525 .global HAL_TIM_OnePulse_Stop_IT + 14526 .syntax unified + 14527 .thumb + 14528 .thumb_func + 14530 HAL_TIM_OnePulse_Stop_IT: + 14531 .LVL1094: + 14532 .LFB177: +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14533 .loc 1 2960 1 is_stmt 1 view -0 + 14534 .cfi_startproc + 14535 @ args = 0, pretend = 0, frame = 0 + 14536 @ frame_needed = 0, uses_anonymous_args = 0 +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14537 .loc 1 2960 1 is_stmt 0 view .LVU4321 + 14538 0000 10B5 push {r4, lr} + 14539 .cfi_def_cfa_offset 8 + 14540 .cfi_offset 4, -8 + 14541 .cfi_offset 14, -4 + 14542 0002 0446 mov r4, r0 +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14543 .loc 1 2962 3 is_stmt 1 view .LVU4322 +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14544 .loc 1 2965 3 view .LVU4323 + 14545 0004 0268 ldr r2, [r0] + 14546 0006 D368 ldr r3, [r2, #12] + 14547 0008 23F00203 bic r3, r3, #2 + 14548 000c D360 str r3, [r2, #12] +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14549 .loc 1 2968 3 view .LVU4324 + 14550 000e 0268 ldr r2, [r0] + 14551 0010 D368 ldr r3, [r2, #12] + 14552 0012 23F00403 bic r3, r3, #4 + 14553 0016 D360 str r3, [r2, #12] +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14554 .loc 1 2975 3 view .LVU4325 + 14555 0018 0022 movs r2, #0 + 14556 001a 1146 mov r1, r2 + 14557 .LVL1095: +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14558 .loc 1 2975 3 is_stmt 0 view .LVU4326 + 14559 001c 0068 ldr r0, [r0] + 14560 .LVL1096: + ARM GAS /tmp/cc0aF2h1.s page 459 + + +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14561 .loc 1 2975 3 view .LVU4327 + 14562 001e FFF7FEFF bl TIM_CCxChannelCmd + 14563 .LVL1097: +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14564 .loc 1 2976 3 is_stmt 1 view .LVU4328 + 14565 0022 0022 movs r2, #0 + 14566 0024 0421 movs r1, #4 + 14567 0026 2068 ldr r0, [r4] + 14568 0028 FFF7FEFF bl TIM_CCxChannelCmd + 14569 .LVL1098: +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14570 .loc 1 2978 3 view .LVU4329 +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14571 .loc 1 2978 7 is_stmt 0 view .LVU4330 + 14572 002c 2368 ldr r3, [r4] + 14573 002e 1C4A ldr r2, .L1124 + 14574 0030 9342 cmp r3, r2 + 14575 0032 25D0 beq .L1120 +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14576 .loc 1 2978 7 discriminator 2 view .LVU4331 + 14577 0034 02F5A052 add r2, r2, #5120 + 14578 0038 9342 cmp r3, r2 + 14579 003a 21D0 beq .L1120 +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14580 .loc 1 2978 7 discriminator 4 view .LVU4332 + 14581 003c 02F58062 add r2, r2, #1024 + 14582 0040 9342 cmp r3, r2 + 14583 0042 1DD0 beq .L1120 +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14584 .loc 1 2978 7 discriminator 6 view .LVU4333 + 14585 0044 02F58062 add r2, r2, #1024 + 14586 0048 9342 cmp r3, r2 + 14587 004a 19D0 beq .L1120 + 14588 .L1121: +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14589 .loc 1 2981 5 is_stmt 1 discriminator 5 view .LVU4334 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14590 .loc 1 2985 3 view .LVU4335 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14591 .loc 1 2985 3 view .LVU4336 + 14592 004c 2368 ldr r3, [r4] + 14593 004e 196A ldr r1, [r3, #32] + 14594 0050 41F21112 movw r2, #4369 + 14595 0054 1142 tst r1, r2 + 14596 0056 08D1 bne .L1122 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14597 .loc 1 2985 3 discriminator 1 view .LVU4337 + 14598 0058 196A ldr r1, [r3, #32] + 14599 005a 40F24442 movw r2, #1092 + 14600 005e 1142 tst r1, r2 + 14601 0060 03D1 bne .L1122 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14602 .loc 1 2985 3 discriminator 3 view .LVU4338 + 14603 0062 1A68 ldr r2, [r3] + 14604 0064 22F00102 bic r2, r2, #1 + 14605 0068 1A60 str r2, [r3] + ARM GAS /tmp/cc0aF2h1.s page 460 + + + 14606 .L1122: +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14607 .loc 1 2985 3 discriminator 5 view .LVU4339 +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14608 .loc 1 2988 3 view .LVU4340 + 14609 006a 0123 movs r3, #1 + 14610 006c 84F83E30 strb r3, [r4, #62] +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14611 .loc 1 2989 3 view .LVU4341 + 14612 0070 84F83F30 strb r3, [r4, #63] +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14613 .loc 1 2990 3 view .LVU4342 + 14614 0074 84F84430 strb r3, [r4, #68] +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14615 .loc 1 2991 3 view .LVU4343 + 14616 0078 84F84530 strb r3, [r4, #69] +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14617 .loc 1 2994 3 view .LVU4344 +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14618 .loc 1 2995 1 is_stmt 0 view .LVU4345 + 14619 007c 0020 movs r0, #0 + 14620 007e 10BD pop {r4, pc} + 14621 .LVL1099: + 14622 .L1120: +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14623 .loc 1 2981 5 is_stmt 1 view .LVU4346 +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14624 .loc 1 2981 5 view .LVU4347 + 14625 0080 196A ldr r1, [r3, #32] + 14626 0082 41F21112 movw r2, #4369 + 14627 0086 1142 tst r1, r2 + 14628 0088 E0D1 bne .L1121 +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14629 .loc 1 2981 5 discriminator 1 view .LVU4348 + 14630 008a 196A ldr r1, [r3, #32] + 14631 008c 40F24442 movw r2, #1092 + 14632 0090 1142 tst r1, r2 + 14633 0092 DBD1 bne .L1121 +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14634 .loc 1 2981 5 discriminator 3 view .LVU4349 + 14635 0094 5A6C ldr r2, [r3, #68] + 14636 0096 22F40042 bic r2, r2, #32768 + 14637 009a 5A64 str r2, [r3, #68] + 14638 009c D6E7 b .L1121 + 14639 .L1125: + 14640 009e 00BF .align 2 + 14641 .L1124: + 14642 00a0 002C0140 .word 1073818624 + 14643 .cfi_endproc + 14644 .LFE177: + 14646 .section .text.HAL_TIM_Encoder_Start,"ax",%progbits + 14647 .align 1 + 14648 .global HAL_TIM_Encoder_Start + 14649 .syntax unified + 14650 .thumb + 14651 .thumb_func + 14653 HAL_TIM_Encoder_Start: + ARM GAS /tmp/cc0aF2h1.s page 461 + + + 14654 .LVL1100: + 14655 .LFB182: +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14656 .loc 1 3234 1 view -0 + 14657 .cfi_startproc + 14658 @ args = 0, pretend = 0, frame = 0 + 14659 @ frame_needed = 0, uses_anonymous_args = 0 +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14660 .loc 1 3234 1 is_stmt 0 view .LVU4351 + 14661 0000 38B5 push {r3, r4, r5, lr} + 14662 .cfi_def_cfa_offset 16 + 14663 .cfi_offset 3, -16 + 14664 .cfi_offset 4, -12 + 14665 .cfi_offset 5, -8 + 14666 .cfi_offset 14, -4 + 14667 0002 0446 mov r4, r0 +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14668 .loc 1 3235 3 is_stmt 1 view .LVU4352 +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14669 .loc 1 3235 31 is_stmt 0 view .LVU4353 + 14670 0004 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 14671 .LVL1101: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14672 .loc 1 3235 31 view .LVU4354 + 14673 0008 C0B2 uxtb r0, r0 + 14674 .LVL1102: +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14675 .loc 1 3236 3 is_stmt 1 view .LVU4355 +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14676 .loc 1 3236 31 is_stmt 0 view .LVU4356 + 14677 000a 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 14678 .LVL1103: +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14679 .loc 1 3237 3 is_stmt 1 view .LVU4357 +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14680 .loc 1 3237 31 is_stmt 0 view .LVU4358 + 14681 000e 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 14682 0012 D2B2 uxtb r2, r2 + 14683 .LVL1104: +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14684 .loc 1 3238 3 is_stmt 1 view .LVU4359 +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14685 .loc 1 3238 31 is_stmt 0 view .LVU4360 + 14686 0014 94F845C0 ldrb ip, [r4, #69] @ zero_extendqisi2 + 14687 .LVL1105: +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14688 .loc 1 3241 3 is_stmt 1 view .LVU4361 +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14689 .loc 1 3244 3 view .LVU4362 +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14690 .loc 1 3244 6 is_stmt 0 view .LVU4363 + 14691 0018 0D46 mov r5, r1 + 14692 001a B1B9 cbnz r1, .L1127 +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14693 .loc 1 3246 5 is_stmt 1 view .LVU4364 +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14694 .loc 1 3246 8 is_stmt 0 view .LVU4365 + ARM GAS /tmp/cc0aF2h1.s page 462 + + + 14695 001c 0128 cmp r0, #1 + 14696 001e 49D1 bne .L1135 +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14697 .loc 1 3247 9 view .LVU4366 + 14698 0020 012A cmp r2, #1 + 14699 0022 48D1 bne .L1128 +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14700 .loc 1 3253 7 is_stmt 1 view .LVU4367 + 14701 0024 0223 movs r3, #2 + 14702 .LVL1106: +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14703 .loc 1 3253 7 is_stmt 0 view .LVU4368 + 14704 0026 84F83E30 strb r3, [r4, #62] +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14705 .loc 1 3254 7 is_stmt 1 view .LVU4369 + 14706 002a 84F84430 strb r3, [r4, #68] + 14707 .LVL1107: + 14708 .L1129: +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14709 .loc 1 3289 3 view .LVU4370 + 14710 002e 7DB3 cbz r5, .L1131 + 14711 0030 042D cmp r5, #4 + 14712 0032 39D0 beq .L1132 +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14713 .loc 1 3305 7 view .LVU4371 + 14714 0034 0122 movs r2, #1 + 14715 .LVL1108: +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14716 .loc 1 3305 7 is_stmt 0 view .LVU4372 + 14717 0036 0021 movs r1, #0 + 14718 .LVL1109: +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14719 .loc 1 3305 7 view .LVU4373 + 14720 0038 2068 ldr r0, [r4] + 14721 .LVL1110: +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14722 .loc 1 3305 7 view .LVU4374 + 14723 003a FFF7FEFF bl TIM_CCxChannelCmd + 14724 .LVL1111: +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14725 .loc 1 3306 7 is_stmt 1 view .LVU4375 + 14726 003e 0122 movs r2, #1 + 14727 0040 0421 movs r1, #4 + 14728 0042 2068 ldr r0, [r4] + 14729 0044 FFF7FEFF bl TIM_CCxChannelCmd + 14730 .LVL1112: +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14731 .loc 1 3307 7 view .LVU4376 + 14732 0048 27E0 b .L1134 + 14733 .LVL1113: + 14734 .L1127: +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14735 .loc 1 3307 7 is_stmt 0 view .LVU4377 + 14736 004a DBB2 uxtb r3, r3 +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14737 .loc 1 3307 7 view .LVU4378 + 14738 004c 5FFA8CFC uxtb ip, ip + ARM GAS /tmp/cc0aF2h1.s page 463 + + +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14739 .loc 1 3257 8 is_stmt 1 view .LVU4379 +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14740 .loc 1 3257 11 is_stmt 0 view .LVU4380 + 14741 0050 0429 cmp r1, #4 + 14742 0052 12D0 beq .L1143 +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14743 .loc 1 3272 5 is_stmt 1 view .LVU4381 +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14744 .loc 1 3272 8 is_stmt 0 view .LVU4382 + 14745 0054 0128 cmp r0, #1 + 14746 0056 33D1 bne .L1138 +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14747 .loc 1 3273 9 view .LVU4383 + 14748 0058 012B cmp r3, #1 + 14749 005a 2CD1 bne .L1128 +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14750 .loc 1 3274 9 view .LVU4384 + 14751 005c 012A cmp r2, #1 + 14752 005e 31D1 bne .L1139 +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14753 .loc 1 3275 9 view .LVU4385 + 14754 0060 BCF1010F cmp ip, #1 + 14755 0064 30D1 bne .L1140 +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14756 .loc 1 3281 7 is_stmt 1 view .LVU4386 + 14757 0066 0223 movs r3, #2 + 14758 .LVL1114: +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14759 .loc 1 3281 7 is_stmt 0 view .LVU4387 + 14760 0068 84F83E30 strb r3, [r4, #62] +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14761 .loc 1 3282 7 is_stmt 1 view .LVU4388 + 14762 006c 84F83F30 strb r3, [r4, #63] +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14763 .loc 1 3283 7 view .LVU4389 + 14764 0070 84F84430 strb r3, [r4, #68] +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14765 .loc 1 3284 7 view .LVU4390 + 14766 0074 84F84530 strb r3, [r4, #69] + 14767 0078 D9E7 b .L1129 + 14768 .LVL1115: + 14769 .L1143: +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14770 .loc 1 3259 5 view .LVU4391 +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14771 .loc 1 3259 8 is_stmt 0 view .LVU4392 + 14772 007a 012B cmp r3, #1 + 14773 007c 1CD1 bne .L1136 +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14774 .loc 1 3260 9 view .LVU4393 + 14775 007e BCF1010F cmp ip, #1 + 14776 0082 1BD1 bne .L1137 +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14777 .loc 1 3266 7 is_stmt 1 view .LVU4394 + 14778 0084 0223 movs r3, #2 + 14779 .LVL1116: + ARM GAS /tmp/cc0aF2h1.s page 464 + + +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14780 .loc 1 3266 7 is_stmt 0 view .LVU4395 + 14781 0086 84F83F30 strb r3, [r4, #63] +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14782 .loc 1 3267 7 is_stmt 1 view .LVU4396 + 14783 008a 84F84530 strb r3, [r4, #69] + 14784 008e CEE7 b .L1129 + 14785 .LVL1117: + 14786 .L1131: +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14787 .loc 1 3293 7 view .LVU4397 + 14788 0090 0122 movs r2, #1 + 14789 .LVL1118: +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14790 .loc 1 3293 7 is_stmt 0 view .LVU4398 + 14791 0092 0021 movs r1, #0 + 14792 .LVL1119: +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14793 .loc 1 3293 7 view .LVU4399 + 14794 0094 2068 ldr r0, [r4] + 14795 .LVL1120: +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14796 .loc 1 3293 7 view .LVU4400 + 14797 0096 FFF7FEFF bl TIM_CCxChannelCmd + 14798 .LVL1121: +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14799 .loc 1 3294 7 is_stmt 1 view .LVU4401 + 14800 .L1134: +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14801 .loc 1 3311 3 view .LVU4402 + 14802 009a 2268 ldr r2, [r4] + 14803 009c 1368 ldr r3, [r2] + 14804 009e 43F00103 orr r3, r3, #1 + 14805 00a2 1360 str r3, [r2] +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14806 .loc 1 3314 3 view .LVU4403 +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14807 .loc 1 3314 10 is_stmt 0 view .LVU4404 + 14808 00a4 0020 movs r0, #0 + 14809 00a6 06E0 b .L1128 + 14810 .LVL1122: + 14811 .L1132: +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14812 .loc 1 3299 7 is_stmt 1 view .LVU4405 + 14813 00a8 0122 movs r2, #1 + 14814 .LVL1123: +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14815 .loc 1 3299 7 is_stmt 0 view .LVU4406 + 14816 00aa 0421 movs r1, #4 + 14817 .LVL1124: +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14818 .loc 1 3299 7 view .LVU4407 + 14819 00ac 2068 ldr r0, [r4] + 14820 .LVL1125: +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14821 .loc 1 3299 7 view .LVU4408 + 14822 00ae FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/cc0aF2h1.s page 465 + + + 14823 .LVL1126: +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14824 .loc 1 3300 7 is_stmt 1 view .LVU4409 + 14825 00b2 F2E7 b .L1134 + 14826 .LVL1127: + 14827 .L1135: +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14828 .loc 1 3249 14 is_stmt 0 view .LVU4410 + 14829 00b4 0120 movs r0, #1 + 14830 .LVL1128: + 14831 .L1128: +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14832 .loc 1 3315 1 view .LVU4411 + 14833 00b6 38BD pop {r3, r4, r5, pc} + 14834 .LVL1129: + 14835 .L1136: +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14836 .loc 1 3262 14 view .LVU4412 + 14837 00b8 0120 movs r0, #1 + 14838 .LVL1130: +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14839 .loc 1 3262 14 view .LVU4413 + 14840 00ba FCE7 b .L1128 + 14841 .LVL1131: + 14842 .L1137: +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14843 .loc 1 3262 14 view .LVU4414 + 14844 00bc 1846 mov r0, r3 + 14845 .LVL1132: +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14846 .loc 1 3262 14 view .LVU4415 + 14847 00be FAE7 b .L1128 + 14848 .LVL1133: + 14849 .L1138: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14850 .loc 1 3277 14 view .LVU4416 + 14851 00c0 0120 movs r0, #1 + 14852 .LVL1134: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14853 .loc 1 3277 14 view .LVU4417 + 14854 00c2 F8E7 b .L1128 + 14855 .LVL1135: + 14856 .L1139: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14857 .loc 1 3277 14 view .LVU4418 + 14858 00c4 1846 mov r0, r3 + 14859 .LVL1136: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14860 .loc 1 3277 14 view .LVU4419 + 14861 00c6 F6E7 b .L1128 + 14862 .LVL1137: + 14863 .L1140: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14864 .loc 1 3277 14 view .LVU4420 + 14865 00c8 1046 mov r0, r2 + 14866 .LVL1138: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 466 + + + 14867 .loc 1 3277 14 view .LVU4421 + 14868 00ca F4E7 b .L1128 + 14869 .cfi_endproc + 14870 .LFE182: + 14872 .section .text.HAL_TIM_Encoder_Stop,"ax",%progbits + 14873 .align 1 + 14874 .global HAL_TIM_Encoder_Stop + 14875 .syntax unified + 14876 .thumb + 14877 .thumb_func + 14879 HAL_TIM_Encoder_Stop: + 14880 .LVL1139: + 14881 .LFB183: +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 14882 .loc 1 3328 1 is_stmt 1 view -0 + 14883 .cfi_startproc + 14884 @ args = 0, pretend = 0, frame = 0 + 14885 @ frame_needed = 0, uses_anonymous_args = 0 +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 14886 .loc 1 3328 1 is_stmt 0 view .LVU4423 + 14887 0000 38B5 push {r3, r4, r5, lr} + 14888 .cfi_def_cfa_offset 16 + 14889 .cfi_offset 3, -16 + 14890 .cfi_offset 4, -12 + 14891 .cfi_offset 5, -8 + 14892 .cfi_offset 14, -4 + 14893 0002 0446 mov r4, r0 +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14894 .loc 1 3330 3 is_stmt 1 view .LVU4424 +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14895 .loc 1 3334 3 view .LVU4425 + 14896 0004 0D46 mov r5, r1 + 14897 0006 61B1 cbz r1, .L1145 + 14898 0008 0429 cmp r1, #4 + 14899 000a 2BD0 beq .L1146 +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14900 .loc 1 3350 7 view .LVU4426 + 14901 000c 0022 movs r2, #0 + 14902 000e 1146 mov r1, r2 + 14903 .LVL1140: +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14904 .loc 1 3350 7 is_stmt 0 view .LVU4427 + 14905 0010 0068 ldr r0, [r0] + 14906 .LVL1141: +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14907 .loc 1 3350 7 view .LVU4428 + 14908 0012 FFF7FEFF bl TIM_CCxChannelCmd + 14909 .LVL1142: +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14910 .loc 1 3351 7 is_stmt 1 view .LVU4429 + 14911 0016 0022 movs r2, #0 + 14912 0018 0421 movs r1, #4 + 14913 001a 2068 ldr r0, [r4] + 14914 001c FFF7FEFF bl TIM_CCxChannelCmd + 14915 .LVL1143: +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14916 .loc 1 3352 7 view .LVU4430 + ARM GAS /tmp/cc0aF2h1.s page 467 + + + 14917 0020 04E0 b .L1148 + 14918 .LVL1144: + 14919 .L1145: +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14920 .loc 1 3338 7 view .LVU4431 + 14921 0022 0022 movs r2, #0 + 14922 0024 1146 mov r1, r2 + 14923 .LVL1145: +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14924 .loc 1 3338 7 is_stmt 0 view .LVU4432 + 14925 0026 0068 ldr r0, [r0] + 14926 .LVL1146: +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14927 .loc 1 3338 7 view .LVU4433 + 14928 0028 FFF7FEFF bl TIM_CCxChannelCmd + 14929 .LVL1147: +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14930 .loc 1 3339 7 is_stmt 1 view .LVU4434 + 14931 .L1148: +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14932 .loc 1 3357 3 view .LVU4435 +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14933 .loc 1 3357 3 view .LVU4436 + 14934 002c 2368 ldr r3, [r4] + 14935 002e 196A ldr r1, [r3, #32] + 14936 0030 41F21112 movw r2, #4369 + 14937 0034 1142 tst r1, r2 + 14938 0036 08D1 bne .L1149 +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14939 .loc 1 3357 3 discriminator 1 view .LVU4437 + 14940 0038 196A ldr r1, [r3, #32] + 14941 003a 40F24442 movw r2, #1092 + 14942 003e 1142 tst r1, r2 + 14943 0040 03D1 bne .L1149 +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14944 .loc 1 3357 3 discriminator 3 view .LVU4438 + 14945 0042 1A68 ldr r2, [r3] + 14946 0044 22F00102 bic r2, r2, #1 + 14947 0048 1A60 str r2, [r3] + 14948 .L1149: +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14949 .loc 1 3357 3 discriminator 5 view .LVU4439 +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14950 .loc 1 3360 3 view .LVU4440 +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14951 .loc 1 3360 6 is_stmt 0 view .LVU4441 + 14952 004a 8DB1 cbz r5, .L1150 +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 14953 .loc 1 3360 34 discriminator 1 view .LVU4442 + 14954 004c 042D cmp r5, #4 + 14955 004e 16D0 beq .L1157 +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14956 .loc 1 3367 5 is_stmt 1 view .LVU4443 + 14957 0050 0123 movs r3, #1 + 14958 0052 84F83E30 strb r3, [r4, #62] +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14959 .loc 1 3368 5 view .LVU4444 + ARM GAS /tmp/cc0aF2h1.s page 468 + + + 14960 0056 84F83F30 strb r3, [r4, #63] +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14961 .loc 1 3369 5 view .LVU4445 + 14962 005a 84F84430 strb r3, [r4, #68] +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14963 .loc 1 3370 5 view .LVU4446 + 14964 005e 84F84530 strb r3, [r4, #69] + 14965 0062 0AE0 b .L1153 + 14966 .LVL1148: + 14967 .L1146: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14968 .loc 1 3344 7 view .LVU4447 + 14969 0064 0022 movs r2, #0 + 14970 0066 0421 movs r1, #4 + 14971 .LVL1149: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14972 .loc 1 3344 7 is_stmt 0 view .LVU4448 + 14973 0068 0068 ldr r0, [r0] + 14974 .LVL1150: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 14975 .loc 1 3344 7 view .LVU4449 + 14976 006a FFF7FEFF bl TIM_CCxChannelCmd + 14977 .LVL1151: +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14978 .loc 1 3345 7 is_stmt 1 view .LVU4450 + 14979 006e DDE7 b .L1148 + 14980 .L1150: +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14981 .loc 1 3362 5 view .LVU4451 +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14982 .loc 1 3362 5 is_stmt 0 discriminator 1 view .LVU4452 + 14983 0070 0123 movs r3, #1 + 14984 0072 84F83E30 strb r3, [r4, #62] +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14985 .loc 1 3363 5 is_stmt 1 view .LVU4453 +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14986 .loc 1 3363 5 is_stmt 0 discriminator 1 view .LVU4454 + 14987 0076 84F84430 strb r3, [r4, #68] + 14988 .L1153: +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14989 .loc 1 3374 3 is_stmt 1 view .LVU4455 +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 14990 .loc 1 3375 1 is_stmt 0 view .LVU4456 + 14991 007a 0020 movs r0, #0 + 14992 007c 38BD pop {r3, r4, r5, pc} + 14993 .LVL1152: + 14994 .L1157: +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14995 .loc 1 3362 5 is_stmt 1 view .LVU4457 +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14996 .loc 1 3362 5 is_stmt 0 discriminator 3 view .LVU4458 + 14997 007e 0123 movs r3, #1 + 14998 0080 84F83F30 strb r3, [r4, #63] +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 14999 .loc 1 3363 5 is_stmt 1 view .LVU4459 +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15000 .loc 1 3363 5 is_stmt 0 discriminator 3 view .LVU4460 + ARM GAS /tmp/cc0aF2h1.s page 469 + + + 15001 0084 84F84530 strb r3, [r4, #69] + 15002 0088 F7E7 b .L1153 + 15003 .cfi_endproc + 15004 .LFE183: + 15006 .section .text.HAL_TIM_Encoder_Start_IT,"ax",%progbits + 15007 .align 1 + 15008 .global HAL_TIM_Encoder_Start_IT + 15009 .syntax unified + 15010 .thumb + 15011 .thumb_func + 15013 HAL_TIM_Encoder_Start_IT: + 15014 .LVL1153: + 15015 .LFB184: +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15016 .loc 1 3388 1 is_stmt 1 view -0 + 15017 .cfi_startproc + 15018 @ args = 0, pretend = 0, frame = 0 + 15019 @ frame_needed = 0, uses_anonymous_args = 0 +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15020 .loc 1 3388 1 is_stmt 0 view .LVU4462 + 15021 0000 38B5 push {r3, r4, r5, lr} + 15022 .cfi_def_cfa_offset 16 + 15023 .cfi_offset 3, -16 + 15024 .cfi_offset 4, -12 + 15025 .cfi_offset 5, -8 + 15026 .cfi_offset 14, -4 + 15027 0002 0446 mov r4, r0 +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15028 .loc 1 3389 3 is_stmt 1 view .LVU4463 +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15029 .loc 1 3389 31 is_stmt 0 view .LVU4464 + 15030 0004 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 15031 .LVL1154: +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15032 .loc 1 3389 31 view .LVU4465 + 15033 0008 C0B2 uxtb r0, r0 + 15034 .LVL1155: +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15035 .loc 1 3390 3 is_stmt 1 view .LVU4466 +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15036 .loc 1 3390 31 is_stmt 0 view .LVU4467 + 15037 000a 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 15038 .LVL1156: +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15039 .loc 1 3391 3 is_stmt 1 view .LVU4468 +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15040 .loc 1 3391 31 is_stmt 0 view .LVU4469 + 15041 000e 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 15042 0012 D2B2 uxtb r2, r2 + 15043 .LVL1157: +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15044 .loc 1 3392 3 is_stmt 1 view .LVU4470 +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15045 .loc 1 3392 31 is_stmt 0 view .LVU4471 + 15046 0014 94F845C0 ldrb ip, [r4, #69] @ zero_extendqisi2 + 15047 .LVL1158: +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 470 + + + 15048 .loc 1 3395 3 is_stmt 1 view .LVU4472 +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15049 .loc 1 3398 3 view .LVU4473 +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15050 .loc 1 3398 6 is_stmt 0 view .LVU4474 + 15051 0018 0D46 mov r5, r1 + 15052 001a 09BB cbnz r1, .L1159 +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 15053 .loc 1 3400 5 is_stmt 1 view .LVU4475 +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 15054 .loc 1 3400 8 is_stmt 0 view .LVU4476 + 15055 001c 0128 cmp r0, #1 + 15056 001e 5ED1 bne .L1167 +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15057 .loc 1 3401 9 view .LVU4477 + 15058 0020 012A cmp r2, #1 + 15059 0022 5DD1 bne .L1160 +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15060 .loc 1 3407 7 is_stmt 1 view .LVU4478 + 15061 0024 0223 movs r3, #2 + 15062 .LVL1159: +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15063 .loc 1 3407 7 is_stmt 0 view .LVU4479 + 15064 0026 84F83E30 strb r3, [r4, #62] +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15065 .loc 1 3408 7 is_stmt 1 view .LVU4480 + 15066 002a 84F84430 strb r3, [r4, #68] + 15067 .LVL1160: + 15068 .L1161: +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15069 .loc 1 3444 3 view .LVU4481 + 15070 002e 002D cmp r5, #0 + 15071 0030 39D0 beq .L1163 + 15072 0032 042D cmp r5, #4 + 15073 0034 48D0 beq .L1164 +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15074 .loc 1 3462 7 view .LVU4482 + 15075 0036 0122 movs r2, #1 + 15076 .LVL1161: +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15077 .loc 1 3462 7 is_stmt 0 view .LVU4483 + 15078 0038 0021 movs r1, #0 + 15079 .LVL1162: +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15080 .loc 1 3462 7 view .LVU4484 + 15081 003a 2068 ldr r0, [r4] + 15082 .LVL1163: +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15083 .loc 1 3462 7 view .LVU4485 + 15084 003c FFF7FEFF bl TIM_CCxChannelCmd + 15085 .LVL1164: +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 15086 .loc 1 3463 7 is_stmt 1 view .LVU4486 + 15087 0040 0122 movs r2, #1 + 15088 0042 0421 movs r1, #4 + 15089 0044 2068 ldr r0, [r4] + 15090 0046 FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/cc0aF2h1.s page 471 + + + 15091 .LVL1165: +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 15092 .loc 1 3464 7 view .LVU4487 + 15093 004a 2268 ldr r2, [r4] + 15094 004c D368 ldr r3, [r2, #12] + 15095 004e 43F00203 orr r3, r3, #2 + 15096 0052 D360 str r3, [r2, #12] +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 15097 .loc 1 3465 7 view .LVU4488 + 15098 0054 2268 ldr r2, [r4] + 15099 0056 D368 ldr r3, [r2, #12] + 15100 0058 43F00403 orr r3, r3, #4 + 15101 005c D360 str r3, [r2, #12] +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15102 .loc 1 3466 7 view .LVU4489 + 15103 005e 2CE0 b .L1166 + 15104 .LVL1166: + 15105 .L1159: +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15106 .loc 1 3466 7 is_stmt 0 view .LVU4490 + 15107 0060 DBB2 uxtb r3, r3 +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15108 .loc 1 3466 7 view .LVU4491 + 15109 0062 5FFA8CFC uxtb ip, ip +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15110 .loc 1 3411 8 is_stmt 1 view .LVU4492 +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15111 .loc 1 3411 11 is_stmt 0 view .LVU4493 + 15112 0066 0429 cmp r1, #4 + 15113 0068 12D0 beq .L1175 +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 15114 .loc 1 3426 5 is_stmt 1 view .LVU4494 +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 15115 .loc 1 3426 8 is_stmt 0 view .LVU4495 + 15116 006a 0128 cmp r0, #1 + 15117 006c 3DD1 bne .L1170 +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 15118 .loc 1 3427 9 view .LVU4496 + 15119 006e 012B cmp r3, #1 + 15120 0070 36D1 bne .L1160 +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 15121 .loc 1 3428 9 view .LVU4497 + 15122 0072 012A cmp r2, #1 + 15123 0074 3BD1 bne .L1171 +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15124 .loc 1 3429 9 view .LVU4498 + 15125 0076 BCF1010F cmp ip, #1 + 15126 007a 3AD1 bne .L1172 +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15127 .loc 1 3435 7 is_stmt 1 view .LVU4499 + 15128 007c 0223 movs r3, #2 + 15129 .LVL1167: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15130 .loc 1 3435 7 is_stmt 0 view .LVU4500 + 15131 007e 84F83E30 strb r3, [r4, #62] +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15132 .loc 1 3436 7 is_stmt 1 view .LVU4501 + ARM GAS /tmp/cc0aF2h1.s page 472 + + + 15133 0082 84F83F30 strb r3, [r4, #63] +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15134 .loc 1 3437 7 view .LVU4502 + 15135 0086 84F84430 strb r3, [r4, #68] +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15136 .loc 1 3438 7 view .LVU4503 + 15137 008a 84F84530 strb r3, [r4, #69] + 15138 008e CEE7 b .L1161 + 15139 .LVL1168: + 15140 .L1175: +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 15141 .loc 1 3413 5 view .LVU4504 +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 15142 .loc 1 3413 8 is_stmt 0 view .LVU4505 + 15143 0090 012B cmp r3, #1 + 15144 0092 26D1 bne .L1168 +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15145 .loc 1 3414 9 view .LVU4506 + 15146 0094 BCF1010F cmp ip, #1 + 15147 0098 25D1 bne .L1169 +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15148 .loc 1 3420 7 is_stmt 1 view .LVU4507 + 15149 009a 0223 movs r3, #2 + 15150 .LVL1169: +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15151 .loc 1 3420 7 is_stmt 0 view .LVU4508 + 15152 009c 84F83F30 strb r3, [r4, #63] +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15153 .loc 1 3421 7 is_stmt 1 view .LVU4509 + 15154 00a0 84F84530 strb r3, [r4, #69] + 15155 00a4 C3E7 b .L1161 + 15156 .LVL1170: + 15157 .L1163: +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 15158 .loc 1 3448 7 view .LVU4510 + 15159 00a6 0122 movs r2, #1 + 15160 .LVL1171: +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 15161 .loc 1 3448 7 is_stmt 0 view .LVU4511 + 15162 00a8 0021 movs r1, #0 + 15163 .LVL1172: +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 15164 .loc 1 3448 7 view .LVU4512 + 15165 00aa 2068 ldr r0, [r4] + 15166 .LVL1173: +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 15167 .loc 1 3448 7 view .LVU4513 + 15168 00ac FFF7FEFF bl TIM_CCxChannelCmd + 15169 .LVL1174: +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 15170 .loc 1 3449 7 is_stmt 1 view .LVU4514 + 15171 00b0 2268 ldr r2, [r4] + 15172 00b2 D368 ldr r3, [r2, #12] + 15173 00b4 43F00203 orr r3, r3, #2 + 15174 00b8 D360 str r3, [r2, #12] +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15175 .loc 1 3450 7 view .LVU4515 + ARM GAS /tmp/cc0aF2h1.s page 473 + + + 15176 .L1166: +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15177 .loc 1 3471 3 view .LVU4516 + 15178 00ba 2268 ldr r2, [r4] + 15179 00bc 1368 ldr r3, [r2] + 15180 00be 43F00103 orr r3, r3, #1 + 15181 00c2 1360 str r3, [r2] +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15182 .loc 1 3474 3 view .LVU4517 +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15183 .loc 1 3474 10 is_stmt 0 view .LVU4518 + 15184 00c4 0020 movs r0, #0 + 15185 00c6 0BE0 b .L1160 + 15186 .LVL1175: + 15187 .L1164: +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 15188 .loc 1 3455 7 is_stmt 1 view .LVU4519 + 15189 00c8 0122 movs r2, #1 + 15190 .LVL1176: +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 15191 .loc 1 3455 7 is_stmt 0 view .LVU4520 + 15192 00ca 0421 movs r1, #4 + 15193 .LVL1177: +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 15194 .loc 1 3455 7 view .LVU4521 + 15195 00cc 2068 ldr r0, [r4] + 15196 .LVL1178: +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 15197 .loc 1 3455 7 view .LVU4522 + 15198 00ce FFF7FEFF bl TIM_CCxChannelCmd + 15199 .LVL1179: +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** break; + 15200 .loc 1 3456 7 is_stmt 1 view .LVU4523 + 15201 00d2 2268 ldr r2, [r4] + 15202 00d4 D368 ldr r3, [r2, #12] + 15203 00d6 43F00403 orr r3, r3, #4 + 15204 00da D360 str r3, [r2, #12] +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15205 .loc 1 3457 7 view .LVU4524 + 15206 00dc EDE7 b .L1166 + 15207 .LVL1180: + 15208 .L1167: +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15209 .loc 1 3403 14 is_stmt 0 view .LVU4525 + 15210 00de 0120 movs r0, #1 + 15211 .LVL1181: + 15212 .L1160: +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15213 .loc 1 3475 1 view .LVU4526 + 15214 00e0 38BD pop {r3, r4, r5, pc} + 15215 .LVL1182: + 15216 .L1168: +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15217 .loc 1 3416 14 view .LVU4527 + 15218 00e2 0120 movs r0, #1 + 15219 .LVL1183: +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 474 + + + 15220 .loc 1 3416 14 view .LVU4528 + 15221 00e4 FCE7 b .L1160 + 15222 .LVL1184: + 15223 .L1169: +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15224 .loc 1 3416 14 view .LVU4529 + 15225 00e6 1846 mov r0, r3 + 15226 .LVL1185: +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15227 .loc 1 3416 14 view .LVU4530 + 15228 00e8 FAE7 b .L1160 + 15229 .LVL1186: + 15230 .L1170: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15231 .loc 1 3431 14 view .LVU4531 + 15232 00ea 0120 movs r0, #1 + 15233 .LVL1187: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15234 .loc 1 3431 14 view .LVU4532 + 15235 00ec F8E7 b .L1160 + 15236 .LVL1188: + 15237 .L1171: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15238 .loc 1 3431 14 view .LVU4533 + 15239 00ee 1846 mov r0, r3 + 15240 .LVL1189: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15241 .loc 1 3431 14 view .LVU4534 + 15242 00f0 F6E7 b .L1160 + 15243 .LVL1190: + 15244 .L1172: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15245 .loc 1 3431 14 view .LVU4535 + 15246 00f2 1046 mov r0, r2 + 15247 .LVL1191: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15248 .loc 1 3431 14 view .LVU4536 + 15249 00f4 F4E7 b .L1160 + 15250 .cfi_endproc + 15251 .LFE184: + 15253 .section .text.HAL_TIM_Encoder_Stop_IT,"ax",%progbits + 15254 .align 1 + 15255 .global HAL_TIM_Encoder_Stop_IT + 15256 .syntax unified + 15257 .thumb + 15258 .thumb_func + 15260 HAL_TIM_Encoder_Stop_IT: + 15261 .LVL1192: + 15262 .LFB185: +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 15263 .loc 1 3488 1 is_stmt 1 view -0 + 15264 .cfi_startproc + 15265 @ args = 0, pretend = 0, frame = 0 + 15266 @ frame_needed = 0, uses_anonymous_args = 0 +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 15267 .loc 1 3488 1 is_stmt 0 view .LVU4538 + 15268 0000 38B5 push {r3, r4, r5, lr} + ARM GAS /tmp/cc0aF2h1.s page 475 + + + 15269 .cfi_def_cfa_offset 16 + 15270 .cfi_offset 3, -16 + 15271 .cfi_offset 4, -12 + 15272 .cfi_offset 5, -8 + 15273 .cfi_offset 14, -4 + 15274 0002 0446 mov r4, r0 +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15275 .loc 1 3490 3 is_stmt 1 view .LVU4539 +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15276 .loc 1 3494 3 view .LVU4540 +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15277 .loc 1 3494 6 is_stmt 0 view .LVU4541 + 15278 0004 0D46 mov r5, r1 + 15279 0006 0029 cmp r1, #0 + 15280 0008 31D0 beq .L1187 +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15281 .loc 1 3501 8 is_stmt 1 view .LVU4542 +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15282 .loc 1 3501 11 is_stmt 0 view .LVU4543 + 15283 000a 0429 cmp r1, #4 + 15284 000c 3AD0 beq .L1188 +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15285 .loc 1 3510 5 is_stmt 1 view .LVU4544 + 15286 000e 0022 movs r2, #0 + 15287 0010 1146 mov r1, r2 + 15288 .LVL1193: +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15289 .loc 1 3510 5 is_stmt 0 view .LVU4545 + 15290 0012 0068 ldr r0, [r0] + 15291 .LVL1194: +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15292 .loc 1 3510 5 view .LVU4546 + 15293 0014 FFF7FEFF bl TIM_CCxChannelCmd + 15294 .LVL1195: +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15295 .loc 1 3511 5 is_stmt 1 view .LVU4547 + 15296 0018 0022 movs r2, #0 + 15297 001a 0421 movs r1, #4 + 15298 001c 2068 ldr r0, [r4] + 15299 001e FFF7FEFF bl TIM_CCxChannelCmd + 15300 .LVL1196: +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 15301 .loc 1 3514 5 view .LVU4548 + 15302 0022 2268 ldr r2, [r4] + 15303 0024 D368 ldr r3, [r2, #12] + 15304 0026 23F00203 bic r3, r3, #2 + 15305 002a D360 str r3, [r2, #12] +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15306 .loc 1 3515 5 view .LVU4549 + 15307 002c 2268 ldr r2, [r4] + 15308 002e D368 ldr r3, [r2, #12] + 15309 0030 23F00403 bic r3, r3, #4 + 15310 0034 D360 str r3, [r2, #12] + 15311 .L1178: +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15312 .loc 1 3519 3 view .LVU4550 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + ARM GAS /tmp/cc0aF2h1.s page 476 + + + 15313 .loc 1 3519 3 view .LVU4551 + 15314 0036 2368 ldr r3, [r4] + 15315 0038 196A ldr r1, [r3, #32] + 15316 003a 41F21112 movw r2, #4369 + 15317 003e 1142 tst r1, r2 + 15318 0040 08D1 bne .L1180 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15319 .loc 1 3519 3 discriminator 1 view .LVU4552 + 15320 0042 196A ldr r1, [r3, #32] + 15321 0044 40F24442 movw r2, #1092 + 15322 0048 1142 tst r1, r2 + 15323 004a 03D1 bne .L1180 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15324 .loc 1 3519 3 discriminator 3 view .LVU4553 + 15325 004c 1A68 ldr r2, [r3] + 15326 004e 22F00102 bic r2, r2, #1 + 15327 0052 1A60 str r2, [r3] + 15328 .L1180: +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15329 .loc 1 3519 3 discriminator 5 view .LVU4554 +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15330 .loc 1 3522 3 view .LVU4555 +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15331 .loc 1 3522 6 is_stmt 0 view .LVU4556 + 15332 0054 0DB3 cbz r5, .L1181 +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15333 .loc 1 3522 34 discriminator 1 view .LVU4557 + 15334 0056 042D cmp r5, #4 + 15335 0058 26D0 beq .L1189 +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15336 .loc 1 3529 5 is_stmt 1 view .LVU4558 + 15337 005a 0123 movs r3, #1 + 15338 005c 84F83E30 strb r3, [r4, #62] +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 15339 .loc 1 3530 5 view .LVU4559 + 15340 0060 84F83F30 strb r3, [r4, #63] +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15341 .loc 1 3531 5 view .LVU4560 + 15342 0064 84F84430 strb r3, [r4, #68] +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15343 .loc 1 3532 5 view .LVU4561 + 15344 0068 84F84530 strb r3, [r4, #69] + 15345 006c 1AE0 b .L1184 + 15346 .LVL1197: + 15347 .L1187: +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15348 .loc 1 3496 5 view .LVU4562 + 15349 006e 0022 movs r2, #0 + 15350 0070 1146 mov r1, r2 + 15351 .LVL1198: +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15352 .loc 1 3496 5 is_stmt 0 view .LVU4563 + 15353 0072 0068 ldr r0, [r0] + 15354 .LVL1199: +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15355 .loc 1 3496 5 view .LVU4564 + 15356 0074 FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/cc0aF2h1.s page 477 + + + 15357 .LVL1200: +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15358 .loc 1 3499 5 is_stmt 1 view .LVU4565 + 15359 0078 2268 ldr r2, [r4] + 15360 007a D368 ldr r3, [r2, #12] + 15361 007c 23F00203 bic r3, r3, #2 + 15362 0080 D360 str r3, [r2, #12] + 15363 0082 D8E7 b .L1178 + 15364 .LVL1201: + 15365 .L1188: +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15366 .loc 1 3503 5 view .LVU4566 + 15367 0084 0022 movs r2, #0 + 15368 0086 0421 movs r1, #4 + 15369 .LVL1202: +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15370 .loc 1 3503 5 is_stmt 0 view .LVU4567 + 15371 0088 0068 ldr r0, [r0] + 15372 .LVL1203: +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15373 .loc 1 3503 5 view .LVU4568 + 15374 008a FFF7FEFF bl TIM_CCxChannelCmd + 15375 .LVL1204: +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15376 .loc 1 3506 5 is_stmt 1 view .LVU4569 + 15377 008e 2268 ldr r2, [r4] + 15378 0090 D368 ldr r3, [r2, #12] + 15379 0092 23F00403 bic r3, r3, #4 + 15380 0096 D360 str r3, [r2, #12] + 15381 0098 CDE7 b .L1178 + 15382 .L1181: +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15383 .loc 1 3524 5 view .LVU4570 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15384 .loc 1 3524 5 is_stmt 0 discriminator 1 view .LVU4571 + 15385 009a 0123 movs r3, #1 + 15386 009c 84F83E30 strb r3, [r4, #62] +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15387 .loc 1 3525 5 is_stmt 1 view .LVU4572 +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15388 .loc 1 3525 5 is_stmt 0 discriminator 1 view .LVU4573 + 15389 00a0 84F84430 strb r3, [r4, #68] + 15390 .L1184: +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15391 .loc 1 3536 3 is_stmt 1 view .LVU4574 +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15392 .loc 1 3537 1 is_stmt 0 view .LVU4575 + 15393 00a4 0020 movs r0, #0 + 15394 00a6 38BD pop {r3, r4, r5, pc} + 15395 .LVL1205: + 15396 .L1189: +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15397 .loc 1 3524 5 is_stmt 1 view .LVU4576 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15398 .loc 1 3524 5 is_stmt 0 discriminator 3 view .LVU4577 + 15399 00a8 0123 movs r3, #1 + 15400 00aa 84F83F30 strb r3, [r4, #63] + ARM GAS /tmp/cc0aF2h1.s page 478 + + +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15401 .loc 1 3525 5 is_stmt 1 view .LVU4578 +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15402 .loc 1 3525 5 is_stmt 0 discriminator 3 view .LVU4579 + 15403 00ae 84F84530 strb r3, [r4, #69] + 15404 00b2 F7E7 b .L1184 + 15405 .cfi_endproc + 15406 .LFE185: + 15408 .section .text.HAL_TIM_Encoder_Start_DMA,"ax",%progbits + 15409 .align 1 + 15410 .global HAL_TIM_Encoder_Start_DMA + 15411 .syntax unified + 15412 .thumb + 15413 .thumb_func + 15415 HAL_TIM_Encoder_Start_DMA: + 15416 .LVL1206: + 15417 .LFB186: +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15418 .loc 1 3554 1 is_stmt 1 view -0 + 15419 .cfi_startproc + 15420 @ args = 4, pretend = 0, frame = 0 + 15421 @ frame_needed = 0, uses_anonymous_args = 0 +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15422 .loc 1 3554 1 is_stmt 0 view .LVU4581 + 15423 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 15424 .cfi_def_cfa_offset 24 + 15425 .cfi_offset 3, -24 + 15426 .cfi_offset 4, -20 + 15427 .cfi_offset 5, -16 + 15428 .cfi_offset 6, -12 + 15429 .cfi_offset 7, -8 + 15430 .cfi_offset 14, -4 + 15431 0002 0446 mov r4, r0 + 15432 0004 1E46 mov r6, r3 + 15433 0006 BDF81870 ldrh r7, [sp, #24] +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15434 .loc 1 3555 3 is_stmt 1 view .LVU4582 +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15435 .loc 1 3555 31 is_stmt 0 view .LVU4583 + 15436 000a 90F83E50 ldrb r5, [r0, #62] @ zero_extendqisi2 + 15437 000e EDB2 uxtb r5, r5 + 15438 .LVL1207: +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15439 .loc 1 3556 3 is_stmt 1 view .LVU4584 +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15440 .loc 1 3556 31 is_stmt 0 view .LVU4585 + 15441 0010 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 15442 .LVL1208: +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15443 .loc 1 3556 31 view .LVU4586 + 15444 0014 5FFA80FC uxtb ip, r0 + 15445 .LVL1209: +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15446 .loc 1 3557 3 is_stmt 1 view .LVU4587 +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15447 .loc 1 3557 31 is_stmt 0 view .LVU4588 + 15448 0018 94F84400 ldrb r0, [r4, #68] @ zero_extendqisi2 + ARM GAS /tmp/cc0aF2h1.s page 479 + + + 15449 001c C0B2 uxtb r0, r0 + 15450 .LVL1210: +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15451 .loc 1 3558 3 is_stmt 1 view .LVU4589 +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15452 .loc 1 3558 31 is_stmt 0 view .LVU4590 + 15453 001e 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 15454 .LVL1211: +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15455 .loc 1 3561 3 is_stmt 1 view .LVU4591 +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15456 .loc 1 3564 3 view .LVU4592 +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15457 .loc 1 3564 6 is_stmt 0 view .LVU4593 + 15458 0022 8E46 mov lr, r1 + 15459 0024 0029 cmp r1, #0 + 15460 0026 31D1 bne .L1191 +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15461 .loc 1 3566 5 is_stmt 1 view .LVU4594 +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15462 .loc 1 3566 8 is_stmt 0 view .LVU4595 + 15463 0028 022D cmp r5, #2 + 15464 002a 00F0F180 beq .L1192 +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15465 .loc 1 3567 9 view .LVU4596 + 15466 002e 0228 cmp r0, #2 + 15467 0030 00F0EB80 beq .L1198 +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 15468 .loc 1 3571 10 is_stmt 1 view .LVU4597 +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 15469 .loc 1 3571 13 is_stmt 0 view .LVU4598 + 15470 0034 012D cmp r5, #1 + 15471 0036 40F0EA80 bne .L1199 +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15472 .loc 1 3572 14 view .LVU4599 + 15473 003a 0128 cmp r0, #1 + 15474 003c 40F0E880 bne .L1192 +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15475 .loc 1 3574 7 is_stmt 1 view .LVU4600 +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15476 .loc 1 3574 10 is_stmt 0 view .LVU4601 + 15477 0040 002A cmp r2, #0 + 15478 0042 00F0E780 beq .L1200 +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15479 .loc 1 3574 28 discriminator 1 view .LVU4602 + 15480 0046 002F cmp r7, #0 + 15481 0048 00F0E680 beq .L1201 +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15482 .loc 1 3580 9 is_stmt 1 view .LVU4603 + 15483 004c 0223 movs r3, #2 + 15484 .LVL1212: +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15485 .loc 1 3580 9 is_stmt 0 view .LVU4604 + 15486 004e 84F83E30 strb r3, [r4, #62] +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15487 .loc 1 3581 9 is_stmt 1 view .LVU4605 + 15488 0052 84F84430 strb r3, [r4, #68] + ARM GAS /tmp/cc0aF2h1.s page 480 + + + 15489 .L1193: +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15490 .loc 1 3646 3 view .LVU4606 + 15491 0056 BEF1000F cmp lr, #0 + 15492 005a 61D0 beq .L1195 + 15493 005c BEF1040F cmp lr, #4 + 15494 0060 00F08180 beq .L1196 +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15495 .loc 1 3706 7 view .LVU4607 +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15496 .loc 1 3706 17 is_stmt 0 view .LVU4608 + 15497 0064 636A ldr r3, [r4, #36] +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15498 .loc 1 3706 52 view .LVU4609 + 15499 0066 7C49 ldr r1, .L1228 + 15500 .LVL1213: +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15501 .loc 1 3706 52 view .LVU4610 + 15502 0068 9962 str r1, [r3, #40] +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15503 .loc 1 3707 7 is_stmt 1 view .LVU4611 +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15504 .loc 1 3707 17 is_stmt 0 view .LVU4612 + 15505 006a 636A ldr r3, [r4, #36] +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15506 .loc 1 3707 56 view .LVU4613 + 15507 006c 7B49 ldr r1, .L1228+4 + 15508 006e D962 str r1, [r3, #44] +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15509 .loc 1 3710 7 is_stmt 1 view .LVU4614 +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15510 .loc 1 3710 17 is_stmt 0 view .LVU4615 + 15511 0070 636A ldr r3, [r4, #36] +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15512 .loc 1 3710 53 view .LVU4616 + 15513 0072 7B49 ldr r1, .L1228+8 + 15514 0074 1963 str r1, [r3, #48] +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15515 .loc 1 3713 7 is_stmt 1 view .LVU4617 +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15516 .loc 1 3713 71 is_stmt 0 view .LVU4618 + 15517 0076 2168 ldr r1, [r4] +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15518 .loc 1 3713 11 view .LVU4619 + 15519 0078 3B46 mov r3, r7 + 15520 007a 3431 adds r1, r1, #52 + 15521 007c 606A ldr r0, [r4, #36] + 15522 .LVL1214: +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15523 .loc 1 3713 11 view .LVU4620 + 15524 007e FFF7FEFF bl HAL_DMA_Start_IT + 15525 .LVL1215: +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15526 .loc 1 3713 10 discriminator 1 view .LVU4621 + 15527 0082 0028 cmp r0, #0 + 15528 0084 00F09380 beq .L1223 +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 481 + + + 15529 .loc 1 3717 16 view .LVU4622 + 15530 0088 0125 movs r5, #1 + 15531 .LVL1216: +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15532 .loc 1 3717 16 view .LVU4623 + 15533 008a C1E0 b .L1192 + 15534 .LVL1217: + 15535 .L1191: +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15536 .loc 1 3717 16 view .LVU4624 + 15537 008c DBB2 uxtb r3, r3 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15538 .loc 1 3589 8 is_stmt 1 view .LVU4625 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15539 .loc 1 3589 11 is_stmt 0 view .LVU4626 + 15540 008e 0429 cmp r1, #4 + 15541 0090 2CD0 beq .L1224 +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15542 .loc 1 3616 5 is_stmt 1 view .LVU4627 +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15543 .loc 1 3616 8 is_stmt 0 view .LVU4628 + 15544 0092 022D cmp r5, #2 + 15545 0094 00F0BC80 beq .L1192 +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15546 .loc 1 3617 9 view .LVU4629 + 15547 0098 BCF1020F cmp ip, #2 + 15548 009c 00F0CA80 beq .L1208 +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15549 .loc 1 3618 9 view .LVU4630 + 15550 00a0 0228 cmp r0, #2 + 15551 00a2 00F0C980 beq .L1209 +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15552 .loc 1 3619 9 view .LVU4631 + 15553 00a6 022B cmp r3, #2 + 15554 00a8 00F0C880 beq .L1210 +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) + 15555 .loc 1 3623 10 is_stmt 1 view .LVU4632 +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) + 15556 .loc 1 3623 13 is_stmt 0 view .LVU4633 + 15557 00ac 012D cmp r5, #1 + 15558 00ae 40F0C780 bne .L1211 +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY) + 15559 .loc 1 3624 14 view .LVU4634 + 15560 00b2 BCF1010F cmp ip, #1 + 15561 00b6 40F0AB80 bne .L1192 +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15562 .loc 1 3625 14 view .LVU4635 + 15563 00ba 0128 cmp r0, #1 + 15564 00bc 40F0C280 bne .L1212 +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15565 .loc 1 3626 14 view .LVU4636 + 15566 00c0 012B cmp r3, #1 + 15567 00c2 40F0C180 bne .L1213 +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15568 .loc 1 3628 7 is_stmt 1 view .LVU4637 +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15569 .loc 1 3628 10 is_stmt 0 view .LVU4638 + ARM GAS /tmp/cc0aF2h1.s page 482 + + + 15570 00c6 002A cmp r2, #0 + 15571 00c8 00F0C080 beq .L1214 +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15572 .loc 1 3628 30 discriminator 1 view .LVU4639 + 15573 00cc 002E cmp r6, #0 + 15574 00ce 00F0BF80 beq .L1215 +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15575 .loc 1 3628 52 discriminator 2 view .LVU4640 + 15576 00d2 002F cmp r7, #0 + 15577 00d4 00F0BE80 beq .L1216 +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15578 .loc 1 3634 9 is_stmt 1 view .LVU4641 + 15579 00d8 0223 movs r3, #2 + 15580 .LVL1218: +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15581 .loc 1 3634 9 is_stmt 0 view .LVU4642 + 15582 00da 84F83E30 strb r3, [r4, #62] +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15583 .loc 1 3635 9 is_stmt 1 view .LVU4643 + 15584 00de 84F83F30 strb r3, [r4, #63] +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15585 .loc 1 3636 9 view .LVU4644 + 15586 00e2 84F84430 strb r3, [r4, #68] +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15587 .loc 1 3637 9 view .LVU4645 + 15588 00e6 84F84530 strb r3, [r4, #69] +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15589 .loc 1 3628 10 is_stmt 0 view .LVU4646 + 15590 00ea B4E7 b .L1193 + 15591 .LVL1219: + 15592 .L1224: +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15593 .loc 1 3591 5 is_stmt 1 view .LVU4647 +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15594 .loc 1 3591 8 is_stmt 0 view .LVU4648 + 15595 00ec BCF1020F cmp ip, #2 + 15596 00f0 00F09480 beq .L1202 +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15597 .loc 1 3592 9 view .LVU4649 + 15598 00f4 022B cmp r3, #2 + 15599 00f6 00F09380 beq .L1203 +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15600 .loc 1 3596 10 is_stmt 1 view .LVU4650 +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15601 .loc 1 3596 13 is_stmt 0 view .LVU4651 + 15602 00fa BCF1010F cmp ip, #1 + 15603 00fe 40F09180 bne .L1204 +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15604 .loc 1 3597 14 view .LVU4652 + 15605 0102 012B cmp r3, #1 + 15606 0104 40F09080 bne .L1205 +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15607 .loc 1 3599 7 is_stmt 1 view .LVU4653 +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15608 .loc 1 3599 10 is_stmt 0 view .LVU4654 + 15609 0108 002E cmp r6, #0 + 15610 010a 00F08F80 beq .L1206 + ARM GAS /tmp/cc0aF2h1.s page 483 + + +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15611 .loc 1 3599 28 discriminator 1 view .LVU4655 + 15612 010e 002F cmp r7, #0 + 15613 0110 00F08E80 beq .L1207 +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15614 .loc 1 3605 9 is_stmt 1 view .LVU4656 + 15615 0114 0223 movs r3, #2 + 15616 .LVL1220: +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15617 .loc 1 3605 9 is_stmt 0 view .LVU4657 + 15618 0116 84F83F30 strb r3, [r4, #63] +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15619 .loc 1 3606 9 is_stmt 1 view .LVU4658 + 15620 011a 84F84530 strb r3, [r4, #69] + 15621 011e 9AE7 b .L1193 + 15622 .L1195: +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15623 .loc 1 3651 7 view .LVU4659 +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15624 .loc 1 3651 17 is_stmt 0 view .LVU4660 + 15625 0120 636A ldr r3, [r4, #36] +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15626 .loc 1 3651 52 view .LVU4661 + 15627 0122 4D49 ldr r1, .L1228 + 15628 .LVL1221: +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15629 .loc 1 3651 52 view .LVU4662 + 15630 0124 9962 str r1, [r3, #40] +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15631 .loc 1 3652 7 is_stmt 1 view .LVU4663 +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15632 .loc 1 3652 17 is_stmt 0 view .LVU4664 + 15633 0126 636A ldr r3, [r4, #36] +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15634 .loc 1 3652 56 view .LVU4665 + 15635 0128 4C49 ldr r1, .L1228+4 + 15636 012a D962 str r1, [r3, #44] +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15637 .loc 1 3655 7 is_stmt 1 view .LVU4666 +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15638 .loc 1 3655 17 is_stmt 0 view .LVU4667 + 15639 012c 636A ldr r3, [r4, #36] +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15640 .loc 1 3655 53 view .LVU4668 + 15641 012e 4C49 ldr r1, .L1228+8 + 15642 0130 1963 str r1, [r3, #48] +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15643 .loc 1 3658 7 is_stmt 1 view .LVU4669 +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15644 .loc 1 3658 71 is_stmt 0 view .LVU4670 + 15645 0132 2168 ldr r1, [r4] +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15646 .loc 1 3658 11 view .LVU4671 + 15647 0134 3B46 mov r3, r7 + 15648 0136 3431 adds r1, r1, #52 + 15649 0138 606A ldr r0, [r4, #36] + 15650 .LVL1222: + ARM GAS /tmp/cc0aF2h1.s page 484 + + +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15651 .loc 1 3658 11 view .LVU4672 + 15652 013a FFF7FEFF bl HAL_DMA_Start_IT + 15653 .LVL1223: +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15654 .loc 1 3658 10 discriminator 1 view .LVU4673 + 15655 013e 0546 mov r5, r0 + 15656 .LVL1224: +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15657 .loc 1 3658 10 discriminator 1 view .LVU4674 + 15658 0140 08B1 cbz r0, .L1225 +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15659 .loc 1 3662 16 view .LVU4675 + 15660 0142 0125 movs r5, #1 + 15661 0144 64E0 b .L1192 + 15662 .L1225: +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15663 .loc 1 3665 7 is_stmt 1 view .LVU4676 + 15664 0146 2268 ldr r2, [r4] + 15665 0148 D368 ldr r3, [r2, #12] + 15666 014a 43F40073 orr r3, r3, #512 + 15667 014e D360 str r3, [r2, #12] +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15668 .loc 1 3668 7 view .LVU4677 + 15669 0150 0122 movs r2, #1 + 15670 0152 0021 movs r1, #0 + 15671 0154 2068 ldr r0, [r4] + 15672 0156 FFF7FEFF bl TIM_CCxChannelCmd + 15673 .LVL1225: +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15674 .loc 1 3671 7 view .LVU4678 + 15675 015a 2268 ldr r2, [r4] + 15676 015c 1368 ldr r3, [r2] + 15677 015e 43F00103 orr r3, r3, #1 + 15678 0162 1360 str r3, [r2] +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15679 .loc 1 3673 7 view .LVU4679 + 15680 0164 54E0 b .L1192 + 15681 .LVL1226: + 15682 .L1196: +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15683 .loc 1 3679 7 view .LVU4680 +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15684 .loc 1 3679 17 is_stmt 0 view .LVU4681 + 15685 0166 A36A ldr r3, [r4, #40] +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15686 .loc 1 3679 52 view .LVU4682 + 15687 0168 3B4A ldr r2, .L1228 + 15688 .LVL1227: +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15689 .loc 1 3679 52 view .LVU4683 + 15690 016a 9A62 str r2, [r3, #40] +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15691 .loc 1 3680 7 is_stmt 1 view .LVU4684 +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15692 .loc 1 3680 17 is_stmt 0 view .LVU4685 + 15693 016c A36A ldr r3, [r4, #40] + ARM GAS /tmp/cc0aF2h1.s page 485 + + +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15694 .loc 1 3680 56 view .LVU4686 + 15695 016e 3B4A ldr r2, .L1228+4 + 15696 0170 DA62 str r2, [r3, #44] +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ + 15697 .loc 1 3683 7 is_stmt 1 view .LVU4687 +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ + 15698 .loc 1 3683 17 is_stmt 0 view .LVU4688 + 15699 0172 A36A ldr r3, [r4, #40] +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the DMA channel */ + 15700 .loc 1 3683 53 view .LVU4689 + 15701 0174 3A4A ldr r2, .L1228+8 + 15702 0176 1A63 str r2, [r3, #48] +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15703 .loc 1 3685 7 is_stmt 1 view .LVU4690 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15704 .loc 1 3685 71 is_stmt 0 view .LVU4691 + 15705 0178 2168 ldr r1, [r4] + 15706 .LVL1228: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15707 .loc 1 3685 11 view .LVU4692 + 15708 017a 3B46 mov r3, r7 + 15709 017c 3246 mov r2, r6 + 15710 017e 3831 adds r1, r1, #56 + 15711 0180 A06A ldr r0, [r4, #40] + 15712 .LVL1229: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15713 .loc 1 3685 11 view .LVU4693 + 15714 0182 FFF7FEFF bl HAL_DMA_Start_IT + 15715 .LVL1230: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15716 .loc 1 3685 10 discriminator 1 view .LVU4694 + 15717 0186 0546 mov r5, r0 + 15718 .LVL1231: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15719 .loc 1 3685 10 discriminator 1 view .LVU4695 + 15720 0188 08B1 cbz r0, .L1226 +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15721 .loc 1 3689 16 view .LVU4696 + 15722 018a 0125 movs r5, #1 + 15723 018c 40E0 b .L1192 + 15724 .L1226: +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15725 .loc 1 3692 7 is_stmt 1 view .LVU4697 + 15726 018e 2268 ldr r2, [r4] + 15727 0190 D368 ldr r3, [r2, #12] + 15728 0192 43F48063 orr r3, r3, #1024 + 15729 0196 D360 str r3, [r2, #12] +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15730 .loc 1 3695 7 view .LVU4698 + 15731 0198 0122 movs r2, #1 + 15732 019a 0421 movs r1, #4 + 15733 019c 2068 ldr r0, [r4] + 15734 019e FFF7FEFF bl TIM_CCxChannelCmd + 15735 .LVL1232: +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15736 .loc 1 3698 7 view .LVU4699 + ARM GAS /tmp/cc0aF2h1.s page 486 + + + 15737 01a2 2268 ldr r2, [r4] + 15738 01a4 1368 ldr r3, [r2] + 15739 01a6 43F00103 orr r3, r3, #1 + 15740 01aa 1360 str r3, [r2] +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15741 .loc 1 3700 7 view .LVU4700 + 15742 01ac 30E0 b .L1192 + 15743 .LVL1233: + 15744 .L1223: +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15745 .loc 1 3721 7 view .LVU4701 +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15746 .loc 1 3721 17 is_stmt 0 view .LVU4702 + 15747 01ae A36A ldr r3, [r4, #40] +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15748 .loc 1 3721 52 view .LVU4703 + 15749 01b0 294A ldr r2, .L1228 + 15750 01b2 9A62 str r2, [r3, #40] +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15751 .loc 1 3722 7 is_stmt 1 view .LVU4704 +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15752 .loc 1 3722 17 is_stmt 0 view .LVU4705 + 15753 01b4 A36A ldr r3, [r4, #40] +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15754 .loc 1 3722 56 view .LVU4706 + 15755 01b6 294A ldr r2, .L1228+4 + 15756 01b8 DA62 str r2, [r3, #44] +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15757 .loc 1 3725 7 is_stmt 1 view .LVU4707 +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15758 .loc 1 3725 17 is_stmt 0 view .LVU4708 + 15759 01ba A36A ldr r3, [r4, #40] +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15760 .loc 1 3725 53 view .LVU4709 + 15761 01bc 284A ldr r2, .L1228+8 + 15762 01be 1A63 str r2, [r3, #48] +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15763 .loc 1 3728 7 is_stmt 1 view .LVU4710 +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15764 .loc 1 3728 71 is_stmt 0 view .LVU4711 + 15765 01c0 2168 ldr r1, [r4] +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15766 .loc 1 3728 11 view .LVU4712 + 15767 01c2 3B46 mov r3, r7 + 15768 01c4 3246 mov r2, r6 + 15769 01c6 3831 adds r1, r1, #56 + 15770 01c8 A06A ldr r0, [r4, #40] + 15771 01ca FFF7FEFF bl HAL_DMA_Start_IT + 15772 .LVL1234: +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15773 .loc 1 3728 10 discriminator 1 view .LVU4713 + 15774 01ce 0546 mov r5, r0 + 15775 .LVL1235: +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** Length) != HAL_OK) + 15776 .loc 1 3728 10 discriminator 1 view .LVU4714 + 15777 01d0 08B1 cbz r0, .L1227 +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + ARM GAS /tmp/cc0aF2h1.s page 487 + + + 15778 .loc 1 3732 16 view .LVU4715 + 15779 01d2 0125 movs r5, #1 + 15780 01d4 1CE0 b .L1192 + 15781 .L1227: +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ + 15782 .loc 1 3736 7 is_stmt 1 view .LVU4716 + 15783 01d6 2268 ldr r2, [r4] + 15784 01d8 D368 ldr r3, [r2, #12] + 15785 01da 43F40073 orr r3, r3, #512 + 15786 01de D360 str r3, [r2, #12] +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15787 .loc 1 3738 7 view .LVU4717 + 15788 01e0 2268 ldr r2, [r4] + 15789 01e2 D368 ldr r3, [r2, #12] + 15790 01e4 43F48063 orr r3, r3, #1024 + 15791 01e8 D360 str r3, [r2, #12] +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15792 .loc 1 3741 7 view .LVU4718 + 15793 01ea 0122 movs r2, #1 + 15794 01ec 0021 movs r1, #0 + 15795 01ee 2068 ldr r0, [r4] + 15796 01f0 FFF7FEFF bl TIM_CCxChannelCmd + 15797 .LVL1236: +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15798 .loc 1 3742 7 view .LVU4719 + 15799 01f4 0122 movs r2, #1 + 15800 01f6 0421 movs r1, #4 + 15801 01f8 2068 ldr r0, [r4] + 15802 01fa FFF7FEFF bl TIM_CCxChannelCmd + 15803 .LVL1237: +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15804 .loc 1 3745 7 view .LVU4720 + 15805 01fe 2268 ldr r2, [r4] + 15806 0200 1368 ldr r3, [r2] + 15807 0202 43F00103 orr r3, r3, #1 + 15808 0206 1360 str r3, [r2] +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15809 .loc 1 3747 7 view .LVU4721 + 15810 0208 02E0 b .L1192 + 15811 .LVL1238: + 15812 .L1198: +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15813 .loc 1 3569 14 is_stmt 0 view .LVU4722 + 15814 020a 0546 mov r5, r0 + 15815 .LVL1239: +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15816 .loc 1 3569 14 view .LVU4723 + 15817 020c 00E0 b .L1192 + 15818 .LVL1240: + 15819 .L1199: +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15820 .loc 1 3586 14 view .LVU4724 + 15821 020e 0125 movs r5, #1 + 15822 .LVL1241: + 15823 .L1192: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15824 .loc 1 3753 1 view .LVU4725 + ARM GAS /tmp/cc0aF2h1.s page 488 + + + 15825 0210 2846 mov r0, r5 + 15826 0212 F8BD pop {r3, r4, r5, r6, r7, pc} + 15827 .LVL1242: + 15828 .L1200: +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15829 .loc 1 3576 16 view .LVU4726 + 15830 0214 0546 mov r5, r0 + 15831 .LVL1243: +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15832 .loc 1 3576 16 view .LVU4727 + 15833 0216 FBE7 b .L1192 + 15834 .LVL1244: + 15835 .L1201: +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15836 .loc 1 3576 16 view .LVU4728 + 15837 0218 0546 mov r5, r0 + 15838 .LVL1245: +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15839 .loc 1 3576 16 view .LVU4729 + 15840 021a F9E7 b .L1192 + 15841 .LVL1246: + 15842 .L1202: +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15843 .loc 1 3594 14 view .LVU4730 + 15844 021c 6546 mov r5, ip + 15845 .LVL1247: +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15846 .loc 1 3594 14 view .LVU4731 + 15847 021e F7E7 b .L1192 + 15848 .LVL1248: + 15849 .L1203: +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15850 .loc 1 3594 14 view .LVU4732 + 15851 0220 1D46 mov r5, r3 + 15852 .LVL1249: +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15853 .loc 1 3594 14 view .LVU4733 + 15854 0222 F5E7 b .L1192 + 15855 .LVL1250: + 15856 .L1204: +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15857 .loc 1 3611 14 view .LVU4734 + 15858 0224 0125 movs r5, #1 + 15859 .LVL1251: +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15860 .loc 1 3611 14 view .LVU4735 + 15861 0226 F3E7 b .L1192 + 15862 .LVL1252: + 15863 .L1205: +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15864 .loc 1 3611 14 view .LVU4736 + 15865 0228 6546 mov r5, ip + 15866 .LVL1253: +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15867 .loc 1 3611 14 view .LVU4737 + 15868 022a F1E7 b .L1192 + 15869 .LVL1254: + ARM GAS /tmp/cc0aF2h1.s page 489 + + + 15870 .L1206: +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15871 .loc 1 3601 16 view .LVU4738 + 15872 022c 1D46 mov r5, r3 + 15873 .LVL1255: +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15874 .loc 1 3601 16 view .LVU4739 + 15875 022e EFE7 b .L1192 + 15876 .LVL1256: + 15877 .L1207: +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15878 .loc 1 3601 16 view .LVU4740 + 15879 0230 1D46 mov r5, r3 + 15880 .LVL1257: +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15881 .loc 1 3601 16 view .LVU4741 + 15882 0232 EDE7 b .L1192 + 15883 .LVL1258: + 15884 .L1208: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15885 .loc 1 3621 14 view .LVU4742 + 15886 0234 6546 mov r5, ip + 15887 .LVL1259: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15888 .loc 1 3621 14 view .LVU4743 + 15889 0236 EBE7 b .L1192 + 15890 .LVL1260: + 15891 .L1209: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15892 .loc 1 3621 14 view .LVU4744 + 15893 0238 0546 mov r5, r0 + 15894 .LVL1261: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15895 .loc 1 3621 14 view .LVU4745 + 15896 023a E9E7 b .L1192 + 15897 .LVL1262: + 15898 .L1210: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15899 .loc 1 3621 14 view .LVU4746 + 15900 023c 1D46 mov r5, r3 + 15901 .LVL1263: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15902 .loc 1 3621 14 view .LVU4747 + 15903 023e E7E7 b .L1192 + 15904 .LVL1264: + 15905 .L1211: +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15906 .loc 1 3642 14 view .LVU4748 + 15907 0240 0125 movs r5, #1 + 15908 .LVL1265: +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15909 .loc 1 3642 14 view .LVU4749 + 15910 0242 E5E7 b .L1192 + 15911 .LVL1266: + 15912 .L1212: +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15913 .loc 1 3642 14 view .LVU4750 + ARM GAS /tmp/cc0aF2h1.s page 490 + + + 15914 0244 6546 mov r5, ip + 15915 .LVL1267: +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15916 .loc 1 3642 14 view .LVU4751 + 15917 0246 E3E7 b .L1192 + 15918 .LVL1268: + 15919 .L1213: +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15920 .loc 1 3642 14 view .LVU4752 + 15921 0248 0546 mov r5, r0 + 15922 .LVL1269: +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15923 .loc 1 3642 14 view .LVU4753 + 15924 024a E1E7 b .L1192 + 15925 .LVL1270: + 15926 .L1214: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15927 .loc 1 3630 16 view .LVU4754 + 15928 024c 1D46 mov r5, r3 + 15929 .LVL1271: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15930 .loc 1 3630 16 view .LVU4755 + 15931 024e DFE7 b .L1192 + 15932 .LVL1272: + 15933 .L1215: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15934 .loc 1 3630 16 view .LVU4756 + 15935 0250 1D46 mov r5, r3 + 15936 .LVL1273: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15937 .loc 1 3630 16 view .LVU4757 + 15938 0252 DDE7 b .L1192 + 15939 .LVL1274: + 15940 .L1216: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15941 .loc 1 3630 16 view .LVU4758 + 15942 0254 1D46 mov r5, r3 + 15943 .LVL1275: +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 15944 .loc 1 3630 16 view .LVU4759 + 15945 0256 DBE7 b .L1192 + 15946 .L1229: + 15947 .align 2 + 15948 .L1228: + 15949 0258 00000000 .word TIM_DMACaptureCplt + 15950 025c 00000000 .word TIM_DMACaptureHalfCplt + 15951 0260 00000000 .word TIM_DMAError + 15952 .cfi_endproc + 15953 .LFE186: + 15955 .section .text.HAL_TIM_Encoder_Stop_DMA,"ax",%progbits + 15956 .align 1 + 15957 .global HAL_TIM_Encoder_Stop_DMA + 15958 .syntax unified + 15959 .thumb + 15960 .thumb_func + 15962 HAL_TIM_Encoder_Stop_DMA: + 15963 .LVL1276: + ARM GAS /tmp/cc0aF2h1.s page 491 + + + 15964 .LFB187: +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 15965 .loc 1 3766 1 is_stmt 1 view -0 + 15966 .cfi_startproc + 15967 @ args = 0, pretend = 0, frame = 0 + 15968 @ frame_needed = 0, uses_anonymous_args = 0 +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** /* Check the parameters */ + 15969 .loc 1 3766 1 is_stmt 0 view .LVU4761 + 15970 0000 38B5 push {r3, r4, r5, lr} + 15971 .cfi_def_cfa_offset 16 + 15972 .cfi_offset 3, -16 + 15973 .cfi_offset 4, -12 + 15974 .cfi_offset 5, -8 + 15975 .cfi_offset 14, -4 + 15976 0002 0446 mov r4, r0 +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15977 .loc 1 3768 3 is_stmt 1 view .LVU4762 +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15978 .loc 1 3772 3 view .LVU4763 +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15979 .loc 1 3772 6 is_stmt 0 view .LVU4764 + 15980 0004 0D46 mov r5, r1 + 15981 0006 0029 cmp r1, #0 + 15982 0008 37D0 beq .L1241 +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15983 .loc 1 3780 8 is_stmt 1 view .LVU4765 +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 15984 .loc 1 3780 11 is_stmt 0 view .LVU4766 + 15985 000a 0429 cmp r1, #4 + 15986 000c 43D0 beq .L1242 +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15987 .loc 1 3790 5 is_stmt 1 view .LVU4767 + 15988 000e 0022 movs r2, #0 + 15989 0010 1146 mov r1, r2 + 15990 .LVL1277: +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15991 .loc 1 3790 5 is_stmt 0 view .LVU4768 + 15992 0012 0068 ldr r0, [r0] + 15993 .LVL1278: +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15994 .loc 1 3790 5 view .LVU4769 + 15995 0014 FFF7FEFF bl TIM_CCxChannelCmd + 15996 .LVL1279: +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 15997 .loc 1 3791 5 is_stmt 1 view .LVU4770 + 15998 0018 0022 movs r2, #0 + 15999 001a 0421 movs r1, #4 + 16000 001c 2068 ldr r0, [r4] + 16001 001e FFF7FEFF bl TIM_CCxChannelCmd + 16002 .LVL1280: +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); + 16003 .loc 1 3794 5 view .LVU4771 + 16004 0022 2268 ldr r2, [r4] + 16005 0024 D368 ldr r3, [r2, #12] + 16006 0026 23F40073 bic r3, r3, #512 + 16007 002a D360 str r3, [r2, #12] +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + ARM GAS /tmp/cc0aF2h1.s page 492 + + + 16008 .loc 1 3795 5 view .LVU4772 + 16009 002c 2268 ldr r2, [r4] + 16010 002e D368 ldr r3, [r2, #12] + 16011 0030 23F48063 bic r3, r3, #1024 + 16012 0034 D360 str r3, [r2, #12] +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 16013 .loc 1 3796 5 view .LVU4773 +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 16014 .loc 1 3796 11 is_stmt 0 view .LVU4774 + 16015 0036 606A ldr r0, [r4, #36] + 16016 0038 FFF7FEFF bl HAL_DMA_Abort_IT + 16017 .LVL1281: +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16018 .loc 1 3797 5 is_stmt 1 view .LVU4775 +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16019 .loc 1 3797 11 is_stmt 0 view .LVU4776 + 16020 003c A06A ldr r0, [r4, #40] + 16021 003e FFF7FEFF bl HAL_DMA_Abort_IT + 16022 .LVL1282: + 16023 .L1232: +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16024 .loc 1 3801 3 is_stmt 1 view .LVU4777 +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16025 .loc 1 3801 3 view .LVU4778 + 16026 0042 2368 ldr r3, [r4] + 16027 0044 196A ldr r1, [r3, #32] + 16028 0046 41F21112 movw r2, #4369 + 16029 004a 1142 tst r1, r2 + 16030 004c 08D1 bne .L1234 +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16031 .loc 1 3801 3 discriminator 1 view .LVU4779 + 16032 004e 196A ldr r1, [r3, #32] + 16033 0050 40F24442 movw r2, #1092 + 16034 0054 1142 tst r1, r2 + 16035 0056 03D1 bne .L1234 +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16036 .loc 1 3801 3 discriminator 3 view .LVU4780 + 16037 0058 1A68 ldr r2, [r3] + 16038 005a 22F00102 bic r2, r2, #1 + 16039 005e 1A60 str r2, [r3] + 16040 .L1234: +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16041 .loc 1 3801 3 discriminator 5 view .LVU4781 +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 16042 .loc 1 3804 3 view .LVU4782 +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 16043 .loc 1 3804 6 is_stmt 0 view .LVU4783 + 16044 0060 3DB3 cbz r5, .L1235 +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** { + 16045 .loc 1 3804 34 discriminator 1 view .LVU4784 + 16046 0062 042D cmp r5, #4 + 16047 0064 2CD0 beq .L1243 +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 16048 .loc 1 3811 5 is_stmt 1 view .LVU4785 + 16049 0066 0123 movs r3, #1 + 16050 0068 84F83E30 strb r3, [r4, #62] +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/cc0aF2h1.s page 493 + + + 16051 .loc 1 3812 5 view .LVU4786 + 16052 006c 84F83F30 strb r3, [r4, #63] +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 16053 .loc 1 3813 5 view .LVU4787 + 16054 0070 84F84430 strb r3, [r4, #68] +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16055 .loc 1 3814 5 view .LVU4788 + 16056 0074 84F84530 strb r3, [r4, #69] + 16057 0078 20E0 b .L1238 + 16058 .LVL1283: + 16059 .L1241: +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16060 .loc 1 3774 5 view .LVU4789 + 16061 007a 0022 movs r2, #0 + 16062 007c 1146 mov r1, r2 + 16063 .LVL1284: +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16064 .loc 1 3774 5 is_stmt 0 view .LVU4790 + 16065 007e 0068 ldr r0, [r0] + 16066 .LVL1285: +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16067 .loc 1 3774 5 view .LVU4791 + 16068 0080 FFF7FEFF bl TIM_CCxChannelCmd + 16069 .LVL1286: +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 16070 .loc 1 3777 5 is_stmt 1 view .LVU4792 + 16071 0084 2268 ldr r2, [r4] + 16072 0086 D368 ldr r3, [r2, #12] + 16073 0088 23F40073 bic r3, r3, #512 + 16074 008c D360 str r3, [r2, #12] +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16075 .loc 1 3778 5 view .LVU4793 +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16076 .loc 1 3778 11 is_stmt 0 view .LVU4794 + 16077 008e 606A ldr r0, [r4, #36] + 16078 0090 FFF7FEFF bl HAL_DMA_Abort_IT + 16079 .LVL1287: + 16080 0094 D5E7 b .L1232 + 16081 .LVL1288: + 16082 .L1242: +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16083 .loc 1 3782 5 is_stmt 1 view .LVU4795 + 16084 0096 0022 movs r2, #0 + 16085 0098 0421 movs r1, #4 + 16086 .LVL1289: +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16087 .loc 1 3782 5 is_stmt 0 view .LVU4796 + 16088 009a 0068 ldr r0, [r0] + 16089 .LVL1290: +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16090 .loc 1 3782 5 view .LVU4797 + 16091 009c FFF7FEFF bl TIM_CCxChannelCmd + 16092 .LVL1291: +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 16093 .loc 1 3785 5 is_stmt 1 view .LVU4798 + 16094 00a0 2268 ldr r2, [r4] + 16095 00a2 D368 ldr r3, [r2, #12] + ARM GAS /tmp/cc0aF2h1.s page 494 + + + 16096 00a4 23F48063 bic r3, r3, #1024 + 16097 00a8 D360 str r3, [r2, #12] +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16098 .loc 1 3786 5 view .LVU4799 +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16099 .loc 1 3786 11 is_stmt 0 view .LVU4800 + 16100 00aa A06A ldr r0, [r4, #40] + 16101 00ac FFF7FEFF bl HAL_DMA_Abort_IT + 16102 .LVL1292: + 16103 00b0 C7E7 b .L1232 + 16104 .L1235: +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16105 .loc 1 3806 5 is_stmt 1 view .LVU4801 +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16106 .loc 1 3806 5 is_stmt 0 discriminator 1 view .LVU4802 + 16107 00b2 0123 movs r3, #1 + 16108 00b4 84F83E30 strb r3, [r4, #62] +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16109 .loc 1 3807 5 is_stmt 1 view .LVU4803 +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16110 .loc 1 3807 5 is_stmt 0 discriminator 1 view .LVU4804 + 16111 00b8 84F84430 strb r3, [r4, #68] + 16112 .L1238: +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16113 .loc 1 3818 3 is_stmt 1 view .LVU4805 +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** + 16114 .loc 1 3819 1 is_stmt 0 view .LVU4806 + 16115 00bc 0020 movs r0, #0 + 16116 00be 38BD pop {r3, r4, r5, pc} + 16117 .LVL1293: + 16118 .L1243: +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16119 .loc 1 3806 5 is_stmt 1 view .LVU4807 +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16120 .loc 1 3806 5 is_stmt 0 discriminator 3 view .LVU4808 + 16121 00c0 0123 movs r3, #1 + 16122 00c2 84F83F30 strb r3, [r4, #63] +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16123 .loc 1 3807 5 is_stmt 1 view .LVU4809 +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c **** } + 16124 .loc 1 3807 5 is_stmt 0 discriminator 3 view .LVU4810 + 16125 00c6 84F84530 strb r3, [r4, #69] + 16126 00ca F7E7 b .L1238 + 16127 .cfi_endproc + 16128 .LFE187: + 16130 .text + 16131 .Letext0: + 16132 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 16133 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 16134 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 16135 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 16136 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 16137 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 16138 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" + 16139 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h" + ARM GAS /tmp/cc0aF2h1.s page 495 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_tim.c + /tmp/cc0aF2h1.s:21 .text.TIM_OC1_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:26 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig + /tmp/cc0aF2h1.s:182 .text.TIM_OC1_SetConfig:00000088 $d + /tmp/cc0aF2h1.s:187 .text.TIM_OC3_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:192 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig + /tmp/cc0aF2h1.s:331 .text.TIM_OC3_SetConfig:00000074 $d + /tmp/cc0aF2h1.s:337 .text.TIM_OC4_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:342 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig + /tmp/cc0aF2h1.s:457 .text.TIM_OC4_SetConfig:00000060 $d + /tmp/cc0aF2h1.s:462 .text.TIM_OC5_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:467 .text.TIM_OC5_SetConfig:00000000 TIM_OC5_SetConfig + /tmp/cc0aF2h1.s:579 .text.TIM_OC5_SetConfig:0000005c $d + /tmp/cc0aF2h1.s:584 .text.TIM_OC6_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:589 .text.TIM_OC6_SetConfig:00000000 TIM_OC6_SetConfig + /tmp/cc0aF2h1.s:702 .text.TIM_OC6_SetConfig:00000060 $d + /tmp/cc0aF2h1.s:707 .text.TIM_TI1_ConfigInputStage:00000000 $t + /tmp/cc0aF2h1.s:712 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage + /tmp/cc0aF2h1.s:771 .text.TIM_TI2_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:776 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig + /tmp/cc0aF2h1.s:855 .text.TIM_TI2_ConfigInputStage:00000000 $t + /tmp/cc0aF2h1.s:860 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage + /tmp/cc0aF2h1.s:919 .text.TIM_TI3_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:924 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig + /tmp/cc0aF2h1.s:1003 .text.TIM_TI4_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:1008 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig + /tmp/cc0aF2h1.s:1087 .text.TIM_ITRx_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:1092 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig + /tmp/cc0aF2h1.s:1125 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/cc0aF2h1.s:1131 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/cc0aF2h1.s:1146 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/cc0aF2h1.s:1152 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/cc0aF2h1.s:1167 .text.HAL_TIM_Base_DeInit:00000000 $t + /tmp/cc0aF2h1.s:1173 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit + /tmp/cc0aF2h1.s:1258 .text.HAL_TIM_Base_Start:00000000 $t + /tmp/cc0aF2h1.s:1264 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start + /tmp/cc0aF2h1.s:1367 .text.HAL_TIM_Base_Start:0000006c $d + /tmp/cc0aF2h1.s:1373 .text.HAL_TIM_Base_Stop:00000000 $t + /tmp/cc0aF2h1.s:1379 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop + /tmp/cc0aF2h1.s:1420 .text.HAL_TIM_Base_Start_IT:00000000 $t + /tmp/cc0aF2h1.s:1426 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT + /tmp/cc0aF2h1.s:1534 .text.HAL_TIM_Base_Start_IT:00000074 $d + /tmp/cc0aF2h1.s:1540 .text.HAL_TIM_Base_Stop_IT:00000000 $t + /tmp/cc0aF2h1.s:1546 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT + /tmp/cc0aF2h1.s:1592 .text.HAL_TIM_Base_Start_DMA:00000000 $t + /tmp/cc0aF2h1.s:1598 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA + /tmp/cc0aF2h1.s:1752 .text.HAL_TIM_Base_Start_DMA:000000b0 $d + /tmp/cc0aF2h1.s:3847 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt + /tmp/cc0aF2h1.s:3910 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt + /tmp/cc0aF2h1.s:4946 .text.TIM_DMAError:00000000 TIM_DMAError + /tmp/cc0aF2h1.s:1761 .text.HAL_TIM_Base_Stop_DMA:00000000 $t + /tmp/cc0aF2h1.s:1767 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA + /tmp/cc0aF2h1.s:1824 .text.HAL_TIM_OC_MspInit:00000000 $t + /tmp/cc0aF2h1.s:1830 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit + /tmp/cc0aF2h1.s:1845 .text.HAL_TIM_OC_MspDeInit:00000000 $t + /tmp/cc0aF2h1.s:1851 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit + ARM GAS /tmp/cc0aF2h1.s page 496 + + + /tmp/cc0aF2h1.s:1866 .text.HAL_TIM_OC_DeInit:00000000 $t + /tmp/cc0aF2h1.s:1872 .text.HAL_TIM_OC_DeInit:00000000 HAL_TIM_OC_DeInit + /tmp/cc0aF2h1.s:1957 .text.HAL_TIM_PWM_MspInit:00000000 $t + /tmp/cc0aF2h1.s:1963 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit + /tmp/cc0aF2h1.s:1978 .text.HAL_TIM_PWM_MspDeInit:00000000 $t + /tmp/cc0aF2h1.s:1984 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit + /tmp/cc0aF2h1.s:1999 .text.HAL_TIM_PWM_DeInit:00000000 $t + /tmp/cc0aF2h1.s:2005 .text.HAL_TIM_PWM_DeInit:00000000 HAL_TIM_PWM_DeInit + /tmp/cc0aF2h1.s:2090 .text.HAL_TIM_IC_MspInit:00000000 $t + /tmp/cc0aF2h1.s:2096 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit + /tmp/cc0aF2h1.s:2111 .text.HAL_TIM_IC_MspDeInit:00000000 $t + /tmp/cc0aF2h1.s:2117 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit + /tmp/cc0aF2h1.s:2132 .text.HAL_TIM_IC_DeInit:00000000 $t + /tmp/cc0aF2h1.s:2138 .text.HAL_TIM_IC_DeInit:00000000 HAL_TIM_IC_DeInit + /tmp/cc0aF2h1.s:2223 .text.HAL_TIM_OnePulse_MspInit:00000000 $t + /tmp/cc0aF2h1.s:2229 .text.HAL_TIM_OnePulse_MspInit:00000000 HAL_TIM_OnePulse_MspInit + /tmp/cc0aF2h1.s:2244 .text.HAL_TIM_OnePulse_MspDeInit:00000000 $t + /tmp/cc0aF2h1.s:2250 .text.HAL_TIM_OnePulse_MspDeInit:00000000 HAL_TIM_OnePulse_MspDeInit + /tmp/cc0aF2h1.s:2265 .text.HAL_TIM_OnePulse_DeInit:00000000 $t + /tmp/cc0aF2h1.s:2271 .text.HAL_TIM_OnePulse_DeInit:00000000 HAL_TIM_OnePulse_DeInit + /tmp/cc0aF2h1.s:2340 .text.HAL_TIM_Encoder_MspInit:00000000 $t + /tmp/cc0aF2h1.s:2346 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit + /tmp/cc0aF2h1.s:2361 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t + /tmp/cc0aF2h1.s:2367 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit + /tmp/cc0aF2h1.s:2382 .text.HAL_TIM_Encoder_DeInit:00000000 $t + /tmp/cc0aF2h1.s:2388 .text.HAL_TIM_Encoder_DeInit:00000000 HAL_TIM_Encoder_DeInit + /tmp/cc0aF2h1.s:2457 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 $t + /tmp/cc0aF2h1.s:2463 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 HAL_TIM_DMABurst_MultiWriteStart + /tmp/cc0aF2h1.s:2830 .text.HAL_TIM_DMABurst_MultiWriteStart:00000188 $d + /tmp/cc0aF2h1.s:4245 .text.TIM_DMADelayPulseCplt:00000000 TIM_DMADelayPulseCplt + /tmp/cc0aF2h1.s:4391 .text.TIM_DMADelayPulseHalfCplt:00000000 TIM_DMADelayPulseHalfCplt + /tmp/cc0aF2h1.s:4830 .text.TIM_DMATriggerCplt:00000000 TIM_DMATriggerCplt + /tmp/cc0aF2h1.s:4893 .text.TIM_DMATriggerHalfCplt:00000000 TIM_DMATriggerHalfCplt + /tmp/cc0aF2h1.s:2843 .text.HAL_TIM_DMABurst_WriteStart:00000000 $t + /tmp/cc0aF2h1.s:2849 .text.HAL_TIM_DMABurst_WriteStart:00000000 HAL_TIM_DMABurst_WriteStart + /tmp/cc0aF2h1.s:2886 .text.HAL_TIM_DMABurst_WriteStop:00000000 $t + /tmp/cc0aF2h1.s:2892 .text.HAL_TIM_DMABurst_WriteStop:00000000 HAL_TIM_DMABurst_WriteStop + /tmp/cc0aF2h1.s:3043 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 $t + /tmp/cc0aF2h1.s:3049 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 HAL_TIM_DMABurst_MultiReadStart + /tmp/cc0aF2h1.s:3416 .text.HAL_TIM_DMABurst_MultiReadStart:00000188 $d + /tmp/cc0aF2h1.s:3984 .text.TIM_DMACaptureCplt:00000000 TIM_DMACaptureCplt + /tmp/cc0aF2h1.s:4138 .text.TIM_DMACaptureHalfCplt:00000000 TIM_DMACaptureHalfCplt + /tmp/cc0aF2h1.s:3429 .text.HAL_TIM_DMABurst_ReadStart:00000000 $t + /tmp/cc0aF2h1.s:3435 .text.HAL_TIM_DMABurst_ReadStart:00000000 HAL_TIM_DMABurst_ReadStart + /tmp/cc0aF2h1.s:3472 .text.HAL_TIM_DMABurst_ReadStop:00000000 $t + /tmp/cc0aF2h1.s:3478 .text.HAL_TIM_DMABurst_ReadStop:00000000 HAL_TIM_DMABurst_ReadStop + /tmp/cc0aF2h1.s:3629 .text.HAL_TIM_GenerateEvent:00000000 $t + /tmp/cc0aF2h1.s:3635 .text.HAL_TIM_GenerateEvent:00000000 HAL_TIM_GenerateEvent + /tmp/cc0aF2h1.s:3688 .text.HAL_TIM_ConfigTI1Input:00000000 $t + /tmp/cc0aF2h1.s:3694 .text.HAL_TIM_ConfigTI1Input:00000000 HAL_TIM_ConfigTI1Input + /tmp/cc0aF2h1.s:3732 .text.HAL_TIM_ReadCapturedValue:00000000 $t + /tmp/cc0aF2h1.s:3738 .text.HAL_TIM_ReadCapturedValue:00000000 HAL_TIM_ReadCapturedValue + /tmp/cc0aF2h1.s:3752 .text.HAL_TIM_ReadCapturedValue:00000008 $d + /tmp/cc0aF2h1.s:3821 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t + /tmp/cc0aF2h1.s:3827 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback + /tmp/cc0aF2h1.s:3842 .text.TIM_DMAPeriodElapsedCplt:00000000 $t + /tmp/cc0aF2h1.s:3884 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 $t + ARM GAS /tmp/cc0aF2h1.s page 497 + + + /tmp/cc0aF2h1.s:3890 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 HAL_TIM_PeriodElapsedHalfCpltCallback + /tmp/cc0aF2h1.s:3905 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 $t + /tmp/cc0aF2h1.s:3936 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 $t + /tmp/cc0aF2h1.s:3942 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 HAL_TIM_OC_DelayElapsedCallback + /tmp/cc0aF2h1.s:3957 .text.HAL_TIM_IC_CaptureCallback:00000000 $t + /tmp/cc0aF2h1.s:3963 .text.HAL_TIM_IC_CaptureCallback:00000000 HAL_TIM_IC_CaptureCallback + /tmp/cc0aF2h1.s:3978 .text.TIM_DMACaptureCplt:00000000 $t + /tmp/cc0aF2h1.s:4111 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 $t + /tmp/cc0aF2h1.s:4117 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 HAL_TIM_IC_CaptureHalfCpltCallback + /tmp/cc0aF2h1.s:4132 .text.TIM_DMACaptureHalfCplt:00000000 $t + /tmp/cc0aF2h1.s:4219 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 $t + /tmp/cc0aF2h1.s:4225 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 HAL_TIM_PWM_PulseFinishedCallback + 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.text.HAL_TIM_ConfigOCrefClear:00000000 $t + /tmp/cc0aF2h1.s:7555 .text.HAL_TIM_ConfigOCrefClear:00000000 HAL_TIM_ConfigOCrefClear + /tmp/cc0aF2h1.s:7615 .text.HAL_TIM_ConfigOCrefClear:00000046 $d + /tmp/cc0aF2h1.s:7862 .text.HAL_TIM_ConfigClockSource:00000000 $t + /tmp/cc0aF2h1.s:7868 .text.HAL_TIM_ConfigClockSource:00000000 HAL_TIM_ConfigClockSource + /tmp/cc0aF2h1.s:8152 .text.HAL_TIM_ConfigClockSource:000000fc $d + /tmp/cc0aF2h1.s:8157 .text.TIM_SlaveTimer_SetConfig:00000000 $t + /tmp/cc0aF2h1.s:8162 .text.TIM_SlaveTimer_SetConfig:00000000 TIM_SlaveTimer_SetConfig + /tmp/cc0aF2h1.s:8424 .text.HAL_TIM_SlaveConfigSynchro:00000000 $t + /tmp/cc0aF2h1.s:8430 .text.HAL_TIM_SlaveConfigSynchro:00000000 HAL_TIM_SlaveConfigSynchro + /tmp/cc0aF2h1.s:8516 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 $t + /tmp/cc0aF2h1.s:8522 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 HAL_TIM_SlaveConfigSynchro_IT + /tmp/cc0aF2h1.s:8608 .text.TIM_CCxChannelCmd:00000000 $t + /tmp/cc0aF2h1.s:8614 .text.TIM_CCxChannelCmd:00000000 TIM_CCxChannelCmd + /tmp/cc0aF2h1.s:8654 .text.HAL_TIM_OC_Start:00000000 $t + /tmp/cc0aF2h1.s:8660 .text.HAL_TIM_OC_Start:00000000 HAL_TIM_OC_Start + /tmp/cc0aF2h1.s:8680 .text.HAL_TIM_OC_Start:0000000c $d + /tmp/cc0aF2h1.s:8715 .text.HAL_TIM_OC_Start:00000038 $d + /tmp/cc0aF2h1.s:8913 .text.HAL_TIM_OC_Start:00000148 $d + /tmp/cc0aF2h1.s:8919 .text.HAL_TIM_OC_Stop:00000000 $t + /tmp/cc0aF2h1.s:8925 .text.HAL_TIM_OC_Stop:00000000 HAL_TIM_OC_Stop + /tmp/cc0aF2h1.s:8992 .text.HAL_TIM_OC_Stop:00000054 $d + /tmp/cc0aF2h1.s:9065 .text.HAL_TIM_OC_Stop:000000b8 $d + /tmp/cc0aF2h1.s:9070 .text.HAL_TIM_OC_Start_IT:00000000 $t + /tmp/cc0aF2h1.s:9076 .text.HAL_TIM_OC_Start_IT:00000000 HAL_TIM_OC_Start_IT + /tmp/cc0aF2h1.s:9098 .text.HAL_TIM_OC_Start_IT:0000000c $d + /tmp/cc0aF2h1.s:9133 .text.HAL_TIM_OC_Start_IT:0000003a $d + /tmp/cc0aF2h1.s:9334 .text.HAL_TIM_OC_Start_IT:00000154 $d + /tmp/cc0aF2h1.s:9348 .text.HAL_TIM_OC_Start_IT:00000188 $t + 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/tmp/cc0aF2h1.s:12612 .text.HAL_TIM_IC_Stop:00000000 HAL_TIM_IC_Stop + ARM GAS /tmp/cc0aF2h1.s page 500 + + + /tmp/cc0aF2h1.s:12659 .text.HAL_TIM_IC_Stop:00000034 $d + /tmp/cc0aF2h1.s:12744 .text.HAL_TIM_IC_Start_IT:00000000 $t + /tmp/cc0aF2h1.s:12750 .text.HAL_TIM_IC_Start_IT:00000000 HAL_TIM_IC_Start_IT + /tmp/cc0aF2h1.s:12771 .text.HAL_TIM_IC_Start_IT:0000000c $d + /tmp/cc0aF2h1.s:12818 .text.HAL_TIM_IC_Start_IT:00000040 $d + /tmp/cc0aF2h1.s:12928 .text.HAL_TIM_IC_Start_IT:000000c2 $d + /tmp/cc0aF2h1.s:13108 .text.HAL_TIM_IC_Start_IT:00000190 $d + /tmp/cc0aF2h1.s:13114 .text.HAL_TIM_IC_Stop_IT:00000000 $t + /tmp/cc0aF2h1.s:13120 .text.HAL_TIM_IC_Stop_IT:00000000 HAL_TIM_IC_Stop_IT + /tmp/cc0aF2h1.s:13144 .text.HAL_TIM_IC_Stop_IT:0000000e $d + /tmp/cc0aF2h1.s:13200 .text.HAL_TIM_IC_Stop_IT:00000056 $d + /tmp/cc0aF2h1.s:13323 .text.HAL_TIM_IC_Start_DMA:00000000 $t + /tmp/cc0aF2h1.s:13329 .text.HAL_TIM_IC_Start_DMA:00000000 HAL_TIM_IC_Start_DMA + /tmp/cc0aF2h1.s:13358 .text.HAL_TIM_IC_Start_DMA:00000014 $d + /tmp/cc0aF2h1.s:13421 .text.HAL_TIM_IC_Start_DMA:00000068 $d + /tmp/cc0aF2h1.s:13547 .text.HAL_TIM_IC_Start_DMA:000000fa $d + /tmp/cc0aF2h1.s:13881 .text.HAL_TIM_IC_Start_DMA:00000274 $d + /tmp/cc0aF2h1.s:13890 .text.HAL_TIM_IC_Stop_DMA:00000000 $t + /tmp/cc0aF2h1.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000000 HAL_TIM_IC_Stop_DMA + /tmp/cc0aF2h1.s:13928 .text.HAL_TIM_IC_Stop_DMA:00000016 $d + /tmp/cc0aF2h1.s:13979 .text.HAL_TIM_IC_Stop_DMA:0000005a $d + /tmp/cc0aF2h1.s:14114 .text.HAL_TIM_OnePulse_Start:00000000 $t + /tmp/cc0aF2h1.s:14120 .text.HAL_TIM_OnePulse_Start:00000000 HAL_TIM_OnePulse_Start + /tmp/cc0aF2h1.s:14251 .text.HAL_TIM_OnePulse_Start:0000008c $d + /tmp/cc0aF2h1.s:14256 .text.HAL_TIM_OnePulse_Stop:00000000 $t + /tmp/cc0aF2h1.s:14262 .text.HAL_TIM_OnePulse_Stop:00000000 HAL_TIM_OnePulse_Stop + /tmp/cc0aF2h1.s:14364 .text.HAL_TIM_OnePulse_Stop:0000008c $d + /tmp/cc0aF2h1.s:14369 .text.HAL_TIM_OnePulse_Start_IT:00000000 $t + /tmp/cc0aF2h1.s:14375 .text.HAL_TIM_OnePulse_Start_IT:00000000 HAL_TIM_OnePulse_Start_IT + /tmp/cc0aF2h1.s:14519 .text.HAL_TIM_OnePulse_Start_IT:000000a4 $d + /tmp/cc0aF2h1.s:14524 .text.HAL_TIM_OnePulse_Stop_IT:00000000 $t + /tmp/cc0aF2h1.s:14530 .text.HAL_TIM_OnePulse_Stop_IT:00000000 HAL_TIM_OnePulse_Stop_IT + /tmp/cc0aF2h1.s:14642 .text.HAL_TIM_OnePulse_Stop_IT:000000a0 $d + /tmp/cc0aF2h1.s:14647 .text.HAL_TIM_Encoder_Start:00000000 $t + /tmp/cc0aF2h1.s:14653 .text.HAL_TIM_Encoder_Start:00000000 HAL_TIM_Encoder_Start + /tmp/cc0aF2h1.s:14873 .text.HAL_TIM_Encoder_Stop:00000000 $t + /tmp/cc0aF2h1.s:14879 .text.HAL_TIM_Encoder_Stop:00000000 HAL_TIM_Encoder_Stop + /tmp/cc0aF2h1.s:15007 .text.HAL_TIM_Encoder_Start_IT:00000000 $t + /tmp/cc0aF2h1.s:15013 .text.HAL_TIM_Encoder_Start_IT:00000000 HAL_TIM_Encoder_Start_IT + /tmp/cc0aF2h1.s:15254 .text.HAL_TIM_Encoder_Stop_IT:00000000 $t + /tmp/cc0aF2h1.s:15260 .text.HAL_TIM_Encoder_Stop_IT:00000000 HAL_TIM_Encoder_Stop_IT + /tmp/cc0aF2h1.s:15409 .text.HAL_TIM_Encoder_Start_DMA:00000000 $t + /tmp/cc0aF2h1.s:15415 .text.HAL_TIM_Encoder_Start_DMA:00000000 HAL_TIM_Encoder_Start_DMA + /tmp/cc0aF2h1.s:15949 .text.HAL_TIM_Encoder_Start_DMA:00000258 $d + /tmp/cc0aF2h1.s:15956 .text.HAL_TIM_Encoder_Stop_DMA:00000000 $t + /tmp/cc0aF2h1.s:15962 .text.HAL_TIM_Encoder_Stop_DMA:00000000 HAL_TIM_Encoder_Stop_DMA + /tmp/cc0aF2h1.s:3765 .text.HAL_TIM_ReadCapturedValue:00000015 $d + /tmp/cc0aF2h1.s:3765 .text.HAL_TIM_ReadCapturedValue:00000016 $t + /tmp/cc0aF2h1.s:5249 .text.HAL_TIM_GetChannelState:00000019 $d + /tmp/cc0aF2h1.s:5249 .text.HAL_TIM_GetChannelState:0000001a $t + /tmp/cc0aF2h1.s:6433 .text.HAL_TIM_OC_ConfigChannel:0000002f $d + /tmp/cc0aF2h1.s:6433 .text.HAL_TIM_OC_ConfigChannel:00000030 $t + /tmp/cc0aF2h1.s:6608 .text.HAL_TIM_PWM_ConfigChannel:00000035 $d + /tmp/cc0aF2h1.s:6608 .text.HAL_TIM_PWM_ConfigChannel:00000036 $t + /tmp/cc0aF2h1.s:7053 .text.HAL_TIM_IC_ConfigChannel:00000029 $d + /tmp/cc0aF2h1.s:7053 .text.HAL_TIM_IC_ConfigChannel:0000002a $t + /tmp/cc0aF2h1.s:7637 .text.HAL_TIM_ConfigOCrefClear:0000005b $d + ARM GAS /tmp/cc0aF2h1.s page 501 + + + /tmp/cc0aF2h1.s:7637 .text.HAL_TIM_ConfigOCrefClear:0000005c $t + /tmp/cc0aF2h1.s:8697 .text.HAL_TIM_OC_Start:0000001d $d + /tmp/cc0aF2h1.s:8697 .text.HAL_TIM_OC_Start:0000001e $t + /tmp/cc0aF2h1.s:8732 .text.HAL_TIM_OC_Start:00000049 $d + /tmp/cc0aF2h1.s:8732 .text.HAL_TIM_OC_Start:0000004a $t + /tmp/cc0aF2h1.s:9009 .text.HAL_TIM_OC_Stop:00000065 $d + /tmp/cc0aF2h1.s:9009 .text.HAL_TIM_OC_Stop:00000066 $t + /tmp/cc0aF2h1.s:9115 .text.HAL_TIM_OC_Start_IT:0000001d $d + /tmp/cc0aF2h1.s:9115 .text.HAL_TIM_OC_Start_IT:0000001e $t + /tmp/cc0aF2h1.s:9150 .text.HAL_TIM_OC_Start_IT:0000004b $d + /tmp/cc0aF2h1.s:9150 .text.HAL_TIM_OC_Start_IT:0000004c $t + /tmp/cc0aF2h1.s:9447 .text.HAL_TIM_OC_Stop_IT:0000001b $d + /tmp/cc0aF2h1.s:9447 .text.HAL_TIM_OC_Stop_IT:0000001c $t + /tmp/cc0aF2h1.s:9528 .text.HAL_TIM_OC_Stop_IT:00000087 $d + /tmp/cc0aF2h1.s:9528 .text.HAL_TIM_OC_Stop_IT:00000088 $t + /tmp/cc0aF2h1.s:9679 .text.HAL_TIM_OC_Start_DMA:00000021 $d + /tmp/cc0aF2h1.s:9679 .text.HAL_TIM_OC_Start_DMA:00000022 $t + /tmp/cc0aF2h1.s:9718 .text.HAL_TIM_OC_Start_DMA:0000004f $d + /tmp/cc0aF2h1.s:9718 .text.HAL_TIM_OC_Start_DMA:00000050 $t + /tmp/cc0aF2h1.s:10274 .text.HAL_TIM_OC_Stop_DMA:0000001d $d + /tmp/cc0aF2h1.s:10274 .text.HAL_TIM_OC_Stop_DMA:0000001e $t + /tmp/cc0aF2h1.s:10358 .text.HAL_TIM_OC_Stop_DMA:0000008f $d + /tmp/cc0aF2h1.s:10358 .text.HAL_TIM_OC_Stop_DMA:00000090 $t + /tmp/cc0aF2h1.s:10524 .text.HAL_TIM_PWM_Start:0000001d $d + /tmp/cc0aF2h1.s:10524 .text.HAL_TIM_PWM_Start:0000001e $t + /tmp/cc0aF2h1.s:10559 .text.HAL_TIM_PWM_Start:00000049 $d + /tmp/cc0aF2h1.s:10559 .text.HAL_TIM_PWM_Start:0000004a $t + /tmp/cc0aF2h1.s:10836 .text.HAL_TIM_PWM_Stop:00000065 $d + /tmp/cc0aF2h1.s:10836 .text.HAL_TIM_PWM_Stop:00000066 $t + /tmp/cc0aF2h1.s:10942 .text.HAL_TIM_PWM_Start_IT:0000001d $d + /tmp/cc0aF2h1.s:10942 .text.HAL_TIM_PWM_Start_IT:0000001e $t + /tmp/cc0aF2h1.s:10977 .text.HAL_TIM_PWM_Start_IT:0000004b $d + /tmp/cc0aF2h1.s:10977 .text.HAL_TIM_PWM_Start_IT:0000004c $t + /tmp/cc0aF2h1.s:11274 .text.HAL_TIM_PWM_Stop_IT:0000001b $d + /tmp/cc0aF2h1.s:11274 .text.HAL_TIM_PWM_Stop_IT:0000001c $t + /tmp/cc0aF2h1.s:11355 .text.HAL_TIM_PWM_Stop_IT:00000087 $d + /tmp/cc0aF2h1.s:11355 .text.HAL_TIM_PWM_Stop_IT:00000088 $t + /tmp/cc0aF2h1.s:11506 .text.HAL_TIM_PWM_Start_DMA:00000021 $d + /tmp/cc0aF2h1.s:11506 .text.HAL_TIM_PWM_Start_DMA:00000022 $t + /tmp/cc0aF2h1.s:11545 .text.HAL_TIM_PWM_Start_DMA:0000004f $d + /tmp/cc0aF2h1.s:11545 .text.HAL_TIM_PWM_Start_DMA:00000050 $t + /tmp/cc0aF2h1.s:12101 .text.HAL_TIM_PWM_Stop_DMA:0000001d $d + /tmp/cc0aF2h1.s:12101 .text.HAL_TIM_PWM_Stop_DMA:0000001e $t + /tmp/cc0aF2h1.s:12185 .text.HAL_TIM_PWM_Stop_DMA:0000008f $d + /tmp/cc0aF2h1.s:12185 .text.HAL_TIM_PWM_Stop_DMA:00000090 $t + /tmp/cc0aF2h1.s:12350 .text.HAL_TIM_IC_Start:0000001d $d + /tmp/cc0aF2h1.s:12350 .text.HAL_TIM_IC_Start:0000001e $t + /tmp/cc0aF2h1.s:12398 .text.HAL_TIM_IC_Start:00000051 $d + /tmp/cc0aF2h1.s:12398 .text.HAL_TIM_IC_Start:00000052 $t + /tmp/cc0aF2h1.s:12676 .text.HAL_TIM_IC_Stop:00000045 $d + /tmp/cc0aF2h1.s:12676 .text.HAL_TIM_IC_Stop:00000046 $t + /tmp/cc0aF2h1.s:12788 .text.HAL_TIM_IC_Start_IT:0000001d $d + /tmp/cc0aF2h1.s:12788 .text.HAL_TIM_IC_Start_IT:0000001e $t + /tmp/cc0aF2h1.s:12836 .text.HAL_TIM_IC_Start_IT:00000051 $d + /tmp/cc0aF2h1.s:12836 .text.HAL_TIM_IC_Start_IT:00000052 $t + /tmp/cc0aF2h1.s:12941 .text.HAL_TIM_IC_Start_IT:000000cf $d + /tmp/cc0aF2h1.s:12941 .text.HAL_TIM_IC_Start_IT:000000d0 $t + ARM GAS /tmp/cc0aF2h1.s page 502 + + + /tmp/cc0aF2h1.s:13157 .text.HAL_TIM_IC_Stop_IT:0000001b $d + /tmp/cc0aF2h1.s:13157 .text.HAL_TIM_IC_Stop_IT:0000001c $t + /tmp/cc0aF2h1.s:13218 .text.HAL_TIM_IC_Stop_IT:00000067 $d + /tmp/cc0aF2h1.s:13218 .text.HAL_TIM_IC_Stop_IT:00000068 $t + /tmp/cc0aF2h1.s:13375 .text.HAL_TIM_IC_Start_DMA:00000025 $d + /tmp/cc0aF2h1.s:13375 .text.HAL_TIM_IC_Start_DMA:00000026 $t + /tmp/cc0aF2h1.s:13439 .text.HAL_TIM_IC_Start_DMA:00000079 $d + /tmp/cc0aF2h1.s:13439 .text.HAL_TIM_IC_Start_DMA:0000007a $t + /tmp/cc0aF2h1.s:13561 .text.HAL_TIM_IC_Start_DMA:00000107 $d + /tmp/cc0aF2h1.s:13561 .text.HAL_TIM_IC_Start_DMA:00000108 $t + /tmp/cc0aF2h1.s:13941 .text.HAL_TIM_IC_Stop_DMA:00000023 $d + /tmp/cc0aF2h1.s:13941 .text.HAL_TIM_IC_Stop_DMA:00000024 $t + /tmp/cc0aF2h1.s:13996 .text.HAL_TIM_IC_Stop_DMA:0000006b $d + /tmp/cc0aF2h1.s:13996 .text.HAL_TIM_IC_Stop_DMA:0000006c $t + +UNDEFINED SYMBOLS +HAL_DMA_Start_IT +HAL_DMA_Abort_IT +TIMEx_DMACommutationCplt +TIMEx_DMACommutationHalfCplt +HAL_TIMEx_BreakCallback +HAL_TIMEx_Break2Callback +HAL_TIMEx_CommutCallback diff --git a/build/stm32f3xx_hal_tim.o b/build/stm32f3xx_hal_tim.o new file mode 100644 index 0000000..9b76217 Binary files /dev/null and b/build/stm32f3xx_hal_tim.o differ diff --git a/build/stm32f3xx_hal_tim_ex.d b/build/stm32f3xx_hal_tim_ex.d new file mode 100644 index 0000000..a73cb74 --- /dev/null +++ b/build/stm32f3xx_hal_tim_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_tim_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_tim_ex.lst b/build/stm32f3xx_hal_tim_ex.lst new file mode 100644 index 0000000..84f7979 --- /dev/null +++ b/build/stm32f3xx_hal_tim_ex.lst @@ -0,0 +1,10298 @@ +ARM GAS /tmp/ccXMh04L.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_tim_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c" + 20 .section .text.TIM_CCxNChannelCmd,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 TIM_CCxNChannelCmd: + 27 .LVL0: + 28 .LFB173: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @file stm32f3xx_hal_tim_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief TIM HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * functionalities of the Timer Extended peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Time Hall Sensor Interface Initialization + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Time Hall Sensor Interface Start + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Time Complementary signal break and dead time configuration + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Time Master and Slave synchronization configuration + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Time OCRef clear configuration + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + Timer remapping capabilities configuration + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ****************************************************************************** + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @attention + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * All rights reserved. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * in the root directory of this software component. + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ****************************************************************************** + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### TIMER Extended features ##### + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] + ARM GAS /tmp/ccXMh04L.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** The Timer Extended features include: + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Complementary outputs with programmable dead-time for : + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) Output Compare + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) PWM generation (Edge and Center-aligned Mode) + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) One-pulse mode output + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Synchronization circuit to control the timer with external signals and to + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** interconnect several timers together. + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Break input to put the timer output signals in reset state or in a known state. + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** positioning purposes + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### How to use this driver ##### + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Initialize the TIM low level resources by implementing the following functions + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** depending on the selected feature: + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Initialize the TIM low level resources : + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (##) TIM pins configuration + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+++) Enable the clock for the TIM GPIOs using the following function: + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_RCC_GPIOx_CLK_ENABLE(); + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) The external Clock can be configured, if needed (the default clock is the + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** internal clock from the APBx), using the following function: + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ConfigClockSource, the clock configuration should be done before + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** any start function. + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Configure the TIM in the desired functioning mode using one of the + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** initialization function of this driver: + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Timer Hall Sensor Interface and the commutation event with the corresponding + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Interrupt and DMA request if needed (Note that One Timer is used to interface + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** with the Hall sensor Interface and another Timer should be used to use + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the commutation event). + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (#) Activate the TIM peripheral using one of the start functions: + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_OCN_Start_IT() + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_PWMN_Start_IT() + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePul + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA() + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_Start_IT(). + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ****************************************************************************** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Includes ------------------------------------------------------------------*/ + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #include "stm32f3xx_hal.h" + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + ARM GAS /tmp/ccXMh04L.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx TIMEx + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief TIM Extended HAL module driver + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #ifdef HAL_TIM_MODULE_ENABLED + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Private define ------------------------------------------------------------*/ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Private macros ------------------------------------------------------------*/ + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Private variables ---------------------------------------------------------*/ + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma); + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma); + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState); + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Exported functions --------------------------------------------------------*/ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Timer Hall Sensor functions + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Timer Hall Sensor functions ##### + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This section provides functions allowing to: + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Initialize and configure TIM HAL Sensor. + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) De-initialize TIM HAL Sensor. + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Hall Sensor Interface. + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Hall Sensor Interface. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Hall Sensor Interface and enable interrupts. + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Hall Sensor Interface and disable interrupts. + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Hall Sensor Interface and enable DMA transfers. + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Hall Sensor Interface and disable DMA transfers. + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note When the timer instance is initialized in Hall Sensor Interface mode, + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * timer channels 1 and channel 2 are reserved and cannot be used for + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * other purpose. + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param sConfig TIM Hall Sensor configuration structure + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeD + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM handle allocation */ + ARM GAS /tmp/ccXMh04L.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (htim == NULL) + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (htim->State == HAL_TIM_STATE_RESET) + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Allocate lock resource and initialize it */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Lock = HAL_UNLOCKED; + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Reset interrupt callbacks to legacy week callbacks */ + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_ResetCallback(htim); + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (htim->HallSensor_MspInitCallback == NULL) + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->HallSensor_MspInitCallback(htim); + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #else + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspInit(htim); + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM state */ + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Configure the Time base in the Encoder Mode */ + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sens + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Reset the IC1PSC Bits */ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CCMR1 |= sConfig->IC1Prescaler; + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Hall sensor interface (XOR function of the three inputs) */ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_TI1S; + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCFastMode = TIM_OCFAST_DISABLE; + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_OC2_SetConfig(htim->Instance, &OC_Config); + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** register to 101 */ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_MMS; + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Initialize the DMA burst operation state */ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Initialize the TIM channels state */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Initialize the TIM state*/ + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief DeInitializes the TIM Hall Sensor interface + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Peripheral Clock */ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (htim->HallSensor_MspDeInitCallback == NULL) + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* DeInit the low level hardware */ + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback(htim); + ARM GAS /tmp/ccXMh04L.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #else + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspDeInit(htim); + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the DMA burst operation state */ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the TIM channels state */ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change TIM state */ + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_RESET; + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Release Lock */ + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Initializes the TIM Hall Sensor MSP. + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** UNUSED(htim); + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief DeInitializes TIM Hall Sensor MSP. + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** UNUSED(htim); + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface. + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + ARM GAS /tmp/ccXMh04L.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM channels state */ + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM Hall sensor Interface. + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Input Capture channels 1, 2 and 3 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface in interrupt mode. + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM channels state */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the capture compare Interrupts 1 event */ + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + ARM GAS /tmp/ccXMh04L.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM Hall Sensor Interface in interrupt mode. + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Input Capture channel 1 + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the capture compare Interrupts event */ + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface in DMA mode. + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param pData The destination Buffer address. + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. + ARM GAS /tmp/ccXMh04L.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channel state */ + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_BUSY; + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA Input Capture 1 Callbacks */ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel for Capture 1*/ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the capture compare 1 Interrupt */ + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + ARM GAS /tmp/ccXMh04L.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM Hall Sensor Interface in DMA mode. + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Input Capture channel 1 + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the capture compare Interrupts 1 event */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channel state */ + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Timer Complementary Output Compare functions + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + ARM GAS /tmp/ccXMh04L.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Timer Complementary Output Compare functions ##### + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This section provides functions allowing to: + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM. + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM. + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM and enable interrupts. + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM and disable interrupts. + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM and enable DMA transfers. + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation on the complementary + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * output. + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccXMh04L.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation on the complementary + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * output. + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation in interrupt mode + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * on the complementary output. + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM OC handle + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/ccXMh04L.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in interrupt mode + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * on the complementary output. + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpccer; + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: + ARM GAS /tmp/ccXMh04L.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Break interrupt (only if no more channel is active) */ + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpccer = htim->Instance->CCER; + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation in DMA mode + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * on the complementary output. + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param pData The source Buffer address. + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from memory to TIM peripheral + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint16_t Length) + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_BUSY; + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccXMh04L.s page 17 + + + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); + ARM GAS /tmp/ccXMh04L.s page 18 + + + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + ARM GAS /tmp/ccXMh04L.s page 19 + + +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * on the complementary output. +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ + ARM GAS /tmp/ccXMh04L.s page 20 + + +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Timer Complementary PWM functions +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Timer Complementary PWM functions ##### +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This section provides functions allowing to: +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary PWM. +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary PWM. +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary PWM and enable interrupts. +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary PWM and disable interrupts. +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary PWM and enable DMA transfers. +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary PWM and disable DMA transfers. +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary Input Capture measurement. +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary Input Capture. +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary Input Capture and enable interrupts. +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary Input Capture and disable interrupts. +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary Input Capture and enable DMA transfers. +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary Input Capture and disable DMA transfers. +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse generation. +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse. +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse and enable interrupts. +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse and disable interrupts. +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation on the complementary output. +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + ARM GAS /tmp/ccXMh04L.s page 21 + + +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the PWM signal generation on the complementary output. +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + ARM GAS /tmp/ccXMh04L.s page 22 + + +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation in interrupt mode on the +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * complementary output. +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 23 + + +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the PWM signal generation in interrupt mode on the +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * complementary output. +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpccer; +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + ARM GAS /tmp/ccXMh04L.s page 24 + + +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Break interrupt (only if no more channel is active) */ +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpccer = htim->Instance->CCER; +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + ARM GAS /tmp/ccXMh04L.s page 25 + + +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM PWM signal generation in DMA mode on the +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * complementary output +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param pData The source Buffer address. +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_ +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint16_t Length) +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_BUSY; +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 26 + + +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return error status */ +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 27 + + +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM PWM signal generation in DMA mode on the complementary +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * output +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** switch (Channel) +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); + ARM GAS /tmp/ccXMh04L.s page 28 + + +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** default: +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** status = HAL_ERROR; +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (status == HAL_OK) +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return status; +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Timer Complementary One Pulse functions +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Timer Complementary One Pulse functions ##### +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This section provides functions allowing to: +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse generation. +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse. +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse and enable interrupts. +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse and disable interrupts. +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ + ARM GAS /tmp/ccXMh04L.s page 29 + + +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM One Pulse signal generation on the complementary +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * output. +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to enable +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM channels state */ +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the complementary One Pulse output channel and the Input Capture channel */ +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM One Pulse signal generation on the complementary +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * output. +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to disable + ARM GAS /tmp/ccXMh04L.s page 30 + + +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode on the +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * complementary channel. +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to enable +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the TIM channels state */ +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + ARM GAS /tmp/ccXMh04L.s page 31 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_ERROR; +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the complementary One Pulse output channel and the Input Capture channel */ +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Main Output */ +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Stops the TIM One Pulse signal generation in interrupt mode on the +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * complementary channel. +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to disable +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); + ARM GAS /tmp/ccXMh04L.s page 32 + + +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Main Output */ +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Return function status */ +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Peripheral Control functions +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Peripheral Control functions ##### +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This section provides functions allowing to: +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Configure the commutation event in case of use of the Hall sensor interface. +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Configure Output channels for OC and PWM mode. +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Configure Complementary channels, break features and dead time. +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Configure Master synchronization. +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Configure timer remapping capabilities. +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Enable or disable channel grouping. +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence. +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected + ARM GAS /tmp/ccXMh04L.s page 33 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t CommutationSource) +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Input trigger */ +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable Commutation Interrupt */ +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable Commutation DMA request */ +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence with interrupt. +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected + ARM GAS /tmp/ccXMh04L.s page 34 + + +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t CommutationSource) +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Input trigger */ +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable Commutation DMA request */ +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Commutation Interrupt */ +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence with DMA. +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note The user should configure the DMA in his own software, in This function only the COMDE b +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected + ARM GAS /tmp/ccXMh04L.s page 35 + + +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t CommutationSource) +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Input trigger */ +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Commutation DMA Request */ +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA Commutation Callback */ +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Disable Commutation Interrupt */ +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Enable the Commutation DMA Request */ +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Configures the TIM in master mode. +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle. +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * contains the selected trigger output (TRGO) and the Master/Slave +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * mode. +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, + ARM GAS /tmp/ccXMh04L.s page 36 + + +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** const TIM_MasterConfigTypeDef *sMasterConfi +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpcr2; +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check input state */ +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the handler state */ +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Get the TIMx CR2 register value */ +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpcr2 = htim->Instance->CR2; +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Get the TIMx SMCR register value */ +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR; +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_CR2_MMS2) +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Clear the MMS2 bits */ +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpcr2 &= ~TIM_CR2_MMS2; +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TRGO2 source*/ +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpcr2 |= sMasterConfig->MasterOutputTrigger2; +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_CR2_MMS2 */ +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Reset the MMS Bits */ +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpcr2 &= ~TIM_CR2_MMS; +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TRGO source */ +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpcr2 |= sMasterConfig->MasterOutputTrigger; +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Update TIMx CR2 */ +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 = tmpcr2; +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Reset the MSM Bit */ +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr &= ~TIM_SMCR_MSM; +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set master mode */ +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmpsmcr |= sMasterConfig->MasterSlaveMode; +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Update TIMx SMCR */ +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR = tmpsmcr; +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the htim state */ +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; + ARM GAS /tmp/ccXMh04L.s page 37 + + +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * and the AOE(automatic output enable). +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * contains the BDTR Register configuration information for the TIM peripheral. +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @note Interrupts can be generated when an active level is detected on the +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * break input, the break 2 input or the system break input. Break +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTim +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpbdtr = 0U; +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BKF) +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BKF */ +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check input state */ +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the OSSI State, the dead time value and the Automatic Output Enable Bit */ +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the BDTR bits */ +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BKF) +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BKF */ +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BK2E) +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 38 + + +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the BREAK2 input related BDTR bits */ +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos)); +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BK2E */ +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set TIMx_BDTR */ +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->BDTR = tmpbdtr; +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Configures the TIMx Remapping input capabilities. +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle. +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Remap specifies the TIM remapping source. +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @if STM32F301x8 +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM1, the parameter can have the following values: +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD2 +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @elseif STM32F303xE +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM1, the parameter is a combination of 2 fields (field1 | field2): +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field1 can have the following values: +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD2 +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field2 can have the following values: +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC4_NONE : TIM1_ETR is not connected to any AWD (analog watchdog) +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC4_AWD1: TIM1_ETR is connected to ADC4 AWD1 +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC4_AWD2: TIM1_ETR is connected to ADC4 AWD2 +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC4_AWD3: TIM1_ETR is connected to ADC4 AWD3 +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @elseif STM32F334x8 +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM1, the parameter is a combination of 2 fields (field1 | field2): +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field1 can have the following values: +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD2 +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field2 can have the following values: +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC2_NONE : TIM1_ETR is not connected to any AWD (analog watchdog) +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC2_AWD1: TIM1_ETR is connected to ADC2 AWD1 +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC2_AWD2: TIM1_ETR is connected to ADC2 AWD2 + ARM GAS /tmp/ccXMh04L.s page 39 + + +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM1_ADC2_AWD3: TIM1_ETR is connected to ADC2 AWD3 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endif +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @if STM32F303xE +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM8, the parameter is a combination of 2 fields (field1 | field2): +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field1 can have the following values: +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC2_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC2_AWD1: TIM1_ETR is connected to ADC2 AWD1 +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC2_AWD2: TIM1_ETR is connected to ADC2 AWD2 +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC2_AWD3: TIM1_ETR is connected to ADC2 AWD2 +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field2 can have the following values: +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC3_NONE : TIM1_ETR is not connected to any AWD (analog watchdog) +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1 +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2 +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM8_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3 +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endif +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @if STM32F373xC +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM14, the parameter can have the following values: +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32 +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @else +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM16, the parameter can have the following values: +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM16_GPIO: TIM16 TI1 is connected to GPIO +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM16_RTC: TIM16 TI1 is connected to RTC_clock +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM16_HSE: TIM16 TI1 is connected to HSE/32 +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM16_MCO: TIM16 TI1 is connected to MCO +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endif +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @if STM32F303xE +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * For TIM20, the parameter is a combination of 2 fields (field1 | field2): +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field1 can have the following values: +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC3_NONE: TIM1_ETR is not connected to any AWD (analog watchdog) +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1 +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2 +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD2 +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * field2 can have the following values: +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC4_NONE : TIM1_ETR is not connected to any AWD (analog watchdog) +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC4_AWD1: TIM1_ETR is connected to ADC4 AWD1 +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC4_AWD2: TIM1_ETR is connected to ADC4 AWD2 +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_TIM20_ADC4_AWD3: TIM1_ETR is connected to ADC4 AWD3 +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endif +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check parameters */ +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_REMAP(htim->Instance, Remap)); +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the Timer remapping configuration */ + ARM GAS /tmp/ccXMh04L.s page 40 + + +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** WRITE_REG(htim->Instance->OR, Remap); +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_CCR5_CCR5) +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Group channel 5 and channel 1, 2 or 3 +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle. +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channels specifies the reference signal(s) the OC5REF is combined with. +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be any combination of the following values: +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL status +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels) +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check parameters */ +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_GROUPCH5(Channels)); +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Process Locked */ +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Clear GC5Cx bit fields */ +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1); +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set GC5Cx bit fields */ +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CCR5 |= Channels; +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the htim state */ +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return HAL_OK; +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_CCR5_CCR5 */ +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Extended Callbacks functions +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Extended Callbacks functions ##### +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] + ARM GAS /tmp/ccXMh04L.s page 41 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This section provides Extended TIM callback functions: +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Timer Commutation callback +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (+) Timer Break callback +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Hall commutation changed callback in non-blocking mode +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** UNUSED(htim); +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the HAL_TIMEx_CommutCallback could be implemented in the user file +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Hall commutation changed half complete callback in non-blocking mode +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** UNUSED(htim); +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Hall Break detection callback in non-blocking mode +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** UNUSED(htim); +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the HAL_TIMEx_BreakCallback could be implemented in the user file +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BK2E) +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Hall Break2 detection callback in non blocking mode +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim: TIM handle +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None + ARM GAS /tmp/ccXMh04L.s page 42 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** UNUSED(htim); +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** the HAL_TIMEx_Break2Callback could be implemented in the user file +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BK2E */ +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Extended Peripheral State functions +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @verbatim +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ##### Extended Peripheral State functions ##### +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** ============================================================================== +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** [..] +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** This subsection permits to get in run-time the status of the peripheral +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** and the data flow. +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** @endverbatim +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Return the TIM Hall Sensor interface handle state. +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor handle +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval HAL state +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim) +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return htim->State; +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Return actual state of the TIM complementary channel. +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param htim TIM handle +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param ChannelN TIM Complementary channel +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval TIM Complementary channel state +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t Cha +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_state; +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN)); +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 43 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN); +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return channel_state; +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @} +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Private functions ---------------------------------------------------------*/ +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @{ +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief TIM DMA Commutation callback. +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the htim state */ +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->CommutationCallback(htim); +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #else +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_CommutCallback(htim); +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief TIM DMA Commutation half complete callback. +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma) +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Change the htim state */ +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->CommutationHalfCpltCallback(htim); +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #else +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIMEx_CommutHalfCpltCallback(htim); +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + ARM GAS /tmp/ccXMh04L.s page 44 + + +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief TIM DMA Delay Pulse complete callback (complementary channel). +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma) +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* nothing to do */ +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->PWM_PulseFinishedCallback(htim); +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #else +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccXMh04L.s page 45 + + +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief TIM DMA error callback (complementary channel) +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma) +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** else +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* nothing to do */ +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->ErrorCallback(htim); +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #else +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ErrorCallback(htim); +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @brief Enables or disables the TIM Capture Compare Channel xN. +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param TIMx to select the TIM peripheral +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param Channel specifies the TIM Channel +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be one of the following values: +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @param ChannelNState specifies the TIM Channel CCxNE bit new state. +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** * @retval None +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** */ +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 29 .loc 1 2534 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccXMh04L.s page 46 + + + 33 @ link register save eliminated. +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmp; + 34 .loc 1 2535 3 view .LVU1 +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + 35 .loc 1 2537 3 view .LVU2 + 36 .loc 1 2537 36 is_stmt 0 view .LVU3 + 37 0000 01F01F01 and r1, r1, #31 + 38 .LVL1: + 39 .loc 1 2537 7 view .LVU4 + 40 0004 4FF0040C mov ip, #4 + 41 0008 0CFA01FC lsl ip, ip, r1 + 42 .LVL2: +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Reset the CCxNE Bit */ +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIMx->CCER &= ~tmp; + 43 .loc 1 2540 3 is_stmt 1 view .LVU5 + 44 .loc 1 2540 7 is_stmt 0 view .LVU6 + 45 000c 036A ldr r3, [r0, #32] + 46 .loc 1 2540 14 view .LVU7 + 47 000e 23EA0C03 bic r3, r3, ip + 48 0012 0362 str r3, [r0, #32] +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set or reset the CCxNE Bit */ +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + 49 .loc 1 2543 3 is_stmt 1 view .LVU8 + 50 .loc 1 2543 7 is_stmt 0 view .LVU9 + 51 0014 036A ldr r3, [r0, #32] + 52 .loc 1 2543 42 view .LVU10 + 53 0016 8A40 lsls r2, r2, r1 + 54 .LVL3: + 55 .loc 1 2543 14 view .LVU11 + 56 0018 1343 orrs r3, r3, r2 + 57 001a 0362 str r3, [r0, #32] +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 58 .loc 1 2544 1 view .LVU12 + 59 001c 7047 bx lr + 60 .cfi_endproc + 61 .LFE173: + 63 .section .text.TIM_DMAErrorCCxN,"ax",%progbits + 64 .align 1 + 65 .syntax unified + 66 .thumb + 67 .thumb_func + 69 TIM_DMAErrorCCxN: + 70 .LVL4: + 71 .LFB172: +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 72 .loc 1 2489 1 is_stmt 1 view -0 + 73 .cfi_startproc + 74 @ args = 0, pretend = 0, frame = 0 + 75 @ frame_needed = 0, uses_anonymous_args = 0 +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 76 .loc 1 2489 1 is_stmt 0 view .LVU14 + 77 0000 10B5 push {r4, lr} + 78 .cfi_def_cfa_offset 8 + 79 .cfi_offset 4, -8 + ARM GAS /tmp/ccXMh04L.s page 47 + + + 80 .cfi_offset 14, -4 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 81 .loc 1 2490 3 is_stmt 1 view .LVU15 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 82 .loc 1 2490 22 is_stmt 0 view .LVU16 + 83 0002 446A ldr r4, [r0, #36] + 84 .LVL5: +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 85 .loc 1 2492 3 is_stmt 1 view .LVU17 +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 86 .loc 1 2492 25 is_stmt 0 view .LVU18 + 87 0004 636A ldr r3, [r4, #36] +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 88 .loc 1 2492 6 view .LVU19 + 89 0006 8342 cmp r3, r0 + 90 0008 0BD0 beq .L7 +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 91 .loc 1 2497 8 is_stmt 1 view .LVU20 +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 92 .loc 1 2497 30 is_stmt 0 view .LVU21 + 93 000a A36A ldr r3, [r4, #40] +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 94 .loc 1 2497 11 view .LVU22 + 95 000c 8342 cmp r3, r0 + 96 000e 0DD0 beq .L8 +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 97 .loc 1 2502 8 is_stmt 1 view .LVU23 +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 98 .loc 1 2502 30 is_stmt 0 view .LVU24 + 99 0010 E36A ldr r3, [r4, #44] +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 100 .loc 1 2502 11 view .LVU25 + 101 0012 8342 cmp r3, r0 + 102 0014 10D0 beq .L9 + 103 .L4: +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 104 .loc 1 2510 3 is_stmt 1 view .LVU26 +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 105 .loc 1 2515 3 view .LVU27 + 106 0016 2046 mov r0, r4 + 107 .LVL6: +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 108 .loc 1 2515 3 is_stmt 0 view .LVU28 + 109 0018 FFF7FEFF bl HAL_TIM_ErrorCallback + 110 .LVL7: +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 111 .loc 1 2518 3 is_stmt 1 view .LVU29 +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 112 .loc 1 2518 17 is_stmt 0 view .LVU30 + 113 001c 0023 movs r3, #0 + 114 001e 2377 strb r3, [r4, #28] +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 115 .loc 1 2519 1 view .LVU31 + 116 0020 10BD pop {r4, pc} + 117 .LVL8: + 118 .L7: +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/ccXMh04L.s page 48 + + + 119 .loc 1 2494 5 is_stmt 1 view .LVU32 +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 120 .loc 1 2494 19 is_stmt 0 view .LVU33 + 121 0022 0123 movs r3, #1 + 122 0024 2377 strb r3, [r4, #28] +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 123 .loc 1 2495 5 is_stmt 1 view .LVU34 + 124 0026 84F84430 strb r3, [r4, #68] + 125 002a F4E7 b .L4 + 126 .L8: +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 127 .loc 1 2499 5 view .LVU35 +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 128 .loc 1 2499 19 is_stmt 0 view .LVU36 + 129 002c 0223 movs r3, #2 + 130 002e 2377 strb r3, [r4, #28] +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 131 .loc 1 2500 5 is_stmt 1 view .LVU37 + 132 0030 0123 movs r3, #1 + 133 0032 84F84530 strb r3, [r4, #69] + 134 0036 EEE7 b .L4 + 135 .L9: +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 136 .loc 1 2504 5 view .LVU38 +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 137 .loc 1 2504 19 is_stmt 0 view .LVU39 + 138 0038 0423 movs r3, #4 + 139 003a 2377 strb r3, [r4, #28] +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 140 .loc 1 2505 5 is_stmt 1 view .LVU40 + 141 003c 0123 movs r3, #1 + 142 003e 84F84630 strb r3, [r4, #70] + 143 0042 E8E7 b .L4 + 144 .cfi_endproc + 145 .LFE172: + 147 .section .text.TIM_DMADelayPulseNCplt,"ax",%progbits + 148 .align 1 + 149 .syntax unified + 150 .thumb + 151 .thumb_func + 153 TIM_DMADelayPulseNCplt: + 154 .LVL9: + 155 .LFB171: +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 156 .loc 1 2430 1 view -0 + 157 .cfi_startproc + 158 @ args = 0, pretend = 0, frame = 0 + 159 @ frame_needed = 0, uses_anonymous_args = 0 +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 160 .loc 1 2430 1 is_stmt 0 view .LVU42 + 161 0000 10B5 push {r4, lr} + 162 .cfi_def_cfa_offset 8 + 163 .cfi_offset 4, -8 + 164 .cfi_offset 14, -4 +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 165 .loc 1 2431 3 is_stmt 1 view .LVU43 +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 49 + + + 166 .loc 1 2431 22 is_stmt 0 view .LVU44 + 167 0002 446A ldr r4, [r0, #36] + 168 .LVL10: +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 169 .loc 1 2433 3 is_stmt 1 view .LVU45 +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 170 .loc 1 2433 25 is_stmt 0 view .LVU46 + 171 0004 636A ldr r3, [r4, #36] +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 172 .loc 1 2433 6 view .LVU47 + 173 0006 8342 cmp r3, r0 + 174 0008 0ED0 beq .L16 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 175 .loc 1 2442 8 is_stmt 1 view .LVU48 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 176 .loc 1 2442 30 is_stmt 0 view .LVU49 + 177 000a A36A ldr r3, [r4, #40] +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 178 .loc 1 2442 11 view .LVU50 + 179 000c 8342 cmp r3, r0 + 180 000e 14D0 beq .L17 +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 181 .loc 1 2451 8 is_stmt 1 view .LVU51 +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 182 .loc 1 2451 30 is_stmt 0 view .LVU52 + 183 0010 E36A ldr r3, [r4, #44] +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 184 .loc 1 2451 11 view .LVU53 + 185 0012 8342 cmp r3, r0 + 186 0014 1AD0 beq .L18 +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 187 .loc 1 2460 8 is_stmt 1 view .LVU54 +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 188 .loc 1 2460 30 is_stmt 0 view .LVU55 + 189 0016 236B ldr r3, [r4, #48] +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 190 .loc 1 2460 11 view .LVU56 + 191 0018 8342 cmp r3, r0 + 192 001a 20D0 beq .L19 + 193 .L12: +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 194 .loc 1 2472 3 is_stmt 1 view .LVU57 +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 195 .loc 1 2477 3 view .LVU58 + 196 001c 2046 mov r0, r4 + 197 .LVL11: +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 198 .loc 1 2477 3 is_stmt 0 view .LVU59 + 199 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 200 .LVL12: +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 201 .loc 1 2480 3 is_stmt 1 view .LVU60 +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 202 .loc 1 2480 17 is_stmt 0 view .LVU61 + 203 0022 0023 movs r3, #0 + 204 0024 2377 strb r3, [r4, #28] +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 50 + + + 205 .loc 1 2481 1 view .LVU62 + 206 0026 10BD pop {r4, pc} + 207 .LVL13: + 208 .L16: +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 209 .loc 1 2435 5 is_stmt 1 view .LVU63 +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 210 .loc 1 2435 19 is_stmt 0 view .LVU64 + 211 0028 0123 movs r3, #1 + 212 002a 2377 strb r3, [r4, #28] +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 213 .loc 1 2437 5 is_stmt 1 view .LVU65 +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 214 .loc 1 2437 19 is_stmt 0 view .LVU66 + 215 002c 8369 ldr r3, [r0, #24] +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 216 .loc 1 2437 8 view .LVU67 + 217 002e 002B cmp r3, #0 + 218 0030 F4D1 bne .L12 +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 219 .loc 1 2439 7 is_stmt 1 view .LVU68 + 220 0032 0123 movs r3, #1 + 221 0034 84F84430 strb r3, [r4, #68] + 222 0038 F0E7 b .L12 + 223 .L17: +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 224 .loc 1 2444 5 view .LVU69 +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 225 .loc 1 2444 19 is_stmt 0 view .LVU70 + 226 003a 0223 movs r3, #2 + 227 003c 2377 strb r3, [r4, #28] +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 228 .loc 1 2446 5 is_stmt 1 view .LVU71 +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 229 .loc 1 2446 19 is_stmt 0 view .LVU72 + 230 003e 8369 ldr r3, [r0, #24] +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 231 .loc 1 2446 8 view .LVU73 + 232 0040 002B cmp r3, #0 + 233 0042 EBD1 bne .L12 +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 234 .loc 1 2448 7 is_stmt 1 view .LVU74 + 235 0044 0123 movs r3, #1 + 236 0046 84F84530 strb r3, [r4, #69] + 237 004a E7E7 b .L12 + 238 .L18: +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 239 .loc 1 2453 5 view .LVU75 +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 240 .loc 1 2453 19 is_stmt 0 view .LVU76 + 241 004c 0423 movs r3, #4 + 242 004e 2377 strb r3, [r4, #28] +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 243 .loc 1 2455 5 is_stmt 1 view .LVU77 +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 244 .loc 1 2455 19 is_stmt 0 view .LVU78 + 245 0050 8369 ldr r3, [r0, #24] + ARM GAS /tmp/ccXMh04L.s page 51 + + +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 246 .loc 1 2455 8 view .LVU79 + 247 0052 002B cmp r3, #0 + 248 0054 E2D1 bne .L12 +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 249 .loc 1 2457 7 is_stmt 1 view .LVU80 + 250 0056 0123 movs r3, #1 + 251 0058 84F84630 strb r3, [r4, #70] + 252 005c DEE7 b .L12 + 253 .L19: +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 254 .loc 1 2462 5 view .LVU81 +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 255 .loc 1 2462 19 is_stmt 0 view .LVU82 + 256 005e 0823 movs r3, #8 + 257 0060 2377 strb r3, [r4, #28] +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 258 .loc 1 2464 5 is_stmt 1 view .LVU83 +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 259 .loc 1 2464 19 is_stmt 0 view .LVU84 + 260 0062 8369 ldr r3, [r0, #24] +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 261 .loc 1 2464 8 view .LVU85 + 262 0064 002B cmp r3, #0 + 263 0066 D9D1 bne .L12 +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 264 .loc 1 2466 7 is_stmt 1 view .LVU86 + 265 0068 0123 movs r3, #1 + 266 006a 84F84730 strb r3, [r4, #71] + 267 006e D5E7 b .L12 + 268 .cfi_endproc + 269 .LFE171: + 271 .section .text.HAL_TIMEx_HallSensor_MspInit,"ax",%progbits + 272 .align 1 + 273 .weak HAL_TIMEx_HallSensor_MspInit + 274 .syntax unified + 275 .thumb + 276 .thumb_func + 278 HAL_TIMEx_HallSensor_MspInit: + 279 .LVL14: + 280 .LFB132: + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 281 .loc 1 288 1 view -0 + 282 .cfi_startproc + 283 @ args = 0, pretend = 0, frame = 0 + 284 @ frame_needed = 0, uses_anonymous_args = 0 + 285 @ link register save eliminated. + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 286 .loc 1 290 3 view .LVU88 + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 287 .loc 1 295 1 is_stmt 0 view .LVU89 + 288 0000 7047 bx lr + 289 .cfi_endproc + 290 .LFE132: + 292 .section .text.HAL_TIMEx_HallSensor_Init,"ax",%progbits + 293 .align 1 + 294 .global HAL_TIMEx_HallSensor_Init + ARM GAS /tmp/ccXMh04L.s page 52 + + + 295 .syntax unified + 296 .thumb + 297 .thumb_func + 299 HAL_TIMEx_HallSensor_Init: + 300 .LVL15: + 301 .LFB130: + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 302 .loc 1 141 1 is_stmt 1 view -0 + 303 .cfi_startproc + 304 @ args = 0, pretend = 0, frame = 32 + 305 @ frame_needed = 0, uses_anonymous_args = 0 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 306 .loc 1 142 3 view .LVU91 + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 307 .loc 1 145 3 view .LVU92 + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 308 .loc 1 145 6 is_stmt 0 view .LVU93 + 309 0000 0028 cmp r0, #0 + 310 0002 67D0 beq .L24 + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 311 .loc 1 141 1 view .LVU94 + 312 0004 70B5 push {r4, r5, r6, lr} + 313 .cfi_def_cfa_offset 16 + 314 .cfi_offset 4, -16 + 315 .cfi_offset 5, -12 + 316 .cfi_offset 6, -8 + 317 .cfi_offset 14, -4 + 318 0006 88B0 sub sp, sp, #32 + 319 .cfi_def_cfa_offset 48 + 320 0008 0E46 mov r6, r1 + 321 000a 0446 mov r4, r0 + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 322 .loc 1 151 3 is_stmt 1 view .LVU95 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 323 .loc 1 152 3 view .LVU96 + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 324 .loc 1 153 3 view .LVU97 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); + 325 .loc 1 154 3 view .LVU98 + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 326 .loc 1 155 3 view .LVU99 + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 327 .loc 1 156 3 view .LVU100 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 328 .loc 1 157 3 view .LVU101 + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 329 .loc 1 158 3 view .LVU102 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 330 .loc 1 160 3 view .LVU103 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 331 .loc 1 160 11 is_stmt 0 view .LVU104 + 332 000c 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 333 .loc 1 160 6 view .LVU105 + 334 0010 002B cmp r3, #0 + 335 0012 5AD0 beq .L29 + 336 .LVL16: + ARM GAS /tmp/ccXMh04L.s page 53 + + + 337 .L23: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 338 .loc 1 182 3 is_stmt 1 view .LVU106 + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 339 .loc 1 182 15 is_stmt 0 view .LVU107 + 340 0014 0223 movs r3, #2 + 341 0016 84F83D30 strb r3, [r4, #61] + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 342 .loc 1 185 3 is_stmt 1 view .LVU108 + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 343 .loc 1 185 38 is_stmt 0 view .LVU109 + 344 001a 2146 mov r1, r4 + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 345 .loc 1 185 3 view .LVU110 + 346 001c 51F8040B ldr r0, [r1], #4 + 347 0020 FFF7FEFF bl TIM_Base_SetConfig + 348 .LVL17: + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 349 .loc 1 188 3 is_stmt 1 view .LVU111 + 350 0024 B368 ldr r3, [r6, #8] + 351 0026 0322 movs r2, #3 + 352 0028 3168 ldr r1, [r6] + 353 002a 2068 ldr r0, [r4] + 354 002c FFF7FEFF bl TIM_TI1_SetConfig + 355 .LVL18: + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 356 .loc 1 191 3 view .LVU112 + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 357 .loc 1 191 7 is_stmt 0 view .LVU113 + 358 0030 2268 ldr r2, [r4] + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 359 .loc 1 191 17 view .LVU114 + 360 0032 9369 ldr r3, [r2, #24] + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 361 .loc 1 191 25 view .LVU115 + 362 0034 23F00C03 bic r3, r3, #12 + 363 0038 9361 str r3, [r2, #24] + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 364 .loc 1 193 3 is_stmt 1 view .LVU116 + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 365 .loc 1 193 7 is_stmt 0 view .LVU117 + 366 003a 2268 ldr r2, [r4] + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 367 .loc 1 193 17 view .LVU118 + 368 003c 9369 ldr r3, [r2, #24] + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 369 .loc 1 193 35 view .LVU119 + 370 003e 7168 ldr r1, [r6, #4] + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 371 .loc 1 193 25 view .LVU120 + 372 0040 0B43 orrs r3, r3, r1 + 373 0042 9361 str r3, [r2, #24] + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 374 .loc 1 196 3 is_stmt 1 view .LVU121 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 375 .loc 1 196 7 is_stmt 0 view .LVU122 + 376 0044 2268 ldr r2, [r4] + ARM GAS /tmp/ccXMh04L.s page 54 + + + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 377 .loc 1 196 17 view .LVU123 + 378 0046 5368 ldr r3, [r2, #4] + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 379 .loc 1 196 23 view .LVU124 + 380 0048 43F08003 orr r3, r3, #128 + 381 004c 5360 str r3, [r2, #4] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 382 .loc 1 199 3 is_stmt 1 view .LVU125 + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 383 .loc 1 199 7 is_stmt 0 view .LVU126 + 384 004e 2268 ldr r2, [r4] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 385 .loc 1 199 17 view .LVU127 + 386 0050 9368 ldr r3, [r2, #8] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 387 .loc 1 199 24 view .LVU128 + 388 0052 23F07003 bic r3, r3, #112 + 389 0056 9360 str r3, [r2, #8] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 390 .loc 1 200 3 is_stmt 1 view .LVU129 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 391 .loc 1 200 7 is_stmt 0 view .LVU130 + 392 0058 2268 ldr r2, [r4] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 393 .loc 1 200 17 view .LVU131 + 394 005a 9368 ldr r3, [r2, #8] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 395 .loc 1 200 24 view .LVU132 + 396 005c 43F04003 orr r3, r3, #64 + 397 0060 9360 str r3, [r2, #8] + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 398 .loc 1 203 3 is_stmt 1 view .LVU133 + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 399 .loc 1 203 7 is_stmt 0 view .LVU134 + 400 0062 2268 ldr r2, [r4] + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 401 .loc 1 203 17 view .LVU135 + 402 0064 9368 ldr r3, [r2, #8] + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 403 .loc 1 203 24 view .LVU136 + 404 0066 23F48033 bic r3, r3, #65536 + 405 006a 23F00703 bic r3, r3, #7 + 406 006e 9360 str r3, [r2, #8] + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 407 .loc 1 204 3 is_stmt 1 view .LVU137 + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 408 .loc 1 204 7 is_stmt 0 view .LVU138 + 409 0070 2268 ldr r2, [r4] + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 410 .loc 1 204 17 view .LVU139 + 411 0072 9368 ldr r3, [r2, #8] + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 412 .loc 1 204 24 view .LVU140 + 413 0074 43F00403 orr r3, r3, #4 + 414 0078 9360 str r3, [r2, #8] + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + ARM GAS /tmp/ccXMh04L.s page 55 + + + 415 .loc 1 207 3 is_stmt 1 view .LVU141 + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 416 .loc 1 207 24 is_stmt 0 view .LVU142 + 417 007a 0025 movs r5, #0 + 418 007c 0595 str r5, [sp, #20] + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 419 .loc 1 208 3 is_stmt 1 view .LVU143 + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 420 .loc 1 208 25 is_stmt 0 view .LVU144 + 421 007e 0695 str r5, [sp, #24] + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 422 .loc 1 209 3 is_stmt 1 view .LVU145 + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 423 .loc 1 209 20 is_stmt 0 view .LVU146 + 424 0080 7023 movs r3, #112 + 425 0082 0193 str r3, [sp, #4] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 426 .loc 1 210 3 is_stmt 1 view .LVU147 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 427 .loc 1 210 26 is_stmt 0 view .LVU148 + 428 0084 0795 str r5, [sp, #28] + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 429 .loc 1 211 3 is_stmt 1 view .LVU149 + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 430 .loc 1 211 25 is_stmt 0 view .LVU150 + 431 0086 0495 str r5, [sp, #16] + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 432 .loc 1 212 3 is_stmt 1 view .LVU151 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 433 .loc 1 212 24 is_stmt 0 view .LVU152 + 434 0088 0395 str r5, [sp, #12] + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 435 .loc 1 213 3 is_stmt 1 view .LVU153 + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 436 .loc 1 213 28 is_stmt 0 view .LVU154 + 437 008a F368 ldr r3, [r6, #12] + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 438 .loc 1 213 19 view .LVU155 + 439 008c 0293 str r3, [sp, #8] + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 440 .loc 1 215 3 is_stmt 1 view .LVU156 + 441 008e 01A9 add r1, sp, #4 + 442 0090 2068 ldr r0, [r4] + 443 0092 FFF7FEFF bl TIM_OC2_SetConfig + 444 .LVL19: + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 445 .loc 1 219 3 view .LVU157 + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 446 .loc 1 219 7 is_stmt 0 view .LVU158 + 447 0096 2268 ldr r2, [r4] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 448 .loc 1 219 17 view .LVU159 + 449 0098 5368 ldr r3, [r2, #4] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 450 .loc 1 219 23 view .LVU160 + 451 009a 23F07003 bic r3, r3, #112 + 452 009e 5360 str r3, [r2, #4] + ARM GAS /tmp/ccXMh04L.s page 56 + + + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 453 .loc 1 220 3 is_stmt 1 view .LVU161 + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 454 .loc 1 220 7 is_stmt 0 view .LVU162 + 455 00a0 2268 ldr r2, [r4] + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 456 .loc 1 220 17 view .LVU163 + 457 00a2 5368 ldr r3, [r2, #4] + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 458 .loc 1 220 23 view .LVU164 + 459 00a4 43F05003 orr r3, r3, #80 + 460 00a8 5360 str r3, [r2, #4] + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 461 .loc 1 223 3 is_stmt 1 view .LVU165 + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 462 .loc 1 223 23 is_stmt 0 view .LVU166 + 463 00aa 0123 movs r3, #1 + 464 00ac 84F84830 strb r3, [r4, #72] + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 465 .loc 1 226 3 is_stmt 1 view .LVU167 + 466 00b0 84F83E30 strb r3, [r4, #62] + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 467 .loc 1 227 3 view .LVU168 + 468 00b4 84F83F30 strb r3, [r4, #63] + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 469 .loc 1 228 3 view .LVU169 + 470 00b8 84F84430 strb r3, [r4, #68] + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 471 .loc 1 229 3 view .LVU170 + 472 00bc 84F84530 strb r3, [r4, #69] + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 473 .loc 1 232 3 view .LVU171 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 474 .loc 1 232 15 is_stmt 0 view .LVU172 + 475 00c0 84F83D30 strb r3, [r4, #61] + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 476 .loc 1 234 3 is_stmt 1 view .LVU173 + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 477 .loc 1 234 10 is_stmt 0 view .LVU174 + 478 00c4 2846 mov r0, r5 + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 479 .loc 1 235 1 view .LVU175 + 480 00c6 08B0 add sp, sp, #32 + 481 .cfi_remember_state + 482 .cfi_def_cfa_offset 16 + 483 @ sp needed + 484 00c8 70BD pop {r4, r5, r6, pc} + 485 .LVL20: + 486 .L29: + 487 .cfi_restore_state + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 488 .loc 1 163 5 is_stmt 1 view .LVU176 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 489 .loc 1 163 16 is_stmt 0 view .LVU177 + 490 00ca 80F83C30 strb r3, [r0, #60] + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 491 .loc 1 177 5 is_stmt 1 view .LVU178 + ARM GAS /tmp/ccXMh04L.s page 57 + + + 492 00ce FFF7FEFF bl HAL_TIMEx_HallSensor_MspInit + 493 .LVL21: + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 494 .loc 1 177 5 is_stmt 0 view .LVU179 + 495 00d2 9FE7 b .L23 + 496 .LVL22: + 497 .L24: + 498 .cfi_def_cfa_offset 0 + 499 .cfi_restore 4 + 500 .cfi_restore 5 + 501 .cfi_restore 6 + 502 .cfi_restore 14 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 503 .loc 1 147 12 view .LVU180 + 504 00d4 0120 movs r0, #1 + 505 .LVL23: + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 506 .loc 1 235 1 view .LVU181 + 507 00d6 7047 bx lr + 508 .cfi_endproc + 509 .LFE130: + 511 .section .text.HAL_TIMEx_HallSensor_MspDeInit,"ax",%progbits + 512 .align 1 + 513 .weak HAL_TIMEx_HallSensor_MspDeInit + 514 .syntax unified + 515 .thumb + 516 .thumb_func + 518 HAL_TIMEx_HallSensor_MspDeInit: + 519 .LVL24: + 520 .LFB133: + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 521 .loc 1 303 1 is_stmt 1 view -0 + 522 .cfi_startproc + 523 @ args = 0, pretend = 0, frame = 0 + 524 @ frame_needed = 0, uses_anonymous_args = 0 + 525 @ link register save eliminated. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 526 .loc 1 305 3 view .LVU183 + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 527 .loc 1 310 1 is_stmt 0 view .LVU184 + 528 0000 7047 bx lr + 529 .cfi_endproc + 530 .LFE133: + 532 .section .text.HAL_TIMEx_HallSensor_DeInit,"ax",%progbits + 533 .align 1 + 534 .global HAL_TIMEx_HallSensor_DeInit + 535 .syntax unified + 536 .thumb + 537 .thumb_func + 539 HAL_TIMEx_HallSensor_DeInit: + 540 .LVL25: + 541 .LFB131: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 542 .loc 1 243 1 is_stmt 1 view -0 + 543 .cfi_startproc + 544 @ args = 0, pretend = 0, frame = 0 + 545 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccXMh04L.s page 58 + + + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 546 .loc 1 243 1 is_stmt 0 view .LVU186 + 547 0000 10B5 push {r4, lr} + 548 .cfi_def_cfa_offset 8 + 549 .cfi_offset 4, -8 + 550 .cfi_offset 14, -4 + 551 0002 0446 mov r4, r0 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 552 .loc 1 245 3 is_stmt 1 view .LVU187 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 553 .loc 1 247 3 view .LVU188 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 554 .loc 1 247 15 is_stmt 0 view .LVU189 + 555 0004 0223 movs r3, #2 + 556 0006 80F83D30 strb r3, [r0, #61] + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 557 .loc 1 250 3 is_stmt 1 view .LVU190 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 558 .loc 1 250 3 view .LVU191 + 559 000a 0368 ldr r3, [r0] + 560 000c 196A ldr r1, [r3, #32] + 561 000e 41F21112 movw r2, #4369 + 562 0012 1142 tst r1, r2 + 563 0014 08D1 bne .L32 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 564 .loc 1 250 3 discriminator 1 view .LVU192 + 565 0016 196A ldr r1, [r3, #32] + 566 0018 40F24442 movw r2, #1092 + 567 001c 1142 tst r1, r2 + 568 001e 03D1 bne .L32 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 569 .loc 1 250 3 discriminator 3 view .LVU193 + 570 0020 1A68 ldr r2, [r3] + 571 0022 22F00102 bic r2, r2, #1 + 572 0026 1A60 str r2, [r3] + 573 .L32: + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 574 .loc 1 250 3 discriminator 5 view .LVU194 + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 575 .loc 1 261 3 view .LVU195 + 576 0028 2046 mov r0, r4 + 577 .LVL26: + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 578 .loc 1 261 3 is_stmt 0 view .LVU196 + 579 002a FFF7FEFF bl HAL_TIMEx_HallSensor_MspDeInit + 580 .LVL27: + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 581 .loc 1 265 3 is_stmt 1 view .LVU197 + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 582 .loc 1 265 23 is_stmt 0 view .LVU198 + 583 002e 0020 movs r0, #0 + 584 0030 84F84800 strb r0, [r4, #72] + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 585 .loc 1 268 3 is_stmt 1 view .LVU199 + 586 0034 84F83E00 strb r0, [r4, #62] + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 587 .loc 1 269 3 view .LVU200 + ARM GAS /tmp/ccXMh04L.s page 59 + + + 588 0038 84F83F00 strb r0, [r4, #63] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 589 .loc 1 270 3 view .LVU201 + 590 003c 84F84400 strb r0, [r4, #68] + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 591 .loc 1 271 3 view .LVU202 + 592 0040 84F84500 strb r0, [r4, #69] + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 593 .loc 1 274 3 view .LVU203 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 594 .loc 1 274 15 is_stmt 0 view .LVU204 + 595 0044 84F83D00 strb r0, [r4, #61] + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 596 .loc 1 277 3 is_stmt 1 view .LVU205 + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 597 .loc 1 277 3 view .LVU206 + 598 0048 84F83C00 strb r0, [r4, #60] + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 599 .loc 1 277 3 view .LVU207 + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 600 .loc 1 279 3 view .LVU208 + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 601 .loc 1 280 1 is_stmt 0 view .LVU209 + 602 004c 10BD pop {r4, pc} + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 603 .loc 1 280 1 view .LVU210 + 604 .cfi_endproc + 605 .LFE131: + 607 .section .text.HAL_TIMEx_HallSensor_Start,"ax",%progbits + 608 .align 1 + 609 .global HAL_TIMEx_HallSensor_Start + 610 .syntax unified + 611 .thumb + 612 .thumb_func + 614 HAL_TIMEx_HallSensor_Start: + 615 .LVL28: + 616 .LFB134: + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 617 .loc 1 318 1 is_stmt 1 view -0 + 618 .cfi_startproc + 619 @ args = 0, pretend = 0, frame = 0 + 620 @ frame_needed = 0, uses_anonymous_args = 0 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 621 .loc 1 318 1 is_stmt 0 view .LVU212 + 622 0000 10B5 push {r4, lr} + 623 .cfi_def_cfa_offset 8 + 624 .cfi_offset 4, -8 + 625 .cfi_offset 14, -4 + 626 0002 0446 mov r4, r0 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 627 .loc 1 319 3 is_stmt 1 view .LVU213 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 628 .loc 1 320 3 view .LVU214 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 629 .loc 1 320 31 is_stmt 0 view .LVU215 + 630 0004 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 631 .LVL29: + ARM GAS /tmp/ccXMh04L.s page 60 + + + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 632 .loc 1 320 31 view .LVU216 + 633 0008 C0B2 uxtb r0, r0 + 634 .LVL30: + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 635 .loc 1 321 3 is_stmt 1 view .LVU217 + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 636 .loc 1 321 31 is_stmt 0 view .LVU218 + 637 000a 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 638 .LVL31: + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 639 .loc 1 322 3 is_stmt 1 view .LVU219 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 640 .loc 1 322 31 is_stmt 0 view .LVU220 + 641 000e 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 642 .LVL32: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 643 .loc 1 323 3 is_stmt 1 view .LVU221 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 644 .loc 1 323 31 is_stmt 0 view .LVU222 + 645 0012 94F84510 ldrb r1, [r4, #69] @ zero_extendqisi2 + 646 .LVL33: + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 647 .loc 1 326 3 is_stmt 1 view .LVU223 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 648 .loc 1 329 3 view .LVU224 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 649 .loc 1 329 6 is_stmt 0 view .LVU225 + 650 0016 0128 cmp r0, #1 + 651 0018 3ED1 bne .L38 + 652 001a DBB2 uxtb r3, r3 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 653 .loc 1 329 6 view .LVU226 + 654 001c D2B2 uxtb r2, r2 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 655 .loc 1 329 6 view .LVU227 + 656 001e C9B2 uxtb r1, r1 + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 657 .loc 1 330 7 view .LVU228 + 658 0020 012B cmp r3, #1 + 659 0022 3AD1 bne .L35 + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 660 .loc 1 331 7 view .LVU229 + 661 0024 012A cmp r2, #1 + 662 0026 39D1 bne .L39 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 663 .loc 1 332 7 view .LVU230 + 664 0028 0129 cmp r1, #1 + 665 002a 01D0 beq .L44 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 666 .loc 1 334 12 view .LVU231 + 667 002c 1046 mov r0, r2 + 668 .LVL34: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 669 .loc 1 334 12 view .LVU232 + 670 002e 34E0 b .L35 + 671 .LVL35: + ARM GAS /tmp/ccXMh04L.s page 61 + + + 672 .L44: + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 673 .loc 1 338 3 is_stmt 1 view .LVU233 + 674 0030 0223 movs r3, #2 + 675 .LVL36: + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 676 .loc 1 338 3 is_stmt 0 view .LVU234 + 677 0032 84F83E30 strb r3, [r4, #62] + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 678 .loc 1 339 3 is_stmt 1 view .LVU235 + 679 0036 84F83F30 strb r3, [r4, #63] + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 680 .loc 1 340 3 view .LVU236 + 681 003a 84F84430 strb r3, [r4, #68] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 682 .loc 1 341 3 view .LVU237 + 683 003e 84F84530 strb r3, [r4, #69] + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 684 .loc 1 346 3 view .LVU238 + 685 0042 0021 movs r1, #0 + 686 .LVL37: + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 687 .loc 1 346 3 is_stmt 0 view .LVU239 + 688 0044 2068 ldr r0, [r4] + 689 .LVL38: + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 690 .loc 1 346 3 view .LVU240 + 691 0046 FFF7FEFF bl TIM_CCxChannelCmd + 692 .LVL39: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 693 .loc 1 349 3 is_stmt 1 view .LVU241 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 694 .loc 1 349 7 is_stmt 0 view .LVU242 + 695 004a 2368 ldr r3, [r4] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 696 .loc 1 349 6 view .LVU243 + 697 004c 164A ldr r2, .L45 + 698 004e 9342 cmp r3, r2 + 699 0050 14D0 beq .L36 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 700 .loc 1 349 7 discriminator 1 view .LVU244 + 701 0052 B3F1804F cmp r3, #1073741824 + 702 0056 11D0 beq .L36 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 703 .loc 1 349 7 discriminator 2 view .LVU245 + 704 0058 A2F59432 sub r2, r2, #75776 + 705 005c 9342 cmp r3, r2 + 706 005e 0DD0 beq .L36 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 707 .loc 1 349 7 discriminator 3 view .LVU246 + 708 0060 02F58062 add r2, r2, #1024 + 709 0064 9342 cmp r3, r2 + 710 0066 09D0 beq .L36 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 711 .loc 1 349 7 discriminator 4 view .LVU247 + 712 0068 02F59C32 add r2, r2, #79872 + 713 006c 9342 cmp r3, r2 + ARM GAS /tmp/ccXMh04L.s page 62 + + + 714 006e 05D0 beq .L36 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 715 .loc 1 359 5 is_stmt 1 view .LVU248 + 716 0070 1A68 ldr r2, [r3] + 717 0072 42F00102 orr r2, r2, #1 + 718 0076 1A60 str r2, [r3] + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 719 .loc 1 363 10 is_stmt 0 view .LVU249 + 720 0078 0020 movs r0, #0 + 721 007a 0EE0 b .L35 + 722 .L36: + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 723 .loc 1 351 5 is_stmt 1 view .LVU250 + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 724 .loc 1 351 29 is_stmt 0 view .LVU251 + 725 007c 9968 ldr r1, [r3, #8] + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 726 .loc 1 351 13 view .LVU252 + 727 007e 0B4A ldr r2, .L45+4 + 728 0080 0A40 ands r2, r2, r1 + 729 .LVL40: + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 730 .loc 1 352 5 is_stmt 1 view .LVU253 + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 731 .loc 1 352 8 is_stmt 0 view .LVU254 + 732 0082 062A cmp r2, #6 + 733 0084 0CD0 beq .L41 + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 734 .loc 1 352 9 discriminator 1 view .LVU255 + 735 0086 B2F5803F cmp r2, #65536 + 736 008a 0BD0 beq .L42 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 737 .loc 1 354 7 is_stmt 1 view .LVU256 + 738 008c 1A68 ldr r2, [r3] + 739 .LVL41: + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 740 .loc 1 354 7 is_stmt 0 view .LVU257 + 741 008e 42F00102 orr r2, r2, #1 + 742 0092 1A60 str r2, [r3] + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 743 .loc 1 363 10 view .LVU258 + 744 0094 0020 movs r0, #0 + 745 0096 00E0 b .L35 + 746 .LVL42: + 747 .L38: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 748 .loc 1 334 12 view .LVU259 + 749 0098 0120 movs r0, #1 + 750 .LVL43: + 751 .L35: + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 752 .loc 1 364 1 view .LVU260 + 753 009a 10BD pop {r4, pc} + 754 .LVL44: + 755 .L39: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 756 .loc 1 334 12 view .LVU261 + ARM GAS /tmp/ccXMh04L.s page 63 + + + 757 009c 1846 mov r0, r3 + 758 .LVL45: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 759 .loc 1 334 12 view .LVU262 + 760 009e FCE7 b .L35 + 761 .LVL46: + 762 .L41: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 763 .loc 1 363 10 view .LVU263 + 764 00a0 0020 movs r0, #0 + 765 00a2 FAE7 b .L35 + 766 .L42: + 767 00a4 0020 movs r0, #0 + 768 00a6 F8E7 b .L35 + 769 .L46: + 770 .align 2 + 771 .L45: + 772 00a8 002C0140 .word 1073818624 + 773 00ac 07000100 .word 65543 + 774 .cfi_endproc + 775 .LFE134: + 777 .section .text.HAL_TIMEx_HallSensor_Stop,"ax",%progbits + 778 .align 1 + 779 .global HAL_TIMEx_HallSensor_Stop + 780 .syntax unified + 781 .thumb + 782 .thumb_func + 784 HAL_TIMEx_HallSensor_Stop: + 785 .LVL47: + 786 .LFB135: + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 787 .loc 1 372 1 is_stmt 1 view -0 + 788 .cfi_startproc + 789 @ args = 0, pretend = 0, frame = 0 + 790 @ frame_needed = 0, uses_anonymous_args = 0 + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 791 .loc 1 372 1 is_stmt 0 view .LVU265 + 792 0000 10B5 push {r4, lr} + 793 .cfi_def_cfa_offset 8 + 794 .cfi_offset 4, -8 + 795 .cfi_offset 14, -4 + 796 0002 0446 mov r4, r0 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 797 .loc 1 374 3 is_stmt 1 view .LVU266 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 798 .loc 1 379 3 view .LVU267 + 799 0004 0022 movs r2, #0 + 800 0006 1146 mov r1, r2 + 801 0008 0068 ldr r0, [r0] + 802 .LVL48: + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 803 .loc 1 379 3 is_stmt 0 view .LVU268 + 804 000a FFF7FEFF bl TIM_CCxChannelCmd + 805 .LVL49: + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 806 .loc 1 382 3 is_stmt 1 view .LVU269 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 64 + + + 807 .loc 1 382 3 view .LVU270 + 808 000e 2368 ldr r3, [r4] + 809 0010 196A ldr r1, [r3, #32] + 810 0012 41F21112 movw r2, #4369 + 811 0016 1142 tst r1, r2 + 812 0018 08D1 bne .L48 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 813 .loc 1 382 3 discriminator 1 view .LVU271 + 814 001a 196A ldr r1, [r3, #32] + 815 001c 40F24442 movw r2, #1092 + 816 0020 1142 tst r1, r2 + 817 0022 03D1 bne .L48 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 818 .loc 1 382 3 discriminator 3 view .LVU272 + 819 0024 1A68 ldr r2, [r3] + 820 0026 22F00102 bic r2, r2, #1 + 821 002a 1A60 str r2, [r3] + 822 .L48: + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 823 .loc 1 382 3 discriminator 5 view .LVU273 + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 824 .loc 1 385 3 view .LVU274 + 825 002c 0123 movs r3, #1 + 826 002e 84F83E30 strb r3, [r4, #62] + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 827 .loc 1 386 3 view .LVU275 + 828 0032 84F83F30 strb r3, [r4, #63] + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 829 .loc 1 387 3 view .LVU276 + 830 0036 84F84430 strb r3, [r4, #68] + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 831 .loc 1 388 3 view .LVU277 + 832 003a 84F84530 strb r3, [r4, #69] + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 833 .loc 1 391 3 view .LVU278 + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 834 .loc 1 392 1 is_stmt 0 view .LVU279 + 835 003e 0020 movs r0, #0 + 836 0040 10BD pop {r4, pc} + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 837 .loc 1 392 1 view .LVU280 + 838 .cfi_endproc + 839 .LFE135: + 841 .section .text.HAL_TIMEx_HallSensor_Start_IT,"ax",%progbits + 842 .align 1 + 843 .global HAL_TIMEx_HallSensor_Start_IT + 844 .syntax unified + 845 .thumb + 846 .thumb_func + 848 HAL_TIMEx_HallSensor_Start_IT: + 849 .LVL50: + 850 .LFB136: + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 851 .loc 1 400 1 is_stmt 1 view -0 + 852 .cfi_startproc + 853 @ args = 0, pretend = 0, frame = 0 + 854 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccXMh04L.s page 65 + + + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 855 .loc 1 400 1 is_stmt 0 view .LVU282 + 856 0000 10B5 push {r4, lr} + 857 .cfi_def_cfa_offset 8 + 858 .cfi_offset 4, -8 + 859 .cfi_offset 14, -4 + 860 0002 0446 mov r4, r0 + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 861 .loc 1 401 3 is_stmt 1 view .LVU283 + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 862 .loc 1 402 3 view .LVU284 + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 863 .loc 1 402 31 is_stmt 0 view .LVU285 + 864 0004 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 865 .LVL51: + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 866 .loc 1 402 31 view .LVU286 + 867 0008 C0B2 uxtb r0, r0 + 868 .LVL52: + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 869 .loc 1 403 3 is_stmt 1 view .LVU287 + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 870 .loc 1 403 31 is_stmt 0 view .LVU288 + 871 000a 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 872 .LVL53: + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 873 .loc 1 404 3 is_stmt 1 view .LVU289 + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 874 .loc 1 404 31 is_stmt 0 view .LVU290 + 875 000e 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 876 .LVL54: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 877 .loc 1 405 3 is_stmt 1 view .LVU291 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 878 .loc 1 405 31 is_stmt 0 view .LVU292 + 879 0012 94F84510 ldrb r1, [r4, #69] @ zero_extendqisi2 + 880 .LVL55: + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 881 .loc 1 408 3 is_stmt 1 view .LVU293 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 882 .loc 1 411 3 view .LVU294 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 883 .loc 1 411 6 is_stmt 0 view .LVU295 + 884 0016 0128 cmp r0, #1 + 885 0018 44D1 bne .L54 + 886 001a DBB2 uxtb r3, r3 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 887 .loc 1 411 6 view .LVU296 + 888 001c D2B2 uxtb r2, r2 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 889 .loc 1 411 6 view .LVU297 + 890 001e C9B2 uxtb r1, r1 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 891 .loc 1 412 7 view .LVU298 + 892 0020 012B cmp r3, #1 + 893 0022 40D1 bne .L51 + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + ARM GAS /tmp/ccXMh04L.s page 66 + + + 894 .loc 1 413 7 view .LVU299 + 895 0024 012A cmp r2, #1 + 896 0026 3FD1 bne .L55 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 897 .loc 1 414 7 view .LVU300 + 898 0028 0129 cmp r1, #1 + 899 002a 01D0 beq .L60 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 900 .loc 1 416 12 view .LVU301 + 901 002c 1046 mov r0, r2 + 902 .LVL56: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 903 .loc 1 416 12 view .LVU302 + 904 002e 3AE0 b .L51 + 905 .LVL57: + 906 .L60: + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 907 .loc 1 420 3 is_stmt 1 view .LVU303 + 908 0030 0223 movs r3, #2 + 909 .LVL58: + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 910 .loc 1 420 3 is_stmt 0 view .LVU304 + 911 0032 84F83E30 strb r3, [r4, #62] + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 912 .loc 1 421 3 is_stmt 1 view .LVU305 + 913 0036 84F83F30 strb r3, [r4, #63] + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 914 .loc 1 422 3 view .LVU306 + 915 003a 84F84430 strb r3, [r4, #68] + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 916 .loc 1 423 3 view .LVU307 + 917 003e 84F84530 strb r3, [r4, #69] + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 918 .loc 1 426 3 view .LVU308 + 919 0042 2268 ldr r2, [r4] + 920 .LVL59: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 921 .loc 1 426 3 is_stmt 0 view .LVU309 + 922 0044 D368 ldr r3, [r2, #12] + 923 0046 43F00203 orr r3, r3, #2 + 924 004a D360 str r3, [r2, #12] + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 925 .loc 1 431 3 is_stmt 1 view .LVU310 + 926 004c 0122 movs r2, #1 + 927 004e 0021 movs r1, #0 + 928 .LVL60: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 929 .loc 1 431 3 is_stmt 0 view .LVU311 + 930 0050 2068 ldr r0, [r4] + 931 .LVL61: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 932 .loc 1 431 3 view .LVU312 + 933 0052 FFF7FEFF bl TIM_CCxChannelCmd + 934 .LVL62: + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 935 .loc 1 434 3 is_stmt 1 view .LVU313 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 67 + + + 936 .loc 1 434 7 is_stmt 0 view .LVU314 + 937 0056 2368 ldr r3, [r4] + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 938 .loc 1 434 6 view .LVU315 + 939 0058 164A ldr r2, .L61 + 940 005a 9342 cmp r3, r2 + 941 005c 14D0 beq .L52 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 942 .loc 1 434 7 discriminator 1 view .LVU316 + 943 005e B3F1804F cmp r3, #1073741824 + 944 0062 11D0 beq .L52 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 945 .loc 1 434 7 discriminator 2 view .LVU317 + 946 0064 A2F59432 sub r2, r2, #75776 + 947 0068 9342 cmp r3, r2 + 948 006a 0DD0 beq .L52 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 949 .loc 1 434 7 discriminator 3 view .LVU318 + 950 006c 02F58062 add r2, r2, #1024 + 951 0070 9342 cmp r3, r2 + 952 0072 09D0 beq .L52 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 953 .loc 1 434 7 discriminator 4 view .LVU319 + 954 0074 02F59C32 add r2, r2, #79872 + 955 0078 9342 cmp r3, r2 + 956 007a 05D0 beq .L52 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 957 .loc 1 444 5 is_stmt 1 view .LVU320 + 958 007c 1A68 ldr r2, [r3] + 959 007e 42F00102 orr r2, r2, #1 + 960 0082 1A60 str r2, [r3] + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 961 .loc 1 448 10 is_stmt 0 view .LVU321 + 962 0084 0020 movs r0, #0 + 963 0086 0EE0 b .L51 + 964 .L52: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 965 .loc 1 436 5 is_stmt 1 view .LVU322 + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 966 .loc 1 436 29 is_stmt 0 view .LVU323 + 967 0088 9968 ldr r1, [r3, #8] + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 968 .loc 1 436 13 view .LVU324 + 969 008a 0B4A ldr r2, .L61+4 + 970 008c 0A40 ands r2, r2, r1 + 971 .LVL63: + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 972 .loc 1 437 5 is_stmt 1 view .LVU325 + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 973 .loc 1 437 8 is_stmt 0 view .LVU326 + 974 008e 062A cmp r2, #6 + 975 0090 0CD0 beq .L57 + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 976 .loc 1 437 9 discriminator 1 view .LVU327 + 977 0092 B2F5803F cmp r2, #65536 + 978 0096 0BD0 beq .L58 + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccXMh04L.s page 68 + + + 979 .loc 1 439 7 is_stmt 1 view .LVU328 + 980 0098 1A68 ldr r2, [r3] + 981 .LVL64: + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 982 .loc 1 439 7 is_stmt 0 view .LVU329 + 983 009a 42F00102 orr r2, r2, #1 + 984 009e 1A60 str r2, [r3] + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 985 .loc 1 448 10 view .LVU330 + 986 00a0 0020 movs r0, #0 + 987 00a2 00E0 b .L51 + 988 .LVL65: + 989 .L54: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 990 .loc 1 416 12 view .LVU331 + 991 00a4 0120 movs r0, #1 + 992 .LVL66: + 993 .L51: + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 994 .loc 1 449 1 view .LVU332 + 995 00a6 10BD pop {r4, pc} + 996 .LVL67: + 997 .L55: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 998 .loc 1 416 12 view .LVU333 + 999 00a8 1846 mov r0, r3 + 1000 .LVL68: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1001 .loc 1 416 12 view .LVU334 + 1002 00aa FCE7 b .L51 + 1003 .LVL69: + 1004 .L57: + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1005 .loc 1 448 10 view .LVU335 + 1006 00ac 0020 movs r0, #0 + 1007 00ae FAE7 b .L51 + 1008 .L58: + 1009 00b0 0020 movs r0, #0 + 1010 00b2 F8E7 b .L51 + 1011 .L62: + 1012 .align 2 + 1013 .L61: + 1014 00b4 002C0140 .word 1073818624 + 1015 00b8 07000100 .word 65543 + 1016 .cfi_endproc + 1017 .LFE136: + 1019 .section .text.HAL_TIMEx_HallSensor_Stop_IT,"ax",%progbits + 1020 .align 1 + 1021 .global HAL_TIMEx_HallSensor_Stop_IT + 1022 .syntax unified + 1023 .thumb + 1024 .thumb_func + 1026 HAL_TIMEx_HallSensor_Stop_IT: + 1027 .LVL70: + 1028 .LFB137: + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 1029 .loc 1 457 1 is_stmt 1 view -0 + ARM GAS /tmp/ccXMh04L.s page 69 + + + 1030 .cfi_startproc + 1031 @ args = 0, pretend = 0, frame = 0 + 1032 @ frame_needed = 0, uses_anonymous_args = 0 + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 1033 .loc 1 457 1 is_stmt 0 view .LVU337 + 1034 0000 10B5 push {r4, lr} + 1035 .cfi_def_cfa_offset 8 + 1036 .cfi_offset 4, -8 + 1037 .cfi_offset 14, -4 + 1038 0002 0446 mov r4, r0 + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1039 .loc 1 459 3 is_stmt 1 view .LVU338 + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1040 .loc 1 464 3 view .LVU339 + 1041 0004 0022 movs r2, #0 + 1042 0006 1146 mov r1, r2 + 1043 0008 0068 ldr r0, [r0] + 1044 .LVL71: + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1045 .loc 1 464 3 is_stmt 0 view .LVU340 + 1046 000a FFF7FEFF bl TIM_CCxChannelCmd + 1047 .LVL72: + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1048 .loc 1 467 3 is_stmt 1 view .LVU341 + 1049 000e 2268 ldr r2, [r4] + 1050 0010 D368 ldr r3, [r2, #12] + 1051 0012 23F00203 bic r3, r3, #2 + 1052 0016 D360 str r3, [r2, #12] + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1053 .loc 1 470 3 view .LVU342 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1054 .loc 1 470 3 view .LVU343 + 1055 0018 2368 ldr r3, [r4] + 1056 001a 196A ldr r1, [r3, #32] + 1057 001c 41F21112 movw r2, #4369 + 1058 0020 1142 tst r1, r2 + 1059 0022 08D1 bne .L64 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1060 .loc 1 470 3 discriminator 1 view .LVU344 + 1061 0024 196A ldr r1, [r3, #32] + 1062 0026 40F24442 movw r2, #1092 + 1063 002a 1142 tst r1, r2 + 1064 002c 03D1 bne .L64 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1065 .loc 1 470 3 discriminator 3 view .LVU345 + 1066 002e 1A68 ldr r2, [r3] + 1067 0030 22F00102 bic r2, r2, #1 + 1068 0034 1A60 str r2, [r3] + 1069 .L64: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1070 .loc 1 470 3 discriminator 5 view .LVU346 + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 1071 .loc 1 473 3 view .LVU347 + 1072 0036 0123 movs r3, #1 + 1073 0038 84F83E30 strb r3, [r4, #62] + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 1074 .loc 1 474 3 view .LVU348 + ARM GAS /tmp/ccXMh04L.s page 70 + + + 1075 003c 84F83F30 strb r3, [r4, #63] + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 1076 .loc 1 475 3 view .LVU349 + 1077 0040 84F84430 strb r3, [r4, #68] + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1078 .loc 1 476 3 view .LVU350 + 1079 0044 84F84530 strb r3, [r4, #69] + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1080 .loc 1 479 3 view .LVU351 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1081 .loc 1 480 1 is_stmt 0 view .LVU352 + 1082 0048 0020 movs r0, #0 + 1083 004a 10BD pop {r4, pc} + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1084 .loc 1 480 1 view .LVU353 + 1085 .cfi_endproc + 1086 .LFE137: + 1088 .section .text.HAL_TIMEx_HallSensor_Start_DMA,"ax",%progbits + 1089 .align 1 + 1090 .global HAL_TIMEx_HallSensor_Start_DMA + 1091 .syntax unified + 1092 .thumb + 1093 .thumb_func + 1095 HAL_TIMEx_HallSensor_Start_DMA: + 1096 .LVL73: + 1097 .LFB138: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1098 .loc 1 490 1 is_stmt 1 view -0 + 1099 .cfi_startproc + 1100 @ args = 0, pretend = 0, frame = 0 + 1101 @ frame_needed = 0, uses_anonymous_args = 0 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1102 .loc 1 490 1 is_stmt 0 view .LVU355 + 1103 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1104 .cfi_def_cfa_offset 24 + 1105 .cfi_offset 3, -24 + 1106 .cfi_offset 4, -20 + 1107 .cfi_offset 5, -16 + 1108 .cfi_offset 6, -12 + 1109 .cfi_offset 7, -8 + 1110 .cfi_offset 14, -4 + 1111 0002 0446 mov r4, r0 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 1112 .loc 1 491 3 is_stmt 1 view .LVU356 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 1113 .loc 1 492 3 view .LVU357 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 1114 .loc 1 492 31 is_stmt 0 view .LVU358 + 1115 0004 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2 + 1116 0008 5FFA8CF0 uxtb r0, ip + 1117 .LVL74: + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1118 .loc 1 493 3 is_stmt 1 view .LVU359 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1119 .loc 1 493 31 is_stmt 0 view .LVU360 + 1120 000c 94F844C0 ldrb ip, [r4, #68] @ zero_extendqisi2 + 1121 .LVL75: + ARM GAS /tmp/ccXMh04L.s page 71 + + + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1122 .loc 1 496 3 is_stmt 1 view .LVU361 + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 1123 .loc 1 499 3 view .LVU362 + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 1124 .loc 1 499 6 is_stmt 0 view .LVU363 + 1125 0010 0228 cmp r0, #2 + 1126 0012 56D0 beq .L67 + 1127 0014 0F46 mov r7, r1 + 1128 0016 1646 mov r6, r2 + 1129 0018 5FFA8CF5 uxtb r5, ip + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1130 .loc 1 500 7 view .LVU364 + 1131 001c 022D cmp r5, #2 + 1132 001e 4DD0 beq .L70 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 1133 .loc 1 504 8 is_stmt 1 view .LVU365 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 1134 .loc 1 504 11 is_stmt 0 view .LVU366 + 1135 0020 0128 cmp r0, #1 + 1136 0022 4DD1 bne .L71 + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1137 .loc 1 505 12 view .LVU367 + 1138 0024 012D cmp r5, #1 + 1139 0026 4CD1 bne .L67 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1140 .loc 1 507 5 is_stmt 1 view .LVU368 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1141 .loc 1 507 8 is_stmt 0 view .LVU369 + 1142 0028 0029 cmp r1, #0 + 1143 002a 4BD0 beq .L72 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1144 .loc 1 507 25 discriminator 1 view .LVU370 + 1145 002c 0AB9 cbnz r2, .L76 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1146 .loc 1 509 14 view .LVU371 + 1147 002e 2846 mov r0, r5 + 1148 .LVL76: + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1149 .loc 1 509 14 view .LVU372 + 1150 0030 47E0 b .L67 + 1151 .LVL77: + 1152 .L76: + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 1153 .loc 1 513 7 is_stmt 1 view .LVU373 + 1154 0032 0223 movs r3, #2 + 1155 0034 84F83E30 strb r3, [r4, #62] + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1156 .loc 1 514 7 view .LVU374 + 1157 0038 84F84430 strb r3, [r4, #68] + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1158 .loc 1 525 3 view .LVU375 + 1159 003c 0122 movs r2, #1 + 1160 .LVL78: + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1161 .loc 1 525 3 is_stmt 0 view .LVU376 + 1162 003e 0021 movs r1, #0 + ARM GAS /tmp/ccXMh04L.s page 72 + + + 1163 .LVL79: + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1164 .loc 1 525 3 view .LVU377 + 1165 0040 2068 ldr r0, [r4] + 1166 .LVL80: + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1167 .loc 1 525 3 view .LVU378 + 1168 0042 FFF7FEFF bl TIM_CCxChannelCmd + 1169 .LVL81: + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1170 .loc 1 528 3 is_stmt 1 view .LVU379 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1171 .loc 1 528 13 is_stmt 0 view .LVU380 + 1172 0046 636A ldr r3, [r4, #36] + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1173 .loc 1 528 48 view .LVU381 + 1174 0048 204A ldr r2, .L77 + 1175 004a 9A62 str r2, [r3, #40] + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1176 .loc 1 529 3 is_stmt 1 view .LVU382 + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1177 .loc 1 529 13 is_stmt 0 view .LVU383 + 1178 004c 636A ldr r3, [r4, #36] + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1179 .loc 1 529 52 view .LVU384 + 1180 004e 204A ldr r2, .L77+4 + 1181 0050 DA62 str r2, [r3, #44] + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1182 .loc 1 531 3 is_stmt 1 view .LVU385 + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1183 .loc 1 531 13 is_stmt 0 view .LVU386 + 1184 0052 636A ldr r3, [r4, #36] + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1185 .loc 1 531 49 view .LVU387 + 1186 0054 1F4A ldr r2, .L77+8 + 1187 0056 1A63 str r2, [r3, #48] + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1188 .loc 1 534 3 is_stmt 1 view .LVU388 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1189 .loc 1 534 67 is_stmt 0 view .LVU389 + 1190 0058 2168 ldr r1, [r4] + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1191 .loc 1 534 7 view .LVU390 + 1192 005a 3346 mov r3, r6 + 1193 005c 3A46 mov r2, r7 + 1194 005e 3431 adds r1, r1, #52 + 1195 0060 606A ldr r0, [r4, #36] + 1196 0062 FFF7FEFF bl HAL_DMA_Start_IT + 1197 .LVL82: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1198 .loc 1 534 6 discriminator 1 view .LVU391 + 1199 0066 78BB cbnz r0, .L74 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1200 .loc 1 540 3 is_stmt 1 view .LVU392 + 1201 0068 2268 ldr r2, [r4] + 1202 006a D368 ldr r3, [r2, #12] + 1203 006c 43F40073 orr r3, r3, #512 + ARM GAS /tmp/ccXMh04L.s page 73 + + + 1204 0070 D360 str r3, [r2, #12] + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1205 .loc 1 543 3 view .LVU393 + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1206 .loc 1 543 7 is_stmt 0 view .LVU394 + 1207 0072 2368 ldr r3, [r4] + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1208 .loc 1 543 6 view .LVU395 + 1209 0074 184A ldr r2, .L77+12 + 1210 0076 9342 cmp r3, r2 + 1211 0078 13D0 beq .L68 + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1212 .loc 1 543 7 discriminator 1 view .LVU396 + 1213 007a B3F1804F cmp r3, #1073741824 + 1214 007e 10D0 beq .L68 + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1215 .loc 1 543 7 discriminator 2 view .LVU397 + 1216 0080 A2F59432 sub r2, r2, #75776 + 1217 0084 9342 cmp r3, r2 + 1218 0086 0CD0 beq .L68 + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1219 .loc 1 543 7 discriminator 3 view .LVU398 + 1220 0088 02F58062 add r2, r2, #1024 + 1221 008c 9342 cmp r3, r2 + 1222 008e 08D0 beq .L68 + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1223 .loc 1 543 7 discriminator 4 view .LVU399 + 1224 0090 02F59C32 add r2, r2, #79872 + 1225 0094 9342 cmp r3, r2 + 1226 0096 04D0 beq .L68 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1227 .loc 1 553 5 is_stmt 1 view .LVU400 + 1228 0098 1A68 ldr r2, [r3] + 1229 009a 42F00102 orr r2, r2, #1 + 1230 009e 1A60 str r2, [r3] + 1231 00a0 0FE0 b .L67 + 1232 .L68: + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1233 .loc 1 545 5 view .LVU401 + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1234 .loc 1 545 29 is_stmt 0 view .LVU402 + 1235 00a2 9968 ldr r1, [r3, #8] + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1236 .loc 1 545 13 view .LVU403 + 1237 00a4 0D4A ldr r2, .L77+16 + 1238 00a6 0A40 ands r2, r2, r1 + 1239 .LVL83: + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1240 .loc 1 546 5 is_stmt 1 view .LVU404 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1241 .loc 1 546 8 is_stmt 0 view .LVU405 + 1242 00a8 062A cmp r2, #6 + 1243 00aa 0AD0 beq .L67 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1244 .loc 1 546 9 discriminator 1 view .LVU406 + 1245 00ac B2F5803F cmp r2, #65536 + 1246 00b0 07D0 beq .L67 + ARM GAS /tmp/ccXMh04L.s page 74 + + + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1247 .loc 1 548 7 is_stmt 1 view .LVU407 + 1248 00b2 1A68 ldr r2, [r3] + 1249 .LVL84: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1250 .loc 1 548 7 is_stmt 0 view .LVU408 + 1251 00b4 42F00102 orr r2, r2, #1 + 1252 00b8 1A60 str r2, [r3] + 1253 00ba 02E0 b .L67 + 1254 .LVL85: + 1255 .L70: + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1256 .loc 1 502 12 view .LVU409 + 1257 00bc 2846 mov r0, r5 + 1258 .LVL86: + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1259 .loc 1 502 12 view .LVU410 + 1260 00be 00E0 b .L67 + 1261 .LVL87: + 1262 .L71: + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1263 .loc 1 519 12 view .LVU411 + 1264 00c0 0120 movs r0, #1 + 1265 .LVL88: + 1266 .L67: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1267 .loc 1 558 1 view .LVU412 + 1268 00c2 F8BD pop {r3, r4, r5, r6, r7, pc} + 1269 .LVL89: + 1270 .L72: + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1271 .loc 1 509 14 view .LVU413 + 1272 00c4 2846 mov r0, r5 + 1273 .LVL90: + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1274 .loc 1 509 14 view .LVU414 + 1275 00c6 FCE7 b .L67 + 1276 .LVL91: + 1277 .L74: + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1278 .loc 1 537 12 view .LVU415 + 1279 00c8 2846 mov r0, r5 + 1280 00ca FAE7 b .L67 + 1281 .L78: + 1282 .align 2 + 1283 .L77: + 1284 00cc 00000000 .word TIM_DMACaptureCplt + 1285 00d0 00000000 .word TIM_DMACaptureHalfCplt + 1286 00d4 00000000 .word TIM_DMAError + 1287 00d8 002C0140 .word 1073818624 + 1288 00dc 07000100 .word 65543 + 1289 .cfi_endproc + 1290 .LFE138: + 1292 .section .text.HAL_TIMEx_HallSensor_Stop_DMA,"ax",%progbits + 1293 .align 1 + 1294 .global HAL_TIMEx_HallSensor_Stop_DMA + 1295 .syntax unified + ARM GAS /tmp/ccXMh04L.s page 75 + + + 1296 .thumb + 1297 .thumb_func + 1299 HAL_TIMEx_HallSensor_Stop_DMA: + 1300 .LVL92: + 1301 .LFB139: + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 1302 .loc 1 566 1 is_stmt 1 view -0 + 1303 .cfi_startproc + 1304 @ args = 0, pretend = 0, frame = 0 + 1305 @ frame_needed = 0, uses_anonymous_args = 0 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 1306 .loc 1 566 1 is_stmt 0 view .LVU417 + 1307 0000 10B5 push {r4, lr} + 1308 .cfi_def_cfa_offset 8 + 1309 .cfi_offset 4, -8 + 1310 .cfi_offset 14, -4 + 1311 0002 0446 mov r4, r0 + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1312 .loc 1 568 3 is_stmt 1 view .LVU418 + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1313 .loc 1 573 3 view .LVU419 + 1314 0004 0022 movs r2, #0 + 1315 0006 1146 mov r1, r2 + 1316 0008 0068 ldr r0, [r0] + 1317 .LVL93: + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1318 .loc 1 573 3 is_stmt 0 view .LVU420 + 1319 000a FFF7FEFF bl TIM_CCxChannelCmd + 1320 .LVL94: + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1321 .loc 1 577 3 is_stmt 1 view .LVU421 + 1322 000e 2268 ldr r2, [r4] + 1323 0010 D368 ldr r3, [r2, #12] + 1324 0012 23F40073 bic r3, r3, #512 + 1325 0016 D360 str r3, [r2, #12] + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1326 .loc 1 579 3 view .LVU422 + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1327 .loc 1 579 9 is_stmt 0 view .LVU423 + 1328 0018 606A ldr r0, [r4, #36] + 1329 001a FFF7FEFF bl HAL_DMA_Abort_IT + 1330 .LVL95: + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1331 .loc 1 582 3 is_stmt 1 view .LVU424 + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1332 .loc 1 582 3 view .LVU425 + 1333 001e 2368 ldr r3, [r4] + 1334 0020 196A ldr r1, [r3, #32] + 1335 0022 41F21112 movw r2, #4369 + 1336 0026 1142 tst r1, r2 + 1337 0028 08D1 bne .L80 + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1338 .loc 1 582 3 discriminator 1 view .LVU426 + 1339 002a 196A ldr r1, [r3, #32] + 1340 002c 40F24442 movw r2, #1092 + 1341 0030 1142 tst r1, r2 + 1342 0032 03D1 bne .L80 + ARM GAS /tmp/ccXMh04L.s page 76 + + + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1343 .loc 1 582 3 discriminator 3 view .LVU427 + 1344 0034 1A68 ldr r2, [r3] + 1345 0036 22F00102 bic r2, r2, #1 + 1346 003a 1A60 str r2, [r3] + 1347 .L80: + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1348 .loc 1 582 3 discriminator 5 view .LVU428 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 1349 .loc 1 585 3 view .LVU429 + 1350 003c 0123 movs r3, #1 + 1351 003e 84F83E30 strb r3, [r4, #62] + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1352 .loc 1 586 3 view .LVU430 + 1353 0042 84F84430 strb r3, [r4, #68] + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1354 .loc 1 589 3 view .LVU431 + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1355 .loc 1 590 1 is_stmt 0 view .LVU432 + 1356 0046 0020 movs r0, #0 + 1357 0048 10BD pop {r4, pc} + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1358 .loc 1 590 1 view .LVU433 + 1359 .cfi_endproc + 1360 .LFE139: + 1362 .section .text.HAL_TIMEx_OCN_Start,"ax",%progbits + 1363 .align 1 + 1364 .global HAL_TIMEx_OCN_Start + 1365 .syntax unified + 1366 .thumb + 1367 .thumb_func + 1369 HAL_TIMEx_OCN_Start: + 1370 .LVL96: + 1371 .LFB140: + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1372 .loc 1 628 1 is_stmt 1 view -0 + 1373 .cfi_startproc + 1374 @ args = 0, pretend = 0, frame = 0 + 1375 @ frame_needed = 0, uses_anonymous_args = 0 + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1376 .loc 1 628 1 is_stmt 0 view .LVU435 + 1377 0000 10B5 push {r4, lr} + 1378 .cfi_def_cfa_offset 8 + 1379 .cfi_offset 4, -8 + 1380 .cfi_offset 14, -4 + 1381 0002 0446 mov r4, r0 + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1382 .loc 1 629 3 is_stmt 1 view .LVU436 + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1383 .loc 1 632 3 view .LVU437 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1384 .loc 1 635 3 view .LVU438 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1385 .loc 1 635 46 is_stmt 0 view .LVU439 + 1386 0004 0846 mov r0, r1 + 1387 .LVL97: + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 77 + + + 1388 .loc 1 635 46 view .LVU440 + 1389 0006 79BB cbnz r1, .L83 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1390 .loc 1 635 7 discriminator 1 view .LVU441 + 1391 0008 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 + 1392 000c DBB2 uxtb r3, r3 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1393 .loc 1 635 46 discriminator 1 view .LVU442 + 1394 000e 013B subs r3, r3, #1 + 1395 0010 18BF it ne + 1396 0012 0123 movne r3, #1 + 1397 .L84: + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1398 .loc 1 635 6 discriminator 12 view .LVU443 + 1399 0014 002B cmp r3, #0 + 1400 0016 5ED1 bne .L94 + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1401 .loc 1 641 3 is_stmt 1 view .LVU444 + 1402 0018 0028 cmp r0, #0 + 1403 001a 3ED1 bne .L88 + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1404 .loc 1 641 3 is_stmt 0 discriminator 1 view .LVU445 + 1405 001c 0223 movs r3, #2 + 1406 001e 84F84430 strb r3, [r4, #68] + 1407 .L89: + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1408 .loc 1 644 3 is_stmt 1 view .LVU446 + 1409 0022 0422 movs r2, #4 + 1410 0024 0146 mov r1, r0 + 1411 .LVL98: + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1412 .loc 1 644 3 is_stmt 0 view .LVU447 + 1413 0026 2068 ldr r0, [r4] + 1414 .LVL99: + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1415 .loc 1 644 3 view .LVU448 + 1416 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 1417 .LVL100: + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1418 .loc 1 647 3 is_stmt 1 view .LVU449 + 1419 002c 2268 ldr r2, [r4] + 1420 002e 536C ldr r3, [r2, #68] + 1421 0030 43F40043 orr r3, r3, #32768 + 1422 0034 5364 str r3, [r2, #68] + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1423 .loc 1 650 3 view .LVU450 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1424 .loc 1 650 7 is_stmt 0 view .LVU451 + 1425 0036 2368 ldr r3, [r4] + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1426 .loc 1 650 6 view .LVU452 + 1427 0038 2A4A ldr r2, .L102 + 1428 003a 9342 cmp r3, r2 + 1429 003c 3DD0 beq .L92 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1430 .loc 1 650 7 discriminator 1 view .LVU453 + 1431 003e B3F1804F cmp r3, #1073741824 + ARM GAS /tmp/ccXMh04L.s page 78 + + + 1432 0042 3AD0 beq .L92 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1433 .loc 1 650 7 discriminator 2 view .LVU454 + 1434 0044 A2F59432 sub r2, r2, #75776 + 1435 0048 9342 cmp r3, r2 + 1436 004a 36D0 beq .L92 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1437 .loc 1 650 7 discriminator 3 view .LVU455 + 1438 004c 02F58062 add r2, r2, #1024 + 1439 0050 9342 cmp r3, r2 + 1440 0052 32D0 beq .L92 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1441 .loc 1 650 7 discriminator 4 view .LVU456 + 1442 0054 02F59C32 add r2, r2, #79872 + 1443 0058 9342 cmp r3, r2 + 1444 005a 2ED0 beq .L92 + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1445 .loc 1 660 5 is_stmt 1 view .LVU457 + 1446 005c 1A68 ldr r2, [r3] + 1447 005e 42F00102 orr r2, r2, #1 + 1448 0062 1A60 str r2, [r3] + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1449 .loc 1 664 10 is_stmt 0 view .LVU458 + 1450 0064 0020 movs r0, #0 + 1451 0066 37E0 b .L87 + 1452 .LVL101: + 1453 .L83: + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1454 .loc 1 635 46 discriminator 2 view .LVU459 + 1455 0068 0429 cmp r1, #4 + 1456 006a 08D0 beq .L98 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1457 .loc 1 635 46 discriminator 5 view .LVU460 + 1458 006c 0829 cmp r1, #8 + 1459 006e 0DD0 beq .L99 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1460 .loc 1 635 7 discriminator 8 view .LVU461 + 1461 0070 94F84730 ldrb r3, [r4, #71] @ zero_extendqisi2 + 1462 0074 DBB2 uxtb r3, r3 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1463 .loc 1 635 46 discriminator 8 view .LVU462 + 1464 0076 013B subs r3, r3, #1 + 1465 0078 18BF it ne + 1466 007a 0123 movne r3, #1 + 1467 007c CAE7 b .L84 + 1468 .L98: + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1469 .loc 1 635 7 discriminator 4 view .LVU463 + 1470 007e 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 1471 0082 DBB2 uxtb r3, r3 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1472 .loc 1 635 46 discriminator 4 view .LVU464 + 1473 0084 013B subs r3, r3, #1 + 1474 0086 18BF it ne + 1475 0088 0123 movne r3, #1 + 1476 008a C3E7 b .L84 + 1477 .L99: + ARM GAS /tmp/ccXMh04L.s page 79 + + + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1478 .loc 1 635 7 discriminator 7 view .LVU465 + 1479 008c 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 + 1480 0090 DBB2 uxtb r3, r3 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1481 .loc 1 635 46 discriminator 7 view .LVU466 + 1482 0092 013B subs r3, r3, #1 + 1483 0094 18BF it ne + 1484 0096 0123 movne r3, #1 + 1485 0098 BCE7 b .L84 + 1486 .L88: + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1487 .loc 1 641 3 discriminator 2 view .LVU467 + 1488 009a 0428 cmp r0, #4 + 1489 009c 05D0 beq .L100 + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1490 .loc 1 641 3 discriminator 4 view .LVU468 + 1491 009e 0828 cmp r0, #8 + 1492 00a0 07D0 beq .L101 + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1493 .loc 1 641 3 discriminator 7 view .LVU469 + 1494 00a2 0223 movs r3, #2 + 1495 00a4 84F84730 strb r3, [r4, #71] + 1496 00a8 BBE7 b .L89 + 1497 .L100: + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1498 .loc 1 641 3 discriminator 3 view .LVU470 + 1499 00aa 0223 movs r3, #2 + 1500 00ac 84F84530 strb r3, [r4, #69] + 1501 00b0 B7E7 b .L89 + 1502 .L101: + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1503 .loc 1 641 3 discriminator 6 view .LVU471 + 1504 00b2 0223 movs r3, #2 + 1505 00b4 84F84630 strb r3, [r4, #70] + 1506 00b8 B3E7 b .L89 + 1507 .LVL102: + 1508 .L92: + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1509 .loc 1 652 5 is_stmt 1 view .LVU472 + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1510 .loc 1 652 29 is_stmt 0 view .LVU473 + 1511 00ba 9968 ldr r1, [r3, #8] + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1512 .loc 1 652 13 view .LVU474 + 1513 00bc 0A4A ldr r2, .L102+4 + 1514 00be 0A40 ands r2, r2, r1 + 1515 .LVL103: + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1516 .loc 1 653 5 is_stmt 1 view .LVU475 + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1517 .loc 1 653 8 is_stmt 0 view .LVU476 + 1518 00c0 062A cmp r2, #6 + 1519 00c2 0AD0 beq .L95 + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1520 .loc 1 653 9 discriminator 1 view .LVU477 + 1521 00c4 B2F5803F cmp r2, #65536 + ARM GAS /tmp/ccXMh04L.s page 80 + + + 1522 00c8 09D0 beq .L96 + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1523 .loc 1 655 7 is_stmt 1 view .LVU478 + 1524 00ca 1A68 ldr r2, [r3] + 1525 .LVL104: + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1526 .loc 1 655 7 is_stmt 0 view .LVU479 + 1527 00cc 42F00102 orr r2, r2, #1 + 1528 00d0 1A60 str r2, [r3] + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1529 .loc 1 664 10 view .LVU480 + 1530 00d2 0020 movs r0, #0 + 1531 00d4 00E0 b .L87 + 1532 .LVL105: + 1533 .L94: + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1534 .loc 1 637 12 view .LVU481 + 1535 00d6 0120 movs r0, #1 + 1536 .LVL106: + 1537 .L87: + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1538 .loc 1 665 1 view .LVU482 + 1539 00d8 10BD pop {r4, pc} + 1540 .LVL107: + 1541 .L95: + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1542 .loc 1 664 10 view .LVU483 + 1543 00da 0020 movs r0, #0 + 1544 00dc FCE7 b .L87 + 1545 .L96: + 1546 00de 0020 movs r0, #0 + 1547 00e0 FAE7 b .L87 + 1548 .L103: + 1549 00e2 00BF .align 2 + 1550 .L102: + 1551 00e4 002C0140 .word 1073818624 + 1552 00e8 07000100 .word 65543 + 1553 .cfi_endproc + 1554 .LFE140: + 1556 .section .text.HAL_TIMEx_OCN_Stop,"ax",%progbits + 1557 .align 1 + 1558 .global HAL_TIMEx_OCN_Stop + 1559 .syntax unified + 1560 .thumb + 1561 .thumb_func + 1563 HAL_TIMEx_OCN_Stop: + 1564 .LVL108: + 1565 .LFB141: + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 1566 .loc 1 679 1 is_stmt 1 view -0 + 1567 .cfi_startproc + 1568 @ args = 0, pretend = 0, frame = 0 + 1569 @ frame_needed = 0, uses_anonymous_args = 0 + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 1570 .loc 1 679 1 is_stmt 0 view .LVU485 + 1571 0000 38B5 push {r3, r4, r5, lr} + 1572 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccXMh04L.s page 81 + + + 1573 .cfi_offset 3, -16 + 1574 .cfi_offset 4, -12 + 1575 .cfi_offset 5, -8 + 1576 .cfi_offset 14, -4 + 1577 0002 0446 mov r4, r0 + 1578 0004 0D46 mov r5, r1 + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1579 .loc 1 681 3 is_stmt 1 view .LVU486 + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1580 .loc 1 684 3 view .LVU487 + 1581 0006 0022 movs r2, #0 + 1582 0008 0068 ldr r0, [r0] + 1583 .LVL109: + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1584 .loc 1 684 3 is_stmt 0 view .LVU488 + 1585 000a FFF7FEFF bl TIM_CCxNChannelCmd + 1586 .LVL110: + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1587 .loc 1 687 3 is_stmt 1 view .LVU489 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1588 .loc 1 687 3 view .LVU490 + 1589 000e 2368 ldr r3, [r4] + 1590 0010 196A ldr r1, [r3, #32] + 1591 0012 41F21112 movw r2, #4369 + 1592 0016 1142 tst r1, r2 + 1593 0018 08D1 bne .L105 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1594 .loc 1 687 3 discriminator 1 view .LVU491 + 1595 001a 196A ldr r1, [r3, #32] + 1596 001c 40F24442 movw r2, #1092 + 1597 0020 1142 tst r1, r2 + 1598 0022 03D1 bne .L105 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1599 .loc 1 687 3 discriminator 3 view .LVU492 + 1600 0024 5A6C ldr r2, [r3, #68] + 1601 0026 22F40042 bic r2, r2, #32768 + 1602 002a 5A64 str r2, [r3, #68] + 1603 .L105: + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1604 .loc 1 687 3 discriminator 5 view .LVU493 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1605 .loc 1 690 3 view .LVU494 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1606 .loc 1 690 3 view .LVU495 + 1607 002c 2368 ldr r3, [r4] + 1608 002e 196A ldr r1, [r3, #32] + 1609 0030 41F21112 movw r2, #4369 + 1610 0034 1142 tst r1, r2 + 1611 0036 08D1 bne .L106 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1612 .loc 1 690 3 discriminator 1 view .LVU496 + 1613 0038 196A ldr r1, [r3, #32] + 1614 003a 40F24442 movw r2, #1092 + 1615 003e 1142 tst r1, r2 + 1616 0040 03D1 bne .L106 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1617 .loc 1 690 3 discriminator 3 view .LVU497 + ARM GAS /tmp/ccXMh04L.s page 82 + + + 1618 0042 1A68 ldr r2, [r3] + 1619 0044 22F00102 bic r2, r2, #1 + 1620 0048 1A60 str r2, [r3] + 1621 .L106: + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1622 .loc 1 690 3 discriminator 5 view .LVU498 + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1623 .loc 1 693 3 view .LVU499 + 1624 004a 25B9 cbnz r5, .L107 + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1625 .loc 1 693 3 is_stmt 0 discriminator 1 view .LVU500 + 1626 004c 0123 movs r3, #1 + 1627 004e 84F84430 strb r3, [r4, #68] + 1628 .L108: + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1629 .loc 1 696 3 is_stmt 1 view .LVU501 + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1630 .loc 1 697 1 is_stmt 0 view .LVU502 + 1631 0052 0020 movs r0, #0 + 1632 0054 38BD pop {r3, r4, r5, pc} + 1633 .LVL111: + 1634 .L107: + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1635 .loc 1 693 3 discriminator 2 view .LVU503 + 1636 0056 042D cmp r5, #4 + 1637 0058 05D0 beq .L112 + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1638 .loc 1 693 3 discriminator 4 view .LVU504 + 1639 005a 082D cmp r5, #8 + 1640 005c 07D0 beq .L113 + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1641 .loc 1 693 3 discriminator 7 view .LVU505 + 1642 005e 0123 movs r3, #1 + 1643 0060 84F84730 strb r3, [r4, #71] + 1644 0064 F5E7 b .L108 + 1645 .L112: + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1646 .loc 1 693 3 discriminator 3 view .LVU506 + 1647 0066 0123 movs r3, #1 + 1648 0068 84F84530 strb r3, [r4, #69] + 1649 006c F1E7 b .L108 + 1650 .L113: + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1651 .loc 1 693 3 discriminator 6 view .LVU507 + 1652 006e 0123 movs r3, #1 + 1653 0070 84F84630 strb r3, [r4, #70] + 1654 0074 EDE7 b .L108 + 1655 .cfi_endproc + 1656 .LFE141: + 1658 .section .text.HAL_TIMEx_OCN_Start_IT,"ax",%progbits + 1659 .align 1 + 1660 .global HAL_TIMEx_OCN_Start_IT + 1661 .syntax unified + 1662 .thumb + 1663 .thumb_func + 1665 HAL_TIMEx_OCN_Start_IT: + 1666 .LVL112: + ARM GAS /tmp/ccXMh04L.s page 83 + + + 1667 .LFB142: + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1668 .loc 1 711 1 is_stmt 1 view -0 + 1669 .cfi_startproc + 1670 @ args = 0, pretend = 0, frame = 0 + 1671 @ frame_needed = 0, uses_anonymous_args = 0 + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1672 .loc 1 711 1 is_stmt 0 view .LVU509 + 1673 0000 10B5 push {r4, lr} + 1674 .cfi_def_cfa_offset 8 + 1675 .cfi_offset 4, -8 + 1676 .cfi_offset 14, -4 + 1677 0002 0446 mov r4, r0 + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1678 .loc 1 712 3 is_stmt 1 view .LVU510 + 1679 .LVL113: + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1680 .loc 1 713 3 view .LVU511 + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1681 .loc 1 716 3 view .LVU512 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1682 .loc 1 719 3 view .LVU513 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1683 .loc 1 719 46 is_stmt 0 view .LVU514 + 1684 0004 0846 mov r0, r1 + 1685 .LVL114: + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1686 .loc 1 719 46 view .LVU515 + 1687 0006 0029 cmp r1, #0 + 1688 0008 39D1 bne .L115 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1689 .loc 1 719 7 discriminator 1 view .LVU516 + 1690 000a 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 + 1691 000e DBB2 uxtb r3, r3 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1692 .loc 1 719 46 discriminator 1 view .LVU517 + 1693 0010 013B subs r3, r3, #1 + 1694 0012 18BF it ne + 1695 0014 0123 movne r3, #1 + 1696 .L116: + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1697 .loc 1 719 6 discriminator 12 view .LVU518 + 1698 0016 002B cmp r3, #0 + 1699 0018 79D1 bne .L129 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1700 .loc 1 725 3 is_stmt 1 view .LVU519 + 1701 001a 0028 cmp r0, #0 + 1702 001c 48D1 bne .L120 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1703 .loc 1 725 3 is_stmt 0 discriminator 1 view .LVU520 + 1704 001e 0223 movs r3, #2 + 1705 0020 84F84430 strb r3, [r4, #68] + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1706 .loc 1 727 3 is_stmt 1 view .LVU521 + 1707 .L121: + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 1708 .loc 1 732 7 view .LVU522 + ARM GAS /tmp/ccXMh04L.s page 84 + + + 1709 0024 2268 ldr r2, [r4] + 1710 0026 D368 ldr r3, [r2, #12] + 1711 0028 43F00203 orr r3, r3, #2 + 1712 002c D360 str r3, [r2, #12] + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1713 .loc 1 733 7 view .LVU523 + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1714 .loc 1 756 3 view .LVU524 + 1715 .L126: + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1716 .loc 1 759 5 view .LVU525 + 1717 002e 2268 ldr r2, [r4] + 1718 0030 D368 ldr r3, [r2, #12] + 1719 0032 43F08003 orr r3, r3, #128 + 1720 0036 D360 str r3, [r2, #12] + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1721 .loc 1 762 5 view .LVU526 + 1722 0038 0422 movs r2, #4 + 1723 003a 0146 mov r1, r0 + 1724 .LVL115: + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1725 .loc 1 762 5 is_stmt 0 view .LVU527 + 1726 003c 2068 ldr r0, [r4] + 1727 .LVL116: + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1728 .loc 1 762 5 view .LVU528 + 1729 003e FFF7FEFF bl TIM_CCxNChannelCmd + 1730 .LVL117: + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1731 .loc 1 765 5 is_stmt 1 view .LVU529 + 1732 0042 2268 ldr r2, [r4] + 1733 0044 536C ldr r3, [r2, #68] + 1734 0046 43F40043 orr r3, r3, #32768 + 1735 004a 5364 str r3, [r2, #68] + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1736 .loc 1 768 5 view .LVU530 + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1737 .loc 1 768 9 is_stmt 0 view .LVU531 + 1738 004c 2368 ldr r3, [r4] + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1739 .loc 1 768 8 view .LVU532 + 1740 004e 334A ldr r2, .L138 + 1741 0050 9342 cmp r3, r2 + 1742 0052 4ED0 beq .L127 + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1743 .loc 1 768 9 discriminator 1 view .LVU533 + 1744 0054 B3F1804F cmp r3, #1073741824 + 1745 0058 4BD0 beq .L127 + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1746 .loc 1 768 9 discriminator 2 view .LVU534 + 1747 005a A2F59432 sub r2, r2, #75776 + 1748 005e 9342 cmp r3, r2 + 1749 0060 47D0 beq .L127 + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1750 .loc 1 768 9 discriminator 3 view .LVU535 + 1751 0062 02F58062 add r2, r2, #1024 + 1752 0066 9342 cmp r3, r2 + ARM GAS /tmp/ccXMh04L.s page 85 + + + 1753 0068 43D0 beq .L127 + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1754 .loc 1 768 9 discriminator 4 view .LVU536 + 1755 006a 02F59C32 add r2, r2, #79872 + 1756 006e 9342 cmp r3, r2 + 1757 0070 3FD0 beq .L127 + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1758 .loc 1 778 7 is_stmt 1 view .LVU537 + 1759 0072 1A68 ldr r2, [r3] + 1760 0074 42F00102 orr r2, r2, #1 + 1761 0078 1A60 str r2, [r3] + 1762 007a 0020 movs r0, #0 + 1763 007c 48E0 b .L119 + 1764 .LVL118: + 1765 .L115: + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1766 .loc 1 719 46 is_stmt 0 discriminator 2 view .LVU538 + 1767 007e 0429 cmp r1, #4 + 1768 0080 08D0 beq .L134 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1769 .loc 1 719 46 discriminator 5 view .LVU539 + 1770 0082 0829 cmp r1, #8 + 1771 0084 0DD0 beq .L135 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1772 .loc 1 719 7 discriminator 8 view .LVU540 + 1773 0086 94F84730 ldrb r3, [r4, #71] @ zero_extendqisi2 + 1774 008a DBB2 uxtb r3, r3 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1775 .loc 1 719 46 discriminator 8 view .LVU541 + 1776 008c 013B subs r3, r3, #1 + 1777 008e 18BF it ne + 1778 0090 0123 movne r3, #1 + 1779 0092 C0E7 b .L116 + 1780 .L134: + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1781 .loc 1 719 7 discriminator 4 view .LVU542 + 1782 0094 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 1783 0098 DBB2 uxtb r3, r3 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1784 .loc 1 719 46 discriminator 4 view .LVU543 + 1785 009a 013B subs r3, r3, #1 + 1786 009c 18BF it ne + 1787 009e 0123 movne r3, #1 + 1788 00a0 B9E7 b .L116 + 1789 .L135: + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1790 .loc 1 719 7 discriminator 7 view .LVU544 + 1791 00a2 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 + 1792 00a6 DBB2 uxtb r3, r3 + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1793 .loc 1 719 46 discriminator 7 view .LVU545 + 1794 00a8 013B subs r3, r3, #1 + 1795 00aa 18BF it ne + 1796 00ac 0123 movne r3, #1 + 1797 00ae B2E7 b .L116 + 1798 .L120: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 86 + + + 1799 .loc 1 725 3 discriminator 2 view .LVU546 + 1800 00b0 0428 cmp r0, #4 + 1801 00b2 0CD0 beq .L136 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1802 .loc 1 725 3 discriminator 4 view .LVU547 + 1803 00b4 0828 cmp r0, #8 + 1804 00b6 13D0 beq .L137 + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1805 .loc 1 725 3 discriminator 7 view .LVU548 + 1806 00b8 0223 movs r3, #2 + 1807 00ba 84F84730 strb r3, [r4, #71] + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1808 .loc 1 727 3 is_stmt 1 view .LVU549 + 1809 00be 0428 cmp r0, #4 + 1810 00c0 08D0 beq .L123 + 1811 00c2 0828 cmp r0, #8 + 1812 00c4 0FD0 beq .L125 + 1813 00c6 0028 cmp r0, #0 + 1814 00c8 ACD0 beq .L121 + 1815 00ca 0120 movs r0, #1 + 1816 .LVL119: + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1817 .loc 1 727 3 is_stmt 0 view .LVU550 + 1818 00cc 20E0 b .L119 + 1819 .LVL120: + 1820 .L136: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1821 .loc 1 725 3 discriminator 3 view .LVU551 + 1822 00ce 0223 movs r3, #2 + 1823 00d0 84F84530 strb r3, [r4, #69] + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1824 .loc 1 727 3 is_stmt 1 view .LVU552 + 1825 .L123: + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 1826 .loc 1 739 7 view .LVU553 + 1827 00d4 2268 ldr r2, [r4] + 1828 00d6 D368 ldr r3, [r2, #12] + 1829 00d8 43F00403 orr r3, r3, #4 + 1830 00dc D360 str r3, [r2, #12] + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1831 .loc 1 740 7 view .LVU554 + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1832 .loc 1 756 3 view .LVU555 + 1833 00de A6E7 b .L126 + 1834 .L137: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1835 .loc 1 725 3 is_stmt 0 discriminator 6 view .LVU556 + 1836 00e0 0223 movs r3, #2 + 1837 00e2 84F84630 strb r3, [r4, #70] + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1838 .loc 1 727 3 is_stmt 1 view .LVU557 + 1839 .L125: + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 1840 .loc 1 746 7 view .LVU558 + 1841 00e6 2268 ldr r2, [r4] + 1842 00e8 D368 ldr r3, [r2, #12] + 1843 00ea 43F00803 orr r3, r3, #8 + ARM GAS /tmp/ccXMh04L.s page 87 + + + 1844 00ee D360 str r3, [r2, #12] + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1845 .loc 1 747 7 view .LVU559 + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1846 .loc 1 756 3 view .LVU560 + 1847 00f0 9DE7 b .L126 + 1848 .LVL121: + 1849 .L127: + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1850 .loc 1 770 7 view .LVU561 + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1851 .loc 1 770 31 is_stmt 0 view .LVU562 + 1852 00f2 9968 ldr r1, [r3, #8] + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1853 .loc 1 770 15 view .LVU563 + 1854 00f4 0A4A ldr r2, .L138+4 + 1855 00f6 0A40 ands r2, r2, r1 + 1856 .LVL122: + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1857 .loc 1 771 7 is_stmt 1 view .LVU564 + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1858 .loc 1 771 10 is_stmt 0 view .LVU565 + 1859 00f8 062A cmp r2, #6 + 1860 00fa 0AD0 beq .L131 + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1861 .loc 1 771 11 discriminator 1 view .LVU566 + 1862 00fc B2F5803F cmp r2, #65536 + 1863 0100 09D0 beq .L132 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1864 .loc 1 773 9 is_stmt 1 view .LVU567 + 1865 0102 1A68 ldr r2, [r3] + 1866 .LVL123: + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1867 .loc 1 773 9 is_stmt 0 view .LVU568 + 1868 0104 42F00102 orr r2, r2, #1 + 1869 0108 1A60 str r2, [r3] + 1870 010a 0020 movs r0, #0 + 1871 010c 00E0 b .L119 + 1872 .LVL124: + 1873 .L129: + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1874 .loc 1 721 12 view .LVU569 + 1875 010e 0120 movs r0, #1 + 1876 .LVL125: + 1877 .L119: + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1878 .loc 1 784 1 view .LVU570 + 1879 0110 10BD pop {r4, pc} + 1880 .LVL126: + 1881 .L131: + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1882 .loc 1 784 1 view .LVU571 + 1883 0112 0020 movs r0, #0 + 1884 0114 FCE7 b .L119 + 1885 .L132: + 1886 0116 0020 movs r0, #0 + 1887 0118 FAE7 b .L119 + ARM GAS /tmp/ccXMh04L.s page 88 + + + 1888 .L139: + 1889 011a 00BF .align 2 + 1890 .L138: + 1891 011c 002C0140 .word 1073818624 + 1892 0120 07000100 .word 65543 + 1893 .cfi_endproc + 1894 .LFE142: + 1896 .section .text.HAL_TIMEx_OCN_Stop_IT,"ax",%progbits + 1897 .align 1 + 1898 .global HAL_TIMEx_OCN_Stop_IT + 1899 .syntax unified + 1900 .thumb + 1901 .thumb_func + 1903 HAL_TIMEx_OCN_Stop_IT: + 1904 .LVL127: + 1905 .LFB143: + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1906 .loc 1 798 1 is_stmt 1 view -0 + 1907 .cfi_startproc + 1908 @ args = 0, pretend = 0, frame = 0 + 1909 @ frame_needed = 0, uses_anonymous_args = 0 + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1910 .loc 1 798 1 is_stmt 0 view .LVU573 + 1911 0000 38B5 push {r3, r4, r5, lr} + 1912 .cfi_def_cfa_offset 16 + 1913 .cfi_offset 3, -16 + 1914 .cfi_offset 4, -12 + 1915 .cfi_offset 5, -8 + 1916 .cfi_offset 14, -4 + 1917 0002 0446 mov r4, r0 + 1918 0004 0D46 mov r5, r1 + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpccer; + 1919 .loc 1 799 3 is_stmt 1 view .LVU574 + 1920 .LVL128: + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1921 .loc 1 800 3 view .LVU575 + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1922 .loc 1 803 3 view .LVU576 + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1923 .loc 1 805 3 view .LVU577 + 1924 0006 0429 cmp r1, #4 + 1925 0008 3BD0 beq .L141 + 1926 000a 0829 cmp r1, #8 + 1927 000c 3FD0 beq .L142 + 1928 000e 0029 cmp r1, #0 + 1929 0010 56D1 bne .L151 + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 1930 .loc 1 810 7 view .LVU578 + 1931 0012 0268 ldr r2, [r0] + 1932 0014 D368 ldr r3, [r2, #12] + 1933 0016 23F00203 bic r3, r3, #2 + 1934 001a D360 str r3, [r2, #12] + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1935 .loc 1 811 7 view .LVU579 + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1936 .loc 1 833 3 view .LVU580 + 1937 .L144: + ARM GAS /tmp/ccXMh04L.s page 89 + + + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1938 .loc 1 836 5 view .LVU581 + 1939 001c 0022 movs r2, #0 + 1940 001e 2946 mov r1, r5 + 1941 .LVL129: + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1942 .loc 1 836 5 is_stmt 0 view .LVU582 + 1943 0020 2068 ldr r0, [r4] + 1944 .LVL130: + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1945 .loc 1 836 5 view .LVU583 + 1946 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 1947 .LVL131: + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 1948 .loc 1 839 5 is_stmt 1 view .LVU584 + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 1949 .loc 1 839 19 is_stmt 0 view .LVU585 + 1950 0026 2368 ldr r3, [r4] + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 1951 .loc 1 839 13 view .LVU586 + 1952 0028 196A ldr r1, [r3, #32] + 1953 .LVL132: + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1954 .loc 1 840 5 is_stmt 1 view .LVU587 + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 1955 .loc 1 840 8 is_stmt 0 view .LVU588 + 1956 002a 40F24442 movw r2, #1092 + 1957 002e 1142 tst r1, r2 + 1958 0030 03D1 bne .L145 + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 1959 .loc 1 842 7 is_stmt 1 view .LVU589 + 1960 0032 DA68 ldr r2, [r3, #12] + 1961 0034 22F08002 bic r2, r2, #128 + 1962 0038 DA60 str r2, [r3, #12] + 1963 .L145: + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1964 .loc 1 846 5 view .LVU590 + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1965 .loc 1 846 5 view .LVU591 + 1966 003a 2368 ldr r3, [r4] + 1967 003c 196A ldr r1, [r3, #32] + 1968 .LVL133: + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1969 .loc 1 846 5 is_stmt 0 view .LVU592 + 1970 003e 41F21112 movw r2, #4369 + 1971 0042 1142 tst r1, r2 + 1972 0044 08D1 bne .L146 + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1973 .loc 1 846 5 is_stmt 1 discriminator 1 view .LVU593 + 1974 0046 196A ldr r1, [r3, #32] + 1975 0048 40F24442 movw r2, #1092 + 1976 004c 1142 tst r1, r2 + 1977 004e 03D1 bne .L146 + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1978 .loc 1 846 5 discriminator 3 view .LVU594 + 1979 0050 5A6C ldr r2, [r3, #68] + 1980 0052 22F40042 bic r2, r2, #32768 + ARM GAS /tmp/ccXMh04L.s page 90 + + + 1981 0056 5A64 str r2, [r3, #68] + 1982 .L146: + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1983 .loc 1 846 5 discriminator 5 view .LVU595 + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1984 .loc 1 849 5 view .LVU596 + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1985 .loc 1 849 5 view .LVU597 + 1986 0058 2368 ldr r3, [r4] + 1987 005a 196A ldr r1, [r3, #32] + 1988 005c 41F21112 movw r2, #4369 + 1989 0060 1142 tst r1, r2 + 1990 0062 08D1 bne .L147 + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1991 .loc 1 849 5 discriminator 1 view .LVU598 + 1992 0064 196A ldr r1, [r3, #32] + 1993 0066 40F24442 movw r2, #1092 + 1994 006a 1142 tst r1, r2 + 1995 006c 03D1 bne .L147 + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 1996 .loc 1 849 5 discriminator 3 view .LVU599 + 1997 006e 1A68 ldr r2, [r3] + 1998 0070 22F00102 bic r2, r2, #1 + 1999 0074 1A60 str r2, [r3] + 2000 .L147: + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2001 .loc 1 849 5 discriminator 5 view .LVU600 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2002 .loc 1 852 5 view .LVU601 + 2003 0076 85B9 cbnz r5, .L148 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2004 .loc 1 852 5 is_stmt 0 discriminator 1 view .LVU602 + 2005 0078 0123 movs r3, #1 + 2006 007a 84F84430 strb r3, [r4, #68] + 2007 007e 0020 movs r0, #0 + 2008 .LVL134: + 2009 .L143: + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2010 .loc 1 856 3 is_stmt 1 view .LVU603 + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2011 .loc 1 857 1 is_stmt 0 view .LVU604 + 2012 0080 38BD pop {r3, r4, r5, pc} + 2013 .LVL135: + 2014 .L141: + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2015 .loc 1 817 7 is_stmt 1 view .LVU605 + 2016 0082 0268 ldr r2, [r0] + 2017 0084 D368 ldr r3, [r2, #12] + 2018 0086 23F00403 bic r3, r3, #4 + 2019 008a D360 str r3, [r2, #12] + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2020 .loc 1 818 7 view .LVU606 + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2021 .loc 1 833 3 view .LVU607 + 2022 008c C6E7 b .L144 + 2023 .L142: + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + ARM GAS /tmp/ccXMh04L.s page 91 + + + 2024 .loc 1 824 7 view .LVU608 + 2025 008e 0268 ldr r2, [r0] + 2026 0090 D368 ldr r3, [r2, #12] + 2027 0092 23F00803 bic r3, r3, #8 + 2028 0096 D360 str r3, [r2, #12] + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2029 .loc 1 825 7 view .LVU609 + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2030 .loc 1 833 3 view .LVU610 + 2031 0098 C0E7 b .L144 + 2032 .LVL136: + 2033 .L148: + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2034 .loc 1 852 5 is_stmt 0 discriminator 2 view .LVU611 + 2035 009a 042D cmp r5, #4 + 2036 009c 06D0 beq .L153 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2037 .loc 1 852 5 discriminator 4 view .LVU612 + 2038 009e 082D cmp r5, #8 + 2039 00a0 09D0 beq .L154 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2040 .loc 1 852 5 discriminator 7 view .LVU613 + 2041 00a2 0123 movs r3, #1 + 2042 00a4 84F84730 strb r3, [r4, #71] + 2043 00a8 0020 movs r0, #0 + 2044 00aa E9E7 b .L143 + 2045 .L153: + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2046 .loc 1 852 5 discriminator 3 view .LVU614 + 2047 00ac 0123 movs r3, #1 + 2048 00ae 84F84530 strb r3, [r4, #69] + 2049 00b2 0020 movs r0, #0 + 2050 00b4 E4E7 b .L143 + 2051 .L154: + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2052 .loc 1 852 5 discriminator 6 view .LVU615 + 2053 00b6 0123 movs r3, #1 + 2054 00b8 84F84630 strb r3, [r4, #70] + 2055 00bc 0020 movs r0, #0 + 2056 00be DFE7 b .L143 + 2057 .LVL137: + 2058 .L151: + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2059 .loc 1 805 3 view .LVU616 + 2060 00c0 0120 movs r0, #1 + 2061 .LVL138: + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2062 .loc 1 805 3 view .LVU617 + 2063 00c2 DDE7 b .L143 + 2064 .cfi_endproc + 2065 .LFE143: + 2067 .section .text.HAL_TIMEx_OCN_Start_DMA,"ax",%progbits + 2068 .align 1 + 2069 .global HAL_TIMEx_OCN_Start_DMA + 2070 .syntax unified + 2071 .thumb + 2072 .thumb_func + ARM GAS /tmp/ccXMh04L.s page 92 + + + 2074 HAL_TIMEx_OCN_Start_DMA: + 2075 .LVL139: + 2076 .LFB144: + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2077 .loc 1 874 1 is_stmt 1 view -0 + 2078 .cfi_startproc + 2079 @ args = 0, pretend = 0, frame = 0 + 2080 @ frame_needed = 0, uses_anonymous_args = 0 + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2081 .loc 1 874 1 is_stmt 0 view .LVU619 + 2082 0000 70B5 push {r4, r5, r6, lr} + 2083 .cfi_def_cfa_offset 16 + 2084 .cfi_offset 4, -16 + 2085 .cfi_offset 5, -12 + 2086 .cfi_offset 6, -8 + 2087 .cfi_offset 14, -4 + 2088 0002 0446 mov r4, r0 + 2089 0004 1646 mov r6, r2 + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2090 .loc 1 875 3 is_stmt 1 view .LVU620 + 2091 .LVL140: + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2092 .loc 1 876 3 view .LVU621 + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2093 .loc 1 879 3 view .LVU622 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2094 .loc 1 882 3 view .LVU623 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2095 .loc 1 882 46 is_stmt 0 view .LVU624 + 2096 0006 0D46 mov r5, r1 + 2097 0008 0029 cmp r1, #0 + 2098 000a 5FD1 bne .L156 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2099 .loc 1 882 7 discriminator 1 view .LVU625 + 2100 000c 90F84400 ldrb r0, [r0, #68] @ zero_extendqisi2 + 2101 .LVL141: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2102 .loc 1 882 7 discriminator 1 view .LVU626 + 2103 0010 C0B2 uxtb r0, r0 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2104 .loc 1 882 46 discriminator 1 view .LVU627 + 2105 0012 0228 cmp r0, #2 + 2106 0014 14BF ite ne + 2107 0016 0020 movne r0, #0 + 2108 0018 0120 moveq r0, #1 + 2109 .L157: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2110 .loc 1 882 6 discriminator 12 view .LVU628 + 2111 001a 0028 cmp r0, #0 + 2112 001c 40F0DF80 bne .L174 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2113 .loc 1 886 8 is_stmt 1 view .LVU629 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2114 .loc 1 886 51 is_stmt 0 view .LVU630 + 2115 0020 002D cmp r5, #0 + 2116 0022 6FD1 bne .L161 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 93 + + + 2117 .loc 1 886 12 discriminator 1 view .LVU631 + 2118 0024 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 2119 .LVL142: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2120 .loc 1 886 12 discriminator 1 view .LVU632 + 2121 0028 D2B2 uxtb r2, r2 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2122 .loc 1 886 51 discriminator 1 view .LVU633 + 2123 002a 012A cmp r2, #1 + 2124 002c 14BF ite ne + 2125 002e 0022 movne r2, #0 + 2126 0030 0122 moveq r2, #1 + 2127 .L162: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2128 .loc 1 886 11 discriminator 12 view .LVU634 + 2129 0032 002A cmp r2, #0 + 2130 0034 00F0D580 beq .L175 + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2131 .loc 1 888 5 is_stmt 1 view .LVU635 + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2132 .loc 1 888 8 is_stmt 0 view .LVU636 + 2133 0038 002E cmp r6, #0 + 2134 003a 00F0D480 beq .L176 + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2135 .loc 1 888 25 discriminator 1 view .LVU637 + 2136 003e 002B cmp r3, #0 + 2137 0040 00F0D380 beq .L177 + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2138 .loc 1 894 7 is_stmt 1 view .LVU638 + 2139 0044 002D cmp r5, #0 + 2140 0046 79D1 bne .L165 + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2141 .loc 1 894 7 is_stmt 0 discriminator 1 view .LVU639 + 2142 0048 0222 movs r2, #2 + 2143 004a 84F84420 strb r2, [r4, #68] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2144 .loc 1 902 3 is_stmt 1 view .LVU640 + 2145 .L166: + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2146 .loc 1 907 7 view .LVU641 + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2147 .loc 1 907 17 is_stmt 0 view .LVU642 + 2148 004e 626A ldr r2, [r4, #36] + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2149 .loc 1 907 52 view .LVU643 + 2150 0050 6C49 ldr r1, .L191 + 2151 .LVL143: + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2152 .loc 1 907 52 view .LVU644 + 2153 0052 9162 str r1, [r2, #40] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2154 .loc 1 908 7 is_stmt 1 view .LVU645 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2155 .loc 1 908 17 is_stmt 0 view .LVU646 + 2156 0054 626A ldr r2, [r4, #36] + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2157 .loc 1 908 56 view .LVU647 + ARM GAS /tmp/ccXMh04L.s page 94 + + + 2158 0056 6C49 ldr r1, .L191+4 + 2159 0058 D162 str r1, [r2, #44] + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2160 .loc 1 911 7 is_stmt 1 view .LVU648 + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2161 .loc 1 911 17 is_stmt 0 view .LVU649 + 2162 005a 626A ldr r2, [r4, #36] + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2163 .loc 1 911 53 view .LVU650 + 2164 005c 6B49 ldr r1, .L191+8 + 2165 005e 1163 str r1, [r2, #48] + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2166 .loc 1 914 7 is_stmt 1 view .LVU651 + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2167 .loc 1 914 88 is_stmt 0 view .LVU652 + 2168 0060 2268 ldr r2, [r4] + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2169 .loc 1 914 11 view .LVU653 + 2170 0062 3432 adds r2, r2, #52 + 2171 0064 3146 mov r1, r6 + 2172 0066 606A ldr r0, [r4, #36] + 2173 0068 FFF7FEFF bl HAL_DMA_Start_IT + 2174 .LVL144: + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2175 .loc 1 914 10 discriminator 1 view .LVU654 + 2176 006c 0028 cmp r0, #0 + 2177 006e 40F0BE80 bne .L179 + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2178 .loc 1 921 7 is_stmt 1 view .LVU655 + 2179 0072 2268 ldr r2, [r4] + 2180 0074 D368 ldr r3, [r2, #12] + 2181 0076 43F40073 orr r3, r3, #512 + 2182 007a D360 str r3, [r2, #12] + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2183 .loc 1 922 7 view .LVU656 + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2184 .loc 1 972 3 view .LVU657 + 2185 .L171: + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2186 .loc 1 975 5 view .LVU658 + 2187 007c 0422 movs r2, #4 + 2188 007e 2946 mov r1, r5 + 2189 0080 2068 ldr r0, [r4] + 2190 0082 FFF7FEFF bl TIM_CCxNChannelCmd + 2191 .LVL145: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2192 .loc 1 978 5 view .LVU659 + 2193 0086 2268 ldr r2, [r4] + 2194 0088 536C ldr r3, [r2, #68] + 2195 008a 43F40043 orr r3, r3, #32768 + 2196 008e 5364 str r3, [r2, #68] + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2197 .loc 1 981 5 view .LVU660 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2198 .loc 1 981 9 is_stmt 0 view .LVU661 + 2199 0090 2368 ldr r3, [r4] + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 95 + + + 2200 .loc 1 981 8 view .LVU662 + 2201 0092 5F4A ldr r2, .L191+12 + 2202 0094 9342 cmp r3, r2 + 2203 0096 00F09480 beq .L172 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2204 .loc 1 981 9 discriminator 1 view .LVU663 + 2205 009a B3F1804F cmp r3, #1073741824 + 2206 009e 00F09080 beq .L172 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2207 .loc 1 981 9 discriminator 2 view .LVU664 + 2208 00a2 A2F59432 sub r2, r2, #75776 + 2209 00a6 9342 cmp r3, r2 + 2210 00a8 00F08B80 beq .L172 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2211 .loc 1 981 9 discriminator 3 view .LVU665 + 2212 00ac 02F58062 add r2, r2, #1024 + 2213 00b0 9342 cmp r3, r2 + 2214 00b2 00F08680 beq .L172 + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2215 .loc 1 981 9 discriminator 4 view .LVU666 + 2216 00b6 02F59C32 add r2, r2, #79872 + 2217 00ba 9342 cmp r3, r2 + 2218 00bc 00F08180 beq .L172 + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2219 .loc 1 991 7 is_stmt 1 view .LVU667 + 2220 00c0 1A68 ldr r2, [r3] + 2221 00c2 42F00102 orr r2, r2, #1 + 2222 00c6 1A60 str r2, [r3] + 2223 00c8 0020 movs r0, #0 + 2224 00ca 8BE0 b .L160 + 2225 .LVL146: + 2226 .L156: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2227 .loc 1 882 46 is_stmt 0 discriminator 2 view .LVU668 + 2228 00cc 0429 cmp r1, #4 + 2229 00ce 09D0 beq .L185 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2230 .loc 1 882 46 discriminator 5 view .LVU669 + 2231 00d0 0829 cmp r1, #8 + 2232 00d2 0FD0 beq .L186 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2233 .loc 1 882 7 discriminator 8 view .LVU670 + 2234 00d4 90F84700 ldrb r0, [r0, #71] @ zero_extendqisi2 + 2235 .LVL147: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2236 .loc 1 882 7 discriminator 8 view .LVU671 + 2237 00d8 C0B2 uxtb r0, r0 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2238 .loc 1 882 46 discriminator 8 view .LVU672 + 2239 00da 0228 cmp r0, #2 + 2240 00dc 14BF ite ne + 2241 00de 0020 movne r0, #0 + 2242 00e0 0120 moveq r0, #1 + 2243 00e2 9AE7 b .L157 + 2244 .LVL148: + 2245 .L185: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 96 + + + 2246 .loc 1 882 7 discriminator 4 view .LVU673 + 2247 00e4 90F84500 ldrb r0, [r0, #69] @ zero_extendqisi2 + 2248 .LVL149: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2249 .loc 1 882 7 discriminator 4 view .LVU674 + 2250 00e8 C0B2 uxtb r0, r0 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2251 .loc 1 882 46 discriminator 4 view .LVU675 + 2252 00ea 0228 cmp r0, #2 + 2253 00ec 14BF ite ne + 2254 00ee 0020 movne r0, #0 + 2255 00f0 0120 moveq r0, #1 + 2256 00f2 92E7 b .L157 + 2257 .LVL150: + 2258 .L186: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2259 .loc 1 882 7 discriminator 7 view .LVU676 + 2260 00f4 90F84600 ldrb r0, [r0, #70] @ zero_extendqisi2 + 2261 .LVL151: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2262 .loc 1 882 7 discriminator 7 view .LVU677 + 2263 00f8 C0B2 uxtb r0, r0 + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2264 .loc 1 882 46 discriminator 7 view .LVU678 + 2265 00fa 0228 cmp r0, #2 + 2266 00fc 14BF ite ne + 2267 00fe 0020 movne r0, #0 + 2268 0100 0120 moveq r0, #1 + 2269 0102 8AE7 b .L157 + 2270 .L161: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2271 .loc 1 886 51 discriminator 2 view .LVU679 + 2272 0104 042D cmp r5, #4 + 2273 0106 09D0 beq .L187 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2274 .loc 1 886 51 discriminator 5 view .LVU680 + 2275 0108 082D cmp r5, #8 + 2276 010a 0FD0 beq .L188 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2277 .loc 1 886 12 discriminator 8 view .LVU681 + 2278 010c 94F84720 ldrb r2, [r4, #71] @ zero_extendqisi2 + 2279 .LVL152: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2280 .loc 1 886 12 discriminator 8 view .LVU682 + 2281 0110 D2B2 uxtb r2, r2 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2282 .loc 1 886 51 discriminator 8 view .LVU683 + 2283 0112 012A cmp r2, #1 + 2284 0114 14BF ite ne + 2285 0116 0022 movne r2, #0 + 2286 0118 0122 moveq r2, #1 + 2287 011a 8AE7 b .L162 + 2288 .LVL153: + 2289 .L187: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2290 .loc 1 886 12 discriminator 4 view .LVU684 + 2291 011c 94F84520 ldrb r2, [r4, #69] @ zero_extendqisi2 + ARM GAS /tmp/ccXMh04L.s page 97 + + + 2292 .LVL154: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2293 .loc 1 886 12 discriminator 4 view .LVU685 + 2294 0120 D2B2 uxtb r2, r2 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2295 .loc 1 886 51 discriminator 4 view .LVU686 + 2296 0122 012A cmp r2, #1 + 2297 0124 14BF ite ne + 2298 0126 0022 movne r2, #0 + 2299 0128 0122 moveq r2, #1 + 2300 012a 82E7 b .L162 + 2301 .LVL155: + 2302 .L188: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2303 .loc 1 886 12 discriminator 7 view .LVU687 + 2304 012c 94F84620 ldrb r2, [r4, #70] @ zero_extendqisi2 + 2305 .LVL156: + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2306 .loc 1 886 12 discriminator 7 view .LVU688 + 2307 0130 D2B2 uxtb r2, r2 + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2308 .loc 1 886 51 discriminator 7 view .LVU689 + 2309 0132 012A cmp r2, #1 + 2310 0134 14BF ite ne + 2311 0136 0022 movne r2, #0 + 2312 0138 0122 moveq r2, #1 + 2313 013a 7AE7 b .L162 + 2314 .L165: + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2315 .loc 1 894 7 discriminator 2 view .LVU690 + 2316 013c 042D cmp r5, #4 + 2317 013e 0DD0 beq .L189 + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2318 .loc 1 894 7 discriminator 4 view .LVU691 + 2319 0140 082D cmp r5, #8 + 2320 0142 25D0 beq .L190 + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2321 .loc 1 894 7 discriminator 7 view .LVU692 + 2322 0144 0222 movs r2, #2 + 2323 0146 84F84720 strb r2, [r4, #71] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2324 .loc 1 902 3 is_stmt 1 view .LVU693 + 2325 014a 042D cmp r5, #4 + 2326 014c 09D0 beq .L168 + 2327 014e 082D cmp r5, #8 + 2328 0150 21D0 beq .L170 + 2329 0152 002D cmp r5, #0 + 2330 0154 3FF47BAF beq .L166 + 2331 0158 0120 movs r0, #1 + 2332 015a 43E0 b .L160 + 2333 .L189: + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2334 .loc 1 894 7 is_stmt 0 discriminator 3 view .LVU694 + 2335 015c 0222 movs r2, #2 + 2336 015e 84F84520 strb r2, [r4, #69] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2337 .loc 1 902 3 is_stmt 1 view .LVU695 + ARM GAS /tmp/ccXMh04L.s page 98 + + + 2338 .L168: + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2339 .loc 1 928 7 view .LVU696 + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2340 .loc 1 928 17 is_stmt 0 view .LVU697 + 2341 0162 A26A ldr r2, [r4, #40] + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2342 .loc 1 928 52 view .LVU698 + 2343 0164 2749 ldr r1, .L191 + 2344 .LVL157: + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2345 .loc 1 928 52 view .LVU699 + 2346 0166 9162 str r1, [r2, #40] + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2347 .loc 1 929 7 is_stmt 1 view .LVU700 + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2348 .loc 1 929 17 is_stmt 0 view .LVU701 + 2349 0168 A26A ldr r2, [r4, #40] + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2350 .loc 1 929 56 view .LVU702 + 2351 016a 2749 ldr r1, .L191+4 + 2352 016c D162 str r1, [r2, #44] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2353 .loc 1 932 7 is_stmt 1 view .LVU703 + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2354 .loc 1 932 17 is_stmt 0 view .LVU704 + 2355 016e A26A ldr r2, [r4, #40] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2356 .loc 1 932 53 view .LVU705 + 2357 0170 2649 ldr r1, .L191+8 + 2358 0172 1163 str r1, [r2, #48] + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2359 .loc 1 935 7 is_stmt 1 view .LVU706 + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2360 .loc 1 935 88 is_stmt 0 view .LVU707 + 2361 0174 2268 ldr r2, [r4] + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2362 .loc 1 935 11 view .LVU708 + 2363 0176 3832 adds r2, r2, #56 + 2364 0178 3146 mov r1, r6 + 2365 017a A06A ldr r0, [r4, #40] + 2366 017c FFF7FEFF bl HAL_DMA_Start_IT + 2367 .LVL158: + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2368 .loc 1 935 10 discriminator 1 view .LVU709 + 2369 0180 0028 cmp r0, #0 + 2370 0182 36D1 bne .L180 + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2371 .loc 1 942 7 is_stmt 1 view .LVU710 + 2372 0184 2268 ldr r2, [r4] + 2373 0186 D368 ldr r3, [r2, #12] + 2374 0188 43F48063 orr r3, r3, #1024 + 2375 018c D360 str r3, [r2, #12] + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2376 .loc 1 943 7 view .LVU711 + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2377 .loc 1 972 3 view .LVU712 + ARM GAS /tmp/ccXMh04L.s page 99 + + + 2378 018e 75E7 b .L171 + 2379 .LVL159: + 2380 .L190: + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2381 .loc 1 894 7 is_stmt 0 discriminator 6 view .LVU713 + 2382 0190 0222 movs r2, #2 + 2383 0192 84F84620 strb r2, [r4, #70] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2384 .loc 1 902 3 is_stmt 1 view .LVU714 + 2385 .L170: + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2386 .loc 1 949 7 view .LVU715 + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2387 .loc 1 949 17 is_stmt 0 view .LVU716 + 2388 0196 E26A ldr r2, [r4, #44] + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2389 .loc 1 949 52 view .LVU717 + 2390 0198 1A49 ldr r1, .L191 + 2391 .LVL160: + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2392 .loc 1 949 52 view .LVU718 + 2393 019a 9162 str r1, [r2, #40] + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2394 .loc 1 950 7 is_stmt 1 view .LVU719 + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2395 .loc 1 950 17 is_stmt 0 view .LVU720 + 2396 019c E26A ldr r2, [r4, #44] + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2397 .loc 1 950 56 view .LVU721 + 2398 019e 1A49 ldr r1, .L191+4 + 2399 01a0 D162 str r1, [r2, #44] + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2400 .loc 1 953 7 is_stmt 1 view .LVU722 + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2401 .loc 1 953 17 is_stmt 0 view .LVU723 + 2402 01a2 E26A ldr r2, [r4, #44] + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2403 .loc 1 953 53 view .LVU724 + 2404 01a4 1949 ldr r1, .L191+8 + 2405 01a6 1163 str r1, [r2, #48] + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2406 .loc 1 956 7 is_stmt 1 view .LVU725 + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2407 .loc 1 956 88 is_stmt 0 view .LVU726 + 2408 01a8 2268 ldr r2, [r4] + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2409 .loc 1 956 11 view .LVU727 + 2410 01aa 3C32 adds r2, r2, #60 + 2411 01ac 3146 mov r1, r6 + 2412 01ae E06A ldr r0, [r4, #44] + 2413 01b0 FFF7FEFF bl HAL_DMA_Start_IT + 2414 .LVL161: + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 2415 .loc 1 956 10 discriminator 1 view .LVU728 + 2416 01b4 F8B9 cbnz r0, .L181 + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2417 .loc 1 963 7 is_stmt 1 view .LVU729 + ARM GAS /tmp/ccXMh04L.s page 100 + + + 2418 01b6 2268 ldr r2, [r4] + 2419 01b8 D368 ldr r3, [r2, #12] + 2420 01ba 43F40063 orr r3, r3, #2048 + 2421 01be D360 str r3, [r2, #12] + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2422 .loc 1 964 7 view .LVU730 + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2423 .loc 1 972 3 view .LVU731 + 2424 01c0 5CE7 b .L171 + 2425 .L172: + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2426 .loc 1 983 7 view .LVU732 + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2427 .loc 1 983 31 is_stmt 0 view .LVU733 + 2428 01c2 9968 ldr r1, [r3, #8] + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2429 .loc 1 983 15 view .LVU734 + 2430 01c4 134A ldr r2, .L191+16 + 2431 01c6 0A40 ands r2, r2, r1 + 2432 .LVL162: + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2433 .loc 1 984 7 is_stmt 1 view .LVU735 + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2434 .loc 1 984 10 is_stmt 0 view .LVU736 + 2435 01c8 062A cmp r2, #6 + 2436 01ca 16D0 beq .L182 + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2437 .loc 1 984 11 discriminator 1 view .LVU737 + 2438 01cc B2F5803F cmp r2, #65536 + 2439 01d0 15D0 beq .L183 + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2440 .loc 1 986 9 is_stmt 1 view .LVU738 + 2441 01d2 1A68 ldr r2, [r3] + 2442 .LVL163: + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2443 .loc 1 986 9 is_stmt 0 view .LVU739 + 2444 01d4 42F00102 orr r2, r2, #1 + 2445 01d8 1A60 str r2, [r3] + 2446 01da 0020 movs r0, #0 + 2447 01dc 02E0 b .L160 + 2448 .LVL164: + 2449 .L174: + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2450 .loc 1 884 12 view .LVU740 + 2451 01de 0220 movs r0, #2 + 2452 01e0 00E0 b .L160 + 2453 .LVL165: + 2454 .L175: + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2455 .loc 1 899 12 view .LVU741 + 2456 01e2 0120 movs r0, #1 + 2457 .LVL166: + 2458 .L160: + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2459 .loc 1 997 1 view .LVU742 + 2460 01e4 70BD pop {r4, r5, r6, pc} + 2461 .LVL167: + ARM GAS /tmp/ccXMh04L.s page 101 + + + 2462 .L176: + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2463 .loc 1 890 14 view .LVU743 + 2464 01e6 0120 movs r0, #1 + 2465 01e8 FCE7 b .L160 + 2466 .L177: + 2467 01ea 0120 movs r0, #1 + 2468 01ec FAE7 b .L160 + 2469 .LVL168: + 2470 .L179: + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2471 .loc 1 918 16 view .LVU744 + 2472 01ee 0120 movs r0, #1 + 2473 01f0 F8E7 b .L160 + 2474 .L180: + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2475 .loc 1 939 16 view .LVU745 + 2476 01f2 0120 movs r0, #1 + 2477 01f4 F6E7 b .L160 + 2478 .L181: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2479 .loc 1 960 16 view .LVU746 + 2480 01f6 0120 movs r0, #1 + 2481 01f8 F4E7 b .L160 + 2482 .LVL169: + 2483 .L182: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2484 .loc 1 960 16 view .LVU747 + 2485 01fa 0020 movs r0, #0 + 2486 01fc F2E7 b .L160 + 2487 .L183: + 2488 01fe 0020 movs r0, #0 + 2489 0200 F0E7 b .L160 + 2490 .L192: + 2491 0202 00BF .align 2 + 2492 .L191: + 2493 0204 00000000 .word TIM_DMADelayPulseNCplt + 2494 0208 00000000 .word TIM_DMADelayPulseHalfCplt + 2495 020c 00000000 .word TIM_DMAErrorCCxN + 2496 0210 002C0140 .word 1073818624 + 2497 0214 07000100 .word 65543 + 2498 .cfi_endproc + 2499 .LFE144: + 2501 .section .text.HAL_TIMEx_OCN_Stop_DMA,"ax",%progbits + 2502 .align 1 + 2503 .global HAL_TIMEx_OCN_Stop_DMA + 2504 .syntax unified + 2505 .thumb + 2506 .thumb_func + 2508 HAL_TIMEx_OCN_Stop_DMA: + 2509 .LVL170: + 2510 .LFB145: +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2511 .loc 1 1011 1 is_stmt 1 view -0 + 2512 .cfi_startproc + 2513 @ args = 0, pretend = 0, frame = 0 + 2514 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccXMh04L.s page 102 + + +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2515 .loc 1 1011 1 is_stmt 0 view .LVU749 + 2516 0000 38B5 push {r3, r4, r5, lr} + 2517 .cfi_def_cfa_offset 16 + 2518 .cfi_offset 3, -16 + 2519 .cfi_offset 4, -12 + 2520 .cfi_offset 5, -8 + 2521 .cfi_offset 14, -4 + 2522 0002 0446 mov r4, r0 + 2523 0004 0D46 mov r5, r1 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2524 .loc 1 1012 3 is_stmt 1 view .LVU750 + 2525 .LVL171: +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2526 .loc 1 1015 3 view .LVU751 +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2527 .loc 1 1017 3 view .LVU752 + 2528 0006 0429 cmp r1, #4 + 2529 0008 34D0 beq .L194 + 2530 000a 0829 cmp r1, #8 + 2531 000c 3BD0 beq .L195 + 2532 000e 0029 cmp r1, #0 + 2533 0010 55D1 bne .L203 +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 2534 .loc 1 1022 7 view .LVU753 + 2535 0012 0268 ldr r2, [r0] + 2536 0014 D368 ldr r3, [r2, #12] + 2537 0016 23F40073 bic r3, r3, #512 + 2538 001a D360 str r3, [r2, #12] +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2539 .loc 1 1023 7 view .LVU754 +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2540 .loc 1 1023 13 is_stmt 0 view .LVU755 + 2541 001c 406A ldr r0, [r0, #36] + 2542 .LVL172: +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2543 .loc 1 1023 13 view .LVU756 + 2544 001e FFF7FEFF bl HAL_DMA_Abort_IT + 2545 .LVL173: +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2546 .loc 1 1024 7 is_stmt 1 view .LVU757 +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2547 .loc 1 1048 3 view .LVU758 + 2548 .L197: +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2549 .loc 1 1051 5 view .LVU759 + 2550 0022 0022 movs r2, #0 + 2551 0024 2946 mov r1, r5 + 2552 0026 2068 ldr r0, [r4] + 2553 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 2554 .LVL174: +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2555 .loc 1 1054 5 view .LVU760 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2556 .loc 1 1054 5 view .LVU761 + 2557 002c 2368 ldr r3, [r4] + 2558 002e 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccXMh04L.s page 103 + + + 2559 0030 41F21112 movw r2, #4369 + 2560 0034 1142 tst r1, r2 + 2561 0036 08D1 bne .L198 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2562 .loc 1 1054 5 discriminator 1 view .LVU762 + 2563 0038 196A ldr r1, [r3, #32] + 2564 003a 40F24442 movw r2, #1092 + 2565 003e 1142 tst r1, r2 + 2566 0040 03D1 bne .L198 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2567 .loc 1 1054 5 discriminator 3 view .LVU763 + 2568 0042 5A6C ldr r2, [r3, #68] + 2569 0044 22F40042 bic r2, r2, #32768 + 2570 0048 5A64 str r2, [r3, #68] + 2571 .L198: +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2572 .loc 1 1054 5 discriminator 5 view .LVU764 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2573 .loc 1 1057 5 view .LVU765 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2574 .loc 1 1057 5 view .LVU766 + 2575 004a 2368 ldr r3, [r4] + 2576 004c 196A ldr r1, [r3, #32] + 2577 004e 41F21112 movw r2, #4369 + 2578 0052 1142 tst r1, r2 + 2579 0054 08D1 bne .L199 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2580 .loc 1 1057 5 discriminator 1 view .LVU767 + 2581 0056 196A ldr r1, [r3, #32] + 2582 0058 40F24442 movw r2, #1092 + 2583 005c 1142 tst r1, r2 + 2584 005e 03D1 bne .L199 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2585 .loc 1 1057 5 discriminator 3 view .LVU768 + 2586 0060 1A68 ldr r2, [r3] + 2587 0062 22F00102 bic r2, r2, #1 + 2588 0066 1A60 str r2, [r3] + 2589 .L199: +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2590 .loc 1 1057 5 discriminator 5 view .LVU769 +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2591 .loc 1 1060 5 view .LVU770 + 2592 0068 B5B9 cbnz r5, .L200 +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2593 .loc 1 1060 5 is_stmt 0 discriminator 1 view .LVU771 + 2594 006a 0123 movs r3, #1 + 2595 006c 84F84430 strb r3, [r4, #68] + 2596 0070 0020 movs r0, #0 + 2597 .L196: + 2598 .LVL175: +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2599 .loc 1 1064 3 is_stmt 1 view .LVU772 +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2600 .loc 1 1065 1 is_stmt 0 view .LVU773 + 2601 0072 38BD pop {r3, r4, r5, pc} + 2602 .LVL176: + 2603 .L194: + ARM GAS /tmp/ccXMh04L.s page 104 + + +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 2604 .loc 1 1030 7 is_stmt 1 view .LVU774 + 2605 0074 0268 ldr r2, [r0] + 2606 0076 D368 ldr r3, [r2, #12] + 2607 0078 23F48063 bic r3, r3, #1024 + 2608 007c D360 str r3, [r2, #12] +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2609 .loc 1 1031 7 view .LVU775 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2610 .loc 1 1031 13 is_stmt 0 view .LVU776 + 2611 007e 806A ldr r0, [r0, #40] + 2612 .LVL177: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2613 .loc 1 1031 13 view .LVU777 + 2614 0080 FFF7FEFF bl HAL_DMA_Abort_IT + 2615 .LVL178: +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2616 .loc 1 1032 7 is_stmt 1 view .LVU778 +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2617 .loc 1 1048 3 view .LVU779 + 2618 0084 CDE7 b .L197 + 2619 .LVL179: + 2620 .L195: +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 2621 .loc 1 1038 7 view .LVU780 + 2622 0086 0268 ldr r2, [r0] + 2623 0088 D368 ldr r3, [r2, #12] + 2624 008a 23F40063 bic r3, r3, #2048 + 2625 008e D360 str r3, [r2, #12] +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2626 .loc 1 1039 7 view .LVU781 +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2627 .loc 1 1039 13 is_stmt 0 view .LVU782 + 2628 0090 C06A ldr r0, [r0, #44] + 2629 .LVL180: +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 2630 .loc 1 1039 13 view .LVU783 + 2631 0092 FFF7FEFF bl HAL_DMA_Abort_IT + 2632 .LVL181: +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2633 .loc 1 1040 7 is_stmt 1 view .LVU784 +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2634 .loc 1 1048 3 view .LVU785 + 2635 0096 C4E7 b .L197 + 2636 .L200: +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2637 .loc 1 1060 5 is_stmt 0 discriminator 2 view .LVU786 + 2638 0098 042D cmp r5, #4 + 2639 009a 06D0 beq .L205 +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2640 .loc 1 1060 5 discriminator 4 view .LVU787 + 2641 009c 082D cmp r5, #8 + 2642 009e 09D0 beq .L206 +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2643 .loc 1 1060 5 discriminator 7 view .LVU788 + 2644 00a0 0123 movs r3, #1 + 2645 00a2 84F84730 strb r3, [r4, #71] + ARM GAS /tmp/ccXMh04L.s page 105 + + + 2646 00a6 0020 movs r0, #0 + 2647 00a8 E3E7 b .L196 + 2648 .L205: +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2649 .loc 1 1060 5 discriminator 3 view .LVU789 + 2650 00aa 0123 movs r3, #1 + 2651 00ac 84F84530 strb r3, [r4, #69] + 2652 00b0 0020 movs r0, #0 + 2653 00b2 DEE7 b .L196 + 2654 .L206: +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2655 .loc 1 1060 5 discriminator 6 view .LVU790 + 2656 00b4 0123 movs r3, #1 + 2657 00b6 84F84630 strb r3, [r4, #70] + 2658 00ba 0020 movs r0, #0 + 2659 00bc D9E7 b .L196 + 2660 .LVL182: + 2661 .L203: +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2662 .loc 1 1017 3 view .LVU791 + 2663 00be 0120 movs r0, #1 + 2664 .LVL183: +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2665 .loc 1 1017 3 view .LVU792 + 2666 00c0 D7E7 b .L196 + 2667 .cfi_endproc + 2668 .LFE145: + 2670 .section .text.HAL_TIMEx_PWMN_Start,"ax",%progbits + 2671 .align 1 + 2672 .global HAL_TIMEx_PWMN_Start + 2673 .syntax unified + 2674 .thumb + 2675 .thumb_func + 2677 HAL_TIMEx_PWMN_Start: + 2678 .LVL184: + 2679 .LFB146: +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2680 .loc 1 1112 1 is_stmt 1 view -0 + 2681 .cfi_startproc + 2682 @ args = 0, pretend = 0, frame = 0 + 2683 @ frame_needed = 0, uses_anonymous_args = 0 +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2684 .loc 1 1112 1 is_stmt 0 view .LVU794 + 2685 0000 10B5 push {r4, lr} + 2686 .cfi_def_cfa_offset 8 + 2687 .cfi_offset 4, -8 + 2688 .cfi_offset 14, -4 + 2689 0002 0446 mov r4, r0 +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2690 .loc 1 1113 3 is_stmt 1 view .LVU795 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2691 .loc 1 1116 3 view .LVU796 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2692 .loc 1 1119 3 view .LVU797 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2693 .loc 1 1119 46 is_stmt 0 view .LVU798 + 2694 0004 0846 mov r0, r1 + ARM GAS /tmp/ccXMh04L.s page 106 + + + 2695 .LVL185: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2696 .loc 1 1119 46 view .LVU799 + 2697 0006 79BB cbnz r1, .L208 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2698 .loc 1 1119 7 discriminator 1 view .LVU800 + 2699 0008 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 + 2700 000c DBB2 uxtb r3, r3 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2701 .loc 1 1119 46 discriminator 1 view .LVU801 + 2702 000e 013B subs r3, r3, #1 + 2703 0010 18BF it ne + 2704 0012 0123 movne r3, #1 + 2705 .L209: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2706 .loc 1 1119 6 discriminator 12 view .LVU802 + 2707 0014 002B cmp r3, #0 + 2708 0016 5ED1 bne .L219 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2709 .loc 1 1125 3 is_stmt 1 view .LVU803 + 2710 0018 0028 cmp r0, #0 + 2711 001a 3ED1 bne .L213 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2712 .loc 1 1125 3 is_stmt 0 discriminator 1 view .LVU804 + 2713 001c 0223 movs r3, #2 + 2714 001e 84F84430 strb r3, [r4, #68] + 2715 .L214: +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2716 .loc 1 1128 3 is_stmt 1 view .LVU805 + 2717 0022 0422 movs r2, #4 + 2718 0024 0146 mov r1, r0 + 2719 .LVL186: +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2720 .loc 1 1128 3 is_stmt 0 view .LVU806 + 2721 0026 2068 ldr r0, [r4] + 2722 .LVL187: +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2723 .loc 1 1128 3 view .LVU807 + 2724 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 2725 .LVL188: +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2726 .loc 1 1131 3 is_stmt 1 view .LVU808 + 2727 002c 2268 ldr r2, [r4] + 2728 002e 536C ldr r3, [r2, #68] + 2729 0030 43F40043 orr r3, r3, #32768 + 2730 0034 5364 str r3, [r2, #68] +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2731 .loc 1 1134 3 view .LVU809 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2732 .loc 1 1134 7 is_stmt 0 view .LVU810 + 2733 0036 2368 ldr r3, [r4] +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2734 .loc 1 1134 6 view .LVU811 + 2735 0038 2A4A ldr r2, .L227 + 2736 003a 9342 cmp r3, r2 + 2737 003c 3DD0 beq .L217 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 107 + + + 2738 .loc 1 1134 7 discriminator 1 view .LVU812 + 2739 003e B3F1804F cmp r3, #1073741824 + 2740 0042 3AD0 beq .L217 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2741 .loc 1 1134 7 discriminator 2 view .LVU813 + 2742 0044 A2F59432 sub r2, r2, #75776 + 2743 0048 9342 cmp r3, r2 + 2744 004a 36D0 beq .L217 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2745 .loc 1 1134 7 discriminator 3 view .LVU814 + 2746 004c 02F58062 add r2, r2, #1024 + 2747 0050 9342 cmp r3, r2 + 2748 0052 32D0 beq .L217 +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2749 .loc 1 1134 7 discriminator 4 view .LVU815 + 2750 0054 02F59C32 add r2, r2, #79872 + 2751 0058 9342 cmp r3, r2 + 2752 005a 2ED0 beq .L217 +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2753 .loc 1 1144 5 is_stmt 1 view .LVU816 + 2754 005c 1A68 ldr r2, [r3] + 2755 005e 42F00102 orr r2, r2, #1 + 2756 0062 1A60 str r2, [r3] +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2757 .loc 1 1148 10 is_stmt 0 view .LVU817 + 2758 0064 0020 movs r0, #0 + 2759 0066 37E0 b .L212 + 2760 .LVL189: + 2761 .L208: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2762 .loc 1 1119 46 discriminator 2 view .LVU818 + 2763 0068 0429 cmp r1, #4 + 2764 006a 08D0 beq .L223 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2765 .loc 1 1119 46 discriminator 5 view .LVU819 + 2766 006c 0829 cmp r1, #8 + 2767 006e 0DD0 beq .L224 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2768 .loc 1 1119 7 discriminator 8 view .LVU820 + 2769 0070 94F84730 ldrb r3, [r4, #71] @ zero_extendqisi2 + 2770 0074 DBB2 uxtb r3, r3 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2771 .loc 1 1119 46 discriminator 8 view .LVU821 + 2772 0076 013B subs r3, r3, #1 + 2773 0078 18BF it ne + 2774 007a 0123 movne r3, #1 + 2775 007c CAE7 b .L209 + 2776 .L223: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2777 .loc 1 1119 7 discriminator 4 view .LVU822 + 2778 007e 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 2779 0082 DBB2 uxtb r3, r3 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2780 .loc 1 1119 46 discriminator 4 view .LVU823 + 2781 0084 013B subs r3, r3, #1 + 2782 0086 18BF it ne + 2783 0088 0123 movne r3, #1 + ARM GAS /tmp/ccXMh04L.s page 108 + + + 2784 008a C3E7 b .L209 + 2785 .L224: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2786 .loc 1 1119 7 discriminator 7 view .LVU824 + 2787 008c 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 + 2788 0090 DBB2 uxtb r3, r3 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2789 .loc 1 1119 46 discriminator 7 view .LVU825 + 2790 0092 013B subs r3, r3, #1 + 2791 0094 18BF it ne + 2792 0096 0123 movne r3, #1 + 2793 0098 BCE7 b .L209 + 2794 .L213: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2795 .loc 1 1125 3 discriminator 2 view .LVU826 + 2796 009a 0428 cmp r0, #4 + 2797 009c 05D0 beq .L225 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2798 .loc 1 1125 3 discriminator 4 view .LVU827 + 2799 009e 0828 cmp r0, #8 + 2800 00a0 07D0 beq .L226 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2801 .loc 1 1125 3 discriminator 7 view .LVU828 + 2802 00a2 0223 movs r3, #2 + 2803 00a4 84F84730 strb r3, [r4, #71] + 2804 00a8 BBE7 b .L214 + 2805 .L225: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2806 .loc 1 1125 3 discriminator 3 view .LVU829 + 2807 00aa 0223 movs r3, #2 + 2808 00ac 84F84530 strb r3, [r4, #69] + 2809 00b0 B7E7 b .L214 + 2810 .L226: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2811 .loc 1 1125 3 discriminator 6 view .LVU830 + 2812 00b2 0223 movs r3, #2 + 2813 00b4 84F84630 strb r3, [r4, #70] + 2814 00b8 B3E7 b .L214 + 2815 .LVL190: + 2816 .L217: +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2817 .loc 1 1136 5 is_stmt 1 view .LVU831 +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2818 .loc 1 1136 29 is_stmt 0 view .LVU832 + 2819 00ba 9968 ldr r1, [r3, #8] +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2820 .loc 1 1136 13 view .LVU833 + 2821 00bc 0A4A ldr r2, .L227+4 + 2822 00be 0A40 ands r2, r2, r1 + 2823 .LVL191: +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2824 .loc 1 1137 5 is_stmt 1 view .LVU834 +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2825 .loc 1 1137 8 is_stmt 0 view .LVU835 + 2826 00c0 062A cmp r2, #6 + 2827 00c2 0AD0 beq .L220 +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 109 + + + 2828 .loc 1 1137 9 discriminator 1 view .LVU836 + 2829 00c4 B2F5803F cmp r2, #65536 + 2830 00c8 09D0 beq .L221 +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2831 .loc 1 1139 7 is_stmt 1 view .LVU837 + 2832 00ca 1A68 ldr r2, [r3] + 2833 .LVL192: +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2834 .loc 1 1139 7 is_stmt 0 view .LVU838 + 2835 00cc 42F00102 orr r2, r2, #1 + 2836 00d0 1A60 str r2, [r3] +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2837 .loc 1 1148 10 view .LVU839 + 2838 00d2 0020 movs r0, #0 + 2839 00d4 00E0 b .L212 + 2840 .LVL193: + 2841 .L219: +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2842 .loc 1 1121 12 view .LVU840 + 2843 00d6 0120 movs r0, #1 + 2844 .LVL194: + 2845 .L212: +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2846 .loc 1 1149 1 view .LVU841 + 2847 00d8 10BD pop {r4, pc} + 2848 .LVL195: + 2849 .L220: +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2850 .loc 1 1148 10 view .LVU842 + 2851 00da 0020 movs r0, #0 + 2852 00dc FCE7 b .L212 + 2853 .L221: + 2854 00de 0020 movs r0, #0 + 2855 00e0 FAE7 b .L212 + 2856 .L228: + 2857 00e2 00BF .align 2 + 2858 .L227: + 2859 00e4 002C0140 .word 1073818624 + 2860 00e8 07000100 .word 65543 + 2861 .cfi_endproc + 2862 .LFE146: + 2864 .section .text.HAL_TIMEx_PWMN_Stop,"ax",%progbits + 2865 .align 1 + 2866 .global HAL_TIMEx_PWMN_Stop + 2867 .syntax unified + 2868 .thumb + 2869 .thumb_func + 2871 HAL_TIMEx_PWMN_Stop: + 2872 .LVL196: + 2873 .LFB147: +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 2874 .loc 1 1162 1 is_stmt 1 view -0 + 2875 .cfi_startproc + 2876 @ args = 0, pretend = 0, frame = 0 + 2877 @ frame_needed = 0, uses_anonymous_args = 0 +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 2878 .loc 1 1162 1 is_stmt 0 view .LVU844 + ARM GAS /tmp/ccXMh04L.s page 110 + + + 2879 0000 38B5 push {r3, r4, r5, lr} + 2880 .cfi_def_cfa_offset 16 + 2881 .cfi_offset 3, -16 + 2882 .cfi_offset 4, -12 + 2883 .cfi_offset 5, -8 + 2884 .cfi_offset 14, -4 + 2885 0002 0446 mov r4, r0 + 2886 0004 0D46 mov r5, r1 +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2887 .loc 1 1164 3 is_stmt 1 view .LVU845 +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2888 .loc 1 1167 3 view .LVU846 + 2889 0006 0022 movs r2, #0 + 2890 0008 0068 ldr r0, [r0] + 2891 .LVL197: +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2892 .loc 1 1167 3 is_stmt 0 view .LVU847 + 2893 000a FFF7FEFF bl TIM_CCxNChannelCmd + 2894 .LVL198: +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2895 .loc 1 1170 3 is_stmt 1 view .LVU848 +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2896 .loc 1 1170 3 view .LVU849 + 2897 000e 2368 ldr r3, [r4] + 2898 0010 196A ldr r1, [r3, #32] + 2899 0012 41F21112 movw r2, #4369 + 2900 0016 1142 tst r1, r2 + 2901 0018 08D1 bne .L230 +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2902 .loc 1 1170 3 discriminator 1 view .LVU850 + 2903 001a 196A ldr r1, [r3, #32] + 2904 001c 40F24442 movw r2, #1092 + 2905 0020 1142 tst r1, r2 + 2906 0022 03D1 bne .L230 +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2907 .loc 1 1170 3 discriminator 3 view .LVU851 + 2908 0024 5A6C ldr r2, [r3, #68] + 2909 0026 22F40042 bic r2, r2, #32768 + 2910 002a 5A64 str r2, [r3, #68] + 2911 .L230: +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2912 .loc 1 1170 3 discriminator 5 view .LVU852 +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2913 .loc 1 1173 3 view .LVU853 +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2914 .loc 1 1173 3 view .LVU854 + 2915 002c 2368 ldr r3, [r4] + 2916 002e 196A ldr r1, [r3, #32] + 2917 0030 41F21112 movw r2, #4369 + 2918 0034 1142 tst r1, r2 + 2919 0036 08D1 bne .L231 +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2920 .loc 1 1173 3 discriminator 1 view .LVU855 + 2921 0038 196A ldr r1, [r3, #32] + 2922 003a 40F24442 movw r2, #1092 + 2923 003e 1142 tst r1, r2 + 2924 0040 03D1 bne .L231 + ARM GAS /tmp/ccXMh04L.s page 111 + + +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2925 .loc 1 1173 3 discriminator 3 view .LVU856 + 2926 0042 1A68 ldr r2, [r3] + 2927 0044 22F00102 bic r2, r2, #1 + 2928 0048 1A60 str r2, [r3] + 2929 .L231: +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2930 .loc 1 1173 3 discriminator 5 view .LVU857 +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2931 .loc 1 1176 3 view .LVU858 + 2932 004a 25B9 cbnz r5, .L232 +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2933 .loc 1 1176 3 is_stmt 0 discriminator 1 view .LVU859 + 2934 004c 0123 movs r3, #1 + 2935 004e 84F84430 strb r3, [r4, #68] + 2936 .L233: +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 2937 .loc 1 1179 3 is_stmt 1 view .LVU860 +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2938 .loc 1 1180 1 is_stmt 0 view .LVU861 + 2939 0052 0020 movs r0, #0 + 2940 0054 38BD pop {r3, r4, r5, pc} + 2941 .LVL199: + 2942 .L232: +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2943 .loc 1 1176 3 discriminator 2 view .LVU862 + 2944 0056 042D cmp r5, #4 + 2945 0058 05D0 beq .L237 +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2946 .loc 1 1176 3 discriminator 4 view .LVU863 + 2947 005a 082D cmp r5, #8 + 2948 005c 07D0 beq .L238 +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2949 .loc 1 1176 3 discriminator 7 view .LVU864 + 2950 005e 0123 movs r3, #1 + 2951 0060 84F84730 strb r3, [r4, #71] + 2952 0064 F5E7 b .L233 + 2953 .L237: +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2954 .loc 1 1176 3 discriminator 3 view .LVU865 + 2955 0066 0123 movs r3, #1 + 2956 0068 84F84530 strb r3, [r4, #69] + 2957 006c F1E7 b .L233 + 2958 .L238: +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2959 .loc 1 1176 3 discriminator 6 view .LVU866 + 2960 006e 0123 movs r3, #1 + 2961 0070 84F84630 strb r3, [r4, #70] + 2962 0074 EDE7 b .L233 + 2963 .cfi_endproc + 2964 .LFE147: + 2966 .section .text.HAL_TIMEx_PWMN_Start_IT,"ax",%progbits + 2967 .align 1 + 2968 .global HAL_TIMEx_PWMN_Start_IT + 2969 .syntax unified + 2970 .thumb + 2971 .thumb_func + ARM GAS /tmp/ccXMh04L.s page 112 + + + 2973 HAL_TIMEx_PWMN_Start_IT: + 2974 .LVL200: + 2975 .LFB148: +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2976 .loc 1 1194 1 is_stmt 1 view -0 + 2977 .cfi_startproc + 2978 @ args = 0, pretend = 0, frame = 0 + 2979 @ frame_needed = 0, uses_anonymous_args = 0 +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2980 .loc 1 1194 1 is_stmt 0 view .LVU868 + 2981 0000 10B5 push {r4, lr} + 2982 .cfi_def_cfa_offset 8 + 2983 .cfi_offset 4, -8 + 2984 .cfi_offset 14, -4 + 2985 0002 0446 mov r4, r0 +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2986 .loc 1 1195 3 is_stmt 1 view .LVU869 + 2987 .LVL201: +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2988 .loc 1 1196 3 view .LVU870 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 2989 .loc 1 1199 3 view .LVU871 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2990 .loc 1 1202 3 view .LVU872 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2991 .loc 1 1202 46 is_stmt 0 view .LVU873 + 2992 0004 0846 mov r0, r1 + 2993 .LVL202: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2994 .loc 1 1202 46 view .LVU874 + 2995 0006 0029 cmp r1, #0 + 2996 0008 39D1 bne .L240 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 2997 .loc 1 1202 7 discriminator 1 view .LVU875 + 2998 000a 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 + 2999 000e DBB2 uxtb r3, r3 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3000 .loc 1 1202 46 discriminator 1 view .LVU876 + 3001 0010 013B subs r3, r3, #1 + 3002 0012 18BF it ne + 3003 0014 0123 movne r3, #1 + 3004 .L241: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3005 .loc 1 1202 6 discriminator 12 view .LVU877 + 3006 0016 002B cmp r3, #0 + 3007 0018 79D1 bne .L254 +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3008 .loc 1 1208 3 is_stmt 1 view .LVU878 + 3009 001a 0028 cmp r0, #0 + 3010 001c 48D1 bne .L245 +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3011 .loc 1 1208 3 is_stmt 0 discriminator 1 view .LVU879 + 3012 001e 0223 movs r3, #2 + 3013 0020 84F84430 strb r3, [r4, #68] +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3014 .loc 1 1210 3 is_stmt 1 view .LVU880 + 3015 .L246: + ARM GAS /tmp/ccXMh04L.s page 113 + + +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3016 .loc 1 1215 7 view .LVU881 + 3017 0024 2268 ldr r2, [r4] + 3018 0026 D368 ldr r3, [r2, #12] + 3019 0028 43F00203 orr r3, r3, #2 + 3020 002c D360 str r3, [r2, #12] +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3021 .loc 1 1216 7 view .LVU882 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3022 .loc 1 1238 3 view .LVU883 + 3023 .L251: +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3024 .loc 1 1241 5 view .LVU884 + 3025 002e 2268 ldr r2, [r4] + 3026 0030 D368 ldr r3, [r2, #12] + 3027 0032 43F08003 orr r3, r3, #128 + 3028 0036 D360 str r3, [r2, #12] +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3029 .loc 1 1244 5 view .LVU885 + 3030 0038 0422 movs r2, #4 + 3031 003a 0146 mov r1, r0 + 3032 .LVL203: +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3033 .loc 1 1244 5 is_stmt 0 view .LVU886 + 3034 003c 2068 ldr r0, [r4] + 3035 .LVL204: +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3036 .loc 1 1244 5 view .LVU887 + 3037 003e FFF7FEFF bl TIM_CCxNChannelCmd + 3038 .LVL205: +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3039 .loc 1 1247 5 is_stmt 1 view .LVU888 + 3040 0042 2268 ldr r2, [r4] + 3041 0044 536C ldr r3, [r2, #68] + 3042 0046 43F40043 orr r3, r3, #32768 + 3043 004a 5364 str r3, [r2, #68] +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3044 .loc 1 1250 5 view .LVU889 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3045 .loc 1 1250 9 is_stmt 0 view .LVU890 + 3046 004c 2368 ldr r3, [r4] +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3047 .loc 1 1250 8 view .LVU891 + 3048 004e 334A ldr r2, .L263 + 3049 0050 9342 cmp r3, r2 + 3050 0052 4ED0 beq .L252 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3051 .loc 1 1250 9 discriminator 1 view .LVU892 + 3052 0054 B3F1804F cmp r3, #1073741824 + 3053 0058 4BD0 beq .L252 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3054 .loc 1 1250 9 discriminator 2 view .LVU893 + 3055 005a A2F59432 sub r2, r2, #75776 + 3056 005e 9342 cmp r3, r2 + 3057 0060 47D0 beq .L252 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3058 .loc 1 1250 9 discriminator 3 view .LVU894 + ARM GAS /tmp/ccXMh04L.s page 114 + + + 3059 0062 02F58062 add r2, r2, #1024 + 3060 0066 9342 cmp r3, r2 + 3061 0068 43D0 beq .L252 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3062 .loc 1 1250 9 discriminator 4 view .LVU895 + 3063 006a 02F59C32 add r2, r2, #79872 + 3064 006e 9342 cmp r3, r2 + 3065 0070 3FD0 beq .L252 +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3066 .loc 1 1260 7 is_stmt 1 view .LVU896 + 3067 0072 1A68 ldr r2, [r3] + 3068 0074 42F00102 orr r2, r2, #1 + 3069 0078 1A60 str r2, [r3] + 3070 007a 0020 movs r0, #0 + 3071 007c 48E0 b .L244 + 3072 .LVL206: + 3073 .L240: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3074 .loc 1 1202 46 is_stmt 0 discriminator 2 view .LVU897 + 3075 007e 0429 cmp r1, #4 + 3076 0080 08D0 beq .L259 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3077 .loc 1 1202 46 discriminator 5 view .LVU898 + 3078 0082 0829 cmp r1, #8 + 3079 0084 0DD0 beq .L260 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3080 .loc 1 1202 7 discriminator 8 view .LVU899 + 3081 0086 94F84730 ldrb r3, [r4, #71] @ zero_extendqisi2 + 3082 008a DBB2 uxtb r3, r3 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3083 .loc 1 1202 46 discriminator 8 view .LVU900 + 3084 008c 013B subs r3, r3, #1 + 3085 008e 18BF it ne + 3086 0090 0123 movne r3, #1 + 3087 0092 C0E7 b .L241 + 3088 .L259: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3089 .loc 1 1202 7 discriminator 4 view .LVU901 + 3090 0094 94F84530 ldrb r3, [r4, #69] @ zero_extendqisi2 + 3091 0098 DBB2 uxtb r3, r3 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3092 .loc 1 1202 46 discriminator 4 view .LVU902 + 3093 009a 013B subs r3, r3, #1 + 3094 009c 18BF it ne + 3095 009e 0123 movne r3, #1 + 3096 00a0 B9E7 b .L241 + 3097 .L260: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3098 .loc 1 1202 7 discriminator 7 view .LVU903 + 3099 00a2 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 + 3100 00a6 DBB2 uxtb r3, r3 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3101 .loc 1 1202 46 discriminator 7 view .LVU904 + 3102 00a8 013B subs r3, r3, #1 + 3103 00aa 18BF it ne + 3104 00ac 0123 movne r3, #1 + 3105 00ae B2E7 b .L241 + ARM GAS /tmp/ccXMh04L.s page 115 + + + 3106 .L245: +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3107 .loc 1 1208 3 discriminator 2 view .LVU905 + 3108 00b0 0428 cmp r0, #4 + 3109 00b2 0CD0 beq .L261 +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3110 .loc 1 1208 3 discriminator 4 view .LVU906 + 3111 00b4 0828 cmp r0, #8 + 3112 00b6 13D0 beq .L262 +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3113 .loc 1 1208 3 discriminator 7 view .LVU907 + 3114 00b8 0223 movs r3, #2 + 3115 00ba 84F84730 strb r3, [r4, #71] +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3116 .loc 1 1210 3 is_stmt 1 view .LVU908 + 3117 00be 0428 cmp r0, #4 + 3118 00c0 08D0 beq .L248 + 3119 00c2 0828 cmp r0, #8 + 3120 00c4 0FD0 beq .L250 + 3121 00c6 0028 cmp r0, #0 + 3122 00c8 ACD0 beq .L246 + 3123 00ca 0120 movs r0, #1 + 3124 .LVL207: +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3125 .loc 1 1210 3 is_stmt 0 view .LVU909 + 3126 00cc 20E0 b .L244 + 3127 .LVL208: + 3128 .L261: +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3129 .loc 1 1208 3 discriminator 3 view .LVU910 + 3130 00ce 0223 movs r3, #2 + 3131 00d0 84F84530 strb r3, [r4, #69] +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3132 .loc 1 1210 3 is_stmt 1 view .LVU911 + 3133 .L248: +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3134 .loc 1 1222 7 view .LVU912 + 3135 00d4 2268 ldr r2, [r4] + 3136 00d6 D368 ldr r3, [r2, #12] + 3137 00d8 43F00403 orr r3, r3, #4 + 3138 00dc D360 str r3, [r2, #12] +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3139 .loc 1 1223 7 view .LVU913 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3140 .loc 1 1238 3 view .LVU914 + 3141 00de A6E7 b .L251 + 3142 .L262: +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3143 .loc 1 1208 3 is_stmt 0 discriminator 6 view .LVU915 + 3144 00e0 0223 movs r3, #2 + 3145 00e2 84F84630 strb r3, [r4, #70] +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3146 .loc 1 1210 3 is_stmt 1 view .LVU916 + 3147 .L250: +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3148 .loc 1 1229 7 view .LVU917 + 3149 00e6 2268 ldr r2, [r4] + ARM GAS /tmp/ccXMh04L.s page 116 + + + 3150 00e8 D368 ldr r3, [r2, #12] + 3151 00ea 43F00803 orr r3, r3, #8 + 3152 00ee D360 str r3, [r2, #12] +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3153 .loc 1 1230 7 view .LVU918 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3154 .loc 1 1238 3 view .LVU919 + 3155 00f0 9DE7 b .L251 + 3156 .LVL209: + 3157 .L252: +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3158 .loc 1 1252 7 view .LVU920 +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3159 .loc 1 1252 31 is_stmt 0 view .LVU921 + 3160 00f2 9968 ldr r1, [r3, #8] +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3161 .loc 1 1252 15 view .LVU922 + 3162 00f4 0A4A ldr r2, .L263+4 + 3163 00f6 0A40 ands r2, r2, r1 + 3164 .LVL210: +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3165 .loc 1 1253 7 is_stmt 1 view .LVU923 +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3166 .loc 1 1253 10 is_stmt 0 view .LVU924 + 3167 00f8 062A cmp r2, #6 + 3168 00fa 0AD0 beq .L256 +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3169 .loc 1 1253 11 discriminator 1 view .LVU925 + 3170 00fc B2F5803F cmp r2, #65536 + 3171 0100 09D0 beq .L257 +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3172 .loc 1 1255 9 is_stmt 1 view .LVU926 + 3173 0102 1A68 ldr r2, [r3] + 3174 .LVL211: +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3175 .loc 1 1255 9 is_stmt 0 view .LVU927 + 3176 0104 42F00102 orr r2, r2, #1 + 3177 0108 1A60 str r2, [r3] + 3178 010a 0020 movs r0, #0 + 3179 010c 00E0 b .L244 + 3180 .LVL212: + 3181 .L254: +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3182 .loc 1 1204 12 view .LVU928 + 3183 010e 0120 movs r0, #1 + 3184 .LVL213: + 3185 .L244: +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3186 .loc 1 1266 1 view .LVU929 + 3187 0110 10BD pop {r4, pc} + 3188 .LVL214: + 3189 .L256: +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3190 .loc 1 1266 1 view .LVU930 + 3191 0112 0020 movs r0, #0 + 3192 0114 FCE7 b .L244 + 3193 .L257: + ARM GAS /tmp/ccXMh04L.s page 117 + + + 3194 0116 0020 movs r0, #0 + 3195 0118 FAE7 b .L244 + 3196 .L264: + 3197 011a 00BF .align 2 + 3198 .L263: + 3199 011c 002C0140 .word 1073818624 + 3200 0120 07000100 .word 65543 + 3201 .cfi_endproc + 3202 .LFE148: + 3204 .section .text.HAL_TIMEx_PWMN_Stop_IT,"ax",%progbits + 3205 .align 1 + 3206 .global HAL_TIMEx_PWMN_Stop_IT + 3207 .syntax unified + 3208 .thumb + 3209 .thumb_func + 3211 HAL_TIMEx_PWMN_Stop_IT: + 3212 .LVL215: + 3213 .LFB149: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3214 .loc 1 1280 1 is_stmt 1 view -0 + 3215 .cfi_startproc + 3216 @ args = 0, pretend = 0, frame = 0 + 3217 @ frame_needed = 0, uses_anonymous_args = 0 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3218 .loc 1 1280 1 is_stmt 0 view .LVU932 + 3219 0000 38B5 push {r3, r4, r5, lr} + 3220 .cfi_def_cfa_offset 16 + 3221 .cfi_offset 3, -16 + 3222 .cfi_offset 4, -12 + 3223 .cfi_offset 5, -8 + 3224 .cfi_offset 14, -4 + 3225 0002 0446 mov r4, r0 + 3226 0004 0D46 mov r5, r1 +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpccer; + 3227 .loc 1 1281 3 is_stmt 1 view .LVU933 + 3228 .LVL216: +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3229 .loc 1 1282 3 view .LVU934 +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3230 .loc 1 1285 3 view .LVU935 +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3231 .loc 1 1287 3 view .LVU936 + 3232 0006 0429 cmp r1, #4 + 3233 0008 3BD0 beq .L266 + 3234 000a 0829 cmp r1, #8 + 3235 000c 3FD0 beq .L267 + 3236 000e 0029 cmp r1, #0 + 3237 0010 56D1 bne .L276 +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3238 .loc 1 1292 7 view .LVU937 + 3239 0012 0268 ldr r2, [r0] + 3240 0014 D368 ldr r3, [r2, #12] + 3241 0016 23F00203 bic r3, r3, #2 + 3242 001a D360 str r3, [r2, #12] +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3243 .loc 1 1293 7 view .LVU938 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 118 + + + 3244 .loc 1 1315 3 view .LVU939 + 3245 .L269: +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3246 .loc 1 1318 5 view .LVU940 + 3247 001c 0022 movs r2, #0 + 3248 001e 2946 mov r1, r5 + 3249 .LVL217: +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3250 .loc 1 1318 5 is_stmt 0 view .LVU941 + 3251 0020 2068 ldr r0, [r4] + 3252 .LVL218: +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3253 .loc 1 1318 5 view .LVU942 + 3254 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 3255 .LVL219: +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 3256 .loc 1 1321 5 is_stmt 1 view .LVU943 +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 3257 .loc 1 1321 19 is_stmt 0 view .LVU944 + 3258 0026 2368 ldr r3, [r4] +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 3259 .loc 1 1321 13 view .LVU945 + 3260 0028 196A ldr r1, [r3, #32] + 3261 .LVL220: +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3262 .loc 1 1322 5 is_stmt 1 view .LVU946 +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3263 .loc 1 1322 8 is_stmt 0 view .LVU947 + 3264 002a 40F24442 movw r2, #1092 + 3265 002e 1142 tst r1, r2 + 3266 0030 03D1 bne .L270 +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3267 .loc 1 1324 7 is_stmt 1 view .LVU948 + 3268 0032 DA68 ldr r2, [r3, #12] + 3269 0034 22F08002 bic r2, r2, #128 + 3270 0038 DA60 str r2, [r3, #12] + 3271 .L270: +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3272 .loc 1 1328 5 view .LVU949 +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3273 .loc 1 1328 5 view .LVU950 + 3274 003a 2368 ldr r3, [r4] + 3275 003c 196A ldr r1, [r3, #32] + 3276 .LVL221: +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3277 .loc 1 1328 5 is_stmt 0 view .LVU951 + 3278 003e 41F21112 movw r2, #4369 + 3279 0042 1142 tst r1, r2 + 3280 0044 08D1 bne .L271 +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3281 .loc 1 1328 5 is_stmt 1 discriminator 1 view .LVU952 + 3282 0046 196A ldr r1, [r3, #32] + 3283 0048 40F24442 movw r2, #1092 + 3284 004c 1142 tst r1, r2 + 3285 004e 03D1 bne .L271 +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3286 .loc 1 1328 5 discriminator 3 view .LVU953 + ARM GAS /tmp/ccXMh04L.s page 119 + + + 3287 0050 5A6C ldr r2, [r3, #68] + 3288 0052 22F40042 bic r2, r2, #32768 + 3289 0056 5A64 str r2, [r3, #68] + 3290 .L271: +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3291 .loc 1 1328 5 discriminator 5 view .LVU954 +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3292 .loc 1 1331 5 view .LVU955 +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3293 .loc 1 1331 5 view .LVU956 + 3294 0058 2368 ldr r3, [r4] + 3295 005a 196A ldr r1, [r3, #32] + 3296 005c 41F21112 movw r2, #4369 + 3297 0060 1142 tst r1, r2 + 3298 0062 08D1 bne .L272 +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3299 .loc 1 1331 5 discriminator 1 view .LVU957 + 3300 0064 196A ldr r1, [r3, #32] + 3301 0066 40F24442 movw r2, #1092 + 3302 006a 1142 tst r1, r2 + 3303 006c 03D1 bne .L272 +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3304 .loc 1 1331 5 discriminator 3 view .LVU958 + 3305 006e 1A68 ldr r2, [r3] + 3306 0070 22F00102 bic r2, r2, #1 + 3307 0074 1A60 str r2, [r3] + 3308 .L272: +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3309 .loc 1 1331 5 discriminator 5 view .LVU959 +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3310 .loc 1 1334 5 view .LVU960 + 3311 0076 85B9 cbnz r5, .L273 +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3312 .loc 1 1334 5 is_stmt 0 discriminator 1 view .LVU961 + 3313 0078 0123 movs r3, #1 + 3314 007a 84F84430 strb r3, [r4, #68] + 3315 007e 0020 movs r0, #0 + 3316 .LVL222: + 3317 .L268: +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3318 .loc 1 1338 3 is_stmt 1 view .LVU962 +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3319 .loc 1 1339 1 is_stmt 0 view .LVU963 + 3320 0080 38BD pop {r3, r4, r5, pc} + 3321 .LVL223: + 3322 .L266: +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3323 .loc 1 1299 7 is_stmt 1 view .LVU964 + 3324 0082 0268 ldr r2, [r0] + 3325 0084 D368 ldr r3, [r2, #12] + 3326 0086 23F00403 bic r3, r3, #4 + 3327 008a D360 str r3, [r2, #12] +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3328 .loc 1 1300 7 view .LVU965 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3329 .loc 1 1315 3 view .LVU966 + 3330 008c C6E7 b .L269 + ARM GAS /tmp/ccXMh04L.s page 120 + + + 3331 .L267: +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3332 .loc 1 1306 7 view .LVU967 + 3333 008e 0268 ldr r2, [r0] + 3334 0090 D368 ldr r3, [r2, #12] + 3335 0092 23F00803 bic r3, r3, #8 + 3336 0096 D360 str r3, [r2, #12] +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3337 .loc 1 1307 7 view .LVU968 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3338 .loc 1 1315 3 view .LVU969 + 3339 0098 C0E7 b .L269 + 3340 .LVL224: + 3341 .L273: +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3342 .loc 1 1334 5 is_stmt 0 discriminator 2 view .LVU970 + 3343 009a 042D cmp r5, #4 + 3344 009c 06D0 beq .L278 +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3345 .loc 1 1334 5 discriminator 4 view .LVU971 + 3346 009e 082D cmp r5, #8 + 3347 00a0 09D0 beq .L279 +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3348 .loc 1 1334 5 discriminator 7 view .LVU972 + 3349 00a2 0123 movs r3, #1 + 3350 00a4 84F84730 strb r3, [r4, #71] + 3351 00a8 0020 movs r0, #0 + 3352 00aa E9E7 b .L268 + 3353 .L278: +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3354 .loc 1 1334 5 discriminator 3 view .LVU973 + 3355 00ac 0123 movs r3, #1 + 3356 00ae 84F84530 strb r3, [r4, #69] + 3357 00b2 0020 movs r0, #0 + 3358 00b4 E4E7 b .L268 + 3359 .L279: +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3360 .loc 1 1334 5 discriminator 6 view .LVU974 + 3361 00b6 0123 movs r3, #1 + 3362 00b8 84F84630 strb r3, [r4, #70] + 3363 00bc 0020 movs r0, #0 + 3364 00be DFE7 b .L268 + 3365 .LVL225: + 3366 .L276: +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3367 .loc 1 1287 3 view .LVU975 + 3368 00c0 0120 movs r0, #1 + 3369 .LVL226: +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3370 .loc 1 1287 3 view .LVU976 + 3371 00c2 DDE7 b .L268 + 3372 .cfi_endproc + 3373 .LFE149: + 3375 .section .text.HAL_TIMEx_PWMN_Start_DMA,"ax",%progbits + 3376 .align 1 + 3377 .global HAL_TIMEx_PWMN_Start_DMA + 3378 .syntax unified + ARM GAS /tmp/ccXMh04L.s page 121 + + + 3379 .thumb + 3380 .thumb_func + 3382 HAL_TIMEx_PWMN_Start_DMA: + 3383 .LVL227: + 3384 .LFB150: +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3385 .loc 1 1356 1 is_stmt 1 view -0 + 3386 .cfi_startproc + 3387 @ args = 0, pretend = 0, frame = 0 + 3388 @ frame_needed = 0, uses_anonymous_args = 0 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3389 .loc 1 1356 1 is_stmt 0 view .LVU978 + 3390 0000 70B5 push {r4, r5, r6, lr} + 3391 .cfi_def_cfa_offset 16 + 3392 .cfi_offset 4, -16 + 3393 .cfi_offset 5, -12 + 3394 .cfi_offset 6, -8 + 3395 .cfi_offset 14, -4 + 3396 0002 0446 mov r4, r0 + 3397 0004 1646 mov r6, r2 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 3398 .loc 1 1357 3 is_stmt 1 view .LVU979 + 3399 .LVL228: +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3400 .loc 1 1358 3 view .LVU980 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3401 .loc 1 1361 3 view .LVU981 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3402 .loc 1 1364 3 view .LVU982 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3403 .loc 1 1364 46 is_stmt 0 view .LVU983 + 3404 0006 0D46 mov r5, r1 + 3405 0008 0029 cmp r1, #0 + 3406 000a 5FD1 bne .L281 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3407 .loc 1 1364 7 discriminator 1 view .LVU984 + 3408 000c 90F84400 ldrb r0, [r0, #68] @ zero_extendqisi2 + 3409 .LVL229: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3410 .loc 1 1364 7 discriminator 1 view .LVU985 + 3411 0010 C0B2 uxtb r0, r0 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3412 .loc 1 1364 46 discriminator 1 view .LVU986 + 3413 0012 0228 cmp r0, #2 + 3414 0014 14BF ite ne + 3415 0016 0020 movne r0, #0 + 3416 0018 0120 moveq r0, #1 + 3417 .L282: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3418 .loc 1 1364 6 discriminator 12 view .LVU987 + 3419 001a 0028 cmp r0, #0 + 3420 001c 40F0DF80 bne .L299 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3421 .loc 1 1368 8 is_stmt 1 view .LVU988 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3422 .loc 1 1368 51 is_stmt 0 view .LVU989 + 3423 0020 002D cmp r5, #0 + ARM GAS /tmp/ccXMh04L.s page 122 + + + 3424 0022 6FD1 bne .L286 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3425 .loc 1 1368 12 discriminator 1 view .LVU990 + 3426 0024 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 3427 .LVL230: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3428 .loc 1 1368 12 discriminator 1 view .LVU991 + 3429 0028 D2B2 uxtb r2, r2 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3430 .loc 1 1368 51 discriminator 1 view .LVU992 + 3431 002a 012A cmp r2, #1 + 3432 002c 14BF ite ne + 3433 002e 0022 movne r2, #0 + 3434 0030 0122 moveq r2, #1 + 3435 .L287: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3436 .loc 1 1368 11 discriminator 12 view .LVU993 + 3437 0032 002A cmp r2, #0 + 3438 0034 00F0D580 beq .L300 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3439 .loc 1 1370 5 is_stmt 1 view .LVU994 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3440 .loc 1 1370 8 is_stmt 0 view .LVU995 + 3441 0038 002E cmp r6, #0 + 3442 003a 00F0D480 beq .L301 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3443 .loc 1 1370 25 discriminator 1 view .LVU996 + 3444 003e 002B cmp r3, #0 + 3445 0040 00F0D380 beq .L302 +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3446 .loc 1 1376 7 is_stmt 1 view .LVU997 + 3447 0044 002D cmp r5, #0 + 3448 0046 79D1 bne .L290 +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3449 .loc 1 1376 7 is_stmt 0 discriminator 1 view .LVU998 + 3450 0048 0222 movs r2, #2 + 3451 004a 84F84420 strb r2, [r4, #68] +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3452 .loc 1 1384 3 is_stmt 1 view .LVU999 + 3453 .L291: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3454 .loc 1 1389 7 view .LVU1000 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3455 .loc 1 1389 17 is_stmt 0 view .LVU1001 + 3456 004e 626A ldr r2, [r4, #36] +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3457 .loc 1 1389 52 view .LVU1002 + 3458 0050 6C49 ldr r1, .L316 + 3459 .LVL231: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3460 .loc 1 1389 52 view .LVU1003 + 3461 0052 9162 str r1, [r2, #40] +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3462 .loc 1 1390 7 is_stmt 1 view .LVU1004 +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3463 .loc 1 1390 17 is_stmt 0 view .LVU1005 + 3464 0054 626A ldr r2, [r4, #36] + ARM GAS /tmp/ccXMh04L.s page 123 + + +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3465 .loc 1 1390 56 view .LVU1006 + 3466 0056 6C49 ldr r1, .L316+4 + 3467 0058 D162 str r1, [r2, #44] +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3468 .loc 1 1393 7 is_stmt 1 view .LVU1007 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3469 .loc 1 1393 17 is_stmt 0 view .LVU1008 + 3470 005a 626A ldr r2, [r4, #36] +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3471 .loc 1 1393 53 view .LVU1009 + 3472 005c 6B49 ldr r1, .L316+8 + 3473 005e 1163 str r1, [r2, #48] +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3474 .loc 1 1396 7 is_stmt 1 view .LVU1010 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3475 .loc 1 1396 88 is_stmt 0 view .LVU1011 + 3476 0060 2268 ldr r2, [r4] +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3477 .loc 1 1396 11 view .LVU1012 + 3478 0062 3432 adds r2, r2, #52 + 3479 0064 3146 mov r1, r6 + 3480 0066 606A ldr r0, [r4, #36] + 3481 0068 FFF7FEFF bl HAL_DMA_Start_IT + 3482 .LVL232: +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3483 .loc 1 1396 10 discriminator 1 view .LVU1013 + 3484 006c 0028 cmp r0, #0 + 3485 006e 40F0BE80 bne .L304 +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3486 .loc 1 1403 7 is_stmt 1 view .LVU1014 + 3487 0072 2268 ldr r2, [r4] + 3488 0074 D368 ldr r3, [r2, #12] + 3489 0076 43F40073 orr r3, r3, #512 + 3490 007a D360 str r3, [r2, #12] +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3491 .loc 1 1404 7 view .LVU1015 +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3492 .loc 1 1454 3 view .LVU1016 + 3493 .L296: +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3494 .loc 1 1457 5 view .LVU1017 + 3495 007c 0422 movs r2, #4 + 3496 007e 2946 mov r1, r5 + 3497 0080 2068 ldr r0, [r4] + 3498 0082 FFF7FEFF bl TIM_CCxNChannelCmd + 3499 .LVL233: +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3500 .loc 1 1460 5 view .LVU1018 + 3501 0086 2268 ldr r2, [r4] + 3502 0088 536C ldr r3, [r2, #68] + 3503 008a 43F40043 orr r3, r3, #32768 + 3504 008e 5364 str r3, [r2, #68] +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3505 .loc 1 1463 5 view .LVU1019 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3506 .loc 1 1463 9 is_stmt 0 view .LVU1020 + ARM GAS /tmp/ccXMh04L.s page 124 + + + 3507 0090 2368 ldr r3, [r4] +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3508 .loc 1 1463 8 view .LVU1021 + 3509 0092 5F4A ldr r2, .L316+12 + 3510 0094 9342 cmp r3, r2 + 3511 0096 00F09480 beq .L297 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3512 .loc 1 1463 9 discriminator 1 view .LVU1022 + 3513 009a B3F1804F cmp r3, #1073741824 + 3514 009e 00F09080 beq .L297 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3515 .loc 1 1463 9 discriminator 2 view .LVU1023 + 3516 00a2 A2F59432 sub r2, r2, #75776 + 3517 00a6 9342 cmp r3, r2 + 3518 00a8 00F08B80 beq .L297 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3519 .loc 1 1463 9 discriminator 3 view .LVU1024 + 3520 00ac 02F58062 add r2, r2, #1024 + 3521 00b0 9342 cmp r3, r2 + 3522 00b2 00F08680 beq .L297 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3523 .loc 1 1463 9 discriminator 4 view .LVU1025 + 3524 00b6 02F59C32 add r2, r2, #79872 + 3525 00ba 9342 cmp r3, r2 + 3526 00bc 00F08180 beq .L297 +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3527 .loc 1 1473 7 is_stmt 1 view .LVU1026 + 3528 00c0 1A68 ldr r2, [r3] + 3529 00c2 42F00102 orr r2, r2, #1 + 3530 00c6 1A60 str r2, [r3] + 3531 00c8 0020 movs r0, #0 + 3532 00ca 8BE0 b .L285 + 3533 .LVL234: + 3534 .L281: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3535 .loc 1 1364 46 is_stmt 0 discriminator 2 view .LVU1027 + 3536 00cc 0429 cmp r1, #4 + 3537 00ce 09D0 beq .L310 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3538 .loc 1 1364 46 discriminator 5 view .LVU1028 + 3539 00d0 0829 cmp r1, #8 + 3540 00d2 0FD0 beq .L311 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3541 .loc 1 1364 7 discriminator 8 view .LVU1029 + 3542 00d4 90F84700 ldrb r0, [r0, #71] @ zero_extendqisi2 + 3543 .LVL235: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3544 .loc 1 1364 7 discriminator 8 view .LVU1030 + 3545 00d8 C0B2 uxtb r0, r0 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3546 .loc 1 1364 46 discriminator 8 view .LVU1031 + 3547 00da 0228 cmp r0, #2 + 3548 00dc 14BF ite ne + 3549 00de 0020 movne r0, #0 + 3550 00e0 0120 moveq r0, #1 + 3551 00e2 9AE7 b .L282 + 3552 .LVL236: + ARM GAS /tmp/ccXMh04L.s page 125 + + + 3553 .L310: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3554 .loc 1 1364 7 discriminator 4 view .LVU1032 + 3555 00e4 90F84500 ldrb r0, [r0, #69] @ zero_extendqisi2 + 3556 .LVL237: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3557 .loc 1 1364 7 discriminator 4 view .LVU1033 + 3558 00e8 C0B2 uxtb r0, r0 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3559 .loc 1 1364 46 discriminator 4 view .LVU1034 + 3560 00ea 0228 cmp r0, #2 + 3561 00ec 14BF ite ne + 3562 00ee 0020 movne r0, #0 + 3563 00f0 0120 moveq r0, #1 + 3564 00f2 92E7 b .L282 + 3565 .LVL238: + 3566 .L311: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3567 .loc 1 1364 7 discriminator 7 view .LVU1035 + 3568 00f4 90F84600 ldrb r0, [r0, #70] @ zero_extendqisi2 + 3569 .LVL239: +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3570 .loc 1 1364 7 discriminator 7 view .LVU1036 + 3571 00f8 C0B2 uxtb r0, r0 +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3572 .loc 1 1364 46 discriminator 7 view .LVU1037 + 3573 00fa 0228 cmp r0, #2 + 3574 00fc 14BF ite ne + 3575 00fe 0020 movne r0, #0 + 3576 0100 0120 moveq r0, #1 + 3577 0102 8AE7 b .L282 + 3578 .L286: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3579 .loc 1 1368 51 discriminator 2 view .LVU1038 + 3580 0104 042D cmp r5, #4 + 3581 0106 09D0 beq .L312 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3582 .loc 1 1368 51 discriminator 5 view .LVU1039 + 3583 0108 082D cmp r5, #8 + 3584 010a 0FD0 beq .L313 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3585 .loc 1 1368 12 discriminator 8 view .LVU1040 + 3586 010c 94F84720 ldrb r2, [r4, #71] @ zero_extendqisi2 + 3587 .LVL240: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3588 .loc 1 1368 12 discriminator 8 view .LVU1041 + 3589 0110 D2B2 uxtb r2, r2 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3590 .loc 1 1368 51 discriminator 8 view .LVU1042 + 3591 0112 012A cmp r2, #1 + 3592 0114 14BF ite ne + 3593 0116 0022 movne r2, #0 + 3594 0118 0122 moveq r2, #1 + 3595 011a 8AE7 b .L287 + 3596 .LVL241: + 3597 .L312: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 126 + + + 3598 .loc 1 1368 12 discriminator 4 view .LVU1043 + 3599 011c 94F84520 ldrb r2, [r4, #69] @ zero_extendqisi2 + 3600 .LVL242: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3601 .loc 1 1368 12 discriminator 4 view .LVU1044 + 3602 0120 D2B2 uxtb r2, r2 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3603 .loc 1 1368 51 discriminator 4 view .LVU1045 + 3604 0122 012A cmp r2, #1 + 3605 0124 14BF ite ne + 3606 0126 0022 movne r2, #0 + 3607 0128 0122 moveq r2, #1 + 3608 012a 82E7 b .L287 + 3609 .LVL243: + 3610 .L313: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3611 .loc 1 1368 12 discriminator 7 view .LVU1046 + 3612 012c 94F84620 ldrb r2, [r4, #70] @ zero_extendqisi2 + 3613 .LVL244: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3614 .loc 1 1368 12 discriminator 7 view .LVU1047 + 3615 0130 D2B2 uxtb r2, r2 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3616 .loc 1 1368 51 discriminator 7 view .LVU1048 + 3617 0132 012A cmp r2, #1 + 3618 0134 14BF ite ne + 3619 0136 0022 movne r2, #0 + 3620 0138 0122 moveq r2, #1 + 3621 013a 7AE7 b .L287 + 3622 .L290: +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3623 .loc 1 1376 7 discriminator 2 view .LVU1049 + 3624 013c 042D cmp r5, #4 + 3625 013e 0DD0 beq .L314 +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3626 .loc 1 1376 7 discriminator 4 view .LVU1050 + 3627 0140 082D cmp r5, #8 + 3628 0142 25D0 beq .L315 +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3629 .loc 1 1376 7 discriminator 7 view .LVU1051 + 3630 0144 0222 movs r2, #2 + 3631 0146 84F84720 strb r2, [r4, #71] +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3632 .loc 1 1384 3 is_stmt 1 view .LVU1052 + 3633 014a 042D cmp r5, #4 + 3634 014c 09D0 beq .L293 + 3635 014e 082D cmp r5, #8 + 3636 0150 21D0 beq .L295 + 3637 0152 002D cmp r5, #0 + 3638 0154 3FF47BAF beq .L291 + 3639 0158 0120 movs r0, #1 + 3640 015a 43E0 b .L285 + 3641 .L314: +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3642 .loc 1 1376 7 is_stmt 0 discriminator 3 view .LVU1053 + 3643 015c 0222 movs r2, #2 + 3644 015e 84F84520 strb r2, [r4, #69] + ARM GAS /tmp/ccXMh04L.s page 127 + + +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3645 .loc 1 1384 3 is_stmt 1 view .LVU1054 + 3646 .L293: +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3647 .loc 1 1410 7 view .LVU1055 +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3648 .loc 1 1410 17 is_stmt 0 view .LVU1056 + 3649 0162 A26A ldr r2, [r4, #40] +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3650 .loc 1 1410 52 view .LVU1057 + 3651 0164 2749 ldr r1, .L316 + 3652 .LVL245: +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3653 .loc 1 1410 52 view .LVU1058 + 3654 0166 9162 str r1, [r2, #40] +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3655 .loc 1 1411 7 is_stmt 1 view .LVU1059 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3656 .loc 1 1411 17 is_stmt 0 view .LVU1060 + 3657 0168 A26A ldr r2, [r4, #40] +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3658 .loc 1 1411 56 view .LVU1061 + 3659 016a 2749 ldr r1, .L316+4 + 3660 016c D162 str r1, [r2, #44] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3661 .loc 1 1414 7 is_stmt 1 view .LVU1062 +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3662 .loc 1 1414 17 is_stmt 0 view .LVU1063 + 3663 016e A26A ldr r2, [r4, #40] +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3664 .loc 1 1414 53 view .LVU1064 + 3665 0170 2649 ldr r1, .L316+8 + 3666 0172 1163 str r1, [r2, #48] +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3667 .loc 1 1417 7 is_stmt 1 view .LVU1065 +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3668 .loc 1 1417 88 is_stmt 0 view .LVU1066 + 3669 0174 2268 ldr r2, [r4] +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3670 .loc 1 1417 11 view .LVU1067 + 3671 0176 3832 adds r2, r2, #56 + 3672 0178 3146 mov r1, r6 + 3673 017a A06A ldr r0, [r4, #40] + 3674 017c FFF7FEFF bl HAL_DMA_Start_IT + 3675 .LVL246: +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3676 .loc 1 1417 10 discriminator 1 view .LVU1068 + 3677 0180 0028 cmp r0, #0 + 3678 0182 36D1 bne .L305 +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3679 .loc 1 1424 7 is_stmt 1 view .LVU1069 + 3680 0184 2268 ldr r2, [r4] + 3681 0186 D368 ldr r3, [r2, #12] + 3682 0188 43F48063 orr r3, r3, #1024 + 3683 018c D360 str r3, [r2, #12] +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3684 .loc 1 1425 7 view .LVU1070 + ARM GAS /tmp/ccXMh04L.s page 128 + + +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3685 .loc 1 1454 3 view .LVU1071 + 3686 018e 75E7 b .L296 + 3687 .LVL247: + 3688 .L315: +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3689 .loc 1 1376 7 is_stmt 0 discriminator 6 view .LVU1072 + 3690 0190 0222 movs r2, #2 + 3691 0192 84F84620 strb r2, [r4, #70] +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3692 .loc 1 1384 3 is_stmt 1 view .LVU1073 + 3693 .L295: +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3694 .loc 1 1431 7 view .LVU1074 +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3695 .loc 1 1431 17 is_stmt 0 view .LVU1075 + 3696 0196 E26A ldr r2, [r4, #44] +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3697 .loc 1 1431 52 view .LVU1076 + 3698 0198 1A49 ldr r1, .L316 + 3699 .LVL248: +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3700 .loc 1 1431 52 view .LVU1077 + 3701 019a 9162 str r1, [r2, #40] +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3702 .loc 1 1432 7 is_stmt 1 view .LVU1078 +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3703 .loc 1 1432 17 is_stmt 0 view .LVU1079 + 3704 019c E26A ldr r2, [r4, #44] +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3705 .loc 1 1432 56 view .LVU1080 + 3706 019e 1A49 ldr r1, .L316+4 + 3707 01a0 D162 str r1, [r2, #44] +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3708 .loc 1 1435 7 is_stmt 1 view .LVU1081 +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3709 .loc 1 1435 17 is_stmt 0 view .LVU1082 + 3710 01a2 E26A ldr r2, [r4, #44] +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3711 .loc 1 1435 53 view .LVU1083 + 3712 01a4 1949 ldr r1, .L316+8 + 3713 01a6 1163 str r1, [r2, #48] +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3714 .loc 1 1438 7 is_stmt 1 view .LVU1084 +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3715 .loc 1 1438 88 is_stmt 0 view .LVU1085 + 3716 01a8 2268 ldr r2, [r4] +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3717 .loc 1 1438 11 view .LVU1086 + 3718 01aa 3C32 adds r2, r2, #60 + 3719 01ac 3146 mov r1, r6 + 3720 01ae E06A ldr r0, [r4, #44] + 3721 01b0 FFF7FEFF bl HAL_DMA_Start_IT + 3722 .LVL249: +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** Length) != HAL_OK) + 3723 .loc 1 1438 10 discriminator 1 view .LVU1087 + 3724 01b4 F8B9 cbnz r0, .L306 + ARM GAS /tmp/ccXMh04L.s page 129 + + +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3725 .loc 1 1445 7 is_stmt 1 view .LVU1088 + 3726 01b6 2268 ldr r2, [r4] + 3727 01b8 D368 ldr r3, [r2, #12] + 3728 01ba 43F40063 orr r3, r3, #2048 + 3729 01be D360 str r3, [r2, #12] +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3730 .loc 1 1446 7 view .LVU1089 +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3731 .loc 1 1454 3 view .LVU1090 + 3732 01c0 5CE7 b .L296 + 3733 .L297: +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3734 .loc 1 1465 7 view .LVU1091 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3735 .loc 1 1465 31 is_stmt 0 view .LVU1092 + 3736 01c2 9968 ldr r1, [r3, #8] +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3737 .loc 1 1465 15 view .LVU1093 + 3738 01c4 134A ldr r2, .L316+16 + 3739 01c6 0A40 ands r2, r2, r1 + 3740 .LVL250: +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3741 .loc 1 1466 7 is_stmt 1 view .LVU1094 +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3742 .loc 1 1466 10 is_stmt 0 view .LVU1095 + 3743 01c8 062A cmp r2, #6 + 3744 01ca 16D0 beq .L307 +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3745 .loc 1 1466 11 discriminator 1 view .LVU1096 + 3746 01cc B2F5803F cmp r2, #65536 + 3747 01d0 15D0 beq .L308 +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3748 .loc 1 1468 9 is_stmt 1 view .LVU1097 + 3749 01d2 1A68 ldr r2, [r3] + 3750 .LVL251: +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3751 .loc 1 1468 9 is_stmt 0 view .LVU1098 + 3752 01d4 42F00102 orr r2, r2, #1 + 3753 01d8 1A60 str r2, [r3] + 3754 01da 0020 movs r0, #0 + 3755 01dc 02E0 b .L285 + 3756 .LVL252: + 3757 .L299: +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3758 .loc 1 1366 12 view .LVU1099 + 3759 01de 0220 movs r0, #2 + 3760 01e0 00E0 b .L285 + 3761 .LVL253: + 3762 .L300: +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3763 .loc 1 1381 12 view .LVU1100 + 3764 01e2 0120 movs r0, #1 + 3765 .LVL254: + 3766 .L285: +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3767 .loc 1 1479 1 view .LVU1101 + ARM GAS /tmp/ccXMh04L.s page 130 + + + 3768 01e4 70BD pop {r4, r5, r6, pc} + 3769 .LVL255: + 3770 .L301: +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3771 .loc 1 1372 14 view .LVU1102 + 3772 01e6 0120 movs r0, #1 + 3773 01e8 FCE7 b .L285 + 3774 .L302: + 3775 01ea 0120 movs r0, #1 + 3776 01ec FAE7 b .L285 + 3777 .LVL256: + 3778 .L304: +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3779 .loc 1 1400 16 view .LVU1103 + 3780 01ee 0120 movs r0, #1 + 3781 01f0 F8E7 b .L285 + 3782 .L305: +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3783 .loc 1 1421 16 view .LVU1104 + 3784 01f2 0120 movs r0, #1 + 3785 01f4 F6E7 b .L285 + 3786 .L306: +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3787 .loc 1 1442 16 view .LVU1105 + 3788 01f6 0120 movs r0, #1 + 3789 01f8 F4E7 b .L285 + 3790 .LVL257: + 3791 .L307: +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3792 .loc 1 1442 16 view .LVU1106 + 3793 01fa 0020 movs r0, #0 + 3794 01fc F2E7 b .L285 + 3795 .L308: + 3796 01fe 0020 movs r0, #0 + 3797 0200 F0E7 b .L285 + 3798 .L317: + 3799 0202 00BF .align 2 + 3800 .L316: + 3801 0204 00000000 .word TIM_DMADelayPulseNCplt + 3802 0208 00000000 .word TIM_DMADelayPulseHalfCplt + 3803 020c 00000000 .word TIM_DMAErrorCCxN + 3804 0210 002C0140 .word 1073818624 + 3805 0214 07000100 .word 65543 + 3806 .cfi_endproc + 3807 .LFE150: + 3809 .section .text.HAL_TIMEx_PWMN_Stop_DMA,"ax",%progbits + 3810 .align 1 + 3811 .global HAL_TIMEx_PWMN_Stop_DMA + 3812 .syntax unified + 3813 .thumb + 3814 .thumb_func + 3816 HAL_TIMEx_PWMN_Stop_DMA: + 3817 .LVL258: + 3818 .LFB151: +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3819 .loc 1 1493 1 is_stmt 1 view -0 + 3820 .cfi_startproc + ARM GAS /tmp/ccXMh04L.s page 131 + + + 3821 @ args = 0, pretend = 0, frame = 0 + 3822 @ frame_needed = 0, uses_anonymous_args = 0 +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3823 .loc 1 1493 1 is_stmt 0 view .LVU1108 + 3824 0000 38B5 push {r3, r4, r5, lr} + 3825 .cfi_def_cfa_offset 16 + 3826 .cfi_offset 3, -16 + 3827 .cfi_offset 4, -12 + 3828 .cfi_offset 5, -8 + 3829 .cfi_offset 14, -4 + 3830 0002 0446 mov r4, r0 + 3831 0004 0D46 mov r5, r1 +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3832 .loc 1 1494 3 is_stmt 1 view .LVU1109 + 3833 .LVL259: +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3834 .loc 1 1497 3 view .LVU1110 +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3835 .loc 1 1499 3 view .LVU1111 + 3836 0006 0429 cmp r1, #4 + 3837 0008 34D0 beq .L319 + 3838 000a 0829 cmp r1, #8 + 3839 000c 3BD0 beq .L320 + 3840 000e 0029 cmp r1, #0 + 3841 0010 55D1 bne .L328 +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 3842 .loc 1 1504 7 view .LVU1112 + 3843 0012 0268 ldr r2, [r0] + 3844 0014 D368 ldr r3, [r2, #12] + 3845 0016 23F40073 bic r3, r3, #512 + 3846 001a D360 str r3, [r2, #12] +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3847 .loc 1 1505 7 view .LVU1113 +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3848 .loc 1 1505 13 is_stmt 0 view .LVU1114 + 3849 001c 406A ldr r0, [r0, #36] + 3850 .LVL260: +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3851 .loc 1 1505 13 view .LVU1115 + 3852 001e FFF7FEFF bl HAL_DMA_Abort_IT + 3853 .LVL261: +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3854 .loc 1 1506 7 is_stmt 1 view .LVU1116 +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3855 .loc 1 1530 3 view .LVU1117 + 3856 .L322: +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3857 .loc 1 1533 5 view .LVU1118 + 3858 0022 0022 movs r2, #0 + 3859 0024 2946 mov r1, r5 + 3860 0026 2068 ldr r0, [r4] + 3861 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 3862 .LVL262: +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3863 .loc 1 1536 5 view .LVU1119 +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3864 .loc 1 1536 5 view .LVU1120 + ARM GAS /tmp/ccXMh04L.s page 132 + + + 3865 002c 2368 ldr r3, [r4] + 3866 002e 196A ldr r1, [r3, #32] + 3867 0030 41F21112 movw r2, #4369 + 3868 0034 1142 tst r1, r2 + 3869 0036 08D1 bne .L323 +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3870 .loc 1 1536 5 discriminator 1 view .LVU1121 + 3871 0038 196A ldr r1, [r3, #32] + 3872 003a 40F24442 movw r2, #1092 + 3873 003e 1142 tst r1, r2 + 3874 0040 03D1 bne .L323 +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3875 .loc 1 1536 5 discriminator 3 view .LVU1122 + 3876 0042 5A6C ldr r2, [r3, #68] + 3877 0044 22F40042 bic r2, r2, #32768 + 3878 0048 5A64 str r2, [r3, #68] + 3879 .L323: +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3880 .loc 1 1536 5 discriminator 5 view .LVU1123 +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3881 .loc 1 1539 5 view .LVU1124 +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3882 .loc 1 1539 5 view .LVU1125 + 3883 004a 2368 ldr r3, [r4] + 3884 004c 196A ldr r1, [r3, #32] + 3885 004e 41F21112 movw r2, #4369 + 3886 0052 1142 tst r1, r2 + 3887 0054 08D1 bne .L324 +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3888 .loc 1 1539 5 discriminator 1 view .LVU1126 + 3889 0056 196A ldr r1, [r3, #32] + 3890 0058 40F24442 movw r2, #1092 + 3891 005c 1142 tst r1, r2 + 3892 005e 03D1 bne .L324 +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3893 .loc 1 1539 5 discriminator 3 view .LVU1127 + 3894 0060 1A68 ldr r2, [r3] + 3895 0062 22F00102 bic r2, r2, #1 + 3896 0066 1A60 str r2, [r3] + 3897 .L324: +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3898 .loc 1 1539 5 discriminator 5 view .LVU1128 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3899 .loc 1 1542 5 view .LVU1129 + 3900 0068 B5B9 cbnz r5, .L325 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3901 .loc 1 1542 5 is_stmt 0 discriminator 1 view .LVU1130 + 3902 006a 0123 movs r3, #1 + 3903 006c 84F84430 strb r3, [r4, #68] + 3904 0070 0020 movs r0, #0 + 3905 .L321: + 3906 .LVL263: +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3907 .loc 1 1546 3 is_stmt 1 view .LVU1131 +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 3908 .loc 1 1547 1 is_stmt 0 view .LVU1132 + 3909 0072 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/ccXMh04L.s page 133 + + + 3910 .LVL264: + 3911 .L319: +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 3912 .loc 1 1512 7 is_stmt 1 view .LVU1133 + 3913 0074 0268 ldr r2, [r0] + 3914 0076 D368 ldr r3, [r2, #12] + 3915 0078 23F48063 bic r3, r3, #1024 + 3916 007c D360 str r3, [r2, #12] +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3917 .loc 1 1513 7 view .LVU1134 +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3918 .loc 1 1513 13 is_stmt 0 view .LVU1135 + 3919 007e 806A ldr r0, [r0, #40] + 3920 .LVL265: +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3921 .loc 1 1513 13 view .LVU1136 + 3922 0080 FFF7FEFF bl HAL_DMA_Abort_IT + 3923 .LVL266: +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3924 .loc 1 1514 7 is_stmt 1 view .LVU1137 +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3925 .loc 1 1530 3 view .LVU1138 + 3926 0084 CDE7 b .L322 + 3927 .LVL267: + 3928 .L320: +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 3929 .loc 1 1520 7 view .LVU1139 + 3930 0086 0268 ldr r2, [r0] + 3931 0088 D368 ldr r3, [r2, #12] + 3932 008a 23F40063 bic r3, r3, #2048 + 3933 008e D360 str r3, [r2, #12] +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3934 .loc 1 1521 7 view .LVU1140 +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3935 .loc 1 1521 13 is_stmt 0 view .LVU1141 + 3936 0090 C06A ldr r0, [r0, #44] + 3937 .LVL268: +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** break; + 3938 .loc 1 1521 13 view .LVU1142 + 3939 0092 FFF7FEFF bl HAL_DMA_Abort_IT + 3940 .LVL269: +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3941 .loc 1 1522 7 is_stmt 1 view .LVU1143 +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3942 .loc 1 1530 3 view .LVU1144 + 3943 0096 C4E7 b .L322 + 3944 .L325: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3945 .loc 1 1542 5 is_stmt 0 discriminator 2 view .LVU1145 + 3946 0098 042D cmp r5, #4 + 3947 009a 06D0 beq .L330 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3948 .loc 1 1542 5 discriminator 4 view .LVU1146 + 3949 009c 082D cmp r5, #8 + 3950 009e 09D0 beq .L331 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3951 .loc 1 1542 5 discriminator 7 view .LVU1147 + ARM GAS /tmp/ccXMh04L.s page 134 + + + 3952 00a0 0123 movs r3, #1 + 3953 00a2 84F84730 strb r3, [r4, #71] + 3954 00a6 0020 movs r0, #0 + 3955 00a8 E3E7 b .L321 + 3956 .L330: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3957 .loc 1 1542 5 discriminator 3 view .LVU1148 + 3958 00aa 0123 movs r3, #1 + 3959 00ac 84F84530 strb r3, [r4, #69] + 3960 00b0 0020 movs r0, #0 + 3961 00b2 DEE7 b .L321 + 3962 .L331: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 3963 .loc 1 1542 5 discriminator 6 view .LVU1149 + 3964 00b4 0123 movs r3, #1 + 3965 00b6 84F84630 strb r3, [r4, #70] + 3966 00ba 0020 movs r0, #0 + 3967 00bc D9E7 b .L321 + 3968 .LVL270: + 3969 .L328: +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3970 .loc 1 1499 3 view .LVU1150 + 3971 00be 0120 movs r0, #1 + 3972 .LVL271: +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 3973 .loc 1 1499 3 view .LVU1151 + 3974 00c0 D7E7 b .L321 + 3975 .cfi_endproc + 3976 .LFE151: + 3978 .section .text.HAL_TIMEx_OnePulseN_Start,"ax",%progbits + 3979 .align 1 + 3980 .global HAL_TIMEx_OnePulseN_Start + 3981 .syntax unified + 3982 .thumb + 3983 .thumb_func + 3985 HAL_TIMEx_OnePulseN_Start: + 3986 .LVL272: + 3987 .LFB152: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 3988 .loc 1 1584 1 is_stmt 1 view -0 + 3989 .cfi_startproc + 3990 @ args = 0, pretend = 0, frame = 0 + 3991 @ frame_needed = 0, uses_anonymous_args = 0 +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 3992 .loc 1 1584 1 is_stmt 0 view .LVU1153 + 3993 0000 38B5 push {r3, r4, r5, lr} + 3994 .cfi_def_cfa_offset 16 + 3995 .cfi_offset 3, -16 + 3996 .cfi_offset 4, -12 + 3997 .cfi_offset 5, -8 + 3998 .cfi_offset 14, -4 + 3999 0002 0446 mov r4, r0 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4000 .loc 1 1585 3 is_stmt 1 view .LVU1154 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4001 .loc 1 1585 77 is_stmt 0 view .LVU1155 + 4002 0004 8E46 mov lr, r1 + ARM GAS /tmp/ccXMh04L.s page 135 + + + 4003 0006 C1B9 cbnz r1, .L335 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4004 .loc 1 1585 77 discriminator 1 view .LVU1156 + 4005 0008 0425 movs r5, #4 + 4006 .L333: + 4007 .LVL273: +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4008 .loc 1 1586 3 is_stmt 1 view .LVU1157 +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4009 .loc 1 1586 31 is_stmt 0 view .LVU1158 + 4010 000a 94F83E00 ldrb r0, [r4, #62] @ zero_extendqisi2 + 4011 .LVL274: +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4012 .loc 1 1586 31 view .LVU1159 + 4013 000e C0B2 uxtb r0, r0 + 4014 .LVL275: +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4015 .loc 1 1587 3 is_stmt 1 view .LVU1160 +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4016 .loc 1 1587 31 is_stmt 0 view .LVU1161 + 4017 0010 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 4018 0014 DBB2 uxtb r3, r3 + 4019 .LVL276: +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4020 .loc 1 1588 3 is_stmt 1 view .LVU1162 +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4021 .loc 1 1588 31 is_stmt 0 view .LVU1163 + 4022 0016 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 4023 001a D2B2 uxtb r2, r2 + 4024 .LVL277: +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4025 .loc 1 1589 3 is_stmt 1 view .LVU1164 +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4026 .loc 1 1589 31 is_stmt 0 view .LVU1165 + 4027 001c 94F845C0 ldrb ip, [r4, #69] @ zero_extendqisi2 + 4028 0020 5FFA8CFC uxtb ip, ip + 4029 .LVL278: +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4030 .loc 1 1592 3 is_stmt 1 view .LVU1166 +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4031 .loc 1 1595 3 view .LVU1167 +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4032 .loc 1 1595 6 is_stmt 0 view .LVU1168 + 4033 0024 0128 cmp r0, #1 + 4034 0026 24D1 bne .L336 +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 4035 .loc 1 1596 7 view .LVU1169 + 4036 0028 012B cmp r3, #1 + 4037 002a 23D1 bne .L334 +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 4038 .loc 1 1597 7 view .LVU1170 + 4039 002c 012A cmp r2, #1 + 4040 002e 22D1 bne .L337 +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4041 .loc 1 1598 7 view .LVU1171 + 4042 0030 BCF1010F cmp ip, #1 + 4043 0034 03D0 beq .L340 + ARM GAS /tmp/ccXMh04L.s page 136 + + +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4044 .loc 1 1600 12 view .LVU1172 + 4045 0036 1046 mov r0, r2 + 4046 .LVL279: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4047 .loc 1 1600 12 view .LVU1173 + 4048 0038 1CE0 b .L334 + 4049 .LVL280: + 4050 .L335: +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4051 .loc 1 1585 77 discriminator 2 view .LVU1174 + 4052 003a 0025 movs r5, #0 + 4053 003c E5E7 b .L333 + 4054 .LVL281: + 4055 .L340: +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4056 .loc 1 1604 3 is_stmt 1 view .LVU1175 + 4057 003e 0223 movs r3, #2 + 4058 .LVL282: +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4059 .loc 1 1604 3 is_stmt 0 view .LVU1176 + 4060 0040 84F83E30 strb r3, [r4, #62] +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4061 .loc 1 1605 3 is_stmt 1 view .LVU1177 + 4062 0044 84F83F30 strb r3, [r4, #63] +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4063 .loc 1 1606 3 view .LVU1178 + 4064 0048 84F84430 strb r3, [r4, #68] +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4065 .loc 1 1607 3 view .LVU1179 + 4066 004c 84F84530 strb r3, [r4, #69] +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4067 .loc 1 1610 3 view .LVU1180 + 4068 0050 0422 movs r2, #4 + 4069 .LVL283: +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4070 .loc 1 1610 3 is_stmt 0 view .LVU1181 + 4071 0052 7146 mov r1, lr + 4072 .LVL284: +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4073 .loc 1 1610 3 view .LVU1182 + 4074 0054 2068 ldr r0, [r4] + 4075 .LVL285: +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4076 .loc 1 1610 3 view .LVU1183 + 4077 0056 FFF7FEFF bl TIM_CCxNChannelCmd + 4078 .LVL286: +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4079 .loc 1 1611 3 is_stmt 1 view .LVU1184 + 4080 005a 0122 movs r2, #1 + 4081 005c 2946 mov r1, r5 + 4082 005e 2068 ldr r0, [r4] + 4083 0060 FFF7FEFF bl TIM_CCxChannelCmd + 4084 .LVL287: +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4085 .loc 1 1614 3 view .LVU1185 + 4086 0064 2268 ldr r2, [r4] + ARM GAS /tmp/ccXMh04L.s page 137 + + + 4087 0066 536C ldr r3, [r2, #68] + 4088 0068 43F40043 orr r3, r3, #32768 + 4089 006c 5364 str r3, [r2, #68] +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4090 .loc 1 1617 3 view .LVU1186 +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4091 .loc 1 1617 10 is_stmt 0 view .LVU1187 + 4092 006e 0020 movs r0, #0 + 4093 0070 00E0 b .L334 + 4094 .LVL288: + 4095 .L336: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4096 .loc 1 1600 12 view .LVU1188 + 4097 0072 0120 movs r0, #1 + 4098 .LVL289: + 4099 .L334: +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4100 .loc 1 1618 1 view .LVU1189 + 4101 0074 38BD pop {r3, r4, r5, pc} + 4102 .LVL290: + 4103 .L337: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4104 .loc 1 1600 12 view .LVU1190 + 4105 0076 1846 mov r0, r3 + 4106 .LVL291: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4107 .loc 1 1600 12 view .LVU1191 + 4108 0078 FCE7 b .L334 + 4109 .cfi_endproc + 4110 .LFE152: + 4112 .section .text.HAL_TIMEx_OnePulseN_Stop,"ax",%progbits + 4113 .align 1 + 4114 .global HAL_TIMEx_OnePulseN_Stop + 4115 .syntax unified + 4116 .thumb + 4117 .thumb_func + 4119 HAL_TIMEx_OnePulseN_Stop: + 4120 .LVL292: + 4121 .LFB153: +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4122 .loc 1 1633 1 is_stmt 1 view -0 + 4123 .cfi_startproc + 4124 @ args = 0, pretend = 0, frame = 0 + 4125 @ frame_needed = 0, uses_anonymous_args = 0 +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4126 .loc 1 1633 1 is_stmt 0 view .LVU1193 + 4127 0000 38B5 push {r3, r4, r5, lr} + 4128 .cfi_def_cfa_offset 16 + 4129 .cfi_offset 3, -16 + 4130 .cfi_offset 4, -12 + 4131 .cfi_offset 5, -8 + 4132 .cfi_offset 14, -4 + 4133 0002 0446 mov r4, r0 +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4134 .loc 1 1634 3 is_stmt 1 view .LVU1194 +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4135 .loc 1 1634 77 is_stmt 0 view .LVU1195 + ARM GAS /tmp/ccXMh04L.s page 138 + + + 4136 0004 0029 cmp r1, #0 + 4137 0006 32D1 bne .L345 +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4138 .loc 1 1634 77 discriminator 1 view .LVU1196 + 4139 0008 0425 movs r5, #4 + 4140 .L342: + 4141 .LVL293: +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4142 .loc 1 1637 3 is_stmt 1 view .LVU1197 +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4143 .loc 1 1640 3 view .LVU1198 + 4144 000a 0022 movs r2, #0 + 4145 000c 2068 ldr r0, [r4] + 4146 .LVL294: +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4147 .loc 1 1640 3 is_stmt 0 view .LVU1199 + 4148 000e FFF7FEFF bl TIM_CCxNChannelCmd + 4149 .LVL295: +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4150 .loc 1 1641 3 is_stmt 1 view .LVU1200 + 4151 0012 0022 movs r2, #0 + 4152 0014 2946 mov r1, r5 + 4153 0016 2068 ldr r0, [r4] + 4154 0018 FFF7FEFF bl TIM_CCxChannelCmd + 4155 .LVL296: +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4156 .loc 1 1644 3 view .LVU1201 +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4157 .loc 1 1644 3 view .LVU1202 + 4158 001c 2368 ldr r3, [r4] + 4159 001e 196A ldr r1, [r3, #32] + 4160 0020 41F21112 movw r2, #4369 + 4161 0024 1142 tst r1, r2 + 4162 0026 08D1 bne .L343 +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4163 .loc 1 1644 3 discriminator 1 view .LVU1203 + 4164 0028 196A ldr r1, [r3, #32] + 4165 002a 40F24442 movw r2, #1092 + 4166 002e 1142 tst r1, r2 + 4167 0030 03D1 bne .L343 +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4168 .loc 1 1644 3 discriminator 3 view .LVU1204 + 4169 0032 5A6C ldr r2, [r3, #68] + 4170 0034 22F40042 bic r2, r2, #32768 + 4171 0038 5A64 str r2, [r3, #68] + 4172 .L343: +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4173 .loc 1 1644 3 discriminator 5 view .LVU1205 +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4174 .loc 1 1647 3 view .LVU1206 +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4175 .loc 1 1647 3 view .LVU1207 + 4176 003a 2368 ldr r3, [r4] + 4177 003c 196A ldr r1, [r3, #32] + 4178 003e 41F21112 movw r2, #4369 + 4179 0042 1142 tst r1, r2 + 4180 0044 08D1 bne .L344 + ARM GAS /tmp/ccXMh04L.s page 139 + + +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4181 .loc 1 1647 3 discriminator 1 view .LVU1208 + 4182 0046 196A ldr r1, [r3, #32] + 4183 0048 40F24442 movw r2, #1092 + 4184 004c 1142 tst r1, r2 + 4185 004e 03D1 bne .L344 +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4186 .loc 1 1647 3 discriminator 3 view .LVU1209 + 4187 0050 1A68 ldr r2, [r3] + 4188 0052 22F00102 bic r2, r2, #1 + 4189 0056 1A60 str r2, [r3] + 4190 .L344: +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4191 .loc 1 1647 3 discriminator 5 view .LVU1210 +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4192 .loc 1 1650 3 view .LVU1211 + 4193 0058 0123 movs r3, #1 + 4194 005a 84F83E30 strb r3, [r4, #62] +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4195 .loc 1 1651 3 view .LVU1212 + 4196 005e 84F83F30 strb r3, [r4, #63] +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4197 .loc 1 1652 3 view .LVU1213 + 4198 0062 84F84430 strb r3, [r4, #68] +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4199 .loc 1 1653 3 view .LVU1214 + 4200 0066 84F84530 strb r3, [r4, #69] +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4201 .loc 1 1656 3 view .LVU1215 +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4202 .loc 1 1657 1 is_stmt 0 view .LVU1216 + 4203 006a 0020 movs r0, #0 + 4204 006c 38BD pop {r3, r4, r5, pc} + 4205 .LVL297: + 4206 .L345: +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4207 .loc 1 1634 77 discriminator 2 view .LVU1217 + 4208 006e 0025 movs r5, #0 + 4209 0070 CBE7 b .L342 + 4210 .cfi_endproc + 4211 .LFE153: + 4213 .section .text.HAL_TIMEx_OnePulseN_Start_IT,"ax",%progbits + 4214 .align 1 + 4215 .global HAL_TIMEx_OnePulseN_Start_IT + 4216 .syntax unified + 4217 .thumb + 4218 .thumb_func + 4220 HAL_TIMEx_OnePulseN_Start_IT: + 4221 .LVL298: + 4222 .LFB154: +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4223 .loc 1 1672 1 is_stmt 1 view -0 + 4224 .cfi_startproc + 4225 @ args = 0, pretend = 0, frame = 0 + 4226 @ frame_needed = 0, uses_anonymous_args = 0 +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4227 .loc 1 1672 1 is_stmt 0 view .LVU1219 + ARM GAS /tmp/ccXMh04L.s page 140 + + + 4228 0000 38B5 push {r3, r4, r5, lr} + 4229 .cfi_def_cfa_offset 16 + 4230 .cfi_offset 3, -16 + 4231 .cfi_offset 4, -12 + 4232 .cfi_offset 5, -8 + 4233 .cfi_offset 14, -4 + 4234 0002 0446 mov r4, r0 +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4235 .loc 1 1673 3 is_stmt 1 view .LVU1220 +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4236 .loc 1 1673 77 is_stmt 0 view .LVU1221 + 4237 0004 8E46 mov lr, r1 + 4238 0006 C1B9 cbnz r1, .L350 +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4239 .loc 1 1673 77 discriminator 1 view .LVU1222 + 4240 0008 0425 movs r5, #4 + 4241 .L348: + 4242 .LVL299: +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4243 .loc 1 1674 3 is_stmt 1 view .LVU1223 +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4244 .loc 1 1674 31 is_stmt 0 view .LVU1224 + 4245 000a 94F83E00 ldrb r0, [r4, #62] @ zero_extendqisi2 + 4246 .LVL300: +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4247 .loc 1 1674 31 view .LVU1225 + 4248 000e C0B2 uxtb r0, r0 + 4249 .LVL301: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4250 .loc 1 1675 3 is_stmt 1 view .LVU1226 +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4251 .loc 1 1675 31 is_stmt 0 view .LVU1227 + 4252 0010 94F83F30 ldrb r3, [r4, #63] @ zero_extendqisi2 + 4253 0014 DBB2 uxtb r3, r3 + 4254 .LVL302: +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4255 .loc 1 1676 3 is_stmt 1 view .LVU1228 +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4256 .loc 1 1676 31 is_stmt 0 view .LVU1229 + 4257 0016 94F84420 ldrb r2, [r4, #68] @ zero_extendqisi2 + 4258 001a D2B2 uxtb r2, r2 + 4259 .LVL303: +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4260 .loc 1 1677 3 is_stmt 1 view .LVU1230 +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4261 .loc 1 1677 31 is_stmt 0 view .LVU1231 + 4262 001c 94F845C0 ldrb ip, [r4, #69] @ zero_extendqisi2 + 4263 0020 5FFA8CFC uxtb ip, ip + 4264 .LVL304: +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4265 .loc 1 1680 3 is_stmt 1 view .LVU1232 +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4266 .loc 1 1683 3 view .LVU1233 +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4267 .loc 1 1683 6 is_stmt 0 view .LVU1234 + 4268 0024 0128 cmp r0, #1 + 4269 0026 2ED1 bne .L351 + ARM GAS /tmp/ccXMh04L.s page 141 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 4270 .loc 1 1684 7 view .LVU1235 + 4271 0028 012B cmp r3, #1 + 4272 002a 2DD1 bne .L349 +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 4273 .loc 1 1685 7 view .LVU1236 + 4274 002c 012A cmp r2, #1 + 4275 002e 2CD1 bne .L352 +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4276 .loc 1 1686 7 view .LVU1237 + 4277 0030 BCF1010F cmp ip, #1 + 4278 0034 03D0 beq .L355 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4279 .loc 1 1688 12 view .LVU1238 + 4280 0036 1046 mov r0, r2 + 4281 .LVL305: +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4282 .loc 1 1688 12 view .LVU1239 + 4283 0038 26E0 b .L349 + 4284 .LVL306: + 4285 .L350: +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4286 .loc 1 1673 77 discriminator 2 view .LVU1240 + 4287 003a 0025 movs r5, #0 + 4288 003c E5E7 b .L348 + 4289 .LVL307: + 4290 .L355: +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4291 .loc 1 1692 3 is_stmt 1 view .LVU1241 + 4292 003e 0223 movs r3, #2 + 4293 .LVL308: +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4294 .loc 1 1692 3 is_stmt 0 view .LVU1242 + 4295 0040 84F83E30 strb r3, [r4, #62] +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4296 .loc 1 1693 3 is_stmt 1 view .LVU1243 + 4297 0044 84F83F30 strb r3, [r4, #63] +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4298 .loc 1 1694 3 view .LVU1244 + 4299 0048 84F84430 strb r3, [r4, #68] +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4300 .loc 1 1695 3 view .LVU1245 + 4301 004c 84F84530 strb r3, [r4, #69] +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4302 .loc 1 1698 3 view .LVU1246 + 4303 0050 2268 ldr r2, [r4] + 4304 .LVL309: +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4305 .loc 1 1698 3 is_stmt 0 view .LVU1247 + 4306 0052 D368 ldr r3, [r2, #12] + 4307 0054 43F00203 orr r3, r3, #2 + 4308 0058 D360 str r3, [r2, #12] +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4309 .loc 1 1701 3 is_stmt 1 view .LVU1248 + 4310 005a 2268 ldr r2, [r4] + 4311 005c D368 ldr r3, [r2, #12] + 4312 005e 43F00403 orr r3, r3, #4 + ARM GAS /tmp/ccXMh04L.s page 142 + + + 4313 0062 D360 str r3, [r2, #12] +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4314 .loc 1 1704 3 view .LVU1249 + 4315 0064 0422 movs r2, #4 + 4316 0066 7146 mov r1, lr + 4317 .LVL310: +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4318 .loc 1 1704 3 is_stmt 0 view .LVU1250 + 4319 0068 2068 ldr r0, [r4] + 4320 .LVL311: +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4321 .loc 1 1704 3 view .LVU1251 + 4322 006a FFF7FEFF bl TIM_CCxNChannelCmd + 4323 .LVL312: +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4324 .loc 1 1705 3 is_stmt 1 view .LVU1252 + 4325 006e 0122 movs r2, #1 + 4326 0070 2946 mov r1, r5 + 4327 0072 2068 ldr r0, [r4] + 4328 0074 FFF7FEFF bl TIM_CCxChannelCmd + 4329 .LVL313: +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4330 .loc 1 1708 3 view .LVU1253 + 4331 0078 2268 ldr r2, [r4] + 4332 007a 536C ldr r3, [r2, #68] + 4333 007c 43F40043 orr r3, r3, #32768 + 4334 0080 5364 str r3, [r2, #68] +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4335 .loc 1 1711 3 view .LVU1254 +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4336 .loc 1 1711 10 is_stmt 0 view .LVU1255 + 4337 0082 0020 movs r0, #0 + 4338 0084 00E0 b .L349 + 4339 .LVL314: + 4340 .L351: +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4341 .loc 1 1688 12 view .LVU1256 + 4342 0086 0120 movs r0, #1 + 4343 .LVL315: + 4344 .L349: +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4345 .loc 1 1712 1 view .LVU1257 + 4346 0088 38BD pop {r3, r4, r5, pc} + 4347 .LVL316: + 4348 .L352: +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4349 .loc 1 1688 12 view .LVU1258 + 4350 008a 1846 mov r0, r3 + 4351 .LVL317: +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4352 .loc 1 1688 12 view .LVU1259 + 4353 008c FCE7 b .L349 + 4354 .cfi_endproc + 4355 .LFE154: + 4357 .section .text.HAL_TIMEx_OnePulseN_Stop_IT,"ax",%progbits + 4358 .align 1 + 4359 .global HAL_TIMEx_OnePulseN_Stop_IT + ARM GAS /tmp/ccXMh04L.s page 143 + + + 4360 .syntax unified + 4361 .thumb + 4362 .thumb_func + 4364 HAL_TIMEx_OnePulseN_Stop_IT: + 4365 .LVL318: + 4366 .LFB155: +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4367 .loc 1 1727 1 is_stmt 1 view -0 + 4368 .cfi_startproc + 4369 @ args = 0, pretend = 0, frame = 0 + 4370 @ frame_needed = 0, uses_anonymous_args = 0 +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4371 .loc 1 1727 1 is_stmt 0 view .LVU1261 + 4372 0000 38B5 push {r3, r4, r5, lr} + 4373 .cfi_def_cfa_offset 16 + 4374 .cfi_offset 3, -16 + 4375 .cfi_offset 4, -12 + 4376 .cfi_offset 5, -8 + 4377 .cfi_offset 14, -4 + 4378 0002 0446 mov r4, r0 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4379 .loc 1 1728 3 is_stmt 1 view .LVU1262 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4380 .loc 1 1728 77 is_stmt 0 view .LVU1263 + 4381 0004 0029 cmp r1, #0 + 4382 0006 3CD1 bne .L360 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4383 .loc 1 1728 77 discriminator 1 view .LVU1264 + 4384 0008 0425 movs r5, #4 + 4385 .L357: + 4386 .LVL319: +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4387 .loc 1 1731 3 is_stmt 1 view .LVU1265 +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4388 .loc 1 1734 3 view .LVU1266 + 4389 000a 2268 ldr r2, [r4] + 4390 000c D368 ldr r3, [r2, #12] + 4391 000e 23F00203 bic r3, r3, #2 + 4392 0012 D360 str r3, [r2, #12] +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4393 .loc 1 1737 3 view .LVU1267 + 4394 0014 2268 ldr r2, [r4] + 4395 0016 D368 ldr r3, [r2, #12] + 4396 0018 23F00403 bic r3, r3, #4 + 4397 001c D360 str r3, [r2, #12] +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4398 .loc 1 1740 3 view .LVU1268 + 4399 001e 0022 movs r2, #0 + 4400 0020 2068 ldr r0, [r4] + 4401 .LVL320: +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4402 .loc 1 1740 3 is_stmt 0 view .LVU1269 + 4403 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 4404 .LVL321: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4405 .loc 1 1741 3 is_stmt 1 view .LVU1270 + 4406 0026 0022 movs r2, #0 + ARM GAS /tmp/ccXMh04L.s page 144 + + + 4407 0028 2946 mov r1, r5 + 4408 002a 2068 ldr r0, [r4] + 4409 002c FFF7FEFF bl TIM_CCxChannelCmd + 4410 .LVL322: +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4411 .loc 1 1744 3 view .LVU1271 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4412 .loc 1 1744 3 view .LVU1272 + 4413 0030 2368 ldr r3, [r4] + 4414 0032 196A ldr r1, [r3, #32] + 4415 0034 41F21112 movw r2, #4369 + 4416 0038 1142 tst r1, r2 + 4417 003a 08D1 bne .L358 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4418 .loc 1 1744 3 discriminator 1 view .LVU1273 + 4419 003c 196A ldr r1, [r3, #32] + 4420 003e 40F24442 movw r2, #1092 + 4421 0042 1142 tst r1, r2 + 4422 0044 03D1 bne .L358 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4423 .loc 1 1744 3 discriminator 3 view .LVU1274 + 4424 0046 5A6C ldr r2, [r3, #68] + 4425 0048 22F40042 bic r2, r2, #32768 + 4426 004c 5A64 str r2, [r3, #68] + 4427 .L358: +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4428 .loc 1 1744 3 discriminator 5 view .LVU1275 +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4429 .loc 1 1747 3 view .LVU1276 +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4430 .loc 1 1747 3 view .LVU1277 + 4431 004e 2368 ldr r3, [r4] + 4432 0050 196A ldr r1, [r3, #32] + 4433 0052 41F21112 movw r2, #4369 + 4434 0056 1142 tst r1, r2 + 4435 0058 08D1 bne .L359 +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4436 .loc 1 1747 3 discriminator 1 view .LVU1278 + 4437 005a 196A ldr r1, [r3, #32] + 4438 005c 40F24442 movw r2, #1092 + 4439 0060 1142 tst r1, r2 + 4440 0062 03D1 bne .L359 +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4441 .loc 1 1747 3 discriminator 3 view .LVU1279 + 4442 0064 1A68 ldr r2, [r3] + 4443 0066 22F00102 bic r2, r2, #1 + 4444 006a 1A60 str r2, [r3] + 4445 .L359: +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4446 .loc 1 1747 3 discriminator 5 view .LVU1280 +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4447 .loc 1 1750 3 view .LVU1281 + 4448 006c 0123 movs r3, #1 + 4449 006e 84F83E30 strb r3, [r4, #62] +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4450 .loc 1 1751 3 view .LVU1282 + 4451 0072 84F83F30 strb r3, [r4, #63] + ARM GAS /tmp/ccXMh04L.s page 145 + + +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4452 .loc 1 1752 3 view .LVU1283 + 4453 0076 84F84430 strb r3, [r4, #68] +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4454 .loc 1 1753 3 view .LVU1284 + 4455 007a 84F84530 strb r3, [r4, #69] +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4456 .loc 1 1756 3 view .LVU1285 +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4457 .loc 1 1757 1 is_stmt 0 view .LVU1286 + 4458 007e 0020 movs r0, #0 + 4459 0080 38BD pop {r3, r4, r5, pc} + 4460 .LVL323: + 4461 .L360: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4462 .loc 1 1728 77 discriminator 2 view .LVU1287 + 4463 0082 0025 movs r5, #0 + 4464 0084 C1E7 b .L357 + 4465 .cfi_endproc + 4466 .LFE155: + 4468 .section .text.HAL_TIMEx_ConfigCommutEvent,"ax",%progbits + 4469 .align 1 + 4470 .global HAL_TIMEx_ConfigCommutEvent + 4471 .syntax unified + 4472 .thumb + 4473 .thumb_func + 4475 HAL_TIMEx_ConfigCommutEvent: + 4476 .LVL324: + 4477 .LFB156: +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4478 .loc 1 1808 1 is_stmt 1 view -0 + 4479 .cfi_startproc + 4480 @ args = 0, pretend = 0, frame = 0 + 4481 @ frame_needed = 0, uses_anonymous_args = 0 + 4482 @ link register save eliminated. +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4483 .loc 1 1808 1 is_stmt 0 view .LVU1289 + 4484 0000 0346 mov r3, r0 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 4485 .loc 1 1810 3 is_stmt 1 view .LVU1290 +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4486 .loc 1 1811 3 view .LVU1291 +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4487 .loc 1 1813 3 view .LVU1292 +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4488 .loc 1 1813 3 view .LVU1293 + 4489 0002 90F83C00 ldrb r0, [r0, #60] @ zero_extendqisi2 + 4490 .LVL325: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4491 .loc 1 1813 3 is_stmt 0 view .LVU1294 + 4492 0006 0128 cmp r0, #1 + 4493 0008 33D0 beq .L367 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4494 .loc 1 1808 1 view .LVU1295 + 4495 000a 10B4 push {r4} + 4496 .cfi_def_cfa_offset 4 + 4497 .cfi_offset 4, -4 + ARM GAS /tmp/ccXMh04L.s page 146 + + +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4498 .loc 1 1813 3 is_stmt 1 discriminator 2 view .LVU1296 + 4499 000c 0120 movs r0, #1 + 4500 000e 83F83C00 strb r0, [r3, #60] +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4501 .loc 1 1813 3 discriminator 2 view .LVU1297 +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4502 .loc 1 1815 3 view .LVU1298 + 4503 0012 2029 cmp r1, #32 + 4504 0014 03D0 beq .L364 + 4505 0016 29D8 bhi .L365 + 4506 0018 09B1 cbz r1, .L364 + 4507 001a 1029 cmp r1, #16 + 4508 001c 08D1 bne .L366 + 4509 .L364: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4510 .loc 1 1819 5 view .LVU1299 +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4511 .loc 1 1819 9 is_stmt 0 view .LVU1300 + 4512 001e 1C68 ldr r4, [r3] +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4513 .loc 1 1819 19 view .LVU1301 + 4514 0020 A068 ldr r0, [r4, #8] +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4515 .loc 1 1819 26 view .LVU1302 + 4516 0022 20F07000 bic r0, r0, #112 + 4517 0026 A060 str r0, [r4, #8] +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4518 .loc 1 1820 5 is_stmt 1 view .LVU1303 +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4519 .loc 1 1820 9 is_stmt 0 view .LVU1304 + 4520 0028 1C68 ldr r4, [r3] +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4521 .loc 1 1820 19 view .LVU1305 + 4522 002a A068 ldr r0, [r4, #8] +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4523 .loc 1 1820 26 view .LVU1306 + 4524 002c 0143 orrs r1, r1, r0 + 4525 .LVL326: +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4526 .loc 1 1820 26 view .LVU1307 + 4527 002e A160 str r1, [r4, #8] + 4528 .L366: +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4529 .loc 1 1824 3 is_stmt 1 view .LVU1308 +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4530 .loc 1 1824 7 is_stmt 0 view .LVU1309 + 4531 0030 1868 ldr r0, [r3] +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4532 .loc 1 1824 17 view .LVU1310 + 4533 0032 4168 ldr r1, [r0, #4] +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4534 .loc 1 1824 23 view .LVU1311 + 4535 0034 41F00101 orr r1, r1, #1 + 4536 0038 4160 str r1, [r0, #4] +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4537 .loc 1 1826 3 is_stmt 1 view .LVU1312 + ARM GAS /tmp/ccXMh04L.s page 147 + + +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4538 .loc 1 1826 7 is_stmt 0 view .LVU1313 + 4539 003a 1868 ldr r0, [r3] +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4540 .loc 1 1826 17 view .LVU1314 + 4541 003c 4168 ldr r1, [r0, #4] +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4542 .loc 1 1826 23 view .LVU1315 + 4543 003e 21F00401 bic r1, r1, #4 + 4544 0042 4160 str r1, [r0, #4] +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4545 .loc 1 1827 3 is_stmt 1 view .LVU1316 +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4546 .loc 1 1827 7 is_stmt 0 view .LVU1317 + 4547 0044 1868 ldr r0, [r3] +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4548 .loc 1 1827 17 view .LVU1318 + 4549 0046 4168 ldr r1, [r0, #4] +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4550 .loc 1 1827 23 view .LVU1319 + 4551 0048 0A43 orrs r2, r2, r1 + 4552 .LVL327: +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4553 .loc 1 1827 23 view .LVU1320 + 4554 004a 4260 str r2, [r0, #4] +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4555 .loc 1 1830 3 is_stmt 1 view .LVU1321 + 4556 004c 1968 ldr r1, [r3] + 4557 004e CA68 ldr r2, [r1, #12] + 4558 0050 22F02002 bic r2, r2, #32 + 4559 0054 CA60 str r2, [r1, #12] +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4560 .loc 1 1833 3 view .LVU1322 + 4561 0056 1968 ldr r1, [r3] + 4562 0058 CA68 ldr r2, [r1, #12] + 4563 005a 22F40052 bic r2, r2, #8192 + 4564 005e CA60 str r2, [r1, #12] +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4565 .loc 1 1835 3 view .LVU1323 +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4566 .loc 1 1835 3 view .LVU1324 + 4567 0060 0020 movs r0, #0 + 4568 0062 83F83C00 strb r0, [r3, #60] +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4569 .loc 1 1835 3 view .LVU1325 +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4570 .loc 1 1837 3 view .LVU1326 +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4571 .loc 1 1838 1 is_stmt 0 view .LVU1327 + 4572 0066 5DF8044B ldr r4, [sp], #4 + 4573 .cfi_remember_state + 4574 .cfi_restore 4 + 4575 .cfi_def_cfa_offset 0 + 4576 006a 7047 bx lr + 4577 .LVL328: + 4578 .L365: + 4579 .cfi_restore_state + ARM GAS /tmp/ccXMh04L.s page 148 + + +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4580 .loc 1 1838 1 view .LVU1328 + 4581 006c 3029 cmp r1, #48 + 4582 006e DFD1 bne .L366 + 4583 0070 D5E7 b .L364 + 4584 .L367: + 4585 .cfi_def_cfa_offset 0 + 4586 .cfi_restore 4 +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4587 .loc 1 1813 3 discriminator 1 view .LVU1329 + 4588 0072 0220 movs r0, #2 +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4589 .loc 1 1838 1 view .LVU1330 + 4590 0074 7047 bx lr + 4591 .cfi_endproc + 4592 .LFE156: + 4594 .section .text.HAL_TIMEx_ConfigCommutEvent_IT,"ax",%progbits + 4595 .align 1 + 4596 .global HAL_TIMEx_ConfigCommutEvent_IT + 4597 .syntax unified + 4598 .thumb + 4599 .thumb_func + 4601 HAL_TIMEx_ConfigCommutEvent_IT: + 4602 .LVL329: + 4603 .LFB157: +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4604 .loc 1 1864 1 is_stmt 1 view -0 + 4605 .cfi_startproc + 4606 @ args = 0, pretend = 0, frame = 0 + 4607 @ frame_needed = 0, uses_anonymous_args = 0 + 4608 @ link register save eliminated. +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4609 .loc 1 1864 1 is_stmt 0 view .LVU1332 + 4610 0000 0346 mov r3, r0 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 4611 .loc 1 1866 3 is_stmt 1 view .LVU1333 +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4612 .loc 1 1867 3 view .LVU1334 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4613 .loc 1 1869 3 view .LVU1335 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4614 .loc 1 1869 3 view .LVU1336 + 4615 0002 90F83C00 ldrb r0, [r0, #60] @ zero_extendqisi2 + 4616 .LVL330: +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4617 .loc 1 1869 3 is_stmt 0 view .LVU1337 + 4618 0006 0128 cmp r0, #1 + 4619 0008 33D0 beq .L377 +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4620 .loc 1 1864 1 view .LVU1338 + 4621 000a 10B4 push {r4} + 4622 .cfi_def_cfa_offset 4 + 4623 .cfi_offset 4, -4 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4624 .loc 1 1869 3 is_stmt 1 discriminator 2 view .LVU1339 + 4625 000c 0120 movs r0, #1 + 4626 000e 83F83C00 strb r0, [r3, #60] + ARM GAS /tmp/ccXMh04L.s page 149 + + +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4627 .loc 1 1869 3 discriminator 2 view .LVU1340 +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4628 .loc 1 1871 3 view .LVU1341 + 4629 0012 2029 cmp r1, #32 + 4630 0014 03D0 beq .L374 + 4631 0016 29D8 bhi .L375 + 4632 0018 09B1 cbz r1, .L374 + 4633 001a 1029 cmp r1, #16 + 4634 001c 08D1 bne .L376 + 4635 .L374: +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4636 .loc 1 1875 5 view .LVU1342 +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4637 .loc 1 1875 9 is_stmt 0 view .LVU1343 + 4638 001e 1C68 ldr r4, [r3] +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4639 .loc 1 1875 19 view .LVU1344 + 4640 0020 A068 ldr r0, [r4, #8] +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4641 .loc 1 1875 26 view .LVU1345 + 4642 0022 20F07000 bic r0, r0, #112 + 4643 0026 A060 str r0, [r4, #8] +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4644 .loc 1 1876 5 is_stmt 1 view .LVU1346 +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4645 .loc 1 1876 9 is_stmt 0 view .LVU1347 + 4646 0028 1C68 ldr r4, [r3] +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4647 .loc 1 1876 19 view .LVU1348 + 4648 002a A068 ldr r0, [r4, #8] +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4649 .loc 1 1876 26 view .LVU1349 + 4650 002c 0143 orrs r1, r1, r0 + 4651 .LVL331: +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4652 .loc 1 1876 26 view .LVU1350 + 4653 002e A160 str r1, [r4, #8] + 4654 .L376: +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4655 .loc 1 1880 3 is_stmt 1 view .LVU1351 +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4656 .loc 1 1880 7 is_stmt 0 view .LVU1352 + 4657 0030 1868 ldr r0, [r3] +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4658 .loc 1 1880 17 view .LVU1353 + 4659 0032 4168 ldr r1, [r0, #4] +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4660 .loc 1 1880 23 view .LVU1354 + 4661 0034 41F00101 orr r1, r1, #1 + 4662 0038 4160 str r1, [r0, #4] +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4663 .loc 1 1882 3 is_stmt 1 view .LVU1355 +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4664 .loc 1 1882 7 is_stmt 0 view .LVU1356 + 4665 003a 1868 ldr r0, [r3] +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + ARM GAS /tmp/ccXMh04L.s page 150 + + + 4666 .loc 1 1882 17 view .LVU1357 + 4667 003c 4168 ldr r1, [r0, #4] +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4668 .loc 1 1882 23 view .LVU1358 + 4669 003e 21F00401 bic r1, r1, #4 + 4670 0042 4160 str r1, [r0, #4] +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4671 .loc 1 1883 3 is_stmt 1 view .LVU1359 +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4672 .loc 1 1883 7 is_stmt 0 view .LVU1360 + 4673 0044 1868 ldr r0, [r3] +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4674 .loc 1 1883 17 view .LVU1361 + 4675 0046 4168 ldr r1, [r0, #4] +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4676 .loc 1 1883 23 view .LVU1362 + 4677 0048 0A43 orrs r2, r2, r1 + 4678 .LVL332: +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4679 .loc 1 1883 23 view .LVU1363 + 4680 004a 4260 str r2, [r0, #4] +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4681 .loc 1 1886 3 is_stmt 1 view .LVU1364 + 4682 004c 1968 ldr r1, [r3] + 4683 004e CA68 ldr r2, [r1, #12] + 4684 0050 22F40052 bic r2, r2, #8192 + 4685 0054 CA60 str r2, [r1, #12] +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4686 .loc 1 1889 3 view .LVU1365 + 4687 0056 1968 ldr r1, [r3] + 4688 0058 CA68 ldr r2, [r1, #12] + 4689 005a 42F02002 orr r2, r2, #32 + 4690 005e CA60 str r2, [r1, #12] +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4691 .loc 1 1891 3 view .LVU1366 +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4692 .loc 1 1891 3 view .LVU1367 + 4693 0060 0020 movs r0, #0 + 4694 0062 83F83C00 strb r0, [r3, #60] +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4695 .loc 1 1891 3 view .LVU1368 +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4696 .loc 1 1893 3 view .LVU1369 +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4697 .loc 1 1894 1 is_stmt 0 view .LVU1370 + 4698 0066 5DF8044B ldr r4, [sp], #4 + 4699 .cfi_remember_state + 4700 .cfi_restore 4 + 4701 .cfi_def_cfa_offset 0 + 4702 006a 7047 bx lr + 4703 .LVL333: + 4704 .L375: + 4705 .cfi_restore_state +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4706 .loc 1 1894 1 view .LVU1371 + 4707 006c 3029 cmp r1, #48 + 4708 006e DFD1 bne .L376 + ARM GAS /tmp/ccXMh04L.s page 151 + + + 4709 0070 D5E7 b .L374 + 4710 .L377: + 4711 .cfi_def_cfa_offset 0 + 4712 .cfi_restore 4 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4713 .loc 1 1869 3 discriminator 1 view .LVU1372 + 4714 0072 0220 movs r0, #2 +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4715 .loc 1 1894 1 view .LVU1373 + 4716 0074 7047 bx lr + 4717 .cfi_endproc + 4718 .LFE157: + 4720 .section .text.HAL_TIMEx_ConfigCommutEvent_DMA,"ax",%progbits + 4721 .align 1 + 4722 .global HAL_TIMEx_ConfigCommutEvent_DMA + 4723 .syntax unified + 4724 .thumb + 4725 .thumb_func + 4727 HAL_TIMEx_ConfigCommutEvent_DMA: + 4728 .LVL334: + 4729 .LFB158: +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4730 .loc 1 1921 1 is_stmt 1 view -0 + 4731 .cfi_startproc + 4732 @ args = 0, pretend = 0, frame = 0 + 4733 @ frame_needed = 0, uses_anonymous_args = 0 + 4734 @ link register save eliminated. +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4735 .loc 1 1921 1 is_stmt 0 view .LVU1375 + 4736 0000 0346 mov r3, r0 +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 4737 .loc 1 1923 3 is_stmt 1 view .LVU1376 +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4738 .loc 1 1924 3 view .LVU1377 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4739 .loc 1 1926 3 view .LVU1378 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4740 .loc 1 1926 3 view .LVU1379 + 4741 0002 90F83C00 ldrb r0, [r0, #60] @ zero_extendqisi2 + 4742 .LVL335: +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4743 .loc 1 1926 3 is_stmt 0 view .LVU1380 + 4744 0006 0128 cmp r0, #1 + 4745 0008 3CD0 beq .L387 +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check the parameters */ + 4746 .loc 1 1921 1 view .LVU1381 + 4747 000a 10B4 push {r4} + 4748 .cfi_def_cfa_offset 4 + 4749 .cfi_offset 4, -4 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4750 .loc 1 1926 3 is_stmt 1 discriminator 2 view .LVU1382 + 4751 000c 0120 movs r0, #1 + 4752 000e 83F83C00 strb r0, [r3, #60] +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4753 .loc 1 1926 3 discriminator 2 view .LVU1383 +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4754 .loc 1 1928 3 view .LVU1384 + ARM GAS /tmp/ccXMh04L.s page 152 + + + 4755 0012 2029 cmp r1, #32 + 4756 0014 03D0 beq .L384 + 4757 0016 32D8 bhi .L385 + 4758 0018 09B1 cbz r1, .L384 + 4759 001a 1029 cmp r1, #16 + 4760 001c 08D1 bne .L386 + 4761 .L384: +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4762 .loc 1 1932 5 view .LVU1385 +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4763 .loc 1 1932 9 is_stmt 0 view .LVU1386 + 4764 001e 1C68 ldr r4, [r3] +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4765 .loc 1 1932 19 view .LVU1387 + 4766 0020 A068 ldr r0, [r4, #8] +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4767 .loc 1 1932 26 view .LVU1388 + 4768 0022 20F07000 bic r0, r0, #112 + 4769 0026 A060 str r0, [r4, #8] +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4770 .loc 1 1933 5 is_stmt 1 view .LVU1389 +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4771 .loc 1 1933 9 is_stmt 0 view .LVU1390 + 4772 0028 1C68 ldr r4, [r3] +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4773 .loc 1 1933 19 view .LVU1391 + 4774 002a A068 ldr r0, [r4, #8] +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4775 .loc 1 1933 26 view .LVU1392 + 4776 002c 0143 orrs r1, r1, r0 + 4777 .LVL336: +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4778 .loc 1 1933 26 view .LVU1393 + 4779 002e A160 str r1, [r4, #8] + 4780 .L386: +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4781 .loc 1 1937 3 is_stmt 1 view .LVU1394 +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4782 .loc 1 1937 7 is_stmt 0 view .LVU1395 + 4783 0030 1868 ldr r0, [r3] +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4784 .loc 1 1937 17 view .LVU1396 + 4785 0032 4168 ldr r1, [r0, #4] +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4786 .loc 1 1937 23 view .LVU1397 + 4787 0034 41F00101 orr r1, r1, #1 + 4788 0038 4160 str r1, [r0, #4] +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4789 .loc 1 1939 3 is_stmt 1 view .LVU1398 +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4790 .loc 1 1939 7 is_stmt 0 view .LVU1399 + 4791 003a 1868 ldr r0, [r3] +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4792 .loc 1 1939 17 view .LVU1400 + 4793 003c 4168 ldr r1, [r0, #4] +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4794 .loc 1 1939 23 view .LVU1401 + ARM GAS /tmp/ccXMh04L.s page 153 + + + 4795 003e 21F00401 bic r1, r1, #4 + 4796 0042 4160 str r1, [r0, #4] +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4797 .loc 1 1940 3 is_stmt 1 view .LVU1402 +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4798 .loc 1 1940 7 is_stmt 0 view .LVU1403 + 4799 0044 1868 ldr r0, [r3] +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4800 .loc 1 1940 17 view .LVU1404 + 4801 0046 4168 ldr r1, [r0, #4] +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4802 .loc 1 1940 23 view .LVU1405 + 4803 0048 0A43 orrs r2, r2, r1 + 4804 .LVL337: +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4805 .loc 1 1940 23 view .LVU1406 + 4806 004a 4260 str r2, [r0, #4] +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 4807 .loc 1 1944 3 is_stmt 1 view .LVU1407 +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 4808 .loc 1 1944 13 is_stmt 0 view .LVU1408 + 4809 004c 5A6B ldr r2, [r3, #52] +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 4810 .loc 1 1944 56 view .LVU1409 + 4811 004e 0E49 ldr r1, .L392 + 4812 0050 9162 str r1, [r2, #40] +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 4813 .loc 1 1945 3 is_stmt 1 view .LVU1410 +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 4814 .loc 1 1945 13 is_stmt 0 view .LVU1411 + 4815 0052 5A6B ldr r2, [r3, #52] +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 4816 .loc 1 1945 60 view .LVU1412 + 4817 0054 0D49 ldr r1, .L392+4 + 4818 0056 D162 str r1, [r2, #44] +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4819 .loc 1 1947 3 is_stmt 1 view .LVU1413 +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4820 .loc 1 1947 13 is_stmt 0 view .LVU1414 + 4821 0058 5A6B ldr r2, [r3, #52] +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4822 .loc 1 1947 57 view .LVU1415 + 4823 005a 0D49 ldr r1, .L392+8 + 4824 005c 1163 str r1, [r2, #48] +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4825 .loc 1 1950 3 is_stmt 1 view .LVU1416 + 4826 005e 1968 ldr r1, [r3] + 4827 0060 CA68 ldr r2, [r1, #12] + 4828 0062 22F02002 bic r2, r2, #32 + 4829 0066 CA60 str r2, [r1, #12] +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4830 .loc 1 1953 3 view .LVU1417 + 4831 0068 1968 ldr r1, [r3] + 4832 006a CA68 ldr r2, [r1, #12] + 4833 006c 42F40052 orr r2, r2, #8192 + 4834 0070 CA60 str r2, [r1, #12] +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + ARM GAS /tmp/ccXMh04L.s page 154 + + + 4835 .loc 1 1955 3 view .LVU1418 +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4836 .loc 1 1955 3 view .LVU1419 + 4837 0072 0020 movs r0, #0 + 4838 0074 83F83C00 strb r0, [r3, #60] +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4839 .loc 1 1955 3 view .LVU1420 +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4840 .loc 1 1957 3 view .LVU1421 +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4841 .loc 1 1958 1 is_stmt 0 view .LVU1422 + 4842 0078 5DF8044B ldr r4, [sp], #4 + 4843 .cfi_remember_state + 4844 .cfi_restore 4 + 4845 .cfi_def_cfa_offset 0 + 4846 007c 7047 bx lr + 4847 .LVL338: + 4848 .L385: + 4849 .cfi_restore_state +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4850 .loc 1 1958 1 view .LVU1423 + 4851 007e 3029 cmp r1, #48 + 4852 0080 D6D1 bne .L386 + 4853 0082 CCE7 b .L384 + 4854 .L387: + 4855 .cfi_def_cfa_offset 0 + 4856 .cfi_restore 4 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4857 .loc 1 1926 3 discriminator 1 view .LVU1424 + 4858 0084 0220 movs r0, #2 +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4859 .loc 1 1958 1 view .LVU1425 + 4860 0086 7047 bx lr + 4861 .L393: + 4862 .align 2 + 4863 .L392: + 4864 0088 00000000 .word TIMEx_DMACommutationCplt + 4865 008c 00000000 .word TIMEx_DMACommutationHalfCplt + 4866 0090 00000000 .word TIM_DMAError + 4867 .cfi_endproc + 4868 .LFE158: + 4870 .section .text.HAL_TIMEx_MasterConfigSynchronization,"ax",%progbits + 4871 .align 1 + 4872 .global HAL_TIMEx_MasterConfigSynchronization + 4873 .syntax unified + 4874 .thumb + 4875 .thumb_func + 4877 HAL_TIMEx_MasterConfigSynchronization: + 4878 .LVL339: + 4879 .LFB159: +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpcr2; + 4880 .loc 1 1970 1 is_stmt 1 view -0 + 4881 .cfi_startproc + 4882 @ args = 0, pretend = 0, frame = 0 + 4883 @ frame_needed = 0, uses_anonymous_args = 0 + 4884 @ link register save eliminated. +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpsmcr; + ARM GAS /tmp/ccXMh04L.s page 155 + + + 4885 .loc 1 1971 3 view .LVU1427 +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4886 .loc 1 1972 3 view .LVU1428 +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); + 4887 .loc 1 1975 3 view .LVU1429 +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); + 4888 .loc 1 1976 3 view .LVU1430 +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4889 .loc 1 1977 3 view .LVU1431 +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4890 .loc 1 1980 3 view .LVU1432 +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4891 .loc 1 1980 3 view .LVU1433 + 4892 0000 90F83C20 ldrb r2, [r0, #60] @ zero_extendqisi2 + 4893 0004 012A cmp r2, #1 + 4894 0006 37D0 beq .L399 +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** uint32_t tmpcr2; + 4895 .loc 1 1970 1 is_stmt 0 view .LVU1434 + 4896 0008 30B4 push {r4, r5} + 4897 .cfi_def_cfa_offset 8 + 4898 .cfi_offset 4, -8 + 4899 .cfi_offset 5, -4 + 4900 000a 0346 mov r3, r0 +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4901 .loc 1 1980 3 is_stmt 1 discriminator 2 view .LVU1435 + 4902 000c 0122 movs r2, #1 + 4903 000e 80F83C20 strb r2, [r0, #60] +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4904 .loc 1 1980 3 discriminator 2 view .LVU1436 +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4905 .loc 1 1983 3 view .LVU1437 +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4906 .loc 1 1983 15 is_stmt 0 view .LVU1438 + 4907 0012 0222 movs r2, #2 + 4908 0014 80F83D20 strb r2, [r0, #61] +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4909 .loc 1 1986 3 is_stmt 1 view .LVU1439 +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4910 .loc 1 1986 16 is_stmt 0 view .LVU1440 + 4911 0018 0068 ldr r0, [r0] + 4912 .LVL340: +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4913 .loc 1 1986 10 view .LVU1441 + 4914 001a 4268 ldr r2, [r0, #4] + 4915 .LVL341: +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4916 .loc 1 1989 3 is_stmt 1 view .LVU1442 +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4917 .loc 1 1989 11 is_stmt 0 view .LVU1443 + 4918 001c 8468 ldr r4, [r0, #8] + 4919 .LVL342: +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4920 .loc 1 1993 3 is_stmt 1 view .LVU1444 +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4921 .loc 1 1993 6 is_stmt 0 view .LVU1445 + 4922 001e 174D ldr r5, .L405 + 4923 0020 A842 cmp r0, r5 + ARM GAS /tmp/ccXMh04L.s page 156 + + + 4924 0022 24D0 beq .L404 + 4925 .L396: +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TRGO source */ + 4926 .loc 1 2006 3 is_stmt 1 view .LVU1446 +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TRGO source */ + 4927 .loc 1 2006 10 is_stmt 0 view .LVU1447 + 4928 0024 22F07002 bic r2, r2, #112 + 4929 .LVL343: +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4930 .loc 1 2008 3 is_stmt 1 view .LVU1448 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4931 .loc 1 2008 10 is_stmt 0 view .LVU1449 + 4932 0028 0D68 ldr r5, [r1] + 4933 002a 2A43 orrs r2, r2, r5 + 4934 .LVL344: +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4935 .loc 1 2011 3 is_stmt 1 view .LVU1450 +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4936 .loc 1 2011 23 is_stmt 0 view .LVU1451 + 4937 002c 4260 str r2, [r0, #4] +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4938 .loc 1 2013 3 is_stmt 1 view .LVU1452 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4939 .loc 1 2013 7 is_stmt 0 view .LVU1453 + 4940 002e 1A68 ldr r2, [r3] + 4941 .LVL345: +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4942 .loc 1 2013 6 view .LVU1454 + 4943 0030 1248 ldr r0, .L405 + 4944 .LVL346: +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4945 .loc 1 2013 6 view .LVU1455 + 4946 0032 8242 cmp r2, r0 + 4947 0034 0ED0 beq .L397 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4948 .loc 1 2013 7 discriminator 1 view .LVU1456 + 4949 0036 B2F1804F cmp r2, #1073741824 + 4950 003a 0BD0 beq .L397 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4951 .loc 1 2013 7 discriminator 2 view .LVU1457 + 4952 003c A0F59430 sub r0, r0, #75776 + 4953 0040 8242 cmp r2, r0 + 4954 0042 07D0 beq .L397 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4955 .loc 1 2013 7 discriminator 3 view .LVU1458 + 4956 0044 00F58060 add r0, r0, #1024 + 4957 0048 8242 cmp r2, r0 + 4958 004a 03D0 beq .L397 +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 4959 .loc 1 2013 7 discriminator 4 view .LVU1459 + 4960 004c 00F59C30 add r0, r0, #79872 + 4961 0050 8242 cmp r2, r0 + 4962 0052 04D1 bne .L398 + 4963 .L397: +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set master mode */ + 4964 .loc 1 2016 5 is_stmt 1 view .LVU1460 +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Set master mode */ + ARM GAS /tmp/ccXMh04L.s page 157 + + + 4965 .loc 1 2016 13 is_stmt 0 view .LVU1461 + 4966 0054 24F08004 bic r4, r4, #128 + 4967 .LVL347: +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4968 .loc 1 2018 5 is_stmt 1 view .LVU1462 +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4969 .loc 1 2018 29 is_stmt 0 view .LVU1463 + 4970 0058 8968 ldr r1, [r1, #8] + 4971 .LVL348: +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4972 .loc 1 2018 13 view .LVU1464 + 4973 005a 2143 orrs r1, r1, r4 + 4974 .LVL349: +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4975 .loc 1 2021 5 is_stmt 1 view .LVU1465 +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4976 .loc 1 2021 26 is_stmt 0 view .LVU1466 + 4977 005c 9160 str r1, [r2, #8] + 4978 .LVL350: + 4979 .L398: +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4980 .loc 1 2025 3 is_stmt 1 view .LVU1467 +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4981 .loc 1 2025 15 is_stmt 0 view .LVU1468 + 4982 005e 0122 movs r2, #1 + 4983 0060 83F83D20 strb r2, [r3, #61] +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4984 .loc 1 2027 3 is_stmt 1 view .LVU1469 +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4985 .loc 1 2027 3 view .LVU1470 + 4986 0064 0020 movs r0, #0 + 4987 0066 83F83C00 strb r0, [r3, #60] +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4988 .loc 1 2027 3 view .LVU1471 +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 4989 .loc 1 2029 3 view .LVU1472 +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 4990 .loc 1 2030 1 is_stmt 0 view .LVU1473 + 4991 006a 30BC pop {r4, r5} + 4992 .cfi_remember_state + 4993 .cfi_restore 5 + 4994 .cfi_restore 4 + 4995 .cfi_def_cfa_offset 0 + 4996 006c 7047 bx lr + 4997 .LVL351: + 4998 .L404: + 4999 .cfi_restore_state +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5000 .loc 1 1996 5 is_stmt 1 view .LVU1474 +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TRGO2 source*/ + 5001 .loc 1 1999 5 view .LVU1475 +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Select the TRGO2 source*/ + 5002 .loc 1 1999 12 is_stmt 0 view .LVU1476 + 5003 006e 22F47002 bic r2, r2, #15728640 + 5004 .LVL352: +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5005 .loc 1 2001 5 is_stmt 1 view .LVU1477 + ARM GAS /tmp/ccXMh04L.s page 158 + + +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5006 .loc 1 2001 28 is_stmt 0 view .LVU1478 + 5007 0072 4D68 ldr r5, [r1, #4] +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5008 .loc 1 2001 12 view .LVU1479 + 5009 0074 2A43 orrs r2, r2, r5 + 5010 .LVL353: +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5011 .loc 1 2001 12 view .LVU1480 + 5012 0076 D5E7 b .L396 + 5013 .LVL354: + 5014 .L399: + 5015 .cfi_def_cfa_offset 0 + 5016 .cfi_restore 4 + 5017 .cfi_restore 5 +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5018 .loc 1 1980 3 discriminator 1 view .LVU1481 + 5019 0078 0220 movs r0, #2 + 5020 .LVL355: +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5021 .loc 1 2030 1 view .LVU1482 + 5022 007a 7047 bx lr + 5023 .L406: + 5024 .align 2 + 5025 .L405: + 5026 007c 002C0140 .word 1073818624 + 5027 .cfi_endproc + 5028 .LFE159: + 5030 .section .text.HAL_TIMEx_ConfigBreakDeadTime,"ax",%progbits + 5031 .align 1 + 5032 .global HAL_TIMEx_ConfigBreakDeadTime + 5033 .syntax unified + 5034 .thumb + 5035 .thumb_func + 5037 HAL_TIMEx_ConfigBreakDeadTime: + 5038 .LVL356: + 5039 .LFB160: +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ + 5040 .loc 1 2045 1 is_stmt 1 view -0 + 5041 .cfi_startproc + 5042 @ args = 0, pretend = 0, frame = 0 + 5043 @ frame_needed = 0, uses_anonymous_args = 0 + 5044 @ link register save eliminated. +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5045 .loc 1 2047 3 view .LVU1484 +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); + 5046 .loc 1 2050 3 view .LVU1485 +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); + 5047 .loc 1 2051 3 view .LVU1486 +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); + 5048 .loc 1 2052 3 view .LVU1487 +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); + 5049 .loc 1 2053 3 view .LVU1488 +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); + 5050 .loc 1 2054 3 view .LVU1489 +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); + 5051 .loc 1 2055 3 view .LVU1490 + ARM GAS /tmp/ccXMh04L.s page 159 + + +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BKF) + 5052 .loc 1 2056 3 view .LVU1491 +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BKF */ + 5053 .loc 1 2058 3 view .LVU1492 +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5054 .loc 1 2060 3 view .LVU1493 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5055 .loc 1 2063 3 view .LVU1494 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5056 .loc 1 2063 3 view .LVU1495 + 5057 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 5058 0004 012B cmp r3, #1 + 5059 0006 3BD0 beq .L410 +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ + 5060 .loc 1 2045 1 is_stmt 0 view .LVU1496 + 5061 0008 10B4 push {r4} + 5062 .cfi_def_cfa_offset 4 + 5063 .cfi_offset 4, -4 + 5064 000a 0246 mov r2, r0 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5065 .loc 1 2063 3 is_stmt 1 discriminator 2 view .LVU1497 + 5066 000c 0123 movs r3, #1 + 5067 000e 80F83C30 strb r3, [r0, #60] +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5068 .loc 1 2063 3 discriminator 2 view .LVU1498 +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); + 5069 .loc 1 2069 3 view .LVU1499 + 5070 0012 CB68 ldr r3, [r1, #12] + 5071 .LVL357: +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5072 .loc 1 2070 3 view .LVU1500 + 5073 0014 23F44073 bic r3, r3, #768 + 5074 .LVL358: +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5075 .loc 1 2070 3 is_stmt 0 view .LVU1501 + 5076 0018 8868 ldr r0, [r1, #8] + 5077 .LVL359: +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5078 .loc 1 2070 3 view .LVU1502 + 5079 001a 0343 orrs r3, r3, r0 + 5080 .LVL360: +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5081 .loc 1 2071 3 is_stmt 1 view .LVU1503 + 5082 001c 23F48063 bic r3, r3, #1024 + 5083 .LVL361: +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5084 .loc 1 2071 3 is_stmt 0 view .LVU1504 + 5085 0020 4868 ldr r0, [r1, #4] + 5086 .LVL362: +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5087 .loc 1 2071 3 view .LVU1505 + 5088 0022 0343 orrs r3, r3, r0 + 5089 .LVL363: +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5090 .loc 1 2072 3 is_stmt 1 view .LVU1506 + 5091 0024 23F40063 bic r3, r3, #2048 + 5092 .LVL364: + ARM GAS /tmp/ccXMh04L.s page 160 + + +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5093 .loc 1 2072 3 is_stmt 0 view .LVU1507 + 5094 0028 0868 ldr r0, [r1] + 5095 .LVL365: +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5096 .loc 1 2072 3 view .LVU1508 + 5097 002a 0343 orrs r3, r3, r0 + 5098 .LVL366: +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5099 .loc 1 2073 3 is_stmt 1 view .LVU1509 + 5100 002c 23F48053 bic r3, r3, #4096 + 5101 .LVL367: +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5102 .loc 1 2073 3 is_stmt 0 view .LVU1510 + 5103 0030 0869 ldr r0, [r1, #16] + 5104 .LVL368: +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5105 .loc 1 2073 3 view .LVU1511 + 5106 0032 0343 orrs r3, r3, r0 + 5107 .LVL369: +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5108 .loc 1 2074 3 is_stmt 1 view .LVU1512 + 5109 0034 23F40053 bic r3, r3, #8192 + 5110 .LVL370: +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5111 .loc 1 2074 3 is_stmt 0 view .LVU1513 + 5112 0038 4869 ldr r0, [r1, #20] + 5113 .LVL371: +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5114 .loc 1 2074 3 view .LVU1514 + 5115 003a 0343 orrs r3, r3, r0 + 5116 .LVL372: +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BKF) + 5117 .loc 1 2075 3 is_stmt 1 view .LVU1515 + 5118 003c 23F48043 bic r3, r3, #16384 + 5119 .LVL373: +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BKF) + 5120 .loc 1 2075 3 is_stmt 0 view .LVU1516 + 5121 0040 886A ldr r0, [r1, #40] + 5122 .LVL374: +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #if defined(TIM_BDTR_BKF) + 5123 .loc 1 2075 3 view .LVU1517 + 5124 0042 0343 orrs r3, r3, r0 + 5125 .LVL375: +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BKF */ + 5126 .loc 1 2077 3 is_stmt 1 view .LVU1518 + 5127 0044 23F47023 bic r3, r3, #983040 + 5128 .LVL376: +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BKF */ + 5129 .loc 1 2077 3 is_stmt 0 view .LVU1519 + 5130 0048 8869 ldr r0, [r1, #24] + 5131 .LVL377: +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BKF */ + 5132 .loc 1 2077 3 view .LVU1520 + 5133 004a 43EA0043 orr r3, r3, r0, lsl #16 + 5134 .LVL378: +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccXMh04L.s page 161 + + + 5135 .loc 1 2081 3 is_stmt 1 view .LVU1521 +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 5136 .loc 1 2081 7 is_stmt 0 view .LVU1522 + 5137 004e 1068 ldr r0, [r2] +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** { + 5138 .loc 1 2081 6 view .LVU1523 + 5139 0050 0C4C ldr r4, .L416 + 5140 0052 A042 cmp r0, r4 + 5141 0054 06D0 beq .L415 + 5142 .LVL379: + 5143 .L409: +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5144 .loc 1 2096 3 is_stmt 1 view .LVU1524 +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5145 .loc 1 2096 24 is_stmt 0 view .LVU1525 + 5146 0056 4364 str r3, [r0, #68] +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5147 .loc 1 2098 3 is_stmt 1 view .LVU1526 +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5148 .loc 1 2098 3 view .LVU1527 + 5149 0058 0020 movs r0, #0 + 5150 005a 82F83C00 strb r0, [r2, #60] +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5151 .loc 1 2098 3 view .LVU1528 +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5152 .loc 1 2100 3 view .LVU1529 +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5153 .loc 1 2101 1 is_stmt 0 view .LVU1530 + 5154 005e 5DF8044B ldr r4, [sp], #4 + 5155 .cfi_remember_state + 5156 .cfi_restore 4 + 5157 .cfi_def_cfa_offset 0 + 5158 0062 7047 bx lr + 5159 .LVL380: + 5160 .L415: + 5161 .cfi_restore_state +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); + 5162 .loc 1 2084 5 is_stmt 1 view .LVU1531 +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); + 5163 .loc 1 2085 5 view .LVU1532 +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5164 .loc 1 2086 5 view .LVU1533 +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); + 5165 .loc 1 2089 5 view .LVU1534 + 5166 0064 23F47003 bic r3, r3, #15728640 + 5167 .LVL381: +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); + 5168 .loc 1 2089 5 is_stmt 0 view .LVU1535 + 5169 0068 4C6A ldr r4, [r1, #36] + 5170 006a 43EA0453 orr r3, r3, r4, lsl #20 + 5171 .LVL382: +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); + 5172 .loc 1 2090 5 is_stmt 1 view .LVU1536 + 5173 006e 23F08073 bic r3, r3, #16777216 + 5174 .LVL383: +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); + 5175 .loc 1 2090 5 is_stmt 0 view .LVU1537 + ARM GAS /tmp/ccXMh04L.s page 162 + + + 5176 0072 CC69 ldr r4, [r1, #28] + 5177 .LVL384: +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); + 5178 .loc 1 2090 5 view .LVU1538 + 5179 0074 2343 orrs r3, r3, r4 + 5180 .LVL385: +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5181 .loc 1 2091 5 is_stmt 1 view .LVU1539 + 5182 0076 23F00073 bic r3, r3, #33554432 + 5183 .LVL386: +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5184 .loc 1 2091 5 is_stmt 0 view .LVU1540 + 5185 007a 096A ldr r1, [r1, #32] + 5186 .LVL387: +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5187 .loc 1 2091 5 view .LVU1541 + 5188 007c 0B43 orrs r3, r3, r1 + 5189 .LVL388: +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5190 .loc 1 2091 5 view .LVU1542 + 5191 007e EAE7 b .L409 + 5192 .LVL389: + 5193 .L410: + 5194 .cfi_def_cfa_offset 0 + 5195 .cfi_restore 4 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5196 .loc 1 2063 3 discriminator 1 view .LVU1543 + 5197 0080 0220 movs r0, #2 + 5198 .LVL390: +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5199 .loc 1 2101 1 view .LVU1544 + 5200 0082 7047 bx lr + 5201 .L417: + 5202 .align 2 + 5203 .L416: + 5204 0084 002C0140 .word 1073818624 + 5205 .cfi_endproc + 5206 .LFE160: + 5208 .section .text.HAL_TIMEx_RemapConfig,"ax",%progbits + 5209 .align 1 + 5210 .global HAL_TIMEx_RemapConfig + 5211 .syntax unified + 5212 .thumb + 5213 .thumb_func + 5215 HAL_TIMEx_RemapConfig: + 5216 .LVL391: + 5217 .LFB161: +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5218 .loc 1 2189 1 is_stmt 1 view -0 + 5219 .cfi_startproc + 5220 @ args = 0, pretend = 0, frame = 0 + 5221 @ frame_needed = 0, uses_anonymous_args = 0 + 5222 @ link register save eliminated. +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5223 .loc 1 2192 3 view .LVU1546 +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5224 .loc 1 2194 3 view .LVU1547 + ARM GAS /tmp/ccXMh04L.s page 163 + + +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5225 .loc 1 2194 3 view .LVU1548 + 5226 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 5227 0004 012B cmp r3, #1 + 5228 0006 09D0 beq .L420 +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5229 .loc 1 2194 3 discriminator 2 view .LVU1549 + 5230 0008 0123 movs r3, #1 + 5231 000a 80F83C30 strb r3, [r0, #60] +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5232 .loc 1 2194 3 discriminator 2 view .LVU1550 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5233 .loc 1 2197 3 view .LVU1551 + 5234 000e 0368 ldr r3, [r0] + 5235 0010 1965 str r1, [r3, #80] +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5236 .loc 1 2199 3 view .LVU1552 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5237 .loc 1 2199 3 view .LVU1553 + 5238 0012 0023 movs r3, #0 + 5239 0014 80F83C30 strb r3, [r0, #60] +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5240 .loc 1 2199 3 view .LVU1554 +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5241 .loc 1 2201 3 view .LVU1555 +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5242 .loc 1 2201 10 is_stmt 0 view .LVU1556 + 5243 0018 1846 mov r0, r3 + 5244 .LVL392: +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5245 .loc 1 2201 10 view .LVU1557 + 5246 001a 7047 bx lr + 5247 .LVL393: + 5248 .L420: +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5249 .loc 1 2194 3 discriminator 1 view .LVU1558 + 5250 001c 0220 movs r0, #2 + 5251 .LVL394: +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5252 .loc 1 2202 1 view .LVU1559 + 5253 001e 7047 bx lr + 5254 .cfi_endproc + 5255 .LFE161: + 5257 .section .text.HAL_TIMEx_GroupChannel5,"ax",%progbits + 5258 .align 1 + 5259 .global HAL_TIMEx_GroupChannel5 + 5260 .syntax unified + 5261 .thumb + 5262 .thumb_func + 5264 HAL_TIMEx_GroupChannel5: + 5265 .LVL395: + 5266 .LFB162: +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check parameters */ + 5267 .loc 1 2217 1 is_stmt 1 view -0 + 5268 .cfi_startproc + 5269 @ args = 0, pretend = 0, frame = 0 + 5270 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccXMh04L.s page 164 + + + 5271 @ link register save eliminated. +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** assert_param(IS_TIM_GROUPCH5(Channels)); + 5272 .loc 1 2219 3 view .LVU1561 +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5273 .loc 1 2220 3 view .LVU1562 +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5274 .loc 1 2223 3 view .LVU1563 +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5275 .loc 1 2223 3 view .LVU1564 + 5276 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 5277 0004 012B cmp r3, #1 + 5278 0006 18D0 beq .L423 +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Check parameters */ + 5279 .loc 1 2217 1 is_stmt 0 view .LVU1565 + 5280 0008 10B4 push {r4} + 5281 .cfi_def_cfa_offset 4 + 5282 .cfi_offset 4, -4 +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5283 .loc 1 2223 3 is_stmt 1 discriminator 2 view .LVU1566 + 5284 000a 0122 movs r2, #1 + 5285 000c 80F83C20 strb r2, [r0, #60] +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5286 .loc 1 2223 3 discriminator 2 view .LVU1567 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5287 .loc 1 2225 3 view .LVU1568 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5288 .loc 1 2225 15 is_stmt 0 view .LVU1569 + 5289 0010 0223 movs r3, #2 + 5290 0012 80F83D30 strb r3, [r0, #61] +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5291 .loc 1 2228 3 is_stmt 1 view .LVU1570 +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5292 .loc 1 2228 7 is_stmt 0 view .LVU1571 + 5293 0016 0468 ldr r4, [r0] +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5294 .loc 1 2228 17 view .LVU1572 + 5295 0018 A36D ldr r3, [r4, #88] +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5296 .loc 1 2228 24 view .LVU1573 + 5297 001a 23F06043 bic r3, r3, #-536870912 + 5298 001e A365 str r3, [r4, #88] +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5299 .loc 1 2231 3 is_stmt 1 view .LVU1574 +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5300 .loc 1 2231 7 is_stmt 0 view .LVU1575 + 5301 0020 0468 ldr r4, [r0] +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5302 .loc 1 2231 17 view .LVU1576 + 5303 0022 A36D ldr r3, [r4, #88] +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5304 .loc 1 2231 24 view .LVU1577 + 5305 0024 0B43 orrs r3, r3, r1 + 5306 0026 A365 str r3, [r4, #88] +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5307 .loc 1 2234 3 is_stmt 1 view .LVU1578 +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5308 .loc 1 2234 15 is_stmt 0 view .LVU1579 + ARM GAS /tmp/ccXMh04L.s page 165 + + + 5309 0028 80F83D20 strb r2, [r0, #61] +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5310 .loc 1 2236 3 is_stmt 1 view .LVU1580 +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5311 .loc 1 2236 3 view .LVU1581 + 5312 002c 0023 movs r3, #0 + 5313 002e 80F83C30 strb r3, [r0, #60] +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5314 .loc 1 2236 3 view .LVU1582 +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5315 .loc 1 2238 3 view .LVU1583 +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5316 .loc 1 2238 10 is_stmt 0 view .LVU1584 + 5317 0032 1846 mov r0, r3 + 5318 .LVL396: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_CCR5_CCR5 */ + 5319 .loc 1 2239 1 view .LVU1585 + 5320 0034 5DF8044B ldr r4, [sp], #4 + 5321 .cfi_restore 4 + 5322 .cfi_def_cfa_offset 0 + 5323 0038 7047 bx lr + 5324 .LVL397: + 5325 .L423: +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5326 .loc 1 2223 3 discriminator 1 view .LVU1586 + 5327 003a 0220 movs r0, #2 + 5328 .LVL398: +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_CCR5_CCR5 */ + 5329 .loc 1 2239 1 view .LVU1587 + 5330 003c 7047 bx lr + 5331 .cfi_endproc + 5332 .LFE162: + 5334 .section .text.HAL_TIMEx_CommutCallback,"ax",%progbits + 5335 .align 1 + 5336 .weak HAL_TIMEx_CommutCallback + 5337 .syntax unified + 5338 .thumb + 5339 .thumb_func + 5341 HAL_TIMEx_CommutCallback: + 5342 .LVL399: + 5343 .LFB163: +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5344 .loc 1 2268 1 is_stmt 1 view -0 + 5345 .cfi_startproc + 5346 @ args = 0, pretend = 0, frame = 0 + 5347 @ frame_needed = 0, uses_anonymous_args = 0 + 5348 @ link register save eliminated. +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5349 .loc 1 2270 3 view .LVU1589 +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 5350 .loc 1 2275 1 is_stmt 0 view .LVU1590 + 5351 0000 7047 bx lr + 5352 .cfi_endproc + 5353 .LFE163: + 5355 .section .text.TIMEx_DMACommutationCplt,"ax",%progbits + 5356 .align 1 + 5357 .global TIMEx_DMACommutationCplt + ARM GAS /tmp/ccXMh04L.s page 166 + + + 5358 .syntax unified + 5359 .thumb + 5360 .thumb_func + 5362 TIMEx_DMACommutationCplt: + 5363 .LVL400: + 5364 .LFB169: +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5365 .loc 1 2391 1 is_stmt 1 view -0 + 5366 .cfi_startproc + 5367 @ args = 0, pretend = 0, frame = 0 + 5368 @ frame_needed = 0, uses_anonymous_args = 0 +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5369 .loc 1 2391 1 is_stmt 0 view .LVU1592 + 5370 0000 08B5 push {r3, lr} + 5371 .cfi_def_cfa_offset 8 + 5372 .cfi_offset 3, -8 + 5373 .cfi_offset 14, -4 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5374 .loc 1 2392 3 is_stmt 1 view .LVU1593 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5375 .loc 1 2392 22 is_stmt 0 view .LVU1594 + 5376 0002 406A ldr r0, [r0, #36] + 5377 .LVL401: +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5378 .loc 1 2395 3 is_stmt 1 view .LVU1595 +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5379 .loc 1 2395 15 is_stmt 0 view .LVU1596 + 5380 0004 0123 movs r3, #1 + 5381 0006 80F83D30 strb r3, [r0, #61] +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5382 .loc 1 2400 3 is_stmt 1 view .LVU1597 + 5383 000a FFF7FEFF bl HAL_TIMEx_CommutCallback + 5384 .LVL402: +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5385 .loc 1 2402 1 is_stmt 0 view .LVU1598 + 5386 000e 08BD pop {r3, pc} + 5387 .cfi_endproc + 5388 .LFE169: + 5390 .section .text.HAL_TIMEx_CommutHalfCpltCallback,"ax",%progbits + 5391 .align 1 + 5392 .weak HAL_TIMEx_CommutHalfCpltCallback + 5393 .syntax unified + 5394 .thumb + 5395 .thumb_func + 5397 HAL_TIMEx_CommutHalfCpltCallback: + 5398 .LVL403: + 5399 .LFB164: +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5400 .loc 1 2282 1 is_stmt 1 view -0 + 5401 .cfi_startproc + 5402 @ args = 0, pretend = 0, frame = 0 + 5403 @ frame_needed = 0, uses_anonymous_args = 0 + 5404 @ link register save eliminated. +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5405 .loc 1 2284 3 view .LVU1600 +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5406 .loc 1 2289 1 is_stmt 0 view .LVU1601 + ARM GAS /tmp/ccXMh04L.s page 167 + + + 5407 0000 7047 bx lr + 5408 .cfi_endproc + 5409 .LFE164: + 5411 .section .text.TIMEx_DMACommutationHalfCplt,"ax",%progbits + 5412 .align 1 + 5413 .global TIMEx_DMACommutationHalfCplt + 5414 .syntax unified + 5415 .thumb + 5416 .thumb_func + 5418 TIMEx_DMACommutationHalfCplt: + 5419 .LVL404: + 5420 .LFB170: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5421 .loc 1 2410 1 is_stmt 1 view -0 + 5422 .cfi_startproc + 5423 @ args = 0, pretend = 0, frame = 0 + 5424 @ frame_needed = 0, uses_anonymous_args = 0 +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5425 .loc 1 2410 1 is_stmt 0 view .LVU1603 + 5426 0000 08B5 push {r3, lr} + 5427 .cfi_def_cfa_offset 8 + 5428 .cfi_offset 3, -8 + 5429 .cfi_offset 14, -4 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5430 .loc 1 2411 3 is_stmt 1 view .LVU1604 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5431 .loc 1 2411 22 is_stmt 0 view .LVU1605 + 5432 0002 406A ldr r0, [r0, #36] + 5433 .LVL405: +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5434 .loc 1 2414 3 is_stmt 1 view .LVU1606 +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5435 .loc 1 2414 15 is_stmt 0 view .LVU1607 + 5436 0004 0123 movs r3, #1 + 5437 0006 80F83D30 strb r3, [r0, #61] +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5438 .loc 1 2419 3 is_stmt 1 view .LVU1608 + 5439 000a FFF7FEFF bl HAL_TIMEx_CommutHalfCpltCallback + 5440 .LVL406: +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5441 .loc 1 2421 1 is_stmt 0 view .LVU1609 + 5442 000e 08BD pop {r3, pc} + 5443 .cfi_endproc + 5444 .LFE170: + 5446 .section .text.HAL_TIMEx_BreakCallback,"ax",%progbits + 5447 .align 1 + 5448 .weak HAL_TIMEx_BreakCallback + 5449 .syntax unified + 5450 .thumb + 5451 .thumb_func + 5453 HAL_TIMEx_BreakCallback: + 5454 .LVL407: + 5455 .LFB165: +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5456 .loc 1 2297 1 is_stmt 1 view -0 + 5457 .cfi_startproc + 5458 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccXMh04L.s page 168 + + + 5459 @ frame_needed = 0, uses_anonymous_args = 0 + 5460 @ link register save eliminated. +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5461 .loc 1 2299 3 view .LVU1611 +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5462 .loc 1 2304 1 is_stmt 0 view .LVU1612 + 5463 0000 7047 bx lr + 5464 .cfi_endproc + 5465 .LFE165: + 5467 .section .text.HAL_TIMEx_Break2Callback,"ax",%progbits + 5468 .align 1 + 5469 .weak HAL_TIMEx_Break2Callback + 5470 .syntax unified + 5471 .thumb + 5472 .thumb_func + 5474 HAL_TIMEx_Break2Callback: + 5475 .LVL408: + 5476 .LFB166: +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5477 .loc 1 2313 1 is_stmt 1 view -0 + 5478 .cfi_startproc + 5479 @ args = 0, pretend = 0, frame = 0 + 5480 @ frame_needed = 0, uses_anonymous_args = 0 + 5481 @ link register save eliminated. +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5482 .loc 1 2315 3 view .LVU1614 +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** #endif /* TIM_BDTR_BK2E */ + 5483 .loc 1 2320 1 is_stmt 0 view .LVU1615 + 5484 0000 7047 bx lr + 5485 .cfi_endproc + 5486 .LFE166: + 5488 .section .text.HAL_TIMEx_HallSensor_GetState,"ax",%progbits + 5489 .align 1 + 5490 .global HAL_TIMEx_HallSensor_GetState + 5491 .syntax unified + 5492 .thumb + 5493 .thumb_func + 5495 HAL_TIMEx_HallSensor_GetState: + 5496 .LVL409: + 5497 .LFB167: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** return htim->State; + 5498 .loc 1 2347 1 is_stmt 1 view -0 + 5499 .cfi_startproc + 5500 @ args = 0, pretend = 0, frame = 0 + 5501 @ frame_needed = 0, uses_anonymous_args = 0 + 5502 @ link register save eliminated. +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5503 .loc 1 2348 3 view .LVU1617 +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5504 .loc 1 2348 14 is_stmt 0 view .LVU1618 + 5505 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 5506 .LVL410: +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5507 .loc 1 2349 1 view .LVU1619 + 5508 0004 7047 bx lr + 5509 .cfi_endproc + 5510 .LFE167: + ARM GAS /tmp/ccXMh04L.s page 169 + + + 5512 .section .text.HAL_TIMEx_GetChannelNState,"ax",%progbits + 5513 .align 1 + 5514 .global HAL_TIMEx_GetChannelNState + 5515 .syntax unified + 5516 .thumb + 5517 .thumb_func + 5519 HAL_TIMEx_GetChannelNState: + 5520 .LVL411: + 5521 .LFB168: +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_state; + 5522 .loc 1 2362 1 is_stmt 1 view -0 + 5523 .cfi_startproc + 5524 @ args = 0, pretend = 0, frame = 0 + 5525 @ frame_needed = 0, uses_anonymous_args = 0 + 5526 @ link register save eliminated. +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5527 .loc 1 2363 3 view .LVU1621 +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5528 .loc 1 2366 3 view .LVU1622 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5529 .loc 1 2368 3 view .LVU1623 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5530 .loc 1 2368 19 is_stmt 0 view .LVU1624 + 5531 0000 19B9 cbnz r1, .L438 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5532 .loc 1 2368 19 discriminator 1 view .LVU1625 + 5533 0002 90F84400 ldrb r0, [r0, #68] @ zero_extendqisi2 + 5534 .LVL412: +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5535 .loc 1 2368 19 discriminator 1 view .LVU1626 + 5536 0006 C0B2 uxtb r0, r0 + 5537 0008 7047 bx lr + 5538 .LVL413: + 5539 .L438: +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5540 .loc 1 2368 19 discriminator 2 view .LVU1627 + 5541 000a 0429 cmp r1, #4 + 5542 000c 05D0 beq .L442 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5543 .loc 1 2368 19 discriminator 5 view .LVU1628 + 5544 000e 0829 cmp r1, #8 + 5545 0010 07D0 beq .L443 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5546 .loc 1 2368 19 discriminator 8 view .LVU1629 + 5547 0012 90F84700 ldrb r0, [r0, #71] @ zero_extendqisi2 + 5548 .LVL414: +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5549 .loc 1 2368 19 discriminator 8 view .LVU1630 + 5550 0016 C0B2 uxtb r0, r0 + 5551 .LVL415: +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** } + 5552 .loc 1 2370 3 is_stmt 1 view .LVU1631 +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** /** + 5553 .loc 1 2371 1 is_stmt 0 view .LVU1632 + 5554 0018 7047 bx lr + 5555 .LVL416: + 5556 .L442: + ARM GAS /tmp/ccXMh04L.s page 170 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5557 .loc 1 2368 19 discriminator 4 view .LVU1633 + 5558 001a 90F84500 ldrb r0, [r0, #69] @ zero_extendqisi2 + 5559 .LVL417: +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5560 .loc 1 2368 19 discriminator 4 view .LVU1634 + 5561 001e C0B2 uxtb r0, r0 + 5562 0020 7047 bx lr + 5563 .LVL418: + 5564 .L443: +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5565 .loc 1 2368 19 discriminator 7 view .LVU1635 + 5566 0022 90F84600 ldrb r0, [r0, #70] @ zero_extendqisi2 + 5567 .LVL419: +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c **** + 5568 .loc 1 2368 19 discriminator 7 view .LVU1636 + 5569 0026 C0B2 uxtb r0, r0 + 5570 0028 7047 bx lr + 5571 .cfi_endproc + 5572 .LFE168: + 5574 .text + 5575 .Letext0: + 5576 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 5577 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 5578 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 5579 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 5580 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 5581 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 5582 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" + 5583 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h" + ARM GAS /tmp/ccXMh04L.s page 171 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_tim_ex.c + /tmp/ccXMh04L.s:21 .text.TIM_CCxNChannelCmd:00000000 $t + /tmp/ccXMh04L.s:26 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd + /tmp/ccXMh04L.s:64 .text.TIM_DMAErrorCCxN:00000000 $t + /tmp/ccXMh04L.s:69 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN + /tmp/ccXMh04L.s:148 .text.TIM_DMADelayPulseNCplt:00000000 $t + /tmp/ccXMh04L.s:153 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt + /tmp/ccXMh04L.s:272 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t + /tmp/ccXMh04L.s:278 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit + /tmp/ccXMh04L.s:293 .text.HAL_TIMEx_HallSensor_Init:00000000 $t + /tmp/ccXMh04L.s:299 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init + /tmp/ccXMh04L.s:512 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t + /tmp/ccXMh04L.s:518 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit + /tmp/ccXMh04L.s:533 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t + /tmp/ccXMh04L.s:539 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit + /tmp/ccXMh04L.s:608 .text.HAL_TIMEx_HallSensor_Start:00000000 $t + /tmp/ccXMh04L.s:614 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start + /tmp/ccXMh04L.s:772 .text.HAL_TIMEx_HallSensor_Start:000000a8 $d + /tmp/ccXMh04L.s:778 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t + /tmp/ccXMh04L.s:784 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop + /tmp/ccXMh04L.s:842 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t + /tmp/ccXMh04L.s:848 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT + /tmp/ccXMh04L.s:1014 .text.HAL_TIMEx_HallSensor_Start_IT:000000b4 $d + /tmp/ccXMh04L.s:1020 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t + /tmp/ccXMh04L.s:1026 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT + /tmp/ccXMh04L.s:1089 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t + /tmp/ccXMh04L.s:1095 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA + /tmp/ccXMh04L.s:1284 .text.HAL_TIMEx_HallSensor_Start_DMA:000000cc $d + /tmp/ccXMh04L.s:1293 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t + /tmp/ccXMh04L.s:1299 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA + /tmp/ccXMh04L.s:1363 .text.HAL_TIMEx_OCN_Start:00000000 $t + /tmp/ccXMh04L.s:1369 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start + /tmp/ccXMh04L.s:1551 .text.HAL_TIMEx_OCN_Start:000000e4 $d + /tmp/ccXMh04L.s:1557 .text.HAL_TIMEx_OCN_Stop:00000000 $t + /tmp/ccXMh04L.s:1563 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop + /tmp/ccXMh04L.s:1659 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t + /tmp/ccXMh04L.s:1665 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT + /tmp/ccXMh04L.s:1891 .text.HAL_TIMEx_OCN_Start_IT:0000011c $d + /tmp/ccXMh04L.s:1897 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t + /tmp/ccXMh04L.s:1903 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT + /tmp/ccXMh04L.s:2068 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t + /tmp/ccXMh04L.s:2074 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA + /tmp/ccXMh04L.s:2493 .text.HAL_TIMEx_OCN_Start_DMA:00000204 $d + /tmp/ccXMh04L.s:2502 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t + /tmp/ccXMh04L.s:2508 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA + /tmp/ccXMh04L.s:2671 .text.HAL_TIMEx_PWMN_Start:00000000 $t + /tmp/ccXMh04L.s:2677 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start + /tmp/ccXMh04L.s:2859 .text.HAL_TIMEx_PWMN_Start:000000e4 $d + /tmp/ccXMh04L.s:2865 .text.HAL_TIMEx_PWMN_Stop:00000000 $t + /tmp/ccXMh04L.s:2871 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop + /tmp/ccXMh04L.s:2967 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t + /tmp/ccXMh04L.s:2973 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT + /tmp/ccXMh04L.s:3199 .text.HAL_TIMEx_PWMN_Start_IT:0000011c $d + /tmp/ccXMh04L.s:3205 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t + /tmp/ccXMh04L.s:3211 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT + /tmp/ccXMh04L.s:3376 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t + ARM GAS /tmp/ccXMh04L.s page 172 + + + /tmp/ccXMh04L.s:3382 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA + /tmp/ccXMh04L.s:3801 .text.HAL_TIMEx_PWMN_Start_DMA:00000204 $d + /tmp/ccXMh04L.s:3810 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t + /tmp/ccXMh04L.s:3816 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA + /tmp/ccXMh04L.s:3979 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t + /tmp/ccXMh04L.s:3985 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start + /tmp/ccXMh04L.s:4113 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t + /tmp/ccXMh04L.s:4119 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop + /tmp/ccXMh04L.s:4214 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t + /tmp/ccXMh04L.s:4220 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT + /tmp/ccXMh04L.s:4358 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t + /tmp/ccXMh04L.s:4364 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT + /tmp/ccXMh04L.s:4469 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t + /tmp/ccXMh04L.s:4475 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent + /tmp/ccXMh04L.s:4595 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t + /tmp/ccXMh04L.s:4601 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT + /tmp/ccXMh04L.s:4721 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t + /tmp/ccXMh04L.s:4727 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA + /tmp/ccXMh04L.s:4864 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000088 $d + /tmp/ccXMh04L.s:5362 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt + /tmp/ccXMh04L.s:5418 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt + /tmp/ccXMh04L.s:4871 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t + /tmp/ccXMh04L.s:4877 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization + /tmp/ccXMh04L.s:5026 .text.HAL_TIMEx_MasterConfigSynchronization:0000007c $d + /tmp/ccXMh04L.s:5031 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t + /tmp/ccXMh04L.s:5037 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime + /tmp/ccXMh04L.s:5204 .text.HAL_TIMEx_ConfigBreakDeadTime:00000084 $d + /tmp/ccXMh04L.s:5209 .text.HAL_TIMEx_RemapConfig:00000000 $t + /tmp/ccXMh04L.s:5215 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig + /tmp/ccXMh04L.s:5258 .text.HAL_TIMEx_GroupChannel5:00000000 $t + /tmp/ccXMh04L.s:5264 .text.HAL_TIMEx_GroupChannel5:00000000 HAL_TIMEx_GroupChannel5 + /tmp/ccXMh04L.s:5335 .text.HAL_TIMEx_CommutCallback:00000000 $t + /tmp/ccXMh04L.s:5341 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback + /tmp/ccXMh04L.s:5356 .text.TIMEx_DMACommutationCplt:00000000 $t + /tmp/ccXMh04L.s:5391 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t + /tmp/ccXMh04L.s:5397 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback + /tmp/ccXMh04L.s:5412 .text.TIMEx_DMACommutationHalfCplt:00000000 $t + /tmp/ccXMh04L.s:5447 .text.HAL_TIMEx_BreakCallback:00000000 $t + /tmp/ccXMh04L.s:5453 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback + /tmp/ccXMh04L.s:5468 .text.HAL_TIMEx_Break2Callback:00000000 $t + /tmp/ccXMh04L.s:5474 .text.HAL_TIMEx_Break2Callback:00000000 HAL_TIMEx_Break2Callback + /tmp/ccXMh04L.s:5489 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t + /tmp/ccXMh04L.s:5495 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState + /tmp/ccXMh04L.s:5513 .text.HAL_TIMEx_GetChannelNState:00000000 $t + /tmp/ccXMh04L.s:5519 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState + +UNDEFINED SYMBOLS +HAL_TIM_ErrorCallback +HAL_TIM_PWM_PulseFinishedCallback +TIM_Base_SetConfig +TIM_TI1_SetConfig +TIM_OC2_SetConfig +TIM_CCxChannelCmd +HAL_DMA_Start_IT +TIM_DMACaptureCplt +TIM_DMACaptureHalfCplt +TIM_DMAError + ARM GAS /tmp/ccXMh04L.s page 173 + + +HAL_DMA_Abort_IT +TIM_DMADelayPulseHalfCplt diff --git a/build/stm32f3xx_hal_tim_ex.o b/build/stm32f3xx_hal_tim_ex.o new file mode 100644 index 0000000..3885b60 Binary files /dev/null and b/build/stm32f3xx_hal_tim_ex.o differ diff --git a/build/stm32f3xx_hal_uart.d b/build/stm32f3xx_hal_uart.d new file mode 100644 index 0000000..1cc33e2 --- /dev/null +++ b/build/stm32f3xx_hal_uart.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_uart.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_uart.lst b/build/stm32f3xx_hal_uart.lst new file mode 100644 index 0000000..1572cd3 --- /dev/null +++ b/build/stm32f3xx_hal_uart.lst @@ -0,0 +1,19979 @@ +ARM GAS /tmp/ccqiorEF.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_uart.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c" + 20 .section .text.UART_EndTxTransfer,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 UART_EndTxTransfer: + 27 .LFB179: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @file stm32f3xx_hal_uart.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + Peripheral Control functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ****************************************************************************** + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @attention + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * Copyright (c) 2016 STMicroelectronics. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * All rights reserved. + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This software is licensed under terms that can be found in the LICENSE file + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * in the root directory of this software component. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ****************************************************************************** + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @verbatim + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ##### How to use this driver ##### + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The UART HAL driver can be used as follows: + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart). + ARM GAS /tmp/ccqiorEF.s page 2 + + + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API: + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Enable the USARTx interface clock. + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) UART pins configuration: + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Enable the clock for the UART GPIOs. + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Configure these UART pins as alternate function pull-up. + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT() + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and HAL_UART_Receive_IT() APIs): + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Configure the USARTx interrupt priority. + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Enable the NVIC USART IRQ handle. + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) UART interrupts handling: + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** -@@- The specific UART interrupts (Transmission complete interrupt, + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts) + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** inside the transmit and receive processes. + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA() + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and HAL_UART_Receive_DMA() APIs): + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Declare a DMA handle structure for the Tx/Rx channel. + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Enable the DMAx interface clock. + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Configure the DMA Tx/Rx channel. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+++) Configure the priority and enable the NVIC for the transfer complete + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** interrupt on the DMA Tx/Rx channel. + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the huart handle AdvancedInit structure. + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) For the UART asynchronous mode, initialize the UART registers by calling + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_Init() API. + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) For the UART Half duplex mode, initialize the UART registers by calling + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_HalfDuplex_Init() API. + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** by calling the HAL_LIN_Init() API. + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) For the UART Multiprocessor mode, initialize the UART registers + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** by calling the HAL_MultiProcessor_Init() API. + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) For the UART RS485 Driver Enabled mode, initialize the UART registers + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** by calling the HAL_RS485Ex_Init() API. + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Ini + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** calling the customized HAL_UART_MspInit() API. + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ##### Callback registration ##### + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ================================== + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1 + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** allows the user to configure dynamically the driver callbacks. + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 3 + + + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Use Function HAL_UART_RegisterCallback() to register a user callback. + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Function HAL_UART_RegisterCallback() allows to register following callbacks: + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) TxHalfCpltCallback : Tx Half Complete Callback. + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) TxCpltCallback : Tx Complete Callback. + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) RxHalfCpltCallback : Rx Half Complete Callback. + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) RxCpltCallback : Rx Complete Callback. + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) ErrorCallback : Error Callback. + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) AbortCpltCallback : Abort Complete Callback. + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) WakeupCallback : Wakeup Callback. + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) MspInitCallback : UART MspInit. + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) MspDeInitCallback : UART MspDeInit. + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and a pointer to the user callback function. + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Use function HAL_UART_UnRegisterCallback() to reset a callback to the default + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** weak (surcharged) function. + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and the Callback ID. + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This function allows to reset following callbacks: + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) TxHalfCpltCallback : Tx Half Complete Callback. + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) TxCpltCallback : Tx Complete Callback. + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) RxHalfCpltCallback : Rx Half Complete Callback. + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) RxCpltCallback : Rx Complete Callback. + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) ErrorCallback : Error Callback. + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) AbortCpltCallback : Abort Complete Callback. + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) WakeupCallback : Wakeup Callback. + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) MspInitCallback : UART MspInit. + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) MspDeInitCallback : UART MspDeInit. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** For specific callback RxEventCallback, use dedicated registration/reset functions: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback(). + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** all callbacks are set to the corresponding weak (surcharged) functions: + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Exception done for MspInit and MspDeInit functions that are respectively + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** reset to the legacy weak (surcharged) functions in the HAL_UART_Init() + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand). + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Exception done MspInit/MspDeInit that can be registered/unregistered + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MspInit/DeInit callbacks can be used during the Init/DeInit. + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** In that case first register the MspInit/MspDeInit user callbacks + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit() + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** or HAL_UART_Init() function. + ARM GAS /tmp/ccqiorEF.s page 4 + + + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** not defined, the callback registration feature is not available + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and weak (surcharged) callbacks are used. + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @endverbatim + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ****************************************************************************** + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Includes ------------------------------------------------------------------*/ + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #include "stm32f3xx_hal.h" + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @addtogroup STM32F3xx_HAL_Driver + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART UART + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief HAL UART module driver + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #ifdef HAL_UART_MODULE_ENABLED + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Private typedef -----------------------------------------------------------*/ + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Private define ------------------------------------------------------------*/ + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Private_Constants UART Private Constants + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | U + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE |\ + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameter + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Private macros ------------------------------------------------------------*/ + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Private function prototypes -----------------------------------------------*/ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @addtogroup UART_Private_Functions + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_EndTxTransfer(UART_HandleTypeDef *huart); + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_EndRxTransfer(UART_HandleTypeDef *huart); + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMAError(DMA_HandleTypeDef *hdma); + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma); + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma); + ARM GAS /tmp/ccqiorEF.s page 5 + + + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma); + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma); + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma); + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_TxISR_8BIT(UART_HandleTypeDef *huart); + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_TxISR_16BIT(UART_HandleTypeDef *huart); + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_EndTransmit_IT(UART_HandleTypeDef *huart); + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_RxISR_8BIT(UART_HandleTypeDef *huart); + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Private variables ---------------------------------------------------------*/ + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Exported Constants --------------------------------------------------------*/ + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Exported functions --------------------------------------------------------*/ + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Exported_Functions UART Exported Functions + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialization and Configuration functions + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @verbatim + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ##### Initialization and Configuration functions ##### + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This subsection provides a set of functions allowing to initialize the USARTx or the UARTy + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in asynchronous mode. + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) For the asynchronous mode the parameters below can be configured: + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Baud Rate + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Word Length + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Stop Bit + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the data register is transmitted but is changed by the parity bit. + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Hardware flow control + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Receiver/transmitter modes + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) Over Sampling Method + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) One-Bit Sampling Method + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) For the asynchronous mode, the following advanced features can be configured as well: + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) TX and/or RX pin level inversion + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) data logical level inversion + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) RX and TX pins swap + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) RX overrun detection disabling + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) DMA disabling on RX error + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) MSB first on communication line + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (++) auto Baud rate detection + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** follow respectively the UART asynchronous, UART Half duplex, UART LIN mode + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and UART multiprocessor mode configuration procedures (details for the procedures + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** are available in reference manual). + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @endverbatim + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Depending on the frame length defined by the M1 and M0 bits (7-bit, + ARM GAS /tmp/ccqiorEF.s page 6 + + + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** 8-bit or 9-bit), the possible UART formats are listed in the + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** following table. + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Table 1. UART frame format. + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +-----------------------------------------------------------------------+ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | M1 bit | M0 bit | PCE bit | UART frame | + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** |---------|---------|-----------|---------------------------------------| + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | 0 | 0 | 0 | | SB | 8 bit data | STB | | + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** |---------|---------|-----------|---------------------------------------| + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** |---------|---------|-----------|---------------------------------------| + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | 0 | 1 | 0 | | SB | 9 bit data | STB | | + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** |---------|---------|-----------|---------------------------------------| + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** |---------|---------|-----------|---------------------------------------| + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | 1 | 0 | 0 | | SB | 7 bit data | STB | | + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** |---------|---------|-----------|---------------------------------------| + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +-----------------------------------------------------------------------+ + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialize the UART mode according to the specified + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * parameters in the UART_InitTypeDef and initialize the associated handle. + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart == NULL) + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the parameters */ + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance)); + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the parameters */ + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_INSTANCE(huart->Instance)); + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_RESET) + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Allocate lock resource and initialize it */ + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Lock = HAL_UNLOCKED; + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_InitCallbacksToDefault(huart); + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->MspInitCallback == NULL) + ARM GAS /tmp/ccqiorEF.s page 7 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware */ + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback(huart); + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware : GPIO, CLOCK */ + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_MspInit(huart); + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_DISABLE(huart); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART Communication parameters */ + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_SetConfig(huart) == HAL_ERROR) + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_AdvFeatureConfig(huart); + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In asynchronous mode, the following bits must be kept cleared: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - LINEN and CLKEN bits in the USART_CR2 register, + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_ENABLE(huart); + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_CheckIdleState(huart)); + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialize the half-duplex mode according to the specified + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * parameters in the UART_InitTypeDef and creates the associated handle. + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart == NULL) + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check UART instance */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_RESET) + ARM GAS /tmp/ccqiorEF.s page 8 + + + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Allocate lock resource and initialize it */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Lock = HAL_UNLOCKED; + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_InitCallbacksToDefault(huart); + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->MspInitCallback == NULL) + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback(huart); + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware : GPIO, CLOCK */ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_MspInit(huart); + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_DISABLE(huart); + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART Communication parameters */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_SetConfig(huart) == HAL_ERROR) + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_AdvFeatureConfig(huart); + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In half-duplex mode, the following bits must be kept cleared: + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - LINEN and CLKEN bits in the USART_CR2 register, + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - SCEN and IREN bits in the USART_CR3 register.*/ + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_ENABLE(huart); + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_CheckIdleState(huart)); + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialize the LIN mode according to the specified + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * parameters in the UART_InitTypeDef and creates the associated handle. + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param BreakDetectLength Specifies the LIN break detection length. + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This parameter can be one of the following values: + ARM GAS /tmp/ccqiorEF.s page 9 + + + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart == NULL) + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the LIN UART instance */ + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the Break detection length parameter */ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength)); + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* LIN mode limited to 16-bit oversampling only */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.OverSampling == UART_OVERSAMPLING_8) + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* LIN mode limited to 8-bit data length */ + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.WordLength != UART_WORDLENGTH_8B) + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_RESET) + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Allocate lock resource and initialize it */ + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Lock = HAL_UNLOCKED; + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_InitCallbacksToDefault(huart); + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->MspInitCallback == NULL) + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback(huart); + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware : GPIO, CLOCK */ + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_MspInit(huart); + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_DISABLE(huart); + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART Communication parameters */ + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_SetConfig(huart) == HAL_ERROR) + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + ARM GAS /tmp/ccqiorEF.s page 10 + + + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_AdvFeatureConfig(huart); + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In LIN mode, the following bits must be kept cleared: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - LINEN and CLKEN bits in the USART_CR2 register, + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - SCEN and IREN bits in the USART_CR3 register.*/ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the USART LIN Break detection length. */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_ENABLE(huart); + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_CheckIdleState(huart)); + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialize the multiprocessor mode according to the specified + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * parameters in the UART_InitTypeDef and initialize the associated handle. + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Address UART node address (4-, 6-, 7- or 8-bit long). + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param WakeUpMethod Specifies the UART wakeup method. + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This parameter can be one of the following values: + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note If the user resorts to idle line detection wake up, the Address parameter + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * is useless and ignored by the initialization function. + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note If the user resorts to address mark wake up, the address length detection + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * is configured by default to 4 bits only. For the UART to be able to + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * manage 6-, 7- or 8-bit long addresses detection, the API + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * HAL_MultiProcessorEx_AddressLength_Set() must be called after + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * HAL_MultiProcessor_Init(). + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t Wake + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart == NULL) + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the wake up method parameter */ + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod)); + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_RESET) + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 11 + + + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Allocate lock resource and initialize it */ + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Lock = HAL_UNLOCKED; + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_InitCallbacksToDefault(huart); + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->MspInitCallback == NULL) + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback(huart); + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the low level hardware : GPIO, CLOCK */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_MspInit(huart); + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_DISABLE(huart); + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART Communication parameters */ + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_SetConfig(huart) == HAL_ERROR) + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_AdvFeatureConfig(huart); + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In multiprocessor mode, the following bits must be kept cleared: + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - LINEN and CLKEN bits in the USART_CR2 register, + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - SCEN, HDSEL and IREN bits in the USART_CR3 register. */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK) + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If address mark wake up method is chosen, set the USART address node */ + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS) + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the wake up method by setting the WAKE bit in the CR1 register */ + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_ENABLE(huart); + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_CheckIdleState(huart)); + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + ARM GAS /tmp/ccqiorEF.s page 12 + + + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DeInitialize the UART peripheral. + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart == NULL) + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the parameters */ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_INSTANCE(huart->Instance)); + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_DISABLE(huart); + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR1 = 0x0U; + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR2 = 0x0U; + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR3 = 0x0U; + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->MspDeInitCallback == NULL) + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspDeInitCallback = HAL_UART_MspDeInit; + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DeInit the low level hardware */ + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspDeInitCallback(huart); + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DeInit the low level hardware */ + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_MspDeInit(huart); + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_RESET; + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_RESET; + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialize the UART MSP. + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart) + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/ccqiorEF.s page 13 + + + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_MspInit can be implemented in the user file + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DeInitialize the UART MSP. + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_MspDeInit can be implemented in the user file + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Register a User UART Callback + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * To be used instead of the weak predefined callback + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_In + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart uart handle + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param CallbackID ID of the callback to be registered + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This parameter can be one of the following values: + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pCallback pointer to the Callback function + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef C + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pUART_CallbackTypeDef pCallback) + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef status = HAL_OK; + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (pCallback == NULL) + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 14 + + + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** switch (CallbackID) + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_TX_HALFCOMPLETE_CB_ID : + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxHalfCpltCallback = pCallback; + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_TX_COMPLETE_CB_ID : + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxCpltCallback = pCallback; + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_RX_HALFCOMPLETE_CB_ID : + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxHalfCpltCallback = pCallback; + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_RX_COMPLETE_CB_ID : + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxCpltCallback = pCallback; + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ERROR_CB_ID : + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback = pCallback; + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ABORT_COMPLETE_CB_ID : + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortCpltCallback = pCallback; + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortTransmitCpltCallback = pCallback; + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortReceiveCpltCallback = pCallback; + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_WAKEUP_CB_ID : + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->WakeupCallback = pCallback; + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPINIT_CB_ID : + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = pCallback; + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID : + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspDeInitCallback = pCallback; + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** default : + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else if (huart->gState == HAL_UART_STATE_RESET) + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** switch (CallbackID) + ARM GAS /tmp/ccqiorEF.s page 15 + + + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPINIT_CB_ID : + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = pCallback; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID : + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspDeInitCallback = pCallback; + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** default : + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return status; + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Unregister an UART Callback + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * UART callaback is redirected to the weak predefined callback + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note The HAL_UART_UnRegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_ + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart uart handle + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param CallbackID ID of the callback to be unregistered + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This parameter can be one of the following values: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef status = HAL_OK; + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_UART_STATE_READY == huart->gState) + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** switch (CallbackID) + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_TX_HALFCOMPLETE_CB_ID : + ARM GAS /tmp/ccqiorEF.s page 16 + + + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHa + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_TX_COMPLETE_CB_ID : + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpl + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_RX_HALFCOMPLETE_CB_ID : + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHal + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_RX_COMPLETE_CB_ID : + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpl + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ERROR_CB_ID : + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak Error + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ABORT_COMPLETE_CB_ID : + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak Abort + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** AbortTransmitCplt + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** AbortReceiveCpltC + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_WAKEUP_CB_ID : + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak Wakeu + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPINIT_CB_ID : + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspIn + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID : + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDe + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** default : + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else if (HAL_UART_STATE_RESET == huart->gState) + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** switch (CallbackID) + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPINIT_CB_ID : + ARM GAS /tmp/ccqiorEF.s page 17 + + + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID : + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->MspDeInitCallback = HAL_UART_MspDeInit; + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** default : + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return status; + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Register a User UART Rx Event Callback + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * To be used instead of the weak predefined callback + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Uart handle + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pCallback Pointer to the Rx Event Callback function + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallback + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef status = HAL_OK; + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (pCallback == NULL) + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process locked */ + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback = pCallback; + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Release Lock */ + ARM GAS /tmp/ccqiorEF.s page 18 + + + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return status; + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UnRegister the UART Rx Event Callback + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefine + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Uart handle + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef status = HAL_OK; + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process locked */ + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** status = HAL_ERROR; + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Release Lock */ + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return status; + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Exported_Functions_Group2 IO operation functions + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART Transmit/Receive functions + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @verbatim + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ##### IO operation functions ##### + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This subsection provides a set of functions allowing to manage the UART asynchronous + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and Half duplex data transfers. + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) There are two mode of transfer: + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) Blocking mode: The communication is performed in polling mode. + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The HAL status of all data processing is returned by the same function + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** after finishing transfer. + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) Non-Blocking mode: The communication is performed using Interrupts + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** or DMA, These API's return the HAL status. +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The end of the data processing will be indicated through the + ARM GAS /tmp/ccqiorEF.s page 19 + + +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** dedicated UART IRQ when using Interrupt mode or the DMA IRQ when +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** using DMA mode. +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** will be executed respectively at the end of the transmit or Receive process +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** The HAL_UART_ErrorCallback()user callback will be executed when a communication error is +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Blocking mode API's are : +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Transmit() +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Receive() +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Non-Blocking mode API's with Interrupt are : +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Transmit_IT() +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Receive_IT() +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_IRQHandler() +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Non-Blocking mode API's with DMA are : +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Transmit_DMA() +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Receive_DMA() +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_DMAPause() +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_DMAResume() +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_DMAStop() +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_TxHalfCpltCallback() +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_TxCpltCallback() +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_RxHalfCpltCallback() +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_RxCpltCallback() +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_ErrorCallback() +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) Non-Blocking mode transfers could be aborted using Abort API's : +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Abort() +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortTransmit() +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortReceive() +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_Abort_IT() +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortTransmit_IT() +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortReceive_IT() +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Call +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortCpltCallback() +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortTransmitCpltCallback() +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_AbortReceiveCpltCallback() +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes o +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** reception services: +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UARTEx_RxEventCallback() +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Errors are handled as follows : +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but er +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in Interrupt mode reception . +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Received character is then retrieved and stored in Rx buffer, Error code is set to allow +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** to identify error type, and HAL_UART_ErrorCallback() user callback is executed. +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Transfer is kept ongoing on UART side. +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If user wants to abort it, Abort services should be called by user. +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) Error is considered as Blocking : Transfer could not be completed properly and is aborte +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. + ARM GAS /tmp/ccqiorEF.s page 20 + + +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** user callback is executed. +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** -@- In the Half duplex communication, it is forbidden to run the transmit +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @endverbatim +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Send an amount of data in blocking mode. +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1- +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the sent data is handled as a set of u16. In this case, Size must indicate the number +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * of u16 provided through pData. +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be sent. +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Timeout Timeout duration. +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const uint8_t *pdata8bits; +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const uint16_t *pdata16bits; +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((pData == NULL) || (Size == 0U)) +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init tickstart for timeout management */ +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tickstart = HAL_GetTick(); +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits = NULL; +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = (const uint16_t *) pData; +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits = pData; +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = NULL; +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** while (huart->TxXferCount > 0U) + ARM GAS /tmp/ccqiorEF.s page 21 + + +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (pdata8bits == NULL) +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* At end of Tx process, restore huart->gState to Ready */ +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Receive an amount of data in blocking mode. +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1- +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the received data is handled as a set of u16. In this case, Size must indicate the numb +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * of u16 available through pData. +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received. +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Timeout Timeout duration. +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32 +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint8_t *pdata8bits; +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t *pdata16bits; +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t uhMask; +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 22 + + +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_READY) +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((pData == NULL) || (Size == 0U)) +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init tickstart for timeout management */ +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tickstart = HAL_GetTick(); +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = Size; +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Computation of UART mask to apply to RDR register */ +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_MASK_COMPUTATION(huart); +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits = NULL; +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = (uint16_t *) pData; +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits = pData; +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = NULL; +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* as long as data have to be received */ +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** while (huart->RxXferCount > 0U) +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (pdata8bits == NULL) +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* At end of Rx process, restore huart->RxState to Ready */ + ARM GAS /tmp/ccqiorEF.s page 23 + + +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Send an amount of data in interrupt mode. +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1- +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the sent data is handled as a set of u16. In this case, Size must indicate the number +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * of u16 provided through pData. +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be sent. +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Si +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((pData == NULL) || (Size == 0U)) +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr = pData; +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the Tx ISR function pointer according to the data word length */ +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = UART_TxISR_16BIT; +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = UART_TxISR_8BIT; +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the Transmit Data Register Empty interrupt */ +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 24 + + +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Receive an amount of data in interrupt mode. +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1- +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the received data is handled as a set of u16. In this case, Size must indicate the numb +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * of u16 available through pData. +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received. +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_READY) +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((pData == NULL) || (Size == 0U)) +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set Reception type to Standard reception */ +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that USART RTOEN bit is set */ +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Receiver Timeout Interrupt */ +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_Start_Receive_IT(huart, pData, Size)); +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Send an amount of data in DMA mode. +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1- +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the sent data is handled as a set of u16. In this case, Size must indicate the number +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * of u16 provided through pData. +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be sent. +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t S +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((pData == NULL) || (Size == 0U)) +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 25 + + +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr = pData; +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA transfer complete callback */ +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Half transfer complete callback */ +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the DMA error callback */ +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferErrorCallback = UART_DMAError; +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the DMA abort callback */ +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = NULL; +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART transmit DMA channel */ +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance-> +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState to ready */ +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the TC flag in the ICR register */ +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the DMA transfer for transmit request by setting the DMAT bit +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the UART CR3 register */ +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Receive an amount of data in DMA mode. +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When the UART parity is enabled (PCE = 1), the received data contain +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the parity bit (MSB position). +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1- +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the received data is handled as a set of u16. In this case, Size must indicate the numb + ARM GAS /tmp/ccqiorEF.s page 26 + + +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * of u16 available through pData. +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received. +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_READY) +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((pData == NULL) || (Size == 0U)) +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set Reception type to Standard reception */ +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that USART RTOEN bit is set */ +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Receiver Timeout Interrupt */ +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_Start_Receive_DMA(huart, pData, Size)); +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Pause the DMA Transfer. +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState; +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Tx request */ +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 27 + + +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Rx request */ +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Resume the DMA Transfer. +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_BUSY_TX) +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART DMA Tx request */ +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_BUSY_RX) +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Overrun flag before resuming the Rx transfer */ +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.Parity != UART_PARITY_NONE) +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART DMA Rx request */ +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Stop the DMA Transfer. +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* The Lock is not implemented on this API to allow the user application +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the stream and the corresponding call back is executed. */ +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState; +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Stop UART DMA Tx request if ongoing */ +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && + ARM GAS /tmp/ccqiorEF.s page 28 + + +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel */ +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndTxTransfer(huart); +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Stop UART DMA Rx request if ongoing */ +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel */ +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Abort ongoing transfers (blocking mode). +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This procedure performs following operations : +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable UART Interrupts (Tx and Rx) +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) + ARM GAS /tmp/ccqiorEF.s page 29 + + +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Set handle State to READY +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure is executed in blocking mode : when exiting function, Abort is considere +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USA +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel if enabled */ +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Tx request if enabled */ +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback to Null. +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** No call back execution at end of DMA abort procedure */ +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = NULL; +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel if enabled */ +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */ +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback to Null. +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** No call back execution at end of DMA abort procedure */ +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 30 + + +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Tx and Rx transfer counters */ +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Discard the received data */ +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState and huart->RxState to Ready */ +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Abort ongoing Transmit transfer (blocking mode). +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This procedure performs following operations : +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable UART Interrupts (Tx) +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Set handle State to READY +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure is executed in blocking mode : when exiting function, Abort is considere +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE and TCIE interrupts */ +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel if enabled */ +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Tx request if enabled */ +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) + ARM GAS /tmp/ccqiorEF.s page 31 + + +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback to Null. +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** No call back execution at end of DMA abort procedure */ +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = NULL; +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT) +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Tx transfer counter */ +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState to Ready */ +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Abort ongoing Receive transfer (blocking mode). +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This procedure performs following operations : +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable UART Interrupts (Rx) +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Set handle State to READY +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure is executed in blocking mode : when exiting function, Abort is considere +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel if enabled */ +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */ +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ARM GAS /tmp/ccqiorEF.s page 32 + + +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback to Null. +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** No call back execution at end of DMA abort procedure */ +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT) +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Rx transfer counter */ +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Discard the received data */ +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->RxState to Ready */ +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Abort ongoing transfers (Interrupt mode). +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This procedure performs following operations : +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable UART Interrupts (Tx and Rx) +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Set handle State to READY +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - At abort completion, call user abort complete callback +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * considered as completed only when user abort complete callback is executed (not when ex +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t abortcplt = 1U; +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable interrupts */ +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USA + ARM GAS /tmp/ccqiorEF.s page 33 + + +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks sh +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** before any call to DMA Abort functions */ +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA Tx Handle is valid */ +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Otherwise, set it to NULL */ +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = NULL; +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA Rx Handle is valid */ +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Otherwise, set it to NULL */ +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel if enabled */ +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable DMA Tx at UART level */ +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART Tx DMA Abort callback has already been initialised : +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort DMA TX */ +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = NULL; +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else + ARM GAS /tmp/ccqiorEF.s page 34 + + +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** abortcplt = 0U; +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel if enabled */ +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */ +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART Rx DMA Abort callback has already been initialised : +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort DMA RX */ +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** abortcplt = 1U; +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** abortcplt = 0U; +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if no DMA abort complete callback execution is required => call user Abort Complete callback * +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (abortcplt == 1U) +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Tx and Rx transfer counters */ +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear ISR function pointers */ +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset errorCode */ +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Discard the received data */ +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState and huart->RxState to Ready */ +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 35 + + +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort complete callback */ +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortCpltCallback(huart); +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort complete callback */ +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortCpltCallback(huart); +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Abort ongoing Transmit transfer (Interrupt mode). +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This procedure performs following operations : +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable UART Interrupts (Tx) +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Set handle State to READY +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - At abort completion, call user abort complete callback +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * considered as completed only when user abort complete callback is executed (not when ex +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable interrupts */ +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel if enabled */ +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Tx request if enabled */ +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback : +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback; +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort DMA TX */ +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback(huart->hdmatx); +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Tx transfer counter */ +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 36 + + +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear TxISR function pointers */ +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState to Ready */ +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort Transmit Complete Callback */ +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortTransmitCpltCallback(huart); +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort Transmit Complete Callback */ +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortTransmitCpltCallback(huart); +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Tx transfer counter */ +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear TxISR function pointers */ +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState to Ready */ +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort Transmit Complete Callback */ +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortTransmitCpltCallback(huart); +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort Transmit Complete Callback */ +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortTransmitCpltCallback(huart); +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Abort ongoing Receive transfer (Interrupt mode). +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * This procedure performs following operations : +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable UART Interrupts (Rx) +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - Set handle State to READY +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - At abort completion, call user abort complete callback +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * considered as completed only when user abort complete callback is executed (not when ex +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 37 + + +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel if enabled */ +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */ +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback : +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback; +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort DMA RX */ +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback(huart->hdmarx); +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Rx transfer counter */ +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RxISR function pointer */ +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = NULL; +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_F +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Discard the received data */ +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->RxState to Ready */ +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort Receive Complete Callback */ +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortReceiveCpltCallback(huart); +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort Receive Complete Callback */ +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortReceiveCpltCallback(huart); +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 38 + + +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset Rx transfer counter */ +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RxISR function pointer */ +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = NULL; +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->RxState to Ready */ +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort Receive Complete Callback */ +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortReceiveCpltCallback(huart); +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort Receive Complete Callback */ +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortReceiveCpltCallback(huart); +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Handle UART interrupt request. +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t isrflags = READ_REG(huart->Instance->ISR); +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr1its = READ_REG(huart->Instance->CR1); +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3); +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t errorflags; +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t errorcode; +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If no error occurs */ +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (errorflags == 0U) +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART in mode Receiver ---------------------------------------------------*/ +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_RXNE) != 0U) +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_RXNEIE) != 0U)) +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxISR != NULL) +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR(huart); +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 39 + + +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If some errors occur */ +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((errorflags != 0U) +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (((cr3its & USART_CR3_EIE) != 0U) +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART parity error interrupt occurred -------------------------------------*/ +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_PE; +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART frame error interrupt occurred --------------------------------------*/ +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_FE; +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART noise error interrupt occurred --------------------------------------*/ +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_NE; +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART Over-Run interrupt occurred -----------------------------------------*/ +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_ORE) != 0U) +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (((cr1its & USART_CR1_RXNEIE) != 0U) || +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((cr3its & USART_CR3_EIE) != 0U))) +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_ORE; +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART Receiver Timeout interrupt occurred ---------------------------------*/ +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_RTO; +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call UART Error Call back function if need be ----------------------------*/ +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ErrorCode != HAL_UART_ERROR_NONE) +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART in mode Receiver --------------------------------------------------*/ +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_RXNE) != 0U) +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_RXNEIE) != 0U)) +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxISR != NULL) + ARM GAS /tmp/ccqiorEF.s page 40 + + +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR(huart); +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If Error is to be considered as blocking : +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - Receiver Timeout error in Reception +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - Overrun error in Reception +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** - any error occurs in DMA mode reception +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** errorcode = huart->ErrorCode; +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Blocking error : transfer is aborted +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Set the UART state ready to be able to start again the process, +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel if enabled */ +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */ +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort the UART DMA Rx channel */ +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Abort callback : +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Abort DMA RX */ +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback(huart->hdmarx); +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call user error callback */ +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered error callback*/ +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback(huart); +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak error callback*/ +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_ErrorCallback(huart); +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call user error callback */ +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered error callback*/ + ARM GAS /tmp/ccqiorEF.s page 41 + + +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback(huart); +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak error callback*/ +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_ErrorCallback(huart); +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Non Blocking error : transfer could go on. +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Error is notified to user through user error callback */ +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered error callback*/ +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback(huart); +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak error callback*/ +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_ErrorCallback(huart); +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } /* End if some error occurs */ +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check current reception Mode : +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If Reception till IDLE event has been selected : */ +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((isrflags & USART_ISR_IDLE) != 0U) +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_ISR_IDLE) != 0U)) +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check if DMA mode is enabled in UART */ +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA mode enabled */ +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check received length : If all expected data are received, do nothing, +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (DMA cplt callback will be called). +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Otherwise, if at least one data has already been received, IDLE event is to be notified to +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((nb_remaining_rx_data > 0U) +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_remaining_rx_data < huart->RxXferSize)) +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reception is not complete */ +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = nb_remaining_rx_data; +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In Normal mode, end DMA xfer and HAL UART Rx process*/ +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the DMA transfer for the receiver request by resetting the DMAR bit +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the UART CR3 register */ +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ARM GAS /tmp/ccqiorEF.s page 42 + + +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* At end of Rx process, restore huart->RxState to Ready */ +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Last bytes received, so no need as the abort is immediate */ +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (void)HAL_DMA_Abort(huart->hdmarx); +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize type of RxEvent that correspond to RxEvent callback execution; +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** In this case, Rx Event type is Idle Event */ +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_IDLE; +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx Event callback*/ +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA mode not enabled */ +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check received length : If all expected data are received, do nothing. +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Otherwise, if at least one data has already been received, IDLE event is to be notified to +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->RxXferCount > 0U) +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_rx_data > 0U)) +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Parity Error Interrupt and RXNE interrupts */ +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Rx process is completed, restore huart->RxState to Ready */ +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RxISR function pointer */ +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize type of RxEvent that correspond to RxEvent callback execution; +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** In this case, Rx Event type is Idle Event */ +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_IDLE; +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx complete callback*/ +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback(huart, nb_rx_data); +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else + ARM GAS /tmp/ccqiorEF.s page 43 + + +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_RxEventCallback(huart, nb_rx_data); +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART Rx state is not reset as a reception process might be ongoing. +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If UART handle state fields need to be reset to READY, this could be done in Wakeup callback +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Wakeup Callback */ +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->WakeupCallback(huart); +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Wakeup Callback */ +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_WakeupCallback(huart); +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART in mode Transmitter ------------------------------------------------*/ +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_TXE) != 0U) +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_TXEIE) != 0U)) +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->TxISR != NULL) +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR(huart); +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* UART in mode Transmitter (transmission end) -----------------------------*/ +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndTransmit_IT(huart); +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Tx Transfer completed callback. +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/ccqiorEF.s page 44 + + +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_TxCpltCallback can be implemented in the user file. +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Tx Half Transfer completed callback. +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE: This function should not be modified, when the callback is needed, +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_TxHalfCpltCallback can be implemented in the user file. +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Rx Transfer completed callback. +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_RxCpltCallback can be implemented in the user file. +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Rx Half Transfer completed callback. +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE: This function should not be modified, when the callback is needed, +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_RxHalfCpltCallback can be implemented in the user file. +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART error callback. +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccqiorEF.s page 45 + + +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_ErrorCallback can be implemented in the user file. +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART Abort Complete callback. +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_AbortCpltCallback can be implemented in the user file. +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART Abort Complete callback. +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart) +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file. +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART Abort Receive Complete callback. +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart) +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Reception Event Callback (Rx event notification called after use of advanced reception +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Number of data available in application reception buffer (indicates a position in +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * reception buffer until which, data are available) + ARM GAS /tmp/ccqiorEF.s page 46 + + +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(huart); +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(Size); +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* NOTE : This function should not be modified, when the callback is needed, +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** the HAL_UARTEx_RxEventCallback can be implemented in the user file. +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART control functions +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @verbatim +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ##### Peripheral Control functions ##### +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** =============================================================================== +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This subsection provides a set of functions allowing to control the UART. +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on th +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_UART_DisableReceiverTimeout() API disables the receiver timeout feature +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) UART_SetConfig() API configures the UART peripheral +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) HAL_LIN_SendBreak() API transmits the break characters +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @endverbatim +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Update on the fly the receiver timeout value in RTOR register. +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Pointer to a UART_HandleTypeDef structure that contains +2585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the configuration information for the specified UART module. +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param TimeoutValue receiver timeout value in number of baud blocks. The timeout +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * value must be less or equal to 0x0FFFFFFFF. +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue) +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue)); +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue); +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + ARM GAS /tmp/ccqiorEF.s page 47 + + +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Enable the UART receiver timeout feature. +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Pointer to a UART_HandleTypeDef structure that contains +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the configuration information for the specified UART module. +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart) +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process Locked */ +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the USART RTOEN bit */ +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN); +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process Unlocked */ +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Disable the UART receiver timeout feature. +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Pointer to a UART_HandleTypeDef structure that contains +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the configuration information for the specified UART module. +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart) +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process Locked */ +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the USART RTOEN bit */ +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN); +2644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process Unlocked */ +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +2649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 48 + + +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_BUSY; +2655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Enable UART in mute mode (does not mean UART enters mute mode; +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called). +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart) +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable USART mute mode by setting the MME bit in the CR1 register */ +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME); +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_CheckIdleState(huart)); +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Disable UART mute mode (does not mean the UART actually exits mute mode +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * as it may not have been in mute mode at this very moment). +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart) +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable USART mute mode by clearing the MME bit in the CR1 register */ +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (UART_CheckIdleState(huart)); +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Enter UART mute mode (means UART actually enters mute mode). +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called. +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart) +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST); +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Enable the UART transmitter and disable the UART receiver. + ARM GAS /tmp/ccqiorEF.s page 49 + + +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear TE and RE bits */ +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE); +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Enable the UART receiver and disable the UART transmitter. +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status. +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear TE and RE bits */ +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE); +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Transmit break characters. +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart) +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the parameters */ +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 50 + + +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Send break characters */ +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST); +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief UART Peripheral State functions +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @verbatim +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ============================================================================== +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ##### Peripheral State and Error functions ##### +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ============================================================================== +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** [..] +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** This subsection provides functions allowing to : +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) Return the UART handle state. +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (+) Return the UART handle error code +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** @endverbatim +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Return the UART handle state. +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Pointer to a UART_HandleTypeDef structure that contains +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the configuration information for the specified UART. +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL state +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart) +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t temp1; +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t temp2; +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** temp1 = huart->gState; +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** temp2 = huart->RxState; +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return (HAL_UART_StateTypeDef)(temp1 | temp2); +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Return the UART handle error code. +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart Pointer to a UART_HandleTypeDef structure that contains +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the configuration information for the specified UART. +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval UART Error Code +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart) +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return huart->ErrorCode; + ARM GAS /tmp/ccqiorEF.s page 51 + + +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @} +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** @defgroup UART_Private_Functions UART Private Functions +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @{ +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Initialize the callbacks to their default values. +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval none +2842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart) +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init the UART Callback settings */ +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltC +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallb +2849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltC +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallb +2851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallba +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCa +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransm +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiv +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallb +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCall +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +2860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Configure the UART peripheral. +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tmpreg; +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t brrtemp; +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_ClockSourceTypeDef clocksource; +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t usartdiv; +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef ret = HAL_OK; +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t pclk; +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the parameters */ +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling)); +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_PARITY(huart->Init.Parity)); + ARM GAS /tmp/ccqiorEF.s page 52 + + +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_MODE(huart->Init.Mode)); +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); +2885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*-------------------------- USART CR1 Configuration -----------------------*/ +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the UART Word Length, Parity, Mode and oversampling: +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * set the M bits according to huart->Init.WordLength value +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * set PCE and PS bits according to huart->Init.Parity value +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * set TE and RE bits according to huart->Init.Mode value +2892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * set OVER8 bit according to huart->Init.OverSampling value */ +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.O +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*-------------------------- USART CR2 Configuration -----------------------*/ +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Configure the UART Stop Bits: Set STOP[13:12] bits according +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * to huart->Init.StopBits value */ +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*-------------------------- USART CR3 Configuration -----------------------*/ +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Configure +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - UART HardWare Flow Control: set CTSE and RTSE bits according +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * to huart->Init.HwFlowCtl value +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * - one-bit sampling method versus three samples' majority rule according +2906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * to huart->Init.OneBitSampling (not applicable to LPUART) */ +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmpreg = (uint32_t)huart->Init.HwFlowCtl; +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmpreg |= huart->Init.OneBitSampling; +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*-------------------------- USART BRR Configuration -----------------------*/ +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_GETCLOCKSOURCE(huart, clocksource); +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.OverSampling == UART_OVERSAMPLING_8) +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** switch (clocksource) +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK1: +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = HAL_RCC_GetPCLK1Freq(); +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK2: +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = HAL_RCC_GetPCLK2Freq(); +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_HSI: +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = (uint32_t) HSI_VALUE; +2928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_SYSCLK: +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = HAL_RCC_GetSysClockFreq(); +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_LSE: +2933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = (uint32_t) LSE_VALUE; +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** default: +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = 0U; +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ret = HAL_ERROR; +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + ARM GAS /tmp/ccqiorEF.s page 53 + + +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* USARTDIV must be greater than or equal to 0d16 */ +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (pclk != 0U) +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** brrtemp = (uint16_t)(usartdiv & 0xFFF0U); +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->BRR = brrtemp; +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ret = HAL_ERROR; +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** switch (clocksource) +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK1: +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = HAL_RCC_GetPCLK1Freq(); +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK2: +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = HAL_RCC_GetPCLK2Freq(); +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_HSI: +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = (uint32_t) HSI_VALUE; +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_SYSCLK: +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = HAL_RCC_GetSysClockFreq(); +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_LSE: +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = (uint32_t) LSE_VALUE; +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** default: +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pclk = 0U; +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ret = HAL_ERROR; +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (pclk != 0U) +2983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* USARTDIV must be greater than or equal to 0d16 */ +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->BRR = (uint16_t)usartdiv; +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ret = HAL_ERROR; +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 54 + + +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear ISR function pointers */ +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return ret; +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Configure the UART peripheral advanced features. +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check whether the set of advanced features to configure is properly set */ +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure TX pin active level inversion */ +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure RX pin active level inversion */ +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure data inversion */ +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) +3031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure RX/TX pins swap */ +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure RX overrun detection disabling */ +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure DMA disabling on reception error */ +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 55 + + +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure auto Baud rate detection scheme */ +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* set auto Baudrate detection parameters if detection is enabled */ +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* if required, configure MSB first on communication line */ +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) +3073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); +3076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Check the UART Idle State. +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize the UART ErrorCode */ +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Init tickstart for timeout management */ +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tickstart = HAL_GetTick(); +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check if the Transmitter is enabled */ +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Wait until TEACK flag is set */ +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALU +3099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXE interrupt for the interrupt process */ +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE)); +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Timeout occurred */ +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 56 + + +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check if the Receiver is enabled */ +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Wait until REACK flag is set */ +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALU +3117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** interrupts for the interrupt process */ +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Timeout occurred */ +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +3129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize the UART State */ +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief This function handles UART Communication Timeout. It waits +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * until a flag is no longer in the specified status. +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Flag Specifies the UART flag to check +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Status The actual Flag status (SET or RESET) +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Tickstart Tick start value +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Timeout Timeout duration +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t Tickstart, uint32_t Timeout) +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Wait until flag is set */ +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check for the Timeout */ +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (Timeout != HAL_MAX_DELAY) +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 57 + + +3167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear Overrun Error flag*/ +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Blocking error : transfer is aborted +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Set the UART state ready to be able to start again the process, +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Disable Rx Interrupts if ongoing */ +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_ORE; +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process Unlocked */ +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear Receiver Timeout flag*/ +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Blocking error : transfer is aborted +3193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Set the UART state ready to be able to start again the process, +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** Disable Rx Interrupts if ongoing */ +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); +3196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_RTO; +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Process Unlocked */ +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UNLOCK(huart); +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_TIMEOUT; +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Start Receive operation in interrupt mode. +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This function could be called by all HAL UART API providing reception in Interrupt mode +3213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When calling this function, parameters validity is considered as already checked, +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * i.e. Rx State, buffer address, ... +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * UART Handle is assumed as Locked. +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received. +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +3220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = pData; + ARM GAS /tmp/ccqiorEF.s page 58 + + +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = Size; +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Computation of UART mask to apply to RDR register */ +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_MASK_COMPUTATION(huart); +3230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the Rx ISR function pointer according to the data word length */ +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = UART_RxISR_16BIT; +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = UART_RxISR_8BIT; +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.Parity != UART_PARITY_NONE) +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); +3251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE); +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Start Receive operation in DMA mode. +3261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note This function could be called by all HAL UART API providing reception in DMA mode. +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When calling this function, parameters validity is considered as already checked, +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * i.e. Rx State, buffer address, ... +3264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * UART Handle is assumed as Locked. +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received. +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval HAL status +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = pData; +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA transfer complete callback */ + ARM GAS /tmp/ccqiorEF.s page 59 + + +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the UART DMA Half transfer complete callback */ +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the DMA error callback */ +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferErrorCallback = UART_DMAError; +3288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set the DMA abort callback */ +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the DMA channel */ +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPt +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set error code to DMA */ +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_DMA; +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->RxState to ready */ +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_ERROR; +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Parity Error Interrupt */ +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->Init.Parity != UART_PARITY_NONE) +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); +3309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the DMA transfer for the receiver request by setting the DMAR bit +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the UART CR3 register */ +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return HAL_OK; +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit compl +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_EndTxTransfer(UART_HandleTypeDef *huart) +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 28 .loc 1 3328 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 33 .LVL0: + 34 .L2: +3329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE and TCIE interrupts */ +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); + ARM GAS /tmp/ccqiorEF.s page 60 + + + 35 .loc 1 3330 3 discriminator 1 view .LVU1 + 36 .LBB414: + 37 .loc 1 3330 3 discriminator 1 view .LVU2 + 38 .loc 1 3330 3 discriminator 1 view .LVU3 + 39 .loc 1 3330 3 discriminator 1 view .LVU4 + 40 0000 0268 ldr r2, [r0] + 41 .LVL1: + 42 .LBB415: + 43 .LBI415: + 44 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + ARM GAS /tmp/ccqiorEF.s page 61 + + + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + ARM GAS /tmp/ccqiorEF.s page 62 + + + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccqiorEF.s page 63 + + + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccqiorEF.s page 64 + + + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + ARM GAS /tmp/ccqiorEF.s page 65 + + + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccqiorEF.s page 66 + + + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqiorEF.s page 67 + + + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + ARM GAS /tmp/ccqiorEF.s page 68 + + + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + ARM GAS /tmp/ccqiorEF.s page 69 + + + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 70 + + + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + ARM GAS /tmp/ccqiorEF.s page 71 + + + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + ARM GAS /tmp/ccqiorEF.s page 72 + + + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccqiorEF.s page 73 + + + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + ARM GAS /tmp/ccqiorEF.s page 74 + + + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccqiorEF.s page 75 + + + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + ARM GAS /tmp/ccqiorEF.s page 76 + + + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + ARM GAS /tmp/ccqiorEF.s page 77 + + + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; +1002:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1003:Drivers/CMSIS/Include/cmsis_gcc.h **** +1004:Drivers/CMSIS/Include/cmsis_gcc.h **** +1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros +1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. +1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros +1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value +1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz +1012:Drivers/CMSIS/Include/cmsis_gcc.h **** +1013:Drivers/CMSIS/Include/cmsis_gcc.h **** +1014:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ +1015:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ +1016:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + ARM GAS /tmp/ccqiorEF.s page 78 + + +1017:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +1018:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) +1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. +1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data +1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) +1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) +1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1027:Drivers/CMSIS/Include/cmsis_gcc.h **** +1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) +1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else +1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not +1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. +1033:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1034:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ +1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1038:Drivers/CMSIS/Include/cmsis_gcc.h **** +1039:Drivers/CMSIS/Include/cmsis_gcc.h **** +1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) +1042:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. +1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data +1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) +1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) +1047:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1049:Drivers/CMSIS/Include/cmsis_gcc.h **** +1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) +1051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #else +1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not +1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. +1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ +1059:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1060:Drivers/CMSIS/Include/cmsis_gcc.h **** +1061:Drivers/CMSIS/Include/cmsis_gcc.h **** +1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) +1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. +1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data +1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) +1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) + 45 .loc 2 1068 31 view .LVU5 + 46 .LBB416: +1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 47 .loc 2 1070 5 view .LVU6 + ARM GAS /tmp/ccqiorEF.s page 79 + + +1071:Drivers/CMSIS/Include/cmsis_gcc.h **** +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + 48 .loc 2 1072 4 view .LVU7 + 49 .syntax unified + 50 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 51 0002 52E8003F ldrex r3, [r2] + 52 @ 0 "" 2 + 53 .LVL2: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 54 .loc 2 1073 4 view .LVU8 + 55 .loc 2 1073 4 is_stmt 0 view .LVU9 + 56 .thumb + 57 .syntax unified + 58 .LBE416: + 59 .LBE415: + 60 .loc 1 3330 3 discriminator 1 view .LVU10 + 61 0006 23F0C003 bic r3, r3, #192 + 62 .LVL3: + 63 .loc 1 3330 3 is_stmt 1 discriminator 1 view .LVU11 + 64 .LBB417: + 65 .LBI417: +1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1075:Drivers/CMSIS/Include/cmsis_gcc.h **** +1076:Drivers/CMSIS/Include/cmsis_gcc.h **** +1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) +1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. +1080:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store +1081:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location +1082:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded +1083:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed +1084:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1085:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +1086:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1088:Drivers/CMSIS/Include/cmsis_gcc.h **** +1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); +1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); +1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1092:Drivers/CMSIS/Include/cmsis_gcc.h **** +1093:Drivers/CMSIS/Include/cmsis_gcc.h **** +1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) +1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. +1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store +1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location +1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded +1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed +1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +1103:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1104:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1105:Drivers/CMSIS/Include/cmsis_gcc.h **** +1106:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); +1107:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); +1108:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1109:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqiorEF.s page 80 + + +1110:Drivers/CMSIS/Include/cmsis_gcc.h **** +1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) +1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. +1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store +1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location +1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded +1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed +1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) + 66 .loc 2 1119 31 view .LVU12 + 67 .LBB418: +1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 68 .loc 2 1121 4 view .LVU13 +1122:Drivers/CMSIS/Include/cmsis_gcc.h **** +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + 69 .loc 2 1123 4 view .LVU14 + 70 .syntax unified + 71 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 72 000a 42E80031 strex r1, r3, [r2] + 73 @ 0 "" 2 + 74 .LVL4: +1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 75 .loc 2 1124 4 view .LVU15 + 76 .loc 2 1124 4 is_stmt 0 view .LVU16 + 77 .thumb + 78 .syntax unified + 79 .LBE418: + 80 .LBE417: + 81 .loc 1 3330 3 discriminator 1 view .LVU17 + 82 000e 0029 cmp r1, #0 + 83 0010 F6D1 bne .L2 + 84 .LBE414: + 85 .loc 1 3330 3 is_stmt 1 discriminator 2 view .LVU18 +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* At end of Tx process, restore huart->gState to Ready */ +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; + 86 .loc 1 3333 3 view .LVU19 + 87 .loc 1 3333 17 is_stmt 0 view .LVU20 + 88 0012 2023 movs r3, #32 + 89 .LVL5: + 90 .loc 1 3333 17 view .LVU21 + 91 0014 C367 str r3, [r0, #124] +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 92 .loc 1 3334 1 view .LVU22 + 93 0016 7047 bx lr + 94 .cfi_endproc + 95 .LFE179: + 97 .section .text.UART_EndRxTransfer,"ax",%progbits + 98 .align 1 + 99 .syntax unified + 100 .thumb + 101 .thumb_func + 103 UART_EndRxTransfer: + 104 .LFB180: +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 81 + + +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception comp +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_EndRxTransfer(UART_HandleTypeDef *huart) +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 105 .loc 1 3343 1 is_stmt 1 view -0 + 106 .cfi_startproc + 107 @ args = 0, pretend = 0, frame = 0 + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 @ link register save eliminated. + 110 .LVL6: + 111 .L4: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); + 112 .loc 1 3345 3 discriminator 1 view .LVU24 + 113 .LBB419: + 114 .loc 1 3345 3 discriminator 1 view .LVU25 + 115 .loc 1 3345 3 discriminator 1 view .LVU26 + 116 .loc 1 3345 3 discriminator 1 view .LVU27 + 117 0000 0268 ldr r2, [r0] + 118 .LVL7: + 119 .LBB420: + 120 .LBI420: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 121 .loc 2 1068 31 view .LVU28 + 122 .LBB421: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 123 .loc 2 1070 5 view .LVU29 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 124 .loc 2 1072 4 view .LVU30 + 125 .syntax unified + 126 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 127 0002 52E8003F ldrex r3, [r2] + 128 @ 0 "" 2 + 129 .LVL8: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 130 .loc 2 1073 4 view .LVU31 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 131 .loc 2 1073 4 is_stmt 0 view .LVU32 + 132 .thumb + 133 .syntax unified + 134 .LBE421: + 135 .LBE420: + 136 .loc 1 3345 3 discriminator 1 view .LVU33 + 137 0006 23F49073 bic r3, r3, #288 + 138 .LVL9: + 139 .loc 1 3345 3 is_stmt 1 discriminator 1 view .LVU34 + 140 .LBB422: + 141 .LBI422: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142 .loc 2 1119 31 view .LVU35 + 143 .LBB423: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 144 .loc 2 1121 4 view .LVU36 + ARM GAS /tmp/ccqiorEF.s page 82 + + +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 145 .loc 2 1123 4 view .LVU37 + 146 .syntax unified + 147 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 148 000a 42E80031 strex r1, r3, [r2] + 149 @ 0 "" 2 + 150 .LVL10: + 151 .loc 2 1124 4 view .LVU38 + 152 .loc 2 1124 4 is_stmt 0 view .LVU39 + 153 .thumb + 154 .syntax unified + 155 .LBE423: + 156 .LBE422: + 157 .loc 1 3345 3 discriminator 1 view .LVU40 + 158 000e 0029 cmp r1, #0 + 159 0010 F6D1 bne .L4 + 160 .LVL11: + 161 .L5: + 162 .loc 1 3345 3 discriminator 1 view .LVU41 + 163 .LBE419: + 164 .loc 1 3345 3 is_stmt 1 discriminator 2 view .LVU42 +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 165 .loc 1 3346 3 discriminator 1 view .LVU43 + 166 .LBB424: + 167 .loc 1 3346 3 discriminator 1 view .LVU44 + 168 .loc 1 3346 3 discriminator 1 view .LVU45 + 169 .loc 1 3346 3 discriminator 1 view .LVU46 + 170 0012 0268 ldr r2, [r0] + 171 .LVL12: + 172 .LBB425: + 173 .LBI425: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 174 .loc 2 1068 31 view .LVU47 + 175 .LBB426: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176 .loc 2 1070 5 view .LVU48 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 177 .loc 2 1072 4 view .LVU49 + 178 0014 02F10803 add r3, r2, #8 + 179 .LVL13: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 180 .loc 2 1072 4 is_stmt 0 view .LVU50 + 181 .syntax unified + 182 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 183 0018 53E8003F ldrex r3, [r3] + 184 @ 0 "" 2 + 185 .LVL14: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 186 .loc 2 1073 4 is_stmt 1 view .LVU51 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 187 .loc 2 1073 4 is_stmt 0 view .LVU52 + 188 .thumb + 189 .syntax unified + 190 .LBE426: + 191 .LBE425: + 192 .loc 1 3346 3 discriminator 1 view .LVU53 + 193 001c 23F00103 bic r3, r3, #1 + ARM GAS /tmp/ccqiorEF.s page 83 + + + 194 .LVL15: + 195 .loc 1 3346 3 is_stmt 1 discriminator 1 view .LVU54 + 196 .LBB427: + 197 .LBI427: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 198 .loc 2 1119 31 view .LVU55 + 199 .LBB428: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200 .loc 2 1121 4 view .LVU56 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 201 .loc 2 1123 4 view .LVU57 + 202 0020 0832 adds r2, r2, #8 + 203 .LVL16: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 204 .loc 2 1123 4 is_stmt 0 view .LVU58 + 205 .syntax unified + 206 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 207 0022 42E80031 strex r1, r3, [r2] + 208 @ 0 "" 2 + 209 .LVL17: + 210 .loc 2 1124 4 is_stmt 1 view .LVU59 + 211 .loc 2 1124 4 is_stmt 0 view .LVU60 + 212 .thumb + 213 .syntax unified + 214 .LBE428: + 215 .LBE427: + 216 .loc 1 3346 3 discriminator 1 view .LVU61 + 217 0026 0029 cmp r1, #0 + 218 0028 F3D1 bne .L5 + 219 .LBE424: + 220 .loc 1 3346 3 is_stmt 1 discriminator 2 view .LVU62 +3347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ +3349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + 221 .loc 1 3349 3 view .LVU63 + 222 .loc 1 3349 12 is_stmt 0 view .LVU64 + 223 002a 036E ldr r3, [r0, #96] + 224 .LVL18: + 225 .loc 1 3349 6 view .LVU65 + 226 002c 012B cmp r3, #1 + 227 002e 06D0 beq .L7 + 228 .L6: +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 229 .loc 1 3351 5 is_stmt 1 discriminator 2 view .LVU66 +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* At end of Rx process, restore huart->RxState to Ready */ +3355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 230 .loc 1 3355 3 view .LVU67 + 231 .loc 1 3355 18 is_stmt 0 view .LVU68 + 232 0030 2023 movs r3, #32 + 233 0032 C0F88030 str r3, [r0, #128] +3356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 234 .loc 1 3356 3 is_stmt 1 view .LVU69 + 235 .loc 1 3356 24 is_stmt 0 view .LVU70 + 236 0036 0023 movs r3, #0 + ARM GAS /tmp/ccqiorEF.s page 84 + + + 237 0038 0366 str r3, [r0, #96] +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset RxIsr function pointer */ +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; + 238 .loc 1 3359 3 is_stmt 1 view .LVU71 + 239 .loc 1 3359 16 is_stmt 0 view .LVU72 + 240 003a 8366 str r3, [r0, #104] +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 241 .loc 1 3360 1 view .LVU73 + 242 003c 7047 bx lr + 243 .L7: +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 244 .loc 1 3351 5 is_stmt 1 discriminator 1 view .LVU74 + 245 .LBB429: +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 246 .loc 1 3351 5 discriminator 1 view .LVU75 +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 247 .loc 1 3351 5 discriminator 1 view .LVU76 +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 248 .loc 1 3351 5 discriminator 1 view .LVU77 + 249 003e 0268 ldr r2, [r0] + 250 .LVL19: + 251 .LBB430: + 252 .LBI430: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 253 .loc 2 1068 31 view .LVU78 + 254 .LBB431: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255 .loc 2 1070 5 view .LVU79 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 256 .loc 2 1072 4 view .LVU80 + 257 .syntax unified + 258 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 259 0040 52E8003F ldrex r3, [r2] + 260 @ 0 "" 2 + 261 .LVL20: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 262 .loc 2 1073 4 view .LVU81 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 263 .loc 2 1073 4 is_stmt 0 view .LVU82 + 264 .thumb + 265 .syntax unified + 266 .LBE431: + 267 .LBE430: +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 268 .loc 1 3351 5 discriminator 1 view .LVU83 + 269 0044 23F01003 bic r3, r3, #16 + 270 .LVL21: +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 271 .loc 1 3351 5 is_stmt 1 discriminator 1 view .LVU84 + 272 .LBB432: + 273 .LBI432: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 274 .loc 2 1119 31 view .LVU85 + 275 .LBB433: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 276 .loc 2 1121 4 view .LVU86 + ARM GAS /tmp/ccqiorEF.s page 85 + + +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 277 .loc 2 1123 4 view .LVU87 + 278 .syntax unified + 279 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 280 0048 42E80031 strex r1, r3, [r2] + 281 @ 0 "" 2 + 282 .LVL22: + 283 .loc 2 1124 4 view .LVU88 + 284 .loc 2 1124 4 is_stmt 0 view .LVU89 + 285 .thumb + 286 .syntax unified + 287 .LBE433: + 288 .LBE432: +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 289 .loc 1 3351 5 discriminator 1 view .LVU90 + 290 004c 0029 cmp r1, #0 + 291 004e F6D1 bne .L7 + 292 0050 EEE7 b .L6 + 293 .LBE429: + 294 .cfi_endproc + 295 .LFE180: + 297 .section .text.UART_TxISR_8BIT,"ax",%progbits + 298 .align 1 + 299 .syntax unified + 300 .thumb + 301 .thumb_func + 303 UART_TxISR_8BIT: + 304 .LVL23: + 305 .LFB191: +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART transmit process complete callback. +3365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA Normal mode */ +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (hdma->Init.Mode != DMA_CIRCULAR) +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +3376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the DMA transfer for transmit request by resetting the DMAT bit +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the UART CR3 register */ +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Transmit Complete Interrupt */ +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA Circular mode */ +3385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Tx complete callback*/ + ARM GAS /tmp/ccqiorEF.s page 86 + + +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxCpltCallback(huart); +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Tx complete callback*/ +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_TxCpltCallback(huart); +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART transmit process half complete callback. +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Tx Half complete callback*/ +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxHalfCpltCallback(huart); +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Tx Half complete callback*/ +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_TxHalfCpltCallback(huart); +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART receive process complete callback. +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* DMA Normal mode */ +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (hdma->Init.Mode != DMA_CIRCULAR) +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the DMA transfer for the receiver request by resetting the DMAR bit +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** in the UART CR3 register */ +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* At end of Rx process, restore huart->RxState to Ready */ +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 87 + + +3446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize type of RxEvent that correspond to RxEvent callback execution; +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** In this case, Rx Event type is Transfer Complete */ +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check current reception Mode : +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If Reception till IDLE event has been selected : use Rx Event callback */ +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx Event callback*/ +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback(huart, huart->RxXferSize); +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In other cases : use Rx Complete callback */ +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx complete callback*/ +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxCpltCallback(huart); +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx complete callback*/ +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_RxCpltCallback(huart); +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART receive process half complete callback. +3478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize type of RxEvent that correspond to RxEvent callback execution; +3486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** In this case, Rx Event type is Half Transfer */ +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_HT; +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check current reception Mode : +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If Reception till IDLE event has been selected : use Rx Event callback */ +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx Event callback*/ +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback(huart, huart->RxXferSize / 2U); +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 88 + + +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* In other cases : use Rx Half Complete callback */ +3504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx Half complete callback*/ +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxHalfCpltCallback(huart); +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Half complete callback*/ +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_RxHalfCpltCallback(huart); +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART communication error callback. +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMAError(DMA_HandleTypeDef *hdma) +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState; +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Stop UART DMA Tx request if ongoing */ +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndTxTransfer(huart); +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Stop UART DMA Rx request if ongoing */ +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); +3540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_DMA; +3543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered error callback*/ +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback(huart); +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak error callback*/ +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_ErrorCallback(huart); +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART communication abort callback, when initiated by HAL services on Error +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * (To be called at end of DMA Abort procedure following error occurrence). +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) + ARM GAS /tmp/ccqiorEF.s page 89 + + +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered error callback*/ +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCallback(huart); +3568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak error callback*/ +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_ErrorCallback(huart); +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART Tx communication abort callback, when initiated by user +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * (To be called at end of DMA Tx Abort procedure following user abort request). +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When this callback is executed, User Abort complete call back is called only if no +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * Abort still ongoing for Rx DMA Handle. +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmatx->XferAbortCallback = NULL; +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check if an Abort process is still ongoing */ +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx != NULL) +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmarx->XferAbortCallback != NULL) +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callba +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset errorCode */ +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState and huart->RxState to Ready */ +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call user Abort complete callback */ +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort complete callback */ +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortCpltCallback(huart); + ARM GAS /tmp/ccqiorEF.s page 90 + + +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort complete callback */ +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortCpltCallback(huart); +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART Rx communication abort callback, when initiated by user +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * (To be called at end of DMA Rx Abort procedure following user abort request). +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note When this callback is executed, User Abort complete call back is called only if no +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * Abort still ongoing for Tx DMA Handle. +3629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check if an Abort process is still ongoing */ +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx != NULL) +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->hdmatx->XferAbortCallback != NULL) +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callba +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Reset errorCode */ +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; +3653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); +3656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Discard the received data */ +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState and huart->RxState to Ready */ +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call user Abort complete callback */ +3666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort complete callback */ +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortCpltCallback(huart); +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort complete callback */ +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortCpltCallback(huart); +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 91 + + +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART Tx communication abort callback, when initiated by user by a call to +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer) +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * (This callback is executed at end of DMA Tx Abort procedure following user abort reques +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * and leads to user Tx Abort Complete callback execution). +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->gState to Ready */ +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; +3693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call user Abort complete callback */ +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort Transmit Complete Callback */ +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortTransmitCpltCallback(huart); +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort Transmit Complete Callback */ +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortTransmitCpltCallback(huart); +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief DMA UART Rx communication abort callback, when initiated by user by a call to +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * HAL_UART_AbortReceive_IT API (Abort only Rx transfer) +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * (This callback is executed at end of DMA Rx Abort procedure following user abort reques +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * and leads to user Rx Abort Complete callback execution). +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param hdma DMA handle. +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Discard the received data */ +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); +3723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Restore huart->RxState to Ready */ +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call user Abort complete callback */ +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call registered Abort Receive Complete Callback */ + ARM GAS /tmp/ccqiorEF.s page 92 + + +3731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->AbortReceiveCpltCallback(huart); +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Call legacy weak Abort Receive Complete Callback */ +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_AbortReceiveCpltCallback(huart); +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief TX interrupt handler for 7 or 8 bits data word length . +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note Function is called under interruption only, once +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * interruptions have been enabled by HAL_UART_Transmit_IT(). +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) +3746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 306 .loc 1 3746 1 is_stmt 1 view -0 + 307 .cfi_startproc + 308 @ args = 0, pretend = 0, frame = 0 + 309 @ frame_needed = 0, uses_anonymous_args = 0 + 310 @ link register save eliminated. +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is ongoing */ +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_BUSY_TX) + 311 .loc 1 3748 3 view .LVU92 + 312 .loc 1 3748 12 is_stmt 0 view .LVU93 + 313 0000 C36F ldr r3, [r0, #124] + 314 .loc 1 3748 6 view .LVU94 + 315 0002 212B cmp r3, #33 + 316 0004 00D0 beq .L13 + 317 .L8: +3749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->TxXferCount == 0U) +3751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Transmit Data Register Empty Interrupt */ +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); +3754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Transmit Complete Interrupt */ +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr++; +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; +3763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 318 .loc 1 3765 1 view .LVU95 + 319 0006 7047 bx lr + 320 .L13: +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 321 .loc 1 3750 5 is_stmt 1 view .LVU96 +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 322 .loc 1 3750 14 is_stmt 0 view .LVU97 + 323 0008 B0F85230 ldrh r3, [r0, #82] + 324 000c 9BB2 uxth r3, r3 +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 93 + + + 325 .loc 1 3750 8 view .LVU98 + 326 000e 93B9 cbnz r3, .L10 + 327 .L11: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 328 .loc 1 3753 7 is_stmt 1 discriminator 1 view .LVU99 + 329 .LBB434: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 330 .loc 1 3753 7 discriminator 1 view .LVU100 +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 331 .loc 1 3753 7 discriminator 1 view .LVU101 +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 332 .loc 1 3753 7 discriminator 1 view .LVU102 + 333 0010 0268 ldr r2, [r0] + 334 .LVL24: + 335 .LBB435: + 336 .LBI435: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 337 .loc 2 1068 31 view .LVU103 + 338 .LBB436: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 339 .loc 2 1070 5 view .LVU104 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 340 .loc 2 1072 4 view .LVU105 + 341 .syntax unified + 342 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 343 0012 52E8003F ldrex r3, [r2] + 344 @ 0 "" 2 + 345 .LVL25: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 346 .loc 2 1073 4 view .LVU106 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347 .loc 2 1073 4 is_stmt 0 view .LVU107 + 348 .thumb + 349 .syntax unified + 350 .LBE436: + 351 .LBE435: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 352 .loc 1 3753 7 discriminator 1 view .LVU108 + 353 0016 23F08003 bic r3, r3, #128 + 354 .LVL26: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 355 .loc 1 3753 7 is_stmt 1 discriminator 1 view .LVU109 + 356 .LBB437: + 357 .LBI437: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358 .loc 2 1119 31 view .LVU110 + 359 .LBB438: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360 .loc 2 1121 4 view .LVU111 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 361 .loc 2 1123 4 view .LVU112 + 362 .syntax unified + 363 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 364 001a 42E80031 strex r1, r3, [r2] + 365 @ 0 "" 2 + 366 .LVL27: + 367 .loc 2 1124 4 view .LVU113 + ARM GAS /tmp/ccqiorEF.s page 94 + + + 368 .loc 2 1124 4 is_stmt 0 view .LVU114 + 369 .thumb + 370 .syntax unified + 371 .LBE438: + 372 .LBE437: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 373 .loc 1 3753 7 discriminator 1 view .LVU115 + 374 001e 0029 cmp r1, #0 + 375 0020 F6D1 bne .L11 + 376 .LVL28: + 377 .L12: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 378 .loc 1 3753 7 discriminator 1 view .LVU116 + 379 .LBE434: +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 380 .loc 1 3753 7 is_stmt 1 discriminator 2 view .LVU117 +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 381 .loc 1 3756 7 discriminator 1 view .LVU118 + 382 .LBB439: +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 383 .loc 1 3756 7 discriminator 1 view .LVU119 +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 384 .loc 1 3756 7 discriminator 1 view .LVU120 +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 385 .loc 1 3756 7 discriminator 1 view .LVU121 + 386 0022 0268 ldr r2, [r0] + 387 .LVL29: + 388 .LBB440: + 389 .LBI440: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 390 .loc 2 1068 31 view .LVU122 + 391 .LBB441: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 392 .loc 2 1070 5 view .LVU123 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 393 .loc 2 1072 4 view .LVU124 + 394 .syntax unified + 395 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 396 0024 52E8003F ldrex r3, [r2] + 397 @ 0 "" 2 + 398 .LVL30: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 399 .loc 2 1073 4 view .LVU125 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 400 .loc 2 1073 4 is_stmt 0 view .LVU126 + 401 .thumb + 402 .syntax unified + 403 .LBE441: + 404 .LBE440: +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 405 .loc 1 3756 7 discriminator 1 view .LVU127 + 406 0028 43F04003 orr r3, r3, #64 + 407 .LVL31: +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 408 .loc 1 3756 7 is_stmt 1 discriminator 1 view .LVU128 + 409 .LBB442: + 410 .LBI442: + ARM GAS /tmp/ccqiorEF.s page 95 + + +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 411 .loc 2 1119 31 view .LVU129 + 412 .LBB443: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 413 .loc 2 1121 4 view .LVU130 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 414 .loc 2 1123 4 view .LVU131 + 415 .syntax unified + 416 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 417 002c 42E80031 strex r1, r3, [r2] + 418 @ 0 "" 2 + 419 .LVL32: + 420 .loc 2 1124 4 view .LVU132 + 421 .loc 2 1124 4 is_stmt 0 view .LVU133 + 422 .thumb + 423 .syntax unified + 424 .LBE443: + 425 .LBE442: +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 426 .loc 1 3756 7 discriminator 1 view .LVU134 + 427 0030 0029 cmp r1, #0 + 428 0032 F6D1 bne .L12 + 429 0034 7047 bx lr + 430 .LVL33: + 431 .L10: +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 432 .loc 1 3756 7 discriminator 1 view .LVU135 + 433 .LBE439: +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr++; + 434 .loc 1 3760 7 is_stmt 1 view .LVU136 +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr++; + 435 .loc 1 3760 46 is_stmt 0 view .LVU137 + 436 0036 C36C ldr r3, [r0, #76] +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr++; + 437 .loc 1 3760 40 view .LVU138 + 438 0038 1A78 ldrb r2, [r3] @ zero_extendqisi2 +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr++; + 439 .loc 1 3760 12 view .LVU139 + 440 003a 0368 ldr r3, [r0] +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr++; + 441 .loc 1 3760 28 view .LVU140 + 442 003c 1A85 strh r2, [r3, #40] @ movhi +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; + 443 .loc 1 3761 7 is_stmt 1 view .LVU141 +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; + 444 .loc 1 3761 12 is_stmt 0 view .LVU142 + 445 003e C36C ldr r3, [r0, #76] +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; + 446 .loc 1 3761 24 view .LVU143 + 447 0040 0133 adds r3, r3, #1 + 448 0042 C364 str r3, [r0, #76] +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 449 .loc 1 3762 7 is_stmt 1 view .LVU144 +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 450 .loc 1 3762 12 is_stmt 0 view .LVU145 + 451 0044 B0F85230 ldrh r3, [r0, #82] + 452 0048 9BB2 uxth r3, r3 + ARM GAS /tmp/ccqiorEF.s page 96 + + +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 453 .loc 1 3762 25 view .LVU146 + 454 004a 013B subs r3, r3, #1 + 455 004c 9BB2 uxth r3, r3 + 456 004e A0F85230 strh r3, [r0, #82] @ movhi + 457 .loc 1 3765 1 view .LVU147 + 458 0052 D8E7 b .L8 + 459 .cfi_endproc + 460 .LFE191: + 462 .section .text.UART_TxISR_16BIT,"ax",%progbits + 463 .align 1 + 464 .syntax unified + 465 .thumb + 466 .thumb_func + 468 UART_TxISR_16BIT: + 469 .LVL34: + 470 .LFB192: +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief TX interrupt handler for 9 bits data word length. +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note Function is called under interruption only, once +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * interruptions have been enabled by HAL_UART_Transmit_IT(). +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 471 .loc 1 3775 1 is_stmt 1 view -0 + 472 .cfi_startproc + 473 @ args = 0, pretend = 0, frame = 0 + 474 @ frame_needed = 0, uses_anonymous_args = 0 + 475 @ link register save eliminated. +3776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const uint16_t *tmp; + 476 .loc 1 3776 3 view .LVU149 +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is ongoing */ +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_BUSY_TX) + 477 .loc 1 3779 3 view .LVU150 + 478 .loc 1 3779 12 is_stmt 0 view .LVU151 + 479 0000 C36F ldr r3, [r0, #124] + 480 .loc 1 3779 6 view .LVU152 + 481 0002 212B cmp r3, #33 + 482 0004 00D0 beq .L19 + 483 .L14: +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->TxXferCount == 0U) +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Transmit Data Register Empty Interrupt */ +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Transmit Complete Interrupt */ +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); +3788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmp = (const uint16_t *) huart->pTxBuffPtr; +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); + ARM GAS /tmp/ccqiorEF.s page 97 + + +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr += 2U; +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 484 .loc 1 3797 1 view .LVU153 + 485 0006 7047 bx lr + 486 .L19: +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 487 .loc 1 3781 5 is_stmt 1 view .LVU154 +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 488 .loc 1 3781 14 is_stmt 0 view .LVU155 + 489 0008 B0F85230 ldrh r3, [r0, #82] + 490 000c 9BB2 uxth r3, r3 +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 491 .loc 1 3781 8 view .LVU156 + 492 000e 93B9 cbnz r3, .L16 + 493 .L17: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 494 .loc 1 3784 7 is_stmt 1 discriminator 1 view .LVU157 + 495 .LBB444: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 496 .loc 1 3784 7 discriminator 1 view .LVU158 +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 497 .loc 1 3784 7 discriminator 1 view .LVU159 +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 498 .loc 1 3784 7 discriminator 1 view .LVU160 + 499 0010 0268 ldr r2, [r0] + 500 .LVL35: + 501 .LBB445: + 502 .LBI445: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 503 .loc 2 1068 31 view .LVU161 + 504 .LBB446: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 505 .loc 2 1070 5 view .LVU162 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 506 .loc 2 1072 4 view .LVU163 + 507 .syntax unified + 508 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 509 0012 52E8003F ldrex r3, [r2] + 510 @ 0 "" 2 + 511 .LVL36: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 512 .loc 2 1073 4 view .LVU164 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 513 .loc 2 1073 4 is_stmt 0 view .LVU165 + 514 .thumb + 515 .syntax unified + 516 .LBE446: + 517 .LBE445: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 518 .loc 1 3784 7 discriminator 1 view .LVU166 + 519 0016 23F08003 bic r3, r3, #128 + 520 .LVL37: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 521 .loc 1 3784 7 is_stmt 1 discriminator 1 view .LVU167 + ARM GAS /tmp/ccqiorEF.s page 98 + + + 522 .LBB447: + 523 .LBI447: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 524 .loc 2 1119 31 view .LVU168 + 525 .LBB448: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 526 .loc 2 1121 4 view .LVU169 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 527 .loc 2 1123 4 view .LVU170 + 528 .syntax unified + 529 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 530 001a 42E80031 strex r1, r3, [r2] + 531 @ 0 "" 2 + 532 .LVL38: + 533 .loc 2 1124 4 view .LVU171 + 534 .loc 2 1124 4 is_stmt 0 view .LVU172 + 535 .thumb + 536 .syntax unified + 537 .LBE448: + 538 .LBE447: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 539 .loc 1 3784 7 discriminator 1 view .LVU173 + 540 001e 0029 cmp r1, #0 + 541 0020 F6D1 bne .L17 + 542 .LVL39: + 543 .L18: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 544 .loc 1 3784 7 discriminator 1 view .LVU174 + 545 .LBE444: +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 546 .loc 1 3784 7 is_stmt 1 discriminator 2 view .LVU175 +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 547 .loc 1 3787 7 discriminator 1 view .LVU176 + 548 .LBB449: +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 549 .loc 1 3787 7 discriminator 1 view .LVU177 +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 550 .loc 1 3787 7 discriminator 1 view .LVU178 +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 551 .loc 1 3787 7 discriminator 1 view .LVU179 + 552 0022 0268 ldr r2, [r0] + 553 .LVL40: + 554 .LBB450: + 555 .LBI450: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 556 .loc 2 1068 31 view .LVU180 + 557 .LBB451: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 558 .loc 2 1070 5 view .LVU181 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 559 .loc 2 1072 4 view .LVU182 + 560 .syntax unified + 561 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 562 0024 52E8003F ldrex r3, [r2] + 563 @ 0 "" 2 + 564 .LVL41: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 99 + + + 565 .loc 2 1073 4 view .LVU183 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 566 .loc 2 1073 4 is_stmt 0 view .LVU184 + 567 .thumb + 568 .syntax unified + 569 .LBE451: + 570 .LBE450: +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 571 .loc 1 3787 7 discriminator 1 view .LVU185 + 572 0028 43F04003 orr r3, r3, #64 + 573 .LVL42: +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 574 .loc 1 3787 7 is_stmt 1 discriminator 1 view .LVU186 + 575 .LBB452: + 576 .LBI452: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 577 .loc 2 1119 31 view .LVU187 + 578 .LBB453: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579 .loc 2 1121 4 view .LVU188 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 580 .loc 2 1123 4 view .LVU189 + 581 .syntax unified + 582 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 583 002c 42E80031 strex r1, r3, [r2] + 584 @ 0 "" 2 + 585 .LVL43: + 586 .loc 2 1124 4 view .LVU190 + 587 .loc 2 1124 4 is_stmt 0 view .LVU191 + 588 .thumb + 589 .syntax unified + 590 .LBE453: + 591 .LBE452: +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 592 .loc 1 3787 7 discriminator 1 view .LVU192 + 593 0030 0029 cmp r1, #0 + 594 0032 F6D1 bne .L18 + 595 0034 7047 bx lr + 596 .LVL44: + 597 .L16: +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 598 .loc 1 3787 7 discriminator 1 view .LVU193 + 599 .LBE449: +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); + 600 .loc 1 3791 7 is_stmt 1 view .LVU194 +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); + 601 .loc 1 3791 11 is_stmt 0 view .LVU195 + 602 0036 C36C ldr r3, [r0, #76] + 603 .LVL45: +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr += 2U; + 604 .loc 1 3792 7 is_stmt 1 view .LVU196 +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr += 2U; + 605 .loc 1 3792 43 is_stmt 0 view .LVU197 + 606 0038 1B88 ldrh r3, [r3] + 607 .LVL46: +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr += 2U; + 608 .loc 1 3792 12 view .LVU198 + ARM GAS /tmp/ccqiorEF.s page 100 + + + 609 003a 0268 ldr r2, [r0] +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr += 2U; + 610 .loc 1 3792 50 view .LVU199 + 611 003c C3F30803 ubfx r3, r3, #0, #9 +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pTxBuffPtr += 2U; + 612 .loc 1 3792 28 view .LVU200 + 613 0040 1385 strh r3, [r2, #40] @ movhi + 614 .LVL47: +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; + 615 .loc 1 3793 7 is_stmt 1 view .LVU201 +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; + 616 .loc 1 3793 12 is_stmt 0 view .LVU202 + 617 0042 C36C ldr r3, [r0, #76] +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount--; + 618 .loc 1 3793 25 view .LVU203 + 619 0044 0233 adds r3, r3, #2 + 620 0046 C364 str r3, [r0, #76] +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 621 .loc 1 3794 7 is_stmt 1 view .LVU204 +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 622 .loc 1 3794 12 is_stmt 0 view .LVU205 + 623 0048 B0F85230 ldrh r3, [r0, #82] + 624 004c 9BB2 uxth r3, r3 +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 625 .loc 1 3794 25 view .LVU206 + 626 004e 013B subs r3, r3, #1 + 627 0050 9BB2 uxth r3, r3 + 628 0052 A0F85230 strh r3, [r0, #82] @ movhi + 629 .loc 1 3797 1 view .LVU207 + 630 0056 D6E7 b .L14 + 631 .cfi_endproc + 632 .LFE192: + 634 .section .text.HAL_UART_MspInit,"ax",%progbits + 635 .align 1 + 636 .weak HAL_UART_MspInit + 637 .syntax unified + 638 .thumb + 639 .thumb_func + 641 HAL_UART_MspInit: + 642 .LVL48: + 643 .LFB135: + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 644 .loc 1 654 1 is_stmt 1 view -0 + 645 .cfi_startproc + 646 @ args = 0, pretend = 0, frame = 0 + 647 @ frame_needed = 0, uses_anonymous_args = 0 + 648 @ link register save eliminated. + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 649 .loc 1 656 3 view .LVU209 + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 650 .loc 1 661 1 is_stmt 0 view .LVU210 + 651 0000 7047 bx lr + 652 .cfi_endproc + 653 .LFE135: + 655 .section .text.HAL_UART_MspDeInit,"ax",%progbits + 656 .align 1 + 657 .weak HAL_UART_MspDeInit + ARM GAS /tmp/ccqiorEF.s page 101 + + + 658 .syntax unified + 659 .thumb + 660 .thumb_func + 662 HAL_UART_MspDeInit: + 663 .LVL49: + 664 .LFB136: + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 665 .loc 1 669 1 is_stmt 1 view -0 + 666 .cfi_startproc + 667 @ args = 0, pretend = 0, frame = 0 + 668 @ frame_needed = 0, uses_anonymous_args = 0 + 669 @ link register save eliminated. + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 670 .loc 1 671 3 view .LVU212 + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 671 .loc 1 676 1 is_stmt 0 view .LVU213 + 672 0000 7047 bx lr + 673 .cfi_endproc + 674 .LFE136: + 676 .section .text.HAL_UART_DeInit,"ax",%progbits + 677 .align 1 + 678 .global HAL_UART_DeInit + 679 .syntax unified + 680 .thumb + 681 .thumb_func + 683 HAL_UART_DeInit: + 684 .LVL50: + 685 .LFB134: + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 686 .loc 1 607 1 is_stmt 1 view -0 + 687 .cfi_startproc + 688 @ args = 0, pretend = 0, frame = 0 + 689 @ frame_needed = 0, uses_anonymous_args = 0 + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 690 .loc 1 609 3 view .LVU215 + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 691 .loc 1 609 6 is_stmt 0 view .LVU216 + 692 0000 E0B1 cbz r0, .L24 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 693 .loc 1 607 1 view .LVU217 + 694 0002 38B5 push {r3, r4, r5, lr} + 695 .cfi_def_cfa_offset 16 + 696 .cfi_offset 3, -16 + 697 .cfi_offset 4, -12 + 698 .cfi_offset 5, -8 + 699 .cfi_offset 14, -4 + 700 0004 0546 mov r5, r0 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 701 .loc 1 615 3 is_stmt 1 view .LVU218 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 702 .loc 1 617 3 view .LVU219 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 703 .loc 1 617 17 is_stmt 0 view .LVU220 + 704 0006 2423 movs r3, #36 + 705 0008 C367 str r3, [r0, #124] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 706 .loc 1 619 3 is_stmt 1 view .LVU221 + ARM GAS /tmp/ccqiorEF.s page 102 + + + 707 000a 0268 ldr r2, [r0] + 708 000c 1368 ldr r3, [r2] + 709 000e 23F00103 bic r3, r3, #1 + 710 0012 1360 str r3, [r2] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR2 = 0x0U; + 711 .loc 1 621 3 view .LVU222 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR2 = 0x0U; + 712 .loc 1 621 8 is_stmt 0 view .LVU223 + 713 0014 0368 ldr r3, [r0] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR2 = 0x0U; + 714 .loc 1 621 24 view .LVU224 + 715 0016 0024 movs r4, #0 + 716 0018 1C60 str r4, [r3] + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR3 = 0x0U; + 717 .loc 1 622 3 is_stmt 1 view .LVU225 + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR3 = 0x0U; + 718 .loc 1 622 8 is_stmt 0 view .LVU226 + 719 001a 0368 ldr r3, [r0] + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->CR3 = 0x0U; + 720 .loc 1 622 24 view .LVU227 + 721 001c 5C60 str r4, [r3, #4] + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 722 .loc 1 623 3 is_stmt 1 view .LVU228 + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 723 .loc 1 623 8 is_stmt 0 view .LVU229 + 724 001e 0368 ldr r3, [r0] + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 725 .loc 1 623 24 view .LVU230 + 726 0020 9C60 str r4, [r3, #8] + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 727 .loc 1 634 3 is_stmt 1 view .LVU231 + 728 0022 FFF7FEFF bl HAL_UART_MspDeInit + 729 .LVL51: + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_RESET; + 730 .loc 1 637 3 view .LVU232 + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_RESET; + 731 .loc 1 637 20 is_stmt 0 view .LVU233 + 732 0026 C5F88440 str r4, [r5, #132] + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_RESET; + 733 .loc 1 638 3 is_stmt 1 view .LVU234 + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_RESET; + 734 .loc 1 638 17 is_stmt 0 view .LVU235 + 735 002a EC67 str r4, [r5, #124] + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 736 .loc 1 639 3 is_stmt 1 view .LVU236 + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 737 .loc 1 639 18 is_stmt 0 view .LVU237 + 738 002c C5F88040 str r4, [r5, #128] + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 739 .loc 1 640 3 is_stmt 1 view .LVU238 + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 740 .loc 1 640 24 is_stmt 0 view .LVU239 + 741 0030 2C66 str r4, [r5, #96] + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 742 .loc 1 641 3 is_stmt 1 view .LVU240 + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 743 .loc 1 641 22 is_stmt 0 view .LVU241 + ARM GAS /tmp/ccqiorEF.s page 103 + + + 744 0032 6C66 str r4, [r5, #100] + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 745 .loc 1 643 3 is_stmt 1 view .LVU242 + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 746 .loc 1 643 3 view .LVU243 + 747 0034 85F87840 strb r4, [r5, #120] + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 748 .loc 1 643 3 view .LVU244 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 749 .loc 1 645 3 view .LVU245 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 750 .loc 1 645 10 is_stmt 0 view .LVU246 + 751 0038 2046 mov r0, r4 + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 752 .loc 1 646 1 view .LVU247 + 753 003a 38BD pop {r3, r4, r5, pc} + 754 .LVL52: + 755 .L24: + 756 .cfi_def_cfa_offset 0 + 757 .cfi_restore 3 + 758 .cfi_restore 4 + 759 .cfi_restore 5 + 760 .cfi_restore 14 + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 761 .loc 1 611 12 view .LVU248 + 762 003c 0120 movs r0, #1 + 763 .LVL53: + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 764 .loc 1 646 1 view .LVU249 + 765 003e 7047 bx lr + 766 .cfi_endproc + 767 .LFE134: + 769 .section .text.HAL_UART_Transmit_IT,"ax",%progbits + 770 .align 1 + 771 .global HAL_UART_Transmit_IT + 772 .syntax unified + 773 .thumb + 774 .thumb_func + 776 HAL_UART_Transmit_IT: + 777 .LVL54: + 778 .LFB139: +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ + 779 .loc 1 1250 1 is_stmt 1 view -0 + 780 .cfi_startproc + 781 @ args = 0, pretend = 0, frame = 0 + 782 @ frame_needed = 0, uses_anonymous_args = 0 + 783 @ link register save eliminated. +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 784 .loc 1 1252 3 view .LVU251 +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 785 .loc 1 1252 12 is_stmt 0 view .LVU252 + 786 0000 C36F ldr r3, [r0, #124] +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 787 .loc 1 1252 6 view .LVU253 + 788 0002 202B cmp r3, #32 + 789 0004 23D1 bne .L34 +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 104 + + + 790 .loc 1 1254 5 is_stmt 1 view .LVU254 +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 791 .loc 1 1254 8 is_stmt 0 view .LVU255 + 792 0006 21B3 cbz r1, .L35 +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 793 .loc 1 1254 25 discriminator 1 view .LVU256 + 794 0008 2AB3 cbz r2, .L36 +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; + 795 .loc 1 1259 5 is_stmt 1 view .LVU257 +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; + 796 .loc 1 1259 24 is_stmt 0 view .LVU258 + 797 000a C164 str r1, [r0, #76] +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; + 798 .loc 1 1260 5 is_stmt 1 view .LVU259 +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; + 799 .loc 1 1260 24 is_stmt 0 view .LVU260 + 800 000c A0F85020 strh r2, [r0, #80] @ movhi +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 801 .loc 1 1261 5 is_stmt 1 view .LVU261 +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 802 .loc 1 1261 24 is_stmt 0 view .LVU262 + 803 0010 A0F85220 strh r2, [r0, #82] @ movhi +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 804 .loc 1 1262 5 is_stmt 1 view .LVU263 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 805 .loc 1 1262 24 is_stmt 0 view .LVU264 + 806 0014 0023 movs r3, #0 + 807 0016 C366 str r3, [r0, #108] +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; + 808 .loc 1 1264 5 is_stmt 1 view .LVU265 +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; + 809 .loc 1 1264 22 is_stmt 0 view .LVU266 + 810 0018 C0F88430 str r3, [r0, #132] +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 811 .loc 1 1265 5 is_stmt 1 view .LVU267 +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 812 .loc 1 1265 19 is_stmt 0 view .LVU268 + 813 001c 2123 movs r3, #33 + 814 001e C367 str r3, [r0, #124] +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 815 .loc 1 1268 5 is_stmt 1 view .LVU269 +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 816 .loc 1 1268 21 is_stmt 0 view .LVU270 + 817 0020 8368 ldr r3, [r0, #8] +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 818 .loc 1 1268 8 view .LVU271 + 819 0022 B3F5805F cmp r3, #4096 + 820 0026 0CD0 beq .L37 + 821 .L31: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 822 .loc 1 1274 7 is_stmt 1 view .LVU272 +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 823 .loc 1 1274 20 is_stmt 0 view .LVU273 + 824 0028 0C4B ldr r3, .L38 + 825 002a C366 str r3, [r0, #108] + 826 .LVL55: + 827 .L33: + ARM GAS /tmp/ccqiorEF.s page 105 + + +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 828 .loc 1 1278 5 is_stmt 1 discriminator 1 view .LVU274 + 829 .LBB454: +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 830 .loc 1 1278 5 discriminator 1 view .LVU275 +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 831 .loc 1 1278 5 discriminator 1 view .LVU276 +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 832 .loc 1 1278 5 discriminator 1 view .LVU277 + 833 002c 0268 ldr r2, [r0] + 834 .LVL56: + 835 .LBB455: + 836 .LBI455: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 837 .loc 2 1068 31 view .LVU278 + 838 .LBB456: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 839 .loc 2 1070 5 view .LVU279 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 840 .loc 2 1072 4 view .LVU280 + 841 .syntax unified + 842 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 843 002e 52E8003F ldrex r3, [r2] + 844 @ 0 "" 2 + 845 .LVL57: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 846 .loc 2 1073 4 view .LVU281 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 847 .loc 2 1073 4 is_stmt 0 view .LVU282 + 848 .thumb + 849 .syntax unified + 850 .LBE456: + 851 .LBE455: +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 852 .loc 1 1278 5 discriminator 1 view .LVU283 + 853 0032 43F08003 orr r3, r3, #128 + 854 .LVL58: +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 855 .loc 1 1278 5 is_stmt 1 discriminator 1 view .LVU284 + 856 .LBB457: + 857 .LBI457: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 858 .loc 2 1119 31 view .LVU285 + 859 .LBB458: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860 .loc 2 1121 4 view .LVU286 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 861 .loc 2 1123 4 view .LVU287 + 862 .syntax unified + 863 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 864 0036 42E80031 strex r1, r3, [r2] + 865 @ 0 "" 2 + 866 .LVL59: + 867 .loc 2 1124 4 view .LVU288 + 868 .loc 2 1124 4 is_stmt 0 view .LVU289 + 869 .thumb + 870 .syntax unified + ARM GAS /tmp/ccqiorEF.s page 106 + + + 871 .LBE458: + 872 .LBE457: +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 873 .loc 1 1278 5 discriminator 1 view .LVU290 + 874 003a 0029 cmp r1, #0 + 875 003c F6D1 bne .L33 + 876 .LBE454: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 877 .loc 1 1280 12 view .LVU291 + 878 003e 0020 movs r0, #0 + 879 .LVL60: + 880 .LBB459: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 881 .loc 1 1280 12 view .LVU292 + 882 0040 7047 bx lr + 883 .LVL61: + 884 .L37: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 885 .loc 1 1280 12 view .LVU293 + 886 .LBE459: +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 887 .loc 1 1268 71 discriminator 1 view .LVU294 + 888 0042 0369 ldr r3, [r0, #16] +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 889 .loc 1 1268 56 discriminator 1 view .LVU295 + 890 0044 002B cmp r3, #0 + 891 0046 EFD1 bne .L31 +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 892 .loc 1 1270 7 is_stmt 1 view .LVU296 +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 893 .loc 1 1270 20 is_stmt 0 view .LVU297 + 894 0048 054B ldr r3, .L38+4 + 895 004a C366 str r3, [r0, #108] + 896 004c EEE7 b .L33 + 897 .L34: +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 898 .loc 1 1284 12 view .LVU298 + 899 004e 0220 movs r0, #2 + 900 .LVL62: +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 901 .loc 1 1284 12 view .LVU299 + 902 0050 7047 bx lr + 903 .LVL63: + 904 .L35: +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 905 .loc 1 1256 14 view .LVU300 + 906 0052 0120 movs r0, #1 + 907 .LVL64: +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 908 .loc 1 1256 14 view .LVU301 + 909 0054 7047 bx lr + 910 .LVL65: + 911 .L36: +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 912 .loc 1 1256 14 view .LVU302 + 913 0056 0120 movs r0, #1 + 914 .LVL66: + ARM GAS /tmp/ccqiorEF.s page 107 + + +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 915 .loc 1 1286 1 view .LVU303 + 916 0058 7047 bx lr + 917 .L39: + 918 005a 00BF .align 2 + 919 .L38: + 920 005c 00000000 .word UART_TxISR_8BIT + 921 0060 00000000 .word UART_TxISR_16BIT + 922 .cfi_endproc + 923 .LFE139: + 925 .section .text.HAL_UART_Transmit_DMA,"ax",%progbits + 926 .align 1 + 927 .global HAL_UART_Transmit_DMA + 928 .syntax unified + 929 .thumb + 930 .thumb_func + 932 HAL_UART_Transmit_DMA: + 933 .LVL67: + 934 .LFB141: +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ + 935 .loc 1 1337 1 is_stmt 1 view -0 + 936 .cfi_startproc + 937 @ args = 0, pretend = 0, frame = 0 + 938 @ frame_needed = 0, uses_anonymous_args = 0 +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ + 939 .loc 1 1337 1 is_stmt 0 view .LVU305 + 940 0000 1346 mov r3, r2 +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 941 .loc 1 1339 3 is_stmt 1 view .LVU306 +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 942 .loc 1 1339 12 is_stmt 0 view .LVU307 + 943 0002 C26F ldr r2, [r0, #124] + 944 .LVL68: +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 945 .loc 1 1339 6 view .LVU308 + 946 0004 202A cmp r2, #32 + 947 0006 3BD1 bne .L44 +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Tx process is not already ongoing */ + 948 .loc 1 1337 1 view .LVU309 + 949 0008 10B5 push {r4, lr} + 950 .cfi_def_cfa_offset 8 + 951 .cfi_offset 4, -8 + 952 .cfi_offset 14, -4 + 953 000a 0446 mov r4, r0 +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 954 .loc 1 1341 5 is_stmt 1 view .LVU310 +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 955 .loc 1 1341 8 is_stmt 0 view .LVU311 + 956 000c 0029 cmp r1, #0 + 957 000e 39D0 beq .L45 +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 958 .loc 1 1341 25 discriminator 1 view .LVU312 + 959 0010 002B cmp r3, #0 + 960 0012 39D0 beq .L46 +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; + 961 .loc 1 1346 5 is_stmt 1 view .LVU313 +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferSize = Size; + ARM GAS /tmp/ccqiorEF.s page 108 + + + 962 .loc 1 1346 24 is_stmt 0 view .LVU314 + 963 0014 C164 str r1, [r0, #76] +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; + 964 .loc 1 1347 5 is_stmt 1 view .LVU315 +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; + 965 .loc 1 1347 24 is_stmt 0 view .LVU316 + 966 0016 A0F85030 strh r3, [r0, #80] @ movhi +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 967 .loc 1 1348 5 is_stmt 1 view .LVU317 +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 968 .loc 1 1348 24 is_stmt 0 view .LVU318 + 969 001a A0F85230 strh r3, [r0, #82] @ movhi +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; + 970 .loc 1 1350 5 is_stmt 1 view .LVU319 +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; + 971 .loc 1 1350 22 is_stmt 0 view .LVU320 + 972 001e 0022 movs r2, #0 + 973 0020 C0F88420 str r2, [r0, #132] +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 974 .loc 1 1351 5 is_stmt 1 view .LVU321 +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 975 .loc 1 1351 19 is_stmt 0 view .LVU322 + 976 0024 2122 movs r2, #33 + 977 0026 C267 str r2, [r0, #124] +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 978 .loc 1 1353 5 is_stmt 1 view .LVU323 +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 979 .loc 1 1353 14 is_stmt 0 view .LVU324 + 980 0028 026F ldr r2, [r0, #112] +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 981 .loc 1 1353 8 view .LVU325 + 982 002a C2B1 cbz r2, .L42 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 983 .loc 1 1356 7 is_stmt 1 view .LVU326 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 984 .loc 1 1356 39 is_stmt 0 view .LVU327 + 985 002c 1749 ldr r1, .L51 + 986 .LVL69: +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 987 .loc 1 1356 39 view .LVU328 + 988 002e 9162 str r1, [r2, #40] + 989 .LVL70: +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 990 .loc 1 1359 7 is_stmt 1 view .LVU329 +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 991 .loc 1 1359 12 is_stmt 0 view .LVU330 + 992 0030 026F ldr r2, [r0, #112] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 993 .loc 1 1359 43 view .LVU331 + 994 0032 1749 ldr r1, .L51+4 + 995 0034 D162 str r1, [r2, #44] +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 996 .loc 1 1362 7 is_stmt 1 view .LVU332 +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 997 .loc 1 1362 12 is_stmt 0 view .LVU333 + 998 0036 026F ldr r2, [r0, #112] +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 109 + + + 999 .loc 1 1362 40 view .LVU334 + 1000 0038 1649 ldr r1, .L51+8 + 1001 003a 1163 str r1, [r2, #48] +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1002 .loc 1 1365 7 is_stmt 1 view .LVU335 +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1003 .loc 1 1365 12 is_stmt 0 view .LVU336 + 1004 003c 026F ldr r2, [r0, #112] +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1005 .loc 1 1365 40 view .LVU337 + 1006 003e 0021 movs r1, #0 + 1007 0040 5163 str r1, [r2, #52] +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1008 .loc 1 1368 7 is_stmt 1 view .LVU338 +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1009 .loc 1 1368 88 is_stmt 0 view .LVU339 + 1010 0042 0268 ldr r2, [r0] +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1011 .loc 1 1368 11 view .LVU340 + 1012 0044 2832 adds r2, r2, #40 + 1013 0046 C16C ldr r1, [r0, #76] + 1014 0048 006F ldr r0, [r0, #112] + 1015 .LVL71: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1016 .loc 1 1368 11 view .LVU341 + 1017 004a FFF7FEFF bl HAL_DMA_Start_IT + 1018 .LVL72: +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1019 .loc 1 1368 10 discriminator 1 view .LVU342 + 1020 004e 30B1 cbz r0, .L42 +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1021 .loc 1 1371 9 is_stmt 1 view .LVU343 +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1022 .loc 1 1371 26 is_stmt 0 view .LVU344 + 1023 0050 1023 movs r3, #16 + 1024 0052 C4F88430 str r3, [r4, #132] +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1025 .loc 1 1374 9 is_stmt 1 view .LVU345 +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1026 .loc 1 1374 23 is_stmt 0 view .LVU346 + 1027 0056 2023 movs r3, #32 + 1028 0058 E367 str r3, [r4, #124] +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1029 .loc 1 1376 9 is_stmt 1 view .LVU347 +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1030 .loc 1 1376 16 is_stmt 0 view .LVU348 + 1031 005a 0120 movs r0, #1 + 1032 005c 0FE0 b .L41 + 1033 .L42: +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1034 .loc 1 1380 5 is_stmt 1 view .LVU349 + 1035 005e 2368 ldr r3, [r4] + 1036 0060 4022 movs r2, #64 + 1037 0062 1A62 str r2, [r3, #32] + 1038 .L43: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1039 .loc 1 1384 5 discriminator 1 view .LVU350 + ARM GAS /tmp/ccqiorEF.s page 110 + + + 1040 .LBB460: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1041 .loc 1 1384 5 discriminator 1 view .LVU351 +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1042 .loc 1 1384 5 discriminator 1 view .LVU352 +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1043 .loc 1 1384 5 discriminator 1 view .LVU353 + 1044 0064 2268 ldr r2, [r4] + 1045 .LVL73: + 1046 .LBB461: + 1047 .LBI461: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1048 .loc 2 1068 31 view .LVU354 + 1049 .LBB462: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1050 .loc 2 1070 5 view .LVU355 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1051 .loc 2 1072 4 view .LVU356 + 1052 0066 02F10803 add r3, r2, #8 + 1053 .LVL74: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1054 .loc 2 1072 4 is_stmt 0 view .LVU357 + 1055 .syntax unified + 1056 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1057 006a 53E8003F ldrex r3, [r3] + 1058 @ 0 "" 2 + 1059 .LVL75: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1060 .loc 2 1073 4 is_stmt 1 view .LVU358 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1061 .loc 2 1073 4 is_stmt 0 view .LVU359 + 1062 .thumb + 1063 .syntax unified + 1064 .LBE462: + 1065 .LBE461: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1066 .loc 1 1384 5 discriminator 1 view .LVU360 + 1067 006e 43F08003 orr r3, r3, #128 + 1068 .LVL76: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1069 .loc 1 1384 5 is_stmt 1 discriminator 1 view .LVU361 + 1070 .LBB463: + 1071 .LBI463: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1072 .loc 2 1119 31 view .LVU362 + 1073 .LBB464: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1074 .loc 2 1121 4 view .LVU363 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1075 .loc 2 1123 4 view .LVU364 + 1076 0072 0832 adds r2, r2, #8 + 1077 .LVL77: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1078 .loc 2 1123 4 is_stmt 0 view .LVU365 + 1079 .syntax unified + 1080 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1081 0074 42E80031 strex r1, r3, [r2] + ARM GAS /tmp/ccqiorEF.s page 111 + + + 1082 @ 0 "" 2 + 1083 .LVL78: + 1084 .loc 2 1124 4 is_stmt 1 view .LVU366 + 1085 .loc 2 1124 4 is_stmt 0 view .LVU367 + 1086 .thumb + 1087 .syntax unified + 1088 .LBE464: + 1089 .LBE463: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1090 .loc 1 1384 5 discriminator 1 view .LVU368 + 1091 0078 0029 cmp r1, #0 + 1092 007a F3D1 bne .L43 + 1093 .LBE460: +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1094 .loc 1 1386 12 view .LVU369 + 1095 007c 0020 movs r0, #0 + 1096 .LVL79: + 1097 .L41: +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1098 .loc 1 1392 1 view .LVU370 + 1099 007e 10BD pop {r4, pc} + 1100 .LVL80: + 1101 .L44: + 1102 .cfi_def_cfa_offset 0 + 1103 .cfi_restore 4 + 1104 .cfi_restore 14 +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1105 .loc 1 1390 12 view .LVU371 + 1106 0080 0220 movs r0, #2 + 1107 .LVL81: +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1108 .loc 1 1392 1 view .LVU372 + 1109 0082 7047 bx lr + 1110 .LVL82: + 1111 .L45: + 1112 .cfi_def_cfa_offset 8 + 1113 .cfi_offset 4, -8 + 1114 .cfi_offset 14, -4 +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1115 .loc 1 1343 14 view .LVU373 + 1116 0084 0120 movs r0, #1 + 1117 .LVL83: +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1118 .loc 1 1343 14 view .LVU374 + 1119 0086 FAE7 b .L41 + 1120 .LVL84: + 1121 .L46: +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1122 .loc 1 1343 14 view .LVU375 + 1123 0088 0120 movs r0, #1 + 1124 .LVL85: +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1125 .loc 1 1343 14 view .LVU376 + 1126 008a F8E7 b .L41 + 1127 .L52: + 1128 .align 2 + 1129 .L51: + ARM GAS /tmp/ccqiorEF.s page 112 + + + 1130 008c 00000000 .word UART_DMATransmitCplt + 1131 0090 00000000 .word UART_DMATxHalfCplt + 1132 0094 00000000 .word UART_DMAError + 1133 .cfi_endproc + 1134 .LFE141: + 1136 .section .text.HAL_UART_DMAPause,"ax",%progbits + 1137 .align 1 + 1138 .global HAL_UART_DMAPause + 1139 .syntax unified + 1140 .thumb + 1141 .thumb_func + 1143 HAL_UART_DMAPause: + 1144 .LVL86: + 1145 .LFB143: +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState; + 1146 .loc 1 1440 1 is_stmt 1 view -0 + 1147 .cfi_startproc + 1148 @ args = 0, pretend = 0, frame = 0 + 1149 @ frame_needed = 0, uses_anonymous_args = 0 + 1150 @ link register save eliminated. +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState; + 1151 .loc 1 1440 1 is_stmt 0 view .LVU378 + 1152 0000 10B4 push {r4} + 1153 .cfi_def_cfa_offset 4 + 1154 .cfi_offset 4, -4 +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; + 1155 .loc 1 1441 3 is_stmt 1 view .LVU379 +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; + 1156 .loc 1 1441 31 is_stmt 0 view .LVU380 + 1157 0002 C26F ldr r2, [r0, #124] + 1158 .LVL87: +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1159 .loc 1 1442 3 is_stmt 1 view .LVU381 +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1160 .loc 1 1442 31 is_stmt 0 view .LVU382 + 1161 0004 D0F88040 ldr r4, [r0, #128] + 1162 .LVL88: +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1163 .loc 1 1444 3 is_stmt 1 view .LVU383 +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1164 .loc 1 1444 8 is_stmt 0 view .LVU384 + 1165 0008 0368 ldr r3, [r0] + 1166 000a 9B68 ldr r3, [r3, #8] +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1167 .loc 1 1444 6 view .LVU385 + 1168 000c 13F0800F tst r3, #128 + 1169 0010 01D0 beq .L54 +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1170 .loc 1 1444 62 discriminator 1 view .LVU386 + 1171 0012 212A cmp r2, #33 + 1172 0014 0AD0 beq .L55 + 1173 .LVL89: + 1174 .L54: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1175 .loc 1 1448 5 is_stmt 1 discriminator 2 view .LVU387 +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1176 .loc 1 1450 3 view .LVU388 + ARM GAS /tmp/ccqiorEF.s page 113 + + +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1177 .loc 1 1450 8 is_stmt 0 view .LVU389 + 1178 0016 0368 ldr r3, [r0] + 1179 0018 9B68 ldr r3, [r3, #8] +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1180 .loc 1 1450 6 view .LVU390 + 1181 001a 13F0400F tst r3, #64 + 1182 001e 01D0 beq .L56 +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1183 .loc 1 1450 62 discriminator 1 view .LVU391 + 1184 0020 222C cmp r4, #34 + 1185 0022 10D0 beq .L57 + 1186 .L56: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1187 .loc 1 1458 5 is_stmt 1 discriminator 2 view .LVU392 +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1188 .loc 1 1461 3 view .LVU393 +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1189 .loc 1 1462 1 is_stmt 0 view .LVU394 + 1190 0024 0020 movs r0, #0 + 1191 .LVL90: +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1192 .loc 1 1462 1 view .LVU395 + 1193 0026 5DF8044B ldr r4, [sp], #4 + 1194 .cfi_remember_state + 1195 .cfi_restore 4 + 1196 .cfi_def_cfa_offset 0 + 1197 .LVL91: +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1198 .loc 1 1462 1 view .LVU396 + 1199 002a 7047 bx lr + 1200 .LVL92: + 1201 .L55: + 1202 .cfi_restore_state +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1203 .loc 1 1448 5 is_stmt 1 discriminator 1 view .LVU397 + 1204 .LBB465: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1205 .loc 1 1448 5 discriminator 1 view .LVU398 +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1206 .loc 1 1448 5 discriminator 1 view .LVU399 +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1207 .loc 1 1448 5 discriminator 1 view .LVU400 + 1208 002c 0268 ldr r2, [r0] + 1209 .LVL93: + 1210 .LBB466: + 1211 .LBI466: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1212 .loc 2 1068 31 view .LVU401 + 1213 .LBB467: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1214 .loc 2 1070 5 view .LVU402 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1215 .loc 2 1072 4 view .LVU403 + 1216 002e 02F10803 add r3, r2, #8 + 1217 .LVL94: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccqiorEF.s page 114 + + + 1218 .loc 2 1072 4 is_stmt 0 view .LVU404 + 1219 .syntax unified + 1220 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1221 0032 53E8003F ldrex r3, [r3] + 1222 @ 0 "" 2 + 1223 .LVL95: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1224 .loc 2 1073 4 is_stmt 1 view .LVU405 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1225 .loc 2 1073 4 is_stmt 0 view .LVU406 + 1226 .thumb + 1227 .syntax unified + 1228 .LBE467: + 1229 .LBE466: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1230 .loc 1 1448 5 discriminator 1 view .LVU407 + 1231 0036 23F08003 bic r3, r3, #128 + 1232 .LVL96: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1233 .loc 1 1448 5 is_stmt 1 discriminator 1 view .LVU408 + 1234 .LBB468: + 1235 .LBI468: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1236 .loc 2 1119 31 view .LVU409 + 1237 .LBB469: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1238 .loc 2 1121 4 view .LVU410 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1239 .loc 2 1123 4 view .LVU411 + 1240 003a 0832 adds r2, r2, #8 + 1241 .LVL97: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1242 .loc 2 1123 4 is_stmt 0 view .LVU412 + 1243 .syntax unified + 1244 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1245 003c 42E80031 strex r1, r3, [r2] + 1246 @ 0 "" 2 + 1247 .LVL98: + 1248 .loc 2 1124 4 is_stmt 1 view .LVU413 + 1249 .loc 2 1124 4 is_stmt 0 view .LVU414 + 1250 .thumb + 1251 .syntax unified + 1252 .LBE469: + 1253 .LBE468: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1254 .loc 1 1448 5 discriminator 1 view .LVU415 + 1255 0040 0029 cmp r1, #0 + 1256 0042 F3D1 bne .L55 + 1257 0044 E7E7 b .L54 + 1258 .LVL99: + 1259 .L57: +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1260 .loc 1 1448 5 discriminator 1 view .LVU416 + 1261 .LBE465: +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1262 .loc 1 1454 5 is_stmt 1 discriminator 1 view .LVU417 + 1263 .LBB470: + ARM GAS /tmp/ccqiorEF.s page 115 + + +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1264 .loc 1 1454 5 discriminator 1 view .LVU418 +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1265 .loc 1 1454 5 discriminator 1 view .LVU419 +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1266 .loc 1 1454 5 discriminator 1 view .LVU420 + 1267 0046 0268 ldr r2, [r0] + 1268 .LVL100: + 1269 .LBB471: + 1270 .LBI471: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1271 .loc 2 1068 31 view .LVU421 + 1272 .LBB472: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1273 .loc 2 1070 5 view .LVU422 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1274 .loc 2 1072 4 view .LVU423 + 1275 .syntax unified + 1276 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1277 0048 52E8003F ldrex r3, [r2] + 1278 @ 0 "" 2 + 1279 .LVL101: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1280 .loc 2 1073 4 view .LVU424 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1281 .loc 2 1073 4 is_stmt 0 view .LVU425 + 1282 .thumb + 1283 .syntax unified + 1284 .LBE472: + 1285 .LBE471: +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1286 .loc 1 1454 5 discriminator 1 view .LVU426 + 1287 004c 23F48073 bic r3, r3, #256 + 1288 .LVL102: +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1289 .loc 1 1454 5 is_stmt 1 discriminator 1 view .LVU427 + 1290 .LBB473: + 1291 .LBI473: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1292 .loc 2 1119 31 view .LVU428 + 1293 .LBB474: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1294 .loc 2 1121 4 view .LVU429 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1295 .loc 2 1123 4 view .LVU430 + 1296 .syntax unified + 1297 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1298 0050 42E80031 strex r1, r3, [r2] + 1299 @ 0 "" 2 + 1300 .LVL103: + 1301 .loc 2 1124 4 view .LVU431 + 1302 .loc 2 1124 4 is_stmt 0 view .LVU432 + 1303 .thumb + 1304 .syntax unified + 1305 .LBE474: + 1306 .LBE473: +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ARM GAS /tmp/ccqiorEF.s page 116 + + + 1307 .loc 1 1454 5 discriminator 1 view .LVU433 + 1308 0054 0029 cmp r1, #0 + 1309 0056 F6D1 bne .L57 + 1310 .LVL104: + 1311 .L58: +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1312 .loc 1 1454 5 discriminator 1 view .LVU434 + 1313 .LBE470: +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1314 .loc 1 1454 5 is_stmt 1 discriminator 2 view .LVU435 +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1315 .loc 1 1455 5 discriminator 1 view .LVU436 + 1316 .LBB475: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1317 .loc 1 1455 5 discriminator 1 view .LVU437 +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1318 .loc 1 1455 5 discriminator 1 view .LVU438 +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1319 .loc 1 1455 5 discriminator 1 view .LVU439 + 1320 0058 0268 ldr r2, [r0] + 1321 .LVL105: + 1322 .LBB476: + 1323 .LBI476: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1324 .loc 2 1068 31 view .LVU440 + 1325 .LBB477: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1326 .loc 2 1070 5 view .LVU441 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1327 .loc 2 1072 4 view .LVU442 + 1328 005a 02F10803 add r3, r2, #8 + 1329 .LVL106: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1330 .loc 2 1072 4 is_stmt 0 view .LVU443 + 1331 .syntax unified + 1332 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1333 005e 53E8003F ldrex r3, [r3] + 1334 @ 0 "" 2 + 1335 .LVL107: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1336 .loc 2 1073 4 is_stmt 1 view .LVU444 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1337 .loc 2 1073 4 is_stmt 0 view .LVU445 + 1338 .thumb + 1339 .syntax unified + 1340 .LBE477: + 1341 .LBE476: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1342 .loc 1 1455 5 discriminator 1 view .LVU446 + 1343 0062 23F00103 bic r3, r3, #1 + 1344 .LVL108: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1345 .loc 1 1455 5 is_stmt 1 discriminator 1 view .LVU447 + 1346 .LBB478: + 1347 .LBI478: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1348 .loc 2 1119 31 view .LVU448 + ARM GAS /tmp/ccqiorEF.s page 117 + + + 1349 .LBB479: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1350 .loc 2 1121 4 view .LVU449 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1351 .loc 2 1123 4 view .LVU450 + 1352 0066 0832 adds r2, r2, #8 + 1353 .LVL109: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1354 .loc 2 1123 4 is_stmt 0 view .LVU451 + 1355 .syntax unified + 1356 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1357 0068 42E80031 strex r1, r3, [r2] + 1358 @ 0 "" 2 + 1359 .LVL110: + 1360 .loc 2 1124 4 is_stmt 1 view .LVU452 + 1361 .loc 2 1124 4 is_stmt 0 view .LVU453 + 1362 .thumb + 1363 .syntax unified + 1364 .LBE479: + 1365 .LBE478: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1366 .loc 1 1455 5 discriminator 1 view .LVU454 + 1367 006c 0029 cmp r1, #0 + 1368 006e F3D1 bne .L58 + 1369 .LVL111: + 1370 .L59: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1371 .loc 1 1455 5 discriminator 1 view .LVU455 + 1372 .LBE475: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1373 .loc 1 1455 5 is_stmt 1 discriminator 2 view .LVU456 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1374 .loc 1 1458 5 discriminator 1 view .LVU457 + 1375 .LBB480: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1376 .loc 1 1458 5 discriminator 1 view .LVU458 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1377 .loc 1 1458 5 discriminator 1 view .LVU459 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1378 .loc 1 1458 5 discriminator 1 view .LVU460 + 1379 0070 0268 ldr r2, [r0] + 1380 .LVL112: + 1381 .LBB481: + 1382 .LBI481: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1383 .loc 2 1068 31 view .LVU461 + 1384 .LBB482: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1385 .loc 2 1070 5 view .LVU462 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1386 .loc 2 1072 4 view .LVU463 + 1387 0072 02F10803 add r3, r2, #8 + 1388 .LVL113: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1389 .loc 2 1072 4 is_stmt 0 view .LVU464 + 1390 .syntax unified + 1391 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccqiorEF.s page 118 + + + 1392 0076 53E8003F ldrex r3, [r3] + 1393 @ 0 "" 2 + 1394 .LVL114: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1395 .loc 2 1073 4 is_stmt 1 view .LVU465 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1396 .loc 2 1073 4 is_stmt 0 view .LVU466 + 1397 .thumb + 1398 .syntax unified + 1399 .LBE482: + 1400 .LBE481: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1401 .loc 1 1458 5 discriminator 1 view .LVU467 + 1402 007a 23F04003 bic r3, r3, #64 + 1403 .LVL115: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1404 .loc 1 1458 5 is_stmt 1 discriminator 1 view .LVU468 + 1405 .LBB483: + 1406 .LBI483: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1407 .loc 2 1119 31 view .LVU469 + 1408 .LBB484: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1409 .loc 2 1121 4 view .LVU470 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1410 .loc 2 1123 4 view .LVU471 + 1411 007e 0832 adds r2, r2, #8 + 1412 .LVL116: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1413 .loc 2 1123 4 is_stmt 0 view .LVU472 + 1414 .syntax unified + 1415 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1416 0080 42E80031 strex r1, r3, [r2] + 1417 @ 0 "" 2 + 1418 .LVL117: + 1419 .loc 2 1124 4 is_stmt 1 view .LVU473 + 1420 .loc 2 1124 4 is_stmt 0 view .LVU474 + 1421 .thumb + 1422 .syntax unified + 1423 .LBE484: + 1424 .LBE483: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1425 .loc 1 1458 5 discriminator 1 view .LVU475 + 1426 0084 0029 cmp r1, #0 + 1427 0086 F3D1 bne .L59 + 1428 0088 CCE7 b .L56 + 1429 .LBE480: + 1430 .cfi_endproc + 1431 .LFE143: + 1433 .section .text.HAL_UART_DMAResume,"ax",%progbits + 1434 .align 1 + 1435 .global HAL_UART_DMAResume + 1436 .syntax unified + 1437 .thumb + 1438 .thumb_func + 1440 HAL_UART_DMAResume: + 1441 .LVL118: + ARM GAS /tmp/ccqiorEF.s page 119 + + + 1442 .LFB144: +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_BUSY_TX) + 1443 .loc 1 1470 1 is_stmt 1 view -0 + 1444 .cfi_startproc + 1445 @ args = 0, pretend = 0, frame = 0 + 1446 @ frame_needed = 0, uses_anonymous_args = 0 + 1447 @ link register save eliminated. +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1448 .loc 1 1471 3 view .LVU477 +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1449 .loc 1 1471 12 is_stmt 0 view .LVU478 + 1450 0000 C36F ldr r3, [r0, #124] +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1451 .loc 1 1471 6 view .LVU479 + 1452 0002 212B cmp r3, #33 + 1453 0004 05D0 beq .L63 + 1454 .L62: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1455 .loc 1 1474 5 is_stmt 1 discriminator 2 view .LVU480 +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1456 .loc 1 1476 3 view .LVU481 +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1457 .loc 1 1476 12 is_stmt 0 view .LVU482 + 1458 0006 D0F88030 ldr r3, [r0, #128] +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1459 .loc 1 1476 6 view .LVU483 + 1460 000a 222B cmp r3, #34 + 1461 000c 0ED0 beq .L69 + 1462 .L64: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1463 .loc 1 1489 5 is_stmt 1 discriminator 2 view .LVU484 +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1464 .loc 1 1492 3 view .LVU485 +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1465 .loc 1 1493 1 is_stmt 0 view .LVU486 + 1466 000e 0020 movs r0, #0 + 1467 .LVL119: +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1468 .loc 1 1493 1 view .LVU487 + 1469 0010 7047 bx lr + 1470 .LVL120: + 1471 .L63: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1472 .loc 1 1474 5 is_stmt 1 discriminator 1 view .LVU488 + 1473 .LBB485: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1474 .loc 1 1474 5 discriminator 1 view .LVU489 +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1475 .loc 1 1474 5 discriminator 1 view .LVU490 +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1476 .loc 1 1474 5 discriminator 1 view .LVU491 + 1477 0012 0268 ldr r2, [r0] + 1478 .LVL121: + 1479 .LBB486: + 1480 .LBI486: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1481 .loc 2 1068 31 view .LVU492 + ARM GAS /tmp/ccqiorEF.s page 120 + + + 1482 .LBB487: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1483 .loc 2 1070 5 view .LVU493 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1484 .loc 2 1072 4 view .LVU494 + 1485 0014 02F10803 add r3, r2, #8 + 1486 .LVL122: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1487 .loc 2 1072 4 is_stmt 0 view .LVU495 + 1488 .syntax unified + 1489 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1490 0018 53E8003F ldrex r3, [r3] + 1491 @ 0 "" 2 + 1492 .LVL123: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1493 .loc 2 1073 4 is_stmt 1 view .LVU496 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1494 .loc 2 1073 4 is_stmt 0 view .LVU497 + 1495 .thumb + 1496 .syntax unified + 1497 .LBE487: + 1498 .LBE486: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1499 .loc 1 1474 5 discriminator 1 view .LVU498 + 1500 001c 43F08003 orr r3, r3, #128 + 1501 .LVL124: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1502 .loc 1 1474 5 is_stmt 1 discriminator 1 view .LVU499 + 1503 .LBB488: + 1504 .LBI488: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1505 .loc 2 1119 31 view .LVU500 + 1506 .LBB489: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1507 .loc 2 1121 4 view .LVU501 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1508 .loc 2 1123 4 view .LVU502 + 1509 0020 0832 adds r2, r2, #8 + 1510 .LVL125: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1511 .loc 2 1123 4 is_stmt 0 view .LVU503 + 1512 .syntax unified + 1513 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1514 0022 42E80031 strex r1, r3, [r2] + 1515 @ 0 "" 2 + 1516 .LVL126: + 1517 .loc 2 1124 4 is_stmt 1 view .LVU504 + 1518 .loc 2 1124 4 is_stmt 0 view .LVU505 + 1519 .thumb + 1520 .syntax unified + 1521 .LBE489: + 1522 .LBE488: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1523 .loc 1 1474 5 discriminator 1 view .LVU506 + 1524 0026 0029 cmp r1, #0 + 1525 0028 F3D1 bne .L63 + 1526 002a ECE7 b .L62 + ARM GAS /tmp/ccqiorEF.s page 121 + + + 1527 .LVL127: + 1528 .L69: +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1529 .loc 1 1474 5 discriminator 1 view .LVU507 + 1530 .LBE485: +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1531 .loc 1 1479 5 is_stmt 1 view .LVU508 + 1532 002c 0368 ldr r3, [r0] + 1533 002e 0822 movs r2, #8 + 1534 0030 1A62 str r2, [r3, #32] +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1535 .loc 1 1482 5 view .LVU509 +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1536 .loc 1 1482 20 is_stmt 0 view .LVU510 + 1537 0032 0369 ldr r3, [r0, #16] +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1538 .loc 1 1482 8 view .LVU511 + 1539 0034 43B1 cbz r3, .L67 + 1540 .L66: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1541 .loc 1 1484 7 is_stmt 1 discriminator 1 view .LVU512 + 1542 .LBB490: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1543 .loc 1 1484 7 discriminator 1 view .LVU513 +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1544 .loc 1 1484 7 discriminator 1 view .LVU514 +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1545 .loc 1 1484 7 discriminator 1 view .LVU515 + 1546 0036 0268 ldr r2, [r0] + 1547 .LVL128: + 1548 .LBB491: + 1549 .LBI491: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1550 .loc 2 1068 31 view .LVU516 + 1551 .LBB492: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1552 .loc 2 1070 5 view .LVU517 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1553 .loc 2 1072 4 view .LVU518 + 1554 .syntax unified + 1555 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1556 0038 52E8003F ldrex r3, [r2] + 1557 @ 0 "" 2 + 1558 .LVL129: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1559 .loc 2 1073 4 view .LVU519 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1560 .loc 2 1073 4 is_stmt 0 view .LVU520 + 1561 .thumb + 1562 .syntax unified + 1563 .LBE492: + 1564 .LBE491: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1565 .loc 1 1484 7 discriminator 1 view .LVU521 + 1566 003c 43F48073 orr r3, r3, #256 + 1567 .LVL130: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 122 + + + 1568 .loc 1 1484 7 is_stmt 1 discriminator 1 view .LVU522 + 1569 .LBB493: + 1570 .LBI493: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1571 .loc 2 1119 31 view .LVU523 + 1572 .LBB494: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1573 .loc 2 1121 4 view .LVU524 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1574 .loc 2 1123 4 view .LVU525 + 1575 .syntax unified + 1576 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1577 0040 42E80031 strex r1, r3, [r2] + 1578 @ 0 "" 2 + 1579 .LVL131: + 1580 .loc 2 1124 4 view .LVU526 + 1581 .loc 2 1124 4 is_stmt 0 view .LVU527 + 1582 .thumb + 1583 .syntax unified + 1584 .LBE494: + 1585 .LBE493: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1586 .loc 1 1484 7 discriminator 1 view .LVU528 + 1587 0044 0029 cmp r1, #0 + 1588 0046 F6D1 bne .L66 + 1589 .LVL132: + 1590 .L67: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1591 .loc 1 1484 7 discriminator 1 view .LVU529 + 1592 .LBE490: +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1593 .loc 1 1484 7 is_stmt 1 discriminator 2 view .LVU530 +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1594 .loc 1 1486 5 discriminator 1 view .LVU531 + 1595 .LBB495: +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1596 .loc 1 1486 5 discriminator 1 view .LVU532 +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1597 .loc 1 1486 5 discriminator 1 view .LVU533 +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1598 .loc 1 1486 5 discriminator 1 view .LVU534 + 1599 0048 0268 ldr r2, [r0] + 1600 .LVL133: + 1601 .LBB496: + 1602 .LBI496: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1603 .loc 2 1068 31 view .LVU535 + 1604 .LBB497: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1605 .loc 2 1070 5 view .LVU536 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1606 .loc 2 1072 4 view .LVU537 + 1607 004a 02F10803 add r3, r2, #8 + 1608 .LVL134: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1609 .loc 2 1072 4 is_stmt 0 view .LVU538 + 1610 .syntax unified + ARM GAS /tmp/ccqiorEF.s page 123 + + + 1611 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1612 004e 53E8003F ldrex r3, [r3] + 1613 @ 0 "" 2 + 1614 .LVL135: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1615 .loc 2 1073 4 is_stmt 1 view .LVU539 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1616 .loc 2 1073 4 is_stmt 0 view .LVU540 + 1617 .thumb + 1618 .syntax unified + 1619 .LBE497: + 1620 .LBE496: +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1621 .loc 1 1486 5 discriminator 1 view .LVU541 + 1622 0052 43F00103 orr r3, r3, #1 + 1623 .LVL136: +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1624 .loc 1 1486 5 is_stmt 1 discriminator 1 view .LVU542 + 1625 .LBB498: + 1626 .LBI498: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1627 .loc 2 1119 31 view .LVU543 + 1628 .LBB499: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1629 .loc 2 1121 4 view .LVU544 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1630 .loc 2 1123 4 view .LVU545 + 1631 0056 0832 adds r2, r2, #8 + 1632 .LVL137: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1633 .loc 2 1123 4 is_stmt 0 view .LVU546 + 1634 .syntax unified + 1635 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1636 0058 42E80031 strex r1, r3, [r2] + 1637 @ 0 "" 2 + 1638 .LVL138: + 1639 .loc 2 1124 4 is_stmt 1 view .LVU547 + 1640 .loc 2 1124 4 is_stmt 0 view .LVU548 + 1641 .thumb + 1642 .syntax unified + 1643 .LBE499: + 1644 .LBE498: +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1645 .loc 1 1486 5 discriminator 1 view .LVU549 + 1646 005c 0029 cmp r1, #0 + 1647 005e F3D1 bne .L67 + 1648 .LVL139: + 1649 .L68: +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1650 .loc 1 1486 5 discriminator 1 view .LVU550 + 1651 .LBE495: +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1652 .loc 1 1486 5 is_stmt 1 discriminator 2 view .LVU551 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1653 .loc 1 1489 5 discriminator 1 view .LVU552 + 1654 .LBB500: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 124 + + + 1655 .loc 1 1489 5 discriminator 1 view .LVU553 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1656 .loc 1 1489 5 discriminator 1 view .LVU554 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1657 .loc 1 1489 5 discriminator 1 view .LVU555 + 1658 0060 0268 ldr r2, [r0] + 1659 .LVL140: + 1660 .LBB501: + 1661 .LBI501: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1662 .loc 2 1068 31 view .LVU556 + 1663 .LBB502: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1664 .loc 2 1070 5 view .LVU557 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1665 .loc 2 1072 4 view .LVU558 + 1666 0062 02F10803 add r3, r2, #8 + 1667 .LVL141: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1668 .loc 2 1072 4 is_stmt 0 view .LVU559 + 1669 .syntax unified + 1670 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1671 0066 53E8003F ldrex r3, [r3] + 1672 @ 0 "" 2 + 1673 .LVL142: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1674 .loc 2 1073 4 is_stmt 1 view .LVU560 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1675 .loc 2 1073 4 is_stmt 0 view .LVU561 + 1676 .thumb + 1677 .syntax unified + 1678 .LBE502: + 1679 .LBE501: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1680 .loc 1 1489 5 discriminator 1 view .LVU562 + 1681 006a 43F04003 orr r3, r3, #64 + 1682 .LVL143: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1683 .loc 1 1489 5 is_stmt 1 discriminator 1 view .LVU563 + 1684 .LBB503: + 1685 .LBI503: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1686 .loc 2 1119 31 view .LVU564 + 1687 .LBB504: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1688 .loc 2 1121 4 view .LVU565 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1689 .loc 2 1123 4 view .LVU566 + 1690 006e 0832 adds r2, r2, #8 + 1691 .LVL144: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1692 .loc 2 1123 4 is_stmt 0 view .LVU567 + 1693 .syntax unified + 1694 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1695 0070 42E80031 strex r1, r3, [r2] + 1696 @ 0 "" 2 + 1697 .LVL145: + ARM GAS /tmp/ccqiorEF.s page 125 + + + 1698 .loc 2 1124 4 is_stmt 1 view .LVU568 + 1699 .loc 2 1124 4 is_stmt 0 view .LVU569 + 1700 .thumb + 1701 .syntax unified + 1702 .LBE504: + 1703 .LBE503: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1704 .loc 1 1489 5 discriminator 1 view .LVU570 + 1705 0074 0029 cmp r1, #0 + 1706 0076 F3D1 bne .L68 + 1707 0078 C9E7 b .L64 + 1708 .LBE500: + 1709 .cfi_endproc + 1710 .LFE144: + 1712 .section .text.HAL_UART_DMAStop,"ax",%progbits + 1713 .align 1 + 1714 .global HAL_UART_DMAStop + 1715 .syntax unified + 1716 .thumb + 1717 .thumb_func + 1719 HAL_UART_DMAStop: + 1720 .LVL146: + 1721 .LFB145: +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* The Lock is not implemented on this API to allow the user application + 1722 .loc 1 1501 1 is_stmt 1 view -0 + 1723 .cfi_startproc + 1724 @ args = 0, pretend = 0, frame = 0 + 1725 @ frame_needed = 0, uses_anonymous_args = 0 +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* The Lock is not implemented on this API to allow the user application + 1726 .loc 1 1501 1 is_stmt 0 view .LVU572 + 1727 0000 38B5 push {r3, r4, r5, lr} + 1728 .cfi_def_cfa_offset 16 + 1729 .cfi_offset 3, -16 + 1730 .cfi_offset 4, -12 + 1731 .cfi_offset 5, -8 + 1732 .cfi_offset 14, -4 + 1733 0002 0446 mov r4, r0 +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; + 1734 .loc 1 1509 3 is_stmt 1 view .LVU573 +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; + 1735 .loc 1 1509 31 is_stmt 0 view .LVU574 + 1736 0004 C26F ldr r2, [r0, #124] + 1737 .LVL147: +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1738 .loc 1 1510 3 is_stmt 1 view .LVU575 +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1739 .loc 1 1510 31 is_stmt 0 view .LVU576 + 1740 0006 D0F88050 ldr r5, [r0, #128] + 1741 .LVL148: +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1742 .loc 1 1513 3 is_stmt 1 view .LVU577 +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1743 .loc 1 1513 8 is_stmt 0 view .LVU578 + 1744 000a 0368 ldr r3, [r0] + 1745 000c 9B68 ldr r3, [r3, #8] +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1746 .loc 1 1513 6 view .LVU579 + ARM GAS /tmp/ccqiorEF.s page 126 + + + 1747 000e 13F0800F tst r3, #128 + 1748 0012 01D0 beq .L71 +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 1749 .loc 1 1513 62 discriminator 1 view .LVU580 + 1750 0014 212A cmp r2, #33 + 1751 0016 08D0 beq .L72 + 1752 .LVL149: + 1753 .L71: +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1754 .loc 1 1537 3 is_stmt 1 view .LVU581 +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1755 .loc 1 1537 8 is_stmt 0 view .LVU582 + 1756 0018 2368 ldr r3, [r4] + 1757 001a 9B68 ldr r3, [r3, #8] +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1758 .loc 1 1537 6 view .LVU583 + 1759 001c 13F0400F tst r3, #64 + 1760 0020 42D0 beq .L77 +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 1761 .loc 1 1537 62 discriminator 1 view .LVU584 + 1762 0022 222D cmp r5, #34 + 1763 0024 20D0 beq .L75 +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1764 .loc 1 1560 10 view .LVU585 + 1765 0026 0020 movs r0, #0 + 1766 0028 3FE0 b .L74 + 1767 .LVL150: + 1768 .L72: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1769 .loc 1 1516 5 is_stmt 1 discriminator 1 view .LVU586 + 1770 .LBB505: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1771 .loc 1 1516 5 discriminator 1 view .LVU587 +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1772 .loc 1 1516 5 discriminator 1 view .LVU588 +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1773 .loc 1 1516 5 discriminator 1 view .LVU589 + 1774 002a 2268 ldr r2, [r4] + 1775 .LVL151: + 1776 .LBB506: + 1777 .LBI506: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1778 .loc 2 1068 31 view .LVU590 + 1779 .LBB507: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1780 .loc 2 1070 5 view .LVU591 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1781 .loc 2 1072 4 view .LVU592 + 1782 002c 02F10803 add r3, r2, #8 + 1783 .LVL152: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1784 .loc 2 1072 4 is_stmt 0 view .LVU593 + 1785 .syntax unified + 1786 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1787 0030 53E8003F ldrex r3, [r3] + 1788 @ 0 "" 2 + 1789 .LVL153: + ARM GAS /tmp/ccqiorEF.s page 127 + + +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1790 .loc 2 1073 4 is_stmt 1 view .LVU594 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1791 .loc 2 1073 4 is_stmt 0 view .LVU595 + 1792 .thumb + 1793 .syntax unified + 1794 .LBE507: + 1795 .LBE506: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1796 .loc 1 1516 5 discriminator 1 view .LVU596 + 1797 0034 23F08003 bic r3, r3, #128 + 1798 .LVL154: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1799 .loc 1 1516 5 is_stmt 1 discriminator 1 view .LVU597 + 1800 .LBB508: + 1801 .LBI508: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1802 .loc 2 1119 31 view .LVU598 + 1803 .LBB509: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1804 .loc 2 1121 4 view .LVU599 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1805 .loc 2 1123 4 view .LVU600 + 1806 0038 0832 adds r2, r2, #8 + 1807 .LVL155: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1808 .loc 2 1123 4 is_stmt 0 view .LVU601 + 1809 .syntax unified + 1810 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1811 003a 42E80031 strex r1, r3, [r2] + 1812 @ 0 "" 2 + 1813 .LVL156: + 1814 .loc 2 1124 4 is_stmt 1 view .LVU602 + 1815 .loc 2 1124 4 is_stmt 0 view .LVU603 + 1816 .thumb + 1817 .syntax unified + 1818 .LBE509: + 1819 .LBE508: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1820 .loc 1 1516 5 discriminator 1 view .LVU604 + 1821 003e 0029 cmp r1, #0 + 1822 0040 F3D1 bne .L72 + 1823 .LBE505: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1824 .loc 1 1516 5 is_stmt 1 discriminator 2 view .LVU605 +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1825 .loc 1 1519 5 view .LVU606 +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1826 .loc 1 1519 14 is_stmt 0 view .LVU607 + 1827 0042 206F ldr r0, [r4, #112] + 1828 .LVL157: +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1829 .loc 1 1519 8 view .LVU608 + 1830 0044 10B1 cbz r0, .L73 +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1831 .loc 1 1521 7 is_stmt 1 view .LVU609 +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 128 + + + 1832 .loc 1 1521 11 is_stmt 0 view .LVU610 + 1833 0046 FFF7FEFF bl HAL_DMA_Abort + 1834 .LVL158: +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1835 .loc 1 1521 10 discriminator 1 view .LVU611 + 1836 004a 18B9 cbnz r0, .L80 + 1837 .L73: +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1838 .loc 1 1533 5 is_stmt 1 view .LVU612 + 1839 004c 2046 mov r0, r4 + 1840 004e FFF7FEFF bl UART_EndTxTransfer + 1841 .LVL159: + 1842 0052 E1E7 b .L71 + 1843 .L80: +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1844 .loc 1 1523 9 view .LVU613 +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1845 .loc 1 1523 13 is_stmt 0 view .LVU614 + 1846 0054 206F ldr r0, [r4, #112] + 1847 0056 FFF7FEFF bl HAL_DMA_GetError + 1848 .LVL160: +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1849 .loc 1 1523 12 discriminator 1 view .LVU615 + 1850 005a 2028 cmp r0, #32 + 1851 005c F6D1 bne .L73 +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1852 .loc 1 1526 11 is_stmt 1 view .LVU616 +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1853 .loc 1 1526 28 is_stmt 0 view .LVU617 + 1854 005e 1023 movs r3, #16 + 1855 0060 C4F88430 str r3, [r4, #132] +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1856 .loc 1 1528 11 is_stmt 1 view .LVU618 +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1857 .loc 1 1528 18 is_stmt 0 view .LVU619 + 1858 0064 0320 movs r0, #3 + 1859 0066 20E0 b .L74 + 1860 .LVL161: + 1861 .L75: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1862 .loc 1 1540 5 is_stmt 1 discriminator 1 view .LVU620 + 1863 .LBB510: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1864 .loc 1 1540 5 discriminator 1 view .LVU621 +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1865 .loc 1 1540 5 discriminator 1 view .LVU622 +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1866 .loc 1 1540 5 discriminator 1 view .LVU623 + 1867 0068 2268 ldr r2, [r4] + 1868 .LVL162: + 1869 .LBB511: + 1870 .LBI511: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1871 .loc 2 1068 31 view .LVU624 + 1872 .LBB512: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1873 .loc 2 1070 5 view .LVU625 + ARM GAS /tmp/ccqiorEF.s page 129 + + +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1874 .loc 2 1072 4 view .LVU626 + 1875 006a 02F10803 add r3, r2, #8 + 1876 .LVL163: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1877 .loc 2 1072 4 is_stmt 0 view .LVU627 + 1878 .syntax unified + 1879 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1880 006e 53E8003F ldrex r3, [r3] + 1881 @ 0 "" 2 + 1882 .LVL164: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1883 .loc 2 1073 4 is_stmt 1 view .LVU628 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1884 .loc 2 1073 4 is_stmt 0 view .LVU629 + 1885 .thumb + 1886 .syntax unified + 1887 .LBE512: + 1888 .LBE511: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1889 .loc 1 1540 5 discriminator 1 view .LVU630 + 1890 0072 23F04003 bic r3, r3, #64 + 1891 .LVL165: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1892 .loc 1 1540 5 is_stmt 1 discriminator 1 view .LVU631 + 1893 .LBB513: + 1894 .LBI513: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1895 .loc 2 1119 31 view .LVU632 + 1896 .LBB514: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1897 .loc 2 1121 4 view .LVU633 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1898 .loc 2 1123 4 view .LVU634 + 1899 0076 0832 adds r2, r2, #8 + 1900 .LVL166: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1901 .loc 2 1123 4 is_stmt 0 view .LVU635 + 1902 .syntax unified + 1903 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1904 0078 42E80031 strex r1, r3, [r2] + 1905 @ 0 "" 2 + 1906 .LVL167: + 1907 .loc 2 1124 4 is_stmt 1 view .LVU636 + 1908 .loc 2 1124 4 is_stmt 0 view .LVU637 + 1909 .thumb + 1910 .syntax unified + 1911 .LBE514: + 1912 .LBE513: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1913 .loc 1 1540 5 discriminator 1 view .LVU638 + 1914 007c 0029 cmp r1, #0 + 1915 007e F3D1 bne .L75 + 1916 .LBE510: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1917 .loc 1 1540 5 is_stmt 1 discriminator 2 view .LVU639 +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 130 + + + 1918 .loc 1 1543 5 view .LVU640 +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1919 .loc 1 1543 14 is_stmt 0 view .LVU641 + 1920 0080 606F ldr r0, [r4, #116] +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1921 .loc 1 1543 8 view .LVU642 + 1922 0082 10B1 cbz r0, .L76 +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1923 .loc 1 1545 7 is_stmt 1 view .LVU643 +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1924 .loc 1 1545 11 is_stmt 0 view .LVU644 + 1925 0084 FFF7FEFF bl HAL_DMA_Abort + 1926 .LVL168: +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1927 .loc 1 1545 10 discriminator 1 view .LVU645 + 1928 0088 20B9 cbnz r0, .L81 + 1929 .L76: +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1930 .loc 1 1557 5 is_stmt 1 view .LVU646 + 1931 008a 2046 mov r0, r4 + 1932 008c FFF7FEFF bl UART_EndRxTransfer + 1933 .LVL169: +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1934 .loc 1 1560 10 is_stmt 0 view .LVU647 + 1935 0090 0020 movs r0, #0 + 1936 0092 0AE0 b .L74 + 1937 .L81: +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1938 .loc 1 1547 9 is_stmt 1 view .LVU648 +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1939 .loc 1 1547 13 is_stmt 0 view .LVU649 + 1940 0094 606F ldr r0, [r4, #116] + 1941 0096 FFF7FEFF bl HAL_DMA_GetError + 1942 .LVL170: +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 1943 .loc 1 1547 12 discriminator 1 view .LVU650 + 1944 009a 2028 cmp r0, #32 + 1945 009c F5D1 bne .L76 +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1946 .loc 1 1550 11 is_stmt 1 view .LVU651 +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1947 .loc 1 1550 28 is_stmt 0 view .LVU652 + 1948 009e 1023 movs r3, #16 + 1949 00a0 C4F88430 str r3, [r4, #132] +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1950 .loc 1 1552 11 is_stmt 1 view .LVU653 +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1951 .loc 1 1552 18 is_stmt 0 view .LVU654 + 1952 00a4 0320 movs r0, #3 + 1953 00a6 00E0 b .L74 + 1954 .LVL171: + 1955 .L77: +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 1956 .loc 1 1560 10 view .LVU655 + 1957 00a8 0020 movs r0, #0 + 1958 .L74: +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 131 + + + 1959 .loc 1 1561 1 view .LVU656 + 1960 00aa 38BD pop {r3, r4, r5, pc} +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 1961 .loc 1 1561 1 view .LVU657 + 1962 .cfi_endproc + 1963 .LFE145: + 1965 .section .text.HAL_UART_Abort,"ax",%progbits + 1966 .align 1 + 1967 .global HAL_UART_Abort + 1968 .syntax unified + 1969 .thumb + 1970 .thumb_func + 1972 HAL_UART_Abort: + 1973 .LVL172: + 1974 .LFB146: +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + 1975 .loc 1 1576 1 is_stmt 1 view -0 + 1976 .cfi_startproc + 1977 @ args = 0, pretend = 0, frame = 0 + 1978 @ frame_needed = 0, uses_anonymous_args = 0 +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + 1979 .loc 1 1576 1 is_stmt 0 view .LVU659 + 1980 0000 10B5 push {r4, lr} + 1981 .cfi_def_cfa_offset 8 + 1982 .cfi_offset 4, -8 + 1983 .cfi_offset 14, -4 + 1984 0002 0446 mov r4, r0 + 1985 .L83: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1986 .loc 1 1578 3 is_stmt 1 discriminator 1 view .LVU660 + 1987 .LBB515: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1988 .loc 1 1578 3 discriminator 1 view .LVU661 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1989 .loc 1 1578 3 discriminator 1 view .LVU662 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 1990 .loc 1 1578 3 discriminator 1 view .LVU663 + 1991 0004 2268 ldr r2, [r4] + 1992 .LVL173: + 1993 .LBB516: + 1994 .LBI516: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1995 .loc 2 1068 31 view .LVU664 + 1996 .LBB517: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1997 .loc 2 1070 5 view .LVU665 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1998 .loc 2 1072 4 view .LVU666 + 1999 .syntax unified + 2000 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2001 0006 52E8003F ldrex r3, [r2] + 2002 @ 0 "" 2 + 2003 .LVL174: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2004 .loc 2 1073 4 view .LVU667 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2005 .loc 2 1073 4 is_stmt 0 view .LVU668 + ARM GAS /tmp/ccqiorEF.s page 132 + + + 2006 .thumb + 2007 .syntax unified + 2008 .LBE517: + 2009 .LBE516: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2010 .loc 1 1578 3 discriminator 1 view .LVU669 + 2011 000a 23F4F073 bic r3, r3, #480 + 2012 .LVL175: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2013 .loc 1 1578 3 is_stmt 1 discriminator 1 view .LVU670 + 2014 .LBB518: + 2015 .LBI518: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2016 .loc 2 1119 31 view .LVU671 + 2017 .LBB519: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2018 .loc 2 1121 4 view .LVU672 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2019 .loc 2 1123 4 view .LVU673 + 2020 .syntax unified + 2021 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2022 000e 42E80031 strex r1, r3, [r2] + 2023 @ 0 "" 2 + 2024 .LVL176: + 2025 .loc 2 1124 4 view .LVU674 + 2026 .loc 2 1124 4 is_stmt 0 view .LVU675 + 2027 .thumb + 2028 .syntax unified + 2029 .LBE519: + 2030 .LBE518: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2031 .loc 1 1578 3 discriminator 1 view .LVU676 + 2032 0012 0029 cmp r1, #0 + 2033 0014 F6D1 bne .L83 + 2034 .LVL177: + 2035 .L84: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2036 .loc 1 1578 3 discriminator 1 view .LVU677 + 2037 .LBE515: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2038 .loc 1 1578 3 is_stmt 1 discriminator 2 view .LVU678 +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2039 .loc 1 1579 3 discriminator 1 view .LVU679 + 2040 .LBB520: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2041 .loc 1 1579 3 discriminator 1 view .LVU680 +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2042 .loc 1 1579 3 discriminator 1 view .LVU681 +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2043 .loc 1 1579 3 discriminator 1 view .LVU682 + 2044 0016 2268 ldr r2, [r4] + 2045 .LVL178: + 2046 .LBB521: + 2047 .LBI521: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2048 .loc 2 1068 31 view .LVU683 + 2049 .LBB522: + ARM GAS /tmp/ccqiorEF.s page 133 + + +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2050 .loc 2 1070 5 view .LVU684 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2051 .loc 2 1072 4 view .LVU685 + 2052 0018 02F10803 add r3, r2, #8 + 2053 .LVL179: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2054 .loc 2 1072 4 is_stmt 0 view .LVU686 + 2055 .syntax unified + 2056 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2057 001c 53E8003F ldrex r3, [r3] + 2058 @ 0 "" 2 + 2059 .LVL180: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2060 .loc 2 1073 4 is_stmt 1 view .LVU687 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2061 .loc 2 1073 4 is_stmt 0 view .LVU688 + 2062 .thumb + 2063 .syntax unified + 2064 .LBE522: + 2065 .LBE521: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2066 .loc 1 1579 3 discriminator 1 view .LVU689 + 2067 0020 23F00103 bic r3, r3, #1 + 2068 .LVL181: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2069 .loc 1 1579 3 is_stmt 1 discriminator 1 view .LVU690 + 2070 .LBB523: + 2071 .LBI523: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2072 .loc 2 1119 31 view .LVU691 + 2073 .LBB524: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2074 .loc 2 1121 4 view .LVU692 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2075 .loc 2 1123 4 view .LVU693 + 2076 0024 0832 adds r2, r2, #8 + 2077 .LVL182: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2078 .loc 2 1123 4 is_stmt 0 view .LVU694 + 2079 .syntax unified + 2080 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2081 0026 42E80031 strex r1, r3, [r2] + 2082 @ 0 "" 2 + 2083 .LVL183: + 2084 .loc 2 1124 4 is_stmt 1 view .LVU695 + 2085 .loc 2 1124 4 is_stmt 0 view .LVU696 + 2086 .thumb + 2087 .syntax unified + 2088 .LBE524: + 2089 .LBE523: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2090 .loc 1 1579 3 discriminator 1 view .LVU697 + 2091 002a 0029 cmp r1, #0 + 2092 002c F3D1 bne .L84 + 2093 .LBE520: +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 134 + + + 2094 .loc 1 1579 3 is_stmt 1 discriminator 2 view .LVU698 +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2095 .loc 1 1582 3 view .LVU699 +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2096 .loc 1 1582 12 is_stmt 0 view .LVU700 + 2097 002e 236E ldr r3, [r4, #96] + 2098 .LVL184: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2099 .loc 1 1582 6 view .LVU701 + 2100 0030 012B cmp r3, #1 + 2101 0032 47D0 beq .L86 + 2102 .L85: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2103 .loc 1 1584 5 is_stmt 1 discriminator 2 view .LVU702 +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2104 .loc 1 1588 3 view .LVU703 +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2105 .loc 1 1588 7 is_stmt 0 view .LVU704 + 2106 0034 2368 ldr r3, [r4] + 2107 0036 9B68 ldr r3, [r3, #8] +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2108 .loc 1 1588 6 view .LVU705 + 2109 0038 13F0800F tst r3, #128 + 2110 003c 14D0 beq .L87 + 2111 .L88: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2112 .loc 1 1591 5 is_stmt 1 discriminator 1 view .LVU706 + 2113 .LBB525: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2114 .loc 1 1591 5 discriminator 1 view .LVU707 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2115 .loc 1 1591 5 discriminator 1 view .LVU708 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2116 .loc 1 1591 5 discriminator 1 view .LVU709 + 2117 003e 2268 ldr r2, [r4] + 2118 .LVL185: + 2119 .LBB526: + 2120 .LBI526: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2121 .loc 2 1068 31 view .LVU710 + 2122 .LBB527: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2123 .loc 2 1070 5 view .LVU711 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2124 .loc 2 1072 4 view .LVU712 + 2125 0040 02F10803 add r3, r2, #8 + 2126 .LVL186: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2127 .loc 2 1072 4 is_stmt 0 view .LVU713 + 2128 .syntax unified + 2129 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2130 0044 53E8003F ldrex r3, [r3] + 2131 @ 0 "" 2 + 2132 .LVL187: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2133 .loc 2 1073 4 is_stmt 1 view .LVU714 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 135 + + + 2134 .loc 2 1073 4 is_stmt 0 view .LVU715 + 2135 .thumb + 2136 .syntax unified + 2137 .LBE527: + 2138 .LBE526: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2139 .loc 1 1591 5 discriminator 1 view .LVU716 + 2140 0048 23F08003 bic r3, r3, #128 + 2141 .LVL188: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2142 .loc 1 1591 5 is_stmt 1 discriminator 1 view .LVU717 + 2143 .LBB528: + 2144 .LBI528: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2145 .loc 2 1119 31 view .LVU718 + 2146 .LBB529: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2147 .loc 2 1121 4 view .LVU719 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2148 .loc 2 1123 4 view .LVU720 + 2149 004c 0832 adds r2, r2, #8 + 2150 .LVL189: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2151 .loc 2 1123 4 is_stmt 0 view .LVU721 + 2152 .syntax unified + 2153 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2154 004e 42E80031 strex r1, r3, [r2] + 2155 @ 0 "" 2 + 2156 .LVL190: + 2157 .loc 2 1124 4 is_stmt 1 view .LVU722 + 2158 .loc 2 1124 4 is_stmt 0 view .LVU723 + 2159 .thumb + 2160 .syntax unified + 2161 .LBE529: + 2162 .LBE528: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2163 .loc 1 1591 5 discriminator 1 view .LVU724 + 2164 0052 0029 cmp r1, #0 + 2165 0054 F3D1 bne .L88 + 2166 .LBE525: +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2167 .loc 1 1591 5 is_stmt 1 discriminator 2 view .LVU725 +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2168 .loc 1 1594 5 view .LVU726 +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2169 .loc 1 1594 14 is_stmt 0 view .LVU727 + 2170 0056 236F ldr r3, [r4, #112] + 2171 .LVL191: +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2172 .loc 1 1594 8 view .LVU728 + 2173 0058 33B1 cbz r3, .L87 +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2174 .loc 1 1598 7 is_stmt 1 view .LVU729 +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2175 .loc 1 1598 40 is_stmt 0 view .LVU730 + 2176 005a 0022 movs r2, #0 + 2177 005c 5A63 str r2, [r3, #52] + ARM GAS /tmp/ccqiorEF.s page 136 + + +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2178 .loc 1 1600 7 is_stmt 1 view .LVU731 +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2179 .loc 1 1600 11 is_stmt 0 view .LVU732 + 2180 005e 206F ldr r0, [r4, #112] + 2181 .LVL192: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2182 .loc 1 1600 11 view .LVU733 + 2183 0060 FFF7FEFF bl HAL_DMA_Abort + 2184 .LVL193: +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2185 .loc 1 1600 10 discriminator 1 view .LVU734 + 2186 0064 0028 cmp r0, #0 + 2187 0066 37D1 bne .L93 + 2188 .LVL194: + 2189 .L87: +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2190 .loc 1 1614 3 is_stmt 1 view .LVU735 +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2191 .loc 1 1614 7 is_stmt 0 view .LVU736 + 2192 0068 2368 ldr r3, [r4] + 2193 006a 9B68 ldr r3, [r3, #8] +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2194 .loc 1 1614 6 view .LVU737 + 2195 006c 13F0400F tst r3, #64 + 2196 0070 13D0 beq .L90 + 2197 .L91: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2198 .loc 1 1617 5 is_stmt 1 discriminator 1 view .LVU738 + 2199 .LBB530: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2200 .loc 1 1617 5 discriminator 1 view .LVU739 +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2201 .loc 1 1617 5 discriminator 1 view .LVU740 +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2202 .loc 1 1617 5 discriminator 1 view .LVU741 + 2203 0072 2268 ldr r2, [r4] + 2204 .LVL195: + 2205 .LBB531: + 2206 .LBI531: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2207 .loc 2 1068 31 view .LVU742 + 2208 .LBB532: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2209 .loc 2 1070 5 view .LVU743 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2210 .loc 2 1072 4 view .LVU744 + 2211 0074 02F10803 add r3, r2, #8 + 2212 .LVL196: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2213 .loc 2 1072 4 is_stmt 0 view .LVU745 + 2214 .syntax unified + 2215 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2216 0078 53E8003F ldrex r3, [r3] + 2217 @ 0 "" 2 + 2218 .LVL197: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 137 + + + 2219 .loc 2 1073 4 is_stmt 1 view .LVU746 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2220 .loc 2 1073 4 is_stmt 0 view .LVU747 + 2221 .thumb + 2222 .syntax unified + 2223 .LBE532: + 2224 .LBE531: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2225 .loc 1 1617 5 discriminator 1 view .LVU748 + 2226 007c 23F04003 bic r3, r3, #64 + 2227 .LVL198: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2228 .loc 1 1617 5 is_stmt 1 discriminator 1 view .LVU749 + 2229 .LBB533: + 2230 .LBI533: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2231 .loc 2 1119 31 view .LVU750 + 2232 .LBB534: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2233 .loc 2 1121 4 view .LVU751 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2234 .loc 2 1123 4 view .LVU752 + 2235 0080 0832 adds r2, r2, #8 + 2236 .LVL199: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2237 .loc 2 1123 4 is_stmt 0 view .LVU753 + 2238 .syntax unified + 2239 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2240 0082 42E80031 strex r1, r3, [r2] + 2241 @ 0 "" 2 + 2242 .LVL200: + 2243 .loc 2 1124 4 is_stmt 1 view .LVU754 + 2244 .loc 2 1124 4 is_stmt 0 view .LVU755 + 2245 .thumb + 2246 .syntax unified + 2247 .LBE534: + 2248 .LBE533: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2249 .loc 1 1617 5 discriminator 1 view .LVU756 + 2250 0086 0029 cmp r1, #0 + 2251 0088 F3D1 bne .L91 + 2252 .LBE530: +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2253 .loc 1 1617 5 is_stmt 1 discriminator 2 view .LVU757 +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2254 .loc 1 1620 5 view .LVU758 +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2255 .loc 1 1620 14 is_stmt 0 view .LVU759 + 2256 008a 636F ldr r3, [r4, #116] + 2257 .LVL201: +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2258 .loc 1 1620 8 view .LVU760 + 2259 008c 2BB1 cbz r3, .L90 +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2260 .loc 1 1624 7 is_stmt 1 view .LVU761 +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2261 .loc 1 1624 40 is_stmt 0 view .LVU762 + ARM GAS /tmp/ccqiorEF.s page 138 + + + 2262 008e 0022 movs r2, #0 + 2263 0090 5A63 str r2, [r3, #52] +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2264 .loc 1 1626 7 is_stmt 1 view .LVU763 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2265 .loc 1 1626 11 is_stmt 0 view .LVU764 + 2266 0092 606F ldr r0, [r4, #116] + 2267 0094 FFF7FEFF bl HAL_DMA_Abort + 2268 .LVL202: +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2269 .loc 1 1626 10 discriminator 1 view .LVU765 + 2270 0098 40BB cbnz r0, .L94 + 2271 .LVL203: + 2272 .L90: +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 2273 .loc 1 1640 3 is_stmt 1 view .LVU766 +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 2274 .loc 1 1640 22 is_stmt 0 view .LVU767 + 2275 009a 0020 movs r0, #0 + 2276 009c A4F85200 strh r0, [r4, #82] @ movhi +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2277 .loc 1 1641 3 is_stmt 1 view .LVU768 +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2278 .loc 1 1641 22 is_stmt 0 view .LVU769 + 2279 00a0 A4F85A00 strh r0, [r4, #90] @ movhi +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2280 .loc 1 1644 3 is_stmt 1 view .LVU770 + 2281 00a4 2368 ldr r3, [r4] + 2282 00a6 0F22 movs r2, #15 + 2283 00a8 1A62 str r2, [r3, #32] +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2284 .loc 1 1648 3 view .LVU771 + 2285 00aa 2268 ldr r2, [r4] + 2286 00ac 9369 ldr r3, [r2, #24] + 2287 00ae 43F00803 orr r3, r3, #8 + 2288 00b2 9361 str r3, [r2, #24] +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 2289 .loc 1 1651 3 view .LVU772 +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 2290 .loc 1 1651 18 is_stmt 0 view .LVU773 + 2291 00b4 2023 movs r3, #32 + 2292 00b6 E367 str r3, [r4, #124] +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 2293 .loc 1 1652 3 is_stmt 1 view .LVU774 +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 2294 .loc 1 1652 18 is_stmt 0 view .LVU775 + 2295 00b8 C4F88030 str r3, [r4, #128] +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2296 .loc 1 1653 3 is_stmt 1 view .LVU776 +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2297 .loc 1 1653 24 is_stmt 0 view .LVU777 + 2298 00bc 2066 str r0, [r4, #96] +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2299 .loc 1 1655 3 is_stmt 1 view .LVU778 +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2300 .loc 1 1655 20 is_stmt 0 view .LVU779 + 2301 00be C4F88400 str r0, [r4, #132] + ARM GAS /tmp/ccqiorEF.s page 139 + + +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2302 .loc 1 1657 3 is_stmt 1 view .LVU780 + 2303 .L89: +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2304 .loc 1 1658 1 is_stmt 0 view .LVU781 + 2305 00c2 10BD pop {r4, pc} + 2306 .LVL204: + 2307 .L86: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2308 .loc 1 1584 5 is_stmt 1 discriminator 1 view .LVU782 + 2309 .LBB535: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2310 .loc 1 1584 5 discriminator 1 view .LVU783 +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2311 .loc 1 1584 5 discriminator 1 view .LVU784 +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2312 .loc 1 1584 5 discriminator 1 view .LVU785 + 2313 00c4 2268 ldr r2, [r4] + 2314 .LVL205: + 2315 .LBB536: + 2316 .LBI536: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2317 .loc 2 1068 31 view .LVU786 + 2318 .LBB537: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2319 .loc 2 1070 5 view .LVU787 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2320 .loc 2 1072 4 view .LVU788 + 2321 .syntax unified + 2322 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2323 00c6 52E8003F ldrex r3, [r2] + 2324 @ 0 "" 2 + 2325 .LVL206: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2326 .loc 2 1073 4 view .LVU789 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2327 .loc 2 1073 4 is_stmt 0 view .LVU790 + 2328 .thumb + 2329 .syntax unified + 2330 .LBE537: + 2331 .LBE536: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2332 .loc 1 1584 5 discriminator 1 view .LVU791 + 2333 00ca 23F01003 bic r3, r3, #16 + 2334 .LVL207: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2335 .loc 1 1584 5 is_stmt 1 discriminator 1 view .LVU792 + 2336 .LBB538: + 2337 .LBI538: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2338 .loc 2 1119 31 view .LVU793 + 2339 .LBB539: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2340 .loc 2 1121 4 view .LVU794 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2341 .loc 2 1123 4 view .LVU795 + 2342 .syntax unified + ARM GAS /tmp/ccqiorEF.s page 140 + + + 2343 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2344 00ce 42E80031 strex r1, r3, [r2] + 2345 @ 0 "" 2 + 2346 .LVL208: + 2347 .loc 2 1124 4 view .LVU796 + 2348 .loc 2 1124 4 is_stmt 0 view .LVU797 + 2349 .thumb + 2350 .syntax unified + 2351 .LBE539: + 2352 .LBE538: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2353 .loc 1 1584 5 discriminator 1 view .LVU798 + 2354 00d2 0029 cmp r1, #0 + 2355 00d4 F6D1 bne .L86 + 2356 00d6 ADE7 b .L85 + 2357 .LVL209: + 2358 .L93: +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2359 .loc 1 1584 5 discriminator 1 view .LVU799 + 2360 .LBE535: +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2361 .loc 1 1602 9 is_stmt 1 view .LVU800 +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2362 .loc 1 1602 13 is_stmt 0 view .LVU801 + 2363 00d8 206F ldr r0, [r4, #112] + 2364 00da FFF7FEFF bl HAL_DMA_GetError + 2365 .LVL210: +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2366 .loc 1 1602 12 discriminator 1 view .LVU802 + 2367 00de 2028 cmp r0, #32 + 2368 00e0 C2D1 bne .L87 +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2369 .loc 1 1605 11 is_stmt 1 view .LVU803 +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2370 .loc 1 1605 28 is_stmt 0 view .LVU804 + 2371 00e2 1023 movs r3, #16 + 2372 00e4 C4F88430 str r3, [r4, #132] +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2373 .loc 1 1607 11 is_stmt 1 view .LVU805 +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2374 .loc 1 1607 18 is_stmt 0 view .LVU806 + 2375 00e8 0320 movs r0, #3 + 2376 00ea EAE7 b .L89 + 2377 .LVL211: + 2378 .L94: +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2379 .loc 1 1628 9 is_stmt 1 view .LVU807 +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2380 .loc 1 1628 13 is_stmt 0 view .LVU808 + 2381 00ec 606F ldr r0, [r4, #116] + 2382 00ee FFF7FEFF bl HAL_DMA_GetError + 2383 .LVL212: +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2384 .loc 1 1628 12 discriminator 1 view .LVU809 + 2385 00f2 2028 cmp r0, #32 + 2386 00f4 D1D1 bne .L90 +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 141 + + + 2387 .loc 1 1631 11 is_stmt 1 view .LVU810 +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2388 .loc 1 1631 28 is_stmt 0 view .LVU811 + 2389 00f6 1023 movs r3, #16 + 2390 00f8 C4F88430 str r3, [r4, #132] +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2391 .loc 1 1633 11 is_stmt 1 view .LVU812 +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2392 .loc 1 1633 18 is_stmt 0 view .LVU813 + 2393 00fc 0320 movs r0, #3 + 2394 00fe E0E7 b .L89 + 2395 .cfi_endproc + 2396 .LFE146: + 2398 .section .text.HAL_UART_AbortTransmit,"ax",%progbits + 2399 .align 1 + 2400 .global HAL_UART_AbortTransmit + 2401 .syntax unified + 2402 .thumb + 2403 .thumb_func + 2405 HAL_UART_AbortTransmit: + 2406 .LVL213: + 2407 .LFB147: +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE and TCIE interrupts */ + 2408 .loc 1 1673 1 is_stmt 1 view -0 + 2409 .cfi_startproc + 2410 @ args = 0, pretend = 0, frame = 0 + 2411 @ frame_needed = 0, uses_anonymous_args = 0 +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable TXEIE and TCIE interrupts */ + 2412 .loc 1 1673 1 is_stmt 0 view .LVU815 + 2413 0000 10B5 push {r4, lr} + 2414 .cfi_def_cfa_offset 8 + 2415 .cfi_offset 4, -8 + 2416 .cfi_offset 14, -4 + 2417 0002 0446 mov r4, r0 + 2418 .L96: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2419 .loc 1 1675 3 is_stmt 1 discriminator 1 view .LVU816 + 2420 .LBB540: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2421 .loc 1 1675 3 discriminator 1 view .LVU817 +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2422 .loc 1 1675 3 discriminator 1 view .LVU818 +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2423 .loc 1 1675 3 discriminator 1 view .LVU819 + 2424 0004 2268 ldr r2, [r4] + 2425 .LVL214: + 2426 .LBB541: + 2427 .LBI541: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2428 .loc 2 1068 31 view .LVU820 + 2429 .LBB542: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2430 .loc 2 1070 5 view .LVU821 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2431 .loc 2 1072 4 view .LVU822 + 2432 .syntax unified + 2433 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccqiorEF.s page 142 + + + 2434 0006 52E8003F ldrex r3, [r2] + 2435 @ 0 "" 2 + 2436 .LVL215: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2437 .loc 2 1073 4 view .LVU823 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2438 .loc 2 1073 4 is_stmt 0 view .LVU824 + 2439 .thumb + 2440 .syntax unified + 2441 .LBE542: + 2442 .LBE541: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2443 .loc 1 1675 3 discriminator 1 view .LVU825 + 2444 000a 23F0C003 bic r3, r3, #192 + 2445 .LVL216: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2446 .loc 1 1675 3 is_stmt 1 discriminator 1 view .LVU826 + 2447 .LBB543: + 2448 .LBI543: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2449 .loc 2 1119 31 view .LVU827 + 2450 .LBB544: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2451 .loc 2 1121 4 view .LVU828 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2452 .loc 2 1123 4 view .LVU829 + 2453 .syntax unified + 2454 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2455 000e 42E80031 strex r1, r3, [r2] + 2456 @ 0 "" 2 + 2457 .LVL217: + 2458 .loc 2 1124 4 view .LVU830 + 2459 .loc 2 1124 4 is_stmt 0 view .LVU831 + 2460 .thumb + 2461 .syntax unified + 2462 .LBE544: + 2463 .LBE543: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2464 .loc 1 1675 3 discriminator 1 view .LVU832 + 2465 0012 0029 cmp r1, #0 + 2466 0014 F6D1 bne .L96 + 2467 .LBE540: +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2468 .loc 1 1675 3 is_stmt 1 discriminator 2 view .LVU833 +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2469 .loc 1 1678 3 view .LVU834 +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2470 .loc 1 1678 7 is_stmt 0 view .LVU835 + 2471 0016 2368 ldr r3, [r4] + 2472 .LVL218: +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2473 .loc 1 1678 7 view .LVU836 + 2474 0018 9B68 ldr r3, [r3, #8] +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2475 .loc 1 1678 6 view .LVU837 + 2476 001a 13F0800F tst r3, #128 + 2477 001e 13D0 beq .L97 + ARM GAS /tmp/ccqiorEF.s page 143 + + + 2478 .L98: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2479 .loc 1 1681 5 is_stmt 1 discriminator 1 view .LVU838 + 2480 .LBB545: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2481 .loc 1 1681 5 discriminator 1 view .LVU839 +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2482 .loc 1 1681 5 discriminator 1 view .LVU840 +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2483 .loc 1 1681 5 discriminator 1 view .LVU841 + 2484 0020 2268 ldr r2, [r4] + 2485 .LVL219: + 2486 .LBB546: + 2487 .LBI546: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2488 .loc 2 1068 31 view .LVU842 + 2489 .LBB547: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2490 .loc 2 1070 5 view .LVU843 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2491 .loc 2 1072 4 view .LVU844 + 2492 0022 02F10803 add r3, r2, #8 + 2493 .LVL220: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2494 .loc 2 1072 4 is_stmt 0 view .LVU845 + 2495 .syntax unified + 2496 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2497 0026 53E8003F ldrex r3, [r3] + 2498 @ 0 "" 2 + 2499 .LVL221: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2500 .loc 2 1073 4 is_stmt 1 view .LVU846 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2501 .loc 2 1073 4 is_stmt 0 view .LVU847 + 2502 .thumb + 2503 .syntax unified + 2504 .LBE547: + 2505 .LBE546: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2506 .loc 1 1681 5 discriminator 1 view .LVU848 + 2507 002a 23F08003 bic r3, r3, #128 + 2508 .LVL222: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2509 .loc 1 1681 5 is_stmt 1 discriminator 1 view .LVU849 + 2510 .LBB548: + 2511 .LBI548: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2512 .loc 2 1119 31 view .LVU850 + 2513 .LBB549: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2514 .loc 2 1121 4 view .LVU851 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2515 .loc 2 1123 4 view .LVU852 + 2516 002e 0832 adds r2, r2, #8 + 2517 .LVL223: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2518 .loc 2 1123 4 is_stmt 0 view .LVU853 + ARM GAS /tmp/ccqiorEF.s page 144 + + + 2519 .syntax unified + 2520 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2521 0030 42E80031 strex r1, r3, [r2] + 2522 @ 0 "" 2 + 2523 .LVL224: + 2524 .loc 2 1124 4 is_stmt 1 view .LVU854 + 2525 .loc 2 1124 4 is_stmt 0 view .LVU855 + 2526 .thumb + 2527 .syntax unified + 2528 .LBE549: + 2529 .LBE548: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2530 .loc 1 1681 5 discriminator 1 view .LVU856 + 2531 0034 0029 cmp r1, #0 + 2532 0036 F3D1 bne .L98 + 2533 .LBE545: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2534 .loc 1 1681 5 is_stmt 1 discriminator 2 view .LVU857 +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2535 .loc 1 1684 5 view .LVU858 +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2536 .loc 1 1684 14 is_stmt 0 view .LVU859 + 2537 0038 236F ldr r3, [r4, #112] + 2538 .LVL225: +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2539 .loc 1 1684 8 view .LVU860 + 2540 003a 2BB1 cbz r3, .L97 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2541 .loc 1 1688 7 is_stmt 1 view .LVU861 +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2542 .loc 1 1688 40 is_stmt 0 view .LVU862 + 2543 003c 0022 movs r2, #0 + 2544 003e 5A63 str r2, [r3, #52] +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2545 .loc 1 1690 7 is_stmt 1 view .LVU863 +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2546 .loc 1 1690 11 is_stmt 0 view .LVU864 + 2547 0040 206F ldr r0, [r4, #112] + 2548 .LVL226: +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2549 .loc 1 1690 11 view .LVU865 + 2550 0042 FFF7FEFF bl HAL_DMA_Abort + 2551 .LVL227: +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2552 .loc 1 1690 10 discriminator 1 view .LVU866 + 2553 0046 28B9 cbnz r0, .L101 + 2554 .LVL228: + 2555 .L97: +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2556 .loc 1 1704 3 is_stmt 1 view .LVU867 +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2557 .loc 1 1704 22 is_stmt 0 view .LVU868 + 2558 0048 0020 movs r0, #0 + 2559 004a A4F85200 strh r0, [r4, #82] @ movhi +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2560 .loc 1 1708 3 is_stmt 1 view .LVU869 +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 145 + + + 2561 .loc 1 1708 17 is_stmt 0 view .LVU870 + 2562 004e 2023 movs r3, #32 + 2563 0050 E367 str r3, [r4, #124] +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2564 .loc 1 1710 3 is_stmt 1 view .LVU871 + 2565 .L99: +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2566 .loc 1 1711 1 is_stmt 0 view .LVU872 + 2567 0052 10BD pop {r4, pc} + 2568 .LVL229: + 2569 .L101: +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2570 .loc 1 1692 9 is_stmt 1 view .LVU873 +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2571 .loc 1 1692 13 is_stmt 0 view .LVU874 + 2572 0054 206F ldr r0, [r4, #112] + 2573 0056 FFF7FEFF bl HAL_DMA_GetError + 2574 .LVL230: +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2575 .loc 1 1692 12 discriminator 1 view .LVU875 + 2576 005a 2028 cmp r0, #32 + 2577 005c F4D1 bne .L97 +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2578 .loc 1 1695 11 is_stmt 1 view .LVU876 +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2579 .loc 1 1695 28 is_stmt 0 view .LVU877 + 2580 005e 1023 movs r3, #16 + 2581 0060 C4F88430 str r3, [r4, #132] +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2582 .loc 1 1697 11 is_stmt 1 view .LVU878 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2583 .loc 1 1697 18 is_stmt 0 view .LVU879 + 2584 0064 0320 movs r0, #3 + 2585 0066 F4E7 b .L99 + 2586 .cfi_endproc + 2587 .LFE147: + 2589 .section .text.HAL_UART_AbortReceive,"ax",%progbits + 2590 .align 1 + 2591 .global HAL_UART_AbortReceive + 2592 .syntax unified + 2593 .thumb + 2594 .thumb_func + 2596 HAL_UART_AbortReceive: + 2597 .LVL231: + 2598 .LFB148: +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + 2599 .loc 1 1726 1 is_stmt 1 view -0 + 2600 .cfi_startproc + 2601 @ args = 0, pretend = 0, frame = 0 + 2602 @ frame_needed = 0, uses_anonymous_args = 0 +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + 2603 .loc 1 1726 1 is_stmt 0 view .LVU881 + 2604 0000 10B5 push {r4, lr} + 2605 .cfi_def_cfa_offset 8 + 2606 .cfi_offset 4, -8 + 2607 .cfi_offset 14, -4 + 2608 0002 0446 mov r4, r0 + ARM GAS /tmp/ccqiorEF.s page 146 + + + 2609 .L103: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2610 .loc 1 1728 3 is_stmt 1 discriminator 1 view .LVU882 + 2611 .LBB550: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2612 .loc 1 1728 3 discriminator 1 view .LVU883 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2613 .loc 1 1728 3 discriminator 1 view .LVU884 +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2614 .loc 1 1728 3 discriminator 1 view .LVU885 + 2615 0004 2268 ldr r2, [r4] + 2616 .LVL232: + 2617 .LBB551: + 2618 .LBI551: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2619 .loc 2 1068 31 view .LVU886 + 2620 .LBB552: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2621 .loc 2 1070 5 view .LVU887 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2622 .loc 2 1072 4 view .LVU888 + 2623 .syntax unified + 2624 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2625 0006 52E8003F ldrex r3, [r2] + 2626 @ 0 "" 2 + 2627 .LVL233: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2628 .loc 2 1073 4 view .LVU889 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2629 .loc 2 1073 4 is_stmt 0 view .LVU890 + 2630 .thumb + 2631 .syntax unified + 2632 .LBE552: + 2633 .LBE551: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2634 .loc 1 1728 3 discriminator 1 view .LVU891 + 2635 000a 23F49073 bic r3, r3, #288 + 2636 .LVL234: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2637 .loc 1 1728 3 is_stmt 1 discriminator 1 view .LVU892 + 2638 .LBB553: + 2639 .LBI553: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2640 .loc 2 1119 31 view .LVU893 + 2641 .LBB554: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2642 .loc 2 1121 4 view .LVU894 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2643 .loc 2 1123 4 view .LVU895 + 2644 .syntax unified + 2645 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2646 000e 42E80031 strex r1, r3, [r2] + 2647 @ 0 "" 2 + 2648 .LVL235: + 2649 .loc 2 1124 4 view .LVU896 + 2650 .loc 2 1124 4 is_stmt 0 view .LVU897 + 2651 .thumb + ARM GAS /tmp/ccqiorEF.s page 147 + + + 2652 .syntax unified + 2653 .LBE554: + 2654 .LBE553: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2655 .loc 1 1728 3 discriminator 1 view .LVU898 + 2656 0012 0029 cmp r1, #0 + 2657 0014 F6D1 bne .L103 + 2658 .LVL236: + 2659 .L104: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2660 .loc 1 1728 3 discriminator 1 view .LVU899 + 2661 .LBE550: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 2662 .loc 1 1728 3 is_stmt 1 discriminator 2 view .LVU900 +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2663 .loc 1 1729 3 discriminator 1 view .LVU901 + 2664 .LBB555: +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2665 .loc 1 1729 3 discriminator 1 view .LVU902 +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2666 .loc 1 1729 3 discriminator 1 view .LVU903 +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2667 .loc 1 1729 3 discriminator 1 view .LVU904 + 2668 0016 2268 ldr r2, [r4] + 2669 .LVL237: + 2670 .LBB556: + 2671 .LBI556: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2672 .loc 2 1068 31 view .LVU905 + 2673 .LBB557: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2674 .loc 2 1070 5 view .LVU906 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2675 .loc 2 1072 4 view .LVU907 + 2676 0018 02F10803 add r3, r2, #8 + 2677 .LVL238: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2678 .loc 2 1072 4 is_stmt 0 view .LVU908 + 2679 .syntax unified + 2680 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2681 001c 53E8003F ldrex r3, [r3] + 2682 @ 0 "" 2 + 2683 .LVL239: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2684 .loc 2 1073 4 is_stmt 1 view .LVU909 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2685 .loc 2 1073 4 is_stmt 0 view .LVU910 + 2686 .thumb + 2687 .syntax unified + 2688 .LBE557: + 2689 .LBE556: +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2690 .loc 1 1729 3 discriminator 1 view .LVU911 + 2691 0020 23F00103 bic r3, r3, #1 + 2692 .LVL240: +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2693 .loc 1 1729 3 is_stmt 1 discriminator 1 view .LVU912 + ARM GAS /tmp/ccqiorEF.s page 148 + + + 2694 .LBB558: + 2695 .LBI558: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2696 .loc 2 1119 31 view .LVU913 + 2697 .LBB559: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2698 .loc 2 1121 4 view .LVU914 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2699 .loc 2 1123 4 view .LVU915 + 2700 0024 0832 adds r2, r2, #8 + 2701 .LVL241: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2702 .loc 2 1123 4 is_stmt 0 view .LVU916 + 2703 .syntax unified + 2704 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2705 0026 42E80031 strex r1, r3, [r2] + 2706 @ 0 "" 2 + 2707 .LVL242: + 2708 .loc 2 1124 4 is_stmt 1 view .LVU917 + 2709 .loc 2 1124 4 is_stmt 0 view .LVU918 + 2710 .thumb + 2711 .syntax unified + 2712 .LBE559: + 2713 .LBE558: +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2714 .loc 1 1729 3 discriminator 1 view .LVU919 + 2715 002a 0029 cmp r1, #0 + 2716 002c F3D1 bne .L104 + 2717 .LBE555: +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2718 .loc 1 1729 3 is_stmt 1 discriminator 2 view .LVU920 +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2719 .loc 1 1732 3 view .LVU921 +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2720 .loc 1 1732 12 is_stmt 0 view .LVU922 + 2721 002e 236E ldr r3, [r4, #96] + 2722 .LVL243: +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2723 .loc 1 1732 6 view .LVU923 + 2724 0030 012B cmp r3, #1 + 2725 0032 28D0 beq .L106 + 2726 .L105: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2727 .loc 1 1734 5 is_stmt 1 discriminator 2 view .LVU924 +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2728 .loc 1 1738 3 view .LVU925 +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2729 .loc 1 1738 7 is_stmt 0 view .LVU926 + 2730 0034 2368 ldr r3, [r4] + 2731 0036 9B68 ldr r3, [r3, #8] +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2732 .loc 1 1738 6 view .LVU927 + 2733 0038 13F0400F tst r3, #64 + 2734 003c 13D0 beq .L107 + 2735 .L108: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2736 .loc 1 1741 5 is_stmt 1 discriminator 1 view .LVU928 + ARM GAS /tmp/ccqiorEF.s page 149 + + + 2737 .LBB560: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2738 .loc 1 1741 5 discriminator 1 view .LVU929 +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2739 .loc 1 1741 5 discriminator 1 view .LVU930 +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2740 .loc 1 1741 5 discriminator 1 view .LVU931 + 2741 003e 2268 ldr r2, [r4] + 2742 .LVL244: + 2743 .LBB561: + 2744 .LBI561: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2745 .loc 2 1068 31 view .LVU932 + 2746 .LBB562: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2747 .loc 2 1070 5 view .LVU933 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2748 .loc 2 1072 4 view .LVU934 + 2749 0040 02F10803 add r3, r2, #8 + 2750 .LVL245: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2751 .loc 2 1072 4 is_stmt 0 view .LVU935 + 2752 .syntax unified + 2753 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2754 0044 53E8003F ldrex r3, [r3] + 2755 @ 0 "" 2 + 2756 .LVL246: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2757 .loc 2 1073 4 is_stmt 1 view .LVU936 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2758 .loc 2 1073 4 is_stmt 0 view .LVU937 + 2759 .thumb + 2760 .syntax unified + 2761 .LBE562: + 2762 .LBE561: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2763 .loc 1 1741 5 discriminator 1 view .LVU938 + 2764 0048 23F04003 bic r3, r3, #64 + 2765 .LVL247: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2766 .loc 1 1741 5 is_stmt 1 discriminator 1 view .LVU939 + 2767 .LBB563: + 2768 .LBI563: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2769 .loc 2 1119 31 view .LVU940 + 2770 .LBB564: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2771 .loc 2 1121 4 view .LVU941 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2772 .loc 2 1123 4 view .LVU942 + 2773 004c 0832 adds r2, r2, #8 + 2774 .LVL248: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2775 .loc 2 1123 4 is_stmt 0 view .LVU943 + 2776 .syntax unified + 2777 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2778 004e 42E80031 strex r1, r3, [r2] + ARM GAS /tmp/ccqiorEF.s page 150 + + + 2779 @ 0 "" 2 + 2780 .LVL249: + 2781 .loc 2 1124 4 is_stmt 1 view .LVU944 + 2782 .loc 2 1124 4 is_stmt 0 view .LVU945 + 2783 .thumb + 2784 .syntax unified + 2785 .LBE564: + 2786 .LBE563: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2787 .loc 1 1741 5 discriminator 1 view .LVU946 + 2788 0052 0029 cmp r1, #0 + 2789 0054 F3D1 bne .L108 + 2790 .LBE560: +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2791 .loc 1 1741 5 is_stmt 1 discriminator 2 view .LVU947 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2792 .loc 1 1744 5 view .LVU948 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2793 .loc 1 1744 14 is_stmt 0 view .LVU949 + 2794 0056 636F ldr r3, [r4, #116] + 2795 .LVL250: +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2796 .loc 1 1744 8 view .LVU950 + 2797 0058 2BB1 cbz r3, .L107 +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2798 .loc 1 1748 7 is_stmt 1 view .LVU951 +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2799 .loc 1 1748 40 is_stmt 0 view .LVU952 + 2800 005a 0022 movs r2, #0 + 2801 005c 5A63 str r2, [r3, #52] +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2802 .loc 1 1750 7 is_stmt 1 view .LVU953 +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2803 .loc 1 1750 11 is_stmt 0 view .LVU954 + 2804 005e 606F ldr r0, [r4, #116] + 2805 .LVL251: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2806 .loc 1 1750 11 view .LVU955 + 2807 0060 FFF7FEFF bl HAL_DMA_Abort + 2808 .LVL252: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2809 .loc 1 1750 10 discriminator 1 view .LVU956 + 2810 0064 C8B9 cbnz r0, .L111 + 2811 .LVL253: + 2812 .L107: +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2813 .loc 1 1764 3 is_stmt 1 view .LVU957 +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2814 .loc 1 1764 22 is_stmt 0 view .LVU958 + 2815 0066 0020 movs r0, #0 + 2816 0068 A4F85A00 strh r0, [r4, #90] @ movhi +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2817 .loc 1 1767 3 is_stmt 1 view .LVU959 + 2818 006c 2368 ldr r3, [r4] + 2819 006e 0F22 movs r2, #15 + 2820 0070 1A62 str r2, [r3, #32] +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 151 + + + 2821 .loc 1 1770 3 view .LVU960 + 2822 0072 2268 ldr r2, [r4] + 2823 0074 9369 ldr r3, [r2, #24] + 2824 0076 43F00803 orr r3, r3, #8 + 2825 007a 9361 str r3, [r2, #24] +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 2826 .loc 1 1773 3 view .LVU961 +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 2827 .loc 1 1773 18 is_stmt 0 view .LVU962 + 2828 007c 2023 movs r3, #32 + 2829 007e C4F88030 str r3, [r4, #128] +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2830 .loc 1 1774 3 is_stmt 1 view .LVU963 +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2831 .loc 1 1774 24 is_stmt 0 view .LVU964 + 2832 0082 2066 str r0, [r4, #96] +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2833 .loc 1 1776 3 is_stmt 1 view .LVU965 + 2834 .L109: +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2835 .loc 1 1777 1 is_stmt 0 view .LVU966 + 2836 0084 10BD pop {r4, pc} + 2837 .LVL254: + 2838 .L106: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2839 .loc 1 1734 5 is_stmt 1 discriminator 1 view .LVU967 + 2840 .LBB565: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2841 .loc 1 1734 5 discriminator 1 view .LVU968 +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2842 .loc 1 1734 5 discriminator 1 view .LVU969 +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2843 .loc 1 1734 5 discriminator 1 view .LVU970 + 2844 0086 2268 ldr r2, [r4] + 2845 .LVL255: + 2846 .LBB566: + 2847 .LBI566: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2848 .loc 2 1068 31 view .LVU971 + 2849 .LBB567: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2850 .loc 2 1070 5 view .LVU972 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2851 .loc 2 1072 4 view .LVU973 + 2852 .syntax unified + 2853 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2854 0088 52E8003F ldrex r3, [r2] + 2855 @ 0 "" 2 + 2856 .LVL256: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2857 .loc 2 1073 4 view .LVU974 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2858 .loc 2 1073 4 is_stmt 0 view .LVU975 + 2859 .thumb + 2860 .syntax unified + 2861 .LBE567: + 2862 .LBE566: + ARM GAS /tmp/ccqiorEF.s page 152 + + +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2863 .loc 1 1734 5 discriminator 1 view .LVU976 + 2864 008c 23F01003 bic r3, r3, #16 + 2865 .LVL257: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2866 .loc 1 1734 5 is_stmt 1 discriminator 1 view .LVU977 + 2867 .LBB568: + 2868 .LBI568: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2869 .loc 2 1119 31 view .LVU978 + 2870 .LBB569: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2871 .loc 2 1121 4 view .LVU979 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2872 .loc 2 1123 4 view .LVU980 + 2873 .syntax unified + 2874 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2875 0090 42E80031 strex r1, r3, [r2] + 2876 @ 0 "" 2 + 2877 .LVL258: + 2878 .loc 2 1124 4 view .LVU981 + 2879 .loc 2 1124 4 is_stmt 0 view .LVU982 + 2880 .thumb + 2881 .syntax unified + 2882 .LBE569: + 2883 .LBE568: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2884 .loc 1 1734 5 discriminator 1 view .LVU983 + 2885 0094 0029 cmp r1, #0 + 2886 0096 F6D1 bne .L106 + 2887 0098 CCE7 b .L105 + 2888 .LVL259: + 2889 .L111: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2890 .loc 1 1734 5 discriminator 1 view .LVU984 + 2891 .LBE565: +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2892 .loc 1 1752 9 is_stmt 1 view .LVU985 +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2893 .loc 1 1752 13 is_stmt 0 view .LVU986 + 2894 009a 606F ldr r0, [r4, #116] + 2895 009c FFF7FEFF bl HAL_DMA_GetError + 2896 .LVL260: +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2897 .loc 1 1752 12 discriminator 1 view .LVU987 + 2898 00a0 2028 cmp r0, #32 + 2899 00a2 E0D1 bne .L107 +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2900 .loc 1 1755 11 is_stmt 1 view .LVU988 +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2901 .loc 1 1755 28 is_stmt 0 view .LVU989 + 2902 00a4 1023 movs r3, #16 + 2903 00a6 C4F88430 str r3, [r4, #132] +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2904 .loc 1 1757 11 is_stmt 1 view .LVU990 +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 2905 .loc 1 1757 18 is_stmt 0 view .LVU991 + ARM GAS /tmp/ccqiorEF.s page 153 + + + 2906 00aa 0320 movs r0, #3 + 2907 00ac EAE7 b .L109 + 2908 .cfi_endproc + 2909 .LFE148: + 2911 .section .text.HAL_UART_TxCpltCallback,"ax",%progbits + 2912 .align 1 + 2913 .weak HAL_UART_TxCpltCallback + 2914 .syntax unified + 2915 .thumb + 2916 .thumb_func + 2918 HAL_UART_TxCpltCallback: + 2919 .LVL261: + 2920 .LFB153: +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 2921 .loc 1 2421 1 is_stmt 1 view -0 + 2922 .cfi_startproc + 2923 @ args = 0, pretend = 0, frame = 0 + 2924 @ frame_needed = 0, uses_anonymous_args = 0 + 2925 @ link register save eliminated. +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2926 .loc 1 2423 3 view .LVU993 +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2927 .loc 1 2428 1 is_stmt 0 view .LVU994 + 2928 0000 7047 bx lr + 2929 .cfi_endproc + 2930 .LFE153: + 2932 .section .text.UART_DMATransmitCplt,"ax",%progbits + 2933 .align 1 + 2934 .syntax unified + 2935 .thumb + 2936 .thumb_func + 2938 UART_DMATransmitCplt: + 2939 .LVL262: + 2940 .LFB181: +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 2941 .loc 1 3369 1 is_stmt 1 view -0 + 2942 .cfi_startproc + 2943 @ args = 0, pretend = 0, frame = 0 + 2944 @ frame_needed = 0, uses_anonymous_args = 0 +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 2945 .loc 1 3369 1 is_stmt 0 view .LVU996 + 2946 0000 08B5 push {r3, lr} + 2947 .cfi_def_cfa_offset 8 + 2948 .cfi_offset 3, -8 + 2949 .cfi_offset 14, -4 +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2950 .loc 1 3370 3 is_stmt 1 view .LVU997 +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2951 .loc 1 3370 23 is_stmt 0 view .LVU998 + 2952 0002 416A ldr r1, [r0, #36] + 2953 .LVL263: +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2954 .loc 1 3373 3 is_stmt 1 view .LVU999 +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 2955 .loc 1 3373 17 is_stmt 0 view .LVU1000 + 2956 0004 8369 ldr r3, [r0, #24] +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 154 + + + 2957 .loc 1 3373 6 view .LVU1001 + 2958 0006 202B cmp r3, #32 + 2959 0008 18D0 beq .L114 +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2960 .loc 1 3375 5 is_stmt 1 view .LVU1002 +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2961 .loc 1 3375 24 is_stmt 0 view .LVU1003 + 2962 000a 0023 movs r3, #0 + 2963 000c A1F85230 strh r3, [r1, #82] @ movhi + 2964 .LVL264: + 2965 .L115: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2966 .loc 1 3379 5 is_stmt 1 discriminator 1 view .LVU1004 + 2967 .LBB570: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2968 .loc 1 3379 5 discriminator 1 view .LVU1005 +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2969 .loc 1 3379 5 discriminator 1 view .LVU1006 +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2970 .loc 1 3379 5 discriminator 1 view .LVU1007 + 2971 0010 0A68 ldr r2, [r1] + 2972 .LVL265: + 2973 .LBB571: + 2974 .LBI571: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2975 .loc 2 1068 31 view .LVU1008 + 2976 .LBB572: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2977 .loc 2 1070 5 view .LVU1009 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2978 .loc 2 1072 4 view .LVU1010 + 2979 0012 02F10803 add r3, r2, #8 + 2980 .LVL266: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 2981 .loc 2 1072 4 is_stmt 0 view .LVU1011 + 2982 .syntax unified + 2983 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2984 0016 53E8003F ldrex r3, [r3] + 2985 @ 0 "" 2 + 2986 .LVL267: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2987 .loc 2 1073 4 is_stmt 1 view .LVU1012 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 2988 .loc 2 1073 4 is_stmt 0 view .LVU1013 + 2989 .thumb + 2990 .syntax unified + 2991 .LBE572: + 2992 .LBE571: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2993 .loc 1 3379 5 discriminator 1 view .LVU1014 + 2994 001a 23F08003 bic r3, r3, #128 + 2995 .LVL268: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 2996 .loc 1 3379 5 is_stmt 1 discriminator 1 view .LVU1015 + 2997 .LBB573: + 2998 .LBI573: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccqiorEF.s page 155 + + + 2999 .loc 2 1119 31 view .LVU1016 + 3000 .LBB574: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3001 .loc 2 1121 4 view .LVU1017 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3002 .loc 2 1123 4 view .LVU1018 + 3003 001e 0832 adds r2, r2, #8 + 3004 .LVL269: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3005 .loc 2 1123 4 is_stmt 0 view .LVU1019 + 3006 .syntax unified + 3007 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3008 0020 42E80030 strex r0, r3, [r2] + 3009 @ 0 "" 2 + 3010 .LVL270: + 3011 .loc 2 1124 4 is_stmt 1 view .LVU1020 + 3012 .loc 2 1124 4 is_stmt 0 view .LVU1021 + 3013 .thumb + 3014 .syntax unified + 3015 .LBE574: + 3016 .LBE573: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3017 .loc 1 3379 5 discriminator 1 view .LVU1022 + 3018 0024 0028 cmp r0, #0 + 3019 0026 F3D1 bne .L115 + 3020 .LVL271: + 3021 .L116: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3022 .loc 1 3379 5 discriminator 1 view .LVU1023 + 3023 .LBE570: +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3024 .loc 1 3379 5 is_stmt 1 discriminator 2 view .LVU1024 +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3025 .loc 1 3382 5 discriminator 1 view .LVU1025 + 3026 .LBB575: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3027 .loc 1 3382 5 discriminator 1 view .LVU1026 +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3028 .loc 1 3382 5 discriminator 1 view .LVU1027 +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3029 .loc 1 3382 5 discriminator 1 view .LVU1028 + 3030 0028 0A68 ldr r2, [r1] + 3031 .LVL272: + 3032 .LBB576: + 3033 .LBI576: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3034 .loc 2 1068 31 view .LVU1029 + 3035 .LBB577: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3036 .loc 2 1070 5 view .LVU1030 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3037 .loc 2 1072 4 view .LVU1031 + 3038 .syntax unified + 3039 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3040 002a 52E8003F ldrex r3, [r2] + 3041 @ 0 "" 2 + 3042 .LVL273: + ARM GAS /tmp/ccqiorEF.s page 156 + + +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3043 .loc 2 1073 4 view .LVU1032 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3044 .loc 2 1073 4 is_stmt 0 view .LVU1033 + 3045 .thumb + 3046 .syntax unified + 3047 .LBE577: + 3048 .LBE576: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3049 .loc 1 3382 5 discriminator 1 view .LVU1034 + 3050 002e 43F04003 orr r3, r3, #64 + 3051 .LVL274: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3052 .loc 1 3382 5 is_stmt 1 discriminator 1 view .LVU1035 + 3053 .LBB578: + 3054 .LBI578: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3055 .loc 2 1119 31 view .LVU1036 + 3056 .LBB579: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3057 .loc 2 1121 4 view .LVU1037 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3058 .loc 2 1123 4 view .LVU1038 + 3059 .syntax unified + 3060 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3061 0032 42E80030 strex r0, r3, [r2] + 3062 @ 0 "" 2 + 3063 .LVL275: + 3064 .loc 2 1124 4 view .LVU1039 + 3065 .loc 2 1124 4 is_stmt 0 view .LVU1040 + 3066 .thumb + 3067 .syntax unified + 3068 .LBE579: + 3069 .LBE578: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3070 .loc 1 3382 5 discriminator 1 view .LVU1041 + 3071 0036 0028 cmp r0, #0 + 3072 0038 F6D1 bne .L116 + 3073 .LVL276: + 3074 .L113: +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3075 .loc 1 3382 5 discriminator 1 view .LVU1042 + 3076 .LBE575: +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3077 .loc 1 3395 1 view .LVU1043 + 3078 003a 08BD pop {r3, pc} + 3079 .LVL277: + 3080 .L114: +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3081 .loc 1 3392 5 is_stmt 1 view .LVU1044 + 3082 003c 0846 mov r0, r1 + 3083 .LVL278: +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3084 .loc 1 3392 5 is_stmt 0 view .LVU1045 + 3085 003e FFF7FEFF bl HAL_UART_TxCpltCallback + 3086 .LVL279: +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 157 + + + 3087 .loc 1 3395 1 view .LVU1046 + 3088 0042 FAE7 b .L113 + 3089 .cfi_endproc + 3090 .LFE181: + 3092 .section .text.UART_EndTransmit_IT,"ax",%progbits + 3093 .align 1 + 3094 .syntax unified + 3095 .thumb + 3096 .thumb_func + 3098 UART_EndTransmit_IT: + 3099 .LFB193: +3798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief Wrap up transmission in non-blocking mode. +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart pointer to a UART_HandleTypeDef structure that contains +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * the configuration information for the specified UART module. +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3100 .loc 1 3807 1 is_stmt 1 view -0 + 3101 .cfi_startproc + 3102 @ args = 0, pretend = 0, frame = 0 + 3103 @ frame_needed = 0, uses_anonymous_args = 0 + 3104 .LVL280: + 3105 .loc 1 3807 1 is_stmt 0 view .LVU1048 + 3106 0000 08B5 push {r3, lr} + 3107 .cfi_def_cfa_offset 8 + 3108 .cfi_offset 3, -8 + 3109 .cfi_offset 14, -4 + 3110 .L120: +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Transmit Complete Interrupt */ +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); + 3111 .loc 1 3809 3 is_stmt 1 discriminator 1 view .LVU1049 + 3112 .LBB580: + 3113 .loc 1 3809 3 discriminator 1 view .LVU1050 + 3114 .loc 1 3809 3 discriminator 1 view .LVU1051 + 3115 .loc 1 3809 3 discriminator 1 view .LVU1052 + 3116 0002 0268 ldr r2, [r0] + 3117 .LVL281: + 3118 .LBB581: + 3119 .LBI581: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3120 .loc 2 1068 31 view .LVU1053 + 3121 .LBB582: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3122 .loc 2 1070 5 view .LVU1054 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3123 .loc 2 1072 4 view .LVU1055 + 3124 .syntax unified + 3125 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3126 0004 52E8003F ldrex r3, [r2] + 3127 @ 0 "" 2 + 3128 .LVL282: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3129 .loc 2 1073 4 view .LVU1056 + ARM GAS /tmp/ccqiorEF.s page 158 + + +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3130 .loc 2 1073 4 is_stmt 0 view .LVU1057 + 3131 .thumb + 3132 .syntax unified + 3133 .LBE582: + 3134 .LBE581: + 3135 .loc 1 3809 3 discriminator 1 view .LVU1058 + 3136 0008 23F04003 bic r3, r3, #64 + 3137 .LVL283: + 3138 .loc 1 3809 3 is_stmt 1 discriminator 1 view .LVU1059 + 3139 .LBB583: + 3140 .LBI583: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3141 .loc 2 1119 31 view .LVU1060 + 3142 .LBB584: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3143 .loc 2 1121 4 view .LVU1061 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3144 .loc 2 1123 4 view .LVU1062 + 3145 .syntax unified + 3146 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3147 000c 42E80031 strex r1, r3, [r2] + 3148 @ 0 "" 2 + 3149 .LVL284: + 3150 .loc 2 1124 4 view .LVU1063 + 3151 .loc 2 1124 4 is_stmt 0 view .LVU1064 + 3152 .thumb + 3153 .syntax unified + 3154 .LBE584: + 3155 .LBE583: + 3156 .loc 1 3809 3 discriminator 1 view .LVU1065 + 3157 0010 0029 cmp r1, #0 + 3158 0012 F6D1 bne .L120 + 3159 .LBE580: + 3160 .loc 1 3809 3 is_stmt 1 discriminator 2 view .LVU1066 +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Tx process is ended, restore huart->gState to Ready */ +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; + 3161 .loc 1 3812 3 view .LVU1067 + 3162 .loc 1 3812 17 is_stmt 0 view .LVU1068 + 3163 0014 2023 movs r3, #32 + 3164 .LVL285: + 3165 .loc 1 3812 17 view .LVU1069 + 3166 0016 C367 str r3, [r0, #124] +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Cleat TxISR function pointer */ +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 3167 .loc 1 3815 3 is_stmt 1 view .LVU1070 + 3168 .loc 1 3815 16 is_stmt 0 view .LVU1071 + 3169 0018 0023 movs r3, #0 + 3170 001a C366 str r3, [r0, #108] +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Tx complete callback*/ +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxCpltCallback(huart); +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Tx complete callback*/ + ARM GAS /tmp/ccqiorEF.s page 159 + + +3822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_TxCpltCallback(huart); + 3171 .loc 1 3822 3 is_stmt 1 view .LVU1072 + 3172 001c FFF7FEFF bl HAL_UART_TxCpltCallback + 3173 .LVL286: +3823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3174 .loc 1 3824 1 is_stmt 0 view .LVU1073 + 3175 0020 08BD pop {r3, pc} + 3176 .cfi_endproc + 3177 .LFE193: + 3179 .section .text.HAL_UART_TxHalfCpltCallback,"ax",%progbits + 3180 .align 1 + 3181 .weak HAL_UART_TxHalfCpltCallback + 3182 .syntax unified + 3183 .thumb + 3184 .thumb_func + 3186 HAL_UART_TxHalfCpltCallback: + 3187 .LVL287: + 3188 .LFB154: +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 3189 .loc 1 2436 1 is_stmt 1 view -0 + 3190 .cfi_startproc + 3191 @ args = 0, pretend = 0, frame = 0 + 3192 @ frame_needed = 0, uses_anonymous_args = 0 + 3193 @ link register save eliminated. +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3194 .loc 1 2438 3 view .LVU1075 +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3195 .loc 1 2443 1 is_stmt 0 view .LVU1076 + 3196 0000 7047 bx lr + 3197 .cfi_endproc + 3198 .LFE154: + 3200 .section .text.UART_DMATxHalfCplt,"ax",%progbits + 3201 .align 1 + 3202 .syntax unified + 3203 .thumb + 3204 .thumb_func + 3206 UART_DMATxHalfCplt: + 3207 .LVL288: + 3208 .LFB182: +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3209 .loc 1 3403 1 is_stmt 1 view -0 + 3210 .cfi_startproc + 3211 @ args = 0, pretend = 0, frame = 0 + 3212 @ frame_needed = 0, uses_anonymous_args = 0 +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3213 .loc 1 3403 1 is_stmt 0 view .LVU1078 + 3214 0000 08B5 push {r3, lr} + 3215 .cfi_def_cfa_offset 8 + 3216 .cfi_offset 3, -8 + 3217 .cfi_offset 14, -4 +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3218 .loc 1 3404 3 is_stmt 1 view .LVU1079 + 3219 .LVL289: +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3220 .loc 1 3411 3 view .LVU1080 + 3221 0002 406A ldr r0, [r0, #36] + ARM GAS /tmp/ccqiorEF.s page 160 + + + 3222 .LVL290: +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3223 .loc 1 3411 3 is_stmt 0 view .LVU1081 + 3224 0004 FFF7FEFF bl HAL_UART_TxHalfCpltCallback + 3225 .LVL291: +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3226 .loc 1 3413 1 view .LVU1082 + 3227 0008 08BD pop {r3, pc} + 3228 .cfi_endproc + 3229 .LFE182: + 3231 .section .text.HAL_UART_RxCpltCallback,"ax",%progbits + 3232 .align 1 + 3233 .weak HAL_UART_RxCpltCallback + 3234 .syntax unified + 3235 .thumb + 3236 .thumb_func + 3238 HAL_UART_RxCpltCallback: + 3239 .LVL292: + 3240 .LFB155: +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 3241 .loc 1 2451 1 is_stmt 1 view -0 + 3242 .cfi_startproc + 3243 @ args = 0, pretend = 0, frame = 0 + 3244 @ frame_needed = 0, uses_anonymous_args = 0 + 3245 @ link register save eliminated. +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3246 .loc 1 2453 3 view .LVU1084 +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3247 .loc 1 2458 1 is_stmt 0 view .LVU1085 + 3248 0000 7047 bx lr + 3249 .cfi_endproc + 3250 .LFE155: + 3252 .section .text.HAL_UART_RxHalfCpltCallback,"ax",%progbits + 3253 .align 1 + 3254 .weak HAL_UART_RxHalfCpltCallback + 3255 .syntax unified + 3256 .thumb + 3257 .thumb_func + 3259 HAL_UART_RxHalfCpltCallback: + 3260 .LVL293: + 3261 .LFB156: +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 3262 .loc 1 2466 1 is_stmt 1 view -0 + 3263 .cfi_startproc + 3264 @ args = 0, pretend = 0, frame = 0 + 3265 @ frame_needed = 0, uses_anonymous_args = 0 + 3266 @ link register save eliminated. +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3267 .loc 1 2468 3 view .LVU1087 +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3268 .loc 1 2473 1 is_stmt 0 view .LVU1088 + 3269 0000 7047 bx lr + 3270 .cfi_endproc + 3271 .LFE156: + 3273 .section .text.HAL_UART_ErrorCallback,"ax",%progbits + 3274 .align 1 + 3275 .weak HAL_UART_ErrorCallback + ARM GAS /tmp/ccqiorEF.s page 161 + + + 3276 .syntax unified + 3277 .thumb + 3278 .thumb_func + 3280 HAL_UART_ErrorCallback: + 3281 .LVL294: + 3282 .LFB157: +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 3283 .loc 1 2481 1 is_stmt 1 view -0 + 3284 .cfi_startproc + 3285 @ args = 0, pretend = 0, frame = 0 + 3286 @ frame_needed = 0, uses_anonymous_args = 0 + 3287 @ link register save eliminated. +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3288 .loc 1 2483 3 view .LVU1090 +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3289 .loc 1 2488 1 is_stmt 0 view .LVU1091 + 3290 0000 7047 bx lr + 3291 .cfi_endproc + 3292 .LFE157: + 3294 .section .text.UART_DMAError,"ax",%progbits + 3295 .align 1 + 3296 .syntax unified + 3297 .thumb + 3298 .thumb_func + 3300 UART_DMAError: + 3301 .LVL295: + 3302 .LFB185: +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3303 .loc 1 3520 1 is_stmt 1 view -0 + 3304 .cfi_startproc + 3305 @ args = 0, pretend = 0, frame = 0 + 3306 @ frame_needed = 0, uses_anonymous_args = 0 +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3307 .loc 1 3520 1 is_stmt 0 view .LVU1093 + 3308 0000 38B5 push {r3, r4, r5, lr} + 3309 .cfi_def_cfa_offset 16 + 3310 .cfi_offset 3, -16 + 3311 .cfi_offset 4, -12 + 3312 .cfi_offset 5, -8 + 3313 .cfi_offset 14, -4 +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3314 .loc 1 3521 3 is_stmt 1 view .LVU1094 +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3315 .loc 1 3521 23 is_stmt 0 view .LVU1095 + 3316 0002 446A ldr r4, [r0, #36] + 3317 .LVL296: +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; + 3318 .loc 1 3523 3 is_stmt 1 view .LVU1096 +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; + 3319 .loc 1 3523 31 is_stmt 0 view .LVU1097 + 3320 0004 E26F ldr r2, [r4, #124] + 3321 .LVL297: +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3322 .loc 1 3524 3 is_stmt 1 view .LVU1098 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3323 .loc 1 3524 31 is_stmt 0 view .LVU1099 + 3324 0006 D4F88050 ldr r5, [r4, #128] + ARM GAS /tmp/ccqiorEF.s page 162 + + + 3325 .LVL298: +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 3326 .loc 1 3527 3 is_stmt 1 view .LVU1100 +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 3327 .loc 1 3527 8 is_stmt 0 view .LVU1101 + 3328 000a 2368 ldr r3, [r4] + 3329 000c 9B68 ldr r3, [r3, #8] +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 3330 .loc 1 3527 6 view .LVU1102 + 3331 000e 13F0800F tst r3, #128 + 3332 0012 01D0 beq .L129 +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) + 3333 .loc 1 3527 62 discriminator 1 view .LVU1103 + 3334 0014 212A cmp r2, #33 + 3335 0016 10D0 beq .L132 + 3336 .LVL299: + 3337 .L129: +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 3338 .loc 1 3535 3 is_stmt 1 view .LVU1104 +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 3339 .loc 1 3535 8 is_stmt 0 view .LVU1105 + 3340 0018 2368 ldr r3, [r4] + 3341 001a 9B68 ldr r3, [r3, #8] +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 3342 .loc 1 3535 6 view .LVU1106 + 3343 001c 13F0400F tst r3, #64 + 3344 0020 01D0 beq .L130 +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) + 3345 .loc 1 3535 62 discriminator 1 view .LVU1107 + 3346 0022 222D cmp r5, #34 + 3347 0024 10D0 beq .L133 + 3348 .L130: +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3349 .loc 1 3542 3 is_stmt 1 view .LVU1108 +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3350 .loc 1 3542 8 is_stmt 0 view .LVU1109 + 3351 0026 D4F88430 ldr r3, [r4, #132] +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3352 .loc 1 3542 20 view .LVU1110 + 3353 002a 43F01003 orr r3, r3, #16 + 3354 002e C4F88430 str r3, [r4, #132] +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3355 .loc 1 3549 3 is_stmt 1 view .LVU1111 + 3356 0032 2046 mov r0, r4 + 3357 0034 FFF7FEFF bl HAL_UART_ErrorCallback + 3358 .LVL300: +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3359 .loc 1 3551 1 is_stmt 0 view .LVU1112 + 3360 0038 38BD pop {r3, r4, r5, pc} + 3361 .LVL301: + 3362 .L132: +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndTxTransfer(huart); + 3363 .loc 1 3530 5 is_stmt 1 view .LVU1113 +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndTxTransfer(huart); + 3364 .loc 1 3530 24 is_stmt 0 view .LVU1114 + 3365 003a 0023 movs r3, #0 + 3366 003c A4F85230 strh r3, [r4, #82] @ movhi + ARM GAS /tmp/ccqiorEF.s page 163 + + +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3367 .loc 1 3531 5 is_stmt 1 view .LVU1115 + 3368 0040 2046 mov r0, r4 + 3369 .LVL302: +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3370 .loc 1 3531 5 is_stmt 0 view .LVU1116 + 3371 0042 FFF7FEFF bl UART_EndTxTransfer + 3372 .LVL303: +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3373 .loc 1 3531 5 view .LVU1117 + 3374 0046 E7E7 b .L129 + 3375 .L133: +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); + 3376 .loc 1 3538 5 is_stmt 1 view .LVU1118 +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_EndRxTransfer(huart); + 3377 .loc 1 3538 24 is_stmt 0 view .LVU1119 + 3378 0048 0023 movs r3, #0 + 3379 004a A4F85A30 strh r3, [r4, #90] @ movhi +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3380 .loc 1 3539 5 is_stmt 1 view .LVU1120 + 3381 004e 2046 mov r0, r4 + 3382 0050 FFF7FEFF bl UART_EndRxTransfer + 3383 .LVL304: + 3384 0054 E7E7 b .L130 + 3385 .cfi_endproc + 3386 .LFE185: + 3388 .section .text.UART_DMAAbortOnError,"ax",%progbits + 3389 .align 1 + 3390 .syntax unified + 3391 .thumb + 3392 .thumb_func + 3394 UART_DMAAbortOnError: + 3395 .LVL305: + 3396 .LFB186: +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3397 .loc 1 3560 1 view -0 + 3398 .cfi_startproc + 3399 @ args = 0, pretend = 0, frame = 0 + 3400 @ frame_needed = 0, uses_anonymous_args = 0 +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3401 .loc 1 3560 1 is_stmt 0 view .LVU1122 + 3402 0000 08B5 push {r3, lr} + 3403 .cfi_def_cfa_offset 8 + 3404 .cfi_offset 3, -8 + 3405 .cfi_offset 14, -4 +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 3406 .loc 1 3561 3 is_stmt 1 view .LVU1123 +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 3407 .loc 1 3561 23 is_stmt 0 view .LVU1124 + 3408 0002 406A ldr r0, [r0, #36] + 3409 .LVL306: +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; + 3410 .loc 1 3562 3 is_stmt 1 view .LVU1125 +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = 0U; + 3411 .loc 1 3562 22 is_stmt 0 view .LVU1126 + 3412 0004 0023 movs r3, #0 + 3413 0006 A0F85A30 strh r3, [r0, #90] @ movhi + ARM GAS /tmp/ccqiorEF.s page 164 + + +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3414 .loc 1 3563 3 is_stmt 1 view .LVU1127 +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3415 .loc 1 3563 22 is_stmt 0 view .LVU1128 + 3416 000a A0F85230 strh r3, [r0, #82] @ movhi +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3417 .loc 1 3570 3 is_stmt 1 view .LVU1129 + 3418 000e FFF7FEFF bl HAL_UART_ErrorCallback + 3419 .LVL307: +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3420 .loc 1 3572 1 is_stmt 0 view .LVU1130 + 3421 0012 08BD pop {r3, pc} + 3422 .cfi_endproc + 3423 .LFE186: + 3425 .section .text.HAL_UART_AbortCpltCallback,"ax",%progbits + 3426 .align 1 + 3427 .weak HAL_UART_AbortCpltCallback + 3428 .syntax unified + 3429 .thumb + 3430 .thumb_func + 3432 HAL_UART_AbortCpltCallback: + 3433 .LVL308: + 3434 .LFB158: +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 3435 .loc 1 2496 1 is_stmt 1 view -0 + 3436 .cfi_startproc + 3437 @ args = 0, pretend = 0, frame = 0 + 3438 @ frame_needed = 0, uses_anonymous_args = 0 + 3439 @ link register save eliminated. +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3440 .loc 1 2498 3 view .LVU1132 +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3441 .loc 1 2503 1 is_stmt 0 view .LVU1133 + 3442 0000 7047 bx lr + 3443 .cfi_endproc + 3444 .LFE158: + 3446 .section .text.HAL_UART_Abort_IT,"ax",%progbits + 3447 .align 1 + 3448 .global HAL_UART_Abort_IT + 3449 .syntax unified + 3450 .thumb + 3451 .thumb_func + 3453 HAL_UART_Abort_IT: + 3454 .LVL309: + 3455 .LFB149: +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t abortcplt = 1U; + 3456 .loc 1 1794 1 is_stmt 1 view -0 + 3457 .cfi_startproc + 3458 @ args = 0, pretend = 0, frame = 0 + 3459 @ frame_needed = 0, uses_anonymous_args = 0 +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t abortcplt = 1U; + 3460 .loc 1 1794 1 is_stmt 0 view .LVU1135 + 3461 0000 38B5 push {r3, r4, r5, lr} + 3462 .cfi_def_cfa_offset 16 + 3463 .cfi_offset 3, -16 + 3464 .cfi_offset 4, -12 + 3465 .cfi_offset 5, -8 + ARM GAS /tmp/ccqiorEF.s page 165 + + + 3466 .cfi_offset 14, -4 + 3467 0002 0446 mov r4, r0 +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3468 .loc 1 1795 3 is_stmt 1 view .LVU1136 + 3469 .LVL310: + 3470 .L138: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3471 .loc 1 1798 3 discriminator 1 view .LVU1137 + 3472 .LBB585: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3473 .loc 1 1798 3 discriminator 1 view .LVU1138 +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3474 .loc 1 1798 3 discriminator 1 view .LVU1139 +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3475 .loc 1 1798 3 discriminator 1 view .LVU1140 + 3476 0004 2268 ldr r2, [r4] + 3477 .LVL311: + 3478 .LBB586: + 3479 .LBI586: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3480 .loc 2 1068 31 view .LVU1141 + 3481 .LBB587: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3482 .loc 2 1070 5 view .LVU1142 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3483 .loc 2 1072 4 view .LVU1143 + 3484 .syntax unified + 3485 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3486 0006 52E8003F ldrex r3, [r2] + 3487 @ 0 "" 2 + 3488 .LVL312: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3489 .loc 2 1073 4 view .LVU1144 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3490 .loc 2 1073 4 is_stmt 0 view .LVU1145 + 3491 .thumb + 3492 .syntax unified + 3493 .LBE587: + 3494 .LBE586: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3495 .loc 1 1798 3 discriminator 1 view .LVU1146 + 3496 000a 23F4F073 bic r3, r3, #480 + 3497 .LVL313: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3498 .loc 1 1798 3 is_stmt 1 discriminator 1 view .LVU1147 + 3499 .LBB588: + 3500 .LBI588: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3501 .loc 2 1119 31 view .LVU1148 + 3502 .LBB589: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3503 .loc 2 1121 4 view .LVU1149 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3504 .loc 2 1123 4 view .LVU1150 + 3505 .syntax unified + 3506 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3507 000e 42E80031 strex r1, r3, [r2] + ARM GAS /tmp/ccqiorEF.s page 166 + + + 3508 @ 0 "" 2 + 3509 .LVL314: + 3510 .loc 2 1124 4 view .LVU1151 + 3511 .loc 2 1124 4 is_stmt 0 view .LVU1152 + 3512 .thumb + 3513 .syntax unified + 3514 .LBE589: + 3515 .LBE588: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3516 .loc 1 1798 3 discriminator 1 view .LVU1153 + 3517 0012 0029 cmp r1, #0 + 3518 0014 F6D1 bne .L138 + 3519 .LVL315: + 3520 .L139: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3521 .loc 1 1798 3 discriminator 1 view .LVU1154 + 3522 .LBE585: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 3523 .loc 1 1798 3 is_stmt 1 discriminator 2 view .LVU1155 +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3524 .loc 1 1799 3 discriminator 1 view .LVU1156 + 3525 .LBB590: +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3526 .loc 1 1799 3 discriminator 1 view .LVU1157 +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3527 .loc 1 1799 3 discriminator 1 view .LVU1158 +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3528 .loc 1 1799 3 discriminator 1 view .LVU1159 + 3529 0016 2268 ldr r2, [r4] + 3530 .LVL316: + 3531 .LBB591: + 3532 .LBI591: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3533 .loc 2 1068 31 view .LVU1160 + 3534 .LBB592: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3535 .loc 2 1070 5 view .LVU1161 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3536 .loc 2 1072 4 view .LVU1162 + 3537 0018 02F10803 add r3, r2, #8 + 3538 .LVL317: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3539 .loc 2 1072 4 is_stmt 0 view .LVU1163 + 3540 .syntax unified + 3541 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3542 001c 53E8003F ldrex r3, [r3] + 3543 @ 0 "" 2 + 3544 .LVL318: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3545 .loc 2 1073 4 is_stmt 1 view .LVU1164 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3546 .loc 2 1073 4 is_stmt 0 view .LVU1165 + 3547 .thumb + 3548 .syntax unified + 3549 .LBE592: + 3550 .LBE591: +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 167 + + + 3551 .loc 1 1799 3 discriminator 1 view .LVU1166 + 3552 0020 23F00103 bic r3, r3, #1 + 3553 .LVL319: +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3554 .loc 1 1799 3 is_stmt 1 discriminator 1 view .LVU1167 + 3555 .LBB593: + 3556 .LBI593: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3557 .loc 2 1119 31 view .LVU1168 + 3558 .LBB594: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3559 .loc 2 1121 4 view .LVU1169 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3560 .loc 2 1123 4 view .LVU1170 + 3561 0024 0832 adds r2, r2, #8 + 3562 .LVL320: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3563 .loc 2 1123 4 is_stmt 0 view .LVU1171 + 3564 .syntax unified + 3565 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3566 0026 42E80031 strex r1, r3, [r2] + 3567 @ 0 "" 2 + 3568 .LVL321: + 3569 .loc 2 1124 4 is_stmt 1 view .LVU1172 + 3570 .loc 2 1124 4 is_stmt 0 view .LVU1173 + 3571 .thumb + 3572 .syntax unified + 3573 .LBE594: + 3574 .LBE593: +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3575 .loc 1 1799 3 discriminator 1 view .LVU1174 + 3576 002a 0029 cmp r1, #0 + 3577 002c F3D1 bne .L139 + 3578 .LBE590: +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3579 .loc 1 1799 3 is_stmt 1 discriminator 2 view .LVU1175 +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3580 .loc 1 1802 3 view .LVU1176 +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3581 .loc 1 1802 12 is_stmt 0 view .LVU1177 + 3582 002e 236E ldr r3, [r4, #96] + 3583 .LVL322: +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3584 .loc 1 1802 6 view .LVU1178 + 3585 0030 012B cmp r3, #1 + 3586 0032 2ED0 beq .L141 + 3587 .L140: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3588 .loc 1 1804 5 is_stmt 1 discriminator 2 view .LVU1179 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3589 .loc 1 1810 3 view .LVU1180 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3590 .loc 1 1810 12 is_stmt 0 view .LVU1181 + 3591 0034 236F ldr r3, [r4, #112] +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3592 .loc 1 1810 6 view .LVU1182 + 3593 0036 33B1 cbz r3, .L142 + ARM GAS /tmp/ccqiorEF.s page 168 + + +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3594 .loc 1 1814 5 is_stmt 1 view .LVU1183 +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3595 .loc 1 1814 9 is_stmt 0 view .LVU1184 + 3596 0038 2268 ldr r2, [r4] + 3597 003a 9268 ldr r2, [r2, #8] +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3598 .loc 1 1814 8 view .LVU1185 + 3599 003c 12F0800F tst r2, #128 + 3600 0040 31D0 beq .L143 +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3601 .loc 1 1816 7 is_stmt 1 view .LVU1186 +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3602 .loc 1 1816 40 is_stmt 0 view .LVU1187 + 3603 0042 394A ldr r2, .L155 + 3604 0044 5A63 str r2, [r3, #52] + 3605 .L142: +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3606 .loc 1 1824 3 is_stmt 1 view .LVU1188 +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3607 .loc 1 1824 12 is_stmt 0 view .LVU1189 + 3608 0046 636F ldr r3, [r4, #116] +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3609 .loc 1 1824 6 view .LVU1190 + 3610 0048 33B1 cbz r3, .L144 +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3611 .loc 1 1828 5 is_stmt 1 view .LVU1191 +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3612 .loc 1 1828 9 is_stmt 0 view .LVU1192 + 3613 004a 2268 ldr r2, [r4] + 3614 004c 9268 ldr r2, [r2, #8] +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3615 .loc 1 1828 8 view .LVU1193 + 3616 004e 12F0400F tst r2, #64 + 3617 0052 2BD0 beq .L145 +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3618 .loc 1 1830 7 is_stmt 1 view .LVU1194 +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3619 .loc 1 1830 40 is_stmt 0 view .LVU1195 + 3620 0054 354A ldr r2, .L155+4 + 3621 0056 5A63 str r2, [r3, #52] + 3622 .L144: +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3623 .loc 1 1839 3 is_stmt 1 view .LVU1196 +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3624 .loc 1 1839 7 is_stmt 0 view .LVU1197 + 3625 0058 2368 ldr r3, [r4] + 3626 005a 9B68 ldr r3, [r3, #8] +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3627 .loc 1 1839 6 view .LVU1198 + 3628 005c 13F0800F tst r3, #128 + 3629 0060 27D0 beq .L152 + 3630 .L147: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3631 .loc 1 1842 5 is_stmt 1 discriminator 1 view .LVU1199 + 3632 .LBB595: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 169 + + + 3633 .loc 1 1842 5 discriminator 1 view .LVU1200 +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3634 .loc 1 1842 5 discriminator 1 view .LVU1201 +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3635 .loc 1 1842 5 discriminator 1 view .LVU1202 + 3636 0062 2168 ldr r1, [r4] + 3637 .LVL323: + 3638 .LBB596: + 3639 .LBI596: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3640 .loc 2 1068 31 view .LVU1203 + 3641 .LBB597: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3642 .loc 2 1070 5 view .LVU1204 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3643 .loc 2 1072 4 view .LVU1205 + 3644 0064 01F10803 add r3, r1, #8 + 3645 .LVL324: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3646 .loc 2 1072 4 is_stmt 0 view .LVU1206 + 3647 .syntax unified + 3648 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3649 0068 53E8003F ldrex r3, [r3] + 3650 @ 0 "" 2 + 3651 .LVL325: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3652 .loc 2 1073 4 is_stmt 1 view .LVU1207 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3653 .loc 2 1073 4 is_stmt 0 view .LVU1208 + 3654 .thumb + 3655 .syntax unified + 3656 .LBE597: + 3657 .LBE596: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3658 .loc 1 1842 5 discriminator 1 view .LVU1209 + 3659 006c 23F08003 bic r3, r3, #128 + 3660 .LVL326: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3661 .loc 1 1842 5 is_stmt 1 discriminator 1 view .LVU1210 + 3662 .LBB598: + 3663 .LBI598: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3664 .loc 2 1119 31 view .LVU1211 + 3665 .LBB599: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3666 .loc 2 1121 4 view .LVU1212 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3667 .loc 2 1123 4 view .LVU1213 + 3668 0070 0831 adds r1, r1, #8 + 3669 .LVL327: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3670 .loc 2 1123 4 is_stmt 0 view .LVU1214 + 3671 .syntax unified + 3672 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3673 0072 41E80032 strex r2, r3, [r1] + 3674 @ 0 "" 2 + 3675 .thumb + ARM GAS /tmp/ccqiorEF.s page 170 + + + 3676 .syntax unified + 3677 0076 1546 mov r5, r2 + 3678 .LVL328: + 3679 .loc 2 1124 4 is_stmt 1 view .LVU1215 + 3680 .loc 2 1124 4 is_stmt 0 view .LVU1216 + 3681 .LBE599: + 3682 .LBE598: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3683 .loc 1 1842 5 discriminator 1 view .LVU1217 + 3684 0078 002A cmp r2, #0 + 3685 007a F2D1 bne .L147 + 3686 .LBE595: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3687 .loc 1 1842 5 is_stmt 1 discriminator 2 view .LVU1218 +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3688 .loc 1 1845 5 view .LVU1219 +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3689 .loc 1 1845 14 is_stmt 0 view .LVU1220 + 3690 007c 206F ldr r0, [r4, #112] + 3691 .LVL329: +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3692 .loc 1 1845 8 view .LVU1221 + 3693 007e 0028 cmp r0, #0 + 3694 0080 4BD0 beq .L153 +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3695 .loc 1 1851 7 is_stmt 1 view .LVU1222 +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3696 .loc 1 1851 11 is_stmt 0 view .LVU1223 + 3697 0082 FFF7FEFF bl HAL_DMA_Abort_IT + 3698 .LVL330: +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3699 .loc 1 1851 10 discriminator 1 view .LVU1224 + 3700 0086 A8B1 cbz r0, .L146 +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3701 .loc 1 1853 9 is_stmt 1 view .LVU1225 +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3702 .loc 1 1853 14 is_stmt 0 view .LVU1226 + 3703 0088 236F ldr r3, [r4, #112] +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3704 .loc 1 1853 42 view .LVU1227 + 3705 008a 0022 movs r2, #0 + 3706 008c 5A63 str r2, [r3, #52] +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3707 .loc 1 1795 12 view .LVU1228 + 3708 008e 0125 movs r5, #1 + 3709 0090 10E0 b .L146 + 3710 .LVL331: + 3711 .L141: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3712 .loc 1 1804 5 is_stmt 1 discriminator 1 view .LVU1229 + 3713 .LBB600: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3714 .loc 1 1804 5 discriminator 1 view .LVU1230 +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3715 .loc 1 1804 5 discriminator 1 view .LVU1231 +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3716 .loc 1 1804 5 discriminator 1 view .LVU1232 + ARM GAS /tmp/ccqiorEF.s page 171 + + + 3717 0092 2268 ldr r2, [r4] + 3718 .LVL332: + 3719 .LBB601: + 3720 .LBI601: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3721 .loc 2 1068 31 view .LVU1233 + 3722 .LBB602: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3723 .loc 2 1070 5 view .LVU1234 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3724 .loc 2 1072 4 view .LVU1235 + 3725 .syntax unified + 3726 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3727 0094 52E8003F ldrex r3, [r2] + 3728 @ 0 "" 2 + 3729 .LVL333: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3730 .loc 2 1073 4 view .LVU1236 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3731 .loc 2 1073 4 is_stmt 0 view .LVU1237 + 3732 .thumb + 3733 .syntax unified + 3734 .LBE602: + 3735 .LBE601: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3736 .loc 1 1804 5 discriminator 1 view .LVU1238 + 3737 0098 23F01003 bic r3, r3, #16 + 3738 .LVL334: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3739 .loc 1 1804 5 is_stmt 1 discriminator 1 view .LVU1239 + 3740 .LBB603: + 3741 .LBI603: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3742 .loc 2 1119 31 view .LVU1240 + 3743 .LBB604: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3744 .loc 2 1121 4 view .LVU1241 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3745 .loc 2 1123 4 view .LVU1242 + 3746 .syntax unified + 3747 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3748 009c 42E80031 strex r1, r3, [r2] + 3749 @ 0 "" 2 + 3750 .LVL335: + 3751 .loc 2 1124 4 view .LVU1243 + 3752 .loc 2 1124 4 is_stmt 0 view .LVU1244 + 3753 .thumb + 3754 .syntax unified + 3755 .LBE604: + 3756 .LBE603: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3757 .loc 1 1804 5 discriminator 1 view .LVU1245 + 3758 00a0 0029 cmp r1, #0 + 3759 00a2 F6D1 bne .L141 + 3760 00a4 C6E7 b .L140 + 3761 .LVL336: + 3762 .L143: + ARM GAS /tmp/ccqiorEF.s page 172 + + +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3763 .loc 1 1804 5 discriminator 1 view .LVU1246 + 3764 .LBE600: +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3765 .loc 1 1820 7 is_stmt 1 view .LVU1247 +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3766 .loc 1 1820 40 is_stmt 0 view .LVU1248 + 3767 00a6 0022 movs r2, #0 + 3768 00a8 5A63 str r2, [r3, #52] + 3769 00aa CCE7 b .L142 + 3770 .L145: +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3771 .loc 1 1834 7 is_stmt 1 view .LVU1249 +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3772 .loc 1 1834 40 is_stmt 0 view .LVU1250 + 3773 00ac 0022 movs r2, #0 + 3774 00ae 5A63 str r2, [r3, #52] + 3775 00b0 D2E7 b .L144 + 3776 .L152: +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3777 .loc 1 1795 12 view .LVU1251 + 3778 00b2 0125 movs r5, #1 + 3779 .LVL337: + 3780 .L146: +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3781 .loc 1 1863 3 is_stmt 1 view .LVU1252 +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3782 .loc 1 1863 7 is_stmt 0 view .LVU1253 + 3783 00b4 2368 ldr r3, [r4] + 3784 00b6 9B68 ldr r3, [r3, #8] +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3785 .loc 1 1863 6 view .LVU1254 + 3786 00b8 13F0400F tst r3, #64 + 3787 00bc 2FD0 beq .L148 + 3788 .L149: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3789 .loc 1 1866 5 is_stmt 1 discriminator 1 view .LVU1255 + 3790 .LBB605: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3791 .loc 1 1866 5 discriminator 1 view .LVU1256 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3792 .loc 1 1866 5 discriminator 1 view .LVU1257 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3793 .loc 1 1866 5 discriminator 1 view .LVU1258 + 3794 00be 2268 ldr r2, [r4] + 3795 .LVL338: + 3796 .LBB606: + 3797 .LBI606: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3798 .loc 2 1068 31 view .LVU1259 + 3799 .LBB607: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3800 .loc 2 1070 5 view .LVU1260 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3801 .loc 2 1072 4 view .LVU1261 + 3802 00c0 02F10803 add r3, r2, #8 + 3803 .LVL339: + ARM GAS /tmp/ccqiorEF.s page 173 + + +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3804 .loc 2 1072 4 is_stmt 0 view .LVU1262 + 3805 .syntax unified + 3806 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3807 00c4 53E8003F ldrex r3, [r3] + 3808 @ 0 "" 2 + 3809 .LVL340: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3810 .loc 2 1073 4 is_stmt 1 view .LVU1263 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 3811 .loc 2 1073 4 is_stmt 0 view .LVU1264 + 3812 .thumb + 3813 .syntax unified + 3814 .LBE607: + 3815 .LBE606: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3816 .loc 1 1866 5 discriminator 1 view .LVU1265 + 3817 00c8 23F04003 bic r3, r3, #64 + 3818 .LVL341: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3819 .loc 1 1866 5 is_stmt 1 discriminator 1 view .LVU1266 + 3820 .LBB608: + 3821 .LBI608: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 3822 .loc 2 1119 31 view .LVU1267 + 3823 .LBB609: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 3824 .loc 2 1121 4 view .LVU1268 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3825 .loc 2 1123 4 view .LVU1269 + 3826 00cc 0832 adds r2, r2, #8 + 3827 .LVL342: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 3828 .loc 2 1123 4 is_stmt 0 view .LVU1270 + 3829 .syntax unified + 3830 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3831 00ce 42E80031 strex r1, r3, [r2] + 3832 @ 0 "" 2 + 3833 .LVL343: + 3834 .loc 2 1124 4 is_stmt 1 view .LVU1271 + 3835 .loc 2 1124 4 is_stmt 0 view .LVU1272 + 3836 .thumb + 3837 .syntax unified + 3838 .LBE609: + 3839 .LBE608: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3840 .loc 1 1866 5 discriminator 1 view .LVU1273 + 3841 00d2 0029 cmp r1, #0 + 3842 00d4 F3D1 bne .L149 + 3843 .LBE605: +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3844 .loc 1 1866 5 is_stmt 1 discriminator 2 view .LVU1274 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3845 .loc 1 1869 5 view .LVU1275 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3846 .loc 1 1869 14 is_stmt 0 view .LVU1276 + 3847 00d6 606F ldr r0, [r4, #116] + ARM GAS /tmp/ccqiorEF.s page 174 + + +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3848 .loc 1 1869 8 view .LVU1277 + 3849 00d8 08B3 cbz r0, .L148 +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3850 .loc 1 1875 7 is_stmt 1 view .LVU1278 +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3851 .loc 1 1875 11 is_stmt 0 view .LVU1279 + 3852 00da FFF7FEFF bl HAL_DMA_Abort_IT + 3853 .LVL344: +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3854 .loc 1 1875 10 discriminator 1 view .LVU1280 + 3855 00de 00B3 cbz r0, .L150 +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** abortcplt = 1U; + 3856 .loc 1 1877 9 is_stmt 1 view .LVU1281 +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** abortcplt = 1U; + 3857 .loc 1 1877 14 is_stmt 0 view .LVU1282 + 3858 00e0 636F ldr r3, [r4, #116] +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** abortcplt = 1U; + 3859 .loc 1 1877 42 view .LVU1283 + 3860 00e2 0022 movs r2, #0 + 3861 00e4 5A63 str r2, [r3, #52] +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3862 .loc 1 1878 9 is_stmt 1 view .LVU1284 + 3863 .LVL345: +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3864 .loc 1 1888 3 view .LVU1285 + 3865 .L151: +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 3866 .loc 1 1891 5 view .LVU1286 +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 3867 .loc 1 1891 24 is_stmt 0 view .LVU1287 + 3868 00e6 0023 movs r3, #0 + 3869 00e8 A4F85230 strh r3, [r4, #82] @ movhi +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3870 .loc 1 1892 5 is_stmt 1 view .LVU1288 +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3871 .loc 1 1892 24 is_stmt 0 view .LVU1289 + 3872 00ec A4F85A30 strh r3, [r4, #90] @ movhi +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 3873 .loc 1 1895 5 is_stmt 1 view .LVU1290 +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 3874 .loc 1 1895 18 is_stmt 0 view .LVU1291 + 3875 00f0 A366 str r3, [r4, #104] +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3876 .loc 1 1896 5 is_stmt 1 view .LVU1292 +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3877 .loc 1 1896 18 is_stmt 0 view .LVU1293 + 3878 00f2 E366 str r3, [r4, #108] +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3879 .loc 1 1899 5 is_stmt 1 view .LVU1294 +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3880 .loc 1 1899 22 is_stmt 0 view .LVU1295 + 3881 00f4 C4F88430 str r3, [r4, #132] +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3882 .loc 1 1902 5 is_stmt 1 view .LVU1296 + 3883 00f8 2268 ldr r2, [r4] + 3884 00fa 0F21 movs r1, #15 + ARM GAS /tmp/ccqiorEF.s page 175 + + + 3885 00fc 1162 str r1, [r2, #32] +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3886 .loc 1 1906 5 view .LVU1297 + 3887 00fe 2168 ldr r1, [r4] + 3888 0100 8A69 ldr r2, [r1, #24] + 3889 0102 42F00802 orr r2, r2, #8 + 3890 0106 8A61 str r2, [r1, #24] +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 3891 .loc 1 1909 5 view .LVU1298 +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 3892 .loc 1 1909 20 is_stmt 0 view .LVU1299 + 3893 0108 2022 movs r2, #32 + 3894 010a E267 str r2, [r4, #124] +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 3895 .loc 1 1910 5 is_stmt 1 view .LVU1300 +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 3896 .loc 1 1910 20 is_stmt 0 view .LVU1301 + 3897 010c C4F88020 str r2, [r4, #128] +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3898 .loc 1 1911 5 is_stmt 1 view .LVU1302 +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3899 .loc 1 1911 26 is_stmt 0 view .LVU1303 + 3900 0110 2366 str r3, [r4, #96] +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 3901 .loc 1 1919 5 is_stmt 1 view .LVU1304 + 3902 0112 2046 mov r0, r4 + 3903 0114 FFF7FEFF bl HAL_UART_AbortCpltCallback + 3904 .LVL346: + 3905 0118 03E0 b .L150 + 3906 .LVL347: + 3907 .L153: +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3908 .loc 1 1795 12 is_stmt 0 view .LVU1305 + 3909 011a 0125 movs r5, #1 + 3910 011c CAE7 b .L146 + 3911 .LVL348: + 3912 .L148: +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3913 .loc 1 1888 3 is_stmt 1 view .LVU1306 +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3914 .loc 1 1888 6 is_stmt 0 view .LVU1307 + 3915 011e 012D cmp r5, #1 + 3916 0120 E1D0 beq .L151 + 3917 .LVL349: + 3918 .L150: +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 3919 .loc 1 1923 3 is_stmt 1 view .LVU1308 +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3920 .loc 1 1924 1 is_stmt 0 view .LVU1309 + 3921 0122 0020 movs r0, #0 + 3922 0124 38BD pop {r3, r4, r5, pc} + 3923 .LVL350: + 3924 .L156: +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3925 .loc 1 1924 1 view .LVU1310 + 3926 0126 00BF .align 2 + 3927 .L155: + ARM GAS /tmp/ccqiorEF.s page 176 + + + 3928 0128 00000000 .word UART_DMATxAbortCallback + 3929 012c 00000000 .word UART_DMARxAbortCallback + 3930 .cfi_endproc + 3931 .LFE149: + 3933 .section .text.UART_DMARxAbortCallback,"ax",%progbits + 3934 .align 1 + 3935 .syntax unified + 3936 .thumb + 3937 .thumb_func + 3939 UART_DMARxAbortCallback: + 3940 .LVL351: + 3941 .LFB188: +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3942 .loc 1 3633 1 is_stmt 1 view -0 + 3943 .cfi_startproc + 3944 @ args = 0, pretend = 0, frame = 0 + 3945 @ frame_needed = 0, uses_anonymous_args = 0 +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 3946 .loc 1 3633 1 is_stmt 0 view .LVU1312 + 3947 0000 08B5 push {r3, lr} + 3948 .cfi_def_cfa_offset 8 + 3949 .cfi_offset 3, -8 + 3950 .cfi_offset 14, -4 +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3951 .loc 1 3634 3 is_stmt 1 view .LVU1313 +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3952 .loc 1 3634 23 is_stmt 0 view .LVU1314 + 3953 0002 406A ldr r0, [r0, #36] + 3954 .LVL352: +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3955 .loc 1 3636 3 is_stmt 1 view .LVU1315 +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3956 .loc 1 3636 8 is_stmt 0 view .LVU1316 + 3957 0004 436F ldr r3, [r0, #116] +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3958 .loc 1 3636 36 view .LVU1317 + 3959 0006 0022 movs r2, #0 + 3960 0008 5A63 str r2, [r3, #52] +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3961 .loc 1 3639 3 is_stmt 1 view .LVU1318 +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3962 .loc 1 3639 12 is_stmt 0 view .LVU1319 + 3963 000a 036F ldr r3, [r0, #112] +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3964 .loc 1 3639 6 view .LVU1320 + 3965 000c 0BB1 cbz r3, .L158 +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3966 .loc 1 3641 5 is_stmt 1 view .LVU1321 +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3967 .loc 1 3641 22 is_stmt 0 view .LVU1322 + 3968 000e 5B6B ldr r3, [r3, #52] +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 3969 .loc 1 3641 8 view .LVU1323 + 3970 0010 ABB9 cbnz r3, .L157 + 3971 .L158: +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 3972 .loc 1 3648 3 is_stmt 1 view .LVU1324 + ARM GAS /tmp/ccqiorEF.s page 177 + + +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 3973 .loc 1 3648 22 is_stmt 0 view .LVU1325 + 3974 0012 0023 movs r3, #0 + 3975 0014 A0F85230 strh r3, [r0, #82] @ movhi +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3976 .loc 1 3649 3 is_stmt 1 view .LVU1326 +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3977 .loc 1 3649 22 is_stmt 0 view .LVU1327 + 3978 0018 A0F85A30 strh r3, [r0, #90] @ movhi +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3979 .loc 1 3652 3 is_stmt 1 view .LVU1328 +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3980 .loc 1 3652 20 is_stmt 0 view .LVU1329 + 3981 001c C0F88430 str r3, [r0, #132] +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3982 .loc 1 3655 3 is_stmt 1 view .LVU1330 + 3983 0020 0268 ldr r2, [r0] + 3984 0022 0F21 movs r1, #15 + 3985 0024 1162 str r1, [r2, #32] +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3986 .loc 1 3658 3 view .LVU1331 + 3987 0026 0168 ldr r1, [r0] + 3988 0028 8A69 ldr r2, [r1, #24] + 3989 002a 42F00802 orr r2, r2, #8 + 3990 002e 8A61 str r2, [r1, #24] +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 3991 .loc 1 3661 3 view .LVU1332 +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 3992 .loc 1 3661 18 is_stmt 0 view .LVU1333 + 3993 0030 2022 movs r2, #32 + 3994 0032 C267 str r2, [r0, #124] +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 3995 .loc 1 3662 3 is_stmt 1 view .LVU1334 +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 3996 .loc 1 3662 18 is_stmt 0 view .LVU1335 + 3997 0034 C0F88020 str r2, [r0, #128] +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3998 .loc 1 3663 3 is_stmt 1 view .LVU1336 +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 3999 .loc 1 3663 24 is_stmt 0 view .LVU1337 + 4000 0038 0366 str r3, [r0, #96] +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4001 .loc 1 3671 3 is_stmt 1 view .LVU1338 + 4002 003a FFF7FEFF bl HAL_UART_AbortCpltCallback + 4003 .LVL353: + 4004 .L157: +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4005 .loc 1 3673 1 is_stmt 0 view .LVU1339 + 4006 003e 08BD pop {r3, pc} + 4007 .cfi_endproc + 4008 .LFE188: + 4010 .section .text.UART_DMATxAbortCallback,"ax",%progbits + 4011 .align 1 + 4012 .syntax unified + 4013 .thumb + 4014 .thumb_func + 4016 UART_DMATxAbortCallback: + ARM GAS /tmp/ccqiorEF.s page 178 + + + 4017 .LVL354: + 4018 .LFB187: +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 4019 .loc 1 3583 1 is_stmt 1 view -0 + 4020 .cfi_startproc + 4021 @ args = 0, pretend = 0, frame = 0 + 4022 @ frame_needed = 0, uses_anonymous_args = 0 +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 4023 .loc 1 3583 1 is_stmt 0 view .LVU1341 + 4024 0000 08B5 push {r3, lr} + 4025 .cfi_def_cfa_offset 8 + 4026 .cfi_offset 3, -8 + 4027 .cfi_offset 14, -4 +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4028 .loc 1 3584 3 is_stmt 1 view .LVU1342 +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4029 .loc 1 3584 23 is_stmt 0 view .LVU1343 + 4030 0002 406A ldr r0, [r0, #36] + 4031 .LVL355: +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4032 .loc 1 3586 3 is_stmt 1 view .LVU1344 +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4033 .loc 1 3586 8 is_stmt 0 view .LVU1345 + 4034 0004 036F ldr r3, [r0, #112] +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4035 .loc 1 3586 36 view .LVU1346 + 4036 0006 0022 movs r2, #0 + 4037 0008 5A63 str r2, [r3, #52] +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4038 .loc 1 3589 3 is_stmt 1 view .LVU1347 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4039 .loc 1 3589 12 is_stmt 0 view .LVU1348 + 4040 000a 436F ldr r3, [r0, #116] +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4041 .loc 1 3589 6 view .LVU1349 + 4042 000c 0BB1 cbz r3, .L162 +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4043 .loc 1 3591 5 is_stmt 1 view .LVU1350 +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4044 .loc 1 3591 22 is_stmt 0 view .LVU1351 + 4045 000e 5B6B ldr r3, [r3, #52] +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4046 .loc 1 3591 8 view .LVU1352 + 4047 0010 83B9 cbnz r3, .L161 + 4048 .L162: +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 4049 .loc 1 3598 3 is_stmt 1 view .LVU1353 +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = 0U; + 4050 .loc 1 3598 22 is_stmt 0 view .LVU1354 + 4051 0012 0023 movs r3, #0 + 4052 0014 A0F85230 strh r3, [r0, #82] @ movhi +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4053 .loc 1 3599 3 is_stmt 1 view .LVU1355 +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4054 .loc 1 3599 22 is_stmt 0 view .LVU1356 + 4055 0018 A0F85A30 strh r3, [r0, #90] @ movhi +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 179 + + + 4056 .loc 1 3602 3 is_stmt 1 view .LVU1357 +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4057 .loc 1 3602 20 is_stmt 0 view .LVU1358 + 4058 001c C0F88430 str r3, [r0, #132] +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4059 .loc 1 3605 3 is_stmt 1 view .LVU1359 + 4060 0020 0268 ldr r2, [r0] + 4061 0022 0F21 movs r1, #15 + 4062 0024 1162 str r1, [r2, #32] +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 4063 .loc 1 3609 3 view .LVU1360 +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 4064 .loc 1 3609 18 is_stmt 0 view .LVU1361 + 4065 0026 2022 movs r2, #32 + 4066 0028 C267 str r2, [r0, #124] +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4067 .loc 1 3610 3 is_stmt 1 view .LVU1362 +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4068 .loc 1 3610 18 is_stmt 0 view .LVU1363 + 4069 002a C0F88020 str r2, [r0, #128] +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4070 .loc 1 3611 3 is_stmt 1 view .LVU1364 +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4071 .loc 1 3611 24 is_stmt 0 view .LVU1365 + 4072 002e 0366 str r3, [r0, #96] +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4073 .loc 1 3619 3 is_stmt 1 view .LVU1366 + 4074 0030 FFF7FEFF bl HAL_UART_AbortCpltCallback + 4075 .LVL356: + 4076 .L161: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4077 .loc 1 3621 1 is_stmt 0 view .LVU1367 + 4078 0034 08BD pop {r3, pc} + 4079 .cfi_endproc + 4080 .LFE187: + 4082 .section .text.HAL_UART_AbortTransmitCpltCallback,"ax",%progbits + 4083 .align 1 + 4084 .weak HAL_UART_AbortTransmitCpltCallback + 4085 .syntax unified + 4086 .thumb + 4087 .thumb_func + 4089 HAL_UART_AbortTransmitCpltCallback: + 4090 .LVL357: + 4091 .LFB159: +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 4092 .loc 1 2511 1 is_stmt 1 view -0 + 4093 .cfi_startproc + 4094 @ args = 0, pretend = 0, frame = 0 + 4095 @ frame_needed = 0, uses_anonymous_args = 0 + 4096 @ link register save eliminated. +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4097 .loc 1 2513 3 view .LVU1369 +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4098 .loc 1 2518 1 is_stmt 0 view .LVU1370 + 4099 0000 7047 bx lr + 4100 .cfi_endproc + 4101 .LFE159: + ARM GAS /tmp/ccqiorEF.s page 180 + + + 4103 .section .text.HAL_UART_AbortTransmit_IT,"ax",%progbits + 4104 .align 1 + 4105 .global HAL_UART_AbortTransmit_IT + 4106 .syntax unified + 4107 .thumb + 4108 .thumb_func + 4110 HAL_UART_AbortTransmit_IT: + 4111 .LVL358: + 4112 .LFB150: +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable interrupts */ + 4113 .loc 1 1941 1 is_stmt 1 view -0 + 4114 .cfi_startproc + 4115 @ args = 0, pretend = 0, frame = 0 + 4116 @ frame_needed = 0, uses_anonymous_args = 0 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable interrupts */ + 4117 .loc 1 1941 1 is_stmt 0 view .LVU1372 + 4118 0000 10B5 push {r4, lr} + 4119 .cfi_def_cfa_offset 8 + 4120 .cfi_offset 4, -8 + 4121 .cfi_offset 14, -4 + 4122 0002 0446 mov r4, r0 + 4123 .L167: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4124 .loc 1 1943 3 is_stmt 1 discriminator 1 view .LVU1373 + 4125 .LBB610: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4126 .loc 1 1943 3 discriminator 1 view .LVU1374 +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4127 .loc 1 1943 3 discriminator 1 view .LVU1375 +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4128 .loc 1 1943 3 discriminator 1 view .LVU1376 + 4129 0004 2268 ldr r2, [r4] + 4130 .LVL359: + 4131 .LBB611: + 4132 .LBI611: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4133 .loc 2 1068 31 view .LVU1377 + 4134 .LBB612: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4135 .loc 2 1070 5 view .LVU1378 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4136 .loc 2 1072 4 view .LVU1379 + 4137 .syntax unified + 4138 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4139 0006 52E8003F ldrex r3, [r2] + 4140 @ 0 "" 2 + 4141 .LVL360: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4142 .loc 2 1073 4 view .LVU1380 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4143 .loc 2 1073 4 is_stmt 0 view .LVU1381 + 4144 .thumb + 4145 .syntax unified + 4146 .LBE612: + 4147 .LBE611: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4148 .loc 1 1943 3 discriminator 1 view .LVU1382 + ARM GAS /tmp/ccqiorEF.s page 181 + + + 4149 000a 23F0C003 bic r3, r3, #192 + 4150 .LVL361: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4151 .loc 1 1943 3 is_stmt 1 discriminator 1 view .LVU1383 + 4152 .LBB613: + 4153 .LBI613: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4154 .loc 2 1119 31 view .LVU1384 + 4155 .LBB614: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4156 .loc 2 1121 4 view .LVU1385 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4157 .loc 2 1123 4 view .LVU1386 + 4158 .syntax unified + 4159 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4160 000e 42E80031 strex r1, r3, [r2] + 4161 @ 0 "" 2 + 4162 .LVL362: + 4163 .loc 2 1124 4 view .LVU1387 + 4164 .loc 2 1124 4 is_stmt 0 view .LVU1388 + 4165 .thumb + 4166 .syntax unified + 4167 .LBE614: + 4168 .LBE613: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4169 .loc 1 1943 3 discriminator 1 view .LVU1389 + 4170 0012 0029 cmp r1, #0 + 4171 0014 F6D1 bne .L167 + 4172 .LBE610: +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4173 .loc 1 1943 3 is_stmt 1 discriminator 2 view .LVU1390 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4174 .loc 1 1946 3 view .LVU1391 +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4175 .loc 1 1946 7 is_stmt 0 view .LVU1392 + 4176 0016 2368 ldr r3, [r4] + 4177 .LVL363: +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4178 .loc 1 1946 7 view .LVU1393 + 4179 0018 9B68 ldr r3, [r3, #8] +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4180 .loc 1 1946 6 view .LVU1394 + 4181 001a 13F0800F tst r3, #128 + 4182 001e 21D0 beq .L168 + 4183 .L169: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4184 .loc 1 1949 5 is_stmt 1 discriminator 1 view .LVU1395 + 4185 .LBB615: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4186 .loc 1 1949 5 discriminator 1 view .LVU1396 +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4187 .loc 1 1949 5 discriminator 1 view .LVU1397 +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4188 .loc 1 1949 5 discriminator 1 view .LVU1398 + 4189 0020 2268 ldr r2, [r4] + 4190 .LVL364: + 4191 .LBB616: + ARM GAS /tmp/ccqiorEF.s page 182 + + + 4192 .LBI616: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4193 .loc 2 1068 31 view .LVU1399 + 4194 .LBB617: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4195 .loc 2 1070 5 view .LVU1400 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4196 .loc 2 1072 4 view .LVU1401 + 4197 0022 02F10803 add r3, r2, #8 + 4198 .LVL365: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4199 .loc 2 1072 4 is_stmt 0 view .LVU1402 + 4200 .syntax unified + 4201 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4202 0026 53E8003F ldrex r3, [r3] + 4203 @ 0 "" 2 + 4204 .LVL366: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4205 .loc 2 1073 4 is_stmt 1 view .LVU1403 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4206 .loc 2 1073 4 is_stmt 0 view .LVU1404 + 4207 .thumb + 4208 .syntax unified + 4209 .LBE617: + 4210 .LBE616: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4211 .loc 1 1949 5 discriminator 1 view .LVU1405 + 4212 002a 23F08003 bic r3, r3, #128 + 4213 .LVL367: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4214 .loc 1 1949 5 is_stmt 1 discriminator 1 view .LVU1406 + 4215 .LBB618: + 4216 .LBI618: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4217 .loc 2 1119 31 view .LVU1407 + 4218 .LBB619: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4219 .loc 2 1121 4 view .LVU1408 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4220 .loc 2 1123 4 view .LVU1409 + 4221 002e 0832 adds r2, r2, #8 + 4222 .LVL368: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4223 .loc 2 1123 4 is_stmt 0 view .LVU1410 + 4224 .syntax unified + 4225 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4226 0030 42E80031 strex r1, r3, [r2] + 4227 @ 0 "" 2 + 4228 .LVL369: + 4229 .loc 2 1124 4 is_stmt 1 view .LVU1411 + 4230 .loc 2 1124 4 is_stmt 0 view .LVU1412 + 4231 .thumb + 4232 .syntax unified + 4233 .LBE619: + 4234 .LBE618: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4235 .loc 1 1949 5 discriminator 1 view .LVU1413 + ARM GAS /tmp/ccqiorEF.s page 183 + + + 4236 0034 0029 cmp r1, #0 + 4237 0036 F3D1 bne .L169 + 4238 .LBE615: +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4239 .loc 1 1949 5 is_stmt 1 discriminator 2 view .LVU1414 +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4240 .loc 1 1952 5 view .LVU1415 +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4241 .loc 1 1952 14 is_stmt 0 view .LVU1416 + 4242 0038 236F ldr r3, [r4, #112] + 4243 .LVL370: +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4244 .loc 1 1952 8 view .LVU1417 + 4245 003a 4BB1 cbz r3, .L170 +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4246 .loc 1 1956 7 is_stmt 1 view .LVU1418 +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4247 .loc 1 1956 40 is_stmt 0 view .LVU1419 + 4248 003c 0F4A ldr r2, .L173 + 4249 003e 5A63 str r2, [r3, #52] +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4250 .loc 1 1959 7 is_stmt 1 view .LVU1420 +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4251 .loc 1 1959 11 is_stmt 0 view .LVU1421 + 4252 0040 206F ldr r0, [r4, #112] + 4253 .LVL371: +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4254 .loc 1 1959 11 view .LVU1422 + 4255 0042 FFF7FEFF bl HAL_DMA_Abort_IT + 4256 .LVL372: +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4257 .loc 1 1959 10 discriminator 1 view .LVU1423 + 4258 0046 B0B1 cbz r0, .L171 +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4259 .loc 1 1962 9 is_stmt 1 view .LVU1424 +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4260 .loc 1 1962 14 is_stmt 0 view .LVU1425 + 4261 0048 206F ldr r0, [r4, #112] +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4262 .loc 1 1962 22 view .LVU1426 + 4263 004a 436B ldr r3, [r0, #52] +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4264 .loc 1 1962 9 view .LVU1427 + 4265 004c 9847 blx r3 + 4266 .LVL373: + 4267 004e 12E0 b .L171 + 4268 .LVL374: + 4269 .L170: +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4270 .loc 1 1968 7 is_stmt 1 view .LVU1428 +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4271 .loc 1 1968 26 is_stmt 0 view .LVU1429 + 4272 0050 0023 movs r3, #0 + 4273 0052 A4F85230 strh r3, [r4, #82] @ movhi +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4274 .loc 1 1971 7 is_stmt 1 view .LVU1430 +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 184 + + + 4275 .loc 1 1971 20 is_stmt 0 view .LVU1431 + 4276 0056 E366 str r3, [r4, #108] +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4277 .loc 1 1974 7 is_stmt 1 view .LVU1432 +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4278 .loc 1 1974 21 is_stmt 0 view .LVU1433 + 4279 0058 2023 movs r3, #32 + 4280 005a E367 str r3, [r4, #124] +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4281 .loc 1 1982 7 is_stmt 1 view .LVU1434 + 4282 005c 2046 mov r0, r4 + 4283 .LVL375: +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4284 .loc 1 1982 7 is_stmt 0 view .LVU1435 + 4285 005e FFF7FEFF bl HAL_UART_AbortTransmitCpltCallback + 4286 .LVL376: + 4287 0062 08E0 b .L171 + 4288 .LVL377: + 4289 .L168: +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4290 .loc 1 1989 5 is_stmt 1 view .LVU1436 +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4291 .loc 1 1989 24 is_stmt 0 view .LVU1437 + 4292 0064 0023 movs r3, #0 + 4293 0066 A4F85230 strh r3, [r4, #82] @ movhi +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4294 .loc 1 1992 5 is_stmt 1 view .LVU1438 +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4295 .loc 1 1992 18 is_stmt 0 view .LVU1439 + 4296 006a E366 str r3, [r4, #108] +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4297 .loc 1 1996 5 is_stmt 1 view .LVU1440 +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4298 .loc 1 1996 19 is_stmt 0 view .LVU1441 + 4299 006c 2023 movs r3, #32 + 4300 006e E367 str r3, [r4, #124] +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4301 .loc 1 2004 5 is_stmt 1 view .LVU1442 + 4302 0070 2046 mov r0, r4 + 4303 .LVL378: +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4304 .loc 1 2004 5 is_stmt 0 view .LVU1443 + 4305 0072 FFF7FEFF bl HAL_UART_AbortTransmitCpltCallback + 4306 .LVL379: + 4307 .L171: +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4308 .loc 1 2008 3 is_stmt 1 view .LVU1444 +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4309 .loc 1 2009 1 is_stmt 0 view .LVU1445 + 4310 0076 0020 movs r0, #0 + 4311 0078 10BD pop {r4, pc} + 4312 .LVL380: + 4313 .L174: +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4314 .loc 1 2009 1 view .LVU1446 + 4315 007a 00BF .align 2 + 4316 .L173: + ARM GAS /tmp/ccqiorEF.s page 185 + + + 4317 007c 00000000 .word UART_DMATxOnlyAbortCallback + 4318 .cfi_endproc + 4319 .LFE150: + 4321 .section .text.UART_DMATxOnlyAbortCallback,"ax",%progbits + 4322 .align 1 + 4323 .syntax unified + 4324 .thumb + 4325 .thumb_func + 4327 UART_DMATxOnlyAbortCallback: + 4328 .LVL381: + 4329 .LFB189: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 4330 .loc 1 3685 1 is_stmt 1 view -0 + 4331 .cfi_startproc + 4332 @ args = 0, pretend = 0, frame = 0 + 4333 @ frame_needed = 0, uses_anonymous_args = 0 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 4334 .loc 1 3685 1 is_stmt 0 view .LVU1448 + 4335 0000 08B5 push {r3, lr} + 4336 .cfi_def_cfa_offset 8 + 4337 .cfi_offset 3, -8 + 4338 .cfi_offset 14, -4 +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4339 .loc 1 3686 3 is_stmt 1 view .LVU1449 +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4340 .loc 1 3686 23 is_stmt 0 view .LVU1450 + 4341 0002 406A ldr r0, [r0, #36] + 4342 .LVL382: +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4343 .loc 1 3688 3 is_stmt 1 view .LVU1451 +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4344 .loc 1 3688 22 is_stmt 0 view .LVU1452 + 4345 0004 0023 movs r3, #0 + 4346 0006 A0F85230 strh r3, [r0, #82] @ movhi +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4347 .loc 1 3692 3 is_stmt 1 view .LVU1453 +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4348 .loc 1 3692 17 is_stmt 0 view .LVU1454 + 4349 000a 2023 movs r3, #32 + 4350 000c C367 str r3, [r0, #124] +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4351 .loc 1 3700 3 is_stmt 1 view .LVU1455 + 4352 000e FFF7FEFF bl HAL_UART_AbortTransmitCpltCallback + 4353 .LVL383: +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4354 .loc 1 3702 1 is_stmt 0 view .LVU1456 + 4355 0012 08BD pop {r3, pc} + 4356 .cfi_endproc + 4357 .LFE189: + 4359 .section .text.HAL_UART_AbortReceiveCpltCallback,"ax",%progbits + 4360 .align 1 + 4361 .weak HAL_UART_AbortReceiveCpltCallback + 4362 .syntax unified + 4363 .thumb + 4364 .thumb_func + 4366 HAL_UART_AbortReceiveCpltCallback: + 4367 .LVL384: + ARM GAS /tmp/ccqiorEF.s page 186 + + + 4368 .LFB160: +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 4369 .loc 1 2526 1 is_stmt 1 view -0 + 4370 .cfi_startproc + 4371 @ args = 0, pretend = 0, frame = 0 + 4372 @ frame_needed = 0, uses_anonymous_args = 0 + 4373 @ link register save eliminated. +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4374 .loc 1 2528 3 view .LVU1458 +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4375 .loc 1 2533 1 is_stmt 0 view .LVU1459 + 4376 0000 7047 bx lr + 4377 .cfi_endproc + 4378 .LFE160: + 4380 .section .text.HAL_UART_AbortReceive_IT,"ax",%progbits + 4381 .align 1 + 4382 .global HAL_UART_AbortReceive_IT + 4383 .syntax unified + 4384 .thumb + 4385 .thumb_func + 4387 HAL_UART_AbortReceive_IT: + 4388 .LVL385: + 4389 .LFB151: +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + 4390 .loc 1 2026 1 is_stmt 1 view -0 + 4391 .cfi_startproc + 4392 @ args = 0, pretend = 0, frame = 0 + 4393 @ frame_needed = 0, uses_anonymous_args = 0 +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ + 4394 .loc 1 2026 1 is_stmt 0 view .LVU1461 + 4395 0000 10B5 push {r4, lr} + 4396 .cfi_def_cfa_offset 8 + 4397 .cfi_offset 4, -8 + 4398 .cfi_offset 14, -4 + 4399 0002 0446 mov r4, r0 + 4400 .L179: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4401 .loc 1 2028 3 is_stmt 1 discriminator 1 view .LVU1462 + 4402 .LBB620: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4403 .loc 1 2028 3 discriminator 1 view .LVU1463 +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4404 .loc 1 2028 3 discriminator 1 view .LVU1464 +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4405 .loc 1 2028 3 discriminator 1 view .LVU1465 + 4406 0004 2268 ldr r2, [r4] + 4407 .LVL386: + 4408 .LBB621: + 4409 .LBI621: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4410 .loc 2 1068 31 view .LVU1466 + 4411 .LBB622: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4412 .loc 2 1070 5 view .LVU1467 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4413 .loc 2 1072 4 view .LVU1468 + 4414 .syntax unified + ARM GAS /tmp/ccqiorEF.s page 187 + + + 4415 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4416 0006 52E8003F ldrex r3, [r2] + 4417 @ 0 "" 2 + 4418 .LVL387: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4419 .loc 2 1073 4 view .LVU1469 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4420 .loc 2 1073 4 is_stmt 0 view .LVU1470 + 4421 .thumb + 4422 .syntax unified + 4423 .LBE622: + 4424 .LBE621: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4425 .loc 1 2028 3 discriminator 1 view .LVU1471 + 4426 000a 23F49073 bic r3, r3, #288 + 4427 .LVL388: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4428 .loc 1 2028 3 is_stmt 1 discriminator 1 view .LVU1472 + 4429 .LBB623: + 4430 .LBI623: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4431 .loc 2 1119 31 view .LVU1473 + 4432 .LBB624: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4433 .loc 2 1121 4 view .LVU1474 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4434 .loc 2 1123 4 view .LVU1475 + 4435 .syntax unified + 4436 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4437 000e 42E80031 strex r1, r3, [r2] + 4438 @ 0 "" 2 + 4439 .LVL389: + 4440 .loc 2 1124 4 view .LVU1476 + 4441 .loc 2 1124 4 is_stmt 0 view .LVU1477 + 4442 .thumb + 4443 .syntax unified + 4444 .LBE624: + 4445 .LBE623: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4446 .loc 1 2028 3 discriminator 1 view .LVU1478 + 4447 0012 0029 cmp r1, #0 + 4448 0014 F6D1 bne .L179 + 4449 .LVL390: + 4450 .L180: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4451 .loc 1 2028 3 discriminator 1 view .LVU1479 + 4452 .LBE620: +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 4453 .loc 1 2028 3 is_stmt 1 discriminator 2 view .LVU1480 +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4454 .loc 1 2029 3 discriminator 1 view .LVU1481 + 4455 .LBB625: +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4456 .loc 1 2029 3 discriminator 1 view .LVU1482 +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4457 .loc 1 2029 3 discriminator 1 view .LVU1483 +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 188 + + + 4458 .loc 1 2029 3 discriminator 1 view .LVU1484 + 4459 0016 2268 ldr r2, [r4] + 4460 .LVL391: + 4461 .LBB626: + 4462 .LBI626: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4463 .loc 2 1068 31 view .LVU1485 + 4464 .LBB627: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4465 .loc 2 1070 5 view .LVU1486 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4466 .loc 2 1072 4 view .LVU1487 + 4467 0018 02F10803 add r3, r2, #8 + 4468 .LVL392: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4469 .loc 2 1072 4 is_stmt 0 view .LVU1488 + 4470 .syntax unified + 4471 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4472 001c 53E8003F ldrex r3, [r3] + 4473 @ 0 "" 2 + 4474 .LVL393: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4475 .loc 2 1073 4 is_stmt 1 view .LVU1489 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4476 .loc 2 1073 4 is_stmt 0 view .LVU1490 + 4477 .thumb + 4478 .syntax unified + 4479 .LBE627: + 4480 .LBE626: +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4481 .loc 1 2029 3 discriminator 1 view .LVU1491 + 4482 0020 23F00103 bic r3, r3, #1 + 4483 .LVL394: +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4484 .loc 1 2029 3 is_stmt 1 discriminator 1 view .LVU1492 + 4485 .LBB628: + 4486 .LBI628: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4487 .loc 2 1119 31 view .LVU1493 + 4488 .LBB629: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4489 .loc 2 1121 4 view .LVU1494 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4490 .loc 2 1123 4 view .LVU1495 + 4491 0024 0832 adds r2, r2, #8 + 4492 .LVL395: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4493 .loc 2 1123 4 is_stmt 0 view .LVU1496 + 4494 .syntax unified + 4495 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4496 0026 42E80031 strex r1, r3, [r2] + 4497 @ 0 "" 2 + 4498 .LVL396: + 4499 .loc 2 1124 4 is_stmt 1 view .LVU1497 + 4500 .loc 2 1124 4 is_stmt 0 view .LVU1498 + 4501 .thumb + 4502 .syntax unified + ARM GAS /tmp/ccqiorEF.s page 189 + + + 4503 .LBE629: + 4504 .LBE628: +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4505 .loc 1 2029 3 discriminator 1 view .LVU1499 + 4506 002a 0029 cmp r1, #0 + 4507 002c F3D1 bne .L180 + 4508 .LBE625: +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4509 .loc 1 2029 3 is_stmt 1 discriminator 2 view .LVU1500 +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4510 .loc 1 2032 3 view .LVU1501 +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4511 .loc 1 2032 12 is_stmt 0 view .LVU1502 + 4512 002e 236E ldr r3, [r4, #96] + 4513 .LVL397: +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4514 .loc 1 2032 6 view .LVU1503 + 4515 0030 012B cmp r3, #1 + 4516 0032 1CD0 beq .L182 + 4517 .L181: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4518 .loc 1 2034 5 is_stmt 1 discriminator 2 view .LVU1504 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4519 .loc 1 2038 3 view .LVU1505 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4520 .loc 1 2038 7 is_stmt 0 view .LVU1506 + 4521 0034 2368 ldr r3, [r4] + 4522 0036 9A68 ldr r2, [r3, #8] +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4523 .loc 1 2038 6 view .LVU1507 + 4524 0038 12F0400F tst r2, #64 + 4525 003c 35D0 beq .L183 + 4526 .L184: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4527 .loc 1 2041 5 is_stmt 1 discriminator 1 view .LVU1508 + 4528 .LBB630: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4529 .loc 1 2041 5 discriminator 1 view .LVU1509 +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4530 .loc 1 2041 5 discriminator 1 view .LVU1510 +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4531 .loc 1 2041 5 discriminator 1 view .LVU1511 + 4532 003e 2268 ldr r2, [r4] + 4533 .LVL398: + 4534 .LBB631: + 4535 .LBI631: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4536 .loc 2 1068 31 view .LVU1512 + 4537 .LBB632: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4538 .loc 2 1070 5 view .LVU1513 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4539 .loc 2 1072 4 view .LVU1514 + 4540 0040 02F10803 add r3, r2, #8 + 4541 .LVL399: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4542 .loc 2 1072 4 is_stmt 0 view .LVU1515 + ARM GAS /tmp/ccqiorEF.s page 190 + + + 4543 .syntax unified + 4544 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4545 0044 53E8003F ldrex r3, [r3] + 4546 @ 0 "" 2 + 4547 .LVL400: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4548 .loc 2 1073 4 is_stmt 1 view .LVU1516 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4549 .loc 2 1073 4 is_stmt 0 view .LVU1517 + 4550 .thumb + 4551 .syntax unified + 4552 .LBE632: + 4553 .LBE631: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4554 .loc 1 2041 5 discriminator 1 view .LVU1518 + 4555 0048 23F04003 bic r3, r3, #64 + 4556 .LVL401: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4557 .loc 1 2041 5 is_stmt 1 discriminator 1 view .LVU1519 + 4558 .LBB633: + 4559 .LBI633: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4560 .loc 2 1119 31 view .LVU1520 + 4561 .LBB634: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4562 .loc 2 1121 4 view .LVU1521 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4563 .loc 2 1123 4 view .LVU1522 + 4564 004c 0832 adds r2, r2, #8 + 4565 .LVL402: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4566 .loc 2 1123 4 is_stmt 0 view .LVU1523 + 4567 .syntax unified + 4568 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4569 004e 42E80031 strex r1, r3, [r2] + 4570 @ 0 "" 2 + 4571 .LVL403: + 4572 .loc 2 1124 4 is_stmt 1 view .LVU1524 + 4573 .loc 2 1124 4 is_stmt 0 view .LVU1525 + 4574 .thumb + 4575 .syntax unified + 4576 .LBE634: + 4577 .LBE633: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4578 .loc 1 2041 5 discriminator 1 view .LVU1526 + 4579 0052 0029 cmp r1, #0 + 4580 0054 F3D1 bne .L184 + 4581 .LBE630: +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4582 .loc 1 2041 5 is_stmt 1 discriminator 2 view .LVU1527 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4583 .loc 1 2044 5 view .LVU1528 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4584 .loc 1 2044 14 is_stmt 0 view .LVU1529 + 4585 0056 636F ldr r3, [r4, #116] + 4586 .LVL404: +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 191 + + + 4587 .loc 1 2044 8 view .LVU1530 + 4588 0058 9BB1 cbz r3, .L185 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4589 .loc 1 2048 7 is_stmt 1 view .LVU1531 +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4590 .loc 1 2048 40 is_stmt 0 view .LVU1532 + 4591 005a 1B4A ldr r2, .L188 + 4592 005c 5A63 str r2, [r3, #52] +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4593 .loc 1 2051 7 is_stmt 1 view .LVU1533 +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4594 .loc 1 2051 11 is_stmt 0 view .LVU1534 + 4595 005e 606F ldr r0, [r4, #116] + 4596 .LVL405: +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4597 .loc 1 2051 11 view .LVU1535 + 4598 0060 FFF7FEFF bl HAL_DMA_Abort_IT + 4599 .LVL406: +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4600 .loc 1 2051 10 discriminator 1 view .LVU1536 + 4601 0064 70B3 cbz r0, .L186 +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4602 .loc 1 2054 9 is_stmt 1 view .LVU1537 +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4603 .loc 1 2054 14 is_stmt 0 view .LVU1538 + 4604 0066 606F ldr r0, [r4, #116] +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4605 .loc 1 2054 22 view .LVU1539 + 4606 0068 436B ldr r3, [r0, #52] +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4607 .loc 1 2054 9 view .LVU1540 + 4608 006a 9847 blx r3 + 4609 .LVL407: + 4610 006c 2AE0 b .L186 + 4611 .LVL408: + 4612 .L182: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4613 .loc 1 2034 5 is_stmt 1 discriminator 1 view .LVU1541 + 4614 .LBB635: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4615 .loc 1 2034 5 discriminator 1 view .LVU1542 +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4616 .loc 1 2034 5 discriminator 1 view .LVU1543 +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4617 .loc 1 2034 5 discriminator 1 view .LVU1544 + 4618 006e 2268 ldr r2, [r4] + 4619 .LVL409: + 4620 .LBB636: + 4621 .LBI636: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4622 .loc 2 1068 31 view .LVU1545 + 4623 .LBB637: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4624 .loc 2 1070 5 view .LVU1546 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4625 .loc 2 1072 4 view .LVU1547 + 4626 .syntax unified + ARM GAS /tmp/ccqiorEF.s page 192 + + + 4627 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4628 0070 52E8003F ldrex r3, [r2] + 4629 @ 0 "" 2 + 4630 .LVL410: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4631 .loc 2 1073 4 view .LVU1548 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 4632 .loc 2 1073 4 is_stmt 0 view .LVU1549 + 4633 .thumb + 4634 .syntax unified + 4635 .LBE637: + 4636 .LBE636: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4637 .loc 1 2034 5 discriminator 1 view .LVU1550 + 4638 0074 23F01003 bic r3, r3, #16 + 4639 .LVL411: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4640 .loc 1 2034 5 is_stmt 1 discriminator 1 view .LVU1551 + 4641 .LBB638: + 4642 .LBI638: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 4643 .loc 2 1119 31 view .LVU1552 + 4644 .LBB639: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 4645 .loc 2 1121 4 view .LVU1553 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 4646 .loc 2 1123 4 view .LVU1554 + 4647 .syntax unified + 4648 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4649 0078 42E80031 strex r1, r3, [r2] + 4650 @ 0 "" 2 + 4651 .LVL412: + 4652 .loc 2 1124 4 view .LVU1555 + 4653 .loc 2 1124 4 is_stmt 0 view .LVU1556 + 4654 .thumb + 4655 .syntax unified + 4656 .LBE639: + 4657 .LBE638: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4658 .loc 1 2034 5 discriminator 1 view .LVU1557 + 4659 007c 0029 cmp r1, #0 + 4660 007e F6D1 bne .L182 + 4661 0080 D8E7 b .L181 + 4662 .LVL413: + 4663 .L185: +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4664 .loc 1 2034 5 discriminator 1 view .LVU1558 + 4665 .LBE635: +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4666 .loc 1 2060 7 is_stmt 1 view .LVU1559 +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4667 .loc 1 2060 26 is_stmt 0 view .LVU1560 + 4668 0082 0023 movs r3, #0 + 4669 0084 A4F85A30 strh r3, [r4, #90] @ movhi +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4670 .loc 1 2063 7 is_stmt 1 view .LVU1561 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 193 + + + 4671 .loc 1 2063 25 is_stmt 0 view .LVU1562 + 4672 0088 6365 str r3, [r4, #84] +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4673 .loc 1 2066 7 is_stmt 1 view .LVU1563 + 4674 008a 2268 ldr r2, [r4] + 4675 008c 0F21 movs r1, #15 + 4676 008e 1162 str r1, [r2, #32] +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4677 .loc 1 2069 7 view .LVU1564 + 4678 0090 2168 ldr r1, [r4] + 4679 0092 8A69 ldr r2, [r1, #24] + 4680 0094 42F00802 orr r2, r2, #8 + 4681 0098 8A61 str r2, [r1, #24] +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4682 .loc 1 2072 7 view .LVU1565 +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4683 .loc 1 2072 22 is_stmt 0 view .LVU1566 + 4684 009a 2022 movs r2, #32 + 4685 009c C4F88020 str r2, [r4, #128] +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4686 .loc 1 2073 7 is_stmt 1 view .LVU1567 +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4687 .loc 1 2073 28 is_stmt 0 view .LVU1568 + 4688 00a0 2366 str r3, [r4, #96] +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4689 .loc 1 2081 7 is_stmt 1 view .LVU1569 + 4690 00a2 2046 mov r0, r4 + 4691 .LVL414: +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4692 .loc 1 2081 7 is_stmt 0 view .LVU1570 + 4693 00a4 FFF7FEFF bl HAL_UART_AbortReceiveCpltCallback + 4694 .LVL415: + 4695 00a8 0CE0 b .L186 + 4696 .LVL416: + 4697 .L183: +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4698 .loc 1 2088 5 is_stmt 1 view .LVU1571 +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4699 .loc 1 2088 24 is_stmt 0 view .LVU1572 + 4700 00aa 0022 movs r2, #0 + 4701 00ac A4F85A20 strh r2, [r4, #90] @ movhi +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4702 .loc 1 2091 5 is_stmt 1 view .LVU1573 +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4703 .loc 1 2091 23 is_stmt 0 view .LVU1574 + 4704 00b0 6265 str r2, [r4, #84] +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4705 .loc 1 2094 5 is_stmt 1 view .LVU1575 + 4706 00b2 0F21 movs r1, #15 + 4707 00b4 1962 str r1, [r3, #32] +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4708 .loc 1 2097 5 view .LVU1576 +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4709 .loc 1 2097 20 is_stmt 0 view .LVU1577 + 4710 00b6 2023 movs r3, #32 + 4711 00b8 C4F88030 str r3, [r4, #128] +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 194 + + + 4712 .loc 1 2098 5 is_stmt 1 view .LVU1578 +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4713 .loc 1 2098 26 is_stmt 0 view .LVU1579 + 4714 00bc 2266 str r2, [r4, #96] +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4715 .loc 1 2106 5 is_stmt 1 view .LVU1580 + 4716 00be 2046 mov r0, r4 + 4717 .LVL417: +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4718 .loc 1 2106 5 is_stmt 0 view .LVU1581 + 4719 00c0 FFF7FEFF bl HAL_UART_AbortReceiveCpltCallback + 4720 .LVL418: + 4721 .L186: +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4722 .loc 1 2110 3 is_stmt 1 view .LVU1582 +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4723 .loc 1 2111 1 is_stmt 0 view .LVU1583 + 4724 00c4 0020 movs r0, #0 + 4725 00c6 10BD pop {r4, pc} + 4726 .LVL419: + 4727 .L189: +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4728 .loc 1 2111 1 view .LVU1584 + 4729 .align 2 + 4730 .L188: + 4731 00c8 00000000 .word UART_DMARxOnlyAbortCallback + 4732 .cfi_endproc + 4733 .LFE151: + 4735 .section .text.UART_DMARxOnlyAbortCallback,"ax",%progbits + 4736 .align 1 + 4737 .syntax unified + 4738 .thumb + 4739 .thumb_func + 4741 UART_DMARxOnlyAbortCallback: + 4742 .LVL420: + 4743 .LFB190: +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4744 .loc 1 3713 1 is_stmt 1 view -0 + 4745 .cfi_startproc + 4746 @ args = 0, pretend = 0, frame = 0 + 4747 @ frame_needed = 0, uses_anonymous_args = 0 +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4748 .loc 1 3713 1 is_stmt 0 view .LVU1586 + 4749 0000 08B5 push {r3, lr} + 4750 .cfi_def_cfa_offset 8 + 4751 .cfi_offset 3, -8 + 4752 .cfi_offset 14, -4 +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4753 .loc 1 3714 3 is_stmt 1 view .LVU1587 +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4754 .loc 1 3714 23 is_stmt 0 view .LVU1588 + 4755 0002 406A ldr r0, [r0, #36] + 4756 .LVL421: +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4757 .loc 1 3716 3 is_stmt 1 view .LVU1589 +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4758 .loc 1 3716 22 is_stmt 0 view .LVU1590 + ARM GAS /tmp/ccqiorEF.s page 195 + + + 4759 0004 0022 movs r2, #0 + 4760 0006 A0F85A20 strh r2, [r0, #90] @ movhi +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4761 .loc 1 3719 3 is_stmt 1 view .LVU1591 + 4762 000a 0368 ldr r3, [r0] + 4763 000c 0F21 movs r1, #15 + 4764 000e 1962 str r1, [r3, #32] +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4765 .loc 1 3722 3 view .LVU1592 + 4766 0010 0168 ldr r1, [r0] + 4767 0012 8B69 ldr r3, [r1, #24] + 4768 0014 43F00803 orr r3, r3, #8 + 4769 0018 8B61 str r3, [r1, #24] +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4770 .loc 1 3725 3 view .LVU1593 +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 4771 .loc 1 3725 18 is_stmt 0 view .LVU1594 + 4772 001a 2023 movs r3, #32 + 4773 001c C0F88030 str r3, [r0, #128] +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4774 .loc 1 3726 3 is_stmt 1 view .LVU1595 +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4775 .loc 1 3726 24 is_stmt 0 view .LVU1596 + 4776 0020 0266 str r2, [r0, #96] +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 4777 .loc 1 3734 3 is_stmt 1 view .LVU1597 + 4778 0022 FFF7FEFF bl HAL_UART_AbortReceiveCpltCallback + 4779 .LVL422: +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4780 .loc 1 3736 1 is_stmt 0 view .LVU1598 + 4781 0026 08BD pop {r3, pc} + 4782 .cfi_endproc + 4783 .LFE190: + 4785 .section .text.HAL_UARTEx_RxEventCallback,"ax",%progbits + 4786 .align 1 + 4787 .weak HAL_UARTEx_RxEventCallback + 4788 .syntax unified + 4789 .thumb + 4790 .thumb_func + 4792 HAL_UARTEx_RxEventCallback: + 4793 .LVL423: + 4794 .LFB161: +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ + 4795 .loc 1 2543 1 is_stmt 1 view -0 + 4796 .cfi_startproc + 4797 @ args = 0, pretend = 0, frame = 0 + 4798 @ frame_needed = 0, uses_anonymous_args = 0 + 4799 @ link register save eliminated. +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UNUSED(Size); + 4800 .loc 1 2545 3 view .LVU1600 +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4801 .loc 1 2546 3 view .LVU1601 +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4802 .loc 1 2551 1 is_stmt 0 view .LVU1602 + 4803 0000 7047 bx lr + 4804 .cfi_endproc + 4805 .LFE161: + ARM GAS /tmp/ccqiorEF.s page 196 + + + 4807 .section .text.HAL_UART_IRQHandler,"ax",%progbits + 4808 .align 1 + 4809 .global HAL_UART_IRQHandler + 4810 .syntax unified + 4811 .thumb + 4812 .thumb_func + 4814 HAL_UART_IRQHandler: + 4815 .LVL424: + 4816 .LFB152: +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t isrflags = READ_REG(huart->Instance->ISR); + 4817 .loc 1 2119 1 is_stmt 1 view -0 + 4818 .cfi_startproc + 4819 @ args = 0, pretend = 0, frame = 0 + 4820 @ frame_needed = 0, uses_anonymous_args = 0 +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t isrflags = READ_REG(huart->Instance->ISR); + 4821 .loc 1 2119 1 is_stmt 0 view .LVU1604 + 4822 0000 70B5 push {r4, r5, r6, lr} + 4823 .cfi_def_cfa_offset 16 + 4824 .cfi_offset 4, -16 + 4825 .cfi_offset 5, -12 + 4826 .cfi_offset 6, -8 + 4827 .cfi_offset 14, -4 + 4828 0002 0446 mov r4, r0 +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr1its = READ_REG(huart->Instance->CR1); + 4829 .loc 1 2120 3 is_stmt 1 view .LVU1605 +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr1its = READ_REG(huart->Instance->CR1); + 4830 .loc 1 2120 25 is_stmt 0 view .LVU1606 + 4831 0004 0268 ldr r2, [r0] +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr1its = READ_REG(huart->Instance->CR1); + 4832 .loc 1 2120 12 view .LVU1607 + 4833 0006 D369 ldr r3, [r2, #28] + 4834 .LVL425: +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3); + 4835 .loc 1 2121 3 is_stmt 1 view .LVU1608 +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3); + 4836 .loc 1 2121 12 is_stmt 0 view .LVU1609 + 4837 0008 1168 ldr r1, [r2] + 4838 .LVL426: +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4839 .loc 1 2122 3 is_stmt 1 view .LVU1610 +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4840 .loc 1 2122 12 is_stmt 0 view .LVU1611 + 4841 000a 9068 ldr r0, [r2, #8] + 4842 .LVL427: +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t errorcode; + 4843 .loc 1 2124 3 is_stmt 1 view .LVU1612 +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4844 .loc 1 2125 3 view .LVU1613 +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (errorflags == 0U) + 4845 .loc 1 2128 3 view .LVU1614 +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4846 .loc 1 2129 3 view .LVU1615 +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4847 .loc 1 2129 6 is_stmt 0 view .LVU1616 + 4848 000c 40F60F0C movw ip, #2063 + 4849 0010 13EA0C0F tst r3, ip + 4850 0014 0AD1 bne .L194 + ARM GAS /tmp/ccqiorEF.s page 197 + + +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_RXNEIE) != 0U)) + 4851 .loc 1 2132 5 is_stmt 1 view .LVU1617 +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_RXNEIE) != 0U)) + 4852 .loc 1 2132 8 is_stmt 0 view .LVU1618 + 4853 0016 13F0200F tst r3, #32 + 4854 001a 0DD0 beq .L195 +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4855 .loc 1 2133 9 view .LVU1619 + 4856 001c 11F0200F tst r1, #32 + 4857 0020 0AD0 beq .L195 +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4858 .loc 1 2135 7 is_stmt 1 view .LVU1620 +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4859 .loc 1 2135 16 is_stmt 0 view .LVU1621 + 4860 0022 A36E ldr r3, [r4, #104] + 4861 .LVL428: +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4862 .loc 1 2135 10 view .LVU1622 + 4863 0024 0BB3 cbz r3, .L193 +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4864 .loc 1 2137 9 is_stmt 1 view .LVU1623 + 4865 0026 2046 mov r0, r4 + 4866 .LVL429: +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4867 .loc 1 2137 9 is_stmt 0 view .LVU1624 + 4868 0028 9847 blx r3 + 4869 .LVL430: +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4870 .loc 1 2139 7 is_stmt 1 view .LVU1625 + 4871 002a 1EE0 b .L193 + 4872 .LVL431: + 4873 .L194: +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) + 4874 .loc 1 2145 7 is_stmt 0 view .LVU1626 + 4875 002c 10F00105 ands r5, r0, #1 + 4876 0030 1CD1 bne .L198 +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4877 .loc 1 2146 11 view .LVU1627 + 4878 0032 AB4E ldr r6, .L232 + 4879 0034 3142 tst r1, r6 + 4880 0036 19D1 bne .L198 + 4881 .L195: +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((isrflags & USART_ISR_IDLE) != 0U) + 4882 .loc 1 2282 3 is_stmt 1 view .LVU1628 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((isrflags & USART_ISR_IDLE) != 0U) + 4883 .loc 1 2282 13 is_stmt 0 view .LVU1629 + 4884 0038 256E ldr r5, [r4, #96] +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((isrflags & USART_ISR_IDLE) != 0U) + 4885 .loc 1 2282 6 view .LVU1630 + 4886 003a 012D cmp r5, #1 + 4887 003c 00F0A480 beq .L228 + 4888 .L212: +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4889 .loc 1 2378 3 is_stmt 1 view .LVU1631 +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4890 .loc 1 2378 6 is_stmt 0 view .LVU1632 + 4891 0040 13F4801F tst r3, #1048576 + ARM GAS /tmp/ccqiorEF.s page 198 + + + 4892 0044 03D0 beq .L224 +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4893 .loc 1 2378 42 discriminator 1 view .LVU1633 + 4894 0046 10F4800F tst r0, #4194304 + 4895 004a 40F03681 bne .L229 + 4896 .L224: +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_TXEIE) != 0U)) + 4897 .loc 1 2396 3 is_stmt 1 view .LVU1634 +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_TXEIE) != 0U)) + 4898 .loc 1 2396 6 is_stmt 0 view .LVU1635 + 4899 004e 13F0800F tst r3, #128 + 4900 0052 03D0 beq .L225 +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4901 .loc 1 2397 7 view .LVU1636 + 4902 0054 11F0800F tst r1, #128 + 4903 0058 40F03681 bne .L230 + 4904 .L225: +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4905 .loc 1 2407 3 is_stmt 1 view .LVU1637 +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4906 .loc 1 2407 6 is_stmt 0 view .LVU1638 + 4907 005c 13F0400F tst r3, #64 + 4908 0060 03D0 beq .L193 +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4909 .loc 1 2407 41 discriminator 1 view .LVU1639 + 4910 0062 11F0400F tst r1, #64 + 4911 0066 40F03681 bne .L231 + 4912 .LVL432: + 4913 .L193: +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4914 .loc 1 2413 1 view .LVU1640 + 4915 006a 70BD pop {r4, r5, r6, pc} + 4916 .LVL433: + 4917 .L198: +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4918 .loc 1 2149 5 is_stmt 1 view .LVU1641 +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4919 .loc 1 2149 8 is_stmt 0 view .LVU1642 + 4920 006c 13F0010F tst r3, #1 + 4921 0070 09D0 beq .L199 +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4922 .loc 1 2149 43 discriminator 1 view .LVU1643 + 4923 0072 11F4807F tst r1, #256 + 4924 0076 06D0 beq .L199 +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4925 .loc 1 2151 7 is_stmt 1 view .LVU1644 + 4926 0078 0120 movs r0, #1 + 4927 .LVL434: +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4928 .loc 1 2151 7 is_stmt 0 view .LVU1645 + 4929 007a 1062 str r0, [r2, #32] +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4930 .loc 1 2153 7 is_stmt 1 view .LVU1646 +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4931 .loc 1 2153 12 is_stmt 0 view .LVU1647 + 4932 007c D4F88420 ldr r2, [r4, #132] +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 199 + + + 4933 .loc 1 2153 24 view .LVU1648 + 4934 0080 0243 orrs r2, r2, r0 + 4935 0082 C4F88420 str r2, [r4, #132] + 4936 .L199: +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4937 .loc 1 2157 5 is_stmt 1 view .LVU1649 +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4938 .loc 1 2157 8 is_stmt 0 view .LVU1650 + 4939 0086 13F0020F tst r3, #2 + 4940 008a 09D0 beq .L200 +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4941 .loc 1 2157 43 discriminator 1 view .LVU1651 + 4942 008c 45B1 cbz r5, .L200 +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4943 .loc 1 2159 7 is_stmt 1 view .LVU1652 + 4944 008e 2268 ldr r2, [r4] + 4945 0090 0220 movs r0, #2 + 4946 0092 1062 str r0, [r2, #32] +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4947 .loc 1 2161 7 view .LVU1653 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4948 .loc 1 2161 12 is_stmt 0 view .LVU1654 + 4949 0094 D4F88420 ldr r2, [r4, #132] +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4950 .loc 1 2161 24 view .LVU1655 + 4951 0098 42F00402 orr r2, r2, #4 + 4952 009c C4F88420 str r2, [r4, #132] + 4953 .L200: +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4954 .loc 1 2165 5 is_stmt 1 view .LVU1656 +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4955 .loc 1 2165 8 is_stmt 0 view .LVU1657 + 4956 00a0 13F0040F tst r3, #4 + 4957 00a4 09D0 beq .L201 +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4958 .loc 1 2165 43 discriminator 1 view .LVU1658 + 4959 00a6 45B1 cbz r5, .L201 +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4960 .loc 1 2167 7 is_stmt 1 view .LVU1659 + 4961 00a8 2268 ldr r2, [r4] + 4962 00aa 0420 movs r0, #4 + 4963 00ac 1062 str r0, [r2, #32] +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4964 .loc 1 2169 7 view .LVU1660 +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4965 .loc 1 2169 12 is_stmt 0 view .LVU1661 + 4966 00ae D4F88420 ldr r2, [r4, #132] +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4967 .loc 1 2169 24 view .LVU1662 + 4968 00b2 42F00202 orr r2, r2, #2 + 4969 00b6 C4F88420 str r2, [r4, #132] + 4970 .L201: +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (((cr1its & USART_CR1_RXNEIE) != 0U) || + 4971 .loc 1 2173 5 is_stmt 1 view .LVU1663 +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (((cr1its & USART_CR1_RXNEIE) != 0U) || + 4972 .loc 1 2173 8 is_stmt 0 view .LVU1664 + 4973 00ba 13F0080F tst r3, #8 + ARM GAS /tmp/ccqiorEF.s page 200 + + + 4974 00be 0BD0 beq .L202 +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((cr3its & USART_CR3_EIE) != 0U))) + 4975 .loc 1 2174 9 view .LVU1665 + 4976 00c0 11F0200F tst r1, #32 + 4977 00c4 00D1 bne .L203 +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((cr3its & USART_CR3_EIE) != 0U))) + 4978 .loc 1 2174 49 discriminator 1 view .LVU1666 + 4979 00c6 3DB1 cbz r5, .L202 + 4980 .L203: +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4981 .loc 1 2177 7 is_stmt 1 view .LVU1667 + 4982 00c8 2268 ldr r2, [r4] + 4983 00ca 0820 movs r0, #8 + 4984 00cc 1062 str r0, [r2, #32] +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4985 .loc 1 2179 7 view .LVU1668 +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4986 .loc 1 2179 12 is_stmt 0 view .LVU1669 + 4987 00ce D4F88420 ldr r2, [r4, #132] +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 4988 .loc 1 2179 24 view .LVU1670 + 4989 00d2 0243 orrs r2, r2, r0 + 4990 00d4 C4F88420 str r2, [r4, #132] + 4991 .L202: +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4992 .loc 1 2183 5 is_stmt 1 view .LVU1671 +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4993 .loc 1 2183 8 is_stmt 0 view .LVU1672 + 4994 00d8 13F4006F tst r3, #2048 + 4995 00dc 0CD0 beq .L204 +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 4996 .loc 1 2183 45 discriminator 1 view .LVU1673 + 4997 00de 11F0806F tst r1, #67108864 + 4998 00e2 09D0 beq .L204 +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 4999 .loc 1 2185 7 is_stmt 1 view .LVU1674 + 5000 00e4 2268 ldr r2, [r4] + 5001 00e6 4FF40060 mov r0, #2048 + 5002 00ea 1062 str r0, [r2, #32] +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5003 .loc 1 2187 7 view .LVU1675 +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5004 .loc 1 2187 12 is_stmt 0 view .LVU1676 + 5005 00ec D4F88420 ldr r2, [r4, #132] +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5006 .loc 1 2187 24 view .LVU1677 + 5007 00f0 42F02002 orr r2, r2, #32 + 5008 00f4 C4F88420 str r2, [r4, #132] + 5009 .L204: +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5010 .loc 1 2191 5 is_stmt 1 view .LVU1678 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5011 .loc 1 2191 14 is_stmt 0 view .LVU1679 + 5012 00f8 D4F88420 ldr r2, [r4, #132] +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5013 .loc 1 2191 8 view .LVU1680 + 5014 00fc 002A cmp r2, #0 + ARM GAS /tmp/ccqiorEF.s page 201 + + + 5015 00fe B4D0 beq .L193 +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_RXNEIE) != 0U)) + 5016 .loc 1 2194 7 is_stmt 1 view .LVU1681 +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_CR1_RXNEIE) != 0U)) + 5017 .loc 1 2194 10 is_stmt 0 view .LVU1682 + 5018 0100 13F0200F tst r3, #32 + 5019 0104 06D0 beq .L206 +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5020 .loc 1 2195 11 view .LVU1683 + 5021 0106 11F0200F tst r1, #32 + 5022 010a 03D0 beq .L206 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5023 .loc 1 2197 9 is_stmt 1 view .LVU1684 +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5024 .loc 1 2197 18 is_stmt 0 view .LVU1685 + 5025 010c A36E ldr r3, [r4, #104] + 5026 .LVL435: +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5027 .loc 1 2197 12 view .LVU1686 + 5028 010e 0BB1 cbz r3, .L206 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5029 .loc 1 2199 11 is_stmt 1 view .LVU1687 + 5030 0110 2046 mov r0, r4 + 5031 0112 9847 blx r3 + 5032 .LVL436: + 5033 .L206: +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 5034 .loc 1 2208 7 view .LVU1688 +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || + 5035 .loc 1 2208 17 is_stmt 0 view .LVU1689 + 5036 0114 D4F88420 ldr r2, [r4, #132] + 5037 .LVL437: +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + 5038 .loc 1 2209 7 is_stmt 1 view .LVU1690 +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + 5039 .loc 1 2209 12 is_stmt 0 view .LVU1691 + 5040 0118 2368 ldr r3, [r4] + 5041 011a 9B68 ldr r3, [r3, #8] +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + 5042 .loc 1 2209 10 view .LVU1692 + 5043 011c 13F0400F tst r3, #64 + 5044 0120 02D1 bne .L207 +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) + 5045 .loc 1 2209 66 discriminator 1 view .LVU1693 + 5046 0122 12F0280F tst r2, #40 + 5047 0126 28D0 beq .L208 + 5048 .L207: +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5049 .loc 1 2215 9 is_stmt 1 view .LVU1694 + 5050 0128 2046 mov r0, r4 + 5051 012a FFF7FEFF bl UART_EndRxTransfer + 5052 .LVL438: +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5053 .loc 1 2218 9 view .LVU1695 +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5054 .loc 1 2218 13 is_stmt 0 view .LVU1696 + 5055 012e 2368 ldr r3, [r4] + ARM GAS /tmp/ccqiorEF.s page 202 + + + 5056 0130 9B68 ldr r3, [r3, #8] +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5057 .loc 1 2218 12 view .LVU1697 + 5058 0132 13F0400F tst r3, #64 + 5059 0136 1CD0 beq .L209 + 5060 .L210: +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5061 .loc 1 2221 11 is_stmt 1 discriminator 1 view .LVU1698 + 5062 .LBB640: +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5063 .loc 1 2221 11 discriminator 1 view .LVU1699 +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5064 .loc 1 2221 11 discriminator 1 view .LVU1700 +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5065 .loc 1 2221 11 discriminator 1 view .LVU1701 + 5066 0138 2268 ldr r2, [r4] + 5067 .LVL439: + 5068 .LBB641: + 5069 .LBI641: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5070 .loc 2 1068 31 view .LVU1702 + 5071 .LBB642: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5072 .loc 2 1070 5 view .LVU1703 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5073 .loc 2 1072 4 view .LVU1704 + 5074 013a 02F10803 add r3, r2, #8 + 5075 .LVL440: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5076 .loc 2 1072 4 is_stmt 0 view .LVU1705 + 5077 .syntax unified + 5078 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5079 013e 53E8003F ldrex r3, [r3] + 5080 @ 0 "" 2 + 5081 .LVL441: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5082 .loc 2 1073 4 is_stmt 1 view .LVU1706 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5083 .loc 2 1073 4 is_stmt 0 view .LVU1707 + 5084 .thumb + 5085 .syntax unified + 5086 .LBE642: + 5087 .LBE641: +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5088 .loc 1 2221 11 discriminator 1 view .LVU1708 + 5089 0142 23F04003 bic r3, r3, #64 + 5090 .LVL442: +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5091 .loc 1 2221 11 is_stmt 1 discriminator 1 view .LVU1709 + 5092 .LBB643: + 5093 .LBI643: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5094 .loc 2 1119 31 view .LVU1710 + 5095 .LBB644: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5096 .loc 2 1121 4 view .LVU1711 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccqiorEF.s page 203 + + + 5097 .loc 2 1123 4 view .LVU1712 + 5098 0146 0832 adds r2, r2, #8 + 5099 .LVL443: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5100 .loc 2 1123 4 is_stmt 0 view .LVU1713 + 5101 .syntax unified + 5102 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5103 0148 42E80031 strex r1, r3, [r2] + 5104 @ 0 "" 2 + 5105 .LVL444: + 5106 .loc 2 1124 4 is_stmt 1 view .LVU1714 + 5107 .loc 2 1124 4 is_stmt 0 view .LVU1715 + 5108 .thumb + 5109 .syntax unified + 5110 .LBE644: + 5111 .LBE643: +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5112 .loc 1 2221 11 discriminator 1 view .LVU1716 + 5113 014c 0029 cmp r1, #0 + 5114 014e F3D1 bne .L210 + 5115 .LBE640: +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5116 .loc 1 2221 11 is_stmt 1 discriminator 2 view .LVU1717 +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5117 .loc 1 2224 11 view .LVU1718 +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5118 .loc 1 2224 20 is_stmt 0 view .LVU1719 + 5119 0150 636F ldr r3, [r4, #116] + 5120 .LVL445: +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5121 .loc 1 2224 14 view .LVU1720 + 5122 0152 53B1 cbz r3, .L211 +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5123 .loc 1 2228 13 is_stmt 1 view .LVU1721 +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5124 .loc 1 2228 46 is_stmt 0 view .LVU1722 + 5125 0154 634A ldr r2, .L232+4 + 5126 0156 5A63 str r2, [r3, #52] +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5127 .loc 1 2231 13 is_stmt 1 view .LVU1723 +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5128 .loc 1 2231 17 is_stmt 0 view .LVU1724 + 5129 0158 606F ldr r0, [r4, #116] + 5130 015a FFF7FEFF bl HAL_DMA_Abort_IT + 5131 .LVL446: +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5132 .loc 1 2231 16 discriminator 1 view .LVU1725 + 5133 015e 0028 cmp r0, #0 + 5134 0160 83D0 beq .L193 +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5135 .loc 1 2234 15 is_stmt 1 view .LVU1726 +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5136 .loc 1 2234 20 is_stmt 0 view .LVU1727 + 5137 0162 606F ldr r0, [r4, #116] +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5138 .loc 1 2234 28 view .LVU1728 + 5139 0164 436B ldr r3, [r0, #52] + ARM GAS /tmp/ccqiorEF.s page 204 + + +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5140 .loc 1 2234 15 view .LVU1729 + 5141 0166 9847 blx r3 + 5142 .LVL447: + 5143 0168 7FE7 b .L193 + 5144 .L211: +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 5145 .loc 1 2245 13 is_stmt 1 view .LVU1730 + 5146 016a 2046 mov r0, r4 + 5147 016c FFF7FEFF bl HAL_UART_ErrorCallback + 5148 .LVL448: + 5149 0170 7BE7 b .L193 + 5150 .LVL449: + 5151 .L209: +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 5152 .loc 1 2258 11 view .LVU1731 + 5153 0172 2046 mov r0, r4 + 5154 0174 FFF7FEFF bl HAL_UART_ErrorCallback + 5155 .LVL450: + 5156 0178 77E7 b .L193 + 5157 .LVL451: + 5158 .L208: +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 5159 .loc 1 2271 9 view .LVU1732 + 5160 017a 2046 mov r0, r4 + 5161 017c FFF7FEFF bl HAL_UART_ErrorCallback + 5162 .LVL452: +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5163 .loc 1 2273 9 view .LVU1733 +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5164 .loc 1 2273 26 is_stmt 0 view .LVU1734 + 5165 0180 0023 movs r3, #0 + 5166 0182 C4F88430 str r3, [r4, #132] +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5167 .loc 1 2276 5 is_stmt 1 view .LVU1735 + 5168 0186 70E7 b .L193 + 5169 .LVL453: + 5170 .L228: +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && ((cr1its & USART_ISR_IDLE) != 0U)) + 5171 .loc 1 2283 7 is_stmt 0 view .LVU1736 + 5172 0188 13F0100F tst r3, #16 + 5173 018c 3FF458AF beq .L212 +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5174 .loc 1 2284 7 view .LVU1737 + 5175 0190 11F0100F tst r1, #16 + 5176 0194 3FF454AF beq .L212 +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5177 .loc 1 2286 5 is_stmt 1 view .LVU1738 + 5178 0198 1023 movs r3, #16 + 5179 .LVL454: +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5180 .loc 1 2286 5 is_stmt 0 view .LVU1739 + 5181 019a 1362 str r3, [r2, #32] +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5182 .loc 1 2289 5 is_stmt 1 view .LVU1740 +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5183 .loc 1 2289 9 is_stmt 0 view .LVU1741 + ARM GAS /tmp/ccqiorEF.s page 205 + + + 5184 019c 2368 ldr r3, [r4] + 5185 019e 9B68 ldr r3, [r3, #8] +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5186 .loc 1 2289 8 view .LVU1742 + 5187 01a0 13F0400F tst r3, #64 + 5188 01a4 4FD0 beq .L213 + 5189 .LBB645: +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((nb_remaining_rx_data > 0U) + 5190 .loc 1 2295 7 is_stmt 1 view .LVU1743 +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((nb_remaining_rx_data > 0U) + 5191 .loc 1 2295 50 is_stmt 0 view .LVU1744 + 5192 01a6 626F ldr r2, [r4, #116] + 5193 01a8 1368 ldr r3, [r2] + 5194 01aa 5B68 ldr r3, [r3, #4] +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((nb_remaining_rx_data > 0U) + 5195 .loc 1 2295 16 view .LVU1745 + 5196 01ac 9BB2 uxth r3, r3 + 5197 .LVL455: +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_remaining_rx_data < huart->RxXferSize)) + 5198 .loc 1 2296 7 is_stmt 1 view .LVU1746 +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_remaining_rx_data < huart->RxXferSize)) + 5199 .loc 1 2296 10 is_stmt 0 view .LVU1747 + 5200 01ae 002B cmp r3, #0 + 5201 01b0 3FF45BAF beq .L193 +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5202 .loc 1 2297 43 view .LVU1748 + 5203 01b4 B4F85810 ldrh r1, [r4, #88] + 5204 .LVL456: +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5205 .loc 1 2297 11 view .LVU1749 + 5206 01b8 9942 cmp r1, r3 + 5207 01ba 7FF656AF bls .L193 +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5208 .loc 1 2300 9 is_stmt 1 view .LVU1750 +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5209 .loc 1 2300 28 is_stmt 0 view .LVU1751 + 5210 01be A4F85A30 strh r3, [r4, #90] @ movhi +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5211 .loc 1 2303 9 is_stmt 1 view .LVU1752 +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5212 .loc 1 2303 32 is_stmt 0 view .LVU1753 + 5213 01c2 9369 ldr r3, [r2, #24] + 5214 .LVL457: +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5215 .loc 1 2303 12 view .LVU1754 + 5216 01c4 202B cmp r3, #32 + 5217 01c6 31D0 beq .L215 + 5218 .L216: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5219 .loc 1 2306 11 is_stmt 1 discriminator 1 view .LVU1755 + 5220 .LBB646: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5221 .loc 1 2306 11 discriminator 1 view .LVU1756 +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5222 .loc 1 2306 11 discriminator 1 view .LVU1757 +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5223 .loc 1 2306 11 discriminator 1 view .LVU1758 + ARM GAS /tmp/ccqiorEF.s page 206 + + + 5224 01c8 2268 ldr r2, [r4] + 5225 .LVL458: + 5226 .LBB647: + 5227 .LBI647: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5228 .loc 2 1068 31 view .LVU1759 + 5229 .LBB648: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5230 .loc 2 1070 5 view .LVU1760 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5231 .loc 2 1072 4 view .LVU1761 + 5232 .syntax unified + 5233 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5234 01ca 52E8003F ldrex r3, [r2] + 5235 @ 0 "" 2 + 5236 .LVL459: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5237 .loc 2 1073 4 view .LVU1762 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5238 .loc 2 1073 4 is_stmt 0 view .LVU1763 + 5239 .thumb + 5240 .syntax unified + 5241 .LBE648: + 5242 .LBE647: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5243 .loc 1 2306 11 discriminator 1 view .LVU1764 + 5244 01ce 23F48073 bic r3, r3, #256 + 5245 .LVL460: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5246 .loc 1 2306 11 is_stmt 1 discriminator 1 view .LVU1765 + 5247 .LBB649: + 5248 .LBI649: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5249 .loc 2 1119 31 view .LVU1766 + 5250 .LBB650: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5251 .loc 2 1121 4 view .LVU1767 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5252 .loc 2 1123 4 view .LVU1768 + 5253 .syntax unified + 5254 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5255 01d2 42E80031 strex r1, r3, [r2] + 5256 @ 0 "" 2 + 5257 .LVL461: + 5258 .loc 2 1124 4 view .LVU1769 + 5259 .loc 2 1124 4 is_stmt 0 view .LVU1770 + 5260 .thumb + 5261 .syntax unified + 5262 .LBE650: + 5263 .LBE649: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5264 .loc 1 2306 11 discriminator 1 view .LVU1771 + 5265 01d6 0029 cmp r1, #0 + 5266 01d8 F6D1 bne .L216 + 5267 .LVL462: + 5268 .L217: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ARM GAS /tmp/ccqiorEF.s page 207 + + + 5269 .loc 1 2306 11 discriminator 1 view .LVU1772 + 5270 .LBE646: +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 5271 .loc 1 2306 11 is_stmt 1 discriminator 2 view .LVU1773 +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5272 .loc 1 2307 11 discriminator 1 view .LVU1774 + 5273 .LBB651: +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5274 .loc 1 2307 11 discriminator 1 view .LVU1775 +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5275 .loc 1 2307 11 discriminator 1 view .LVU1776 +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5276 .loc 1 2307 11 discriminator 1 view .LVU1777 + 5277 01da 2268 ldr r2, [r4] + 5278 .LVL463: + 5279 .LBB652: + 5280 .LBI652: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5281 .loc 2 1068 31 view .LVU1778 + 5282 .LBB653: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5283 .loc 2 1070 5 view .LVU1779 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5284 .loc 2 1072 4 view .LVU1780 + 5285 01dc 02F10803 add r3, r2, #8 + 5286 .LVL464: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5287 .loc 2 1072 4 is_stmt 0 view .LVU1781 + 5288 .syntax unified + 5289 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5290 01e0 53E8003F ldrex r3, [r3] + 5291 @ 0 "" 2 + 5292 .LVL465: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5293 .loc 2 1073 4 is_stmt 1 view .LVU1782 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5294 .loc 2 1073 4 is_stmt 0 view .LVU1783 + 5295 .thumb + 5296 .syntax unified + 5297 .LBE653: + 5298 .LBE652: +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5299 .loc 1 2307 11 discriminator 1 view .LVU1784 + 5300 01e4 23F00103 bic r3, r3, #1 + 5301 .LVL466: +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5302 .loc 1 2307 11 is_stmt 1 discriminator 1 view .LVU1785 + 5303 .LBB654: + 5304 .LBI654: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5305 .loc 2 1119 31 view .LVU1786 + 5306 .LBB655: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5307 .loc 2 1121 4 view .LVU1787 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5308 .loc 2 1123 4 view .LVU1788 + 5309 01e8 0832 adds r2, r2, #8 + ARM GAS /tmp/ccqiorEF.s page 208 + + + 5310 .LVL467: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5311 .loc 2 1123 4 is_stmt 0 view .LVU1789 + 5312 .syntax unified + 5313 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5314 01ea 42E80031 strex r1, r3, [r2] + 5315 @ 0 "" 2 + 5316 .LVL468: + 5317 .loc 2 1124 4 is_stmt 1 view .LVU1790 + 5318 .loc 2 1124 4 is_stmt 0 view .LVU1791 + 5319 .thumb + 5320 .syntax unified + 5321 .LBE655: + 5322 .LBE654: +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5323 .loc 1 2307 11 discriminator 1 view .LVU1792 + 5324 01ee 0029 cmp r1, #0 + 5325 01f0 F3D1 bne .L217 + 5326 .LVL469: + 5327 .L218: +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5328 .loc 1 2307 11 discriminator 1 view .LVU1793 + 5329 .LBE651: +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5330 .loc 1 2307 11 is_stmt 1 discriminator 2 view .LVU1794 +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5331 .loc 1 2311 11 discriminator 1 view .LVU1795 + 5332 .LBB656: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5333 .loc 1 2311 11 discriminator 1 view .LVU1796 +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5334 .loc 1 2311 11 discriminator 1 view .LVU1797 +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5335 .loc 1 2311 11 discriminator 1 view .LVU1798 + 5336 01f2 2268 ldr r2, [r4] + 5337 .LVL470: + 5338 .LBB657: + 5339 .LBI657: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5340 .loc 2 1068 31 view .LVU1799 + 5341 .LBB658: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5342 .loc 2 1070 5 view .LVU1800 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5343 .loc 2 1072 4 view .LVU1801 + 5344 01f4 02F10803 add r3, r2, #8 + 5345 .LVL471: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5346 .loc 2 1072 4 is_stmt 0 view .LVU1802 + 5347 .syntax unified + 5348 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5349 01f8 53E8003F ldrex r3, [r3] + 5350 @ 0 "" 2 + 5351 .LVL472: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5352 .loc 2 1073 4 is_stmt 1 view .LVU1803 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 209 + + + 5353 .loc 2 1073 4 is_stmt 0 view .LVU1804 + 5354 .thumb + 5355 .syntax unified + 5356 .LBE658: + 5357 .LBE657: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5358 .loc 1 2311 11 discriminator 1 view .LVU1805 + 5359 01fc 23F04003 bic r3, r3, #64 + 5360 .LVL473: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5361 .loc 1 2311 11 is_stmt 1 discriminator 1 view .LVU1806 + 5362 .LBB659: + 5363 .LBI659: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5364 .loc 2 1119 31 view .LVU1807 + 5365 .LBB660: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5366 .loc 2 1121 4 view .LVU1808 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5367 .loc 2 1123 4 view .LVU1809 + 5368 0200 0832 adds r2, r2, #8 + 5369 .LVL474: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5370 .loc 2 1123 4 is_stmt 0 view .LVU1810 + 5371 .syntax unified + 5372 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5373 0202 42E80031 strex r1, r3, [r2] + 5374 @ 0 "" 2 + 5375 .LVL475: + 5376 .loc 2 1124 4 is_stmt 1 view .LVU1811 + 5377 .loc 2 1124 4 is_stmt 0 view .LVU1812 + 5378 .thumb + 5379 .syntax unified + 5380 .LBE660: + 5381 .LBE659: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5382 .loc 1 2311 11 discriminator 1 view .LVU1813 + 5383 0206 0029 cmp r1, #0 + 5384 0208 F3D1 bne .L218 + 5385 .LBE656: +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5386 .loc 1 2311 11 is_stmt 1 discriminator 2 view .LVU1814 +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 5387 .loc 1 2314 11 view .LVU1815 +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 5388 .loc 1 2314 26 is_stmt 0 view .LVU1816 + 5389 020a 2023 movs r3, #32 + 5390 .LVL476: +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 5391 .loc 1 2314 26 view .LVU1817 + 5392 020c C4F88030 str r3, [r4, #128] + 5393 .LVL477: +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5394 .loc 1 2315 11 is_stmt 1 view .LVU1818 +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5395 .loc 1 2315 32 is_stmt 0 view .LVU1819 + 5396 0210 0023 movs r3, #0 + ARM GAS /tmp/ccqiorEF.s page 210 + + + 5397 0212 2366 str r3, [r4, #96] + 5398 .L219: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5399 .loc 1 2317 11 is_stmt 1 discriminator 1 view .LVU1820 + 5400 .LBB661: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5401 .loc 1 2317 11 discriminator 1 view .LVU1821 +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5402 .loc 1 2317 11 discriminator 1 view .LVU1822 +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5403 .loc 1 2317 11 discriminator 1 view .LVU1823 + 5404 0214 2268 ldr r2, [r4] + 5405 .LVL478: + 5406 .LBB662: + 5407 .LBI662: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5408 .loc 2 1068 31 view .LVU1824 + 5409 .LBB663: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5410 .loc 2 1070 5 view .LVU1825 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5411 .loc 2 1072 4 view .LVU1826 + 5412 .syntax unified + 5413 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5414 0216 52E8003F ldrex r3, [r2] + 5415 @ 0 "" 2 + 5416 .LVL479: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5417 .loc 2 1073 4 view .LVU1827 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5418 .loc 2 1073 4 is_stmt 0 view .LVU1828 + 5419 .thumb + 5420 .syntax unified + 5421 .LBE663: + 5422 .LBE662: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5423 .loc 1 2317 11 discriminator 1 view .LVU1829 + 5424 021a 23F01003 bic r3, r3, #16 + 5425 .LVL480: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5426 .loc 1 2317 11 is_stmt 1 discriminator 1 view .LVU1830 + 5427 .LBB664: + 5428 .LBI664: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5429 .loc 2 1119 31 view .LVU1831 + 5430 .LBB665: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5431 .loc 2 1121 4 view .LVU1832 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5432 .loc 2 1123 4 view .LVU1833 + 5433 .syntax unified + 5434 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5435 021e 42E80031 strex r1, r3, [r2] + 5436 @ 0 "" 2 + 5437 .LVL481: + 5438 .loc 2 1124 4 view .LVU1834 + 5439 .loc 2 1124 4 is_stmt 0 view .LVU1835 + ARM GAS /tmp/ccqiorEF.s page 211 + + + 5440 .thumb + 5441 .syntax unified + 5442 .LBE665: + 5443 .LBE664: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5444 .loc 1 2317 11 discriminator 1 view .LVU1836 + 5445 0222 0029 cmp r1, #0 + 5446 0224 F6D1 bne .L219 + 5447 .LBE661: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5448 .loc 1 2317 11 is_stmt 1 discriminator 2 view .LVU1837 +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5449 .loc 1 2320 11 view .LVU1838 +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5450 .loc 1 2320 17 is_stmt 0 view .LVU1839 + 5451 0226 606F ldr r0, [r4, #116] + 5452 .LVL482: +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5453 .loc 1 2320 17 view .LVU1840 + 5454 0228 FFF7FEFF bl HAL_DMA_Abort + 5455 .LVL483: + 5456 .L215: +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5457 .loc 1 2325 9 is_stmt 1 view .LVU1841 +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5458 .loc 1 2325 28 is_stmt 0 view .LVU1842 + 5459 022c 0223 movs r3, #2 + 5460 022e 6366 str r3, [r4, #100] +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 5461 .loc 1 2332 9 is_stmt 1 view .LVU1843 +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 5462 .loc 1 2332 49 is_stmt 0 view .LVU1844 + 5463 0230 B4F85810 ldrh r1, [r4, #88] +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 5464 .loc 1 2332 69 view .LVU1845 + 5465 0234 B4F85A30 ldrh r3, [r4, #90] + 5466 0238 9BB2 uxth r3, r3 +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 5467 .loc 1 2332 9 view .LVU1846 + 5468 023a C91A subs r1, r1, r3 + 5469 023c 89B2 uxth r1, r1 + 5470 023e 2046 mov r0, r4 + 5471 0240 FFF7FEFF bl HAL_UARTEx_RxEventCallback + 5472 .LVL484: +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5473 .loc 1 2335 7 is_stmt 1 view .LVU1847 + 5474 0244 11E7 b .L193 + 5475 .LVL485: + 5476 .L213: +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5477 .loc 1 2335 7 is_stmt 0 view .LVU1848 + 5478 .LBE645: + 5479 .LBB666: +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->RxXferCount > 0U) + 5480 .loc 1 2342 7 is_stmt 1 view .LVU1849 +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->RxXferCount > 0U) + 5481 .loc 1 2342 34 is_stmt 0 view .LVU1850 + ARM GAS /tmp/ccqiorEF.s page 212 + + + 5482 0246 B4F85810 ldrh r1, [r4, #88] + 5483 .LVL486: +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->RxXferCount > 0U) + 5484 .loc 1 2342 54 view .LVU1851 + 5485 024a B4F85A30 ldrh r3, [r4, #90] + 5486 024e 9BB2 uxth r3, r3 +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((huart->RxXferCount > 0U) + 5487 .loc 1 2342 16 view .LVU1852 + 5488 0250 C91A subs r1, r1, r3 + 5489 0252 89B2 uxth r1, r1 + 5490 .LVL487: +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_rx_data > 0U)) + 5491 .loc 1 2343 7 is_stmt 1 view .LVU1853 +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_rx_data > 0U)) + 5492 .loc 1 2343 17 is_stmt 0 view .LVU1854 + 5493 0254 B4F85A30 ldrh r3, [r4, #90] + 5494 0258 9BB2 uxth r3, r3 +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** && (nb_rx_data > 0U)) + 5495 .loc 1 2343 10 view .LVU1855 + 5496 025a 002B cmp r3, #0 + 5497 025c 3FF405AF beq .L193 +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5498 .loc 1 2344 11 view .LVU1856 + 5499 0260 0029 cmp r1, #0 + 5500 0262 3FF402AF beq .L193 + 5501 .LVL488: + 5502 .L221: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5503 .loc 1 2347 9 is_stmt 1 discriminator 1 view .LVU1857 + 5504 .LBB667: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5505 .loc 1 2347 9 discriminator 1 view .LVU1858 +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5506 .loc 1 2347 9 discriminator 1 view .LVU1859 +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5507 .loc 1 2347 9 discriminator 1 view .LVU1860 + 5508 0266 2268 ldr r2, [r4] + 5509 .LVL489: + 5510 .LBB668: + 5511 .LBI668: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5512 .loc 2 1068 31 view .LVU1861 + 5513 .LBB669: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5514 .loc 2 1070 5 view .LVU1862 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5515 .loc 2 1072 4 view .LVU1863 + 5516 .syntax unified + 5517 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5518 0268 52E8003F ldrex r3, [r2] + 5519 @ 0 "" 2 + 5520 .LVL490: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5521 .loc 2 1073 4 view .LVU1864 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5522 .loc 2 1073 4 is_stmt 0 view .LVU1865 + 5523 .thumb + ARM GAS /tmp/ccqiorEF.s page 213 + + + 5524 .syntax unified + 5525 .LBE669: + 5526 .LBE668: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5527 .loc 1 2347 9 discriminator 1 view .LVU1866 + 5528 026c 23F49073 bic r3, r3, #288 + 5529 .LVL491: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5530 .loc 1 2347 9 is_stmt 1 discriminator 1 view .LVU1867 + 5531 .LBB670: + 5532 .LBI670: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5533 .loc 2 1119 31 view .LVU1868 + 5534 .LBB671: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5535 .loc 2 1121 4 view .LVU1869 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5536 .loc 2 1123 4 view .LVU1870 + 5537 .syntax unified + 5538 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5539 0270 42E80030 strex r0, r3, [r2] + 5540 @ 0 "" 2 + 5541 .LVL492: + 5542 .loc 2 1124 4 view .LVU1871 + 5543 .loc 2 1124 4 is_stmt 0 view .LVU1872 + 5544 .thumb + 5545 .syntax unified + 5546 .LBE671: + 5547 .LBE670: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5548 .loc 1 2347 9 discriminator 1 view .LVU1873 + 5549 0274 0028 cmp r0, #0 + 5550 0276 F6D1 bne .L221 + 5551 .LVL493: + 5552 .L222: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5553 .loc 1 2347 9 discriminator 1 view .LVU1874 + 5554 .LBE667: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5555 .loc 1 2347 9 is_stmt 1 discriminator 2 view .LVU1875 +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5556 .loc 1 2350 9 discriminator 1 view .LVU1876 + 5557 .LBB672: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5558 .loc 1 2350 9 discriminator 1 view .LVU1877 +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5559 .loc 1 2350 9 discriminator 1 view .LVU1878 +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5560 .loc 1 2350 9 discriminator 1 view .LVU1879 + 5561 0278 2268 ldr r2, [r4] + 5562 .LVL494: + 5563 .LBB673: + 5564 .LBI673: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5565 .loc 2 1068 31 view .LVU1880 + 5566 .LBB674: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqiorEF.s page 214 + + + 5567 .loc 2 1070 5 view .LVU1881 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5568 .loc 2 1072 4 view .LVU1882 + 5569 027a 02F10803 add r3, r2, #8 + 5570 .LVL495: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5571 .loc 2 1072 4 is_stmt 0 view .LVU1883 + 5572 .syntax unified + 5573 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5574 027e 53E8003F ldrex r3, [r3] + 5575 @ 0 "" 2 + 5576 .LVL496: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5577 .loc 2 1073 4 is_stmt 1 view .LVU1884 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5578 .loc 2 1073 4 is_stmt 0 view .LVU1885 + 5579 .thumb + 5580 .syntax unified + 5581 .LBE674: + 5582 .LBE673: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5583 .loc 1 2350 9 discriminator 1 view .LVU1886 + 5584 0282 23F00103 bic r3, r3, #1 + 5585 .LVL497: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5586 .loc 1 2350 9 is_stmt 1 discriminator 1 view .LVU1887 + 5587 .LBB675: + 5588 .LBI675: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5589 .loc 2 1119 31 view .LVU1888 + 5590 .LBB676: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5591 .loc 2 1121 4 view .LVU1889 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5592 .loc 2 1123 4 view .LVU1890 + 5593 0286 0832 adds r2, r2, #8 + 5594 .LVL498: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5595 .loc 2 1123 4 is_stmt 0 view .LVU1891 + 5596 .syntax unified + 5597 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5598 0288 42E80030 strex r0, r3, [r2] + 5599 @ 0 "" 2 + 5600 .LVL499: + 5601 .loc 2 1124 4 is_stmt 1 view .LVU1892 + 5602 .loc 2 1124 4 is_stmt 0 view .LVU1893 + 5603 .thumb + 5604 .syntax unified + 5605 .LBE676: + 5606 .LBE675: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5607 .loc 1 2350 9 discriminator 1 view .LVU1894 + 5608 028c 0028 cmp r0, #0 + 5609 028e F3D1 bne .L222 + 5610 .LBE672: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5611 .loc 1 2350 9 is_stmt 1 discriminator 2 view .LVU1895 + ARM GAS /tmp/ccqiorEF.s page 215 + + +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 5612 .loc 1 2353 9 view .LVU1896 +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 5613 .loc 1 2353 24 is_stmt 0 view .LVU1897 + 5614 0290 2023 movs r3, #32 + 5615 .LVL500: +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 5616 .loc 1 2353 24 view .LVU1898 + 5617 0292 C4F88030 str r3, [r4, #128] +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5618 .loc 1 2354 9 is_stmt 1 view .LVU1899 +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5619 .loc 1 2354 30 is_stmt 0 view .LVU1900 + 5620 0296 0023 movs r3, #0 + 5621 0298 2366 str r3, [r4, #96] +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5622 .loc 1 2357 9 is_stmt 1 view .LVU1901 +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5623 .loc 1 2357 22 is_stmt 0 view .LVU1902 + 5624 029a A366 str r3, [r4, #104] + 5625 .L223: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5626 .loc 1 2359 9 is_stmt 1 discriminator 1 view .LVU1903 + 5627 .LBB677: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5628 .loc 1 2359 9 discriminator 1 view .LVU1904 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5629 .loc 1 2359 9 discriminator 1 view .LVU1905 +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5630 .loc 1 2359 9 discriminator 1 view .LVU1906 + 5631 029c 2268 ldr r2, [r4] + 5632 .LVL501: + 5633 .LBB678: + 5634 .LBI678: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5635 .loc 2 1068 31 view .LVU1907 + 5636 .LBB679: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5637 .loc 2 1070 5 view .LVU1908 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5638 .loc 2 1072 4 view .LVU1909 + 5639 .syntax unified + 5640 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5641 029e 52E8003F ldrex r3, [r2] + 5642 @ 0 "" 2 + 5643 .LVL502: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5644 .loc 2 1073 4 view .LVU1910 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5645 .loc 2 1073 4 is_stmt 0 view .LVU1911 + 5646 .thumb + 5647 .syntax unified + 5648 .LBE679: + 5649 .LBE678: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5650 .loc 1 2359 9 discriminator 1 view .LVU1912 + 5651 02a2 23F01003 bic r3, r3, #16 + ARM GAS /tmp/ccqiorEF.s page 216 + + + 5652 .LVL503: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5653 .loc 1 2359 9 is_stmt 1 discriminator 1 view .LVU1913 + 5654 .LBB680: + 5655 .LBI680: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5656 .loc 2 1119 31 view .LVU1914 + 5657 .LBB681: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5658 .loc 2 1121 4 view .LVU1915 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5659 .loc 2 1123 4 view .LVU1916 + 5660 .syntax unified + 5661 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5662 02a6 42E80030 strex r0, r3, [r2] + 5663 @ 0 "" 2 + 5664 .LVL504: + 5665 .loc 2 1124 4 view .LVU1917 + 5666 .loc 2 1124 4 is_stmt 0 view .LVU1918 + 5667 .thumb + 5668 .syntax unified + 5669 .LBE681: + 5670 .LBE680: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5671 .loc 1 2359 9 discriminator 1 view .LVU1919 + 5672 02aa 0028 cmp r0, #0 + 5673 02ac F6D1 bne .L223 + 5674 .LBE677: +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5675 .loc 1 2359 9 is_stmt 1 discriminator 2 view .LVU1920 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5676 .loc 1 2363 9 view .LVU1921 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5677 .loc 1 2363 28 is_stmt 0 view .LVU1922 + 5678 02ae 0223 movs r3, #2 + 5679 .LVL505: +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5680 .loc 1 2363 28 view .LVU1923 + 5681 02b0 6366 str r3, [r4, #100] +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 5682 .loc 1 2370 9 is_stmt 1 view .LVU1924 + 5683 02b2 2046 mov r0, r4 + 5684 02b4 FFF7FEFF bl HAL_UARTEx_RxEventCallback + 5685 .LVL506: +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5686 .loc 1 2373 7 view .LVU1925 + 5687 02b8 D7E6 b .L193 + 5688 .LVL507: + 5689 .L229: +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5690 .loc 1 2373 7 is_stmt 0 view .LVU1926 + 5691 .LBE666: +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5692 .loc 1 2380 5 is_stmt 1 view .LVU1927 + 5693 02ba 4FF48013 mov r3, #1048576 + 5694 .LVL508: +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 217 + + + 5695 .loc 1 2380 5 is_stmt 0 view .LVU1928 + 5696 02be 1362 str r3, [r2, #32] +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 5697 .loc 1 2390 5 is_stmt 1 view .LVU1929 + 5698 02c0 2046 mov r0, r4 + 5699 .LVL509: +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 5700 .loc 1 2390 5 is_stmt 0 view .LVU1930 + 5701 02c2 FFF7FEFF bl HAL_UARTEx_WakeupCallback + 5702 .LVL510: +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5703 .loc 1 2392 5 is_stmt 1 view .LVU1931 + 5704 02c6 D0E6 b .L193 + 5705 .LVL511: + 5706 .L230: +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5707 .loc 1 2399 5 view .LVU1932 +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5708 .loc 1 2399 14 is_stmt 0 view .LVU1933 + 5709 02c8 E36E ldr r3, [r4, #108] + 5710 .LVL512: +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5711 .loc 1 2399 8 view .LVU1934 + 5712 02ca 002B cmp r3, #0 + 5713 02cc 3FF4CDAE beq .L193 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5714 .loc 1 2401 7 is_stmt 1 view .LVU1935 + 5715 02d0 2046 mov r0, r4 + 5716 .LVL513: +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5717 .loc 1 2401 7 is_stmt 0 view .LVU1936 + 5718 02d2 9847 blx r3 + 5719 .LVL514: +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5720 .loc 1 2403 5 is_stmt 1 view .LVU1937 + 5721 02d4 C9E6 b .L193 + 5722 .LVL515: + 5723 .L231: +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; + 5724 .loc 1 2409 5 view .LVU1938 + 5725 02d6 2046 mov r0, r4 + 5726 .LVL516: +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return; + 5727 .loc 1 2409 5 is_stmt 0 view .LVU1939 + 5728 02d8 FFF7FEFF bl UART_EndTransmit_IT + 5729 .LVL517: +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5730 .loc 1 2410 5 is_stmt 1 view .LVU1940 + 5731 02dc C5E6 b .L193 + 5732 .L233: + 5733 02de 00BF .align 2 + 5734 .L232: + 5735 02e0 20010004 .word 67109152 + 5736 02e4 00000000 .word UART_DMAAbortOnError + 5737 .cfi_endproc + 5738 .LFE152: + 5740 .section .text.UART_RxISR_8BIT,"ax",%progbits + ARM GAS /tmp/ccqiorEF.s page 218 + + + 5741 .align 1 + 5742 .syntax unified + 5743 .thumb + 5744 .thumb_func + 5746 UART_RxISR_8BIT: + 5747 .LVL518: + 5748 .LFB194: +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief RX interrupt handler for 7 or 8 bits data word length . +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5749 .loc 1 3832 1 view -0 + 5750 .cfi_startproc + 5751 @ args = 0, pretend = 0, frame = 0 + 5752 @ frame_needed = 0, uses_anonymous_args = 0 + 5753 .loc 1 3832 1 is_stmt 0 view .LVU1942 + 5754 0000 08B5 push {r3, lr} + 5755 .cfi_def_cfa_offset 8 + 5756 .cfi_offset 3, -8 + 5757 .cfi_offset 14, -4 +3833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t uhMask = huart->Mask; + 5758 .loc 1 3833 3 is_stmt 1 view .LVU1943 + 5759 .loc 1 3833 12 is_stmt 0 view .LVU1944 + 5760 0002 B0F85C30 ldrh r3, [r0, #92] + 5761 .LVL519: +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t uhdata; + 5762 .loc 1 3834 3 is_stmt 1 view .LVU1945 +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is ongoing */ +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_BUSY_RX) + 5763 .loc 1 3837 3 view .LVU1946 + 5764 .loc 1 3837 12 is_stmt 0 view .LVU1947 + 5765 0006 D0F88020 ldr r2, [r0, #128] + 5766 .loc 1 3837 6 view .LVU1948 + 5767 000a 222A cmp r2, #34 + 5768 000c 05D0 beq .L245 +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhdata = (uint16_t) READ_REG(huart->Instance->RDR); +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr++; +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxXferCount == 0U) +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Parity Error Interrupt and RXNE interrupts */ +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Rx process is completed, restore huart->RxState to Ready */ +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 219 + + +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RxISR function pointer */ +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; +3857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize type of RxEvent to Transfer Complete */ +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that USART RTOEN bit is set */ +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Receiver Timeout Interrupt */ +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE); +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check current reception Mode : +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If Reception till IDLE event has been selected : */ +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +3871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set reception type to Standard */ +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable IDLE interrupt */ +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear IDLE Flag */ +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx Event callback*/ +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback(huart, huart->RxXferSize); +3887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ +3891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Standard reception API called */ +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx complete callback*/ +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxCpltCallback(huart); +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx complete callback*/ +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_RxCpltCallback(huart); +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RXNE interrupt flag */ +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + 5769 .loc 1 3908 5 is_stmt 1 view .LVU1949 + 5770 000e 0268 ldr r2, [r0] + 5771 0010 9369 ldr r3, [r2, #24] + ARM GAS /tmp/ccqiorEF.s page 220 + + + 5772 .LVL520: + 5773 .loc 1 3908 5 is_stmt 0 view .LVU1950 + 5774 0012 43F00803 orr r3, r3, #8 + 5775 0016 9361 str r3, [r2, #24] + 5776 .LVL521: + 5777 .L234: +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5778 .loc 1 3910 1 view .LVU1951 + 5779 0018 08BD pop {r3, pc} + 5780 .LVL522: + 5781 .L245: +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); + 5782 .loc 1 3839 5 is_stmt 1 view .LVU1952 +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); + 5783 .loc 1 3839 25 is_stmt 0 view .LVU1953 + 5784 001a 0268 ldr r2, [r0] +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); + 5785 .loc 1 3839 12 view .LVU1954 + 5786 001c 918C ldrh r1, [r2, #36] + 5787 .LVL523: +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr++; + 5788 .loc 1 3840 5 is_stmt 1 view .LVU1955 +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr++; + 5789 .loc 1 3840 45 is_stmt 0 view .LVU1956 + 5790 001e DBB2 uxtb r3, r3 + 5791 .LVL524: +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr++; + 5792 .loc 1 3840 11 view .LVU1957 + 5793 0020 426D ldr r2, [r0, #84] +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr++; + 5794 .loc 1 3840 26 view .LVU1958 + 5795 0022 0B40 ands r3, r3, r1 +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr++; + 5796 .loc 1 3840 24 view .LVU1959 + 5797 0024 1370 strb r3, [r2] + 5798 .LVL525: +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; + 5799 .loc 1 3841 5 is_stmt 1 view .LVU1960 +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; + 5800 .loc 1 3841 10 is_stmt 0 view .LVU1961 + 5801 0026 436D ldr r3, [r0, #84] +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; + 5802 .loc 1 3841 22 view .LVU1962 + 5803 0028 0133 adds r3, r3, #1 + 5804 002a 4365 str r3, [r0, #84] +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5805 .loc 1 3842 5 is_stmt 1 view .LVU1963 +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5806 .loc 1 3842 10 is_stmt 0 view .LVU1964 + 5807 002c B0F85A30 ldrh r3, [r0, #90] + 5808 0030 9BB2 uxth r3, r3 +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5809 .loc 1 3842 23 view .LVU1965 + 5810 0032 013B subs r3, r3, #1 + 5811 0034 9BB2 uxth r3, r3 + 5812 0036 A0F85A30 strh r3, [r0, #90] @ movhi + ARM GAS /tmp/ccqiorEF.s page 221 + + +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5813 .loc 1 3844 5 is_stmt 1 view .LVU1966 +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5814 .loc 1 3844 14 is_stmt 0 view .LVU1967 + 5815 003a B0F85A30 ldrh r3, [r0, #90] + 5816 003e 9BB2 uxth r3, r3 +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5817 .loc 1 3844 8 view .LVU1968 + 5818 0040 002B cmp r3, #0 + 5819 0042 E9D1 bne .L234 + 5820 .LVL526: + 5821 .L237: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5822 .loc 1 3847 7 is_stmt 1 discriminator 1 view .LVU1969 + 5823 .LBB682: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5824 .loc 1 3847 7 discriminator 1 view .LVU1970 +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5825 .loc 1 3847 7 discriminator 1 view .LVU1971 +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5826 .loc 1 3847 7 discriminator 1 view .LVU1972 + 5827 0044 0268 ldr r2, [r0] + 5828 .LVL527: + 5829 .LBB683: + 5830 .LBI683: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5831 .loc 2 1068 31 view .LVU1973 + 5832 .LBB684: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5833 .loc 2 1070 5 view .LVU1974 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5834 .loc 2 1072 4 view .LVU1975 + 5835 .syntax unified + 5836 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5837 0046 52E8003F ldrex r3, [r2] + 5838 @ 0 "" 2 + 5839 .LVL528: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5840 .loc 2 1073 4 view .LVU1976 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5841 .loc 2 1073 4 is_stmt 0 view .LVU1977 + 5842 .thumb + 5843 .syntax unified + 5844 .LBE684: + 5845 .LBE683: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5846 .loc 1 3847 7 discriminator 1 view .LVU1978 + 5847 004a 23F49073 bic r3, r3, #288 + 5848 .LVL529: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5849 .loc 1 3847 7 is_stmt 1 discriminator 1 view .LVU1979 + 5850 .LBB685: + 5851 .LBI685: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5852 .loc 2 1119 31 view .LVU1980 + 5853 .LBB686: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqiorEF.s page 222 + + + 5854 .loc 2 1121 4 view .LVU1981 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5855 .loc 2 1123 4 view .LVU1982 + 5856 .syntax unified + 5857 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5858 004e 42E80031 strex r1, r3, [r2] + 5859 @ 0 "" 2 + 5860 .LVL530: + 5861 .loc 2 1124 4 view .LVU1983 + 5862 .loc 2 1124 4 is_stmt 0 view .LVU1984 + 5863 .thumb + 5864 .syntax unified + 5865 .LBE686: + 5866 .LBE685: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5867 .loc 1 3847 7 discriminator 1 view .LVU1985 + 5868 0052 0029 cmp r1, #0 + 5869 0054 F6D1 bne .L237 + 5870 .LVL531: + 5871 .L238: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5872 .loc 1 3847 7 discriminator 1 view .LVU1986 + 5873 .LBE682: +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5874 .loc 1 3847 7 is_stmt 1 discriminator 2 view .LVU1987 +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5875 .loc 1 3850 7 discriminator 1 view .LVU1988 + 5876 .LBB687: +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5877 .loc 1 3850 7 discriminator 1 view .LVU1989 +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5878 .loc 1 3850 7 discriminator 1 view .LVU1990 +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5879 .loc 1 3850 7 discriminator 1 view .LVU1991 + 5880 0056 0268 ldr r2, [r0] + 5881 .LVL532: + 5882 .LBB688: + 5883 .LBI688: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5884 .loc 2 1068 31 view .LVU1992 + 5885 .LBB689: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5886 .loc 2 1070 5 view .LVU1993 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5887 .loc 2 1072 4 view .LVU1994 + 5888 0058 02F10803 add r3, r2, #8 + 5889 .LVL533: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5890 .loc 2 1072 4 is_stmt 0 view .LVU1995 + 5891 .syntax unified + 5892 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5893 005c 53E8003F ldrex r3, [r3] + 5894 @ 0 "" 2 + 5895 .LVL534: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5896 .loc 2 1073 4 is_stmt 1 view .LVU1996 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 223 + + + 5897 .loc 2 1073 4 is_stmt 0 view .LVU1997 + 5898 .thumb + 5899 .syntax unified + 5900 .LBE689: + 5901 .LBE688: +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5902 .loc 1 3850 7 discriminator 1 view .LVU1998 + 5903 0060 23F00103 bic r3, r3, #1 + 5904 .LVL535: +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5905 .loc 1 3850 7 is_stmt 1 discriminator 1 view .LVU1999 + 5906 .LBB690: + 5907 .LBI690: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5908 .loc 2 1119 31 view .LVU2000 + 5909 .LBB691: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5910 .loc 2 1121 4 view .LVU2001 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5911 .loc 2 1123 4 view .LVU2002 + 5912 0064 0832 adds r2, r2, #8 + 5913 .LVL536: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5914 .loc 2 1123 4 is_stmt 0 view .LVU2003 + 5915 .syntax unified + 5916 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5917 0066 42E80031 strex r1, r3, [r2] + 5918 @ 0 "" 2 + 5919 .LVL537: + 5920 .loc 2 1124 4 is_stmt 1 view .LVU2004 + 5921 .loc 2 1124 4 is_stmt 0 view .LVU2005 + 5922 .thumb + 5923 .syntax unified + 5924 .LBE691: + 5925 .LBE690: +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5926 .loc 1 3850 7 discriminator 1 view .LVU2006 + 5927 006a 0029 cmp r1, #0 + 5928 006c F3D1 bne .L238 + 5929 .LBE687: +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5930 .loc 1 3850 7 is_stmt 1 discriminator 2 view .LVU2007 +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5931 .loc 1 3853 7 view .LVU2008 +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5932 .loc 1 3853 22 is_stmt 0 view .LVU2009 + 5933 006e 2023 movs r3, #32 + 5934 .LVL538: +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5935 .loc 1 3853 22 view .LVU2010 + 5936 0070 C0F88030 str r3, [r0, #128] +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5937 .loc 1 3856 7 is_stmt 1 view .LVU2011 +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5938 .loc 1 3856 20 is_stmt 0 view .LVU2012 + 5939 0074 0023 movs r3, #0 + 5940 0076 8366 str r3, [r0, #104] + ARM GAS /tmp/ccqiorEF.s page 224 + + +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5941 .loc 1 3859 7 is_stmt 1 view .LVU2013 +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 5942 .loc 1 3859 26 is_stmt 0 view .LVU2014 + 5943 0078 4366 str r3, [r0, #100] +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5944 .loc 1 3862 7 is_stmt 1 view .LVU2015 +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5945 .loc 1 3862 11 is_stmt 0 view .LVU2016 + 5946 007a 0368 ldr r3, [r0] + 5947 007c 5B68 ldr r3, [r3, #4] +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 5948 .loc 1 3862 10 view .LVU2017 + 5949 007e 13F4000F tst r3, #8388608 + 5950 0082 08D0 beq .L239 + 5951 .L240: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5952 .loc 1 3865 9 is_stmt 1 discriminator 1 view .LVU2018 + 5953 .LBB692: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5954 .loc 1 3865 9 discriminator 1 view .LVU2019 +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5955 .loc 1 3865 9 discriminator 1 view .LVU2020 +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5956 .loc 1 3865 9 discriminator 1 view .LVU2021 + 5957 0084 0268 ldr r2, [r0] + 5958 .LVL539: + 5959 .LBB693: + 5960 .LBI693: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5961 .loc 2 1068 31 view .LVU2022 + 5962 .LBB694: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5963 .loc 2 1070 5 view .LVU2023 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5964 .loc 2 1072 4 view .LVU2024 + 5965 .syntax unified + 5966 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5967 0086 52E8003F ldrex r3, [r2] + 5968 @ 0 "" 2 + 5969 .LVL540: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5970 .loc 2 1073 4 view .LVU2025 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 5971 .loc 2 1073 4 is_stmt 0 view .LVU2026 + 5972 .thumb + 5973 .syntax unified + 5974 .LBE694: + 5975 .LBE693: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5976 .loc 1 3865 9 discriminator 1 view .LVU2027 + 5977 008a 23F08063 bic r3, r3, #67108864 + 5978 .LVL541: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5979 .loc 1 3865 9 is_stmt 1 discriminator 1 view .LVU2028 + 5980 .LBB695: + 5981 .LBI695: + ARM GAS /tmp/ccqiorEF.s page 225 + + +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 5982 .loc 2 1119 31 view .LVU2029 + 5983 .LBB696: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 5984 .loc 2 1121 4 view .LVU2030 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 5985 .loc 2 1123 4 view .LVU2031 + 5986 .syntax unified + 5987 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5988 008e 42E80031 strex r1, r3, [r2] + 5989 @ 0 "" 2 + 5990 .LVL542: + 5991 .loc 2 1124 4 view .LVU2032 + 5992 .loc 2 1124 4 is_stmt 0 view .LVU2033 + 5993 .thumb + 5994 .syntax unified + 5995 .LBE696: + 5996 .LBE695: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 5997 .loc 1 3865 9 discriminator 1 view .LVU2034 + 5998 0092 0029 cmp r1, #0 + 5999 0094 F6D1 bne .L240 + 6000 .LVL543: + 6001 .L239: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6002 .loc 1 3865 9 discriminator 1 view .LVU2035 + 6003 .LBE692: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6004 .loc 1 3865 9 is_stmt 1 discriminator 2 view .LVU2036 +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6005 .loc 1 3870 7 view .LVU2037 +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6006 .loc 1 3870 16 is_stmt 0 view .LVU2038 + 6007 0096 036E ldr r3, [r0, #96] +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6008 .loc 1 3870 10 view .LVU2039 + 6009 0098 012B cmp r3, #1 + 6010 009a 16D1 bne .L241 +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6011 .loc 1 3873 9 is_stmt 1 view .LVU2040 +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6012 .loc 1 3873 30 is_stmt 0 view .LVU2041 + 6013 009c 0023 movs r3, #0 + 6014 009e 0366 str r3, [r0, #96] + 6015 .L242: +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6016 .loc 1 3876 9 is_stmt 1 discriminator 1 view .LVU2042 + 6017 .LBB697: +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6018 .loc 1 3876 9 discriminator 1 view .LVU2043 +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6019 .loc 1 3876 9 discriminator 1 view .LVU2044 +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6020 .loc 1 3876 9 discriminator 1 view .LVU2045 + 6021 00a0 0268 ldr r2, [r0] + 6022 .LVL544: + 6023 .LBB698: + ARM GAS /tmp/ccqiorEF.s page 226 + + + 6024 .LBI698: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6025 .loc 2 1068 31 view .LVU2046 + 6026 .LBB699: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6027 .loc 2 1070 5 view .LVU2047 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6028 .loc 2 1072 4 view .LVU2048 + 6029 .syntax unified + 6030 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6031 00a2 52E8003F ldrex r3, [r2] + 6032 @ 0 "" 2 + 6033 .LVL545: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6034 .loc 2 1073 4 view .LVU2049 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6035 .loc 2 1073 4 is_stmt 0 view .LVU2050 + 6036 .thumb + 6037 .syntax unified + 6038 .LBE699: + 6039 .LBE698: +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6040 .loc 1 3876 9 discriminator 1 view .LVU2051 + 6041 00a6 23F01003 bic r3, r3, #16 + 6042 .LVL546: +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6043 .loc 1 3876 9 is_stmt 1 discriminator 1 view .LVU2052 + 6044 .LBB700: + 6045 .LBI700: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6046 .loc 2 1119 31 view .LVU2053 + 6047 .LBB701: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6048 .loc 2 1121 4 view .LVU2054 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6049 .loc 2 1123 4 view .LVU2055 + 6050 .syntax unified + 6051 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6052 00aa 42E80031 strex r1, r3, [r2] + 6053 @ 0 "" 2 + 6054 .LVL547: + 6055 .loc 2 1124 4 view .LVU2056 + 6056 .loc 2 1124 4 is_stmt 0 view .LVU2057 + 6057 .thumb + 6058 .syntax unified + 6059 .LBE701: + 6060 .LBE700: +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6061 .loc 1 3876 9 discriminator 1 view .LVU2058 + 6062 00ae 0029 cmp r1, #0 + 6063 00b0 F6D1 bne .L242 + 6064 .LBE697: +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6065 .loc 1 3876 9 is_stmt 1 discriminator 2 view .LVU2059 +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6066 .loc 1 3878 9 view .LVU2060 +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 227 + + + 6067 .loc 1 3878 13 is_stmt 0 view .LVU2061 + 6068 00b2 0368 ldr r3, [r0] + 6069 .LVL548: +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6070 .loc 1 3878 13 view .LVU2062 + 6071 00b4 DA69 ldr r2, [r3, #28] +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6072 .loc 1 3878 12 view .LVU2063 + 6073 00b6 12F0100F tst r2, #16 + 6074 00ba 01D0 beq .L243 +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6075 .loc 1 3881 11 is_stmt 1 view .LVU2064 + 6076 00bc 1022 movs r2, #16 + 6077 00be 1A62 str r2, [r3, #32] + 6078 .L243: +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 6079 .loc 1 3889 9 view .LVU2065 + 6080 00c0 B0F85810 ldrh r1, [r0, #88] + 6081 00c4 FFF7FEFF bl HAL_UARTEx_RxEventCallback + 6082 .LVL549: +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 6083 .loc 1 3889 9 is_stmt 0 view .LVU2066 + 6084 00c8 A6E7 b .L234 + 6085 .LVL550: + 6086 .L241: +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6087 .loc 1 3900 9 is_stmt 1 view .LVU2067 + 6088 00ca FFF7FEFF bl HAL_UART_RxCpltCallback + 6089 .LVL551: +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6090 .loc 1 3900 9 is_stmt 0 view .LVU2068 + 6091 00ce A3E7 b .L234 + 6092 .cfi_endproc + 6093 .LFE194: + 6095 .section .text.UART_RxISR_16BIT,"ax",%progbits + 6096 .align 1 + 6097 .syntax unified + 6098 .thumb + 6099 .thumb_func + 6101 UART_RxISR_16BIT: + 6102 .LVL552: + 6103 .LFB195: +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @brief RX interrupt handler for 9 bits data word length . +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @note Function is called under interruption only, once +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * interruptions have been enabled by HAL_UART_Receive_IT() +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @param huart UART handle. +3917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** * @retval None +3918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** */ +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6104 .loc 1 3920 1 is_stmt 1 view -0 + 6105 .cfi_startproc + 6106 @ args = 0, pretend = 0, frame = 0 + 6107 @ frame_needed = 0, uses_anonymous_args = 0 + 6108 .loc 1 3920 1 is_stmt 0 view .LVU2070 + ARM GAS /tmp/ccqiorEF.s page 228 + + + 6109 0000 08B5 push {r3, lr} + 6110 .cfi_def_cfa_offset 8 + 6111 .cfi_offset 3, -8 + 6112 .cfi_offset 14, -4 +3921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t *tmp; + 6113 .loc 1 3921 3 is_stmt 1 view .LVU2071 +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t uhMask = huart->Mask; + 6114 .loc 1 3922 3 view .LVU2072 + 6115 .loc 1 3922 12 is_stmt 0 view .LVU2073 + 6116 0002 B0F85C30 ldrh r3, [r0, #92] + 6117 .LVL553: +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t uhdata; + 6118 .loc 1 3923 3 is_stmt 1 view .LVU2074 +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is ongoing */ +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_BUSY_RX) + 6119 .loc 1 3926 3 view .LVU2075 + 6120 .loc 1 3926 12 is_stmt 0 view .LVU2076 + 6121 0006 D0F88020 ldr r2, [r0, #128] + 6122 .loc 1 3926 6 view .LVU2077 + 6123 000a 222A cmp r2, #34 + 6124 000c 05D0 beq .L257 +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhdata = (uint16_t) READ_REG(huart->Instance->RDR); +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmp = (uint16_t *) huart->pRxBuffPtr ; +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *tmp = (uint16_t)(uhdata & uhMask); +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr += 2U; +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->RxXferCount == 0U) +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Rx process is completed, restore huart->RxState to Ready */ +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; +3944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RxISR function pointer */ +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; +3947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Initialize type of RxEvent to Transfer Complete */ +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that USART RTOEN bit is set */ +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Enable the UART Receiver Timeout Interrupt */ +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE); +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check current reception Mode : +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** If Reception till IDLE event has been selected : */ +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 229 + + +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Set reception type to Standard */ +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Disable IDLE interrupt */ +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear IDLE Flag */ +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx Event callback*/ +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventCallback(huart, huart->RxXferSize); +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Standard reception API called */ +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call registered Rx complete callback*/ +3987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxCpltCallback(huart); +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #else +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /*Call legacy weak Rx complete callback*/ +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_UART_RxCpltCallback(huart); +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** else +3996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Clear RXNE interrupt flag */ +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); + 6125 .loc 1 3998 5 is_stmt 1 view .LVU2078 + 6126 000e 0268 ldr r2, [r0] + 6127 0010 9369 ldr r3, [r2, #24] + 6128 .LVL554: + 6129 .loc 1 3998 5 is_stmt 0 view .LVU2079 + 6130 0012 43F00803 orr r3, r3, #8 + 6131 0016 9361 str r3, [r2, #24] + 6132 .LVL555: + 6133 .L246: +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } +4000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6134 .loc 1 4000 1 view .LVU2080 + 6135 0018 08BD pop {r3, pc} + 6136 .LVL556: + 6137 .L257: +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmp = (uint16_t *) huart->pRxBuffPtr ; + 6138 .loc 1 3928 5 is_stmt 1 view .LVU2081 +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmp = (uint16_t *) huart->pRxBuffPtr ; + 6139 .loc 1 3928 25 is_stmt 0 view .LVU2082 + 6140 001a 0268 ldr r2, [r0] + ARM GAS /tmp/ccqiorEF.s page 230 + + +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** tmp = (uint16_t *) huart->pRxBuffPtr ; + 6141 .loc 1 3928 12 view .LVU2083 + 6142 001c 918C ldrh r1, [r2, #36] + 6143 .LVL557: +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *tmp = (uint16_t)(uhdata & uhMask); + 6144 .loc 1 3929 5 is_stmt 1 view .LVU2084 +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** *tmp = (uint16_t)(uhdata & uhMask); + 6145 .loc 1 3929 9 is_stmt 0 view .LVU2085 + 6146 001e 426D ldr r2, [r0, #84] + 6147 .LVL558: +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr += 2U; + 6148 .loc 1 3930 5 is_stmt 1 view .LVU2086 +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr += 2U; + 6149 .loc 1 3930 12 is_stmt 0 view .LVU2087 + 6150 0020 0B40 ands r3, r3, r1 + 6151 .LVL559: +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr += 2U; + 6152 .loc 1 3930 10 view .LVU2088 + 6153 0022 1380 strh r3, [r2] @ movhi + 6154 .LVL560: +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; + 6155 .loc 1 3931 5 is_stmt 1 view .LVU2089 +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; + 6156 .loc 1 3931 10 is_stmt 0 view .LVU2090 + 6157 0024 436D ldr r3, [r0, #84] +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount--; + 6158 .loc 1 3931 23 view .LVU2091 + 6159 0026 0233 adds r3, r3, #2 + 6160 0028 4365 str r3, [r0, #84] +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6161 .loc 1 3932 5 is_stmt 1 view .LVU2092 +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6162 .loc 1 3932 10 is_stmt 0 view .LVU2093 + 6163 002a B0F85A30 ldrh r3, [r0, #90] + 6164 002e 9BB2 uxth r3, r3 +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6165 .loc 1 3932 23 view .LVU2094 + 6166 0030 013B subs r3, r3, #1 + 6167 0032 9BB2 uxth r3, r3 + 6168 0034 A0F85A30 strh r3, [r0, #90] @ movhi +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6169 .loc 1 3934 5 is_stmt 1 view .LVU2095 +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6170 .loc 1 3934 14 is_stmt 0 view .LVU2096 + 6171 0038 B0F85A30 ldrh r3, [r0, #90] + 6172 003c 9BB2 uxth r3, r3 +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6173 .loc 1 3934 8 view .LVU2097 + 6174 003e 002B cmp r3, #0 + 6175 0040 EAD1 bne .L246 + 6176 .LVL561: + 6177 .L249: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6178 .loc 1 3937 7 is_stmt 1 discriminator 1 view .LVU2098 + 6179 .LBB702: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6180 .loc 1 3937 7 discriminator 1 view .LVU2099 + ARM GAS /tmp/ccqiorEF.s page 231 + + +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6181 .loc 1 3937 7 discriminator 1 view .LVU2100 +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6182 .loc 1 3937 7 discriminator 1 view .LVU2101 + 6183 0042 0268 ldr r2, [r0] + 6184 .LVL562: + 6185 .LBB703: + 6186 .LBI703: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6187 .loc 2 1068 31 view .LVU2102 + 6188 .LBB704: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6189 .loc 2 1070 5 view .LVU2103 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6190 .loc 2 1072 4 view .LVU2104 + 6191 .syntax unified + 6192 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6193 0044 52E8003F ldrex r3, [r2] + 6194 @ 0 "" 2 + 6195 .LVL563: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6196 .loc 2 1073 4 view .LVU2105 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6197 .loc 2 1073 4 is_stmt 0 view .LVU2106 + 6198 .thumb + 6199 .syntax unified + 6200 .LBE704: + 6201 .LBE703: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6202 .loc 1 3937 7 discriminator 1 view .LVU2107 + 6203 0048 23F49073 bic r3, r3, #288 + 6204 .LVL564: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6205 .loc 1 3937 7 is_stmt 1 discriminator 1 view .LVU2108 + 6206 .LBB705: + 6207 .LBI705: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6208 .loc 2 1119 31 view .LVU2109 + 6209 .LBB706: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6210 .loc 2 1121 4 view .LVU2110 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6211 .loc 2 1123 4 view .LVU2111 + 6212 .syntax unified + 6213 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6214 004c 42E80031 strex r1, r3, [r2] + 6215 @ 0 "" 2 + 6216 .LVL565: + 6217 .loc 2 1124 4 view .LVU2112 + 6218 .loc 2 1124 4 is_stmt 0 view .LVU2113 + 6219 .thumb + 6220 .syntax unified + 6221 .LBE706: + 6222 .LBE705: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6223 .loc 1 3937 7 discriminator 1 view .LVU2114 + 6224 0050 0029 cmp r1, #0 + ARM GAS /tmp/ccqiorEF.s page 232 + + + 6225 0052 F6D1 bne .L249 + 6226 .LVL566: + 6227 .L250: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6228 .loc 1 3937 7 discriminator 1 view .LVU2115 + 6229 .LBE702: +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6230 .loc 1 3937 7 is_stmt 1 discriminator 2 view .LVU2116 +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6231 .loc 1 3940 7 discriminator 1 view .LVU2117 + 6232 .LBB707: +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6233 .loc 1 3940 7 discriminator 1 view .LVU2118 +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6234 .loc 1 3940 7 discriminator 1 view .LVU2119 +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6235 .loc 1 3940 7 discriminator 1 view .LVU2120 + 6236 0054 0268 ldr r2, [r0] + 6237 .LVL567: + 6238 .LBB708: + 6239 .LBI708: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6240 .loc 2 1068 31 view .LVU2121 + 6241 .LBB709: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6242 .loc 2 1070 5 view .LVU2122 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6243 .loc 2 1072 4 view .LVU2123 + 6244 0056 02F10803 add r3, r2, #8 + 6245 .LVL568: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6246 .loc 2 1072 4 is_stmt 0 view .LVU2124 + 6247 .syntax unified + 6248 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6249 005a 53E8003F ldrex r3, [r3] + 6250 @ 0 "" 2 + 6251 .LVL569: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6252 .loc 2 1073 4 is_stmt 1 view .LVU2125 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6253 .loc 2 1073 4 is_stmt 0 view .LVU2126 + 6254 .thumb + 6255 .syntax unified + 6256 .LBE709: + 6257 .LBE708: +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6258 .loc 1 3940 7 discriminator 1 view .LVU2127 + 6259 005e 23F00103 bic r3, r3, #1 + 6260 .LVL570: +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6261 .loc 1 3940 7 is_stmt 1 discriminator 1 view .LVU2128 + 6262 .LBB710: + 6263 .LBI710: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6264 .loc 2 1119 31 view .LVU2129 + 6265 .LBB711: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccqiorEF.s page 233 + + + 6266 .loc 2 1121 4 view .LVU2130 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6267 .loc 2 1123 4 view .LVU2131 + 6268 0062 0832 adds r2, r2, #8 + 6269 .LVL571: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6270 .loc 2 1123 4 is_stmt 0 view .LVU2132 + 6271 .syntax unified + 6272 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6273 0064 42E80031 strex r1, r3, [r2] + 6274 @ 0 "" 2 + 6275 .LVL572: + 6276 .loc 2 1124 4 is_stmt 1 view .LVU2133 + 6277 .loc 2 1124 4 is_stmt 0 view .LVU2134 + 6278 .thumb + 6279 .syntax unified + 6280 .LBE711: + 6281 .LBE710: +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6282 .loc 1 3940 7 discriminator 1 view .LVU2135 + 6283 0068 0029 cmp r1, #0 + 6284 006a F3D1 bne .L250 + 6285 .LBE707: +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6286 .loc 1 3940 7 is_stmt 1 discriminator 2 view .LVU2136 +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6287 .loc 1 3943 7 view .LVU2137 +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6288 .loc 1 3943 22 is_stmt 0 view .LVU2138 + 6289 006c 2023 movs r3, #32 + 6290 .LVL573: +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6291 .loc 1 3943 22 view .LVU2139 + 6292 006e C0F88030 str r3, [r0, #128] +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6293 .loc 1 3946 7 is_stmt 1 view .LVU2140 +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6294 .loc 1 3946 20 is_stmt 0 view .LVU2141 + 6295 0072 0023 movs r3, #0 + 6296 0074 8366 str r3, [r0, #104] +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6297 .loc 1 3949 7 is_stmt 1 view .LVU2142 +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6298 .loc 1 3949 26 is_stmt 0 view .LVU2143 + 6299 0076 4366 str r3, [r0, #100] +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6300 .loc 1 3952 7 is_stmt 1 view .LVU2144 +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6301 .loc 1 3952 11 is_stmt 0 view .LVU2145 + 6302 0078 0368 ldr r3, [r0] + 6303 007a 5B68 ldr r3, [r3, #4] +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6304 .loc 1 3952 10 view .LVU2146 + 6305 007c 13F4000F tst r3, #8388608 + 6306 0080 08D0 beq .L251 + 6307 .L252: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 234 + + + 6308 .loc 1 3955 9 is_stmt 1 discriminator 1 view .LVU2147 + 6309 .LBB712: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6310 .loc 1 3955 9 discriminator 1 view .LVU2148 +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6311 .loc 1 3955 9 discriminator 1 view .LVU2149 +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6312 .loc 1 3955 9 discriminator 1 view .LVU2150 + 6313 0082 0268 ldr r2, [r0] + 6314 .LVL574: + 6315 .LBB713: + 6316 .LBI713: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6317 .loc 2 1068 31 view .LVU2151 + 6318 .LBB714: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6319 .loc 2 1070 5 view .LVU2152 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6320 .loc 2 1072 4 view .LVU2153 + 6321 .syntax unified + 6322 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6323 0084 52E8003F ldrex r3, [r2] + 6324 @ 0 "" 2 + 6325 .LVL575: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6326 .loc 2 1073 4 view .LVU2154 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6327 .loc 2 1073 4 is_stmt 0 view .LVU2155 + 6328 .thumb + 6329 .syntax unified + 6330 .LBE714: + 6331 .LBE713: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6332 .loc 1 3955 9 discriminator 1 view .LVU2156 + 6333 0088 23F08063 bic r3, r3, #67108864 + 6334 .LVL576: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6335 .loc 1 3955 9 is_stmt 1 discriminator 1 view .LVU2157 + 6336 .LBB715: + 6337 .LBI715: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6338 .loc 2 1119 31 view .LVU2158 + 6339 .LBB716: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6340 .loc 2 1121 4 view .LVU2159 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6341 .loc 2 1123 4 view .LVU2160 + 6342 .syntax unified + 6343 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6344 008c 42E80031 strex r1, r3, [r2] + 6345 @ 0 "" 2 + 6346 .LVL577: + 6347 .loc 2 1124 4 view .LVU2161 + 6348 .loc 2 1124 4 is_stmt 0 view .LVU2162 + 6349 .thumb + 6350 .syntax unified + 6351 .LBE716: + ARM GAS /tmp/ccqiorEF.s page 235 + + + 6352 .LBE715: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6353 .loc 1 3955 9 discriminator 1 view .LVU2163 + 6354 0090 0029 cmp r1, #0 + 6355 0092 F6D1 bne .L252 + 6356 .LVL578: + 6357 .L251: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6358 .loc 1 3955 9 discriminator 1 view .LVU2164 + 6359 .LBE712: +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6360 .loc 1 3955 9 is_stmt 1 discriminator 2 view .LVU2165 +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6361 .loc 1 3960 7 view .LVU2166 +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6362 .loc 1 3960 16 is_stmt 0 view .LVU2167 + 6363 0094 036E ldr r3, [r0, #96] +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6364 .loc 1 3960 10 view .LVU2168 + 6365 0096 012B cmp r3, #1 + 6366 0098 16D1 bne .L253 +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6367 .loc 1 3963 9 is_stmt 1 view .LVU2169 +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6368 .loc 1 3963 30 is_stmt 0 view .LVU2170 + 6369 009a 0023 movs r3, #0 + 6370 009c 0366 str r3, [r0, #96] + 6371 .L254: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6372 .loc 1 3966 9 is_stmt 1 discriminator 1 view .LVU2171 + 6373 .LBB717: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6374 .loc 1 3966 9 discriminator 1 view .LVU2172 +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6375 .loc 1 3966 9 discriminator 1 view .LVU2173 +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6376 .loc 1 3966 9 discriminator 1 view .LVU2174 + 6377 009e 0268 ldr r2, [r0] + 6378 .LVL579: + 6379 .LBB718: + 6380 .LBI718: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6381 .loc 2 1068 31 view .LVU2175 + 6382 .LBB719: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6383 .loc 2 1070 5 view .LVU2176 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6384 .loc 2 1072 4 view .LVU2177 + 6385 .syntax unified + 6386 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6387 00a0 52E8003F ldrex r3, [r2] + 6388 @ 0 "" 2 + 6389 .LVL580: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6390 .loc 2 1073 4 view .LVU2178 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6391 .loc 2 1073 4 is_stmt 0 view .LVU2179 + ARM GAS /tmp/ccqiorEF.s page 236 + + + 6392 .thumb + 6393 .syntax unified + 6394 .LBE719: + 6395 .LBE718: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6396 .loc 1 3966 9 discriminator 1 view .LVU2180 + 6397 00a4 23F01003 bic r3, r3, #16 + 6398 .LVL581: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6399 .loc 1 3966 9 is_stmt 1 discriminator 1 view .LVU2181 + 6400 .LBB720: + 6401 .LBI720: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6402 .loc 2 1119 31 view .LVU2182 + 6403 .LBB721: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6404 .loc 2 1121 4 view .LVU2183 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6405 .loc 2 1123 4 view .LVU2184 + 6406 .syntax unified + 6407 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6408 00a8 42E80031 strex r1, r3, [r2] + 6409 @ 0 "" 2 + 6410 .LVL582: + 6411 .loc 2 1124 4 view .LVU2185 + 6412 .loc 2 1124 4 is_stmt 0 view .LVU2186 + 6413 .thumb + 6414 .syntax unified + 6415 .LBE721: + 6416 .LBE720: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6417 .loc 1 3966 9 discriminator 1 view .LVU2187 + 6418 00ac 0029 cmp r1, #0 + 6419 00ae F6D1 bne .L254 + 6420 .LBE717: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6421 .loc 1 3966 9 is_stmt 1 discriminator 2 view .LVU2188 +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6422 .loc 1 3968 9 view .LVU2189 +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6423 .loc 1 3968 13 is_stmt 0 view .LVU2190 + 6424 00b0 0368 ldr r3, [r0] + 6425 .LVL583: +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6426 .loc 1 3968 13 view .LVU2191 + 6427 00b2 DA69 ldr r2, [r3, #28] +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6428 .loc 1 3968 12 view .LVU2192 + 6429 00b4 12F0100F tst r2, #16 + 6430 00b8 01D0 beq .L255 +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6431 .loc 1 3971 11 is_stmt 1 view .LVU2193 + 6432 00ba 1022 movs r2, #16 + 6433 00bc 1A62 str r2, [r3, #32] + 6434 .L255: +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 6435 .loc 1 3979 9 view .LVU2194 + ARM GAS /tmp/ccqiorEF.s page 237 + + + 6436 00be B0F85810 ldrh r1, [r0, #88] + 6437 00c2 FFF7FEFF bl HAL_UARTEx_RxEventCallback + 6438 .LVL584: +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 6439 .loc 1 3979 9 is_stmt 0 view .LVU2195 + 6440 00c6 A7E7 b .L246 + 6441 .LVL585: + 6442 .L253: +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6443 .loc 1 3990 9 is_stmt 1 view .LVU2196 + 6444 00c8 FFF7FEFF bl HAL_UART_RxCpltCallback + 6445 .LVL586: +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6446 .loc 1 3990 9 is_stmt 0 view .LVU2197 + 6447 00cc A4E7 b .L246 + 6448 .cfi_endproc + 6449 .LFE195: + 6451 .section .text.UART_DMARxHalfCplt,"ax",%progbits + 6452 .align 1 + 6453 .syntax unified + 6454 .thumb + 6455 .thumb_func + 6457 UART_DMARxHalfCplt: + 6458 .LVL587: + 6459 .LFB184: +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 6460 .loc 1 3482 1 is_stmt 1 view -0 + 6461 .cfi_startproc + 6462 @ args = 0, pretend = 0, frame = 0 + 6463 @ frame_needed = 0, uses_anonymous_args = 0 +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 6464 .loc 1 3482 1 is_stmt 0 view .LVU2199 + 6465 0000 08B5 push {r3, lr} + 6466 .cfi_def_cfa_offset 8 + 6467 .cfi_offset 3, -8 + 6468 .cfi_offset 14, -4 +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6469 .loc 1 3483 3 is_stmt 1 view .LVU2200 +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6470 .loc 1 3483 23 is_stmt 0 view .LVU2201 + 6471 0002 406A ldr r0, [r0, #36] + 6472 .LVL588: +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6473 .loc 1 3487 3 is_stmt 1 view .LVU2202 +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6474 .loc 1 3487 22 is_stmt 0 view .LVU2203 + 6475 0004 0123 movs r3, #1 + 6476 0006 4366 str r3, [r0, #100] +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6477 .loc 1 3491 3 is_stmt 1 view .LVU2204 +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6478 .loc 1 3491 12 is_stmt 0 view .LVU2205 + 6479 0008 036E ldr r3, [r0, #96] +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6480 .loc 1 3491 6 view .LVU2206 + 6481 000a 012B cmp r3, #1 + 6482 000c 02D0 beq .L262 + ARM GAS /tmp/ccqiorEF.s page 238 + + +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6483 .loc 1 3509 5 is_stmt 1 view .LVU2207 + 6484 000e FFF7FEFF bl HAL_UART_RxHalfCpltCallback + 6485 .LVL589: + 6486 .L258: +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6487 .loc 1 3512 1 is_stmt 0 view .LVU2208 + 6488 0012 08BD pop {r3, pc} + 6489 .LVL590: + 6490 .L262: +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6491 .loc 1 3498 5 is_stmt 1 view .LVU2209 +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6492 .loc 1 3498 44 is_stmt 0 view .LVU2210 + 6493 0014 B0F85810 ldrh r1, [r0, #88] +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6494 .loc 1 3498 5 view .LVU2211 + 6495 0018 4908 lsrs r1, r1, #1 + 6496 001a FFF7FEFF bl HAL_UARTEx_RxEventCallback + 6497 .LVL591: +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6498 .loc 1 3498 5 view .LVU2212 + 6499 001e F8E7 b .L258 + 6500 .cfi_endproc + 6501 .LFE184: + 6503 .section .text.UART_DMAReceiveCplt,"ax",%progbits + 6504 .align 1 + 6505 .syntax unified + 6506 .thumb + 6507 .thumb_func + 6509 UART_DMAReceiveCplt: + 6510 .LVL592: + 6511 .LFB183: +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 6512 .loc 1 3421 1 is_stmt 1 view -0 + 6513 .cfi_startproc + 6514 @ args = 0, pretend = 0, frame = 0 + 6515 @ frame_needed = 0, uses_anonymous_args = 0 +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); + 6516 .loc 1 3421 1 is_stmt 0 view .LVU2214 + 6517 0000 08B5 push {r3, lr} + 6518 .cfi_def_cfa_offset 8 + 6519 .cfi_offset 3, -8 + 6520 .cfi_offset 14, -4 + 6521 0002 0346 mov r3, r0 +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6522 .loc 1 3422 3 is_stmt 1 view .LVU2215 +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6523 .loc 1 3422 23 is_stmt 0 view .LVU2216 + 6524 0004 406A ldr r0, [r0, #36] + 6525 .LVL593: +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6526 .loc 1 3425 3 is_stmt 1 view .LVU2217 +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6527 .loc 1 3425 17 is_stmt 0 view .LVU2218 + 6528 0006 9B69 ldr r3, [r3, #24] + 6529 .LVL594: + ARM GAS /tmp/ccqiorEF.s page 239 + + +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6530 .loc 1 3425 6 view .LVU2219 + 6531 0008 202B cmp r3, #32 + 6532 000a 29D0 beq .L264 +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6533 .loc 1 3427 5 is_stmt 1 view .LVU2220 +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6534 .loc 1 3427 24 is_stmt 0 view .LVU2221 + 6535 000c 0023 movs r3, #0 + 6536 000e A0F85A30 strh r3, [r0, #90] @ movhi + 6537 .L265: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6538 .loc 1 3430 5 is_stmt 1 discriminator 1 view .LVU2222 + 6539 .LBB722: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6540 .loc 1 3430 5 discriminator 1 view .LVU2223 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6541 .loc 1 3430 5 discriminator 1 view .LVU2224 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6542 .loc 1 3430 5 discriminator 1 view .LVU2225 + 6543 0012 0268 ldr r2, [r0] + 6544 .LVL595: + 6545 .LBB723: + 6546 .LBI723: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6547 .loc 2 1068 31 view .LVU2226 + 6548 .LBB724: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6549 .loc 2 1070 5 view .LVU2227 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6550 .loc 2 1072 4 view .LVU2228 + 6551 .syntax unified + 6552 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6553 0014 52E8003F ldrex r3, [r2] + 6554 @ 0 "" 2 + 6555 .LVL596: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6556 .loc 2 1073 4 view .LVU2229 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6557 .loc 2 1073 4 is_stmt 0 view .LVU2230 + 6558 .thumb + 6559 .syntax unified + 6560 .LBE724: + 6561 .LBE723: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6562 .loc 1 3430 5 discriminator 1 view .LVU2231 + 6563 0018 23F48073 bic r3, r3, #256 + 6564 .LVL597: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6565 .loc 1 3430 5 is_stmt 1 discriminator 1 view .LVU2232 + 6566 .LBB725: + 6567 .LBI725: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6568 .loc 2 1119 31 view .LVU2233 + 6569 .LBB726: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6570 .loc 2 1121 4 view .LVU2234 + ARM GAS /tmp/ccqiorEF.s page 240 + + +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6571 .loc 2 1123 4 view .LVU2235 + 6572 .syntax unified + 6573 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6574 001c 42E80031 strex r1, r3, [r2] + 6575 @ 0 "" 2 + 6576 .LVL598: + 6577 .loc 2 1124 4 view .LVU2236 + 6578 .loc 2 1124 4 is_stmt 0 view .LVU2237 + 6579 .thumb + 6580 .syntax unified + 6581 .LBE726: + 6582 .LBE725: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6583 .loc 1 3430 5 discriminator 1 view .LVU2238 + 6584 0020 0029 cmp r1, #0 + 6585 0022 F6D1 bne .L265 + 6586 .LVL599: + 6587 .L266: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6588 .loc 1 3430 5 discriminator 1 view .LVU2239 + 6589 .LBE722: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 6590 .loc 1 3430 5 is_stmt 1 discriminator 2 view .LVU2240 +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6591 .loc 1 3431 5 discriminator 1 view .LVU2241 + 6592 .LBB727: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6593 .loc 1 3431 5 discriminator 1 view .LVU2242 +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6594 .loc 1 3431 5 discriminator 1 view .LVU2243 +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6595 .loc 1 3431 5 discriminator 1 view .LVU2244 + 6596 0024 0268 ldr r2, [r0] + 6597 .LVL600: + 6598 .LBB728: + 6599 .LBI728: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6600 .loc 2 1068 31 view .LVU2245 + 6601 .LBB729: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6602 .loc 2 1070 5 view .LVU2246 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6603 .loc 2 1072 4 view .LVU2247 + 6604 0026 02F10803 add r3, r2, #8 + 6605 .LVL601: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6606 .loc 2 1072 4 is_stmt 0 view .LVU2248 + 6607 .syntax unified + 6608 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6609 002a 53E8003F ldrex r3, [r3] + 6610 @ 0 "" 2 + 6611 .LVL602: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6612 .loc 2 1073 4 is_stmt 1 view .LVU2249 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6613 .loc 2 1073 4 is_stmt 0 view .LVU2250 + ARM GAS /tmp/ccqiorEF.s page 241 + + + 6614 .thumb + 6615 .syntax unified + 6616 .LBE729: + 6617 .LBE728: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6618 .loc 1 3431 5 discriminator 1 view .LVU2251 + 6619 002e 23F00103 bic r3, r3, #1 + 6620 .LVL603: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6621 .loc 1 3431 5 is_stmt 1 discriminator 1 view .LVU2252 + 6622 .LBB730: + 6623 .LBI730: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6624 .loc 2 1119 31 view .LVU2253 + 6625 .LBB731: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6626 .loc 2 1121 4 view .LVU2254 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6627 .loc 2 1123 4 view .LVU2255 + 6628 0032 0832 adds r2, r2, #8 + 6629 .LVL604: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6630 .loc 2 1123 4 is_stmt 0 view .LVU2256 + 6631 .syntax unified + 6632 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6633 0034 42E80031 strex r1, r3, [r2] + 6634 @ 0 "" 2 + 6635 .LVL605: + 6636 .loc 2 1124 4 is_stmt 1 view .LVU2257 + 6637 .loc 2 1124 4 is_stmt 0 view .LVU2258 + 6638 .thumb + 6639 .syntax unified + 6640 .LBE731: + 6641 .LBE730: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6642 .loc 1 3431 5 discriminator 1 view .LVU2259 + 6643 0038 0029 cmp r1, #0 + 6644 003a F3D1 bne .L266 + 6645 .LVL606: + 6646 .L267: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6647 .loc 1 3431 5 discriminator 1 view .LVU2260 + 6648 .LBE727: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6649 .loc 1 3431 5 is_stmt 1 discriminator 2 view .LVU2261 +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6650 .loc 1 3435 5 discriminator 1 view .LVU2262 + 6651 .LBB732: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6652 .loc 1 3435 5 discriminator 1 view .LVU2263 +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6653 .loc 1 3435 5 discriminator 1 view .LVU2264 +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6654 .loc 1 3435 5 discriminator 1 view .LVU2265 + 6655 003c 0268 ldr r2, [r0] + 6656 .LVL607: + 6657 .LBB733: + ARM GAS /tmp/ccqiorEF.s page 242 + + + 6658 .LBI733: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6659 .loc 2 1068 31 view .LVU2266 + 6660 .LBB734: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6661 .loc 2 1070 5 view .LVU2267 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6662 .loc 2 1072 4 view .LVU2268 + 6663 003e 02F10803 add r3, r2, #8 + 6664 .LVL608: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6665 .loc 2 1072 4 is_stmt 0 view .LVU2269 + 6666 .syntax unified + 6667 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6668 0042 53E8003F ldrex r3, [r3] + 6669 @ 0 "" 2 + 6670 .LVL609: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6671 .loc 2 1073 4 is_stmt 1 view .LVU2270 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6672 .loc 2 1073 4 is_stmt 0 view .LVU2271 + 6673 .thumb + 6674 .syntax unified + 6675 .LBE734: + 6676 .LBE733: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6677 .loc 1 3435 5 discriminator 1 view .LVU2272 + 6678 0046 23F04003 bic r3, r3, #64 + 6679 .LVL610: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6680 .loc 1 3435 5 is_stmt 1 discriminator 1 view .LVU2273 + 6681 .LBB735: + 6682 .LBI735: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6683 .loc 2 1119 31 view .LVU2274 + 6684 .LBB736: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6685 .loc 2 1121 4 view .LVU2275 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6686 .loc 2 1123 4 view .LVU2276 + 6687 004a 0832 adds r2, r2, #8 + 6688 .LVL611: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6689 .loc 2 1123 4 is_stmt 0 view .LVU2277 + 6690 .syntax unified + 6691 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6692 004c 42E80031 strex r1, r3, [r2] + 6693 @ 0 "" 2 + 6694 .LVL612: + 6695 .loc 2 1124 4 is_stmt 1 view .LVU2278 + 6696 .loc 2 1124 4 is_stmt 0 view .LVU2279 + 6697 .thumb + 6698 .syntax unified + 6699 .LBE736: + 6700 .LBE735: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6701 .loc 1 3435 5 discriminator 1 view .LVU2280 + ARM GAS /tmp/ccqiorEF.s page 243 + + + 6702 0050 0029 cmp r1, #0 + 6703 0052 F3D1 bne .L267 + 6704 .LBE732: +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6705 .loc 1 3435 5 is_stmt 1 discriminator 2 view .LVU2281 +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6706 .loc 1 3438 5 view .LVU2282 +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6707 .loc 1 3438 20 is_stmt 0 view .LVU2283 + 6708 0054 2023 movs r3, #32 + 6709 .LVL613: +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6710 .loc 1 3438 20 view .LVU2284 + 6711 0056 C0F88030 str r3, [r0, #128] +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6712 .loc 1 3441 5 is_stmt 1 view .LVU2285 +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6713 .loc 1 3441 14 is_stmt 0 view .LVU2286 + 6714 005a 036E ldr r3, [r0, #96] +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6715 .loc 1 3441 8 view .LVU2287 + 6716 005c 012B cmp r3, #1 + 6717 005e 07D0 beq .L268 + 6718 .LVL614: + 6719 .L264: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6720 .loc 1 3443 7 is_stmt 1 discriminator 2 view .LVU2288 +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6721 .loc 1 3449 3 view .LVU2289 +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6722 .loc 1 3449 22 is_stmt 0 view .LVU2290 + 6723 0060 0023 movs r3, #0 + 6724 0062 4366 str r3, [r0, #100] +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6725 .loc 1 3453 3 is_stmt 1 view .LVU2291 +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6726 .loc 1 3453 12 is_stmt 0 view .LVU2292 + 6727 0064 036E ldr r3, [r0, #96] +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6728 .loc 1 3453 6 view .LVU2293 + 6729 0066 012B cmp r3, #1 + 6730 0068 0CD0 beq .L272 +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6731 .loc 1 3471 5 is_stmt 1 view .LVU2294 + 6732 006a FFF7FEFF bl HAL_UART_RxCpltCallback + 6733 .LVL615: + 6734 .L263: +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6735 .loc 1 3474 1 is_stmt 0 view .LVU2295 + 6736 006e 08BD pop {r3, pc} + 6737 .LVL616: + 6738 .L268: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6739 .loc 1 3443 7 is_stmt 1 discriminator 1 view .LVU2296 + 6740 .LBB737: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6741 .loc 1 3443 7 discriminator 1 view .LVU2297 + ARM GAS /tmp/ccqiorEF.s page 244 + + +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6742 .loc 1 3443 7 discriminator 1 view .LVU2298 +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6743 .loc 1 3443 7 discriminator 1 view .LVU2299 + 6744 0070 0268 ldr r2, [r0] + 6745 .LVL617: + 6746 .LBB738: + 6747 .LBI738: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6748 .loc 2 1068 31 view .LVU2300 + 6749 .LBB739: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6750 .loc 2 1070 5 view .LVU2301 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6751 .loc 2 1072 4 view .LVU2302 + 6752 .syntax unified + 6753 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6754 0072 52E8003F ldrex r3, [r2] + 6755 @ 0 "" 2 + 6756 .LVL618: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6757 .loc 2 1073 4 view .LVU2303 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 6758 .loc 2 1073 4 is_stmt 0 view .LVU2304 + 6759 .thumb + 6760 .syntax unified + 6761 .LBE739: + 6762 .LBE738: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6763 .loc 1 3443 7 discriminator 1 view .LVU2305 + 6764 0076 23F01003 bic r3, r3, #16 + 6765 .LVL619: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6766 .loc 1 3443 7 is_stmt 1 discriminator 1 view .LVU2306 + 6767 .LBB740: + 6768 .LBI740: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 6769 .loc 2 1119 31 view .LVU2307 + 6770 .LBB741: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 6771 .loc 2 1121 4 view .LVU2308 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 6772 .loc 2 1123 4 view .LVU2309 + 6773 .syntax unified + 6774 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6775 007a 42E80031 strex r1, r3, [r2] + 6776 @ 0 "" 2 + 6777 .LVL620: + 6778 .loc 2 1124 4 view .LVU2310 + 6779 .loc 2 1124 4 is_stmt 0 view .LVU2311 + 6780 .thumb + 6781 .syntax unified + 6782 .LBE741: + 6783 .LBE740: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6784 .loc 1 3443 7 discriminator 1 view .LVU2312 + 6785 007e 0029 cmp r1, #0 + ARM GAS /tmp/ccqiorEF.s page 245 + + + 6786 0080 F6D1 bne .L268 + 6787 0082 EDE7 b .L264 + 6788 .LVL621: + 6789 .L272: +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6790 .loc 1 3443 7 discriminator 1 view .LVU2313 + 6791 .LBE737: +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6792 .loc 1 3460 5 is_stmt 1 view .LVU2314 + 6793 0084 B0F85810 ldrh r1, [r0, #88] + 6794 0088 FFF7FEFF bl HAL_UARTEx_RxEventCallback + 6795 .LVL622: +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ + 6796 .loc 1 3460 5 is_stmt 0 view .LVU2315 + 6797 008c EFE7 b .L263 + 6798 .cfi_endproc + 6799 .LFE183: + 6801 .section .text.HAL_UART_ReceiverTimeout_Config,"ax",%progbits + 6802 .align 1 + 6803 .global HAL_UART_ReceiverTimeout_Config + 6804 .syntax unified + 6805 .thumb + 6806 .thumb_func + 6808 HAL_UART_ReceiverTimeout_Config: + 6809 .LVL623: + 6810 .LFB162: +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue)); + 6811 .loc 1 2591 1 is_stmt 1 view -0 + 6812 .cfi_startproc + 6813 @ args = 0, pretend = 0, frame = 0 + 6814 @ frame_needed = 0, uses_anonymous_args = 0 + 6815 @ link register save eliminated. +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue); + 6816 .loc 1 2592 3 view .LVU2317 +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6817 .loc 1 2593 3 view .LVU2318 + 6818 0000 0268 ldr r2, [r0] + 6819 0002 5369 ldr r3, [r2, #20] + 6820 0004 03F07F43 and r3, r3, #-16777216 + 6821 0008 0B43 orrs r3, r3, r1 + 6822 000a 5361 str r3, [r2, #20] +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6823 .loc 1 2594 1 is_stmt 0 view .LVU2319 + 6824 000c 7047 bx lr + 6825 .cfi_endproc + 6826 .LFE162: + 6828 .section .text.HAL_UART_EnableReceiverTimeout,"ax",%progbits + 6829 .align 1 + 6830 .global HAL_UART_EnableReceiverTimeout + 6831 .syntax unified + 6832 .thumb + 6833 .thumb_func + 6835 HAL_UART_EnableReceiverTimeout: + 6836 .LVL624: + 6837 .LFB163: +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) + 6838 .loc 1 2603 1 is_stmt 1 view -0 + ARM GAS /tmp/ccqiorEF.s page 246 + + + 6839 .cfi_startproc + 6840 @ args = 0, pretend = 0, frame = 0 + 6841 @ frame_needed = 0, uses_anonymous_args = 0 + 6842 @ link register save eliminated. +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6843 .loc 1 2604 3 view .LVU2321 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6844 .loc 1 2604 12 is_stmt 0 view .LVU2322 + 6845 0000 C36F ldr r3, [r0, #124] +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6846 .loc 1 2604 6 view .LVU2323 + 6847 0002 202B cmp r3, #32 + 6848 0004 14D1 bne .L276 +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6849 .loc 1 2607 5 is_stmt 1 view .LVU2324 +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6850 .loc 1 2607 5 view .LVU2325 + 6851 0006 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 6852 000a 012B cmp r3, #1 + 6853 000c 12D0 beq .L277 +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6854 .loc 1 2607 5 discriminator 2 view .LVU2326 + 6855 000e 0123 movs r3, #1 + 6856 0010 80F87830 strb r3, [r0, #120] +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6857 .loc 1 2607 5 discriminator 2 view .LVU2327 +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6858 .loc 1 2609 5 view .LVU2328 +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6859 .loc 1 2609 19 is_stmt 0 view .LVU2329 + 6860 0014 2423 movs r3, #36 + 6861 0016 C367 str r3, [r0, #124] +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6862 .loc 1 2612 5 is_stmt 1 view .LVU2330 + 6863 0018 0268 ldr r2, [r0] + 6864 001a 5368 ldr r3, [r2, #4] + 6865 001c 43F40003 orr r3, r3, #8388608 + 6866 0020 5360 str r3, [r2, #4] +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6867 .loc 1 2614 5 view .LVU2331 +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6868 .loc 1 2614 19 is_stmt 0 view .LVU2332 + 6869 0022 2023 movs r3, #32 + 6870 0024 C367 str r3, [r0, #124] +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6871 .loc 1 2617 5 is_stmt 1 view .LVU2333 +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6872 .loc 1 2617 5 view .LVU2334 + 6873 0026 0023 movs r3, #0 + 6874 0028 80F87830 strb r3, [r0, #120] +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6875 .loc 1 2617 5 view .LVU2335 +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6876 .loc 1 2619 5 view .LVU2336 +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6877 .loc 1 2619 12 is_stmt 0 view .LVU2337 + 6878 002c 1846 mov r0, r3 + ARM GAS /tmp/ccqiorEF.s page 247 + + + 6879 .LVL625: +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6880 .loc 1 2619 12 view .LVU2338 + 6881 002e 7047 bx lr + 6882 .LVL626: + 6883 .L276: +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6884 .loc 1 2623 12 view .LVU2339 + 6885 0030 0220 movs r0, #2 + 6886 .LVL627: +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6887 .loc 1 2623 12 view .LVU2340 + 6888 0032 7047 bx lr + 6889 .LVL628: + 6890 .L277: +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6891 .loc 1 2607 5 discriminator 1 view .LVU2341 + 6892 0034 0220 movs r0, #2 + 6893 .LVL629: +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6894 .loc 1 2625 1 view .LVU2342 + 6895 0036 7047 bx lr + 6896 .cfi_endproc + 6897 .LFE163: + 6899 .section .text.HAL_UART_DisableReceiverTimeout,"ax",%progbits + 6900 .align 1 + 6901 .global HAL_UART_DisableReceiverTimeout + 6902 .syntax unified + 6903 .thumb + 6904 .thumb_func + 6906 HAL_UART_DisableReceiverTimeout: + 6907 .LVL630: + 6908 .LFB164: +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_READY) + 6909 .loc 1 2634 1 is_stmt 1 view -0 + 6910 .cfi_startproc + 6911 @ args = 0, pretend = 0, frame = 0 + 6912 @ frame_needed = 0, uses_anonymous_args = 0 + 6913 @ link register save eliminated. +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6914 .loc 1 2635 3 view .LVU2344 +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6915 .loc 1 2635 12 is_stmt 0 view .LVU2345 + 6916 0000 C36F ldr r3, [r0, #124] +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 6917 .loc 1 2635 6 view .LVU2346 + 6918 0002 202B cmp r3, #32 + 6919 0004 14D1 bne .L280 +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6920 .loc 1 2638 5 is_stmt 1 view .LVU2347 +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6921 .loc 1 2638 5 view .LVU2348 + 6922 0006 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 6923 000a 012B cmp r3, #1 + 6924 000c 12D0 beq .L281 +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6925 .loc 1 2638 5 discriminator 2 view .LVU2349 + ARM GAS /tmp/ccqiorEF.s page 248 + + + 6926 000e 0123 movs r3, #1 + 6927 0010 80F87830 strb r3, [r0, #120] +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6928 .loc 1 2638 5 discriminator 2 view .LVU2350 +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6929 .loc 1 2640 5 view .LVU2351 +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6930 .loc 1 2640 19 is_stmt 0 view .LVU2352 + 6931 0014 2423 movs r3, #36 + 6932 0016 C367 str r3, [r0, #124] +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6933 .loc 1 2643 5 is_stmt 1 view .LVU2353 + 6934 0018 0268 ldr r2, [r0] + 6935 001a 5368 ldr r3, [r2, #4] + 6936 001c 23F40003 bic r3, r3, #8388608 + 6937 0020 5360 str r3, [r2, #4] +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6938 .loc 1 2645 5 view .LVU2354 +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6939 .loc 1 2645 19 is_stmt 0 view .LVU2355 + 6940 0022 2023 movs r3, #32 + 6941 0024 C367 str r3, [r0, #124] +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6942 .loc 1 2648 5 is_stmt 1 view .LVU2356 +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6943 .loc 1 2648 5 view .LVU2357 + 6944 0026 0023 movs r3, #0 + 6945 0028 80F87830 strb r3, [r0, #120] +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6946 .loc 1 2648 5 view .LVU2358 +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6947 .loc 1 2650 5 view .LVU2359 +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6948 .loc 1 2650 12 is_stmt 0 view .LVU2360 + 6949 002c 1846 mov r0, r3 + 6950 .LVL631: +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6951 .loc 1 2650 12 view .LVU2361 + 6952 002e 7047 bx lr + 6953 .LVL632: + 6954 .L280: +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6955 .loc 1 2654 12 view .LVU2362 + 6956 0030 0220 movs r0, #2 + 6957 .LVL633: +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6958 .loc 1 2654 12 view .LVU2363 + 6959 0032 7047 bx lr + 6960 .LVL634: + 6961 .L281: +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6962 .loc 1 2638 5 discriminator 1 view .LVU2364 + 6963 0034 0220 movs r0, #2 + 6964 .LVL635: +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6965 .loc 1 2656 1 view .LVU2365 + 6966 0036 7047 bx lr + ARM GAS /tmp/ccqiorEF.s page 249 + + + 6967 .cfi_endproc + 6968 .LFE164: + 6970 .section .text.HAL_MultiProcessor_EnterMuteMode,"ax",%progbits + 6971 .align 1 + 6972 .global HAL_MultiProcessor_EnterMuteMode + 6973 .syntax unified + 6974 .thumb + 6975 .thumb_func + 6977 HAL_MultiProcessor_EnterMuteMode: + 6978 .LVL636: + 6979 .LFB167: +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST); + 6980 .loc 1 2705 1 is_stmt 1 view -0 + 6981 .cfi_startproc + 6982 @ args = 0, pretend = 0, frame = 0 + 6983 @ frame_needed = 0, uses_anonymous_args = 0 + 6984 @ link register save eliminated. +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 6985 .loc 1 2706 3 view .LVU2367 + 6986 0000 0268 ldr r2, [r0] + 6987 0002 9369 ldr r3, [r2, #24] + 6988 0004 43F00403 orr r3, r3, #4 + 6989 0008 9361 str r3, [r2, #24] +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 6990 .loc 1 2707 1 is_stmt 0 view .LVU2368 + 6991 000a 7047 bx lr + 6992 .cfi_endproc + 6993 .LFE167: + 6995 .section .text.HAL_HalfDuplex_EnableTransmitter,"ax",%progbits + 6996 .align 1 + 6997 .global HAL_HalfDuplex_EnableTransmitter + 6998 .syntax unified + 6999 .thumb + 7000 .thumb_func + 7002 HAL_HalfDuplex_EnableTransmitter: + 7003 .LVL637: + 7004 .LFB168: +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 7005 .loc 1 2715 1 is_stmt 1 view -0 + 7006 .cfi_startproc + 7007 @ args = 0, pretend = 0, frame = 0 + 7008 @ frame_needed = 0, uses_anonymous_args = 0 + 7009 @ link register save eliminated. +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7010 .loc 1 2716 3 view .LVU2370 +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7011 .loc 1 2716 3 view .LVU2371 + 7012 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 7013 0004 012B cmp r3, #1 + 7014 0006 1DD0 beq .L287 +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7015 .loc 1 2716 3 discriminator 2 view .LVU2372 + 7016 0008 0123 movs r3, #1 + 7017 000a 80F87830 strb r3, [r0, #120] +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7018 .loc 1 2716 3 discriminator 2 view .LVU2373 +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 250 + + + 7019 .loc 1 2717 3 view .LVU2374 +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7020 .loc 1 2717 17 is_stmt 0 view .LVU2375 + 7021 000e 2423 movs r3, #36 + 7022 0010 C367 str r3, [r0, #124] + 7023 .L285: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7024 .loc 1 2720 3 is_stmt 1 discriminator 1 view .LVU2376 + 7025 .LBB742: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7026 .loc 1 2720 3 discriminator 1 view .LVU2377 +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7027 .loc 1 2720 3 discriminator 1 view .LVU2378 +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7028 .loc 1 2720 3 discriminator 1 view .LVU2379 + 7029 0012 0268 ldr r2, [r0] + 7030 .LVL638: + 7031 .LBB743: + 7032 .LBI743: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7033 .loc 2 1068 31 view .LVU2380 + 7034 .LBB744: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7035 .loc 2 1070 5 view .LVU2381 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7036 .loc 2 1072 4 view .LVU2382 + 7037 .syntax unified + 7038 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7039 0014 52E8003F ldrex r3, [r2] + 7040 @ 0 "" 2 + 7041 .LVL639: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7042 .loc 2 1073 4 view .LVU2383 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7043 .loc 2 1073 4 is_stmt 0 view .LVU2384 + 7044 .thumb + 7045 .syntax unified + 7046 .LBE744: + 7047 .LBE743: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7048 .loc 1 2720 3 discriminator 1 view .LVU2385 + 7049 0018 23F00C03 bic r3, r3, #12 + 7050 .LVL640: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7051 .loc 1 2720 3 is_stmt 1 discriminator 1 view .LVU2386 + 7052 .LBB745: + 7053 .LBI745: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7054 .loc 2 1119 31 view .LVU2387 + 7055 .LBB746: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7056 .loc 2 1121 4 view .LVU2388 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7057 .loc 2 1123 4 view .LVU2389 + 7058 .syntax unified + 7059 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7060 001c 42E80031 strex r1, r3, [r2] + ARM GAS /tmp/ccqiorEF.s page 251 + + + 7061 @ 0 "" 2 + 7062 .LVL641: + 7063 .loc 2 1124 4 view .LVU2390 + 7064 .loc 2 1124 4 is_stmt 0 view .LVU2391 + 7065 .thumb + 7066 .syntax unified + 7067 .LBE746: + 7068 .LBE745: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7069 .loc 1 2720 3 discriminator 1 view .LVU2392 + 7070 0020 0029 cmp r1, #0 + 7071 0022 F6D1 bne .L285 + 7072 .LVL642: + 7073 .L286: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7074 .loc 1 2720 3 discriminator 1 view .LVU2393 + 7075 .LBE742: +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7076 .loc 1 2720 3 is_stmt 1 discriminator 2 view .LVU2394 +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7077 .loc 1 2723 3 discriminator 1 view .LVU2395 + 7078 .LBB747: +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7079 .loc 1 2723 3 discriminator 1 view .LVU2396 +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7080 .loc 1 2723 3 discriminator 1 view .LVU2397 +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7081 .loc 1 2723 3 discriminator 1 view .LVU2398 + 7082 0024 0268 ldr r2, [r0] + 7083 .LVL643: + 7084 .LBB748: + 7085 .LBI748: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7086 .loc 2 1068 31 view .LVU2399 + 7087 .LBB749: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7088 .loc 2 1070 5 view .LVU2400 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7089 .loc 2 1072 4 view .LVU2401 + 7090 .syntax unified + 7091 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7092 0026 52E8003F ldrex r3, [r2] + 7093 @ 0 "" 2 + 7094 .LVL644: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7095 .loc 2 1073 4 view .LVU2402 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7096 .loc 2 1073 4 is_stmt 0 view .LVU2403 + 7097 .thumb + 7098 .syntax unified + 7099 .LBE749: + 7100 .LBE748: +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7101 .loc 1 2723 3 discriminator 1 view .LVU2404 + 7102 002a 43F00803 orr r3, r3, #8 + 7103 .LVL645: +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 252 + + + 7104 .loc 1 2723 3 is_stmt 1 discriminator 1 view .LVU2405 + 7105 .LBB750: + 7106 .LBI750: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7107 .loc 2 1119 31 view .LVU2406 + 7108 .LBB751: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7109 .loc 2 1121 4 view .LVU2407 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7110 .loc 2 1123 4 view .LVU2408 + 7111 .syntax unified + 7112 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7113 002e 42E80031 strex r1, r3, [r2] + 7114 @ 0 "" 2 + 7115 .LVL646: + 7116 .loc 2 1124 4 view .LVU2409 + 7117 .loc 2 1124 4 is_stmt 0 view .LVU2410 + 7118 .thumb + 7119 .syntax unified + 7120 .LBE751: + 7121 .LBE750: +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7122 .loc 1 2723 3 discriminator 1 view .LVU2411 + 7123 0032 0029 cmp r1, #0 + 7124 0034 F6D1 bne .L286 + 7125 .LBE747: +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7126 .loc 1 2723 3 is_stmt 1 discriminator 2 view .LVU2412 +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7127 .loc 1 2725 3 view .LVU2413 +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7128 .loc 1 2725 17 is_stmt 0 view .LVU2414 + 7129 0036 2023 movs r3, #32 + 7130 .LVL647: +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7131 .loc 1 2725 17 view .LVU2415 + 7132 0038 C367 str r3, [r0, #124] +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7133 .loc 1 2727 3 is_stmt 1 view .LVU2416 +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7134 .loc 1 2727 3 view .LVU2417 + 7135 003a 0023 movs r3, #0 + 7136 003c 80F87830 strb r3, [r0, #120] +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7137 .loc 1 2727 3 view .LVU2418 +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7138 .loc 1 2729 3 view .LVU2419 +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7139 .loc 1 2729 10 is_stmt 0 view .LVU2420 + 7140 0040 1846 mov r0, r3 + 7141 .LVL648: +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7142 .loc 1 2729 10 view .LVU2421 + 7143 0042 7047 bx lr + 7144 .LVL649: + 7145 .L287: +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + ARM GAS /tmp/ccqiorEF.s page 253 + + + 7146 .loc 1 2716 3 discriminator 1 view .LVU2422 + 7147 0044 0220 movs r0, #2 + 7148 .LVL650: +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7149 .loc 1 2730 1 view .LVU2423 + 7150 0046 7047 bx lr + 7151 .cfi_endproc + 7152 .LFE168: + 7154 .section .text.HAL_HalfDuplex_EnableReceiver,"ax",%progbits + 7155 .align 1 + 7156 .global HAL_HalfDuplex_EnableReceiver + 7157 .syntax unified + 7158 .thumb + 7159 .thumb_func + 7161 HAL_HalfDuplex_EnableReceiver: + 7162 .LVL651: + 7163 .LFB169: +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 7164 .loc 1 2738 1 is_stmt 1 view -0 + 7165 .cfi_startproc + 7166 @ args = 0, pretend = 0, frame = 0 + 7167 @ frame_needed = 0, uses_anonymous_args = 0 + 7168 @ link register save eliminated. +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7169 .loc 1 2739 3 view .LVU2425 +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7170 .loc 1 2739 3 view .LVU2426 + 7171 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 7172 0004 012B cmp r3, #1 + 7173 0006 1DD0 beq .L292 +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7174 .loc 1 2739 3 discriminator 2 view .LVU2427 + 7175 0008 0123 movs r3, #1 + 7176 000a 80F87830 strb r3, [r0, #120] +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7177 .loc 1 2739 3 discriminator 2 view .LVU2428 +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7178 .loc 1 2740 3 view .LVU2429 +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7179 .loc 1 2740 17 is_stmt 0 view .LVU2430 + 7180 000e 2423 movs r3, #36 + 7181 0010 C367 str r3, [r0, #124] + 7182 .L290: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7183 .loc 1 2743 3 is_stmt 1 discriminator 1 view .LVU2431 + 7184 .LBB752: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7185 .loc 1 2743 3 discriminator 1 view .LVU2432 +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7186 .loc 1 2743 3 discriminator 1 view .LVU2433 +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7187 .loc 1 2743 3 discriminator 1 view .LVU2434 + 7188 0012 0268 ldr r2, [r0] + 7189 .LVL652: + 7190 .LBB753: + 7191 .LBI753: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccqiorEF.s page 254 + + + 7192 .loc 2 1068 31 view .LVU2435 + 7193 .LBB754: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7194 .loc 2 1070 5 view .LVU2436 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7195 .loc 2 1072 4 view .LVU2437 + 7196 .syntax unified + 7197 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7198 0014 52E8003F ldrex r3, [r2] + 7199 @ 0 "" 2 + 7200 .LVL653: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7201 .loc 2 1073 4 view .LVU2438 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7202 .loc 2 1073 4 is_stmt 0 view .LVU2439 + 7203 .thumb + 7204 .syntax unified + 7205 .LBE754: + 7206 .LBE753: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7207 .loc 1 2743 3 discriminator 1 view .LVU2440 + 7208 0018 23F00C03 bic r3, r3, #12 + 7209 .LVL654: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7210 .loc 1 2743 3 is_stmt 1 discriminator 1 view .LVU2441 + 7211 .LBB755: + 7212 .LBI755: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7213 .loc 2 1119 31 view .LVU2442 + 7214 .LBB756: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7215 .loc 2 1121 4 view .LVU2443 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7216 .loc 2 1123 4 view .LVU2444 + 7217 .syntax unified + 7218 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7219 001c 42E80031 strex r1, r3, [r2] + 7220 @ 0 "" 2 + 7221 .LVL655: + 7222 .loc 2 1124 4 view .LVU2445 + 7223 .loc 2 1124 4 is_stmt 0 view .LVU2446 + 7224 .thumb + 7225 .syntax unified + 7226 .LBE756: + 7227 .LBE755: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7228 .loc 1 2743 3 discriminator 1 view .LVU2447 + 7229 0020 0029 cmp r1, #0 + 7230 0022 F6D1 bne .L290 + 7231 .LVL656: + 7232 .L291: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7233 .loc 1 2743 3 discriminator 1 view .LVU2448 + 7234 .LBE752: +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7235 .loc 1 2743 3 is_stmt 1 discriminator 2 view .LVU2449 +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 255 + + + 7236 .loc 1 2746 3 discriminator 1 view .LVU2450 + 7237 .LBB757: +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7238 .loc 1 2746 3 discriminator 1 view .LVU2451 +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7239 .loc 1 2746 3 discriminator 1 view .LVU2452 +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7240 .loc 1 2746 3 discriminator 1 view .LVU2453 + 7241 0024 0268 ldr r2, [r0] + 7242 .LVL657: + 7243 .LBB758: + 7244 .LBI758: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7245 .loc 2 1068 31 view .LVU2454 + 7246 .LBB759: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7247 .loc 2 1070 5 view .LVU2455 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7248 .loc 2 1072 4 view .LVU2456 + 7249 .syntax unified + 7250 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7251 0026 52E8003F ldrex r3, [r2] + 7252 @ 0 "" 2 + 7253 .LVL658: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7254 .loc 2 1073 4 view .LVU2457 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 7255 .loc 2 1073 4 is_stmt 0 view .LVU2458 + 7256 .thumb + 7257 .syntax unified + 7258 .LBE759: + 7259 .LBE758: +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7260 .loc 1 2746 3 discriminator 1 view .LVU2459 + 7261 002a 43F00403 orr r3, r3, #4 + 7262 .LVL659: +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7263 .loc 1 2746 3 is_stmt 1 discriminator 1 view .LVU2460 + 7264 .LBB760: + 7265 .LBI760: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 7266 .loc 2 1119 31 view .LVU2461 + 7267 .LBB761: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 7268 .loc 2 1121 4 view .LVU2462 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 7269 .loc 2 1123 4 view .LVU2463 + 7270 .syntax unified + 7271 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7272 002e 42E80031 strex r1, r3, [r2] + 7273 @ 0 "" 2 + 7274 .LVL660: + 7275 .loc 2 1124 4 view .LVU2464 + 7276 .loc 2 1124 4 is_stmt 0 view .LVU2465 + 7277 .thumb + 7278 .syntax unified + 7279 .LBE761: + ARM GAS /tmp/ccqiorEF.s page 256 + + + 7280 .LBE760: +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7281 .loc 1 2746 3 discriminator 1 view .LVU2466 + 7282 0032 0029 cmp r1, #0 + 7283 0034 F6D1 bne .L291 + 7284 .LBE757: +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7285 .loc 1 2746 3 is_stmt 1 discriminator 2 view .LVU2467 +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7286 .loc 1 2748 3 view .LVU2468 +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7287 .loc 1 2748 17 is_stmt 0 view .LVU2469 + 7288 0036 2023 movs r3, #32 + 7289 .LVL661: +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7290 .loc 1 2748 17 view .LVU2470 + 7291 0038 C367 str r3, [r0, #124] +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7292 .loc 1 2750 3 is_stmt 1 view .LVU2471 +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7293 .loc 1 2750 3 view .LVU2472 + 7294 003a 0023 movs r3, #0 + 7295 003c 80F87830 strb r3, [r0, #120] +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7296 .loc 1 2750 3 view .LVU2473 +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7297 .loc 1 2752 3 view .LVU2474 +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7298 .loc 1 2752 10 is_stmt 0 view .LVU2475 + 7299 0040 1846 mov r0, r3 + 7300 .LVL662: +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7301 .loc 1 2752 10 view .LVU2476 + 7302 0042 7047 bx lr + 7303 .LVL663: + 7304 .L292: +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; + 7305 .loc 1 2739 3 discriminator 1 view .LVU2477 + 7306 0044 0220 movs r0, #2 + 7307 .LVL664: +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7308 .loc 1 2753 1 view .LVU2478 + 7309 0046 7047 bx lr + 7310 .cfi_endproc + 7311 .LFE169: + 7313 .section .text.HAL_LIN_SendBreak,"ax",%progbits + 7314 .align 1 + 7315 .global HAL_LIN_SendBreak + 7316 .syntax unified + 7317 .thumb + 7318 .thumb_func + 7320 HAL_LIN_SendBreak: + 7321 .LVL665: + 7322 .LFB170: +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the parameters */ + 7323 .loc 1 2762 1 is_stmt 1 view -0 + 7324 .cfi_startproc + ARM GAS /tmp/ccqiorEF.s page 257 + + + 7325 @ args = 0, pretend = 0, frame = 0 + 7326 @ frame_needed = 0, uses_anonymous_args = 0 + 7327 @ link register save eliminated. +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7328 .loc 1 2764 3 view .LVU2480 +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7329 .loc 1 2766 3 view .LVU2481 +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7330 .loc 1 2766 3 view .LVU2482 + 7331 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 7332 0004 012B cmp r3, #1 + 7333 0006 10D0 beq .L295 +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7334 .loc 1 2766 3 discriminator 2 view .LVU2483 + 7335 0008 0123 movs r3, #1 + 7336 000a 80F87830 strb r3, [r0, #120] +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7337 .loc 1 2766 3 discriminator 2 view .LVU2484 +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7338 .loc 1 2768 3 view .LVU2485 +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7339 .loc 1 2768 17 is_stmt 0 view .LVU2486 + 7340 000e 2423 movs r3, #36 + 7341 0010 C367 str r3, [r0, #124] +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7342 .loc 1 2771 3 is_stmt 1 view .LVU2487 + 7343 0012 0268 ldr r2, [r0] + 7344 0014 9369 ldr r3, [r2, #24] + 7345 0016 43F00203 orr r3, r3, #2 + 7346 001a 9361 str r3, [r2, #24] +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7347 .loc 1 2773 3 view .LVU2488 +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7348 .loc 1 2773 17 is_stmt 0 view .LVU2489 + 7349 001c 2023 movs r3, #32 + 7350 001e C367 str r3, [r0, #124] +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7351 .loc 1 2775 3 is_stmt 1 view .LVU2490 +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7352 .loc 1 2775 3 view .LVU2491 + 7353 0020 0023 movs r3, #0 + 7354 0022 80F87830 strb r3, [r0, #120] +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7355 .loc 1 2775 3 view .LVU2492 +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7356 .loc 1 2777 3 view .LVU2493 +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7357 .loc 1 2777 10 is_stmt 0 view .LVU2494 + 7358 0026 1846 mov r0, r3 + 7359 .LVL666: +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7360 .loc 1 2777 10 view .LVU2495 + 7361 0028 7047 bx lr + 7362 .LVL667: + 7363 .L295: +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7364 .loc 1 2766 3 discriminator 1 view .LVU2496 + ARM GAS /tmp/ccqiorEF.s page 258 + + + 7365 002a 0220 movs r0, #2 + 7366 .LVL668: +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7367 .loc 1 2778 1 view .LVU2497 + 7368 002c 7047 bx lr + 7369 .cfi_endproc + 7370 .LFE170: + 7372 .section .text.HAL_UART_GetState,"ax",%progbits + 7373 .align 1 + 7374 .global HAL_UART_GetState + 7375 .syntax unified + 7376 .thumb + 7377 .thumb_func + 7379 HAL_UART_GetState: + 7380 .LVL669: + 7381 .LFB171: +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t temp1; + 7382 .loc 1 2807 1 is_stmt 1 view -0 + 7383 .cfi_startproc + 7384 @ args = 0, pretend = 0, frame = 0 + 7385 @ frame_needed = 0, uses_anonymous_args = 0 + 7386 @ link register save eliminated. +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t temp2; + 7387 .loc 1 2808 3 view .LVU2499 +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** temp1 = huart->gState; + 7388 .loc 1 2809 3 view .LVU2500 +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** temp2 = huart->RxState; + 7389 .loc 1 2810 3 view .LVU2501 +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** temp2 = huart->RxState; + 7390 .loc 1 2810 9 is_stmt 0 view .LVU2502 + 7391 0000 C26F ldr r2, [r0, #124] + 7392 .LVL670: +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7393 .loc 1 2811 3 is_stmt 1 view .LVU2503 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7394 .loc 1 2811 9 is_stmt 0 view .LVU2504 + 7395 0002 D0F88000 ldr r0, [r0, #128] + 7396 .LVL671: +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7397 .loc 1 2813 3 is_stmt 1 view .LVU2505 +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7398 .loc 1 2814 1 is_stmt 0 view .LVU2506 + 7399 0006 1043 orrs r0, r0, r2 + 7400 .LVL672: +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7401 .loc 1 2814 1 view .LVU2507 + 7402 0008 7047 bx lr + 7403 .cfi_endproc + 7404 .LFE171: + 7406 .section .text.HAL_UART_GetError,"ax",%progbits + 7407 .align 1 + 7408 .global HAL_UART_GetError + 7409 .syntax unified + 7410 .thumb + 7411 .thumb_func + 7413 HAL_UART_GetError: + 7414 .LVL673: + ARM GAS /tmp/ccqiorEF.s page 259 + + + 7415 .LFB172: +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** return huart->ErrorCode; + 7416 .loc 1 2823 1 is_stmt 1 view -0 + 7417 .cfi_startproc + 7418 @ args = 0, pretend = 0, frame = 0 + 7419 @ frame_needed = 0, uses_anonymous_args = 0 + 7420 @ link register save eliminated. +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7421 .loc 1 2824 3 view .LVU2509 +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7422 .loc 1 2824 15 is_stmt 0 view .LVU2510 + 7423 0000 D0F88400 ldr r0, [r0, #132] + 7424 .LVL674: +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /** + 7425 .loc 1 2825 1 view .LVU2511 + 7426 0004 7047 bx lr + 7427 .cfi_endproc + 7428 .LFE172: + 7430 .section .text.UART_SetConfig,"ax",%progbits + 7431 .align 1 + 7432 .global UART_SetConfig + 7433 .syntax unified + 7434 .thumb + 7435 .thumb_func + 7437 UART_SetConfig: + 7438 .LVL675: + 7439 .LFB173: +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tmpreg; + 7440 .loc 1 2867 1 is_stmt 1 view -0 + 7441 .cfi_startproc + 7442 @ args = 0, pretend = 0, frame = 0 + 7443 @ frame_needed = 0, uses_anonymous_args = 0 +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tmpreg; + 7444 .loc 1 2867 1 is_stmt 0 view .LVU2513 + 7445 0000 10B5 push {r4, lr} + 7446 .cfi_def_cfa_offset 8 + 7447 .cfi_offset 4, -8 + 7448 .cfi_offset 14, -4 + 7449 0002 0446 mov r4, r0 +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t brrtemp; + 7450 .loc 1 2868 3 is_stmt 1 view .LVU2514 +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** UART_ClockSourceTypeDef clocksource; + 7451 .loc 1 2869 3 view .LVU2515 +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t usartdiv; + 7452 .loc 1 2870 3 view .LVU2516 +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** HAL_StatusTypeDef ret = HAL_OK; + 7453 .loc 1 2871 3 view .LVU2517 +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t pclk; + 7454 .loc 1 2872 3 view .LVU2518 + 7455 .LVL676: +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7456 .loc 1 2873 3 view .LVU2519 +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); + 7457 .loc 1 2876 3 view .LVU2520 +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); + 7458 .loc 1 2877 3 view .LVU2521 +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling)); + ARM GAS /tmp/ccqiorEF.s page 260 + + + 7459 .loc 1 2878 3 view .LVU2522 +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7460 .loc 1 2879 3 view .LVU2523 +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_MODE(huart->Init.Mode)); + 7461 .loc 1 2881 3 view .LVU2524 +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); + 7462 .loc 1 2882 3 view .LVU2525 +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); + 7463 .loc 1 2883 3 view .LVU2526 +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7464 .loc 1 2884 3 view .LVU2527 +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7465 .loc 1 2893 3 view .LVU2528 +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7466 .loc 1 2893 33 is_stmt 0 view .LVU2529 + 7467 0004 8368 ldr r3, [r0, #8] +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7468 .loc 1 2893 58 view .LVU2530 + 7469 0006 0269 ldr r2, [r0, #16] +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7470 .loc 1 2893 45 view .LVU2531 + 7471 0008 1A43 orrs r2, r2, r3 +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7472 .loc 1 2893 79 view .LVU2532 + 7473 000a 4369 ldr r3, [r0, #20] +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7474 .loc 1 2893 66 view .LVU2533 + 7475 000c 1A43 orrs r2, r2, r3 +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7476 .loc 1 2893 98 view .LVU2534 + 7477 000e C369 ldr r3, [r0, #28] +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); + 7478 .loc 1 2893 10 view .LVU2535 + 7479 0010 1A43 orrs r2, r2, r3 + 7480 .LVL677: +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7481 .loc 1 2894 3 is_stmt 1 view .LVU2536 + 7482 0012 0168 ldr r1, [r0] + 7483 0014 0B68 ldr r3, [r1] + 7484 0016 23F41643 bic r3, r3, #38400 + 7485 001a 23F00C03 bic r3, r3, #12 + 7486 001e 1343 orrs r3, r3, r2 + 7487 0020 0B60 str r3, [r1] +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7488 .loc 1 2899 3 view .LVU2537 + 7489 0022 0268 ldr r2, [r0] + 7490 .LVL678: +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7491 .loc 1 2899 3 is_stmt 0 view .LVU2538 + 7492 0024 5368 ldr r3, [r2, #4] + 7493 0026 23F44053 bic r3, r3, #12288 + 7494 002a C168 ldr r1, [r0, #12] + 7495 002c 0B43 orrs r3, r3, r1 + 7496 002e 5360 str r3, [r2, #4] +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7497 .loc 1 2907 3 is_stmt 1 view .LVU2539 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 261 + + + 7498 .loc 1 2907 10 is_stmt 0 view .LVU2540 + 7499 0030 8269 ldr r2, [r0, #24] + 7500 .LVL679: +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); + 7501 .loc 1 2909 3 is_stmt 1 view .LVU2541 +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); + 7502 .loc 1 2909 24 is_stmt 0 view .LVU2542 + 7503 0032 036A ldr r3, [r0, #32] +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); + 7504 .loc 1 2909 10 view .LVU2543 + 7505 0034 1A43 orrs r2, r2, r3 + 7506 .LVL680: +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7507 .loc 1 2910 3 is_stmt 1 view .LVU2544 + 7508 0036 0168 ldr r1, [r0] + 7509 0038 8B68 ldr r3, [r1, #8] + 7510 003a 23F43063 bic r3, r3, #2816 + 7511 003e 1343 orrs r3, r3, r2 + 7512 0040 8B60 str r3, [r1, #8] +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7513 .loc 1 2914 3 view .LVU2545 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7514 .loc 1 2914 3 view .LVU2546 + 7515 0042 0368 ldr r3, [r0] + 7516 0044 7B4A ldr r2, .L363 + 7517 .LVL681: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7518 .loc 1 2914 3 is_stmt 0 view .LVU2547 + 7519 0046 9342 cmp r3, r2 + 7520 0048 1BD0 beq .L357 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7521 .loc 1 2914 3 is_stmt 1 discriminator 2 view .LVU2548 + 7522 004a 7B4A ldr r2, .L363+4 + 7523 004c 9342 cmp r3, r2 + 7524 004e 2AD0 beq .L358 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7525 .loc 1 2914 3 discriminator 9 view .LVU2549 + 7526 0050 7A4A ldr r2, .L363+8 + 7527 0052 9342 cmp r3, r2 + 7528 0054 3BD0 beq .L359 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7529 .loc 1 2914 3 discriminator 16 view .LVU2550 + 7530 0056 7A4A ldr r2, .L363+12 + 7531 0058 9342 cmp r3, r2 + 7532 005a 4BD0 beq .L360 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7533 .loc 1 2914 3 discriminator 23 view .LVU2551 + 7534 005c 794A ldr r2, .L363+16 + 7535 005e 9342 cmp r3, r2 + 7536 0060 5BD0 beq .L361 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7537 .loc 1 2914 3 is_stmt 0 discriminator 30 view .LVU2552 + 7538 0062 1023 movs r3, #16 + 7539 .L301: + 7540 .LVL682: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7541 .loc 1 2914 3 is_stmt 1 discriminator 36 view .LVU2553 + ARM GAS /tmp/ccqiorEF.s page 262 + + +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7542 .loc 1 2916 3 view .LVU2554 +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7543 .loc 1 2916 18 is_stmt 0 view .LVU2555 + 7544 0064 E069 ldr r0, [r4, #28] + 7545 .LVL683: +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7546 .loc 1 2916 6 view .LVU2556 + 7547 0066 B0F5004F cmp r0, #32768 + 7548 006a 00F08B80 beq .L362 +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7549 .loc 1 2959 5 is_stmt 1 view .LVU2557 + 7550 006e 082B cmp r3, #8 + 7551 0070 00F2DA80 bhi .L351 + 7552 0074 DFE803F0 tbb [pc, r3] + 7553 .L323: + 7554 0078 B3 .byte (.L327-.L323)/2 + 7555 0079 C9 .byte (.L326-.L323)/2 + 7556 007a B1 .byte (.L325-.L323)/2 + 7557 007b D8 .byte (.L351-.L323)/2 + 7558 007c CC .byte (.L324-.L323)/2 + 7559 007d D8 .byte (.L351-.L323)/2 + 7560 007e D8 .byte (.L351-.L323)/2 + 7561 007f D8 .byte (.L351-.L323)/2 + 7562 0080 CF .byte (.L352-.L323)/2 + 7563 .LVL684: + 7564 0081 00 .p2align 1 + 7565 .L357: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7566 .loc 1 2914 3 discriminator 1 view .LVU2558 + 7567 0082 714B ldr r3, .L363+20 + 7568 0084 1B6B ldr r3, [r3, #48] + 7569 0086 03F00303 and r3, r3, #3 + 7570 008a 032B cmp r3, #3 + 7571 008c 09D8 bhi .L300 + 7572 008e DFE803F0 tbb [pc, r3] + 7573 .L302: + 7574 0092 02 .byte (.L305-.L302)/2 + 7575 0093 04 .byte (.L304-.L302)/2 + 7576 0094 06 .byte (.L303-.L302)/2 + 7577 0095 57 .byte (.L329-.L302)/2 + 7578 .p2align 1 + 7579 .L305: + 7580 0096 0123 movs r3, #1 + 7581 0098 E4E7 b .L301 + 7582 .L304: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7583 .loc 1 2914 3 discriminator 5 view .LVU2559 + 7584 .LVL685: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7585 .loc 1 2914 3 discriminator 5 view .LVU2560 + 7586 009a 0423 movs r3, #4 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7587 .loc 1 2914 3 is_stmt 0 view .LVU2561 + 7588 009c E2E7 b .L301 + 7589 .LVL686: + 7590 .L303: + ARM GAS /tmp/ccqiorEF.s page 263 + + +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7591 .loc 1 2914 3 is_stmt 1 discriminator 6 view .LVU2562 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7592 .loc 1 2914 3 discriminator 6 view .LVU2563 + 7593 009e 0823 movs r3, #8 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7594 .loc 1 2914 3 is_stmt 0 view .LVU2564 + 7595 00a0 E0E7 b .L301 + 7596 .LVL687: + 7597 .L300: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7598 .loc 1 2914 3 is_stmt 1 discriminator 3 view .LVU2565 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7599 .loc 1 2914 3 discriminator 3 view .LVU2566 + 7600 00a2 1023 movs r3, #16 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7601 .loc 1 2914 3 is_stmt 0 view .LVU2567 + 7602 00a4 DEE7 b .L301 + 7603 .LVL688: + 7604 .L358: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7605 .loc 1 2914 3 is_stmt 1 discriminator 8 view .LVU2568 + 7606 00a6 684B ldr r3, .L363+20 + 7607 00a8 1B6B ldr r3, [r3, #48] + 7608 00aa 03F44033 and r3, r3, #196608 + 7609 00ae B3F5003F cmp r3, #131072 + 7610 00b2 47D0 beq .L330 + 7611 00b4 06D8 bhi .L307 + 7612 00b6 002B cmp r3, #0 + 7613 00b8 46D0 beq .L331 + 7614 00ba B3F5803F cmp r3, #65536 + 7615 00be 45D1 bne .L332 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7616 .loc 1 2914 3 is_stmt 0 discriminator 12 view .LVU2569 + 7617 00c0 0423 movs r3, #4 + 7618 00c2 CFE7 b .L301 + 7619 .L307: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7620 .loc 1 2914 3 discriminator 8 view .LVU2570 + 7621 00c4 B3F5403F cmp r3, #196608 + 7622 00c8 42D1 bne .L333 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7623 .loc 1 2914 3 discriminator 14 view .LVU2571 + 7624 00ca 0223 movs r3, #2 + 7625 00cc CAE7 b .L301 + 7626 .L359: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7627 .loc 1 2914 3 is_stmt 1 discriminator 15 view .LVU2572 + 7628 00ce 5E4B ldr r3, .L363+20 + 7629 00d0 1B6B ldr r3, [r3, #48] + 7630 00d2 03F44023 and r3, r3, #786432 + 7631 00d6 B3F5002F cmp r3, #524288 + 7632 00da 3BD0 beq .L334 + 7633 00dc 05D8 bhi .L309 + 7634 00de DBB3 cbz r3, .L335 + 7635 00e0 B3F5802F cmp r3, #262144 + 7636 00e4 3AD1 bne .L336 + ARM GAS /tmp/ccqiorEF.s page 264 + + +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7637 .loc 1 2914 3 is_stmt 0 discriminator 19 view .LVU2573 + 7638 00e6 0423 movs r3, #4 + 7639 00e8 BCE7 b .L301 + 7640 .L309: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7641 .loc 1 2914 3 discriminator 15 view .LVU2574 + 7642 00ea B3F5402F cmp r3, #786432 + 7643 00ee 37D1 bne .L337 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7644 .loc 1 2914 3 discriminator 21 view .LVU2575 + 7645 00f0 0223 movs r3, #2 + 7646 00f2 B7E7 b .L301 + 7647 .L360: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7648 .loc 1 2914 3 is_stmt 1 discriminator 22 view .LVU2576 + 7649 00f4 544B ldr r3, .L363+20 + 7650 00f6 1B6B ldr r3, [r3, #48] + 7651 00f8 03F44013 and r3, r3, #3145728 + 7652 00fc B3F5001F cmp r3, #2097152 + 7653 0100 30D0 beq .L338 + 7654 0102 05D8 bhi .L311 + 7655 0104 83B3 cbz r3, .L339 + 7656 0106 B3F5801F cmp r3, #1048576 + 7657 010a 2FD1 bne .L340 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7658 .loc 1 2914 3 is_stmt 0 discriminator 26 view .LVU2577 + 7659 010c 0423 movs r3, #4 + 7660 010e A9E7 b .L301 + 7661 .L311: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7662 .loc 1 2914 3 discriminator 22 view .LVU2578 + 7663 0110 B3F5401F cmp r3, #3145728 + 7664 0114 2CD1 bne .L341 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7665 .loc 1 2914 3 discriminator 28 view .LVU2579 + 7666 0116 0223 movs r3, #2 + 7667 0118 A4E7 b .L301 + 7668 .L361: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7669 .loc 1 2914 3 is_stmt 1 discriminator 29 view .LVU2580 + 7670 011a 4B4B ldr r3, .L363+20 + 7671 011c 1B6B ldr r3, [r3, #48] + 7672 011e 03F44003 and r3, r3, #12582912 + 7673 0122 B3F5000F cmp r3, #8388608 + 7674 0126 25D0 beq .L343 + 7675 0128 05D8 bhi .L312 + 7676 012a 2BB3 cbz r3, .L344 + 7677 012c B3F5800F cmp r3, #4194304 + 7678 0130 24D1 bne .L345 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7679 .loc 1 2914 3 is_stmt 0 discriminator 33 view .LVU2581 + 7680 0132 0423 movs r3, #4 + 7681 0134 96E7 b .L301 + 7682 .L312: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7683 .loc 1 2914 3 discriminator 29 view .LVU2582 + ARM GAS /tmp/ccqiorEF.s page 265 + + + 7684 0136 B3F5400F cmp r3, #12582912 + 7685 013a 21D1 bne .L346 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7686 .loc 1 2914 3 discriminator 35 view .LVU2583 + 7687 013c 0223 movs r3, #2 + 7688 013e 91E7 b .L301 + 7689 .L329: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7690 .loc 1 2914 3 discriminator 7 view .LVU2584 + 7691 0140 0223 movs r3, #2 + 7692 0142 8FE7 b .L301 + 7693 .L330: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7694 .loc 1 2914 3 discriminator 13 view .LVU2585 + 7695 0144 0823 movs r3, #8 + 7696 0146 8DE7 b .L301 + 7697 .L331: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7698 .loc 1 2914 3 discriminator 8 view .LVU2586 + 7699 0148 0023 movs r3, #0 + 7700 014a 8BE7 b .L301 + 7701 .L332: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7702 .loc 1 2914 3 discriminator 10 view .LVU2587 + 7703 014c 1023 movs r3, #16 + 7704 014e 89E7 b .L301 + 7705 .L333: + 7706 0150 1023 movs r3, #16 + 7707 0152 87E7 b .L301 + 7708 .L334: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7709 .loc 1 2914 3 discriminator 20 view .LVU2588 + 7710 0154 0823 movs r3, #8 + 7711 0156 85E7 b .L301 + 7712 .L335: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7713 .loc 1 2914 3 discriminator 15 view .LVU2589 + 7714 0158 0023 movs r3, #0 + 7715 015a 83E7 b .L301 + 7716 .L336: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7717 .loc 1 2914 3 discriminator 17 view .LVU2590 + 7718 015c 1023 movs r3, #16 + 7719 015e 81E7 b .L301 + 7720 .L337: + 7721 0160 1023 movs r3, #16 + 7722 0162 7FE7 b .L301 + 7723 .L338: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7724 .loc 1 2914 3 discriminator 27 view .LVU2591 + 7725 0164 0823 movs r3, #8 + 7726 0166 7DE7 b .L301 + 7727 .L339: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7728 .loc 1 2914 3 discriminator 22 view .LVU2592 + 7729 0168 0023 movs r3, #0 + 7730 016a 7BE7 b .L301 + ARM GAS /tmp/ccqiorEF.s page 266 + + + 7731 .L340: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7732 .loc 1 2914 3 discriminator 24 view .LVU2593 + 7733 016c 1023 movs r3, #16 + 7734 016e 79E7 b .L301 + 7735 .L341: + 7736 0170 1023 movs r3, #16 + 7737 0172 77E7 b .L301 + 7738 .L343: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7739 .loc 1 2914 3 discriminator 34 view .LVU2594 + 7740 0174 0823 movs r3, #8 + 7741 0176 75E7 b .L301 + 7742 .L344: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7743 .loc 1 2914 3 discriminator 29 view .LVU2595 + 7744 0178 0023 movs r3, #0 + 7745 017a 73E7 b .L301 + 7746 .L345: +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7747 .loc 1 2914 3 discriminator 31 view .LVU2596 + 7748 017c 1023 movs r3, #16 + 7749 017e 71E7 b .L301 + 7750 .L346: + 7751 0180 1023 movs r3, #16 + 7752 0182 6FE7 b .L301 + 7753 .LVL689: + 7754 .L362: +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7755 .loc 1 2918 5 is_stmt 1 view .LVU2597 + 7756 0184 082B cmp r3, #8 + 7757 0186 49D8 bhi .L347 + 7758 0188 DFE803F0 tbb [pc, r3] + 7759 .L316: + 7760 018c 05 .byte (.L320-.L316)/2 + 7761 018d 1F .byte (.L319-.L316)/2 + 7762 018e 25 .byte (.L348-.L316)/2 + 7763 018f 48 .byte (.L347-.L316)/2 + 7764 0190 22 .byte (.L317-.L316)/2 + 7765 0191 48 .byte (.L347-.L316)/2 + 7766 0192 48 .byte (.L347-.L316)/2 + 7767 0193 48 .byte (.L347-.L316)/2 + 7768 0194 09 .byte (.L318-.L316)/2 + 7769 0195 00 .p2align 1 + 7770 .L320: +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7771 .loc 1 2921 9 view .LVU2598 +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7772 .loc 1 2921 16 is_stmt 0 view .LVU2599 + 7773 0196 FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 7774 .LVL690: +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK2: + 7775 .loc 1 2922 9 is_stmt 1 view .LVU2600 + 7776 .L321: +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7777 .loc 1 2942 5 view .LVU2601 +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 267 + + + 7778 .loc 1 2942 8 is_stmt 0 view .LVU2602 + 7779 019a 0028 cmp r0, #0 + 7780 019c 40D0 beq .L349 + 7781 .LVL691: + 7782 .L318: +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 7783 .loc 1 2944 7 is_stmt 1 view .LVU2603 +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 7784 .loc 1 2944 29 is_stmt 0 view .LVU2604 + 7785 019e 6268 ldr r2, [r4, #4] + 7786 01a0 5308 lsrs r3, r2, #1 + 7787 01a2 03EB4003 add r3, r3, r0, lsl #1 +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 7788 .loc 1 2944 16 view .LVU2605 + 7789 01a6 B3FBF2F3 udiv r3, r3, r2 + 7790 .LVL692: +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7791 .loc 1 2945 7 is_stmt 1 view .LVU2606 +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7792 .loc 1 2945 38 is_stmt 0 view .LVU2607 + 7793 01aa A3F11001 sub r1, r3, #16 +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7794 .loc 1 2945 10 view .LVU2608 + 7795 01ae 4FF6EF72 movw r2, #65519 + 7796 01b2 9142 cmp r1, r2 + 7797 01b4 36D8 bhi .L350 +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + 7798 .loc 1 2947 9 is_stmt 1 view .LVU2609 +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + 7799 .loc 1 2947 19 is_stmt 0 view .LVU2610 + 7800 01b6 9AB2 uxth r2, r3 +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + 7801 .loc 1 2947 17 view .LVU2611 + 7802 01b8 22F00F02 bic r2, r2, #15 + 7803 .LVL693: +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->BRR = brrtemp; + 7804 .loc 1 2948 9 is_stmt 1 view .LVU2612 +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->BRR = brrtemp; + 7805 .loc 1 2948 20 is_stmt 0 view .LVU2613 + 7806 01bc C3F34203 ubfx r3, r3, #1, #3 + 7807 .LVL694: +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->Instance->BRR = brrtemp; + 7808 .loc 1 2948 17 view .LVU2614 + 7809 01c0 1343 orrs r3, r3, r2 + 7810 .LVL695: +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7811 .loc 1 2949 9 is_stmt 1 view .LVU2615 +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7812 .loc 1 2949 14 is_stmt 0 view .LVU2616 + 7813 01c2 2268 ldr r2, [r4] +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7814 .loc 1 2949 30 view .LVU2617 + 7815 01c4 D360 str r3, [r2, #12] + 7816 01c6 0020 movs r0, #0 + 7817 01c8 1BE0 b .L314 + 7818 .LVL696: + 7819 .L319: + ARM GAS /tmp/ccqiorEF.s page 268 + + +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7820 .loc 1 2924 9 is_stmt 1 view .LVU2618 +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7821 .loc 1 2924 16 is_stmt 0 view .LVU2619 + 7822 01ca FFF7FEFF bl HAL_RCC_GetPCLK2Freq + 7823 .LVL697: +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_HSI: + 7824 .loc 1 2925 9 is_stmt 1 view .LVU2620 + 7825 01ce E4E7 b .L321 + 7826 .LVL698: + 7827 .L317: +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7828 .loc 1 2930 9 view .LVU2621 +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7829 .loc 1 2930 16 is_stmt 0 view .LVU2622 + 7830 01d0 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 7831 .LVL699: +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_LSE: + 7832 .loc 1 2931 9 is_stmt 1 view .LVU2623 + 7833 01d4 E1E7 b .L321 + 7834 .LVL700: + 7835 .L348: +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7836 .loc 1 2927 14 is_stmt 0 view .LVU2624 + 7837 01d6 1D48 ldr r0, .L363+24 + 7838 01d8 E1E7 b .L318 + 7839 .L325: +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7840 .loc 1 2959 5 view .LVU2625 + 7841 01da 1C48 ldr r0, .L363+24 + 7842 01dc 02E0 b .L322 + 7843 .L327: +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7844 .loc 1 2962 9 is_stmt 1 view .LVU2626 +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7845 .loc 1 2962 16 is_stmt 0 view .LVU2627 + 7846 01de FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 7847 .LVL701: +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK2: + 7848 .loc 1 2963 9 is_stmt 1 view .LVU2628 + 7849 .L328: +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7850 .loc 1 2982 5 view .LVU2629 +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7851 .loc 1 2982 8 is_stmt 0 view .LVU2630 + 7852 01e2 18B3 cbz r0, .L353 + 7853 .LVL702: + 7854 .L322: +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 7855 .loc 1 2985 7 is_stmt 1 view .LVU2631 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 7856 .loc 1 2985 29 is_stmt 0 view .LVU2632 + 7857 01e4 6368 ldr r3, [r4, #4] + 7858 01e6 00EB5300 add r0, r0, r3, lsr #1 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) + 7859 .loc 1 2985 16 view .LVU2633 + 7860 01ea B0FBF3F0 udiv r0, r0, r3 + ARM GAS /tmp/ccqiorEF.s page 269 + + + 7861 .LVL703: +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7862 .loc 1 2986 7 is_stmt 1 view .LVU2634 +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7863 .loc 1 2986 38 is_stmt 0 view .LVU2635 + 7864 01ee A0F11002 sub r2, r0, #16 +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7865 .loc 1 2986 10 view .LVU2636 + 7866 01f2 4FF6EF73 movw r3, #65519 + 7867 01f6 9A42 cmp r2, r3 + 7868 01f8 1AD8 bhi .L354 +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7869 .loc 1 2988 9 is_stmt 1 view .LVU2637 +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7870 .loc 1 2988 14 is_stmt 0 view .LVU2638 + 7871 01fa 2368 ldr r3, [r4] + 7872 01fc 80B2 uxth r0, r0 + 7873 .LVL704: +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7874 .loc 1 2988 30 view .LVU2639 + 7875 01fe D860 str r0, [r3, #12] + 7876 0200 0020 movs r0, #0 + 7877 .LVL705: + 7878 .L314: +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 7879 .loc 1 2999 3 is_stmt 1 view .LVU2640 +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxISR = NULL; + 7880 .loc 1 2999 16 is_stmt 0 view .LVU2641 + 7881 0202 0023 movs r3, #0 + 7882 0204 A366 str r3, [r4, #104] +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7883 .loc 1 3000 3 is_stmt 1 view .LVU2642 +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7884 .loc 1 3000 16 is_stmt 0 view .LVU2643 + 7885 0206 E366 str r3, [r4, #108] +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7886 .loc 1 3002 3 is_stmt 1 view .LVU2644 +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7887 .loc 1 3003 1 is_stmt 0 view .LVU2645 + 7888 0208 10BD pop {r4, pc} + 7889 .LVL706: + 7890 .L326: +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7891 .loc 1 2965 9 is_stmt 1 view .LVU2646 +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7892 .loc 1 2965 16 is_stmt 0 view .LVU2647 + 7893 020a FFF7FEFF bl HAL_RCC_GetPCLK2Freq + 7894 .LVL707: +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_HSI: + 7895 .loc 1 2966 9 is_stmt 1 view .LVU2648 + 7896 020e E8E7 b .L328 + 7897 .LVL708: + 7898 .L324: +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7899 .loc 1 2971 9 view .LVU2649 +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7900 .loc 1 2971 16 is_stmt 0 view .LVU2650 + ARM GAS /tmp/ccqiorEF.s page 270 + + + 7901 0210 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 7902 .LVL709: +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** case UART_CLOCKSOURCE_LSE: + 7903 .loc 1 2972 9 is_stmt 1 view .LVU2651 + 7904 0214 E5E7 b .L328 + 7905 .LVL710: + 7906 .L352: +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** break; + 7907 .loc 1 2974 14 is_stmt 0 view .LVU2652 + 7908 0216 4FF40040 mov r0, #32768 + 7909 021a E3E7 b .L322 + 7910 .L347: +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7911 .loc 1 2918 5 view .LVU2653 + 7912 021c 0120 movs r0, #1 + 7913 021e F0E7 b .L314 + 7914 .LVL711: + 7915 .L349: +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7916 .loc 1 2918 5 view .LVU2654 + 7917 0220 0020 movs r0, #0 + 7918 .LVL712: +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7919 .loc 1 2918 5 view .LVU2655 + 7920 0222 EEE7 b .L314 + 7921 .LVL713: + 7922 .L350: +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7923 .loc 1 2953 13 view .LVU2656 + 7924 0224 0120 movs r0, #1 + 7925 0226 ECE7 b .L314 + 7926 .LVL714: + 7927 .L351: +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7928 .loc 1 2959 5 view .LVU2657 + 7929 0228 0120 movs r0, #1 + 7930 022a EAE7 b .L314 + 7931 .LVL715: + 7932 .L353: +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7933 .loc 1 2959 5 view .LVU2658 + 7934 022c 0020 movs r0, #0 + 7935 .LVL716: +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7936 .loc 1 2959 5 view .LVU2659 + 7937 022e E8E7 b .L314 + 7938 .LVL717: + 7939 .L354: +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7940 .loc 1 2992 13 view .LVU2660 + 7941 0230 0120 movs r0, #1 + 7942 .LVL718: +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7943 .loc 1 2992 13 view .LVU2661 + 7944 0232 E6E7 b .L314 + 7945 .L364: + 7946 .align 2 + ARM GAS /tmp/ccqiorEF.s page 271 + + + 7947 .L363: + 7948 0234 00380140 .word 1073821696 + 7949 0238 00440040 .word 1073759232 + 7950 023c 00480040 .word 1073760256 + 7951 0240 004C0040 .word 1073761280 + 7952 0244 00500040 .word 1073762304 + 7953 0248 00100240 .word 1073876992 + 7954 024c 00127A00 .word 8000000 + 7955 .cfi_endproc + 7956 .LFE173: + 7958 .section .text.UART_AdvFeatureConfig,"ax",%progbits + 7959 .align 1 + 7960 .global UART_AdvFeatureConfig + 7961 .syntax unified + 7962 .thumb + 7963 .thumb_func + 7965 UART_AdvFeatureConfig: + 7966 .LVL719: + 7967 .LFB174: +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check whether the set of advanced features to configure is properly set */ + 7968 .loc 1 3011 1 is_stmt 1 view -0 + 7969 .cfi_startproc + 7970 @ args = 0, pretend = 0, frame = 0 + 7971 @ frame_needed = 0, uses_anonymous_args = 0 + 7972 @ link register save eliminated. +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 7973 .loc 1 3013 3 view .LVU2663 +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7974 .loc 1 3016 3 view .LVU2664 +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7975 .loc 1 3016 7 is_stmt 0 view .LVU2665 + 7976 0000 436A ldr r3, [r0, #36] +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7977 .loc 1 3016 6 view .LVU2666 + 7978 0002 13F0010F tst r3, #1 + 7979 0006 06D0 beq .L366 +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); + 7980 .loc 1 3018 5 is_stmt 1 view .LVU2667 +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7981 .loc 1 3019 5 view .LVU2668 + 7982 0008 0268 ldr r2, [r0] + 7983 000a 5368 ldr r3, [r2, #4] + 7984 000c 23F40033 bic r3, r3, #131072 + 7985 0010 816A ldr r1, [r0, #40] + 7986 0012 0B43 orrs r3, r3, r1 + 7987 0014 5360 str r3, [r2, #4] + 7988 .L366: +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7989 .loc 1 3023 3 view .LVU2669 +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7990 .loc 1 3023 7 is_stmt 0 view .LVU2670 + 7991 0016 436A ldr r3, [r0, #36] +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 7992 .loc 1 3023 6 view .LVU2671 + 7993 0018 13F0020F tst r3, #2 + 7994 001c 06D0 beq .L367 +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); + ARM GAS /tmp/ccqiorEF.s page 272 + + + 7995 .loc 1 3025 5 is_stmt 1 view .LVU2672 +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 7996 .loc 1 3026 5 view .LVU2673 + 7997 001e 0268 ldr r2, [r0] + 7998 0020 5368 ldr r3, [r2, #4] + 7999 0022 23F48033 bic r3, r3, #65536 + 8000 0026 C16A ldr r1, [r0, #44] + 8001 0028 0B43 orrs r3, r3, r1 + 8002 002a 5360 str r3, [r2, #4] + 8003 .L367: +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8004 .loc 1 3030 3 view .LVU2674 +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8005 .loc 1 3030 7 is_stmt 0 view .LVU2675 + 8006 002c 436A ldr r3, [r0, #36] +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8007 .loc 1 3030 6 view .LVU2676 + 8008 002e 13F0040F tst r3, #4 + 8009 0032 06D0 beq .L368 +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); + 8010 .loc 1 3032 5 is_stmt 1 view .LVU2677 +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8011 .loc 1 3033 5 view .LVU2678 + 8012 0034 0268 ldr r2, [r0] + 8013 0036 5368 ldr r3, [r2, #4] + 8014 0038 23F48023 bic r3, r3, #262144 + 8015 003c 016B ldr r1, [r0, #48] + 8016 003e 0B43 orrs r3, r3, r1 + 8017 0040 5360 str r3, [r2, #4] + 8018 .L368: +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8019 .loc 1 3037 3 view .LVU2679 +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8020 .loc 1 3037 7 is_stmt 0 view .LVU2680 + 8021 0042 436A ldr r3, [r0, #36] +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8022 .loc 1 3037 6 view .LVU2681 + 8023 0044 13F0080F tst r3, #8 + 8024 0048 06D0 beq .L369 +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + 8025 .loc 1 3039 5 is_stmt 1 view .LVU2682 +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8026 .loc 1 3040 5 view .LVU2683 + 8027 004a 0268 ldr r2, [r0] + 8028 004c 5368 ldr r3, [r2, #4] + 8029 004e 23F40043 bic r3, r3, #32768 + 8030 0052 416B ldr r1, [r0, #52] + 8031 0054 0B43 orrs r3, r3, r1 + 8032 0056 5360 str r3, [r2, #4] + 8033 .L369: +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8034 .loc 1 3044 3 view .LVU2684 +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8035 .loc 1 3044 7 is_stmt 0 view .LVU2685 + 8036 0058 436A ldr r3, [r0, #36] +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8037 .loc 1 3044 6 view .LVU2686 + ARM GAS /tmp/ccqiorEF.s page 273 + + + 8038 005a 13F0100F tst r3, #16 + 8039 005e 06D0 beq .L370 +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); + 8040 .loc 1 3046 5 is_stmt 1 view .LVU2687 +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8041 .loc 1 3047 5 view .LVU2688 + 8042 0060 0268 ldr r2, [r0] + 8043 0062 9368 ldr r3, [r2, #8] + 8044 0064 23F48053 bic r3, r3, #4096 + 8045 0068 816B ldr r1, [r0, #56] + 8046 006a 0B43 orrs r3, r3, r1 + 8047 006c 9360 str r3, [r2, #8] + 8048 .L370: +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8049 .loc 1 3051 3 view .LVU2689 +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8050 .loc 1 3051 7 is_stmt 0 view .LVU2690 + 8051 006e 436A ldr r3, [r0, #36] +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8052 .loc 1 3051 6 view .LVU2691 + 8053 0070 13F0200F tst r3, #32 + 8054 0074 06D0 beq .L371 +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); + 8055 .loc 1 3053 5 is_stmt 1 view .LVU2692 +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8056 .loc 1 3054 5 view .LVU2693 + 8057 0076 0268 ldr r2, [r0] + 8058 0078 9368 ldr r3, [r2, #8] + 8059 007a 23F40053 bic r3, r3, #8192 + 8060 007e C16B ldr r1, [r0, #60] + 8061 0080 0B43 orrs r3, r3, r1 + 8062 0082 9360 str r3, [r2, #8] + 8063 .L371: +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8064 .loc 1 3058 3 view .LVU2694 +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8065 .loc 1 3058 7 is_stmt 0 view .LVU2695 + 8066 0084 436A ldr r3, [r0, #36] +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8067 .loc 1 3058 6 view .LVU2696 + 8068 0086 13F0400F tst r3, #64 + 8069 008a 0AD0 beq .L372 +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); + 8070 .loc 1 3060 5 is_stmt 1 view .LVU2697 +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); + 8071 .loc 1 3061 5 view .LVU2698 +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* set auto Baudrate detection parameters if detection is enabled */ + 8072 .loc 1 3062 5 view .LVU2699 + 8073 008c 0268 ldr r2, [r0] + 8074 008e 5368 ldr r3, [r2, #4] + 8075 0090 23F48013 bic r3, r3, #1048576 + 8076 0094 016C ldr r1, [r0, #64] + 8077 0096 0B43 orrs r3, r3, r1 + 8078 0098 5360 str r3, [r2, #4] +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8079 .loc 1 3064 5 view .LVU2700 +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 274 + + + 8080 .loc 1 3064 28 is_stmt 0 view .LVU2701 + 8081 009a 036C ldr r3, [r0, #64] +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8082 .loc 1 3064 8 view .LVU2702 + 8083 009c B3F5801F cmp r3, #1048576 + 8084 00a0 0BD0 beq .L374 + 8085 .L372: +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8086 .loc 1 3072 3 is_stmt 1 view .LVU2703 +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8087 .loc 1 3072 7 is_stmt 0 view .LVU2704 + 8088 00a2 436A ldr r3, [r0, #36] +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8089 .loc 1 3072 6 view .LVU2705 + 8090 00a4 13F0800F tst r3, #128 + 8091 00a8 06D0 beq .L365 +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); + 8092 .loc 1 3074 5 is_stmt 1 view .LVU2706 +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8093 .loc 1 3075 5 view .LVU2707 + 8094 00aa 0268 ldr r2, [r0] + 8095 00ac 5368 ldr r3, [r2, #4] + 8096 00ae 23F40023 bic r3, r3, #524288 + 8097 00b2 816C ldr r1, [r0, #72] + 8098 00b4 0B43 orrs r3, r3, r1 + 8099 00b6 5360 str r3, [r2, #4] + 8100 .L365: +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8101 .loc 1 3077 1 is_stmt 0 view .LVU2708 + 8102 00b8 7047 bx lr + 8103 .L374: +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); + 8104 .loc 1 3066 7 is_stmt 1 view .LVU2709 +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8105 .loc 1 3067 7 view .LVU2710 + 8106 00ba 0268 ldr r2, [r0] + 8107 00bc 5368 ldr r3, [r2, #4] + 8108 00be 23F4C003 bic r3, r3, #6291456 + 8109 00c2 416C ldr r1, [r0, #68] + 8110 00c4 0B43 orrs r3, r3, r1 + 8111 00c6 5360 str r3, [r2, #4] + 8112 00c8 EBE7 b .L372 + 8113 .cfi_endproc + 8114 .LFE174: + 8116 .section .text.UART_WaitOnFlagUntilTimeout,"ax",%progbits + 8117 .align 1 + 8118 .global UART_WaitOnFlagUntilTimeout + 8119 .syntax unified + 8120 .thumb + 8121 .thumb_func + 8123 UART_WaitOnFlagUntilTimeout: + 8124 .LVL720: + 8125 .LFB176: +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Wait until flag is set */ + 8126 .loc 1 3155 1 view -0 + 8127 .cfi_startproc + 8128 @ args = 4, pretend = 0, frame = 0 + ARM GAS /tmp/ccqiorEF.s page 275 + + + 8129 @ frame_needed = 0, uses_anonymous_args = 0 +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Wait until flag is set */ + 8130 .loc 1 3155 1 is_stmt 0 view .LVU2712 + 8131 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 8132 .cfi_def_cfa_offset 32 + 8133 .cfi_offset 3, -32 + 8134 .cfi_offset 4, -28 + 8135 .cfi_offset 5, -24 + 8136 .cfi_offset 6, -20 + 8137 .cfi_offset 7, -16 + 8138 .cfi_offset 8, -12 + 8139 .cfi_offset 9, -8 + 8140 .cfi_offset 14, -4 + 8141 0004 0546 mov r5, r0 + 8142 0006 0F46 mov r7, r1 + 8143 0008 1646 mov r6, r2 + 8144 000a 9946 mov r9, r3 + 8145 000c DDF82080 ldr r8, [sp, #32] +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8146 .loc 1 3157 3 is_stmt 1 view .LVU2713 + 8147 .LVL721: + 8148 .L377: +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8149 .loc 1 3157 59 view .LVU2714 +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8150 .loc 1 3157 11 is_stmt 0 view .LVU2715 + 8151 0010 2B68 ldr r3, [r5] + 8152 0012 DC69 ldr r4, [r3, #28] +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8153 .loc 1 3157 50 view .LVU2716 + 8154 0014 37EA0404 bics r4, r7, r4 + 8155 0018 0CBF ite eq + 8156 001a 0124 moveq r4, #1 + 8157 001c 0024 movne r4, #0 +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8158 .loc 1 3157 59 view .LVU2717 + 8159 001e B442 cmp r4, r6 + 8160 0020 32D1 bne .L384 +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8161 .loc 1 3160 5 is_stmt 1 view .LVU2718 +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8162 .loc 1 3160 8 is_stmt 0 view .LVU2719 + 8163 0022 B8F1FF3F cmp r8, #-1 + 8164 0026 F3D0 beq .L377 +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8165 .loc 1 3162 7 is_stmt 1 view .LVU2720 +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8166 .loc 1 3162 13 is_stmt 0 view .LVU2721 + 8167 0028 FFF7FEFF bl HAL_GetTick + 8168 .LVL722: +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8169 .loc 1 3162 27 discriminator 1 view .LVU2722 + 8170 002c A0EB0900 sub r0, r0, r9 +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8171 .loc 1 3162 10 discriminator 1 view .LVU2723 + 8172 0030 4045 cmp r0, r8 + 8173 0032 2CD8 bhi .L381 + ARM GAS /tmp/ccqiorEF.s page 276 + + +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8174 .loc 1 3162 51 discriminator 1 view .LVU2724 + 8175 0034 B8F1000F cmp r8, #0 + 8176 0038 2BD0 beq .L382 +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8177 .loc 1 3168 7 is_stmt 1 view .LVU2725 +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8178 .loc 1 3168 11 is_stmt 0 view .LVU2726 + 8179 003a 2B68 ldr r3, [r5] + 8180 003c 1A68 ldr r2, [r3] +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8181 .loc 1 3168 10 view .LVU2727 + 8182 003e 12F0040F tst r2, #4 + 8183 0042 E5D0 beq .L377 +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8184 .loc 1 3170 9 is_stmt 1 view .LVU2728 +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8185 .loc 1 3170 13 is_stmt 0 view .LVU2729 + 8186 0044 DA69 ldr r2, [r3, #28] +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8187 .loc 1 3170 12 view .LVU2730 + 8188 0046 12F0080F tst r2, #8 + 8189 004a 11D1 bne .L385 +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8190 .loc 1 3187 9 is_stmt 1 view .LVU2731 +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8191 .loc 1 3187 13 is_stmt 0 view .LVU2732 + 8192 004c DA69 ldr r2, [r3, #28] +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8193 .loc 1 3187 12 view .LVU2733 + 8194 004e 12F4006F tst r2, #2048 + 8195 0052 DDD0 beq .L377 +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8196 .loc 1 3190 11 is_stmt 1 view .LVU2734 + 8197 0054 4FF40062 mov r2, #2048 + 8198 0058 1A62 str r2, [r3, #32] +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8199 .loc 1 3195 11 view .LVU2735 + 8200 005a 2846 mov r0, r5 + 8201 005c FFF7FEFF bl UART_EndRxTransfer + 8202 .LVL723: +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8203 .loc 1 3197 11 view .LVU2736 +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8204 .loc 1 3197 28 is_stmt 0 view .LVU2737 + 8205 0060 2023 movs r3, #32 + 8206 0062 C5F88430 str r3, [r5, #132] +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8207 .loc 1 3200 11 is_stmt 1 view .LVU2738 +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8208 .loc 1 3200 11 view .LVU2739 + 8209 0066 0023 movs r3, #0 + 8210 0068 85F87830 strb r3, [r5, #120] +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8211 .loc 1 3200 11 view .LVU2740 +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8212 .loc 1 3202 11 view .LVU2741 + ARM GAS /tmp/ccqiorEF.s page 277 + + +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8213 .loc 1 3202 18 is_stmt 0 view .LVU2742 + 8214 006c 0320 movs r0, #3 + 8215 006e 0CE0 b .L378 + 8216 .L385: +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8217 .loc 1 3173 12 is_stmt 1 view .LVU2743 + 8218 0070 0824 movs r4, #8 + 8219 0072 1C62 str r4, [r3, #32] +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8220 .loc 1 3178 12 view .LVU2744 + 8221 0074 2846 mov r0, r5 + 8222 0076 FFF7FEFF bl UART_EndRxTransfer + 8223 .LVL724: +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8224 .loc 1 3180 12 view .LVU2745 +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8225 .loc 1 3180 29 is_stmt 0 view .LVU2746 + 8226 007a C5F88440 str r4, [r5, #132] +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8227 .loc 1 3183 12 is_stmt 1 view .LVU2747 +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8228 .loc 1 3183 12 view .LVU2748 + 8229 007e 0023 movs r3, #0 + 8230 0080 85F87830 strb r3, [r5, #120] +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8231 .loc 1 3183 12 view .LVU2749 +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8232 .loc 1 3185 12 view .LVU2750 +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8233 .loc 1 3185 19 is_stmt 0 view .LVU2751 + 8234 0084 0120 movs r0, #1 + 8235 0086 00E0 b .L378 + 8236 .L384: +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8237 .loc 1 3207 10 view .LVU2752 + 8238 0088 0020 movs r0, #0 + 8239 .L378: +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8240 .loc 1 3208 1 view .LVU2753 + 8241 008a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 8242 .LVL725: + 8243 .L381: +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8244 .loc 1 3165 16 view .LVU2754 + 8245 008e 0320 movs r0, #3 + 8246 0090 FBE7 b .L378 + 8247 .L382: + 8248 0092 0320 movs r0, #3 + 8249 0094 F9E7 b .L378 + 8250 .cfi_endproc + 8251 .LFE176: + 8253 .section .text.HAL_UART_Transmit,"ax",%progbits + 8254 .align 1 + 8255 .global HAL_UART_Transmit + 8256 .syntax unified + 8257 .thumb + ARM GAS /tmp/ccqiorEF.s page 278 + + + 8258 .thumb_func + 8260 HAL_UART_Transmit: + 8261 .LVL726: + 8262 .LFB137: +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const uint8_t *pdata8bits; + 8263 .loc 1 1080 1 is_stmt 1 view -0 + 8264 .cfi_startproc + 8265 @ args = 0, pretend = 0, frame = 0 + 8266 @ frame_needed = 0, uses_anonymous_args = 0 +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const uint8_t *pdata8bits; + 8267 .loc 1 1080 1 is_stmt 0 view .LVU2756 + 8268 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 8269 .cfi_def_cfa_offset 24 + 8270 .cfi_offset 4, -24 + 8271 .cfi_offset 5, -20 + 8272 .cfi_offset 6, -16 + 8273 .cfi_offset 7, -12 + 8274 .cfi_offset 8, -8 + 8275 .cfi_offset 14, -4 + 8276 0004 82B0 sub sp, sp, #8 + 8277 .cfi_def_cfa_offset 32 + 8278 0006 1E46 mov r6, r3 +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** const uint16_t *pdata16bits; + 8279 .loc 1 1081 3 is_stmt 1 view .LVU2757 +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; + 8280 .loc 1 1082 3 view .LVU2758 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8281 .loc 1 1083 3 view .LVU2759 +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8282 .loc 1 1086 3 view .LVU2760 +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8283 .loc 1 1086 12 is_stmt 0 view .LVU2761 + 8284 0008 C36F ldr r3, [r0, #124] + 8285 .LVL727: +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8286 .loc 1 1086 6 view .LVU2762 + 8287 000a 202B cmp r3, #32 + 8288 000c 56D1 bne .L395 + 8289 000e 0446 mov r4, r0 + 8290 0010 0D46 mov r5, r1 + 8291 0012 9046 mov r8, r2 +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8292 .loc 1 1088 5 is_stmt 1 view .LVU2763 +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8293 .loc 1 1088 8 is_stmt 0 view .LVU2764 + 8294 0014 0029 cmp r1, #0 + 8295 0016 55D0 beq .L396 +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8296 .loc 1 1088 25 discriminator 1 view .LVU2765 + 8297 0018 0AB9 cbnz r2, .L401 +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8298 .loc 1 1090 15 view .LVU2766 + 8299 001a 0120 movs r0, #1 + 8300 .LVL728: +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8301 .loc 1 1090 15 view .LVU2767 + 8302 001c 4FE0 b .L387 + ARM GAS /tmp/ccqiorEF.s page 279 + + + 8303 .LVL729: + 8304 .L401: +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; + 8305 .loc 1 1093 5 is_stmt 1 view .LVU2768 +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY_TX; + 8306 .loc 1 1093 22 is_stmt 0 view .LVU2769 + 8307 001e 0023 movs r3, #0 + 8308 0020 C0F88430 str r3, [r0, #132] +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8309 .loc 1 1094 5 is_stmt 1 view .LVU2770 +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8310 .loc 1 1094 19 is_stmt 0 view .LVU2771 + 8311 0024 2123 movs r3, #33 + 8312 0026 C367 str r3, [r0, #124] +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8313 .loc 1 1097 5 is_stmt 1 view .LVU2772 +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8314 .loc 1 1097 17 is_stmt 0 view .LVU2773 + 8315 0028 FFF7FEFF bl HAL_GetTick + 8316 .LVL730: +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8317 .loc 1 1097 17 view .LVU2774 + 8318 002c 0746 mov r7, r0 + 8319 .LVL731: +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; + 8320 .loc 1 1099 5 is_stmt 1 view .LVU2775 +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->TxXferCount = Size; + 8321 .loc 1 1099 24 is_stmt 0 view .LVU2776 + 8322 002e A4F85080 strh r8, [r4, #80] @ movhi +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8323 .loc 1 1100 5 is_stmt 1 view .LVU2777 +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8324 .loc 1 1100 24 is_stmt 0 view .LVU2778 + 8325 0032 A4F85280 strh r8, [r4, #82] @ movhi +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8326 .loc 1 1103 5 is_stmt 1 view .LVU2779 +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8327 .loc 1 1103 21 is_stmt 0 view .LVU2780 + 8328 0036 A368 ldr r3, [r4, #8] +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8329 .loc 1 1103 8 view .LVU2781 + 8330 0038 B3F5805F cmp r3, #4096 + 8331 003c 02D0 beq .L402 +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8332 .loc 1 1111 19 view .LVU2782 + 8333 003e 4FF00008 mov r8, #0 + 8334 .LVL732: +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8335 .loc 1 1111 19 view .LVU2783 + 8336 0042 18E0 b .L389 + 8337 .L402: +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8338 .loc 1 1103 71 discriminator 1 view .LVU2784 + 8339 0044 2369 ldr r3, [r4, #16] +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8340 .loc 1 1103 56 discriminator 1 view .LVU2785 + 8341 0046 13B1 cbz r3, .L399 + ARM GAS /tmp/ccqiorEF.s page 280 + + +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8342 .loc 1 1111 19 view .LVU2786 + 8343 0048 4FF00008 mov r8, #0 + 8344 004c 13E0 b .L389 + 8345 .L399: +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8346 .loc 1 1106 19 view .LVU2787 + 8347 004e A846 mov r8, r5 +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = (const uint16_t *) pData; + 8348 .loc 1 1105 19 view .LVU2788 + 8349 0050 0025 movs r5, #0 + 8350 .LVL733: +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = (const uint16_t *) pData; + 8351 .loc 1 1105 19 view .LVU2789 + 8352 0052 10E0 b .L389 + 8353 .LVL734: + 8354 .L404: +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8355 .loc 1 1119 9 is_stmt 1 view .LVU2790 +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8356 .loc 1 1119 23 is_stmt 0 view .LVU2791 + 8357 0054 2023 movs r3, #32 + 8358 0056 E367 str r3, [r4, #124] +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8359 .loc 1 1121 9 is_stmt 1 view .LVU2792 +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8360 .loc 1 1121 16 is_stmt 0 view .LVU2793 + 8361 0058 0320 movs r0, #3 + 8362 005a 30E0 b .L387 + 8363 .L405: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8364 .loc 1 1125 9 is_stmt 1 view .LVU2794 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8365 .loc 1 1125 43 is_stmt 0 view .LVU2795 + 8366 005c 38F8023B ldrh r3, [r8], #2 + 8367 .LVL735: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8368 .loc 1 1125 14 view .LVU2796 + 8369 0060 2268 ldr r2, [r4] +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8370 .loc 1 1125 32 view .LVU2797 + 8371 0062 C3F30803 ubfx r3, r3, #0, #9 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8372 .loc 1 1125 30 view .LVU2798 + 8373 0066 1385 strh r3, [r2, #40] @ movhi +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8374 .loc 1 1126 9 is_stmt 1 view .LVU2799 + 8375 .LVL736: + 8376 .L392: +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8377 .loc 1 1133 7 view .LVU2800 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8378 .loc 1 1133 12 is_stmt 0 view .LVU2801 + 8379 0068 B4F85220 ldrh r2, [r4, #82] + 8380 006c 92B2 uxth r2, r2 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8381 .loc 1 1133 25 view .LVU2802 + ARM GAS /tmp/ccqiorEF.s page 281 + + + 8382 006e 013A subs r2, r2, #1 + 8383 0070 92B2 uxth r2, r2 + 8384 0072 A4F85220 strh r2, [r4, #82] @ movhi + 8385 .LVL737: + 8386 .L389: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8387 .loc 1 1114 31 is_stmt 1 view .LVU2803 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8388 .loc 1 1114 17 is_stmt 0 view .LVU2804 + 8389 0076 B4F85230 ldrh r3, [r4, #82] + 8390 007a 9BB2 uxth r3, r3 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8391 .loc 1 1114 31 view .LVU2805 + 8392 007c 7BB1 cbz r3, .L403 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8393 .loc 1 1116 7 is_stmt 1 view .LVU2806 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8394 .loc 1 1116 11 is_stmt 0 view .LVU2807 + 8395 007e 0096 str r6, [sp] + 8396 0080 3B46 mov r3, r7 + 8397 0082 0022 movs r2, #0 + 8398 0084 8021 movs r1, #128 + 8399 0086 2046 mov r0, r4 + 8400 0088 FFF7FEFF bl UART_WaitOnFlagUntilTimeout + 8401 .LVL738: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8402 .loc 1 1116 10 discriminator 1 view .LVU2808 + 8403 008c 0028 cmp r0, #0 + 8404 008e E1D1 bne .L404 +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8405 .loc 1 1123 7 is_stmt 1 view .LVU2809 +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8406 .loc 1 1123 10 is_stmt 0 view .LVU2810 + 8407 0090 002D cmp r5, #0 + 8408 0092 E3D0 beq .L405 +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8409 .loc 1 1130 9 is_stmt 1 view .LVU2811 +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8410 .loc 1 1130 42 is_stmt 0 view .LVU2812 + 8411 0094 15F8012B ldrb r2, [r5], #1 @ zero_extendqisi2 + 8412 .LVL739: +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8413 .loc 1 1130 14 view .LVU2813 + 8414 0098 2368 ldr r3, [r4] +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8415 .loc 1 1130 30 view .LVU2814 + 8416 009a 1A85 strh r2, [r3, #40] @ movhi +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8417 .loc 1 1131 9 is_stmt 1 view .LVU2815 + 8418 .LVL740: +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8419 .loc 1 1131 9 is_stmt 0 view .LVU2816 + 8420 009c E4E7 b .L392 + 8421 .L403: +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8422 .loc 1 1136 5 is_stmt 1 view .LVU2817 +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 282 + + + 8423 .loc 1 1136 9 is_stmt 0 view .LVU2818 + 8424 009e 0096 str r6, [sp] + 8425 00a0 3B46 mov r3, r7 + 8426 00a2 0022 movs r2, #0 + 8427 00a4 4021 movs r1, #64 + 8428 00a6 2046 mov r0, r4 + 8429 00a8 FFF7FEFF bl UART_WaitOnFlagUntilTimeout + 8430 .LVL741: +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8431 .loc 1 1136 8 discriminator 1 view .LVU2819 + 8432 00ac 10B9 cbnz r0, .L406 +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8433 .loc 1 1144 5 is_stmt 1 view .LVU2820 +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8434 .loc 1 1144 19 is_stmt 0 view .LVU2821 + 8435 00ae 2023 movs r3, #32 + 8436 00b0 E367 str r3, [r4, #124] +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8437 .loc 1 1146 5 is_stmt 1 view .LVU2822 +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8438 .loc 1 1146 12 is_stmt 0 view .LVU2823 + 8439 00b2 04E0 b .L387 + 8440 .L406: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8441 .loc 1 1138 7 is_stmt 1 view .LVU2824 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8442 .loc 1 1138 21 is_stmt 0 view .LVU2825 + 8443 00b4 2023 movs r3, #32 + 8444 00b6 E367 str r3, [r4, #124] +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8445 .loc 1 1140 7 is_stmt 1 view .LVU2826 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8446 .loc 1 1140 14 is_stmt 0 view .LVU2827 + 8447 00b8 0320 movs r0, #3 + 8448 00ba 00E0 b .L387 + 8449 .LVL742: + 8450 .L395: +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8451 .loc 1 1150 12 view .LVU2828 + 8452 00bc 0220 movs r0, #2 + 8453 .LVL743: + 8454 .L387: +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8455 .loc 1 1152 1 view .LVU2829 + 8456 00be 02B0 add sp, sp, #8 + 8457 .cfi_remember_state + 8458 .cfi_def_cfa_offset 24 + 8459 @ sp needed + 8460 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 8461 .LVL744: + 8462 .L396: + 8463 .cfi_restore_state +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8464 .loc 1 1090 15 view .LVU2830 + 8465 00c4 0120 movs r0, #1 + 8466 .LVL745: +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + ARM GAS /tmp/ccqiorEF.s page 283 + + + 8467 .loc 1 1090 15 view .LVU2831 + 8468 00c6 FAE7 b .L387 + 8469 .cfi_endproc + 8470 .LFE137: + 8472 .section .text.HAL_UART_Receive,"ax",%progbits + 8473 .align 1 + 8474 .global HAL_UART_Receive + 8475 .syntax unified + 8476 .thumb + 8477 .thumb_func + 8479 HAL_UART_Receive: + 8480 .LVL746: + 8481 .LFB138: +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint8_t *pdata8bits; + 8482 .loc 1 1166 1 is_stmt 1 view -0 + 8483 .cfi_startproc + 8484 @ args = 0, pretend = 0, frame = 0 + 8485 @ frame_needed = 0, uses_anonymous_args = 0 +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint8_t *pdata8bits; + 8486 .loc 1 1166 1 is_stmt 0 view .LVU2833 + 8487 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 8488 .cfi_def_cfa_offset 28 + 8489 .cfi_offset 4, -28 + 8490 .cfi_offset 5, -24 + 8491 .cfi_offset 6, -20 + 8492 .cfi_offset 7, -16 + 8493 .cfi_offset 8, -12 + 8494 .cfi_offset 9, -8 + 8495 .cfi_offset 14, -4 + 8496 0004 83B0 sub sp, sp, #12 + 8497 .cfi_def_cfa_offset 40 + 8498 0006 1E46 mov r6, r3 +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t *pdata16bits; + 8499 .loc 1 1167 3 is_stmt 1 view .LVU2834 +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint16_t uhMask; + 8500 .loc 1 1168 3 view .LVU2835 +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; + 8501 .loc 1 1169 3 view .LVU2836 +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8502 .loc 1 1170 3 view .LVU2837 +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8503 .loc 1 1173 3 view .LVU2838 +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8504 .loc 1 1173 12 is_stmt 0 view .LVU2839 + 8505 0008 D0F88030 ldr r3, [r0, #128] + 8506 .LVL747: +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8507 .loc 1 1173 6 view .LVU2840 + 8508 000c 202B cmp r3, #32 + 8509 000e 70D1 bne .L420 + 8510 0010 0446 mov r4, r0 + 8511 0012 0D46 mov r5, r1 + 8512 0014 9046 mov r8, r2 +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8513 .loc 1 1175 5 is_stmt 1 view .LVU2841 +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8514 .loc 1 1175 8 is_stmt 0 view .LVU2842 + ARM GAS /tmp/ccqiorEF.s page 284 + + + 8515 0016 0029 cmp r1, #0 + 8516 0018 6FD0 beq .L421 +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8517 .loc 1 1175 25 discriminator 1 view .LVU2843 + 8518 001a 0AB9 cbnz r2, .L426 +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8519 .loc 1 1177 15 view .LVU2844 + 8520 001c 0120 movs r0, #1 + 8521 .LVL748: +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8522 .loc 1 1177 15 view .LVU2845 + 8523 001e 69E0 b .L408 + 8524 .LVL749: + 8525 .L426: +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 8526 .loc 1 1180 5 is_stmt 1 view .LVU2846 +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 8527 .loc 1 1180 22 is_stmt 0 view .LVU2847 + 8528 0020 0023 movs r3, #0 + 8529 0022 C0F88430 str r3, [r0, #132] +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8530 .loc 1 1181 5 is_stmt 1 view .LVU2848 +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8531 .loc 1 1181 20 is_stmt 0 view .LVU2849 + 8532 0026 2222 movs r2, #34 + 8533 .LVL750: +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8534 .loc 1 1181 20 view .LVU2850 + 8535 0028 C0F88020 str r2, [r0, #128] +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8536 .loc 1 1182 5 is_stmt 1 view .LVU2851 +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8537 .loc 1 1182 26 is_stmt 0 view .LVU2852 + 8538 002c 0366 str r3, [r0, #96] +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8539 .loc 1 1185 5 is_stmt 1 view .LVU2853 +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8540 .loc 1 1185 17 is_stmt 0 view .LVU2854 + 8541 002e FFF7FEFF bl HAL_GetTick + 8542 .LVL751: +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8543 .loc 1 1185 17 view .LVU2855 + 8544 0032 0746 mov r7, r0 + 8545 .LVL752: +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = Size; + 8546 .loc 1 1187 5 is_stmt 1 view .LVU2856 +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = Size; + 8547 .loc 1 1187 24 is_stmt 0 view .LVU2857 + 8548 0034 A4F85880 strh r8, [r4, #88] @ movhi +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8549 .loc 1 1188 5 is_stmt 1 view .LVU2858 +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8550 .loc 1 1188 24 is_stmt 0 view .LVU2859 + 8551 0038 A4F85A80 strh r8, [r4, #90] @ movhi +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8552 .loc 1 1191 5 is_stmt 1 view .LVU2860 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + ARM GAS /tmp/ccqiorEF.s page 285 + + + 8553 .loc 1 1191 5 view .LVU2861 + 8554 003c A368 ldr r3, [r4, #8] + 8555 003e B3F5805F cmp r3, #4096 + 8556 0042 06D0 beq .L427 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8557 .loc 1 1191 5 discriminator 2 view .LVU2862 + 8558 0044 A3B9 cbnz r3, .L412 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8559 .loc 1 1191 5 discriminator 5 view .LVU2863 + 8560 0046 2269 ldr r2, [r4, #16] + 8561 0048 72B9 cbnz r2, .L413 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8562 .loc 1 1191 5 discriminator 7 view .LVU2864 + 8563 004a FF22 movs r2, #255 + 8564 004c A4F85C20 strh r2, [r4, #92] @ movhi + 8565 0050 11E0 b .L411 + 8566 .L427: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8567 .loc 1 1191 5 discriminator 1 view .LVU2865 + 8568 0052 2269 ldr r2, [r4, #16] + 8569 0054 22B9 cbnz r2, .L410 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8570 .loc 1 1191 5 discriminator 3 view .LVU2866 + 8571 0056 40F2FF12 movw r2, #511 + 8572 005a A4F85C20 strh r2, [r4, #92] @ movhi + 8573 005e 0AE0 b .L411 + 8574 .L410: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8575 .loc 1 1191 5 discriminator 4 view .LVU2867 + 8576 0060 FF22 movs r2, #255 + 8577 0062 A4F85C20 strh r2, [r4, #92] @ movhi + 8578 0066 06E0 b .L411 + 8579 .L413: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8580 .loc 1 1191 5 discriminator 8 view .LVU2868 + 8581 0068 7F22 movs r2, #127 + 8582 006a A4F85C20 strh r2, [r4, #92] @ movhi + 8583 006e 02E0 b .L411 + 8584 .L412: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8585 .loc 1 1191 5 discriminator 6 view .LVU2869 + 8586 0070 0022 movs r2, #0 + 8587 0072 A4F85C20 strh r2, [r4, #92] @ movhi + 8588 .L411: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uhMask = huart->Mask; + 8589 .loc 1 1191 5 discriminator 9 view .LVU2870 +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8590 .loc 1 1192 5 view .LVU2871 +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8591 .loc 1 1192 12 is_stmt 0 view .LVU2872 + 8592 0076 B4F85C80 ldrh r8, [r4, #92] + 8593 .LVL753: +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8594 .loc 1 1195 5 is_stmt 1 view .LVU2873 +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8595 .loc 1 1195 8 is_stmt 0 view .LVU2874 + 8596 007a B3F5805F cmp r3, #4096 + ARM GAS /tmp/ccqiorEF.s page 286 + + + 8597 007e 02D0 beq .L428 +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8598 .loc 1 1203 19 view .LVU2875 + 8599 0080 4FF00009 mov r9, #0 + 8600 0084 19E0 b .L415 + 8601 .L428: +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8602 .loc 1 1195 71 discriminator 1 view .LVU2876 + 8603 0086 2369 ldr r3, [r4, #16] +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8604 .loc 1 1195 56 discriminator 1 view .LVU2877 + 8605 0088 13B1 cbz r3, .L424 +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8606 .loc 1 1203 19 view .LVU2878 + 8607 008a 4FF00009 mov r9, #0 + 8608 008e 14E0 b .L415 + 8609 .L424: +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8610 .loc 1 1198 19 view .LVU2879 + 8611 0090 A946 mov r9, r5 +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = (uint16_t *) pData; + 8612 .loc 1 1197 19 view .LVU2880 + 8613 0092 0025 movs r5, #0 + 8614 .LVL754: +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits = (uint16_t *) pData; + 8615 .loc 1 1197 19 view .LVU2881 + 8616 0094 11E0 b .L415 + 8617 .LVL755: + 8618 .L430: +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8619 .loc 1 1211 9 is_stmt 1 view .LVU2882 +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8620 .loc 1 1211 24 is_stmt 0 view .LVU2883 + 8621 0096 2023 movs r3, #32 + 8622 0098 C4F88030 str r3, [r4, #128] +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8623 .loc 1 1213 9 is_stmt 1 view .LVU2884 +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8624 .loc 1 1213 16 is_stmt 0 view .LVU2885 + 8625 009c 0320 movs r0, #3 + 8626 009e 29E0 b .L408 + 8627 .L431: +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8628 .loc 1 1217 9 is_stmt 1 view .LVU2886 +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8629 .loc 1 1217 40 is_stmt 0 view .LVU2887 + 8630 00a0 2368 ldr r3, [r4] +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8631 .loc 1 1217 50 view .LVU2888 + 8632 00a2 9B8C ldrh r3, [r3, #36] +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8633 .loc 1 1217 24 view .LVU2889 + 8634 00a4 08EA0303 and r3, r8, r3 +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata16bits++; + 8635 .loc 1 1217 22 view .LVU2890 + 8636 00a8 29F8023B strh r3, [r9], #2 @ movhi + 8637 .LVL756: + ARM GAS /tmp/ccqiorEF.s page 287 + + +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8638 .loc 1 1218 9 is_stmt 1 view .LVU2891 + 8639 .L418: +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8640 .loc 1 1225 7 view .LVU2892 +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8641 .loc 1 1225 12 is_stmt 0 view .LVU2893 + 8642 00ac B4F85A20 ldrh r2, [r4, #90] + 8643 00b0 92B2 uxth r2, r2 +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8644 .loc 1 1225 25 view .LVU2894 + 8645 00b2 013A subs r2, r2, #1 + 8646 00b4 92B2 uxth r2, r2 + 8647 00b6 A4F85A20 strh r2, [r4, #90] @ movhi + 8648 .LVL757: + 8649 .L415: +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8650 .loc 1 1207 31 is_stmt 1 view .LVU2895 +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8651 .loc 1 1207 17 is_stmt 0 view .LVU2896 + 8652 00ba B4F85A30 ldrh r3, [r4, #90] + 8653 00be 9BB2 uxth r3, r3 +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8654 .loc 1 1207 31 view .LVU2897 + 8655 00c0 93B1 cbz r3, .L429 +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8656 .loc 1 1209 7 is_stmt 1 view .LVU2898 +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8657 .loc 1 1209 11 is_stmt 0 view .LVU2899 + 8658 00c2 0096 str r6, [sp] + 8659 00c4 3B46 mov r3, r7 + 8660 00c6 0022 movs r2, #0 + 8661 00c8 2021 movs r1, #32 + 8662 00ca 2046 mov r0, r4 + 8663 00cc FFF7FEFF bl UART_WaitOnFlagUntilTimeout + 8664 .LVL758: +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8665 .loc 1 1209 10 discriminator 1 view .LVU2900 + 8666 00d0 0028 cmp r0, #0 + 8667 00d2 E0D1 bne .L430 +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8668 .loc 1 1215 7 is_stmt 1 view .LVU2901 +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8669 .loc 1 1215 10 is_stmt 0 view .LVU2902 + 8670 00d4 002D cmp r5, #0 + 8671 00d6 E3D0 beq .L431 +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8672 .loc 1 1222 9 is_stmt 1 view .LVU2903 +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8673 .loc 1 1222 38 is_stmt 0 view .LVU2904 + 8674 00d8 2368 ldr r3, [r4] +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8675 .loc 1 1222 48 view .LVU2905 + 8676 00da 9A8C ldrh r2, [r3, #36] +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8677 .loc 1 1222 56 view .LVU2906 + 8678 00dc 5FFA88F3 uxtb r3, r8 + ARM GAS /tmp/ccqiorEF.s page 288 + + +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8679 .loc 1 1222 23 view .LVU2907 + 8680 00e0 1340 ands r3, r3, r2 +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** pdata8bits++; + 8681 .loc 1 1222 21 view .LVU2908 + 8682 00e2 05F8013B strb r3, [r5], #1 + 8683 .LVL759: +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8684 .loc 1 1223 9 is_stmt 1 view .LVU2909 +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8685 .loc 1 1223 9 is_stmt 0 view .LVU2910 + 8686 00e6 E1E7 b .L418 + 8687 .L429: +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8688 .loc 1 1229 5 is_stmt 1 view .LVU2911 +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8689 .loc 1 1229 20 is_stmt 0 view .LVU2912 + 8690 00e8 2023 movs r3, #32 + 8691 00ea C4F88030 str r3, [r4, #128] +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8692 .loc 1 1231 5 is_stmt 1 view .LVU2913 +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8693 .loc 1 1231 12 is_stmt 0 view .LVU2914 + 8694 00ee 0020 movs r0, #0 + 8695 00f0 00E0 b .L408 + 8696 .LVL760: + 8697 .L420: +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8698 .loc 1 1235 12 view .LVU2915 + 8699 00f2 0220 movs r0, #2 + 8700 .LVL761: + 8701 .L408: +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8702 .loc 1 1237 1 view .LVU2916 + 8703 00f4 03B0 add sp, sp, #12 + 8704 .cfi_remember_state + 8705 .cfi_def_cfa_offset 28 + 8706 @ sp needed + 8707 00f6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 8708 .LVL762: + 8709 .L421: + 8710 .cfi_restore_state +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8711 .loc 1 1177 15 view .LVU2917 + 8712 00fa 0120 movs r0, #1 + 8713 .LVL763: +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8714 .loc 1 1177 15 view .LVU2918 + 8715 00fc FAE7 b .L408 + 8716 .cfi_endproc + 8717 .LFE138: + 8719 .section .text.UART_CheckIdleState,"ax",%progbits + 8720 .align 1 + 8721 .global UART_CheckIdleState + 8722 .syntax unified + 8723 .thumb + 8724 .thumb_func + ARM GAS /tmp/ccqiorEF.s page 289 + + + 8726 UART_CheckIdleState: + 8727 .LVL764: + 8728 .LFB175: +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; + 8729 .loc 1 3085 1 is_stmt 1 view -0 + 8730 .cfi_startproc + 8731 @ args = 0, pretend = 0, frame = 0 + 8732 @ frame_needed = 0, uses_anonymous_args = 0 +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** uint32_t tickstart; + 8733 .loc 1 3085 1 is_stmt 0 view .LVU2920 + 8734 0000 30B5 push {r4, r5, lr} + 8735 .cfi_def_cfa_offset 12 + 8736 .cfi_offset 4, -12 + 8737 .cfi_offset 5, -8 + 8738 .cfi_offset 14, -4 + 8739 0002 83B0 sub sp, sp, #12 + 8740 .cfi_def_cfa_offset 24 + 8741 0004 0446 mov r4, r0 +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8742 .loc 1 3086 3 is_stmt 1 view .LVU2921 +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8743 .loc 1 3089 3 view .LVU2922 +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8744 .loc 1 3089 20 is_stmt 0 view .LVU2923 + 8745 0006 0023 movs r3, #0 + 8746 0008 C0F88430 str r3, [r0, #132] +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8747 .loc 1 3092 3 is_stmt 1 view .LVU2924 +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8748 .loc 1 3092 15 is_stmt 0 view .LVU2925 + 8749 000c FFF7FEFF bl HAL_GetTick + 8750 .LVL765: +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8751 .loc 1 3092 15 view .LVU2926 + 8752 0010 0546 mov r5, r0 + 8753 .LVL766: +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8754 .loc 1 3095 3 is_stmt 1 view .LVU2927 +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8755 .loc 1 3095 13 is_stmt 0 view .LVU2928 + 8756 0012 2268 ldr r2, [r4] +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8757 .loc 1 3095 23 view .LVU2929 + 8758 0014 1268 ldr r2, [r2] +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8759 .loc 1 3095 6 view .LVU2930 + 8760 0016 12F0080F tst r2, #8 + 8761 001a 0FD1 bne .L440 + 8762 .LVL767: + 8763 .L433: +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8764 .loc 1 3113 3 is_stmt 1 view .LVU2931 +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8765 .loc 1 3113 13 is_stmt 0 view .LVU2932 + 8766 001c 2368 ldr r3, [r4] +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8767 .loc 1 3113 23 view .LVU2933 + ARM GAS /tmp/ccqiorEF.s page 290 + + + 8768 001e 1B68 ldr r3, [r3] +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8769 .loc 1 3113 6 view .LVU2934 + 8770 0020 13F0040F tst r3, #4 + 8771 0024 26D1 bne .L441 + 8772 .L436: +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 8773 .loc 1 3133 3 is_stmt 1 view .LVU2935 +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; + 8774 .loc 1 3133 17 is_stmt 0 view .LVU2936 + 8775 0026 2023 movs r3, #32 + 8776 0028 E367 str r3, [r4, #124] +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8777 .loc 1 3134 3 is_stmt 1 view .LVU2937 +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8778 .loc 1 3134 18 is_stmt 0 view .LVU2938 + 8779 002a C4F88030 str r3, [r4, #128] +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 8780 .loc 1 3135 3 is_stmt 1 view .LVU2939 +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 8781 .loc 1 3135 24 is_stmt 0 view .LVU2940 + 8782 002e 0020 movs r0, #0 + 8783 0030 2066 str r0, [r4, #96] +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8784 .loc 1 3136 3 is_stmt 1 view .LVU2941 +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8785 .loc 1 3136 22 is_stmt 0 view .LVU2942 + 8786 0032 6066 str r0, [r4, #100] +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8787 .loc 1 3138 3 is_stmt 1 view .LVU2943 +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8788 .loc 1 3138 3 view .LVU2944 + 8789 0034 84F87800 strb r0, [r4, #120] +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8790 .loc 1 3138 3 view .LVU2945 +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8791 .loc 1 3140 3 view .LVU2946 + 8792 .L435: +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8793 .loc 1 3141 1 is_stmt 0 view .LVU2947 + 8794 0038 03B0 add sp, sp, #12 + 8795 .cfi_remember_state + 8796 .cfi_def_cfa_offset 12 + 8797 @ sp needed + 8798 003a 30BD pop {r4, r5, pc} + 8799 .LVL768: + 8800 .L440: + 8801 .cfi_restore_state +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8802 .loc 1 3098 5 is_stmt 1 view .LVU2948 +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8803 .loc 1 3098 9 is_stmt 0 view .LVU2949 + 8804 003c 6FF07E43 mvn r3, #-33554432 + 8805 0040 0093 str r3, [sp] + 8806 0042 0346 mov r3, r0 + 8807 0044 0022 movs r2, #0 + 8808 0046 4FF40011 mov r1, #2097152 + ARM GAS /tmp/ccqiorEF.s page 291 + + + 8809 004a 2046 mov r0, r4 + 8810 .LVL769: +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8811 .loc 1 3098 9 view .LVU2950 + 8812 004c FFF7FEFF bl UART_WaitOnFlagUntilTimeout + 8813 .LVL770: +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8814 .loc 1 3098 8 discriminator 1 view .LVU2951 + 8815 0050 0028 cmp r0, #0 + 8816 0052 E3D0 beq .L433 + 8817 .L434: +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8818 .loc 1 3101 7 is_stmt 1 discriminator 1 view .LVU2952 + 8819 .LBB762: +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8820 .loc 1 3101 7 discriminator 1 view .LVU2953 +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8821 .loc 1 3101 7 discriminator 1 view .LVU2954 +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8822 .loc 1 3101 7 discriminator 1 view .LVU2955 + 8823 0054 2268 ldr r2, [r4] + 8824 .LVL771: + 8825 .LBB763: + 8826 .LBI763: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8827 .loc 2 1068 31 view .LVU2956 + 8828 .LBB764: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 8829 .loc 2 1070 5 view .LVU2957 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8830 .loc 2 1072 4 view .LVU2958 + 8831 .syntax unified + 8832 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8833 0056 52E8003F ldrex r3, [r2] + 8834 @ 0 "" 2 + 8835 .LVL772: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8836 .loc 2 1073 4 view .LVU2959 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8837 .loc 2 1073 4 is_stmt 0 view .LVU2960 + 8838 .thumb + 8839 .syntax unified + 8840 .LBE764: + 8841 .LBE763: +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8842 .loc 1 3101 7 discriminator 1 view .LVU2961 + 8843 005a 23F08003 bic r3, r3, #128 + 8844 .LVL773: +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8845 .loc 1 3101 7 is_stmt 1 discriminator 1 view .LVU2962 + 8846 .LBB765: + 8847 .LBI765: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8848 .loc 2 1119 31 view .LVU2963 + 8849 .LBB766: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 8850 .loc 2 1121 4 view .LVU2964 + ARM GAS /tmp/ccqiorEF.s page 292 + + +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8851 .loc 2 1123 4 view .LVU2965 + 8852 .syntax unified + 8853 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8854 005e 42E80031 strex r1, r3, [r2] + 8855 @ 0 "" 2 + 8856 .LVL774: + 8857 .loc 2 1124 4 view .LVU2966 + 8858 .loc 2 1124 4 is_stmt 0 view .LVU2967 + 8859 .thumb + 8860 .syntax unified + 8861 .LBE766: + 8862 .LBE765: +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8863 .loc 1 3101 7 discriminator 1 view .LVU2968 + 8864 0062 0029 cmp r1, #0 + 8865 0064 F6D1 bne .L434 + 8866 .LBE762: +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8867 .loc 1 3101 7 is_stmt 1 discriminator 2 view .LVU2969 +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8868 .loc 1 3103 7 view .LVU2970 +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8869 .loc 1 3103 21 is_stmt 0 view .LVU2971 + 8870 0066 2023 movs r3, #32 + 8871 .LVL775: +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8872 .loc 1 3103 21 view .LVU2972 + 8873 0068 E367 str r3, [r4, #124] +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8874 .loc 1 3105 7 is_stmt 1 view .LVU2973 +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8875 .loc 1 3105 7 view .LVU2974 + 8876 006a 0023 movs r3, #0 + 8877 006c 84F87830 strb r3, [r4, #120] +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8878 .loc 1 3105 7 view .LVU2975 +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8879 .loc 1 3108 7 view .LVU2976 +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 8880 .loc 1 3108 14 is_stmt 0 view .LVU2977 + 8881 0070 0320 movs r0, #3 + 8882 0072 E1E7 b .L435 + 8883 .LVL776: + 8884 .L441: +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8885 .loc 1 3116 5 is_stmt 1 view .LVU2978 +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8886 .loc 1 3116 9 is_stmt 0 view .LVU2979 + 8887 0074 6FF07E43 mvn r3, #-33554432 + 8888 0078 0093 str r3, [sp] + 8889 007a 2B46 mov r3, r5 + 8890 007c 0022 movs r2, #0 + 8891 007e 4FF48001 mov r1, #4194304 + 8892 0082 2046 mov r0, r4 + 8893 0084 FFF7FEFF bl UART_WaitOnFlagUntilTimeout + 8894 .LVL777: + ARM GAS /tmp/ccqiorEF.s page 293 + + +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 8895 .loc 1 3116 8 discriminator 1 view .LVU2980 + 8896 0088 0028 cmp r0, #0 + 8897 008a CCD0 beq .L436 + 8898 .L437: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8899 .loc 1 3120 7 is_stmt 1 discriminator 1 view .LVU2981 + 8900 .LBB767: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8901 .loc 1 3120 7 discriminator 1 view .LVU2982 +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8902 .loc 1 3120 7 discriminator 1 view .LVU2983 +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8903 .loc 1 3120 7 discriminator 1 view .LVU2984 + 8904 008c 2268 ldr r2, [r4] + 8905 .LVL778: + 8906 .LBB768: + 8907 .LBI768: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8908 .loc 2 1068 31 view .LVU2985 + 8909 .LBB769: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 8910 .loc 2 1070 5 view .LVU2986 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8911 .loc 2 1072 4 view .LVU2987 + 8912 .syntax unified + 8913 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8914 008e 52E8003F ldrex r3, [r2] + 8915 @ 0 "" 2 + 8916 .LVL779: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8917 .loc 2 1073 4 view .LVU2988 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8918 .loc 2 1073 4 is_stmt 0 view .LVU2989 + 8919 .thumb + 8920 .syntax unified + 8921 .LBE769: + 8922 .LBE768: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8923 .loc 1 3120 7 discriminator 1 view .LVU2990 + 8924 0092 23F49073 bic r3, r3, #288 + 8925 .LVL780: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8926 .loc 1 3120 7 is_stmt 1 discriminator 1 view .LVU2991 + 8927 .LBB770: + 8928 .LBI770: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8929 .loc 2 1119 31 view .LVU2992 + 8930 .LBB771: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 8931 .loc 2 1121 4 view .LVU2993 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8932 .loc 2 1123 4 view .LVU2994 + 8933 .syntax unified + 8934 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8935 0096 42E80031 strex r1, r3, [r2] + 8936 @ 0 "" 2 + ARM GAS /tmp/ccqiorEF.s page 294 + + + 8937 .LVL781: + 8938 .loc 2 1124 4 view .LVU2995 + 8939 .loc 2 1124 4 is_stmt 0 view .LVU2996 + 8940 .thumb + 8941 .syntax unified + 8942 .LBE771: + 8943 .LBE770: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8944 .loc 1 3120 7 discriminator 1 view .LVU2997 + 8945 009a 0029 cmp r1, #0 + 8946 009c F6D1 bne .L437 + 8947 .LVL782: + 8948 .L438: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8949 .loc 1 3120 7 discriminator 1 view .LVU2998 + 8950 .LBE767: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8951 .loc 1 3120 7 is_stmt 1 discriminator 2 view .LVU2999 +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8952 .loc 1 3121 7 discriminator 1 view .LVU3000 + 8953 .LBB772: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8954 .loc 1 3121 7 discriminator 1 view .LVU3001 +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8955 .loc 1 3121 7 discriminator 1 view .LVU3002 +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8956 .loc 1 3121 7 discriminator 1 view .LVU3003 + 8957 009e 2268 ldr r2, [r4] + 8958 .LVL783: + 8959 .LBB773: + 8960 .LBI773: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8961 .loc 2 1068 31 view .LVU3004 + 8962 .LBB774: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 8963 .loc 2 1070 5 view .LVU3005 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8964 .loc 2 1072 4 view .LVU3006 + 8965 00a0 02F10803 add r3, r2, #8 + 8966 .LVL784: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8967 .loc 2 1072 4 is_stmt 0 view .LVU3007 + 8968 .syntax unified + 8969 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8970 00a4 53E8003F ldrex r3, [r3] + 8971 @ 0 "" 2 + 8972 .LVL785: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8973 .loc 2 1073 4 is_stmt 1 view .LVU3008 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 8974 .loc 2 1073 4 is_stmt 0 view .LVU3009 + 8975 .thumb + 8976 .syntax unified + 8977 .LBE774: + 8978 .LBE773: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8979 .loc 1 3121 7 discriminator 1 view .LVU3010 + ARM GAS /tmp/ccqiorEF.s page 295 + + + 8980 00a8 23F00103 bic r3, r3, #1 + 8981 .LVL786: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 8982 .loc 1 3121 7 is_stmt 1 discriminator 1 view .LVU3011 + 8983 .LBB775: + 8984 .LBI775: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 8985 .loc 2 1119 31 view .LVU3012 + 8986 .LBB776: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 8987 .loc 2 1121 4 view .LVU3013 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8988 .loc 2 1123 4 view .LVU3014 + 8989 00ac 0832 adds r2, r2, #8 + 8990 .LVL787: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 8991 .loc 2 1123 4 is_stmt 0 view .LVU3015 + 8992 .syntax unified + 8993 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8994 00ae 42E80031 strex r1, r3, [r2] + 8995 @ 0 "" 2 + 8996 .LVL788: + 8997 .loc 2 1124 4 is_stmt 1 view .LVU3016 + 8998 .loc 2 1124 4 is_stmt 0 view .LVU3017 + 8999 .thumb + 9000 .syntax unified + 9001 .LBE776: + 9002 .LBE775: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9003 .loc 1 3121 7 discriminator 1 view .LVU3018 + 9004 00b2 0029 cmp r1, #0 + 9005 00b4 F3D1 bne .L438 + 9006 .LBE772: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9007 .loc 1 3121 7 is_stmt 1 discriminator 2 view .LVU3019 +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9008 .loc 1 3123 7 view .LVU3020 +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9009 .loc 1 3123 22 is_stmt 0 view .LVU3021 + 9010 00b6 2023 movs r3, #32 + 9011 .LVL789: +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9012 .loc 1 3123 22 view .LVU3022 + 9013 00b8 C4F88030 str r3, [r4, #128] +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9014 .loc 1 3125 7 is_stmt 1 view .LVU3023 +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9015 .loc 1 3125 7 view .LVU3024 + 9016 00bc 0023 movs r3, #0 + 9017 00be 84F87830 strb r3, [r4, #120] +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9018 .loc 1 3125 7 view .LVU3025 +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9019 .loc 1 3128 7 view .LVU3026 +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9020 .loc 1 3128 14 is_stmt 0 view .LVU3027 + 9021 00c2 0320 movs r0, #3 + ARM GAS /tmp/ccqiorEF.s page 296 + + + 9022 00c4 B8E7 b .L435 + 9023 .cfi_endproc + 9024 .LFE175: + 9026 .section .text.HAL_UART_Init,"ax",%progbits + 9027 .align 1 + 9028 .global HAL_UART_Init + 9029 .syntax unified + 9030 .thumb + 9031 .thumb_func + 9033 HAL_UART_Init: + 9034 .LVL790: + 9035 .LFB130: + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9036 .loc 1 290 1 is_stmt 1 view -0 + 9037 .cfi_startproc + 9038 @ args = 0, pretend = 0, frame = 0 + 9039 @ frame_needed = 0, uses_anonymous_args = 0 + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9040 .loc 1 292 3 view .LVU3029 + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9041 .loc 1 292 6 is_stmt 0 view .LVU3030 + 9042 0000 68B3 cbz r0, .L446 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9043 .loc 1 290 1 view .LVU3031 + 9044 0002 10B5 push {r4, lr} + 9045 .cfi_def_cfa_offset 8 + 9046 .cfi_offset 4, -8 + 9047 .cfi_offset 14, -4 + 9048 0004 0446 mov r4, r0 + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9049 .loc 1 297 3 is_stmt 1 view .LVU3032 + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9050 .loc 1 300 5 view .LVU3033 + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9051 .loc 1 305 5 view .LVU3034 + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9052 .loc 1 308 3 view .LVU3035 + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9053 .loc 1 308 12 is_stmt 0 view .LVU3036 + 9054 0006 C36F ldr r3, [r0, #124] + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9055 .loc 1 308 6 view .LVU3037 + 9056 0008 03B3 cbz r3, .L451 + 9057 .LVL791: + 9058 .L444: + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9059 .loc 1 329 3 is_stmt 1 view .LVU3038 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9060 .loc 1 329 17 is_stmt 0 view .LVU3039 + 9061 000a 2423 movs r3, #36 + 9062 000c E367 str r3, [r4, #124] + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9063 .loc 1 331 3 is_stmt 1 view .LVU3040 + 9064 000e 2268 ldr r2, [r4] + 9065 0010 1368 ldr r3, [r2] + 9066 0012 23F00103 bic r3, r3, #1 + 9067 0016 1360 str r3, [r2] + ARM GAS /tmp/ccqiorEF.s page 297 + + + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9068 .loc 1 334 3 view .LVU3041 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9069 .loc 1 334 7 is_stmt 0 view .LVU3042 + 9070 0018 2046 mov r0, r4 + 9071 001a FFF7FEFF bl UART_SetConfig + 9072 .LVL792: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9073 .loc 1 334 6 discriminator 1 view .LVU3043 + 9074 001e 0128 cmp r0, #1 + 9075 0020 13D0 beq .L443 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9076 .loc 1 339 3 is_stmt 1 view .LVU3044 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9077 .loc 1 339 26 is_stmt 0 view .LVU3045 + 9078 0022 636A ldr r3, [r4, #36] + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9079 .loc 1 339 6 view .LVU3046 + 9080 0024 BBB9 cbnz r3, .L452 + 9081 .L445: + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + 9082 .loc 1 347 3 is_stmt 1 view .LVU3047 + 9083 0026 2268 ldr r2, [r4] + 9084 0028 5368 ldr r3, [r2, #4] + 9085 002a 23F49043 bic r3, r3, #18432 + 9086 002e 5360 str r3, [r2, #4] + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9087 .loc 1 348 3 view .LVU3048 + 9088 0030 2268 ldr r2, [r4] + 9089 0032 9368 ldr r3, [r2, #8] + 9090 0034 23F02A03 bic r3, r3, #42 + 9091 0038 9360 str r3, [r2, #8] + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9092 .loc 1 350 3 view .LVU3049 + 9093 003a 2268 ldr r2, [r4] + 9094 003c 1368 ldr r3, [r2] + 9095 003e 43F00103 orr r3, r3, #1 + 9096 0042 1360 str r3, [r2] + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9097 .loc 1 353 3 view .LVU3050 + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9098 .loc 1 353 11 is_stmt 0 view .LVU3051 + 9099 0044 2046 mov r0, r4 + 9100 0046 FFF7FEFF bl UART_CheckIdleState + 9101 .LVL793: + 9102 .L443: + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9103 .loc 1 354 1 view .LVU3052 + 9104 004a 10BD pop {r4, pc} + 9105 .LVL794: + 9106 .L451: + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9107 .loc 1 311 5 is_stmt 1 view .LVU3053 + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9108 .loc 1 311 17 is_stmt 0 view .LVU3054 + 9109 004c 80F87830 strb r3, [r0, #120] + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + ARM GAS /tmp/ccqiorEF.s page 298 + + + 9110 .loc 1 325 5 is_stmt 1 view .LVU3055 + 9111 0050 FFF7FEFF bl HAL_UART_MspInit + 9112 .LVL795: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9113 .loc 1 325 5 is_stmt 0 view .LVU3056 + 9114 0054 D9E7 b .L444 + 9115 .L452: + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9116 .loc 1 341 5 is_stmt 1 view .LVU3057 + 9117 0056 2046 mov r0, r4 + 9118 0058 FFF7FEFF bl UART_AdvFeatureConfig + 9119 .LVL796: + 9120 005c E3E7 b .L445 + 9121 .LVL797: + 9122 .L446: + 9123 .cfi_def_cfa_offset 0 + 9124 .cfi_restore 4 + 9125 .cfi_restore 14 + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9126 .loc 1 294 12 is_stmt 0 view .LVU3058 + 9127 005e 0120 movs r0, #1 + 9128 .LVL798: + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9129 .loc 1 354 1 view .LVU3059 + 9130 0060 7047 bx lr + 9131 .cfi_endproc + 9132 .LFE130: + 9134 .section .text.HAL_HalfDuplex_Init,"ax",%progbits + 9135 .align 1 + 9136 .global HAL_HalfDuplex_Init + 9137 .syntax unified + 9138 .thumb + 9139 .thumb_func + 9141 HAL_HalfDuplex_Init: + 9142 .LVL799: + 9143 .LFB131: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9144 .loc 1 363 1 is_stmt 1 view -0 + 9145 .cfi_startproc + 9146 @ args = 0, pretend = 0, frame = 0 + 9147 @ frame_needed = 0, uses_anonymous_args = 0 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9148 .loc 1 365 3 view .LVU3061 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9149 .loc 1 365 6 is_stmt 0 view .LVU3062 + 9150 0000 0028 cmp r0, #0 + 9151 0002 32D0 beq .L457 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9152 .loc 1 363 1 view .LVU3063 + 9153 0004 10B5 push {r4, lr} + 9154 .cfi_def_cfa_offset 8 + 9155 .cfi_offset 4, -8 + 9156 .cfi_offset 14, -4 + 9157 0006 0446 mov r4, r0 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9158 .loc 1 371 3 is_stmt 1 view .LVU3064 + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + ARM GAS /tmp/ccqiorEF.s page 299 + + + 9159 .loc 1 373 3 view .LVU3065 + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9160 .loc 1 373 12 is_stmt 0 view .LVU3066 + 9161 0008 C36F ldr r3, [r0, #124] + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9162 .loc 1 373 6 view .LVU3067 + 9163 000a 2BB3 cbz r3, .L462 + 9164 .LVL800: + 9165 .L455: + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9166 .loc 1 394 3 is_stmt 1 view .LVU3068 + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9167 .loc 1 394 17 is_stmt 0 view .LVU3069 + 9168 000c 2423 movs r3, #36 + 9169 000e E367 str r3, [r4, #124] + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9170 .loc 1 396 3 is_stmt 1 view .LVU3070 + 9171 0010 2268 ldr r2, [r4] + 9172 0012 1368 ldr r3, [r2] + 9173 0014 23F00103 bic r3, r3, #1 + 9174 0018 1360 str r3, [r2] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9175 .loc 1 399 3 view .LVU3071 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9176 .loc 1 399 7 is_stmt 0 view .LVU3072 + 9177 001a 2046 mov r0, r4 + 9178 001c FFF7FEFF bl UART_SetConfig + 9179 .LVL801: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9180 .loc 1 399 6 discriminator 1 view .LVU3073 + 9181 0020 0128 cmp r0, #1 + 9182 0022 18D0 beq .L454 + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9183 .loc 1 404 3 is_stmt 1 view .LVU3074 + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9184 .loc 1 404 26 is_stmt 0 view .LVU3075 + 9185 0024 636A ldr r3, [r4, #36] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9186 .loc 1 404 6 view .LVU3076 + 9187 0026 E3B9 cbnz r3, .L463 + 9188 .L456: + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); + 9189 .loc 1 412 3 is_stmt 1 view .LVU3077 + 9190 0028 2268 ldr r2, [r4] + 9191 002a 5368 ldr r3, [r2, #4] + 9192 002c 23F49043 bic r3, r3, #18432 + 9193 0030 5360 str r3, [r2, #4] + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9194 .loc 1 413 3 view .LVU3078 + 9195 0032 2268 ldr r2, [r4] + 9196 0034 9368 ldr r3, [r2, #8] + 9197 0036 23F02203 bic r3, r3, #34 + 9198 003a 9360 str r3, [r2, #8] + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9199 .loc 1 416 3 view .LVU3079 + 9200 003c 2268 ldr r2, [r4] + 9201 003e 9368 ldr r3, [r2, #8] + ARM GAS /tmp/ccqiorEF.s page 300 + + + 9202 0040 43F00803 orr r3, r3, #8 + 9203 0044 9360 str r3, [r2, #8] + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9204 .loc 1 418 3 view .LVU3080 + 9205 0046 2268 ldr r2, [r4] + 9206 0048 1368 ldr r3, [r2] + 9207 004a 43F00103 orr r3, r3, #1 + 9208 004e 1360 str r3, [r2] + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9209 .loc 1 421 3 view .LVU3081 + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9210 .loc 1 421 11 is_stmt 0 view .LVU3082 + 9211 0050 2046 mov r0, r4 + 9212 0052 FFF7FEFF bl UART_CheckIdleState + 9213 .LVL802: + 9214 .L454: + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9215 .loc 1 422 1 view .LVU3083 + 9216 0056 10BD pop {r4, pc} + 9217 .LVL803: + 9218 .L462: + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9219 .loc 1 376 5 is_stmt 1 view .LVU3084 + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9220 .loc 1 376 17 is_stmt 0 view .LVU3085 + 9221 0058 80F87830 strb r3, [r0, #120] + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9222 .loc 1 390 5 is_stmt 1 view .LVU3086 + 9223 005c FFF7FEFF bl HAL_UART_MspInit + 9224 .LVL804: + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9225 .loc 1 390 5 is_stmt 0 view .LVU3087 + 9226 0060 D4E7 b .L455 + 9227 .L463: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9228 .loc 1 406 5 is_stmt 1 view .LVU3088 + 9229 0062 2046 mov r0, r4 + 9230 0064 FFF7FEFF bl UART_AdvFeatureConfig + 9231 .LVL805: + 9232 0068 DEE7 b .L456 + 9233 .LVL806: + 9234 .L457: + 9235 .cfi_def_cfa_offset 0 + 9236 .cfi_restore 4 + 9237 .cfi_restore 14 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9238 .loc 1 367 12 is_stmt 0 view .LVU3089 + 9239 006a 0120 movs r0, #1 + 9240 .LVL807: + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9241 .loc 1 422 1 view .LVU3090 + 9242 006c 7047 bx lr + 9243 .cfi_endproc + 9244 .LFE131: + 9246 .section .text.HAL_LIN_Init,"ax",%progbits + 9247 .align 1 + 9248 .global HAL_LIN_Init + ARM GAS /tmp/ccqiorEF.s page 301 + + + 9249 .syntax unified + 9250 .thumb + 9251 .thumb_func + 9253 HAL_LIN_Init: + 9254 .LVL808: + 9255 .LFB132: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9256 .loc 1 436 1 is_stmt 1 view -0 + 9257 .cfi_startproc + 9258 @ args = 0, pretend = 0, frame = 0 + 9259 @ frame_needed = 0, uses_anonymous_args = 0 + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9260 .loc 1 438 3 view .LVU3092 + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9261 .loc 1 438 6 is_stmt 0 view .LVU3093 + 9262 0000 0028 cmp r0, #0 + 9263 0002 40D0 beq .L468 + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9264 .loc 1 436 1 view .LVU3094 + 9265 0004 38B5 push {r3, r4, r5, lr} + 9266 .cfi_def_cfa_offset 16 + 9267 .cfi_offset 3, -16 + 9268 .cfi_offset 4, -12 + 9269 .cfi_offset 5, -8 + 9270 .cfi_offset 14, -4 + 9271 0006 0D46 mov r5, r1 + 9272 0008 0446 mov r4, r0 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the Break detection length parameter */ + 9273 .loc 1 444 3 is_stmt 1 view .LVU3095 + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9274 .loc 1 446 3 view .LVU3096 + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9275 .loc 1 449 3 view .LVU3097 + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9276 .loc 1 449 18 is_stmt 0 view .LVU3098 + 9277 000a C369 ldr r3, [r0, #28] + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9278 .loc 1 449 6 view .LVU3099 + 9279 000c B3F5004F cmp r3, #32768 + 9280 0010 3BD0 beq .L469 + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9281 .loc 1 454 3 is_stmt 1 view .LVU3100 + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9282 .loc 1 454 18 is_stmt 0 view .LVU3101 + 9283 0012 8368 ldr r3, [r0, #8] + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9284 .loc 1 454 6 view .LVU3102 + 9285 0014 002B cmp r3, #0 + 9286 0016 3AD1 bne .L470 + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9287 .loc 1 459 3 is_stmt 1 view .LVU3103 + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9288 .loc 1 459 12 is_stmt 0 view .LVU3104 + 9289 0018 C36F ldr r3, [r0, #124] + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9290 .loc 1 459 6 view .LVU3105 + 9291 001a 5BB3 cbz r3, .L475 + ARM GAS /tmp/ccqiorEF.s page 302 + + + 9292 .LVL809: + 9293 .L466: + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9294 .loc 1 480 3 is_stmt 1 view .LVU3106 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9295 .loc 1 480 17 is_stmt 0 view .LVU3107 + 9296 001c 2423 movs r3, #36 + 9297 001e E367 str r3, [r4, #124] + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9298 .loc 1 482 3 is_stmt 1 view .LVU3108 + 9299 0020 2268 ldr r2, [r4] + 9300 0022 1368 ldr r3, [r2] + 9301 0024 23F00103 bic r3, r3, #1 + 9302 0028 1360 str r3, [r2] + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9303 .loc 1 485 3 view .LVU3109 + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9304 .loc 1 485 7 is_stmt 0 view .LVU3110 + 9305 002a 2046 mov r0, r4 + 9306 002c FFF7FEFF bl UART_SetConfig + 9307 .LVL810: + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9308 .loc 1 485 6 discriminator 1 view .LVU3111 + 9309 0030 0128 cmp r0, #1 + 9310 0032 1ED0 beq .L465 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9311 .loc 1 490 3 is_stmt 1 view .LVU3112 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9312 .loc 1 490 26 is_stmt 0 view .LVU3113 + 9313 0034 636A ldr r3, [r4, #36] + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9314 .loc 1 490 6 view .LVU3114 + 9315 0036 13BB cbnz r3, .L476 + 9316 .L467: + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); + 9317 .loc 1 498 3 is_stmt 1 view .LVU3115 + 9318 0038 2268 ldr r2, [r4] + 9319 003a 5368 ldr r3, [r2, #4] + 9320 003c 23F40063 bic r3, r3, #2048 + 9321 0040 5360 str r3, [r2, #4] + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9322 .loc 1 499 3 view .LVU3116 + 9323 0042 2268 ldr r2, [r4] + 9324 0044 9368 ldr r3, [r2, #8] + 9325 0046 23F02A03 bic r3, r3, #42 + 9326 004a 9360 str r3, [r2, #8] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9327 .loc 1 502 3 view .LVU3117 + 9328 004c 2268 ldr r2, [r4] + 9329 004e 5368 ldr r3, [r2, #4] + 9330 0050 43F48043 orr r3, r3, #16384 + 9331 0054 5360 str r3, [r2, #4] + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9332 .loc 1 505 3 view .LVU3118 + 9333 0056 2268 ldr r2, [r4] + 9334 0058 5368 ldr r3, [r2, #4] + 9335 005a 23F02003 bic r3, r3, #32 + ARM GAS /tmp/ccqiorEF.s page 303 + + + 9336 005e 2B43 orrs r3, r3, r5 + 9337 0060 5360 str r3, [r2, #4] + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9338 .loc 1 507 3 view .LVU3119 + 9339 0062 2268 ldr r2, [r4] + 9340 0064 1368 ldr r3, [r2] + 9341 0066 43F00103 orr r3, r3, #1 + 9342 006a 1360 str r3, [r2] + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9343 .loc 1 510 3 view .LVU3120 + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9344 .loc 1 510 11 is_stmt 0 view .LVU3121 + 9345 006c 2046 mov r0, r4 + 9346 006e FFF7FEFF bl UART_CheckIdleState + 9347 .LVL811: + 9348 .L465: + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9349 .loc 1 511 1 view .LVU3122 + 9350 0072 38BD pop {r3, r4, r5, pc} + 9351 .LVL812: + 9352 .L475: + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9353 .loc 1 462 5 is_stmt 1 view .LVU3123 + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9354 .loc 1 462 17 is_stmt 0 view .LVU3124 + 9355 0074 80F87830 strb r3, [r0, #120] + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9356 .loc 1 476 5 is_stmt 1 view .LVU3125 + 9357 0078 FFF7FEFF bl HAL_UART_MspInit + 9358 .LVL813: + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9359 .loc 1 476 5 is_stmt 0 view .LVU3126 + 9360 007c CEE7 b .L466 + 9361 .L476: + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9362 .loc 1 492 5 is_stmt 1 view .LVU3127 + 9363 007e 2046 mov r0, r4 + 9364 0080 FFF7FEFF bl UART_AdvFeatureConfig + 9365 .LVL814: + 9366 0084 D8E7 b .L467 + 9367 .LVL815: + 9368 .L468: + 9369 .cfi_def_cfa_offset 0 + 9370 .cfi_restore 3 + 9371 .cfi_restore 4 + 9372 .cfi_restore 5 + 9373 .cfi_restore 14 + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9374 .loc 1 440 12 is_stmt 0 view .LVU3128 + 9375 0086 0120 movs r0, #1 + 9376 .LVL816: + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9377 .loc 1 511 1 view .LVU3129 + 9378 0088 7047 bx lr + 9379 .LVL817: + 9380 .L469: + 9381 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccqiorEF.s page 304 + + + 9382 .cfi_offset 3, -16 + 9383 .cfi_offset 4, -12 + 9384 .cfi_offset 5, -8 + 9385 .cfi_offset 14, -4 + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9386 .loc 1 451 12 view .LVU3130 + 9387 008a 0120 movs r0, #1 + 9388 .LVL818: + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9389 .loc 1 451 12 view .LVU3131 + 9390 008c F1E7 b .L465 + 9391 .LVL819: + 9392 .L470: + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9393 .loc 1 456 12 view .LVU3132 + 9394 008e 0120 movs r0, #1 + 9395 .LVL820: + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9396 .loc 1 456 12 view .LVU3133 + 9397 0090 EFE7 b .L465 + 9398 .cfi_endproc + 9399 .LFE132: + 9401 .section .text.HAL_MultiProcessor_Init,"ax",%progbits + 9402 .align 1 + 9403 .global HAL_MultiProcessor_Init + 9404 .syntax unified + 9405 .thumb + 9406 .thumb_func + 9408 HAL_MultiProcessor_Init: + 9409 .LVL821: + 9410 .LFB133: + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9411 .loc 1 533 1 is_stmt 1 view -0 + 9412 .cfi_startproc + 9413 @ args = 0, pretend = 0, frame = 0 + 9414 @ frame_needed = 0, uses_anonymous_args = 0 + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9415 .loc 1 535 3 view .LVU3135 + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9416 .loc 1 535 6 is_stmt 0 view .LVU3136 + 9417 0000 0028 cmp r0, #0 + 9418 0002 40D0 beq .L482 + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check the UART handle allocation */ + 9419 .loc 1 533 1 view .LVU3137 + 9420 0004 70B5 push {r4, r5, r6, lr} + 9421 .cfi_def_cfa_offset 16 + 9422 .cfi_offset 4, -16 + 9423 .cfi_offset 5, -12 + 9424 .cfi_offset 6, -8 + 9425 .cfi_offset 14, -4 + 9426 0006 0E46 mov r6, r1 + 9427 0008 1546 mov r5, r2 + 9428 000a 0446 mov r4, r0 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9429 .loc 1 541 3 is_stmt 1 view .LVU3138 + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9430 .loc 1 543 3 view .LVU3139 + ARM GAS /tmp/ccqiorEF.s page 305 + + + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9431 .loc 1 543 12 is_stmt 0 view .LVU3140 + 9432 000c C36F ldr r3, [r0, #124] + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9433 .loc 1 543 6 view .LVU3141 + 9434 000e 4BB3 cbz r3, .L487 + 9435 .LVL822: + 9436 .L479: + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9437 .loc 1 564 3 is_stmt 1 view .LVU3142 + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9438 .loc 1 564 17 is_stmt 0 view .LVU3143 + 9439 0010 2423 movs r3, #36 + 9440 0012 E367 str r3, [r4, #124] + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9441 .loc 1 566 3 is_stmt 1 view .LVU3144 + 9442 0014 2268 ldr r2, [r4] + 9443 0016 1368 ldr r3, [r2] + 9444 0018 23F00103 bic r3, r3, #1 + 9445 001c 1360 str r3, [r2] + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9446 .loc 1 569 3 view .LVU3145 + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9447 .loc 1 569 7 is_stmt 0 view .LVU3146 + 9448 001e 2046 mov r0, r4 + 9449 0020 FFF7FEFF bl UART_SetConfig + 9450 .LVL823: + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9451 .loc 1 569 6 discriminator 1 view .LVU3147 + 9452 0024 0128 cmp r0, #1 + 9453 0026 1CD0 beq .L478 + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9454 .loc 1 574 3 is_stmt 1 view .LVU3148 + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9455 .loc 1 574 26 is_stmt 0 view .LVU3149 + 9456 0028 636A ldr r3, [r4, #36] + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9457 .loc 1 574 6 view .LVU3150 + 9458 002a 03BB cbnz r3, .L488 + 9459 .L480: + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); + 9460 .loc 1 582 3 is_stmt 1 view .LVU3151 + 9461 002c 2268 ldr r2, [r4] + 9462 002e 5368 ldr r3, [r2, #4] + 9463 0030 23F49043 bic r3, r3, #18432 + 9464 0034 5360 str r3, [r2, #4] + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9465 .loc 1 583 3 view .LVU3152 + 9466 0036 2268 ldr r2, [r4] + 9467 0038 9368 ldr r3, [r2, #8] + 9468 003a 23F02A03 bic r3, r3, #42 + 9469 003e 9360 str r3, [r2, #8] + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9470 .loc 1 585 3 view .LVU3153 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9471 .loc 1 585 6 is_stmt 0 view .LVU3154 + 9472 0040 B5F5006F cmp r5, #2048 + ARM GAS /tmp/ccqiorEF.s page 306 + + + 9473 0044 17D0 beq .L489 + 9474 .L481: + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9475 .loc 1 592 3 is_stmt 1 view .LVU3155 + 9476 0046 2268 ldr r2, [r4] + 9477 0048 1368 ldr r3, [r2] + 9478 004a 23F40063 bic r3, r3, #2048 + 9479 004e 2B43 orrs r3, r3, r5 + 9480 0050 1360 str r3, [r2] + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9481 .loc 1 594 3 view .LVU3156 + 9482 0052 2268 ldr r2, [r4] + 9483 0054 1368 ldr r3, [r2] + 9484 0056 43F00103 orr r3, r3, #1 + 9485 005a 1360 str r3, [r2] + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9486 .loc 1 597 3 view .LVU3157 + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9487 .loc 1 597 11 is_stmt 0 view .LVU3158 + 9488 005c 2046 mov r0, r4 + 9489 005e FFF7FEFF bl UART_CheckIdleState + 9490 .LVL824: + 9491 .L478: + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9492 .loc 1 598 1 view .LVU3159 + 9493 0062 70BD pop {r4, r5, r6, pc} + 9494 .LVL825: + 9495 .L487: + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9496 .loc 1 546 5 is_stmt 1 view .LVU3160 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9497 .loc 1 546 17 is_stmt 0 view .LVU3161 + 9498 0064 80F87830 strb r3, [r0, #120] + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9499 .loc 1 560 5 is_stmt 1 view .LVU3162 + 9500 0068 FFF7FEFF bl HAL_UART_MspInit + 9501 .LVL826: + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 9502 .loc 1 560 5 is_stmt 0 view .LVU3163 + 9503 006c D0E7 b .L479 + 9504 .L488: + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9505 .loc 1 576 5 is_stmt 1 view .LVU3164 + 9506 006e 2046 mov r0, r4 + 9507 0070 FFF7FEFF bl UART_AdvFeatureConfig + 9508 .LVL827: + 9509 0074 DAE7 b .L480 + 9510 .L489: + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9511 .loc 1 588 5 view .LVU3165 + 9512 0076 2268 ldr r2, [r4] + 9513 0078 5368 ldr r3, [r2, #4] + 9514 007a 23F07F43 bic r3, r3, #-16777216 + 9515 007e 43EA0663 orr r3, r3, r6, lsl #24 + 9516 0082 5360 str r3, [r2, #4] + 9517 0084 DFE7 b .L481 + 9518 .LVL828: + ARM GAS /tmp/ccqiorEF.s page 307 + + + 9519 .L482: + 9520 .cfi_def_cfa_offset 0 + 9521 .cfi_restore 4 + 9522 .cfi_restore 5 + 9523 .cfi_restore 6 + 9524 .cfi_restore 14 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9525 .loc 1 537 12 is_stmt 0 view .LVU3166 + 9526 0086 0120 movs r0, #1 + 9527 .LVL829: + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9528 .loc 1 598 1 view .LVU3167 + 9529 0088 7047 bx lr + 9530 .cfi_endproc + 9531 .LFE133: + 9533 .section .text.HAL_MultiProcessor_EnableMuteMode,"ax",%progbits + 9534 .align 1 + 9535 .global HAL_MultiProcessor_EnableMuteMode + 9536 .syntax unified + 9537 .thumb + 9538 .thumb_func + 9540 HAL_MultiProcessor_EnableMuteMode: + 9541 .LVL830: + 9542 .LFB165: +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 9543 .loc 1 2665 1 is_stmt 1 view -0 + 9544 .cfi_startproc + 9545 @ args = 0, pretend = 0, frame = 0 + 9546 @ frame_needed = 0, uses_anonymous_args = 0 +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 9547 .loc 1 2665 1 is_stmt 0 view .LVU3169 + 9548 0000 08B5 push {r3, lr} + 9549 .cfi_def_cfa_offset 8 + 9550 .cfi_offset 3, -8 + 9551 .cfi_offset 14, -4 +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9552 .loc 1 2666 3 is_stmt 1 view .LVU3170 +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9553 .loc 1 2666 3 view .LVU3171 + 9554 0002 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 9555 0006 012B cmp r3, #1 + 9556 0008 12D0 beq .L493 +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9557 .loc 1 2666 3 discriminator 2 view .LVU3172 + 9558 000a 0123 movs r3, #1 + 9559 000c 80F87830 strb r3, [r0, #120] +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9560 .loc 1 2666 3 discriminator 2 view .LVU3173 +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9561 .loc 1 2668 3 view .LVU3174 +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9562 .loc 1 2668 17 is_stmt 0 view .LVU3175 + 9563 0010 2423 movs r3, #36 + 9564 0012 C367 str r3, [r0, #124] + 9565 .L492: +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9566 .loc 1 2671 3 is_stmt 1 discriminator 1 view .LVU3176 + ARM GAS /tmp/ccqiorEF.s page 308 + + + 9567 .LBB777: +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9568 .loc 1 2671 3 discriminator 1 view .LVU3177 +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9569 .loc 1 2671 3 discriminator 1 view .LVU3178 +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9570 .loc 1 2671 3 discriminator 1 view .LVU3179 + 9571 0014 0268 ldr r2, [r0] + 9572 .LVL831: + 9573 .LBB778: + 9574 .LBI778: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9575 .loc 2 1068 31 view .LVU3180 + 9576 .LBB779: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9577 .loc 2 1070 5 view .LVU3181 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9578 .loc 2 1072 4 view .LVU3182 + 9579 .syntax unified + 9580 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9581 0016 52E8003F ldrex r3, [r2] + 9582 @ 0 "" 2 + 9583 .LVL832: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9584 .loc 2 1073 4 view .LVU3183 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9585 .loc 2 1073 4 is_stmt 0 view .LVU3184 + 9586 .thumb + 9587 .syntax unified + 9588 .LBE779: + 9589 .LBE778: +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9590 .loc 1 2671 3 discriminator 1 view .LVU3185 + 9591 001a 43F40053 orr r3, r3, #8192 + 9592 .LVL833: +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9593 .loc 1 2671 3 is_stmt 1 discriminator 1 view .LVU3186 + 9594 .LBB780: + 9595 .LBI780: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9596 .loc 2 1119 31 view .LVU3187 + 9597 .LBB781: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9598 .loc 2 1121 4 view .LVU3188 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9599 .loc 2 1123 4 view .LVU3189 + 9600 .syntax unified + 9601 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9602 001e 42E80031 strex r1, r3, [r2] + 9603 @ 0 "" 2 + 9604 .LVL834: + 9605 .loc 2 1124 4 view .LVU3190 + 9606 .loc 2 1124 4 is_stmt 0 view .LVU3191 + 9607 .thumb + 9608 .syntax unified + 9609 .LBE781: + 9610 .LBE780: + ARM GAS /tmp/ccqiorEF.s page 309 + + +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9611 .loc 1 2671 3 discriminator 1 view .LVU3192 + 9612 0022 0029 cmp r1, #0 + 9613 0024 F6D1 bne .L492 + 9614 .LBE777: +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9615 .loc 1 2671 3 is_stmt 1 discriminator 2 view .LVU3193 +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9616 .loc 1 2673 3 view .LVU3194 +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9617 .loc 1 2673 17 is_stmt 0 view .LVU3195 + 9618 0026 2023 movs r3, #32 + 9619 .LVL835: +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9620 .loc 1 2673 17 view .LVU3196 + 9621 0028 C367 str r3, [r0, #124] +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9622 .loc 1 2675 3 is_stmt 1 view .LVU3197 +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9623 .loc 1 2675 11 is_stmt 0 view .LVU3198 + 9624 002a FFF7FEFF bl UART_CheckIdleState + 9625 .LVL836: + 9626 .L491: +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9627 .loc 1 2676 1 view .LVU3199 + 9628 002e 08BD pop {r3, pc} + 9629 .LVL837: + 9630 .L493: +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9631 .loc 1 2666 3 discriminator 1 view .LVU3200 + 9632 0030 0220 movs r0, #2 + 9633 .LVL838: +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9634 .loc 1 2666 3 discriminator 1 view .LVU3201 + 9635 0032 FCE7 b .L491 + 9636 .cfi_endproc + 9637 .LFE165: + 9639 .section .text.HAL_MultiProcessor_DisableMuteMode,"ax",%progbits + 9640 .align 1 + 9641 .global HAL_MultiProcessor_DisableMuteMode + 9642 .syntax unified + 9643 .thumb + 9644 .thumb_func + 9646 HAL_MultiProcessor_DisableMuteMode: + 9647 .LVL839: + 9648 .LFB166: +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 9649 .loc 1 2685 1 is_stmt 1 view -0 + 9650 .cfi_startproc + 9651 @ args = 0, pretend = 0, frame = 0 + 9652 @ frame_needed = 0, uses_anonymous_args = 0 +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** __HAL_LOCK(huart); + 9653 .loc 1 2685 1 is_stmt 0 view .LVU3203 + 9654 0000 08B5 push {r3, lr} + 9655 .cfi_def_cfa_offset 8 + 9656 .cfi_offset 3, -8 + 9657 .cfi_offset 14, -4 + ARM GAS /tmp/ccqiorEF.s page 310 + + +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9658 .loc 1 2686 3 is_stmt 1 view .LVU3204 +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9659 .loc 1 2686 3 view .LVU3205 + 9660 0002 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 9661 0006 012B cmp r3, #1 + 9662 0008 12D0 beq .L498 +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9663 .loc 1 2686 3 discriminator 2 view .LVU3206 + 9664 000a 0123 movs r3, #1 + 9665 000c 80F87830 strb r3, [r0, #120] +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9666 .loc 1 2686 3 discriminator 2 view .LVU3207 +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9667 .loc 1 2688 3 view .LVU3208 +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9668 .loc 1 2688 17 is_stmt 0 view .LVU3209 + 9669 0010 2423 movs r3, #36 + 9670 0012 C367 str r3, [r0, #124] + 9671 .L497: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9672 .loc 1 2691 3 is_stmt 1 discriminator 1 view .LVU3210 + 9673 .LBB782: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9674 .loc 1 2691 3 discriminator 1 view .LVU3211 +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9675 .loc 1 2691 3 discriminator 1 view .LVU3212 +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9676 .loc 1 2691 3 discriminator 1 view .LVU3213 + 9677 0014 0268 ldr r2, [r0] + 9678 .LVL840: + 9679 .LBB783: + 9680 .LBI783: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9681 .loc 2 1068 31 view .LVU3214 + 9682 .LBB784: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9683 .loc 2 1070 5 view .LVU3215 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9684 .loc 2 1072 4 view .LVU3216 + 9685 .syntax unified + 9686 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9687 0016 52E8003F ldrex r3, [r2] + 9688 @ 0 "" 2 + 9689 .LVL841: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9690 .loc 2 1073 4 view .LVU3217 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9691 .loc 2 1073 4 is_stmt 0 view .LVU3218 + 9692 .thumb + 9693 .syntax unified + 9694 .LBE784: + 9695 .LBE783: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9696 .loc 1 2691 3 discriminator 1 view .LVU3219 + 9697 001a 23F40053 bic r3, r3, #8192 + 9698 .LVL842: + ARM GAS /tmp/ccqiorEF.s page 311 + + +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9699 .loc 1 2691 3 is_stmt 1 discriminator 1 view .LVU3220 + 9700 .LBB785: + 9701 .LBI785: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9702 .loc 2 1119 31 view .LVU3221 + 9703 .LBB786: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9704 .loc 2 1121 4 view .LVU3222 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9705 .loc 2 1123 4 view .LVU3223 + 9706 .syntax unified + 9707 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9708 001e 42E80031 strex r1, r3, [r2] + 9709 @ 0 "" 2 + 9710 .LVL843: + 9711 .loc 2 1124 4 view .LVU3224 + 9712 .loc 2 1124 4 is_stmt 0 view .LVU3225 + 9713 .thumb + 9714 .syntax unified + 9715 .LBE786: + 9716 .LBE785: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9717 .loc 1 2691 3 discriminator 1 view .LVU3226 + 9718 0022 0029 cmp r1, #0 + 9719 0024 F6D1 bne .L497 + 9720 .LBE782: +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9721 .loc 1 2691 3 is_stmt 1 discriminator 2 view .LVU3227 +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9722 .loc 1 2693 3 view .LVU3228 +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9723 .loc 1 2693 17 is_stmt 0 view .LVU3229 + 9724 0026 2023 movs r3, #32 + 9725 .LVL844: +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9726 .loc 1 2693 17 view .LVU3230 + 9727 0028 C367 str r3, [r0, #124] +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9728 .loc 1 2695 3 is_stmt 1 view .LVU3231 +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9729 .loc 1 2695 11 is_stmt 0 view .LVU3232 + 9730 002a FFF7FEFF bl UART_CheckIdleState + 9731 .LVL845: + 9732 .L496: +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9733 .loc 1 2696 1 view .LVU3233 + 9734 002e 08BD pop {r3, pc} + 9735 .LVL846: + 9736 .L498: +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9737 .loc 1 2686 3 discriminator 1 view .LVU3234 + 9738 0030 0220 movs r0, #2 + 9739 .LVL847: +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9740 .loc 1 2686 3 discriminator 1 view .LVU3235 + 9741 0032 FCE7 b .L496 + ARM GAS /tmp/ccqiorEF.s page 312 + + + 9742 .cfi_endproc + 9743 .LFE166: + 9745 .section .text.UART_Start_Receive_IT,"ax",%progbits + 9746 .align 1 + 9747 .global UART_Start_Receive_IT + 9748 .syntax unified + 9749 .thumb + 9750 .thumb_func + 9752 UART_Start_Receive_IT: + 9753 .LVL848: + 9754 .LFB177: +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = pData; + 9755 .loc 1 3222 1 is_stmt 1 view -0 + 9756 .cfi_startproc + 9757 @ args = 0, pretend = 0, frame = 0 + 9758 @ frame_needed = 0, uses_anonymous_args = 0 + 9759 @ link register save eliminated. +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; + 9760 .loc 1 3223 3 view .LVU3237 +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; + 9761 .loc 1 3223 22 is_stmt 0 view .LVU3238 + 9762 0000 4165 str r1, [r0, #84] +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = Size; + 9763 .loc 1 3224 3 is_stmt 1 view .LVU3239 +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferCount = Size; + 9764 .loc 1 3224 22 is_stmt 0 view .LVU3240 + 9765 0002 A0F85820 strh r2, [r0, #88] @ movhi +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; + 9766 .loc 1 3225 3 is_stmt 1 view .LVU3241 +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxISR = NULL; + 9767 .loc 1 3225 22 is_stmt 0 view .LVU3242 + 9768 0006 A0F85A20 strh r2, [r0, #90] @ movhi +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9769 .loc 1 3226 3 is_stmt 1 view .LVU3243 +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9770 .loc 1 3226 22 is_stmt 0 view .LVU3244 + 9771 000a 0023 movs r3, #0 + 9772 000c 8366 str r3, [r0, #104] +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9773 .loc 1 3229 3 is_stmt 1 view .LVU3245 +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9774 .loc 1 3229 3 view .LVU3246 + 9775 000e 8368 ldr r3, [r0, #8] + 9776 0010 B3F5805F cmp r3, #4096 + 9777 0014 06D0 beq .L512 +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9778 .loc 1 3229 3 discriminator 2 view .LVU3247 + 9779 0016 A3B9 cbnz r3, .L504 +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9780 .loc 1 3229 3 discriminator 5 view .LVU3248 + 9781 0018 0369 ldr r3, [r0, #16] + 9782 001a 73B9 cbnz r3, .L505 +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9783 .loc 1 3229 3 discriminator 7 view .LVU3249 + 9784 001c FF23 movs r3, #255 + 9785 001e A0F85C30 strh r3, [r0, #92] @ movhi + 9786 0022 11E0 b .L503 + ARM GAS /tmp/ccqiorEF.s page 313 + + + 9787 .L512: +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9788 .loc 1 3229 3 discriminator 1 view .LVU3250 + 9789 0024 0369 ldr r3, [r0, #16] + 9790 0026 23B9 cbnz r3, .L502 +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9791 .loc 1 3229 3 discriminator 3 view .LVU3251 + 9792 0028 40F2FF13 movw r3, #511 + 9793 002c A0F85C30 strh r3, [r0, #92] @ movhi + 9794 0030 0AE0 b .L503 + 9795 .L502: +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9796 .loc 1 3229 3 discriminator 4 view .LVU3252 + 9797 0032 FF23 movs r3, #255 + 9798 0034 A0F85C30 strh r3, [r0, #92] @ movhi + 9799 0038 06E0 b .L503 + 9800 .L505: +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9801 .loc 1 3229 3 discriminator 8 view .LVU3253 + 9802 003a 7F23 movs r3, #127 + 9803 003c A0F85C30 strh r3, [r0, #92] @ movhi + 9804 0040 02E0 b .L503 + 9805 .L504: +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9806 .loc 1 3229 3 discriminator 6 view .LVU3254 + 9807 0042 0023 movs r3, #0 + 9808 0044 A0F85C30 strh r3, [r0, #92] @ movhi + 9809 .L503: +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9810 .loc 1 3229 3 discriminator 9 view .LVU3255 +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 9811 .loc 1 3231 3 view .LVU3256 +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 9812 .loc 1 3231 20 is_stmt 0 view .LVU3257 + 9813 0048 0023 movs r3, #0 + 9814 004a C0F88430 str r3, [r0, #132] +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9815 .loc 1 3232 3 is_stmt 1 view .LVU3258 +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9816 .loc 1 3232 18 is_stmt 0 view .LVU3259 + 9817 004e 2223 movs r3, #34 + 9818 0050 C0F88030 str r3, [r0, #128] + 9819 .LVL849: + 9820 .L506: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9821 .loc 1 3235 3 is_stmt 1 discriminator 1 view .LVU3260 + 9822 .LBB787: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9823 .loc 1 3235 3 discriminator 1 view .LVU3261 +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9824 .loc 1 3235 3 discriminator 1 view .LVU3262 +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9825 .loc 1 3235 3 discriminator 1 view .LVU3263 + 9826 0054 0268 ldr r2, [r0] + 9827 .LVL850: + 9828 .LBB788: + 9829 .LBI788: + ARM GAS /tmp/ccqiorEF.s page 314 + + +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9830 .loc 2 1068 31 view .LVU3264 + 9831 .LBB789: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9832 .loc 2 1070 5 view .LVU3265 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9833 .loc 2 1072 4 view .LVU3266 + 9834 0056 02F10803 add r3, r2, #8 + 9835 .LVL851: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9836 .loc 2 1072 4 is_stmt 0 view .LVU3267 + 9837 .syntax unified + 9838 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9839 005a 53E8003F ldrex r3, [r3] + 9840 @ 0 "" 2 + 9841 .LVL852: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9842 .loc 2 1073 4 is_stmt 1 view .LVU3268 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9843 .loc 2 1073 4 is_stmt 0 view .LVU3269 + 9844 .thumb + 9845 .syntax unified + 9846 .LBE789: + 9847 .LBE788: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9848 .loc 1 3235 3 discriminator 1 view .LVU3270 + 9849 005e 43F00103 orr r3, r3, #1 + 9850 .LVL853: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9851 .loc 1 3235 3 is_stmt 1 discriminator 1 view .LVU3271 + 9852 .LBB790: + 9853 .LBI790: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9854 .loc 2 1119 31 view .LVU3272 + 9855 .LBB791: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9856 .loc 2 1121 4 view .LVU3273 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9857 .loc 2 1123 4 view .LVU3274 + 9858 0062 0832 adds r2, r2, #8 + 9859 .LVL854: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9860 .loc 2 1123 4 is_stmt 0 view .LVU3275 + 9861 .syntax unified + 9862 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9863 0064 42E80031 strex r1, r3, [r2] + 9864 @ 0 "" 2 + 9865 .LVL855: + 9866 .loc 2 1124 4 is_stmt 1 view .LVU3276 + 9867 .loc 2 1124 4 is_stmt 0 view .LVU3277 + 9868 .thumb + 9869 .syntax unified + 9870 .LBE791: + 9871 .LBE790: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9872 .loc 1 3235 3 discriminator 1 view .LVU3278 + 9873 0068 0029 cmp r1, #0 + ARM GAS /tmp/ccqiorEF.s page 315 + + + 9874 006a F3D1 bne .L506 + 9875 .LBE787: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9876 .loc 1 3235 3 is_stmt 1 discriminator 2 view .LVU3279 +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9877 .loc 1 3238 3 view .LVU3280 +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9878 .loc 1 3238 19 is_stmt 0 view .LVU3281 + 9879 006c 8368 ldr r3, [r0, #8] + 9880 .LVL856: +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9881 .loc 1 3238 6 view .LVU3282 + 9882 006e B3F5805F cmp r3, #4096 + 9883 0072 0ED0 beq .L513 + 9884 .L507: +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9885 .loc 1 3244 5 is_stmt 1 view .LVU3283 +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9886 .loc 1 3244 18 is_stmt 0 view .LVU3284 + 9887 0074 0F4B ldr r3, .L514 + 9888 0076 8366 str r3, [r0, #104] + 9889 .L508: +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9890 .loc 1 3248 3 is_stmt 1 view .LVU3285 +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9891 .loc 1 3248 18 is_stmt 0 view .LVU3286 + 9892 0078 0369 ldr r3, [r0, #16] +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9893 .loc 1 3248 6 view .LVU3287 + 9894 007a 83B1 cbz r3, .L509 + 9895 .L510: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9896 .loc 1 3250 5 is_stmt 1 discriminator 1 view .LVU3288 + 9897 .LBB792: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9898 .loc 1 3250 5 discriminator 1 view .LVU3289 +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9899 .loc 1 3250 5 discriminator 1 view .LVU3290 +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9900 .loc 1 3250 5 discriminator 1 view .LVU3291 + 9901 007c 0268 ldr r2, [r0] + 9902 .LVL857: + 9903 .LBB793: + 9904 .LBI793: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9905 .loc 2 1068 31 view .LVU3292 + 9906 .LBB794: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9907 .loc 2 1070 5 view .LVU3293 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9908 .loc 2 1072 4 view .LVU3294 + 9909 .syntax unified + 9910 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9911 007e 52E8003F ldrex r3, [r2] + 9912 @ 0 "" 2 + 9913 .LVL858: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccqiorEF.s page 316 + + + 9914 .loc 2 1073 4 view .LVU3295 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9915 .loc 2 1073 4 is_stmt 0 view .LVU3296 + 9916 .thumb + 9917 .syntax unified + 9918 .LBE794: + 9919 .LBE793: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9920 .loc 1 3250 5 discriminator 1 view .LVU3297 + 9921 0082 43F49073 orr r3, r3, #288 + 9922 .LVL859: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9923 .loc 1 3250 5 is_stmt 1 discriminator 1 view .LVU3298 + 9924 .LBB795: + 9925 .LBI795: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9926 .loc 2 1119 31 view .LVU3299 + 9927 .LBB796: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9928 .loc 2 1121 4 view .LVU3300 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9929 .loc 2 1123 4 view .LVU3301 + 9930 .syntax unified + 9931 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9932 0086 42E80031 strex r1, r3, [r2] + 9933 @ 0 "" 2 + 9934 .LVL860: + 9935 .loc 2 1124 4 view .LVU3302 + 9936 .loc 2 1124 4 is_stmt 0 view .LVU3303 + 9937 .thumb + 9938 .syntax unified + 9939 .LBE796: + 9940 .LBE795: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9941 .loc 1 3250 5 discriminator 1 view .LVU3304 + 9942 008a 0029 cmp r1, #0 + 9943 008c F6D1 bne .L510 + 9944 .LVL861: + 9945 .L511: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9946 .loc 1 3250 5 discriminator 1 view .LVU3305 + 9947 .LBE792: +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9948 .loc 1 3254 5 is_stmt 1 discriminator 2 view .LVU3306 +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9949 .loc 1 3256 3 view .LVU3307 +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9950 .loc 1 3257 1 is_stmt 0 view .LVU3308 + 9951 008e 0020 movs r0, #0 + 9952 .LVL862: +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 9953 .loc 1 3257 1 view .LVU3309 + 9954 0090 7047 bx lr + 9955 .LVL863: + 9956 .L513: +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9957 .loc 1 3238 69 discriminator 1 view .LVU3310 + ARM GAS /tmp/ccqiorEF.s page 317 + + + 9958 0092 0369 ldr r3, [r0, #16] +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 9959 .loc 1 3238 54 discriminator 1 view .LVU3311 + 9960 0094 002B cmp r3, #0 + 9961 0096 EDD1 bne .L507 +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9962 .loc 1 3240 5 is_stmt 1 view .LVU3312 +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9963 .loc 1 3240 18 is_stmt 0 view .LVU3313 + 9964 0098 074B ldr r3, .L514+4 + 9965 009a 8366 str r3, [r0, #104] + 9966 009c ECE7 b .L508 + 9967 .L509: +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9968 .loc 1 3254 5 is_stmt 1 discriminator 1 view .LVU3314 + 9969 .LBB797: +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9970 .loc 1 3254 5 discriminator 1 view .LVU3315 +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9971 .loc 1 3254 5 discriminator 1 view .LVU3316 +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9972 .loc 1 3254 5 discriminator 1 view .LVU3317 + 9973 009e 0268 ldr r2, [r0] + 9974 .LVL864: + 9975 .LBB798: + 9976 .LBI798: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9977 .loc 2 1068 31 view .LVU3318 + 9978 .LBB799: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 9979 .loc 2 1070 5 view .LVU3319 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 9980 .loc 2 1072 4 view .LVU3320 + 9981 .syntax unified + 9982 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9983 00a0 52E8003F ldrex r3, [r2] + 9984 @ 0 "" 2 + 9985 .LVL865: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9986 .loc 2 1073 4 view .LVU3321 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 9987 .loc 2 1073 4 is_stmt 0 view .LVU3322 + 9988 .thumb + 9989 .syntax unified + 9990 .LBE799: + 9991 .LBE798: +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9992 .loc 1 3254 5 discriminator 1 view .LVU3323 + 9993 00a4 43F02003 orr r3, r3, #32 + 9994 .LVL866: +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 9995 .loc 1 3254 5 is_stmt 1 discriminator 1 view .LVU3324 + 9996 .LBB800: + 9997 .LBI800: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 9998 .loc 2 1119 31 view .LVU3325 + 9999 .LBB801: + ARM GAS /tmp/ccqiorEF.s page 318 + + +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10000 .loc 2 1121 4 view .LVU3326 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10001 .loc 2 1123 4 view .LVU3327 + 10002 .syntax unified + 10003 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10004 00a8 42E80031 strex r1, r3, [r2] + 10005 @ 0 "" 2 + 10006 .LVL867: + 10007 .loc 2 1124 4 view .LVU3328 + 10008 .loc 2 1124 4 is_stmt 0 view .LVU3329 + 10009 .thumb + 10010 .syntax unified + 10011 .LBE801: + 10012 .LBE800: +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10013 .loc 1 3254 5 discriminator 1 view .LVU3330 + 10014 00ac 0029 cmp r1, #0 + 10015 00ae F6D1 bne .L509 + 10016 00b0 EDE7 b .L511 + 10017 .L515: + 10018 00b2 00BF .align 2 + 10019 .L514: + 10020 00b4 00000000 .word UART_RxISR_8BIT + 10021 00b8 00000000 .word UART_RxISR_16BIT + 10022 .LBE797: + 10023 .cfi_endproc + 10024 .LFE177: + 10026 .section .text.HAL_UART_Receive_IT,"ax",%progbits + 10027 .align 1 + 10028 .global HAL_UART_Receive_IT + 10029 .syntax unified + 10030 .thumb + 10031 .thumb_func + 10033 HAL_UART_Receive_IT: + 10034 .LVL868: + 10035 .LFB140: +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ + 10036 .loc 1 1299 1 is_stmt 1 view -0 + 10037 .cfi_startproc + 10038 @ args = 0, pretend = 0, frame = 0 + 10039 @ frame_needed = 0, uses_anonymous_args = 0 +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ + 10040 .loc 1 1299 1 is_stmt 0 view .LVU3332 + 10041 0000 38B5 push {r3, r4, r5, lr} + 10042 .cfi_def_cfa_offset 16 + 10043 .cfi_offset 3, -16 + 10044 .cfi_offset 4, -12 + 10045 .cfi_offset 5, -8 + 10046 .cfi_offset 14, -4 +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10047 .loc 1 1301 3 is_stmt 1 view .LVU3333 +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10048 .loc 1 1301 12 is_stmt 0 view .LVU3334 + 10049 0002 D0F88030 ldr r3, [r0, #128] +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10050 .loc 1 1301 6 view .LVU3335 + ARM GAS /tmp/ccqiorEF.s page 319 + + + 10051 0006 202B cmp r3, #32 + 10052 0008 14D1 bne .L520 +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10053 .loc 1 1303 5 is_stmt 1 view .LVU3336 +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10054 .loc 1 1303 8 is_stmt 0 view .LVU3337 + 10055 000a A9B1 cbz r1, .L521 +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10056 .loc 1 1303 25 discriminator 1 view .LVU3338 + 10057 000c B2B1 cbz r2, .L522 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10058 .loc 1 1309 5 is_stmt 1 view .LVU3339 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10059 .loc 1 1309 26 is_stmt 0 view .LVU3340 + 10060 000e 0023 movs r3, #0 + 10061 0010 0366 str r3, [r0, #96] +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10062 .loc 1 1312 5 is_stmt 1 view .LVU3341 +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10063 .loc 1 1312 9 is_stmt 0 view .LVU3342 + 10064 0012 0368 ldr r3, [r0] + 10065 0014 5B68 ldr r3, [r3, #4] +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10066 .loc 1 1312 8 view .LVU3343 + 10067 0016 13F4000F tst r3, #8388608 + 10068 001a 08D0 beq .L518 + 10069 .L519: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10070 .loc 1 1315 7 is_stmt 1 discriminator 1 view .LVU3344 + 10071 .LBB802: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10072 .loc 1 1315 7 discriminator 1 view .LVU3345 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10073 .loc 1 1315 7 discriminator 1 view .LVU3346 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10074 .loc 1 1315 7 discriminator 1 view .LVU3347 + 10075 001c 0468 ldr r4, [r0] + 10076 .LVL869: + 10077 .LBB803: + 10078 .LBI803: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10079 .loc 2 1068 31 view .LVU3348 + 10080 .LBB804: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10081 .loc 2 1070 5 view .LVU3349 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10082 .loc 2 1072 4 view .LVU3350 + 10083 .syntax unified + 10084 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10085 001e 54E8003F ldrex r3, [r4] + 10086 @ 0 "" 2 + 10087 .LVL870: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10088 .loc 2 1073 4 view .LVU3351 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10089 .loc 2 1073 4 is_stmt 0 view .LVU3352 + 10090 .thumb + ARM GAS /tmp/ccqiorEF.s page 320 + + + 10091 .syntax unified + 10092 .LBE804: + 10093 .LBE803: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10094 .loc 1 1315 7 discriminator 1 view .LVU3353 + 10095 0022 43F08063 orr r3, r3, #67108864 + 10096 .LVL871: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10097 .loc 1 1315 7 is_stmt 1 discriminator 1 view .LVU3354 + 10098 .LBB805: + 10099 .LBI805: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10100 .loc 2 1119 31 view .LVU3355 + 10101 .LBB806: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10102 .loc 2 1121 4 view .LVU3356 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10103 .loc 2 1123 4 view .LVU3357 + 10104 .syntax unified + 10105 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10106 0026 44E80035 strex r5, r3, [r4] + 10107 @ 0 "" 2 + 10108 .LVL872: + 10109 .loc 2 1124 4 view .LVU3358 + 10110 .loc 2 1124 4 is_stmt 0 view .LVU3359 + 10111 .thumb + 10112 .syntax unified + 10113 .LBE806: + 10114 .LBE805: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10115 .loc 1 1315 7 discriminator 1 view .LVU3360 + 10116 002a 002D cmp r5, #0 + 10117 002c F6D1 bne .L519 + 10118 .LVL873: + 10119 .L518: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10120 .loc 1 1315 7 discriminator 1 view .LVU3361 + 10121 .LBE802: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10122 .loc 1 1315 7 is_stmt 1 discriminator 2 view .LVU3362 +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10123 .loc 1 1318 5 view .LVU3363 +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10124 .loc 1 1318 13 is_stmt 0 view .LVU3364 + 10125 002e FFF7FEFF bl UART_Start_Receive_IT + 10126 .LVL874: +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10127 .loc 1 1318 13 view .LVU3365 + 10128 0032 00E0 b .L517 + 10129 .LVL875: + 10130 .L520: +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10131 .loc 1 1322 12 view .LVU3366 + 10132 0034 0220 movs r0, #2 + 10133 .LVL876: + 10134 .L517: +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + ARM GAS /tmp/ccqiorEF.s page 321 + + + 10135 .loc 1 1324 1 view .LVU3367 + 10136 0036 38BD pop {r3, r4, r5, pc} + 10137 .LVL877: + 10138 .L521: +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10139 .loc 1 1305 14 view .LVU3368 + 10140 0038 0120 movs r0, #1 + 10141 .LVL878: +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10142 .loc 1 1305 14 view .LVU3369 + 10143 003a FCE7 b .L517 + 10144 .LVL879: + 10145 .L522: +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10146 .loc 1 1305 14 view .LVU3370 + 10147 003c 0120 movs r0, #1 + 10148 .LVL880: +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10149 .loc 1 1305 14 view .LVU3371 + 10150 003e FAE7 b .L517 + 10151 .cfi_endproc + 10152 .LFE140: + 10154 .section .text.UART_Start_Receive_DMA,"ax",%progbits + 10155 .align 1 + 10156 .global UART_Start_Receive_DMA + 10157 .syntax unified + 10158 .thumb + 10159 .thumb_func + 10161 UART_Start_Receive_DMA: + 10162 .LVL881: + 10163 .LFB178: +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = pData; + 10164 .loc 1 3271 1 is_stmt 1 view -0 + 10165 .cfi_startproc + 10166 @ args = 0, pretend = 0, frame = 0 + 10167 @ frame_needed = 0, uses_anonymous_args = 0 +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->pRxBuffPtr = pData; + 10168 .loc 1 3271 1 is_stmt 0 view .LVU3373 + 10169 0000 10B5 push {r4, lr} + 10170 .cfi_def_cfa_offset 8 + 10171 .cfi_offset 4, -8 + 10172 .cfi_offset 14, -4 + 10173 0002 0446 mov r4, r0 + 10174 0004 1346 mov r3, r2 +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; + 10175 .loc 1 3272 3 is_stmt 1 view .LVU3374 +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxXferSize = Size; + 10176 .loc 1 3272 21 is_stmt 0 view .LVU3375 + 10177 0006 4165 str r1, [r0, #84] +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10178 .loc 1 3273 3 is_stmt 1 view .LVU3376 +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10179 .loc 1 3273 21 is_stmt 0 view .LVU3377 + 10180 0008 A0F85820 strh r2, [r0, #88] @ movhi +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 10181 .loc 1 3275 3 is_stmt 1 view .LVU3378 +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + ARM GAS /tmp/ccqiorEF.s page 322 + + + 10182 .loc 1 3275 20 is_stmt 0 view .LVU3379 + 10183 000c 0022 movs r2, #0 + 10184 .LVL882: +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 10185 .loc 1 3275 20 view .LVU3380 + 10186 000e C0F88420 str r2, [r0, #132] +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10187 .loc 1 3276 3 is_stmt 1 view .LVU3381 +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10188 .loc 1 3276 18 is_stmt 0 view .LVU3382 + 10189 0012 2222 movs r2, #34 + 10190 0014 C0F88020 str r2, [r0, #128] +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10191 .loc 1 3278 3 is_stmt 1 view .LVU3383 +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10192 .loc 1 3278 12 is_stmt 0 view .LVU3384 + 10193 0018 426F ldr r2, [r0, #116] +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10194 .loc 1 3278 6 view .LVU3385 + 10195 001a 8AB1 cbz r2, .L525 +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10196 .loc 1 3281 5 is_stmt 1 view .LVU3386 +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10197 .loc 1 3281 37 is_stmt 0 view .LVU3387 + 10198 001c 1F49 ldr r1, .L533 + 10199 .LVL883: +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10200 .loc 1 3281 37 view .LVU3388 + 10201 001e 9162 str r1, [r2, #40] + 10202 .LVL884: +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10203 .loc 1 3284 5 is_stmt 1 view .LVU3389 +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10204 .loc 1 3284 10 is_stmt 0 view .LVU3390 + 10205 0020 426F ldr r2, [r0, #116] +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10206 .loc 1 3284 41 view .LVU3391 + 10207 0022 1F49 ldr r1, .L533+4 + 10208 0024 D162 str r1, [r2, #44] +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10209 .loc 1 3287 5 is_stmt 1 view .LVU3392 +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10210 .loc 1 3287 10 is_stmt 0 view .LVU3393 + 10211 0026 426F ldr r2, [r0, #116] +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10212 .loc 1 3287 38 view .LVU3394 + 10213 0028 1E49 ldr r1, .L533+8 + 10214 002a 1163 str r1, [r2, #48] +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10215 .loc 1 3290 5 is_stmt 1 view .LVU3395 +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10216 .loc 1 3290 10 is_stmt 0 view .LVU3396 + 10217 002c 426F ldr r2, [r0, #116] +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10218 .loc 1 3290 38 view .LVU3397 + 10219 002e 0021 movs r1, #0 + 10220 0030 5163 str r1, [r2, #52] + ARM GAS /tmp/ccqiorEF.s page 323 + + +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10221 .loc 1 3293 5 is_stmt 1 view .LVU3398 +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10222 .loc 1 3293 57 is_stmt 0 view .LVU3399 + 10223 0032 0168 ldr r1, [r0] +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10224 .loc 1 3293 9 view .LVU3400 + 10225 0034 426D ldr r2, [r0, #84] + 10226 0036 2431 adds r1, r1, #36 + 10227 0038 406F ldr r0, [r0, #116] + 10228 .LVL885: +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10229 .loc 1 3293 9 view .LVU3401 + 10230 003a FFF7FEFF bl HAL_DMA_Start_IT + 10231 .LVL886: +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10232 .loc 1 3293 8 discriminator 1 view .LVU3402 + 10233 003e 20BB cbnz r0, .L532 + 10234 .L525: +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10235 .loc 1 3306 3 is_stmt 1 view .LVU3403 +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10236 .loc 1 3306 18 is_stmt 0 view .LVU3404 + 10237 0040 2369 ldr r3, [r4, #16] +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10238 .loc 1 3306 6 view .LVU3405 + 10239 0042 43B1 cbz r3, .L529 + 10240 .L528: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10241 .loc 1 3308 5 is_stmt 1 discriminator 1 view .LVU3406 + 10242 .LBB807: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10243 .loc 1 3308 5 discriminator 1 view .LVU3407 +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10244 .loc 1 3308 5 discriminator 1 view .LVU3408 +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10245 .loc 1 3308 5 discriminator 1 view .LVU3409 + 10246 0044 2268 ldr r2, [r4] + 10247 .LVL887: + 10248 .LBB808: + 10249 .LBI808: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10250 .loc 2 1068 31 view .LVU3410 + 10251 .LBB809: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10252 .loc 2 1070 5 view .LVU3411 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10253 .loc 2 1072 4 view .LVU3412 + 10254 .syntax unified + 10255 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10256 0046 52E8003F ldrex r3, [r2] + 10257 @ 0 "" 2 + 10258 .LVL888: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10259 .loc 2 1073 4 view .LVU3413 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10260 .loc 2 1073 4 is_stmt 0 view .LVU3414 + ARM GAS /tmp/ccqiorEF.s page 324 + + + 10261 .thumb + 10262 .syntax unified + 10263 .LBE809: + 10264 .LBE808: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10265 .loc 1 3308 5 discriminator 1 view .LVU3415 + 10266 004a 43F48073 orr r3, r3, #256 + 10267 .LVL889: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10268 .loc 1 3308 5 is_stmt 1 discriminator 1 view .LVU3416 + 10269 .LBB810: + 10270 .LBI810: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10271 .loc 2 1119 31 view .LVU3417 + 10272 .LBB811: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10273 .loc 2 1121 4 view .LVU3418 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10274 .loc 2 1123 4 view .LVU3419 + 10275 .syntax unified + 10276 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10277 004e 42E80031 strex r1, r3, [r2] + 10278 @ 0 "" 2 + 10279 .LVL890: + 10280 .loc 2 1124 4 view .LVU3420 + 10281 .loc 2 1124 4 is_stmt 0 view .LVU3421 + 10282 .thumb + 10283 .syntax unified + 10284 .LBE811: + 10285 .LBE810: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10286 .loc 1 3308 5 discriminator 1 view .LVU3422 + 10287 0052 0029 cmp r1, #0 + 10288 0054 F6D1 bne .L528 + 10289 .LVL891: + 10290 .L529: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10291 .loc 1 3308 5 discriminator 1 view .LVU3423 + 10292 .LBE807: +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10293 .loc 1 3308 5 is_stmt 1 discriminator 2 view .LVU3424 +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10294 .loc 1 3312 3 discriminator 1 view .LVU3425 + 10295 .LBB812: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10296 .loc 1 3312 3 discriminator 1 view .LVU3426 +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10297 .loc 1 3312 3 discriminator 1 view .LVU3427 +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10298 .loc 1 3312 3 discriminator 1 view .LVU3428 + 10299 0056 2268 ldr r2, [r4] + 10300 .LVL892: + 10301 .LBB813: + 10302 .LBI813: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10303 .loc 2 1068 31 view .LVU3429 + 10304 .LBB814: + ARM GAS /tmp/ccqiorEF.s page 325 + + +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10305 .loc 2 1070 5 view .LVU3430 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10306 .loc 2 1072 4 view .LVU3431 + 10307 0058 02F10803 add r3, r2, #8 + 10308 .LVL893: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10309 .loc 2 1072 4 is_stmt 0 view .LVU3432 + 10310 .syntax unified + 10311 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10312 005c 53E8003F ldrex r3, [r3] + 10313 @ 0 "" 2 + 10314 .LVL894: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10315 .loc 2 1073 4 is_stmt 1 view .LVU3433 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10316 .loc 2 1073 4 is_stmt 0 view .LVU3434 + 10317 .thumb + 10318 .syntax unified + 10319 .LBE814: + 10320 .LBE813: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10321 .loc 1 3312 3 discriminator 1 view .LVU3435 + 10322 0060 43F00103 orr r3, r3, #1 + 10323 .LVL895: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10324 .loc 1 3312 3 is_stmt 1 discriminator 1 view .LVU3436 + 10325 .LBB815: + 10326 .LBI815: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10327 .loc 2 1119 31 view .LVU3437 + 10328 .LBB816: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10329 .loc 2 1121 4 view .LVU3438 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10330 .loc 2 1123 4 view .LVU3439 + 10331 0064 0832 adds r2, r2, #8 + 10332 .LVL896: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10333 .loc 2 1123 4 is_stmt 0 view .LVU3440 + 10334 .syntax unified + 10335 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10336 0066 42E80031 strex r1, r3, [r2] + 10337 @ 0 "" 2 + 10338 .LVL897: + 10339 .loc 2 1124 4 is_stmt 1 view .LVU3441 + 10340 .loc 2 1124 4 is_stmt 0 view .LVU3442 + 10341 .thumb + 10342 .syntax unified + 10343 .LBE816: + 10344 .LBE815: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10345 .loc 1 3312 3 discriminator 1 view .LVU3443 + 10346 006a 0029 cmp r1, #0 + 10347 006c F3D1 bne .L529 + 10348 .LVL898: + 10349 .L530: + ARM GAS /tmp/ccqiorEF.s page 326 + + +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10350 .loc 1 3312 3 discriminator 1 view .LVU3444 + 10351 .LBE812: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10352 .loc 1 3312 3 is_stmt 1 discriminator 2 view .LVU3445 +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10353 .loc 1 3316 3 discriminator 1 view .LVU3446 + 10354 .LBB817: +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10355 .loc 1 3316 3 discriminator 1 view .LVU3447 +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10356 .loc 1 3316 3 discriminator 1 view .LVU3448 +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10357 .loc 1 3316 3 discriminator 1 view .LVU3449 + 10358 006e 2268 ldr r2, [r4] + 10359 .LVL899: + 10360 .LBB818: + 10361 .LBI818: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10362 .loc 2 1068 31 view .LVU3450 + 10363 .LBB819: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10364 .loc 2 1070 5 view .LVU3451 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10365 .loc 2 1072 4 view .LVU3452 + 10366 0070 02F10803 add r3, r2, #8 + 10367 .LVL900: +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10368 .loc 2 1072 4 is_stmt 0 view .LVU3453 + 10369 .syntax unified + 10370 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10371 0074 53E8003F ldrex r3, [r3] + 10372 @ 0 "" 2 + 10373 .LVL901: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10374 .loc 2 1073 4 is_stmt 1 view .LVU3454 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10375 .loc 2 1073 4 is_stmt 0 view .LVU3455 + 10376 .thumb + 10377 .syntax unified + 10378 .LBE819: + 10379 .LBE818: +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10380 .loc 1 3316 3 discriminator 1 view .LVU3456 + 10381 0078 43F04003 orr r3, r3, #64 + 10382 .LVL902: +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10383 .loc 1 3316 3 is_stmt 1 discriminator 1 view .LVU3457 + 10384 .LBB820: + 10385 .LBI820: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10386 .loc 2 1119 31 view .LVU3458 + 10387 .LBB821: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10388 .loc 2 1121 4 view .LVU3459 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10389 .loc 2 1123 4 view .LVU3460 + ARM GAS /tmp/ccqiorEF.s page 327 + + + 10390 007c 0832 adds r2, r2, #8 + 10391 .LVL903: +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10392 .loc 2 1123 4 is_stmt 0 view .LVU3461 + 10393 .syntax unified + 10394 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10395 007e 42E80031 strex r1, r3, [r2] + 10396 @ 0 "" 2 + 10397 .LVL904: + 10398 .loc 2 1124 4 is_stmt 1 view .LVU3462 + 10399 .loc 2 1124 4 is_stmt 0 view .LVU3463 + 10400 .thumb + 10401 .syntax unified + 10402 .LBE821: + 10403 .LBE820: +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10404 .loc 1 3316 3 discriminator 1 view .LVU3464 + 10405 0082 0029 cmp r1, #0 + 10406 0084 F3D1 bne .L530 + 10407 .LBE817: +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10408 .loc 1 3318 10 view .LVU3465 + 10409 0086 0020 movs r0, #0 + 10410 .LVL905: + 10411 .L526: +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10412 .loc 1 3319 1 view .LVU3466 + 10413 0088 10BD pop {r4, pc} + 10414 .LVL906: + 10415 .L532: +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10416 .loc 1 3296 7 is_stmt 1 view .LVU3467 +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10417 .loc 1 3296 24 is_stmt 0 view .LVU3468 + 10418 008a 1023 movs r3, #16 + 10419 008c C4F88430 str r3, [r4, #132] +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10420 .loc 1 3299 7 is_stmt 1 view .LVU3469 +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10421 .loc 1 3299 22 is_stmt 0 view .LVU3470 + 10422 0090 2023 movs r3, #32 + 10423 0092 C4F88030 str r3, [r4, #128] +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10424 .loc 1 3301 7 is_stmt 1 view .LVU3471 +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10425 .loc 1 3301 14 is_stmt 0 view .LVU3472 + 10426 0096 0120 movs r0, #1 + 10427 0098 F6E7 b .L526 + 10428 .L534: + 10429 009a 00BF .align 2 + 10430 .L533: + 10431 009c 00000000 .word UART_DMAReceiveCplt + 10432 00a0 00000000 .word UART_DMARxHalfCplt + 10433 00a4 00000000 .word UART_DMAError + 10434 .cfi_endproc + 10435 .LFE178: + 10437 .section .text.HAL_UART_Receive_DMA,"ax",%progbits + ARM GAS /tmp/ccqiorEF.s page 328 + + + 10438 .align 1 + 10439 .global HAL_UART_Receive_DMA + 10440 .syntax unified + 10441 .thumb + 10442 .thumb_func + 10444 HAL_UART_Receive_DMA: + 10445 .LVL907: + 10446 .LFB142: +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ + 10447 .loc 1 1407 1 is_stmt 1 view -0 + 10448 .cfi_startproc + 10449 @ args = 0, pretend = 0, frame = 0 + 10450 @ frame_needed = 0, uses_anonymous_args = 0 +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ + 10451 .loc 1 1407 1 is_stmt 0 view .LVU3474 + 10452 0000 38B5 push {r3, r4, r5, lr} + 10453 .cfi_def_cfa_offset 16 + 10454 .cfi_offset 3, -16 + 10455 .cfi_offset 4, -12 + 10456 .cfi_offset 5, -8 + 10457 .cfi_offset 14, -4 +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10458 .loc 1 1409 3 is_stmt 1 view .LVU3475 +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10459 .loc 1 1409 12 is_stmt 0 view .LVU3476 + 10460 0002 D0F88030 ldr r3, [r0, #128] +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10461 .loc 1 1409 6 view .LVU3477 + 10462 0006 202B cmp r3, #32 + 10463 0008 14D1 bne .L539 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10464 .loc 1 1411 5 is_stmt 1 view .LVU3478 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10465 .loc 1 1411 8 is_stmt 0 view .LVU3479 + 10466 000a A9B1 cbz r1, .L540 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10467 .loc 1 1411 25 discriminator 1 view .LVU3480 + 10468 000c B2B1 cbz r2, .L541 +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10469 .loc 1 1417 5 is_stmt 1 view .LVU3481 +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10470 .loc 1 1417 26 is_stmt 0 view .LVU3482 + 10471 000e 0023 movs r3, #0 + 10472 0010 0366 str r3, [r0, #96] +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10473 .loc 1 1420 5 is_stmt 1 view .LVU3483 +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10474 .loc 1 1420 9 is_stmt 0 view .LVU3484 + 10475 0012 0368 ldr r3, [r0] + 10476 0014 5B68 ldr r3, [r3, #4] +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** { + 10477 .loc 1 1420 8 view .LVU3485 + 10478 0016 13F4000F tst r3, #8388608 + 10479 001a 08D0 beq .L537 + 10480 .L538: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10481 .loc 1 1423 7 is_stmt 1 discriminator 1 view .LVU3486 + ARM GAS /tmp/ccqiorEF.s page 329 + + + 10482 .LBB822: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10483 .loc 1 1423 7 discriminator 1 view .LVU3487 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10484 .loc 1 1423 7 discriminator 1 view .LVU3488 +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10485 .loc 1 1423 7 discriminator 1 view .LVU3489 + 10486 001c 0468 ldr r4, [r0] + 10487 .LVL908: + 10488 .LBB823: + 10489 .LBI823: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10490 .loc 2 1068 31 view .LVU3490 + 10491 .LBB824: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10492 .loc 2 1070 5 view .LVU3491 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10493 .loc 2 1072 4 view .LVU3492 + 10494 .syntax unified + 10495 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10496 001e 54E8003F ldrex r3, [r4] + 10497 @ 0 "" 2 + 10498 .LVL909: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10499 .loc 2 1073 4 view .LVU3493 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 10500 .loc 2 1073 4 is_stmt 0 view .LVU3494 + 10501 .thumb + 10502 .syntax unified + 10503 .LBE824: + 10504 .LBE823: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10505 .loc 1 1423 7 discriminator 1 view .LVU3495 + 10506 0022 43F08063 orr r3, r3, #67108864 + 10507 .LVL910: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10508 .loc 1 1423 7 is_stmt 1 discriminator 1 view .LVU3496 + 10509 .LBB825: + 10510 .LBI825: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 10511 .loc 2 1119 31 view .LVU3497 + 10512 .LBB826: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 10513 .loc 2 1121 4 view .LVU3498 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 10514 .loc 2 1123 4 view .LVU3499 + 10515 .syntax unified + 10516 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10517 0026 44E80035 strex r5, r3, [r4] + 10518 @ 0 "" 2 + 10519 .LVL911: + 10520 .loc 2 1124 4 view .LVU3500 + 10521 .loc 2 1124 4 is_stmt 0 view .LVU3501 + 10522 .thumb + 10523 .syntax unified + 10524 .LBE826: + 10525 .LBE825: + ARM GAS /tmp/ccqiorEF.s page 330 + + +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10526 .loc 1 1423 7 discriminator 1 view .LVU3502 + 10527 002a 002D cmp r5, #0 + 10528 002c F6D1 bne .L538 + 10529 .LVL912: + 10530 .L537: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10531 .loc 1 1423 7 discriminator 1 view .LVU3503 + 10532 .LBE822: +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10533 .loc 1 1423 7 is_stmt 1 discriminator 2 view .LVU3504 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10534 .loc 1 1426 5 view .LVU3505 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10535 .loc 1 1426 13 is_stmt 0 view .LVU3506 + 10536 002e FFF7FEFF bl UART_Start_Receive_DMA + 10537 .LVL913: +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10538 .loc 1 1426 13 view .LVU3507 + 10539 0032 00E0 b .L536 + 10540 .LVL914: + 10541 .L539: +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10542 .loc 1 1430 12 view .LVU3508 + 10543 0034 0220 movs r0, #2 + 10544 .LVL915: + 10545 .L536: +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** + 10546 .loc 1 1432 1 view .LVU3509 + 10547 0036 38BD pop {r3, r4, r5, pc} + 10548 .LVL916: + 10549 .L540: +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10550 .loc 1 1413 14 view .LVU3510 + 10551 0038 0120 movs r0, #1 + 10552 .LVL917: +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10553 .loc 1 1413 14 view .LVU3511 + 10554 003a FCE7 b .L536 + 10555 .LVL918: + 10556 .L541: +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10557 .loc 1 1413 14 view .LVU3512 + 10558 003c 0120 movs r0, #1 + 10559 .LVL919: +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart.c **** } + 10560 .loc 1 1413 14 view .LVU3513 + 10561 003e FAE7 b .L536 + 10562 .cfi_endproc + 10563 .LFE142: + 10565 .text + 10566 .Letext0: + 10567 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 10568 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 10569 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 10570 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 10571 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + ARM GAS /tmp/ccqiorEF.s page 331 + + + 10572 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 10573 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" + 10574 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 10575 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 10576 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h" + ARM GAS /tmp/ccqiorEF.s page 332 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_uart.c + /tmp/ccqiorEF.s:21 .text.UART_EndTxTransfer:00000000 $t + /tmp/ccqiorEF.s:26 .text.UART_EndTxTransfer:00000000 UART_EndTxTransfer + /tmp/ccqiorEF.s:98 .text.UART_EndRxTransfer:00000000 $t + /tmp/ccqiorEF.s:103 .text.UART_EndRxTransfer:00000000 UART_EndRxTransfer + /tmp/ccqiorEF.s:298 .text.UART_TxISR_8BIT:00000000 $t + /tmp/ccqiorEF.s:303 .text.UART_TxISR_8BIT:00000000 UART_TxISR_8BIT + /tmp/ccqiorEF.s:463 .text.UART_TxISR_16BIT:00000000 $t + /tmp/ccqiorEF.s:468 .text.UART_TxISR_16BIT:00000000 UART_TxISR_16BIT + /tmp/ccqiorEF.s:635 .text.HAL_UART_MspInit:00000000 $t + /tmp/ccqiorEF.s:641 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit + /tmp/ccqiorEF.s:656 .text.HAL_UART_MspDeInit:00000000 $t + /tmp/ccqiorEF.s:662 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit + /tmp/ccqiorEF.s:677 .text.HAL_UART_DeInit:00000000 $t + /tmp/ccqiorEF.s:683 .text.HAL_UART_DeInit:00000000 HAL_UART_DeInit + /tmp/ccqiorEF.s:770 .text.HAL_UART_Transmit_IT:00000000 $t + /tmp/ccqiorEF.s:776 .text.HAL_UART_Transmit_IT:00000000 HAL_UART_Transmit_IT + /tmp/ccqiorEF.s:920 .text.HAL_UART_Transmit_IT:0000005c $d + /tmp/ccqiorEF.s:926 .text.HAL_UART_Transmit_DMA:00000000 $t + /tmp/ccqiorEF.s:932 .text.HAL_UART_Transmit_DMA:00000000 HAL_UART_Transmit_DMA + /tmp/ccqiorEF.s:1130 .text.HAL_UART_Transmit_DMA:0000008c $d + /tmp/ccqiorEF.s:2938 .text.UART_DMATransmitCplt:00000000 UART_DMATransmitCplt + /tmp/ccqiorEF.s:3206 .text.UART_DMATxHalfCplt:00000000 UART_DMATxHalfCplt + /tmp/ccqiorEF.s:3300 .text.UART_DMAError:00000000 UART_DMAError + /tmp/ccqiorEF.s:1137 .text.HAL_UART_DMAPause:00000000 $t + /tmp/ccqiorEF.s:1143 .text.HAL_UART_DMAPause:00000000 HAL_UART_DMAPause + /tmp/ccqiorEF.s:1434 .text.HAL_UART_DMAResume:00000000 $t + /tmp/ccqiorEF.s:1440 .text.HAL_UART_DMAResume:00000000 HAL_UART_DMAResume + /tmp/ccqiorEF.s:1713 .text.HAL_UART_DMAStop:00000000 $t + /tmp/ccqiorEF.s:1719 .text.HAL_UART_DMAStop:00000000 HAL_UART_DMAStop + /tmp/ccqiorEF.s:1966 .text.HAL_UART_Abort:00000000 $t + /tmp/ccqiorEF.s:1972 .text.HAL_UART_Abort:00000000 HAL_UART_Abort + /tmp/ccqiorEF.s:2399 .text.HAL_UART_AbortTransmit:00000000 $t + /tmp/ccqiorEF.s:2405 .text.HAL_UART_AbortTransmit:00000000 HAL_UART_AbortTransmit + /tmp/ccqiorEF.s:2590 .text.HAL_UART_AbortReceive:00000000 $t + /tmp/ccqiorEF.s:2596 .text.HAL_UART_AbortReceive:00000000 HAL_UART_AbortReceive + /tmp/ccqiorEF.s:2912 .text.HAL_UART_TxCpltCallback:00000000 $t + /tmp/ccqiorEF.s:2918 .text.HAL_UART_TxCpltCallback:00000000 HAL_UART_TxCpltCallback + /tmp/ccqiorEF.s:2933 .text.UART_DMATransmitCplt:00000000 $t + /tmp/ccqiorEF.s:3093 .text.UART_EndTransmit_IT:00000000 $t + /tmp/ccqiorEF.s:3098 .text.UART_EndTransmit_IT:00000000 UART_EndTransmit_IT + /tmp/ccqiorEF.s:3180 .text.HAL_UART_TxHalfCpltCallback:00000000 $t + /tmp/ccqiorEF.s:3186 .text.HAL_UART_TxHalfCpltCallback:00000000 HAL_UART_TxHalfCpltCallback + /tmp/ccqiorEF.s:3201 .text.UART_DMATxHalfCplt:00000000 $t + /tmp/ccqiorEF.s:3232 .text.HAL_UART_RxCpltCallback:00000000 $t + /tmp/ccqiorEF.s:3238 .text.HAL_UART_RxCpltCallback:00000000 HAL_UART_RxCpltCallback + /tmp/ccqiorEF.s:3253 .text.HAL_UART_RxHalfCpltCallback:00000000 $t + /tmp/ccqiorEF.s:3259 .text.HAL_UART_RxHalfCpltCallback:00000000 HAL_UART_RxHalfCpltCallback + /tmp/ccqiorEF.s:3274 .text.HAL_UART_ErrorCallback:00000000 $t + /tmp/ccqiorEF.s:3280 .text.HAL_UART_ErrorCallback:00000000 HAL_UART_ErrorCallback + /tmp/ccqiorEF.s:3295 .text.UART_DMAError:00000000 $t + /tmp/ccqiorEF.s:3389 .text.UART_DMAAbortOnError:00000000 $t + /tmp/ccqiorEF.s:3394 .text.UART_DMAAbortOnError:00000000 UART_DMAAbortOnError + /tmp/ccqiorEF.s:3426 .text.HAL_UART_AbortCpltCallback:00000000 $t + /tmp/ccqiorEF.s:3432 .text.HAL_UART_AbortCpltCallback:00000000 HAL_UART_AbortCpltCallback + /tmp/ccqiorEF.s:3447 .text.HAL_UART_Abort_IT:00000000 $t + ARM GAS /tmp/ccqiorEF.s page 333 + + + /tmp/ccqiorEF.s:3453 .text.HAL_UART_Abort_IT:00000000 HAL_UART_Abort_IT + /tmp/ccqiorEF.s:3928 .text.HAL_UART_Abort_IT:00000128 $d + /tmp/ccqiorEF.s:4016 .text.UART_DMATxAbortCallback:00000000 UART_DMATxAbortCallback + /tmp/ccqiorEF.s:3939 .text.UART_DMARxAbortCallback:00000000 UART_DMARxAbortCallback + /tmp/ccqiorEF.s:3934 .text.UART_DMARxAbortCallback:00000000 $t + /tmp/ccqiorEF.s:4011 .text.UART_DMATxAbortCallback:00000000 $t + /tmp/ccqiorEF.s:4083 .text.HAL_UART_AbortTransmitCpltCallback:00000000 $t + /tmp/ccqiorEF.s:4089 .text.HAL_UART_AbortTransmitCpltCallback:00000000 HAL_UART_AbortTransmitCpltCallback + /tmp/ccqiorEF.s:4104 .text.HAL_UART_AbortTransmit_IT:00000000 $t + /tmp/ccqiorEF.s:4110 .text.HAL_UART_AbortTransmit_IT:00000000 HAL_UART_AbortTransmit_IT + /tmp/ccqiorEF.s:4317 .text.HAL_UART_AbortTransmit_IT:0000007c $d + /tmp/ccqiorEF.s:4327 .text.UART_DMATxOnlyAbortCallback:00000000 UART_DMATxOnlyAbortCallback + /tmp/ccqiorEF.s:4322 .text.UART_DMATxOnlyAbortCallback:00000000 $t + /tmp/ccqiorEF.s:4360 .text.HAL_UART_AbortReceiveCpltCallback:00000000 $t + /tmp/ccqiorEF.s:4366 .text.HAL_UART_AbortReceiveCpltCallback:00000000 HAL_UART_AbortReceiveCpltCallback + /tmp/ccqiorEF.s:4381 .text.HAL_UART_AbortReceive_IT:00000000 $t + /tmp/ccqiorEF.s:4387 .text.HAL_UART_AbortReceive_IT:00000000 HAL_UART_AbortReceive_IT + /tmp/ccqiorEF.s:4731 .text.HAL_UART_AbortReceive_IT:000000c8 $d + /tmp/ccqiorEF.s:4741 .text.UART_DMARxOnlyAbortCallback:00000000 UART_DMARxOnlyAbortCallback + /tmp/ccqiorEF.s:4736 .text.UART_DMARxOnlyAbortCallback:00000000 $t + /tmp/ccqiorEF.s:4786 .text.HAL_UARTEx_RxEventCallback:00000000 $t + /tmp/ccqiorEF.s:4792 .text.HAL_UARTEx_RxEventCallback:00000000 HAL_UARTEx_RxEventCallback + /tmp/ccqiorEF.s:4808 .text.HAL_UART_IRQHandler:00000000 $t + /tmp/ccqiorEF.s:4814 .text.HAL_UART_IRQHandler:00000000 HAL_UART_IRQHandler + /tmp/ccqiorEF.s:5735 .text.HAL_UART_IRQHandler:000002e0 $d + /tmp/ccqiorEF.s:5741 .text.UART_RxISR_8BIT:00000000 $t + /tmp/ccqiorEF.s:5746 .text.UART_RxISR_8BIT:00000000 UART_RxISR_8BIT + /tmp/ccqiorEF.s:6096 .text.UART_RxISR_16BIT:00000000 $t + /tmp/ccqiorEF.s:6101 .text.UART_RxISR_16BIT:00000000 UART_RxISR_16BIT + /tmp/ccqiorEF.s:6452 .text.UART_DMARxHalfCplt:00000000 $t + /tmp/ccqiorEF.s:6457 .text.UART_DMARxHalfCplt:00000000 UART_DMARxHalfCplt + /tmp/ccqiorEF.s:6504 .text.UART_DMAReceiveCplt:00000000 $t + /tmp/ccqiorEF.s:6509 .text.UART_DMAReceiveCplt:00000000 UART_DMAReceiveCplt + /tmp/ccqiorEF.s:6802 .text.HAL_UART_ReceiverTimeout_Config:00000000 $t + /tmp/ccqiorEF.s:6808 .text.HAL_UART_ReceiverTimeout_Config:00000000 HAL_UART_ReceiverTimeout_Config + /tmp/ccqiorEF.s:6829 .text.HAL_UART_EnableReceiverTimeout:00000000 $t + /tmp/ccqiorEF.s:6835 .text.HAL_UART_EnableReceiverTimeout:00000000 HAL_UART_EnableReceiverTimeout + /tmp/ccqiorEF.s:6900 .text.HAL_UART_DisableReceiverTimeout:00000000 $t + /tmp/ccqiorEF.s:6906 .text.HAL_UART_DisableReceiverTimeout:00000000 HAL_UART_DisableReceiverTimeout + /tmp/ccqiorEF.s:6971 .text.HAL_MultiProcessor_EnterMuteMode:00000000 $t + /tmp/ccqiorEF.s:6977 .text.HAL_MultiProcessor_EnterMuteMode:00000000 HAL_MultiProcessor_EnterMuteMode + /tmp/ccqiorEF.s:6996 .text.HAL_HalfDuplex_EnableTransmitter:00000000 $t + /tmp/ccqiorEF.s:7002 .text.HAL_HalfDuplex_EnableTransmitter:00000000 HAL_HalfDuplex_EnableTransmitter + /tmp/ccqiorEF.s:7155 .text.HAL_HalfDuplex_EnableReceiver:00000000 $t + /tmp/ccqiorEF.s:7161 .text.HAL_HalfDuplex_EnableReceiver:00000000 HAL_HalfDuplex_EnableReceiver + /tmp/ccqiorEF.s:7314 .text.HAL_LIN_SendBreak:00000000 $t + /tmp/ccqiorEF.s:7320 .text.HAL_LIN_SendBreak:00000000 HAL_LIN_SendBreak + /tmp/ccqiorEF.s:7373 .text.HAL_UART_GetState:00000000 $t + /tmp/ccqiorEF.s:7379 .text.HAL_UART_GetState:00000000 HAL_UART_GetState + /tmp/ccqiorEF.s:7407 .text.HAL_UART_GetError:00000000 $t + /tmp/ccqiorEF.s:7413 .text.HAL_UART_GetError:00000000 HAL_UART_GetError + /tmp/ccqiorEF.s:7431 .text.UART_SetConfig:00000000 $t + /tmp/ccqiorEF.s:7437 .text.UART_SetConfig:00000000 UART_SetConfig + /tmp/ccqiorEF.s:7554 .text.UART_SetConfig:00000078 $d + /tmp/ccqiorEF.s:7574 .text.UART_SetConfig:00000092 $d + /tmp/ccqiorEF.s:7578 .text.UART_SetConfig:00000096 $t + /tmp/ccqiorEF.s:7760 .text.UART_SetConfig:0000018c $d + ARM GAS /tmp/ccqiorEF.s page 334 + + + /tmp/ccqiorEF.s:7948 .text.UART_SetConfig:00000234 $d + /tmp/ccqiorEF.s:7959 .text.UART_AdvFeatureConfig:00000000 $t + /tmp/ccqiorEF.s:7965 .text.UART_AdvFeatureConfig:00000000 UART_AdvFeatureConfig + /tmp/ccqiorEF.s:8117 .text.UART_WaitOnFlagUntilTimeout:00000000 $t + /tmp/ccqiorEF.s:8123 .text.UART_WaitOnFlagUntilTimeout:00000000 UART_WaitOnFlagUntilTimeout + /tmp/ccqiorEF.s:8254 .text.HAL_UART_Transmit:00000000 $t + /tmp/ccqiorEF.s:8260 .text.HAL_UART_Transmit:00000000 HAL_UART_Transmit + /tmp/ccqiorEF.s:8473 .text.HAL_UART_Receive:00000000 $t + /tmp/ccqiorEF.s:8479 .text.HAL_UART_Receive:00000000 HAL_UART_Receive + /tmp/ccqiorEF.s:8720 .text.UART_CheckIdleState:00000000 $t + /tmp/ccqiorEF.s:8726 .text.UART_CheckIdleState:00000000 UART_CheckIdleState + /tmp/ccqiorEF.s:9027 .text.HAL_UART_Init:00000000 $t + /tmp/ccqiorEF.s:9033 .text.HAL_UART_Init:00000000 HAL_UART_Init + /tmp/ccqiorEF.s:9135 .text.HAL_HalfDuplex_Init:00000000 $t + /tmp/ccqiorEF.s:9141 .text.HAL_HalfDuplex_Init:00000000 HAL_HalfDuplex_Init + /tmp/ccqiorEF.s:9247 .text.HAL_LIN_Init:00000000 $t + /tmp/ccqiorEF.s:9253 .text.HAL_LIN_Init:00000000 HAL_LIN_Init + /tmp/ccqiorEF.s:9402 .text.HAL_MultiProcessor_Init:00000000 $t + /tmp/ccqiorEF.s:9408 .text.HAL_MultiProcessor_Init:00000000 HAL_MultiProcessor_Init + /tmp/ccqiorEF.s:9534 .text.HAL_MultiProcessor_EnableMuteMode:00000000 $t + /tmp/ccqiorEF.s:9540 .text.HAL_MultiProcessor_EnableMuteMode:00000000 HAL_MultiProcessor_EnableMuteMode + /tmp/ccqiorEF.s:9640 .text.HAL_MultiProcessor_DisableMuteMode:00000000 $t + /tmp/ccqiorEF.s:9646 .text.HAL_MultiProcessor_DisableMuteMode:00000000 HAL_MultiProcessor_DisableMuteMode + /tmp/ccqiorEF.s:9746 .text.UART_Start_Receive_IT:00000000 $t + /tmp/ccqiorEF.s:9752 .text.UART_Start_Receive_IT:00000000 UART_Start_Receive_IT + /tmp/ccqiorEF.s:10020 .text.UART_Start_Receive_IT:000000b4 $d + /tmp/ccqiorEF.s:10027 .text.HAL_UART_Receive_IT:00000000 $t + /tmp/ccqiorEF.s:10033 .text.HAL_UART_Receive_IT:00000000 HAL_UART_Receive_IT + /tmp/ccqiorEF.s:10155 .text.UART_Start_Receive_DMA:00000000 $t + /tmp/ccqiorEF.s:10161 .text.UART_Start_Receive_DMA:00000000 UART_Start_Receive_DMA + /tmp/ccqiorEF.s:10431 .text.UART_Start_Receive_DMA:0000009c $d + /tmp/ccqiorEF.s:10438 .text.HAL_UART_Receive_DMA:00000000 $t + /tmp/ccqiorEF.s:10444 .text.HAL_UART_Receive_DMA:00000000 HAL_UART_Receive_DMA + /tmp/ccqiorEF.s:7564 .text.UART_SetConfig:00000081 $d + /tmp/ccqiorEF.s:7564 .text.UART_SetConfig:00000082 $t + /tmp/ccqiorEF.s:7769 .text.UART_SetConfig:00000195 $d + /tmp/ccqiorEF.s:7769 .text.UART_SetConfig:00000196 $t + +UNDEFINED SYMBOLS +HAL_DMA_Start_IT +HAL_DMA_Abort +HAL_DMA_GetError +HAL_DMA_Abort_IT +HAL_UARTEx_WakeupCallback +HAL_RCC_GetPCLK1Freq +HAL_RCC_GetPCLK2Freq +HAL_RCC_GetSysClockFreq +HAL_GetTick diff --git a/build/stm32f3xx_hal_uart.o b/build/stm32f3xx_hal_uart.o new file mode 100644 index 0000000..c8082a5 Binary files /dev/null and b/build/stm32f3xx_hal_uart.o differ diff --git a/build/stm32f3xx_hal_uart_ex.d b/build/stm32f3xx_hal_uart_ex.d new file mode 100644 index 0000000..2b89f60 --- /dev/null +++ b/build/stm32f3xx_hal_uart_ex.d @@ -0,0 +1,66 @@ +build/stm32f3xx_hal_uart_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/stm32f3xx_hal_uart_ex.lst b/build/stm32f3xx_hal_uart_ex.lst new file mode 100644 index 0000000..b8c9402 --- /dev/null +++ b/build/stm32f3xx_hal_uart_ex.lst @@ -0,0 +1,3703 @@ +ARM GAS /tmp/cctLjoMV.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_uart_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c" + 20 .section .text.UARTEx_Wakeup_AddressConfig,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 UARTEx_Wakeup_AddressConfig: + 27 .LVL0: + 28 .LFB140: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @file stm32f3xx_hal_uart_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended UART HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This file provides firmware functions to manage the following extended + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @attention + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * All rights reserved. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * in the root directory of this software component. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ============================================================================== + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### UART peripheral extended features ##### + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ============================================================================== + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Declare a UART_HandleTypeDef handle structure. + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) For the UART RS485 Driver Enable mode, initialize the UART registers + ARM GAS /tmp/cctLjoMV.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** by calling the HAL_RS485Ex_Init() API. + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Includes ------------------------------------------------------------------*/ + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #include "stm32f3xx_hal.h" + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx UARTEx + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief UART Extended HAL module driver + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #ifdef HAL_UART_MODULE_ENABLED + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private define ------------------------------------------------------------*/ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private macros ------------------------------------------------------------*/ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private variables ---------------------------------------------------------*/ + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Private_Functions UARTEx Private Functions + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelecti + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Exported functions --------------------------------------------------------*/ + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended Initialization and Configuration Functions + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### Initialization and Configuration functions ##### + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** This subsection provides a set of functions allowing to initialize the USARTx or the UARTy + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** in asynchronous mode. + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) For the asynchronous mode the parameters below can be configured: + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Baud Rate + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Word Length + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Stop Bit + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** in the data register is transmitted but is changed by the parity bit. + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Hardware flow control + ARM GAS /tmp/cctLjoMV.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Receiver/transmitter modes + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Over Sampling Method + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) One-Bit Sampling Method + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) For the asynchronous mode, the following advanced features can be configured as well: + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) TX and/or RX pin level inversion + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) data logical level inversion + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX and TX pins swap + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX overrun detection disabling + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) DMA disabling on RX error + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) MSB first on communication line + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) auto Baud rate detection + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** procedures (details for the procedures are available in reference manual). + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Depending on the frame length defined by the M1 and M0 bits (7-bit, + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 8-bit or 9-bit), the possible UART formats are listed in the + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** following table. + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Table 1. UART frame format. + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** +-----------------------------------------------------------------------+ + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | M1 bit | M0 bit | PCE bit | UART frame | + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 0 | 0 | | SB | 8 bit data | STB | | + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 1 | 0 | | SB | 9 bit data | STB | | + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 1 | 0 | 0 | | SB | 7 bit data | STB | | + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** +-----------------------------------------------------------------------+ + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Initialize the RS485 Driver enable feature according to the specified + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * parameters in the UART_InitTypeDef and creates the associated handle. + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Polarity Select the driver enable polarity. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This parameter can be one of the following values: + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_DE_POLARITY_LOW DE signal is active low + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param AssertionTime Driver Enable assertion time: + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 5-bit value defining the time between the activation of the DE (Driver Enable) + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * signal and the beginning of the start bit. It is expressed in sample time + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * units (1/8 or 1/16 bit time, depending on the oversampling rate) + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param DeassertionTime Driver Enable deassertion time: + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 5-bit value defining the time between the end of the last stop bit, in a + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * transmitted message, and the de-activation of the DE (Driver Enable) signal. + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the + ARM GAS /tmp/cctLjoMV.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * oversampling rate). + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t Assertion + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t DeassertionTime) + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp; + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */ + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart == NULL) + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable UART instance */ + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance)); + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable polarity */ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DE_POLARITY(Polarity)); + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable assertion time */ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ASSERTIONTIME(AssertionTime)); + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable deassertion time */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime)); + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->gState == HAL_UART_STATE_RESET) + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Allocate lock resource and initialize it */ + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->Lock = HAL_UNLOCKED; + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_InitCallbacksToDefault(huart); + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->MspInitCallback == NULL) + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->MspInitCallback = HAL_UART_MspInit; + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init the low level hardware */ + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->MspInitCallback(huart); + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #else + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_UART_MspInit(huart); + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY; + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */ + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart); + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the UART Communication parameters */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (UART_SetConfig(huart) == HAL_ERROR) + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + ARM GAS /tmp/cctLjoMV.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_AdvFeatureConfig(huart); + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** SET_BIT(huart->Instance->CR3, USART_CR3_DEM); + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the Driver Enable polarity */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the Driver Enable assertion and deassertion times */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart); + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart)); + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended functions + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### IO operation functions ##### + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** This subsection provides a set of Wakeup and FIFO mode related callback functions. + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Wakeup from Stop mode Callback: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_WakeupCallback() + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief UART wakeup from Stop mode callback. + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval None + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Prevent unused argument(s) compilation warning */ + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UNUSED(huart); + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** the HAL_UARTEx_WakeupCallback can be implemented in the user file. + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + ARM GAS /tmp/cctLjoMV.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended Peripheral Control functions + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### Peripheral Control functions ##### + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] This section provides the following functions: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** detection length to more than 4 bits for multiprocessor address mark wake up. + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** trigger: address match, Start Bit detection or RXNE bit status. + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_DisableStopMode() API disables the above functionality + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] This subsection also provides a set of additional functions providing enhanced reception + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** services to user. (For example, these functions allow application to handle use cases + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** where number of data to be received is unknown). + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Compared to standard reception services which only consider number of received + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** data elements as reception completion criteria, these functions also consider additional ev + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** as triggers for updating reception status to caller : + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Detection of inactivity period (RX line has not been active for a given period). + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** for 1 frame time, after last received byte. + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX inactivity detected by RTO, i.e. line has been in idle state + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** for a programmable time, after last received byte. + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Detection that a specific character has been received. + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) There are two mode of transfer: + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Blocking mode: The reception is performed in polling mode, until either expected number + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** or till IDLE event occurs. Reception is handled only during function execution. + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** When function exits, no data reception could occur. HAL status and number of actually re + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** are returned by function after finishing transfer. + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Non-Blocking mode: The reception is performed using Interrupts or DMA. + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** These API's return the HAL status. + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The end of the data processing will be indicated through the + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_UART_ErrorCallback()user callback will be executed when a reception error is det + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Blocking mode API: + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle() + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Non-Blocking mode API with Interrupt: + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle_IT() + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Non-Blocking mode API with DMA: + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle_DMA() + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim + ARM GAS /tmp/cctLjoMV.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief By default in multiprocessor mode, when the wake up method is set + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to address mark, the UART handles only 4-bit long addresses detection; + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * this API allows to enable longer addresses detection (6-, 7- or 8-bit + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * long). + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode, + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode. + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param AddressLength This parameter can be one of the following values: + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t Addres + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart == NULL) + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the address length parameter */ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength)); + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY; + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */ + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart); + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the address length */ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart); + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState to Ready */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart)); + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Set Wakeup from Stop mode interrupt flag selection. + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note It is the application responsibility to enable the interrupt used as + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * usart_wkup interrupt source before entering low-power mode. + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status. + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This parameter can be one of the following values: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_ADDRESS + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_STARTBIT + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeD + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cctLjoMV.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart; + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up from stop mode UART instance */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance)); + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up selection parameter */ + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent)); + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart); + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY; + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart); + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the wake-up selection scheme */ + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS) + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection); + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */ + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart); + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init tickstart for timeout management */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** tickstart = HAL_GetTick(); + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Wait until REACK flag is set */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_TIMEOUT; + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Initialize the UART State */ + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_READY; + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart); + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status; + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Enable UART Stop Mode. + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE. + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart); + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + ARM GAS /tmp/cctLjoMV.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set UESM bit */ + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_UESM); + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */ + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart); + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Disable UART Stop Mode. + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart); + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Clear UESM bit */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart); + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in blocking mode till either the expected number of data + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * is received or an IDLE event occurs. + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note HAL_OK is returned if reception is completed (expected number of data has been received) + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * or if reception is stopped after IDLE event (less than the expected number of data has b + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In this case, RxLen output parameter indicates number of data available in reception buf + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData. + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received. + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param RxLen Number of data elements finally received + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * (could be lower than Size, in case reception ends on IDLE event) + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Timeout Timeout duration expressed in ms (covers the whole reception sequence). + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t Timeout) + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits; + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t *pdata16bits; + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t uhMask; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart; + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY) + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U)) + ARM GAS /tmp/cctLjoMV.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init tickstart for timeout management */ + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** tickstart = HAL_GetTick(); + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferSize = Size; + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size; + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Computation of UART mask to apply to RDR register */ + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_MASK_COMPUTATION(huart); + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits = NULL; + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData; + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits = pData; + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = NULL; + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Initialize output number of received elements */ + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen = 0U; + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* as long as data have to be received */ + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** while (huart->RxXferCount > 0U) + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check if IDLE flag is set */ + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Clear IDLE flag in ISR */ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* If Set, but no data ever received, clear flag without exiting loop */ + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* If Set, and data has already been received, this means Idle Event is valid : End recepti + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (*RxLen > 0U) + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_IDLE; + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check if RXNE flag is set */ + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE)) + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + ARM GAS /tmp/cctLjoMV.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (pdata8bits == NULL) + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++; + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Increment number of received elements */ + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen += 1U; + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--; + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check for the Timeout */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (Timeout != HAL_MAX_DELAY) + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_TIMEOUT; + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set number of received elements in output parameter : RxLen */ + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen = huart->RxXferSize - huart->RxXferCount; + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY; + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in interrupt mode till either the expected number of data + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * is received or an IDLE event occurs. + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Reception is initiated by this function call. Further progress of reception is achieved + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to UART interrupts raised by RXNE and IDLE events. Callback is called at end of receptio + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * number of received data elements. + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData. + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received. + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t S + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; + ARM GAS /tmp/cctLjoMV.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */ + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY) + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U)) + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set Reception type to reception till IDLE Event*/ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = UART_Start_Receive_IT(huart, pData, Size); + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check Rx process has been successfully started */ + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (status == HAL_OK) + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of errors already pending when reception is started, + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Interrupts may have already been raised and lead to reception abortion. + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (Overrun error for instance). + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_ERROR; + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY; + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in DMA mode till either the expected number + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of data is received or an IDLE event occurs. + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Reception is initiated by this function call. Further progress of reception is achieved + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to DMA services, transferring automatically received data elements in user reception buf + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * calling registered callbacks at half/end of reception. UART IDLE events are also used to + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * reception phase as ended. In all cases, callback execution will indicate number of recei + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When the UART parity is enabled (PCE = 1), the received data contain + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the parity bit (MSB position). + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData. + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received. + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status + ARM GAS /tmp/cctLjoMV.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */ + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY) + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U)) + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set Reception type to reception till IDLE Event*/ + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = UART_Start_Receive_DMA(huart, pData, Size); + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check Rx process has been successfully started */ + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (status == HAL_OK) + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of errors already pending when reception is started, + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Interrupts may have already been raised and lead to reception abortion. + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (Overrun error for instance). + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_ERROR; + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status; + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY; + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Provide Rx Event type that has lead to RxEvent callback execution. + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, pro + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of reception process is provided to application through calls of Rx Event callback (eith + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could o + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to Rx Event callback execution. + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note This function is expected to be called within the user implementation of Rx Event Callba + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * in order to provide the accurate value : + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In Interrupt Mode : + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has be + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed + ARM GAS /tmp/cctLjoMV.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * received data is lower than expected one) + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In DMA Mode : + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has be + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * received data is lower than expected one). + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In DMA mode, RxEvent callback could be called several times; + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * When DMA is configured in Normal Mode, HT event does not stop Reception process; + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception proc + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values) + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart) + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Return Rx Event type value, as stored in UART handle */ + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (huart->RxEventType); + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @addtogroup UARTEx_Private_Functions + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detectio + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param WakeUpSelection UART wake up from stop mode parameters. + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval None + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelecti + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 29 .loc 1 752 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 8 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 34 .loc 1 752 1 is_stmt 0 view .LVU1 + 35 0000 82B0 sub sp, sp, #8 + 36 .cfi_def_cfa_offset 8 + 37 0002 02AB add r3, sp, #8 + 38 0004 03E90600 stmdb r3, {r1, r2} + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength)); + 39 .loc 1 753 3 is_stmt 1 view .LVU2 + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the USART address length */ + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); + 40 .loc 1 756 3 view .LVU3 + 41 0008 0268 ldr r2, [r0] + 42 000a 5368 ldr r3, [r2, #4] + 43 000c 23F01003 bic r3, r3, #16 + ARM GAS /tmp/cctLjoMV.s page 15 + + + 44 0010 BDF80410 ldrh r1, [sp, #4] + 45 0014 0B43 orrs r3, r3, r1 + 46 0016 5360 str r3, [r2, #4] + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the USART address node */ + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_AD + 47 .loc 1 759 3 view .LVU4 + 48 0018 0268 ldr r2, [r0] + 49 001a 5368 ldr r3, [r2, #4] + 50 001c 23F07F43 bic r3, r3, #-16777216 + 51 0020 9DF80610 ldrb r1, [sp, #6] @ zero_extendqisi2 + 52 0024 43EA0163 orr r3, r3, r1, lsl #24 + 53 0028 5360 str r3, [r2, #4] + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 54 .loc 1 760 1 is_stmt 0 view .LVU5 + 55 002a 02B0 add sp, sp, #8 + 56 .cfi_def_cfa_offset 0 + 57 @ sp needed + 58 002c 7047 bx lr + 59 .cfi_endproc + 60 .LFE140: + 62 .section .text.HAL_RS485Ex_Init,"ax",%progbits + 63 .align 1 + 64 .global HAL_RS485Ex_Init + 65 .syntax unified + 66 .thumb + 67 .thumb_func + 69 HAL_RS485Ex_Init: + 70 .LVL1: + 71 .LFB130: + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp; + 72 .loc 1 150 1 is_stmt 1 view -0 + 73 .cfi_startproc + 74 @ args = 0, pretend = 0, frame = 0 + 75 @ frame_needed = 0, uses_anonymous_args = 0 + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 76 .loc 1 151 3 view .LVU7 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 77 .loc 1 154 3 view .LVU8 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 78 .loc 1 154 6 is_stmt 0 view .LVU9 + 79 0000 0028 cmp r0, #0 + 80 0002 3AD0 beq .L7 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp; + 81 .loc 1 150 1 view .LVU10 + 82 0004 F8B5 push {r3, r4, r5, r6, r7, lr} + 83 .cfi_def_cfa_offset 24 + 84 .cfi_offset 3, -24 + 85 .cfi_offset 4, -20 + 86 .cfi_offset 5, -16 + 87 .cfi_offset 6, -12 + 88 .cfi_offset 7, -8 + 89 .cfi_offset 14, -4 + 90 0006 0F46 mov r7, r1 + 91 0008 1646 mov r6, r2 + 92 000a 1D46 mov r5, r3 + 93 000c 0446 mov r4, r0 + ARM GAS /tmp/cctLjoMV.s page 16 + + + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 94 .loc 1 159 3 is_stmt 1 view .LVU11 + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 95 .loc 1 162 3 view .LVU12 + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 96 .loc 1 165 3 view .LVU13 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 97 .loc 1 168 3 view .LVU14 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 98 .loc 1 170 3 view .LVU15 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 99 .loc 1 170 12 is_stmt 0 view .LVU16 + 100 000e C36F ldr r3, [r0, #124] + 101 .LVL2: + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 102 .loc 1 170 6 view .LVU17 + 103 0010 53B3 cbz r3, .L12 + 104 .LVL3: + 105 .L5: + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 106 .loc 1 191 3 is_stmt 1 view .LVU18 + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 107 .loc 1 191 17 is_stmt 0 view .LVU19 + 108 0012 2423 movs r3, #36 + 109 0014 E367 str r3, [r4, #124] + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 110 .loc 1 194 3 is_stmt 1 view .LVU20 + 111 0016 2268 ldr r2, [r4] + 112 0018 1368 ldr r3, [r2] + 113 001a 23F00103 bic r3, r3, #1 + 114 001e 1360 str r3, [r2] + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 115 .loc 1 197 3 view .LVU21 + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 116 .loc 1 197 7 is_stmt 0 view .LVU22 + 117 0020 2046 mov r0, r4 + 118 0022 FFF7FEFF bl UART_SetConfig + 119 .LVL4: + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 120 .loc 1 197 6 discriminator 1 view .LVU23 + 121 0026 0128 cmp r0, #1 + 122 0028 1DD0 beq .L4 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 123 .loc 1 202 3 is_stmt 1 view .LVU24 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 124 .loc 1 202 26 is_stmt 0 view .LVU25 + 125 002a 636A ldr r3, [r4, #36] + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 126 .loc 1 202 6 view .LVU26 + 127 002c 0BBB cbnz r3, .L13 + 128 .L6: + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 129 .loc 1 208 3 is_stmt 1 view .LVU27 + 130 002e 2268 ldr r2, [r4] + 131 0030 9368 ldr r3, [r2, #8] + 132 0032 43F48043 orr r3, r3, #16384 + 133 0036 9360 str r3, [r2, #8] + ARM GAS /tmp/cctLjoMV.s page 17 + + + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 134 .loc 1 211 3 view .LVU28 + 135 0038 2268 ldr r2, [r4] + 136 003a 9368 ldr r3, [r2, #8] + 137 003c 23F40043 bic r3, r3, #32768 + 138 0040 3B43 orrs r3, r3, r7 + 139 0042 9360 str r3, [r2, #8] + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); + 140 .loc 1 214 3 view .LVU29 + 141 .LVL5: + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); + 142 .loc 1 215 3 view .LVU30 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); + 143 .loc 1 215 28 is_stmt 0 view .LVU31 + 144 0044 2D04 lsls r5, r5, #16 + 145 .LVL6: + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); + 146 .loc 1 215 8 view .LVU32 + 147 0046 45EA4652 orr r2, r5, r6, lsl #21 + 148 .LVL7: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 149 .loc 1 216 3 is_stmt 1 view .LVU33 + 150 004a 2168 ldr r1, [r4] + 151 004c 0B68 ldr r3, [r1] + 152 004e 6FF31943 bfc r3, #16, #10 + 153 0052 1343 orrs r3, r3, r2 + 154 0054 0B60 str r3, [r1] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 155 .loc 1 219 3 view .LVU34 + 156 0056 2268 ldr r2, [r4] + 157 .LVL8: + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 158 .loc 1 219 3 is_stmt 0 view .LVU35 + 159 0058 1368 ldr r3, [r2] + 160 005a 43F00103 orr r3, r3, #1 + 161 005e 1360 str r3, [r2] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 162 .loc 1 222 3 is_stmt 1 view .LVU36 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 163 .loc 1 222 11 is_stmt 0 view .LVU37 + 164 0060 2046 mov r0, r4 + 165 0062 FFF7FEFF bl UART_CheckIdleState + 166 .LVL9: + 167 .L4: + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 168 .loc 1 223 1 view .LVU38 + 169 0066 F8BD pop {r3, r4, r5, r6, r7, pc} + 170 .LVL10: + 171 .L12: + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 172 .loc 1 173 5 is_stmt 1 view .LVU39 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 173 .loc 1 173 17 is_stmt 0 view .LVU40 + 174 0068 80F87830 strb r3, [r0, #120] + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 175 .loc 1 187 5 is_stmt 1 view .LVU41 + 176 006c FFF7FEFF bl HAL_UART_MspInit + ARM GAS /tmp/cctLjoMV.s page 18 + + + 177 .LVL11: + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ + 178 .loc 1 187 5 is_stmt 0 view .LVU42 + 179 0070 CFE7 b .L5 + 180 .L13: + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 181 .loc 1 204 5 is_stmt 1 view .LVU43 + 182 0072 2046 mov r0, r4 + 183 0074 FFF7FEFF bl UART_AdvFeatureConfig + 184 .LVL12: + 185 0078 D9E7 b .L6 + 186 .LVL13: + 187 .L7: + 188 .cfi_def_cfa_offset 0 + 189 .cfi_restore 3 + 190 .cfi_restore 4 + 191 .cfi_restore 5 + 192 .cfi_restore 6 + 193 .cfi_restore 7 + 194 .cfi_restore 14 + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 195 .loc 1 156 12 is_stmt 0 view .LVU44 + 196 007a 0120 movs r0, #1 + 197 .LVL14: + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 198 .loc 1 223 1 view .LVU45 + 199 007c 7047 bx lr + 200 .cfi_endproc + 201 .LFE130: + 203 .section .text.HAL_UARTEx_WakeupCallback,"ax",%progbits + 204 .align 1 + 205 .weak HAL_UARTEx_WakeupCallback + 206 .syntax unified + 207 .thumb + 208 .thumb_func + 210 HAL_UARTEx_WakeupCallback: + 211 .LVL15: + 212 .LFB131: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Prevent unused argument(s) compilation warning */ + 213 .loc 1 251 1 is_stmt 1 view -0 + 214 .cfi_startproc + 215 @ args = 0, pretend = 0, frame = 0 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 @ link register save eliminated. + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 218 .loc 1 253 3 view .LVU47 + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 219 .loc 1 258 1 is_stmt 0 view .LVU48 + 220 0000 7047 bx lr + 221 .cfi_endproc + 222 .LFE131: + 224 .section .text.HAL_MultiProcessorEx_AddressLength_Set,"ax",%progbits + 225 .align 1 + 226 .global HAL_MultiProcessorEx_AddressLength_Set + 227 .syntax unified + 228 .thumb + 229 .thumb_func + ARM GAS /tmp/cctLjoMV.s page 19 + + + 231 HAL_MultiProcessorEx_AddressLength_Set: + 232 .LVL16: + 233 .LFB132: + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */ + 234 .loc 1 333 1 is_stmt 1 view -0 + 235 .cfi_startproc + 236 @ args = 0, pretend = 0, frame = 0 + 237 @ frame_needed = 0, uses_anonymous_args = 0 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 238 .loc 1 335 3 view .LVU50 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 239 .loc 1 335 6 is_stmt 0 view .LVU51 + 240 0000 B8B1 cbz r0, .L17 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */ + 241 .loc 1 333 1 view .LVU52 + 242 0002 08B5 push {r3, lr} + 243 .cfi_def_cfa_offset 8 + 244 .cfi_offset 3, -8 + 245 .cfi_offset 14, -4 + 246 0004 0346 mov r3, r0 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 247 .loc 1 341 3 is_stmt 1 view .LVU53 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 248 .loc 1 343 3 view .LVU54 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 249 .loc 1 343 17 is_stmt 0 view .LVU55 + 250 0006 2422 movs r2, #36 + 251 0008 C267 str r2, [r0, #124] + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 252 .loc 1 346 3 is_stmt 1 view .LVU56 + 253 000a 0068 ldr r0, [r0] + 254 .LVL17: + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 255 .loc 1 346 3 is_stmt 0 view .LVU57 + 256 000c 0268 ldr r2, [r0] + 257 000e 22F00102 bic r2, r2, #1 + 258 0012 0260 str r2, [r0] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 259 .loc 1 349 3 is_stmt 1 view .LVU58 + 260 0014 1868 ldr r0, [r3] + 261 0016 4268 ldr r2, [r0, #4] + 262 0018 22F01002 bic r2, r2, #16 + 263 001c 1143 orrs r1, r1, r2 + 264 .LVL18: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 265 .loc 1 349 3 is_stmt 0 view .LVU59 + 266 001e 4160 str r1, [r0, #4] + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 267 .loc 1 352 3 is_stmt 1 view .LVU60 + 268 0020 1968 ldr r1, [r3] + 269 0022 0A68 ldr r2, [r1] + 270 0024 42F00102 orr r2, r2, #1 + 271 0028 0A60 str r2, [r1] + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 272 .loc 1 355 3 view .LVU61 + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 273 .loc 1 355 11 is_stmt 0 view .LVU62 + ARM GAS /tmp/cctLjoMV.s page 20 + + + 274 002a 1846 mov r0, r3 + 275 002c FFF7FEFF bl UART_CheckIdleState + 276 .LVL19: + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 277 .loc 1 356 1 view .LVU63 + 278 0030 08BD pop {r3, pc} + 279 .LVL20: + 280 .L17: + 281 .cfi_def_cfa_offset 0 + 282 .cfi_restore 3 + 283 .cfi_restore 14 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 284 .loc 1 337 12 view .LVU64 + 285 0032 0120 movs r0, #1 + 286 .LVL21: + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 287 .loc 1 356 1 view .LVU65 + 288 0034 7047 bx lr + 289 .cfi_endproc + 290 .LFE132: + 292 .section .text.HAL_UARTEx_StopModeWakeUpSourceConfig,"ax",%progbits + 293 .align 1 + 294 .global HAL_UARTEx_StopModeWakeUpSourceConfig + 295 .syntax unified + 296 .thumb + 297 .thumb_func + 299 HAL_UARTEx_StopModeWakeUpSourceConfig: + 300 .LVL22: + 301 .LFB133: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 302 .loc 1 371 1 is_stmt 1 view -0 + 303 .cfi_startproc + 304 @ args = 0, pretend = 0, frame = 8 + 305 @ frame_needed = 0, uses_anonymous_args = 0 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 306 .loc 1 371 1 is_stmt 0 view .LVU67 + 307 0000 10B5 push {r4, lr} + 308 .cfi_def_cfa_offset 8 + 309 .cfi_offset 4, -8 + 310 .cfi_offset 14, -4 + 311 0002 84B0 sub sp, sp, #16 + 312 .cfi_def_cfa_offset 24 + 313 0004 04AB add r3, sp, #16 + 314 0006 03E90600 stmdb r3, {r1, r2} + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart; + 315 .loc 1 372 3 is_stmt 1 view .LVU68 + 316 .LVL23: + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 317 .loc 1 373 3 view .LVU69 + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up selection parameter */ + 318 .loc 1 376 3 view .LVU70 + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 319 .loc 1 378 3 view .LVU71 + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 320 .loc 1 381 3 view .LVU72 + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 321 .loc 1 381 3 view .LVU73 + ARM GAS /tmp/cctLjoMV.s page 21 + + + 322 000a 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 323 000e 012B cmp r3, #1 + 324 0010 33D0 beq .L26 + 325 0012 0446 mov r4, r0 + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 326 .loc 1 381 3 discriminator 2 view .LVU74 + 327 0014 0123 movs r3, #1 + 328 0016 80F87830 strb r3, [r0, #120] + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 329 .loc 1 381 3 discriminator 2 view .LVU75 + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 330 .loc 1 383 3 view .LVU76 + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 331 .loc 1 383 17 is_stmt 0 view .LVU77 + 332 001a 2423 movs r3, #36 + 333 001c C367 str r3, [r0, #124] + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 334 .loc 1 386 3 is_stmt 1 view .LVU78 + 335 001e 0268 ldr r2, [r0] + 336 0020 1368 ldr r3, [r2] + 337 0022 23F00103 bic r3, r3, #1 + 338 0026 1360 str r3, [r2] + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 339 .loc 1 389 3 view .LVU79 + 340 0028 0168 ldr r1, [r0] + 341 002a 8B68 ldr r3, [r1, #8] + 342 002c 23F44013 bic r3, r3, #3145728 + 343 0030 029A ldr r2, [sp, #8] + 344 0032 1343 orrs r3, r3, r2 + 345 0034 8B60 str r3, [r1, #8] + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 346 .loc 1 391 3 view .LVU80 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 347 .loc 1 391 6 is_stmt 0 view .LVU81 + 348 0036 A2B1 cbz r2, .L29 + 349 .LVL24: + 350 .L24: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 351 .loc 1 397 3 is_stmt 1 view .LVU82 + 352 0038 2268 ldr r2, [r4] + 353 003a 1368 ldr r3, [r2] + 354 003c 43F00103 orr r3, r3, #1 + 355 0040 1360 str r3, [r2] + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 356 .loc 1 400 3 view .LVU83 + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 357 .loc 1 400 15 is_stmt 0 view .LVU84 + 358 0042 FFF7FEFF bl HAL_GetTick + 359 .LVL25: + 360 0046 0346 mov r3, r0 + 361 .LVL26: + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 362 .loc 1 403 3 is_stmt 1 view .LVU85 + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 363 .loc 1 403 7 is_stmt 0 view .LVU86 + 364 0048 6FF07E42 mvn r2, #-33554432 + 365 004c 0092 str r2, [sp] + ARM GAS /tmp/cctLjoMV.s page 22 + + + 366 004e 0022 movs r2, #0 + 367 0050 4FF48001 mov r1, #4194304 + 368 0054 2046 mov r0, r4 + 369 .LVL27: + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 370 .loc 1 403 7 view .LVU87 + 371 0056 FFF7FEFF bl UART_WaitOnFlagUntilTimeout + 372 .LVL28: + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 373 .loc 1 403 6 discriminator 1 view .LVU88 + 374 005a 40B9 cbnz r0, .L27 + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 375 .loc 1 410 5 is_stmt 1 view .LVU89 + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 376 .loc 1 410 19 is_stmt 0 view .LVU90 + 377 005c 2023 movs r3, #32 + 378 005e E367 str r3, [r4, #124] + 379 0060 06E0 b .L25 + 380 .LVL29: + 381 .L29: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 382 .loc 1 393 5 is_stmt 1 view .LVU91 + 383 0062 04AB add r3, sp, #16 + 384 0064 13E90600 ldmdb r3, {r1, r2} + 385 0068 FFF7FEFF bl UARTEx_Wakeup_AddressConfig + 386 .LVL30: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 387 .loc 1 393 5 is_stmt 0 view .LVU92 + 388 006c E4E7 b .L24 + 389 .LVL31: + 390 .L27: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 391 .loc 1 405 12 view .LVU93 + 392 006e 0320 movs r0, #3 + 393 .L25: + 394 .LVL32: + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 395 .loc 1 414 3 is_stmt 1 view .LVU94 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 396 .loc 1 414 3 view .LVU95 + 397 0070 0023 movs r3, #0 + 398 0072 84F87830 strb r3, [r4, #120] + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 399 .loc 1 414 3 view .LVU96 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 400 .loc 1 416 3 view .LVU97 + 401 .LVL33: + 402 .L23: + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 403 .loc 1 417 1 is_stmt 0 view .LVU98 + 404 0076 04B0 add sp, sp, #16 + 405 .cfi_remember_state + 406 .cfi_def_cfa_offset 8 + 407 @ sp needed + 408 0078 10BD pop {r4, pc} + 409 .LVL34: + 410 .L26: + ARM GAS /tmp/cctLjoMV.s page 23 + + + 411 .cfi_restore_state + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 412 .loc 1 381 3 discriminator 1 view .LVU99 + 413 007a 0220 movs r0, #2 + 414 .LVL35: + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 415 .loc 1 381 3 discriminator 1 view .LVU100 + 416 007c FBE7 b .L23 + 417 .cfi_endproc + 418 .LFE133: + 420 .section .text.HAL_UARTEx_EnableStopMode,"ax",%progbits + 421 .align 1 + 422 .global HAL_UARTEx_EnableStopMode + 423 .syntax unified + 424 .thumb + 425 .thumb_func + 427 HAL_UARTEx_EnableStopMode: + 428 .LVL36: + 429 .LFB134: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ + 430 .loc 1 426 1 is_stmt 1 view -0 + 431 .cfi_startproc + 432 @ args = 0, pretend = 0, frame = 0 + 433 @ frame_needed = 0, uses_anonymous_args = 0 + 434 @ link register save eliminated. + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 435 .loc 1 428 3 view .LVU102 + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 436 .loc 1 428 3 view .LVU103 + 437 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 438 0004 012B cmp r3, #1 + 439 0006 10D0 beq .L33 + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 440 .loc 1 428 3 discriminator 2 view .LVU104 + 441 0008 0123 movs r3, #1 + 442 000a 80F87830 strb r3, [r0, #120] + 443 .L32: + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 444 .loc 1 428 3 discriminator 3 view .LVU105 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 445 .loc 1 431 3 discriminator 1 view .LVU106 + 446 .LBB22: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 447 .loc 1 431 3 discriminator 1 view .LVU107 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 448 .loc 1 431 3 discriminator 1 view .LVU108 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 449 .loc 1 431 3 discriminator 1 view .LVU109 + 450 000e 0268 ldr r2, [r0] + 451 .LVL37: + 452 .LBB23: + 453 .LBI23: + 454 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + ARM GAS /tmp/cctLjoMV.s page 24 + + + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + ARM GAS /tmp/cctLjoMV.s page 25 + + + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + ARM GAS /tmp/cctLjoMV.s page 26 + + + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cctLjoMV.s page 27 + + + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/cctLjoMV.s page 28 + + + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + ARM GAS /tmp/cctLjoMV.s page 29 + + + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/cctLjoMV.s page 30 + + + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/cctLjoMV.s page 31 + + + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/cctLjoMV.s page 32 + + + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cctLjoMV.s page 33 + + + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cctLjoMV.s page 34 + + + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + ARM GAS /tmp/cctLjoMV.s page 35 + + + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + ARM GAS /tmp/cctLjoMV.s page 36 + + + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/cctLjoMV.s page 37 + + + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + ARM GAS /tmp/cctLjoMV.s page 38 + + + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cctLjoMV.s page 39 + + + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + ARM GAS /tmp/cctLjoMV.s page 40 + + + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/cctLjoMV.s page 41 + + + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; +1002:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1003:Drivers/CMSIS/Include/cmsis_gcc.h **** +1004:Drivers/CMSIS/Include/cmsis_gcc.h **** +1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros +1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. +1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros +1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value +1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz +1012:Drivers/CMSIS/Include/cmsis_gcc.h **** +1013:Drivers/CMSIS/Include/cmsis_gcc.h **** +1014:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ +1015:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ +1016:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ +1017:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +1018:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) +1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. +1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data +1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) +1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) +1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1027:Drivers/CMSIS/Include/cmsis_gcc.h **** +1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) +1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/cctLjoMV.s page 42 + + +1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not +1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. +1033:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1034:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ +1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1038:Drivers/CMSIS/Include/cmsis_gcc.h **** +1039:Drivers/CMSIS/Include/cmsis_gcc.h **** +1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) +1042:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. +1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data +1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) +1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) +1047:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1049:Drivers/CMSIS/Include/cmsis_gcc.h **** +1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) +1051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #else +1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not +1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. +1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ +1059:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1060:Drivers/CMSIS/Include/cmsis_gcc.h **** +1061:Drivers/CMSIS/Include/cmsis_gcc.h **** +1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) +1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. +1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data +1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) +1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) + 455 .loc 2 1068 31 view .LVU110 + 456 .LBB24: +1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 457 .loc 2 1070 5 view .LVU111 +1071:Drivers/CMSIS/Include/cmsis_gcc.h **** +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + 458 .loc 2 1072 4 view .LVU112 + 459 .syntax unified + 460 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 461 0010 52E8003F ldrex r3, [r2] + 462 @ 0 "" 2 + 463 .LVL38: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 464 .loc 2 1073 4 view .LVU113 + 465 .loc 2 1073 4 is_stmt 0 view .LVU114 + 466 .thumb + 467 .syntax unified + 468 .LBE24: + ARM GAS /tmp/cctLjoMV.s page 43 + + + 469 .LBE23: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 470 .loc 1 431 3 discriminator 1 view .LVU115 + 471 0014 43F00203 orr r3, r3, #2 + 472 .LVL39: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 473 .loc 1 431 3 is_stmt 1 discriminator 1 view .LVU116 + 474 .LBB25: + 475 .LBI25: +1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1075:Drivers/CMSIS/Include/cmsis_gcc.h **** +1076:Drivers/CMSIS/Include/cmsis_gcc.h **** +1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) +1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. +1080:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store +1081:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location +1082:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded +1083:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed +1084:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1085:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +1086:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1088:Drivers/CMSIS/Include/cmsis_gcc.h **** +1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); +1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); +1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1092:Drivers/CMSIS/Include/cmsis_gcc.h **** +1093:Drivers/CMSIS/Include/cmsis_gcc.h **** +1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) +1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. +1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store +1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location +1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded +1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed +1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +1103:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1104:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; +1105:Drivers/CMSIS/Include/cmsis_gcc.h **** +1106:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); +1107:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); +1108:Drivers/CMSIS/Include/cmsis_gcc.h **** } +1109:Drivers/CMSIS/Include/cmsis_gcc.h **** +1110:Drivers/CMSIS/Include/cmsis_gcc.h **** +1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /** +1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) +1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. +1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store +1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location +1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded +1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed +1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) + 476 .loc 2 1119 31 view .LVU117 + 477 .LBB26: + ARM GAS /tmp/cctLjoMV.s page 44 + + +1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 478 .loc 2 1121 4 view .LVU118 +1122:Drivers/CMSIS/Include/cmsis_gcc.h **** +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + 479 .loc 2 1123 4 view .LVU119 + 480 .syntax unified + 481 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 482 0018 42E80031 strex r1, r3, [r2] + 483 @ 0 "" 2 + 484 .LVL40: +1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 485 .loc 2 1124 4 view .LVU120 + 486 .loc 2 1124 4 is_stmt 0 view .LVU121 + 487 .thumb + 488 .syntax unified + 489 .LBE26: + 490 .LBE25: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 491 .loc 1 431 3 discriminator 1 view .LVU122 + 492 001c 0029 cmp r1, #0 + 493 001e F6D1 bne .L32 + 494 .LBE22: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 495 .loc 1 431 3 is_stmt 1 discriminator 2 view .LVU123 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 496 .loc 1 434 3 view .LVU124 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 497 .loc 1 434 3 view .LVU125 + 498 0020 0023 movs r3, #0 + 499 .LVL41: + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 500 .loc 1 434 3 is_stmt 0 view .LVU126 + 501 0022 80F87830 strb r3, [r0, #120] + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 502 .loc 1 434 3 is_stmt 1 view .LVU127 + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 503 .loc 1 436 3 view .LVU128 + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 504 .loc 1 436 10 is_stmt 0 view .LVU129 + 505 0026 1846 mov r0, r3 + 506 .LVL42: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 507 .loc 1 436 10 view .LVU130 + 508 0028 7047 bx lr + 509 .LVL43: + 510 .L33: + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 511 .loc 1 428 3 discriminator 1 view .LVU131 + 512 002a 0220 movs r0, #2 + 513 .LVL44: + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 514 .loc 1 437 1 view .LVU132 + 515 002c 7047 bx lr + 516 .cfi_endproc + 517 .LFE134: + 519 .section .text.HAL_UARTEx_DisableStopMode,"ax",%progbits + ARM GAS /tmp/cctLjoMV.s page 45 + + + 520 .align 1 + 521 .global HAL_UARTEx_DisableStopMode + 522 .syntax unified + 523 .thumb + 524 .thumb_func + 526 HAL_UARTEx_DisableStopMode: + 527 .LVL45: + 528 .LFB135: + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ + 529 .loc 1 445 1 is_stmt 1 view -0 + 530 .cfi_startproc + 531 @ args = 0, pretend = 0, frame = 0 + 532 @ frame_needed = 0, uses_anonymous_args = 0 + 533 @ link register save eliminated. + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 534 .loc 1 447 3 view .LVU134 + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 535 .loc 1 447 3 view .LVU135 + 536 0000 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 + 537 0004 012B cmp r3, #1 + 538 0006 10D0 beq .L37 + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 539 .loc 1 447 3 discriminator 2 view .LVU136 + 540 0008 0123 movs r3, #1 + 541 000a 80F87830 strb r3, [r0, #120] + 542 .L36: + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 543 .loc 1 447 3 discriminator 3 view .LVU137 + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 544 .loc 1 450 3 discriminator 1 view .LVU138 + 545 .LBB27: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 546 .loc 1 450 3 discriminator 1 view .LVU139 + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 547 .loc 1 450 3 discriminator 1 view .LVU140 + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 548 .loc 1 450 3 discriminator 1 view .LVU141 + 549 000e 0268 ldr r2, [r0] + 550 .LVL46: + 551 .LBB28: + 552 .LBI28: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 553 .loc 2 1068 31 view .LVU142 + 554 .LBB29: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 555 .loc 2 1070 5 view .LVU143 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 556 .loc 2 1072 4 view .LVU144 + 557 .syntax unified + 558 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 559 0010 52E8003F ldrex r3, [r2] + 560 @ 0 "" 2 + 561 .LVL47: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 562 .loc 2 1073 4 view .LVU145 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 563 .loc 2 1073 4 is_stmt 0 view .LVU146 + ARM GAS /tmp/cctLjoMV.s page 46 + + + 564 .thumb + 565 .syntax unified + 566 .LBE29: + 567 .LBE28: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 568 .loc 1 450 3 discriminator 1 view .LVU147 + 569 0014 23F00203 bic r3, r3, #2 + 570 .LVL48: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 571 .loc 1 450 3 is_stmt 1 discriminator 1 view .LVU148 + 572 .LBB30: + 573 .LBI30: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 574 .loc 2 1119 31 view .LVU149 + 575 .LBB31: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 576 .loc 2 1121 4 view .LVU150 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 577 .loc 2 1123 4 view .LVU151 + 578 .syntax unified + 579 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 580 0018 42E80031 strex r1, r3, [r2] + 581 @ 0 "" 2 + 582 .LVL49: + 583 .loc 2 1124 4 view .LVU152 + 584 .loc 2 1124 4 is_stmt 0 view .LVU153 + 585 .thumb + 586 .syntax unified + 587 .LBE31: + 588 .LBE30: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 589 .loc 1 450 3 discriminator 1 view .LVU154 + 590 001c 0029 cmp r1, #0 + 591 001e F6D1 bne .L36 + 592 .LBE27: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 593 .loc 1 450 3 is_stmt 1 discriminator 2 view .LVU155 + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 594 .loc 1 453 3 view .LVU156 + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 595 .loc 1 453 3 view .LVU157 + 596 0020 0023 movs r3, #0 + 597 .LVL50: + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 598 .loc 1 453 3 is_stmt 0 view .LVU158 + 599 0022 80F87830 strb r3, [r0, #120] + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 600 .loc 1 453 3 is_stmt 1 view .LVU159 + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 601 .loc 1 455 3 view .LVU160 + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 602 .loc 1 455 10 is_stmt 0 view .LVU161 + 603 0026 1846 mov r0, r3 + 604 .LVL51: + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 605 .loc 1 455 10 view .LVU162 + 606 0028 7047 bx lr + ARM GAS /tmp/cctLjoMV.s page 47 + + + 607 .LVL52: + 608 .L37: + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 609 .loc 1 447 3 discriminator 1 view .LVU163 + 610 002a 0220 movs r0, #2 + 611 .LVL53: + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 612 .loc 1 456 1 view .LVU164 + 613 002c 7047 bx lr + 614 .cfi_endproc + 615 .LFE135: + 617 .section .text.HAL_UARTEx_ReceiveToIdle,"ax",%progbits + 618 .align 1 + 619 .global HAL_UARTEx_ReceiveToIdle + 620 .syntax unified + 621 .thumb + 622 .thumb_func + 624 HAL_UARTEx_ReceiveToIdle: + 625 .LVL54: + 626 .LFB136: + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits; + 627 .loc 1 477 1 is_stmt 1 view -0 + 628 .cfi_startproc + 629 @ args = 4, pretend = 0, frame = 0 + 630 @ frame_needed = 0, uses_anonymous_args = 0 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits; + 631 .loc 1 477 1 is_stmt 0 view .LVU166 + 632 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 633 .cfi_def_cfa_offset 32 + 634 .cfi_offset 4, -32 + 635 .cfi_offset 5, -28 + 636 .cfi_offset 6, -24 + 637 .cfi_offset 7, -20 + 638 .cfi_offset 8, -16 + 639 .cfi_offset 9, -12 + 640 .cfi_offset 10, -8 + 641 .cfi_offset 14, -4 + 642 0004 1D46 mov r5, r3 + 643 0006 089E ldr r6, [sp, #32] + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t *pdata16bits; + 644 .loc 1 478 3 is_stmt 1 view .LVU167 + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t uhMask; + 645 .loc 1 479 3 view .LVU168 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart; + 646 .loc 1 480 3 view .LVU169 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 647 .loc 1 481 3 view .LVU170 + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 648 .loc 1 484 3 view .LVU171 + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 649 .loc 1 484 12 is_stmt 0 view .LVU172 + 650 0008 D0F88030 ldr r3, [r0, #128] + 651 .LVL55: + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 652 .loc 1 484 6 view .LVU173 + 653 000c 202B cmp r3, #32 + 654 000e 40F09680 bne .L54 + ARM GAS /tmp/cctLjoMV.s page 48 + + + 655 0012 0446 mov r4, r0 + 656 0014 0F46 mov r7, r1 + 657 0016 9146 mov r9, r2 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 658 .loc 1 486 5 is_stmt 1 view .LVU174 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 659 .loc 1 486 8 is_stmt 0 view .LVU175 + 660 0018 0029 cmp r1, #0 + 661 001a 00F09380 beq .L55 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 662 .loc 1 486 25 discriminator 1 view .LVU176 + 663 001e 0AB9 cbnz r2, .L60 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 664 .loc 1 488 15 view .LVU177 + 665 0020 0120 movs r0, #1 + 666 .LVL56: + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 667 .loc 1 488 15 view .LVU178 + 668 0022 8DE0 b .L39 + 669 .LVL57: + 670 .L60: + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 671 .loc 1 491 5 is_stmt 1 view .LVU179 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; + 672 .loc 1 491 22 is_stmt 0 view .LVU180 + 673 0024 0023 movs r3, #0 + 674 0026 C0F88430 str r3, [r0, #132] + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + 675 .loc 1 492 5 is_stmt 1 view .LVU181 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + 676 .loc 1 492 20 is_stmt 0 view .LVU182 + 677 002a 2222 movs r2, #34 + 678 .LVL58: + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; + 679 .loc 1 492 20 view .LVU183 + 680 002c C0F88020 str r2, [r0, #128] + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 681 .loc 1 493 5 is_stmt 1 view .LVU184 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 682 .loc 1 493 26 is_stmt 0 view .LVU185 + 683 0030 0122 movs r2, #1 + 684 0032 0266 str r2, [r0, #96] + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 685 .loc 1 494 5 is_stmt 1 view .LVU186 + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 686 .loc 1 494 24 is_stmt 0 view .LVU187 + 687 0034 4366 str r3, [r0, #100] + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 688 .loc 1 497 5 is_stmt 1 view .LVU188 + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 689 .loc 1 497 17 is_stmt 0 view .LVU189 + 690 0036 FFF7FEFF bl HAL_GetTick + 691 .LVL59: + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 692 .loc 1 497 17 view .LVU190 + 693 003a 8046 mov r8, r0 + 694 .LVL60: + ARM GAS /tmp/cctLjoMV.s page 49 + + + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size; + 695 .loc 1 499 5 is_stmt 1 view .LVU191 + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size; + 696 .loc 1 499 24 is_stmt 0 view .LVU192 + 697 003c A4F85890 strh r9, [r4, #88] @ movhi + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 698 .loc 1 500 5 is_stmt 1 view .LVU193 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 699 .loc 1 500 24 is_stmt 0 view .LVU194 + 700 0040 A4F85A90 strh r9, [r4, #90] @ movhi + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 701 .loc 1 503 5 is_stmt 1 view .LVU195 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 702 .loc 1 503 5 view .LVU196 + 703 0044 A368 ldr r3, [r4, #8] + 704 0046 B3F5805F cmp r3, #4096 + 705 004a 06D0 beq .L61 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 706 .loc 1 503 5 discriminator 2 view .LVU197 + 707 004c A3B9 cbnz r3, .L43 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 708 .loc 1 503 5 discriminator 5 view .LVU198 + 709 004e 2269 ldr r2, [r4, #16] + 710 0050 72B9 cbnz r2, .L44 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 711 .loc 1 503 5 discriminator 7 view .LVU199 + 712 0052 FF22 movs r2, #255 + 713 0054 A4F85C20 strh r2, [r4, #92] @ movhi + 714 0058 11E0 b .L42 + 715 .L61: + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 716 .loc 1 503 5 discriminator 1 view .LVU200 + 717 005a 2269 ldr r2, [r4, #16] + 718 005c 22B9 cbnz r2, .L41 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 719 .loc 1 503 5 discriminator 3 view .LVU201 + 720 005e 40F2FF12 movw r2, #511 + 721 0062 A4F85C20 strh r2, [r4, #92] @ movhi + 722 0066 0AE0 b .L42 + 723 .L41: + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 724 .loc 1 503 5 discriminator 4 view .LVU202 + 725 0068 FF22 movs r2, #255 + 726 006a A4F85C20 strh r2, [r4, #92] @ movhi + 727 006e 06E0 b .L42 + 728 .L44: + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 729 .loc 1 503 5 discriminator 8 view .LVU203 + 730 0070 7F22 movs r2, #127 + 731 0072 A4F85C20 strh r2, [r4, #92] @ movhi + 732 0076 02E0 b .L42 + 733 .L43: + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 734 .loc 1 503 5 discriminator 6 view .LVU204 + 735 0078 0022 movs r2, #0 + 736 007a A4F85C20 strh r2, [r4, #92] @ movhi + 737 .L42: + ARM GAS /tmp/cctLjoMV.s page 50 + + + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; + 738 .loc 1 503 5 discriminator 9 view .LVU205 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 739 .loc 1 504 5 view .LVU206 + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 740 .loc 1 504 12 is_stmt 0 view .LVU207 + 741 007e B4F85C90 ldrh r9, [r4, #92] + 742 .LVL61: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 743 .loc 1 507 5 is_stmt 1 view .LVU208 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 744 .loc 1 507 8 is_stmt 0 view .LVU209 + 745 0082 B3F5805F cmp r3, #4096 + 746 0086 04D0 beq .L62 + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 747 .loc 1 515 19 view .LVU210 + 748 0088 4FF0000A mov r10, #0 + 749 .LVL62: + 750 .L45: + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 751 .loc 1 519 5 is_stmt 1 view .LVU211 + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 752 .loc 1 519 12 is_stmt 0 view .LVU212 + 753 008c 0023 movs r3, #0 + 754 008e 2B80 strh r3, [r5] @ movhi + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 755 .loc 1 522 5 is_stmt 1 view .LVU213 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 756 .loc 1 522 11 is_stmt 0 view .LVU214 + 757 0090 20E0 b .L46 + 758 .LVL63: + 759 .L62: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 760 .loc 1 507 71 discriminator 1 view .LVU215 + 761 0092 2369 ldr r3, [r4, #16] + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 762 .loc 1 507 56 discriminator 1 view .LVU216 + 763 0094 13B1 cbz r3, .L58 + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 764 .loc 1 515 19 view .LVU217 + 765 0096 4FF0000A mov r10, #0 + 766 009a F7E7 b .L45 + 767 .L58: + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 768 .loc 1 510 19 view .LVU218 + 769 009c BA46 mov r10, r7 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData; + 770 .loc 1 509 19 view .LVU219 + 771 009e 0027 movs r7, #0 + 772 .LVL64: + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData; + 773 .loc 1 509 19 view .LVU220 + 774 00a0 F4E7 b .L45 + 775 .LVL65: + 776 .L65: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; + 777 .loc 1 534 11 is_stmt 1 view .LVU221 + ARM GAS /tmp/cctLjoMV.s page 51 + + + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; + 778 .loc 1 534 30 is_stmt 0 view .LVU222 + 779 00a2 0223 movs r3, #2 + 780 00a4 6366 str r3, [r4, #100] + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 781 .loc 1 535 11 is_stmt 1 view .LVU223 + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 782 .loc 1 535 26 is_stmt 0 view .LVU224 + 783 00a6 2023 movs r3, #32 + 784 00a8 C4F88030 str r3, [r4, #128] + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 785 .loc 1 537 11 is_stmt 1 view .LVU225 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 786 .loc 1 537 18 is_stmt 0 view .LVU226 + 787 00ac 0020 movs r0, #0 + 788 00ae 47E0 b .L39 + 789 .L66: + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++; + 790 .loc 1 546 11 is_stmt 1 view .LVU227 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++; + 791 .loc 1 546 52 is_stmt 0 view .LVU228 + 792 00b0 9B8C ldrh r3, [r3, #36] + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++; + 793 .loc 1 546 26 view .LVU229 + 794 00b2 09EA0303 and r3, r9, r3 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++; + 795 .loc 1 546 24 view .LVU230 + 796 00b6 2AF8023B strh r3, [r10], #2 @ movhi + 797 .LVL66: + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 798 .loc 1 547 11 is_stmt 1 view .LVU231 + 799 .L50: + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--; + 800 .loc 1 555 9 view .LVU232 + 801 00ba 2B88 ldrh r3, [r5] + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--; + 802 .loc 1 555 16 is_stmt 0 view .LVU233 + 803 00bc 0133 adds r3, r3, #1 + 804 00be 2B80 strh r3, [r5] @ movhi + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 805 .loc 1 556 9 is_stmt 1 view .LVU234 + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 806 .loc 1 556 14 is_stmt 0 view .LVU235 + 807 00c0 B4F85A30 ldrh r3, [r4, #90] + 808 00c4 9BB2 uxth r3, r3 + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 809 .loc 1 556 27 view .LVU236 + 810 00c6 013B subs r3, r3, #1 + 811 00c8 9BB2 uxth r3, r3 + 812 00ca A4F85A30 strh r3, [r4, #90] @ movhi + 813 .L48: + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 814 .loc 1 560 7 is_stmt 1 view .LVU237 + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 815 .loc 1 560 10 is_stmt 0 view .LVU238 + 816 00ce B6F1FF3F cmp r6, #-1 + 817 00d2 1BD1 bne .L63 + ARM GAS /tmp/cctLjoMV.s page 52 + + + 818 .L46: + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 819 .loc 1 522 31 is_stmt 1 view .LVU239 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 820 .loc 1 522 17 is_stmt 0 view .LVU240 + 821 00d4 B4F85A20 ldrh r2, [r4, #90] + 822 00d8 92B2 uxth r2, r2 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 823 .loc 1 522 31 view .LVU241 + 824 00da 22B3 cbz r2, .L64 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 825 .loc 1 525 7 is_stmt 1 view .LVU242 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 826 .loc 1 525 11 is_stmt 0 view .LVU243 + 827 00dc 2368 ldr r3, [r4] + 828 00de DA69 ldr r2, [r3, #28] + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 829 .loc 1 525 10 view .LVU244 + 830 00e0 12F0100F tst r2, #16 + 831 00e4 04D0 beq .L47 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 832 .loc 1 528 9 is_stmt 1 view .LVU245 + 833 00e6 1022 movs r2, #16 + 834 00e8 1A62 str r2, [r3, #32] + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 835 .loc 1 532 9 view .LVU246 + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 836 .loc 1 532 13 is_stmt 0 view .LVU247 + 837 00ea 2B88 ldrh r3, [r5] + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 838 .loc 1 532 12 view .LVU248 + 839 00ec 002B cmp r3, #0 + 840 00ee D8D1 bne .L65 + 841 .L47: + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 842 .loc 1 542 7 is_stmt 1 view .LVU249 + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 843 .loc 1 542 11 is_stmt 0 view .LVU250 + 844 00f0 2368 ldr r3, [r4] + 845 00f2 DA69 ldr r2, [r3, #28] + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 846 .loc 1 542 10 view .LVU251 + 847 00f4 12F0200F tst r2, #32 + 848 00f8 E9D0 beq .L48 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 849 .loc 1 544 9 is_stmt 1 view .LVU252 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 850 .loc 1 544 12 is_stmt 0 view .LVU253 + 851 00fa 002F cmp r7, #0 + 852 00fc D8D0 beq .L66 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; + 853 .loc 1 551 11 is_stmt 1 view .LVU254 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; + 854 .loc 1 551 50 is_stmt 0 view .LVU255 + 855 00fe 9A8C ldrh r2, [r3, #36] + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; + 856 .loc 1 551 58 view .LVU256 + ARM GAS /tmp/cctLjoMV.s page 53 + + + 857 0100 5FFA89F3 uxtb r3, r9 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; + 858 .loc 1 551 25 view .LVU257 + 859 0104 1340 ands r3, r3, r2 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; + 860 .loc 1 551 23 view .LVU258 + 861 0106 07F8013B strb r3, [r7], #1 + 862 .LVL67: + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 863 .loc 1 552 11 is_stmt 1 view .LVU259 + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 864 .loc 1 552 11 is_stmt 0 view .LVU260 + 865 010a D6E7 b .L50 + 866 .L63: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 867 .loc 1 562 9 is_stmt 1 view .LVU261 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 868 .loc 1 562 15 is_stmt 0 view .LVU262 + 869 010c FFF7FEFF bl HAL_GetTick + 870 .LVL68: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 871 .loc 1 562 29 discriminator 1 view .LVU263 + 872 0110 A0EB0800 sub r0, r0, r8 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 873 .loc 1 562 12 discriminator 1 view .LVU264 + 874 0114 B042 cmp r0, r6 + 875 0116 01D8 bhi .L52 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 876 .loc 1 562 53 discriminator 1 view .LVU265 + 877 0118 002E cmp r6, #0 + 878 011a DBD1 bne .L46 + 879 .L52: + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 880 .loc 1 564 11 is_stmt 1 view .LVU266 + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 881 .loc 1 564 26 is_stmt 0 view .LVU267 + 882 011c 2023 movs r3, #32 + 883 011e C4F88030 str r3, [r4, #128] + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 884 .loc 1 566 11 is_stmt 1 view .LVU268 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 885 .loc 1 566 18 is_stmt 0 view .LVU269 + 886 0122 0320 movs r0, #3 + 887 0124 0CE0 b .L39 + 888 .L64: + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ + 889 .loc 1 572 5 is_stmt 1 view .LVU270 + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ + 890 .loc 1 572 19 is_stmt 0 view .LVU271 + 891 0126 B4F85830 ldrh r3, [r4, #88] + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ + 892 .loc 1 572 39 view .LVU272 + 893 012a B4F85A20 ldrh r2, [r4, #90] + 894 012e 92B2 uxth r2, r2 + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ + 895 .loc 1 572 32 view .LVU273 + 896 0130 9B1A subs r3, r3, r2 + ARM GAS /tmp/cctLjoMV.s page 54 + + + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ + 897 .loc 1 572 12 view .LVU274 + 898 0132 2B80 strh r3, [r5] @ movhi + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 899 .loc 1 574 5 is_stmt 1 view .LVU275 + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 900 .loc 1 574 20 is_stmt 0 view .LVU276 + 901 0134 2023 movs r3, #32 + 902 0136 C4F88030 str r3, [r4, #128] + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 903 .loc 1 576 5 is_stmt 1 view .LVU277 + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 904 .loc 1 576 12 is_stmt 0 view .LVU278 + 905 013a 0020 movs r0, #0 + 906 013c 00E0 b .L39 + 907 .LVL69: + 908 .L54: + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 909 .loc 1 580 12 view .LVU279 + 910 013e 0220 movs r0, #2 + 911 .LVL70: + 912 .L39: + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 913 .loc 1 582 1 view .LVU280 + 914 0140 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 915 .LVL71: + 916 .L55: + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 917 .loc 1 488 15 view .LVU281 + 918 0144 0120 movs r0, #1 + 919 .LVL72: + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 920 .loc 1 488 15 view .LVU282 + 921 0146 FBE7 b .L39 + 922 .cfi_endproc + 923 .LFE136: + 925 .section .text.HAL_UARTEx_ReceiveToIdle_IT,"ax",%progbits + 926 .align 1 + 927 .global HAL_UARTEx_ReceiveToIdle_IT + 928 .syntax unified + 929 .thumb + 930 .thumb_func + 932 HAL_UARTEx_ReceiveToIdle_IT: + 933 .LVL73: + 934 .LFB137: + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; + 935 .loc 1 599 1 is_stmt 1 view -0 + 936 .cfi_startproc + 937 @ args = 0, pretend = 0, frame = 0 + 938 @ frame_needed = 0, uses_anonymous_args = 0 + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 939 .loc 1 600 3 view .LVU284 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 940 .loc 1 603 3 view .LVU285 + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 941 .loc 1 603 12 is_stmt 0 view .LVU286 + 942 0000 D0F88030 ldr r3, [r0, #128] + ARM GAS /tmp/cctLjoMV.s page 55 + + + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 943 .loc 1 603 6 view .LVU287 + 944 0004 202B cmp r3, #32 + 945 0006 1FD1 bne .L71 + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; + 946 .loc 1 599 1 view .LVU288 + 947 0008 10B5 push {r4, lr} + 948 .cfi_def_cfa_offset 8 + 949 .cfi_offset 4, -8 + 950 .cfi_offset 14, -4 + 951 000a 0446 mov r4, r0 + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 952 .loc 1 605 5 is_stmt 1 view .LVU289 + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 953 .loc 1 605 8 is_stmt 0 view .LVU290 + 954 000c F1B1 cbz r1, .L72 + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 955 .loc 1 605 25 discriminator 1 view .LVU291 + 956 000e 0AB9 cbnz r2, .L79 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 957 .loc 1 607 14 view .LVU292 + 958 0010 0120 movs r0, #1 + 959 .LVL74: + 960 .L68: + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 961 .loc 1 640 1 view .LVU293 + 962 0012 10BD pop {r4, pc} + 963 .LVL75: + 964 .L79: + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 965 .loc 1 611 5 is_stmt 1 view .LVU294 + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 966 .loc 1 611 26 is_stmt 0 view .LVU295 + 967 0014 0123 movs r3, #1 + 968 0016 0366 str r3, [r0, #96] + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 969 .loc 1 612 5 is_stmt 1 view .LVU296 + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 970 .loc 1 612 24 is_stmt 0 view .LVU297 + 971 0018 0023 movs r3, #0 + 972 001a 4366 str r3, [r0, #100] + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 973 .loc 1 614 5 is_stmt 1 view .LVU298 + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 974 .loc 1 614 15 is_stmt 0 view .LVU299 + 975 001c FFF7FEFF bl UART_Start_Receive_IT + 976 .LVL76: + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 977 .loc 1 617 5 is_stmt 1 view .LVU300 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 978 .loc 1 617 8 is_stmt 0 view .LVU301 + 979 0020 0028 cmp r0, #0 + 980 0022 F6D1 bne .L68 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 981 .loc 1 619 7 is_stmt 1 view .LVU302 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 982 .loc 1 619 16 is_stmt 0 view .LVU303 + ARM GAS /tmp/cctLjoMV.s page 56 + + + 983 0024 236E ldr r3, [r4, #96] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 984 .loc 1 619 10 view .LVU304 + 985 0026 012B cmp r3, #1 + 986 0028 01D0 beq .L80 + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 987 .loc 1 630 16 view .LVU305 + 988 002a 0120 movs r0, #1 + 989 .LVL77: + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 990 .loc 1 634 5 is_stmt 1 view .LVU306 + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 991 .loc 1 634 12 is_stmt 0 view .LVU307 + 992 002c F1E7 b .L68 + 993 .LVL78: + 994 .L80: + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 995 .loc 1 621 9 is_stmt 1 view .LVU308 + 996 002e 2368 ldr r3, [r4] + 997 0030 1022 movs r2, #16 + 998 0032 1A62 str r2, [r3, #32] + 999 .L70: + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1000 .loc 1 622 9 discriminator 1 view .LVU309 + 1001 .LBB32: + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1002 .loc 1 622 9 discriminator 1 view .LVU310 + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1003 .loc 1 622 9 discriminator 1 view .LVU311 + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1004 .loc 1 622 9 discriminator 1 view .LVU312 + 1005 0034 2268 ldr r2, [r4] + 1006 .LVL79: + 1007 .LBB33: + 1008 .LBI33: +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1009 .loc 2 1068 31 view .LVU313 + 1010 .LBB34: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1011 .loc 2 1070 5 view .LVU314 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1012 .loc 2 1072 4 view .LVU315 + 1013 .syntax unified + 1014 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1015 0036 52E8003F ldrex r3, [r2] + 1016 @ 0 "" 2 + 1017 .LVL80: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1018 .loc 2 1073 4 view .LVU316 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1019 .loc 2 1073 4 is_stmt 0 view .LVU317 + 1020 .thumb + 1021 .syntax unified + 1022 .LBE34: + 1023 .LBE33: + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1024 .loc 1 622 9 discriminator 1 view .LVU318 + ARM GAS /tmp/cctLjoMV.s page 57 + + + 1025 003a 43F01003 orr r3, r3, #16 + 1026 .LVL81: + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1027 .loc 1 622 9 is_stmt 1 discriminator 1 view .LVU319 + 1028 .LBB35: + 1029 .LBI35: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1030 .loc 2 1119 31 view .LVU320 + 1031 .LBB36: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1032 .loc 2 1121 4 view .LVU321 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1033 .loc 2 1123 4 view .LVU322 + 1034 .syntax unified + 1035 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1036 003e 42E80031 strex r1, r3, [r2] + 1037 @ 0 "" 2 + 1038 .LVL82: + 1039 .loc 2 1124 4 view .LVU323 + 1040 .loc 2 1124 4 is_stmt 0 view .LVU324 + 1041 .thumb + 1042 .syntax unified + 1043 .LBE36: + 1044 .LBE35: + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1045 .loc 1 622 9 discriminator 1 view .LVU325 + 1046 0042 0029 cmp r1, #0 + 1047 0044 F6D1 bne .L70 + 1048 0046 E4E7 b .L68 + 1049 .LVL83: + 1050 .L71: + 1051 .cfi_def_cfa_offset 0 + 1052 .cfi_restore 4 + 1053 .cfi_restore 14 + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1054 .loc 1 622 9 discriminator 1 view .LVU326 + 1055 .LBE32: + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1056 .loc 1 638 12 view .LVU327 + 1057 0048 0220 movs r0, #2 + 1058 .LVL84: + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1059 .loc 1 640 1 view .LVU328 + 1060 004a 7047 bx lr + 1061 .LVL85: + 1062 .L72: + 1063 .cfi_def_cfa_offset 8 + 1064 .cfi_offset 4, -8 + 1065 .cfi_offset 14, -4 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1066 .loc 1 607 14 view .LVU329 + 1067 004c 0120 movs r0, #1 + 1068 .LVL86: + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1069 .loc 1 607 14 view .LVU330 + 1070 004e E0E7 b .L68 + 1071 .cfi_endproc + ARM GAS /tmp/cctLjoMV.s page 58 + + + 1072 .LFE137: + 1074 .section .text.HAL_UARTEx_ReceiveToIdle_DMA,"ax",%progbits + 1075 .align 1 + 1076 .global HAL_UARTEx_ReceiveToIdle_DMA + 1077 .syntax unified + 1078 .thumb + 1079 .thumb_func + 1081 HAL_UARTEx_ReceiveToIdle_DMA: + 1082 .LVL87: + 1083 .LFB138: + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; + 1084 .loc 1 660 1 is_stmt 1 view -0 + 1085 .cfi_startproc + 1086 @ args = 0, pretend = 0, frame = 0 + 1087 @ frame_needed = 0, uses_anonymous_args = 0 + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1088 .loc 1 661 3 view .LVU332 + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1089 .loc 1 664 3 view .LVU333 + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1090 .loc 1 664 12 is_stmt 0 view .LVU334 + 1091 0000 D0F88030 ldr r3, [r0, #128] + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1092 .loc 1 664 6 view .LVU335 + 1093 0004 202B cmp r3, #32 + 1094 0006 1FD1 bne .L85 + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; + 1095 .loc 1 660 1 view .LVU336 + 1096 0008 10B5 push {r4, lr} + 1097 .cfi_def_cfa_offset 8 + 1098 .cfi_offset 4, -8 + 1099 .cfi_offset 14, -4 + 1100 000a 0446 mov r4, r0 + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1101 .loc 1 666 5 is_stmt 1 view .LVU337 + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1102 .loc 1 666 8 is_stmt 0 view .LVU338 + 1103 000c F1B1 cbz r1, .L86 + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1104 .loc 1 666 25 discriminator 1 view .LVU339 + 1105 000e 0AB9 cbnz r2, .L93 + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1106 .loc 1 668 14 view .LVU340 + 1107 0010 0120 movs r0, #1 + 1108 .LVL88: + 1109 .L82: + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1110 .loc 1 701 1 view .LVU341 + 1111 0012 10BD pop {r4, pc} + 1112 .LVL89: + 1113 .L93: + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 1114 .loc 1 672 5 is_stmt 1 view .LVU342 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; + 1115 .loc 1 672 26 is_stmt 0 view .LVU343 + 1116 0014 0123 movs r3, #1 + 1117 0016 0366 str r3, [r0, #96] + ARM GAS /tmp/cctLjoMV.s page 59 + + + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1118 .loc 1 673 5 is_stmt 1 view .LVU344 + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1119 .loc 1 673 24 is_stmt 0 view .LVU345 + 1120 0018 0023 movs r3, #0 + 1121 001a 4366 str r3, [r0, #100] + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1122 .loc 1 675 5 is_stmt 1 view .LVU346 + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1123 .loc 1 675 15 is_stmt 0 view .LVU347 + 1124 001c FFF7FEFF bl UART_Start_Receive_DMA + 1125 .LVL90: + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1126 .loc 1 678 5 is_stmt 1 view .LVU348 + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1127 .loc 1 678 8 is_stmt 0 view .LVU349 + 1128 0020 0028 cmp r0, #0 + 1129 0022 F6D1 bne .L82 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1130 .loc 1 680 7 is_stmt 1 view .LVU350 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1131 .loc 1 680 16 is_stmt 0 view .LVU351 + 1132 0024 236E ldr r3, [r4, #96] + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { + 1133 .loc 1 680 10 view .LVU352 + 1134 0026 012B cmp r3, #1 + 1135 0028 01D0 beq .L94 + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1136 .loc 1 691 16 view .LVU353 + 1137 002a 0120 movs r0, #1 + 1138 .LVL91: + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1139 .loc 1 695 5 is_stmt 1 view .LVU354 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1140 .loc 1 695 12 is_stmt 0 view .LVU355 + 1141 002c F1E7 b .L82 + 1142 .LVL92: + 1143 .L94: + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 1144 .loc 1 682 9 is_stmt 1 view .LVU356 + 1145 002e 2368 ldr r3, [r4] + 1146 0030 1022 movs r2, #16 + 1147 0032 1A62 str r2, [r3, #32] + 1148 .L84: + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1149 .loc 1 683 9 discriminator 1 view .LVU357 + 1150 .LBB37: + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1151 .loc 1 683 9 discriminator 1 view .LVU358 + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1152 .loc 1 683 9 discriminator 1 view .LVU359 + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1153 .loc 1 683 9 discriminator 1 view .LVU360 + 1154 0034 2268 ldr r2, [r4] + 1155 .LVL93: + 1156 .LBB38: + 1157 .LBI38: + ARM GAS /tmp/cctLjoMV.s page 60 + + +1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1158 .loc 2 1068 31 view .LVU361 + 1159 .LBB39: +1070:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1160 .loc 2 1070 5 view .LVU362 +1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1161 .loc 2 1072 4 view .LVU363 + 1162 .syntax unified + 1163 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1164 0036 52E8003F ldrex r3, [r2] + 1165 @ 0 "" 2 + 1166 .LVL94: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1167 .loc 2 1073 4 view .LVU364 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 1168 .loc 2 1073 4 is_stmt 0 view .LVU365 + 1169 .thumb + 1170 .syntax unified + 1171 .LBE39: + 1172 .LBE38: + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1173 .loc 1 683 9 discriminator 1 view .LVU366 + 1174 003a 43F01003 orr r3, r3, #16 + 1175 .LVL95: + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1176 .loc 1 683 9 is_stmt 1 discriminator 1 view .LVU367 + 1177 .LBB40: + 1178 .LBI40: +1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1179 .loc 2 1119 31 view .LVU368 + 1180 .LBB41: +1121:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1181 .loc 2 1121 4 view .LVU369 +1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 1182 .loc 2 1123 4 view .LVU370 + 1183 .syntax unified + 1184 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1185 003e 42E80031 strex r1, r3, [r2] + 1186 @ 0 "" 2 + 1187 .LVL96: + 1188 .loc 2 1124 4 view .LVU371 + 1189 .loc 2 1124 4 is_stmt 0 view .LVU372 + 1190 .thumb + 1191 .syntax unified + 1192 .LBE41: + 1193 .LBE40: + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1194 .loc 1 683 9 discriminator 1 view .LVU373 + 1195 0042 0029 cmp r1, #0 + 1196 0044 F6D1 bne .L84 + 1197 0046 E4E7 b .L82 + 1198 .LVL97: + 1199 .L85: + 1200 .cfi_def_cfa_offset 0 + 1201 .cfi_restore 4 + 1202 .cfi_restore 14 + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + ARM GAS /tmp/cctLjoMV.s page 61 + + + 1203 .loc 1 683 9 discriminator 1 view .LVU374 + 1204 .LBE37: + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1205 .loc 1 699 12 view .LVU375 + 1206 0048 0220 movs r0, #2 + 1207 .LVL98: + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1208 .loc 1 701 1 view .LVU376 + 1209 004a 7047 bx lr + 1210 .LVL99: + 1211 .L86: + 1212 .cfi_def_cfa_offset 8 + 1213 .cfi_offset 4, -8 + 1214 .cfi_offset 14, -4 + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1215 .loc 1 668 14 view .LVU377 + 1216 004c 0120 movs r0, #1 + 1217 .LVL100: + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1218 .loc 1 668 14 view .LVU378 + 1219 004e E0E7 b .L82 + 1220 .cfi_endproc + 1221 .LFE138: + 1223 .section .text.HAL_UARTEx_GetRxEventType,"ax",%progbits + 1224 .align 1 + 1225 .global HAL_UARTEx_GetRxEventType + 1226 .syntax unified + 1227 .thumb + 1228 .thumb_func + 1230 HAL_UARTEx_GetRxEventType: + 1231 .LVL101: + 1232 .LFB139: + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Return Rx Event type value, as stored in UART handle */ + 1233 .loc 1 728 1 is_stmt 1 view -0 + 1234 .cfi_startproc + 1235 @ args = 0, pretend = 0, frame = 0 + 1236 @ frame_needed = 0, uses_anonymous_args = 0 + 1237 @ link register save eliminated. + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1238 .loc 1 730 3 view .LVU380 + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } + 1239 .loc 1 730 16 is_stmt 0 view .LVU381 + 1240 0000 406E ldr r0, [r0, #100] + 1241 .LVL102: + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** + 1242 .loc 1 731 1 view .LVU382 + 1243 0002 7047 bx lr + 1244 .cfi_endproc + 1245 .LFE139: + 1247 .text + 1248 .Letext0: + 1249 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1250 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 1251 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + 1252 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1253 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1254 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + ARM GAS /tmp/cctLjoMV.s page 62 + + + 1255 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" + 1256 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h" + 1257 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/cctLjoMV.s page 63 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_uart_ex.c + /tmp/cctLjoMV.s:21 .text.UARTEx_Wakeup_AddressConfig:00000000 $t + /tmp/cctLjoMV.s:26 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig + /tmp/cctLjoMV.s:63 .text.HAL_RS485Ex_Init:00000000 $t + /tmp/cctLjoMV.s:69 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init + /tmp/cctLjoMV.s:204 .text.HAL_UARTEx_WakeupCallback:00000000 $t + /tmp/cctLjoMV.s:210 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback + /tmp/cctLjoMV.s:225 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t + /tmp/cctLjoMV.s:231 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set + /tmp/cctLjoMV.s:293 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t + /tmp/cctLjoMV.s:299 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig + /tmp/cctLjoMV.s:421 .text.HAL_UARTEx_EnableStopMode:00000000 $t + /tmp/cctLjoMV.s:427 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode + /tmp/cctLjoMV.s:520 .text.HAL_UARTEx_DisableStopMode:00000000 $t + /tmp/cctLjoMV.s:526 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode + /tmp/cctLjoMV.s:618 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t + /tmp/cctLjoMV.s:624 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle + /tmp/cctLjoMV.s:926 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t + /tmp/cctLjoMV.s:932 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT + /tmp/cctLjoMV.s:1075 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t + /tmp/cctLjoMV.s:1081 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA + /tmp/cctLjoMV.s:1224 .text.HAL_UARTEx_GetRxEventType:00000000 $t + /tmp/cctLjoMV.s:1230 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType + +UNDEFINED SYMBOLS +UART_SetConfig +UART_CheckIdleState +HAL_UART_MspInit +UART_AdvFeatureConfig +HAL_GetTick +UART_WaitOnFlagUntilTimeout +UART_Start_Receive_IT +UART_Start_Receive_DMA diff --git a/build/stm32f3xx_hal_uart_ex.o b/build/stm32f3xx_hal_uart_ex.o new file mode 100644 index 0000000..ffcb971 Binary files /dev/null and b/build/stm32f3xx_hal_uart_ex.o differ diff --git a/build/stm32f3xx_it.d b/build/stm32f3xx_it.d new file mode 100644 index 0000000..bd8afcd --- /dev/null +++ b/build/stm32f3xx_it.d @@ -0,0 +1,68 @@ +build/stm32f3xx_it.o: Core/Src/stm32f3xx_it.c Core/Inc/main.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h \ + Core/Inc/stm32f3xx_it.h +Core/Inc/main.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: +Core/Inc/stm32f3xx_it.h: diff --git a/build/stm32f3xx_it.lst b/build/stm32f3xx_it.lst new file mode 100644 index 0000000..a0bd18b --- /dev/null +++ b/build/stm32f3xx_it.lst @@ -0,0 +1,445 @@ +ARM GAS /tmp/cccBVWnx.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_it.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/stm32f3xx_it.c" + 20 .section .text.NMI_Handler,"ax",%progbits + 21 .align 1 + 22 .global NMI_Handler + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 NMI_Handler: + 28 .LFB130: + 1:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/stm32f3xx_it.c **** /** + 3:Core/Src/stm32f3xx_it.c **** ****************************************************************************** + 4:Core/Src/stm32f3xx_it.c **** * @file stm32f3xx_it.c + 5:Core/Src/stm32f3xx_it.c **** * @brief Interrupt Service Routines. + 6:Core/Src/stm32f3xx_it.c **** ****************************************************************************** + 7:Core/Src/stm32f3xx_it.c **** * @attention + 8:Core/Src/stm32f3xx_it.c **** * + 9:Core/Src/stm32f3xx_it.c **** * Copyright (c) 2024 STMicroelectronics. + 10:Core/Src/stm32f3xx_it.c **** * All rights reserved. + 11:Core/Src/stm32f3xx_it.c **** * + 12:Core/Src/stm32f3xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file + 13:Core/Src/stm32f3xx_it.c **** * in the root directory of this software component. + 14:Core/Src/stm32f3xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 15:Core/Src/stm32f3xx_it.c **** * + 16:Core/Src/stm32f3xx_it.c **** ****************************************************************************** + 17:Core/Src/stm32f3xx_it.c **** */ + 18:Core/Src/stm32f3xx_it.c **** /* USER CODE END Header */ + 19:Core/Src/stm32f3xx_it.c **** + 20:Core/Src/stm32f3xx_it.c **** /* Includes ------------------------------------------------------------------*/ + 21:Core/Src/stm32f3xx_it.c **** #include "main.h" + 22:Core/Src/stm32f3xx_it.c **** #include "stm32f3xx_it.h" + 23:Core/Src/stm32f3xx_it.c **** /* Private includes ----------------------------------------------------------*/ + 24:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN Includes */ + 25:Core/Src/stm32f3xx_it.c **** /* USER CODE END Includes */ + 26:Core/Src/stm32f3xx_it.c **** + 27:Core/Src/stm32f3xx_it.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN TD */ + 29:Core/Src/stm32f3xx_it.c **** + 30:Core/Src/stm32f3xx_it.c **** /* USER CODE END TD */ + ARM GAS /tmp/cccBVWnx.s page 2 + + + 31:Core/Src/stm32f3xx_it.c **** + 32:Core/Src/stm32f3xx_it.c **** /* Private define ------------------------------------------------------------*/ + 33:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PD */ + 34:Core/Src/stm32f3xx_it.c **** + 35:Core/Src/stm32f3xx_it.c **** /* USER CODE END PD */ + 36:Core/Src/stm32f3xx_it.c **** + 37:Core/Src/stm32f3xx_it.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PM */ + 39:Core/Src/stm32f3xx_it.c **** + 40:Core/Src/stm32f3xx_it.c **** /* USER CODE END PM */ + 41:Core/Src/stm32f3xx_it.c **** + 42:Core/Src/stm32f3xx_it.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PV */ + 44:Core/Src/stm32f3xx_it.c **** + 45:Core/Src/stm32f3xx_it.c **** /* USER CODE END PV */ + 46:Core/Src/stm32f3xx_it.c **** + 47:Core/Src/stm32f3xx_it.c **** /* Private function prototypes -----------------------------------------------*/ + 48:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PFP */ + 49:Core/Src/stm32f3xx_it.c **** + 50:Core/Src/stm32f3xx_it.c **** /* USER CODE END PFP */ + 51:Core/Src/stm32f3xx_it.c **** + 52:Core/Src/stm32f3xx_it.c **** /* Private user code ---------------------------------------------------------*/ + 53:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN 0 */ + 54:Core/Src/stm32f3xx_it.c **** + 55:Core/Src/stm32f3xx_it.c **** /* USER CODE END 0 */ + 56:Core/Src/stm32f3xx_it.c **** + 57:Core/Src/stm32f3xx_it.c **** /* External variables --------------------------------------------------------*/ + 58:Core/Src/stm32f3xx_it.c **** + 59:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN EV */ + 60:Core/Src/stm32f3xx_it.c **** + 61:Core/Src/stm32f3xx_it.c **** /* USER CODE END EV */ + 62:Core/Src/stm32f3xx_it.c **** + 63:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ + 64:Core/Src/stm32f3xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */ + 65:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ + 66:Core/Src/stm32f3xx_it.c **** /** + 67:Core/Src/stm32f3xx_it.c **** * @brief This function handles Non maskable interrupt. + 68:Core/Src/stm32f3xx_it.c **** */ + 69:Core/Src/stm32f3xx_it.c **** void NMI_Handler(void) + 70:Core/Src/stm32f3xx_it.c **** { + 29 .loc 1 70 1 view -0 + 30 .cfi_startproc + 31 @ Volatile: function does not return. + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 35 .L2: + 71:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + 72:Core/Src/stm32f3xx_it.c **** + 73:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ + 74:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + 75:Core/Src/stm32f3xx_it.c **** while (1) + 36 .loc 1 75 4 view .LVU1 + 76:Core/Src/stm32f3xx_it.c **** { + 77:Core/Src/stm32f3xx_it.c **** } + 37 .loc 1 77 3 view .LVU2 + 75:Core/Src/stm32f3xx_it.c **** { + ARM GAS /tmp/cccBVWnx.s page 3 + + + 38 .loc 1 75 10 view .LVU3 + 39 0000 FEE7 b .L2 + 40 .cfi_endproc + 41 .LFE130: + 43 .section .text.HardFault_Handler,"ax",%progbits + 44 .align 1 + 45 .global HardFault_Handler + 46 .syntax unified + 47 .thumb + 48 .thumb_func + 50 HardFault_Handler: + 51 .LFB131: + 78:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ + 79:Core/Src/stm32f3xx_it.c **** } + 80:Core/Src/stm32f3xx_it.c **** + 81:Core/Src/stm32f3xx_it.c **** /** + 82:Core/Src/stm32f3xx_it.c **** * @brief This function handles Hard fault interrupt. + 83:Core/Src/stm32f3xx_it.c **** */ + 84:Core/Src/stm32f3xx_it.c **** void HardFault_Handler(void) + 85:Core/Src/stm32f3xx_it.c **** { + 52 .loc 1 85 1 view -0 + 53 .cfi_startproc + 54 @ Volatile: function does not return. + 55 @ args = 0, pretend = 0, frame = 0 + 56 @ frame_needed = 0, uses_anonymous_args = 0 + 57 @ link register save eliminated. + 58 .L4: + 86:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ + 87:Core/Src/stm32f3xx_it.c **** + 88:Core/Src/stm32f3xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ + 89:Core/Src/stm32f3xx_it.c **** while (1) + 59 .loc 1 89 3 view .LVU5 + 90:Core/Src/stm32f3xx_it.c **** { + 91:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + 92:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ + 93:Core/Src/stm32f3xx_it.c **** } + 60 .loc 1 93 3 view .LVU6 + 89:Core/Src/stm32f3xx_it.c **** { + 61 .loc 1 89 9 view .LVU7 + 62 0000 FEE7 b .L4 + 63 .cfi_endproc + 64 .LFE131: + 66 .section .text.MemManage_Handler,"ax",%progbits + 67 .align 1 + 68 .global MemManage_Handler + 69 .syntax unified + 70 .thumb + 71 .thumb_func + 73 MemManage_Handler: + 74 .LFB132: + 94:Core/Src/stm32f3xx_it.c **** } + 95:Core/Src/stm32f3xx_it.c **** + 96:Core/Src/stm32f3xx_it.c **** /** + 97:Core/Src/stm32f3xx_it.c **** * @brief This function handles Memory management fault. + 98:Core/Src/stm32f3xx_it.c **** */ + 99:Core/Src/stm32f3xx_it.c **** void MemManage_Handler(void) + 100:Core/Src/stm32f3xx_it.c **** { + ARM GAS /tmp/cccBVWnx.s page 4 + + + 75 .loc 1 100 1 view -0 + 76 .cfi_startproc + 77 @ Volatile: function does not return. + 78 @ args = 0, pretend = 0, frame = 0 + 79 @ frame_needed = 0, uses_anonymous_args = 0 + 80 @ link register save eliminated. + 81 .L6: + 101:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + 102:Core/Src/stm32f3xx_it.c **** + 103:Core/Src/stm32f3xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */ + 104:Core/Src/stm32f3xx_it.c **** while (1) + 82 .loc 1 104 3 view .LVU9 + 105:Core/Src/stm32f3xx_it.c **** { + 106:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + 107:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */ + 108:Core/Src/stm32f3xx_it.c **** } + 83 .loc 1 108 3 view .LVU10 + 104:Core/Src/stm32f3xx_it.c **** { + 84 .loc 1 104 9 view .LVU11 + 85 0000 FEE7 b .L6 + 86 .cfi_endproc + 87 .LFE132: + 89 .section .text.BusFault_Handler,"ax",%progbits + 90 .align 1 + 91 .global BusFault_Handler + 92 .syntax unified + 93 .thumb + 94 .thumb_func + 96 BusFault_Handler: + 97 .LFB133: + 109:Core/Src/stm32f3xx_it.c **** } + 110:Core/Src/stm32f3xx_it.c **** + 111:Core/Src/stm32f3xx_it.c **** /** + 112:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault. + 113:Core/Src/stm32f3xx_it.c **** */ + 114:Core/Src/stm32f3xx_it.c **** void BusFault_Handler(void) + 115:Core/Src/stm32f3xx_it.c **** { + 98 .loc 1 115 1 view -0 + 99 .cfi_startproc + 100 @ Volatile: function does not return. + 101 @ args = 0, pretend = 0, frame = 0 + 102 @ frame_needed = 0, uses_anonymous_args = 0 + 103 @ link register save eliminated. + 104 .L8: + 116:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */ + 117:Core/Src/stm32f3xx_it.c **** + 118:Core/Src/stm32f3xx_it.c **** /* USER CODE END BusFault_IRQn 0 */ + 119:Core/Src/stm32f3xx_it.c **** while (1) + 105 .loc 1 119 3 view .LVU13 + 120:Core/Src/stm32f3xx_it.c **** { + 121:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + 122:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */ + 123:Core/Src/stm32f3xx_it.c **** } + 106 .loc 1 123 3 view .LVU14 + 119:Core/Src/stm32f3xx_it.c **** { + 107 .loc 1 119 9 view .LVU15 + 108 0000 FEE7 b .L8 + ARM GAS /tmp/cccBVWnx.s page 5 + + + 109 .cfi_endproc + 110 .LFE133: + 112 .section .text.UsageFault_Handler,"ax",%progbits + 113 .align 1 + 114 .global UsageFault_Handler + 115 .syntax unified + 116 .thumb + 117 .thumb_func + 119 UsageFault_Handler: + 120 .LFB134: + 124:Core/Src/stm32f3xx_it.c **** } + 125:Core/Src/stm32f3xx_it.c **** + 126:Core/Src/stm32f3xx_it.c **** /** + 127:Core/Src/stm32f3xx_it.c **** * @brief This function handles Undefined instruction or illegal state. + 128:Core/Src/stm32f3xx_it.c **** */ + 129:Core/Src/stm32f3xx_it.c **** void UsageFault_Handler(void) + 130:Core/Src/stm32f3xx_it.c **** { + 121 .loc 1 130 1 view -0 + 122 .cfi_startproc + 123 @ Volatile: function does not return. + 124 @ args = 0, pretend = 0, frame = 0 + 125 @ frame_needed = 0, uses_anonymous_args = 0 + 126 @ link register save eliminated. + 127 .L10: + 131:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */ + 132:Core/Src/stm32f3xx_it.c **** + 133:Core/Src/stm32f3xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */ + 134:Core/Src/stm32f3xx_it.c **** while (1) + 128 .loc 1 134 3 view .LVU17 + 135:Core/Src/stm32f3xx_it.c **** { + 136:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + 137:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */ + 138:Core/Src/stm32f3xx_it.c **** } + 129 .loc 1 138 3 view .LVU18 + 134:Core/Src/stm32f3xx_it.c **** { + 130 .loc 1 134 9 view .LVU19 + 131 0000 FEE7 b .L10 + 132 .cfi_endproc + 133 .LFE134: + 135 .section .text.SVC_Handler,"ax",%progbits + 136 .align 1 + 137 .global SVC_Handler + 138 .syntax unified + 139 .thumb + 140 .thumb_func + 142 SVC_Handler: + 143 .LFB135: + 139:Core/Src/stm32f3xx_it.c **** } + 140:Core/Src/stm32f3xx_it.c **** + 141:Core/Src/stm32f3xx_it.c **** /** + 142:Core/Src/stm32f3xx_it.c **** * @brief This function handles System service call via SWI instruction. + 143:Core/Src/stm32f3xx_it.c **** */ + 144:Core/Src/stm32f3xx_it.c **** void SVC_Handler(void) + 145:Core/Src/stm32f3xx_it.c **** { + 144 .loc 1 145 1 view -0 + 145 .cfi_startproc + 146 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cccBVWnx.s page 6 + + + 147 @ frame_needed = 0, uses_anonymous_args = 0 + 148 @ link register save eliminated. + 146:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */ + 147:Core/Src/stm32f3xx_it.c **** + 148:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 0 */ + 149:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */ + 150:Core/Src/stm32f3xx_it.c **** + 151:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 1 */ + 152:Core/Src/stm32f3xx_it.c **** } + 149 .loc 1 152 1 view .LVU21 + 150 0000 7047 bx lr + 151 .cfi_endproc + 152 .LFE135: + 154 .section .text.DebugMon_Handler,"ax",%progbits + 155 .align 1 + 156 .global DebugMon_Handler + 157 .syntax unified + 158 .thumb + 159 .thumb_func + 161 DebugMon_Handler: + 162 .LFB136: + 153:Core/Src/stm32f3xx_it.c **** + 154:Core/Src/stm32f3xx_it.c **** /** + 155:Core/Src/stm32f3xx_it.c **** * @brief This function handles Debug monitor. + 156:Core/Src/stm32f3xx_it.c **** */ + 157:Core/Src/stm32f3xx_it.c **** void DebugMon_Handler(void) + 158:Core/Src/stm32f3xx_it.c **** { + 163 .loc 1 158 1 view -0 + 164 .cfi_startproc + 165 @ args = 0, pretend = 0, frame = 0 + 166 @ frame_needed = 0, uses_anonymous_args = 0 + 167 @ link register save eliminated. + 159:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + 160:Core/Src/stm32f3xx_it.c **** + 161:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */ + 162:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + 163:Core/Src/stm32f3xx_it.c **** + 164:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */ + 165:Core/Src/stm32f3xx_it.c **** } + 168 .loc 1 165 1 view .LVU23 + 169 0000 7047 bx lr + 170 .cfi_endproc + 171 .LFE136: + 173 .section .text.PendSV_Handler,"ax",%progbits + 174 .align 1 + 175 .global PendSV_Handler + 176 .syntax unified + 177 .thumb + 178 .thumb_func + 180 PendSV_Handler: + 181 .LFB137: + 166:Core/Src/stm32f3xx_it.c **** + 167:Core/Src/stm32f3xx_it.c **** /** + 168:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pendable request for system service. + 169:Core/Src/stm32f3xx_it.c **** */ + 170:Core/Src/stm32f3xx_it.c **** void PendSV_Handler(void) + 171:Core/Src/stm32f3xx_it.c **** { + ARM GAS /tmp/cccBVWnx.s page 7 + + + 182 .loc 1 171 1 view -0 + 183 .cfi_startproc + 184 @ args = 0, pretend = 0, frame = 0 + 185 @ frame_needed = 0, uses_anonymous_args = 0 + 186 @ link register save eliminated. + 172:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ + 173:Core/Src/stm32f3xx_it.c **** + 174:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ + 175:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ + 176:Core/Src/stm32f3xx_it.c **** + 177:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ + 178:Core/Src/stm32f3xx_it.c **** } + 187 .loc 1 178 1 view .LVU25 + 188 0000 7047 bx lr + 189 .cfi_endproc + 190 .LFE137: + 192 .section .text.SysTick_Handler,"ax",%progbits + 193 .align 1 + 194 .global SysTick_Handler + 195 .syntax unified + 196 .thumb + 197 .thumb_func + 199 SysTick_Handler: + 200 .LFB138: + 179:Core/Src/stm32f3xx_it.c **** + 180:Core/Src/stm32f3xx_it.c **** /** + 181:Core/Src/stm32f3xx_it.c **** * @brief This function handles System tick timer. + 182:Core/Src/stm32f3xx_it.c **** */ + 183:Core/Src/stm32f3xx_it.c **** void SysTick_Handler(void) + 184:Core/Src/stm32f3xx_it.c **** { + 201 .loc 1 184 1 view -0 + 202 .cfi_startproc + 203 @ args = 0, pretend = 0, frame = 0 + 204 @ frame_needed = 0, uses_anonymous_args = 0 + 205 0000 08B5 push {r3, lr} + 206 .cfi_def_cfa_offset 8 + 207 .cfi_offset 3, -8 + 208 .cfi_offset 14, -4 + 185:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ + 186:Core/Src/stm32f3xx_it.c **** + 187:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ + 188:Core/Src/stm32f3xx_it.c **** HAL_IncTick(); + 209 .loc 1 188 3 view .LVU27 + 210 0002 FFF7FEFF bl HAL_IncTick + 211 .LVL0: + 189:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ + 190:Core/Src/stm32f3xx_it.c **** + 191:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ + 192:Core/Src/stm32f3xx_it.c **** } + 212 .loc 1 192 1 is_stmt 0 view .LVU28 + 213 0006 08BD pop {r3, pc} + 214 .cfi_endproc + 215 .LFE138: + 217 .text + 218 .Letext0: + 219 .file 2 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/cccBVWnx.s page 8 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_it.c + /tmp/cccBVWnx.s:21 .text.NMI_Handler:00000000 $t + /tmp/cccBVWnx.s:27 .text.NMI_Handler:00000000 NMI_Handler + /tmp/cccBVWnx.s:44 .text.HardFault_Handler:00000000 $t + /tmp/cccBVWnx.s:50 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/cccBVWnx.s:67 .text.MemManage_Handler:00000000 $t + /tmp/cccBVWnx.s:73 .text.MemManage_Handler:00000000 MemManage_Handler + /tmp/cccBVWnx.s:90 .text.BusFault_Handler:00000000 $t + /tmp/cccBVWnx.s:96 .text.BusFault_Handler:00000000 BusFault_Handler + /tmp/cccBVWnx.s:113 .text.UsageFault_Handler:00000000 $t + /tmp/cccBVWnx.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler + /tmp/cccBVWnx.s:136 .text.SVC_Handler:00000000 $t + /tmp/cccBVWnx.s:142 .text.SVC_Handler:00000000 SVC_Handler + /tmp/cccBVWnx.s:155 .text.DebugMon_Handler:00000000 $t + /tmp/cccBVWnx.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler + /tmp/cccBVWnx.s:174 .text.PendSV_Handler:00000000 $t + /tmp/cccBVWnx.s:180 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/cccBVWnx.s:193 .text.SysTick_Handler:00000000 $t + /tmp/cccBVWnx.s:199 .text.SysTick_Handler:00000000 SysTick_Handler + +UNDEFINED SYMBOLS +HAL_IncTick diff --git a/build/stm32f3xx_it.o b/build/stm32f3xx_it.o new file mode 100644 index 0000000..23ecf5f Binary files /dev/null and b/build/stm32f3xx_it.o differ diff --git a/build/syscalls.d b/build/syscalls.d new file mode 100644 index 0000000..8efb132 --- /dev/null +++ b/build/syscalls.d @@ -0,0 +1 @@ +build/syscalls.o: Core/Src/syscalls.c diff --git a/build/syscalls.lst b/build/syscalls.lst new file mode 100644 index 0000000..2161bb1 --- /dev/null +++ b/build/syscalls.lst @@ -0,0 +1,861 @@ +ARM GAS /tmp/cc0T5371.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "syscalls.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/syscalls.c" + 20 .section .text.initialise_monitor_handles,"ax",%progbits + 21 .align 1 + 22 .global initialise_monitor_handles + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 initialise_monitor_handles: + 28 .LFB25: + 1:Core/Src/syscalls.c **** /** + 2:Core/Src/syscalls.c **** ****************************************************************************** + 3:Core/Src/syscalls.c **** * @file syscalls.c + 4:Core/Src/syscalls.c **** * @author Auto-generated by STM32CubeMX + 5:Core/Src/syscalls.c **** * @brief Minimal System calls file + 6:Core/Src/syscalls.c **** * + 7:Core/Src/syscalls.c **** * For more information about which c-functions + 8:Core/Src/syscalls.c **** * need which of these lowlevel functions + 9:Core/Src/syscalls.c **** * please consult the Newlib libc-manual + 10:Core/Src/syscalls.c **** ****************************************************************************** + 11:Core/Src/syscalls.c **** * @attention + 12:Core/Src/syscalls.c **** * + 13:Core/Src/syscalls.c **** * Copyright (c) 2020-2024 STMicroelectronics. + 14:Core/Src/syscalls.c **** * All rights reserved. + 15:Core/Src/syscalls.c **** * + 16:Core/Src/syscalls.c **** * This software is licensed under terms that can be found in the LICENSE file + 17:Core/Src/syscalls.c **** * in the root directory of this software component. + 18:Core/Src/syscalls.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Core/Src/syscalls.c **** * + 20:Core/Src/syscalls.c **** ****************************************************************************** + 21:Core/Src/syscalls.c **** */ + 22:Core/Src/syscalls.c **** + 23:Core/Src/syscalls.c **** /* Includes */ + 24:Core/Src/syscalls.c **** #include + 25:Core/Src/syscalls.c **** #include + 26:Core/Src/syscalls.c **** #include + 27:Core/Src/syscalls.c **** #include + 28:Core/Src/syscalls.c **** #include + 29:Core/Src/syscalls.c **** #include + 30:Core/Src/syscalls.c **** #include + ARM GAS /tmp/cc0T5371.s page 2 + + + 31:Core/Src/syscalls.c **** #include + 32:Core/Src/syscalls.c **** + 33:Core/Src/syscalls.c **** + 34:Core/Src/syscalls.c **** /* Variables */ + 35:Core/Src/syscalls.c **** extern int __io_putchar(int ch) __attribute__((weak)); + 36:Core/Src/syscalls.c **** extern int __io_getchar(void) __attribute__((weak)); + 37:Core/Src/syscalls.c **** + 38:Core/Src/syscalls.c **** + 39:Core/Src/syscalls.c **** char *__env[1] = { 0 }; + 40:Core/Src/syscalls.c **** char **environ = __env; + 41:Core/Src/syscalls.c **** + 42:Core/Src/syscalls.c **** + 43:Core/Src/syscalls.c **** /* Functions */ + 44:Core/Src/syscalls.c **** void initialise_monitor_handles() + 45:Core/Src/syscalls.c **** { + 29 .loc 1 45 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 46:Core/Src/syscalls.c **** } + 34 .loc 1 46 1 view .LVU1 + 35 0000 7047 bx lr + 36 .cfi_endproc + 37 .LFE25: + 39 .section .text._getpid,"ax",%progbits + 40 .align 1 + 41 .global _getpid + 42 .syntax unified + 43 .thumb + 44 .thumb_func + 46 _getpid: + 47 .LFB26: + 47:Core/Src/syscalls.c **** + 48:Core/Src/syscalls.c **** int _getpid(void) + 49:Core/Src/syscalls.c **** { + 48 .loc 1 49 1 view -0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 @ link register save eliminated. + 50:Core/Src/syscalls.c **** return 1; + 53 .loc 1 50 3 view .LVU3 + 51:Core/Src/syscalls.c **** } + 54 .loc 1 51 1 is_stmt 0 view .LVU4 + 55 0000 0120 movs r0, #1 + 56 0002 7047 bx lr + 57 .cfi_endproc + 58 .LFE26: + 60 .section .text._kill,"ax",%progbits + 61 .align 1 + 62 .global _kill + 63 .syntax unified + 64 .thumb + 65 .thumb_func + 67 _kill: + 68 .LVL0: + ARM GAS /tmp/cc0T5371.s page 3 + + + 69 .LFB27: + 52:Core/Src/syscalls.c **** + 53:Core/Src/syscalls.c **** int _kill(int pid, int sig) + 54:Core/Src/syscalls.c **** { + 70 .loc 1 54 1 is_stmt 1 view -0 + 71 .cfi_startproc + 72 @ args = 0, pretend = 0, frame = 0 + 73 @ frame_needed = 0, uses_anonymous_args = 0 + 74 .loc 1 54 1 is_stmt 0 view .LVU6 + 75 0000 08B5 push {r3, lr} + 76 .cfi_def_cfa_offset 8 + 77 .cfi_offset 3, -8 + 78 .cfi_offset 14, -4 + 55:Core/Src/syscalls.c **** (void)pid; + 79 .loc 1 55 3 is_stmt 1 view .LVU7 + 56:Core/Src/syscalls.c **** (void)sig; + 80 .loc 1 56 3 view .LVU8 + 57:Core/Src/syscalls.c **** errno = EINVAL; + 81 .loc 1 57 3 view .LVU9 + 82 0002 FFF7FEFF bl __errno + 83 .LVL1: + 84 .loc 1 57 9 is_stmt 0 discriminator 1 view .LVU10 + 85 0006 1623 movs r3, #22 + 86 0008 0360 str r3, [r0] + 58:Core/Src/syscalls.c **** return -1; + 87 .loc 1 58 3 is_stmt 1 view .LVU11 + 59:Core/Src/syscalls.c **** } + 88 .loc 1 59 1 is_stmt 0 view .LVU12 + 89 000a 4FF0FF30 mov r0, #-1 + 90 000e 08BD pop {r3, pc} + 91 .cfi_endproc + 92 .LFE27: + 94 .section .text._exit,"ax",%progbits + 95 .align 1 + 96 .global _exit + 97 .syntax unified + 98 .thumb + 99 .thumb_func + 101 _exit: + 102 .LVL2: + 103 .LFB28: + 60:Core/Src/syscalls.c **** + 61:Core/Src/syscalls.c **** void _exit (int status) + 62:Core/Src/syscalls.c **** { + 104 .loc 1 62 1 is_stmt 1 view -0 + 105 .cfi_startproc + 106 @ Volatile: function does not return. + 107 @ args = 0, pretend = 0, frame = 0 + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 .loc 1 62 1 is_stmt 0 view .LVU14 + 110 0000 08B5 push {r3, lr} + 111 .cfi_def_cfa_offset 8 + 112 .cfi_offset 3, -8 + 113 .cfi_offset 14, -4 + 63:Core/Src/syscalls.c **** _kill(status, -1); + 114 .loc 1 63 3 is_stmt 1 view .LVU15 + 115 0002 4FF0FF31 mov r1, #-1 + ARM GAS /tmp/cc0T5371.s page 4 + + + 116 0006 FFF7FEFF bl _kill + 117 .LVL3: + 118 .L6: + 64:Core/Src/syscalls.c **** while (1) {} /* Make sure we hang here */ + 119 .loc 1 64 3 view .LVU16 + 120 .loc 1 64 14 view .LVU17 + 121 .loc 1 64 9 view .LVU18 + 122 000a FEE7 b .L6 + 123 .cfi_endproc + 124 .LFE28: + 126 .section .text._read,"ax",%progbits + 127 .align 1 + 128 .weak _read + 129 .syntax unified + 130 .thumb + 131 .thumb_func + 133 _read: + 134 .LVL4: + 135 .LFB29: + 65:Core/Src/syscalls.c **** } + 66:Core/Src/syscalls.c **** + 67:Core/Src/syscalls.c **** __attribute__((weak)) int _read(int file, char *ptr, int len) + 68:Core/Src/syscalls.c **** { + 136 .loc 1 68 1 view -0 + 137 .cfi_startproc + 138 @ args = 0, pretend = 0, frame = 0 + 139 @ frame_needed = 0, uses_anonymous_args = 0 + 140 .loc 1 68 1 is_stmt 0 view .LVU20 + 141 0000 70B5 push {r4, r5, r6, lr} + 142 .cfi_def_cfa_offset 16 + 143 .cfi_offset 4, -16 + 144 .cfi_offset 5, -12 + 145 .cfi_offset 6, -8 + 146 .cfi_offset 14, -4 + 147 0002 0C46 mov r4, r1 + 148 0004 1646 mov r6, r2 + 69:Core/Src/syscalls.c **** (void)file; + 149 .loc 1 69 3 is_stmt 1 view .LVU21 + 70:Core/Src/syscalls.c **** int DataIdx; + 150 .loc 1 70 3 view .LVU22 + 71:Core/Src/syscalls.c **** + 72:Core/Src/syscalls.c **** for (DataIdx = 0; DataIdx < len; DataIdx++) + 151 .loc 1 72 3 view .LVU23 + 152 .LVL5: + 153 .loc 1 72 16 is_stmt 0 view .LVU24 + 154 0006 0025 movs r5, #0 + 155 .loc 1 72 3 view .LVU25 + 156 0008 06E0 b .L9 + 157 .LVL6: + 158 .L10: + 73:Core/Src/syscalls.c **** { + 74:Core/Src/syscalls.c **** *ptr++ = __io_getchar(); + 159 .loc 1 74 5 is_stmt 1 view .LVU26 + 160 .loc 1 74 14 is_stmt 0 view .LVU27 + 161 000a FFF7FEFF bl __io_getchar + 162 .LVL7: + 163 .loc 1 74 9 discriminator 1 view .LVU28 + ARM GAS /tmp/cc0T5371.s page 5 + + + 164 000e 2146 mov r1, r4 + 165 .LVL8: + 166 .loc 1 74 12 discriminator 1 view .LVU29 + 167 0010 01F8010B strb r0, [r1], #1 + 168 .LVL9: + 72:Core/Src/syscalls.c **** { + 169 .loc 1 72 43 is_stmt 1 discriminator 3 view .LVU30 + 170 0014 0135 adds r5, r5, #1 + 171 .LVL10: + 172 .loc 1 74 9 is_stmt 0 discriminator 1 view .LVU31 + 173 0016 0C46 mov r4, r1 + 174 .LVL11: + 175 .L9: + 72:Core/Src/syscalls.c **** { + 176 .loc 1 72 29 is_stmt 1 discriminator 1 view .LVU32 + 177 0018 B542 cmp r5, r6 + 178 001a F6DB blt .L10 + 75:Core/Src/syscalls.c **** } + 76:Core/Src/syscalls.c **** + 77:Core/Src/syscalls.c **** return len; + 179 .loc 1 77 3 view .LVU33 + 78:Core/Src/syscalls.c **** } + 180 .loc 1 78 1 is_stmt 0 view .LVU34 + 181 001c 3046 mov r0, r6 + 182 001e 70BD pop {r4, r5, r6, pc} + 183 .loc 1 78 1 view .LVU35 + 184 .cfi_endproc + 185 .LFE29: + 187 .section .text._write,"ax",%progbits + 188 .align 1 + 189 .weak _write + 190 .syntax unified + 191 .thumb + 192 .thumb_func + 194 _write: + 195 .LVL12: + 196 .LFB30: + 79:Core/Src/syscalls.c **** + 80:Core/Src/syscalls.c **** __attribute__((weak)) int _write(int file, char *ptr, int len) + 81:Core/Src/syscalls.c **** { + 197 .loc 1 81 1 is_stmt 1 view -0 + 198 .cfi_startproc + 199 @ args = 0, pretend = 0, frame = 0 + 200 @ frame_needed = 0, uses_anonymous_args = 0 + 201 .loc 1 81 1 is_stmt 0 view .LVU37 + 202 0000 70B5 push {r4, r5, r6, lr} + 203 .cfi_def_cfa_offset 16 + 204 .cfi_offset 4, -16 + 205 .cfi_offset 5, -12 + 206 .cfi_offset 6, -8 + 207 .cfi_offset 14, -4 + 208 0002 0C46 mov r4, r1 + 209 0004 1646 mov r6, r2 + 82:Core/Src/syscalls.c **** (void)file; + 210 .loc 1 82 3 is_stmt 1 view .LVU38 + 83:Core/Src/syscalls.c **** int DataIdx; + 211 .loc 1 83 3 view .LVU39 + ARM GAS /tmp/cc0T5371.s page 6 + + + 84:Core/Src/syscalls.c **** + 85:Core/Src/syscalls.c **** for (DataIdx = 0; DataIdx < len; DataIdx++) + 212 .loc 1 85 3 view .LVU40 + 213 .LVL13: + 214 .loc 1 85 16 is_stmt 0 view .LVU41 + 215 0006 0025 movs r5, #0 + 216 .loc 1 85 3 view .LVU42 + 217 0008 04E0 b .L13 + 218 .LVL14: + 219 .L14: + 86:Core/Src/syscalls.c **** { + 87:Core/Src/syscalls.c **** __io_putchar(*ptr++); + 220 .loc 1 87 5 is_stmt 1 view .LVU43 + 221 .loc 1 87 5 is_stmt 0 view .LVU44 + 222 000a 14F8010B ldrb r0, [r4], #1 @ zero_extendqisi2 + 223 .LVL15: + 224 .loc 1 87 5 view .LVU45 + 225 000e FFF7FEFF bl __io_putchar + 226 .LVL16: + 85:Core/Src/syscalls.c **** { + 227 .loc 1 85 43 is_stmt 1 discriminator 3 view .LVU46 + 228 0012 0135 adds r5, r5, #1 + 229 .LVL17: + 230 .L13: + 85:Core/Src/syscalls.c **** { + 231 .loc 1 85 29 discriminator 1 view .LVU47 + 232 0014 B542 cmp r5, r6 + 233 0016 F8DB blt .L14 + 88:Core/Src/syscalls.c **** } + 89:Core/Src/syscalls.c **** return len; + 234 .loc 1 89 3 view .LVU48 + 90:Core/Src/syscalls.c **** } + 235 .loc 1 90 1 is_stmt 0 view .LVU49 + 236 0018 3046 mov r0, r6 + 237 001a 70BD pop {r4, r5, r6, pc} + 238 .loc 1 90 1 view .LVU50 + 239 .cfi_endproc + 240 .LFE30: + 242 .section .text._close,"ax",%progbits + 243 .align 1 + 244 .global _close + 245 .syntax unified + 246 .thumb + 247 .thumb_func + 249 _close: + 250 .LVL18: + 251 .LFB31: + 91:Core/Src/syscalls.c **** + 92:Core/Src/syscalls.c **** int _close(int file) + 93:Core/Src/syscalls.c **** { + 252 .loc 1 93 1 is_stmt 1 view -0 + 253 .cfi_startproc + 254 @ args = 0, pretend = 0, frame = 0 + 255 @ frame_needed = 0, uses_anonymous_args = 0 + 256 @ link register save eliminated. + 94:Core/Src/syscalls.c **** (void)file; + 257 .loc 1 94 3 view .LVU52 + ARM GAS /tmp/cc0T5371.s page 7 + + + 95:Core/Src/syscalls.c **** return -1; + 258 .loc 1 95 3 view .LVU53 + 96:Core/Src/syscalls.c **** } + 259 .loc 1 96 1 is_stmt 0 view .LVU54 + 260 0000 4FF0FF30 mov r0, #-1 + 261 .LVL19: + 262 .loc 1 96 1 view .LVU55 + 263 0004 7047 bx lr + 264 .cfi_endproc + 265 .LFE31: + 267 .section .text._fstat,"ax",%progbits + 268 .align 1 + 269 .global _fstat + 270 .syntax unified + 271 .thumb + 272 .thumb_func + 274 _fstat: + 275 .LVL20: + 276 .LFB32: + 97:Core/Src/syscalls.c **** + 98:Core/Src/syscalls.c **** + 99:Core/Src/syscalls.c **** int _fstat(int file, struct stat *st) + 100:Core/Src/syscalls.c **** { + 277 .loc 1 100 1 is_stmt 1 view -0 + 278 .cfi_startproc + 279 @ args = 0, pretend = 0, frame = 0 + 280 @ frame_needed = 0, uses_anonymous_args = 0 + 281 @ link register save eliminated. + 101:Core/Src/syscalls.c **** (void)file; + 282 .loc 1 101 3 view .LVU57 + 102:Core/Src/syscalls.c **** st->st_mode = S_IFCHR; + 283 .loc 1 102 3 view .LVU58 + 284 .loc 1 102 15 is_stmt 0 view .LVU59 + 285 0000 4FF40053 mov r3, #8192 + 286 0004 4B60 str r3, [r1, #4] + 103:Core/Src/syscalls.c **** return 0; + 287 .loc 1 103 3 is_stmt 1 view .LVU60 + 104:Core/Src/syscalls.c **** } + 288 .loc 1 104 1 is_stmt 0 view .LVU61 + 289 0006 0020 movs r0, #0 + 290 .LVL21: + 291 .loc 1 104 1 view .LVU62 + 292 0008 7047 bx lr + 293 .cfi_endproc + 294 .LFE32: + 296 .section .text._isatty,"ax",%progbits + 297 .align 1 + 298 .global _isatty + 299 .syntax unified + 300 .thumb + 301 .thumb_func + 303 _isatty: + 304 .LVL22: + 305 .LFB33: + 105:Core/Src/syscalls.c **** + 106:Core/Src/syscalls.c **** int _isatty(int file) + 107:Core/Src/syscalls.c **** { + ARM GAS /tmp/cc0T5371.s page 8 + + + 306 .loc 1 107 1 is_stmt 1 view -0 + 307 .cfi_startproc + 308 @ args = 0, pretend = 0, frame = 0 + 309 @ frame_needed = 0, uses_anonymous_args = 0 + 310 @ link register save eliminated. + 108:Core/Src/syscalls.c **** (void)file; + 311 .loc 1 108 3 view .LVU64 + 109:Core/Src/syscalls.c **** return 1; + 312 .loc 1 109 3 view .LVU65 + 110:Core/Src/syscalls.c **** } + 313 .loc 1 110 1 is_stmt 0 view .LVU66 + 314 0000 0120 movs r0, #1 + 315 .LVL23: + 316 .loc 1 110 1 view .LVU67 + 317 0002 7047 bx lr + 318 .cfi_endproc + 319 .LFE33: + 321 .section .text._lseek,"ax",%progbits + 322 .align 1 + 323 .global _lseek + 324 .syntax unified + 325 .thumb + 326 .thumb_func + 328 _lseek: + 329 .LVL24: + 330 .LFB34: + 111:Core/Src/syscalls.c **** + 112:Core/Src/syscalls.c **** int _lseek(int file, int ptr, int dir) + 113:Core/Src/syscalls.c **** { + 331 .loc 1 113 1 is_stmt 1 view -0 + 332 .cfi_startproc + 333 @ args = 0, pretend = 0, frame = 0 + 334 @ frame_needed = 0, uses_anonymous_args = 0 + 335 @ link register save eliminated. + 114:Core/Src/syscalls.c **** (void)file; + 336 .loc 1 114 3 view .LVU69 + 115:Core/Src/syscalls.c **** (void)ptr; + 337 .loc 1 115 3 view .LVU70 + 116:Core/Src/syscalls.c **** (void)dir; + 338 .loc 1 116 3 view .LVU71 + 117:Core/Src/syscalls.c **** return 0; + 339 .loc 1 117 3 view .LVU72 + 118:Core/Src/syscalls.c **** } + 340 .loc 1 118 1 is_stmt 0 view .LVU73 + 341 0000 0020 movs r0, #0 + 342 .LVL25: + 343 .loc 1 118 1 view .LVU74 + 344 0002 7047 bx lr + 345 .cfi_endproc + 346 .LFE34: + 348 .section .text._open,"ax",%progbits + 349 .align 1 + 350 .global _open + 351 .syntax unified + 352 .thumb + 353 .thumb_func + 355 _open: + ARM GAS /tmp/cc0T5371.s page 9 + + + 356 .LVL26: + 357 .LFB35: + 119:Core/Src/syscalls.c **** + 120:Core/Src/syscalls.c **** int _open(char *path, int flags, ...) + 121:Core/Src/syscalls.c **** { + 358 .loc 1 121 1 is_stmt 1 view -0 + 359 .cfi_startproc + 360 @ args = 4, pretend = 12, frame = 0 + 361 @ frame_needed = 0, uses_anonymous_args = 1 + 362 @ link register save eliminated. + 363 .loc 1 121 1 is_stmt 0 view .LVU76 + 364 0000 0EB4 push {r1, r2, r3} + 365 .cfi_def_cfa_offset 12 + 366 .cfi_offset 1, -12 + 367 .cfi_offset 2, -8 + 368 .cfi_offset 3, -4 + 122:Core/Src/syscalls.c **** (void)path; + 369 .loc 1 122 3 is_stmt 1 view .LVU77 + 123:Core/Src/syscalls.c **** (void)flags; + 370 .loc 1 123 3 view .LVU78 + 124:Core/Src/syscalls.c **** /* Pretend like we always fail */ + 125:Core/Src/syscalls.c **** return -1; + 371 .loc 1 125 3 view .LVU79 + 126:Core/Src/syscalls.c **** } + 372 .loc 1 126 1 is_stmt 0 view .LVU80 + 373 0002 4FF0FF30 mov r0, #-1 + 374 .LVL27: + 375 .loc 1 126 1 view .LVU81 + 376 0006 03B0 add sp, sp, #12 + 377 .cfi_restore 3 + 378 .cfi_restore 2 + 379 .cfi_restore 1 + 380 .cfi_def_cfa_offset 0 + 381 0008 7047 bx lr + 382 .cfi_endproc + 383 .LFE35: + 385 .section .text._wait,"ax",%progbits + 386 .align 1 + 387 .global _wait + 388 .syntax unified + 389 .thumb + 390 .thumb_func + 392 _wait: + 393 .LVL28: + 394 .LFB36: + 127:Core/Src/syscalls.c **** + 128:Core/Src/syscalls.c **** int _wait(int *status) + 129:Core/Src/syscalls.c **** { + 395 .loc 1 129 1 is_stmt 1 view -0 + 396 .cfi_startproc + 397 @ args = 0, pretend = 0, frame = 0 + 398 @ frame_needed = 0, uses_anonymous_args = 0 + 399 .loc 1 129 1 is_stmt 0 view .LVU83 + 400 0000 08B5 push {r3, lr} + 401 .cfi_def_cfa_offset 8 + 402 .cfi_offset 3, -8 + 403 .cfi_offset 14, -4 + ARM GAS /tmp/cc0T5371.s page 10 + + + 130:Core/Src/syscalls.c **** (void)status; + 404 .loc 1 130 3 is_stmt 1 view .LVU84 + 131:Core/Src/syscalls.c **** errno = ECHILD; + 405 .loc 1 131 3 view .LVU85 + 406 0002 FFF7FEFF bl __errno + 407 .LVL29: + 408 .loc 1 131 9 is_stmt 0 discriminator 1 view .LVU86 + 409 0006 0A23 movs r3, #10 + 410 0008 0360 str r3, [r0] + 132:Core/Src/syscalls.c **** return -1; + 411 .loc 1 132 3 is_stmt 1 view .LVU87 + 133:Core/Src/syscalls.c **** } + 412 .loc 1 133 1 is_stmt 0 view .LVU88 + 413 000a 4FF0FF30 mov r0, #-1 + 414 000e 08BD pop {r3, pc} + 415 .cfi_endproc + 416 .LFE36: + 418 .section .text._unlink,"ax",%progbits + 419 .align 1 + 420 .global _unlink + 421 .syntax unified + 422 .thumb + 423 .thumb_func + 425 _unlink: + 426 .LVL30: + 427 .LFB37: + 134:Core/Src/syscalls.c **** + 135:Core/Src/syscalls.c **** int _unlink(char *name) + 136:Core/Src/syscalls.c **** { + 428 .loc 1 136 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 0 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + 432 .loc 1 136 1 is_stmt 0 view .LVU90 + 433 0000 08B5 push {r3, lr} + 434 .cfi_def_cfa_offset 8 + 435 .cfi_offset 3, -8 + 436 .cfi_offset 14, -4 + 137:Core/Src/syscalls.c **** (void)name; + 437 .loc 1 137 3 is_stmt 1 view .LVU91 + 138:Core/Src/syscalls.c **** errno = ENOENT; + 438 .loc 1 138 3 view .LVU92 + 439 0002 FFF7FEFF bl __errno + 440 .LVL31: + 441 .loc 1 138 9 is_stmt 0 discriminator 1 view .LVU93 + 442 0006 0223 movs r3, #2 + 443 0008 0360 str r3, [r0] + 139:Core/Src/syscalls.c **** return -1; + 444 .loc 1 139 3 is_stmt 1 view .LVU94 + 140:Core/Src/syscalls.c **** } + 445 .loc 1 140 1 is_stmt 0 view .LVU95 + 446 000a 4FF0FF30 mov r0, #-1 + 447 000e 08BD pop {r3, pc} + 448 .cfi_endproc + 449 .LFE37: + 451 .section .text._times,"ax",%progbits + 452 .align 1 + ARM GAS /tmp/cc0T5371.s page 11 + + + 453 .global _times + 454 .syntax unified + 455 .thumb + 456 .thumb_func + 458 _times: + 459 .LVL32: + 460 .LFB38: + 141:Core/Src/syscalls.c **** + 142:Core/Src/syscalls.c **** int _times(struct tms *buf) + 143:Core/Src/syscalls.c **** { + 461 .loc 1 143 1 is_stmt 1 view -0 + 462 .cfi_startproc + 463 @ args = 0, pretend = 0, frame = 0 + 464 @ frame_needed = 0, uses_anonymous_args = 0 + 465 @ link register save eliminated. + 144:Core/Src/syscalls.c **** (void)buf; + 466 .loc 1 144 3 view .LVU97 + 145:Core/Src/syscalls.c **** return -1; + 467 .loc 1 145 3 view .LVU98 + 146:Core/Src/syscalls.c **** } + 468 .loc 1 146 1 is_stmt 0 view .LVU99 + 469 0000 4FF0FF30 mov r0, #-1 + 470 .LVL33: + 471 .loc 1 146 1 view .LVU100 + 472 0004 7047 bx lr + 473 .cfi_endproc + 474 .LFE38: + 476 .section .text._stat,"ax",%progbits + 477 .align 1 + 478 .global _stat + 479 .syntax unified + 480 .thumb + 481 .thumb_func + 483 _stat: + 484 .LVL34: + 485 .LFB39: + 147:Core/Src/syscalls.c **** + 148:Core/Src/syscalls.c **** int _stat(char *file, struct stat *st) + 149:Core/Src/syscalls.c **** { + 486 .loc 1 149 1 is_stmt 1 view -0 + 487 .cfi_startproc + 488 @ args = 0, pretend = 0, frame = 0 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 @ link register save eliminated. + 150:Core/Src/syscalls.c **** (void)file; + 491 .loc 1 150 3 view .LVU102 + 151:Core/Src/syscalls.c **** st->st_mode = S_IFCHR; + 492 .loc 1 151 3 view .LVU103 + 493 .loc 1 151 15 is_stmt 0 view .LVU104 + 494 0000 4FF40053 mov r3, #8192 + 495 0004 4B60 str r3, [r1, #4] + 152:Core/Src/syscalls.c **** return 0; + 496 .loc 1 152 3 is_stmt 1 view .LVU105 + 153:Core/Src/syscalls.c **** } + 497 .loc 1 153 1 is_stmt 0 view .LVU106 + 498 0006 0020 movs r0, #0 + 499 .LVL35: + ARM GAS /tmp/cc0T5371.s page 12 + + + 500 .loc 1 153 1 view .LVU107 + 501 0008 7047 bx lr + 502 .cfi_endproc + 503 .LFE39: + 505 .section .text._link,"ax",%progbits + 506 .align 1 + 507 .global _link + 508 .syntax unified + 509 .thumb + 510 .thumb_func + 512 _link: + 513 .LVL36: + 514 .LFB40: + 154:Core/Src/syscalls.c **** + 155:Core/Src/syscalls.c **** int _link(char *old, char *new) + 156:Core/Src/syscalls.c **** { + 515 .loc 1 156 1 is_stmt 1 view -0 + 516 .cfi_startproc + 517 @ args = 0, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 .loc 1 156 1 is_stmt 0 view .LVU109 + 520 0000 08B5 push {r3, lr} + 521 .cfi_def_cfa_offset 8 + 522 .cfi_offset 3, -8 + 523 .cfi_offset 14, -4 + 157:Core/Src/syscalls.c **** (void)old; + 524 .loc 1 157 3 is_stmt 1 view .LVU110 + 158:Core/Src/syscalls.c **** (void)new; + 525 .loc 1 158 3 view .LVU111 + 159:Core/Src/syscalls.c **** errno = EMLINK; + 526 .loc 1 159 3 view .LVU112 + 527 0002 FFF7FEFF bl __errno + 528 .LVL37: + 529 .loc 1 159 9 is_stmt 0 discriminator 1 view .LVU113 + 530 0006 1F23 movs r3, #31 + 531 0008 0360 str r3, [r0] + 160:Core/Src/syscalls.c **** return -1; + 532 .loc 1 160 3 is_stmt 1 view .LVU114 + 161:Core/Src/syscalls.c **** } + 533 .loc 1 161 1 is_stmt 0 view .LVU115 + 534 000a 4FF0FF30 mov r0, #-1 + 535 000e 08BD pop {r3, pc} + 536 .cfi_endproc + 537 .LFE40: + 539 .section .text._fork,"ax",%progbits + 540 .align 1 + 541 .global _fork + 542 .syntax unified + 543 .thumb + 544 .thumb_func + 546 _fork: + 547 .LFB41: + 162:Core/Src/syscalls.c **** + 163:Core/Src/syscalls.c **** int _fork(void) + 164:Core/Src/syscalls.c **** { + 548 .loc 1 164 1 is_stmt 1 view -0 + 549 .cfi_startproc + ARM GAS /tmp/cc0T5371.s page 13 + + + 550 @ args = 0, pretend = 0, frame = 0 + 551 @ frame_needed = 0, uses_anonymous_args = 0 + 552 0000 08B5 push {r3, lr} + 553 .cfi_def_cfa_offset 8 + 554 .cfi_offset 3, -8 + 555 .cfi_offset 14, -4 + 165:Core/Src/syscalls.c **** errno = EAGAIN; + 556 .loc 1 165 3 view .LVU117 + 557 0002 FFF7FEFF bl __errno + 558 .LVL38: + 559 .loc 1 165 9 is_stmt 0 discriminator 1 view .LVU118 + 560 0006 0B23 movs r3, #11 + 561 0008 0360 str r3, [r0] + 166:Core/Src/syscalls.c **** return -1; + 562 .loc 1 166 3 is_stmt 1 view .LVU119 + 167:Core/Src/syscalls.c **** } + 563 .loc 1 167 1 is_stmt 0 view .LVU120 + 564 000a 4FF0FF30 mov r0, #-1 + 565 000e 08BD pop {r3, pc} + 566 .cfi_endproc + 567 .LFE41: + 569 .section .text._execve,"ax",%progbits + 570 .align 1 + 571 .global _execve + 572 .syntax unified + 573 .thumb + 574 .thumb_func + 576 _execve: + 577 .LVL39: + 578 .LFB42: + 168:Core/Src/syscalls.c **** + 169:Core/Src/syscalls.c **** int _execve(char *name, char **argv, char **env) + 170:Core/Src/syscalls.c **** { + 579 .loc 1 170 1 is_stmt 1 view -0 + 580 .cfi_startproc + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 .loc 1 170 1 is_stmt 0 view .LVU122 + 584 0000 08B5 push {r3, lr} + 585 .cfi_def_cfa_offset 8 + 586 .cfi_offset 3, -8 + 587 .cfi_offset 14, -4 + 171:Core/Src/syscalls.c **** (void)name; + 588 .loc 1 171 3 is_stmt 1 view .LVU123 + 172:Core/Src/syscalls.c **** (void)argv; + 589 .loc 1 172 3 view .LVU124 + 173:Core/Src/syscalls.c **** (void)env; + 590 .loc 1 173 3 view .LVU125 + 174:Core/Src/syscalls.c **** errno = ENOMEM; + 591 .loc 1 174 3 view .LVU126 + 592 0002 FFF7FEFF bl __errno + 593 .LVL40: + 594 .loc 1 174 9 is_stmt 0 discriminator 1 view .LVU127 + 595 0006 0C23 movs r3, #12 + 596 0008 0360 str r3, [r0] + 175:Core/Src/syscalls.c **** return -1; + 597 .loc 1 175 3 is_stmt 1 view .LVU128 + ARM GAS /tmp/cc0T5371.s page 14 + + + 176:Core/Src/syscalls.c **** } + 598 .loc 1 176 1 is_stmt 0 view .LVU129 + 599 000a 4FF0FF30 mov r0, #-1 + 600 000e 08BD pop {r3, pc} + 601 .cfi_endproc + 602 .LFE42: + 604 .global environ + 605 .section .data.environ,"aw" + 606 .align 2 + 609 environ: + 610 0000 00000000 .word __env + 611 .global __env + 612 .section .bss.__env,"aw",%nobits + 613 .align 2 + 616 __env: + 617 0000 00000000 .space 4 + 618 .weak __io_putchar + 619 .weak __io_getchar + 620 .text + 621 .Letext0: + 622 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 623 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 624 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 625 .file 5 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 626 .file 6 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 627 .file 7 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 628 .file 8 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 629 .file 9 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + ARM GAS /tmp/cc0T5371.s page 15 + + +DEFINED SYMBOLS + *ABS*:00000000 syscalls.c + /tmp/cc0T5371.s:21 .text.initialise_monitor_handles:00000000 $t + /tmp/cc0T5371.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles + /tmp/cc0T5371.s:40 .text._getpid:00000000 $t + /tmp/cc0T5371.s:46 .text._getpid:00000000 _getpid + /tmp/cc0T5371.s:61 .text._kill:00000000 $t + /tmp/cc0T5371.s:67 .text._kill:00000000 _kill + /tmp/cc0T5371.s:95 .text._exit:00000000 $t + /tmp/cc0T5371.s:101 .text._exit:00000000 _exit + /tmp/cc0T5371.s:127 .text._read:00000000 $t + /tmp/cc0T5371.s:133 .text._read:00000000 _read + /tmp/cc0T5371.s:188 .text._write:00000000 $t + /tmp/cc0T5371.s:194 .text._write:00000000 _write + /tmp/cc0T5371.s:243 .text._close:00000000 $t + /tmp/cc0T5371.s:249 .text._close:00000000 _close + /tmp/cc0T5371.s:268 .text._fstat:00000000 $t + /tmp/cc0T5371.s:274 .text._fstat:00000000 _fstat + /tmp/cc0T5371.s:297 .text._isatty:00000000 $t + /tmp/cc0T5371.s:303 .text._isatty:00000000 _isatty + /tmp/cc0T5371.s:322 .text._lseek:00000000 $t + /tmp/cc0T5371.s:328 .text._lseek:00000000 _lseek + /tmp/cc0T5371.s:349 .text._open:00000000 $t + /tmp/cc0T5371.s:355 .text._open:00000000 _open + /tmp/cc0T5371.s:386 .text._wait:00000000 $t + /tmp/cc0T5371.s:392 .text._wait:00000000 _wait + /tmp/cc0T5371.s:419 .text._unlink:00000000 $t + /tmp/cc0T5371.s:425 .text._unlink:00000000 _unlink + /tmp/cc0T5371.s:452 .text._times:00000000 $t + /tmp/cc0T5371.s:458 .text._times:00000000 _times + /tmp/cc0T5371.s:477 .text._stat:00000000 $t + /tmp/cc0T5371.s:483 .text._stat:00000000 _stat + /tmp/cc0T5371.s:506 .text._link:00000000 $t + /tmp/cc0T5371.s:512 .text._link:00000000 _link + /tmp/cc0T5371.s:540 .text._fork:00000000 $t + /tmp/cc0T5371.s:546 .text._fork:00000000 _fork + /tmp/cc0T5371.s:570 .text._execve:00000000 $t + /tmp/cc0T5371.s:576 .text._execve:00000000 _execve + /tmp/cc0T5371.s:609 .data.environ:00000000 environ + /tmp/cc0T5371.s:606 .data.environ:00000000 $d + /tmp/cc0T5371.s:616 .bss.__env:00000000 __env + /tmp/cc0T5371.s:613 .bss.__env:00000000 $d + +UNDEFINED SYMBOLS +__errno +__io_getchar +__io_putchar diff --git a/build/syscalls.o b/build/syscalls.o new file mode 100644 index 0000000..d3efdc0 Binary files /dev/null and b/build/syscalls.o differ diff --git a/build/sysmem.d b/build/sysmem.d new file mode 100644 index 0000000..5d0bd84 --- /dev/null +++ b/build/sysmem.d @@ -0,0 +1 @@ +build/sysmem.o: Core/Src/sysmem.c diff --git a/build/sysmem.lst b/build/sysmem.lst new file mode 100644 index 0000000..895acba --- /dev/null +++ b/build/sysmem.lst @@ -0,0 +1,232 @@ +ARM GAS /tmp/ccAdIMir.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "sysmem.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/sysmem.c" + 20 .section .text._sbrk,"ax",%progbits + 21 .align 1 + 22 .global _sbrk + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 _sbrk: + 28 .LVL0: + 29 .LFB0: + 1:Core/Src/sysmem.c **** /** + 2:Core/Src/sysmem.c **** ****************************************************************************** + 3:Core/Src/sysmem.c **** * @file sysmem.c + 4:Core/Src/sysmem.c **** * @author Generated by STM32CubeMX + 5:Core/Src/sysmem.c **** * @brief System Memory calls file + 6:Core/Src/sysmem.c **** * + 7:Core/Src/sysmem.c **** * For more information about which C functions + 8:Core/Src/sysmem.c **** * need which of these lowlevel functions + 9:Core/Src/sysmem.c **** * please consult the newlib libc manual + 10:Core/Src/sysmem.c **** ****************************************************************************** + 11:Core/Src/sysmem.c **** * @attention + 12:Core/Src/sysmem.c **** * + 13:Core/Src/sysmem.c **** * Copyright (c) 2024 STMicroelectronics. + 14:Core/Src/sysmem.c **** * All rights reserved. + 15:Core/Src/sysmem.c **** * + 16:Core/Src/sysmem.c **** * This software is licensed under terms that can be found in the LICENSE file + 17:Core/Src/sysmem.c **** * in the root directory of this software component. + 18:Core/Src/sysmem.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Core/Src/sysmem.c **** * + 20:Core/Src/sysmem.c **** ****************************************************************************** + 21:Core/Src/sysmem.c **** */ + 22:Core/Src/sysmem.c **** + 23:Core/Src/sysmem.c **** /* Includes */ + 24:Core/Src/sysmem.c **** #include + 25:Core/Src/sysmem.c **** #include + 26:Core/Src/sysmem.c **** + 27:Core/Src/sysmem.c **** /** + 28:Core/Src/sysmem.c **** * Pointer to the current high watermark of the heap usage + 29:Core/Src/sysmem.c **** */ + ARM GAS /tmp/ccAdIMir.s page 2 + + + 30:Core/Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL; + 31:Core/Src/sysmem.c **** + 32:Core/Src/sysmem.c **** /** + 33:Core/Src/sysmem.c **** * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + 34:Core/Src/sysmem.c **** * and others from the C library + 35:Core/Src/sysmem.c **** * + 36:Core/Src/sysmem.c **** * @verbatim + 37:Core/Src/sysmem.c **** * ############################################################################ + 38:Core/Src/sysmem.c **** * # .data # .bss # newlib heap # MSP stack # + 39:Core/Src/sysmem.c **** * # # # # Reserved by _Min_Stack_Size # + 40:Core/Src/sysmem.c **** * ############################################################################ + 41:Core/Src/sysmem.c **** * ^-- RAM start ^-- _end _estack, RAM end --^ + 42:Core/Src/sysmem.c **** * @endverbatim + 43:Core/Src/sysmem.c **** * + 44:Core/Src/sysmem.c **** * This implementation starts allocating at the '_end' linker symbol + 45:Core/Src/sysmem.c **** * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + 46:Core/Src/sysmem.c **** * The implementation considers '_estack' linker symbol to be RAM end + 47:Core/Src/sysmem.c **** * NOTE: If the MSP stack, at any point during execution, grows larger than the + 48:Core/Src/sysmem.c **** * reserved size, please increase the '_Min_Stack_Size'. + 49:Core/Src/sysmem.c **** * + 50:Core/Src/sysmem.c **** * @param incr Memory size + 51:Core/Src/sysmem.c **** * @return Pointer to allocated memory + 52:Core/Src/sysmem.c **** */ + 53:Core/Src/sysmem.c **** void *_sbrk(ptrdiff_t incr) + 54:Core/Src/sysmem.c **** { + 30 .loc 1 54 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 .loc 1 54 1 is_stmt 0 view .LVU1 + 35 0000 10B5 push {r4, lr} + 36 .cfi_def_cfa_offset 8 + 37 .cfi_offset 4, -8 + 38 .cfi_offset 14, -4 + 39 0002 0346 mov r3, r0 + 55:Core/Src/sysmem.c **** extern uint8_t _end; /* Symbol defined in the linker script */ + 40 .loc 1 55 3 is_stmt 1 view .LVU2 + 56:Core/Src/sysmem.c **** extern uint8_t _estack; /* Symbol defined in the linker script */ + 41 .loc 1 56 3 view .LVU3 + 57:Core/Src/sysmem.c **** extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + 42 .loc 1 57 3 view .LVU4 + 58:Core/Src/sysmem.c **** const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + 43 .loc 1 58 3 view .LVU5 + 44 .LVL1: + 59:Core/Src/sysmem.c **** const uint8_t *max_heap = (uint8_t *)stack_limit; + 45 .loc 1 59 3 view .LVU6 + 58:Core/Src/sysmem.c **** const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + 46 .loc 1 58 51 is_stmt 0 view .LVU7 + 47 0004 0C4A ldr r2, .L8 + 48 0006 0D49 ldr r1, .L8+4 + 49 .LVL2: + 60:Core/Src/sysmem.c **** uint8_t *prev_heap_end; + 50 .loc 1 60 3 is_stmt 1 view .LVU8 + 61:Core/Src/sysmem.c **** + 62:Core/Src/sysmem.c **** /* Initialize heap end at first call */ + 63:Core/Src/sysmem.c **** if (NULL == __sbrk_heap_end) + 51 .loc 1 63 3 view .LVU9 + ARM GAS /tmp/ccAdIMir.s page 3 + + + 52 .loc 1 63 12 is_stmt 0 view .LVU10 + 53 0008 0D48 ldr r0, .L8+8 + 54 .LVL3: + 55 .loc 1 63 12 view .LVU11 + 56 000a 0068 ldr r0, [r0] + 57 .loc 1 63 6 view .LVU12 + 58 000c 40B1 cbz r0, .L6 + 59 .L2: + 64:Core/Src/sysmem.c **** { + 65:Core/Src/sysmem.c **** __sbrk_heap_end = &_end; + 66:Core/Src/sysmem.c **** } + 67:Core/Src/sysmem.c **** + 68:Core/Src/sysmem.c **** /* Protect heap from growing into the reserved MSP stack */ + 69:Core/Src/sysmem.c **** if (__sbrk_heap_end + incr > max_heap) + 60 .loc 1 69 3 is_stmt 1 view .LVU13 + 61 .loc 1 69 23 is_stmt 0 view .LVU14 + 62 000e 0C48 ldr r0, .L8+8 + 63 0010 0068 ldr r0, [r0] + 64 0012 0344 add r3, r3, r0 + 65 .LVL4: + 66 .loc 1 69 6 view .LVU15 + 67 0014 521A subs r2, r2, r1 + 68 0016 9342 cmp r3, r2 + 69 0018 06D8 bhi .L7 + 70:Core/Src/sysmem.c **** { + 71:Core/Src/sysmem.c **** errno = ENOMEM; + 72:Core/Src/sysmem.c **** return (void *)-1; + 73:Core/Src/sysmem.c **** } + 74:Core/Src/sysmem.c **** + 75:Core/Src/sysmem.c **** prev_heap_end = __sbrk_heap_end; + 70 .loc 1 75 3 is_stmt 1 view .LVU16 + 71 .LVL5: + 76:Core/Src/sysmem.c **** __sbrk_heap_end += incr; + 72 .loc 1 76 3 view .LVU17 + 73 .loc 1 76 19 is_stmt 0 view .LVU18 + 74 001a 094A ldr r2, .L8+8 + 75 001c 1360 str r3, [r2] + 77:Core/Src/sysmem.c **** + 78:Core/Src/sysmem.c **** return (void *)prev_heap_end; + 76 .loc 1 78 3 is_stmt 1 view .LVU19 + 77 .LVL6: + 78 .L1: + 79:Core/Src/sysmem.c **** } + 79 .loc 1 79 1 is_stmt 0 view .LVU20 + 80 001e 10BD pop {r4, pc} + 81 .LVL7: + 82 .L6: + 65:Core/Src/sysmem.c **** } + 83 .loc 1 65 5 is_stmt 1 view .LVU21 + 65:Core/Src/sysmem.c **** } + 84 .loc 1 65 21 is_stmt 0 view .LVU22 + 85 0020 0748 ldr r0, .L8+8 + 86 0022 084C ldr r4, .L8+12 + 87 0024 0460 str r4, [r0] + 88 0026 F2E7 b .L2 + 89 .LVL8: + 90 .L7: + ARM GAS /tmp/ccAdIMir.s page 4 + + + 71:Core/Src/sysmem.c **** return (void *)-1; + 91 .loc 1 71 5 is_stmt 1 view .LVU23 + 92 0028 FFF7FEFF bl __errno + 93 .LVL9: + 71:Core/Src/sysmem.c **** return (void *)-1; + 94 .loc 1 71 11 is_stmt 0 discriminator 1 view .LVU24 + 95 002c 0C23 movs r3, #12 + 96 002e 0360 str r3, [r0] + 72:Core/Src/sysmem.c **** } + 97 .loc 1 72 5 is_stmt 1 view .LVU25 + 72:Core/Src/sysmem.c **** } + 98 .loc 1 72 12 is_stmt 0 view .LVU26 + 99 0030 4FF0FF30 mov r0, #-1 + 100 0034 F3E7 b .L1 + 101 .L9: + 102 0036 00BF .align 2 + 103 .L8: + 104 0038 00000000 .word _estack + 105 003c 00000000 .word _Min_Stack_Size + 106 0040 00000000 .word __sbrk_heap_end + 107 0044 00000000 .word _end + 108 .cfi_endproc + 109 .LFE0: + 111 .section .bss.__sbrk_heap_end,"aw",%nobits + 112 .align 2 + 115 __sbrk_heap_end: + 116 0000 00000000 .space 4 + 117 .text + 118 .Letext0: + 119 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 120 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 121 .file 4 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 122 .file 5 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + ARM GAS /tmp/ccAdIMir.s page 5 + + +DEFINED SYMBOLS + *ABS*:00000000 sysmem.c + /tmp/ccAdIMir.s:21 .text._sbrk:00000000 $t + /tmp/ccAdIMir.s:27 .text._sbrk:00000000 _sbrk + /tmp/ccAdIMir.s:104 .text._sbrk:00000038 $d + /tmp/ccAdIMir.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end + /tmp/ccAdIMir.s:112 .bss.__sbrk_heap_end:00000000 $d + +UNDEFINED SYMBOLS +__errno +_estack +_Min_Stack_Size +_end diff --git a/build/sysmem.o b/build/sysmem.o new file mode 100644 index 0000000..e6dcbca Binary files /dev/null and b/build/sysmem.o differ diff --git a/build/system_stm32f3xx.d b/build/system_stm32f3xx.d new file mode 100644 index 0000000..d24bb41 --- /dev/null +++ b/build/system_stm32f3xx.d @@ -0,0 +1,65 @@ +build/system_stm32f3xx.o: Core/Src/system_stm32f3xx.c \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h: diff --git a/build/system_stm32f3xx.lst b/build/system_stm32f3xx.lst new file mode 100644 index 0000000..82210a2 --- /dev/null +++ b/build/system_stm32f3xx.lst @@ -0,0 +1,574 @@ +ARM GAS /tmp/ccZxkiP3.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "system_stm32f3xx.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/system_stm32f3xx.c" + 20 .section .text.SystemInit,"ax",%progbits + 21 .align 1 + 22 .global SystemInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 SystemInit: + 28 .LFB130: + 1:Core/Src/system_stm32f3xx.c **** /** + 2:Core/Src/system_stm32f3xx.c **** ****************************************************************************** + 3:Core/Src/system_stm32f3xx.c **** * @file system_stm32f3xx.c + 4:Core/Src/system_stm32f3xx.c **** * @author MCD Application Team + 5:Core/Src/system_stm32f3xx.c **** * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + 6:Core/Src/system_stm32f3xx.c **** * + 7:Core/Src/system_stm32f3xx.c **** * 1. This file provides two functions and one global variable to be called from + 8:Core/Src/system_stm32f3xx.c **** * user application: + 9:Core/Src/system_stm32f3xx.c **** * - SystemInit(): This function is called at startup just after reset and + 10:Core/Src/system_stm32f3xx.c **** * before branch to main program. This call is made inside + 11:Core/Src/system_stm32f3xx.c **** * the "startup_stm32f3xx.s" file. + 12:Core/Src/system_stm32f3xx.c **** * + 13:Core/Src/system_stm32f3xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + 14:Core/Src/system_stm32f3xx.c **** * by the user application to setup the SysTick + 15:Core/Src/system_stm32f3xx.c **** * timer or configure other parameters. + 16:Core/Src/system_stm32f3xx.c **** * + 17:Core/Src/system_stm32f3xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + 18:Core/Src/system_stm32f3xx.c **** * be called whenever the core clock is changed + 19:Core/Src/system_stm32f3xx.c **** * during program execution. + 20:Core/Src/system_stm32f3xx.c **** * + 21:Core/Src/system_stm32f3xx.c **** * 2. After each device reset the HSI (8 MHz) is used as system clock source. + 22:Core/Src/system_stm32f3xx.c **** * Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to + 23:Core/Src/system_stm32f3xx.c **** * configure the system clock before to branch to main program. + 24:Core/Src/system_stm32f3xx.c **** * + 25:Core/Src/system_stm32f3xx.c **** * 3. This file configures the system clock as follows: + 26:Core/Src/system_stm32f3xx.c **** *============================================================================= + 27:Core/Src/system_stm32f3xx.c **** * Supported STM32F3xx device + 28:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 29:Core/Src/system_stm32f3xx.c **** * System Clock source | HSI + 30:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + ARM GAS /tmp/ccZxkiP3.s page 2 + + + 31:Core/Src/system_stm32f3xx.c **** * SYSCLK(Hz) | 8000000 + 32:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 33:Core/Src/system_stm32f3xx.c **** * HCLK(Hz) | 8000000 + 34:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 35:Core/Src/system_stm32f3xx.c **** * AHB Prescaler | 1 + 36:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 37:Core/Src/system_stm32f3xx.c **** * APB2 Prescaler | 1 + 38:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 39:Core/Src/system_stm32f3xx.c **** * APB1 Prescaler | 1 + 40:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 41:Core/Src/system_stm32f3xx.c **** * USB Clock | DISABLE + 42:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 43:Core/Src/system_stm32f3xx.c **** *============================================================================= + 44:Core/Src/system_stm32f3xx.c **** ****************************************************************************** + 45:Core/Src/system_stm32f3xx.c **** * @attention + 46:Core/Src/system_stm32f3xx.c **** * + 47:Core/Src/system_stm32f3xx.c **** * Copyright (c) 2016 STMicroelectronics. + 48:Core/Src/system_stm32f3xx.c **** * All rights reserved. + 49:Core/Src/system_stm32f3xx.c **** * + 50:Core/Src/system_stm32f3xx.c **** * This software is licensed under terms that can be found in the LICENSE file + 51:Core/Src/system_stm32f3xx.c **** * in the root directory of this software component. + 52:Core/Src/system_stm32f3xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 53:Core/Src/system_stm32f3xx.c **** * + 54:Core/Src/system_stm32f3xx.c **** ****************************************************************************** + 55:Core/Src/system_stm32f3xx.c **** */ + 56:Core/Src/system_stm32f3xx.c **** + 57:Core/Src/system_stm32f3xx.c **** /** @addtogroup CMSIS + 58:Core/Src/system_stm32f3xx.c **** * @{ + 59:Core/Src/system_stm32f3xx.c **** */ + 60:Core/Src/system_stm32f3xx.c **** + 61:Core/Src/system_stm32f3xx.c **** /** @addtogroup stm32f3xx_system + 62:Core/Src/system_stm32f3xx.c **** * @{ + 63:Core/Src/system_stm32f3xx.c **** */ + 64:Core/Src/system_stm32f3xx.c **** + 65:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Includes + 66:Core/Src/system_stm32f3xx.c **** * @{ + 67:Core/Src/system_stm32f3xx.c **** */ + 68:Core/Src/system_stm32f3xx.c **** + 69:Core/Src/system_stm32f3xx.c **** #include "stm32f3xx.h" + 70:Core/Src/system_stm32f3xx.c **** + 71:Core/Src/system_stm32f3xx.c **** /** + 72:Core/Src/system_stm32f3xx.c **** * @} + 73:Core/Src/system_stm32f3xx.c **** */ + 74:Core/Src/system_stm32f3xx.c **** + 75:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_TypesDefinitions + 76:Core/Src/system_stm32f3xx.c **** * @{ + 77:Core/Src/system_stm32f3xx.c **** */ + 78:Core/Src/system_stm32f3xx.c **** + 79:Core/Src/system_stm32f3xx.c **** /** + 80:Core/Src/system_stm32f3xx.c **** * @} + 81:Core/Src/system_stm32f3xx.c **** */ + 82:Core/Src/system_stm32f3xx.c **** + 83:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Defines + 84:Core/Src/system_stm32f3xx.c **** * @{ + 85:Core/Src/system_stm32f3xx.c **** */ + 86:Core/Src/system_stm32f3xx.c **** #if !defined (HSE_VALUE) + 87:Core/Src/system_stm32f3xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. + ARM GAS /tmp/ccZxkiP3.s page 3 + + + 88:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user + 89:Core/Src/system_stm32f3xx.c **** #endif /* HSE_VALUE */ + 90:Core/Src/system_stm32f3xx.c **** + 91:Core/Src/system_stm32f3xx.c **** #if !defined (HSI_VALUE) + 92:Core/Src/system_stm32f3xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. + 93:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user + 94:Core/Src/system_stm32f3xx.c **** #endif /* HSI_VALUE */ + 95:Core/Src/system_stm32f3xx.c **** + 96:Core/Src/system_stm32f3xx.c **** /* Note: Following vector table addresses must be defined in line with linker + 97:Core/Src/system_stm32f3xx.c **** configuration. */ + 98:Core/Src/system_stm32f3xx.c **** /*!< Uncomment the following line if you need to relocate the vector table + 99:Core/Src/system_stm32f3xx.c **** anywhere in Flash or Sram, else the vector table is kept at the automatic + 100:Core/Src/system_stm32f3xx.c **** remap of boot address selected */ + 101:Core/Src/system_stm32f3xx.c **** /* #define USER_VECT_TAB_ADDRESS */ + 102:Core/Src/system_stm32f3xx.c **** + 103:Core/Src/system_stm32f3xx.c **** #if defined(USER_VECT_TAB_ADDRESS) + 104:Core/Src/system_stm32f3xx.c **** /*!< Uncomment the following line if you need to relocate your vector Table + 105:Core/Src/system_stm32f3xx.c **** in Sram else user remap will be done in Flash. */ + 106:Core/Src/system_stm32f3xx.c **** /* #define VECT_TAB_SRAM */ + 107:Core/Src/system_stm32f3xx.c **** #if defined(VECT_TAB_SRAM) + 108:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. + 109:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 110:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + 111:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 112:Core/Src/system_stm32f3xx.c **** #else + 113:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. + 114:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 115:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + 116:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 117:Core/Src/system_stm32f3xx.c **** #endif /* VECT_TAB_SRAM */ + 118:Core/Src/system_stm32f3xx.c **** #endif /* USER_VECT_TAB_ADDRESS */ + 119:Core/Src/system_stm32f3xx.c **** + 120:Core/Src/system_stm32f3xx.c **** /******************************************************************************/ + 121:Core/Src/system_stm32f3xx.c **** /** + 122:Core/Src/system_stm32f3xx.c **** * @} + 123:Core/Src/system_stm32f3xx.c **** */ + 124:Core/Src/system_stm32f3xx.c **** + 125:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Macros + 126:Core/Src/system_stm32f3xx.c **** * @{ + 127:Core/Src/system_stm32f3xx.c **** */ + 128:Core/Src/system_stm32f3xx.c **** + 129:Core/Src/system_stm32f3xx.c **** /** + 130:Core/Src/system_stm32f3xx.c **** * @} + 131:Core/Src/system_stm32f3xx.c **** */ + 132:Core/Src/system_stm32f3xx.c **** + 133:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Variables + 134:Core/Src/system_stm32f3xx.c **** * @{ + 135:Core/Src/system_stm32f3xx.c **** */ + 136:Core/Src/system_stm32f3xx.c **** /* This variable is updated in three ways: + 137:Core/Src/system_stm32f3xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate() + 138:Core/Src/system_stm32f3xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 139:Core/Src/system_stm32f3xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 140:Core/Src/system_stm32f3xx.c **** Note: If you use this function to configure the system clock there is no need to + 141:Core/Src/system_stm32f3xx.c **** call the 2 first functions listed above, since SystemCoreClock variable is + 142:Core/Src/system_stm32f3xx.c **** updated automatically. + 143:Core/Src/system_stm32f3xx.c **** */ + 144:Core/Src/system_stm32f3xx.c **** uint32_t SystemCoreClock = 8000000; + ARM GAS /tmp/ccZxkiP3.s page 4 + + + 145:Core/Src/system_stm32f3xx.c **** + 146:Core/Src/system_stm32f3xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + 147:Core/Src/system_stm32f3xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + 148:Core/Src/system_stm32f3xx.c **** + 149:Core/Src/system_stm32f3xx.c **** /** + 150:Core/Src/system_stm32f3xx.c **** * @} + 151:Core/Src/system_stm32f3xx.c **** */ + 152:Core/Src/system_stm32f3xx.c **** + 153:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_FunctionPrototypes + 154:Core/Src/system_stm32f3xx.c **** * @{ + 155:Core/Src/system_stm32f3xx.c **** */ + 156:Core/Src/system_stm32f3xx.c **** + 157:Core/Src/system_stm32f3xx.c **** /** + 158:Core/Src/system_stm32f3xx.c **** * @} + 159:Core/Src/system_stm32f3xx.c **** */ + 160:Core/Src/system_stm32f3xx.c **** + 161:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Functions + 162:Core/Src/system_stm32f3xx.c **** * @{ + 163:Core/Src/system_stm32f3xx.c **** */ + 164:Core/Src/system_stm32f3xx.c **** + 165:Core/Src/system_stm32f3xx.c **** /** + 166:Core/Src/system_stm32f3xx.c **** * @brief Setup the microcontroller system + 167:Core/Src/system_stm32f3xx.c **** * @param None + 168:Core/Src/system_stm32f3xx.c **** * @retval None + 169:Core/Src/system_stm32f3xx.c **** */ + 170:Core/Src/system_stm32f3xx.c **** void SystemInit(void) + 171:Core/Src/system_stm32f3xx.c **** { + 29 .loc 1 171 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 172:Core/Src/system_stm32f3xx.c **** /* FPU settings --------------------------------------------------------------*/ + 173:Core/Src/system_stm32f3xx.c **** #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + 174:Core/Src/system_stm32f3xx.c **** SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + 34 .loc 1 174 3 view .LVU1 + 35 .loc 1 174 6 is_stmt 0 view .LVU2 + 36 0000 034A ldr r2, .L2 + 37 0002 D2F88830 ldr r3, [r2, #136] + 38 .loc 1 174 14 view .LVU3 + 39 0006 43F47003 orr r3, r3, #15728640 + 40 000a C2F88830 str r3, [r2, #136] + 175:Core/Src/system_stm32f3xx.c **** #endif + 176:Core/Src/system_stm32f3xx.c **** + 177:Core/Src/system_stm32f3xx.c **** /* Configure the Vector Table location -------------------------------------*/ + 178:Core/Src/system_stm32f3xx.c **** #if defined(USER_VECT_TAB_ADDRESS) + 179:Core/Src/system_stm32f3xx.c **** SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM + 180:Core/Src/system_stm32f3xx.c **** #endif /* USER_VECT_TAB_ADDRESS */ + 181:Core/Src/system_stm32f3xx.c **** } + 41 .loc 1 181 1 view .LVU4 + 42 000e 7047 bx lr + 43 .L3: + 44 .align 2 + 45 .L2: + 46 0010 00ED00E0 .word -536810240 + 47 .cfi_endproc + 48 .LFE130: + ARM GAS /tmp/ccZxkiP3.s page 5 + + + 50 .section .text.SystemCoreClockUpdate,"ax",%progbits + 51 .align 1 + 52 .global SystemCoreClockUpdate + 53 .syntax unified + 54 .thumb + 55 .thumb_func + 57 SystemCoreClockUpdate: + 58 .LFB131: + 182:Core/Src/system_stm32f3xx.c **** + 183:Core/Src/system_stm32f3xx.c **** /** + 184:Core/Src/system_stm32f3xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values. + 185:Core/Src/system_stm32f3xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can + 186:Core/Src/system_stm32f3xx.c **** * be used by the user application to setup the SysTick timer or configure + 187:Core/Src/system_stm32f3xx.c **** * other parameters. + 188:Core/Src/system_stm32f3xx.c **** * + 189:Core/Src/system_stm32f3xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called + 190:Core/Src/system_stm32f3xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration + 191:Core/Src/system_stm32f3xx.c **** * based on this variable will be incorrect. + 192:Core/Src/system_stm32f3xx.c **** * + 193:Core/Src/system_stm32f3xx.c **** * @note - The system frequency computed by this function is not the real + 194:Core/Src/system_stm32f3xx.c **** * frequency in the chip. It is calculated based on the predefined + 195:Core/Src/system_stm32f3xx.c **** * constant and the selected clock source: + 196:Core/Src/system_stm32f3xx.c **** * + 197:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + 198:Core/Src/system_stm32f3xx.c **** * + 199:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + 200:Core/Src/system_stm32f3xx.c **** * + 201:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + 202:Core/Src/system_stm32f3xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. + 203:Core/Src/system_stm32f3xx.c **** * + 204:Core/Src/system_stm32f3xx.c **** * (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value + 205:Core/Src/system_stm32f3xx.c **** * 8 MHz) but the real value may vary depending on the variations + 206:Core/Src/system_stm32f3xx.c **** * in voltage and temperature. + 207:Core/Src/system_stm32f3xx.c **** * + 208:Core/Src/system_stm32f3xx.c **** * (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value + 209:Core/Src/system_stm32f3xx.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real + 210:Core/Src/system_stm32f3xx.c **** * frequency of the crystal used. Otherwise, this function may + 211:Core/Src/system_stm32f3xx.c **** * have wrong result. + 212:Core/Src/system_stm32f3xx.c **** * + 213:Core/Src/system_stm32f3xx.c **** * - The result of this function could be not correct when using fractional + 214:Core/Src/system_stm32f3xx.c **** * value for HSE crystal. + 215:Core/Src/system_stm32f3xx.c **** * + 216:Core/Src/system_stm32f3xx.c **** * @param None + 217:Core/Src/system_stm32f3xx.c **** * @retval None + 218:Core/Src/system_stm32f3xx.c **** */ + 219:Core/Src/system_stm32f3xx.c **** void SystemCoreClockUpdate (void) + 220:Core/Src/system_stm32f3xx.c **** { + 59 .loc 1 220 1 is_stmt 1 view -0 + 60 .cfi_startproc + 61 @ args = 0, pretend = 0, frame = 0 + 62 @ frame_needed = 0, uses_anonymous_args = 0 + 63 @ link register save eliminated. + 221:Core/Src/system_stm32f3xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; + 64 .loc 1 221 3 view .LVU6 + 65 .LVL0: + 222:Core/Src/system_stm32f3xx.c **** + 223:Core/Src/system_stm32f3xx.c **** /* Get SYSCLK source -------------------------------------------------------*/ + ARM GAS /tmp/ccZxkiP3.s page 6 + + + 224:Core/Src/system_stm32f3xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS; + 66 .loc 1 224 3 view .LVU7 + 67 .loc 1 224 12 is_stmt 0 view .LVU8 + 68 0000 1D4B ldr r3, .L10 + 69 0002 5B68 ldr r3, [r3, #4] + 70 .loc 1 224 7 view .LVU9 + 71 0004 03F00C03 and r3, r3, #12 + 72 .LVL1: + 225:Core/Src/system_stm32f3xx.c **** + 226:Core/Src/system_stm32f3xx.c **** switch (tmp) + 73 .loc 1 226 3 is_stmt 1 view .LVU10 + 74 0008 042B cmp r3, #4 + 75 000a 11D0 beq .L5 + 76 000c 082B cmp r3, #8 + 77 000e 13D0 beq .L6 + 78 0010 002B cmp r3, #0 + 79 0012 2DD1 bne .L7 + 227:Core/Src/system_stm32f3xx.c **** { + 228:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ + 229:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSI_VALUE; + 80 .loc 1 229 7 view .LVU11 + 81 .loc 1 229 23 is_stmt 0 view .LVU12 + 82 0014 194B ldr r3, .L10+4 + 83 .LVL2: + 84 .loc 1 229 23 view .LVU13 + 85 0016 1A4A ldr r2, .L10+8 + 86 0018 1A60 str r2, [r3] + 230:Core/Src/system_stm32f3xx.c **** break; + 87 .loc 1 230 7 is_stmt 1 view .LVU14 + 88 .LVL3: + 89 .L8: + 231:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ + 232:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSE_VALUE; + 233:Core/Src/system_stm32f3xx.c **** break; + 234:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 235:Core/Src/system_stm32f3xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 236:Core/Src/system_stm32f3xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 237:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 238:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2; + 239:Core/Src/system_stm32f3xx.c **** + 240:Core/Src/system_stm32f3xx.c **** #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) + 241:Core/Src/system_stm32f3xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 242:Core/Src/system_stm32f3xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 243:Core/Src/system_stm32f3xx.c **** { + 244:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 245:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull; + 246:Core/Src/system_stm32f3xx.c **** } + 247:Core/Src/system_stm32f3xx.c **** else + 248:Core/Src/system_stm32f3xx.c **** { + 249:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock selected as PREDIV1 clock entry */ + 250:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull; + 251:Core/Src/system_stm32f3xx.c **** } + 252:Core/Src/system_stm32f3xx.c **** #else + 253:Core/Src/system_stm32f3xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2) + 254:Core/Src/system_stm32f3xx.c **** { + 255:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + 256:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + ARM GAS /tmp/ccZxkiP3.s page 7 + + + 257:Core/Src/system_stm32f3xx.c **** } + 258:Core/Src/system_stm32f3xx.c **** else + 259:Core/Src/system_stm32f3xx.c **** { + 260:Core/Src/system_stm32f3xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 261:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 262:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull; + 263:Core/Src/system_stm32f3xx.c **** } + 264:Core/Src/system_stm32f3xx.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + 265:Core/Src/system_stm32f3xx.c **** break; + 266:Core/Src/system_stm32f3xx.c **** default: /* HSI used as system clock */ + 267:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSI_VALUE; + 268:Core/Src/system_stm32f3xx.c **** break; + 269:Core/Src/system_stm32f3xx.c **** } + 270:Core/Src/system_stm32f3xx.c **** /* Compute HCLK clock frequency ----------------*/ + 271:Core/Src/system_stm32f3xx.c **** /* Get HCLK prescaler */ + 272:Core/Src/system_stm32f3xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + 90 .loc 1 272 3 view .LVU15 + 91 .loc 1 272 28 is_stmt 0 view .LVU16 + 92 001a 174B ldr r3, .L10 + 93 001c 5B68 ldr r3, [r3, #4] + 94 .loc 1 272 52 view .LVU17 + 95 001e C3F30313 ubfx r3, r3, #4, #4 + 96 .loc 1 272 22 view .LVU18 + 97 0022 184A ldr r2, .L10+12 + 98 0024 D15C ldrb r1, [r2, r3] @ zero_extendqisi2 + 99 .LVL4: + 273:Core/Src/system_stm32f3xx.c **** /* HCLK clock frequency */ + 274:Core/Src/system_stm32f3xx.c **** SystemCoreClock >>= tmp; + 100 .loc 1 274 3 is_stmt 1 view .LVU19 + 101 .loc 1 274 19 is_stmt 0 view .LVU20 + 102 0026 154A ldr r2, .L10+4 + 103 0028 1368 ldr r3, [r2] + 104 002a CB40 lsrs r3, r3, r1 + 105 002c 1360 str r3, [r2] + 275:Core/Src/system_stm32f3xx.c **** } + 106 .loc 1 275 1 view .LVU21 + 107 002e 7047 bx lr + 108 .LVL5: + 109 .L5: + 232:Core/Src/system_stm32f3xx.c **** break; + 110 .loc 1 232 7 is_stmt 1 view .LVU22 + 232:Core/Src/system_stm32f3xx.c **** break; + 111 .loc 1 232 23 is_stmt 0 view .LVU23 + 112 0030 124B ldr r3, .L10+4 + 113 .LVL6: + 232:Core/Src/system_stm32f3xx.c **** break; + 114 .loc 1 232 23 view .LVU24 + 115 0032 134A ldr r2, .L10+8 + 116 0034 1A60 str r2, [r3] + 233:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 117 .loc 1 233 7 is_stmt 1 view .LVU25 + 118 0036 F0E7 b .L8 + 119 .LVL7: + 120 .L6: + 236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 121 .loc 1 236 7 view .LVU26 + 236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + ARM GAS /tmp/ccZxkiP3.s page 8 + + + 122 .loc 1 236 20 is_stmt 0 view .LVU27 + 123 0038 0F4A ldr r2, .L10 + 124 003a 5368 ldr r3, [r2, #4] + 125 .LVL8: + 237:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2; + 126 .loc 1 237 7 is_stmt 1 view .LVU28 + 237:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2; + 127 .loc 1 237 22 is_stmt 0 view .LVU29 + 128 003c 5268 ldr r2, [r2, #4] + 129 .LVL9: + 238:Core/Src/system_stm32f3xx.c **** + 130 .loc 1 238 7 is_stmt 1 view .LVU30 + 238:Core/Src/system_stm32f3xx.c **** + 131 .loc 1 238 27 is_stmt 0 view .LVU31 + 132 003e C3F38343 ubfx r3, r3, #18, #4 + 133 .LVL10: + 238:Core/Src/system_stm32f3xx.c **** + 134 .loc 1 238 15 view .LVU32 + 135 0042 0233 adds r3, r3, #2 + 136 .LVL11: + 253:Core/Src/system_stm32f3xx.c **** { + 137 .loc 1 253 7 is_stmt 1 view .LVU33 + 253:Core/Src/system_stm32f3xx.c **** { + 138 .loc 1 253 10 is_stmt 0 view .LVU34 + 139 0044 12F4803F tst r2, #65536 + 140 0048 05D1 bne .L9 + 256:Core/Src/system_stm32f3xx.c **** } + 141 .loc 1 256 9 is_stmt 1 view .LVU35 + 256:Core/Src/system_stm32f3xx.c **** } + 142 .loc 1 256 44 is_stmt 0 view .LVU36 + 143 004a 0F4A ldr r2, .L10+16 + 144 .LVL12: + 256:Core/Src/system_stm32f3xx.c **** } + 145 .loc 1 256 44 view .LVU37 + 146 004c 02FB03F3 mul r3, r2, r3 + 147 .LVL13: + 256:Core/Src/system_stm32f3xx.c **** } + 148 .loc 1 256 25 view .LVU38 + 149 0050 0A4A ldr r2, .L10+4 + 150 0052 1360 str r3, [r2] + 151 0054 E1E7 b .L8 + 152 .LVL14: + 153 .L9: + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 154 .loc 1 260 9 is_stmt 1 view .LVU39 + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 155 .loc 1 260 28 is_stmt 0 view .LVU40 + 156 0056 084A ldr r2, .L10 + 157 .LVL15: + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 158 .loc 1 260 28 view .LVU41 + 159 0058 D16A ldr r1, [r2, #44] + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 160 .loc 1 260 36 view .LVU42 + 161 005a 01F00F01 and r1, r1, #15 + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 162 .loc 1 260 22 view .LVU43 + ARM GAS /tmp/ccZxkiP3.s page 9 + + + 163 005e 0131 adds r1, r1, #1 + 164 .LVL16: + 262:Core/Src/system_stm32f3xx.c **** } + 165 .loc 1 262 9 is_stmt 1 view .LVU44 + 262:Core/Src/system_stm32f3xx.c **** } + 166 .loc 1 262 38 is_stmt 0 view .LVU45 + 167 0060 074A ldr r2, .L10+8 + 168 0062 B2FBF1F2 udiv r2, r2, r1 + 262:Core/Src/system_stm32f3xx.c **** } + 169 .loc 1 262 54 view .LVU46 + 170 0066 02FB03F3 mul r3, r2, r3 + 171 .LVL17: + 262:Core/Src/system_stm32f3xx.c **** } + 172 .loc 1 262 25 view .LVU47 + 173 006a 044A ldr r2, .L10+4 + 174 006c 1360 str r3, [r2] + 175 006e D4E7 b .L8 + 176 .LVL18: + 177 .L7: + 267:Core/Src/system_stm32f3xx.c **** break; + 178 .loc 1 267 7 is_stmt 1 view .LVU48 + 267:Core/Src/system_stm32f3xx.c **** break; + 179 .loc 1 267 23 is_stmt 0 view .LVU49 + 180 0070 024B ldr r3, .L10+4 + 181 .LVL19: + 267:Core/Src/system_stm32f3xx.c **** break; + 182 .loc 1 267 23 view .LVU50 + 183 0072 034A ldr r2, .L10+8 + 184 0074 1A60 str r2, [r3] + 268:Core/Src/system_stm32f3xx.c **** } + 185 .loc 1 268 7 is_stmt 1 view .LVU51 + 186 0076 D0E7 b .L8 + 187 .L11: + 188 .align 2 + 189 .L10: + 190 0078 00100240 .word 1073876992 + 191 007c 00000000 .word SystemCoreClock + 192 0080 00127A00 .word 8000000 + 193 0084 00000000 .word AHBPrescTable + 194 0088 00093D00 .word 4000000 + 195 .cfi_endproc + 196 .LFE131: + 198 .global APBPrescTable + 199 .section .rodata.APBPrescTable,"a" + 200 .align 2 + 203 APBPrescTable: + 204 0000 00000000 .ascii "\000\000\000\000\001\002\003\004" + 204 01020304 + 205 .global AHBPrescTable + 206 .section .rodata.AHBPrescTable,"a" + 207 .align 2 + 210 AHBPrescTable: + 211 0000 00000000 .ascii "\000\000\000\000\000\000\000\000\001\002\003\004\006" + 211 00000000 + 211 01020304 + 211 06 + 212 000d 070809 .ascii "\007\010\011" + ARM GAS /tmp/ccZxkiP3.s page 10 + + + 213 .global SystemCoreClock + 214 .section .data.SystemCoreClock,"aw" + 215 .align 2 + 218 SystemCoreClock: + 219 0000 00127A00 .word 8000000 + 220 .text + 221 .Letext0: + 222 .file 2 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 223 .file 3 "/home/h/.var/app/com.visualstudio.code/config/Code/User/globalStorage/bmd.stm32-for-vscod + 224 .file 4 "Drivers/CMSIS/Include/core_cm4.h" + 225 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 226 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" + ARM GAS /tmp/ccZxkiP3.s page 11 + + +DEFINED SYMBOLS + *ABS*:00000000 system_stm32f3xx.c + /tmp/ccZxkiP3.s:21 .text.SystemInit:00000000 $t + /tmp/ccZxkiP3.s:27 .text.SystemInit:00000000 SystemInit + /tmp/ccZxkiP3.s:46 .text.SystemInit:00000010 $d + /tmp/ccZxkiP3.s:51 .text.SystemCoreClockUpdate:00000000 $t + /tmp/ccZxkiP3.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate + /tmp/ccZxkiP3.s:190 .text.SystemCoreClockUpdate:00000078 $d + /tmp/ccZxkiP3.s:218 .data.SystemCoreClock:00000000 SystemCoreClock + /tmp/ccZxkiP3.s:210 .rodata.AHBPrescTable:00000000 AHBPrescTable + /tmp/ccZxkiP3.s:203 .rodata.APBPrescTable:00000000 APBPrescTable + /tmp/ccZxkiP3.s:200 .rodata.APBPrescTable:00000000 $d + /tmp/ccZxkiP3.s:207 .rodata.AHBPrescTable:00000000 $d + /tmp/ccZxkiP3.s:215 .data.SystemCoreClock:00000000 $d + +NO UNDEFINED SYMBOLS diff --git a/build/system_stm32f3xx.o b/build/system_stm32f3xx.o new file mode 100644 index 0000000..c75e59a Binary files /dev/null and b/build/system_stm32f3xx.o differ diff --git a/openocd.cfg b/openocd.cfg new file mode 100644 index 0000000..0cd157b --- /dev/null +++ b/openocd.cfg @@ -0,0 +1,8 @@ +#OpenOCD configuration file, generated by STM32 for VSCode + +# Programmer, can be changed to several interfaces +# Standard will be the stlink interface as this is the standard for STM32 dev boards +source [find interface/stlink.cfg] + +# The target MCU. This should match your board +source [find target/stm32f3x.cfg]