Lastcontroller_EL1000.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 00000188 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00009dc0 08000188 08000188 00010188 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000080 08009f48 08009f48 00019f48 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08009fc8 08009fc8 0002017c 2**0
CONTENTS
4 .ARM 00000000 08009fc8 08009fc8 0002017c 2**0
CONTENTS
5 .preinit_array 00000000 08009fc8 08009fc8 0002017c 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08009fc8 08009fc8 00019fc8 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 08009fcc 08009fcc 00019fcc 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 0000017c 20000000 08009fd0 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00001414 2000017c 0800a14c 0002017c 2**2
ALLOC
10 ._user_heap_stack 00000a00 20001590 0800a14c 00021590 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 0002017c 2**0
CONTENTS, READONLY
12 .debug_info 00014f30 00000000 00000000 000201ac 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 000032fb 00000000 00000000 000350dc 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00000ef8 00000000 00000000 000383d8 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_ranges 00000db0 00000000 00000000 000392d0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001ff34 00000000 00000000 0003a080 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 00015b87 00000000 00000000 00059fb4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 000b1bd7 00000000 00000000 0006fb3b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000050 00000000 00000000 00121712 2**0
CONTENTS, READONLY
20 .debug_frame 00003c10 00000000 00000000 00121764 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
08000188 <__do_global_dtors_aux>:
8000188: b510 push {r4, lr}
800018a: 4c05 ldr r4, [pc, #20] ; (80001a0 <__do_global_dtors_aux+0x18>)
800018c: 7823 ldrb r3, [r4, #0]
800018e: b933 cbnz r3, 800019e <__do_global_dtors_aux+0x16>
8000190: 4b04 ldr r3, [pc, #16] ; (80001a4 <__do_global_dtors_aux+0x1c>)
8000192: b113 cbz r3, 800019a <__do_global_dtors_aux+0x12>
8000194: 4804 ldr r0, [pc, #16] ; (80001a8 <__do_global_dtors_aux+0x20>)
8000196: f3af 8000 nop.w
800019a: 2301 movs r3, #1
800019c: 7023 strb r3, [r4, #0]
800019e: bd10 pop {r4, pc}
80001a0: 2000017c .word 0x2000017c
80001a4: 00000000 .word 0x00000000
80001a8: 08009f30 .word 0x08009f30
080001ac <frame_dummy>:
80001ac: b508 push {r3, lr}
80001ae: 4b03 ldr r3, [pc, #12] ; (80001bc <frame_dummy+0x10>)
80001b0: b11b cbz r3, 80001ba <frame_dummy+0xe>
80001b2: 4903 ldr r1, [pc, #12] ; (80001c0 <frame_dummy+0x14>)
80001b4: 4803 ldr r0, [pc, #12] ; (80001c4 <frame_dummy+0x18>)
80001b6: f3af 8000 nop.w
80001ba: bd08 pop {r3, pc}
80001bc: 00000000 .word 0x00000000
80001c0: 20000180 .word 0x20000180
80001c4: 08009f30 .word 0x08009f30
080001c8 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
80001c8: b580 push {r7, lr}
80001ca: b084 sub sp, #16
80001cc: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
80001ce: f000 fc81 bl 8000ad4 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
80001d2: f000 f8b7 bl 8000344 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
80001d6: f000 f9d7 bl 8000588 <MX_GPIO_Init>
MX_ADC1_Init();
80001da: f000 f915 bl 8000408 <MX_ADC1_Init>
MX_OPAMP1_Init();
80001de: f000 f983 bl 80004e8 <MX_OPAMP1_Init>
MX_USART1_UART_Init();
80001e2: f000 f9a1 bl 8000528 <MX_USART1_UART_Init>
MX_USB_DEVICE_Init();
80001e6: f009 f8ed bl 80093c4 <MX_USB_DEVICE_Init>
/* USER CODE BEGIN 2 */
activateIsoDCDC();
80001ea: f000 fa49 bl 8000680 <activateIsoDCDC>
CS_High();
80001ee: f000 fa7f bl 80006f0 <CS_High>
HAL_Delay(1);
80001f2: 2001 movs r0, #1
80001f4: f000 fcd4 bl 8000ba0 <HAL_Delay>
CS_Low();
80001f8: f000 fa84 bl 8000704 <CS_Low>
HAL_Delay(1);
80001fc: 2001 movs r0, #1
80001fe: f000 fccf bl 8000ba0 <HAL_Delay>
CS_High();
8000202: f000 fa75 bl 80006f0 <CS_High>
HAL_GPIO_WritePin(SPI1_CLK_GPIO_Port, SPI1_CLK_Pin, GPIO_PIN_SET);
8000206: 2201 movs r2, #1
8000208: 2120 movs r1, #32
800020a: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
800020e: f001 fd0d bl 8001c2c <HAL_GPIO_WritePin>
resetStatusLED();
8000212: f000 fa4b bl 80006ac <resetStatusLED>
deactivateRemote();
8000216: f000 fa5f bl 80006d8 <deactivateRemote>
setDAC(0x0000, 1);
800021a: 2101 movs r1, #1
800021c: 2000 movs r0, #0
800021e: f000 fa7b bl 8000718 <setDAC>
while(usb_cdc_init_cmplt == 0);
8000222: bf00 nop
8000224: 4b41 ldr r3, [pc, #260] ; (800032c <main+0x164>)
8000226: 781b ldrb r3, [r3, #0]
8000228: 2b00 cmp r3, #0
800022a: d0fb beq.n 8000224 <main+0x5c>
activateRemote();
800022c: f000 fa48 bl 80006c0 <activateRemote>
setStatusLED();
8000230: f000 fa32 bl 8000698 <setStatusLED>
setDAC(0xF00, 1);
8000234: 2101 movs r1, #1
8000236: f44f 6070 mov.w r0, #3840 ; 0xf00
800023a: f000 fa6d bl 8000718 <setDAC>
//getUsbBuffers(UsbTxBufferFS,UsbRxBufferFS);
/* if(CDC_Start_Receive(UsbRxBufferFS))
{
HAL_UART_Transmit(&huart1, string2, 6, 1000);
}*/
HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_RESET);
800023e: 2200 movs r2, #0
8000240: 2110 movs r1, #16
8000242: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000246: f001 fcf1 bl 8001c2c <HAL_GPIO_WritePin>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
uint32_t lastrx = 0;
800024a: 2300 movs r3, #0
800024c: 60fb str r3, [r7, #12]
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
if(usb_rx_available >= 2)
800024e: 4b38 ldr r3, [pc, #224] ; (8000330 <main+0x168>)
8000250: 681b ldr r3, [r3, #0]
8000252: 2b01 cmp r3, #1
8000254: d954 bls.n 8000300 <main+0x138>
{
uint16_t rawvalue = (uint16_t)(UsbRxBufferFS[0]<<8 | UsbRxBufferFS[1]);
8000256: 4b37 ldr r3, [pc, #220] ; (8000334 <main+0x16c>)
8000258: 781b ldrb r3, [r3, #0]
800025a: 021b lsls r3, r3, #8
800025c: b21a sxth r2, r3
800025e: 4b35 ldr r3, [pc, #212] ; (8000334 <main+0x16c>)
8000260: 785b ldrb r3, [r3, #1]
8000262: b21b sxth r3, r3
8000264: 4313 orrs r3, r2
8000266: b21b sxth r3, r3
8000268: 817b strh r3, [r7, #10]
float outvolt = ((float)rawvalue)/10 * 1/(OPAMPGAIN*10) * 4096/5;
800026a: 897b ldrh r3, [r7, #10]
800026c: ee07 3a90 vmov s15, r3
8000270: eef8 7a67 vcvt.f32.u32 s15, s15
8000274: eef2 6a04 vmov.f32 s13, #36 ; 0x41200000 10.0
8000278: ee87 7aa6 vdiv.f32 s14, s15, s13
800027c: eddf 6a2e vldr s13, [pc, #184] ; 8000338 <main+0x170>
8000280: eec7 7a26 vdiv.f32 s15, s14, s13
8000284: ed9f 7a2d vldr s14, [pc, #180] ; 800033c <main+0x174>
8000288: ee27 7a87 vmul.f32 s14, s15, s14
800028c: eef1 6a04 vmov.f32 s13, #20 ; 0x40a00000 5.0
8000290: eec7 7a26 vdiv.f32 s15, s14, s13
8000294: edc7 7a01 vstr s15, [r7, #4]
uint16_t outval = (uint16_t) outvolt;
8000298: edd7 7a01 vldr s15, [r7, #4]
800029c: eefc 7ae7 vcvt.u32.f32 s15, s15
80002a0: ee17 3a90 vmov r3, s15
80002a4: 807b strh r3, [r7, #2]
setDAC(outval,1);
80002a6: 887b ldrh r3, [r7, #2]
80002a8: 2101 movs r1, #1
80002aa: 4618 mov r0, r3
80002ac: f000 fa34 bl 8000718 <setDAC>
HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_SET);
80002b0: 2201 movs r2, #1
80002b2: 2110 movs r1, #16
80002b4: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
80002b8: f001 fcb8 bl 8001c2c <HAL_GPIO_WritePin>
usb_rx_available = 0;
80002bc: 4b1c ldr r3, [pc, #112] ; (8000330 <main+0x168>)
80002be: 2200 movs r2, #0
80002c0: 601a str r2, [r3, #0]
lastrx = HAL_GetTick();
80002c2: f000 fc61 bl 8000b88 <HAL_GetTick>
80002c6: 60f8 str r0, [r7, #12]
uint8_t txbuf[1];
txbuf[0] = (flags.overload<<3) | (flags.overtemp<<2) | (flags.overvoltage<<1) | flags.undervoltage;
80002c8: 4b1d ldr r3, [pc, #116] ; (8000340 <main+0x178>)
80002ca: 789b ldrb r3, [r3, #2]
80002cc: 00db lsls r3, r3, #3
80002ce: b25a sxtb r2, r3
80002d0: 4b1b ldr r3, [pc, #108] ; (8000340 <main+0x178>)
80002d2: 78db ldrb r3, [r3, #3]
80002d4: 009b lsls r3, r3, #2
80002d6: b25b sxtb r3, r3
80002d8: 4313 orrs r3, r2
80002da: b25a sxtb r2, r3
80002dc: 4b18 ldr r3, [pc, #96] ; (8000340 <main+0x178>)
80002de: 781b ldrb r3, [r3, #0]
80002e0: 005b lsls r3, r3, #1
80002e2: b25b sxtb r3, r3
80002e4: 4313 orrs r3, r2
80002e6: b25a sxtb r2, r3
80002e8: 4b15 ldr r3, [pc, #84] ; (8000340 <main+0x178>)
80002ea: 785b ldrb r3, [r3, #1]
80002ec: b25b sxtb r3, r3
80002ee: 4313 orrs r3, r2
80002f0: b25b sxtb r3, r3
80002f2: b2db uxtb r3, r3
80002f4: 703b strb r3, [r7, #0]
VCOM_Transmit(txbuf, 1);
80002f6: 463b mov r3, r7
80002f8: 2101 movs r1, #1
80002fa: 4618 mov r0, r3
80002fc: f009 f9bc bl 8009678 <VCOM_Transmit>
}
if((HAL_GetTick()-lastrx) > USBTIMEOUT)
8000300: f000 fc42 bl 8000b88 <HAL_GetTick>
8000304: 4602 mov r2, r0
8000306: 68fb ldr r3, [r7, #12]
8000308: 1ad3 subs r3, r2, r3
800030a: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
800030e: d909 bls.n 8000324 <main+0x15c>
{
setDAC(0, 1);
8000310: 2101 movs r1, #1
8000312: 2000 movs r0, #0
8000314: f000 fa00 bl 8000718 <setDAC>
HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_RESET);
8000318: 2200 movs r2, #0
800031a: 2110 movs r1, #16
800031c: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000320: f001 fc84 bl 8001c2c <HAL_GPIO_WritePin>
}
readLimits(&flags);
8000324: 4806 ldr r0, [pc, #24] ; (8000340 <main+0x178>)
8000326: f000 fa29 bl 800077c <readLimits>
if(usb_rx_available >= 2)
800032a: e790 b.n 800024e <main+0x86>
800032c: 20000e77 .word 0x20000e77
8000330: 20000e7c .word 0x20000e7c
8000334: 200002a0 .word 0x200002a0
8000338: 42c80000 .word 0x42c80000
800033c: 45800000 .word 0x45800000
8000340: 200003a0 .word 0x200003a0
08000344 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000344: b580 push {r7, lr}
8000346: b09c sub sp, #112 ; 0x70
8000348: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
800034a: f107 0348 add.w r3, r7, #72 ; 0x48
800034e: 2228 movs r2, #40 ; 0x28
8000350: 2100 movs r1, #0
8000352: 4618 mov r0, r3
8000354: f009 fde4 bl 8009f20 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000358: f107 0334 add.w r3, r7, #52 ; 0x34
800035c: 2200 movs r2, #0
800035e: 601a str r2, [r3, #0]
8000360: 605a str r2, [r3, #4]
8000362: 609a str r2, [r3, #8]
8000364: 60da str r2, [r3, #12]
8000366: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8000368: 463b mov r3, r7
800036a: 2234 movs r2, #52 ; 0x34
800036c: 2100 movs r1, #0
800036e: 4618 mov r0, r3
8000370: f009 fdd6 bl 8009f20 <memset>
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8000374: 2301 movs r3, #1
8000376: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8000378: f44f 3380 mov.w r3, #65536 ; 0x10000
800037c: 64fb str r3, [r7, #76] ; 0x4c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
800037e: 2300 movs r3, #0
8000380: 653b str r3, [r7, #80] ; 0x50
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8000382: 2301 movs r3, #1
8000384: 65bb str r3, [r7, #88] ; 0x58
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8000386: 2302 movs r3, #2
8000388: 667b str r3, [r7, #100] ; 0x64
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800038a: f44f 3380 mov.w r3, #65536 ; 0x10000
800038e: 66bb str r3, [r7, #104] ; 0x68
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL3;
8000390: f44f 2380 mov.w r3, #262144 ; 0x40000
8000394: 66fb str r3, [r7, #108] ; 0x6c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8000396: f107 0348 add.w r3, r7, #72 ; 0x48
800039a: 4618 mov r0, r3
800039c: f003 f9ee bl 800377c <HAL_RCC_OscConfig>
80003a0: 4603 mov r3, r0
80003a2: 2b00 cmp r3, #0
80003a4: d001 beq.n 80003aa <SystemClock_Config+0x66>
{
Error_Handler();
80003a6: f000 fa5d bl 8000864 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
80003aa: 230f movs r3, #15
80003ac: 637b str r3, [r7, #52] ; 0x34
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
80003ae: 2301 movs r3, #1
80003b0: 63bb str r3, [r7, #56] ; 0x38
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
80003b2: 2300 movs r3, #0
80003b4: 63fb str r3, [r7, #60] ; 0x3c
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
80003b6: 2300 movs r3, #0
80003b8: 643b str r3, [r7, #64] ; 0x40
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
80003ba: 2300 movs r3, #0
80003bc: 647b str r3, [r7, #68] ; 0x44
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
80003be: f107 0334 add.w r3, r7, #52 ; 0x34
80003c2: 2100 movs r1, #0
80003c4: 4618 mov r0, r3
80003c6: f004 fa17 bl 80047f8 <HAL_RCC_ClockConfig>
80003ca: 4603 mov r3, r0
80003cc: 2b00 cmp r3, #0
80003ce: d001 beq.n 80003d4 <SystemClock_Config+0x90>
{
Error_Handler();
80003d0: f000 fa48 bl 8000864 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB|RCC_PERIPHCLK_USART1
80003d4: 4b0b ldr r3, [pc, #44] ; (8000404 <SystemClock_Config+0xc0>)
80003d6: 603b str r3, [r7, #0]
|RCC_PERIPHCLK_ADC12;
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
80003d8: 2300 movs r3, #0
80003da: 60bb str r3, [r7, #8]
PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1;
80003dc: f44f 7380 mov.w r3, #256 ; 0x100
80003e0: 627b str r3, [r7, #36] ; 0x24
PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL;
80003e2: f44f 0380 mov.w r3, #4194304 ; 0x400000
80003e6: 633b str r3, [r7, #48] ; 0x30
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
80003e8: 463b mov r3, r7
80003ea: 4618 mov r0, r3
80003ec: f004 fc3c bl 8004c68 <HAL_RCCEx_PeriphCLKConfig>
80003f0: 4603 mov r3, r0
80003f2: 2b00 cmp r3, #0
80003f4: d001 beq.n 80003fa <SystemClock_Config+0xb6>
{
Error_Handler();
80003f6: f000 fa35 bl 8000864 <Error_Handler>
}
}
80003fa: bf00 nop
80003fc: 3770 adds r7, #112 ; 0x70
80003fe: 46bd mov sp, r7
8000400: bd80 pop {r7, pc}
8000402: bf00 nop
8000404: 00020081 .word 0x00020081
08000408 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
8000408: b580 push {r7, lr}
800040a: b08a sub sp, #40 ; 0x28
800040c: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_MultiModeTypeDef multimode = {0};
800040e: f107 031c add.w r3, r7, #28
8000412: 2200 movs r2, #0
8000414: 601a str r2, [r3, #0]
8000416: 605a str r2, [r3, #4]
8000418: 609a str r2, [r3, #8]
ADC_ChannelConfTypeDef sConfig = {0};
800041a: 1d3b adds r3, r7, #4
800041c: 2200 movs r2, #0
800041e: 601a str r2, [r3, #0]
8000420: 605a str r2, [r3, #4]
8000422: 609a str r2, [r3, #8]
8000424: 60da str r2, [r3, #12]
8000426: 611a str r2, [r3, #16]
8000428: 615a str r2, [r3, #20]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
800042a: 4b2e ldr r3, [pc, #184] ; (80004e4 <MX_ADC1_Init+0xdc>)
800042c: f04f 42a0 mov.w r2, #1342177280 ; 0x50000000
8000430: 601a str r2, [r3, #0]
hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
8000432: 4b2c ldr r3, [pc, #176] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000434: 2200 movs r2, #0
8000436: 605a str r2, [r3, #4]
hadc1.Init.Resolution = ADC_RESOLUTION_12B;
8000438: 4b2a ldr r3, [pc, #168] ; (80004e4 <MX_ADC1_Init+0xdc>)
800043a: 2200 movs r2, #0
800043c: 609a str r2, [r3, #8]
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
800043e: 4b29 ldr r3, [pc, #164] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000440: 2200 movs r2, #0
8000442: 611a str r2, [r3, #16]
hadc1.Init.ContinuousConvMode = DISABLE;
8000444: 4b27 ldr r3, [pc, #156] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000446: 2200 movs r2, #0
8000448: 765a strb r2, [r3, #25]
hadc1.Init.DiscontinuousConvMode = DISABLE;
800044a: 4b26 ldr r3, [pc, #152] ; (80004e4 <MX_ADC1_Init+0xdc>)
800044c: 2200 movs r2, #0
800044e: f883 2020 strb.w r2, [r3, #32]
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
8000452: 4b24 ldr r3, [pc, #144] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000454: 2200 movs r2, #0
8000456: 62da str r2, [r3, #44] ; 0x2c
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8000458: 4b22 ldr r3, [pc, #136] ; (80004e4 <MX_ADC1_Init+0xdc>)
800045a: 2201 movs r2, #1
800045c: 629a str r2, [r3, #40] ; 0x28
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
800045e: 4b21 ldr r3, [pc, #132] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000460: 2200 movs r2, #0
8000462: 60da str r2, [r3, #12]
hadc1.Init.NbrOfConversion = 1;
8000464: 4b1f ldr r3, [pc, #124] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000466: 2201 movs r2, #1
8000468: 61da str r2, [r3, #28]
hadc1.Init.DMAContinuousRequests = DISABLE;
800046a: 4b1e ldr r3, [pc, #120] ; (80004e4 <MX_ADC1_Init+0xdc>)
800046c: 2200 movs r2, #0
800046e: f883 2030 strb.w r2, [r3, #48] ; 0x30
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
8000472: 4b1c ldr r3, [pc, #112] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000474: 2204 movs r2, #4
8000476: 615a str r2, [r3, #20]
hadc1.Init.LowPowerAutoWait = DISABLE;
8000478: 4b1a ldr r3, [pc, #104] ; (80004e4 <MX_ADC1_Init+0xdc>)
800047a: 2200 movs r2, #0
800047c: 761a strb r2, [r3, #24]
hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
800047e: 4b19 ldr r3, [pc, #100] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000480: 2200 movs r2, #0
8000482: 635a str r2, [r3, #52] ; 0x34
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000484: 4817 ldr r0, [pc, #92] ; (80004e4 <MX_ADC1_Init+0xdc>)
8000486: f000 fbaf bl 8000be8 <HAL_ADC_Init>
800048a: 4603 mov r3, r0
800048c: 2b00 cmp r3, #0
800048e: d001 beq.n 8000494 <MX_ADC1_Init+0x8c>
{
Error_Handler();
8000490: f000 f9e8 bl 8000864 <Error_Handler>
}
/** Configure the ADC multi-mode
*/
multimode.Mode = ADC_MODE_INDEPENDENT;
8000494: 2300 movs r3, #0
8000496: 61fb str r3, [r7, #28]
if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
8000498: f107 031c add.w r3, r7, #28
800049c: 4619 mov r1, r3
800049e: 4811 ldr r0, [pc, #68] ; (80004e4 <MX_ADC1_Init+0xdc>)
80004a0: f000 fff4 bl 800148c <HAL_ADCEx_MultiModeConfigChannel>
80004a4: 4603 mov r3, r0
80004a6: 2b00 cmp r3, #0
80004a8: d001 beq.n 80004ae <MX_ADC1_Init+0xa6>
{
Error_Handler();
80004aa: f000 f9db bl 8000864 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_3;
80004ae: 2303 movs r3, #3
80004b0: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
80004b2: 2301 movs r3, #1
80004b4: 60bb str r3, [r7, #8]
sConfig.SingleDiff = ADC_SINGLE_ENDED;
80004b6: 2300 movs r3, #0
80004b8: 613b str r3, [r7, #16]
sConfig.SamplingTime = ADC_SAMPLETIME_19CYCLES_5;
80004ba: 2304 movs r3, #4
80004bc: 60fb str r3, [r7, #12]
sConfig.OffsetNumber = ADC_OFFSET_NONE;
80004be: 2300 movs r3, #0
80004c0: 617b str r3, [r7, #20]
sConfig.Offset = 0;
80004c2: 2300 movs r3, #0
80004c4: 61bb str r3, [r7, #24]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
80004c6: 1d3b adds r3, r7, #4
80004c8: 4619 mov r1, r3
80004ca: 4806 ldr r0, [pc, #24] ; (80004e4 <MX_ADC1_Init+0xdc>)
80004cc: f000 fd1e bl 8000f0c <HAL_ADC_ConfigChannel>
80004d0: 4603 mov r3, r0
80004d2: 2b00 cmp r3, #0
80004d4: d001 beq.n 80004da <MX_ADC1_Init+0xd2>
{
Error_Handler();
80004d6: f000 f9c5 bl 8000864 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
80004da: bf00 nop
80004dc: 3728 adds r7, #40 ; 0x28
80004de: 46bd mov sp, r7
80004e0: bd80 pop {r7, pc}
80004e2: bf00 nop
80004e4: 20000198 .word 0x20000198
080004e8 <MX_OPAMP1_Init>:
* @brief OPAMP1 Initialization Function
* @param None
* @retval None
*/
static void MX_OPAMP1_Init(void)
{
80004e8: b580 push {r7, lr}
80004ea: af00 add r7, sp, #0
/* USER CODE END OPAMP1_Init 0 */
/* USER CODE BEGIN OPAMP1_Init 1 */
/* USER CODE END OPAMP1_Init 1 */
hopamp1.Instance = OPAMP1;
80004ec: 4b0c ldr r3, [pc, #48] ; (8000520 <MX_OPAMP1_Init+0x38>)
80004ee: 4a0d ldr r2, [pc, #52] ; (8000524 <MX_OPAMP1_Init+0x3c>)
80004f0: 601a str r2, [r3, #0]
hopamp1.Init.Mode = OPAMP_FOLLOWER_MODE;
80004f2: 4b0b ldr r3, [pc, #44] ; (8000520 <MX_OPAMP1_Init+0x38>)
80004f4: 2260 movs r2, #96 ; 0x60
80004f6: 605a str r2, [r3, #4]
hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
80004f8: 4b09 ldr r3, [pc, #36] ; (8000520 <MX_OPAMP1_Init+0x38>)
80004fa: 220c movs r2, #12
80004fc: 60da str r2, [r3, #12]
hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
80004fe: 4b08 ldr r3, [pc, #32] ; (8000520 <MX_OPAMP1_Init+0x38>)
8000500: 2200 movs r2, #0
8000502: 611a str r2, [r3, #16]
hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
8000504: 4b06 ldr r3, [pc, #24] ; (8000520 <MX_OPAMP1_Init+0x38>)
8000506: 2200 movs r2, #0
8000508: 625a str r2, [r3, #36] ; 0x24
if (HAL_OPAMP_Init(&hopamp1) != HAL_OK)
800050a: 4805 ldr r0, [pc, #20] ; (8000520 <MX_OPAMP1_Init+0x38>)
800050c: f001 fba6 bl 8001c5c <HAL_OPAMP_Init>
8000510: 4603 mov r3, r0
8000512: 2b00 cmp r3, #0
8000514: d001 beq.n 800051a <MX_OPAMP1_Init+0x32>
{
Error_Handler();
8000516: f000 f9a5 bl 8000864 <Error_Handler>
}
/* USER CODE BEGIN OPAMP1_Init 2 */
/* USER CODE END OPAMP1_Init 2 */
}
800051a: bf00 nop
800051c: bd80 pop {r7, pc}
800051e: bf00 nop
8000520: 200001e8 .word 0x200001e8
8000524: 40010038 .word 0x40010038
08000528 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8000528: b580 push {r7, lr}
800052a: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
800052c: 4b14 ldr r3, [pc, #80] ; (8000580 <MX_USART1_UART_Init+0x58>)
800052e: 4a15 ldr r2, [pc, #84] ; (8000584 <MX_USART1_UART_Init+0x5c>)
8000530: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 9600;
8000532: 4b13 ldr r3, [pc, #76] ; (8000580 <MX_USART1_UART_Init+0x58>)
8000534: f44f 5216 mov.w r2, #9600 ; 0x2580
8000538: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
800053a: 4b11 ldr r3, [pc, #68] ; (8000580 <MX_USART1_UART_Init+0x58>)
800053c: 2200 movs r2, #0
800053e: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8000540: 4b0f ldr r3, [pc, #60] ; (8000580 <MX_USART1_UART_Init+0x58>)
8000542: 2200 movs r2, #0
8000544: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8000546: 4b0e ldr r3, [pc, #56] ; (8000580 <MX_USART1_UART_Init+0x58>)
8000548: 2200 movs r2, #0
800054a: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
800054c: 4b0c ldr r3, [pc, #48] ; (8000580 <MX_USART1_UART_Init+0x58>)
800054e: 220c movs r2, #12
8000550: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8000552: 4b0b ldr r3, [pc, #44] ; (8000580 <MX_USART1_UART_Init+0x58>)
8000554: 2200 movs r2, #0
8000556: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8000558: 4b09 ldr r3, [pc, #36] ; (8000580 <MX_USART1_UART_Init+0x58>)
800055a: 2200 movs r2, #0
800055c: 61da str r2, [r3, #28]
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
800055e: 4b08 ldr r3, [pc, #32] ; (8000580 <MX_USART1_UART_Init+0x58>)
8000560: 2200 movs r2, #0
8000562: 621a str r2, [r3, #32]
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
8000564: 4b06 ldr r3, [pc, #24] ; (8000580 <MX_USART1_UART_Init+0x58>)
8000566: 2200 movs r2, #0
8000568: 625a str r2, [r3, #36] ; 0x24
if (HAL_UART_Init(&huart1) != HAL_OK)
800056a: 4805 ldr r0, [pc, #20] ; (8000580 <MX_USART1_UART_Init+0x58>)
800056c: f004 fd0e bl 8004f8c <HAL_UART_Init>
8000570: 4603 mov r3, r0
8000572: 2b00 cmp r3, #0
8000574: d001 beq.n 800057a <MX_USART1_UART_Init+0x52>
{
Error_Handler();
8000576: f000 f975 bl 8000864 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
800057a: bf00 nop
800057c: bd80 pop {r7, pc}
800057e: bf00 nop
8000580: 2000021c .word 0x2000021c
8000584: 40013800 .word 0x40013800
08000588 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000588: b580 push {r7, lr}
800058a: b088 sub sp, #32
800058c: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
800058e: f107 030c add.w r3, r7, #12
8000592: 2200 movs r2, #0
8000594: 601a str r2, [r3, #0]
8000596: 605a str r2, [r3, #4]
8000598: 609a str r2, [r3, #8]
800059a: 60da str r2, [r3, #12]
800059c: 611a str r2, [r3, #16]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
800059e: 4b36 ldr r3, [pc, #216] ; (8000678 <MX_GPIO_Init+0xf0>)
80005a0: 695b ldr r3, [r3, #20]
80005a2: 4a35 ldr r2, [pc, #212] ; (8000678 <MX_GPIO_Init+0xf0>)
80005a4: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
80005a8: 6153 str r3, [r2, #20]
80005aa: 4b33 ldr r3, [pc, #204] ; (8000678 <MX_GPIO_Init+0xf0>)
80005ac: 695b ldr r3, [r3, #20]
80005ae: f403 0380 and.w r3, r3, #4194304 ; 0x400000
80005b2: 60bb str r3, [r7, #8]
80005b4: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
80005b6: 4b30 ldr r3, [pc, #192] ; (8000678 <MX_GPIO_Init+0xf0>)
80005b8: 695b ldr r3, [r3, #20]
80005ba: 4a2f ldr r2, [pc, #188] ; (8000678 <MX_GPIO_Init+0xf0>)
80005bc: f443 3300 orr.w r3, r3, #131072 ; 0x20000
80005c0: 6153 str r3, [r2, #20]
80005c2: 4b2d ldr r3, [pc, #180] ; (8000678 <MX_GPIO_Init+0xf0>)
80005c4: 695b ldr r3, [r3, #20]
80005c6: f403 3300 and.w r3, r3, #131072 ; 0x20000
80005ca: 607b str r3, [r7, #4]
80005cc: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
80005ce: 4b2a ldr r3, [pc, #168] ; (8000678 <MX_GPIO_Init+0xf0>)
80005d0: 695b ldr r3, [r3, #20]
80005d2: 4a29 ldr r2, [pc, #164] ; (8000678 <MX_GPIO_Init+0xf0>)
80005d4: f443 2380 orr.w r3, r3, #262144 ; 0x40000
80005d8: 6153 str r3, [r2, #20]
80005da: 4b27 ldr r3, [pc, #156] ; (8000678 <MX_GPIO_Init+0xf0>)
80005dc: 695b ldr r3, [r3, #20]
80005de: f403 2380 and.w r3, r3, #262144 ; 0x40000
80005e2: 603b str r3, [r7, #0]
80005e4: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, Status_LED_Pin|SPI1_CLK_Pin|SPI1_DAT_Pin|SPI1_CS_Pin, GPIO_PIN_RESET);
80005e6: 2200 movs r2, #0
80005e8: 21f0 movs r1, #240 ; 0xf0
80005ea: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
80005ee: f001 fb1d bl 8001c2c <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, Remote_CTRL_Pin|Iso_DCDC_Power_Pin, GPIO_PIN_RESET);
80005f2: 2200 movs r2, #0
80005f4: f240 1101 movw r1, #257 ; 0x101
80005f8: 4820 ldr r0, [pc, #128] ; (800067c <MX_GPIO_Init+0xf4>)
80005fa: f001 fb17 bl 8001c2c <HAL_GPIO_WritePin>
/*Configure GPIO pins : Status_LED_Pin SPI1_CLK_Pin SPI1_DAT_Pin SPI1_CS_Pin */
GPIO_InitStruct.Pin = Status_LED_Pin|SPI1_CLK_Pin|SPI1_DAT_Pin|SPI1_CS_Pin;
80005fe: 23f0 movs r3, #240 ; 0xf0
8000600: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000602: 2301 movs r3, #1
8000604: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000606: 2300 movs r3, #0
8000608: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800060a: 2300 movs r3, #0
800060c: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800060e: f107 030c add.w r3, r7, #12
8000612: 4619 mov r1, r3
8000614: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000618: f001 f976 bl 8001908 <HAL_GPIO_Init>
/*Configure GPIO pins : Remote_CTRL_Pin Iso_DCDC_Power_Pin */
GPIO_InitStruct.Pin = Remote_CTRL_Pin|Iso_DCDC_Power_Pin;
800061c: f240 1301 movw r3, #257 ; 0x101
8000620: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000622: 2301 movs r3, #1
8000624: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000626: 2300 movs r3, #0
8000628: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800062a: 2300 movs r3, #0
800062c: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
800062e: f107 030c add.w r3, r7, #12
8000632: 4619 mov r1, r3
8000634: 4811 ldr r0, [pc, #68] ; (800067c <MX_GPIO_Init+0xf4>)
8000636: f001 f967 bl 8001908 <HAL_GPIO_Init>
/*Configure GPIO pins : OVERTEMP_Pin UNDERVOLTAGE_Pin OVERLOAD_Pin OVERVOLTAGE_Pin */
GPIO_InitStruct.Pin = OVERTEMP_Pin|UNDERVOLTAGE_Pin|OVERLOAD_Pin|OVERVOLTAGE_Pin;
800063a: f640 4306 movw r3, #3078 ; 0xc06
800063e: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000640: 2300 movs r3, #0
8000642: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_PULLUP;
8000644: 2301 movs r3, #1
8000646: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000648: f107 030c add.w r3, r7, #12
800064c: 4619 mov r1, r3
800064e: 480b ldr r0, [pc, #44] ; (800067c <MX_GPIO_Init+0xf4>)
8000650: f001 f95a bl 8001908 <HAL_GPIO_Init>
/*Configure GPIO pin : PA9 */
GPIO_InitStruct.Pin = GPIO_PIN_9;
8000654: f44f 7300 mov.w r3, #512 ; 0x200
8000658: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
800065a: 2300 movs r3, #0
800065c: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800065e: 2300 movs r3, #0
8000660: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000662: f107 030c add.w r3, r7, #12
8000666: 4619 mov r1, r3
8000668: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
800066c: f001 f94c bl 8001908 <HAL_GPIO_Init>
}
8000670: bf00 nop
8000672: 3720 adds r7, #32
8000674: 46bd mov sp, r7
8000676: bd80 pop {r7, pc}
8000678: 40021000 .word 0x40021000
800067c: 48000400 .word 0x48000400
08000680 <activateIsoDCDC>:
/* USER CODE BEGIN 4 */
void activateIsoDCDC()
{
8000680: b580 push {r7, lr}
8000682: af00 add r7, sp, #0
HAL_GPIO_WritePin(Iso_DCDC_Power_GPIO_Port, Iso_DCDC_Power_Pin, GPIO_PIN_SET);
8000684: 2201 movs r2, #1
8000686: f44f 7180 mov.w r1, #256 ; 0x100
800068a: 4802 ldr r0, [pc, #8] ; (8000694 <activateIsoDCDC+0x14>)
800068c: f001 face bl 8001c2c <HAL_GPIO_WritePin>
}
8000690: bf00 nop
8000692: bd80 pop {r7, pc}
8000694: 48000400 .word 0x48000400
08000698 <setStatusLED>:
{
HAL_GPIO_WritePin(Iso_DCDC_Power_GPIO_Port, Iso_DCDC_Power_Pin, GPIO_PIN_RESET);
}
void setStatusLED()
{
8000698: b580 push {r7, lr}
800069a: af00 add r7, sp, #0
HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_SET);
800069c: 2201 movs r2, #1
800069e: 2110 movs r1, #16
80006a0: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
80006a4: f001 fac2 bl 8001c2c <HAL_GPIO_WritePin>
}
80006a8: bf00 nop
80006aa: bd80 pop {r7, pc}
080006ac <resetStatusLED>:
void resetStatusLED()
{
80006ac: b580 push {r7, lr}
80006ae: af00 add r7, sp, #0
HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_RESET);
80006b0: 2200 movs r2, #0
80006b2: 2110 movs r1, #16
80006b4: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
80006b8: f001 fab8 bl 8001c2c <HAL_GPIO_WritePin>
}
80006bc: bf00 nop
80006be: bd80 pop {r7, pc}
080006c0 <activateRemote>:
void activateRemote()
{
80006c0: b580 push {r7, lr}
80006c2: af00 add r7, sp, #0
HAL_GPIO_WritePin(Remote_CTRL_GPIO_Port, Remote_CTRL_Pin, GPIO_PIN_RESET);
80006c4: 2200 movs r2, #0
80006c6: 2101 movs r1, #1
80006c8: 4802 ldr r0, [pc, #8] ; (80006d4 <activateRemote+0x14>)
80006ca: f001 faaf bl 8001c2c <HAL_GPIO_WritePin>
}
80006ce: bf00 nop
80006d0: bd80 pop {r7, pc}
80006d2: bf00 nop
80006d4: 48000400 .word 0x48000400
080006d8 <deactivateRemote>:
void deactivateRemote()
{
80006d8: b580 push {r7, lr}
80006da: af00 add r7, sp, #0
HAL_GPIO_WritePin(Remote_CTRL_GPIO_Port, Remote_CTRL_Pin, GPIO_PIN_SET);
80006dc: 2201 movs r2, #1
80006de: 2101 movs r1, #1
80006e0: 4802 ldr r0, [pc, #8] ; (80006ec <deactivateRemote+0x14>)
80006e2: f001 faa3 bl 8001c2c <HAL_GPIO_WritePin>
}
80006e6: bf00 nop
80006e8: bd80 pop {r7, pc}
80006ea: bf00 nop
80006ec: 48000400 .word 0x48000400
080006f0 <CS_High>:
void CS_High()
{
80006f0: b580 push {r7, lr}
80006f2: af00 add r7, sp, #0
HAL_GPIO_WritePin(SPI1_CS_GPIO_Port, SPI1_CS_Pin, GPIO_PIN_RESET);
80006f4: 2200 movs r2, #0
80006f6: 2180 movs r1, #128 ; 0x80
80006f8: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
80006fc: f001 fa96 bl 8001c2c <HAL_GPIO_WritePin>
}
8000700: bf00 nop
8000702: bd80 pop {r7, pc}
08000704 <CS_Low>:
void CS_Low()
{
8000704: b580 push {r7, lr}
8000706: af00 add r7, sp, #0
HAL_GPIO_WritePin(SPI1_CS_GPIO_Port, SPI1_CS_Pin, GPIO_PIN_SET);
8000708: 2201 movs r2, #1
800070a: 2180 movs r1, #128 ; 0x80
800070c: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000710: f001 fa8c bl 8001c2c <HAL_GPIO_WritePin>
}
8000714: bf00 nop
8000716: bd80 pop {r7, pc}
08000718 <setDAC>:
void setDAC(uint16_t value, uint8_t active)
{
8000718: b580 push {r7, lr}
800071a: b082 sub sp, #8
800071c: af00 add r7, sp, #0
800071e: 4603 mov r3, r0
8000720: 460a mov r2, r1
8000722: 80fb strh r3, [r7, #6]
8000724: 4613 mov r3, r2
8000726: 717b strb r3, [r7, #5]
if(active)
8000728: 797b ldrb r3, [r7, #5]
800072a: 2b00 cmp r3, #0
800072c: d008 beq.n 8000740 <setDAC+0x28>
{
value &= 0x0FFF; //Bitmask 12 bit Value
800072e: 88fb ldrh r3, [r7, #6]
8000730: f3c3 030b ubfx r3, r3, #0, #12
8000734: 80fb strh r3, [r7, #6]
value |= 0x7000; //Set DAC A with buffered reference and Gain x1
8000736: 88fb ldrh r3, [r7, #6]
8000738: f443 43e0 orr.w r3, r3, #28672 ; 0x7000
800073c: 80fb strh r3, [r7, #6]
800073e: e001 b.n 8000744 <setDAC+0x2c>
}
else
{
value = 0x0000; //Set Value to Zero and Shutdown Flag
8000740: 2300 movs r3, #0
8000742: 80fb strh r3, [r7, #6]
}
value = value^0xFFFF;
8000744: 88fb ldrh r3, [r7, #6]
8000746: 43db mvns r3, r3
8000748: 80fb strh r3, [r7, #6]
CS_Low();
800074a: f7ff ffdb bl 8000704 <CS_Low>
HAL_GPIO_WritePin(SPI1_CLK_GPIO_Port, SPI1_CLK_Pin, GPIO_PIN_SET);
800074e: 2201 movs r2, #1
8000750: 2120 movs r1, #32
8000752: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000756: f001 fa69 bl 8001c2c <HAL_GPIO_WritePin>
HAL_Delay(1);
800075a: 2001 movs r0, #1
800075c: f000 fa20 bl 8000ba0 <HAL_Delay>
emuSPIsend(value);
8000760: 88fb ldrh r3, [r7, #6]
8000762: 4618 mov r0, r3
8000764: f000 f848 bl 80007f8 <emuSPIsend>
HAL_Delay(1);
8000768: 2001 movs r0, #1
800076a: f000 fa19 bl 8000ba0 <HAL_Delay>
CS_High();
800076e: f7ff ffbf bl 80006f0 <CS_High>
}
8000772: bf00 nop
8000774: 3708 adds r7, #8
8000776: 46bd mov sp, r7
8000778: bd80 pop {r7, pc}
...
0800077c <readLimits>:
uint8_t readLimits(warningflags* flags)
{
800077c: b580 push {r7, lr}
800077e: b084 sub sp, #16
8000780: af00 add r7, sp, #0
8000782: 6078 str r0, [r7, #4]
flags->overload = HAL_GPIO_ReadPin(OVERLOAD_GPIO_Port, OVERLOAD_Pin);
8000784: f44f 6180 mov.w r1, #1024 ; 0x400
8000788: 481a ldr r0, [pc, #104] ; (80007f4 <readLimits+0x78>)
800078a: f001 fa37 bl 8001bfc <HAL_GPIO_ReadPin>
800078e: 4603 mov r3, r0
8000790: 461a mov r2, r3
8000792: 687b ldr r3, [r7, #4]
8000794: 709a strb r2, [r3, #2]
flags->overtemp = HAL_GPIO_ReadPin(OVERTEMP_GPIO_Port, OVERTEMP_Pin);
8000796: 2102 movs r1, #2
8000798: 4816 ldr r0, [pc, #88] ; (80007f4 <readLimits+0x78>)
800079a: f001 fa2f bl 8001bfc <HAL_GPIO_ReadPin>
800079e: 4603 mov r3, r0
80007a0: 461a mov r2, r3
80007a2: 687b ldr r3, [r7, #4]
80007a4: 70da strb r2, [r3, #3]
flags->overvoltage = HAL_GPIO_ReadPin(OVERVOLTAGE_GPIO_Port, OVERVOLTAGE_Pin);
80007a6: f44f 6100 mov.w r1, #2048 ; 0x800
80007aa: 4812 ldr r0, [pc, #72] ; (80007f4 <readLimits+0x78>)
80007ac: f001 fa26 bl 8001bfc <HAL_GPIO_ReadPin>
80007b0: 4603 mov r3, r0
80007b2: 461a mov r2, r3
80007b4: 687b ldr r3, [r7, #4]
80007b6: 701a strb r2, [r3, #0]
flags->undervoltage = HAL_GPIO_ReadPin(UNDERVOLTAGE_GPIO_Port, UNDERVOLTAGE_Pin);
80007b8: 2104 movs r1, #4
80007ba: 480e ldr r0, [pc, #56] ; (80007f4 <readLimits+0x78>)
80007bc: f001 fa1e bl 8001bfc <HAL_GPIO_ReadPin>
80007c0: 4603 mov r3, r0
80007c2: 461a mov r2, r3
80007c4: 687b ldr r3, [r7, #4]
80007c6: 705a strb r2, [r3, #1]
uint8_t errorflag = (flags->overload + flags->overtemp + flags->undervoltage + flags->overvoltage) -4;
80007c8: 687b ldr r3, [r7, #4]
80007ca: 789a ldrb r2, [r3, #2]
80007cc: 687b ldr r3, [r7, #4]
80007ce: 78db ldrb r3, [r3, #3]
80007d0: 4413 add r3, r2
80007d2: b2da uxtb r2, r3
80007d4: 687b ldr r3, [r7, #4]
80007d6: 785b ldrb r3, [r3, #1]
80007d8: 4413 add r3, r2
80007da: b2da uxtb r2, r3
80007dc: 687b ldr r3, [r7, #4]
80007de: 781b ldrb r3, [r3, #0]
80007e0: 4413 add r3, r2
80007e2: b2db uxtb r3, r3
80007e4: 3b04 subs r3, #4
80007e6: 73fb strb r3, [r7, #15]
return errorflag;
80007e8: 7bfb ldrb r3, [r7, #15]
}
80007ea: 4618 mov r0, r3
80007ec: 3710 adds r7, #16
80007ee: 46bd mov sp, r7
80007f0: bd80 pop {r7, pc}
80007f2: bf00 nop
80007f4: 48000400 .word 0x48000400
080007f8 <emuSPIsend>:
void emuSPIsend(uint16_t data)
{
80007f8: b580 push {r7, lr}
80007fa: b084 sub sp, #16
80007fc: af00 add r7, sp, #0
80007fe: 4603 mov r3, r0
8000800: 80fb strh r3, [r7, #6]
for(int n = 15; n >= 0; n--)
8000802: 230f movs r3, #15
8000804: 60fb str r3, [r7, #12]
8000806: e025 b.n 8000854 <emuSPIsend+0x5c>
{
HAL_GPIO_WritePin(SPI1_DAT_GPIO_Port, SPI1_DAT_Pin, (0x1 & (data>>n)));
8000808: 88fa ldrh r2, [r7, #6]
800080a: 68fb ldr r3, [r7, #12]
800080c: fa42 f303 asr.w r3, r2, r3
8000810: b2db uxtb r3, r3
8000812: f003 0301 and.w r3, r3, #1
8000816: b2db uxtb r3, r3
8000818: 461a mov r2, r3
800081a: 2140 movs r1, #64 ; 0x40
800081c: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000820: f001 fa04 bl 8001c2c <HAL_GPIO_WritePin>
HAL_Delay(1);
8000824: 2001 movs r0, #1
8000826: f000 f9bb bl 8000ba0 <HAL_Delay>
HAL_GPIO_WritePin(SPI1_CLK_GPIO_Port, SPI1_CLK_Pin, GPIO_PIN_RESET);
800082a: 2200 movs r2, #0
800082c: 2120 movs r1, #32
800082e: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000832: f001 f9fb bl 8001c2c <HAL_GPIO_WritePin>
HAL_Delay(1);
8000836: 2001 movs r0, #1
8000838: f000 f9b2 bl 8000ba0 <HAL_Delay>
HAL_GPIO_WritePin(SPI1_CLK_GPIO_Port, SPI1_CLK_Pin, GPIO_PIN_SET);
800083c: 2201 movs r2, #1
800083e: 2120 movs r1, #32
8000840: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000844: f001 f9f2 bl 8001c2c <HAL_GPIO_WritePin>
HAL_Delay(1);
8000848: 2001 movs r0, #1
800084a: f000 f9a9 bl 8000ba0 <HAL_Delay>
for(int n = 15; n >= 0; n--)
800084e: 68fb ldr r3, [r7, #12]
8000850: 3b01 subs r3, #1
8000852: 60fb str r3, [r7, #12]
8000854: 68fb ldr r3, [r7, #12]
8000856: 2b00 cmp r3, #0
8000858: dad6 bge.n 8000808 <emuSPIsend+0x10>
}
}
800085a: bf00 nop
800085c: bf00 nop
800085e: 3710 adds r7, #16
8000860: 46bd mov sp, r7
8000862: bd80 pop {r7, pc}
08000864 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8000864: b480 push {r7}
8000866: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8000868: b672 cpsid i
}
800086a: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
800086c: e7fe b.n 800086c <Error_Handler+0x8>
...
08000870 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8000870: b480 push {r7}
8000872: b083 sub sp, #12
8000874: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8000876: 4b0f ldr r3, [pc, #60] ; (80008b4 <HAL_MspInit+0x44>)
8000878: 699b ldr r3, [r3, #24]
800087a: 4a0e ldr r2, [pc, #56] ; (80008b4 <HAL_MspInit+0x44>)
800087c: f043 0301 orr.w r3, r3, #1
8000880: 6193 str r3, [r2, #24]
8000882: 4b0c ldr r3, [pc, #48] ; (80008b4 <HAL_MspInit+0x44>)
8000884: 699b ldr r3, [r3, #24]
8000886: f003 0301 and.w r3, r3, #1
800088a: 607b str r3, [r7, #4]
800088c: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
800088e: 4b09 ldr r3, [pc, #36] ; (80008b4 <HAL_MspInit+0x44>)
8000890: 69db ldr r3, [r3, #28]
8000892: 4a08 ldr r2, [pc, #32] ; (80008b4 <HAL_MspInit+0x44>)
8000894: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8000898: 61d3 str r3, [r2, #28]
800089a: 4b06 ldr r3, [pc, #24] ; (80008b4 <HAL_MspInit+0x44>)
800089c: 69db ldr r3, [r3, #28]
800089e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80008a2: 603b str r3, [r7, #0]
80008a4: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80008a6: bf00 nop
80008a8: 370c adds r7, #12
80008aa: 46bd mov sp, r7
80008ac: f85d 7b04 ldr.w r7, [sp], #4
80008b0: 4770 bx lr
80008b2: bf00 nop
80008b4: 40021000 .word 0x40021000
080008b8 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80008b8: b480 push {r7}
80008ba: b085 sub sp, #20
80008bc: af00 add r7, sp, #0
80008be: 6078 str r0, [r7, #4]
if(hadc->Instance==ADC1)
80008c0: 687b ldr r3, [r7, #4]
80008c2: 681b ldr r3, [r3, #0]
80008c4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
80008c8: d10b bne.n 80008e2 <HAL_ADC_MspInit+0x2a>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC12_CLK_ENABLE();
80008ca: 4b09 ldr r3, [pc, #36] ; (80008f0 <HAL_ADC_MspInit+0x38>)
80008cc: 695b ldr r3, [r3, #20]
80008ce: 4a08 ldr r2, [pc, #32] ; (80008f0 <HAL_ADC_MspInit+0x38>)
80008d0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
80008d4: 6153 str r3, [r2, #20]
80008d6: 4b06 ldr r3, [pc, #24] ; (80008f0 <HAL_ADC_MspInit+0x38>)
80008d8: 695b ldr r3, [r3, #20]
80008da: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80008de: 60fb str r3, [r7, #12]
80008e0: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
80008e2: bf00 nop
80008e4: 3714 adds r7, #20
80008e6: 46bd mov sp, r7
80008e8: f85d 7b04 ldr.w r7, [sp], #4
80008ec: 4770 bx lr
80008ee: bf00 nop
80008f0: 40021000 .word 0x40021000
080008f4 <HAL_OPAMP_MspInit>:
* This function configures the hardware resources used in this example
* @param hopamp: OPAMP handle pointer
* @retval None
*/
void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
{
80008f4: b580 push {r7, lr}
80008f6: b088 sub sp, #32
80008f8: af00 add r7, sp, #0
80008fa: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80008fc: f107 030c add.w r3, r7, #12
8000900: 2200 movs r2, #0
8000902: 601a str r2, [r3, #0]
8000904: 605a str r2, [r3, #4]
8000906: 609a str r2, [r3, #8]
8000908: 60da str r2, [r3, #12]
800090a: 611a str r2, [r3, #16]
if(hopamp->Instance==OPAMP1)
800090c: 687b ldr r3, [r7, #4]
800090e: 681b ldr r3, [r3, #0]
8000910: 4a0f ldr r2, [pc, #60] ; (8000950 <HAL_OPAMP_MspInit+0x5c>)
8000912: 4293 cmp r3, r2
8000914: d118 bne.n 8000948 <HAL_OPAMP_MspInit+0x54>
{
/* USER CODE BEGIN OPAMP1_MspInit 0 */
/* USER CODE END OPAMP1_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8000916: 4b0f ldr r3, [pc, #60] ; (8000954 <HAL_OPAMP_MspInit+0x60>)
8000918: 695b ldr r3, [r3, #20]
800091a: 4a0e ldr r2, [pc, #56] ; (8000954 <HAL_OPAMP_MspInit+0x60>)
800091c: f443 3300 orr.w r3, r3, #131072 ; 0x20000
8000920: 6153 str r3, [r2, #20]
8000922: 4b0c ldr r3, [pc, #48] ; (8000954 <HAL_OPAMP_MspInit+0x60>)
8000924: 695b ldr r3, [r3, #20]
8000926: f403 3300 and.w r3, r3, #131072 ; 0x20000
800092a: 60bb str r3, [r7, #8]
800092c: 68bb ldr r3, [r7, #8]
/**OPAMP1 GPIO Configuration
PA1 ------> OPAMP1_VINP
PA2 ------> OPAMP1_VOUT
*/
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2;
800092e: 2306 movs r3, #6
8000930: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8000932: 2303 movs r3, #3
8000934: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000936: 2300 movs r3, #0
8000938: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800093a: f107 030c add.w r3, r7, #12
800093e: 4619 mov r1, r3
8000940: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
8000944: f000 ffe0 bl 8001908 <HAL_GPIO_Init>
/* USER CODE BEGIN OPAMP1_MspInit 1 */
/* USER CODE END OPAMP1_MspInit 1 */
}
}
8000948: bf00 nop
800094a: 3720 adds r7, #32
800094c: 46bd mov sp, r7
800094e: bd80 pop {r7, pc}
8000950: 40010038 .word 0x40010038
8000954: 40021000 .word 0x40021000
08000958 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8000958: b580 push {r7, lr}
800095a: b08a sub sp, #40 ; 0x28
800095c: af00 add r7, sp, #0
800095e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000960: f107 0314 add.w r3, r7, #20
8000964: 2200 movs r2, #0
8000966: 601a str r2, [r3, #0]
8000968: 605a str r2, [r3, #4]
800096a: 609a str r2, [r3, #8]
800096c: 60da str r2, [r3, #12]
800096e: 611a str r2, [r3, #16]
if(huart->Instance==USART1)
8000970: 687b ldr r3, [r7, #4]
8000972: 681b ldr r3, [r3, #0]
8000974: 4a17 ldr r2, [pc, #92] ; (80009d4 <HAL_UART_MspInit+0x7c>)
8000976: 4293 cmp r3, r2
8000978: d127 bne.n 80009ca <HAL_UART_MspInit+0x72>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
800097a: 4b17 ldr r3, [pc, #92] ; (80009d8 <HAL_UART_MspInit+0x80>)
800097c: 699b ldr r3, [r3, #24]
800097e: 4a16 ldr r2, [pc, #88] ; (80009d8 <HAL_UART_MspInit+0x80>)
8000980: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8000984: 6193 str r3, [r2, #24]
8000986: 4b14 ldr r3, [pc, #80] ; (80009d8 <HAL_UART_MspInit+0x80>)
8000988: 699b ldr r3, [r3, #24]
800098a: f403 4380 and.w r3, r3, #16384 ; 0x4000
800098e: 613b str r3, [r7, #16]
8000990: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000992: 4b11 ldr r3, [pc, #68] ; (80009d8 <HAL_UART_MspInit+0x80>)
8000994: 695b ldr r3, [r3, #20]
8000996: 4a10 ldr r2, [pc, #64] ; (80009d8 <HAL_UART_MspInit+0x80>)
8000998: f443 2380 orr.w r3, r3, #262144 ; 0x40000
800099c: 6153 str r3, [r2, #20]
800099e: 4b0e ldr r3, [pc, #56] ; (80009d8 <HAL_UART_MspInit+0x80>)
80009a0: 695b ldr r3, [r3, #20]
80009a2: f403 2380 and.w r3, r3, #262144 ; 0x40000
80009a6: 60fb str r3, [r7, #12]
80009a8: 68fb ldr r3, [r7, #12]
/**USART1 GPIO Configuration
PB6 ------> USART1_TX
PB7 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
80009aa: 23c0 movs r3, #192 ; 0xc0
80009ac: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80009ae: 2302 movs r3, #2
80009b0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80009b2: 2300 movs r3, #0
80009b4: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
80009b6: 2303 movs r3, #3
80009b8: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
80009ba: 2307 movs r3, #7
80009bc: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80009be: f107 0314 add.w r3, r7, #20
80009c2: 4619 mov r1, r3
80009c4: 4805 ldr r0, [pc, #20] ; (80009dc <HAL_UART_MspInit+0x84>)
80009c6: f000 ff9f bl 8001908 <HAL_GPIO_Init>
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
80009ca: bf00 nop
80009cc: 3728 adds r7, #40 ; 0x28
80009ce: 46bd mov sp, r7
80009d0: bd80 pop {r7, pc}
80009d2: bf00 nop
80009d4: 40013800 .word 0x40013800
80009d8: 40021000 .word 0x40021000
80009dc: 48000400 .word 0x48000400
080009e0 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
80009e0: b480 push {r7}
80009e2: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
80009e4: e7fe b.n 80009e4 <NMI_Handler+0x4>
080009e6 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
80009e6: b480 push {r7}
80009e8: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
80009ea: e7fe b.n 80009ea <HardFault_Handler+0x4>
080009ec <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
80009ec: b480 push {r7}
80009ee: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
80009f0: e7fe b.n 80009f0 <MemManage_Handler+0x4>
080009f2 <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
80009f2: b480 push {r7}
80009f4: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
80009f6: e7fe b.n 80009f6 <BusFault_Handler+0x4>
080009f8 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
80009f8: b480 push {r7}
80009fa: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
80009fc: e7fe b.n 80009fc <UsageFault_Handler+0x4>
080009fe <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
80009fe: b480 push {r7}
8000a00: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8000a02: bf00 nop
8000a04: 46bd mov sp, r7
8000a06: f85d 7b04 ldr.w r7, [sp], #4
8000a0a: 4770 bx lr
08000a0c <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8000a0c: b480 push {r7}
8000a0e: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8000a10: bf00 nop
8000a12: 46bd mov sp, r7
8000a14: f85d 7b04 ldr.w r7, [sp], #4
8000a18: 4770 bx lr
08000a1a <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8000a1a: b480 push {r7}
8000a1c: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8000a1e: bf00 nop
8000a20: 46bd mov sp, r7
8000a22: f85d 7b04 ldr.w r7, [sp], #4
8000a26: 4770 bx lr
08000a28 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8000a28: b580 push {r7, lr}
8000a2a: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8000a2c: f000 f898 bl 8000b60 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8000a30: bf00 nop
8000a32: bd80 pop {r7, pc}
08000a34 <USB_HP_CAN_TX_IRQHandler>:
/**
* @brief This function handles USB high priority or CAN_TX interrupts.
*/
void USB_HP_CAN_TX_IRQHandler(void)
{
8000a34: b580 push {r7, lr}
8000a36: af00 add r7, sp, #0
/* USER CODE BEGIN USB_HP_CAN_TX_IRQn 0 */
/* USER CODE END USB_HP_CAN_TX_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8000a38: 4802 ldr r0, [pc, #8] ; (8000a44 <USB_HP_CAN_TX_IRQHandler+0x10>)
8000a3a: f001 fab7 bl 8001fac <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_HP_CAN_TX_IRQn 1 */
/* USER CODE END USB_HP_CAN_TX_IRQn 1 */
}
8000a3e: bf00 nop
8000a40: bd80 pop {r7, pc}
8000a42: bf00 nop
8000a44: 20001084 .word 0x20001084
08000a48 <USB_LP_CAN_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN_RX0 interrupts.
*/
void USB_LP_CAN_RX0_IRQHandler(void)
{
8000a48: b580 push {r7, lr}
8000a4a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8000a4c: 4802 ldr r0, [pc, #8] ; (8000a58 <USB_LP_CAN_RX0_IRQHandler+0x10>)
8000a4e: f001 faad bl 8001fac <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN_RX0_IRQn 1 */
}
8000a52: bf00 nop
8000a54: bd80 pop {r7, pc}
8000a56: bf00 nop
8000a58: 20001084 .word 0x20001084
08000a5c <SystemInit>:
* @brief Setup the microcontroller system
* @param None
* @retval None
*/
void SystemInit(void)
{
8000a5c: b480 push {r7}
8000a5e: af00 add r7, sp, #0
/* FPU settings --------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
8000a60: 4b06 ldr r3, [pc, #24] ; (8000a7c <SystemInit+0x20>)
8000a62: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
8000a66: 4a05 ldr r2, [pc, #20] ; (8000a7c <SystemInit+0x20>)
8000a68: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
8000a6c: f8c2 3088 str.w r3, [r2, #136] ; 0x88
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
8000a70: bf00 nop
8000a72: 46bd mov sp, r7
8000a74: f85d 7b04 ldr.w r7, [sp], #4
8000a78: 4770 bx lr
8000a7a: bf00 nop
8000a7c: e000ed00 .word 0xe000ed00
08000a80 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* Atollic update: set stack pointer */
8000a80: f8df d034 ldr.w sp, [pc, #52] ; 8000ab8 <LoopForever+0x2>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8000a84: 480d ldr r0, [pc, #52] ; (8000abc <LoopForever+0x6>)
ldr r1, =_edata
8000a86: 490e ldr r1, [pc, #56] ; (8000ac0 <LoopForever+0xa>)
ldr r2, =_sidata
8000a88: 4a0e ldr r2, [pc, #56] ; (8000ac4 <LoopForever+0xe>)
movs r3, #0
8000a8a: 2300 movs r3, #0
b LoopCopyDataInit
8000a8c: e002 b.n 8000a94 <LoopCopyDataInit>
08000a8e <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8000a8e: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8000a90: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8000a92: 3304 adds r3, #4
08000a94 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8000a94: 18c4 adds r4, r0, r3
cmp r4, r1
8000a96: 428c cmp r4, r1
bcc CopyDataInit
8000a98: d3f9 bcc.n 8000a8e <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8000a9a: 4a0b ldr r2, [pc, #44] ; (8000ac8 <LoopForever+0x12>)
ldr r4, =_ebss
8000a9c: 4c0b ldr r4, [pc, #44] ; (8000acc <LoopForever+0x16>)
movs r3, #0
8000a9e: 2300 movs r3, #0
b LoopFillZerobss
8000aa0: e001 b.n 8000aa6 <LoopFillZerobss>
08000aa2 <FillZerobss>:
FillZerobss:
str r3, [r2]
8000aa2: 6013 str r3, [r2, #0]
adds r2, r2, #4
8000aa4: 3204 adds r2, #4
08000aa6 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8000aa6: 42a2 cmp r2, r4
bcc FillZerobss
8000aa8: d3fb bcc.n 8000aa2 <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8000aaa: f7ff ffd7 bl 8000a5c <SystemInit>
/* Call static constructors */
bl __libc_init_array
8000aae: f009 fa05 bl 8009ebc <__libc_init_array>
/* Call the application's entry point.*/
bl main
8000ab2: f7ff fb89 bl 80001c8 <main>
08000ab6 <LoopForever>:
LoopForever:
b LoopForever
8000ab6: e7fe b.n 8000ab6 <LoopForever>
ldr sp, =_estack /* Atollic update: set stack pointer */
8000ab8: 20008000 .word 0x20008000
ldr r0, =_sdata
8000abc: 20000000 .word 0x20000000
ldr r1, =_edata
8000ac0: 2000017c .word 0x2000017c
ldr r2, =_sidata
8000ac4: 08009fd0 .word 0x08009fd0
ldr r2, =_sbss
8000ac8: 2000017c .word 0x2000017c
ldr r4, =_ebss
8000acc: 20001590 .word 0x20001590
08000ad0 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8000ad0: e7fe b.n 8000ad0 <ADC1_2_IRQHandler>
...
08000ad4 <HAL_Init>:
* In the default implementation,Systick is used as source of time base.
* The tick variable is incremented each 1ms in its ISR.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8000ad4: b580 push {r7, lr}
8000ad6: af00 add r7, sp, #0
/* Configure Flash prefetch */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8000ad8: 4b08 ldr r3, [pc, #32] ; (8000afc <HAL_Init+0x28>)
8000ada: 681b ldr r3, [r3, #0]
8000adc: 4a07 ldr r2, [pc, #28] ; (8000afc <HAL_Init+0x28>)
8000ade: f043 0310 orr.w r3, r3, #16
8000ae2: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8000ae4: 2003 movs r0, #3
8000ae6: f000 fecd bl 8001884 <HAL_NVIC_SetPriorityGrouping>
/* Enable systick and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8000aea: 200f movs r0, #15
8000aec: f000 f808 bl 8000b00 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8000af0: f7ff febe bl 8000870 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8000af4: 2300 movs r3, #0
}
8000af6: 4618 mov r0, r3
8000af8: bd80 pop {r7, pc}
8000afa: bf00 nop
8000afc: 40022000 .word 0x40022000
08000b00 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8000b00: b580 push {r7, lr}
8000b02: b082 sub sp, #8
8000b04: af00 add r7, sp, #0
8000b06: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8000b08: 4b12 ldr r3, [pc, #72] ; (8000b54 <HAL_InitTick+0x54>)
8000b0a: 681a ldr r2, [r3, #0]
8000b0c: 4b12 ldr r3, [pc, #72] ; (8000b58 <HAL_InitTick+0x58>)
8000b0e: 781b ldrb r3, [r3, #0]
8000b10: 4619 mov r1, r3
8000b12: f44f 737a mov.w r3, #1000 ; 0x3e8
8000b16: fbb3 f3f1 udiv r3, r3, r1
8000b1a: fbb2 f3f3 udiv r3, r2, r3
8000b1e: 4618 mov r0, r3
8000b20: f000 fee5 bl 80018ee <HAL_SYSTICK_Config>
8000b24: 4603 mov r3, r0
8000b26: 2b00 cmp r3, #0
8000b28: d001 beq.n 8000b2e <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8000b2a: 2301 movs r3, #1
8000b2c: e00e b.n 8000b4c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8000b2e: 687b ldr r3, [r7, #4]
8000b30: 2b0f cmp r3, #15
8000b32: d80a bhi.n 8000b4a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8000b34: 2200 movs r2, #0
8000b36: 6879 ldr r1, [r7, #4]
8000b38: f04f 30ff mov.w r0, #4294967295
8000b3c: f000 fead bl 800189a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8000b40: 4a06 ldr r2, [pc, #24] ; (8000b5c <HAL_InitTick+0x5c>)
8000b42: 687b ldr r3, [r7, #4]
8000b44: 6013 str r3, [r2, #0]
else
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8000b46: 2300 movs r3, #0
8000b48: e000 b.n 8000b4c <HAL_InitTick+0x4c>
return HAL_ERROR;
8000b4a: 2301 movs r3, #1
}
8000b4c: 4618 mov r0, r3
8000b4e: 3708 adds r7, #8
8000b50: 46bd mov sp, r7
8000b52: bd80 pop {r7, pc}
8000b54: 20000000 .word 0x20000000
8000b58: 20000008 .word 0x20000008
8000b5c: 20000004 .word 0x20000004
08000b60 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8000b60: b480 push {r7}
8000b62: af00 add r7, sp, #0
uwTick += uwTickFreq;
8000b64: 4b06 ldr r3, [pc, #24] ; (8000b80 <HAL_IncTick+0x20>)
8000b66: 781b ldrb r3, [r3, #0]
8000b68: 461a mov r2, r3
8000b6a: 4b06 ldr r3, [pc, #24] ; (8000b84 <HAL_IncTick+0x24>)
8000b6c: 681b ldr r3, [r3, #0]
8000b6e: 4413 add r3, r2
8000b70: 4a04 ldr r2, [pc, #16] ; (8000b84 <HAL_IncTick+0x24>)
8000b72: 6013 str r3, [r2, #0]
}
8000b74: bf00 nop
8000b76: 46bd mov sp, r7
8000b78: f85d 7b04 ldr.w r7, [sp], #4
8000b7c: 4770 bx lr
8000b7e: bf00 nop
8000b80: 20000008 .word 0x20000008
8000b84: 200003a4 .word 0x200003a4
08000b88 <HAL_GetTick>:
* @note The function is declared as __Weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8000b88: b480 push {r7}
8000b8a: af00 add r7, sp, #0
return uwTick;
8000b8c: 4b03 ldr r3, [pc, #12] ; (8000b9c <HAL_GetTick+0x14>)
8000b8e: 681b ldr r3, [r3, #0]
}
8000b90: 4618 mov r0, r3
8000b92: 46bd mov sp, r7
8000b94: f85d 7b04 ldr.w r7, [sp], #4
8000b98: 4770 bx lr
8000b9a: bf00 nop
8000b9c: 200003a4 .word 0x200003a4
08000ba0 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
8000ba0: b580 push {r7, lr}
8000ba2: b084 sub sp, #16
8000ba4: af00 add r7, sp, #0
8000ba6: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8000ba8: f7ff ffee bl 8000b88 <HAL_GetTick>
8000bac: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
8000bae: 687b ldr r3, [r7, #4]
8000bb0: 60fb str r3, [r7, #12]
/* Add freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
8000bb2: 68fb ldr r3, [r7, #12]
8000bb4: f1b3 3fff cmp.w r3, #4294967295
8000bb8: d005 beq.n 8000bc6 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
8000bba: 4b0a ldr r3, [pc, #40] ; (8000be4 <HAL_Delay+0x44>)
8000bbc: 781b ldrb r3, [r3, #0]
8000bbe: 461a mov r2, r3
8000bc0: 68fb ldr r3, [r7, #12]
8000bc2: 4413 add r3, r2
8000bc4: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
8000bc6: bf00 nop
8000bc8: f7ff ffde bl 8000b88 <HAL_GetTick>
8000bcc: 4602 mov r2, r0
8000bce: 68bb ldr r3, [r7, #8]
8000bd0: 1ad3 subs r3, r2, r3
8000bd2: 68fa ldr r2, [r7, #12]
8000bd4: 429a cmp r2, r3
8000bd6: d8f7 bhi.n 8000bc8 <HAL_Delay+0x28>
{
}
}
8000bd8: bf00 nop
8000bda: bf00 nop
8000bdc: 3710 adds r7, #16
8000bde: 46bd mov sp, r7
8000be0: bd80 pop {r7, pc}
8000be2: bf00 nop
8000be4: 20000008 .word 0x20000008
08000be8 <HAL_ADC_Init>:
* without disabling the other ADCs sharing the same common group.
* @param hadc ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8000be8: b580 push {r7, lr}
8000bea: b09a sub sp, #104 ; 0x68
8000bec: af00 add r7, sp, #0
8000bee: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8000bf0: 2300 movs r3, #0
8000bf2: f887 3067 strb.w r3, [r7, #103] ; 0x67
ADC_Common_TypeDef *tmpADC_Common;
ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
uint32_t tmpCFGR = 0U;
8000bf6: 2300 movs r3, #0
8000bf8: 663b str r3, [r7, #96] ; 0x60
__IO uint32_t wait_loop_index = 0U;
8000bfa: 2300 movs r3, #0
8000bfc: 60bb str r3, [r7, #8]
/* Check ADC handle */
if(hadc == NULL)
8000bfe: 687b ldr r3, [r7, #4]
8000c00: 2b00 cmp r3, #0
8000c02: d101 bne.n 8000c08 <HAL_ADC_Init+0x20>
{
return HAL_ERROR;
8000c04: 2301 movs r3, #1
8000c06: e172 b.n 8000eee <HAL_ADC_Init+0x306>
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8000c08: 687b ldr r3, [r7, #4]
8000c0a: 691b ldr r3, [r3, #16]
8000c0c: 2b00 cmp r3, #0
assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
}
}
/* Configuration of ADC core parameters and ADC MSP related parameters */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
8000c0e: 687b ldr r3, [r7, #4]
8000c10: 6c1b ldr r3, [r3, #64] ; 0x40
8000c12: f003 0310 and.w r3, r3, #16
8000c16: 2b00 cmp r3, #0
8000c18: d176 bne.n 8000d08 <HAL_ADC_Init+0x120>
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
/* - ADC voltage regulator enable */
if (hadc->State == HAL_ADC_STATE_RESET)
8000c1a: 687b ldr r3, [r7, #4]
8000c1c: 6c1b ldr r3, [r3, #64] ; 0x40
8000c1e: 2b00 cmp r3, #0
8000c20: d152 bne.n 8000cc8 <HAL_ADC_Init+0xe0>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8000c22: 687b ldr r3, [r7, #4]
8000c24: 2200 movs r2, #0
8000c26: 645a str r2, [r3, #68] ; 0x44
/* Initialize HAL ADC API internal variables */
hadc->InjectionConfig.ChannelCount = 0U;
8000c28: 687b ldr r3, [r7, #4]
8000c2a: 2200 movs r2, #0
8000c2c: 64da str r2, [r3, #76] ; 0x4c
hadc->InjectionConfig.ContextQueue = 0U;
8000c2e: 687b ldr r3, [r7, #4]
8000c30: 2200 movs r2, #0
8000c32: 649a str r2, [r3, #72] ; 0x48
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8000c34: 687b ldr r3, [r7, #4]
8000c36: 2200 movs r2, #0
8000c38: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8000c3c: 6878 ldr r0, [r7, #4]
8000c3e: f7ff fe3b bl 80008b8 <HAL_ADC_MspInit>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
/* Enable voltage regulator (if disabled at this step) */
if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0))
8000c42: 687b ldr r3, [r7, #4]
8000c44: 681b ldr r3, [r3, #0]
8000c46: 689b ldr r3, [r3, #8]
8000c48: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000c4c: 2b00 cmp r3, #0
8000c4e: d13b bne.n 8000cc8 <HAL_ADC_Init+0xe0>
/* enabling the ADC. This temporization must be implemented by */
/* software and is equal to 10 us in the worst case */
/* process/temperature/power supply. */
/* Disable the ADC (if not already disabled) */
tmp_hal_status = ADC_Disable(hadc);
8000c50: 6878 ldr r0, [r7, #4]
8000c52: f000 fce1 bl 8001618 <ADC_Disable>
8000c56: 4603 mov r3, r0
8000c58: f887 3067 strb.w r3, [r7, #103] ; 0x67
/* Check if ADC is effectively disabled */
/* Configuration of ADC parameters if previous preliminary actions */
/* are correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8000c5c: 687b ldr r3, [r7, #4]
8000c5e: 6c1b ldr r3, [r3, #64] ; 0x40
8000c60: f003 0310 and.w r3, r3, #16
8000c64: 2b00 cmp r3, #0
8000c66: d12f bne.n 8000cc8 <HAL_ADC_Init+0xe0>
8000c68: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
8000c6c: 2b00 cmp r3, #0
8000c6e: d12b bne.n 8000cc8 <HAL_ADC_Init+0xe0>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000c70: 687b ldr r3, [r7, #4]
8000c72: 6c1b ldr r3, [r3, #64] ; 0x40
8000c74: f423 5388 bic.w r3, r3, #4352 ; 0x1100
8000c78: f023 0302 bic.w r3, r3, #2
8000c7c: f043 0202 orr.w r2, r3, #2
8000c80: 687b ldr r3, [r7, #4]
8000c82: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
HAL_ADC_STATE_BUSY_INTERNAL);
/* Set the intermediate state before moving the ADC voltage */
/* regulator to state enable. */
CLEAR_BIT(hadc->Instance->CR, (ADC_CR_ADVREGEN_1 | ADC_CR_ADVREGEN_0));
8000c84: 687b ldr r3, [r7, #4]
8000c86: 681b ldr r3, [r3, #0]
8000c88: 689a ldr r2, [r3, #8]
8000c8a: 687b ldr r3, [r7, #4]
8000c8c: 681b ldr r3, [r3, #0]
8000c8e: f022 5240 bic.w r2, r2, #805306368 ; 0x30000000
8000c92: 609a str r2, [r3, #8]
/* Set ADVREGEN bits to 0x01U */
SET_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN_0);
8000c94: 687b ldr r3, [r7, #4]
8000c96: 681b ldr r3, [r3, #0]
8000c98: 689a ldr r2, [r3, #8]
8000c9a: 687b ldr r3, [r7, #4]
8000c9c: 681b ldr r3, [r3, #0]
8000c9e: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000
8000ca2: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time. */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
8000ca4: 4b94 ldr r3, [pc, #592] ; (8000ef8 <HAL_ADC_Init+0x310>)
8000ca6: 681b ldr r3, [r3, #0]
8000ca8: 4a94 ldr r2, [pc, #592] ; (8000efc <HAL_ADC_Init+0x314>)
8000caa: fba2 2303 umull r2, r3, r2, r3
8000cae: 0c9a lsrs r2, r3, #18
8000cb0: 4613 mov r3, r2
8000cb2: 009b lsls r3, r3, #2
8000cb4: 4413 add r3, r2
8000cb6: 005b lsls r3, r3, #1
8000cb8: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8000cba: e002 b.n 8000cc2 <HAL_ADC_Init+0xda>
{
wait_loop_index--;
8000cbc: 68bb ldr r3, [r7, #8]
8000cbe: 3b01 subs r3, #1
8000cc0: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8000cc2: 68bb ldr r3, [r7, #8]
8000cc4: 2b00 cmp r3, #0
8000cc6: d1f9 bne.n 8000cbc <HAL_ADC_Init+0xd4>
}
/* Verification that ADC voltage regulator is correctly enabled, whether */
/* or not ADC is coming from state reset (if any potential problem of */
/* clocking, voltage regulator would not be enabled). */
if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0) ||
8000cc8: 687b ldr r3, [r7, #4]
8000cca: 681b ldr r3, [r3, #0]
8000ccc: 689b ldr r3, [r3, #8]
8000cce: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000cd2: 2b00 cmp r3, #0
8000cd4: d007 beq.n 8000ce6 <HAL_ADC_Init+0xfe>
HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADVREGEN_1) )
8000cd6: 687b ldr r3, [r7, #4]
8000cd8: 681b ldr r3, [r3, #0]
8000cda: 689b ldr r3, [r3, #8]
8000cdc: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0) ||
8000ce0: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
8000ce4: d110 bne.n 8000d08 <HAL_ADC_Init+0x120>
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8000ce6: 687b ldr r3, [r7, #4]
8000ce8: 6c1b ldr r3, [r3, #64] ; 0x40
8000cea: f023 0312 bic.w r3, r3, #18
8000cee: f043 0210 orr.w r2, r3, #16
8000cf2: 687b ldr r3, [r7, #4]
8000cf4: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000cf6: 687b ldr r3, [r7, #4]
8000cf8: 6c5b ldr r3, [r3, #68] ; 0x44
8000cfa: f043 0201 orr.w r2, r3, #1
8000cfe: 687b ldr r3, [r7, #4]
8000d00: 645a str r2, [r3, #68] ; 0x44
tmp_hal_status = HAL_ERROR;
8000d02: 2301 movs r3, #1
8000d04: f887 3067 strb.w r3, [r7, #103] ; 0x67
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed and if there is no conversion on going on regular */
/* group (ADC may already be enabled at this point if HAL_ADC_Init() is */
/* called to update a parameter on the fly). */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8000d08: 687b ldr r3, [r7, #4]
8000d0a: 6c1b ldr r3, [r3, #64] ; 0x40
8000d0c: f003 0310 and.w r3, r3, #16
8000d10: 2b00 cmp r3, #0
8000d12: f040 80df bne.w 8000ed4 <HAL_ADC_Init+0x2ec>
8000d16: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
8000d1a: 2b00 cmp r3, #0
8000d1c: f040 80da bne.w 8000ed4 <HAL_ADC_Init+0x2ec>
(tmp_hal_status == HAL_OK) &&
(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
8000d20: 687b ldr r3, [r7, #4]
8000d22: 681b ldr r3, [r3, #0]
8000d24: 689b ldr r3, [r3, #8]
8000d26: f003 0304 and.w r3, r3, #4
(tmp_hal_status == HAL_OK) &&
8000d2a: 2b00 cmp r3, #0
8000d2c: f040 80d2 bne.w 8000ed4 <HAL_ADC_Init+0x2ec>
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000d30: 687b ldr r3, [r7, #4]
8000d32: 6c1b ldr r3, [r3, #64] ; 0x40
8000d34: f423 7381 bic.w r3, r3, #258 ; 0x102
8000d38: f043 0202 orr.w r2, r3, #2
8000d3c: 687b ldr r3, [r7, #4]
8000d3e: 641a str r2, [r3, #64] ; 0x40
/* Configuration of common ADC parameters */
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
/* control registers) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
8000d40: 4b6f ldr r3, [pc, #444] ; (8000f00 <HAL_ADC_Init+0x318>)
8000d42: 65fb str r3, [r7, #92] ; 0x5c
/* Set handle of the other ADC sharing the same common register */
ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
8000d44: 687b ldr r3, [r7, #4]
8000d46: 681b ldr r3, [r3, #0]
8000d48: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
8000d4c: d102 bne.n 8000d54 <HAL_ADC_Init+0x16c>
8000d4e: 4b6d ldr r3, [pc, #436] ; (8000f04 <HAL_ADC_Init+0x31c>)
8000d50: 60fb str r3, [r7, #12]
8000d52: e002 b.n 8000d5a <HAL_ADC_Init+0x172>
8000d54: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000
8000d58: 60fb str r3, [r7, #12]
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated only when ADC is disabled: */
/* - Multimode clock configuration */
if ((ADC_IS_ENABLE(hadc) == RESET) &&
8000d5a: 687b ldr r3, [r7, #4]
8000d5c: 681b ldr r3, [r3, #0]
8000d5e: 689b ldr r3, [r3, #8]
8000d60: f003 0303 and.w r3, r3, #3
8000d64: 2b01 cmp r3, #1
8000d66: d108 bne.n 8000d7a <HAL_ADC_Init+0x192>
8000d68: 687b ldr r3, [r7, #4]
8000d6a: 681b ldr r3, [r3, #0]
8000d6c: 681b ldr r3, [r3, #0]
8000d6e: f003 0301 and.w r3, r3, #1
8000d72: 2b01 cmp r3, #1
8000d74: d101 bne.n 8000d7a <HAL_ADC_Init+0x192>
8000d76: 2301 movs r3, #1
8000d78: e000 b.n 8000d7c <HAL_ADC_Init+0x194>
8000d7a: 2300 movs r3, #0
8000d7c: 2b00 cmp r3, #0
8000d7e: d11c bne.n 8000dba <HAL_ADC_Init+0x1d2>
((tmphadcSharingSameCommonRegister.Instance == NULL) ||
8000d80: 68fb ldr r3, [r7, #12]
if ((ADC_IS_ENABLE(hadc) == RESET) &&
8000d82: 2b00 cmp r3, #0
8000d84: d010 beq.n 8000da8 <HAL_ADC_Init+0x1c0>
(ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) ) )
8000d86: 68fb ldr r3, [r7, #12]
8000d88: 689b ldr r3, [r3, #8]
8000d8a: f003 0303 and.w r3, r3, #3
8000d8e: 2b01 cmp r3, #1
8000d90: d107 bne.n 8000da2 <HAL_ADC_Init+0x1ba>
8000d92: 68fb ldr r3, [r7, #12]
8000d94: 681b ldr r3, [r3, #0]
8000d96: f003 0301 and.w r3, r3, #1
8000d9a: 2b01 cmp r3, #1
8000d9c: d101 bne.n 8000da2 <HAL_ADC_Init+0x1ba>
8000d9e: 2301 movs r3, #1
8000da0: e000 b.n 8000da4 <HAL_ADC_Init+0x1bc>
8000da2: 2300 movs r3, #0
((tmphadcSharingSameCommonRegister.Instance == NULL) ||
8000da4: 2b00 cmp r3, #0
8000da6: d108 bne.n 8000dba <HAL_ADC_Init+0x1d2>
/* into HAL_ADCEx_MultiModeConfigChannel() ) */
/* - internal measurement paths: Vbat, temperature sensor, Vref */
/* (set into HAL_ADC_ConfigChannel() or */
/* HAL_ADCEx_InjectedConfigChannel() ) */
MODIFY_REG(tmpADC_Common->CCR ,
8000da8: 6dfb ldr r3, [r7, #92] ; 0x5c
8000daa: 689b ldr r3, [r3, #8]
8000dac: f423 3240 bic.w r2, r3, #196608 ; 0x30000
8000db0: 687b ldr r3, [r7, #4]
8000db2: 685b ldr r3, [r3, #4]
8000db4: 431a orrs r2, r3
8000db6: 6dfb ldr r3, [r7, #92] ; 0x5c
8000db8: 609a str r2, [r3, #8]
/* - external trigger to start conversion */
/* - external trigger polarity */
/* - continuous conversion mode */
/* - overrun */
/* - discontinuous mode */
SET_BIT(tmpCFGR, ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
8000dba: 687b ldr r3, [r7, #4]
8000dbc: 7e5b ldrb r3, [r3, #25]
8000dbe: 035b lsls r3, r3, #13
8000dc0: 687a ldr r2, [r7, #4]
8000dc2: 6b52 ldr r2, [r2, #52] ; 0x34
8000dc4: 2a01 cmp r2, #1
8000dc6: d002 beq.n 8000dce <HAL_ADC_Init+0x1e6>
8000dc8: f44f 5280 mov.w r2, #4096 ; 0x1000
8000dcc: e000 b.n 8000dd0 <HAL_ADC_Init+0x1e8>
8000dce: 2200 movs r2, #0
8000dd0: 431a orrs r2, r3
8000dd2: 687b ldr r3, [r7, #4]
8000dd4: 68db ldr r3, [r3, #12]
8000dd6: 431a orrs r2, r3
8000dd8: 687b ldr r3, [r7, #4]
8000dda: 689b ldr r3, [r3, #8]
8000ddc: 4313 orrs r3, r2
8000dde: 6e3a ldr r2, [r7, #96] ; 0x60
8000de0: 4313 orrs r3, r2
8000de2: 663b str r3, [r7, #96] ; 0x60
ADC_CFGR_OVERRUN(hadc->Init.Overrun) |
hadc->Init.DataAlign |
hadc->Init.Resolution );
/* Enable discontinuous mode only if continuous mode is disabled */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8000de4: 687b ldr r3, [r7, #4]
8000de6: f893 3020 ldrb.w r3, [r3, #32]
8000dea: 2b01 cmp r3, #1
8000dec: d11b bne.n 8000e26 <HAL_ADC_Init+0x23e>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8000dee: 687b ldr r3, [r7, #4]
8000df0: 7e5b ldrb r3, [r3, #25]
8000df2: 2b00 cmp r3, #0
8000df4: d109 bne.n 8000e0a <HAL_ADC_Init+0x222>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmpCFGR, ADC_CFGR_DISCEN |
8000df6: 687b ldr r3, [r7, #4]
8000df8: 6a5b ldr r3, [r3, #36] ; 0x24
8000dfa: 3b01 subs r3, #1
8000dfc: 045a lsls r2, r3, #17
8000dfe: 6e3b ldr r3, [r7, #96] ; 0x60
8000e00: 4313 orrs r3, r2
8000e02: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8000e06: 663b str r3, [r7, #96] ; 0x60
8000e08: e00d b.n 8000e26 <HAL_ADC_Init+0x23e>
/* ADC regular group discontinuous was intended to be enabled, */
/* but ADC regular group modes continuous and sequencer discontinuous */
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8000e0a: 687b ldr r3, [r7, #4]
8000e0c: 6c1b ldr r3, [r3, #64] ; 0x40
8000e0e: f023 0322 bic.w r3, r3, #34 ; 0x22
8000e12: f043 0220 orr.w r2, r3, #32
8000e16: 687b ldr r3, [r7, #4]
8000e18: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_CONFIG);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000e1a: 687b ldr r3, [r7, #4]
8000e1c: 6c5b ldr r3, [r3, #68] ; 0x44
8000e1e: f043 0201 orr.w r2, r3, #1
8000e22: 687b ldr r3, [r7, #4]
8000e24: 645a str r2, [r3, #68] ; 0x44
/* Enable external trigger if trigger selection is different of software */
/* start. */
/* Note: This configuration keeps the hardware feature of parameter */
/* ExternalTrigConvEdge "trigger edge none" equivalent to */
/* software start. */
if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
8000e26: 687b ldr r3, [r7, #4]
8000e28: 6a9b ldr r3, [r3, #40] ; 0x28
8000e2a: 2b01 cmp r3, #1
8000e2c: d007 beq.n 8000e3e <HAL_ADC_Init+0x256>
{
SET_BIT(tmpCFGR, ADC_CFGR_EXTSEL_SET(hadc, hadc->Init.ExternalTrigConv) |
8000e2e: 687b ldr r3, [r7, #4]
8000e30: 6a9a ldr r2, [r3, #40] ; 0x28
8000e32: 687b ldr r3, [r7, #4]
8000e34: 6adb ldr r3, [r3, #44] ; 0x2c
8000e36: 4313 orrs r3, r2
8000e38: 6e3a ldr r2, [r7, #96] ; 0x60
8000e3a: 4313 orrs r3, r2
8000e3c: 663b str r3, [r7, #96] ; 0x60
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated when ADC is disabled or enabled without */
/* conversion on going on regular and injected groups: */
/* - DMA continuous request */
/* - LowPowerAutoWait feature */
if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
8000e3e: 687b ldr r3, [r7, #4]
8000e40: 681b ldr r3, [r3, #0]
8000e42: 689b ldr r3, [r3, #8]
8000e44: f003 030c and.w r3, r3, #12
8000e48: 2b00 cmp r3, #0
8000e4a: d114 bne.n 8000e76 <HAL_ADC_Init+0x28e>
{
CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_AUTDLY |
8000e4c: 687b ldr r3, [r7, #4]
8000e4e: 681b ldr r3, [r3, #0]
8000e50: 68db ldr r3, [r3, #12]
8000e52: 687a ldr r2, [r7, #4]
8000e54: 6812 ldr r2, [r2, #0]
8000e56: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8000e5a: f023 0302 bic.w r3, r3, #2
8000e5e: 60d3 str r3, [r2, #12]
ADC_CFGR_DMACFG );
SET_BIT(tmpCFGR, ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) |
8000e60: 687b ldr r3, [r7, #4]
8000e62: 7e1b ldrb r3, [r3, #24]
8000e64: 039a lsls r2, r3, #14
8000e66: 687b ldr r3, [r7, #4]
8000e68: f893 3030 ldrb.w r3, [r3, #48] ; 0x30
8000e6c: 005b lsls r3, r3, #1
8000e6e: 4313 orrs r3, r2
8000e70: 6e3a ldr r2, [r7, #96] ; 0x60
8000e72: 4313 orrs r3, r2
8000e74: 663b str r3, [r7, #96] ; 0x60
ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
}
/* Update ADC configuration register with previous settings */
MODIFY_REG(hadc->Instance->CFGR,
8000e76: 687b ldr r3, [r7, #4]
8000e78: 681b ldr r3, [r3, #0]
8000e7a: 68da ldr r2, [r3, #12]
8000e7c: 4b22 ldr r3, [pc, #136] ; (8000f08 <HAL_ADC_Init+0x320>)
8000e7e: 4013 ands r3, r2
8000e80: 687a ldr r2, [r7, #4]
8000e82: 6812 ldr r2, [r2, #0]
8000e84: 6e39 ldr r1, [r7, #96] ; 0x60
8000e86: 430b orrs r3, r1
8000e88: 60d3 str r3, [r2, #12]
/* Parameter "NbrOfConversion" is discarded. */
/* Note: Scan mode is not present by hardware on this device, but */
/* emulated by software for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
8000e8a: 687b ldr r3, [r7, #4]
8000e8c: 691b ldr r3, [r3, #16]
8000e8e: 2b01 cmp r3, #1
8000e90: d10c bne.n 8000eac <HAL_ADC_Init+0x2c4>
{
/* Set number of ranks in regular group sequencer */
MODIFY_REG(hadc->Instance->SQR1 ,
8000e92: 687b ldr r3, [r7, #4]
8000e94: 681b ldr r3, [r3, #0]
8000e96: 6b1b ldr r3, [r3, #48] ; 0x30
8000e98: f023 010f bic.w r1, r3, #15
8000e9c: 687b ldr r3, [r7, #4]
8000e9e: 69db ldr r3, [r3, #28]
8000ea0: 1e5a subs r2, r3, #1
8000ea2: 687b ldr r3, [r7, #4]
8000ea4: 681b ldr r3, [r3, #0]
8000ea6: 430a orrs r2, r1
8000ea8: 631a str r2, [r3, #48] ; 0x30
8000eaa: e007 b.n 8000ebc <HAL_ADC_Init+0x2d4>
ADC_SQR1_L ,
(hadc->Init.NbrOfConversion - (uint8_t)1U) );
}
else
{
CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L);
8000eac: 687b ldr r3, [r7, #4]
8000eae: 681b ldr r3, [r3, #0]
8000eb0: 6b1a ldr r2, [r3, #48] ; 0x30
8000eb2: 687b ldr r3, [r7, #4]
8000eb4: 681b ldr r3, [r3, #0]
8000eb6: f022 020f bic.w r2, r2, #15
8000eba: 631a str r2, [r3, #48] ; 0x30
}
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8000ebc: 687b ldr r3, [r7, #4]
8000ebe: 2200 movs r2, #0
8000ec0: 645a str r2, [r3, #68] ; 0x44
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000ec2: 687b ldr r3, [r7, #4]
8000ec4: 6c1b ldr r3, [r3, #64] ; 0x40
8000ec6: f023 0303 bic.w r3, r3, #3
8000eca: f043 0201 orr.w r2, r3, #1
8000ece: 687b ldr r3, [r7, #4]
8000ed0: 641a str r2, [r3, #64] ; 0x40
8000ed2: e00a b.n 8000eea <HAL_ADC_Init+0x302>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8000ed4: 687b ldr r3, [r7, #4]
8000ed6: 6c1b ldr r3, [r3, #64] ; 0x40
8000ed8: f023 0312 bic.w r3, r3, #18
8000edc: f043 0210 orr.w r2, r3, #16
8000ee0: 687b ldr r3, [r7, #4]
8000ee2: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
tmp_hal_status = HAL_ERROR;
8000ee4: 2301 movs r3, #1
8000ee6: f887 3067 strb.w r3, [r7, #103] ; 0x67
}
/* Return function status */
return tmp_hal_status;
8000eea: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
}
8000eee: 4618 mov r0, r3
8000ef0: 3768 adds r7, #104 ; 0x68
8000ef2: 46bd mov sp, r7
8000ef4: bd80 pop {r7, pc}
8000ef6: bf00 nop
8000ef8: 20000000 .word 0x20000000
8000efc: 431bde83 .word 0x431bde83
8000f00: 50000300 .word 0x50000300
8000f04: 50000100 .word 0x50000100
8000f08: fff0c007 .word 0xfff0c007
08000f0c <HAL_ADC_ConfigChannel>:
* @param hadc ADC handle
* @param sConfig Structure ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8000f0c: b480 push {r7}
8000f0e: b09b sub sp, #108 ; 0x6c
8000f10: af00 add r7, sp, #0
8000f12: 6078 str r0, [r7, #4]
8000f14: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8000f16: 2300 movs r3, #0
8000f18: f887 3067 strb.w r3, [r7, #103] ; 0x67
ADC_Common_TypeDef *tmpADC_Common;
ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
uint32_t tmpOffsetShifted;
__IO uint32_t wait_loop_index = 0U;
8000f1c: 2300 movs r3, #0
8000f1e: 60bb str r3, [r7, #8]
{
assert_param(IS_ADC_DIFF_CHANNEL(sConfig->Channel));
}
/* Process locked */
__HAL_LOCK(hadc);
8000f20: 687b ldr r3, [r7, #4]
8000f22: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
8000f26: 2b01 cmp r3, #1
8000f28: d101 bne.n 8000f2e <HAL_ADC_ConfigChannel+0x22>
8000f2a: 2302 movs r3, #2
8000f2c: e2a4 b.n 8001478 <HAL_ADC_ConfigChannel+0x56c>
8000f2e: 687b ldr r3, [r7, #4]
8000f30: 2201 movs r2, #1
8000f32: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated when ADC is disabled or enabled without */
/* conversion on going on regular group: */
/* - Channel number */
/* - Channel rank */
if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
8000f36: 687b ldr r3, [r7, #4]
8000f38: 681b ldr r3, [r3, #0]
8000f3a: 689b ldr r3, [r3, #8]
8000f3c: f003 0304 and.w r3, r3, #4
8000f40: 2b00 cmp r3, #0
8000f42: f040 8288 bne.w 8001456 <HAL_ADC_ConfigChannel+0x54a>
{
/* Regular sequence configuration */
/* For Rank 1 to 4U */
if (sConfig->Rank < 5U)
8000f46: 683b ldr r3, [r7, #0]
8000f48: 685b ldr r3, [r3, #4]
8000f4a: 2b04 cmp r3, #4
8000f4c: d81c bhi.n 8000f88 <HAL_ADC_ConfigChannel+0x7c>
{
MODIFY_REG(hadc->Instance->SQR1,
8000f4e: 687b ldr r3, [r7, #4]
8000f50: 681b ldr r3, [r3, #0]
8000f52: 6b19 ldr r1, [r3, #48] ; 0x30
8000f54: 683b ldr r3, [r7, #0]
8000f56: 685a ldr r2, [r3, #4]
8000f58: 4613 mov r3, r2
8000f5a: 005b lsls r3, r3, #1
8000f5c: 4413 add r3, r2
8000f5e: 005b lsls r3, r3, #1
8000f60: 461a mov r2, r3
8000f62: 231f movs r3, #31
8000f64: 4093 lsls r3, r2
8000f66: 43db mvns r3, r3
8000f68: 4019 ands r1, r3
8000f6a: 683b ldr r3, [r7, #0]
8000f6c: 6818 ldr r0, [r3, #0]
8000f6e: 683b ldr r3, [r7, #0]
8000f70: 685a ldr r2, [r3, #4]
8000f72: 4613 mov r3, r2
8000f74: 005b lsls r3, r3, #1
8000f76: 4413 add r3, r2
8000f78: 005b lsls r3, r3, #1
8000f7a: fa00 f203 lsl.w r2, r0, r3
8000f7e: 687b ldr r3, [r7, #4]
8000f80: 681b ldr r3, [r3, #0]
8000f82: 430a orrs r2, r1
8000f84: 631a str r2, [r3, #48] ; 0x30
8000f86: e063 b.n 8001050 <HAL_ADC_ConfigChannel+0x144>
ADC_SQR1_RK(ADC_SQR2_SQ5, sConfig->Rank) ,
ADC_SQR1_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 5 to 9U */
else if (sConfig->Rank < 10U)
8000f88: 683b ldr r3, [r7, #0]
8000f8a: 685b ldr r3, [r3, #4]
8000f8c: 2b09 cmp r3, #9
8000f8e: d81e bhi.n 8000fce <HAL_ADC_ConfigChannel+0xc2>
{
MODIFY_REG(hadc->Instance->SQR2,
8000f90: 687b ldr r3, [r7, #4]
8000f92: 681b ldr r3, [r3, #0]
8000f94: 6b59 ldr r1, [r3, #52] ; 0x34
8000f96: 683b ldr r3, [r7, #0]
8000f98: 685a ldr r2, [r3, #4]
8000f9a: 4613 mov r3, r2
8000f9c: 005b lsls r3, r3, #1
8000f9e: 4413 add r3, r2
8000fa0: 005b lsls r3, r3, #1
8000fa2: 3b1e subs r3, #30
8000fa4: 221f movs r2, #31
8000fa6: fa02 f303 lsl.w r3, r2, r3
8000faa: 43db mvns r3, r3
8000fac: 4019 ands r1, r3
8000fae: 683b ldr r3, [r7, #0]
8000fb0: 6818 ldr r0, [r3, #0]
8000fb2: 683b ldr r3, [r7, #0]
8000fb4: 685a ldr r2, [r3, #4]
8000fb6: 4613 mov r3, r2
8000fb8: 005b lsls r3, r3, #1
8000fba: 4413 add r3, r2
8000fbc: 005b lsls r3, r3, #1
8000fbe: 3b1e subs r3, #30
8000fc0: fa00 f203 lsl.w r2, r0, r3
8000fc4: 687b ldr r3, [r7, #4]
8000fc6: 681b ldr r3, [r3, #0]
8000fc8: 430a orrs r2, r1
8000fca: 635a str r2, [r3, #52] ; 0x34
8000fcc: e040 b.n 8001050 <HAL_ADC_ConfigChannel+0x144>
ADC_SQR2_RK(ADC_SQR2_SQ5, sConfig->Rank) ,
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 10 to 14U */
else if (sConfig->Rank < 15U)
8000fce: 683b ldr r3, [r7, #0]
8000fd0: 685b ldr r3, [r3, #4]
8000fd2: 2b0e cmp r3, #14
8000fd4: d81e bhi.n 8001014 <HAL_ADC_ConfigChannel+0x108>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8000fd6: 687b ldr r3, [r7, #4]
8000fd8: 681b ldr r3, [r3, #0]
8000fda: 6b99 ldr r1, [r3, #56] ; 0x38
8000fdc: 683b ldr r3, [r7, #0]
8000fde: 685a ldr r2, [r3, #4]
8000fe0: 4613 mov r3, r2
8000fe2: 005b lsls r3, r3, #1
8000fe4: 4413 add r3, r2
8000fe6: 005b lsls r3, r3, #1
8000fe8: 3b3c subs r3, #60 ; 0x3c
8000fea: 221f movs r2, #31
8000fec: fa02 f303 lsl.w r3, r2, r3
8000ff0: 43db mvns r3, r3
8000ff2: 4019 ands r1, r3
8000ff4: 683b ldr r3, [r7, #0]
8000ff6: 6818 ldr r0, [r3, #0]
8000ff8: 683b ldr r3, [r7, #0]
8000ffa: 685a ldr r2, [r3, #4]
8000ffc: 4613 mov r3, r2
8000ffe: 005b lsls r3, r3, #1
8001000: 4413 add r3, r2
8001002: 005b lsls r3, r3, #1
8001004: 3b3c subs r3, #60 ; 0x3c
8001006: fa00 f203 lsl.w r2, r0, r3
800100a: 687b ldr r3, [r7, #4]
800100c: 681b ldr r3, [r3, #0]
800100e: 430a orrs r2, r1
8001010: 639a str r2, [r3, #56] ; 0x38
8001012: e01d b.n 8001050 <HAL_ADC_ConfigChannel+0x144>
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 15 to 16U */
else
{
MODIFY_REG(hadc->Instance->SQR4 ,
8001014: 687b ldr r3, [r7, #4]
8001016: 681b ldr r3, [r3, #0]
8001018: 6bd9 ldr r1, [r3, #60] ; 0x3c
800101a: 683b ldr r3, [r7, #0]
800101c: 685a ldr r2, [r3, #4]
800101e: 4613 mov r3, r2
8001020: 005b lsls r3, r3, #1
8001022: 4413 add r3, r2
8001024: 005b lsls r3, r3, #1
8001026: 3b5a subs r3, #90 ; 0x5a
8001028: 221f movs r2, #31
800102a: fa02 f303 lsl.w r3, r2, r3
800102e: 43db mvns r3, r3
8001030: 4019 ands r1, r3
8001032: 683b ldr r3, [r7, #0]
8001034: 6818 ldr r0, [r3, #0]
8001036: 683b ldr r3, [r7, #0]
8001038: 685a ldr r2, [r3, #4]
800103a: 4613 mov r3, r2
800103c: 005b lsls r3, r3, #1
800103e: 4413 add r3, r2
8001040: 005b lsls r3, r3, #1
8001042: 3b5a subs r3, #90 ; 0x5a
8001044: fa00 f203 lsl.w r2, r0, r3
8001048: 687b ldr r3, [r7, #4]
800104a: 681b ldr r3, [r3, #0]
800104c: 430a orrs r2, r1
800104e: 63da str r2, [r3, #60] ; 0x3c
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated when ADC is disabled or enabled without */
/* conversion on going on regular group: */
/* - Channel sampling time */
/* - Channel offset */
if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
8001050: 687b ldr r3, [r7, #4]
8001052: 681b ldr r3, [r3, #0]
8001054: 689b ldr r3, [r3, #8]
8001056: f003 030c and.w r3, r3, #12
800105a: 2b00 cmp r3, #0
800105c: f040 80e5 bne.w 800122a <HAL_ADC_ConfigChannel+0x31e>
{
/* Channel sampling time configuration */
/* For channels 10 to 18U */
if (sConfig->Channel >= ADC_CHANNEL_10)
8001060: 683b ldr r3, [r7, #0]
8001062: 681b ldr r3, [r3, #0]
8001064: 2b09 cmp r3, #9
8001066: d91c bls.n 80010a2 <HAL_ADC_ConfigChannel+0x196>
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8001068: 687b ldr r3, [r7, #4]
800106a: 681b ldr r3, [r3, #0]
800106c: 6999 ldr r1, [r3, #24]
800106e: 683b ldr r3, [r7, #0]
8001070: 681a ldr r2, [r3, #0]
8001072: 4613 mov r3, r2
8001074: 005b lsls r3, r3, #1
8001076: 4413 add r3, r2
8001078: 3b1e subs r3, #30
800107a: 2207 movs r2, #7
800107c: fa02 f303 lsl.w r3, r2, r3
8001080: 43db mvns r3, r3
8001082: 4019 ands r1, r3
8001084: 683b ldr r3, [r7, #0]
8001086: 6898 ldr r0, [r3, #8]
8001088: 683b ldr r3, [r7, #0]
800108a: 681a ldr r2, [r3, #0]
800108c: 4613 mov r3, r2
800108e: 005b lsls r3, r3, #1
8001090: 4413 add r3, r2
8001092: 3b1e subs r3, #30
8001094: fa00 f203 lsl.w r2, r0, r3
8001098: 687b ldr r3, [r7, #4]
800109a: 681b ldr r3, [r3, #0]
800109c: 430a orrs r2, r1
800109e: 619a str r2, [r3, #24]
80010a0: e019 b.n 80010d6 <HAL_ADC_ConfigChannel+0x1ca>
ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel) ,
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 1 to 9U */
{
MODIFY_REG(hadc->Instance->SMPR1 ,
80010a2: 687b ldr r3, [r7, #4]
80010a4: 681b ldr r3, [r3, #0]
80010a6: 6959 ldr r1, [r3, #20]
80010a8: 683b ldr r3, [r7, #0]
80010aa: 681a ldr r2, [r3, #0]
80010ac: 4613 mov r3, r2
80010ae: 005b lsls r3, r3, #1
80010b0: 4413 add r3, r2
80010b2: 2207 movs r2, #7
80010b4: fa02 f303 lsl.w r3, r2, r3
80010b8: 43db mvns r3, r3
80010ba: 4019 ands r1, r3
80010bc: 683b ldr r3, [r7, #0]
80010be: 6898 ldr r0, [r3, #8]
80010c0: 683b ldr r3, [r7, #0]
80010c2: 681a ldr r2, [r3, #0]
80010c4: 4613 mov r3, r2
80010c6: 005b lsls r3, r3, #1
80010c8: 4413 add r3, r2
80010ca: fa00 f203 lsl.w r2, r0, r3
80010ce: 687b ldr r3, [r7, #4]
80010d0: 681b ldr r3, [r3, #0]
80010d2: 430a orrs r2, r1
80010d4: 615a str r2, [r3, #20]
/* Configure the offset: offset enable/disable, channel, offset value */
/* Shift the offset in function of the selected ADC resolution. */
/* Offset has to be left-aligned on bit 11U, the LSB (right bits) are set */
/* to 0. */
tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfig->Offset);
80010d6: 683b ldr r3, [r7, #0]
80010d8: 695a ldr r2, [r3, #20]
80010da: 687b ldr r3, [r7, #4]
80010dc: 681b ldr r3, [r3, #0]
80010de: 68db ldr r3, [r3, #12]
80010e0: 08db lsrs r3, r3, #3
80010e2: f003 0303 and.w r3, r3, #3
80010e6: 005b lsls r3, r3, #1
80010e8: fa02 f303 lsl.w r3, r2, r3
80010ec: 663b str r3, [r7, #96] ; 0x60
/* Configure the selected offset register: */
/* - Enable offset */
/* - Set channel number */
/* - Set offset value */
switch (sConfig->OffsetNumber)
80010ee: 683b ldr r3, [r7, #0]
80010f0: 691b ldr r3, [r3, #16]
80010f2: 3b01 subs r3, #1
80010f4: 2b03 cmp r3, #3
80010f6: d84f bhi.n 8001198 <HAL_ADC_ConfigChannel+0x28c>
80010f8: a201 add r2, pc, #4 ; (adr r2, 8001100 <HAL_ADC_ConfigChannel+0x1f4>)
80010fa: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80010fe: bf00 nop
8001100: 08001111 .word 0x08001111
8001104: 08001133 .word 0x08001133
8001108: 08001155 .word 0x08001155
800110c: 08001177 .word 0x08001177
{
case ADC_OFFSET_1:
/* Configure offset register 1U */
MODIFY_REG(hadc->Instance->OFR1 ,
8001110: 687b ldr r3, [r7, #4]
8001112: 681b ldr r3, [r3, #0]
8001114: 6e1a ldr r2, [r3, #96] ; 0x60
8001116: 4b94 ldr r3, [pc, #592] ; (8001368 <HAL_ADC_ConfigChannel+0x45c>)
8001118: 4013 ands r3, r2
800111a: 683a ldr r2, [r7, #0]
800111c: 6812 ldr r2, [r2, #0]
800111e: 0691 lsls r1, r2, #26
8001120: 6e3a ldr r2, [r7, #96] ; 0x60
8001122: 430a orrs r2, r1
8001124: 431a orrs r2, r3
8001126: 687b ldr r3, [r7, #4]
8001128: 681b ldr r3, [r3, #0]
800112a: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000
800112e: 661a str r2, [r3, #96] ; 0x60
ADC_OFR1_OFFSET1_CH |
ADC_OFR1_OFFSET1 ,
ADC_OFR1_OFFSET1_EN |
ADC_OFR_CHANNEL(sConfig->Channel) |
tmpOffsetShifted );
break;
8001130: e07e b.n 8001230 <HAL_ADC_ConfigChannel+0x324>
case ADC_OFFSET_2:
/* Configure offset register 2U */
MODIFY_REG(hadc->Instance->OFR2 ,
8001132: 687b ldr r3, [r7, #4]
8001134: 681b ldr r3, [r3, #0]
8001136: 6e5a ldr r2, [r3, #100] ; 0x64
8001138: 4b8b ldr r3, [pc, #556] ; (8001368 <HAL_ADC_ConfigChannel+0x45c>)
800113a: 4013 ands r3, r2
800113c: 683a ldr r2, [r7, #0]
800113e: 6812 ldr r2, [r2, #0]
8001140: 0691 lsls r1, r2, #26
8001142: 6e3a ldr r2, [r7, #96] ; 0x60
8001144: 430a orrs r2, r1
8001146: 431a orrs r2, r3
8001148: 687b ldr r3, [r7, #4]
800114a: 681b ldr r3, [r3, #0]
800114c: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000
8001150: 665a str r2, [r3, #100] ; 0x64
ADC_OFR2_OFFSET2_CH |
ADC_OFR2_OFFSET2 ,
ADC_OFR2_OFFSET2_EN |
ADC_OFR_CHANNEL(sConfig->Channel) |
tmpOffsetShifted );
break;
8001152: e06d b.n 8001230 <HAL_ADC_ConfigChannel+0x324>
case ADC_OFFSET_3:
/* Configure offset register 3U */
MODIFY_REG(hadc->Instance->OFR3 ,
8001154: 687b ldr r3, [r7, #4]
8001156: 681b ldr r3, [r3, #0]
8001158: 6e9a ldr r2, [r3, #104] ; 0x68
800115a: 4b83 ldr r3, [pc, #524] ; (8001368 <HAL_ADC_ConfigChannel+0x45c>)
800115c: 4013 ands r3, r2
800115e: 683a ldr r2, [r7, #0]
8001160: 6812 ldr r2, [r2, #0]
8001162: 0691 lsls r1, r2, #26
8001164: 6e3a ldr r2, [r7, #96] ; 0x60
8001166: 430a orrs r2, r1
8001168: 431a orrs r2, r3
800116a: 687b ldr r3, [r7, #4]
800116c: 681b ldr r3, [r3, #0]
800116e: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000
8001172: 669a str r2, [r3, #104] ; 0x68
ADC_OFR3_OFFSET3_CH |
ADC_OFR3_OFFSET3 ,
ADC_OFR3_OFFSET3_EN |
ADC_OFR_CHANNEL(sConfig->Channel) |
tmpOffsetShifted );
break;
8001174: e05c b.n 8001230 <HAL_ADC_ConfigChannel+0x324>
case ADC_OFFSET_4:
/* Configure offset register 4U */
MODIFY_REG(hadc->Instance->OFR4 ,
8001176: 687b ldr r3, [r7, #4]
8001178: 681b ldr r3, [r3, #0]
800117a: 6eda ldr r2, [r3, #108] ; 0x6c
800117c: 4b7a ldr r3, [pc, #488] ; (8001368 <HAL_ADC_ConfigChannel+0x45c>)
800117e: 4013 ands r3, r2
8001180: 683a ldr r2, [r7, #0]
8001182: 6812 ldr r2, [r2, #0]
8001184: 0691 lsls r1, r2, #26
8001186: 6e3a ldr r2, [r7, #96] ; 0x60
8001188: 430a orrs r2, r1
800118a: 431a orrs r2, r3
800118c: 687b ldr r3, [r7, #4]
800118e: 681b ldr r3, [r3, #0]
8001190: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000
8001194: 66da str r2, [r3, #108] ; 0x6c
ADC_OFR4_OFFSET4_CH |
ADC_OFR4_OFFSET4 ,
ADC_OFR4_OFFSET4_EN |
ADC_OFR_CHANNEL(sConfig->Channel) |
tmpOffsetShifted );
break;
8001196: e04b b.n 8001230 <HAL_ADC_ConfigChannel+0x324>
/* Case ADC_OFFSET_NONE */
default :
/* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is */
/* enabled. If this is the case, offset OFRx is disabled. */
if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
8001198: 687b ldr r3, [r7, #4]
800119a: 681b ldr r3, [r3, #0]
800119c: 6e1b ldr r3, [r3, #96] ; 0x60
800119e: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000
80011a2: 683b ldr r3, [r7, #0]
80011a4: 681b ldr r3, [r3, #0]
80011a6: 069b lsls r3, r3, #26
80011a8: 429a cmp r2, r3
80011aa: d107 bne.n 80011bc <HAL_ADC_ConfigChannel+0x2b0>
{
/* Disable offset OFR1*/
CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN);
80011ac: 687b ldr r3, [r7, #4]
80011ae: 681b ldr r3, [r3, #0]
80011b0: 6e1a ldr r2, [r3, #96] ; 0x60
80011b2: 687b ldr r3, [r7, #4]
80011b4: 681b ldr r3, [r3, #0]
80011b6: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000
80011ba: 661a str r2, [r3, #96] ; 0x60
}
if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
80011bc: 687b ldr r3, [r7, #4]
80011be: 681b ldr r3, [r3, #0]
80011c0: 6e5b ldr r3, [r3, #100] ; 0x64
80011c2: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000
80011c6: 683b ldr r3, [r7, #0]
80011c8: 681b ldr r3, [r3, #0]
80011ca: 069b lsls r3, r3, #26
80011cc: 429a cmp r2, r3
80011ce: d107 bne.n 80011e0 <HAL_ADC_ConfigChannel+0x2d4>
{
/* Disable offset OFR2*/
CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN);
80011d0: 687b ldr r3, [r7, #4]
80011d2: 681b ldr r3, [r3, #0]
80011d4: 6e5a ldr r2, [r3, #100] ; 0x64
80011d6: 687b ldr r3, [r7, #4]
80011d8: 681b ldr r3, [r3, #0]
80011da: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000
80011de: 665a str r2, [r3, #100] ; 0x64
}
if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
80011e0: 687b ldr r3, [r7, #4]
80011e2: 681b ldr r3, [r3, #0]
80011e4: 6e9b ldr r3, [r3, #104] ; 0x68
80011e6: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000
80011ea: 683b ldr r3, [r7, #0]
80011ec: 681b ldr r3, [r3, #0]
80011ee: 069b lsls r3, r3, #26
80011f0: 429a cmp r2, r3
80011f2: d107 bne.n 8001204 <HAL_ADC_ConfigChannel+0x2f8>
{
/* Disable offset OFR3*/
CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN);
80011f4: 687b ldr r3, [r7, #4]
80011f6: 681b ldr r3, [r3, #0]
80011f8: 6e9a ldr r2, [r3, #104] ; 0x68
80011fa: 687b ldr r3, [r7, #4]
80011fc: 681b ldr r3, [r3, #0]
80011fe: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000
8001202: 669a str r2, [r3, #104] ; 0x68
}
if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel))
8001204: 687b ldr r3, [r7, #4]
8001206: 681b ldr r3, [r3, #0]
8001208: 6edb ldr r3, [r3, #108] ; 0x6c
800120a: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000
800120e: 683b ldr r3, [r7, #0]
8001210: 681b ldr r3, [r3, #0]
8001212: 069b lsls r3, r3, #26
8001214: 429a cmp r2, r3
8001216: d10a bne.n 800122e <HAL_ADC_ConfigChannel+0x322>
{
/* Disable offset OFR4*/
CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN);
8001218: 687b ldr r3, [r7, #4]
800121a: 681b ldr r3, [r3, #0]
800121c: 6eda ldr r2, [r3, #108] ; 0x6c
800121e: 687b ldr r3, [r7, #4]
8001220: 681b ldr r3, [r3, #0]
8001222: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000
8001226: 66da str r2, [r3, #108] ; 0x6c
}
break;
8001228: e001 b.n 800122e <HAL_ADC_ConfigChannel+0x322>
}
}
800122a: bf00 nop
800122c: e000 b.n 8001230 <HAL_ADC_ConfigChannel+0x324>
break;
800122e: bf00 nop
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated only when ADC is disabled: */
/* - Single or differential mode */
/* - Internal measurement channels: Vbat/VrefInt/TempSensor */
if (ADC_IS_ENABLE(hadc) == RESET)
8001230: 687b ldr r3, [r7, #4]
8001232: 681b ldr r3, [r3, #0]
8001234: 689b ldr r3, [r3, #8]
8001236: f003 0303 and.w r3, r3, #3
800123a: 2b01 cmp r3, #1
800123c: d108 bne.n 8001250 <HAL_ADC_ConfigChannel+0x344>
800123e: 687b ldr r3, [r7, #4]
8001240: 681b ldr r3, [r3, #0]
8001242: 681b ldr r3, [r3, #0]
8001244: f003 0301 and.w r3, r3, #1
8001248: 2b01 cmp r3, #1
800124a: d101 bne.n 8001250 <HAL_ADC_ConfigChannel+0x344>
800124c: 2301 movs r3, #1
800124e: e000 b.n 8001252 <HAL_ADC_ConfigChannel+0x346>
8001250: 2300 movs r3, #0
8001252: 2b00 cmp r3, #0
8001254: f040 810a bne.w 800146c <HAL_ADC_ConfigChannel+0x560>
{
/* Configuration of differential mode */
if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
8001258: 683b ldr r3, [r7, #0]
800125a: 68db ldr r3, [r3, #12]
800125c: 2b01 cmp r3, #1
800125e: d00f beq.n 8001280 <HAL_ADC_ConfigChannel+0x374>
{
/* Disable differential mode (default mode: single-ended) */
CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel));
8001260: 687b ldr r3, [r7, #4]
8001262: 681b ldr r3, [r3, #0]
8001264: f8d3 10b0 ldr.w r1, [r3, #176] ; 0xb0
8001268: 683b ldr r3, [r7, #0]
800126a: 681b ldr r3, [r3, #0]
800126c: 2201 movs r2, #1
800126e: fa02 f303 lsl.w r3, r2, r3
8001272: 43da mvns r2, r3
8001274: 687b ldr r3, [r7, #4]
8001276: 681b ldr r3, [r3, #0]
8001278: 400a ands r2, r1
800127a: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0
800127e: e049 b.n 8001314 <HAL_ADC_ConfigChannel+0x408>
}
else
{
/* Enable differential mode */
SET_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel));
8001280: 687b ldr r3, [r7, #4]
8001282: 681b ldr r3, [r3, #0]
8001284: f8d3 10b0 ldr.w r1, [r3, #176] ; 0xb0
8001288: 683b ldr r3, [r7, #0]
800128a: 681b ldr r3, [r3, #0]
800128c: 2201 movs r2, #1
800128e: 409a lsls r2, r3
8001290: 687b ldr r3, [r7, #4]
8001292: 681b ldr r3, [r3, #0]
8001294: 430a orrs r2, r1
8001296: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0
/* Channel sampling time configuration (channel ADC_INx +1 */
/* corresponding to differential negative input). */
/* For channels 10 to 18U */
if (sConfig->Channel >= ADC_CHANNEL_10)
800129a: 683b ldr r3, [r7, #0]
800129c: 681b ldr r3, [r3, #0]
800129e: 2b09 cmp r3, #9
80012a0: d91c bls.n 80012dc <HAL_ADC_ConfigChannel+0x3d0>
{
MODIFY_REG(hadc->Instance->SMPR2,
80012a2: 687b ldr r3, [r7, #4]
80012a4: 681b ldr r3, [r3, #0]
80012a6: 6999 ldr r1, [r3, #24]
80012a8: 683b ldr r3, [r7, #0]
80012aa: 681a ldr r2, [r3, #0]
80012ac: 4613 mov r3, r2
80012ae: 005b lsls r3, r3, #1
80012b0: 4413 add r3, r2
80012b2: 3b1b subs r3, #27
80012b4: 2207 movs r2, #7
80012b6: fa02 f303 lsl.w r3, r2, r3
80012ba: 43db mvns r3, r3
80012bc: 4019 ands r1, r3
80012be: 683b ldr r3, [r7, #0]
80012c0: 6898 ldr r0, [r3, #8]
80012c2: 683b ldr r3, [r7, #0]
80012c4: 681a ldr r2, [r3, #0]
80012c6: 4613 mov r3, r2
80012c8: 005b lsls r3, r3, #1
80012ca: 4413 add r3, r2
80012cc: 3b1b subs r3, #27
80012ce: fa00 f203 lsl.w r2, r0, r3
80012d2: 687b ldr r3, [r7, #4]
80012d4: 681b ldr r3, [r3, #0]
80012d6: 430a orrs r2, r1
80012d8: 619a str r2, [r3, #24]
80012da: e01b b.n 8001314 <HAL_ADC_ConfigChannel+0x408>
ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel +1U) ,
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel +1U) );
}
else /* For channels 1 to 9U */
{
MODIFY_REG(hadc->Instance->SMPR1,
80012dc: 687b ldr r3, [r7, #4]
80012de: 681b ldr r3, [r3, #0]
80012e0: 6959 ldr r1, [r3, #20]
80012e2: 683b ldr r3, [r7, #0]
80012e4: 681b ldr r3, [r3, #0]
80012e6: 1c5a adds r2, r3, #1
80012e8: 4613 mov r3, r2
80012ea: 005b lsls r3, r3, #1
80012ec: 4413 add r3, r2
80012ee: 2207 movs r2, #7
80012f0: fa02 f303 lsl.w r3, r2, r3
80012f4: 43db mvns r3, r3
80012f6: 4019 ands r1, r3
80012f8: 683b ldr r3, [r7, #0]
80012fa: 6898 ldr r0, [r3, #8]
80012fc: 683b ldr r3, [r7, #0]
80012fe: 681b ldr r3, [r3, #0]
8001300: 1c5a adds r2, r3, #1
8001302: 4613 mov r3, r2
8001304: 005b lsls r3, r3, #1
8001306: 4413 add r3, r2
8001308: fa00 f203 lsl.w r2, r0, r3
800130c: 687b ldr r3, [r7, #4]
800130e: 681b ldr r3, [r3, #0]
8001310: 430a orrs r2, r1
8001312: 615a str r2, [r3, #20]
/* Configuration of common ADC parameters */
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
/* control registers) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
8001314: 4b15 ldr r3, [pc, #84] ; (800136c <HAL_ADC_ConfigChannel+0x460>)
8001316: 65fb str r3, [r7, #92] ; 0x5c
/* If the requested internal measurement path has already been enabled, */
/* bypass the configuration processing. */
if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) &&
8001318: 683b ldr r3, [r7, #0]
800131a: 681b ldr r3, [r3, #0]
800131c: 2b10 cmp r3, #16
800131e: d105 bne.n 800132c <HAL_ADC_ConfigChannel+0x420>
(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) ||
8001320: 6dfb ldr r3, [r7, #92] ; 0x5c
8001322: 689b ldr r3, [r3, #8]
8001324: f403 0300 and.w r3, r3, #8388608 ; 0x800000
if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) &&
8001328: 2b00 cmp r3, #0
800132a: d015 beq.n 8001358 <HAL_ADC_ConfigChannel+0x44c>
( (sConfig->Channel == ADC_CHANNEL_VBAT) &&
800132c: 683b ldr r3, [r7, #0]
800132e: 681b ldr r3, [r3, #0]
(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) ||
8001330: 2b11 cmp r3, #17
8001332: d105 bne.n 8001340 <HAL_ADC_ConfigChannel+0x434>
(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) ||
8001334: 6dfb ldr r3, [r7, #92] ; 0x5c
8001336: 689b ldr r3, [r3, #8]
8001338: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
( (sConfig->Channel == ADC_CHANNEL_VBAT) &&
800133c: 2b00 cmp r3, #0
800133e: d00b beq.n 8001358 <HAL_ADC_ConfigChannel+0x44c>
( (sConfig->Channel == ADC_CHANNEL_VREFINT) &&
8001340: 683b ldr r3, [r7, #0]
8001342: 681b ldr r3, [r3, #0]
(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) ||
8001344: 2b12 cmp r3, #18
8001346: f040 8091 bne.w 800146c <HAL_ADC_ConfigChannel+0x560>
(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN)))
800134a: 6dfb ldr r3, [r7, #92] ; 0x5c
800134c: 689b ldr r3, [r3, #8]
800134e: f403 0380 and.w r3, r3, #4194304 ; 0x400000
( (sConfig->Channel == ADC_CHANNEL_VREFINT) &&
8001352: 2b00 cmp r3, #0
8001354: f040 808a bne.w 800146c <HAL_ADC_ConfigChannel+0x560>
)
{
/* Configuration of common ADC parameters (continuation) */
/* Set handle of the other ADC sharing the same common register */
ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
8001358: 687b ldr r3, [r7, #4]
800135a: 681b ldr r3, [r3, #0]
800135c: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
8001360: d108 bne.n 8001374 <HAL_ADC_ConfigChannel+0x468>
8001362: 4b03 ldr r3, [pc, #12] ; (8001370 <HAL_ADC_ConfigChannel+0x464>)
8001364: 60fb str r3, [r7, #12]
8001366: e008 b.n 800137a <HAL_ADC_ConfigChannel+0x46e>
8001368: 83fff000 .word 0x83fff000
800136c: 50000300 .word 0x50000300
8001370: 50000100 .word 0x50000100
8001374: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000
8001378: 60fb str r3, [r7, #12]
/* Software is allowed to change common parameters only when all ADCs */
/* of the common group are disabled. */
if ((ADC_IS_ENABLE(hadc) == RESET) &&
800137a: 687b ldr r3, [r7, #4]
800137c: 681b ldr r3, [r3, #0]
800137e: 689b ldr r3, [r3, #8]
8001380: f003 0303 and.w r3, r3, #3
8001384: 2b01 cmp r3, #1
8001386: d108 bne.n 800139a <HAL_ADC_ConfigChannel+0x48e>
8001388: 687b ldr r3, [r7, #4]
800138a: 681b ldr r3, [r3, #0]
800138c: 681b ldr r3, [r3, #0]
800138e: f003 0301 and.w r3, r3, #1
8001392: 2b01 cmp r3, #1
8001394: d101 bne.n 800139a <HAL_ADC_ConfigChannel+0x48e>
8001396: 2301 movs r3, #1
8001398: e000 b.n 800139c <HAL_ADC_ConfigChannel+0x490>
800139a: 2300 movs r3, #0
800139c: 2b00 cmp r3, #0
800139e: d150 bne.n 8001442 <HAL_ADC_ConfigChannel+0x536>
( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
80013a0: 68fb ldr r3, [r7, #12]
if ((ADC_IS_ENABLE(hadc) == RESET) &&
80013a2: 2b00 cmp r3, #0
80013a4: d010 beq.n 80013c8 <HAL_ADC_ConfigChannel+0x4bc>
(ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) ) )
80013a6: 68fb ldr r3, [r7, #12]
80013a8: 689b ldr r3, [r3, #8]
80013aa: f003 0303 and.w r3, r3, #3
80013ae: 2b01 cmp r3, #1
80013b0: d107 bne.n 80013c2 <HAL_ADC_ConfigChannel+0x4b6>
80013b2: 68fb ldr r3, [r7, #12]
80013b4: 681b ldr r3, [r3, #0]
80013b6: f003 0301 and.w r3, r3, #1
80013ba: 2b01 cmp r3, #1
80013bc: d101 bne.n 80013c2 <HAL_ADC_ConfigChannel+0x4b6>
80013be: 2301 movs r3, #1
80013c0: e000 b.n 80013c4 <HAL_ADC_ConfigChannel+0x4b8>
80013c2: 2300 movs r3, #0
( (tmphadcSharingSameCommonRegister.Instance == NULL) ||
80013c4: 2b00 cmp r3, #0
80013c6: d13c bne.n 8001442 <HAL_ADC_ConfigChannel+0x536>
{
/* If Channel_16 is selected, enable Temp. sensor measurement path */
/* Note: Temp. sensor internal channels available on ADC1 only */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
80013c8: 683b ldr r3, [r7, #0]
80013ca: 681b ldr r3, [r3, #0]
80013cc: 2b10 cmp r3, #16
80013ce: d11d bne.n 800140c <HAL_ADC_ConfigChannel+0x500>
80013d0: 687b ldr r3, [r7, #4]
80013d2: 681b ldr r3, [r3, #0]
80013d4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
80013d8: d118 bne.n 800140c <HAL_ADC_ConfigChannel+0x500>
{
SET_BIT(tmpADC_Common->CCR, ADC_CCR_TSEN);
80013da: 6dfb ldr r3, [r7, #92] ; 0x5c
80013dc: 689b ldr r3, [r3, #8]
80013de: f443 0200 orr.w r2, r3, #8388608 ; 0x800000
80013e2: 6dfb ldr r3, [r7, #92] ; 0x5c
80013e4: 609a str r2, [r3, #8]
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
80013e6: 4b27 ldr r3, [pc, #156] ; (8001484 <HAL_ADC_ConfigChannel+0x578>)
80013e8: 681b ldr r3, [r3, #0]
80013ea: 4a27 ldr r2, [pc, #156] ; (8001488 <HAL_ADC_ConfigChannel+0x57c>)
80013ec: fba2 2303 umull r2, r3, r2, r3
80013f0: 0c9a lsrs r2, r3, #18
80013f2: 4613 mov r3, r2
80013f4: 009b lsls r3, r3, #2
80013f6: 4413 add r3, r2
80013f8: 005b lsls r3, r3, #1
80013fa: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80013fc: e002 b.n 8001404 <HAL_ADC_ConfigChannel+0x4f8>
{
wait_loop_index--;
80013fe: 68bb ldr r3, [r7, #8]
8001400: 3b01 subs r3, #1
8001402: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8001404: 68bb ldr r3, [r7, #8]
8001406: 2b00 cmp r3, #0
8001408: d1f9 bne.n 80013fe <HAL_ADC_ConfigChannel+0x4f2>
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
800140a: e02e b.n 800146a <HAL_ADC_ConfigChannel+0x55e>
}
}
/* If Channel_17 is selected, enable VBAT measurement path */
/* Note: VBAT internal channels available on ADC1 only */
else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && (hadc->Instance == ADC1))
800140c: 683b ldr r3, [r7, #0]
800140e: 681b ldr r3, [r3, #0]
8001410: 2b11 cmp r3, #17
8001412: d10b bne.n 800142c <HAL_ADC_ConfigChannel+0x520>
8001414: 687b ldr r3, [r7, #4]
8001416: 681b ldr r3, [r3, #0]
8001418: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
800141c: d106 bne.n 800142c <HAL_ADC_ConfigChannel+0x520>
{
SET_BIT(tmpADC_Common->CCR, ADC_CCR_VBATEN);
800141e: 6dfb ldr r3, [r7, #92] ; 0x5c
8001420: 689b ldr r3, [r3, #8]
8001422: f043 7280 orr.w r2, r3, #16777216 ; 0x1000000
8001426: 6dfb ldr r3, [r7, #92] ; 0x5c
8001428: 609a str r2, [r3, #8]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
800142a: e01e b.n 800146a <HAL_ADC_ConfigChannel+0x55e>
}
/* If Channel_18 is selected, enable VREFINT measurement path */
/* Note: VrefInt internal channels available on all ADCs, but only */
/* one ADC is allowed to be connected to VrefInt at the same */
/* time. */
else if (sConfig->Channel == ADC_CHANNEL_VREFINT)
800142c: 683b ldr r3, [r7, #0]
800142e: 681b ldr r3, [r3, #0]
8001430: 2b12 cmp r3, #18
8001432: d11a bne.n 800146a <HAL_ADC_ConfigChannel+0x55e>
{
SET_BIT(tmpADC_Common->CCR, ADC_CCR_VREFEN);
8001434: 6dfb ldr r3, [r7, #92] ; 0x5c
8001436: 689b ldr r3, [r3, #8]
8001438: f443 0280 orr.w r2, r3, #4194304 ; 0x400000
800143c: 6dfb ldr r3, [r7, #92] ; 0x5c
800143e: 609a str r2, [r3, #8]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
8001440: e013 b.n 800146a <HAL_ADC_ConfigChannel+0x55e>
/* enabled and other ADC of the common group are enabled, internal */
/* measurement paths cannot be enabled. */
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8001442: 687b ldr r3, [r7, #4]
8001444: 6c1b ldr r3, [r3, #64] ; 0x40
8001446: f043 0220 orr.w r2, r3, #32
800144a: 687b ldr r3, [r7, #4]
800144c: 641a str r2, [r3, #64] ; 0x40
tmp_hal_status = HAL_ERROR;
800144e: 2301 movs r3, #1
8001450: f887 3067 strb.w r3, [r7, #103] ; 0x67
8001454: e00a b.n 800146c <HAL_ADC_ConfigChannel+0x560>
/* channel could be done on neither of the channel configuration structure */
/* parameters. */
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8001456: 687b ldr r3, [r7, #4]
8001458: 6c1b ldr r3, [r3, #64] ; 0x40
800145a: f043 0220 orr.w r2, r3, #32
800145e: 687b ldr r3, [r7, #4]
8001460: 641a str r2, [r3, #64] ; 0x40
tmp_hal_status = HAL_ERROR;
8001462: 2301 movs r3, #1
8001464: f887 3067 strb.w r3, [r7, #103] ; 0x67
8001468: e000 b.n 800146c <HAL_ADC_ConfigChannel+0x560>
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
800146a: bf00 nop
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
800146c: 687b ldr r3, [r7, #4]
800146e: 2200 movs r2, #0
8001470: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Return function status */
return tmp_hal_status;
8001474: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
}
8001478: 4618 mov r0, r3
800147a: 376c adds r7, #108 ; 0x6c
800147c: 46bd mov sp, r7
800147e: f85d 7b04 ldr.w r7, [sp], #4
8001482: 4770 bx lr
8001484: 20000000 .word 0x20000000
8001488: 431bde83 .word 0x431bde83
0800148c <HAL_ADCEx_MultiModeConfigChannel>:
* @param hadc ADC handle
* @param multimode Structure of ADC multimode configuration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
{
800148c: b480 push {r7}
800148e: b099 sub sp, #100 ; 0x64
8001490: af00 add r7, sp, #0
8001492: 6078 str r0, [r7, #4]
8001494: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8001496: 2300 movs r3, #0
8001498: f887 305f strb.w r3, [r7, #95] ; 0x5f
assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
}
/* Set handle of the other ADC sharing the same common register */
ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
800149c: 687b ldr r3, [r7, #4]
800149e: 681b ldr r3, [r3, #0]
80014a0: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
80014a4: d102 bne.n 80014ac <HAL_ADCEx_MultiModeConfigChannel+0x20>
80014a6: 4b5a ldr r3, [pc, #360] ; (8001610 <HAL_ADCEx_MultiModeConfigChannel+0x184>)
80014a8: 60bb str r3, [r7, #8]
80014aa: e002 b.n 80014b2 <HAL_ADCEx_MultiModeConfigChannel+0x26>
80014ac: f04f 43a0 mov.w r3, #1342177280 ; 0x50000000
80014b0: 60bb str r3, [r7, #8]
if (tmphadcSharingSameCommonRegister.Instance == NULL)
80014b2: 68bb ldr r3, [r7, #8]
80014b4: 2b00 cmp r3, #0
80014b6: d101 bne.n 80014bc <HAL_ADCEx_MultiModeConfigChannel+0x30>
{
/* Return function status */
return HAL_ERROR;
80014b8: 2301 movs r3, #1
80014ba: e0a2 b.n 8001602 <HAL_ADCEx_MultiModeConfigChannel+0x176>
}
/* Process locked */
__HAL_LOCK(hadc);
80014bc: 687b ldr r3, [r7, #4]
80014be: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
80014c2: 2b01 cmp r3, #1
80014c4: d101 bne.n 80014ca <HAL_ADCEx_MultiModeConfigChannel+0x3e>
80014c6: 2302 movs r3, #2
80014c8: e09b b.n 8001602 <HAL_ADCEx_MultiModeConfigChannel+0x176>
80014ca: 687b ldr r3, [r7, #4]
80014cc: 2201 movs r2, #1
80014ce: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Parameters update conditioned to ADC state: */
/* Parameters that can be updated when ADC is disabled or enabled without */
/* conversion on going on regular group: */
/* - Multimode DMA configuration */
/* - Multimode DMA mode */
if ( (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
80014d2: 687b ldr r3, [r7, #4]
80014d4: 681b ldr r3, [r3, #0]
80014d6: 689b ldr r3, [r3, #8]
80014d8: f003 0304 and.w r3, r3, #4
80014dc: 2b00 cmp r3, #0
80014de: d17f bne.n 80015e0 <HAL_ADCEx_MultiModeConfigChannel+0x154>
&& (ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSharingSameCommonRegister) == RESET) )
80014e0: 68bb ldr r3, [r7, #8]
80014e2: 689b ldr r3, [r3, #8]
80014e4: f003 0304 and.w r3, r3, #4
80014e8: 2b00 cmp r3, #0
80014ea: d179 bne.n 80015e0 <HAL_ADCEx_MultiModeConfigChannel+0x154>
{
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F3 product, there may have up to 4 ADC and 2 common */
/* control registers) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
80014ec: 4b49 ldr r3, [pc, #292] ; (8001614 <HAL_ADCEx_MultiModeConfigChannel+0x188>)
80014ee: 65bb str r3, [r7, #88] ; 0x58
/* If multimode is selected, configure all multimode paramaters. */
/* Otherwise, reset multimode parameters (can be used in case of */
/* transition from multimode to independent mode). */
if(multimode->Mode != ADC_MODE_INDEPENDENT)
80014f0: 683b ldr r3, [r7, #0]
80014f2: 681b ldr r3, [r3, #0]
80014f4: 2b00 cmp r3, #0
80014f6: d040 beq.n 800157a <HAL_ADCEx_MultiModeConfigChannel+0xee>
{
/* Configuration of ADC common group ADC1&ADC2, ADC3&ADC4 if available */
/* (ADC2, ADC3, ADC4 availability depends on STM32 product) */
/* - DMA access mode */
MODIFY_REG(tmpADC_Common->CCR ,
80014f8: 6dbb ldr r3, [r7, #88] ; 0x58
80014fa: 689b ldr r3, [r3, #8]
80014fc: f423 4260 bic.w r2, r3, #57344 ; 0xe000
8001500: 683b ldr r3, [r7, #0]
8001502: 6859 ldr r1, [r3, #4]
8001504: 687b ldr r3, [r7, #4]
8001506: f893 3030 ldrb.w r3, [r3, #48] ; 0x30
800150a: 035b lsls r3, r3, #13
800150c: 430b orrs r3, r1
800150e: 431a orrs r2, r3
8001510: 6dbb ldr r3, [r7, #88] ; 0x58
8001512: 609a str r2, [r3, #8]
/* parameters, their setting is bypassed without error reporting */
/* (as it can be the expected behaviour in case of intended action */
/* to update parameter above (which fulfills the ADC state */
/* condition: no conversion on going on group regular) */
/* on the fly). */
if ((ADC_IS_ENABLE(hadc) == RESET) &&
8001514: 687b ldr r3, [r7, #4]
8001516: 681b ldr r3, [r3, #0]
8001518: 689b ldr r3, [r3, #8]
800151a: f003 0303 and.w r3, r3, #3
800151e: 2b01 cmp r3, #1
8001520: d108 bne.n 8001534 <HAL_ADCEx_MultiModeConfigChannel+0xa8>
8001522: 687b ldr r3, [r7, #4]
8001524: 681b ldr r3, [r3, #0]
8001526: 681b ldr r3, [r3, #0]
8001528: f003 0301 and.w r3, r3, #1
800152c: 2b01 cmp r3, #1
800152e: d101 bne.n 8001534 <HAL_ADCEx_MultiModeConfigChannel+0xa8>
8001530: 2301 movs r3, #1
8001532: e000 b.n 8001536 <HAL_ADCEx_MultiModeConfigChannel+0xaa>
8001534: 2300 movs r3, #0
8001536: 2b00 cmp r3, #0
8001538: d15c bne.n 80015f4 <HAL_ADCEx_MultiModeConfigChannel+0x168>
(ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) )
800153a: 68bb ldr r3, [r7, #8]
800153c: 689b ldr r3, [r3, #8]
800153e: f003 0303 and.w r3, r3, #3
8001542: 2b01 cmp r3, #1
8001544: d107 bne.n 8001556 <HAL_ADCEx_MultiModeConfigChannel+0xca>
8001546: 68bb ldr r3, [r7, #8]
8001548: 681b ldr r3, [r3, #0]
800154a: f003 0301 and.w r3, r3, #1
800154e: 2b01 cmp r3, #1
8001550: d101 bne.n 8001556 <HAL_ADCEx_MultiModeConfigChannel+0xca>
8001552: 2301 movs r3, #1
8001554: e000 b.n 8001558 <HAL_ADCEx_MultiModeConfigChannel+0xcc>
8001556: 2300 movs r3, #0
if ((ADC_IS_ENABLE(hadc) == RESET) &&
8001558: 2b00 cmp r3, #0
800155a: d14b bne.n 80015f4 <HAL_ADCEx_MultiModeConfigChannel+0x168>
{
MODIFY_REG(tmpADC_Common->CCR ,
800155c: 6dbb ldr r3, [r7, #88] ; 0x58
800155e: 689b ldr r3, [r3, #8]
8001560: f423 6371 bic.w r3, r3, #3856 ; 0xf10
8001564: f023 030f bic.w r3, r3, #15
8001568: 683a ldr r2, [r7, #0]
800156a: 6811 ldr r1, [r2, #0]
800156c: 683a ldr r2, [r7, #0]
800156e: 6892 ldr r2, [r2, #8]
8001570: 430a orrs r2, r1
8001572: 431a orrs r2, r3
8001574: 6dbb ldr r3, [r7, #88] ; 0x58
8001576: 609a str r2, [r3, #8]
if(multimode->Mode != ADC_MODE_INDEPENDENT)
8001578: e03c b.n 80015f4 <HAL_ADCEx_MultiModeConfigChannel+0x168>
multimode->TwoSamplingDelay );
}
}
else /* ADC_MODE_INDEPENDENT */
{
CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG);
800157a: 6dbb ldr r3, [r7, #88] ; 0x58
800157c: 689b ldr r3, [r3, #8]
800157e: f423 4260 bic.w r2, r3, #57344 ; 0xe000
8001582: 6dbb ldr r3, [r7, #88] ; 0x58
8001584: 609a str r2, [r3, #8]
/* Parameters that can be updated only when ADC is disabled: */
/* - Multimode mode selection */
/* - Multimode delay */
if ((ADC_IS_ENABLE(hadc) == RESET) &&
8001586: 687b ldr r3, [r7, #4]
8001588: 681b ldr r3, [r3, #0]
800158a: 689b ldr r3, [r3, #8]
800158c: f003 0303 and.w r3, r3, #3
8001590: 2b01 cmp r3, #1
8001592: d108 bne.n 80015a6 <HAL_ADCEx_MultiModeConfigChannel+0x11a>
8001594: 687b ldr r3, [r7, #4]
8001596: 681b ldr r3, [r3, #0]
8001598: 681b ldr r3, [r3, #0]
800159a: f003 0301 and.w r3, r3, #1
800159e: 2b01 cmp r3, #1
80015a0: d101 bne.n 80015a6 <HAL_ADCEx_MultiModeConfigChannel+0x11a>
80015a2: 2301 movs r3, #1
80015a4: e000 b.n 80015a8 <HAL_ADCEx_MultiModeConfigChannel+0x11c>
80015a6: 2300 movs r3, #0
80015a8: 2b00 cmp r3, #0
80015aa: d123 bne.n 80015f4 <HAL_ADCEx_MultiModeConfigChannel+0x168>
(ADC_IS_ENABLE(&tmphadcSharingSameCommonRegister) == RESET) )
80015ac: 68bb ldr r3, [r7, #8]
80015ae: 689b ldr r3, [r3, #8]
80015b0: f003 0303 and.w r3, r3, #3
80015b4: 2b01 cmp r3, #1
80015b6: d107 bne.n 80015c8 <HAL_ADCEx_MultiModeConfigChannel+0x13c>
80015b8: 68bb ldr r3, [r7, #8]
80015ba: 681b ldr r3, [r3, #0]
80015bc: f003 0301 and.w r3, r3, #1
80015c0: 2b01 cmp r3, #1
80015c2: d101 bne.n 80015c8 <HAL_ADCEx_MultiModeConfigChannel+0x13c>
80015c4: 2301 movs r3, #1
80015c6: e000 b.n 80015ca <HAL_ADCEx_MultiModeConfigChannel+0x13e>
80015c8: 2300 movs r3, #0
if ((ADC_IS_ENABLE(hadc) == RESET) &&
80015ca: 2b00 cmp r3, #0
80015cc: d112 bne.n 80015f4 <HAL_ADCEx_MultiModeConfigChannel+0x168>
{
CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MULTI | ADC_CCR_DELAY);
80015ce: 6dbb ldr r3, [r7, #88] ; 0x58
80015d0: 689b ldr r3, [r3, #8]
80015d2: f423 6371 bic.w r3, r3, #3856 ; 0xf10
80015d6: f023 030f bic.w r3, r3, #15
80015da: 6dba ldr r2, [r7, #88] ; 0x58
80015dc: 6093 str r3, [r2, #8]
if(multimode->Mode != ADC_MODE_INDEPENDENT)
80015de: e009 b.n 80015f4 <HAL_ADCEx_MultiModeConfigChannel+0x168>
/* If one of the ADC sharing the same common group is enabled, no update */
/* could be done on neither of the multimode structure parameters. */
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
80015e0: 687b ldr r3, [r7, #4]
80015e2: 6c1b ldr r3, [r3, #64] ; 0x40
80015e4: f043 0220 orr.w r2, r3, #32
80015e8: 687b ldr r3, [r7, #4]
80015ea: 641a str r2, [r3, #64] ; 0x40
tmp_hal_status = HAL_ERROR;
80015ec: 2301 movs r3, #1
80015ee: f887 305f strb.w r3, [r7, #95] ; 0x5f
80015f2: e000 b.n 80015f6 <HAL_ADCEx_MultiModeConfigChannel+0x16a>
if(multimode->Mode != ADC_MODE_INDEPENDENT)
80015f4: bf00 nop
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
80015f6: 687b ldr r3, [r7, #4]
80015f8: 2200 movs r2, #0
80015fa: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Return function status */
return tmp_hal_status;
80015fe: f897 305f ldrb.w r3, [r7, #95] ; 0x5f
}
8001602: 4618 mov r0, r3
8001604: 3764 adds r7, #100 ; 0x64
8001606: 46bd mov sp, r7
8001608: f85d 7b04 ldr.w r7, [sp], #4
800160c: 4770 bx lr
800160e: bf00 nop
8001610: 50000100 .word 0x50000100
8001614: 50000300 .word 0x50000300
08001618 <ADC_Disable>:
* stopped.
* @param hadc ADC handle
* @retval HAL status.
*/
static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
{
8001618: b580 push {r7, lr}
800161a: b084 sub sp, #16
800161c: af00 add r7, sp, #0
800161e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8001620: 2300 movs r3, #0
8001622: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled: */
/* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
/* disabled. */
if (ADC_IS_ENABLE(hadc) != RESET )
8001624: 687b ldr r3, [r7, #4]
8001626: 681b ldr r3, [r3, #0]
8001628: 689b ldr r3, [r3, #8]
800162a: f003 0303 and.w r3, r3, #3
800162e: 2b01 cmp r3, #1
8001630: d108 bne.n 8001644 <ADC_Disable+0x2c>
8001632: 687b ldr r3, [r7, #4]
8001634: 681b ldr r3, [r3, #0]
8001636: 681b ldr r3, [r3, #0]
8001638: f003 0301 and.w r3, r3, #1
800163c: 2b01 cmp r3, #1
800163e: d101 bne.n 8001644 <ADC_Disable+0x2c>
8001640: 2301 movs r3, #1
8001642: e000 b.n 8001646 <ADC_Disable+0x2e>
8001644: 2300 movs r3, #0
8001646: 2b00 cmp r3, #0
8001648: d047 beq.n 80016da <ADC_Disable+0xc2>
{
/* Check if conditions to disable the ADC are fulfilled */
if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
800164a: 687b ldr r3, [r7, #4]
800164c: 681b ldr r3, [r3, #0]
800164e: 689b ldr r3, [r3, #8]
8001650: f003 030d and.w r3, r3, #13
8001654: 2b01 cmp r3, #1
8001656: d10f bne.n 8001678 <ADC_Disable+0x60>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8001658: 687b ldr r3, [r7, #4]
800165a: 681b ldr r3, [r3, #0]
800165c: 689a ldr r2, [r3, #8]
800165e: 687b ldr r3, [r7, #4]
8001660: 681b ldr r3, [r3, #0]
8001662: f042 0202 orr.w r2, r2, #2
8001666: 609a str r2, [r3, #8]
8001668: 687b ldr r3, [r7, #4]
800166a: 681b ldr r3, [r3, #0]
800166c: 2203 movs r2, #3
800166e: 601a str r2, [r3, #0]
return HAL_ERROR;
}
/* Wait for ADC effectively disabled */
tickstart = HAL_GetTick();
8001670: f7ff fa8a bl 8000b88 <HAL_GetTick>
8001674: 60f8 str r0, [r7, #12]
while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
8001676: e029 b.n 80016cc <ADC_Disable+0xb4>
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8001678: 687b ldr r3, [r7, #4]
800167a: 6c1b ldr r3, [r3, #64] ; 0x40
800167c: f043 0210 orr.w r2, r3, #16
8001680: 687b ldr r3, [r7, #4]
8001682: 641a str r2, [r3, #64] ; 0x40
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8001684: 687b ldr r3, [r7, #4]
8001686: 6c5b ldr r3, [r3, #68] ; 0x44
8001688: f043 0201 orr.w r2, r3, #1
800168c: 687b ldr r3, [r7, #4]
800168e: 645a str r2, [r3, #68] ; 0x44
return HAL_ERROR;
8001690: 2301 movs r3, #1
8001692: e023 b.n 80016dc <ADC_Disable+0xc4>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
8001694: f7ff fa78 bl 8000b88 <HAL_GetTick>
8001698: 4602 mov r2, r0
800169a: 68fb ldr r3, [r7, #12]
800169c: 1ad3 subs r3, r2, r3
800169e: 2b02 cmp r3, #2
80016a0: d914 bls.n 80016cc <ADC_Disable+0xb4>
{
/* New check to avoid false timeout detection in case of preemption */
if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
80016a2: 687b ldr r3, [r7, #4]
80016a4: 681b ldr r3, [r3, #0]
80016a6: 689b ldr r3, [r3, #8]
80016a8: f003 0301 and.w r3, r3, #1
80016ac: 2b01 cmp r3, #1
80016ae: d10d bne.n 80016cc <ADC_Disable+0xb4>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80016b0: 687b ldr r3, [r7, #4]
80016b2: 6c1b ldr r3, [r3, #64] ; 0x40
80016b4: f043 0210 orr.w r2, r3, #16
80016b8: 687b ldr r3, [r7, #4]
80016ba: 641a str r2, [r3, #64] ; 0x40
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80016bc: 687b ldr r3, [r7, #4]
80016be: 6c5b ldr r3, [r3, #68] ; 0x44
80016c0: f043 0201 orr.w r2, r3, #1
80016c4: 687b ldr r3, [r7, #4]
80016c6: 645a str r2, [r3, #68] ; 0x44
return HAL_ERROR;
80016c8: 2301 movs r3, #1
80016ca: e007 b.n 80016dc <ADC_Disable+0xc4>
while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
80016cc: 687b ldr r3, [r7, #4]
80016ce: 681b ldr r3, [r3, #0]
80016d0: 689b ldr r3, [r3, #8]
80016d2: f003 0301 and.w r3, r3, #1
80016d6: 2b01 cmp r3, #1
80016d8: d0dc beq.n 8001694 <ADC_Disable+0x7c>
}
}
}
/* Return HAL status */
return HAL_OK;
80016da: 2300 movs r3, #0
}
80016dc: 4618 mov r0, r3
80016de: 3710 adds r7, #16
80016e0: 46bd mov sp, r7
80016e2: bd80 pop {r7, pc}
080016e4 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80016e4: b480 push {r7}
80016e6: b085 sub sp, #20
80016e8: af00 add r7, sp, #0
80016ea: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80016ec: 687b ldr r3, [r7, #4]
80016ee: f003 0307 and.w r3, r3, #7
80016f2: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
80016f4: 4b0c ldr r3, [pc, #48] ; (8001728 <__NVIC_SetPriorityGrouping+0x44>)
80016f6: 68db ldr r3, [r3, #12]
80016f8: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
80016fa: 68ba ldr r2, [r7, #8]
80016fc: f64f 03ff movw r3, #63743 ; 0xf8ff
8001700: 4013 ands r3, r2
8001702: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8001704: 68fb ldr r3, [r7, #12]
8001706: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8001708: 68bb ldr r3, [r7, #8]
800170a: 4313 orrs r3, r2
reg_value = (reg_value |
800170c: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
8001710: f443 3300 orr.w r3, r3, #131072 ; 0x20000
8001714: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8001716: 4a04 ldr r2, [pc, #16] ; (8001728 <__NVIC_SetPriorityGrouping+0x44>)
8001718: 68bb ldr r3, [r7, #8]
800171a: 60d3 str r3, [r2, #12]
}
800171c: bf00 nop
800171e: 3714 adds r7, #20
8001720: 46bd mov sp, r7
8001722: f85d 7b04 ldr.w r7, [sp], #4
8001726: 4770 bx lr
8001728: e000ed00 .word 0xe000ed00
0800172c <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
800172c: b480 push {r7}
800172e: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8001730: 4b04 ldr r3, [pc, #16] ; (8001744 <__NVIC_GetPriorityGrouping+0x18>)
8001732: 68db ldr r3, [r3, #12]
8001734: 0a1b lsrs r3, r3, #8
8001736: f003 0307 and.w r3, r3, #7
}
800173a: 4618 mov r0, r3
800173c: 46bd mov sp, r7
800173e: f85d 7b04 ldr.w r7, [sp], #4
8001742: 4770 bx lr
8001744: e000ed00 .word 0xe000ed00
08001748 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001748: b480 push {r7}
800174a: b083 sub sp, #12
800174c: af00 add r7, sp, #0
800174e: 4603 mov r3, r0
8001750: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001752: f997 3007 ldrsb.w r3, [r7, #7]
8001756: 2b00 cmp r3, #0
8001758: db0b blt.n 8001772 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800175a: 79fb ldrb r3, [r7, #7]
800175c: f003 021f and.w r2, r3, #31
8001760: 4907 ldr r1, [pc, #28] ; (8001780 <__NVIC_EnableIRQ+0x38>)
8001762: f997 3007 ldrsb.w r3, [r7, #7]
8001766: 095b lsrs r3, r3, #5
8001768: 2001 movs r0, #1
800176a: fa00 f202 lsl.w r2, r0, r2
800176e: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8001772: bf00 nop
8001774: 370c adds r7, #12
8001776: 46bd mov sp, r7
8001778: f85d 7b04 ldr.w r7, [sp], #4
800177c: 4770 bx lr
800177e: bf00 nop
8001780: e000e100 .word 0xe000e100
08001784 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8001784: b480 push {r7}
8001786: b083 sub sp, #12
8001788: af00 add r7, sp, #0
800178a: 4603 mov r3, r0
800178c: 6039 str r1, [r7, #0]
800178e: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001790: f997 3007 ldrsb.w r3, [r7, #7]
8001794: 2b00 cmp r3, #0
8001796: db0a blt.n 80017ae <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8001798: 683b ldr r3, [r7, #0]
800179a: b2da uxtb r2, r3
800179c: 490c ldr r1, [pc, #48] ; (80017d0 <__NVIC_SetPriority+0x4c>)
800179e: f997 3007 ldrsb.w r3, [r7, #7]
80017a2: 0112 lsls r2, r2, #4
80017a4: b2d2 uxtb r2, r2
80017a6: 440b add r3, r1
80017a8: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80017ac: e00a b.n 80017c4 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80017ae: 683b ldr r3, [r7, #0]
80017b0: b2da uxtb r2, r3
80017b2: 4908 ldr r1, [pc, #32] ; (80017d4 <__NVIC_SetPriority+0x50>)
80017b4: 79fb ldrb r3, [r7, #7]
80017b6: f003 030f and.w r3, r3, #15
80017ba: 3b04 subs r3, #4
80017bc: 0112 lsls r2, r2, #4
80017be: b2d2 uxtb r2, r2
80017c0: 440b add r3, r1
80017c2: 761a strb r2, [r3, #24]
}
80017c4: bf00 nop
80017c6: 370c adds r7, #12
80017c8: 46bd mov sp, r7
80017ca: f85d 7b04 ldr.w r7, [sp], #4
80017ce: 4770 bx lr
80017d0: e000e100 .word 0xe000e100
80017d4: e000ed00 .word 0xe000ed00
080017d8 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
80017d8: b480 push {r7}
80017da: b089 sub sp, #36 ; 0x24
80017dc: af00 add r7, sp, #0
80017de: 60f8 str r0, [r7, #12]
80017e0: 60b9 str r1, [r7, #8]
80017e2: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80017e4: 68fb ldr r3, [r7, #12]
80017e6: f003 0307 and.w r3, r3, #7
80017ea: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
80017ec: 69fb ldr r3, [r7, #28]
80017ee: f1c3 0307 rsb r3, r3, #7
80017f2: 2b04 cmp r3, #4
80017f4: bf28 it cs
80017f6: 2304 movcs r3, #4
80017f8: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
80017fa: 69fb ldr r3, [r7, #28]
80017fc: 3304 adds r3, #4
80017fe: 2b06 cmp r3, #6
8001800: d902 bls.n 8001808 <NVIC_EncodePriority+0x30>
8001802: 69fb ldr r3, [r7, #28]
8001804: 3b03 subs r3, #3
8001806: e000 b.n 800180a <NVIC_EncodePriority+0x32>
8001808: 2300 movs r3, #0
800180a: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
800180c: f04f 32ff mov.w r2, #4294967295
8001810: 69bb ldr r3, [r7, #24]
8001812: fa02 f303 lsl.w r3, r2, r3
8001816: 43da mvns r2, r3
8001818: 68bb ldr r3, [r7, #8]
800181a: 401a ands r2, r3
800181c: 697b ldr r3, [r7, #20]
800181e: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8001820: f04f 31ff mov.w r1, #4294967295
8001824: 697b ldr r3, [r7, #20]
8001826: fa01 f303 lsl.w r3, r1, r3
800182a: 43d9 mvns r1, r3
800182c: 687b ldr r3, [r7, #4]
800182e: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001830: 4313 orrs r3, r2
);
}
8001832: 4618 mov r0, r3
8001834: 3724 adds r7, #36 ; 0x24
8001836: 46bd mov sp, r7
8001838: f85d 7b04 ldr.w r7, [sp], #4
800183c: 4770 bx lr
...
08001840 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8001840: b580 push {r7, lr}
8001842: b082 sub sp, #8
8001844: af00 add r7, sp, #0
8001846: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8001848: 687b ldr r3, [r7, #4]
800184a: 3b01 subs r3, #1
800184c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
8001850: d301 bcc.n 8001856 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8001852: 2301 movs r3, #1
8001854: e00f b.n 8001876 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8001856: 4a0a ldr r2, [pc, #40] ; (8001880 <SysTick_Config+0x40>)
8001858: 687b ldr r3, [r7, #4]
800185a: 3b01 subs r3, #1
800185c: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
800185e: 210f movs r1, #15
8001860: f04f 30ff mov.w r0, #4294967295
8001864: f7ff ff8e bl 8001784 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8001868: 4b05 ldr r3, [pc, #20] ; (8001880 <SysTick_Config+0x40>)
800186a: 2200 movs r2, #0
800186c: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
800186e: 4b04 ldr r3, [pc, #16] ; (8001880 <SysTick_Config+0x40>)
8001870: 2207 movs r2, #7
8001872: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8001874: 2300 movs r3, #0
}
8001876: 4618 mov r0, r3
8001878: 3708 adds r7, #8
800187a: 46bd mov sp, r7
800187c: bd80 pop {r7, pc}
800187e: bf00 nop
8001880: e000e010 .word 0xe000e010
08001884 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8001884: b580 push {r7, lr}
8001886: b082 sub sp, #8
8001888: af00 add r7, sp, #0
800188a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
800188c: 6878 ldr r0, [r7, #4]
800188e: f7ff ff29 bl 80016e4 <__NVIC_SetPriorityGrouping>
}
8001892: bf00 nop
8001894: 3708 adds r7, #8
8001896: 46bd mov sp, r7
8001898: bd80 pop {r7, pc}
0800189a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
800189a: b580 push {r7, lr}
800189c: b086 sub sp, #24
800189e: af00 add r7, sp, #0
80018a0: 4603 mov r3, r0
80018a2: 60b9 str r1, [r7, #8]
80018a4: 607a str r2, [r7, #4]
80018a6: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80018a8: 2300 movs r3, #0
80018aa: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80018ac: f7ff ff3e bl 800172c <__NVIC_GetPriorityGrouping>
80018b0: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80018b2: 687a ldr r2, [r7, #4]
80018b4: 68b9 ldr r1, [r7, #8]
80018b6: 6978 ldr r0, [r7, #20]
80018b8: f7ff ff8e bl 80017d8 <NVIC_EncodePriority>
80018bc: 4602 mov r2, r0
80018be: f997 300f ldrsb.w r3, [r7, #15]
80018c2: 4611 mov r1, r2
80018c4: 4618 mov r0, r3
80018c6: f7ff ff5d bl 8001784 <__NVIC_SetPriority>
}
80018ca: bf00 nop
80018cc: 3718 adds r7, #24
80018ce: 46bd mov sp, r7
80018d0: bd80 pop {r7, pc}
080018d2 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
80018d2: b580 push {r7, lr}
80018d4: b082 sub sp, #8
80018d6: af00 add r7, sp, #0
80018d8: 4603 mov r3, r0
80018da: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
80018dc: f997 3007 ldrsb.w r3, [r7, #7]
80018e0: 4618 mov r0, r3
80018e2: f7ff ff31 bl 8001748 <__NVIC_EnableIRQ>
}
80018e6: bf00 nop
80018e8: 3708 adds r7, #8
80018ea: 46bd mov sp, r7
80018ec: bd80 pop {r7, pc}
080018ee <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
80018ee: b580 push {r7, lr}
80018f0: b082 sub sp, #8
80018f2: af00 add r7, sp, #0
80018f4: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
80018f6: 6878 ldr r0, [r7, #4]
80018f8: f7ff ffa2 bl 8001840 <SysTick_Config>
80018fc: 4603 mov r3, r0
}
80018fe: 4618 mov r0, r3
8001900: 3708 adds r7, #8
8001902: 46bd mov sp, r7
8001904: bd80 pop {r7, pc}
...
08001908 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8001908: b480 push {r7}
800190a: b087 sub sp, #28
800190c: af00 add r7, sp, #0
800190e: 6078 str r0, [r7, #4]
8001910: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8001912: 2300 movs r3, #0
8001914: 617b str r3, [r7, #20]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8001916: e154 b.n 8001bc2 <HAL_GPIO_Init+0x2ba>
{
/* Get current io position */
iocurrent = (GPIO_Init->Pin) & (1uL << position);
8001918: 683b ldr r3, [r7, #0]
800191a: 681a ldr r2, [r3, #0]
800191c: 2101 movs r1, #1
800191e: 697b ldr r3, [r7, #20]
8001920: fa01 f303 lsl.w r3, r1, r3
8001924: 4013 ands r3, r2
8001926: 60fb str r3, [r7, #12]
if (iocurrent != 0x00u)
8001928: 68fb ldr r3, [r7, #12]
800192a: 2b00 cmp r3, #0
800192c: f000 8146 beq.w 8001bbc <HAL_GPIO_Init+0x2b4>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
8001930: 683b ldr r3, [r7, #0]
8001932: 685b ldr r3, [r3, #4]
8001934: f003 0303 and.w r3, r3, #3
8001938: 2b01 cmp r3, #1
800193a: d005 beq.n 8001948 <HAL_GPIO_Init+0x40>
800193c: 683b ldr r3, [r7, #0]
800193e: 685b ldr r3, [r3, #4]
8001940: f003 0303 and.w r3, r3, #3
8001944: 2b02 cmp r3, #2
8001946: d130 bne.n 80019aa <HAL_GPIO_Init+0xa2>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8001948: 687b ldr r3, [r7, #4]
800194a: 689b ldr r3, [r3, #8]
800194c: 613b str r3, [r7, #16]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
800194e: 697b ldr r3, [r7, #20]
8001950: 005b lsls r3, r3, #1
8001952: 2203 movs r2, #3
8001954: fa02 f303 lsl.w r3, r2, r3
8001958: 43db mvns r3, r3
800195a: 693a ldr r2, [r7, #16]
800195c: 4013 ands r3, r2
800195e: 613b str r3, [r7, #16]
temp |= (GPIO_Init->Speed << (position * 2u));
8001960: 683b ldr r3, [r7, #0]
8001962: 68da ldr r2, [r3, #12]
8001964: 697b ldr r3, [r7, #20]
8001966: 005b lsls r3, r3, #1
8001968: fa02 f303 lsl.w r3, r2, r3
800196c: 693a ldr r2, [r7, #16]
800196e: 4313 orrs r3, r2
8001970: 613b str r3, [r7, #16]
GPIOx->OSPEEDR = temp;
8001972: 687b ldr r3, [r7, #4]
8001974: 693a ldr r2, [r7, #16]
8001976: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
8001978: 687b ldr r3, [r7, #4]
800197a: 685b ldr r3, [r3, #4]
800197c: 613b str r3, [r7, #16]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
800197e: 2201 movs r2, #1
8001980: 697b ldr r3, [r7, #20]
8001982: fa02 f303 lsl.w r3, r2, r3
8001986: 43db mvns r3, r3
8001988: 693a ldr r2, [r7, #16]
800198a: 4013 ands r3, r2
800198c: 613b str r3, [r7, #16]
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
800198e: 683b ldr r3, [r7, #0]
8001990: 685b ldr r3, [r3, #4]
8001992: 091b lsrs r3, r3, #4
8001994: f003 0201 and.w r2, r3, #1
8001998: 697b ldr r3, [r7, #20]
800199a: fa02 f303 lsl.w r3, r2, r3
800199e: 693a ldr r2, [r7, #16]
80019a0: 4313 orrs r3, r2
80019a2: 613b str r3, [r7, #16]
GPIOx->OTYPER = temp;
80019a4: 687b ldr r3, [r7, #4]
80019a6: 693a ldr r2, [r7, #16]
80019a8: 605a str r2, [r3, #4]
}
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
80019aa: 683b ldr r3, [r7, #0]
80019ac: 685b ldr r3, [r3, #4]
80019ae: f003 0303 and.w r3, r3, #3
80019b2: 2b03 cmp r3, #3
80019b4: d017 beq.n 80019e6 <HAL_GPIO_Init+0xde>
{
/* Check the Pull parameter */
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
80019b6: 687b ldr r3, [r7, #4]
80019b8: 68db ldr r3, [r3, #12]
80019ba: 613b str r3, [r7, #16]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
80019bc: 697b ldr r3, [r7, #20]
80019be: 005b lsls r3, r3, #1
80019c0: 2203 movs r2, #3
80019c2: fa02 f303 lsl.w r3, r2, r3
80019c6: 43db mvns r3, r3
80019c8: 693a ldr r2, [r7, #16]
80019ca: 4013 ands r3, r2
80019cc: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Pull) << (position * 2u));
80019ce: 683b ldr r3, [r7, #0]
80019d0: 689a ldr r2, [r3, #8]
80019d2: 697b ldr r3, [r7, #20]
80019d4: 005b lsls r3, r3, #1
80019d6: fa02 f303 lsl.w r3, r2, r3
80019da: 693a ldr r2, [r7, #16]
80019dc: 4313 orrs r3, r2
80019de: 613b str r3, [r7, #16]
GPIOx->PUPDR = temp;
80019e0: 687b ldr r3, [r7, #4]
80019e2: 693a ldr r2, [r7, #16]
80019e4: 60da str r2, [r3, #12]
}
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
80019e6: 683b ldr r3, [r7, #0]
80019e8: 685b ldr r3, [r3, #4]
80019ea: f003 0303 and.w r3, r3, #3
80019ee: 2b02 cmp r3, #2
80019f0: d123 bne.n 8001a3a <HAL_GPIO_Init+0x132>
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3u];
80019f2: 697b ldr r3, [r7, #20]
80019f4: 08da lsrs r2, r3, #3
80019f6: 687b ldr r3, [r7, #4]
80019f8: 3208 adds r2, #8
80019fa: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80019fe: 613b str r3, [r7, #16]
temp &= ~(0xFu << ((position & 0x07u) * 4u));
8001a00: 697b ldr r3, [r7, #20]
8001a02: f003 0307 and.w r3, r3, #7
8001a06: 009b lsls r3, r3, #2
8001a08: 220f movs r2, #15
8001a0a: fa02 f303 lsl.w r3, r2, r3
8001a0e: 43db mvns r3, r3
8001a10: 693a ldr r2, [r7, #16]
8001a12: 4013 ands r3, r2
8001a14: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
8001a16: 683b ldr r3, [r7, #0]
8001a18: 691a ldr r2, [r3, #16]
8001a1a: 697b ldr r3, [r7, #20]
8001a1c: f003 0307 and.w r3, r3, #7
8001a20: 009b lsls r3, r3, #2
8001a22: fa02 f303 lsl.w r3, r2, r3
8001a26: 693a ldr r2, [r7, #16]
8001a28: 4313 orrs r3, r2
8001a2a: 613b str r3, [r7, #16]
GPIOx->AFR[position >> 3u] = temp;
8001a2c: 697b ldr r3, [r7, #20]
8001a2e: 08da lsrs r2, r3, #3
8001a30: 687b ldr r3, [r7, #4]
8001a32: 3208 adds r2, #8
8001a34: 6939 ldr r1, [r7, #16]
8001a36: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8001a3a: 687b ldr r3, [r7, #4]
8001a3c: 681b ldr r3, [r3, #0]
8001a3e: 613b str r3, [r7, #16]
temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
8001a40: 697b ldr r3, [r7, #20]
8001a42: 005b lsls r3, r3, #1
8001a44: 2203 movs r2, #3
8001a46: fa02 f303 lsl.w r3, r2, r3
8001a4a: 43db mvns r3, r3
8001a4c: 693a ldr r2, [r7, #16]
8001a4e: 4013 ands r3, r2
8001a50: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
8001a52: 683b ldr r3, [r7, #0]
8001a54: 685b ldr r3, [r3, #4]
8001a56: f003 0203 and.w r2, r3, #3
8001a5a: 697b ldr r3, [r7, #20]
8001a5c: 005b lsls r3, r3, #1
8001a5e: fa02 f303 lsl.w r3, r2, r3
8001a62: 693a ldr r2, [r7, #16]
8001a64: 4313 orrs r3, r2
8001a66: 613b str r3, [r7, #16]
GPIOx->MODER = temp;
8001a68: 687b ldr r3, [r7, #4]
8001a6a: 693a ldr r2, [r7, #16]
8001a6c: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
8001a6e: 683b ldr r3, [r7, #0]
8001a70: 685b ldr r3, [r3, #4]
8001a72: f403 3340 and.w r3, r3, #196608 ; 0x30000
8001a76: 2b00 cmp r3, #0
8001a78: f000 80a0 beq.w 8001bbc <HAL_GPIO_Init+0x2b4>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8001a7c: 4b58 ldr r3, [pc, #352] ; (8001be0 <HAL_GPIO_Init+0x2d8>)
8001a7e: 699b ldr r3, [r3, #24]
8001a80: 4a57 ldr r2, [pc, #348] ; (8001be0 <HAL_GPIO_Init+0x2d8>)
8001a82: f043 0301 orr.w r3, r3, #1
8001a86: 6193 str r3, [r2, #24]
8001a88: 4b55 ldr r3, [pc, #340] ; (8001be0 <HAL_GPIO_Init+0x2d8>)
8001a8a: 699b ldr r3, [r3, #24]
8001a8c: f003 0301 and.w r3, r3, #1
8001a90: 60bb str r3, [r7, #8]
8001a92: 68bb ldr r3, [r7, #8]
temp = SYSCFG->EXTICR[position >> 2u];
8001a94: 4a53 ldr r2, [pc, #332] ; (8001be4 <HAL_GPIO_Init+0x2dc>)
8001a96: 697b ldr r3, [r7, #20]
8001a98: 089b lsrs r3, r3, #2
8001a9a: 3302 adds r3, #2
8001a9c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8001aa0: 613b str r3, [r7, #16]
temp &= ~(0x0FuL << (4u * (position & 0x03u)));
8001aa2: 697b ldr r3, [r7, #20]
8001aa4: f003 0303 and.w r3, r3, #3
8001aa8: 009b lsls r3, r3, #2
8001aaa: 220f movs r2, #15
8001aac: fa02 f303 lsl.w r3, r2, r3
8001ab0: 43db mvns r3, r3
8001ab2: 693a ldr r2, [r7, #16]
8001ab4: 4013 ands r3, r2
8001ab6: 613b str r3, [r7, #16]
temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
8001ab8: 687b ldr r3, [r7, #4]
8001aba: f1b3 4f90 cmp.w r3, #1207959552 ; 0x48000000
8001abe: d019 beq.n 8001af4 <HAL_GPIO_Init+0x1ec>
8001ac0: 687b ldr r3, [r7, #4]
8001ac2: 4a49 ldr r2, [pc, #292] ; (8001be8 <HAL_GPIO_Init+0x2e0>)
8001ac4: 4293 cmp r3, r2
8001ac6: d013 beq.n 8001af0 <HAL_GPIO_Init+0x1e8>
8001ac8: 687b ldr r3, [r7, #4]
8001aca: 4a48 ldr r2, [pc, #288] ; (8001bec <HAL_GPIO_Init+0x2e4>)
8001acc: 4293 cmp r3, r2
8001ace: d00d beq.n 8001aec <HAL_GPIO_Init+0x1e4>
8001ad0: 687b ldr r3, [r7, #4]
8001ad2: 4a47 ldr r2, [pc, #284] ; (8001bf0 <HAL_GPIO_Init+0x2e8>)
8001ad4: 4293 cmp r3, r2
8001ad6: d007 beq.n 8001ae8 <HAL_GPIO_Init+0x1e0>
8001ad8: 687b ldr r3, [r7, #4]
8001ada: 4a46 ldr r2, [pc, #280] ; (8001bf4 <HAL_GPIO_Init+0x2ec>)
8001adc: 4293 cmp r3, r2
8001ade: d101 bne.n 8001ae4 <HAL_GPIO_Init+0x1dc>
8001ae0: 2304 movs r3, #4
8001ae2: e008 b.n 8001af6 <HAL_GPIO_Init+0x1ee>
8001ae4: 2305 movs r3, #5
8001ae6: e006 b.n 8001af6 <HAL_GPIO_Init+0x1ee>
8001ae8: 2303 movs r3, #3
8001aea: e004 b.n 8001af6 <HAL_GPIO_Init+0x1ee>
8001aec: 2302 movs r3, #2
8001aee: e002 b.n 8001af6 <HAL_GPIO_Init+0x1ee>
8001af0: 2301 movs r3, #1
8001af2: e000 b.n 8001af6 <HAL_GPIO_Init+0x1ee>
8001af4: 2300 movs r3, #0
8001af6: 697a ldr r2, [r7, #20]
8001af8: f002 0203 and.w r2, r2, #3
8001afc: 0092 lsls r2, r2, #2
8001afe: 4093 lsls r3, r2
8001b00: 693a ldr r2, [r7, #16]
8001b02: 4313 orrs r3, r2
8001b04: 613b str r3, [r7, #16]
SYSCFG->EXTICR[position >> 2u] = temp;
8001b06: 4937 ldr r1, [pc, #220] ; (8001be4 <HAL_GPIO_Init+0x2dc>)
8001b08: 697b ldr r3, [r7, #20]
8001b0a: 089b lsrs r3, r3, #2
8001b0c: 3302 adds r3, #2
8001b0e: 693a ldr r2, [r7, #16]
8001b10: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
8001b14: 4b38 ldr r3, [pc, #224] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b16: 681b ldr r3, [r3, #0]
8001b18: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001b1a: 68fb ldr r3, [r7, #12]
8001b1c: 43db mvns r3, r3
8001b1e: 693a ldr r2, [r7, #16]
8001b20: 4013 ands r3, r2
8001b22: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
8001b24: 683b ldr r3, [r7, #0]
8001b26: 685b ldr r3, [r3, #4]
8001b28: f403 3380 and.w r3, r3, #65536 ; 0x10000
8001b2c: 2b00 cmp r3, #0
8001b2e: d003 beq.n 8001b38 <HAL_GPIO_Init+0x230>
{
temp |= iocurrent;
8001b30: 693a ldr r2, [r7, #16]
8001b32: 68fb ldr r3, [r7, #12]
8001b34: 4313 orrs r3, r2
8001b36: 613b str r3, [r7, #16]
}
EXTI->IMR = temp;
8001b38: 4a2f ldr r2, [pc, #188] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b3a: 693b ldr r3, [r7, #16]
8001b3c: 6013 str r3, [r2, #0]
temp = EXTI->EMR;
8001b3e: 4b2e ldr r3, [pc, #184] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b40: 685b ldr r3, [r3, #4]
8001b42: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001b44: 68fb ldr r3, [r7, #12]
8001b46: 43db mvns r3, r3
8001b48: 693a ldr r2, [r7, #16]
8001b4a: 4013 ands r3, r2
8001b4c: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
8001b4e: 683b ldr r3, [r7, #0]
8001b50: 685b ldr r3, [r3, #4]
8001b52: f403 3300 and.w r3, r3, #131072 ; 0x20000
8001b56: 2b00 cmp r3, #0
8001b58: d003 beq.n 8001b62 <HAL_GPIO_Init+0x25a>
{
temp |= iocurrent;
8001b5a: 693a ldr r2, [r7, #16]
8001b5c: 68fb ldr r3, [r7, #12]
8001b5e: 4313 orrs r3, r2
8001b60: 613b str r3, [r7, #16]
}
EXTI->EMR = temp;
8001b62: 4a25 ldr r2, [pc, #148] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b64: 693b ldr r3, [r7, #16]
8001b66: 6053 str r3, [r2, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
8001b68: 4b23 ldr r3, [pc, #140] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b6a: 689b ldr r3, [r3, #8]
8001b6c: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001b6e: 68fb ldr r3, [r7, #12]
8001b70: 43db mvns r3, r3
8001b72: 693a ldr r2, [r7, #16]
8001b74: 4013 ands r3, r2
8001b76: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u)
8001b78: 683b ldr r3, [r7, #0]
8001b7a: 685b ldr r3, [r3, #4]
8001b7c: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8001b80: 2b00 cmp r3, #0
8001b82: d003 beq.n 8001b8c <HAL_GPIO_Init+0x284>
{
temp |= iocurrent;
8001b84: 693a ldr r2, [r7, #16]
8001b86: 68fb ldr r3, [r7, #12]
8001b88: 4313 orrs r3, r2
8001b8a: 613b str r3, [r7, #16]
}
EXTI->RTSR = temp;
8001b8c: 4a1a ldr r2, [pc, #104] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b8e: 693b ldr r3, [r7, #16]
8001b90: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
8001b92: 4b19 ldr r3, [pc, #100] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001b94: 68db ldr r3, [r3, #12]
8001b96: 613b str r3, [r7, #16]
temp &= ~(iocurrent);
8001b98: 68fb ldr r3, [r7, #12]
8001b9a: 43db mvns r3, r3
8001b9c: 693a ldr r2, [r7, #16]
8001b9e: 4013 ands r3, r2
8001ba0: 613b str r3, [r7, #16]
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u)
8001ba2: 683b ldr r3, [r7, #0]
8001ba4: 685b ldr r3, [r3, #4]
8001ba6: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8001baa: 2b00 cmp r3, #0
8001bac: d003 beq.n 8001bb6 <HAL_GPIO_Init+0x2ae>
{
temp |= iocurrent;
8001bae: 693a ldr r2, [r7, #16]
8001bb0: 68fb ldr r3, [r7, #12]
8001bb2: 4313 orrs r3, r2
8001bb4: 613b str r3, [r7, #16]
}
EXTI->FTSR = temp;
8001bb6: 4a10 ldr r2, [pc, #64] ; (8001bf8 <HAL_GPIO_Init+0x2f0>)
8001bb8: 693b ldr r3, [r7, #16]
8001bba: 60d3 str r3, [r2, #12]
}
}
position++;
8001bbc: 697b ldr r3, [r7, #20]
8001bbe: 3301 adds r3, #1
8001bc0: 617b str r3, [r7, #20]
while (((GPIO_Init->Pin) >> position) != 0x00u)
8001bc2: 683b ldr r3, [r7, #0]
8001bc4: 681a ldr r2, [r3, #0]
8001bc6: 697b ldr r3, [r7, #20]
8001bc8: fa22 f303 lsr.w r3, r2, r3
8001bcc: 2b00 cmp r3, #0
8001bce: f47f aea3 bne.w 8001918 <HAL_GPIO_Init+0x10>
}
}
8001bd2: bf00 nop
8001bd4: bf00 nop
8001bd6: 371c adds r7, #28
8001bd8: 46bd mov sp, r7
8001bda: f85d 7b04 ldr.w r7, [sp], #4
8001bde: 4770 bx lr
8001be0: 40021000 .word 0x40021000
8001be4: 40010000 .word 0x40010000
8001be8: 48000400 .word 0x48000400
8001bec: 48000800 .word 0x48000800
8001bf0: 48000c00 .word 0x48000c00
8001bf4: 48001000 .word 0x48001000
8001bf8: 40010400 .word 0x40010400
08001bfc <HAL_GPIO_ReadPin>:
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
8001bfc: b480 push {r7}
8001bfe: b085 sub sp, #20
8001c00: af00 add r7, sp, #0
8001c02: 6078 str r0, [r7, #4]
8001c04: 460b mov r3, r1
8001c06: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8001c08: 687b ldr r3, [r7, #4]
8001c0a: 691a ldr r2, [r3, #16]
8001c0c: 887b ldrh r3, [r7, #2]
8001c0e: 4013 ands r3, r2
8001c10: 2b00 cmp r3, #0
8001c12: d002 beq.n 8001c1a <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8001c14: 2301 movs r3, #1
8001c16: 73fb strb r3, [r7, #15]
8001c18: e001 b.n 8001c1e <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8001c1a: 2300 movs r3, #0
8001c1c: 73fb strb r3, [r7, #15]
}
return bitstatus;
8001c1e: 7bfb ldrb r3, [r7, #15]
}
8001c20: 4618 mov r0, r3
8001c22: 3714 adds r7, #20
8001c24: 46bd mov sp, r7
8001c26: f85d 7b04 ldr.w r7, [sp], #4
8001c2a: 4770 bx lr
08001c2c <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8001c2c: b480 push {r7}
8001c2e: b083 sub sp, #12
8001c30: af00 add r7, sp, #0
8001c32: 6078 str r0, [r7, #4]
8001c34: 460b mov r3, r1
8001c36: 807b strh r3, [r7, #2]
8001c38: 4613 mov r3, r2
8001c3a: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
8001c3c: 787b ldrb r3, [r7, #1]
8001c3e: 2b00 cmp r3, #0
8001c40: d003 beq.n 8001c4a <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = (uint32_t)GPIO_Pin;
8001c42: 887a ldrh r2, [r7, #2]
8001c44: 687b ldr r3, [r7, #4]
8001c46: 619a str r2, [r3, #24]
}
else
{
GPIOx->BRR = (uint32_t)GPIO_Pin;
}
}
8001c48: e002 b.n 8001c50 <HAL_GPIO_WritePin+0x24>
GPIOx->BRR = (uint32_t)GPIO_Pin;
8001c4a: 887a ldrh r2, [r7, #2]
8001c4c: 687b ldr r3, [r7, #4]
8001c4e: 629a str r2, [r3, #40] ; 0x28
}
8001c50: bf00 nop
8001c52: 370c adds r7, #12
8001c54: 46bd mov sp, r7
8001c56: f85d 7b04 ldr.w r7, [sp], #4
8001c5a: 4770 bx lr
08001c5c <HAL_OPAMP_Init>:
* @param hopamp OPAMP handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp)
{
8001c5c: b580 push {r7, lr}
8001c5e: b084 sub sp, #16
8001c60: af00 add r7, sp, #0
8001c62: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8001c64: 2300 movs r3, #0
8001c66: 73fb strb r3, [r7, #15]
/* Check the OPAMP handle allocation and lock status */
/* Init not allowed if calibration is ongoing */
if (hopamp == NULL)
8001c68: 687b ldr r3, [r7, #4]
8001c6a: 2b00 cmp r3, #0
8001c6c: d101 bne.n 8001c72 <HAL_OPAMP_Init+0x16>
{
return HAL_ERROR;
8001c6e: 2301 movs r3, #1
8001c70: e08f b.n 8001d92 <HAL_OPAMP_Init+0x136>
}
else if (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
8001c72: 687b ldr r3, [r7, #4]
8001c74: f893 3032 ldrb.w r3, [r3, #50] ; 0x32
8001c78: b2db uxtb r3, r3
8001c7a: 2b05 cmp r3, #5
8001c7c: d101 bne.n 8001c82 <HAL_OPAMP_Init+0x26>
{
return HAL_ERROR;
8001c7e: 2301 movs r3, #1
8001c80: e087 b.n 8001d92 <HAL_OPAMP_Init+0x136>
}
else if (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)
8001c82: 687b ldr r3, [r7, #4]
8001c84: f893 3032 ldrb.w r3, [r3, #50] ; 0x32
8001c88: b2db uxtb r3, r3
8001c8a: 2b02 cmp r3, #2
8001c8c: d101 bne.n 8001c92 <HAL_OPAMP_Init+0x36>
{
return HAL_ERROR;
8001c8e: 2301 movs r3, #1
8001c90: e07f b.n 8001d92 <HAL_OPAMP_Init+0x136>
assert_param(IS_OPAMP_INVERTING_INPUT(hopamp->Init.InvertingInput));
}
assert_param(IS_OPAMP_TIMERCONTROLLED_MUXMODE(hopamp->Init.TimerControlledMuxmode));
if ((hopamp->Init.TimerControlledMuxmode) == OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE)
8001c92: 687b ldr r3, [r7, #4]
8001c94: 691b ldr r3, [r3, #16]
8001c96: 2b80 cmp r3, #128 ; 0x80
assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueP));
assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueN));
}
/* Init SYSCFG and the low level hardware to access opamp */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8001c98: 4b40 ldr r3, [pc, #256] ; (8001d9c <HAL_OPAMP_Init+0x140>)
8001c9a: 699b ldr r3, [r3, #24]
8001c9c: 4a3f ldr r2, [pc, #252] ; (8001d9c <HAL_OPAMP_Init+0x140>)
8001c9e: f043 0301 orr.w r3, r3, #1
8001ca2: 6193 str r3, [r2, #24]
8001ca4: 4b3d ldr r3, [pc, #244] ; (8001d9c <HAL_OPAMP_Init+0x140>)
8001ca6: 699b ldr r3, [r3, #24]
8001ca8: f003 0301 and.w r3, r3, #1
8001cac: 60bb str r3, [r7, #8]
8001cae: 68bb ldr r3, [r7, #8]
if (hopamp->State == HAL_OPAMP_STATE_RESET)
8001cb0: 687b ldr r3, [r7, #4]
8001cb2: f893 3032 ldrb.w r3, [r3, #50] ; 0x32
8001cb6: b2db uxtb r3, r3
8001cb8: 2b00 cmp r3, #0
8001cba: d103 bne.n 8001cc4 <HAL_OPAMP_Init+0x68>
{
/* Allocate lock resource and initialize it */
hopamp->Lock = HAL_UNLOCKED;
8001cbc: 687b ldr r3, [r7, #4]
8001cbe: 2200 movs r2, #0
8001cc0: f883 2031 strb.w r2, [r3, #49] ; 0x31
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
hopamp->MspInitCallback(hopamp);
#else
/* Call MSP init function */
HAL_OPAMP_MspInit(hopamp);
8001cc4: 6878 ldr r0, [r7, #4]
8001cc6: f7fe fe15 bl 80008f4 <HAL_OPAMP_MspInit>
/* check if OPAMP_PGA_MODE & in Follower mode */
/* - InvertingInput */
/* - InvertingInputSecondary */
/* are Not Applicable */
if ((hopamp->Init.Mode == OPAMP_PGA_MODE) || (hopamp->Init.Mode == OPAMP_FOLLOWER_MODE))
8001cca: 687b ldr r3, [r7, #4]
8001ccc: 685b ldr r3, [r3, #4]
8001cce: 2b40 cmp r3, #64 ; 0x40
8001cd0: d003 beq.n 8001cda <HAL_OPAMP_Init+0x7e>
8001cd2: 687b ldr r3, [r7, #4]
8001cd4: 685b ldr r3, [r3, #4]
8001cd6: 2b60 cmp r3, #96 ; 0x60
8001cd8: d125 bne.n 8001d26 <HAL_OPAMP_Init+0xca>
{
MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_UPDATE_PARAMETERS_INIT_MASK, \
8001cda: 687b ldr r3, [r7, #4]
8001cdc: 681b ldr r3, [r3, #0]
8001cde: 681a ldr r2, [r3, #0]
8001ce0: 4b2f ldr r3, [pc, #188] ; (8001da0 <HAL_OPAMP_Init+0x144>)
8001ce2: 4013 ands r3, r2
8001ce4: 687a ldr r2, [r7, #4]
8001ce6: 6851 ldr r1, [r2, #4]
8001ce8: 687a ldr r2, [r7, #4]
8001cea: 68d2 ldr r2, [r2, #12]
8001cec: 4311 orrs r1, r2
8001cee: 687a ldr r2, [r7, #4]
8001cf0: 6912 ldr r2, [r2, #16]
8001cf2: 4311 orrs r1, r2
8001cf4: 687a ldr r2, [r7, #4]
8001cf6: 6992 ldr r2, [r2, #24]
8001cf8: 4311 orrs r1, r2
8001cfa: 687a ldr r2, [r7, #4]
8001cfc: 69d2 ldr r2, [r2, #28]
8001cfe: 4311 orrs r1, r2
8001d00: 687a ldr r2, [r7, #4]
8001d02: 6a12 ldr r2, [r2, #32]
8001d04: 4311 orrs r1, r2
8001d06: 687a ldr r2, [r7, #4]
8001d08: 6a52 ldr r2, [r2, #36] ; 0x24
8001d0a: 4311 orrs r1, r2
8001d0c: 687a ldr r2, [r7, #4]
8001d0e: 6a92 ldr r2, [r2, #40] ; 0x28
8001d10: 04d2 lsls r2, r2, #19
8001d12: 4311 orrs r1, r2
8001d14: 687a ldr r2, [r7, #4]
8001d16: 6ad2 ldr r2, [r2, #44] ; 0x2c
8001d18: 0612 lsls r2, r2, #24
8001d1a: 4311 orrs r1, r2
8001d1c: 687a ldr r2, [r7, #4]
8001d1e: 6812 ldr r2, [r2, #0]
8001d20: 430b orrs r3, r1
8001d22: 6013 str r3, [r2, #0]
8001d24: e02a b.n 8001d7c <HAL_OPAMP_Init+0x120>
(hopamp->Init.TrimmingValueN << OPAMP_INPUT_INVERTING));
}
else /* OPAMP_STANDALONE_MODE */
{
MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_UPDATE_PARAMETERS_INIT_MASK, \
8001d26: 687b ldr r3, [r7, #4]
8001d28: 681b ldr r3, [r3, #0]
8001d2a: 681a ldr r2, [r3, #0]
8001d2c: 4b1c ldr r3, [pc, #112] ; (8001da0 <HAL_OPAMP_Init+0x144>)
8001d2e: 4013 ands r3, r2
8001d30: 687a ldr r2, [r7, #4]
8001d32: 6851 ldr r1, [r2, #4]
8001d34: 687a ldr r2, [r7, #4]
8001d36: 6892 ldr r2, [r2, #8]
8001d38: 4311 orrs r1, r2
8001d3a: 687a ldr r2, [r7, #4]
8001d3c: 68d2 ldr r2, [r2, #12]
8001d3e: 4311 orrs r1, r2
8001d40: 687a ldr r2, [r7, #4]
8001d42: 6912 ldr r2, [r2, #16]
8001d44: 4311 orrs r1, r2
8001d46: 687a ldr r2, [r7, #4]
8001d48: 6952 ldr r2, [r2, #20]
8001d4a: 4311 orrs r1, r2
8001d4c: 687a ldr r2, [r7, #4]
8001d4e: 6992 ldr r2, [r2, #24]
8001d50: 4311 orrs r1, r2
8001d52: 687a ldr r2, [r7, #4]
8001d54: 69d2 ldr r2, [r2, #28]
8001d56: 4311 orrs r1, r2
8001d58: 687a ldr r2, [r7, #4]
8001d5a: 6a12 ldr r2, [r2, #32]
8001d5c: 4311 orrs r1, r2
8001d5e: 687a ldr r2, [r7, #4]
8001d60: 6a52 ldr r2, [r2, #36] ; 0x24
8001d62: 4311 orrs r1, r2
8001d64: 687a ldr r2, [r7, #4]
8001d66: 6a92 ldr r2, [r2, #40] ; 0x28
8001d68: 04d2 lsls r2, r2, #19
8001d6a: 4311 orrs r1, r2
8001d6c: 687a ldr r2, [r7, #4]
8001d6e: 6ad2 ldr r2, [r2, #44] ; 0x2c
8001d70: 0612 lsls r2, r2, #24
8001d72: 4311 orrs r1, r2
8001d74: 687a ldr r2, [r7, #4]
8001d76: 6812 ldr r2, [r2, #0]
8001d78: 430b orrs r3, r1
8001d7a: 6013 str r3, [r2, #0]
(hopamp->Init.TrimmingValueP << OPAMP_INPUT_NONINVERTING) | \
(hopamp->Init.TrimmingValueN << OPAMP_INPUT_INVERTING));
}
/* Update the OPAMP state*/
if (hopamp->State == HAL_OPAMP_STATE_RESET)
8001d7c: 687b ldr r3, [r7, #4]
8001d7e: f893 3032 ldrb.w r3, [r3, #50] ; 0x32
8001d82: b2db uxtb r3, r3
8001d84: 2b00 cmp r3, #0
8001d86: d103 bne.n 8001d90 <HAL_OPAMP_Init+0x134>
{
/* From RESET state to READY State */
hopamp->State = HAL_OPAMP_STATE_READY;
8001d88: 687b ldr r3, [r7, #4]
8001d8a: 2201 movs r2, #1
8001d8c: f883 2032 strb.w r2, [r3, #50] ; 0x32
}
/* else: remain in READY or BUSY state (no update) */
return status;
8001d90: 7bfb ldrb r3, [r7, #15]
}
}
8001d92: 4618 mov r0, r3
8001d94: 3710 adds r7, #16
8001d96: 46bd mov sp, r7
8001d98: bd80 pop {r7, pc}
8001d9a: bf00 nop
8001d9c: 40021000 .word 0x40021000
8001da0: e0003811 .word 0xe0003811
08001da4 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8001da4: b5f0 push {r4, r5, r6, r7, lr}
8001da6: b08b sub sp, #44 ; 0x2c
8001da8: af06 add r7, sp, #24
8001daa: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8001dac: 687b ldr r3, [r7, #4]
8001dae: 2b00 cmp r3, #0
8001db0: d101 bne.n 8001db6 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8001db2: 2301 movs r3, #1
8001db4: e0d0 b.n 8001f58 <HAL_PCD_Init+0x1b4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8001db6: 687b ldr r3, [r7, #4]
8001db8: f893 32a9 ldrb.w r3, [r3, #681] ; 0x2a9
8001dbc: b2db uxtb r3, r3
8001dbe: 2b00 cmp r3, #0
8001dc0: d106 bne.n 8001dd0 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8001dc2: 687b ldr r3, [r7, #4]
8001dc4: 2200 movs r2, #0
8001dc6: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8001dca: 6878 ldr r0, [r7, #4]
8001dcc: f007 fd98 bl 8009900 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8001dd0: 687b ldr r3, [r7, #4]
8001dd2: 2203 movs r2, #3
8001dd4: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8001dd8: 687b ldr r3, [r7, #4]
8001dda: 681b ldr r3, [r3, #0]
8001ddc: 4618 mov r0, r3
8001dde: f003 fcbf bl 8005760 <USB_DisableGlobalInt>
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001de2: 2300 movs r3, #0
8001de4: 73fb strb r3, [r7, #15]
8001de6: e04c b.n 8001e82 <HAL_PCD_Init+0xde>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8001de8: 7bfb ldrb r3, [r7, #15]
8001dea: 6879 ldr r1, [r7, #4]
8001dec: 1c5a adds r2, r3, #1
8001dee: 4613 mov r3, r2
8001df0: 009b lsls r3, r3, #2
8001df2: 4413 add r3, r2
8001df4: 00db lsls r3, r3, #3
8001df6: 440b add r3, r1
8001df8: 3301 adds r3, #1
8001dfa: 2201 movs r2, #1
8001dfc: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8001dfe: 7bfb ldrb r3, [r7, #15]
8001e00: 6879 ldr r1, [r7, #4]
8001e02: 1c5a adds r2, r3, #1
8001e04: 4613 mov r3, r2
8001e06: 009b lsls r3, r3, #2
8001e08: 4413 add r3, r2
8001e0a: 00db lsls r3, r3, #3
8001e0c: 440b add r3, r1
8001e0e: 7bfa ldrb r2, [r7, #15]
8001e10: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].tx_fifo_num = i;
8001e12: 7bfa ldrb r2, [r7, #15]
8001e14: 7bfb ldrb r3, [r7, #15]
8001e16: b298 uxth r0, r3
8001e18: 6879 ldr r1, [r7, #4]
8001e1a: 4613 mov r3, r2
8001e1c: 009b lsls r3, r3, #2
8001e1e: 4413 add r3, r2
8001e20: 00db lsls r3, r3, #3
8001e22: 440b add r3, r1
8001e24: 3336 adds r3, #54 ; 0x36
8001e26: 4602 mov r2, r0
8001e28: 801a strh r2, [r3, #0]
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8001e2a: 7bfb ldrb r3, [r7, #15]
8001e2c: 6879 ldr r1, [r7, #4]
8001e2e: 1c5a adds r2, r3, #1
8001e30: 4613 mov r3, r2
8001e32: 009b lsls r3, r3, #2
8001e34: 4413 add r3, r2
8001e36: 00db lsls r3, r3, #3
8001e38: 440b add r3, r1
8001e3a: 3303 adds r3, #3
8001e3c: 2200 movs r2, #0
8001e3e: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8001e40: 7bfa ldrb r2, [r7, #15]
8001e42: 6879 ldr r1, [r7, #4]
8001e44: 4613 mov r3, r2
8001e46: 009b lsls r3, r3, #2
8001e48: 4413 add r3, r2
8001e4a: 00db lsls r3, r3, #3
8001e4c: 440b add r3, r1
8001e4e: 3338 adds r3, #56 ; 0x38
8001e50: 2200 movs r2, #0
8001e52: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8001e54: 7bfa ldrb r2, [r7, #15]
8001e56: 6879 ldr r1, [r7, #4]
8001e58: 4613 mov r3, r2
8001e5a: 009b lsls r3, r3, #2
8001e5c: 4413 add r3, r2
8001e5e: 00db lsls r3, r3, #3
8001e60: 440b add r3, r1
8001e62: 333c adds r3, #60 ; 0x3c
8001e64: 2200 movs r2, #0
8001e66: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8001e68: 7bfa ldrb r2, [r7, #15]
8001e6a: 6879 ldr r1, [r7, #4]
8001e6c: 4613 mov r3, r2
8001e6e: 009b lsls r3, r3, #2
8001e70: 4413 add r3, r2
8001e72: 00db lsls r3, r3, #3
8001e74: 440b add r3, r1
8001e76: 3340 adds r3, #64 ; 0x40
8001e78: 2200 movs r2, #0
8001e7a: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001e7c: 7bfb ldrb r3, [r7, #15]
8001e7e: 3301 adds r3, #1
8001e80: 73fb strb r3, [r7, #15]
8001e82: 7bfa ldrb r2, [r7, #15]
8001e84: 687b ldr r3, [r7, #4]
8001e86: 685b ldr r3, [r3, #4]
8001e88: 429a cmp r2, r3
8001e8a: d3ad bcc.n 8001de8 <HAL_PCD_Init+0x44>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001e8c: 2300 movs r3, #0
8001e8e: 73fb strb r3, [r7, #15]
8001e90: e044 b.n 8001f1c <HAL_PCD_Init+0x178>
{
hpcd->OUT_ep[i].is_in = 0U;
8001e92: 7bfa ldrb r2, [r7, #15]
8001e94: 6879 ldr r1, [r7, #4]
8001e96: 4613 mov r3, r2
8001e98: 009b lsls r3, r3, #2
8001e9a: 4413 add r3, r2
8001e9c: 00db lsls r3, r3, #3
8001e9e: 440b add r3, r1
8001ea0: f203 1369 addw r3, r3, #361 ; 0x169
8001ea4: 2200 movs r2, #0
8001ea6: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8001ea8: 7bfa ldrb r2, [r7, #15]
8001eaa: 6879 ldr r1, [r7, #4]
8001eac: 4613 mov r3, r2
8001eae: 009b lsls r3, r3, #2
8001eb0: 4413 add r3, r2
8001eb2: 00db lsls r3, r3, #3
8001eb4: 440b add r3, r1
8001eb6: f503 73b4 add.w r3, r3, #360 ; 0x168
8001eba: 7bfa ldrb r2, [r7, #15]
8001ebc: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8001ebe: 7bfa ldrb r2, [r7, #15]
8001ec0: 6879 ldr r1, [r7, #4]
8001ec2: 4613 mov r3, r2
8001ec4: 009b lsls r3, r3, #2
8001ec6: 4413 add r3, r2
8001ec8: 00db lsls r3, r3, #3
8001eca: 440b add r3, r1
8001ecc: f203 136b addw r3, r3, #363 ; 0x16b
8001ed0: 2200 movs r2, #0
8001ed2: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8001ed4: 7bfa ldrb r2, [r7, #15]
8001ed6: 6879 ldr r1, [r7, #4]
8001ed8: 4613 mov r3, r2
8001eda: 009b lsls r3, r3, #2
8001edc: 4413 add r3, r2
8001ede: 00db lsls r3, r3, #3
8001ee0: 440b add r3, r1
8001ee2: f503 73bc add.w r3, r3, #376 ; 0x178
8001ee6: 2200 movs r2, #0
8001ee8: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8001eea: 7bfa ldrb r2, [r7, #15]
8001eec: 6879 ldr r1, [r7, #4]
8001eee: 4613 mov r3, r2
8001ef0: 009b lsls r3, r3, #2
8001ef2: 4413 add r3, r2
8001ef4: 00db lsls r3, r3, #3
8001ef6: 440b add r3, r1
8001ef8: f503 73be add.w r3, r3, #380 ; 0x17c
8001efc: 2200 movs r2, #0
8001efe: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8001f00: 7bfa ldrb r2, [r7, #15]
8001f02: 6879 ldr r1, [r7, #4]
8001f04: 4613 mov r3, r2
8001f06: 009b lsls r3, r3, #2
8001f08: 4413 add r3, r2
8001f0a: 00db lsls r3, r3, #3
8001f0c: 440b add r3, r1
8001f0e: f503 73c0 add.w r3, r3, #384 ; 0x180
8001f12: 2200 movs r2, #0
8001f14: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001f16: 7bfb ldrb r3, [r7, #15]
8001f18: 3301 adds r3, #1
8001f1a: 73fb strb r3, [r7, #15]
8001f1c: 7bfa ldrb r2, [r7, #15]
8001f1e: 687b ldr r3, [r7, #4]
8001f20: 685b ldr r3, [r3, #4]
8001f22: 429a cmp r2, r3
8001f24: d3b5 bcc.n 8001e92 <HAL_PCD_Init+0xee>
}
/* Init Device */
(void)USB_DevInit(hpcd->Instance, hpcd->Init);
8001f26: 687b ldr r3, [r7, #4]
8001f28: 681b ldr r3, [r3, #0]
8001f2a: 603b str r3, [r7, #0]
8001f2c: 687e ldr r6, [r7, #4]
8001f2e: 466d mov r5, sp
8001f30: f106 0410 add.w r4, r6, #16
8001f34: cc0f ldmia r4!, {r0, r1, r2, r3}
8001f36: c50f stmia r5!, {r0, r1, r2, r3}
8001f38: 6823 ldr r3, [r4, #0]
8001f3a: 602b str r3, [r5, #0]
8001f3c: 1d33 adds r3, r6, #4
8001f3e: cb0e ldmia r3, {r1, r2, r3}
8001f40: 6838 ldr r0, [r7, #0]
8001f42: f003 fc28 bl 8005796 <USB_DevInit>
hpcd->USB_Address = 0U;
8001f46: 687b ldr r3, [r7, #4]
8001f48: 2200 movs r2, #0
8001f4a: f883 2024 strb.w r2, [r3, #36] ; 0x24
hpcd->State = HAL_PCD_STATE_READY;
8001f4e: 687b ldr r3, [r7, #4]
8001f50: 2201 movs r2, #1
8001f52: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
return HAL_OK;
8001f56: 2300 movs r3, #0
}
8001f58: 4618 mov r0, r3
8001f5a: 3714 adds r7, #20
8001f5c: 46bd mov sp, r7
8001f5e: bdf0 pop {r4, r5, r6, r7, pc}
08001f60 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8001f60: b580 push {r7, lr}
8001f62: b082 sub sp, #8
8001f64: af00 add r7, sp, #0
8001f66: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8001f68: 687b ldr r3, [r7, #4]
8001f6a: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001f6e: 2b01 cmp r3, #1
8001f70: d101 bne.n 8001f76 <HAL_PCD_Start+0x16>
8001f72: 2302 movs r3, #2
8001f74: e016 b.n 8001fa4 <HAL_PCD_Start+0x44>
8001f76: 687b ldr r3, [r7, #4]
8001f78: 2201 movs r2, #1
8001f7a: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
__HAL_PCD_ENABLE(hpcd);
8001f7e: 687b ldr r3, [r7, #4]
8001f80: 681b ldr r3, [r3, #0]
8001f82: 4618 mov r0, r3
8001f84: f003 fbd5 bl 8005732 <USB_EnableGlobalInt>
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8001f88: 2101 movs r1, #1
8001f8a: 6878 ldr r0, [r7, #4]
8001f8c: f007 ff5e bl 8009e4c <HAL_PCDEx_SetConnectionState>
(void)USB_DevConnect(hpcd->Instance);
8001f90: 687b ldr r3, [r7, #4]
8001f92: 681b ldr r3, [r3, #0]
8001f94: 4618 mov r0, r3
8001f96: f005 fde9 bl 8007b6c <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8001f9a: 687b ldr r3, [r7, #4]
8001f9c: 2200 movs r2, #0
8001f9e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001fa2: 2300 movs r3, #0
}
8001fa4: 4618 mov r0, r3
8001fa6: 3708 adds r7, #8
8001fa8: 46bd mov sp, r7
8001faa: bd80 pop {r7, pc}
08001fac <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8001fac: b580 push {r7, lr}
8001fae: b082 sub sp, #8
8001fb0: af00 add r7, sp, #0
8001fb2: 6078 str r0, [r7, #4]
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
8001fb4: 687b ldr r3, [r7, #4]
8001fb6: 681b ldr r3, [r3, #0]
8001fb8: 4618 mov r0, r3
8001fba: f005 fde2 bl 8007b82 <USB_ReadInterrupts>
8001fbe: 4603 mov r3, r0
8001fc0: f403 4300 and.w r3, r3, #32768 ; 0x8000
8001fc4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8001fc8: d102 bne.n 8001fd0 <HAL_PCD_IRQHandler+0x24>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8001fca: 6878 ldr r0, [r7, #4]
8001fcc: f000 faf6 bl 80025bc <PCD_EP_ISR_Handler>
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET))
8001fd0: 687b ldr r3, [r7, #4]
8001fd2: 681b ldr r3, [r3, #0]
8001fd4: 4618 mov r0, r3
8001fd6: f005 fdd4 bl 8007b82 <USB_ReadInterrupts>
8001fda: 4603 mov r3, r0
8001fdc: f403 6380 and.w r3, r3, #1024 ; 0x400
8001fe0: f5b3 6f80 cmp.w r3, #1024 ; 0x400
8001fe4: d112 bne.n 800200c <HAL_PCD_IRQHandler+0x60>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001fe6: 687b ldr r3, [r7, #4]
8001fe8: 681b ldr r3, [r3, #0]
8001fea: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001fee: b29a uxth r2, r3
8001ff0: 687b ldr r3, [r7, #4]
8001ff2: 681b ldr r3, [r3, #0]
8001ff4: f422 6280 bic.w r2, r2, #1024 ; 0x400
8001ff8: b292 uxth r2, r2
8001ffa: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8001ffe: 6878 ldr r0, [r7, #4]
8002000: f007 fd27 bl 8009a52 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8002004: 2100 movs r1, #0
8002006: 6878 ldr r0, [r7, #4]
8002008: f000 f8c7 bl 800219a <HAL_PCD_SetAddress>
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR))
800200c: 687b ldr r3, [r7, #4]
800200e: 681b ldr r3, [r3, #0]
8002010: 4618 mov r0, r3
8002012: f005 fdb6 bl 8007b82 <USB_ReadInterrupts>
8002016: 4603 mov r3, r0
8002018: f403 4380 and.w r3, r3, #16384 ; 0x4000
800201c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
8002020: d10b bne.n 800203a <HAL_PCD_IRQHandler+0x8e>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8002022: 687b ldr r3, [r7, #4]
8002024: 681b ldr r3, [r3, #0]
8002026: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
800202a: b29a uxth r2, r3
800202c: 687b ldr r3, [r7, #4]
800202e: 681b ldr r3, [r3, #0]
8002030: f422 4280 bic.w r2, r2, #16384 ; 0x4000
8002034: b292 uxth r2, r2
8002036: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR))
800203a: 687b ldr r3, [r7, #4]
800203c: 681b ldr r3, [r3, #0]
800203e: 4618 mov r0, r3
8002040: f005 fd9f bl 8007b82 <USB_ReadInterrupts>
8002044: 4603 mov r3, r0
8002046: f403 5300 and.w r3, r3, #8192 ; 0x2000
800204a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
800204e: d10b bne.n 8002068 <HAL_PCD_IRQHandler+0xbc>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8002050: 687b ldr r3, [r7, #4]
8002052: 681b ldr r3, [r3, #0]
8002054: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8002058: b29a uxth r2, r3
800205a: 687b ldr r3, [r7, #4]
800205c: 681b ldr r3, [r3, #0]
800205e: f422 5200 bic.w r2, r2, #8192 ; 0x2000
8002062: b292 uxth r2, r2
8002064: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
8002068: 687b ldr r3, [r7, #4]
800206a: 681b ldr r3, [r3, #0]
800206c: 4618 mov r0, r3
800206e: f005 fd88 bl 8007b82 <USB_ReadInterrupts>
8002072: 4603 mov r3, r0
8002074: f403 5380 and.w r3, r3, #4096 ; 0x1000
8002078: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
800207c: d126 bne.n 80020cc <HAL_PCD_IRQHandler+0x120>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE);
800207e: 687b ldr r3, [r7, #4]
8002080: 681b ldr r3, [r3, #0]
8002082: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8002086: b29a uxth r2, r3
8002088: 687b ldr r3, [r7, #4]
800208a: 681b ldr r3, [r3, #0]
800208c: f022 0204 bic.w r2, r2, #4
8002090: b292 uxth r2, r2
8002092: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8002096: 687b ldr r3, [r7, #4]
8002098: 681b ldr r3, [r3, #0]
800209a: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
800209e: b29a uxth r2, r3
80020a0: 687b ldr r3, [r7, #4]
80020a2: 681b ldr r3, [r3, #0]
80020a4: f022 0208 bic.w r2, r2, #8
80020a8: b292 uxth r2, r2
80020aa: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
80020ae: 6878 ldr r0, [r7, #4]
80020b0: f007 fd08 bl 8009ac4 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
80020b4: 687b ldr r3, [r7, #4]
80020b6: 681b ldr r3, [r3, #0]
80020b8: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80020bc: b29a uxth r2, r3
80020be: 687b ldr r3, [r7, #4]
80020c0: 681b ldr r3, [r3, #0]
80020c2: f422 5280 bic.w r2, r2, #4096 ; 0x1000
80020c6: b292 uxth r2, r2
80020c8: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
80020cc: 687b ldr r3, [r7, #4]
80020ce: 681b ldr r3, [r3, #0]
80020d0: 4618 mov r0, r3
80020d2: f005 fd56 bl 8007b82 <USB_ReadInterrupts>
80020d6: 4603 mov r3, r0
80020d8: f403 6300 and.w r3, r3, #2048 ; 0x800
80020dc: f5b3 6f00 cmp.w r3, #2048 ; 0x800
80020e0: d126 bne.n 8002130 <HAL_PCD_IRQHandler+0x184>
{
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
80020e2: 687b ldr r3, [r7, #4]
80020e4: 681b ldr r3, [r3, #0]
80020e6: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
80020ea: b29a uxth r2, r3
80020ec: 687b ldr r3, [r7, #4]
80020ee: 681b ldr r3, [r3, #0]
80020f0: f042 0208 orr.w r2, r2, #8
80020f4: b292 uxth r2, r2
80020f6: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
80020fa: 687b ldr r3, [r7, #4]
80020fc: 681b ldr r3, [r3, #0]
80020fe: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8002102: b29a uxth r2, r3
8002104: 687b ldr r3, [r7, #4]
8002106: 681b ldr r3, [r3, #0]
8002108: f422 6200 bic.w r2, r2, #2048 ; 0x800
800210c: b292 uxth r2, r2
800210e: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LPMODE;
8002112: 687b ldr r3, [r7, #4]
8002114: 681b ldr r3, [r3, #0]
8002116: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
800211a: b29a uxth r2, r3
800211c: 687b ldr r3, [r7, #4]
800211e: 681b ldr r3, [r3, #0]
8002120: f042 0204 orr.w r2, r2, #4
8002124: b292 uxth r2, r2
8002126: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
800212a: 6878 ldr r0, [r7, #4]
800212c: f007 fcb0 bl 8009a90 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF))
8002130: 687b ldr r3, [r7, #4]
8002132: 681b ldr r3, [r3, #0]
8002134: 4618 mov r0, r3
8002136: f005 fd24 bl 8007b82 <USB_ReadInterrupts>
800213a: 4603 mov r3, r0
800213c: f403 7300 and.w r3, r3, #512 ; 0x200
8002140: f5b3 7f00 cmp.w r3, #512 ; 0x200
8002144: d10e bne.n 8002164 <HAL_PCD_IRQHandler+0x1b8>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8002146: 687b ldr r3, [r7, #4]
8002148: 681b ldr r3, [r3, #0]
800214a: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
800214e: b29a uxth r2, r3
8002150: 687b ldr r3, [r7, #4]
8002152: 681b ldr r3, [r3, #0]
8002154: f422 7200 bic.w r2, r2, #512 ; 0x200
8002158: b292 uxth r2, r2
800215a: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
800215e: 6878 ldr r0, [r7, #4]
8002160: f007 fc69 bl 8009a36 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF))
8002164: 687b ldr r3, [r7, #4]
8002166: 681b ldr r3, [r3, #0]
8002168: 4618 mov r0, r3
800216a: f005 fd0a bl 8007b82 <USB_ReadInterrupts>
800216e: 4603 mov r3, r0
8002170: f403 7380 and.w r3, r3, #256 ; 0x100
8002174: f5b3 7f80 cmp.w r3, #256 ; 0x100
8002178: d10b bne.n 8002192 <HAL_PCD_IRQHandler+0x1e6>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
800217a: 687b ldr r3, [r7, #4]
800217c: 681b ldr r3, [r3, #0]
800217e: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8002182: b29a uxth r2, r3
8002184: 687b ldr r3, [r7, #4]
8002186: 681b ldr r3, [r3, #0]
8002188: f422 7280 bic.w r2, r2, #256 ; 0x100
800218c: b292 uxth r2, r2
800218e: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
}
8002192: bf00 nop
8002194: 3708 adds r7, #8
8002196: 46bd mov sp, r7
8002198: bd80 pop {r7, pc}
0800219a <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
800219a: b580 push {r7, lr}
800219c: b082 sub sp, #8
800219e: af00 add r7, sp, #0
80021a0: 6078 str r0, [r7, #4]
80021a2: 460b mov r3, r1
80021a4: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
80021a6: 687b ldr r3, [r7, #4]
80021a8: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80021ac: 2b01 cmp r3, #1
80021ae: d101 bne.n 80021b4 <HAL_PCD_SetAddress+0x1a>
80021b0: 2302 movs r3, #2
80021b2: e013 b.n 80021dc <HAL_PCD_SetAddress+0x42>
80021b4: 687b ldr r3, [r7, #4]
80021b6: 2201 movs r2, #1
80021b8: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
hpcd->USB_Address = address;
80021bc: 687b ldr r3, [r7, #4]
80021be: 78fa ldrb r2, [r7, #3]
80021c0: f883 2024 strb.w r2, [r3, #36] ; 0x24
(void)USB_SetDevAddress(hpcd->Instance, address);
80021c4: 687b ldr r3, [r7, #4]
80021c6: 681b ldr r3, [r3, #0]
80021c8: 78fa ldrb r2, [r7, #3]
80021ca: 4611 mov r1, r2
80021cc: 4618 mov r0, r3
80021ce: f005 fcb9 bl 8007b44 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
80021d2: 687b ldr r3, [r7, #4]
80021d4: 2200 movs r2, #0
80021d6: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
80021da: 2300 movs r3, #0
}
80021dc: 4618 mov r0, r3
80021de: 3708 adds r7, #8
80021e0: 46bd mov sp, r7
80021e2: bd80 pop {r7, pc}
080021e4 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
80021e4: b580 push {r7, lr}
80021e6: b084 sub sp, #16
80021e8: af00 add r7, sp, #0
80021ea: 6078 str r0, [r7, #4]
80021ec: 4608 mov r0, r1
80021ee: 4611 mov r1, r2
80021f0: 461a mov r2, r3
80021f2: 4603 mov r3, r0
80021f4: 70fb strb r3, [r7, #3]
80021f6: 460b mov r3, r1
80021f8: 803b strh r3, [r7, #0]
80021fa: 4613 mov r3, r2
80021fc: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
80021fe: 2300 movs r3, #0
8002200: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8002202: f997 3003 ldrsb.w r3, [r7, #3]
8002206: 2b00 cmp r3, #0
8002208: da0e bge.n 8002228 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800220a: 78fb ldrb r3, [r7, #3]
800220c: f003 0307 and.w r3, r3, #7
8002210: 1c5a adds r2, r3, #1
8002212: 4613 mov r3, r2
8002214: 009b lsls r3, r3, #2
8002216: 4413 add r3, r2
8002218: 00db lsls r3, r3, #3
800221a: 687a ldr r2, [r7, #4]
800221c: 4413 add r3, r2
800221e: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002220: 68fb ldr r3, [r7, #12]
8002222: 2201 movs r2, #1
8002224: 705a strb r2, [r3, #1]
8002226: e00e b.n 8002246 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002228: 78fb ldrb r3, [r7, #3]
800222a: f003 0207 and.w r2, r3, #7
800222e: 4613 mov r3, r2
8002230: 009b lsls r3, r3, #2
8002232: 4413 add r3, r2
8002234: 00db lsls r3, r3, #3
8002236: f503 73b4 add.w r3, r3, #360 ; 0x168
800223a: 687a ldr r2, [r7, #4]
800223c: 4413 add r3, r2
800223e: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002240: 68fb ldr r3, [r7, #12]
8002242: 2200 movs r2, #0
8002244: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8002246: 78fb ldrb r3, [r7, #3]
8002248: f003 0307 and.w r3, r3, #7
800224c: b2da uxtb r2, r3
800224e: 68fb ldr r3, [r7, #12]
8002250: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8002252: 883a ldrh r2, [r7, #0]
8002254: 68fb ldr r3, [r7, #12]
8002256: 611a str r2, [r3, #16]
ep->type = ep_type;
8002258: 68fb ldr r3, [r7, #12]
800225a: 78ba ldrb r2, [r7, #2]
800225c: 70da strb r2, [r3, #3]
if (ep->is_in != 0U)
800225e: 68fb ldr r3, [r7, #12]
8002260: 785b ldrb r3, [r3, #1]
8002262: 2b00 cmp r3, #0
8002264: d004 beq.n 8002270 <HAL_PCD_EP_Open+0x8c>
{
/* Assign a Tx FIFO */
ep->tx_fifo_num = ep->num;
8002266: 68fb ldr r3, [r7, #12]
8002268: 781b ldrb r3, [r3, #0]
800226a: b29a uxth r2, r3
800226c: 68fb ldr r3, [r7, #12]
800226e: 81da strh r2, [r3, #14]
}
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8002270: 78bb ldrb r3, [r7, #2]
8002272: 2b02 cmp r3, #2
8002274: d102 bne.n 800227c <HAL_PCD_EP_Open+0x98>
{
ep->data_pid_start = 0U;
8002276: 68fb ldr r3, [r7, #12]
8002278: 2200 movs r2, #0
800227a: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
800227c: 687b ldr r3, [r7, #4]
800227e: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8002282: 2b01 cmp r3, #1
8002284: d101 bne.n 800228a <HAL_PCD_EP_Open+0xa6>
8002286: 2302 movs r3, #2
8002288: e00e b.n 80022a8 <HAL_PCD_EP_Open+0xc4>
800228a: 687b ldr r3, [r7, #4]
800228c: 2201 movs r2, #1
800228e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8002292: 687b ldr r3, [r7, #4]
8002294: 681b ldr r3, [r3, #0]
8002296: 68f9 ldr r1, [r7, #12]
8002298: 4618 mov r0, r3
800229a: f003 fa9d bl 80057d8 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
800229e: 687b ldr r3, [r7, #4]
80022a0: 2200 movs r2, #0
80022a2: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return ret;
80022a6: 7afb ldrb r3, [r7, #11]
}
80022a8: 4618 mov r0, r3
80022aa: 3710 adds r7, #16
80022ac: 46bd mov sp, r7
80022ae: bd80 pop {r7, pc}
080022b0 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80022b0: b580 push {r7, lr}
80022b2: b084 sub sp, #16
80022b4: af00 add r7, sp, #0
80022b6: 6078 str r0, [r7, #4]
80022b8: 460b mov r3, r1
80022ba: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80022bc: f997 3003 ldrsb.w r3, [r7, #3]
80022c0: 2b00 cmp r3, #0
80022c2: da0e bge.n 80022e2 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80022c4: 78fb ldrb r3, [r7, #3]
80022c6: f003 0307 and.w r3, r3, #7
80022ca: 1c5a adds r2, r3, #1
80022cc: 4613 mov r3, r2
80022ce: 009b lsls r3, r3, #2
80022d0: 4413 add r3, r2
80022d2: 00db lsls r3, r3, #3
80022d4: 687a ldr r2, [r7, #4]
80022d6: 4413 add r3, r2
80022d8: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80022da: 68fb ldr r3, [r7, #12]
80022dc: 2201 movs r2, #1
80022de: 705a strb r2, [r3, #1]
80022e0: e00e b.n 8002300 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80022e2: 78fb ldrb r3, [r7, #3]
80022e4: f003 0207 and.w r2, r3, #7
80022e8: 4613 mov r3, r2
80022ea: 009b lsls r3, r3, #2
80022ec: 4413 add r3, r2
80022ee: 00db lsls r3, r3, #3
80022f0: f503 73b4 add.w r3, r3, #360 ; 0x168
80022f4: 687a ldr r2, [r7, #4]
80022f6: 4413 add r3, r2
80022f8: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80022fa: 68fb ldr r3, [r7, #12]
80022fc: 2200 movs r2, #0
80022fe: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8002300: 78fb ldrb r3, [r7, #3]
8002302: f003 0307 and.w r3, r3, #7
8002306: b2da uxtb r2, r3
8002308: 68fb ldr r3, [r7, #12]
800230a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800230c: 687b ldr r3, [r7, #4]
800230e: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8002312: 2b01 cmp r3, #1
8002314: d101 bne.n 800231a <HAL_PCD_EP_Close+0x6a>
8002316: 2302 movs r3, #2
8002318: e00e b.n 8002338 <HAL_PCD_EP_Close+0x88>
800231a: 687b ldr r3, [r7, #4]
800231c: 2201 movs r2, #1
800231e: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8002322: 687b ldr r3, [r7, #4]
8002324: 681b ldr r3, [r3, #0]
8002326: 68f9 ldr r1, [r7, #12]
8002328: 4618 mov r0, r3
800232a: f003 fde9 bl 8005f00 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
800232e: 687b ldr r3, [r7, #4]
8002330: 2200 movs r2, #0
8002332: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8002336: 2300 movs r3, #0
}
8002338: 4618 mov r0, r3
800233a: 3710 adds r7, #16
800233c: 46bd mov sp, r7
800233e: bd80 pop {r7, pc}
08002340 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8002340: b580 push {r7, lr}
8002342: b086 sub sp, #24
8002344: af00 add r7, sp, #0
8002346: 60f8 str r0, [r7, #12]
8002348: 607a str r2, [r7, #4]
800234a: 603b str r3, [r7, #0]
800234c: 460b mov r3, r1
800234e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002350: 7afb ldrb r3, [r7, #11]
8002352: f003 0207 and.w r2, r3, #7
8002356: 4613 mov r3, r2
8002358: 009b lsls r3, r3, #2
800235a: 4413 add r3, r2
800235c: 00db lsls r3, r3, #3
800235e: f503 73b4 add.w r3, r3, #360 ; 0x168
8002362: 68fa ldr r2, [r7, #12]
8002364: 4413 add r3, r2
8002366: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8002368: 697b ldr r3, [r7, #20]
800236a: 687a ldr r2, [r7, #4]
800236c: 615a str r2, [r3, #20]
ep->xfer_len = len;
800236e: 697b ldr r3, [r7, #20]
8002370: 683a ldr r2, [r7, #0]
8002372: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8002374: 697b ldr r3, [r7, #20]
8002376: 2200 movs r2, #0
8002378: 61da str r2, [r3, #28]
ep->is_in = 0U;
800237a: 697b ldr r3, [r7, #20]
800237c: 2200 movs r2, #0
800237e: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8002380: 7afb ldrb r3, [r7, #11]
8002382: f003 0307 and.w r3, r3, #7
8002386: b2da uxtb r2, r3
8002388: 697b ldr r3, [r7, #20]
800238a: 701a strb r2, [r3, #0]
if ((ep_addr & EP_ADDR_MSK) == 0U)
800238c: 7afb ldrb r3, [r7, #11]
800238e: f003 0307 and.w r3, r3, #7
8002392: 2b00 cmp r3, #0
8002394: d106 bne.n 80023a4 <HAL_PCD_EP_Receive+0x64>
{
(void)USB_EP0StartXfer(hpcd->Instance, ep);
8002396: 68fb ldr r3, [r7, #12]
8002398: 681b ldr r3, [r3, #0]
800239a: 6979 ldr r1, [r7, #20]
800239c: 4618 mov r0, r3
800239e: f003 ff9c bl 80062da <USB_EPStartXfer>
80023a2: e005 b.n 80023b0 <HAL_PCD_EP_Receive+0x70>
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
80023a4: 68fb ldr r3, [r7, #12]
80023a6: 681b ldr r3, [r3, #0]
80023a8: 6979 ldr r1, [r7, #20]
80023aa: 4618 mov r0, r3
80023ac: f003 ff95 bl 80062da <USB_EPStartXfer>
}
return HAL_OK;
80023b0: 2300 movs r3, #0
}
80023b2: 4618 mov r0, r3
80023b4: 3718 adds r7, #24
80023b6: 46bd mov sp, r7
80023b8: bd80 pop {r7, pc}
080023ba <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80023ba: b480 push {r7}
80023bc: b083 sub sp, #12
80023be: af00 add r7, sp, #0
80023c0: 6078 str r0, [r7, #4]
80023c2: 460b mov r3, r1
80023c4: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
80023c6: 78fb ldrb r3, [r7, #3]
80023c8: f003 0207 and.w r2, r3, #7
80023cc: 6879 ldr r1, [r7, #4]
80023ce: 4613 mov r3, r2
80023d0: 009b lsls r3, r3, #2
80023d2: 4413 add r3, r2
80023d4: 00db lsls r3, r3, #3
80023d6: 440b add r3, r1
80023d8: f503 73c2 add.w r3, r3, #388 ; 0x184
80023dc: 681b ldr r3, [r3, #0]
}
80023de: 4618 mov r0, r3
80023e0: 370c adds r7, #12
80023e2: 46bd mov sp, r7
80023e4: f85d 7b04 ldr.w r7, [sp], #4
80023e8: 4770 bx lr
080023ea <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80023ea: b580 push {r7, lr}
80023ec: b086 sub sp, #24
80023ee: af00 add r7, sp, #0
80023f0: 60f8 str r0, [r7, #12]
80023f2: 607a str r2, [r7, #4]
80023f4: 603b str r3, [r7, #0]
80023f6: 460b mov r3, r1
80023f8: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80023fa: 7afb ldrb r3, [r7, #11]
80023fc: f003 0307 and.w r3, r3, #7
8002400: 1c5a adds r2, r3, #1
8002402: 4613 mov r3, r2
8002404: 009b lsls r3, r3, #2
8002406: 4413 add r3, r2
8002408: 00db lsls r3, r3, #3
800240a: 68fa ldr r2, [r7, #12]
800240c: 4413 add r3, r2
800240e: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8002410: 697b ldr r3, [r7, #20]
8002412: 687a ldr r2, [r7, #4]
8002414: 615a str r2, [r3, #20]
ep->xfer_len = len;
8002416: 697b ldr r3, [r7, #20]
8002418: 683a ldr r2, [r7, #0]
800241a: 619a str r2, [r3, #24]
ep->xfer_fill_db = 1U;
800241c: 697b ldr r3, [r7, #20]
800241e: 2201 movs r2, #1
8002420: f883 2024 strb.w r2, [r3, #36] ; 0x24
ep->xfer_len_db = len;
8002424: 697b ldr r3, [r7, #20]
8002426: 683a ldr r2, [r7, #0]
8002428: 621a str r2, [r3, #32]
ep->xfer_count = 0U;
800242a: 697b ldr r3, [r7, #20]
800242c: 2200 movs r2, #0
800242e: 61da str r2, [r3, #28]
ep->is_in = 1U;
8002430: 697b ldr r3, [r7, #20]
8002432: 2201 movs r2, #1
8002434: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8002436: 7afb ldrb r3, [r7, #11]
8002438: f003 0307 and.w r3, r3, #7
800243c: b2da uxtb r2, r3
800243e: 697b ldr r3, [r7, #20]
8002440: 701a strb r2, [r3, #0]
if ((ep_addr & EP_ADDR_MSK) == 0U)
8002442: 7afb ldrb r3, [r7, #11]
8002444: f003 0307 and.w r3, r3, #7
8002448: 2b00 cmp r3, #0
800244a: d106 bne.n 800245a <HAL_PCD_EP_Transmit+0x70>
{
(void)USB_EP0StartXfer(hpcd->Instance, ep);
800244c: 68fb ldr r3, [r7, #12]
800244e: 681b ldr r3, [r3, #0]
8002450: 6979 ldr r1, [r7, #20]
8002452: 4618 mov r0, r3
8002454: f003 ff41 bl 80062da <USB_EPStartXfer>
8002458: e005 b.n 8002466 <HAL_PCD_EP_Transmit+0x7c>
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
800245a: 68fb ldr r3, [r7, #12]
800245c: 681b ldr r3, [r3, #0]
800245e: 6979 ldr r1, [r7, #20]
8002460: 4618 mov r0, r3
8002462: f003 ff3a bl 80062da <USB_EPStartXfer>
}
return HAL_OK;
8002466: 2300 movs r3, #0
}
8002468: 4618 mov r0, r3
800246a: 3718 adds r7, #24
800246c: 46bd mov sp, r7
800246e: bd80 pop {r7, pc}
08002470 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002470: b580 push {r7, lr}
8002472: b084 sub sp, #16
8002474: af00 add r7, sp, #0
8002476: 6078 str r0, [r7, #4]
8002478: 460b mov r3, r1
800247a: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
800247c: 78fb ldrb r3, [r7, #3]
800247e: f003 0207 and.w r2, r3, #7
8002482: 687b ldr r3, [r7, #4]
8002484: 685b ldr r3, [r3, #4]
8002486: 429a cmp r2, r3
8002488: d901 bls.n 800248e <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
800248a: 2301 movs r3, #1
800248c: e03e b.n 800250c <HAL_PCD_EP_SetStall+0x9c>
}
if ((0x80U & ep_addr) == 0x80U)
800248e: f997 3003 ldrsb.w r3, [r7, #3]
8002492: 2b00 cmp r3, #0
8002494: da0e bge.n 80024b4 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002496: 78fb ldrb r3, [r7, #3]
8002498: f003 0307 and.w r3, r3, #7
800249c: 1c5a adds r2, r3, #1
800249e: 4613 mov r3, r2
80024a0: 009b lsls r3, r3, #2
80024a2: 4413 add r3, r2
80024a4: 00db lsls r3, r3, #3
80024a6: 687a ldr r2, [r7, #4]
80024a8: 4413 add r3, r2
80024aa: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80024ac: 68fb ldr r3, [r7, #12]
80024ae: 2201 movs r2, #1
80024b0: 705a strb r2, [r3, #1]
80024b2: e00c b.n 80024ce <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80024b4: 78fa ldrb r2, [r7, #3]
80024b6: 4613 mov r3, r2
80024b8: 009b lsls r3, r3, #2
80024ba: 4413 add r3, r2
80024bc: 00db lsls r3, r3, #3
80024be: f503 73b4 add.w r3, r3, #360 ; 0x168
80024c2: 687a ldr r2, [r7, #4]
80024c4: 4413 add r3, r2
80024c6: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80024c8: 68fb ldr r3, [r7, #12]
80024ca: 2200 movs r2, #0
80024cc: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
80024ce: 68fb ldr r3, [r7, #12]
80024d0: 2201 movs r2, #1
80024d2: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
80024d4: 78fb ldrb r3, [r7, #3]
80024d6: f003 0307 and.w r3, r3, #7
80024da: b2da uxtb r2, r3
80024dc: 68fb ldr r3, [r7, #12]
80024de: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80024e0: 687b ldr r3, [r7, #4]
80024e2: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80024e6: 2b01 cmp r3, #1
80024e8: d101 bne.n 80024ee <HAL_PCD_EP_SetStall+0x7e>
80024ea: 2302 movs r3, #2
80024ec: e00e b.n 800250c <HAL_PCD_EP_SetStall+0x9c>
80024ee: 687b ldr r3, [r7, #4]
80024f0: 2201 movs r2, #1
80024f2: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_EPSetStall(hpcd->Instance, ep);
80024f6: 687b ldr r3, [r7, #4]
80024f8: 681b ldr r3, [r3, #0]
80024fa: 68f9 ldr r1, [r7, #12]
80024fc: 4618 mov r0, r3
80024fe: f005 fa22 bl 8007946 <USB_EPSetStall>
__HAL_UNLOCK(hpcd);
8002502: 687b ldr r3, [r7, #4]
8002504: 2200 movs r2, #0
8002506: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
800250a: 2300 movs r3, #0
}
800250c: 4618 mov r0, r3
800250e: 3710 adds r7, #16
8002510: 46bd mov sp, r7
8002512: bd80 pop {r7, pc}
08002514 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002514: b580 push {r7, lr}
8002516: b084 sub sp, #16
8002518: af00 add r7, sp, #0
800251a: 6078 str r0, [r7, #4]
800251c: 460b mov r3, r1
800251e: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8002520: 78fb ldrb r3, [r7, #3]
8002522: f003 020f and.w r2, r3, #15
8002526: 687b ldr r3, [r7, #4]
8002528: 685b ldr r3, [r3, #4]
800252a: 429a cmp r2, r3
800252c: d901 bls.n 8002532 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
800252e: 2301 movs r3, #1
8002530: e040 b.n 80025b4 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8002532: f997 3003 ldrsb.w r3, [r7, #3]
8002536: 2b00 cmp r3, #0
8002538: da0e bge.n 8002558 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800253a: 78fb ldrb r3, [r7, #3]
800253c: f003 0307 and.w r3, r3, #7
8002540: 1c5a adds r2, r3, #1
8002542: 4613 mov r3, r2
8002544: 009b lsls r3, r3, #2
8002546: 4413 add r3, r2
8002548: 00db lsls r3, r3, #3
800254a: 687a ldr r2, [r7, #4]
800254c: 4413 add r3, r2
800254e: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002550: 68fb ldr r3, [r7, #12]
8002552: 2201 movs r2, #1
8002554: 705a strb r2, [r3, #1]
8002556: e00e b.n 8002576 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002558: 78fb ldrb r3, [r7, #3]
800255a: f003 0207 and.w r2, r3, #7
800255e: 4613 mov r3, r2
8002560: 009b lsls r3, r3, #2
8002562: 4413 add r3, r2
8002564: 00db lsls r3, r3, #3
8002566: f503 73b4 add.w r3, r3, #360 ; 0x168
800256a: 687a ldr r2, [r7, #4]
800256c: 4413 add r3, r2
800256e: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002570: 68fb ldr r3, [r7, #12]
8002572: 2200 movs r2, #0
8002574: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8002576: 68fb ldr r3, [r7, #12]
8002578: 2200 movs r2, #0
800257a: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
800257c: 78fb ldrb r3, [r7, #3]
800257e: f003 0307 and.w r3, r3, #7
8002582: b2da uxtb r2, r3
8002584: 68fb ldr r3, [r7, #12]
8002586: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8002588: 687b ldr r3, [r7, #4]
800258a: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
800258e: 2b01 cmp r3, #1
8002590: d101 bne.n 8002596 <HAL_PCD_EP_ClrStall+0x82>
8002592: 2302 movs r3, #2
8002594: e00e b.n 80025b4 <HAL_PCD_EP_ClrStall+0xa0>
8002596: 687b ldr r3, [r7, #4]
8002598: 2201 movs r2, #1
800259a: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_EPClearStall(hpcd->Instance, ep);
800259e: 687b ldr r3, [r7, #4]
80025a0: 681b ldr r3, [r3, #0]
80025a2: 68f9 ldr r1, [r7, #12]
80025a4: 4618 mov r0, r3
80025a6: f005 fa1f bl 80079e8 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
80025aa: 687b ldr r3, [r7, #4]
80025ac: 2200 movs r2, #0
80025ae: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
80025b2: 2300 movs r3, #0
}
80025b4: 4618 mov r0, r3
80025b6: 3710 adds r7, #16
80025b8: 46bd mov sp, r7
80025ba: bd80 pop {r7, pc}
080025bc <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
80025bc: b580 push {r7, lr}
80025be: b096 sub sp, #88 ; 0x58
80025c0: af00 add r7, sp, #0
80025c2: 6078 str r0, [r7, #4]
PCD_EPTypeDef *ep;
uint16_t count, wIstr, wEPVal, TxByteNbre;
uint8_t epindex;
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
80025c4: e3a9 b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
{
wIstr = hpcd->Instance->ISTR;
80025c6: 687b ldr r3, [r7, #4]
80025c8: 681b ldr r3, [r3, #0]
80025ca: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80025ce: f8a7 3056 strh.w r3, [r7, #86] ; 0x56
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
80025d2: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56
80025d6: b2db uxtb r3, r3
80025d8: f003 030f and.w r3, r3, #15
80025dc: f887 3055 strb.w r3, [r7, #85] ; 0x55
if (epindex == 0U)
80025e0: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
80025e4: 2b00 cmp r3, #0
80025e6: f040 8164 bne.w 80028b2 <PCD_EP_ISR_Handler+0x2f6>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
80025ea: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56
80025ee: f003 0310 and.w r3, r3, #16
80025f2: 2b00 cmp r3, #0
80025f4: d152 bne.n 800269c <PCD_EP_ISR_Handler+0xe0>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80025f6: 687b ldr r3, [r7, #4]
80025f8: 681b ldr r3, [r3, #0]
80025fa: 881b ldrh r3, [r3, #0]
80025fc: b29b uxth r3, r3
80025fe: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
8002602: f023 0370 bic.w r3, r3, #112 ; 0x70
8002606: 81fb strh r3, [r7, #14]
8002608: 687b ldr r3, [r7, #4]
800260a: 681a ldr r2, [r3, #0]
800260c: 89fb ldrh r3, [r7, #14]
800260e: ea6f 4343 mvn.w r3, r3, lsl #17
8002612: ea6f 4353 mvn.w r3, r3, lsr #17
8002616: b29b uxth r3, r3
8002618: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
800261a: 687b ldr r3, [r7, #4]
800261c: 3328 adds r3, #40 ; 0x28
800261e: 64fb str r3, [r7, #76] ; 0x4c
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8002620: 687b ldr r3, [r7, #4]
8002622: 681b ldr r3, [r3, #0]
8002624: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002628: b29b uxth r3, r3
800262a: 461a mov r2, r3
800262c: 6cfb ldr r3, [r7, #76] ; 0x4c
800262e: 781b ldrb r3, [r3, #0]
8002630: 00db lsls r3, r3, #3
8002632: 4413 add r3, r2
8002634: 3302 adds r3, #2
8002636: 005b lsls r3, r3, #1
8002638: 687a ldr r2, [r7, #4]
800263a: 6812 ldr r2, [r2, #0]
800263c: 4413 add r3, r2
800263e: f503 6380 add.w r3, r3, #1024 ; 0x400
8002642: 881b ldrh r3, [r3, #0]
8002644: f3c3 0209 ubfx r2, r3, #0, #10
8002648: 6cfb ldr r3, [r7, #76] ; 0x4c
800264a: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
800264c: 6cfb ldr r3, [r7, #76] ; 0x4c
800264e: 695a ldr r2, [r3, #20]
8002650: 6cfb ldr r3, [r7, #76] ; 0x4c
8002652: 69db ldr r3, [r3, #28]
8002654: 441a add r2, r3
8002656: 6cfb ldr r3, [r7, #76] ; 0x4c
8002658: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
800265a: 2100 movs r1, #0
800265c: 6878 ldr r0, [r7, #4]
800265e: f007 f9d0 bl 8009a02 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8002662: 687b ldr r3, [r7, #4]
8002664: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8002668: b2db uxtb r3, r3
800266a: 2b00 cmp r3, #0
800266c: f000 8355 beq.w 8002d1a <PCD_EP_ISR_Handler+0x75e>
8002670: 6cfb ldr r3, [r7, #76] ; 0x4c
8002672: 699b ldr r3, [r3, #24]
8002674: 2b00 cmp r3, #0
8002676: f040 8350 bne.w 8002d1a <PCD_EP_ISR_Handler+0x75e>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
800267a: 687b ldr r3, [r7, #4]
800267c: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8002680: b2db uxtb r3, r3
8002682: f063 037f orn r3, r3, #127 ; 0x7f
8002686: b2da uxtb r2, r3
8002688: 687b ldr r3, [r7, #4]
800268a: 681b ldr r3, [r3, #0]
800268c: b292 uxth r2, r2
800268e: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
hpcd->USB_Address = 0U;
8002692: 687b ldr r3, [r7, #4]
8002694: 2200 movs r2, #0
8002696: f883 2024 strb.w r2, [r3, #36] ; 0x24
800269a: e33e b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
800269c: 687b ldr r3, [r7, #4]
800269e: f503 73b4 add.w r3, r3, #360 ; 0x168
80026a2: 64fb str r3, [r7, #76] ; 0x4c
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80026a4: 687b ldr r3, [r7, #4]
80026a6: 681b ldr r3, [r3, #0]
80026a8: 881b ldrh r3, [r3, #0]
80026aa: f8a7 3052 strh.w r3, [r7, #82] ; 0x52
if ((wEPVal & USB_EP_SETUP) != 0U)
80026ae: f8b7 3052 ldrh.w r3, [r7, #82] ; 0x52
80026b2: f403 6300 and.w r3, r3, #2048 ; 0x800
80026b6: 2b00 cmp r3, #0
80026b8: d034 beq.n 8002724 <PCD_EP_ISR_Handler+0x168>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80026ba: 687b ldr r3, [r7, #4]
80026bc: 681b ldr r3, [r3, #0]
80026be: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80026c2: b29b uxth r3, r3
80026c4: 461a mov r2, r3
80026c6: 6cfb ldr r3, [r7, #76] ; 0x4c
80026c8: 781b ldrb r3, [r3, #0]
80026ca: 00db lsls r3, r3, #3
80026cc: 4413 add r3, r2
80026ce: 3306 adds r3, #6
80026d0: 005b lsls r3, r3, #1
80026d2: 687a ldr r2, [r7, #4]
80026d4: 6812 ldr r2, [r2, #0]
80026d6: 4413 add r3, r2
80026d8: f503 6380 add.w r3, r3, #1024 ; 0x400
80026dc: 881b ldrh r3, [r3, #0]
80026de: f3c3 0209 ubfx r2, r3, #0, #10
80026e2: 6cfb ldr r3, [r7, #76] ; 0x4c
80026e4: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80026e6: 687b ldr r3, [r7, #4]
80026e8: 6818 ldr r0, [r3, #0]
80026ea: 687b ldr r3, [r7, #4]
80026ec: f503 712c add.w r1, r3, #688 ; 0x2b0
80026f0: 6cfb ldr r3, [r7, #76] ; 0x4c
80026f2: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80026f4: 6cfb ldr r3, [r7, #76] ; 0x4c
80026f6: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80026f8: b29b uxth r3, r3
80026fa: f005 fa98 bl 8007c2e <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80026fe: 687b ldr r3, [r7, #4]
8002700: 681b ldr r3, [r3, #0]
8002702: 881b ldrh r3, [r3, #0]
8002704: b29a uxth r2, r3
8002706: f640 738f movw r3, #3983 ; 0xf8f
800270a: 4013 ands r3, r2
800270c: 823b strh r3, [r7, #16]
800270e: 687b ldr r3, [r7, #4]
8002710: 681b ldr r3, [r3, #0]
8002712: 8a3a ldrh r2, [r7, #16]
8002714: f042 0280 orr.w r2, r2, #128 ; 0x80
8002718: b292 uxth r2, r2
800271a: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
800271c: 6878 ldr r0, [r7, #4]
800271e: f007 f943 bl 80099a8 <HAL_PCD_SetupStageCallback>
8002722: e2fa b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8002724: f9b7 3052 ldrsh.w r3, [r7, #82] ; 0x52
8002728: 2b00 cmp r3, #0
800272a: f280 82f6 bge.w 8002d1a <PCD_EP_ISR_Handler+0x75e>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
800272e: 687b ldr r3, [r7, #4]
8002730: 681b ldr r3, [r3, #0]
8002732: 881b ldrh r3, [r3, #0]
8002734: b29a uxth r2, r3
8002736: f640 738f movw r3, #3983 ; 0xf8f
800273a: 4013 ands r3, r2
800273c: 83fb strh r3, [r7, #30]
800273e: 687b ldr r3, [r7, #4]
8002740: 681b ldr r3, [r3, #0]
8002742: 8bfa ldrh r2, [r7, #30]
8002744: f042 0280 orr.w r2, r2, #128 ; 0x80
8002748: b292 uxth r2, r2
800274a: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800274c: 687b ldr r3, [r7, #4]
800274e: 681b ldr r3, [r3, #0]
8002750: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002754: b29b uxth r3, r3
8002756: 461a mov r2, r3
8002758: 6cfb ldr r3, [r7, #76] ; 0x4c
800275a: 781b ldrb r3, [r3, #0]
800275c: 00db lsls r3, r3, #3
800275e: 4413 add r3, r2
8002760: 3306 adds r3, #6
8002762: 005b lsls r3, r3, #1
8002764: 687a ldr r2, [r7, #4]
8002766: 6812 ldr r2, [r2, #0]
8002768: 4413 add r3, r2
800276a: f503 6380 add.w r3, r3, #1024 ; 0x400
800276e: 881b ldrh r3, [r3, #0]
8002770: f3c3 0209 ubfx r2, r3, #0, #10
8002774: 6cfb ldr r3, [r7, #76] ; 0x4c
8002776: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8002778: 6cfb ldr r3, [r7, #76] ; 0x4c
800277a: 69db ldr r3, [r3, #28]
800277c: 2b00 cmp r3, #0
800277e: d019 beq.n 80027b4 <PCD_EP_ISR_Handler+0x1f8>
8002780: 6cfb ldr r3, [r7, #76] ; 0x4c
8002782: 695b ldr r3, [r3, #20]
8002784: 2b00 cmp r3, #0
8002786: d015 beq.n 80027b4 <PCD_EP_ISR_Handler+0x1f8>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8002788: 687b ldr r3, [r7, #4]
800278a: 6818 ldr r0, [r3, #0]
800278c: 6cfb ldr r3, [r7, #76] ; 0x4c
800278e: 6959 ldr r1, [r3, #20]
8002790: 6cfb ldr r3, [r7, #76] ; 0x4c
8002792: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8002794: 6cfb ldr r3, [r7, #76] ; 0x4c
8002796: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8002798: b29b uxth r3, r3
800279a: f005 fa48 bl 8007c2e <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
800279e: 6cfb ldr r3, [r7, #76] ; 0x4c
80027a0: 695a ldr r2, [r3, #20]
80027a2: 6cfb ldr r3, [r7, #76] ; 0x4c
80027a4: 69db ldr r3, [r3, #28]
80027a6: 441a add r2, r3
80027a8: 6cfb ldr r3, [r7, #76] ; 0x4c
80027aa: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
80027ac: 2100 movs r1, #0
80027ae: 6878 ldr r0, [r7, #4]
80027b0: f007 f90c bl 80099cc <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if ((PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0) & USB_EP_SETUP) == 0U)
80027b4: 687b ldr r3, [r7, #4]
80027b6: 681b ldr r3, [r3, #0]
80027b8: 881b ldrh r3, [r3, #0]
80027ba: b29b uxth r3, r3
80027bc: f403 6300 and.w r3, r3, #2048 ; 0x800
80027c0: 2b00 cmp r3, #0
80027c2: f040 82aa bne.w 8002d1a <PCD_EP_ISR_Handler+0x75e>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
80027c6: 687b ldr r3, [r7, #4]
80027c8: 681b ldr r3, [r3, #0]
80027ca: 61bb str r3, [r7, #24]
80027cc: 687b ldr r3, [r7, #4]
80027ce: 681b ldr r3, [r3, #0]
80027d0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80027d4: b29b uxth r3, r3
80027d6: 461a mov r2, r3
80027d8: 69bb ldr r3, [r7, #24]
80027da: 4413 add r3, r2
80027dc: 61bb str r3, [r7, #24]
80027de: 69bb ldr r3, [r7, #24]
80027e0: f203 430c addw r3, r3, #1036 ; 0x40c
80027e4: 617b str r3, [r7, #20]
80027e6: 6cfb ldr r3, [r7, #76] ; 0x4c
80027e8: 691b ldr r3, [r3, #16]
80027ea: 2b00 cmp r3, #0
80027ec: d112 bne.n 8002814 <PCD_EP_ISR_Handler+0x258>
80027ee: 697b ldr r3, [r7, #20]
80027f0: 881b ldrh r3, [r3, #0]
80027f2: b29b uxth r3, r3
80027f4: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80027f8: b29a uxth r2, r3
80027fa: 697b ldr r3, [r7, #20]
80027fc: 801a strh r2, [r3, #0]
80027fe: 697b ldr r3, [r7, #20]
8002800: 881b ldrh r3, [r3, #0]
8002802: b29b uxth r3, r3
8002804: ea6f 4343 mvn.w r3, r3, lsl #17
8002808: ea6f 4353 mvn.w r3, r3, lsr #17
800280c: b29a uxth r2, r3
800280e: 697b ldr r3, [r7, #20]
8002810: 801a strh r2, [r3, #0]
8002812: e02f b.n 8002874 <PCD_EP_ISR_Handler+0x2b8>
8002814: 6cfb ldr r3, [r7, #76] ; 0x4c
8002816: 691b ldr r3, [r3, #16]
8002818: 2b3e cmp r3, #62 ; 0x3e
800281a: d813 bhi.n 8002844 <PCD_EP_ISR_Handler+0x288>
800281c: 6cfb ldr r3, [r7, #76] ; 0x4c
800281e: 691b ldr r3, [r3, #16]
8002820: 085b lsrs r3, r3, #1
8002822: 647b str r3, [r7, #68] ; 0x44
8002824: 6cfb ldr r3, [r7, #76] ; 0x4c
8002826: 691b ldr r3, [r3, #16]
8002828: f003 0301 and.w r3, r3, #1
800282c: 2b00 cmp r3, #0
800282e: d002 beq.n 8002836 <PCD_EP_ISR_Handler+0x27a>
8002830: 6c7b ldr r3, [r7, #68] ; 0x44
8002832: 3301 adds r3, #1
8002834: 647b str r3, [r7, #68] ; 0x44
8002836: 6c7b ldr r3, [r7, #68] ; 0x44
8002838: b29b uxth r3, r3
800283a: 029b lsls r3, r3, #10
800283c: b29a uxth r2, r3
800283e: 697b ldr r3, [r7, #20]
8002840: 801a strh r2, [r3, #0]
8002842: e017 b.n 8002874 <PCD_EP_ISR_Handler+0x2b8>
8002844: 6cfb ldr r3, [r7, #76] ; 0x4c
8002846: 691b ldr r3, [r3, #16]
8002848: 095b lsrs r3, r3, #5
800284a: 647b str r3, [r7, #68] ; 0x44
800284c: 6cfb ldr r3, [r7, #76] ; 0x4c
800284e: 691b ldr r3, [r3, #16]
8002850: f003 031f and.w r3, r3, #31
8002854: 2b00 cmp r3, #0
8002856: d102 bne.n 800285e <PCD_EP_ISR_Handler+0x2a2>
8002858: 6c7b ldr r3, [r7, #68] ; 0x44
800285a: 3b01 subs r3, #1
800285c: 647b str r3, [r7, #68] ; 0x44
800285e: 6c7b ldr r3, [r7, #68] ; 0x44
8002860: b29b uxth r3, r3
8002862: 029b lsls r3, r3, #10
8002864: b29b uxth r3, r3
8002866: ea6f 4343 mvn.w r3, r3, lsl #17
800286a: ea6f 4353 mvn.w r3, r3, lsr #17
800286e: b29a uxth r2, r3
8002870: 697b ldr r3, [r7, #20]
8002872: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8002874: 687b ldr r3, [r7, #4]
8002876: 681b ldr r3, [r3, #0]
8002878: 881b ldrh r3, [r3, #0]
800287a: b29b uxth r3, r3
800287c: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8002880: f023 0370 bic.w r3, r3, #112 ; 0x70
8002884: 827b strh r3, [r7, #18]
8002886: 8a7b ldrh r3, [r7, #18]
8002888: f483 5380 eor.w r3, r3, #4096 ; 0x1000
800288c: 827b strh r3, [r7, #18]
800288e: 8a7b ldrh r3, [r7, #18]
8002890: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8002894: 827b strh r3, [r7, #18]
8002896: 687b ldr r3, [r7, #4]
8002898: 681a ldr r2, [r3, #0]
800289a: 8a7b ldrh r3, [r7, #18]
800289c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80028a0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80028a4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80028a8: f043 0380 orr.w r3, r3, #128 ; 0x80
80028ac: b29b uxth r3, r3
80028ae: 8013 strh r3, [r2, #0]
80028b0: e233 b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
80028b2: 687b ldr r3, [r7, #4]
80028b4: 681b ldr r3, [r3, #0]
80028b6: 461a mov r2, r3
80028b8: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
80028bc: 009b lsls r3, r3, #2
80028be: 4413 add r3, r2
80028c0: 881b ldrh r3, [r3, #0]
80028c2: f8a7 3052 strh.w r3, [r7, #82] ; 0x52
if ((wEPVal & USB_EP_CTR_RX) != 0U)
80028c6: f9b7 3052 ldrsh.w r3, [r7, #82] ; 0x52
80028ca: 2b00 cmp r3, #0
80028cc: f280 80fc bge.w 8002ac8 <PCD_EP_ISR_Handler+0x50c>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
80028d0: 687b ldr r3, [r7, #4]
80028d2: 681b ldr r3, [r3, #0]
80028d4: 461a mov r2, r3
80028d6: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
80028da: 009b lsls r3, r3, #2
80028dc: 4413 add r3, r2
80028de: 881b ldrh r3, [r3, #0]
80028e0: b29a uxth r2, r3
80028e2: f640 738f movw r3, #3983 ; 0xf8f
80028e6: 4013 ands r3, r2
80028e8: f8a7 3050 strh.w r3, [r7, #80] ; 0x50
80028ec: 687b ldr r3, [r7, #4]
80028ee: 681b ldr r3, [r3, #0]
80028f0: 461a mov r2, r3
80028f2: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
80028f6: 009b lsls r3, r3, #2
80028f8: 4413 add r3, r2
80028fa: f8b7 2050 ldrh.w r2, [r7, #80] ; 0x50
80028fe: f042 0280 orr.w r2, r2, #128 ; 0x80
8002902: b292 uxth r2, r2
8002904: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8002906: f897 2055 ldrb.w r2, [r7, #85] ; 0x55
800290a: 4613 mov r3, r2
800290c: 009b lsls r3, r3, #2
800290e: 4413 add r3, r2
8002910: 00db lsls r3, r3, #3
8002912: f503 73b4 add.w r3, r3, #360 ; 0x168
8002916: 687a ldr r2, [r7, #4]
8002918: 4413 add r3, r2
800291a: 64fb str r3, [r7, #76] ; 0x4c
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
800291c: 6cfb ldr r3, [r7, #76] ; 0x4c
800291e: 7b1b ldrb r3, [r3, #12]
8002920: 2b00 cmp r3, #0
8002922: d125 bne.n 8002970 <PCD_EP_ISR_Handler+0x3b4>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002924: 687b ldr r3, [r7, #4]
8002926: 681b ldr r3, [r3, #0]
8002928: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800292c: b29b uxth r3, r3
800292e: 461a mov r2, r3
8002930: 6cfb ldr r3, [r7, #76] ; 0x4c
8002932: 781b ldrb r3, [r3, #0]
8002934: 00db lsls r3, r3, #3
8002936: 4413 add r3, r2
8002938: 3306 adds r3, #6
800293a: 005b lsls r3, r3, #1
800293c: 687a ldr r2, [r7, #4]
800293e: 6812 ldr r2, [r2, #0]
8002940: 4413 add r3, r2
8002942: f503 6380 add.w r3, r3, #1024 ; 0x400
8002946: 881b ldrh r3, [r3, #0]
8002948: f3c3 0309 ubfx r3, r3, #0, #10
800294c: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
if (count != 0U)
8002950: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002954: 2b00 cmp r3, #0
8002956: f000 8092 beq.w 8002a7e <PCD_EP_ISR_Handler+0x4c2>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
800295a: 687b ldr r3, [r7, #4]
800295c: 6818 ldr r0, [r3, #0]
800295e: 6cfb ldr r3, [r7, #76] ; 0x4c
8002960: 6959 ldr r1, [r3, #20]
8002962: 6cfb ldr r3, [r7, #76] ; 0x4c
8002964: 88da ldrh r2, [r3, #6]
8002966: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
800296a: f005 f960 bl 8007c2e <USB_ReadPMA>
800296e: e086 b.n 8002a7e <PCD_EP_ISR_Handler+0x4c2>
}
}
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8002970: 6cfb ldr r3, [r7, #76] ; 0x4c
8002972: 78db ldrb r3, [r3, #3]
8002974: 2b02 cmp r3, #2
8002976: d10a bne.n 800298e <PCD_EP_ISR_Handler+0x3d2>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8002978: f8b7 3052 ldrh.w r3, [r7, #82] ; 0x52
800297c: 461a mov r2, r3
800297e: 6cf9 ldr r1, [r7, #76] ; 0x4c
8002980: 6878 ldr r0, [r7, #4]
8002982: f000 f9d8 bl 8002d36 <HAL_PCD_EP_DB_Receive>
8002986: 4603 mov r3, r0
8002988: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
800298c: e077 b.n 8002a7e <PCD_EP_ISR_Handler+0x4c2>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
800298e: 687b ldr r3, [r7, #4]
8002990: 681b ldr r3, [r3, #0]
8002992: 461a mov r2, r3
8002994: 6cfb ldr r3, [r7, #76] ; 0x4c
8002996: 781b ldrb r3, [r3, #0]
8002998: 009b lsls r3, r3, #2
800299a: 4413 add r3, r2
800299c: 881b ldrh r3, [r3, #0]
800299e: b29b uxth r3, r3
80029a0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80029a4: f023 0370 bic.w r3, r3, #112 ; 0x70
80029a8: f8a7 304a strh.w r3, [r7, #74] ; 0x4a
80029ac: 687b ldr r3, [r7, #4]
80029ae: 681b ldr r3, [r3, #0]
80029b0: 461a mov r2, r3
80029b2: 6cfb ldr r3, [r7, #76] ; 0x4c
80029b4: 781b ldrb r3, [r3, #0]
80029b6: 009b lsls r3, r3, #2
80029b8: 441a add r2, r3
80029ba: f8b7 304a ldrh.w r3, [r7, #74] ; 0x4a
80029be: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80029c2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80029c6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80029ca: f043 03c0 orr.w r3, r3, #192 ; 0xc0
80029ce: b29b uxth r3, r3
80029d0: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
80029d2: 687b ldr r3, [r7, #4]
80029d4: 681b ldr r3, [r3, #0]
80029d6: 461a mov r2, r3
80029d8: 6cfb ldr r3, [r7, #76] ; 0x4c
80029da: 781b ldrb r3, [r3, #0]
80029dc: 009b lsls r3, r3, #2
80029de: 4413 add r3, r2
80029e0: 881b ldrh r3, [r3, #0]
80029e2: b29b uxth r3, r3
80029e4: f403 4380 and.w r3, r3, #16384 ; 0x4000
80029e8: 2b00 cmp r3, #0
80029ea: d024 beq.n 8002a36 <PCD_EP_ISR_Handler+0x47a>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80029ec: 687b ldr r3, [r7, #4]
80029ee: 681b ldr r3, [r3, #0]
80029f0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80029f4: b29b uxth r3, r3
80029f6: 461a mov r2, r3
80029f8: 6cfb ldr r3, [r7, #76] ; 0x4c
80029fa: 781b ldrb r3, [r3, #0]
80029fc: 00db lsls r3, r3, #3
80029fe: 4413 add r3, r2
8002a00: 3302 adds r3, #2
8002a02: 005b lsls r3, r3, #1
8002a04: 687a ldr r2, [r7, #4]
8002a06: 6812 ldr r2, [r2, #0]
8002a08: 4413 add r3, r2
8002a0a: f503 6380 add.w r3, r3, #1024 ; 0x400
8002a0e: 881b ldrh r3, [r3, #0]
8002a10: f3c3 0309 ubfx r3, r3, #0, #10
8002a14: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
if (count != 0U)
8002a18: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002a1c: 2b00 cmp r3, #0
8002a1e: d02e beq.n 8002a7e <PCD_EP_ISR_Handler+0x4c2>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8002a20: 687b ldr r3, [r7, #4]
8002a22: 6818 ldr r0, [r3, #0]
8002a24: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a26: 6959 ldr r1, [r3, #20]
8002a28: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a2a: 891a ldrh r2, [r3, #8]
8002a2c: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002a30: f005 f8fd bl 8007c2e <USB_ReadPMA>
8002a34: e023 b.n 8002a7e <PCD_EP_ISR_Handler+0x4c2>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002a36: 687b ldr r3, [r7, #4]
8002a38: 681b ldr r3, [r3, #0]
8002a3a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002a3e: b29b uxth r3, r3
8002a40: 461a mov r2, r3
8002a42: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a44: 781b ldrb r3, [r3, #0]
8002a46: 00db lsls r3, r3, #3
8002a48: 4413 add r3, r2
8002a4a: 3306 adds r3, #6
8002a4c: 005b lsls r3, r3, #1
8002a4e: 687a ldr r2, [r7, #4]
8002a50: 6812 ldr r2, [r2, #0]
8002a52: 4413 add r3, r2
8002a54: f503 6380 add.w r3, r3, #1024 ; 0x400
8002a58: 881b ldrh r3, [r3, #0]
8002a5a: f3c3 0309 ubfx r3, r3, #0, #10
8002a5e: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
if (count != 0U)
8002a62: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002a66: 2b00 cmp r3, #0
8002a68: d009 beq.n 8002a7e <PCD_EP_ISR_Handler+0x4c2>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8002a6a: 687b ldr r3, [r7, #4]
8002a6c: 6818 ldr r0, [r3, #0]
8002a6e: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a70: 6959 ldr r1, [r3, #20]
8002a72: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a74: 895a ldrh r2, [r3, #10]
8002a76: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002a7a: f005 f8d8 bl 8007c2e <USB_ReadPMA>
}
}
}
}
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8002a7e: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a80: 69da ldr r2, [r3, #28]
8002a82: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002a86: 441a add r2, r3
8002a88: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a8a: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8002a8c: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a8e: 695a ldr r2, [r3, #20]
8002a90: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8002a94: 441a add r2, r3
8002a96: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a98: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8002a9a: 6cfb ldr r3, [r7, #76] ; 0x4c
8002a9c: 699b ldr r3, [r3, #24]
8002a9e: 2b00 cmp r3, #0
8002aa0: d005 beq.n 8002aae <PCD_EP_ISR_Handler+0x4f2>
8002aa2: f8b7 2048 ldrh.w r2, [r7, #72] ; 0x48
8002aa6: 6cfb ldr r3, [r7, #76] ; 0x4c
8002aa8: 691b ldr r3, [r3, #16]
8002aaa: 429a cmp r2, r3
8002aac: d206 bcs.n 8002abc <PCD_EP_ISR_Handler+0x500>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8002aae: 6cfb ldr r3, [r7, #76] ; 0x4c
8002ab0: 781b ldrb r3, [r3, #0]
8002ab2: 4619 mov r1, r3
8002ab4: 6878 ldr r0, [r7, #4]
8002ab6: f006 ff89 bl 80099cc <HAL_PCD_DataOutStageCallback>
8002aba: e005 b.n 8002ac8 <PCD_EP_ISR_Handler+0x50c>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void) USB_EPStartXfer(hpcd->Instance, ep);
8002abc: 687b ldr r3, [r7, #4]
8002abe: 681b ldr r3, [r3, #0]
8002ac0: 6cf9 ldr r1, [r7, #76] ; 0x4c
8002ac2: 4618 mov r0, r3
8002ac4: f003 fc09 bl 80062da <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8002ac8: f8b7 3052 ldrh.w r3, [r7, #82] ; 0x52
8002acc: f003 0380 and.w r3, r3, #128 ; 0x80
8002ad0: 2b00 cmp r3, #0
8002ad2: f000 8122 beq.w 8002d1a <PCD_EP_ISR_Handler+0x75e>
{
ep = &hpcd->IN_ep[epindex];
8002ad6: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
8002ada: 1c5a adds r2, r3, #1
8002adc: 4613 mov r3, r2
8002ade: 009b lsls r3, r3, #2
8002ae0: 4413 add r3, r2
8002ae2: 00db lsls r3, r3, #3
8002ae4: 687a ldr r2, [r7, #4]
8002ae6: 4413 add r3, r2
8002ae8: 64fb str r3, [r7, #76] ; 0x4c
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8002aea: 687b ldr r3, [r7, #4]
8002aec: 681b ldr r3, [r3, #0]
8002aee: 461a mov r2, r3
8002af0: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
8002af4: 009b lsls r3, r3, #2
8002af6: 4413 add r3, r2
8002af8: 881b ldrh r3, [r3, #0]
8002afa: b29b uxth r3, r3
8002afc: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
8002b00: f023 0370 bic.w r3, r3, #112 ; 0x70
8002b04: f8a7 3042 strh.w r3, [r7, #66] ; 0x42
8002b08: 687b ldr r3, [r7, #4]
8002b0a: 681b ldr r3, [r3, #0]
8002b0c: 461a mov r2, r3
8002b0e: f897 3055 ldrb.w r3, [r7, #85] ; 0x55
8002b12: 009b lsls r3, r3, #2
8002b14: 441a add r2, r3
8002b16: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42
8002b1a: ea6f 4343 mvn.w r3, r3, lsl #17
8002b1e: ea6f 4353 mvn.w r3, r3, lsr #17
8002b22: b29b uxth r3, r3
8002b24: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_BULK)
8002b26: 6cfb ldr r3, [r7, #76] ; 0x4c
8002b28: 78db ldrb r3, [r3, #3]
8002b2a: 2b02 cmp r3, #2
8002b2c: f000 809d beq.w 8002c6a <PCD_EP_ISR_Handler+0x6ae>
{
ep->xfer_len = 0U;
8002b30: 6cfb ldr r3, [r7, #76] ; 0x4c
8002b32: 2200 movs r2, #0
8002b34: 619a str r2, [r3, #24]
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002b36: f8b7 3052 ldrh.w r3, [r7, #82] ; 0x52
8002b3a: f003 0340 and.w r3, r3, #64 ; 0x40
8002b3e: 2b00 cmp r3, #0
8002b40: d046 beq.n 8002bd0 <PCD_EP_ISR_Handler+0x614>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002b42: 6cfb ldr r3, [r7, #76] ; 0x4c
8002b44: 785b ldrb r3, [r3, #1]
8002b46: 2b00 cmp r3, #0
8002b48: d126 bne.n 8002b98 <PCD_EP_ISR_Handler+0x5dc>
8002b4a: 687b ldr r3, [r7, #4]
8002b4c: 681b ldr r3, [r3, #0]
8002b4e: 627b str r3, [r7, #36] ; 0x24
8002b50: 687b ldr r3, [r7, #4]
8002b52: 681b ldr r3, [r3, #0]
8002b54: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002b58: b29b uxth r3, r3
8002b5a: 461a mov r2, r3
8002b5c: 6a7b ldr r3, [r7, #36] ; 0x24
8002b5e: 4413 add r3, r2
8002b60: 627b str r3, [r7, #36] ; 0x24
8002b62: 6cfb ldr r3, [r7, #76] ; 0x4c
8002b64: 781b ldrb r3, [r3, #0]
8002b66: 011a lsls r2, r3, #4
8002b68: 6a7b ldr r3, [r7, #36] ; 0x24
8002b6a: 4413 add r3, r2
8002b6c: f203 4304 addw r3, r3, #1028 ; 0x404
8002b70: 623b str r3, [r7, #32]
8002b72: 6a3b ldr r3, [r7, #32]
8002b74: 881b ldrh r3, [r3, #0]
8002b76: b29b uxth r3, r3
8002b78: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002b7c: b29a uxth r2, r3
8002b7e: 6a3b ldr r3, [r7, #32]
8002b80: 801a strh r2, [r3, #0]
8002b82: 6a3b ldr r3, [r7, #32]
8002b84: 881b ldrh r3, [r3, #0]
8002b86: b29b uxth r3, r3
8002b88: ea6f 4343 mvn.w r3, r3, lsl #17
8002b8c: ea6f 4353 mvn.w r3, r3, lsr #17
8002b90: b29a uxth r2, r3
8002b92: 6a3b ldr r3, [r7, #32]
8002b94: 801a strh r2, [r3, #0]
8002b96: e061 b.n 8002c5c <PCD_EP_ISR_Handler+0x6a0>
8002b98: 6cfb ldr r3, [r7, #76] ; 0x4c
8002b9a: 785b ldrb r3, [r3, #1]
8002b9c: 2b01 cmp r3, #1
8002b9e: d15d bne.n 8002c5c <PCD_EP_ISR_Handler+0x6a0>
8002ba0: 687b ldr r3, [r7, #4]
8002ba2: 681b ldr r3, [r3, #0]
8002ba4: 62fb str r3, [r7, #44] ; 0x2c
8002ba6: 687b ldr r3, [r7, #4]
8002ba8: 681b ldr r3, [r3, #0]
8002baa: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002bae: b29b uxth r3, r3
8002bb0: 461a mov r2, r3
8002bb2: 6afb ldr r3, [r7, #44] ; 0x2c
8002bb4: 4413 add r3, r2
8002bb6: 62fb str r3, [r7, #44] ; 0x2c
8002bb8: 6cfb ldr r3, [r7, #76] ; 0x4c
8002bba: 781b ldrb r3, [r3, #0]
8002bbc: 011a lsls r2, r3, #4
8002bbe: 6afb ldr r3, [r7, #44] ; 0x2c
8002bc0: 4413 add r3, r2
8002bc2: f203 4304 addw r3, r3, #1028 ; 0x404
8002bc6: 62bb str r3, [r7, #40] ; 0x28
8002bc8: 6abb ldr r3, [r7, #40] ; 0x28
8002bca: 2200 movs r2, #0
8002bcc: 801a strh r2, [r3, #0]
8002bce: e045 b.n 8002c5c <PCD_EP_ISR_Handler+0x6a0>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002bd0: 687b ldr r3, [r7, #4]
8002bd2: 681b ldr r3, [r3, #0]
8002bd4: 63fb str r3, [r7, #60] ; 0x3c
8002bd6: 6cfb ldr r3, [r7, #76] ; 0x4c
8002bd8: 785b ldrb r3, [r3, #1]
8002bda: 2b00 cmp r3, #0
8002bdc: d126 bne.n 8002c2c <PCD_EP_ISR_Handler+0x670>
8002bde: 687b ldr r3, [r7, #4]
8002be0: 681b ldr r3, [r3, #0]
8002be2: 637b str r3, [r7, #52] ; 0x34
8002be4: 687b ldr r3, [r7, #4]
8002be6: 681b ldr r3, [r3, #0]
8002be8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002bec: b29b uxth r3, r3
8002bee: 461a mov r2, r3
8002bf0: 6b7b ldr r3, [r7, #52] ; 0x34
8002bf2: 4413 add r3, r2
8002bf4: 637b str r3, [r7, #52] ; 0x34
8002bf6: 6cfb ldr r3, [r7, #76] ; 0x4c
8002bf8: 781b ldrb r3, [r3, #0]
8002bfa: 011a lsls r2, r3, #4
8002bfc: 6b7b ldr r3, [r7, #52] ; 0x34
8002bfe: 4413 add r3, r2
8002c00: f203 430c addw r3, r3, #1036 ; 0x40c
8002c04: 633b str r3, [r7, #48] ; 0x30
8002c06: 6b3b ldr r3, [r7, #48] ; 0x30
8002c08: 881b ldrh r3, [r3, #0]
8002c0a: b29b uxth r3, r3
8002c0c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002c10: b29a uxth r2, r3
8002c12: 6b3b ldr r3, [r7, #48] ; 0x30
8002c14: 801a strh r2, [r3, #0]
8002c16: 6b3b ldr r3, [r7, #48] ; 0x30
8002c18: 881b ldrh r3, [r3, #0]
8002c1a: b29b uxth r3, r3
8002c1c: ea6f 4343 mvn.w r3, r3, lsl #17
8002c20: ea6f 4353 mvn.w r3, r3, lsr #17
8002c24: b29a uxth r2, r3
8002c26: 6b3b ldr r3, [r7, #48] ; 0x30
8002c28: 801a strh r2, [r3, #0]
8002c2a: e017 b.n 8002c5c <PCD_EP_ISR_Handler+0x6a0>
8002c2c: 6cfb ldr r3, [r7, #76] ; 0x4c
8002c2e: 785b ldrb r3, [r3, #1]
8002c30: 2b01 cmp r3, #1
8002c32: d113 bne.n 8002c5c <PCD_EP_ISR_Handler+0x6a0>
8002c34: 687b ldr r3, [r7, #4]
8002c36: 681b ldr r3, [r3, #0]
8002c38: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002c3c: b29b uxth r3, r3
8002c3e: 461a mov r2, r3
8002c40: 6bfb ldr r3, [r7, #60] ; 0x3c
8002c42: 4413 add r3, r2
8002c44: 63fb str r3, [r7, #60] ; 0x3c
8002c46: 6cfb ldr r3, [r7, #76] ; 0x4c
8002c48: 781b ldrb r3, [r3, #0]
8002c4a: 011a lsls r2, r3, #4
8002c4c: 6bfb ldr r3, [r7, #60] ; 0x3c
8002c4e: 4413 add r3, r2
8002c50: f203 430c addw r3, r3, #1036 ; 0x40c
8002c54: 63bb str r3, [r7, #56] ; 0x38
8002c56: 6bbb ldr r3, [r7, #56] ; 0x38
8002c58: 2200 movs r2, #0
8002c5a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002c5c: 6cfb ldr r3, [r7, #76] ; 0x4c
8002c5e: 781b ldrb r3, [r3, #0]
8002c60: 4619 mov r1, r3
8002c62: 6878 ldr r0, [r7, #4]
8002c64: f006 fecd bl 8009a02 <HAL_PCD_DataInStageCallback>
8002c68: e057 b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
/* Manage Bulk Single Buffer Transaction */
if ((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U))
8002c6a: 6cfb ldr r3, [r7, #76] ; 0x4c
8002c6c: 78db ldrb r3, [r3, #3]
8002c6e: 2b02 cmp r3, #2
8002c70: d14c bne.n 8002d0c <PCD_EP_ISR_Handler+0x750>
8002c72: f8b7 3052 ldrh.w r3, [r7, #82] ; 0x52
8002c76: f403 7380 and.w r3, r3, #256 ; 0x100
8002c7a: 2b00 cmp r3, #0
8002c7c: d146 bne.n 8002d0c <PCD_EP_ISR_Handler+0x750>
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8002c7e: 687b ldr r3, [r7, #4]
8002c80: 681b ldr r3, [r3, #0]
8002c82: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002c86: b29b uxth r3, r3
8002c88: 461a mov r2, r3
8002c8a: 6cfb ldr r3, [r7, #76] ; 0x4c
8002c8c: 781b ldrb r3, [r3, #0]
8002c8e: 00db lsls r3, r3, #3
8002c90: 4413 add r3, r2
8002c92: 3302 adds r3, #2
8002c94: 005b lsls r3, r3, #1
8002c96: 687a ldr r2, [r7, #4]
8002c98: 6812 ldr r2, [r2, #0]
8002c9a: 4413 add r3, r2
8002c9c: f503 6380 add.w r3, r3, #1024 ; 0x400
8002ca0: 881b ldrh r3, [r3, #0]
8002ca2: f3c3 0309 ubfx r3, r3, #0, #10
8002ca6: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
if (ep->xfer_len > TxByteNbre)
8002caa: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cac: 699a ldr r2, [r3, #24]
8002cae: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8002cb2: 429a cmp r2, r3
8002cb4: d907 bls.n 8002cc6 <PCD_EP_ISR_Handler+0x70a>
{
ep->xfer_len -= TxByteNbre;
8002cb6: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cb8: 699a ldr r2, [r3, #24]
8002cba: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8002cbe: 1ad2 subs r2, r2, r3
8002cc0: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cc2: 619a str r2, [r3, #24]
8002cc4: e002 b.n 8002ccc <PCD_EP_ISR_Handler+0x710>
}
else
{
ep->xfer_len = 0U;
8002cc6: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cc8: 2200 movs r2, #0
8002cca: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8002ccc: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cce: 699b ldr r3, [r3, #24]
8002cd0: 2b00 cmp r3, #0
8002cd2: d106 bne.n 8002ce2 <PCD_EP_ISR_Handler+0x726>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002cd4: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cd6: 781b ldrb r3, [r3, #0]
8002cd8: 4619 mov r1, r3
8002cda: 6878 ldr r0, [r7, #4]
8002cdc: f006 fe91 bl 8009a02 <HAL_PCD_DataInStageCallback>
8002ce0: e01b b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxByteNbre;
8002ce2: 6cfb ldr r3, [r7, #76] ; 0x4c
8002ce4: 695a ldr r2, [r3, #20]
8002ce6: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8002cea: 441a add r2, r3
8002cec: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cee: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
8002cf0: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cf2: 69da ldr r2, [r3, #28]
8002cf4: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8002cf8: 441a add r2, r3
8002cfa: 6cfb ldr r3, [r7, #76] ; 0x4c
8002cfc: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8002cfe: 687b ldr r3, [r7, #4]
8002d00: 681b ldr r3, [r3, #0]
8002d02: 6cf9 ldr r1, [r7, #76] ; 0x4c
8002d04: 4618 mov r0, r3
8002d06: f003 fae8 bl 80062da <USB_EPStartXfer>
if (ep->xfer_len == 0U)
8002d0a: e006 b.n 8002d1a <PCD_EP_ISR_Handler+0x75e>
}
}
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8002d0c: f8b7 3052 ldrh.w r3, [r7, #82] ; 0x52
8002d10: 461a mov r2, r3
8002d12: 6cf9 ldr r1, [r7, #76] ; 0x4c
8002d14: 6878 ldr r0, [r7, #4]
8002d16: f000 f91b bl 8002f50 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8002d1a: 687b ldr r3, [r7, #4]
8002d1c: 681b ldr r3, [r3, #0]
8002d1e: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8002d22: b29b uxth r3, r3
8002d24: b21b sxth r3, r3
8002d26: 2b00 cmp r3, #0
8002d28: f6ff ac4d blt.w 80025c6 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8002d2c: 2300 movs r3, #0
}
8002d2e: 4618 mov r0, r3
8002d30: 3758 adds r7, #88 ; 0x58
8002d32: 46bd mov sp, r7
8002d34: bd80 pop {r7, pc}
08002d36 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002d36: b580 push {r7, lr}
8002d38: b088 sub sp, #32
8002d3a: af00 add r7, sp, #0
8002d3c: 60f8 str r0, [r7, #12]
8002d3e: 60b9 str r1, [r7, #8]
8002d40: 4613 mov r3, r2
8002d42: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002d44: 88fb ldrh r3, [r7, #6]
8002d46: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002d4a: 2b00 cmp r3, #0
8002d4c: d07e beq.n 8002e4c <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002d4e: 68fb ldr r3, [r7, #12]
8002d50: 681b ldr r3, [r3, #0]
8002d52: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002d56: b29b uxth r3, r3
8002d58: 461a mov r2, r3
8002d5a: 68bb ldr r3, [r7, #8]
8002d5c: 781b ldrb r3, [r3, #0]
8002d5e: 00db lsls r3, r3, #3
8002d60: 4413 add r3, r2
8002d62: 3302 adds r3, #2
8002d64: 005b lsls r3, r3, #1
8002d66: 68fa ldr r2, [r7, #12]
8002d68: 6812 ldr r2, [r2, #0]
8002d6a: 4413 add r3, r2
8002d6c: f503 6380 add.w r3, r3, #1024 ; 0x400
8002d70: 881b ldrh r3, [r3, #0]
8002d72: f3c3 0309 ubfx r3, r3, #0, #10
8002d76: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8002d78: 68bb ldr r3, [r7, #8]
8002d7a: 699a ldr r2, [r3, #24]
8002d7c: 8b7b ldrh r3, [r7, #26]
8002d7e: 429a cmp r2, r3
8002d80: d306 bcc.n 8002d90 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8002d82: 68bb ldr r3, [r7, #8]
8002d84: 699a ldr r2, [r3, #24]
8002d86: 8b7b ldrh r3, [r7, #26]
8002d88: 1ad2 subs r2, r2, r3
8002d8a: 68bb ldr r3, [r7, #8]
8002d8c: 619a str r2, [r3, #24]
8002d8e: e002 b.n 8002d96 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8002d90: 68bb ldr r3, [r7, #8]
8002d92: 2200 movs r2, #0
8002d94: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8002d96: 68bb ldr r3, [r7, #8]
8002d98: 699b ldr r3, [r3, #24]
8002d9a: 2b00 cmp r3, #0
8002d9c: d123 bne.n 8002de6 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8002d9e: 68fb ldr r3, [r7, #12]
8002da0: 681b ldr r3, [r3, #0]
8002da2: 461a mov r2, r3
8002da4: 68bb ldr r3, [r7, #8]
8002da6: 781b ldrb r3, [r3, #0]
8002da8: 009b lsls r3, r3, #2
8002daa: 4413 add r3, r2
8002dac: 881b ldrh r3, [r3, #0]
8002dae: b29b uxth r3, r3
8002db0: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8002db4: f023 0370 bic.w r3, r3, #112 ; 0x70
8002db8: 833b strh r3, [r7, #24]
8002dba: 8b3b ldrh r3, [r7, #24]
8002dbc: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8002dc0: 833b strh r3, [r7, #24]
8002dc2: 68fb ldr r3, [r7, #12]
8002dc4: 681b ldr r3, [r3, #0]
8002dc6: 461a mov r2, r3
8002dc8: 68bb ldr r3, [r7, #8]
8002dca: 781b ldrb r3, [r3, #0]
8002dcc: 009b lsls r3, r3, #2
8002dce: 441a add r2, r3
8002dd0: 8b3b ldrh r3, [r7, #24]
8002dd2: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002dd6: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002dda: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002dde: f043 0380 orr.w r3, r3, #128 ; 0x80
8002de2: b29b uxth r3, r3
8002de4: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked sate which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002de6: 88fb ldrh r3, [r7, #6]
8002de8: f003 0340 and.w r3, r3, #64 ; 0x40
8002dec: 2b00 cmp r3, #0
8002dee: d01f beq.n 8002e30 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002df0: 68fb ldr r3, [r7, #12]
8002df2: 681b ldr r3, [r3, #0]
8002df4: 461a mov r2, r3
8002df6: 68bb ldr r3, [r7, #8]
8002df8: 781b ldrb r3, [r3, #0]
8002dfa: 009b lsls r3, r3, #2
8002dfc: 4413 add r3, r2
8002dfe: 881b ldrh r3, [r3, #0]
8002e00: b29b uxth r3, r3
8002e02: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002e06: f023 0370 bic.w r3, r3, #112 ; 0x70
8002e0a: 82fb strh r3, [r7, #22]
8002e0c: 68fb ldr r3, [r7, #12]
8002e0e: 681b ldr r3, [r3, #0]
8002e10: 461a mov r2, r3
8002e12: 68bb ldr r3, [r7, #8]
8002e14: 781b ldrb r3, [r3, #0]
8002e16: 009b lsls r3, r3, #2
8002e18: 441a add r2, r3
8002e1a: 8afb ldrh r3, [r7, #22]
8002e1c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002e20: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002e24: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002e28: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8002e2c: b29b uxth r3, r3
8002e2e: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002e30: 8b7b ldrh r3, [r7, #26]
8002e32: 2b00 cmp r3, #0
8002e34: f000 8087 beq.w 8002f46 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8002e38: 68fb ldr r3, [r7, #12]
8002e3a: 6818 ldr r0, [r3, #0]
8002e3c: 68bb ldr r3, [r7, #8]
8002e3e: 6959 ldr r1, [r3, #20]
8002e40: 68bb ldr r3, [r7, #8]
8002e42: 891a ldrh r2, [r3, #8]
8002e44: 8b7b ldrh r3, [r7, #26]
8002e46: f004 fef2 bl 8007c2e <USB_ReadPMA>
8002e4a: e07c b.n 8002f46 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002e4c: 68fb ldr r3, [r7, #12]
8002e4e: 681b ldr r3, [r3, #0]
8002e50: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002e54: b29b uxth r3, r3
8002e56: 461a mov r2, r3
8002e58: 68bb ldr r3, [r7, #8]
8002e5a: 781b ldrb r3, [r3, #0]
8002e5c: 00db lsls r3, r3, #3
8002e5e: 4413 add r3, r2
8002e60: 3306 adds r3, #6
8002e62: 005b lsls r3, r3, #1
8002e64: 68fa ldr r2, [r7, #12]
8002e66: 6812 ldr r2, [r2, #0]
8002e68: 4413 add r3, r2
8002e6a: f503 6380 add.w r3, r3, #1024 ; 0x400
8002e6e: 881b ldrh r3, [r3, #0]
8002e70: f3c3 0309 ubfx r3, r3, #0, #10
8002e74: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8002e76: 68bb ldr r3, [r7, #8]
8002e78: 699a ldr r2, [r3, #24]
8002e7a: 8b7b ldrh r3, [r7, #26]
8002e7c: 429a cmp r2, r3
8002e7e: d306 bcc.n 8002e8e <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8002e80: 68bb ldr r3, [r7, #8]
8002e82: 699a ldr r2, [r3, #24]
8002e84: 8b7b ldrh r3, [r7, #26]
8002e86: 1ad2 subs r2, r2, r3
8002e88: 68bb ldr r3, [r7, #8]
8002e8a: 619a str r2, [r3, #24]
8002e8c: e002 b.n 8002e94 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8002e8e: 68bb ldr r3, [r7, #8]
8002e90: 2200 movs r2, #0
8002e92: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8002e94: 68bb ldr r3, [r7, #8]
8002e96: 699b ldr r3, [r3, #24]
8002e98: 2b00 cmp r3, #0
8002e9a: d123 bne.n 8002ee4 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8002e9c: 68fb ldr r3, [r7, #12]
8002e9e: 681b ldr r3, [r3, #0]
8002ea0: 461a mov r2, r3
8002ea2: 68bb ldr r3, [r7, #8]
8002ea4: 781b ldrb r3, [r3, #0]
8002ea6: 009b lsls r3, r3, #2
8002ea8: 4413 add r3, r2
8002eaa: 881b ldrh r3, [r3, #0]
8002eac: b29b uxth r3, r3
8002eae: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8002eb2: f023 0370 bic.w r3, r3, #112 ; 0x70
8002eb6: 83fb strh r3, [r7, #30]
8002eb8: 8bfb ldrh r3, [r7, #30]
8002eba: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8002ebe: 83fb strh r3, [r7, #30]
8002ec0: 68fb ldr r3, [r7, #12]
8002ec2: 681b ldr r3, [r3, #0]
8002ec4: 461a mov r2, r3
8002ec6: 68bb ldr r3, [r7, #8]
8002ec8: 781b ldrb r3, [r3, #0]
8002eca: 009b lsls r3, r3, #2
8002ecc: 441a add r2, r3
8002ece: 8bfb ldrh r3, [r7, #30]
8002ed0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002ed4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002ed8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002edc: f043 0380 orr.w r3, r3, #128 ; 0x80
8002ee0: b29b uxth r3, r3
8002ee2: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8002ee4: 88fb ldrh r3, [r7, #6]
8002ee6: f003 0340 and.w r3, r3, #64 ; 0x40
8002eea: 2b00 cmp r3, #0
8002eec: d11f bne.n 8002f2e <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002eee: 68fb ldr r3, [r7, #12]
8002ef0: 681b ldr r3, [r3, #0]
8002ef2: 461a mov r2, r3
8002ef4: 68bb ldr r3, [r7, #8]
8002ef6: 781b ldrb r3, [r3, #0]
8002ef8: 009b lsls r3, r3, #2
8002efa: 4413 add r3, r2
8002efc: 881b ldrh r3, [r3, #0]
8002efe: b29b uxth r3, r3
8002f00: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002f04: f023 0370 bic.w r3, r3, #112 ; 0x70
8002f08: 83bb strh r3, [r7, #28]
8002f0a: 68fb ldr r3, [r7, #12]
8002f0c: 681b ldr r3, [r3, #0]
8002f0e: 461a mov r2, r3
8002f10: 68bb ldr r3, [r7, #8]
8002f12: 781b ldrb r3, [r3, #0]
8002f14: 009b lsls r3, r3, #2
8002f16: 441a add r2, r3
8002f18: 8bbb ldrh r3, [r7, #28]
8002f1a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002f1e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002f22: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002f26: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8002f2a: b29b uxth r3, r3
8002f2c: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002f2e: 8b7b ldrh r3, [r7, #26]
8002f30: 2b00 cmp r3, #0
8002f32: d008 beq.n 8002f46 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8002f34: 68fb ldr r3, [r7, #12]
8002f36: 6818 ldr r0, [r3, #0]
8002f38: 68bb ldr r3, [r7, #8]
8002f3a: 6959 ldr r1, [r3, #20]
8002f3c: 68bb ldr r3, [r7, #8]
8002f3e: 895a ldrh r2, [r3, #10]
8002f40: 8b7b ldrh r3, [r7, #26]
8002f42: f004 fe74 bl 8007c2e <USB_ReadPMA>
}
}
return count;
8002f46: 8b7b ldrh r3, [r7, #26]
}
8002f48: 4618 mov r0, r3
8002f4a: 3720 adds r7, #32
8002f4c: 46bd mov sp, r7
8002f4e: bd80 pop {r7, pc}
08002f50 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002f50: b580 push {r7, lr}
8002f52: b0a2 sub sp, #136 ; 0x88
8002f54: af00 add r7, sp, #0
8002f56: 60f8 str r0, [r7, #12]
8002f58: 60b9 str r1, [r7, #8]
8002f5a: 4613 mov r3, r2
8002f5c: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxByteNbre;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002f5e: 88fb ldrh r3, [r7, #6]
8002f60: f003 0340 and.w r3, r3, #64 ; 0x40
8002f64: 2b00 cmp r3, #0
8002f66: f000 81c7 beq.w 80032f8 <HAL_PCD_EP_DB_Transmit+0x3a8>
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002f6a: 68fb ldr r3, [r7, #12]
8002f6c: 681b ldr r3, [r3, #0]
8002f6e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002f72: b29b uxth r3, r3
8002f74: 461a mov r2, r3
8002f76: 68bb ldr r3, [r7, #8]
8002f78: 781b ldrb r3, [r3, #0]
8002f7a: 00db lsls r3, r3, #3
8002f7c: 4413 add r3, r2
8002f7e: 3302 adds r3, #2
8002f80: 005b lsls r3, r3, #1
8002f82: 68fa ldr r2, [r7, #12]
8002f84: 6812 ldr r2, [r2, #0]
8002f86: 4413 add r3, r2
8002f88: f503 6380 add.w r3, r3, #1024 ; 0x400
8002f8c: 881b ldrh r3, [r3, #0]
8002f8e: f3c3 0309 ubfx r3, r3, #0, #10
8002f92: f8a7 304e strh.w r3, [r7, #78] ; 0x4e
if (ep->xfer_len > TxByteNbre)
8002f96: 68bb ldr r3, [r7, #8]
8002f98: 699a ldr r2, [r3, #24]
8002f9a: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8002f9e: 429a cmp r2, r3
8002fa0: d907 bls.n 8002fb2 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxByteNbre;
8002fa2: 68bb ldr r3, [r7, #8]
8002fa4: 699a ldr r2, [r3, #24]
8002fa6: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8002faa: 1ad2 subs r2, r2, r3
8002fac: 68bb ldr r3, [r7, #8]
8002fae: 619a str r2, [r3, #24]
8002fb0: e002 b.n 8002fb8 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8002fb2: 68bb ldr r3, [r7, #8]
8002fb4: 2200 movs r2, #0
8002fb6: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8002fb8: 68bb ldr r3, [r7, #8]
8002fba: 699b ldr r3, [r3, #24]
8002fbc: 2b00 cmp r3, #0
8002fbe: f040 80b9 bne.w 8003134 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002fc2: 68bb ldr r3, [r7, #8]
8002fc4: 785b ldrb r3, [r3, #1]
8002fc6: 2b00 cmp r3, #0
8002fc8: d126 bne.n 8003018 <HAL_PCD_EP_DB_Transmit+0xc8>
8002fca: 68fb ldr r3, [r7, #12]
8002fcc: 681b ldr r3, [r3, #0]
8002fce: 62bb str r3, [r7, #40] ; 0x28
8002fd0: 68fb ldr r3, [r7, #12]
8002fd2: 681b ldr r3, [r3, #0]
8002fd4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002fd8: b29b uxth r3, r3
8002fda: 461a mov r2, r3
8002fdc: 6abb ldr r3, [r7, #40] ; 0x28
8002fde: 4413 add r3, r2
8002fe0: 62bb str r3, [r7, #40] ; 0x28
8002fe2: 68bb ldr r3, [r7, #8]
8002fe4: 781b ldrb r3, [r3, #0]
8002fe6: 011a lsls r2, r3, #4
8002fe8: 6abb ldr r3, [r7, #40] ; 0x28
8002fea: 4413 add r3, r2
8002fec: f203 4304 addw r3, r3, #1028 ; 0x404
8002ff0: 627b str r3, [r7, #36] ; 0x24
8002ff2: 6a7b ldr r3, [r7, #36] ; 0x24
8002ff4: 881b ldrh r3, [r3, #0]
8002ff6: b29b uxth r3, r3
8002ff8: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002ffc: b29a uxth r2, r3
8002ffe: 6a7b ldr r3, [r7, #36] ; 0x24
8003000: 801a strh r2, [r3, #0]
8003002: 6a7b ldr r3, [r7, #36] ; 0x24
8003004: 881b ldrh r3, [r3, #0]
8003006: b29b uxth r3, r3
8003008: ea6f 4343 mvn.w r3, r3, lsl #17
800300c: ea6f 4353 mvn.w r3, r3, lsr #17
8003010: b29a uxth r2, r3
8003012: 6a7b ldr r3, [r7, #36] ; 0x24
8003014: 801a strh r2, [r3, #0]
8003016: e01a b.n 800304e <HAL_PCD_EP_DB_Transmit+0xfe>
8003018: 68bb ldr r3, [r7, #8]
800301a: 785b ldrb r3, [r3, #1]
800301c: 2b01 cmp r3, #1
800301e: d116 bne.n 800304e <HAL_PCD_EP_DB_Transmit+0xfe>
8003020: 68fb ldr r3, [r7, #12]
8003022: 681b ldr r3, [r3, #0]
8003024: 633b str r3, [r7, #48] ; 0x30
8003026: 68fb ldr r3, [r7, #12]
8003028: 681b ldr r3, [r3, #0]
800302a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800302e: b29b uxth r3, r3
8003030: 461a mov r2, r3
8003032: 6b3b ldr r3, [r7, #48] ; 0x30
8003034: 4413 add r3, r2
8003036: 633b str r3, [r7, #48] ; 0x30
8003038: 68bb ldr r3, [r7, #8]
800303a: 781b ldrb r3, [r3, #0]
800303c: 011a lsls r2, r3, #4
800303e: 6b3b ldr r3, [r7, #48] ; 0x30
8003040: 4413 add r3, r2
8003042: f203 4304 addw r3, r3, #1028 ; 0x404
8003046: 62fb str r3, [r7, #44] ; 0x2c
8003048: 6afb ldr r3, [r7, #44] ; 0x2c
800304a: 2200 movs r2, #0
800304c: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800304e: 68fb ldr r3, [r7, #12]
8003050: 681b ldr r3, [r3, #0]
8003052: 623b str r3, [r7, #32]
8003054: 68bb ldr r3, [r7, #8]
8003056: 785b ldrb r3, [r3, #1]
8003058: 2b00 cmp r3, #0
800305a: d126 bne.n 80030aa <HAL_PCD_EP_DB_Transmit+0x15a>
800305c: 68fb ldr r3, [r7, #12]
800305e: 681b ldr r3, [r3, #0]
8003060: 61bb str r3, [r7, #24]
8003062: 68fb ldr r3, [r7, #12]
8003064: 681b ldr r3, [r3, #0]
8003066: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800306a: b29b uxth r3, r3
800306c: 461a mov r2, r3
800306e: 69bb ldr r3, [r7, #24]
8003070: 4413 add r3, r2
8003072: 61bb str r3, [r7, #24]
8003074: 68bb ldr r3, [r7, #8]
8003076: 781b ldrb r3, [r3, #0]
8003078: 011a lsls r2, r3, #4
800307a: 69bb ldr r3, [r7, #24]
800307c: 4413 add r3, r2
800307e: f203 430c addw r3, r3, #1036 ; 0x40c
8003082: 617b str r3, [r7, #20]
8003084: 697b ldr r3, [r7, #20]
8003086: 881b ldrh r3, [r3, #0]
8003088: b29b uxth r3, r3
800308a: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800308e: b29a uxth r2, r3
8003090: 697b ldr r3, [r7, #20]
8003092: 801a strh r2, [r3, #0]
8003094: 697b ldr r3, [r7, #20]
8003096: 881b ldrh r3, [r3, #0]
8003098: b29b uxth r3, r3
800309a: ea6f 4343 mvn.w r3, r3, lsl #17
800309e: ea6f 4353 mvn.w r3, r3, lsr #17
80030a2: b29a uxth r2, r3
80030a4: 697b ldr r3, [r7, #20]
80030a6: 801a strh r2, [r3, #0]
80030a8: e017 b.n 80030da <HAL_PCD_EP_DB_Transmit+0x18a>
80030aa: 68bb ldr r3, [r7, #8]
80030ac: 785b ldrb r3, [r3, #1]
80030ae: 2b01 cmp r3, #1
80030b0: d113 bne.n 80030da <HAL_PCD_EP_DB_Transmit+0x18a>
80030b2: 68fb ldr r3, [r7, #12]
80030b4: 681b ldr r3, [r3, #0]
80030b6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80030ba: b29b uxth r3, r3
80030bc: 461a mov r2, r3
80030be: 6a3b ldr r3, [r7, #32]
80030c0: 4413 add r3, r2
80030c2: 623b str r3, [r7, #32]
80030c4: 68bb ldr r3, [r7, #8]
80030c6: 781b ldrb r3, [r3, #0]
80030c8: 011a lsls r2, r3, #4
80030ca: 6a3b ldr r3, [r7, #32]
80030cc: 4413 add r3, r2
80030ce: f203 430c addw r3, r3, #1036 ; 0x40c
80030d2: 61fb str r3, [r7, #28]
80030d4: 69fb ldr r3, [r7, #28]
80030d6: 2200 movs r2, #0
80030d8: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80030da: 68bb ldr r3, [r7, #8]
80030dc: 781b ldrb r3, [r3, #0]
80030de: 4619 mov r1, r3
80030e0: 68f8 ldr r0, [r7, #12]
80030e2: f006 fc8e bl 8009a02 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
80030e6: 88fb ldrh r3, [r7, #6]
80030e8: f403 4380 and.w r3, r3, #16384 ; 0x4000
80030ec: 2b00 cmp r3, #0
80030ee: f000 82d4 beq.w 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
80030f2: 68fb ldr r3, [r7, #12]
80030f4: 681b ldr r3, [r3, #0]
80030f6: 461a mov r2, r3
80030f8: 68bb ldr r3, [r7, #8]
80030fa: 781b ldrb r3, [r3, #0]
80030fc: 009b lsls r3, r3, #2
80030fe: 4413 add r3, r2
8003100: 881b ldrh r3, [r3, #0]
8003102: b29b uxth r3, r3
8003104: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003108: f023 0370 bic.w r3, r3, #112 ; 0x70
800310c: 827b strh r3, [r7, #18]
800310e: 68fb ldr r3, [r7, #12]
8003110: 681b ldr r3, [r3, #0]
8003112: 461a mov r2, r3
8003114: 68bb ldr r3, [r7, #8]
8003116: 781b ldrb r3, [r3, #0]
8003118: 009b lsls r3, r3, #2
800311a: 441a add r2, r3
800311c: 8a7b ldrh r3, [r7, #18]
800311e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003122: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003126: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800312a: f043 0380 orr.w r3, r3, #128 ; 0x80
800312e: b29b uxth r3, r3
8003130: 8013 strh r3, [r2, #0]
8003132: e2b2 b.n 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003134: 88fb ldrh r3, [r7, #6]
8003136: f403 4380 and.w r3, r3, #16384 ; 0x4000
800313a: 2b00 cmp r3, #0
800313c: d021 beq.n 8003182 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
800313e: 68fb ldr r3, [r7, #12]
8003140: 681b ldr r3, [r3, #0]
8003142: 461a mov r2, r3
8003144: 68bb ldr r3, [r7, #8]
8003146: 781b ldrb r3, [r3, #0]
8003148: 009b lsls r3, r3, #2
800314a: 4413 add r3, r2
800314c: 881b ldrh r3, [r3, #0]
800314e: b29b uxth r3, r3
8003150: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003154: f023 0370 bic.w r3, r3, #112 ; 0x70
8003158: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
800315c: 68fb ldr r3, [r7, #12]
800315e: 681b ldr r3, [r3, #0]
8003160: 461a mov r2, r3
8003162: 68bb ldr r3, [r7, #8]
8003164: 781b ldrb r3, [r3, #0]
8003166: 009b lsls r3, r3, #2
8003168: 441a add r2, r3
800316a: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
800316e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003172: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003176: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800317a: f043 0380 orr.w r3, r3, #128 ; 0x80
800317e: b29b uxth r3, r3
8003180: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8003182: 68bb ldr r3, [r7, #8]
8003184: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8003188: 2b01 cmp r3, #1
800318a: f040 8286 bne.w 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
{
ep->xfer_buff += TxByteNbre;
800318e: 68bb ldr r3, [r7, #8]
8003190: 695a ldr r2, [r3, #20]
8003192: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8003196: 441a add r2, r3
8003198: 68bb ldr r3, [r7, #8]
800319a: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
800319c: 68bb ldr r3, [r7, #8]
800319e: 69da ldr r2, [r3, #28]
80031a0: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80031a4: 441a add r2, r3
80031a6: 68bb ldr r3, [r7, #8]
80031a8: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
80031aa: 68bb ldr r3, [r7, #8]
80031ac: 6a1a ldr r2, [r3, #32]
80031ae: 68bb ldr r3, [r7, #8]
80031b0: 691b ldr r3, [r3, #16]
80031b2: 429a cmp r2, r3
80031b4: d309 bcc.n 80031ca <HAL_PCD_EP_DB_Transmit+0x27a>
{
len = ep->maxpacket;
80031b6: 68bb ldr r3, [r7, #8]
80031b8: 691b ldr r3, [r3, #16]
80031ba: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db -= len;
80031bc: 68bb ldr r3, [r7, #8]
80031be: 6a1a ldr r2, [r3, #32]
80031c0: 6d3b ldr r3, [r7, #80] ; 0x50
80031c2: 1ad2 subs r2, r2, r3
80031c4: 68bb ldr r3, [r7, #8]
80031c6: 621a str r2, [r3, #32]
80031c8: e015 b.n 80031f6 <HAL_PCD_EP_DB_Transmit+0x2a6>
}
else if (ep->xfer_len_db == 0U)
80031ca: 68bb ldr r3, [r7, #8]
80031cc: 6a1b ldr r3, [r3, #32]
80031ce: 2b00 cmp r3, #0
80031d0: d107 bne.n 80031e2 <HAL_PCD_EP_DB_Transmit+0x292>
{
len = TxByteNbre;
80031d2: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80031d6: 653b str r3, [r7, #80] ; 0x50
ep->xfer_fill_db = 0U;
80031d8: 68bb ldr r3, [r7, #8]
80031da: 2200 movs r2, #0
80031dc: f883 2024 strb.w r2, [r3, #36] ; 0x24
80031e0: e009 b.n 80031f6 <HAL_PCD_EP_DB_Transmit+0x2a6>
}
else
{
ep->xfer_fill_db = 0U;
80031e2: 68bb ldr r3, [r7, #8]
80031e4: 2200 movs r2, #0
80031e6: f883 2024 strb.w r2, [r3, #36] ; 0x24
len = ep->xfer_len_db;
80031ea: 68bb ldr r3, [r7, #8]
80031ec: 6a1b ldr r3, [r3, #32]
80031ee: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db = 0U;
80031f0: 68bb ldr r3, [r7, #8]
80031f2: 2200 movs r2, #0
80031f4: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
80031f6: 68bb ldr r3, [r7, #8]
80031f8: 785b ldrb r3, [r3, #1]
80031fa: 2b00 cmp r3, #0
80031fc: d155 bne.n 80032aa <HAL_PCD_EP_DB_Transmit+0x35a>
80031fe: 68fb ldr r3, [r7, #12]
8003200: 681b ldr r3, [r3, #0]
8003202: 63bb str r3, [r7, #56] ; 0x38
8003204: 68fb ldr r3, [r7, #12]
8003206: 681b ldr r3, [r3, #0]
8003208: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800320c: b29b uxth r3, r3
800320e: 461a mov r2, r3
8003210: 6bbb ldr r3, [r7, #56] ; 0x38
8003212: 4413 add r3, r2
8003214: 63bb str r3, [r7, #56] ; 0x38
8003216: 68bb ldr r3, [r7, #8]
8003218: 781b ldrb r3, [r3, #0]
800321a: 011a lsls r2, r3, #4
800321c: 6bbb ldr r3, [r7, #56] ; 0x38
800321e: 4413 add r3, r2
8003220: f203 4304 addw r3, r3, #1028 ; 0x404
8003224: 637b str r3, [r7, #52] ; 0x34
8003226: 6d3b ldr r3, [r7, #80] ; 0x50
8003228: 2b00 cmp r3, #0
800322a: d112 bne.n 8003252 <HAL_PCD_EP_DB_Transmit+0x302>
800322c: 6b7b ldr r3, [r7, #52] ; 0x34
800322e: 881b ldrh r3, [r3, #0]
8003230: b29b uxth r3, r3
8003232: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8003236: b29a uxth r2, r3
8003238: 6b7b ldr r3, [r7, #52] ; 0x34
800323a: 801a strh r2, [r3, #0]
800323c: 6b7b ldr r3, [r7, #52] ; 0x34
800323e: 881b ldrh r3, [r3, #0]
8003240: b29b uxth r3, r3
8003242: ea6f 4343 mvn.w r3, r3, lsl #17
8003246: ea6f 4353 mvn.w r3, r3, lsr #17
800324a: b29a uxth r2, r3
800324c: 6b7b ldr r3, [r7, #52] ; 0x34
800324e: 801a strh r2, [r3, #0]
8003250: e047 b.n 80032e2 <HAL_PCD_EP_DB_Transmit+0x392>
8003252: 6d3b ldr r3, [r7, #80] ; 0x50
8003254: 2b3e cmp r3, #62 ; 0x3e
8003256: d811 bhi.n 800327c <HAL_PCD_EP_DB_Transmit+0x32c>
8003258: 6d3b ldr r3, [r7, #80] ; 0x50
800325a: 085b lsrs r3, r3, #1
800325c: 64bb str r3, [r7, #72] ; 0x48
800325e: 6d3b ldr r3, [r7, #80] ; 0x50
8003260: f003 0301 and.w r3, r3, #1
8003264: 2b00 cmp r3, #0
8003266: d002 beq.n 800326e <HAL_PCD_EP_DB_Transmit+0x31e>
8003268: 6cbb ldr r3, [r7, #72] ; 0x48
800326a: 3301 adds r3, #1
800326c: 64bb str r3, [r7, #72] ; 0x48
800326e: 6cbb ldr r3, [r7, #72] ; 0x48
8003270: b29b uxth r3, r3
8003272: 029b lsls r3, r3, #10
8003274: b29a uxth r2, r3
8003276: 6b7b ldr r3, [r7, #52] ; 0x34
8003278: 801a strh r2, [r3, #0]
800327a: e032 b.n 80032e2 <HAL_PCD_EP_DB_Transmit+0x392>
800327c: 6d3b ldr r3, [r7, #80] ; 0x50
800327e: 095b lsrs r3, r3, #5
8003280: 64bb str r3, [r7, #72] ; 0x48
8003282: 6d3b ldr r3, [r7, #80] ; 0x50
8003284: f003 031f and.w r3, r3, #31
8003288: 2b00 cmp r3, #0
800328a: d102 bne.n 8003292 <HAL_PCD_EP_DB_Transmit+0x342>
800328c: 6cbb ldr r3, [r7, #72] ; 0x48
800328e: 3b01 subs r3, #1
8003290: 64bb str r3, [r7, #72] ; 0x48
8003292: 6cbb ldr r3, [r7, #72] ; 0x48
8003294: b29b uxth r3, r3
8003296: 029b lsls r3, r3, #10
8003298: b29b uxth r3, r3
800329a: ea6f 4343 mvn.w r3, r3, lsl #17
800329e: ea6f 4353 mvn.w r3, r3, lsr #17
80032a2: b29a uxth r2, r3
80032a4: 6b7b ldr r3, [r7, #52] ; 0x34
80032a6: 801a strh r2, [r3, #0]
80032a8: e01b b.n 80032e2 <HAL_PCD_EP_DB_Transmit+0x392>
80032aa: 68bb ldr r3, [r7, #8]
80032ac: 785b ldrb r3, [r3, #1]
80032ae: 2b01 cmp r3, #1
80032b0: d117 bne.n 80032e2 <HAL_PCD_EP_DB_Transmit+0x392>
80032b2: 68fb ldr r3, [r7, #12]
80032b4: 681b ldr r3, [r3, #0]
80032b6: 643b str r3, [r7, #64] ; 0x40
80032b8: 68fb ldr r3, [r7, #12]
80032ba: 681b ldr r3, [r3, #0]
80032bc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80032c0: b29b uxth r3, r3
80032c2: 461a mov r2, r3
80032c4: 6c3b ldr r3, [r7, #64] ; 0x40
80032c6: 4413 add r3, r2
80032c8: 643b str r3, [r7, #64] ; 0x40
80032ca: 68bb ldr r3, [r7, #8]
80032cc: 781b ldrb r3, [r3, #0]
80032ce: 011a lsls r2, r3, #4
80032d0: 6c3b ldr r3, [r7, #64] ; 0x40
80032d2: 4413 add r3, r2
80032d4: f203 4304 addw r3, r3, #1028 ; 0x404
80032d8: 63fb str r3, [r7, #60] ; 0x3c
80032da: 6d3b ldr r3, [r7, #80] ; 0x50
80032dc: b29a uxth r2, r3
80032de: 6bfb ldr r3, [r7, #60] ; 0x3c
80032e0: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
80032e2: 68fb ldr r3, [r7, #12]
80032e4: 6818 ldr r0, [r3, #0]
80032e6: 68bb ldr r3, [r7, #8]
80032e8: 6959 ldr r1, [r3, #20]
80032ea: 68bb ldr r3, [r7, #8]
80032ec: 891a ldrh r2, [r3, #8]
80032ee: 6d3b ldr r3, [r7, #80] ; 0x50
80032f0: b29b uxth r3, r3
80032f2: f004 fc56 bl 8007ba2 <USB_WritePMA>
80032f6: e1d0 b.n 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80032f8: 68fb ldr r3, [r7, #12]
80032fa: 681b ldr r3, [r3, #0]
80032fc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003300: b29b uxth r3, r3
8003302: 461a mov r2, r3
8003304: 68bb ldr r3, [r7, #8]
8003306: 781b ldrb r3, [r3, #0]
8003308: 00db lsls r3, r3, #3
800330a: 4413 add r3, r2
800330c: 3306 adds r3, #6
800330e: 005b lsls r3, r3, #1
8003310: 68fa ldr r2, [r7, #12]
8003312: 6812 ldr r2, [r2, #0]
8003314: 4413 add r3, r2
8003316: f503 6380 add.w r3, r3, #1024 ; 0x400
800331a: 881b ldrh r3, [r3, #0]
800331c: f3c3 0309 ubfx r3, r3, #0, #10
8003320: f8a7 304e strh.w r3, [r7, #78] ; 0x4e
if (ep->xfer_len >= TxByteNbre)
8003324: 68bb ldr r3, [r7, #8]
8003326: 699a ldr r2, [r3, #24]
8003328: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
800332c: 429a cmp r2, r3
800332e: d307 bcc.n 8003340 <HAL_PCD_EP_DB_Transmit+0x3f0>
{
ep->xfer_len -= TxByteNbre;
8003330: 68bb ldr r3, [r7, #8]
8003332: 699a ldr r2, [r3, #24]
8003334: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8003338: 1ad2 subs r2, r2, r3
800333a: 68bb ldr r3, [r7, #8]
800333c: 619a str r2, [r3, #24]
800333e: e002 b.n 8003346 <HAL_PCD_EP_DB_Transmit+0x3f6>
}
else
{
ep->xfer_len = 0U;
8003340: 68bb ldr r3, [r7, #8]
8003342: 2200 movs r2, #0
8003344: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8003346: 68bb ldr r3, [r7, #8]
8003348: 699b ldr r3, [r3, #24]
800334a: 2b00 cmp r3, #0
800334c: f040 80c4 bne.w 80034d8 <HAL_PCD_EP_DB_Transmit+0x588>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8003350: 68bb ldr r3, [r7, #8]
8003352: 785b ldrb r3, [r3, #1]
8003354: 2b00 cmp r3, #0
8003356: d126 bne.n 80033a6 <HAL_PCD_EP_DB_Transmit+0x456>
8003358: 68fb ldr r3, [r7, #12]
800335a: 681b ldr r3, [r3, #0]
800335c: 66fb str r3, [r7, #108] ; 0x6c
800335e: 68fb ldr r3, [r7, #12]
8003360: 681b ldr r3, [r3, #0]
8003362: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003366: b29b uxth r3, r3
8003368: 461a mov r2, r3
800336a: 6efb ldr r3, [r7, #108] ; 0x6c
800336c: 4413 add r3, r2
800336e: 66fb str r3, [r7, #108] ; 0x6c
8003370: 68bb ldr r3, [r7, #8]
8003372: 781b ldrb r3, [r3, #0]
8003374: 011a lsls r2, r3, #4
8003376: 6efb ldr r3, [r7, #108] ; 0x6c
8003378: 4413 add r3, r2
800337a: f203 4304 addw r3, r3, #1028 ; 0x404
800337e: 66bb str r3, [r7, #104] ; 0x68
8003380: 6ebb ldr r3, [r7, #104] ; 0x68
8003382: 881b ldrh r3, [r3, #0]
8003384: b29b uxth r3, r3
8003386: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800338a: b29a uxth r2, r3
800338c: 6ebb ldr r3, [r7, #104] ; 0x68
800338e: 801a strh r2, [r3, #0]
8003390: 6ebb ldr r3, [r7, #104] ; 0x68
8003392: 881b ldrh r3, [r3, #0]
8003394: b29b uxth r3, r3
8003396: ea6f 4343 mvn.w r3, r3, lsl #17
800339a: ea6f 4353 mvn.w r3, r3, lsr #17
800339e: b29a uxth r2, r3
80033a0: 6ebb ldr r3, [r7, #104] ; 0x68
80033a2: 801a strh r2, [r3, #0]
80033a4: e01a b.n 80033dc <HAL_PCD_EP_DB_Transmit+0x48c>
80033a6: 68bb ldr r3, [r7, #8]
80033a8: 785b ldrb r3, [r3, #1]
80033aa: 2b01 cmp r3, #1
80033ac: d116 bne.n 80033dc <HAL_PCD_EP_DB_Transmit+0x48c>
80033ae: 68fb ldr r3, [r7, #12]
80033b0: 681b ldr r3, [r3, #0]
80033b2: 677b str r3, [r7, #116] ; 0x74
80033b4: 68fb ldr r3, [r7, #12]
80033b6: 681b ldr r3, [r3, #0]
80033b8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80033bc: b29b uxth r3, r3
80033be: 461a mov r2, r3
80033c0: 6f7b ldr r3, [r7, #116] ; 0x74
80033c2: 4413 add r3, r2
80033c4: 677b str r3, [r7, #116] ; 0x74
80033c6: 68bb ldr r3, [r7, #8]
80033c8: 781b ldrb r3, [r3, #0]
80033ca: 011a lsls r2, r3, #4
80033cc: 6f7b ldr r3, [r7, #116] ; 0x74
80033ce: 4413 add r3, r2
80033d0: f203 4304 addw r3, r3, #1028 ; 0x404
80033d4: 673b str r3, [r7, #112] ; 0x70
80033d6: 6f3b ldr r3, [r7, #112] ; 0x70
80033d8: 2200 movs r2, #0
80033da: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80033dc: 68fb ldr r3, [r7, #12]
80033de: 681b ldr r3, [r3, #0]
80033e0: 67bb str r3, [r7, #120] ; 0x78
80033e2: 68bb ldr r3, [r7, #8]
80033e4: 785b ldrb r3, [r3, #1]
80033e6: 2b00 cmp r3, #0
80033e8: d12f bne.n 800344a <HAL_PCD_EP_DB_Transmit+0x4fa>
80033ea: 68fb ldr r3, [r7, #12]
80033ec: 681b ldr r3, [r3, #0]
80033ee: f8c7 3080 str.w r3, [r7, #128] ; 0x80
80033f2: 68fb ldr r3, [r7, #12]
80033f4: 681b ldr r3, [r3, #0]
80033f6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80033fa: b29b uxth r3, r3
80033fc: 461a mov r2, r3
80033fe: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
8003402: 4413 add r3, r2
8003404: f8c7 3080 str.w r3, [r7, #128] ; 0x80
8003408: 68bb ldr r3, [r7, #8]
800340a: 781b ldrb r3, [r3, #0]
800340c: 011a lsls r2, r3, #4
800340e: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
8003412: 4413 add r3, r2
8003414: f203 430c addw r3, r3, #1036 ; 0x40c
8003418: f8c7 3084 str.w r3, [r7, #132] ; 0x84
800341c: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8003420: 881b ldrh r3, [r3, #0]
8003422: b29b uxth r3, r3
8003424: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8003428: b29a uxth r2, r3
800342a: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
800342e: 801a strh r2, [r3, #0]
8003430: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8003434: 881b ldrh r3, [r3, #0]
8003436: b29b uxth r3, r3
8003438: ea6f 4343 mvn.w r3, r3, lsl #17
800343c: ea6f 4353 mvn.w r3, r3, lsr #17
8003440: b29a uxth r2, r3
8003442: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8003446: 801a strh r2, [r3, #0]
8003448: e017 b.n 800347a <HAL_PCD_EP_DB_Transmit+0x52a>
800344a: 68bb ldr r3, [r7, #8]
800344c: 785b ldrb r3, [r3, #1]
800344e: 2b01 cmp r3, #1
8003450: d113 bne.n 800347a <HAL_PCD_EP_DB_Transmit+0x52a>
8003452: 68fb ldr r3, [r7, #12]
8003454: 681b ldr r3, [r3, #0]
8003456: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800345a: b29b uxth r3, r3
800345c: 461a mov r2, r3
800345e: 6fbb ldr r3, [r7, #120] ; 0x78
8003460: 4413 add r3, r2
8003462: 67bb str r3, [r7, #120] ; 0x78
8003464: 68bb ldr r3, [r7, #8]
8003466: 781b ldrb r3, [r3, #0]
8003468: 011a lsls r2, r3, #4
800346a: 6fbb ldr r3, [r7, #120] ; 0x78
800346c: 4413 add r3, r2
800346e: f203 430c addw r3, r3, #1036 ; 0x40c
8003472: 67fb str r3, [r7, #124] ; 0x7c
8003474: 6ffb ldr r3, [r7, #124] ; 0x7c
8003476: 2200 movs r2, #0
8003478: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800347a: 68bb ldr r3, [r7, #8]
800347c: 781b ldrb r3, [r3, #0]
800347e: 4619 mov r1, r3
8003480: 68f8 ldr r0, [r7, #12]
8003482: f006 fabe bl 8009a02 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8003486: 88fb ldrh r3, [r7, #6]
8003488: f403 4380 and.w r3, r3, #16384 ; 0x4000
800348c: 2b00 cmp r3, #0
800348e: f040 8104 bne.w 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
8003492: 68fb ldr r3, [r7, #12]
8003494: 681b ldr r3, [r3, #0]
8003496: 461a mov r2, r3
8003498: 68bb ldr r3, [r7, #8]
800349a: 781b ldrb r3, [r3, #0]
800349c: 009b lsls r3, r3, #2
800349e: 4413 add r3, r2
80034a0: 881b ldrh r3, [r3, #0]
80034a2: b29b uxth r3, r3
80034a4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80034a8: f023 0370 bic.w r3, r3, #112 ; 0x70
80034ac: f8a7 3046 strh.w r3, [r7, #70] ; 0x46
80034b0: 68fb ldr r3, [r7, #12]
80034b2: 681b ldr r3, [r3, #0]
80034b4: 461a mov r2, r3
80034b6: 68bb ldr r3, [r7, #8]
80034b8: 781b ldrb r3, [r3, #0]
80034ba: 009b lsls r3, r3, #2
80034bc: 441a add r2, r3
80034be: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46
80034c2: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80034c6: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80034ca: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80034ce: f043 0380 orr.w r3, r3, #128 ; 0x80
80034d2: b29b uxth r3, r3
80034d4: 8013 strh r3, [r2, #0]
80034d6: e0e0 b.n 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80034d8: 88fb ldrh r3, [r7, #6]
80034da: f403 4380 and.w r3, r3, #16384 ; 0x4000
80034de: 2b00 cmp r3, #0
80034e0: d121 bne.n 8003526 <HAL_PCD_EP_DB_Transmit+0x5d6>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
80034e2: 68fb ldr r3, [r7, #12]
80034e4: 681b ldr r3, [r3, #0]
80034e6: 461a mov r2, r3
80034e8: 68bb ldr r3, [r7, #8]
80034ea: 781b ldrb r3, [r3, #0]
80034ec: 009b lsls r3, r3, #2
80034ee: 4413 add r3, r2
80034f0: 881b ldrh r3, [r3, #0]
80034f2: b29b uxth r3, r3
80034f4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80034f8: f023 0370 bic.w r3, r3, #112 ; 0x70
80034fc: f8a7 304c strh.w r3, [r7, #76] ; 0x4c
8003500: 68fb ldr r3, [r7, #12]
8003502: 681b ldr r3, [r3, #0]
8003504: 461a mov r2, r3
8003506: 68bb ldr r3, [r7, #8]
8003508: 781b ldrb r3, [r3, #0]
800350a: 009b lsls r3, r3, #2
800350c: 441a add r2, r3
800350e: f8b7 304c ldrh.w r3, [r7, #76] ; 0x4c
8003512: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003516: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800351a: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800351e: f043 0380 orr.w r3, r3, #128 ; 0x80
8003522: b29b uxth r3, r3
8003524: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8003526: 68bb ldr r3, [r7, #8]
8003528: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
800352c: 2b01 cmp r3, #1
800352e: f040 80b4 bne.w 800369a <HAL_PCD_EP_DB_Transmit+0x74a>
{
ep->xfer_buff += TxByteNbre;
8003532: 68bb ldr r3, [r7, #8]
8003534: 695a ldr r2, [r3, #20]
8003536: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
800353a: 441a add r2, r3
800353c: 68bb ldr r3, [r7, #8]
800353e: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
8003540: 68bb ldr r3, [r7, #8]
8003542: 69da ldr r2, [r3, #28]
8003544: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8003548: 441a add r2, r3
800354a: 68bb ldr r3, [r7, #8]
800354c: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
800354e: 68bb ldr r3, [r7, #8]
8003550: 6a1a ldr r2, [r3, #32]
8003552: 68bb ldr r3, [r7, #8]
8003554: 691b ldr r3, [r3, #16]
8003556: 429a cmp r2, r3
8003558: d309 bcc.n 800356e <HAL_PCD_EP_DB_Transmit+0x61e>
{
len = ep->maxpacket;
800355a: 68bb ldr r3, [r7, #8]
800355c: 691b ldr r3, [r3, #16]
800355e: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db -= len;
8003560: 68bb ldr r3, [r7, #8]
8003562: 6a1a ldr r2, [r3, #32]
8003564: 6d3b ldr r3, [r7, #80] ; 0x50
8003566: 1ad2 subs r2, r2, r3
8003568: 68bb ldr r3, [r7, #8]
800356a: 621a str r2, [r3, #32]
800356c: e015 b.n 800359a <HAL_PCD_EP_DB_Transmit+0x64a>
}
else if (ep->xfer_len_db == 0U)
800356e: 68bb ldr r3, [r7, #8]
8003570: 6a1b ldr r3, [r3, #32]
8003572: 2b00 cmp r3, #0
8003574: d107 bne.n 8003586 <HAL_PCD_EP_DB_Transmit+0x636>
{
len = TxByteNbre;
8003576: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
800357a: 653b str r3, [r7, #80] ; 0x50
ep->xfer_fill_db = 0U;
800357c: 68bb ldr r3, [r7, #8]
800357e: 2200 movs r2, #0
8003580: f883 2024 strb.w r2, [r3, #36] ; 0x24
8003584: e009 b.n 800359a <HAL_PCD_EP_DB_Transmit+0x64a>
}
else
{
len = ep->xfer_len_db;
8003586: 68bb ldr r3, [r7, #8]
8003588: 6a1b ldr r3, [r3, #32]
800358a: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db = 0U;
800358c: 68bb ldr r3, [r7, #8]
800358e: 2200 movs r2, #0
8003590: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8003592: 68bb ldr r3, [r7, #8]
8003594: 2200 movs r2, #0
8003596: f883 2024 strb.w r2, [r3, #36] ; 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
800359a: 68fb ldr r3, [r7, #12]
800359c: 681b ldr r3, [r3, #0]
800359e: 667b str r3, [r7, #100] ; 0x64
80035a0: 68bb ldr r3, [r7, #8]
80035a2: 785b ldrb r3, [r3, #1]
80035a4: 2b00 cmp r3, #0
80035a6: d155 bne.n 8003654 <HAL_PCD_EP_DB_Transmit+0x704>
80035a8: 68fb ldr r3, [r7, #12]
80035aa: 681b ldr r3, [r3, #0]
80035ac: 65fb str r3, [r7, #92] ; 0x5c
80035ae: 68fb ldr r3, [r7, #12]
80035b0: 681b ldr r3, [r3, #0]
80035b2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80035b6: b29b uxth r3, r3
80035b8: 461a mov r2, r3
80035ba: 6dfb ldr r3, [r7, #92] ; 0x5c
80035bc: 4413 add r3, r2
80035be: 65fb str r3, [r7, #92] ; 0x5c
80035c0: 68bb ldr r3, [r7, #8]
80035c2: 781b ldrb r3, [r3, #0]
80035c4: 011a lsls r2, r3, #4
80035c6: 6dfb ldr r3, [r7, #92] ; 0x5c
80035c8: 4413 add r3, r2
80035ca: f203 430c addw r3, r3, #1036 ; 0x40c
80035ce: 65bb str r3, [r7, #88] ; 0x58
80035d0: 6d3b ldr r3, [r7, #80] ; 0x50
80035d2: 2b00 cmp r3, #0
80035d4: d112 bne.n 80035fc <HAL_PCD_EP_DB_Transmit+0x6ac>
80035d6: 6dbb ldr r3, [r7, #88] ; 0x58
80035d8: 881b ldrh r3, [r3, #0]
80035da: b29b uxth r3, r3
80035dc: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80035e0: b29a uxth r2, r3
80035e2: 6dbb ldr r3, [r7, #88] ; 0x58
80035e4: 801a strh r2, [r3, #0]
80035e6: 6dbb ldr r3, [r7, #88] ; 0x58
80035e8: 881b ldrh r3, [r3, #0]
80035ea: b29b uxth r3, r3
80035ec: ea6f 4343 mvn.w r3, r3, lsl #17
80035f0: ea6f 4353 mvn.w r3, r3, lsr #17
80035f4: b29a uxth r2, r3
80035f6: 6dbb ldr r3, [r7, #88] ; 0x58
80035f8: 801a strh r2, [r3, #0]
80035fa: e044 b.n 8003686 <HAL_PCD_EP_DB_Transmit+0x736>
80035fc: 6d3b ldr r3, [r7, #80] ; 0x50
80035fe: 2b3e cmp r3, #62 ; 0x3e
8003600: d811 bhi.n 8003626 <HAL_PCD_EP_DB_Transmit+0x6d6>
8003602: 6d3b ldr r3, [r7, #80] ; 0x50
8003604: 085b lsrs r3, r3, #1
8003606: 657b str r3, [r7, #84] ; 0x54
8003608: 6d3b ldr r3, [r7, #80] ; 0x50
800360a: f003 0301 and.w r3, r3, #1
800360e: 2b00 cmp r3, #0
8003610: d002 beq.n 8003618 <HAL_PCD_EP_DB_Transmit+0x6c8>
8003612: 6d7b ldr r3, [r7, #84] ; 0x54
8003614: 3301 adds r3, #1
8003616: 657b str r3, [r7, #84] ; 0x54
8003618: 6d7b ldr r3, [r7, #84] ; 0x54
800361a: b29b uxth r3, r3
800361c: 029b lsls r3, r3, #10
800361e: b29a uxth r2, r3
8003620: 6dbb ldr r3, [r7, #88] ; 0x58
8003622: 801a strh r2, [r3, #0]
8003624: e02f b.n 8003686 <HAL_PCD_EP_DB_Transmit+0x736>
8003626: 6d3b ldr r3, [r7, #80] ; 0x50
8003628: 095b lsrs r3, r3, #5
800362a: 657b str r3, [r7, #84] ; 0x54
800362c: 6d3b ldr r3, [r7, #80] ; 0x50
800362e: f003 031f and.w r3, r3, #31
8003632: 2b00 cmp r3, #0
8003634: d102 bne.n 800363c <HAL_PCD_EP_DB_Transmit+0x6ec>
8003636: 6d7b ldr r3, [r7, #84] ; 0x54
8003638: 3b01 subs r3, #1
800363a: 657b str r3, [r7, #84] ; 0x54
800363c: 6d7b ldr r3, [r7, #84] ; 0x54
800363e: b29b uxth r3, r3
8003640: 029b lsls r3, r3, #10
8003642: b29b uxth r3, r3
8003644: ea6f 4343 mvn.w r3, r3, lsl #17
8003648: ea6f 4353 mvn.w r3, r3, lsr #17
800364c: b29a uxth r2, r3
800364e: 6dbb ldr r3, [r7, #88] ; 0x58
8003650: 801a strh r2, [r3, #0]
8003652: e018 b.n 8003686 <HAL_PCD_EP_DB_Transmit+0x736>
8003654: 68bb ldr r3, [r7, #8]
8003656: 785b ldrb r3, [r3, #1]
8003658: 2b01 cmp r3, #1
800365a: d114 bne.n 8003686 <HAL_PCD_EP_DB_Transmit+0x736>
800365c: 68fb ldr r3, [r7, #12]
800365e: 681b ldr r3, [r3, #0]
8003660: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003664: b29b uxth r3, r3
8003666: 461a mov r2, r3
8003668: 6e7b ldr r3, [r7, #100] ; 0x64
800366a: 4413 add r3, r2
800366c: 667b str r3, [r7, #100] ; 0x64
800366e: 68bb ldr r3, [r7, #8]
8003670: 781b ldrb r3, [r3, #0]
8003672: 011a lsls r2, r3, #4
8003674: 6e7b ldr r3, [r7, #100] ; 0x64
8003676: 4413 add r3, r2
8003678: f203 430c addw r3, r3, #1036 ; 0x40c
800367c: 663b str r3, [r7, #96] ; 0x60
800367e: 6d3b ldr r3, [r7, #80] ; 0x50
8003680: b29a uxth r2, r3
8003682: 6e3b ldr r3, [r7, #96] ; 0x60
8003684: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8003686: 68fb ldr r3, [r7, #12]
8003688: 6818 ldr r0, [r3, #0]
800368a: 68bb ldr r3, [r7, #8]
800368c: 6959 ldr r1, [r3, #20]
800368e: 68bb ldr r3, [r7, #8]
8003690: 895a ldrh r2, [r3, #10]
8003692: 6d3b ldr r3, [r7, #80] ; 0x50
8003694: b29b uxth r3, r3
8003696: f004 fa84 bl 8007ba2 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
800369a: 68fb ldr r3, [r7, #12]
800369c: 681b ldr r3, [r3, #0]
800369e: 461a mov r2, r3
80036a0: 68bb ldr r3, [r7, #8]
80036a2: 781b ldrb r3, [r3, #0]
80036a4: 009b lsls r3, r3, #2
80036a6: 4413 add r3, r2
80036a8: 881b ldrh r3, [r3, #0]
80036aa: b29b uxth r3, r3
80036ac: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80036b0: f023 0340 bic.w r3, r3, #64 ; 0x40
80036b4: 823b strh r3, [r7, #16]
80036b6: 8a3b ldrh r3, [r7, #16]
80036b8: f083 0310 eor.w r3, r3, #16
80036bc: 823b strh r3, [r7, #16]
80036be: 8a3b ldrh r3, [r7, #16]
80036c0: f083 0320 eor.w r3, r3, #32
80036c4: 823b strh r3, [r7, #16]
80036c6: 68fb ldr r3, [r7, #12]
80036c8: 681b ldr r3, [r3, #0]
80036ca: 461a mov r2, r3
80036cc: 68bb ldr r3, [r7, #8]
80036ce: 781b ldrb r3, [r3, #0]
80036d0: 009b lsls r3, r3, #2
80036d2: 441a add r2, r3
80036d4: 8a3b ldrh r3, [r7, #16]
80036d6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80036da: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80036de: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80036e2: f043 0380 orr.w r3, r3, #128 ; 0x80
80036e6: b29b uxth r3, r3
80036e8: 8013 strh r3, [r2, #0]
return HAL_OK;
80036ea: 2300 movs r3, #0
}
80036ec: 4618 mov r0, r3
80036ee: 3788 adds r7, #136 ; 0x88
80036f0: 46bd mov sp, r7
80036f2: bd80 pop {r7, pc}
080036f4 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
80036f4: b480 push {r7}
80036f6: b087 sub sp, #28
80036f8: af00 add r7, sp, #0
80036fa: 60f8 str r0, [r7, #12]
80036fc: 607b str r3, [r7, #4]
80036fe: 460b mov r3, r1
8003700: 817b strh r3, [r7, #10]
8003702: 4613 mov r3, r2
8003704: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8003706: 897b ldrh r3, [r7, #10]
8003708: f003 0380 and.w r3, r3, #128 ; 0x80
800370c: b29b uxth r3, r3
800370e: 2b00 cmp r3, #0
8003710: d00b beq.n 800372a <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8003712: 897b ldrh r3, [r7, #10]
8003714: f003 0307 and.w r3, r3, #7
8003718: 1c5a adds r2, r3, #1
800371a: 4613 mov r3, r2
800371c: 009b lsls r3, r3, #2
800371e: 4413 add r3, r2
8003720: 00db lsls r3, r3, #3
8003722: 68fa ldr r2, [r7, #12]
8003724: 4413 add r3, r2
8003726: 617b str r3, [r7, #20]
8003728: e009 b.n 800373e <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
800372a: 897a ldrh r2, [r7, #10]
800372c: 4613 mov r3, r2
800372e: 009b lsls r3, r3, #2
8003730: 4413 add r3, r2
8003732: 00db lsls r3, r3, #3
8003734: f503 73b4 add.w r3, r3, #360 ; 0x168
8003738: 68fa ldr r2, [r7, #12]
800373a: 4413 add r3, r2
800373c: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
800373e: 893b ldrh r3, [r7, #8]
8003740: 2b00 cmp r3, #0
8003742: d107 bne.n 8003754 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8003744: 697b ldr r3, [r7, #20]
8003746: 2200 movs r2, #0
8003748: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
800374a: 687b ldr r3, [r7, #4]
800374c: b29a uxth r2, r3
800374e: 697b ldr r3, [r7, #20]
8003750: 80da strh r2, [r3, #6]
8003752: e00b b.n 800376c <HAL_PCDEx_PMAConfig+0x78>
}
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8003754: 697b ldr r3, [r7, #20]
8003756: 2201 movs r2, #1
8003758: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
800375a: 687b ldr r3, [r7, #4]
800375c: b29a uxth r2, r3
800375e: 697b ldr r3, [r7, #20]
8003760: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8003762: 687b ldr r3, [r7, #4]
8003764: 0c1b lsrs r3, r3, #16
8003766: b29a uxth r2, r3
8003768: 697b ldr r3, [r7, #20]
800376a: 815a strh r2, [r3, #10]
}
return HAL_OK;
800376c: 2300 movs r3, #0
}
800376e: 4618 mov r0, r3
8003770: 371c adds r7, #28
8003772: 46bd mov sp, r7
8003774: f85d 7b04 ldr.w r7, [sp], #4
8003778: 4770 bx lr
...
0800377c <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
800377c: b580 push {r7, lr}
800377e: f5ad 7d00 sub.w sp, sp, #512 ; 0x200
8003782: af00 add r7, sp, #0
8003784: f507 7300 add.w r3, r7, #512 ; 0x200
8003788: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
800378c: 6018 str r0, [r3, #0]
#if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
uint32_t pll_config2;
#endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
800378e: f507 7300 add.w r3, r7, #512 ; 0x200
8003792: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003796: 681b ldr r3, [r3, #0]
8003798: 2b00 cmp r3, #0
800379a: d102 bne.n 80037a2 <HAL_RCC_OscConfig+0x26>
{
return HAL_ERROR;
800379c: 2301 movs r3, #1
800379e: f001 b823 b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80037a2: f507 7300 add.w r3, r7, #512 ; 0x200
80037a6: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80037aa: 681b ldr r3, [r3, #0]
80037ac: 681b ldr r3, [r3, #0]
80037ae: f003 0301 and.w r3, r3, #1
80037b2: 2b00 cmp r3, #0
80037b4: f000 817d beq.w 8003ab2 <HAL_RCC_OscConfig+0x336>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
80037b8: 4bbc ldr r3, [pc, #752] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80037ba: 685b ldr r3, [r3, #4]
80037bc: f003 030c and.w r3, r3, #12
80037c0: 2b04 cmp r3, #4
80037c2: d00c beq.n 80037de <HAL_RCC_OscConfig+0x62>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80037c4: 4bb9 ldr r3, [pc, #740] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80037c6: 685b ldr r3, [r3, #4]
80037c8: f003 030c and.w r3, r3, #12
80037cc: 2b08 cmp r3, #8
80037ce: d15c bne.n 800388a <HAL_RCC_OscConfig+0x10e>
80037d0: 4bb6 ldr r3, [pc, #728] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80037d2: 685b ldr r3, [r3, #4]
80037d4: f403 3380 and.w r3, r3, #65536 ; 0x10000
80037d8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
80037dc: d155 bne.n 800388a <HAL_RCC_OscConfig+0x10e>
80037de: f44f 3300 mov.w r3, #131072 ; 0x20000
80037e2: f8c7 31f0 str.w r3, [r7, #496] ; 0x1f0
uint32_t result;
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80037e6: f8d7 31f0 ldr.w r3, [r7, #496] ; 0x1f0
80037ea: fa93 f3a3 rbit r3, r3
80037ee: f8c7 31ec str.w r3, [r7, #492] ; 0x1ec
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
#endif
return result;
80037f2: f8d7 31ec ldr.w r3, [r7, #492] ; 0x1ec
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80037f6: fab3 f383 clz r3, r3
80037fa: b2db uxtb r3, r3
80037fc: 095b lsrs r3, r3, #5
80037fe: b2db uxtb r3, r3
8003800: f043 0301 orr.w r3, r3, #1
8003804: b2db uxtb r3, r3
8003806: 2b01 cmp r3, #1
8003808: d102 bne.n 8003810 <HAL_RCC_OscConfig+0x94>
800380a: 4ba8 ldr r3, [pc, #672] ; (8003aac <HAL_RCC_OscConfig+0x330>)
800380c: 681b ldr r3, [r3, #0]
800380e: e015 b.n 800383c <HAL_RCC_OscConfig+0xc0>
8003810: f44f 3300 mov.w r3, #131072 ; 0x20000
8003814: f8c7 31e8 str.w r3, [r7, #488] ; 0x1e8
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003818: f8d7 31e8 ldr.w r3, [r7, #488] ; 0x1e8
800381c: fa93 f3a3 rbit r3, r3
8003820: f8c7 31e4 str.w r3, [r7, #484] ; 0x1e4
8003824: f44f 3300 mov.w r3, #131072 ; 0x20000
8003828: f8c7 31e0 str.w r3, [r7, #480] ; 0x1e0
800382c: f8d7 31e0 ldr.w r3, [r7, #480] ; 0x1e0
8003830: fa93 f3a3 rbit r3, r3
8003834: f8c7 31dc str.w r3, [r7, #476] ; 0x1dc
8003838: 4b9c ldr r3, [pc, #624] ; (8003aac <HAL_RCC_OscConfig+0x330>)
800383a: 6a5b ldr r3, [r3, #36] ; 0x24
800383c: f44f 3200 mov.w r2, #131072 ; 0x20000
8003840: f8c7 21d8 str.w r2, [r7, #472] ; 0x1d8
8003844: f8d7 21d8 ldr.w r2, [r7, #472] ; 0x1d8
8003848: fa92 f2a2 rbit r2, r2
800384c: f8c7 21d4 str.w r2, [r7, #468] ; 0x1d4
return result;
8003850: f8d7 21d4 ldr.w r2, [r7, #468] ; 0x1d4
8003854: fab2 f282 clz r2, r2
8003858: b2d2 uxtb r2, r2
800385a: f042 0220 orr.w r2, r2, #32
800385e: b2d2 uxtb r2, r2
8003860: f002 021f and.w r2, r2, #31
8003864: 2101 movs r1, #1
8003866: fa01 f202 lsl.w r2, r1, r2
800386a: 4013 ands r3, r2
800386c: 2b00 cmp r3, #0
800386e: f000 811f beq.w 8003ab0 <HAL_RCC_OscConfig+0x334>
8003872: f507 7300 add.w r3, r7, #512 ; 0x200
8003876: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
800387a: 681b ldr r3, [r3, #0]
800387c: 685b ldr r3, [r3, #4]
800387e: 2b00 cmp r3, #0
8003880: f040 8116 bne.w 8003ab0 <HAL_RCC_OscConfig+0x334>
{
return HAL_ERROR;
8003884: 2301 movs r3, #1
8003886: f000 bfaf b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800388a: f507 7300 add.w r3, r7, #512 ; 0x200
800388e: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003892: 681b ldr r3, [r3, #0]
8003894: 685b ldr r3, [r3, #4]
8003896: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
800389a: d106 bne.n 80038aa <HAL_RCC_OscConfig+0x12e>
800389c: 4b83 ldr r3, [pc, #524] ; (8003aac <HAL_RCC_OscConfig+0x330>)
800389e: 681b ldr r3, [r3, #0]
80038a0: 4a82 ldr r2, [pc, #520] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038a2: f443 3380 orr.w r3, r3, #65536 ; 0x10000
80038a6: 6013 str r3, [r2, #0]
80038a8: e036 b.n 8003918 <HAL_RCC_OscConfig+0x19c>
80038aa: f507 7300 add.w r3, r7, #512 ; 0x200
80038ae: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80038b2: 681b ldr r3, [r3, #0]
80038b4: 685b ldr r3, [r3, #4]
80038b6: 2b00 cmp r3, #0
80038b8: d10c bne.n 80038d4 <HAL_RCC_OscConfig+0x158>
80038ba: 4b7c ldr r3, [pc, #496] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038bc: 681b ldr r3, [r3, #0]
80038be: 4a7b ldr r2, [pc, #492] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038c0: f423 3380 bic.w r3, r3, #65536 ; 0x10000
80038c4: 6013 str r3, [r2, #0]
80038c6: 4b79 ldr r3, [pc, #484] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038c8: 681b ldr r3, [r3, #0]
80038ca: 4a78 ldr r2, [pc, #480] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038cc: f423 2380 bic.w r3, r3, #262144 ; 0x40000
80038d0: 6013 str r3, [r2, #0]
80038d2: e021 b.n 8003918 <HAL_RCC_OscConfig+0x19c>
80038d4: f507 7300 add.w r3, r7, #512 ; 0x200
80038d8: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80038dc: 681b ldr r3, [r3, #0]
80038de: 685b ldr r3, [r3, #4]
80038e0: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
80038e4: d10c bne.n 8003900 <HAL_RCC_OscConfig+0x184>
80038e6: 4b71 ldr r3, [pc, #452] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038e8: 681b ldr r3, [r3, #0]
80038ea: 4a70 ldr r2, [pc, #448] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038ec: f443 2380 orr.w r3, r3, #262144 ; 0x40000
80038f0: 6013 str r3, [r2, #0]
80038f2: 4b6e ldr r3, [pc, #440] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038f4: 681b ldr r3, [r3, #0]
80038f6: 4a6d ldr r2, [pc, #436] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80038f8: f443 3380 orr.w r3, r3, #65536 ; 0x10000
80038fc: 6013 str r3, [r2, #0]
80038fe: e00b b.n 8003918 <HAL_RCC_OscConfig+0x19c>
8003900: 4b6a ldr r3, [pc, #424] ; (8003aac <HAL_RCC_OscConfig+0x330>)
8003902: 681b ldr r3, [r3, #0]
8003904: 4a69 ldr r2, [pc, #420] ; (8003aac <HAL_RCC_OscConfig+0x330>)
8003906: f423 3380 bic.w r3, r3, #65536 ; 0x10000
800390a: 6013 str r3, [r2, #0]
800390c: 4b67 ldr r3, [pc, #412] ; (8003aac <HAL_RCC_OscConfig+0x330>)
800390e: 681b ldr r3, [r3, #0]
8003910: 4a66 ldr r2, [pc, #408] ; (8003aac <HAL_RCC_OscConfig+0x330>)
8003912: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8003916: 6013 str r3, [r2, #0]
#if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
/* Configure the HSE predivision factor --------------------------------*/
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8003918: 4b64 ldr r3, [pc, #400] ; (8003aac <HAL_RCC_OscConfig+0x330>)
800391a: 6adb ldr r3, [r3, #44] ; 0x2c
800391c: f023 020f bic.w r2, r3, #15
8003920: f507 7300 add.w r3, r7, #512 ; 0x200
8003924: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003928: 681b ldr r3, [r3, #0]
800392a: 689b ldr r3, [r3, #8]
800392c: 495f ldr r1, [pc, #380] ; (8003aac <HAL_RCC_OscConfig+0x330>)
800392e: 4313 orrs r3, r2
8003930: 62cb str r3, [r1, #44] ; 0x2c
#endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
/* Check the HSE State */
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8003932: f507 7300 add.w r3, r7, #512 ; 0x200
8003936: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
800393a: 681b ldr r3, [r3, #0]
800393c: 685b ldr r3, [r3, #4]
800393e: 2b00 cmp r3, #0
8003940: d059 beq.n 80039f6 <HAL_RCC_OscConfig+0x27a>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003942: f7fd f921 bl 8000b88 <HAL_GetTick>
8003946: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800394a: e00a b.n 8003962 <HAL_RCC_OscConfig+0x1e6>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
800394c: f7fd f91c bl 8000b88 <HAL_GetTick>
8003950: 4602 mov r2, r0
8003952: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8003956: 1ad3 subs r3, r2, r3
8003958: 2b64 cmp r3, #100 ; 0x64
800395a: d902 bls.n 8003962 <HAL_RCC_OscConfig+0x1e6>
{
return HAL_TIMEOUT;
800395c: 2303 movs r3, #3
800395e: f000 bf43 b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
8003962: f44f 3300 mov.w r3, #131072 ; 0x20000
8003966: f8c7 31d0 str.w r3, [r7, #464] ; 0x1d0
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
800396a: f8d7 31d0 ldr.w r3, [r7, #464] ; 0x1d0
800396e: fa93 f3a3 rbit r3, r3
8003972: f8c7 31cc str.w r3, [r7, #460] ; 0x1cc
return result;
8003976: f8d7 31cc ldr.w r3, [r7, #460] ; 0x1cc
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800397a: fab3 f383 clz r3, r3
800397e: b2db uxtb r3, r3
8003980: 095b lsrs r3, r3, #5
8003982: b2db uxtb r3, r3
8003984: f043 0301 orr.w r3, r3, #1
8003988: b2db uxtb r3, r3
800398a: 2b01 cmp r3, #1
800398c: d102 bne.n 8003994 <HAL_RCC_OscConfig+0x218>
800398e: 4b47 ldr r3, [pc, #284] ; (8003aac <HAL_RCC_OscConfig+0x330>)
8003990: 681b ldr r3, [r3, #0]
8003992: e015 b.n 80039c0 <HAL_RCC_OscConfig+0x244>
8003994: f44f 3300 mov.w r3, #131072 ; 0x20000
8003998: f8c7 31c8 str.w r3, [r7, #456] ; 0x1c8
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
800399c: f8d7 31c8 ldr.w r3, [r7, #456] ; 0x1c8
80039a0: fa93 f3a3 rbit r3, r3
80039a4: f8c7 31c4 str.w r3, [r7, #452] ; 0x1c4
80039a8: f44f 3300 mov.w r3, #131072 ; 0x20000
80039ac: f8c7 31c0 str.w r3, [r7, #448] ; 0x1c0
80039b0: f8d7 31c0 ldr.w r3, [r7, #448] ; 0x1c0
80039b4: fa93 f3a3 rbit r3, r3
80039b8: f8c7 31bc str.w r3, [r7, #444] ; 0x1bc
80039bc: 4b3b ldr r3, [pc, #236] ; (8003aac <HAL_RCC_OscConfig+0x330>)
80039be: 6a5b ldr r3, [r3, #36] ; 0x24
80039c0: f44f 3200 mov.w r2, #131072 ; 0x20000
80039c4: f8c7 21b8 str.w r2, [r7, #440] ; 0x1b8
80039c8: f8d7 21b8 ldr.w r2, [r7, #440] ; 0x1b8
80039cc: fa92 f2a2 rbit r2, r2
80039d0: f8c7 21b4 str.w r2, [r7, #436] ; 0x1b4
return result;
80039d4: f8d7 21b4 ldr.w r2, [r7, #436] ; 0x1b4
80039d8: fab2 f282 clz r2, r2
80039dc: b2d2 uxtb r2, r2
80039de: f042 0220 orr.w r2, r2, #32
80039e2: b2d2 uxtb r2, r2
80039e4: f002 021f and.w r2, r2, #31
80039e8: 2101 movs r1, #1
80039ea: fa01 f202 lsl.w r2, r1, r2
80039ee: 4013 ands r3, r2
80039f0: 2b00 cmp r3, #0
80039f2: d0ab beq.n 800394c <HAL_RCC_OscConfig+0x1d0>
80039f4: e05d b.n 8003ab2 <HAL_RCC_OscConfig+0x336>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80039f6: f7fd f8c7 bl 8000b88 <HAL_GetTick>
80039fa: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till HSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80039fe: e00a b.n 8003a16 <HAL_RCC_OscConfig+0x29a>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8003a00: f7fd f8c2 bl 8000b88 <HAL_GetTick>
8003a04: 4602 mov r2, r0
8003a06: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8003a0a: 1ad3 subs r3, r2, r3
8003a0c: 2b64 cmp r3, #100 ; 0x64
8003a0e: d902 bls.n 8003a16 <HAL_RCC_OscConfig+0x29a>
{
return HAL_TIMEOUT;
8003a10: 2303 movs r3, #3
8003a12: f000 bee9 b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
8003a16: f44f 3300 mov.w r3, #131072 ; 0x20000
8003a1a: f8c7 31b0 str.w r3, [r7, #432] ; 0x1b0
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003a1e: f8d7 31b0 ldr.w r3, [r7, #432] ; 0x1b0
8003a22: fa93 f3a3 rbit r3, r3
8003a26: f8c7 31ac str.w r3, [r7, #428] ; 0x1ac
return result;
8003a2a: f8d7 31ac ldr.w r3, [r7, #428] ; 0x1ac
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003a2e: fab3 f383 clz r3, r3
8003a32: b2db uxtb r3, r3
8003a34: 095b lsrs r3, r3, #5
8003a36: b2db uxtb r3, r3
8003a38: f043 0301 orr.w r3, r3, #1
8003a3c: b2db uxtb r3, r3
8003a3e: 2b01 cmp r3, #1
8003a40: d102 bne.n 8003a48 <HAL_RCC_OscConfig+0x2cc>
8003a42: 4b1a ldr r3, [pc, #104] ; (8003aac <HAL_RCC_OscConfig+0x330>)
8003a44: 681b ldr r3, [r3, #0]
8003a46: e015 b.n 8003a74 <HAL_RCC_OscConfig+0x2f8>
8003a48: f44f 3300 mov.w r3, #131072 ; 0x20000
8003a4c: f8c7 31a8 str.w r3, [r7, #424] ; 0x1a8
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003a50: f8d7 31a8 ldr.w r3, [r7, #424] ; 0x1a8
8003a54: fa93 f3a3 rbit r3, r3
8003a58: f8c7 31a4 str.w r3, [r7, #420] ; 0x1a4
8003a5c: f44f 3300 mov.w r3, #131072 ; 0x20000
8003a60: f8c7 31a0 str.w r3, [r7, #416] ; 0x1a0
8003a64: f8d7 31a0 ldr.w r3, [r7, #416] ; 0x1a0
8003a68: fa93 f3a3 rbit r3, r3
8003a6c: f8c7 319c str.w r3, [r7, #412] ; 0x19c
8003a70: 4b0e ldr r3, [pc, #56] ; (8003aac <HAL_RCC_OscConfig+0x330>)
8003a72: 6a5b ldr r3, [r3, #36] ; 0x24
8003a74: f44f 3200 mov.w r2, #131072 ; 0x20000
8003a78: f8c7 2198 str.w r2, [r7, #408] ; 0x198
8003a7c: f8d7 2198 ldr.w r2, [r7, #408] ; 0x198
8003a80: fa92 f2a2 rbit r2, r2
8003a84: f8c7 2194 str.w r2, [r7, #404] ; 0x194
return result;
8003a88: f8d7 2194 ldr.w r2, [r7, #404] ; 0x194
8003a8c: fab2 f282 clz r2, r2
8003a90: b2d2 uxtb r2, r2
8003a92: f042 0220 orr.w r2, r2, #32
8003a96: b2d2 uxtb r2, r2
8003a98: f002 021f and.w r2, r2, #31
8003a9c: 2101 movs r1, #1
8003a9e: fa01 f202 lsl.w r2, r1, r2
8003aa2: 4013 ands r3, r2
8003aa4: 2b00 cmp r3, #0
8003aa6: d1ab bne.n 8003a00 <HAL_RCC_OscConfig+0x284>
8003aa8: e003 b.n 8003ab2 <HAL_RCC_OscConfig+0x336>
8003aaa: bf00 nop
8003aac: 40021000 .word 0x40021000
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003ab0: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8003ab2: f507 7300 add.w r3, r7, #512 ; 0x200
8003ab6: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003aba: 681b ldr r3, [r3, #0]
8003abc: 681b ldr r3, [r3, #0]
8003abe: f003 0302 and.w r3, r3, #2
8003ac2: 2b00 cmp r3, #0
8003ac4: f000 817d beq.w 8003dc2 <HAL_RCC_OscConfig+0x646>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8003ac8: 4ba6 ldr r3, [pc, #664] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003aca: 685b ldr r3, [r3, #4]
8003acc: f003 030c and.w r3, r3, #12
8003ad0: 2b00 cmp r3, #0
8003ad2: d00b beq.n 8003aec <HAL_RCC_OscConfig+0x370>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
8003ad4: 4ba3 ldr r3, [pc, #652] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003ad6: 685b ldr r3, [r3, #4]
8003ad8: f003 030c and.w r3, r3, #12
8003adc: 2b08 cmp r3, #8
8003ade: d172 bne.n 8003bc6 <HAL_RCC_OscConfig+0x44a>
8003ae0: 4ba0 ldr r3, [pc, #640] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003ae2: 685b ldr r3, [r3, #4]
8003ae4: f403 3380 and.w r3, r3, #65536 ; 0x10000
8003ae8: 2b00 cmp r3, #0
8003aea: d16c bne.n 8003bc6 <HAL_RCC_OscConfig+0x44a>
8003aec: 2302 movs r3, #2
8003aee: f8c7 3190 str.w r3, [r7, #400] ; 0x190
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003af2: f8d7 3190 ldr.w r3, [r7, #400] ; 0x190
8003af6: fa93 f3a3 rbit r3, r3
8003afa: f8c7 318c str.w r3, [r7, #396] ; 0x18c
return result;
8003afe: f8d7 318c ldr.w r3, [r7, #396] ; 0x18c
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003b02: fab3 f383 clz r3, r3
8003b06: b2db uxtb r3, r3
8003b08: 095b lsrs r3, r3, #5
8003b0a: b2db uxtb r3, r3
8003b0c: f043 0301 orr.w r3, r3, #1
8003b10: b2db uxtb r3, r3
8003b12: 2b01 cmp r3, #1
8003b14: d102 bne.n 8003b1c <HAL_RCC_OscConfig+0x3a0>
8003b16: 4b93 ldr r3, [pc, #588] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003b18: 681b ldr r3, [r3, #0]
8003b1a: e013 b.n 8003b44 <HAL_RCC_OscConfig+0x3c8>
8003b1c: 2302 movs r3, #2
8003b1e: f8c7 3188 str.w r3, [r7, #392] ; 0x188
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003b22: f8d7 3188 ldr.w r3, [r7, #392] ; 0x188
8003b26: fa93 f3a3 rbit r3, r3
8003b2a: f8c7 3184 str.w r3, [r7, #388] ; 0x184
8003b2e: 2302 movs r3, #2
8003b30: f8c7 3180 str.w r3, [r7, #384] ; 0x180
8003b34: f8d7 3180 ldr.w r3, [r7, #384] ; 0x180
8003b38: fa93 f3a3 rbit r3, r3
8003b3c: f8c7 317c str.w r3, [r7, #380] ; 0x17c
8003b40: 4b88 ldr r3, [pc, #544] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003b42: 6a5b ldr r3, [r3, #36] ; 0x24
8003b44: 2202 movs r2, #2
8003b46: f8c7 2178 str.w r2, [r7, #376] ; 0x178
8003b4a: f8d7 2178 ldr.w r2, [r7, #376] ; 0x178
8003b4e: fa92 f2a2 rbit r2, r2
8003b52: f8c7 2174 str.w r2, [r7, #372] ; 0x174
return result;
8003b56: f8d7 2174 ldr.w r2, [r7, #372] ; 0x174
8003b5a: fab2 f282 clz r2, r2
8003b5e: b2d2 uxtb r2, r2
8003b60: f042 0220 orr.w r2, r2, #32
8003b64: b2d2 uxtb r2, r2
8003b66: f002 021f and.w r2, r2, #31
8003b6a: 2101 movs r1, #1
8003b6c: fa01 f202 lsl.w r2, r1, r2
8003b70: 4013 ands r3, r2
8003b72: 2b00 cmp r3, #0
8003b74: d00a beq.n 8003b8c <HAL_RCC_OscConfig+0x410>
8003b76: f507 7300 add.w r3, r7, #512 ; 0x200
8003b7a: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003b7e: 681b ldr r3, [r3, #0]
8003b80: 691b ldr r3, [r3, #16]
8003b82: 2b01 cmp r3, #1
8003b84: d002 beq.n 8003b8c <HAL_RCC_OscConfig+0x410>
{
return HAL_ERROR;
8003b86: 2301 movs r3, #1
8003b88: f000 be2e b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003b8c: 4b75 ldr r3, [pc, #468] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003b8e: 681b ldr r3, [r3, #0]
8003b90: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8003b94: f507 7300 add.w r3, r7, #512 ; 0x200
8003b98: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003b9c: 681b ldr r3, [r3, #0]
8003b9e: 695b ldr r3, [r3, #20]
8003ba0: 21f8 movs r1, #248 ; 0xf8
8003ba2: f8c7 1170 str.w r1, [r7, #368] ; 0x170
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003ba6: f8d7 1170 ldr.w r1, [r7, #368] ; 0x170
8003baa: fa91 f1a1 rbit r1, r1
8003bae: f8c7 116c str.w r1, [r7, #364] ; 0x16c
return result;
8003bb2: f8d7 116c ldr.w r1, [r7, #364] ; 0x16c
8003bb6: fab1 f181 clz r1, r1
8003bba: b2c9 uxtb r1, r1
8003bbc: 408b lsls r3, r1
8003bbe: 4969 ldr r1, [pc, #420] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003bc0: 4313 orrs r3, r2
8003bc2: 600b str r3, [r1, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003bc4: e0fd b.n 8003dc2 <HAL_RCC_OscConfig+0x646>
}
}
else
{
/* Check the HSI State */
if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8003bc6: f507 7300 add.w r3, r7, #512 ; 0x200
8003bca: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003bce: 681b ldr r3, [r3, #0]
8003bd0: 691b ldr r3, [r3, #16]
8003bd2: 2b00 cmp r3, #0
8003bd4: f000 8088 beq.w 8003ce8 <HAL_RCC_OscConfig+0x56c>
8003bd8: 2301 movs r3, #1
8003bda: f8c7 3168 str.w r3, [r7, #360] ; 0x168
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003bde: f8d7 3168 ldr.w r3, [r7, #360] ; 0x168
8003be2: fa93 f3a3 rbit r3, r3
8003be6: f8c7 3164 str.w r3, [r7, #356] ; 0x164
return result;
8003bea: f8d7 3164 ldr.w r3, [r7, #356] ; 0x164
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8003bee: fab3 f383 clz r3, r3
8003bf2: b2db uxtb r3, r3
8003bf4: f103 5384 add.w r3, r3, #276824064 ; 0x10800000
8003bf8: f503 1384 add.w r3, r3, #1081344 ; 0x108000
8003bfc: 009b lsls r3, r3, #2
8003bfe: 461a mov r2, r3
8003c00: 2301 movs r3, #1
8003c02: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003c04: f7fc ffc0 bl 8000b88 <HAL_GetTick>
8003c08: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003c0c: e00a b.n 8003c24 <HAL_RCC_OscConfig+0x4a8>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8003c0e: f7fc ffbb bl 8000b88 <HAL_GetTick>
8003c12: 4602 mov r2, r0
8003c14: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8003c18: 1ad3 subs r3, r2, r3
8003c1a: 2b02 cmp r3, #2
8003c1c: d902 bls.n 8003c24 <HAL_RCC_OscConfig+0x4a8>
{
return HAL_TIMEOUT;
8003c1e: 2303 movs r3, #3
8003c20: f000 bde2 b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
8003c24: 2302 movs r3, #2
8003c26: f8c7 3160 str.w r3, [r7, #352] ; 0x160
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003c2a: f8d7 3160 ldr.w r3, [r7, #352] ; 0x160
8003c2e: fa93 f3a3 rbit r3, r3
8003c32: f8c7 315c str.w r3, [r7, #348] ; 0x15c
return result;
8003c36: f8d7 315c ldr.w r3, [r7, #348] ; 0x15c
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003c3a: fab3 f383 clz r3, r3
8003c3e: b2db uxtb r3, r3
8003c40: 095b lsrs r3, r3, #5
8003c42: b2db uxtb r3, r3
8003c44: f043 0301 orr.w r3, r3, #1
8003c48: b2db uxtb r3, r3
8003c4a: 2b01 cmp r3, #1
8003c4c: d102 bne.n 8003c54 <HAL_RCC_OscConfig+0x4d8>
8003c4e: 4b45 ldr r3, [pc, #276] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003c50: 681b ldr r3, [r3, #0]
8003c52: e013 b.n 8003c7c <HAL_RCC_OscConfig+0x500>
8003c54: 2302 movs r3, #2
8003c56: f8c7 3158 str.w r3, [r7, #344] ; 0x158
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003c5a: f8d7 3158 ldr.w r3, [r7, #344] ; 0x158
8003c5e: fa93 f3a3 rbit r3, r3
8003c62: f8c7 3154 str.w r3, [r7, #340] ; 0x154
8003c66: 2302 movs r3, #2
8003c68: f8c7 3150 str.w r3, [r7, #336] ; 0x150
8003c6c: f8d7 3150 ldr.w r3, [r7, #336] ; 0x150
8003c70: fa93 f3a3 rbit r3, r3
8003c74: f8c7 314c str.w r3, [r7, #332] ; 0x14c
8003c78: 4b3a ldr r3, [pc, #232] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003c7a: 6a5b ldr r3, [r3, #36] ; 0x24
8003c7c: 2202 movs r2, #2
8003c7e: f8c7 2148 str.w r2, [r7, #328] ; 0x148
8003c82: f8d7 2148 ldr.w r2, [r7, #328] ; 0x148
8003c86: fa92 f2a2 rbit r2, r2
8003c8a: f8c7 2144 str.w r2, [r7, #324] ; 0x144
return result;
8003c8e: f8d7 2144 ldr.w r2, [r7, #324] ; 0x144
8003c92: fab2 f282 clz r2, r2
8003c96: b2d2 uxtb r2, r2
8003c98: f042 0220 orr.w r2, r2, #32
8003c9c: b2d2 uxtb r2, r2
8003c9e: f002 021f and.w r2, r2, #31
8003ca2: 2101 movs r1, #1
8003ca4: fa01 f202 lsl.w r2, r1, r2
8003ca8: 4013 ands r3, r2
8003caa: 2b00 cmp r3, #0
8003cac: d0af beq.n 8003c0e <HAL_RCC_OscConfig+0x492>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003cae: 4b2d ldr r3, [pc, #180] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003cb0: 681b ldr r3, [r3, #0]
8003cb2: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8003cb6: f507 7300 add.w r3, r7, #512 ; 0x200
8003cba: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003cbe: 681b ldr r3, [r3, #0]
8003cc0: 695b ldr r3, [r3, #20]
8003cc2: 21f8 movs r1, #248 ; 0xf8
8003cc4: f8c7 1140 str.w r1, [r7, #320] ; 0x140
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003cc8: f8d7 1140 ldr.w r1, [r7, #320] ; 0x140
8003ccc: fa91 f1a1 rbit r1, r1
8003cd0: f8c7 113c str.w r1, [r7, #316] ; 0x13c
return result;
8003cd4: f8d7 113c ldr.w r1, [r7, #316] ; 0x13c
8003cd8: fab1 f181 clz r1, r1
8003cdc: b2c9 uxtb r1, r1
8003cde: 408b lsls r3, r1
8003ce0: 4920 ldr r1, [pc, #128] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003ce2: 4313 orrs r3, r2
8003ce4: 600b str r3, [r1, #0]
8003ce6: e06c b.n 8003dc2 <HAL_RCC_OscConfig+0x646>
8003ce8: 2301 movs r3, #1
8003cea: f8c7 3138 str.w r3, [r7, #312] ; 0x138
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003cee: f8d7 3138 ldr.w r3, [r7, #312] ; 0x138
8003cf2: fa93 f3a3 rbit r3, r3
8003cf6: f8c7 3134 str.w r3, [r7, #308] ; 0x134
return result;
8003cfa: f8d7 3134 ldr.w r3, [r7, #308] ; 0x134
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8003cfe: fab3 f383 clz r3, r3
8003d02: b2db uxtb r3, r3
8003d04: f103 5384 add.w r3, r3, #276824064 ; 0x10800000
8003d08: f503 1384 add.w r3, r3, #1081344 ; 0x108000
8003d0c: 009b lsls r3, r3, #2
8003d0e: 461a mov r2, r3
8003d10: 2300 movs r3, #0
8003d12: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003d14: f7fc ff38 bl 8000b88 <HAL_GetTick>
8003d18: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till HSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8003d1c: e00a b.n 8003d34 <HAL_RCC_OscConfig+0x5b8>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8003d1e: f7fc ff33 bl 8000b88 <HAL_GetTick>
8003d22: 4602 mov r2, r0
8003d24: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8003d28: 1ad3 subs r3, r2, r3
8003d2a: 2b02 cmp r3, #2
8003d2c: d902 bls.n 8003d34 <HAL_RCC_OscConfig+0x5b8>
{
return HAL_TIMEOUT;
8003d2e: 2303 movs r3, #3
8003d30: f000 bd5a b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
8003d34: 2302 movs r3, #2
8003d36: f8c7 3130 str.w r3, [r7, #304] ; 0x130
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003d3a: f8d7 3130 ldr.w r3, [r7, #304] ; 0x130
8003d3e: fa93 f3a3 rbit r3, r3
8003d42: f8c7 312c str.w r3, [r7, #300] ; 0x12c
return result;
8003d46: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8003d4a: fab3 f383 clz r3, r3
8003d4e: b2db uxtb r3, r3
8003d50: 095b lsrs r3, r3, #5
8003d52: b2db uxtb r3, r3
8003d54: f043 0301 orr.w r3, r3, #1
8003d58: b2db uxtb r3, r3
8003d5a: 2b01 cmp r3, #1
8003d5c: d104 bne.n 8003d68 <HAL_RCC_OscConfig+0x5ec>
8003d5e: 4b01 ldr r3, [pc, #4] ; (8003d64 <HAL_RCC_OscConfig+0x5e8>)
8003d60: 681b ldr r3, [r3, #0]
8003d62: e015 b.n 8003d90 <HAL_RCC_OscConfig+0x614>
8003d64: 40021000 .word 0x40021000
8003d68: 2302 movs r3, #2
8003d6a: f8c7 3128 str.w r3, [r7, #296] ; 0x128
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003d6e: f8d7 3128 ldr.w r3, [r7, #296] ; 0x128
8003d72: fa93 f3a3 rbit r3, r3
8003d76: f8c7 3124 str.w r3, [r7, #292] ; 0x124
8003d7a: 2302 movs r3, #2
8003d7c: f8c7 3120 str.w r3, [r7, #288] ; 0x120
8003d80: f8d7 3120 ldr.w r3, [r7, #288] ; 0x120
8003d84: fa93 f3a3 rbit r3, r3
8003d88: f8c7 311c str.w r3, [r7, #284] ; 0x11c
8003d8c: 4bc8 ldr r3, [pc, #800] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
8003d8e: 6a5b ldr r3, [r3, #36] ; 0x24
8003d90: 2202 movs r2, #2
8003d92: f8c7 2118 str.w r2, [r7, #280] ; 0x118
8003d96: f8d7 2118 ldr.w r2, [r7, #280] ; 0x118
8003d9a: fa92 f2a2 rbit r2, r2
8003d9e: f8c7 2114 str.w r2, [r7, #276] ; 0x114
return result;
8003da2: f8d7 2114 ldr.w r2, [r7, #276] ; 0x114
8003da6: fab2 f282 clz r2, r2
8003daa: b2d2 uxtb r2, r2
8003dac: f042 0220 orr.w r2, r2, #32
8003db0: b2d2 uxtb r2, r2
8003db2: f002 021f and.w r2, r2, #31
8003db6: 2101 movs r1, #1
8003db8: fa01 f202 lsl.w r2, r1, r2
8003dbc: 4013 ands r3, r2
8003dbe: 2b00 cmp r3, #0
8003dc0: d1ad bne.n 8003d1e <HAL_RCC_OscConfig+0x5a2>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8003dc2: f507 7300 add.w r3, r7, #512 ; 0x200
8003dc6: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003dca: 681b ldr r3, [r3, #0]
8003dcc: 681b ldr r3, [r3, #0]
8003dce: f003 0308 and.w r3, r3, #8
8003dd2: 2b00 cmp r3, #0
8003dd4: f000 8110 beq.w 8003ff8 <HAL_RCC_OscConfig+0x87c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8003dd8: f507 7300 add.w r3, r7, #512 ; 0x200
8003ddc: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8003de0: 681b ldr r3, [r3, #0]
8003de2: 699b ldr r3, [r3, #24]
8003de4: 2b00 cmp r3, #0
8003de6: d079 beq.n 8003edc <HAL_RCC_OscConfig+0x760>
8003de8: 2301 movs r3, #1
8003dea: f8c7 3110 str.w r3, [r7, #272] ; 0x110
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003dee: f8d7 3110 ldr.w r3, [r7, #272] ; 0x110
8003df2: fa93 f3a3 rbit r3, r3
8003df6: f8c7 310c str.w r3, [r7, #268] ; 0x10c
return result;
8003dfa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8003dfe: fab3 f383 clz r3, r3
8003e02: b2db uxtb r3, r3
8003e04: 461a mov r2, r3
8003e06: 4bab ldr r3, [pc, #684] ; (80040b4 <HAL_RCC_OscConfig+0x938>)
8003e08: 4413 add r3, r2
8003e0a: 009b lsls r3, r3, #2
8003e0c: 461a mov r2, r3
8003e0e: 2301 movs r3, #1
8003e10: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003e12: f7fc feb9 bl 8000b88 <HAL_GetTick>
8003e16: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8003e1a: e00a b.n 8003e32 <HAL_RCC_OscConfig+0x6b6>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8003e1c: f7fc feb4 bl 8000b88 <HAL_GetTick>
8003e20: 4602 mov r2, r0
8003e22: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8003e26: 1ad3 subs r3, r2, r3
8003e28: 2b02 cmp r3, #2
8003e2a: d902 bls.n 8003e32 <HAL_RCC_OscConfig+0x6b6>
{
return HAL_TIMEOUT;
8003e2c: 2303 movs r3, #3
8003e2e: f000 bcdb b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
8003e32: 2302 movs r3, #2
8003e34: f8c7 3108 str.w r3, [r7, #264] ; 0x108
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003e38: f8d7 3108 ldr.w r3, [r7, #264] ; 0x108
8003e3c: fa93 f3a3 rbit r3, r3
8003e40: f8c7 3104 str.w r3, [r7, #260] ; 0x104
8003e44: f507 7300 add.w r3, r7, #512 ; 0x200
8003e48: f5a3 7380 sub.w r3, r3, #256 ; 0x100
8003e4c: 2202 movs r2, #2
8003e4e: 601a str r2, [r3, #0]
8003e50: f507 7300 add.w r3, r7, #512 ; 0x200
8003e54: f5a3 7380 sub.w r3, r3, #256 ; 0x100
8003e58: 681b ldr r3, [r3, #0]
8003e5a: fa93 f2a3 rbit r2, r3
8003e5e: f507 7300 add.w r3, r7, #512 ; 0x200
8003e62: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8003e66: 601a str r2, [r3, #0]
8003e68: f507 7300 add.w r3, r7, #512 ; 0x200
8003e6c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8003e70: 2202 movs r2, #2
8003e72: 601a str r2, [r3, #0]
8003e74: f507 7300 add.w r3, r7, #512 ; 0x200
8003e78: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8003e7c: 681b ldr r3, [r3, #0]
8003e7e: fa93 f2a3 rbit r2, r3
8003e82: f507 7300 add.w r3, r7, #512 ; 0x200
8003e86: f5a3 7386 sub.w r3, r3, #268 ; 0x10c
8003e8a: 601a str r2, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8003e8c: 4b88 ldr r3, [pc, #544] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
8003e8e: 6a5a ldr r2, [r3, #36] ; 0x24
8003e90: f507 7300 add.w r3, r7, #512 ; 0x200
8003e94: f5a3 7388 sub.w r3, r3, #272 ; 0x110
8003e98: 2102 movs r1, #2
8003e9a: 6019 str r1, [r3, #0]
8003e9c: f507 7300 add.w r3, r7, #512 ; 0x200
8003ea0: f5a3 7388 sub.w r3, r3, #272 ; 0x110
8003ea4: 681b ldr r3, [r3, #0]
8003ea6: fa93 f1a3 rbit r1, r3
8003eaa: f507 7300 add.w r3, r7, #512 ; 0x200
8003eae: f5a3 738a sub.w r3, r3, #276 ; 0x114
8003eb2: 6019 str r1, [r3, #0]
return result;
8003eb4: f507 7300 add.w r3, r7, #512 ; 0x200
8003eb8: f5a3 738a sub.w r3, r3, #276 ; 0x114
8003ebc: 681b ldr r3, [r3, #0]
8003ebe: fab3 f383 clz r3, r3
8003ec2: b2db uxtb r3, r3
8003ec4: f043 0360 orr.w r3, r3, #96 ; 0x60
8003ec8: b2db uxtb r3, r3
8003eca: f003 031f and.w r3, r3, #31
8003ece: 2101 movs r1, #1
8003ed0: fa01 f303 lsl.w r3, r1, r3
8003ed4: 4013 ands r3, r2
8003ed6: 2b00 cmp r3, #0
8003ed8: d0a0 beq.n 8003e1c <HAL_RCC_OscConfig+0x6a0>
8003eda: e08d b.n 8003ff8 <HAL_RCC_OscConfig+0x87c>
8003edc: f507 7300 add.w r3, r7, #512 ; 0x200
8003ee0: f5a3 738c sub.w r3, r3, #280 ; 0x118
8003ee4: 2201 movs r2, #1
8003ee6: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003ee8: f507 7300 add.w r3, r7, #512 ; 0x200
8003eec: f5a3 738c sub.w r3, r3, #280 ; 0x118
8003ef0: 681b ldr r3, [r3, #0]
8003ef2: fa93 f2a3 rbit r2, r3
8003ef6: f507 7300 add.w r3, r7, #512 ; 0x200
8003efa: f5a3 738e sub.w r3, r3, #284 ; 0x11c
8003efe: 601a str r2, [r3, #0]
return result;
8003f00: f507 7300 add.w r3, r7, #512 ; 0x200
8003f04: f5a3 738e sub.w r3, r3, #284 ; 0x11c
8003f08: 681b ldr r3, [r3, #0]
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8003f0a: fab3 f383 clz r3, r3
8003f0e: b2db uxtb r3, r3
8003f10: 461a mov r2, r3
8003f12: 4b68 ldr r3, [pc, #416] ; (80040b4 <HAL_RCC_OscConfig+0x938>)
8003f14: 4413 add r3, r2
8003f16: 009b lsls r3, r3, #2
8003f18: 461a mov r2, r3
8003f1a: 2300 movs r3, #0
8003f1c: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003f1e: f7fc fe33 bl 8000b88 <HAL_GetTick>
8003f22: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till LSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003f26: e00a b.n 8003f3e <HAL_RCC_OscConfig+0x7c2>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8003f28: f7fc fe2e bl 8000b88 <HAL_GetTick>
8003f2c: 4602 mov r2, r0
8003f2e: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8003f32: 1ad3 subs r3, r2, r3
8003f34: 2b02 cmp r3, #2
8003f36: d902 bls.n 8003f3e <HAL_RCC_OscConfig+0x7c2>
{
return HAL_TIMEOUT;
8003f38: 2303 movs r3, #3
8003f3a: f000 bc55 b.w 80047e8 <HAL_RCC_OscConfig+0x106c>
8003f3e: f507 7300 add.w r3, r7, #512 ; 0x200
8003f42: f5a3 7390 sub.w r3, r3, #288 ; 0x120
8003f46: 2202 movs r2, #2
8003f48: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8003f4a: f507 7300 add.w r3, r7, #512 ; 0x200
8003f4e: f5a3 7390 sub.w r3, r3, #288 ; 0x120
8003f52: 681b ldr r3, [r3, #0]
8003f54: fa93 f2a3 rbit r2, r3
8003f58: f507 7300 add.w r3, r7, #512 ; 0x200
8003f5c: f5a3 7392 sub.w r3, r3, #292 ; 0x124
8003f60: 601a str r2, [r3, #0]
8003f62: f507 7300 add.w r3, r7, #512 ; 0x200
8003f66: f5a3 7394 sub.w r3, r3, #296 ; 0x128
8003f6a: 2202 movs r2, #2
8003f6c: 601a str r2, [r3, #0]
8003f6e: f507 7300 add.w r3, r7, #512 ; 0x200
8003f72: f5a3 7394 sub.w r3, r3, #296 ; 0x128
8003f76: 681b ldr r3, [r3, #0]
8003f78: fa93 f2a3 rbit r2, r3
8003f7c: f507 7300 add.w r3, r7, #512 ; 0x200
8003f80: f5a3 7396 sub.w r3, r3, #300 ; 0x12c
8003f84: 601a str r2, [r3, #0]
8003f86: f507 7300 add.w r3, r7, #512 ; 0x200
8003f8a: f5a3 7398 sub.w r3, r3, #304 ; 0x130
8003f8e: 2202 movs r2, #2
8003f90: 601a str r2, [r3, #0]
8003f92: f507 7300 add.w r3, r7, #512 ; 0x200
8003f96: f5a3 7398 sub.w r3, r3, #304 ; 0x130
8003f9a: 681b ldr r3, [r3, #0]
8003f9c: fa93 f2a3 rbit r2, r3
8003fa0: f507 7300 add.w r3, r7, #512 ; 0x200
8003fa4: f5a3 739a sub.w r3, r3, #308 ; 0x134
8003fa8: 601a str r2, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003faa: 4b41 ldr r3, [pc, #260] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
8003fac: 6a5a ldr r2, [r3, #36] ; 0x24
8003fae: f507 7300 add.w r3, r7, #512 ; 0x200
8003fb2: f5a3 739c sub.w r3, r3, #312 ; 0x138
8003fb6: 2102 movs r1, #2
8003fb8: 6019 str r1, [r3, #0]
8003fba: f507 7300 add.w r3, r7, #512 ; 0x200
8003fbe: f5a3 739c sub.w r3, r3, #312 ; 0x138
8003fc2: 681b ldr r3, [r3, #0]
8003fc4: fa93 f1a3 rbit r1, r3
8003fc8: f507 7300 add.w r3, r7, #512 ; 0x200
8003fcc: f5a3 739e sub.w r3, r3, #316 ; 0x13c
8003fd0: 6019 str r1, [r3, #0]
return result;
8003fd2: f507 7300 add.w r3, r7, #512 ; 0x200
8003fd6: f5a3 739e sub.w r3, r3, #316 ; 0x13c
8003fda: 681b ldr r3, [r3, #0]
8003fdc: fab3 f383 clz r3, r3
8003fe0: b2db uxtb r3, r3
8003fe2: f043 0360 orr.w r3, r3, #96 ; 0x60
8003fe6: b2db uxtb r3, r3
8003fe8: f003 031f and.w r3, r3, #31
8003fec: 2101 movs r1, #1
8003fee: fa01 f303 lsl.w r3, r1, r3
8003ff2: 4013 ands r3, r2
8003ff4: 2b00 cmp r3, #0
8003ff6: d197 bne.n 8003f28 <HAL_RCC_OscConfig+0x7ac>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8003ff8: f507 7300 add.w r3, r7, #512 ; 0x200
8003ffc: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8004000: 681b ldr r3, [r3, #0]
8004002: 681b ldr r3, [r3, #0]
8004004: f003 0304 and.w r3, r3, #4
8004008: 2b00 cmp r3, #0
800400a: f000 81a1 beq.w 8004350 <HAL_RCC_OscConfig+0xbd4>
{
FlagStatus pwrclkchanged = RESET;
800400e: 2300 movs r3, #0
8004010: f887 31ff strb.w r3, [r7, #511] ; 0x1ff
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
8004014: 4b26 ldr r3, [pc, #152] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
8004016: 69db ldr r3, [r3, #28]
8004018: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
800401c: 2b00 cmp r3, #0
800401e: d116 bne.n 800404e <HAL_RCC_OscConfig+0x8d2>
{
__HAL_RCC_PWR_CLK_ENABLE();
8004020: 4b23 ldr r3, [pc, #140] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
8004022: 69db ldr r3, [r3, #28]
8004024: 4a22 ldr r2, [pc, #136] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
8004026: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
800402a: 61d3 str r3, [r2, #28]
800402c: 4b20 ldr r3, [pc, #128] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
800402e: 69db ldr r3, [r3, #28]
8004030: f003 5280 and.w r2, r3, #268435456 ; 0x10000000
8004034: f507 7300 add.w r3, r7, #512 ; 0x200
8004038: f5a3 73fc sub.w r3, r3, #504 ; 0x1f8
800403c: 601a str r2, [r3, #0]
800403e: f507 7300 add.w r3, r7, #512 ; 0x200
8004042: f5a3 73fc sub.w r3, r3, #504 ; 0x1f8
8004046: 681b ldr r3, [r3, #0]
pwrclkchanged = SET;
8004048: 2301 movs r3, #1
800404a: f887 31ff strb.w r3, [r7, #511] ; 0x1ff
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800404e: 4b1a ldr r3, [pc, #104] ; (80040b8 <HAL_RCC_OscConfig+0x93c>)
8004050: 681b ldr r3, [r3, #0]
8004052: f403 7380 and.w r3, r3, #256 ; 0x100
8004056: 2b00 cmp r3, #0
8004058: d11a bne.n 8004090 <HAL_RCC_OscConfig+0x914>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800405a: 4b17 ldr r3, [pc, #92] ; (80040b8 <HAL_RCC_OscConfig+0x93c>)
800405c: 681b ldr r3, [r3, #0]
800405e: 4a16 ldr r2, [pc, #88] ; (80040b8 <HAL_RCC_OscConfig+0x93c>)
8004060: f443 7380 orr.w r3, r3, #256 ; 0x100
8004064: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004066: f7fc fd8f bl 8000b88 <HAL_GetTick>
800406a: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800406e: e009 b.n 8004084 <HAL_RCC_OscConfig+0x908>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8004070: f7fc fd8a bl 8000b88 <HAL_GetTick>
8004074: 4602 mov r2, r0
8004076: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
800407a: 1ad3 subs r3, r2, r3
800407c: 2b64 cmp r3, #100 ; 0x64
800407e: d901 bls.n 8004084 <HAL_RCC_OscConfig+0x908>
{
return HAL_TIMEOUT;
8004080: 2303 movs r3, #3
8004082: e3b1 b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004084: 4b0c ldr r3, [pc, #48] ; (80040b8 <HAL_RCC_OscConfig+0x93c>)
8004086: 681b ldr r3, [r3, #0]
8004088: f403 7380 and.w r3, r3, #256 ; 0x100
800408c: 2b00 cmp r3, #0
800408e: d0ef beq.n 8004070 <HAL_RCC_OscConfig+0x8f4>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8004090: f507 7300 add.w r3, r7, #512 ; 0x200
8004094: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8004098: 681b ldr r3, [r3, #0]
800409a: 68db ldr r3, [r3, #12]
800409c: 2b01 cmp r3, #1
800409e: d10d bne.n 80040bc <HAL_RCC_OscConfig+0x940>
80040a0: 4b03 ldr r3, [pc, #12] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
80040a2: 6a1b ldr r3, [r3, #32]
80040a4: 4a02 ldr r2, [pc, #8] ; (80040b0 <HAL_RCC_OscConfig+0x934>)
80040a6: f043 0301 orr.w r3, r3, #1
80040aa: 6213 str r3, [r2, #32]
80040ac: e03c b.n 8004128 <HAL_RCC_OscConfig+0x9ac>
80040ae: bf00 nop
80040b0: 40021000 .word 0x40021000
80040b4: 10908120 .word 0x10908120
80040b8: 40007000 .word 0x40007000
80040bc: f507 7300 add.w r3, r7, #512 ; 0x200
80040c0: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80040c4: 681b ldr r3, [r3, #0]
80040c6: 68db ldr r3, [r3, #12]
80040c8: 2b00 cmp r3, #0
80040ca: d10c bne.n 80040e6 <HAL_RCC_OscConfig+0x96a>
80040cc: 4bc1 ldr r3, [pc, #772] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80040ce: 6a1b ldr r3, [r3, #32]
80040d0: 4ac0 ldr r2, [pc, #768] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80040d2: f023 0301 bic.w r3, r3, #1
80040d6: 6213 str r3, [r2, #32]
80040d8: 4bbe ldr r3, [pc, #760] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80040da: 6a1b ldr r3, [r3, #32]
80040dc: 4abd ldr r2, [pc, #756] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80040de: f023 0304 bic.w r3, r3, #4
80040e2: 6213 str r3, [r2, #32]
80040e4: e020 b.n 8004128 <HAL_RCC_OscConfig+0x9ac>
80040e6: f507 7300 add.w r3, r7, #512 ; 0x200
80040ea: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80040ee: 681b ldr r3, [r3, #0]
80040f0: 68db ldr r3, [r3, #12]
80040f2: 2b05 cmp r3, #5
80040f4: d10c bne.n 8004110 <HAL_RCC_OscConfig+0x994>
80040f6: 4bb7 ldr r3, [pc, #732] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80040f8: 6a1b ldr r3, [r3, #32]
80040fa: 4ab6 ldr r2, [pc, #728] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80040fc: f043 0304 orr.w r3, r3, #4
8004100: 6213 str r3, [r2, #32]
8004102: 4bb4 ldr r3, [pc, #720] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004104: 6a1b ldr r3, [r3, #32]
8004106: 4ab3 ldr r2, [pc, #716] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004108: f043 0301 orr.w r3, r3, #1
800410c: 6213 str r3, [r2, #32]
800410e: e00b b.n 8004128 <HAL_RCC_OscConfig+0x9ac>
8004110: 4bb0 ldr r3, [pc, #704] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004112: 6a1b ldr r3, [r3, #32]
8004114: 4aaf ldr r2, [pc, #700] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004116: f023 0301 bic.w r3, r3, #1
800411a: 6213 str r3, [r2, #32]
800411c: 4bad ldr r3, [pc, #692] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
800411e: 6a1b ldr r3, [r3, #32]
8004120: 4aac ldr r2, [pc, #688] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004122: f023 0304 bic.w r3, r3, #4
8004126: 6213 str r3, [r2, #32]
/* Check the LSE State */
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8004128: f507 7300 add.w r3, r7, #512 ; 0x200
800412c: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8004130: 681b ldr r3, [r3, #0]
8004132: 68db ldr r3, [r3, #12]
8004134: 2b00 cmp r3, #0
8004136: f000 8081 beq.w 800423c <HAL_RCC_OscConfig+0xac0>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800413a: f7fc fd25 bl 8000b88 <HAL_GetTick>
800413e: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004142: e00b b.n 800415c <HAL_RCC_OscConfig+0x9e0>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8004144: f7fc fd20 bl 8000b88 <HAL_GetTick>
8004148: 4602 mov r2, r0
800414a: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
800414e: 1ad3 subs r3, r2, r3
8004150: f241 3288 movw r2, #5000 ; 0x1388
8004154: 4293 cmp r3, r2
8004156: d901 bls.n 800415c <HAL_RCC_OscConfig+0x9e0>
{
return HAL_TIMEOUT;
8004158: 2303 movs r3, #3
800415a: e345 b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
800415c: f507 7300 add.w r3, r7, #512 ; 0x200
8004160: f5a3 73a0 sub.w r3, r3, #320 ; 0x140
8004164: 2202 movs r2, #2
8004166: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004168: f507 7300 add.w r3, r7, #512 ; 0x200
800416c: f5a3 73a0 sub.w r3, r3, #320 ; 0x140
8004170: 681b ldr r3, [r3, #0]
8004172: fa93 f2a3 rbit r2, r3
8004176: f507 7300 add.w r3, r7, #512 ; 0x200
800417a: f5a3 73a2 sub.w r3, r3, #324 ; 0x144
800417e: 601a str r2, [r3, #0]
8004180: f507 7300 add.w r3, r7, #512 ; 0x200
8004184: f5a3 73a4 sub.w r3, r3, #328 ; 0x148
8004188: 2202 movs r2, #2
800418a: 601a str r2, [r3, #0]
800418c: f507 7300 add.w r3, r7, #512 ; 0x200
8004190: f5a3 73a4 sub.w r3, r3, #328 ; 0x148
8004194: 681b ldr r3, [r3, #0]
8004196: fa93 f2a3 rbit r2, r3
800419a: f507 7300 add.w r3, r7, #512 ; 0x200
800419e: f5a3 73a6 sub.w r3, r3, #332 ; 0x14c
80041a2: 601a str r2, [r3, #0]
return result;
80041a4: f507 7300 add.w r3, r7, #512 ; 0x200
80041a8: f5a3 73a6 sub.w r3, r3, #332 ; 0x14c
80041ac: 681b ldr r3, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80041ae: fab3 f383 clz r3, r3
80041b2: b2db uxtb r3, r3
80041b4: 095b lsrs r3, r3, #5
80041b6: b2db uxtb r3, r3
80041b8: f043 0302 orr.w r3, r3, #2
80041bc: b2db uxtb r3, r3
80041be: 2b02 cmp r3, #2
80041c0: d102 bne.n 80041c8 <HAL_RCC_OscConfig+0xa4c>
80041c2: 4b84 ldr r3, [pc, #528] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80041c4: 6a1b ldr r3, [r3, #32]
80041c6: e013 b.n 80041f0 <HAL_RCC_OscConfig+0xa74>
80041c8: f507 7300 add.w r3, r7, #512 ; 0x200
80041cc: f5a3 73a8 sub.w r3, r3, #336 ; 0x150
80041d0: 2202 movs r2, #2
80041d2: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80041d4: f507 7300 add.w r3, r7, #512 ; 0x200
80041d8: f5a3 73a8 sub.w r3, r3, #336 ; 0x150
80041dc: 681b ldr r3, [r3, #0]
80041de: fa93 f2a3 rbit r2, r3
80041e2: f507 7300 add.w r3, r7, #512 ; 0x200
80041e6: f5a3 73aa sub.w r3, r3, #340 ; 0x154
80041ea: 601a str r2, [r3, #0]
80041ec: 4b79 ldr r3, [pc, #484] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80041ee: 6a5b ldr r3, [r3, #36] ; 0x24
80041f0: f507 7200 add.w r2, r7, #512 ; 0x200
80041f4: f5a2 72ac sub.w r2, r2, #344 ; 0x158
80041f8: 2102 movs r1, #2
80041fa: 6011 str r1, [r2, #0]
80041fc: f507 7200 add.w r2, r7, #512 ; 0x200
8004200: f5a2 72ac sub.w r2, r2, #344 ; 0x158
8004204: 6812 ldr r2, [r2, #0]
8004206: fa92 f1a2 rbit r1, r2
800420a: f507 7200 add.w r2, r7, #512 ; 0x200
800420e: f5a2 72ae sub.w r2, r2, #348 ; 0x15c
8004212: 6011 str r1, [r2, #0]
return result;
8004214: f507 7200 add.w r2, r7, #512 ; 0x200
8004218: f5a2 72ae sub.w r2, r2, #348 ; 0x15c
800421c: 6812 ldr r2, [r2, #0]
800421e: fab2 f282 clz r2, r2
8004222: b2d2 uxtb r2, r2
8004224: f042 0240 orr.w r2, r2, #64 ; 0x40
8004228: b2d2 uxtb r2, r2
800422a: f002 021f and.w r2, r2, #31
800422e: 2101 movs r1, #1
8004230: fa01 f202 lsl.w r2, r1, r2
8004234: 4013 ands r3, r2
8004236: 2b00 cmp r3, #0
8004238: d084 beq.n 8004144 <HAL_RCC_OscConfig+0x9c8>
800423a: e07f b.n 800433c <HAL_RCC_OscConfig+0xbc0>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800423c: f7fc fca4 bl 8000b88 <HAL_GetTick>
8004240: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till LSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004244: e00b b.n 800425e <HAL_RCC_OscConfig+0xae2>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8004246: f7fc fc9f bl 8000b88 <HAL_GetTick>
800424a: 4602 mov r2, r0
800424c: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8004250: 1ad3 subs r3, r2, r3
8004252: f241 3288 movw r2, #5000 ; 0x1388
8004256: 4293 cmp r3, r2
8004258: d901 bls.n 800425e <HAL_RCC_OscConfig+0xae2>
{
return HAL_TIMEOUT;
800425a: 2303 movs r3, #3
800425c: e2c4 b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
800425e: f507 7300 add.w r3, r7, #512 ; 0x200
8004262: f5a3 73b0 sub.w r3, r3, #352 ; 0x160
8004266: 2202 movs r2, #2
8004268: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
800426a: f507 7300 add.w r3, r7, #512 ; 0x200
800426e: f5a3 73b0 sub.w r3, r3, #352 ; 0x160
8004272: 681b ldr r3, [r3, #0]
8004274: fa93 f2a3 rbit r2, r3
8004278: f507 7300 add.w r3, r7, #512 ; 0x200
800427c: f5a3 73b2 sub.w r3, r3, #356 ; 0x164
8004280: 601a str r2, [r3, #0]
8004282: f507 7300 add.w r3, r7, #512 ; 0x200
8004286: f5a3 73b4 sub.w r3, r3, #360 ; 0x168
800428a: 2202 movs r2, #2
800428c: 601a str r2, [r3, #0]
800428e: f507 7300 add.w r3, r7, #512 ; 0x200
8004292: f5a3 73b4 sub.w r3, r3, #360 ; 0x168
8004296: 681b ldr r3, [r3, #0]
8004298: fa93 f2a3 rbit r2, r3
800429c: f507 7300 add.w r3, r7, #512 ; 0x200
80042a0: f5a3 73b6 sub.w r3, r3, #364 ; 0x16c
80042a4: 601a str r2, [r3, #0]
return result;
80042a6: f507 7300 add.w r3, r7, #512 ; 0x200
80042aa: f5a3 73b6 sub.w r3, r3, #364 ; 0x16c
80042ae: 681b ldr r3, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80042b0: fab3 f383 clz r3, r3
80042b4: b2db uxtb r3, r3
80042b6: 095b lsrs r3, r3, #5
80042b8: b2db uxtb r3, r3
80042ba: f043 0302 orr.w r3, r3, #2
80042be: b2db uxtb r3, r3
80042c0: 2b02 cmp r3, #2
80042c2: d102 bne.n 80042ca <HAL_RCC_OscConfig+0xb4e>
80042c4: 4b43 ldr r3, [pc, #268] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80042c6: 6a1b ldr r3, [r3, #32]
80042c8: e013 b.n 80042f2 <HAL_RCC_OscConfig+0xb76>
80042ca: f507 7300 add.w r3, r7, #512 ; 0x200
80042ce: f5a3 73b8 sub.w r3, r3, #368 ; 0x170
80042d2: 2202 movs r2, #2
80042d4: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80042d6: f507 7300 add.w r3, r7, #512 ; 0x200
80042da: f5a3 73b8 sub.w r3, r3, #368 ; 0x170
80042de: 681b ldr r3, [r3, #0]
80042e0: fa93 f2a3 rbit r2, r3
80042e4: f507 7300 add.w r3, r7, #512 ; 0x200
80042e8: f5a3 73ba sub.w r3, r3, #372 ; 0x174
80042ec: 601a str r2, [r3, #0]
80042ee: 4b39 ldr r3, [pc, #228] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
80042f0: 6a5b ldr r3, [r3, #36] ; 0x24
80042f2: f507 7200 add.w r2, r7, #512 ; 0x200
80042f6: f5a2 72bc sub.w r2, r2, #376 ; 0x178
80042fa: 2102 movs r1, #2
80042fc: 6011 str r1, [r2, #0]
80042fe: f507 7200 add.w r2, r7, #512 ; 0x200
8004302: f5a2 72bc sub.w r2, r2, #376 ; 0x178
8004306: 6812 ldr r2, [r2, #0]
8004308: fa92 f1a2 rbit r1, r2
800430c: f507 7200 add.w r2, r7, #512 ; 0x200
8004310: f5a2 72be sub.w r2, r2, #380 ; 0x17c
8004314: 6011 str r1, [r2, #0]
return result;
8004316: f507 7200 add.w r2, r7, #512 ; 0x200
800431a: f5a2 72be sub.w r2, r2, #380 ; 0x17c
800431e: 6812 ldr r2, [r2, #0]
8004320: fab2 f282 clz r2, r2
8004324: b2d2 uxtb r2, r2
8004326: f042 0240 orr.w r2, r2, #64 ; 0x40
800432a: b2d2 uxtb r2, r2
800432c: f002 021f and.w r2, r2, #31
8004330: 2101 movs r1, #1
8004332: fa01 f202 lsl.w r2, r1, r2
8004336: 4013 ands r3, r2
8004338: 2b00 cmp r3, #0
800433a: d184 bne.n 8004246 <HAL_RCC_OscConfig+0xaca>
}
}
}
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
800433c: f897 31ff ldrb.w r3, [r7, #511] ; 0x1ff
8004340: 2b01 cmp r3, #1
8004342: d105 bne.n 8004350 <HAL_RCC_OscConfig+0xbd4>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004344: 4b23 ldr r3, [pc, #140] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004346: 69db ldr r3, [r3, #28]
8004348: 4a22 ldr r2, [pc, #136] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
800434a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
800434e: 61d3 str r3, [r2, #28]
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8004350: f507 7300 add.w r3, r7, #512 ; 0x200
8004354: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8004358: 681b ldr r3, [r3, #0]
800435a: 69db ldr r3, [r3, #28]
800435c: 2b00 cmp r3, #0
800435e: f000 8242 beq.w 80047e6 <HAL_RCC_OscConfig+0x106a>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8004362: 4b1c ldr r3, [pc, #112] ; (80043d4 <HAL_RCC_OscConfig+0xc58>)
8004364: 685b ldr r3, [r3, #4]
8004366: f003 030c and.w r3, r3, #12
800436a: 2b08 cmp r3, #8
800436c: f000 8213 beq.w 8004796 <HAL_RCC_OscConfig+0x101a>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8004370: f507 7300 add.w r3, r7, #512 ; 0x200
8004374: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
8004378: 681b ldr r3, [r3, #0]
800437a: 69db ldr r3, [r3, #28]
800437c: 2b02 cmp r3, #2
800437e: f040 8162 bne.w 8004646 <HAL_RCC_OscConfig+0xeca>
8004382: f507 7300 add.w r3, r7, #512 ; 0x200
8004386: f5a3 73c0 sub.w r3, r3, #384 ; 0x180
800438a: f04f 7280 mov.w r2, #16777216 ; 0x1000000
800438e: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004390: f507 7300 add.w r3, r7, #512 ; 0x200
8004394: f5a3 73c0 sub.w r3, r3, #384 ; 0x180
8004398: 681b ldr r3, [r3, #0]
800439a: fa93 f2a3 rbit r2, r3
800439e: f507 7300 add.w r3, r7, #512 ; 0x200
80043a2: f5a3 73c2 sub.w r3, r3, #388 ; 0x184
80043a6: 601a str r2, [r3, #0]
return result;
80043a8: f507 7300 add.w r3, r7, #512 ; 0x200
80043ac: f5a3 73c2 sub.w r3, r3, #388 ; 0x184
80043b0: 681b ldr r3, [r3, #0]
#if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
#endif
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80043b2: fab3 f383 clz r3, r3
80043b6: b2db uxtb r3, r3
80043b8: f103 5384 add.w r3, r3, #276824064 ; 0x10800000
80043bc: f503 1384 add.w r3, r3, #1081344 ; 0x108000
80043c0: 009b lsls r3, r3, #2
80043c2: 461a mov r2, r3
80043c4: 2300 movs r3, #0
80043c6: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80043c8: f7fc fbde bl 8000b88 <HAL_GetTick>
80043cc: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till PLL is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80043d0: e00c b.n 80043ec <HAL_RCC_OscConfig+0xc70>
80043d2: bf00 nop
80043d4: 40021000 .word 0x40021000
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80043d8: f7fc fbd6 bl 8000b88 <HAL_GetTick>
80043dc: 4602 mov r2, r0
80043de: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
80043e2: 1ad3 subs r3, r2, r3
80043e4: 2b02 cmp r3, #2
80043e6: d901 bls.n 80043ec <HAL_RCC_OscConfig+0xc70>
{
return HAL_TIMEOUT;
80043e8: 2303 movs r3, #3
80043ea: e1fd b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
80043ec: f507 7300 add.w r3, r7, #512 ; 0x200
80043f0: f5a3 73c4 sub.w r3, r3, #392 ; 0x188
80043f4: f04f 7200 mov.w r2, #33554432 ; 0x2000000
80043f8: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80043fa: f507 7300 add.w r3, r7, #512 ; 0x200
80043fe: f5a3 73c4 sub.w r3, r3, #392 ; 0x188
8004402: 681b ldr r3, [r3, #0]
8004404: fa93 f2a3 rbit r2, r3
8004408: f507 7300 add.w r3, r7, #512 ; 0x200
800440c: f5a3 73c6 sub.w r3, r3, #396 ; 0x18c
8004410: 601a str r2, [r3, #0]
return result;
8004412: f507 7300 add.w r3, r7, #512 ; 0x200
8004416: f5a3 73c6 sub.w r3, r3, #396 ; 0x18c
800441a: 681b ldr r3, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800441c: fab3 f383 clz r3, r3
8004420: b2db uxtb r3, r3
8004422: 095b lsrs r3, r3, #5
8004424: b2db uxtb r3, r3
8004426: f043 0301 orr.w r3, r3, #1
800442a: b2db uxtb r3, r3
800442c: 2b01 cmp r3, #1
800442e: d102 bne.n 8004436 <HAL_RCC_OscConfig+0xcba>
8004430: 4bb0 ldr r3, [pc, #704] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
8004432: 681b ldr r3, [r3, #0]
8004434: e027 b.n 8004486 <HAL_RCC_OscConfig+0xd0a>
8004436: f507 7300 add.w r3, r7, #512 ; 0x200
800443a: f5a3 73c8 sub.w r3, r3, #400 ; 0x190
800443e: f04f 7200 mov.w r2, #33554432 ; 0x2000000
8004442: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004444: f507 7300 add.w r3, r7, #512 ; 0x200
8004448: f5a3 73c8 sub.w r3, r3, #400 ; 0x190
800444c: 681b ldr r3, [r3, #0]
800444e: fa93 f2a3 rbit r2, r3
8004452: f507 7300 add.w r3, r7, #512 ; 0x200
8004456: f5a3 73ca sub.w r3, r3, #404 ; 0x194
800445a: 601a str r2, [r3, #0]
800445c: f507 7300 add.w r3, r7, #512 ; 0x200
8004460: f5a3 73cc sub.w r3, r3, #408 ; 0x198
8004464: f04f 7200 mov.w r2, #33554432 ; 0x2000000
8004468: 601a str r2, [r3, #0]
800446a: f507 7300 add.w r3, r7, #512 ; 0x200
800446e: f5a3 73cc sub.w r3, r3, #408 ; 0x198
8004472: 681b ldr r3, [r3, #0]
8004474: fa93 f2a3 rbit r2, r3
8004478: f507 7300 add.w r3, r7, #512 ; 0x200
800447c: f5a3 73ce sub.w r3, r3, #412 ; 0x19c
8004480: 601a str r2, [r3, #0]
8004482: 4b9c ldr r3, [pc, #624] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
8004484: 6a5b ldr r3, [r3, #36] ; 0x24
8004486: f507 7200 add.w r2, r7, #512 ; 0x200
800448a: f5a2 72d0 sub.w r2, r2, #416 ; 0x1a0
800448e: f04f 7100 mov.w r1, #33554432 ; 0x2000000
8004492: 6011 str r1, [r2, #0]
8004494: f507 7200 add.w r2, r7, #512 ; 0x200
8004498: f5a2 72d0 sub.w r2, r2, #416 ; 0x1a0
800449c: 6812 ldr r2, [r2, #0]
800449e: fa92 f1a2 rbit r1, r2
80044a2: f507 7200 add.w r2, r7, #512 ; 0x200
80044a6: f5a2 72d2 sub.w r2, r2, #420 ; 0x1a4
80044aa: 6011 str r1, [r2, #0]
return result;
80044ac: f507 7200 add.w r2, r7, #512 ; 0x200
80044b0: f5a2 72d2 sub.w r2, r2, #420 ; 0x1a4
80044b4: 6812 ldr r2, [r2, #0]
80044b6: fab2 f282 clz r2, r2
80044ba: b2d2 uxtb r2, r2
80044bc: f042 0220 orr.w r2, r2, #32
80044c0: b2d2 uxtb r2, r2
80044c2: f002 021f and.w r2, r2, #31
80044c6: 2101 movs r1, #1
80044c8: fa01 f202 lsl.w r2, r1, r2
80044cc: 4013 ands r3, r2
80044ce: 2b00 cmp r3, #0
80044d0: d182 bne.n 80043d8 <HAL_RCC_OscConfig+0xc5c>
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
RCC_OscInitStruct->PLL.PREDIV,
RCC_OscInitStruct->PLL.PLLMUL);
#else
/* Configure the main PLL clock source and multiplication factor. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80044d2: 4b88 ldr r3, [pc, #544] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
80044d4: 685b ldr r3, [r3, #4]
80044d6: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
80044da: f507 7300 add.w r3, r7, #512 ; 0x200
80044de: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80044e2: 681b ldr r3, [r3, #0]
80044e4: 6a59 ldr r1, [r3, #36] ; 0x24
80044e6: f507 7300 add.w r3, r7, #512 ; 0x200
80044ea: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80044ee: 681b ldr r3, [r3, #0]
80044f0: 6a1b ldr r3, [r3, #32]
80044f2: 430b orrs r3, r1
80044f4: 497f ldr r1, [pc, #508] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
80044f6: 4313 orrs r3, r2
80044f8: 604b str r3, [r1, #4]
80044fa: f507 7300 add.w r3, r7, #512 ; 0x200
80044fe: f5a3 73d4 sub.w r3, r3, #424 ; 0x1a8
8004502: f04f 7280 mov.w r2, #16777216 ; 0x1000000
8004506: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004508: f507 7300 add.w r3, r7, #512 ; 0x200
800450c: f5a3 73d4 sub.w r3, r3, #424 ; 0x1a8
8004510: 681b ldr r3, [r3, #0]
8004512: fa93 f2a3 rbit r2, r3
8004516: f507 7300 add.w r3, r7, #512 ; 0x200
800451a: f5a3 73d6 sub.w r3, r3, #428 ; 0x1ac
800451e: 601a str r2, [r3, #0]
return result;
8004520: f507 7300 add.w r3, r7, #512 ; 0x200
8004524: f5a3 73d6 sub.w r3, r3, #428 ; 0x1ac
8004528: 681b ldr r3, [r3, #0]
RCC_OscInitStruct->PLL.PLLMUL);
#endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
800452a: fab3 f383 clz r3, r3
800452e: b2db uxtb r3, r3
8004530: f103 5384 add.w r3, r3, #276824064 ; 0x10800000
8004534: f503 1384 add.w r3, r3, #1081344 ; 0x108000
8004538: 009b lsls r3, r3, #2
800453a: 461a mov r2, r3
800453c: 2301 movs r3, #1
800453e: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004540: f7fc fb22 bl 8000b88 <HAL_GetTick>
8004544: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004548: e009 b.n 800455e <HAL_RCC_OscConfig+0xde2>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
800454a: f7fc fb1d bl 8000b88 <HAL_GetTick>
800454e: 4602 mov r2, r0
8004550: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
8004554: 1ad3 subs r3, r2, r3
8004556: 2b02 cmp r3, #2
8004558: d901 bls.n 800455e <HAL_RCC_OscConfig+0xde2>
{
return HAL_TIMEOUT;
800455a: 2303 movs r3, #3
800455c: e144 b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
800455e: f507 7300 add.w r3, r7, #512 ; 0x200
8004562: f5a3 73d8 sub.w r3, r3, #432 ; 0x1b0
8004566: f04f 7200 mov.w r2, #33554432 ; 0x2000000
800456a: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
800456c: f507 7300 add.w r3, r7, #512 ; 0x200
8004570: f5a3 73d8 sub.w r3, r3, #432 ; 0x1b0
8004574: 681b ldr r3, [r3, #0]
8004576: fa93 f2a3 rbit r2, r3
800457a: f507 7300 add.w r3, r7, #512 ; 0x200
800457e: f5a3 73da sub.w r3, r3, #436 ; 0x1b4
8004582: 601a str r2, [r3, #0]
return result;
8004584: f507 7300 add.w r3, r7, #512 ; 0x200
8004588: f5a3 73da sub.w r3, r3, #436 ; 0x1b4
800458c: 681b ldr r3, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800458e: fab3 f383 clz r3, r3
8004592: b2db uxtb r3, r3
8004594: 095b lsrs r3, r3, #5
8004596: b2db uxtb r3, r3
8004598: f043 0301 orr.w r3, r3, #1
800459c: b2db uxtb r3, r3
800459e: 2b01 cmp r3, #1
80045a0: d102 bne.n 80045a8 <HAL_RCC_OscConfig+0xe2c>
80045a2: 4b54 ldr r3, [pc, #336] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
80045a4: 681b ldr r3, [r3, #0]
80045a6: e027 b.n 80045f8 <HAL_RCC_OscConfig+0xe7c>
80045a8: f507 7300 add.w r3, r7, #512 ; 0x200
80045ac: f5a3 73dc sub.w r3, r3, #440 ; 0x1b8
80045b0: f04f 7200 mov.w r2, #33554432 ; 0x2000000
80045b4: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80045b6: f507 7300 add.w r3, r7, #512 ; 0x200
80045ba: f5a3 73dc sub.w r3, r3, #440 ; 0x1b8
80045be: 681b ldr r3, [r3, #0]
80045c0: fa93 f2a3 rbit r2, r3
80045c4: f507 7300 add.w r3, r7, #512 ; 0x200
80045c8: f5a3 73de sub.w r3, r3, #444 ; 0x1bc
80045cc: 601a str r2, [r3, #0]
80045ce: f507 7300 add.w r3, r7, #512 ; 0x200
80045d2: f5a3 73e0 sub.w r3, r3, #448 ; 0x1c0
80045d6: f04f 7200 mov.w r2, #33554432 ; 0x2000000
80045da: 601a str r2, [r3, #0]
80045dc: f507 7300 add.w r3, r7, #512 ; 0x200
80045e0: f5a3 73e0 sub.w r3, r3, #448 ; 0x1c0
80045e4: 681b ldr r3, [r3, #0]
80045e6: fa93 f2a3 rbit r2, r3
80045ea: f507 7300 add.w r3, r7, #512 ; 0x200
80045ee: f5a3 73e2 sub.w r3, r3, #452 ; 0x1c4
80045f2: 601a str r2, [r3, #0]
80045f4: 4b3f ldr r3, [pc, #252] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
80045f6: 6a5b ldr r3, [r3, #36] ; 0x24
80045f8: f507 7200 add.w r2, r7, #512 ; 0x200
80045fc: f5a2 72e4 sub.w r2, r2, #456 ; 0x1c8
8004600: f04f 7100 mov.w r1, #33554432 ; 0x2000000
8004604: 6011 str r1, [r2, #0]
8004606: f507 7200 add.w r2, r7, #512 ; 0x200
800460a: f5a2 72e4 sub.w r2, r2, #456 ; 0x1c8
800460e: 6812 ldr r2, [r2, #0]
8004610: fa92 f1a2 rbit r1, r2
8004614: f507 7200 add.w r2, r7, #512 ; 0x200
8004618: f5a2 72e6 sub.w r2, r2, #460 ; 0x1cc
800461c: 6011 str r1, [r2, #0]
return result;
800461e: f507 7200 add.w r2, r7, #512 ; 0x200
8004622: f5a2 72e6 sub.w r2, r2, #460 ; 0x1cc
8004626: 6812 ldr r2, [r2, #0]
8004628: fab2 f282 clz r2, r2
800462c: b2d2 uxtb r2, r2
800462e: f042 0220 orr.w r2, r2, #32
8004632: b2d2 uxtb r2, r2
8004634: f002 021f and.w r2, r2, #31
8004638: 2101 movs r1, #1
800463a: fa01 f202 lsl.w r2, r1, r2
800463e: 4013 ands r3, r2
8004640: 2b00 cmp r3, #0
8004642: d082 beq.n 800454a <HAL_RCC_OscConfig+0xdce>
8004644: e0cf b.n 80047e6 <HAL_RCC_OscConfig+0x106a>
8004646: f507 7300 add.w r3, r7, #512 ; 0x200
800464a: f5a3 73e8 sub.w r3, r3, #464 ; 0x1d0
800464e: f04f 7280 mov.w r2, #16777216 ; 0x1000000
8004652: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004654: f507 7300 add.w r3, r7, #512 ; 0x200
8004658: f5a3 73e8 sub.w r3, r3, #464 ; 0x1d0
800465c: 681b ldr r3, [r3, #0]
800465e: fa93 f2a3 rbit r2, r3
8004662: f507 7300 add.w r3, r7, #512 ; 0x200
8004666: f5a3 73ea sub.w r3, r3, #468 ; 0x1d4
800466a: 601a str r2, [r3, #0]
return result;
800466c: f507 7300 add.w r3, r7, #512 ; 0x200
8004670: f5a3 73ea sub.w r3, r3, #468 ; 0x1d4
8004674: 681b ldr r3, [r3, #0]
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004676: fab3 f383 clz r3, r3
800467a: b2db uxtb r3, r3
800467c: f103 5384 add.w r3, r3, #276824064 ; 0x10800000
8004680: f503 1384 add.w r3, r3, #1081344 ; 0x108000
8004684: 009b lsls r3, r3, #2
8004686: 461a mov r2, r3
8004688: 2300 movs r3, #0
800468a: 6013 str r3, [r2, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800468c: f7fc fa7c bl 8000b88 <HAL_GetTick>
8004690: f8c7 01f8 str.w r0, [r7, #504] ; 0x1f8
/* Wait till PLL is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004694: e009 b.n 80046aa <HAL_RCC_OscConfig+0xf2e>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8004696: f7fc fa77 bl 8000b88 <HAL_GetTick>
800469a: 4602 mov r2, r0
800469c: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8
80046a0: 1ad3 subs r3, r2, r3
80046a2: 2b02 cmp r3, #2
80046a4: d901 bls.n 80046aa <HAL_RCC_OscConfig+0xf2e>
{
return HAL_TIMEOUT;
80046a6: 2303 movs r3, #3
80046a8: e09e b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
80046aa: f507 7300 add.w r3, r7, #512 ; 0x200
80046ae: f5a3 73ec sub.w r3, r3, #472 ; 0x1d8
80046b2: f04f 7200 mov.w r2, #33554432 ; 0x2000000
80046b6: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80046b8: f507 7300 add.w r3, r7, #512 ; 0x200
80046bc: f5a3 73ec sub.w r3, r3, #472 ; 0x1d8
80046c0: 681b ldr r3, [r3, #0]
80046c2: fa93 f2a3 rbit r2, r3
80046c6: f507 7300 add.w r3, r7, #512 ; 0x200
80046ca: f5a3 73ee sub.w r3, r3, #476 ; 0x1dc
80046ce: 601a str r2, [r3, #0]
return result;
80046d0: f507 7300 add.w r3, r7, #512 ; 0x200
80046d4: f5a3 73ee sub.w r3, r3, #476 ; 0x1dc
80046d8: 681b ldr r3, [r3, #0]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80046da: fab3 f383 clz r3, r3
80046de: b2db uxtb r3, r3
80046e0: 095b lsrs r3, r3, #5
80046e2: b2db uxtb r3, r3
80046e4: f043 0301 orr.w r3, r3, #1
80046e8: b2db uxtb r3, r3
80046ea: 2b01 cmp r3, #1
80046ec: d104 bne.n 80046f8 <HAL_RCC_OscConfig+0xf7c>
80046ee: 4b01 ldr r3, [pc, #4] ; (80046f4 <HAL_RCC_OscConfig+0xf78>)
80046f0: 681b ldr r3, [r3, #0]
80046f2: e029 b.n 8004748 <HAL_RCC_OscConfig+0xfcc>
80046f4: 40021000 .word 0x40021000
80046f8: f507 7300 add.w r3, r7, #512 ; 0x200
80046fc: f5a3 73f0 sub.w r3, r3, #480 ; 0x1e0
8004700: f04f 7200 mov.w r2, #33554432 ; 0x2000000
8004704: 601a str r2, [r3, #0]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004706: f507 7300 add.w r3, r7, #512 ; 0x200
800470a: f5a3 73f0 sub.w r3, r3, #480 ; 0x1e0
800470e: 681b ldr r3, [r3, #0]
8004710: fa93 f2a3 rbit r2, r3
8004714: f507 7300 add.w r3, r7, #512 ; 0x200
8004718: f5a3 73f2 sub.w r3, r3, #484 ; 0x1e4
800471c: 601a str r2, [r3, #0]
800471e: f507 7300 add.w r3, r7, #512 ; 0x200
8004722: f5a3 73f4 sub.w r3, r3, #488 ; 0x1e8
8004726: f04f 7200 mov.w r2, #33554432 ; 0x2000000
800472a: 601a str r2, [r3, #0]
800472c: f507 7300 add.w r3, r7, #512 ; 0x200
8004730: f5a3 73f4 sub.w r3, r3, #488 ; 0x1e8
8004734: 681b ldr r3, [r3, #0]
8004736: fa93 f2a3 rbit r2, r3
800473a: f507 7300 add.w r3, r7, #512 ; 0x200
800473e: f5a3 73f6 sub.w r3, r3, #492 ; 0x1ec
8004742: 601a str r2, [r3, #0]
8004744: 4b2b ldr r3, [pc, #172] ; (80047f4 <HAL_RCC_OscConfig+0x1078>)
8004746: 6a5b ldr r3, [r3, #36] ; 0x24
8004748: f507 7200 add.w r2, r7, #512 ; 0x200
800474c: f5a2 72f8 sub.w r2, r2, #496 ; 0x1f0
8004750: f04f 7100 mov.w r1, #33554432 ; 0x2000000
8004754: 6011 str r1, [r2, #0]
8004756: f507 7200 add.w r2, r7, #512 ; 0x200
800475a: f5a2 72f8 sub.w r2, r2, #496 ; 0x1f0
800475e: 6812 ldr r2, [r2, #0]
8004760: fa92 f1a2 rbit r1, r2
8004764: f507 7200 add.w r2, r7, #512 ; 0x200
8004768: f5a2 72fa sub.w r2, r2, #500 ; 0x1f4
800476c: 6011 str r1, [r2, #0]
return result;
800476e: f507 7200 add.w r2, r7, #512 ; 0x200
8004772: f5a2 72fa sub.w r2, r2, #500 ; 0x1f4
8004776: 6812 ldr r2, [r2, #0]
8004778: fab2 f282 clz r2, r2
800477c: b2d2 uxtb r2, r2
800477e: f042 0220 orr.w r2, r2, #32
8004782: b2d2 uxtb r2, r2
8004784: f002 021f and.w r2, r2, #31
8004788: 2101 movs r1, #1
800478a: fa01 f202 lsl.w r2, r1, r2
800478e: 4013 ands r3, r2
8004790: 2b00 cmp r3, #0
8004792: d180 bne.n 8004696 <HAL_RCC_OscConfig+0xf1a>
8004794: e027 b.n 80047e6 <HAL_RCC_OscConfig+0x106a>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8004796: f507 7300 add.w r3, r7, #512 ; 0x200
800479a: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
800479e: 681b ldr r3, [r3, #0]
80047a0: 69db ldr r3, [r3, #28]
80047a2: 2b01 cmp r3, #1
80047a4: d101 bne.n 80047aa <HAL_RCC_OscConfig+0x102e>
{
return HAL_ERROR;
80047a6: 2301 movs r3, #1
80047a8: e01e b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
80047aa: 4b12 ldr r3, [pc, #72] ; (80047f4 <HAL_RCC_OscConfig+0x1078>)
80047ac: 685b ldr r3, [r3, #4]
80047ae: f8c7 31f4 str.w r3, [r7, #500] ; 0x1f4
pll_config2 = RCC->CFGR2;
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV))
#else
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80047b2: f8d7 31f4 ldr.w r3, [r7, #500] ; 0x1f4
80047b6: f403 3280 and.w r2, r3, #65536 ; 0x10000
80047ba: f507 7300 add.w r3, r7, #512 ; 0x200
80047be: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80047c2: 681b ldr r3, [r3, #0]
80047c4: 6a1b ldr r3, [r3, #32]
80047c6: 429a cmp r2, r3
80047c8: d10b bne.n 80047e2 <HAL_RCC_OscConfig+0x1066>
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
80047ca: f8d7 31f4 ldr.w r3, [r7, #500] ; 0x1f4
80047ce: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
80047d2: f507 7300 add.w r3, r7, #512 ; 0x200
80047d6: f5a3 73fe sub.w r3, r3, #508 ; 0x1fc
80047da: 681b ldr r3, [r3, #0]
80047dc: 6a5b ldr r3, [r3, #36] ; 0x24
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80047de: 429a cmp r2, r3
80047e0: d001 beq.n 80047e6 <HAL_RCC_OscConfig+0x106a>
#endif
{
return HAL_ERROR;
80047e2: 2301 movs r3, #1
80047e4: e000 b.n 80047e8 <HAL_RCC_OscConfig+0x106c>
}
}
}
}
return HAL_OK;
80047e6: 2300 movs r3, #0
}
80047e8: 4618 mov r0, r3
80047ea: f507 7700 add.w r7, r7, #512 ; 0x200
80047ee: 46bd mov sp, r7
80047f0: bd80 pop {r7, pc}
80047f2: bf00 nop
80047f4: 40021000 .word 0x40021000
080047f8 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
80047f8: b580 push {r7, lr}
80047fa: b09e sub sp, #120 ; 0x78
80047fc: af00 add r7, sp, #0
80047fe: 6078 str r0, [r7, #4]
8004800: 6039 str r1, [r7, #0]
uint32_t tickstart = 0U;
8004802: 2300 movs r3, #0
8004804: 677b str r3, [r7, #116] ; 0x74
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
8004806: 687b ldr r3, [r7, #4]
8004808: 2b00 cmp r3, #0
800480a: d101 bne.n 8004810 <HAL_RCC_ClockConfig+0x18>
{
return HAL_ERROR;
800480c: 2301 movs r3, #1
800480e: e162 b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
8004810: 4b90 ldr r3, [pc, #576] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004812: 681b ldr r3, [r3, #0]
8004814: f003 0307 and.w r3, r3, #7
8004818: 683a ldr r2, [r7, #0]
800481a: 429a cmp r2, r3
800481c: d910 bls.n 8004840 <HAL_RCC_ClockConfig+0x48>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800481e: 4b8d ldr r3, [pc, #564] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004820: 681b ldr r3, [r3, #0]
8004822: f023 0207 bic.w r2, r3, #7
8004826: 498b ldr r1, [pc, #556] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004828: 683b ldr r3, [r7, #0]
800482a: 4313 orrs r3, r2
800482c: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
800482e: 4b89 ldr r3, [pc, #548] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004830: 681b ldr r3, [r3, #0]
8004832: f003 0307 and.w r3, r3, #7
8004836: 683a ldr r2, [r7, #0]
8004838: 429a cmp r2, r3
800483a: d001 beq.n 8004840 <HAL_RCC_ClockConfig+0x48>
{
return HAL_ERROR;
800483c: 2301 movs r3, #1
800483e: e14a b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8004840: 687b ldr r3, [r7, #4]
8004842: 681b ldr r3, [r3, #0]
8004844: f003 0302 and.w r3, r3, #2
8004848: 2b00 cmp r3, #0
800484a: d008 beq.n 800485e <HAL_RCC_ClockConfig+0x66>
{
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800484c: 4b82 ldr r3, [pc, #520] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
800484e: 685b ldr r3, [r3, #4]
8004850: f023 02f0 bic.w r2, r3, #240 ; 0xf0
8004854: 687b ldr r3, [r7, #4]
8004856: 689b ldr r3, [r3, #8]
8004858: 497f ldr r1, [pc, #508] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
800485a: 4313 orrs r3, r2
800485c: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800485e: 687b ldr r3, [r7, #4]
8004860: 681b ldr r3, [r3, #0]
8004862: f003 0301 and.w r3, r3, #1
8004866: 2b00 cmp r3, #0
8004868: f000 80dc beq.w 8004a24 <HAL_RCC_ClockConfig+0x22c>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800486c: 687b ldr r3, [r7, #4]
800486e: 685b ldr r3, [r3, #4]
8004870: 2b01 cmp r3, #1
8004872: d13c bne.n 80048ee <HAL_RCC_ClockConfig+0xf6>
8004874: f44f 3300 mov.w r3, #131072 ; 0x20000
8004878: 673b str r3, [r7, #112] ; 0x70
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
800487a: 6f3b ldr r3, [r7, #112] ; 0x70
800487c: fa93 f3a3 rbit r3, r3
8004880: 66fb str r3, [r7, #108] ; 0x6c
return result;
8004882: 6efb ldr r3, [r7, #108] ; 0x6c
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004884: fab3 f383 clz r3, r3
8004888: b2db uxtb r3, r3
800488a: 095b lsrs r3, r3, #5
800488c: b2db uxtb r3, r3
800488e: f043 0301 orr.w r3, r3, #1
8004892: b2db uxtb r3, r3
8004894: 2b01 cmp r3, #1
8004896: d102 bne.n 800489e <HAL_RCC_ClockConfig+0xa6>
8004898: 4b6f ldr r3, [pc, #444] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
800489a: 681b ldr r3, [r3, #0]
800489c: e00f b.n 80048be <HAL_RCC_ClockConfig+0xc6>
800489e: f44f 3300 mov.w r3, #131072 ; 0x20000
80048a2: 66bb str r3, [r7, #104] ; 0x68
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80048a4: 6ebb ldr r3, [r7, #104] ; 0x68
80048a6: fa93 f3a3 rbit r3, r3
80048aa: 667b str r3, [r7, #100] ; 0x64
80048ac: f44f 3300 mov.w r3, #131072 ; 0x20000
80048b0: 663b str r3, [r7, #96] ; 0x60
80048b2: 6e3b ldr r3, [r7, #96] ; 0x60
80048b4: fa93 f3a3 rbit r3, r3
80048b8: 65fb str r3, [r7, #92] ; 0x5c
80048ba: 4b67 ldr r3, [pc, #412] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
80048bc: 6a5b ldr r3, [r3, #36] ; 0x24
80048be: f44f 3200 mov.w r2, #131072 ; 0x20000
80048c2: 65ba str r2, [r7, #88] ; 0x58
80048c4: 6dba ldr r2, [r7, #88] ; 0x58
80048c6: fa92 f2a2 rbit r2, r2
80048ca: 657a str r2, [r7, #84] ; 0x54
return result;
80048cc: 6d7a ldr r2, [r7, #84] ; 0x54
80048ce: fab2 f282 clz r2, r2
80048d2: b2d2 uxtb r2, r2
80048d4: f042 0220 orr.w r2, r2, #32
80048d8: b2d2 uxtb r2, r2
80048da: f002 021f and.w r2, r2, #31
80048de: 2101 movs r1, #1
80048e0: fa01 f202 lsl.w r2, r1, r2
80048e4: 4013 ands r3, r2
80048e6: 2b00 cmp r3, #0
80048e8: d17b bne.n 80049e2 <HAL_RCC_ClockConfig+0x1ea>
{
return HAL_ERROR;
80048ea: 2301 movs r3, #1
80048ec: e0f3 b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
}
}
/* PLL is selected as System Clock Source */
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
80048ee: 687b ldr r3, [r7, #4]
80048f0: 685b ldr r3, [r3, #4]
80048f2: 2b02 cmp r3, #2
80048f4: d13c bne.n 8004970 <HAL_RCC_ClockConfig+0x178>
80048f6: f04f 7300 mov.w r3, #33554432 ; 0x2000000
80048fa: 653b str r3, [r7, #80] ; 0x50
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
80048fc: 6d3b ldr r3, [r7, #80] ; 0x50
80048fe: fa93 f3a3 rbit r3, r3
8004902: 64fb str r3, [r7, #76] ; 0x4c
return result;
8004904: 6cfb ldr r3, [r7, #76] ; 0x4c
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004906: fab3 f383 clz r3, r3
800490a: b2db uxtb r3, r3
800490c: 095b lsrs r3, r3, #5
800490e: b2db uxtb r3, r3
8004910: f043 0301 orr.w r3, r3, #1
8004914: b2db uxtb r3, r3
8004916: 2b01 cmp r3, #1
8004918: d102 bne.n 8004920 <HAL_RCC_ClockConfig+0x128>
800491a: 4b4f ldr r3, [pc, #316] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
800491c: 681b ldr r3, [r3, #0]
800491e: e00f b.n 8004940 <HAL_RCC_ClockConfig+0x148>
8004920: f04f 7300 mov.w r3, #33554432 ; 0x2000000
8004924: 64bb str r3, [r7, #72] ; 0x48
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004926: 6cbb ldr r3, [r7, #72] ; 0x48
8004928: fa93 f3a3 rbit r3, r3
800492c: 647b str r3, [r7, #68] ; 0x44
800492e: f04f 7300 mov.w r3, #33554432 ; 0x2000000
8004932: 643b str r3, [r7, #64] ; 0x40
8004934: 6c3b ldr r3, [r7, #64] ; 0x40
8004936: fa93 f3a3 rbit r3, r3
800493a: 63fb str r3, [r7, #60] ; 0x3c
800493c: 4b46 ldr r3, [pc, #280] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
800493e: 6a5b ldr r3, [r3, #36] ; 0x24
8004940: f04f 7200 mov.w r2, #33554432 ; 0x2000000
8004944: 63ba str r2, [r7, #56] ; 0x38
8004946: 6bba ldr r2, [r7, #56] ; 0x38
8004948: fa92 f2a2 rbit r2, r2
800494c: 637a str r2, [r7, #52] ; 0x34
return result;
800494e: 6b7a ldr r2, [r7, #52] ; 0x34
8004950: fab2 f282 clz r2, r2
8004954: b2d2 uxtb r2, r2
8004956: f042 0220 orr.w r2, r2, #32
800495a: b2d2 uxtb r2, r2
800495c: f002 021f and.w r2, r2, #31
8004960: 2101 movs r1, #1
8004962: fa01 f202 lsl.w r2, r1, r2
8004966: 4013 ands r3, r2
8004968: 2b00 cmp r3, #0
800496a: d13a bne.n 80049e2 <HAL_RCC_ClockConfig+0x1ea>
{
return HAL_ERROR;
800496c: 2301 movs r3, #1
800496e: e0b2 b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
8004970: 2302 movs r3, #2
8004972: 633b str r3, [r7, #48] ; 0x30
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004974: 6b3b ldr r3, [r7, #48] ; 0x30
8004976: fa93 f3a3 rbit r3, r3
800497a: 62fb str r3, [r7, #44] ; 0x2c
return result;
800497c: 6afb ldr r3, [r7, #44] ; 0x2c
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800497e: fab3 f383 clz r3, r3
8004982: b2db uxtb r3, r3
8004984: 095b lsrs r3, r3, #5
8004986: b2db uxtb r3, r3
8004988: f043 0301 orr.w r3, r3, #1
800498c: b2db uxtb r3, r3
800498e: 2b01 cmp r3, #1
8004990: d102 bne.n 8004998 <HAL_RCC_ClockConfig+0x1a0>
8004992: 4b31 ldr r3, [pc, #196] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
8004994: 681b ldr r3, [r3, #0]
8004996: e00d b.n 80049b4 <HAL_RCC_ClockConfig+0x1bc>
8004998: 2302 movs r3, #2
800499a: 62bb str r3, [r7, #40] ; 0x28
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
800499c: 6abb ldr r3, [r7, #40] ; 0x28
800499e: fa93 f3a3 rbit r3, r3
80049a2: 627b str r3, [r7, #36] ; 0x24
80049a4: 2302 movs r3, #2
80049a6: 623b str r3, [r7, #32]
80049a8: 6a3b ldr r3, [r7, #32]
80049aa: fa93 f3a3 rbit r3, r3
80049ae: 61fb str r3, [r7, #28]
80049b0: 4b29 ldr r3, [pc, #164] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
80049b2: 6a5b ldr r3, [r3, #36] ; 0x24
80049b4: 2202 movs r2, #2
80049b6: 61ba str r2, [r7, #24]
80049b8: 69ba ldr r2, [r7, #24]
80049ba: fa92 f2a2 rbit r2, r2
80049be: 617a str r2, [r7, #20]
return result;
80049c0: 697a ldr r2, [r7, #20]
80049c2: fab2 f282 clz r2, r2
80049c6: b2d2 uxtb r2, r2
80049c8: f042 0220 orr.w r2, r2, #32
80049cc: b2d2 uxtb r2, r2
80049ce: f002 021f and.w r2, r2, #31
80049d2: 2101 movs r1, #1
80049d4: fa01 f202 lsl.w r2, r1, r2
80049d8: 4013 ands r3, r2
80049da: 2b00 cmp r3, #0
80049dc: d101 bne.n 80049e2 <HAL_RCC_ClockConfig+0x1ea>
{
return HAL_ERROR;
80049de: 2301 movs r3, #1
80049e0: e079 b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
80049e2: 4b1d ldr r3, [pc, #116] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
80049e4: 685b ldr r3, [r3, #4]
80049e6: f023 0203 bic.w r2, r3, #3
80049ea: 687b ldr r3, [r7, #4]
80049ec: 685b ldr r3, [r3, #4]
80049ee: 491a ldr r1, [pc, #104] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
80049f0: 4313 orrs r3, r2
80049f2: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
80049f4: f7fc f8c8 bl 8000b88 <HAL_GetTick>
80049f8: 6778 str r0, [r7, #116] ; 0x74
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80049fa: e00a b.n 8004a12 <HAL_RCC_ClockConfig+0x21a>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
80049fc: f7fc f8c4 bl 8000b88 <HAL_GetTick>
8004a00: 4602 mov r2, r0
8004a02: 6f7b ldr r3, [r7, #116] ; 0x74
8004a04: 1ad3 subs r3, r2, r3
8004a06: f241 3288 movw r2, #5000 ; 0x1388
8004a0a: 4293 cmp r3, r2
8004a0c: d901 bls.n 8004a12 <HAL_RCC_ClockConfig+0x21a>
{
return HAL_TIMEOUT;
8004a0e: 2303 movs r3, #3
8004a10: e061 b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8004a12: 4b11 ldr r3, [pc, #68] ; (8004a58 <HAL_RCC_ClockConfig+0x260>)
8004a14: 685b ldr r3, [r3, #4]
8004a16: f003 020c and.w r2, r3, #12
8004a1a: 687b ldr r3, [r7, #4]
8004a1c: 685b ldr r3, [r3, #4]
8004a1e: 009b lsls r3, r3, #2
8004a20: 429a cmp r2, r3
8004a22: d1eb bne.n 80049fc <HAL_RCC_ClockConfig+0x204>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
8004a24: 4b0b ldr r3, [pc, #44] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004a26: 681b ldr r3, [r3, #0]
8004a28: f003 0307 and.w r3, r3, #7
8004a2c: 683a ldr r2, [r7, #0]
8004a2e: 429a cmp r2, r3
8004a30: d214 bcs.n 8004a5c <HAL_RCC_ClockConfig+0x264>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8004a32: 4b08 ldr r3, [pc, #32] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004a34: 681b ldr r3, [r3, #0]
8004a36: f023 0207 bic.w r2, r3, #7
8004a3a: 4906 ldr r1, [pc, #24] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004a3c: 683b ldr r3, [r7, #0]
8004a3e: 4313 orrs r3, r2
8004a40: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
8004a42: 4b04 ldr r3, [pc, #16] ; (8004a54 <HAL_RCC_ClockConfig+0x25c>)
8004a44: 681b ldr r3, [r3, #0]
8004a46: f003 0307 and.w r3, r3, #7
8004a4a: 683a ldr r2, [r7, #0]
8004a4c: 429a cmp r2, r3
8004a4e: d005 beq.n 8004a5c <HAL_RCC_ClockConfig+0x264>
{
return HAL_ERROR;
8004a50: 2301 movs r3, #1
8004a52: e040 b.n 8004ad6 <HAL_RCC_ClockConfig+0x2de>
8004a54: 40022000 .word 0x40022000
8004a58: 40021000 .word 0x40021000
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8004a5c: 687b ldr r3, [r7, #4]
8004a5e: 681b ldr r3, [r3, #0]
8004a60: f003 0304 and.w r3, r3, #4
8004a64: 2b00 cmp r3, #0
8004a66: d008 beq.n 8004a7a <HAL_RCC_ClockConfig+0x282>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8004a68: 4b1d ldr r3, [pc, #116] ; (8004ae0 <HAL_RCC_ClockConfig+0x2e8>)
8004a6a: 685b ldr r3, [r3, #4]
8004a6c: f423 62e0 bic.w r2, r3, #1792 ; 0x700
8004a70: 687b ldr r3, [r7, #4]
8004a72: 68db ldr r3, [r3, #12]
8004a74: 491a ldr r1, [pc, #104] ; (8004ae0 <HAL_RCC_ClockConfig+0x2e8>)
8004a76: 4313 orrs r3, r2
8004a78: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8004a7a: 687b ldr r3, [r7, #4]
8004a7c: 681b ldr r3, [r3, #0]
8004a7e: f003 0308 and.w r3, r3, #8
8004a82: 2b00 cmp r3, #0
8004a84: d009 beq.n 8004a9a <HAL_RCC_ClockConfig+0x2a2>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
8004a86: 4b16 ldr r3, [pc, #88] ; (8004ae0 <HAL_RCC_ClockConfig+0x2e8>)
8004a88: 685b ldr r3, [r3, #4]
8004a8a: f423 5260 bic.w r2, r3, #14336 ; 0x3800
8004a8e: 687b ldr r3, [r7, #4]
8004a90: 691b ldr r3, [r3, #16]
8004a92: 00db lsls r3, r3, #3
8004a94: 4912 ldr r1, [pc, #72] ; (8004ae0 <HAL_RCC_ClockConfig+0x2e8>)
8004a96: 4313 orrs r3, r2
8004a98: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
8004a9a: f000 f829 bl 8004af0 <HAL_RCC_GetSysClockFreq>
8004a9e: 4601 mov r1, r0
8004aa0: 4b0f ldr r3, [pc, #60] ; (8004ae0 <HAL_RCC_ClockConfig+0x2e8>)
8004aa2: 685b ldr r3, [r3, #4]
8004aa4: f003 03f0 and.w r3, r3, #240 ; 0xf0
8004aa8: 22f0 movs r2, #240 ; 0xf0
8004aaa: 613a str r2, [r7, #16]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004aac: 693a ldr r2, [r7, #16]
8004aae: fa92 f2a2 rbit r2, r2
8004ab2: 60fa str r2, [r7, #12]
return result;
8004ab4: 68fa ldr r2, [r7, #12]
8004ab6: fab2 f282 clz r2, r2
8004aba: b2d2 uxtb r2, r2
8004abc: 40d3 lsrs r3, r2
8004abe: 4a09 ldr r2, [pc, #36] ; (8004ae4 <HAL_RCC_ClockConfig+0x2ec>)
8004ac0: 5cd3 ldrb r3, [r2, r3]
8004ac2: fa21 f303 lsr.w r3, r1, r3
8004ac6: 4a08 ldr r2, [pc, #32] ; (8004ae8 <HAL_RCC_ClockConfig+0x2f0>)
8004ac8: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick (uwTickPrio);
8004aca: 4b08 ldr r3, [pc, #32] ; (8004aec <HAL_RCC_ClockConfig+0x2f4>)
8004acc: 681b ldr r3, [r3, #0]
8004ace: 4618 mov r0, r3
8004ad0: f7fc f816 bl 8000b00 <HAL_InitTick>
return HAL_OK;
8004ad4: 2300 movs r3, #0
}
8004ad6: 4618 mov r0, r3
8004ad8: 3778 adds r7, #120 ; 0x78
8004ada: 46bd mov sp, r7
8004adc: bd80 pop {r7, pc}
8004ade: bf00 nop
8004ae0: 40021000 .word 0x40021000
8004ae4: 08009f90 .word 0x08009f90
8004ae8: 20000000 .word 0x20000000
8004aec: 20000004 .word 0x20000004
08004af0 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8004af0: b480 push {r7}
8004af2: b08b sub sp, #44 ; 0x2c
8004af4: af00 add r7, sp, #0
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8004af6: 2300 movs r3, #0
8004af8: 61fb str r3, [r7, #28]
8004afa: 2300 movs r3, #0
8004afc: 61bb str r3, [r7, #24]
8004afe: 2300 movs r3, #0
8004b00: 627b str r3, [r7, #36] ; 0x24
8004b02: 2300 movs r3, #0
8004b04: 617b str r3, [r7, #20]
uint32_t sysclockfreq = 0U;
8004b06: 2300 movs r3, #0
8004b08: 623b str r3, [r7, #32]
tmpreg = RCC->CFGR;
8004b0a: 4b29 ldr r3, [pc, #164] ; (8004bb0 <HAL_RCC_GetSysClockFreq+0xc0>)
8004b0c: 685b ldr r3, [r3, #4]
8004b0e: 61fb str r3, [r7, #28]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8004b10: 69fb ldr r3, [r7, #28]
8004b12: f003 030c and.w r3, r3, #12
8004b16: 2b04 cmp r3, #4
8004b18: d002 beq.n 8004b20 <HAL_RCC_GetSysClockFreq+0x30>
8004b1a: 2b08 cmp r3, #8
8004b1c: d003 beq.n 8004b26 <HAL_RCC_GetSysClockFreq+0x36>
8004b1e: e03c b.n 8004b9a <HAL_RCC_GetSysClockFreq+0xaa>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8004b20: 4b24 ldr r3, [pc, #144] ; (8004bb4 <HAL_RCC_GetSysClockFreq+0xc4>)
8004b22: 623b str r3, [r7, #32]
break;
8004b24: e03c b.n 8004ba0 <HAL_RCC_GetSysClockFreq+0xb0>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLLMUL)];
8004b26: 69fb ldr r3, [r7, #28]
8004b28: f403 1370 and.w r3, r3, #3932160 ; 0x3c0000
8004b2c: f44f 1270 mov.w r2, #3932160 ; 0x3c0000
8004b30: 60ba str r2, [r7, #8]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004b32: 68ba ldr r2, [r7, #8]
8004b34: fa92 f2a2 rbit r2, r2
8004b38: 607a str r2, [r7, #4]
return result;
8004b3a: 687a ldr r2, [r7, #4]
8004b3c: fab2 f282 clz r2, r2
8004b40: b2d2 uxtb r2, r2
8004b42: 40d3 lsrs r3, r2
8004b44: 4a1c ldr r2, [pc, #112] ; (8004bb8 <HAL_RCC_GetSysClockFreq+0xc8>)
8004b46: 5cd3 ldrb r3, [r2, r3]
8004b48: 617b str r3, [r7, #20]
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFGR2_PREDIV)];
8004b4a: 4b19 ldr r3, [pc, #100] ; (8004bb0 <HAL_RCC_GetSysClockFreq+0xc0>)
8004b4c: 6adb ldr r3, [r3, #44] ; 0x2c
8004b4e: f003 030f and.w r3, r3, #15
8004b52: 220f movs r2, #15
8004b54: 613a str r2, [r7, #16]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004b56: 693a ldr r2, [r7, #16]
8004b58: fa92 f2a2 rbit r2, r2
8004b5c: 60fa str r2, [r7, #12]
return result;
8004b5e: 68fa ldr r2, [r7, #12]
8004b60: fab2 f282 clz r2, r2
8004b64: b2d2 uxtb r2, r2
8004b66: 40d3 lsrs r3, r2
8004b68: 4a14 ldr r2, [pc, #80] ; (8004bbc <HAL_RCC_GetSysClockFreq+0xcc>)
8004b6a: 5cd3 ldrb r3, [r2, r3]
8004b6c: 61bb str r3, [r7, #24]
#if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI)
8004b6e: 69fb ldr r3, [r7, #28]
8004b70: f403 3380 and.w r3, r3, #65536 ; 0x10000
8004b74: 2b00 cmp r3, #0
8004b76: d008 beq.n 8004b8a <HAL_RCC_GetSysClockFreq+0x9a>
{
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
8004b78: 4a0e ldr r2, [pc, #56] ; (8004bb4 <HAL_RCC_GetSysClockFreq+0xc4>)
8004b7a: 69bb ldr r3, [r7, #24]
8004b7c: fbb2 f2f3 udiv r2, r2, r3
8004b80: 697b ldr r3, [r7, #20]
8004b82: fb02 f303 mul.w r3, r2, r3
8004b86: 627b str r3, [r7, #36] ; 0x24
8004b88: e004 b.n 8004b94 <HAL_RCC_GetSysClockFreq+0xa4>
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
8004b8a: 697b ldr r3, [r7, #20]
8004b8c: 4a0c ldr r2, [pc, #48] ; (8004bc0 <HAL_RCC_GetSysClockFreq+0xd0>)
8004b8e: fb02 f303 mul.w r3, r2, r3
8004b92: 627b str r3, [r7, #36] ; 0x24
{
/* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
}
#endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
sysclockfreq = pllclk;
8004b94: 6a7b ldr r3, [r7, #36] ; 0x24
8004b96: 623b str r3, [r7, #32]
break;
8004b98: e002 b.n 8004ba0 <HAL_RCC_GetSysClockFreq+0xb0>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8004b9a: 4b0a ldr r3, [pc, #40] ; (8004bc4 <HAL_RCC_GetSysClockFreq+0xd4>)
8004b9c: 623b str r3, [r7, #32]
break;
8004b9e: bf00 nop
}
}
return sysclockfreq;
8004ba0: 6a3b ldr r3, [r7, #32]
}
8004ba2: 4618 mov r0, r3
8004ba4: 372c adds r7, #44 ; 0x2c
8004ba6: 46bd mov sp, r7
8004ba8: f85d 7b04 ldr.w r7, [sp], #4
8004bac: 4770 bx lr
8004bae: bf00 nop
8004bb0: 40021000 .word 0x40021000
8004bb4: 00f42400 .word 0x00f42400
8004bb8: 08009fa8 .word 0x08009fa8
8004bbc: 08009fb8 .word 0x08009fb8
8004bc0: 003d0900 .word 0x003d0900
8004bc4: 007a1200 .word 0x007a1200
08004bc8 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8004bc8: b480 push {r7}
8004bca: af00 add r7, sp, #0
return SystemCoreClock;
8004bcc: 4b03 ldr r3, [pc, #12] ; (8004bdc <HAL_RCC_GetHCLKFreq+0x14>)
8004bce: 681b ldr r3, [r3, #0]
}
8004bd0: 4618 mov r0, r3
8004bd2: 46bd mov sp, r7
8004bd4: f85d 7b04 ldr.w r7, [sp], #4
8004bd8: 4770 bx lr
8004bda: bf00 nop
8004bdc: 20000000 .word 0x20000000
08004be0 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8004be0: b580 push {r7, lr}
8004be2: b082 sub sp, #8
8004be4: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITNUMBER]);
8004be6: f7ff ffef bl 8004bc8 <HAL_RCC_GetHCLKFreq>
8004bea: 4601 mov r1, r0
8004bec: 4b0b ldr r3, [pc, #44] ; (8004c1c <HAL_RCC_GetPCLK1Freq+0x3c>)
8004bee: 685b ldr r3, [r3, #4]
8004bf0: f403 63e0 and.w r3, r3, #1792 ; 0x700
8004bf4: f44f 62e0 mov.w r2, #1792 ; 0x700
8004bf8: 607a str r2, [r7, #4]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004bfa: 687a ldr r2, [r7, #4]
8004bfc: fa92 f2a2 rbit r2, r2
8004c00: 603a str r2, [r7, #0]
return result;
8004c02: 683a ldr r2, [r7, #0]
8004c04: fab2 f282 clz r2, r2
8004c08: b2d2 uxtb r2, r2
8004c0a: 40d3 lsrs r3, r2
8004c0c: 4a04 ldr r2, [pc, #16] ; (8004c20 <HAL_RCC_GetPCLK1Freq+0x40>)
8004c0e: 5cd3 ldrb r3, [r2, r3]
8004c10: fa21 f303 lsr.w r3, r1, r3
}
8004c14: 4618 mov r0, r3
8004c16: 3708 adds r7, #8
8004c18: 46bd mov sp, r7
8004c1a: bd80 pop {r7, pc}
8004c1c: 40021000 .word 0x40021000
8004c20: 08009fa0 .word 0x08009fa0
08004c24 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8004c24: b580 push {r7, lr}
8004c26: b082 sub sp, #8
8004c28: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITNUMBER]);
8004c2a: f7ff ffcd bl 8004bc8 <HAL_RCC_GetHCLKFreq>
8004c2e: 4601 mov r1, r0
8004c30: 4b0b ldr r3, [pc, #44] ; (8004c60 <HAL_RCC_GetPCLK2Freq+0x3c>)
8004c32: 685b ldr r3, [r3, #4]
8004c34: f403 5360 and.w r3, r3, #14336 ; 0x3800
8004c38: f44f 5260 mov.w r2, #14336 ; 0x3800
8004c3c: 607a str r2, [r7, #4]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004c3e: 687a ldr r2, [r7, #4]
8004c40: fa92 f2a2 rbit r2, r2
8004c44: 603a str r2, [r7, #0]
return result;
8004c46: 683a ldr r2, [r7, #0]
8004c48: fab2 f282 clz r2, r2
8004c4c: b2d2 uxtb r2, r2
8004c4e: 40d3 lsrs r3, r2
8004c50: 4a04 ldr r2, [pc, #16] ; (8004c64 <HAL_RCC_GetPCLK2Freq+0x40>)
8004c52: 5cd3 ldrb r3, [r2, r3]
8004c54: fa21 f303 lsr.w r3, r1, r3
}
8004c58: 4618 mov r0, r3
8004c5a: 3708 adds r7, #8
8004c5c: 46bd mov sp, r7
8004c5e: bd80 pop {r7, pc}
8004c60: 40021000 .word 0x40021000
8004c64: 08009fa0 .word 0x08009fa0
08004c68 <HAL_RCCEx_PeriphCLKConfig>:
* When the TIMx clock source is PLL clock, so the TIMx clock is PLL clock x 2.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8004c68: b580 push {r7, lr}
8004c6a: b092 sub sp, #72 ; 0x48
8004c6c: af00 add r7, sp, #0
8004c6e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8004c70: 2300 movs r3, #0
8004c72: 643b str r3, [r7, #64] ; 0x40
uint32_t temp_reg = 0U;
8004c74: 2300 movs r3, #0
8004c76: 63fb str r3, [r7, #60] ; 0x3c
FlagStatus pwrclkchanged = RESET;
8004c78: 2300 movs r3, #0
8004c7a: f887 3047 strb.w r3, [r7, #71] ; 0x47
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*---------------------------- RTC configuration -------------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
8004c7e: 687b ldr r3, [r7, #4]
8004c80: 681b ldr r3, [r3, #0]
8004c82: f403 3380 and.w r3, r3, #65536 ; 0x10000
8004c86: 2b00 cmp r3, #0
8004c88: f000 80d4 beq.w 8004e34 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
8004c8c: 4b4e ldr r3, [pc, #312] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004c8e: 69db ldr r3, [r3, #28]
8004c90: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8004c94: 2b00 cmp r3, #0
8004c96: d10e bne.n 8004cb6 <HAL_RCCEx_PeriphCLKConfig+0x4e>
{
__HAL_RCC_PWR_CLK_ENABLE();
8004c98: 4b4b ldr r3, [pc, #300] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004c9a: 69db ldr r3, [r3, #28]
8004c9c: 4a4a ldr r2, [pc, #296] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004c9e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8004ca2: 61d3 str r3, [r2, #28]
8004ca4: 4b48 ldr r3, [pc, #288] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004ca6: 69db ldr r3, [r3, #28]
8004ca8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8004cac: 60bb str r3, [r7, #8]
8004cae: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8004cb0: 2301 movs r3, #1
8004cb2: f887 3047 strb.w r3, [r7, #71] ; 0x47
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004cb6: 4b45 ldr r3, [pc, #276] ; (8004dcc <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004cb8: 681b ldr r3, [r3, #0]
8004cba: f403 7380 and.w r3, r3, #256 ; 0x100
8004cbe: 2b00 cmp r3, #0
8004cc0: d118 bne.n 8004cf4 <HAL_RCCEx_PeriphCLKConfig+0x8c>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8004cc2: 4b42 ldr r3, [pc, #264] ; (8004dcc <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004cc4: 681b ldr r3, [r3, #0]
8004cc6: 4a41 ldr r2, [pc, #260] ; (8004dcc <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004cc8: f443 7380 orr.w r3, r3, #256 ; 0x100
8004ccc: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004cce: f7fb ff5b bl 8000b88 <HAL_GetTick>
8004cd2: 6438 str r0, [r7, #64] ; 0x40
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004cd4: e008 b.n 8004ce8 <HAL_RCCEx_PeriphCLKConfig+0x80>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8004cd6: f7fb ff57 bl 8000b88 <HAL_GetTick>
8004cda: 4602 mov r2, r0
8004cdc: 6c3b ldr r3, [r7, #64] ; 0x40
8004cde: 1ad3 subs r3, r2, r3
8004ce0: 2b64 cmp r3, #100 ; 0x64
8004ce2: d901 bls.n 8004ce8 <HAL_RCCEx_PeriphCLKConfig+0x80>
{
return HAL_TIMEOUT;
8004ce4: 2303 movs r3, #3
8004ce6: e14b b.n 8004f80 <HAL_RCCEx_PeriphCLKConfig+0x318>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004ce8: 4b38 ldr r3, [pc, #224] ; (8004dcc <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004cea: 681b ldr r3, [r3, #0]
8004cec: f403 7380 and.w r3, r3, #256 ; 0x100
8004cf0: 2b00 cmp r3, #0
8004cf2: d0f0 beq.n 8004cd6 <HAL_RCCEx_PeriphCLKConfig+0x6e>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8004cf4: 4b34 ldr r3, [pc, #208] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004cf6: 6a1b ldr r3, [r3, #32]
8004cf8: f403 7340 and.w r3, r3, #768 ; 0x300
8004cfc: 63fb str r3, [r7, #60] ; 0x3c
if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8004cfe: 6bfb ldr r3, [r7, #60] ; 0x3c
8004d00: 2b00 cmp r3, #0
8004d02: f000 8084 beq.w 8004e0e <HAL_RCCEx_PeriphCLKConfig+0x1a6>
8004d06: 687b ldr r3, [r7, #4]
8004d08: 685b ldr r3, [r3, #4]
8004d0a: f403 7340 and.w r3, r3, #768 ; 0x300
8004d0e: 6bfa ldr r2, [r7, #60] ; 0x3c
8004d10: 429a cmp r2, r3
8004d12: d07c beq.n 8004e0e <HAL_RCCEx_PeriphCLKConfig+0x1a6>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8004d14: 4b2c ldr r3, [pc, #176] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004d16: 6a1b ldr r3, [r3, #32]
8004d18: f423 7340 bic.w r3, r3, #768 ; 0x300
8004d1c: 63fb str r3, [r7, #60] ; 0x3c
8004d1e: f44f 3380 mov.w r3, #65536 ; 0x10000
8004d22: 633b str r3, [r7, #48] ; 0x30
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004d24: 6b3b ldr r3, [r7, #48] ; 0x30
8004d26: fa93 f3a3 rbit r3, r3
8004d2a: 62fb str r3, [r7, #44] ; 0x2c
return result;
8004d2c: 6afb ldr r3, [r7, #44] ; 0x2c
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8004d2e: fab3 f383 clz r3, r3
8004d32: b2db uxtb r3, r3
8004d34: 461a mov r2, r3
8004d36: 4b26 ldr r3, [pc, #152] ; (8004dd0 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8004d38: 4413 add r3, r2
8004d3a: 009b lsls r3, r3, #2
8004d3c: 461a mov r2, r3
8004d3e: 2301 movs r3, #1
8004d40: 6013 str r3, [r2, #0]
8004d42: f44f 3380 mov.w r3, #65536 ; 0x10000
8004d46: 63bb str r3, [r7, #56] ; 0x38
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004d48: 6bbb ldr r3, [r7, #56] ; 0x38
8004d4a: fa93 f3a3 rbit r3, r3
8004d4e: 637b str r3, [r7, #52] ; 0x34
return result;
8004d50: 6b7b ldr r3, [r7, #52] ; 0x34
__HAL_RCC_BACKUPRESET_RELEASE();
8004d52: fab3 f383 clz r3, r3
8004d56: b2db uxtb r3, r3
8004d58: 461a mov r2, r3
8004d5a: 4b1d ldr r3, [pc, #116] ; (8004dd0 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8004d5c: 4413 add r3, r2
8004d5e: 009b lsls r3, r3, #2
8004d60: 461a mov r2, r3
8004d62: 2300 movs r3, #0
8004d64: 6013 str r3, [r2, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8004d66: 4a18 ldr r2, [pc, #96] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004d68: 6bfb ldr r3, [r7, #60] ; 0x3c
8004d6a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8004d6c: 6bfb ldr r3, [r7, #60] ; 0x3c
8004d6e: f003 0301 and.w r3, r3, #1
8004d72: 2b00 cmp r3, #0
8004d74: d04b beq.n 8004e0e <HAL_RCCEx_PeriphCLKConfig+0x1a6>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004d76: f7fb ff07 bl 8000b88 <HAL_GetTick>
8004d7a: 6438 str r0, [r7, #64] ; 0x40
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004d7c: e00a b.n 8004d94 <HAL_RCCEx_PeriphCLKConfig+0x12c>
{
if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8004d7e: f7fb ff03 bl 8000b88 <HAL_GetTick>
8004d82: 4602 mov r2, r0
8004d84: 6c3b ldr r3, [r7, #64] ; 0x40
8004d86: 1ad3 subs r3, r2, r3
8004d88: f241 3288 movw r2, #5000 ; 0x1388
8004d8c: 4293 cmp r3, r2
8004d8e: d901 bls.n 8004d94 <HAL_RCCEx_PeriphCLKConfig+0x12c>
{
return HAL_TIMEOUT;
8004d90: 2303 movs r3, #3
8004d92: e0f5 b.n 8004f80 <HAL_RCCEx_PeriphCLKConfig+0x318>
8004d94: 2302 movs r3, #2
8004d96: 62bb str r3, [r7, #40] ; 0x28
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004d98: 6abb ldr r3, [r7, #40] ; 0x28
8004d9a: fa93 f3a3 rbit r3, r3
8004d9e: 627b str r3, [r7, #36] ; 0x24
8004da0: 2302 movs r3, #2
8004da2: 623b str r3, [r7, #32]
8004da4: 6a3b ldr r3, [r7, #32]
8004da6: fa93 f3a3 rbit r3, r3
8004daa: 61fb str r3, [r7, #28]
return result;
8004dac: 69fb ldr r3, [r7, #28]
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004dae: fab3 f383 clz r3, r3
8004db2: b2db uxtb r3, r3
8004db4: 095b lsrs r3, r3, #5
8004db6: b2db uxtb r3, r3
8004db8: f043 0302 orr.w r3, r3, #2
8004dbc: b2db uxtb r3, r3
8004dbe: 2b02 cmp r3, #2
8004dc0: d108 bne.n 8004dd4 <HAL_RCCEx_PeriphCLKConfig+0x16c>
8004dc2: 4b01 ldr r3, [pc, #4] ; (8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004dc4: 6a1b ldr r3, [r3, #32]
8004dc6: e00d b.n 8004de4 <HAL_RCCEx_PeriphCLKConfig+0x17c>
8004dc8: 40021000 .word 0x40021000
8004dcc: 40007000 .word 0x40007000
8004dd0: 10908100 .word 0x10908100
8004dd4: 2302 movs r3, #2
8004dd6: 61bb str r3, [r7, #24]
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
8004dd8: 69bb ldr r3, [r7, #24]
8004dda: fa93 f3a3 rbit r3, r3
8004dde: 617b str r3, [r7, #20]
8004de0: 4b69 ldr r3, [pc, #420] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004de2: 6a5b ldr r3, [r3, #36] ; 0x24
8004de4: 2202 movs r2, #2
8004de6: 613a str r2, [r7, #16]
8004de8: 693a ldr r2, [r7, #16]
8004dea: fa92 f2a2 rbit r2, r2
8004dee: 60fa str r2, [r7, #12]
return result;
8004df0: 68fa ldr r2, [r7, #12]
8004df2: fab2 f282 clz r2, r2
8004df6: b2d2 uxtb r2, r2
8004df8: f042 0240 orr.w r2, r2, #64 ; 0x40
8004dfc: b2d2 uxtb r2, r2
8004dfe: f002 021f and.w r2, r2, #31
8004e02: 2101 movs r1, #1
8004e04: fa01 f202 lsl.w r2, r1, r2
8004e08: 4013 ands r3, r2
8004e0a: 2b00 cmp r3, #0
8004e0c: d0b7 beq.n 8004d7e <HAL_RCCEx_PeriphCLKConfig+0x116>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8004e0e: 4b5e ldr r3, [pc, #376] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e10: 6a1b ldr r3, [r3, #32]
8004e12: f423 7240 bic.w r2, r3, #768 ; 0x300
8004e16: 687b ldr r3, [r7, #4]
8004e18: 685b ldr r3, [r3, #4]
8004e1a: 495b ldr r1, [pc, #364] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e1c: 4313 orrs r3, r2
8004e1e: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
8004e20: f897 3047 ldrb.w r3, [r7, #71] ; 0x47
8004e24: 2b01 cmp r3, #1
8004e26: d105 bne.n 8004e34 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004e28: 4b57 ldr r3, [pc, #348] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e2a: 69db ldr r3, [r3, #28]
8004e2c: 4a56 ldr r2, [pc, #344] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e2e: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8004e32: 61d3 str r3, [r2, #28]
}
}
/*------------------------------- USART1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
8004e34: 687b ldr r3, [r7, #4]
8004e36: 681b ldr r3, [r3, #0]
8004e38: f003 0301 and.w r3, r3, #1
8004e3c: 2b00 cmp r3, #0
8004e3e: d008 beq.n 8004e52 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
{
/* Check the parameters */
assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
/* Configure the USART1 clock source */
__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
8004e40: 4b51 ldr r3, [pc, #324] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e42: 6b1b ldr r3, [r3, #48] ; 0x30
8004e44: f023 0203 bic.w r2, r3, #3
8004e48: 687b ldr r3, [r7, #4]
8004e4a: 689b ldr r3, [r3, #8]
8004e4c: 494e ldr r1, [pc, #312] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e4e: 4313 orrs r3, r2
8004e50: 630b str r3, [r1, #48] ; 0x30
}
#if defined(RCC_CFGR3_USART2SW)
/*----------------------------- USART2 Configuration --------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
8004e52: 687b ldr r3, [r7, #4]
8004e54: 681b ldr r3, [r3, #0]
8004e56: f003 0302 and.w r3, r3, #2
8004e5a: 2b00 cmp r3, #0
8004e5c: d008 beq.n 8004e70 <HAL_RCCEx_PeriphCLKConfig+0x208>
{
/* Check the parameters */
assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
/* Configure the USART2 clock source */
__HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
8004e5e: 4b4a ldr r3, [pc, #296] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e60: 6b1b ldr r3, [r3, #48] ; 0x30
8004e62: f423 3240 bic.w r2, r3, #196608 ; 0x30000
8004e66: 687b ldr r3, [r7, #4]
8004e68: 68db ldr r3, [r3, #12]
8004e6a: 4947 ldr r1, [pc, #284] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e6c: 4313 orrs r3, r2
8004e6e: 630b str r3, [r1, #48] ; 0x30
}
#endif /* RCC_CFGR3_USART2SW */
#if defined(RCC_CFGR3_USART3SW)
/*------------------------------ USART3 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
8004e70: 687b ldr r3, [r7, #4]
8004e72: 681b ldr r3, [r3, #0]
8004e74: f003 0304 and.w r3, r3, #4
8004e78: 2b00 cmp r3, #0
8004e7a: d008 beq.n 8004e8e <HAL_RCCEx_PeriphCLKConfig+0x226>
{
/* Check the parameters */
assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
/* Configure the USART3 clock source */
__HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
8004e7c: 4b42 ldr r3, [pc, #264] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e7e: 6b1b ldr r3, [r3, #48] ; 0x30
8004e80: f423 2240 bic.w r2, r3, #786432 ; 0xc0000
8004e84: 687b ldr r3, [r7, #4]
8004e86: 691b ldr r3, [r3, #16]
8004e88: 493f ldr r1, [pc, #252] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e8a: 4313 orrs r3, r2
8004e8c: 630b str r3, [r1, #48] ; 0x30
}
#endif /* RCC_CFGR3_USART3SW */
/*------------------------------ I2C1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
8004e8e: 687b ldr r3, [r7, #4]
8004e90: 681b ldr r3, [r3, #0]
8004e92: f003 0320 and.w r3, r3, #32
8004e96: 2b00 cmp r3, #0
8004e98: d008 beq.n 8004eac <HAL_RCCEx_PeriphCLKConfig+0x244>
{
/* Check the parameters */
assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
/* Configure the I2C1 clock source */
__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
8004e9a: 4b3b ldr r3, [pc, #236] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004e9c: 6b1b ldr r3, [r3, #48] ; 0x30
8004e9e: f023 0210 bic.w r2, r3, #16
8004ea2: 687b ldr r3, [r7, #4]
8004ea4: 69db ldr r3, [r3, #28]
8004ea6: 4938 ldr r1, [pc, #224] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004ea8: 4313 orrs r3, r2
8004eaa: 630b str r3, [r1, #48] ; 0x30
#if defined(STM32F302xE) || defined(STM32F303xE)\
|| defined(STM32F302xC) || defined(STM32F303xC)\
|| defined(STM32F302x8) \
|| defined(STM32F373xC)
/*------------------------------ USB Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8004eac: 687b ldr r3, [r7, #4]
8004eae: 681b ldr r3, [r3, #0]
8004eb0: f403 3300 and.w r3, r3, #131072 ; 0x20000
8004eb4: 2b00 cmp r3, #0
8004eb6: d008 beq.n 8004eca <HAL_RCCEx_PeriphCLKConfig+0x262>
{
/* Check the parameters */
assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->USBClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->USBClockSelection);
8004eb8: 4b33 ldr r3, [pc, #204] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004eba: 685b ldr r3, [r3, #4]
8004ebc: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
8004ec0: 687b ldr r3, [r7, #4]
8004ec2: 6b1b ldr r3, [r3, #48] ; 0x30
8004ec4: 4930 ldr r1, [pc, #192] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004ec6: 4313 orrs r3, r2
8004ec8: 604b str r3, [r1, #4]
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\
|| defined(STM32F373xC) || defined(STM32F378xx)
/*------------------------------ I2C2 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
8004eca: 687b ldr r3, [r7, #4]
8004ecc: 681b ldr r3, [r3, #0]
8004ece: f003 0340 and.w r3, r3, #64 ; 0x40
8004ed2: 2b00 cmp r3, #0
8004ed4: d008 beq.n 8004ee8 <HAL_RCCEx_PeriphCLKConfig+0x280>
{
/* Check the parameters */
assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
/* Configure the I2C2 clock source */
__HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
8004ed6: 4b2c ldr r3, [pc, #176] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004ed8: 6b1b ldr r3, [r3, #48] ; 0x30
8004eda: f023 0220 bic.w r2, r3, #32
8004ede: 687b ldr r3, [r7, #4]
8004ee0: 6a1b ldr r3, [r3, #32]
8004ee2: 4929 ldr r1, [pc, #164] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004ee4: 4313 orrs r3, r2
8004ee6: 630b str r3, [r1, #48] ; 0x30
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
/*------------------------------ UART4 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
8004ee8: 687b ldr r3, [r7, #4]
8004eea: 681b ldr r3, [r3, #0]
8004eec: f003 0308 and.w r3, r3, #8
8004ef0: 2b00 cmp r3, #0
8004ef2: d008 beq.n 8004f06 <HAL_RCCEx_PeriphCLKConfig+0x29e>
{
/* Check the parameters */
assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
/* Configure the UART4 clock source */
__HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
8004ef4: 4b24 ldr r3, [pc, #144] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004ef6: 6b1b ldr r3, [r3, #48] ; 0x30
8004ef8: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
8004efc: 687b ldr r3, [r7, #4]
8004efe: 695b ldr r3, [r3, #20]
8004f00: 4921 ldr r1, [pc, #132] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f02: 4313 orrs r3, r2
8004f04: 630b str r3, [r1, #48] ; 0x30
}
/*------------------------------ UART5 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
8004f06: 687b ldr r3, [r7, #4]
8004f08: 681b ldr r3, [r3, #0]
8004f0a: f003 0310 and.w r3, r3, #16
8004f0e: 2b00 cmp r3, #0
8004f10: d008 beq.n 8004f24 <HAL_RCCEx_PeriphCLKConfig+0x2bc>
{
/* Check the parameters */
assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
/* Configure the UART5 clock source */
__HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
8004f12: 4b1d ldr r3, [pc, #116] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f14: 6b1b ldr r3, [r3, #48] ; 0x30
8004f16: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000
8004f1a: 687b ldr r3, [r7, #4]
8004f1c: 699b ldr r3, [r3, #24]
8004f1e: 491a ldr r1, [pc, #104] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f20: 4313 orrs r3, r2
8004f22: 630b str r3, [r1, #48] ; 0x30
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
/*------------------------------ I2S Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S)
8004f24: 687b ldr r3, [r7, #4]
8004f26: 681b ldr r3, [r3, #0]
8004f28: f403 7300 and.w r3, r3, #512 ; 0x200
8004f2c: 2b00 cmp r3, #0
8004f2e: d008 beq.n 8004f42 <HAL_RCCEx_PeriphCLKConfig+0x2da>
{
/* Check the parameters */
assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
/* Configure the I2S clock source */
__HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
8004f30: 4b15 ldr r3, [pc, #84] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f32: 685b ldr r3, [r3, #4]
8004f34: f423 0200 bic.w r2, r3, #8388608 ; 0x800000
8004f38: 687b ldr r3, [r7, #4]
8004f3a: 6a9b ldr r3, [r3, #40] ; 0x28
8004f3c: 4912 ldr r1, [pc, #72] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f3e: 4313 orrs r3, r2
8004f40: 604b str r3, [r1, #4]
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|| defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
/*------------------------------ ADC1 & ADC2 clock Configuration -------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC12) == RCC_PERIPHCLK_ADC12)
8004f42: 687b ldr r3, [r7, #4]
8004f44: 681b ldr r3, [r3, #0]
8004f46: f003 0380 and.w r3, r3, #128 ; 0x80
8004f4a: 2b00 cmp r3, #0
8004f4c: d008 beq.n 8004f60 <HAL_RCCEx_PeriphCLKConfig+0x2f8>
{
/* Check the parameters */
assert_param(IS_RCC_ADC12PLLCLK_DIV(PeriphClkInit->Adc12ClockSelection));
/* Configure the ADC12 clock source */
__HAL_RCC_ADC12_CONFIG(PeriphClkInit->Adc12ClockSelection);
8004f4e: 4b0e ldr r3, [pc, #56] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f50: 6adb ldr r3, [r3, #44] ; 0x2c
8004f52: f423 72f8 bic.w r2, r3, #496 ; 0x1f0
8004f56: 687b ldr r3, [r7, #4]
8004f58: 6a5b ldr r3, [r3, #36] ; 0x24
8004f5a: 490b ldr r1, [pc, #44] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f5c: 4313 orrs r3, r2
8004f5e: 62cb str r3, [r1, #44] ; 0x2c
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|| defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
/*------------------------------ TIM1 clock Configuration ----------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM1) == RCC_PERIPHCLK_TIM1)
8004f60: 687b ldr r3, [r7, #4]
8004f62: 681b ldr r3, [r3, #0]
8004f64: f403 5380 and.w r3, r3, #4096 ; 0x1000
8004f68: 2b00 cmp r3, #0
8004f6a: d008 beq.n 8004f7e <HAL_RCCEx_PeriphCLKConfig+0x316>
{
/* Check the parameters */
assert_param(IS_RCC_TIM1CLKSOURCE(PeriphClkInit->Tim1ClockSelection));
/* Configure the TIM1 clock source */
__HAL_RCC_TIM1_CONFIG(PeriphClkInit->Tim1ClockSelection);
8004f6c: 4b06 ldr r3, [pc, #24] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f6e: 6b1b ldr r3, [r3, #48] ; 0x30
8004f70: f423 7280 bic.w r2, r3, #256 ; 0x100
8004f74: 687b ldr r3, [r7, #4]
8004f76: 6adb ldr r3, [r3, #44] ; 0x2c
8004f78: 4903 ldr r1, [pc, #12] ; (8004f88 <HAL_RCCEx_PeriphCLKConfig+0x320>)
8004f7a: 4313 orrs r3, r2
8004f7c: 630b str r3, [r1, #48] ; 0x30
__HAL_RCC_TIM20_CONFIG(PeriphClkInit->Tim20ClockSelection);
}
#endif /* STM32F303xE || STM32F398xx */
return HAL_OK;
8004f7e: 2300 movs r3, #0
}
8004f80: 4618 mov r0, r3
8004f82: 3748 adds r7, #72 ; 0x48
8004f84: 46bd mov sp, r7
8004f86: bd80 pop {r7, pc}
8004f88: 40021000 .word 0x40021000
08004f8c <HAL_UART_Init>:
* parameters in the UART_InitTypeDef and initialize the associated handle.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8004f8c: b580 push {r7, lr}
8004f8e: b082 sub sp, #8
8004f90: af00 add r7, sp, #0
8004f92: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8004f94: 687b ldr r3, [r7, #4]
8004f96: 2b00 cmp r3, #0
8004f98: d101 bne.n 8004f9e <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8004f9a: 2301 movs r3, #1
8004f9c: e040 b.n 8005020 <HAL_UART_Init+0x94>
{
/* Check the parameters */
assert_param(IS_UART_INSTANCE(huart->Instance));
}
if (huart->gState == HAL_UART_STATE_RESET)
8004f9e: 687b ldr r3, [r7, #4]
8004fa0: 6f9b ldr r3, [r3, #120] ; 0x78
8004fa2: 2b00 cmp r3, #0
8004fa4: d106 bne.n 8004fb4 <HAL_UART_Init+0x28>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8004fa6: 687b ldr r3, [r7, #4]
8004fa8: 2200 movs r2, #0
8004faa: f883 2074 strb.w r2, [r3, #116] ; 0x74
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8004fae: 6878 ldr r0, [r7, #4]
8004fb0: f7fb fcd2 bl 8000958 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8004fb4: 687b ldr r3, [r7, #4]
8004fb6: 2224 movs r2, #36 ; 0x24
8004fb8: 679a str r2, [r3, #120] ; 0x78
__HAL_UART_DISABLE(huart);
8004fba: 687b ldr r3, [r7, #4]
8004fbc: 681b ldr r3, [r3, #0]
8004fbe: 681a ldr r2, [r3, #0]
8004fc0: 687b ldr r3, [r7, #4]
8004fc2: 681b ldr r3, [r3, #0]
8004fc4: f022 0201 bic.w r2, r2, #1
8004fc8: 601a str r2, [r3, #0]
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
8004fca: 6878 ldr r0, [r7, #4]
8004fcc: f000 f82c bl 8005028 <UART_SetConfig>
8004fd0: 4603 mov r3, r0
8004fd2: 2b01 cmp r3, #1
8004fd4: d101 bne.n 8004fda <HAL_UART_Init+0x4e>
{
return HAL_ERROR;
8004fd6: 2301 movs r3, #1
8004fd8: e022 b.n 8005020 <HAL_UART_Init+0x94>
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
8004fda: 687b ldr r3, [r7, #4]
8004fdc: 6a5b ldr r3, [r3, #36] ; 0x24
8004fde: 2b00 cmp r3, #0
8004fe0: d002 beq.n 8004fe8 <HAL_UART_Init+0x5c>
{
UART_AdvFeatureConfig(huart);
8004fe2: 6878 ldr r0, [r7, #4]
8004fe4: f000 f9f6 bl 80053d4 <UART_AdvFeatureConfig>
}
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8004fe8: 687b ldr r3, [r7, #4]
8004fea: 681b ldr r3, [r3, #0]
8004fec: 685a ldr r2, [r3, #4]
8004fee: 687b ldr r3, [r7, #4]
8004ff0: 681b ldr r3, [r3, #0]
8004ff2: f422 4290 bic.w r2, r2, #18432 ; 0x4800
8004ff6: 605a str r2, [r3, #4]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8004ff8: 687b ldr r3, [r7, #4]
8004ffa: 681b ldr r3, [r3, #0]
8004ffc: 689a ldr r2, [r3, #8]
8004ffe: 687b ldr r3, [r7, #4]
8005000: 681b ldr r3, [r3, #0]
8005002: f022 022a bic.w r2, r2, #42 ; 0x2a
8005006: 609a str r2, [r3, #8]
__HAL_UART_ENABLE(huart);
8005008: 687b ldr r3, [r7, #4]
800500a: 681b ldr r3, [r3, #0]
800500c: 681a ldr r2, [r3, #0]
800500e: 687b ldr r3, [r7, #4]
8005010: 681b ldr r3, [r3, #0]
8005012: f042 0201 orr.w r2, r2, #1
8005016: 601a str r2, [r3, #0]
/* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
return (UART_CheckIdleState(huart));
8005018: 6878 ldr r0, [r7, #4]
800501a: f000 fa7d bl 8005518 <UART_CheckIdleState>
800501e: 4603 mov r3, r0
}
8005020: 4618 mov r0, r3
8005022: 3708 adds r7, #8
8005024: 46bd mov sp, r7
8005026: bd80 pop {r7, pc}
08005028 <UART_SetConfig>:
* @brief Configure the UART peripheral.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
8005028: b580 push {r7, lr}
800502a: b088 sub sp, #32
800502c: af00 add r7, sp, #0
800502e: 6078 str r0, [r7, #4]
uint32_t tmpreg;
uint16_t brrtemp;
UART_ClockSourceTypeDef clocksource;
uint32_t usartdiv;
HAL_StatusTypeDef ret = HAL_OK;
8005030: 2300 movs r3, #0
8005032: 77bb strb r3, [r7, #30]
* the UART Word Length, Parity, Mode and oversampling:
* set the M bits according to huart->Init.WordLength value
* set PCE and PS bits according to huart->Init.Parity value
* set TE and RE bits according to huart->Init.Mode value
* set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
8005034: 687b ldr r3, [r7, #4]
8005036: 689a ldr r2, [r3, #8]
8005038: 687b ldr r3, [r7, #4]
800503a: 691b ldr r3, [r3, #16]
800503c: 431a orrs r2, r3
800503e: 687b ldr r3, [r7, #4]
8005040: 695b ldr r3, [r3, #20]
8005042: 431a orrs r2, r3
8005044: 687b ldr r3, [r7, #4]
8005046: 69db ldr r3, [r3, #28]
8005048: 4313 orrs r3, r2
800504a: 617b str r3, [r7, #20]
MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
800504c: 687b ldr r3, [r7, #4]
800504e: 681b ldr r3, [r3, #0]
8005050: 681b ldr r3, [r3, #0]
8005052: f423 4316 bic.w r3, r3, #38400 ; 0x9600
8005056: f023 030c bic.w r3, r3, #12
800505a: 687a ldr r2, [r7, #4]
800505c: 6812 ldr r2, [r2, #0]
800505e: 6979 ldr r1, [r7, #20]
8005060: 430b orrs r3, r1
8005062: 6013 str r3, [r2, #0]
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits according
* to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8005064: 687b ldr r3, [r7, #4]
8005066: 681b ldr r3, [r3, #0]
8005068: 685b ldr r3, [r3, #4]
800506a: f423 5140 bic.w r1, r3, #12288 ; 0x3000
800506e: 687b ldr r3, [r7, #4]
8005070: 68da ldr r2, [r3, #12]
8005072: 687b ldr r3, [r7, #4]
8005074: 681b ldr r3, [r3, #0]
8005076: 430a orrs r2, r1
8005078: 605a str r2, [r3, #4]
/* Configure
* - UART HardWare Flow Control: set CTSE and RTSE bits according
* to huart->Init.HwFlowCtl value
* - one-bit sampling method versus three samples' majority rule according
* to huart->Init.OneBitSampling (not applicable to LPUART) */
tmpreg = (uint32_t)huart->Init.HwFlowCtl;
800507a: 687b ldr r3, [r7, #4]
800507c: 699b ldr r3, [r3, #24]
800507e: 617b str r3, [r7, #20]
tmpreg |= huart->Init.OneBitSampling;
8005080: 687b ldr r3, [r7, #4]
8005082: 6a1b ldr r3, [r3, #32]
8005084: 697a ldr r2, [r7, #20]
8005086: 4313 orrs r3, r2
8005088: 617b str r3, [r7, #20]
MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
800508a: 687b ldr r3, [r7, #4]
800508c: 681b ldr r3, [r3, #0]
800508e: 689b ldr r3, [r3, #8]
8005090: f423 6130 bic.w r1, r3, #2816 ; 0xb00
8005094: 687b ldr r3, [r7, #4]
8005096: 681b ldr r3, [r3, #0]
8005098: 697a ldr r2, [r7, #20]
800509a: 430a orrs r2, r1
800509c: 609a str r2, [r3, #8]
/*-------------------------- USART BRR Configuration -----------------------*/
UART_GETCLOCKSOURCE(huart, clocksource);
800509e: 687b ldr r3, [r7, #4]
80050a0: 681b ldr r3, [r3, #0]
80050a2: 4aa8 ldr r2, [pc, #672] ; (8005344 <UART_SetConfig+0x31c>)
80050a4: 4293 cmp r3, r2
80050a6: d120 bne.n 80050ea <UART_SetConfig+0xc2>
80050a8: 4ba7 ldr r3, [pc, #668] ; (8005348 <UART_SetConfig+0x320>)
80050aa: 6b1b ldr r3, [r3, #48] ; 0x30
80050ac: f003 0303 and.w r3, r3, #3
80050b0: 2b03 cmp r3, #3
80050b2: d817 bhi.n 80050e4 <UART_SetConfig+0xbc>
80050b4: a201 add r2, pc, #4 ; (adr r2, 80050bc <UART_SetConfig+0x94>)
80050b6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80050ba: bf00 nop
80050bc: 080050cd .word 0x080050cd
80050c0: 080050d9 .word 0x080050d9
80050c4: 080050df .word 0x080050df
80050c8: 080050d3 .word 0x080050d3
80050cc: 2301 movs r3, #1
80050ce: 77fb strb r3, [r7, #31]
80050d0: e0b5 b.n 800523e <UART_SetConfig+0x216>
80050d2: 2302 movs r3, #2
80050d4: 77fb strb r3, [r7, #31]
80050d6: e0b2 b.n 800523e <UART_SetConfig+0x216>
80050d8: 2304 movs r3, #4
80050da: 77fb strb r3, [r7, #31]
80050dc: e0af b.n 800523e <UART_SetConfig+0x216>
80050de: 2308 movs r3, #8
80050e0: 77fb strb r3, [r7, #31]
80050e2: e0ac b.n 800523e <UART_SetConfig+0x216>
80050e4: 2310 movs r3, #16
80050e6: 77fb strb r3, [r7, #31]
80050e8: e0a9 b.n 800523e <UART_SetConfig+0x216>
80050ea: 687b ldr r3, [r7, #4]
80050ec: 681b ldr r3, [r3, #0]
80050ee: 4a97 ldr r2, [pc, #604] ; (800534c <UART_SetConfig+0x324>)
80050f0: 4293 cmp r3, r2
80050f2: d124 bne.n 800513e <UART_SetConfig+0x116>
80050f4: 4b94 ldr r3, [pc, #592] ; (8005348 <UART_SetConfig+0x320>)
80050f6: 6b1b ldr r3, [r3, #48] ; 0x30
80050f8: f403 3340 and.w r3, r3, #196608 ; 0x30000
80050fc: f5b3 3f40 cmp.w r3, #196608 ; 0x30000
8005100: d011 beq.n 8005126 <UART_SetConfig+0xfe>
8005102: f5b3 3f40 cmp.w r3, #196608 ; 0x30000
8005106: d817 bhi.n 8005138 <UART_SetConfig+0x110>
8005108: f5b3 3f00 cmp.w r3, #131072 ; 0x20000
800510c: d011 beq.n 8005132 <UART_SetConfig+0x10a>
800510e: f5b3 3f00 cmp.w r3, #131072 ; 0x20000
8005112: d811 bhi.n 8005138 <UART_SetConfig+0x110>
8005114: 2b00 cmp r3, #0
8005116: d003 beq.n 8005120 <UART_SetConfig+0xf8>
8005118: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
800511c: d006 beq.n 800512c <UART_SetConfig+0x104>
800511e: e00b b.n 8005138 <UART_SetConfig+0x110>
8005120: 2300 movs r3, #0
8005122: 77fb strb r3, [r7, #31]
8005124: e08b b.n 800523e <UART_SetConfig+0x216>
8005126: 2302 movs r3, #2
8005128: 77fb strb r3, [r7, #31]
800512a: e088 b.n 800523e <UART_SetConfig+0x216>
800512c: 2304 movs r3, #4
800512e: 77fb strb r3, [r7, #31]
8005130: e085 b.n 800523e <UART_SetConfig+0x216>
8005132: 2308 movs r3, #8
8005134: 77fb strb r3, [r7, #31]
8005136: e082 b.n 800523e <UART_SetConfig+0x216>
8005138: 2310 movs r3, #16
800513a: 77fb strb r3, [r7, #31]
800513c: e07f b.n 800523e <UART_SetConfig+0x216>
800513e: 687b ldr r3, [r7, #4]
8005140: 681b ldr r3, [r3, #0]
8005142: 4a83 ldr r2, [pc, #524] ; (8005350 <UART_SetConfig+0x328>)
8005144: 4293 cmp r3, r2
8005146: d124 bne.n 8005192 <UART_SetConfig+0x16a>
8005148: 4b7f ldr r3, [pc, #508] ; (8005348 <UART_SetConfig+0x320>)
800514a: 6b1b ldr r3, [r3, #48] ; 0x30
800514c: f403 2340 and.w r3, r3, #786432 ; 0xc0000
8005150: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000
8005154: d011 beq.n 800517a <UART_SetConfig+0x152>
8005156: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000
800515a: d817 bhi.n 800518c <UART_SetConfig+0x164>
800515c: f5b3 2f00 cmp.w r3, #524288 ; 0x80000
8005160: d011 beq.n 8005186 <UART_SetConfig+0x15e>
8005162: f5b3 2f00 cmp.w r3, #524288 ; 0x80000
8005166: d811 bhi.n 800518c <UART_SetConfig+0x164>
8005168: 2b00 cmp r3, #0
800516a: d003 beq.n 8005174 <UART_SetConfig+0x14c>
800516c: f5b3 2f80 cmp.w r3, #262144 ; 0x40000
8005170: d006 beq.n 8005180 <UART_SetConfig+0x158>
8005172: e00b b.n 800518c <UART_SetConfig+0x164>
8005174: 2300 movs r3, #0
8005176: 77fb strb r3, [r7, #31]
8005178: e061 b.n 800523e <UART_SetConfig+0x216>
800517a: 2302 movs r3, #2
800517c: 77fb strb r3, [r7, #31]
800517e: e05e b.n 800523e <UART_SetConfig+0x216>
8005180: 2304 movs r3, #4
8005182: 77fb strb r3, [r7, #31]
8005184: e05b b.n 800523e <UART_SetConfig+0x216>
8005186: 2308 movs r3, #8
8005188: 77fb strb r3, [r7, #31]
800518a: e058 b.n 800523e <UART_SetConfig+0x216>
800518c: 2310 movs r3, #16
800518e: 77fb strb r3, [r7, #31]
8005190: e055 b.n 800523e <UART_SetConfig+0x216>
8005192: 687b ldr r3, [r7, #4]
8005194: 681b ldr r3, [r3, #0]
8005196: 4a6f ldr r2, [pc, #444] ; (8005354 <UART_SetConfig+0x32c>)
8005198: 4293 cmp r3, r2
800519a: d124 bne.n 80051e6 <UART_SetConfig+0x1be>
800519c: 4b6a ldr r3, [pc, #424] ; (8005348 <UART_SetConfig+0x320>)
800519e: 6b1b ldr r3, [r3, #48] ; 0x30
80051a0: f403 1340 and.w r3, r3, #3145728 ; 0x300000
80051a4: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000
80051a8: d011 beq.n 80051ce <UART_SetConfig+0x1a6>
80051aa: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000
80051ae: d817 bhi.n 80051e0 <UART_SetConfig+0x1b8>
80051b0: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000
80051b4: d011 beq.n 80051da <UART_SetConfig+0x1b2>
80051b6: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000
80051ba: d811 bhi.n 80051e0 <UART_SetConfig+0x1b8>
80051bc: 2b00 cmp r3, #0
80051be: d003 beq.n 80051c8 <UART_SetConfig+0x1a0>
80051c0: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
80051c4: d006 beq.n 80051d4 <UART_SetConfig+0x1ac>
80051c6: e00b b.n 80051e0 <UART_SetConfig+0x1b8>
80051c8: 2300 movs r3, #0
80051ca: 77fb strb r3, [r7, #31]
80051cc: e037 b.n 800523e <UART_SetConfig+0x216>
80051ce: 2302 movs r3, #2
80051d0: 77fb strb r3, [r7, #31]
80051d2: e034 b.n 800523e <UART_SetConfig+0x216>
80051d4: 2304 movs r3, #4
80051d6: 77fb strb r3, [r7, #31]
80051d8: e031 b.n 800523e <UART_SetConfig+0x216>
80051da: 2308 movs r3, #8
80051dc: 77fb strb r3, [r7, #31]
80051de: e02e b.n 800523e <UART_SetConfig+0x216>
80051e0: 2310 movs r3, #16
80051e2: 77fb strb r3, [r7, #31]
80051e4: e02b b.n 800523e <UART_SetConfig+0x216>
80051e6: 687b ldr r3, [r7, #4]
80051e8: 681b ldr r3, [r3, #0]
80051ea: 4a5b ldr r2, [pc, #364] ; (8005358 <UART_SetConfig+0x330>)
80051ec: 4293 cmp r3, r2
80051ee: d124 bne.n 800523a <UART_SetConfig+0x212>
80051f0: 4b55 ldr r3, [pc, #340] ; (8005348 <UART_SetConfig+0x320>)
80051f2: 6b1b ldr r3, [r3, #48] ; 0x30
80051f4: f403 0340 and.w r3, r3, #12582912 ; 0xc00000
80051f8: f5b3 0f40 cmp.w r3, #12582912 ; 0xc00000
80051fc: d011 beq.n 8005222 <UART_SetConfig+0x1fa>
80051fe: f5b3 0f40 cmp.w r3, #12582912 ; 0xc00000
8005202: d817 bhi.n 8005234 <UART_SetConfig+0x20c>
8005204: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000
8005208: d011 beq.n 800522e <UART_SetConfig+0x206>
800520a: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000
800520e: d811 bhi.n 8005234 <UART_SetConfig+0x20c>
8005210: 2b00 cmp r3, #0
8005212: d003 beq.n 800521c <UART_SetConfig+0x1f4>
8005214: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
8005218: d006 beq.n 8005228 <UART_SetConfig+0x200>
800521a: e00b b.n 8005234 <UART_SetConfig+0x20c>
800521c: 2300 movs r3, #0
800521e: 77fb strb r3, [r7, #31]
8005220: e00d b.n 800523e <UART_SetConfig+0x216>
8005222: 2302 movs r3, #2
8005224: 77fb strb r3, [r7, #31]
8005226: e00a b.n 800523e <UART_SetConfig+0x216>
8005228: 2304 movs r3, #4
800522a: 77fb strb r3, [r7, #31]
800522c: e007 b.n 800523e <UART_SetConfig+0x216>
800522e: 2308 movs r3, #8
8005230: 77fb strb r3, [r7, #31]
8005232: e004 b.n 800523e <UART_SetConfig+0x216>
8005234: 2310 movs r3, #16
8005236: 77fb strb r3, [r7, #31]
8005238: e001 b.n 800523e <UART_SetConfig+0x216>
800523a: 2310 movs r3, #16
800523c: 77fb strb r3, [r7, #31]
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
800523e: 687b ldr r3, [r7, #4]
8005240: 69db ldr r3, [r3, #28]
8005242: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8005246: d15c bne.n 8005302 <UART_SetConfig+0x2da>
{
switch (clocksource)
8005248: 7ffb ldrb r3, [r7, #31]
800524a: 2b08 cmp r3, #8
800524c: d827 bhi.n 800529e <UART_SetConfig+0x276>
800524e: a201 add r2, pc, #4 ; (adr r2, 8005254 <UART_SetConfig+0x22c>)
8005250: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005254: 08005279 .word 0x08005279
8005258: 08005281 .word 0x08005281
800525c: 08005289 .word 0x08005289
8005260: 0800529f .word 0x0800529f
8005264: 0800528f .word 0x0800528f
8005268: 0800529f .word 0x0800529f
800526c: 0800529f .word 0x0800529f
8005270: 0800529f .word 0x0800529f
8005274: 08005297 .word 0x08005297
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
8005278: f7ff fcb2 bl 8004be0 <HAL_RCC_GetPCLK1Freq>
800527c: 61b8 str r0, [r7, #24]
break;
800527e: e013 b.n 80052a8 <UART_SetConfig+0x280>
case UART_CLOCKSOURCE_PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
8005280: f7ff fcd0 bl 8004c24 <HAL_RCC_GetPCLK2Freq>
8005284: 61b8 str r0, [r7, #24]
break;
8005286: e00f b.n 80052a8 <UART_SetConfig+0x280>
case UART_CLOCKSOURCE_HSI:
pclk = (uint32_t) HSI_VALUE;
8005288: 4b34 ldr r3, [pc, #208] ; (800535c <UART_SetConfig+0x334>)
800528a: 61bb str r3, [r7, #24]
break;
800528c: e00c b.n 80052a8 <UART_SetConfig+0x280>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
800528e: f7ff fc2f bl 8004af0 <HAL_RCC_GetSysClockFreq>
8005292: 61b8 str r0, [r7, #24]
break;
8005294: e008 b.n 80052a8 <UART_SetConfig+0x280>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
8005296: f44f 4300 mov.w r3, #32768 ; 0x8000
800529a: 61bb str r3, [r7, #24]
break;
800529c: e004 b.n 80052a8 <UART_SetConfig+0x280>
default:
pclk = 0U;
800529e: 2300 movs r3, #0
80052a0: 61bb str r3, [r7, #24]
ret = HAL_ERROR;
80052a2: 2301 movs r3, #1
80052a4: 77bb strb r3, [r7, #30]
break;
80052a6: bf00 nop
}
/* USARTDIV must be greater than or equal to 0d16 */
if (pclk != 0U)
80052a8: 69bb ldr r3, [r7, #24]
80052aa: 2b00 cmp r3, #0
80052ac: f000 8084 beq.w 80053b8 <UART_SetConfig+0x390>
{
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
80052b0: 69bb ldr r3, [r7, #24]
80052b2: 005a lsls r2, r3, #1
80052b4: 687b ldr r3, [r7, #4]
80052b6: 685b ldr r3, [r3, #4]
80052b8: 085b lsrs r3, r3, #1
80052ba: 441a add r2, r3
80052bc: 687b ldr r3, [r7, #4]
80052be: 685b ldr r3, [r3, #4]
80052c0: fbb2 f3f3 udiv r3, r2, r3
80052c4: b29b uxth r3, r3
80052c6: 613b str r3, [r7, #16]
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
80052c8: 693b ldr r3, [r7, #16]
80052ca: 2b0f cmp r3, #15
80052cc: d916 bls.n 80052fc <UART_SetConfig+0x2d4>
80052ce: 693b ldr r3, [r7, #16]
80052d0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
80052d4: d212 bcs.n 80052fc <UART_SetConfig+0x2d4>
{
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
80052d6: 693b ldr r3, [r7, #16]
80052d8: b29b uxth r3, r3
80052da: f023 030f bic.w r3, r3, #15
80052de: 81fb strh r3, [r7, #14]
brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
80052e0: 693b ldr r3, [r7, #16]
80052e2: 085b lsrs r3, r3, #1
80052e4: b29b uxth r3, r3
80052e6: f003 0307 and.w r3, r3, #7
80052ea: b29a uxth r2, r3
80052ec: 89fb ldrh r3, [r7, #14]
80052ee: 4313 orrs r3, r2
80052f0: 81fb strh r3, [r7, #14]
huart->Instance->BRR = brrtemp;
80052f2: 687b ldr r3, [r7, #4]
80052f4: 681b ldr r3, [r3, #0]
80052f6: 89fa ldrh r2, [r7, #14]
80052f8: 60da str r2, [r3, #12]
80052fa: e05d b.n 80053b8 <UART_SetConfig+0x390>
}
else
{
ret = HAL_ERROR;
80052fc: 2301 movs r3, #1
80052fe: 77bb strb r3, [r7, #30]
8005300: e05a b.n 80053b8 <UART_SetConfig+0x390>
}
}
}
else
{
switch (clocksource)
8005302: 7ffb ldrb r3, [r7, #31]
8005304: 2b08 cmp r3, #8
8005306: d836 bhi.n 8005376 <UART_SetConfig+0x34e>
8005308: a201 add r2, pc, #4 ; (adr r2, 8005310 <UART_SetConfig+0x2e8>)
800530a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800530e: bf00 nop
8005310: 08005335 .word 0x08005335
8005314: 0800533d .word 0x0800533d
8005318: 08005361 .word 0x08005361
800531c: 08005377 .word 0x08005377
8005320: 08005367 .word 0x08005367
8005324: 08005377 .word 0x08005377
8005328: 08005377 .word 0x08005377
800532c: 08005377 .word 0x08005377
8005330: 0800536f .word 0x0800536f
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
8005334: f7ff fc54 bl 8004be0 <HAL_RCC_GetPCLK1Freq>
8005338: 61b8 str r0, [r7, #24]
break;
800533a: e021 b.n 8005380 <UART_SetConfig+0x358>
case UART_CLOCKSOURCE_PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
800533c: f7ff fc72 bl 8004c24 <HAL_RCC_GetPCLK2Freq>
8005340: 61b8 str r0, [r7, #24]
break;
8005342: e01d b.n 8005380 <UART_SetConfig+0x358>
8005344: 40013800 .word 0x40013800
8005348: 40021000 .word 0x40021000
800534c: 40004400 .word 0x40004400
8005350: 40004800 .word 0x40004800
8005354: 40004c00 .word 0x40004c00
8005358: 40005000 .word 0x40005000
800535c: 007a1200 .word 0x007a1200
case UART_CLOCKSOURCE_HSI:
pclk = (uint32_t) HSI_VALUE;
8005360: 4b1b ldr r3, [pc, #108] ; (80053d0 <UART_SetConfig+0x3a8>)
8005362: 61bb str r3, [r7, #24]
break;
8005364: e00c b.n 8005380 <UART_SetConfig+0x358>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
8005366: f7ff fbc3 bl 8004af0 <HAL_RCC_GetSysClockFreq>
800536a: 61b8 str r0, [r7, #24]
break;
800536c: e008 b.n 8005380 <UART_SetConfig+0x358>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
800536e: f44f 4300 mov.w r3, #32768 ; 0x8000
8005372: 61bb str r3, [r7, #24]
break;
8005374: e004 b.n 8005380 <UART_SetConfig+0x358>
default:
pclk = 0U;
8005376: 2300 movs r3, #0
8005378: 61bb str r3, [r7, #24]
ret = HAL_ERROR;
800537a: 2301 movs r3, #1
800537c: 77bb strb r3, [r7, #30]
break;
800537e: bf00 nop
}
if (pclk != 0U)
8005380: 69bb ldr r3, [r7, #24]
8005382: 2b00 cmp r3, #0
8005384: d018 beq.n 80053b8 <UART_SetConfig+0x390>
{
/* USARTDIV must be greater than or equal to 0d16 */
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
8005386: 687b ldr r3, [r7, #4]
8005388: 685b ldr r3, [r3, #4]
800538a: 085a lsrs r2, r3, #1
800538c: 69bb ldr r3, [r7, #24]
800538e: 441a add r2, r3
8005390: 687b ldr r3, [r7, #4]
8005392: 685b ldr r3, [r3, #4]
8005394: fbb2 f3f3 udiv r3, r2, r3
8005398: b29b uxth r3, r3
800539a: 613b str r3, [r7, #16]
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
800539c: 693b ldr r3, [r7, #16]
800539e: 2b0f cmp r3, #15
80053a0: d908 bls.n 80053b4 <UART_SetConfig+0x38c>
80053a2: 693b ldr r3, [r7, #16]
80053a4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
80053a8: d204 bcs.n 80053b4 <UART_SetConfig+0x38c>
{
huart->Instance->BRR = usartdiv;
80053aa: 687b ldr r3, [r7, #4]
80053ac: 681b ldr r3, [r3, #0]
80053ae: 693a ldr r2, [r7, #16]
80053b0: 60da str r2, [r3, #12]
80053b2: e001 b.n 80053b8 <UART_SetConfig+0x390>
}
else
{
ret = HAL_ERROR;
80053b4: 2301 movs r3, #1
80053b6: 77bb strb r3, [r7, #30]
}
}
/* Clear ISR function pointers */
huart->RxISR = NULL;
80053b8: 687b ldr r3, [r7, #4]
80053ba: 2200 movs r2, #0
80053bc: 665a str r2, [r3, #100] ; 0x64
huart->TxISR = NULL;
80053be: 687b ldr r3, [r7, #4]
80053c0: 2200 movs r2, #0
80053c2: 669a str r2, [r3, #104] ; 0x68
return ret;
80053c4: 7fbb ldrb r3, [r7, #30]
}
80053c6: 4618 mov r0, r3
80053c8: 3720 adds r7, #32
80053ca: 46bd mov sp, r7
80053cc: bd80 pop {r7, pc}
80053ce: bf00 nop
80053d0: 007a1200 .word 0x007a1200
080053d4 <UART_AdvFeatureConfig>:
* @brief Configure the UART peripheral advanced features.
* @param huart UART handle.
* @retval None
*/
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
80053d4: b480 push {r7}
80053d6: b083 sub sp, #12
80053d8: af00 add r7, sp, #0
80053da: 6078 str r0, [r7, #4]
/* Check whether the set of advanced features to configure is properly set */
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
/* if required, configure TX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
80053dc: 687b ldr r3, [r7, #4]
80053de: 6a5b ldr r3, [r3, #36] ; 0x24
80053e0: f003 0301 and.w r3, r3, #1
80053e4: 2b00 cmp r3, #0
80053e6: d00a beq.n 80053fe <UART_AdvFeatureConfig+0x2a>
{
assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
80053e8: 687b ldr r3, [r7, #4]
80053ea: 681b ldr r3, [r3, #0]
80053ec: 685b ldr r3, [r3, #4]
80053ee: f423 3100 bic.w r1, r3, #131072 ; 0x20000
80053f2: 687b ldr r3, [r7, #4]
80053f4: 6a9a ldr r2, [r3, #40] ; 0x28
80053f6: 687b ldr r3, [r7, #4]
80053f8: 681b ldr r3, [r3, #0]
80053fa: 430a orrs r2, r1
80053fc: 605a str r2, [r3, #4]
}
/* if required, configure RX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
80053fe: 687b ldr r3, [r7, #4]
8005400: 6a5b ldr r3, [r3, #36] ; 0x24
8005402: f003 0302 and.w r3, r3, #2
8005406: 2b00 cmp r3, #0
8005408: d00a beq.n 8005420 <UART_AdvFeatureConfig+0x4c>
{
assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
800540a: 687b ldr r3, [r7, #4]
800540c: 681b ldr r3, [r3, #0]
800540e: 685b ldr r3, [r3, #4]
8005410: f423 3180 bic.w r1, r3, #65536 ; 0x10000
8005414: 687b ldr r3, [r7, #4]
8005416: 6ada ldr r2, [r3, #44] ; 0x2c
8005418: 687b ldr r3, [r7, #4]
800541a: 681b ldr r3, [r3, #0]
800541c: 430a orrs r2, r1
800541e: 605a str r2, [r3, #4]
}
/* if required, configure data inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
8005420: 687b ldr r3, [r7, #4]
8005422: 6a5b ldr r3, [r3, #36] ; 0x24
8005424: f003 0304 and.w r3, r3, #4
8005428: 2b00 cmp r3, #0
800542a: d00a beq.n 8005442 <UART_AdvFeatureConfig+0x6e>
{
assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
800542c: 687b ldr r3, [r7, #4]
800542e: 681b ldr r3, [r3, #0]
8005430: 685b ldr r3, [r3, #4]
8005432: f423 2180 bic.w r1, r3, #262144 ; 0x40000
8005436: 687b ldr r3, [r7, #4]
8005438: 6b1a ldr r2, [r3, #48] ; 0x30
800543a: 687b ldr r3, [r7, #4]
800543c: 681b ldr r3, [r3, #0]
800543e: 430a orrs r2, r1
8005440: 605a str r2, [r3, #4]
}
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
8005442: 687b ldr r3, [r7, #4]
8005444: 6a5b ldr r3, [r3, #36] ; 0x24
8005446: f003 0308 and.w r3, r3, #8
800544a: 2b00 cmp r3, #0
800544c: d00a beq.n 8005464 <UART_AdvFeatureConfig+0x90>
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
800544e: 687b ldr r3, [r7, #4]
8005450: 681b ldr r3, [r3, #0]
8005452: 685b ldr r3, [r3, #4]
8005454: f423 4100 bic.w r1, r3, #32768 ; 0x8000
8005458: 687b ldr r3, [r7, #4]
800545a: 6b5a ldr r2, [r3, #52] ; 0x34
800545c: 687b ldr r3, [r7, #4]
800545e: 681b ldr r3, [r3, #0]
8005460: 430a orrs r2, r1
8005462: 605a str r2, [r3, #4]
}
/* if required, configure RX overrun detection disabling */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
8005464: 687b ldr r3, [r7, #4]
8005466: 6a5b ldr r3, [r3, #36] ; 0x24
8005468: f003 0310 and.w r3, r3, #16
800546c: 2b00 cmp r3, #0
800546e: d00a beq.n 8005486 <UART_AdvFeatureConfig+0xb2>
{
assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
8005470: 687b ldr r3, [r7, #4]
8005472: 681b ldr r3, [r3, #0]
8005474: 689b ldr r3, [r3, #8]
8005476: f423 5180 bic.w r1, r3, #4096 ; 0x1000
800547a: 687b ldr r3, [r7, #4]
800547c: 6b9a ldr r2, [r3, #56] ; 0x38
800547e: 687b ldr r3, [r7, #4]
8005480: 681b ldr r3, [r3, #0]
8005482: 430a orrs r2, r1
8005484: 609a str r2, [r3, #8]
}
/* if required, configure DMA disabling on reception error */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
8005486: 687b ldr r3, [r7, #4]
8005488: 6a5b ldr r3, [r3, #36] ; 0x24
800548a: f003 0320 and.w r3, r3, #32
800548e: 2b00 cmp r3, #0
8005490: d00a beq.n 80054a8 <UART_AdvFeatureConfig+0xd4>
{
assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
8005492: 687b ldr r3, [r7, #4]
8005494: 681b ldr r3, [r3, #0]
8005496: 689b ldr r3, [r3, #8]
8005498: f423 5100 bic.w r1, r3, #8192 ; 0x2000
800549c: 687b ldr r3, [r7, #4]
800549e: 6bda ldr r2, [r3, #60] ; 0x3c
80054a0: 687b ldr r3, [r7, #4]
80054a2: 681b ldr r3, [r3, #0]
80054a4: 430a orrs r2, r1
80054a6: 609a str r2, [r3, #8]
}
/* if required, configure auto Baud rate detection scheme */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
80054a8: 687b ldr r3, [r7, #4]
80054aa: 6a5b ldr r3, [r3, #36] ; 0x24
80054ac: f003 0340 and.w r3, r3, #64 ; 0x40
80054b0: 2b00 cmp r3, #0
80054b2: d01a beq.n 80054ea <UART_AdvFeatureConfig+0x116>
{
assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
80054b4: 687b ldr r3, [r7, #4]
80054b6: 681b ldr r3, [r3, #0]
80054b8: 685b ldr r3, [r3, #4]
80054ba: f423 1180 bic.w r1, r3, #1048576 ; 0x100000
80054be: 687b ldr r3, [r7, #4]
80054c0: 6c1a ldr r2, [r3, #64] ; 0x40
80054c2: 687b ldr r3, [r7, #4]
80054c4: 681b ldr r3, [r3, #0]
80054c6: 430a orrs r2, r1
80054c8: 605a str r2, [r3, #4]
/* set auto Baudrate detection parameters if detection is enabled */
if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
80054ca: 687b ldr r3, [r7, #4]
80054cc: 6c1b ldr r3, [r3, #64] ; 0x40
80054ce: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
80054d2: d10a bne.n 80054ea <UART_AdvFeatureConfig+0x116>
{
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
80054d4: 687b ldr r3, [r7, #4]
80054d6: 681b ldr r3, [r3, #0]
80054d8: 685b ldr r3, [r3, #4]
80054da: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000
80054de: 687b ldr r3, [r7, #4]
80054e0: 6c5a ldr r2, [r3, #68] ; 0x44
80054e2: 687b ldr r3, [r7, #4]
80054e4: 681b ldr r3, [r3, #0]
80054e6: 430a orrs r2, r1
80054e8: 605a str r2, [r3, #4]
}
}
/* if required, configure MSB first on communication line */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
80054ea: 687b ldr r3, [r7, #4]
80054ec: 6a5b ldr r3, [r3, #36] ; 0x24
80054ee: f003 0380 and.w r3, r3, #128 ; 0x80
80054f2: 2b00 cmp r3, #0
80054f4: d00a beq.n 800550c <UART_AdvFeatureConfig+0x138>
{
assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
80054f6: 687b ldr r3, [r7, #4]
80054f8: 681b ldr r3, [r3, #0]
80054fa: 685b ldr r3, [r3, #4]
80054fc: f423 2100 bic.w r1, r3, #524288 ; 0x80000
8005500: 687b ldr r3, [r7, #4]
8005502: 6c9a ldr r2, [r3, #72] ; 0x48
8005504: 687b ldr r3, [r7, #4]
8005506: 681b ldr r3, [r3, #0]
8005508: 430a orrs r2, r1
800550a: 605a str r2, [r3, #4]
}
}
800550c: bf00 nop
800550e: 370c adds r7, #12
8005510: 46bd mov sp, r7
8005512: f85d 7b04 ldr.w r7, [sp], #4
8005516: 4770 bx lr
08005518 <UART_CheckIdleState>:
* @brief Check the UART Idle State.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
8005518: b580 push {r7, lr}
800551a: b086 sub sp, #24
800551c: af02 add r7, sp, #8
800551e: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Initialize the UART ErrorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8005520: 687b ldr r3, [r7, #4]
8005522: 2200 movs r2, #0
8005524: f8c3 2080 str.w r2, [r3, #128] ; 0x80
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
8005528: f7fb fb2e bl 8000b88 <HAL_GetTick>
800552c: 60f8 str r0, [r7, #12]
/* Check if the Transmitter is enabled */
if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
800552e: 687b ldr r3, [r7, #4]
8005530: 681b ldr r3, [r3, #0]
8005532: 681b ldr r3, [r3, #0]
8005534: f003 0308 and.w r3, r3, #8
8005538: 2b08 cmp r3, #8
800553a: d10e bne.n 800555a <UART_CheckIdleState+0x42>
{
/* Wait until TEACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
800553c: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
8005540: 9300 str r3, [sp, #0]
8005542: 68fb ldr r3, [r7, #12]
8005544: 2200 movs r2, #0
8005546: f44f 1100 mov.w r1, #2097152 ; 0x200000
800554a: 6878 ldr r0, [r7, #4]
800554c: f000 f82d bl 80055aa <UART_WaitOnFlagUntilTimeout>
8005550: 4603 mov r3, r0
8005552: 2b00 cmp r3, #0
8005554: d001 beq.n 800555a <UART_CheckIdleState+0x42>
{
/* Timeout occurred */
return HAL_TIMEOUT;
8005556: 2303 movs r3, #3
8005558: e023 b.n 80055a2 <UART_CheckIdleState+0x8a>
}
}
/* Check if the Receiver is enabled */
if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
800555a: 687b ldr r3, [r7, #4]
800555c: 681b ldr r3, [r3, #0]
800555e: 681b ldr r3, [r3, #0]
8005560: f003 0304 and.w r3, r3, #4
8005564: 2b04 cmp r3, #4
8005566: d10e bne.n 8005586 <UART_CheckIdleState+0x6e>
{
/* Wait until REACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
8005568: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000
800556c: 9300 str r3, [sp, #0]
800556e: 68fb ldr r3, [r7, #12]
8005570: 2200 movs r2, #0
8005572: f44f 0180 mov.w r1, #4194304 ; 0x400000
8005576: 6878 ldr r0, [r7, #4]
8005578: f000 f817 bl 80055aa <UART_WaitOnFlagUntilTimeout>
800557c: 4603 mov r3, r0
800557e: 2b00 cmp r3, #0
8005580: d001 beq.n 8005586 <UART_CheckIdleState+0x6e>
{
/* Timeout occurred */
return HAL_TIMEOUT;
8005582: 2303 movs r3, #3
8005584: e00d b.n 80055a2 <UART_CheckIdleState+0x8a>
}
}
/* Initialize the UART State */
huart->gState = HAL_UART_STATE_READY;
8005586: 687b ldr r3, [r7, #4]
8005588: 2220 movs r2, #32
800558a: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
800558c: 687b ldr r3, [r7, #4]
800558e: 2220 movs r2, #32
8005590: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8005592: 687b ldr r3, [r7, #4]
8005594: 2200 movs r2, #0
8005596: 661a str r2, [r3, #96] ; 0x60
__HAL_UNLOCK(huart);
8005598: 687b ldr r3, [r7, #4]
800559a: 2200 movs r2, #0
800559c: f883 2074 strb.w r2, [r3, #116] ; 0x74
return HAL_OK;
80055a0: 2300 movs r3, #0
}
80055a2: 4618 mov r0, r3
80055a4: 3710 adds r7, #16
80055a6: 46bd mov sp, r7
80055a8: bd80 pop {r7, pc}
080055aa <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
80055aa: b580 push {r7, lr}
80055ac: b09c sub sp, #112 ; 0x70
80055ae: af00 add r7, sp, #0
80055b0: 60f8 str r0, [r7, #12]
80055b2: 60b9 str r1, [r7, #8]
80055b4: 603b str r3, [r7, #0]
80055b6: 4613 mov r3, r2
80055b8: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80055ba: e0a5 b.n 8005708 <UART_WaitOnFlagUntilTimeout+0x15e>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
80055bc: 6fbb ldr r3, [r7, #120] ; 0x78
80055be: f1b3 3fff cmp.w r3, #4294967295
80055c2: f000 80a1 beq.w 8005708 <UART_WaitOnFlagUntilTimeout+0x15e>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
80055c6: f7fb fadf bl 8000b88 <HAL_GetTick>
80055ca: 4602 mov r2, r0
80055cc: 683b ldr r3, [r7, #0]
80055ce: 1ad3 subs r3, r2, r3
80055d0: 6fba ldr r2, [r7, #120] ; 0x78
80055d2: 429a cmp r2, r3
80055d4: d302 bcc.n 80055dc <UART_WaitOnFlagUntilTimeout+0x32>
80055d6: 6fbb ldr r3, [r7, #120] ; 0x78
80055d8: 2b00 cmp r3, #0
80055da: d13e bne.n 800565a <UART_WaitOnFlagUntilTimeout+0xb0>
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
80055dc: 68fb ldr r3, [r7, #12]
80055de: 681b ldr r3, [r3, #0]
80055e0: 653b str r3, [r7, #80] ; 0x50
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80055e2: 6d3b ldr r3, [r7, #80] ; 0x50
80055e4: e853 3f00 ldrex r3, [r3]
80055e8: 64fb str r3, [r7, #76] ; 0x4c
return(result);
80055ea: 6cfb ldr r3, [r7, #76] ; 0x4c
80055ec: f423 73d0 bic.w r3, r3, #416 ; 0x1a0
80055f0: 667b str r3, [r7, #100] ; 0x64
80055f2: 68fb ldr r3, [r7, #12]
80055f4: 681b ldr r3, [r3, #0]
80055f6: 461a mov r2, r3
80055f8: 6e7b ldr r3, [r7, #100] ; 0x64
80055fa: 65fb str r3, [r7, #92] ; 0x5c
80055fc: 65ba str r2, [r7, #88] ; 0x58
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80055fe: 6db9 ldr r1, [r7, #88] ; 0x58
8005600: 6dfa ldr r2, [r7, #92] ; 0x5c
8005602: e841 2300 strex r3, r2, [r1]
8005606: 657b str r3, [r7, #84] ; 0x54
return(result);
8005608: 6d7b ldr r3, [r7, #84] ; 0x54
800560a: 2b00 cmp r3, #0
800560c: d1e6 bne.n 80055dc <UART_WaitOnFlagUntilTimeout+0x32>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
800560e: 68fb ldr r3, [r7, #12]
8005610: 681b ldr r3, [r3, #0]
8005612: 3308 adds r3, #8
8005614: 63fb str r3, [r7, #60] ; 0x3c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8005616: 6bfb ldr r3, [r7, #60] ; 0x3c
8005618: e853 3f00 ldrex r3, [r3]
800561c: 63bb str r3, [r7, #56] ; 0x38
return(result);
800561e: 6bbb ldr r3, [r7, #56] ; 0x38
8005620: f023 0301 bic.w r3, r3, #1
8005624: 663b str r3, [r7, #96] ; 0x60
8005626: 68fb ldr r3, [r7, #12]
8005628: 681b ldr r3, [r3, #0]
800562a: 3308 adds r3, #8
800562c: 6e3a ldr r2, [r7, #96] ; 0x60
800562e: 64ba str r2, [r7, #72] ; 0x48
8005630: 647b str r3, [r7, #68] ; 0x44
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8005632: 6c79 ldr r1, [r7, #68] ; 0x44
8005634: 6cba ldr r2, [r7, #72] ; 0x48
8005636: e841 2300 strex r3, r2, [r1]
800563a: 643b str r3, [r7, #64] ; 0x40
return(result);
800563c: 6c3b ldr r3, [r7, #64] ; 0x40
800563e: 2b00 cmp r3, #0
8005640: d1e5 bne.n 800560e <UART_WaitOnFlagUntilTimeout+0x64>
huart->gState = HAL_UART_STATE_READY;
8005642: 68fb ldr r3, [r7, #12]
8005644: 2220 movs r2, #32
8005646: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8005648: 68fb ldr r3, [r7, #12]
800564a: 2220 movs r2, #32
800564c: 67da str r2, [r3, #124] ; 0x7c
__HAL_UNLOCK(huart);
800564e: 68fb ldr r3, [r7, #12]
8005650: 2200 movs r2, #0
8005652: f883 2074 strb.w r2, [r3, #116] ; 0x74
return HAL_TIMEOUT;
8005656: 2303 movs r3, #3
8005658: e067 b.n 800572a <UART_WaitOnFlagUntilTimeout+0x180>
}
if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
800565a: 68fb ldr r3, [r7, #12]
800565c: 681b ldr r3, [r3, #0]
800565e: 681b ldr r3, [r3, #0]
8005660: f003 0304 and.w r3, r3, #4
8005664: 2b00 cmp r3, #0
8005666: d04f beq.n 8005708 <UART_WaitOnFlagUntilTimeout+0x15e>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
8005668: 68fb ldr r3, [r7, #12]
800566a: 681b ldr r3, [r3, #0]
800566c: 69db ldr r3, [r3, #28]
800566e: f403 6300 and.w r3, r3, #2048 ; 0x800
8005672: f5b3 6f00 cmp.w r3, #2048 ; 0x800
8005676: d147 bne.n 8005708 <UART_WaitOnFlagUntilTimeout+0x15e>
{
/* Clear Receiver Timeout flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
8005678: 68fb ldr r3, [r7, #12]
800567a: 681b ldr r3, [r3, #0]
800567c: f44f 6200 mov.w r2, #2048 ; 0x800
8005680: 621a str r2, [r3, #32]
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
8005682: 68fb ldr r3, [r7, #12]
8005684: 681b ldr r3, [r3, #0]
8005686: 62bb str r3, [r7, #40] ; 0x28
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8005688: 6abb ldr r3, [r7, #40] ; 0x28
800568a: e853 3f00 ldrex r3, [r3]
800568e: 627b str r3, [r7, #36] ; 0x24
return(result);
8005690: 6a7b ldr r3, [r7, #36] ; 0x24
8005692: f423 73d0 bic.w r3, r3, #416 ; 0x1a0
8005696: 66fb str r3, [r7, #108] ; 0x6c
8005698: 68fb ldr r3, [r7, #12]
800569a: 681b ldr r3, [r3, #0]
800569c: 461a mov r2, r3
800569e: 6efb ldr r3, [r7, #108] ; 0x6c
80056a0: 637b str r3, [r7, #52] ; 0x34
80056a2: 633a str r2, [r7, #48] ; 0x30
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80056a4: 6b39 ldr r1, [r7, #48] ; 0x30
80056a6: 6b7a ldr r2, [r7, #52] ; 0x34
80056a8: e841 2300 strex r3, r2, [r1]
80056ac: 62fb str r3, [r7, #44] ; 0x2c
return(result);
80056ae: 6afb ldr r3, [r7, #44] ; 0x2c
80056b0: 2b00 cmp r3, #0
80056b2: d1e6 bne.n 8005682 <UART_WaitOnFlagUntilTimeout+0xd8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
80056b4: 68fb ldr r3, [r7, #12]
80056b6: 681b ldr r3, [r3, #0]
80056b8: 3308 adds r3, #8
80056ba: 617b str r3, [r7, #20]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80056bc: 697b ldr r3, [r7, #20]
80056be: e853 3f00 ldrex r3, [r3]
80056c2: 613b str r3, [r7, #16]
return(result);
80056c4: 693b ldr r3, [r7, #16]
80056c6: f023 0301 bic.w r3, r3, #1
80056ca: 66bb str r3, [r7, #104] ; 0x68
80056cc: 68fb ldr r3, [r7, #12]
80056ce: 681b ldr r3, [r3, #0]
80056d0: 3308 adds r3, #8
80056d2: 6eba ldr r2, [r7, #104] ; 0x68
80056d4: 623a str r2, [r7, #32]
80056d6: 61fb str r3, [r7, #28]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80056d8: 69f9 ldr r1, [r7, #28]
80056da: 6a3a ldr r2, [r7, #32]
80056dc: e841 2300 strex r3, r2, [r1]
80056e0: 61bb str r3, [r7, #24]
return(result);
80056e2: 69bb ldr r3, [r7, #24]
80056e4: 2b00 cmp r3, #0
80056e6: d1e5 bne.n 80056b4 <UART_WaitOnFlagUntilTimeout+0x10a>
huart->gState = HAL_UART_STATE_READY;
80056e8: 68fb ldr r3, [r7, #12]
80056ea: 2220 movs r2, #32
80056ec: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
80056ee: 68fb ldr r3, [r7, #12]
80056f0: 2220 movs r2, #32
80056f2: 67da str r2, [r3, #124] ; 0x7c
huart->ErrorCode = HAL_UART_ERROR_RTO;
80056f4: 68fb ldr r3, [r7, #12]
80056f6: 2220 movs r2, #32
80056f8: f8c3 2080 str.w r2, [r3, #128] ; 0x80
/* Process Unlocked */
__HAL_UNLOCK(huart);
80056fc: 68fb ldr r3, [r7, #12]
80056fe: 2200 movs r2, #0
8005700: f883 2074 strb.w r2, [r3, #116] ; 0x74
return HAL_TIMEOUT;
8005704: 2303 movs r3, #3
8005706: e010 b.n 800572a <UART_WaitOnFlagUntilTimeout+0x180>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8005708: 68fb ldr r3, [r7, #12]
800570a: 681b ldr r3, [r3, #0]
800570c: 69da ldr r2, [r3, #28]
800570e: 68bb ldr r3, [r7, #8]
8005710: 4013 ands r3, r2
8005712: 68ba ldr r2, [r7, #8]
8005714: 429a cmp r2, r3
8005716: bf0c ite eq
8005718: 2301 moveq r3, #1
800571a: 2300 movne r3, #0
800571c: b2db uxtb r3, r3
800571e: 461a mov r2, r3
8005720: 79fb ldrb r3, [r7, #7]
8005722: 429a cmp r2, r3
8005724: f43f af4a beq.w 80055bc <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8005728: 2300 movs r3, #0
}
800572a: 4618 mov r0, r3
800572c: 3770 adds r7, #112 ; 0x70
800572e: 46bd mov sp, r7
8005730: bd80 pop {r7, pc}
08005732 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8005732: b480 push {r7}
8005734: b085 sub sp, #20
8005736: af00 add r7, sp, #0
8005738: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
800573a: 687b ldr r3, [r7, #4]
800573c: 2200 movs r2, #0
800573e: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005742: f44f 433f mov.w r3, #48896 ; 0xbf00
8005746: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8005748: 68fb ldr r3, [r7, #12]
800574a: b29a uxth r2, r3
800574c: 687b ldr r3, [r7, #4]
800574e: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
return HAL_OK;
8005752: 2300 movs r3, #0
}
8005754: 4618 mov r0, r3
8005756: 3714 adds r7, #20
8005758: 46bd mov sp, r7
800575a: f85d 7b04 ldr.w r7, [sp], #4
800575e: 4770 bx lr
08005760 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8005760: b480 push {r7}
8005762: b085 sub sp, #20
8005764: af00 add r7, sp, #0
8005766: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005768: f44f 433f mov.w r3, #48896 ; 0xbf00
800576c: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
800576e: 687b ldr r3, [r7, #4]
8005770: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8005774: b29a uxth r2, r3
8005776: 68fb ldr r3, [r7, #12]
8005778: b29b uxth r3, r3
800577a: 43db mvns r3, r3
800577c: b29b uxth r3, r3
800577e: 4013 ands r3, r2
8005780: b29a uxth r2, r3
8005782: 687b ldr r3, [r7, #4]
8005784: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
return HAL_OK;
8005788: 2300 movs r3, #0
}
800578a: 4618 mov r0, r3
800578c: 3714 adds r7, #20
800578e: 46bd mov sp, r7
8005790: f85d 7b04 ldr.w r7, [sp], #4
8005794: 4770 bx lr
08005796 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005796: b084 sub sp, #16
8005798: b480 push {r7}
800579a: b083 sub sp, #12
800579c: af00 add r7, sp, #0
800579e: 6078 str r0, [r7, #4]
80057a0: f107 0014 add.w r0, r7, #20
80057a4: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
80057a8: 687b ldr r3, [r7, #4]
80057aa: 2201 movs r2, #1
80057ac: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
80057b0: 687b ldr r3, [r7, #4]
80057b2: 2200 movs r2, #0
80057b4: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
80057b8: 687b ldr r3, [r7, #4]
80057ba: 2200 movs r2, #0
80057bc: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
80057c0: 687b ldr r3, [r7, #4]
80057c2: 2200 movs r2, #0
80057c4: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
return HAL_OK;
80057c8: 2300 movs r3, #0
}
80057ca: 4618 mov r0, r3
80057cc: 370c adds r7, #12
80057ce: 46bd mov sp, r7
80057d0: f85d 7b04 ldr.w r7, [sp], #4
80057d4: b004 add sp, #16
80057d6: 4770 bx lr
080057d8 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80057d8: b480 push {r7}
80057da: b09d sub sp, #116 ; 0x74
80057dc: af00 add r7, sp, #0
80057de: 6078 str r0, [r7, #4]
80057e0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
80057e2: 2300 movs r3, #0
80057e4: f887 306f strb.w r3, [r7, #111] ; 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
80057e8: 687a ldr r2, [r7, #4]
80057ea: 683b ldr r3, [r7, #0]
80057ec: 781b ldrb r3, [r3, #0]
80057ee: 009b lsls r3, r3, #2
80057f0: 4413 add r3, r2
80057f2: 881b ldrh r3, [r3, #0]
80057f4: b29b uxth r3, r3
80057f6: f423 43ec bic.w r3, r3, #30208 ; 0x7600
80057fa: f023 0370 bic.w r3, r3, #112 ; 0x70
80057fe: f8a7 306c strh.w r3, [r7, #108] ; 0x6c
/* initialize Endpoint */
switch (ep->type)
8005802: 683b ldr r3, [r7, #0]
8005804: 78db ldrb r3, [r3, #3]
8005806: 2b03 cmp r3, #3
8005808: d81f bhi.n 800584a <USB_ActivateEndpoint+0x72>
800580a: a201 add r2, pc, #4 ; (adr r2, 8005810 <USB_ActivateEndpoint+0x38>)
800580c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005810: 08005821 .word 0x08005821
8005814: 0800583d .word 0x0800583d
8005818: 08005853 .word 0x08005853
800581c: 0800582f .word 0x0800582f
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8005820: f8b7 306c ldrh.w r3, [r7, #108] ; 0x6c
8005824: f443 7300 orr.w r3, r3, #512 ; 0x200
8005828: f8a7 306c strh.w r3, [r7, #108] ; 0x6c
break;
800582c: e012 b.n 8005854 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
800582e: f8b7 306c ldrh.w r3, [r7, #108] ; 0x6c
8005832: f443 63c0 orr.w r3, r3, #1536 ; 0x600
8005836: f8a7 306c strh.w r3, [r7, #108] ; 0x6c
break;
800583a: e00b b.n 8005854 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
800583c: f8b7 306c ldrh.w r3, [r7, #108] ; 0x6c
8005840: f443 6380 orr.w r3, r3, #1024 ; 0x400
8005844: f8a7 306c strh.w r3, [r7, #108] ; 0x6c
break;
8005848: e004 b.n 8005854 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
800584a: 2301 movs r3, #1
800584c: f887 306f strb.w r3, [r7, #111] ; 0x6f
break;
8005850: e000 b.n 8005854 <USB_ActivateEndpoint+0x7c>
break;
8005852: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8005854: 687a ldr r2, [r7, #4]
8005856: 683b ldr r3, [r7, #0]
8005858: 781b ldrb r3, [r3, #0]
800585a: 009b lsls r3, r3, #2
800585c: 441a add r2, r3
800585e: f8b7 306c ldrh.w r3, [r7, #108] ; 0x6c
8005862: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005866: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800586a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800586e: f043 0380 orr.w r3, r3, #128 ; 0x80
8005872: b29b uxth r3, r3
8005874: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8005876: 687a ldr r2, [r7, #4]
8005878: 683b ldr r3, [r7, #0]
800587a: 781b ldrb r3, [r3, #0]
800587c: 009b lsls r3, r3, #2
800587e: 4413 add r3, r2
8005880: 881b ldrh r3, [r3, #0]
8005882: b29b uxth r3, r3
8005884: b21b sxth r3, r3
8005886: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800588a: f023 0370 bic.w r3, r3, #112 ; 0x70
800588e: b21a sxth r2, r3
8005890: 683b ldr r3, [r7, #0]
8005892: 781b ldrb r3, [r3, #0]
8005894: b21b sxth r3, r3
8005896: 4313 orrs r3, r2
8005898: b21b sxth r3, r3
800589a: f8a7 3066 strh.w r3, [r7, #102] ; 0x66
800589e: 687a ldr r2, [r7, #4]
80058a0: 683b ldr r3, [r7, #0]
80058a2: 781b ldrb r3, [r3, #0]
80058a4: 009b lsls r3, r3, #2
80058a6: 441a add r2, r3
80058a8: f8b7 3066 ldrh.w r3, [r7, #102] ; 0x66
80058ac: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80058b0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80058b4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80058b8: f043 0380 orr.w r3, r3, #128 ; 0x80
80058bc: b29b uxth r3, r3
80058be: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
80058c0: 683b ldr r3, [r7, #0]
80058c2: 7b1b ldrb r3, [r3, #12]
80058c4: 2b00 cmp r3, #0
80058c6: f040 8149 bne.w 8005b5c <USB_ActivateEndpoint+0x384>
{
if (ep->is_in != 0U)
80058ca: 683b ldr r3, [r7, #0]
80058cc: 785b ldrb r3, [r3, #1]
80058ce: 2b00 cmp r3, #0
80058d0: f000 8084 beq.w 80059dc <USB_ActivateEndpoint+0x204>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
80058d4: 687b ldr r3, [r7, #4]
80058d6: 61bb str r3, [r7, #24]
80058d8: 687b ldr r3, [r7, #4]
80058da: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80058de: b29b uxth r3, r3
80058e0: 461a mov r2, r3
80058e2: 69bb ldr r3, [r7, #24]
80058e4: 4413 add r3, r2
80058e6: 61bb str r3, [r7, #24]
80058e8: 683b ldr r3, [r7, #0]
80058ea: 781b ldrb r3, [r3, #0]
80058ec: 011a lsls r2, r3, #4
80058ee: 69bb ldr r3, [r7, #24]
80058f0: 4413 add r3, r2
80058f2: f503 6380 add.w r3, r3, #1024 ; 0x400
80058f6: 617b str r3, [r7, #20]
80058f8: 683b ldr r3, [r7, #0]
80058fa: 88db ldrh r3, [r3, #6]
80058fc: 085b lsrs r3, r3, #1
80058fe: b29b uxth r3, r3
8005900: 005b lsls r3, r3, #1
8005902: b29a uxth r2, r3
8005904: 697b ldr r3, [r7, #20]
8005906: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005908: 687a ldr r2, [r7, #4]
800590a: 683b ldr r3, [r7, #0]
800590c: 781b ldrb r3, [r3, #0]
800590e: 009b lsls r3, r3, #2
8005910: 4413 add r3, r2
8005912: 881b ldrh r3, [r3, #0]
8005914: 827b strh r3, [r7, #18]
8005916: 8a7b ldrh r3, [r7, #18]
8005918: f003 0340 and.w r3, r3, #64 ; 0x40
800591c: 2b00 cmp r3, #0
800591e: d01b beq.n 8005958 <USB_ActivateEndpoint+0x180>
8005920: 687a ldr r2, [r7, #4]
8005922: 683b ldr r3, [r7, #0]
8005924: 781b ldrb r3, [r3, #0]
8005926: 009b lsls r3, r3, #2
8005928: 4413 add r3, r2
800592a: 881b ldrh r3, [r3, #0]
800592c: b29b uxth r3, r3
800592e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005932: f023 0370 bic.w r3, r3, #112 ; 0x70
8005936: 823b strh r3, [r7, #16]
8005938: 687a ldr r2, [r7, #4]
800593a: 683b ldr r3, [r7, #0]
800593c: 781b ldrb r3, [r3, #0]
800593e: 009b lsls r3, r3, #2
8005940: 441a add r2, r3
8005942: 8a3b ldrh r3, [r7, #16]
8005944: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005948: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800594c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005950: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005954: b29b uxth r3, r3
8005956: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8005958: 683b ldr r3, [r7, #0]
800595a: 78db ldrb r3, [r3, #3]
800595c: 2b01 cmp r3, #1
800595e: d020 beq.n 80059a2 <USB_ActivateEndpoint+0x1ca>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8005960: 687a ldr r2, [r7, #4]
8005962: 683b ldr r3, [r7, #0]
8005964: 781b ldrb r3, [r3, #0]
8005966: 009b lsls r3, r3, #2
8005968: 4413 add r3, r2
800596a: 881b ldrh r3, [r3, #0]
800596c: b29b uxth r3, r3
800596e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005972: f023 0340 bic.w r3, r3, #64 ; 0x40
8005976: 81bb strh r3, [r7, #12]
8005978: 89bb ldrh r3, [r7, #12]
800597a: f083 0320 eor.w r3, r3, #32
800597e: 81bb strh r3, [r7, #12]
8005980: 687a ldr r2, [r7, #4]
8005982: 683b ldr r3, [r7, #0]
8005984: 781b ldrb r3, [r3, #0]
8005986: 009b lsls r3, r3, #2
8005988: 441a add r2, r3
800598a: 89bb ldrh r3, [r7, #12]
800598c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005990: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005994: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005998: f043 0380 orr.w r3, r3, #128 ; 0x80
800599c: b29b uxth r3, r3
800599e: 8013 strh r3, [r2, #0]
80059a0: e2a6 b.n 8005ef0 <USB_ActivateEndpoint+0x718>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80059a2: 687a ldr r2, [r7, #4]
80059a4: 683b ldr r3, [r7, #0]
80059a6: 781b ldrb r3, [r3, #0]
80059a8: 009b lsls r3, r3, #2
80059aa: 4413 add r3, r2
80059ac: 881b ldrh r3, [r3, #0]
80059ae: b29b uxth r3, r3
80059b0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80059b4: f023 0340 bic.w r3, r3, #64 ; 0x40
80059b8: 81fb strh r3, [r7, #14]
80059ba: 687a ldr r2, [r7, #4]
80059bc: 683b ldr r3, [r7, #0]
80059be: 781b ldrb r3, [r3, #0]
80059c0: 009b lsls r3, r3, #2
80059c2: 441a add r2, r3
80059c4: 89fb ldrh r3, [r7, #14]
80059c6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80059ca: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80059ce: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80059d2: f043 0380 orr.w r3, r3, #128 ; 0x80
80059d6: b29b uxth r3, r3
80059d8: 8013 strh r3, [r2, #0]
80059da: e289 b.n 8005ef0 <USB_ActivateEndpoint+0x718>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
80059dc: 687b ldr r3, [r7, #4]
80059de: 633b str r3, [r7, #48] ; 0x30
80059e0: 687b ldr r3, [r7, #4]
80059e2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80059e6: b29b uxth r3, r3
80059e8: 461a mov r2, r3
80059ea: 6b3b ldr r3, [r7, #48] ; 0x30
80059ec: 4413 add r3, r2
80059ee: 633b str r3, [r7, #48] ; 0x30
80059f0: 683b ldr r3, [r7, #0]
80059f2: 781b ldrb r3, [r3, #0]
80059f4: 011a lsls r2, r3, #4
80059f6: 6b3b ldr r3, [r7, #48] ; 0x30
80059f8: 4413 add r3, r2
80059fa: f503 6381 add.w r3, r3, #1032 ; 0x408
80059fe: 62fb str r3, [r7, #44] ; 0x2c
8005a00: 683b ldr r3, [r7, #0]
8005a02: 88db ldrh r3, [r3, #6]
8005a04: 085b lsrs r3, r3, #1
8005a06: b29b uxth r3, r3
8005a08: 005b lsls r3, r3, #1
8005a0a: b29a uxth r2, r3
8005a0c: 6afb ldr r3, [r7, #44] ; 0x2c
8005a0e: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8005a10: 687b ldr r3, [r7, #4]
8005a12: 62bb str r3, [r7, #40] ; 0x28
8005a14: 687b ldr r3, [r7, #4]
8005a16: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8005a1a: b29b uxth r3, r3
8005a1c: 461a mov r2, r3
8005a1e: 6abb ldr r3, [r7, #40] ; 0x28
8005a20: 4413 add r3, r2
8005a22: 62bb str r3, [r7, #40] ; 0x28
8005a24: 683b ldr r3, [r7, #0]
8005a26: 781b ldrb r3, [r3, #0]
8005a28: 011a lsls r2, r3, #4
8005a2a: 6abb ldr r3, [r7, #40] ; 0x28
8005a2c: 4413 add r3, r2
8005a2e: f203 430c addw r3, r3, #1036 ; 0x40c
8005a32: 627b str r3, [r7, #36] ; 0x24
8005a34: 683b ldr r3, [r7, #0]
8005a36: 691b ldr r3, [r3, #16]
8005a38: 2b00 cmp r3, #0
8005a3a: d112 bne.n 8005a62 <USB_ActivateEndpoint+0x28a>
8005a3c: 6a7b ldr r3, [r7, #36] ; 0x24
8005a3e: 881b ldrh r3, [r3, #0]
8005a40: b29b uxth r3, r3
8005a42: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8005a46: b29a uxth r2, r3
8005a48: 6a7b ldr r3, [r7, #36] ; 0x24
8005a4a: 801a strh r2, [r3, #0]
8005a4c: 6a7b ldr r3, [r7, #36] ; 0x24
8005a4e: 881b ldrh r3, [r3, #0]
8005a50: b29b uxth r3, r3
8005a52: ea6f 4343 mvn.w r3, r3, lsl #17
8005a56: ea6f 4353 mvn.w r3, r3, lsr #17
8005a5a: b29a uxth r2, r3
8005a5c: 6a7b ldr r3, [r7, #36] ; 0x24
8005a5e: 801a strh r2, [r3, #0]
8005a60: e02f b.n 8005ac2 <USB_ActivateEndpoint+0x2ea>
8005a62: 683b ldr r3, [r7, #0]
8005a64: 691b ldr r3, [r3, #16]
8005a66: 2b3e cmp r3, #62 ; 0x3e
8005a68: d813 bhi.n 8005a92 <USB_ActivateEndpoint+0x2ba>
8005a6a: 683b ldr r3, [r7, #0]
8005a6c: 691b ldr r3, [r3, #16]
8005a6e: 085b lsrs r3, r3, #1
8005a70: 66bb str r3, [r7, #104] ; 0x68
8005a72: 683b ldr r3, [r7, #0]
8005a74: 691b ldr r3, [r3, #16]
8005a76: f003 0301 and.w r3, r3, #1
8005a7a: 2b00 cmp r3, #0
8005a7c: d002 beq.n 8005a84 <USB_ActivateEndpoint+0x2ac>
8005a7e: 6ebb ldr r3, [r7, #104] ; 0x68
8005a80: 3301 adds r3, #1
8005a82: 66bb str r3, [r7, #104] ; 0x68
8005a84: 6ebb ldr r3, [r7, #104] ; 0x68
8005a86: b29b uxth r3, r3
8005a88: 029b lsls r3, r3, #10
8005a8a: b29a uxth r2, r3
8005a8c: 6a7b ldr r3, [r7, #36] ; 0x24
8005a8e: 801a strh r2, [r3, #0]
8005a90: e017 b.n 8005ac2 <USB_ActivateEndpoint+0x2ea>
8005a92: 683b ldr r3, [r7, #0]
8005a94: 691b ldr r3, [r3, #16]
8005a96: 095b lsrs r3, r3, #5
8005a98: 66bb str r3, [r7, #104] ; 0x68
8005a9a: 683b ldr r3, [r7, #0]
8005a9c: 691b ldr r3, [r3, #16]
8005a9e: f003 031f and.w r3, r3, #31
8005aa2: 2b00 cmp r3, #0
8005aa4: d102 bne.n 8005aac <USB_ActivateEndpoint+0x2d4>
8005aa6: 6ebb ldr r3, [r7, #104] ; 0x68
8005aa8: 3b01 subs r3, #1
8005aaa: 66bb str r3, [r7, #104] ; 0x68
8005aac: 6ebb ldr r3, [r7, #104] ; 0x68
8005aae: b29b uxth r3, r3
8005ab0: 029b lsls r3, r3, #10
8005ab2: b29b uxth r3, r3
8005ab4: ea6f 4343 mvn.w r3, r3, lsl #17
8005ab8: ea6f 4353 mvn.w r3, r3, lsr #17
8005abc: b29a uxth r2, r3
8005abe: 6a7b ldr r3, [r7, #36] ; 0x24
8005ac0: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005ac2: 687a ldr r2, [r7, #4]
8005ac4: 683b ldr r3, [r7, #0]
8005ac6: 781b ldrb r3, [r3, #0]
8005ac8: 009b lsls r3, r3, #2
8005aca: 4413 add r3, r2
8005acc: 881b ldrh r3, [r3, #0]
8005ace: 847b strh r3, [r7, #34] ; 0x22
8005ad0: 8c7b ldrh r3, [r7, #34] ; 0x22
8005ad2: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005ad6: 2b00 cmp r3, #0
8005ad8: d01b beq.n 8005b12 <USB_ActivateEndpoint+0x33a>
8005ada: 687a ldr r2, [r7, #4]
8005adc: 683b ldr r3, [r7, #0]
8005ade: 781b ldrb r3, [r3, #0]
8005ae0: 009b lsls r3, r3, #2
8005ae2: 4413 add r3, r2
8005ae4: 881b ldrh r3, [r3, #0]
8005ae6: b29b uxth r3, r3
8005ae8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005aec: f023 0370 bic.w r3, r3, #112 ; 0x70
8005af0: 843b strh r3, [r7, #32]
8005af2: 687a ldr r2, [r7, #4]
8005af4: 683b ldr r3, [r7, #0]
8005af6: 781b ldrb r3, [r3, #0]
8005af8: 009b lsls r3, r3, #2
8005afa: 441a add r2, r3
8005afc: 8c3b ldrh r3, [r7, #32]
8005afe: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005b02: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005b06: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005b0a: f043 0380 orr.w r3, r3, #128 ; 0x80
8005b0e: b29b uxth r3, r3
8005b10: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8005b12: 687a ldr r2, [r7, #4]
8005b14: 683b ldr r3, [r7, #0]
8005b16: 781b ldrb r3, [r3, #0]
8005b18: 009b lsls r3, r3, #2
8005b1a: 4413 add r3, r2
8005b1c: 881b ldrh r3, [r3, #0]
8005b1e: b29b uxth r3, r3
8005b20: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005b24: f023 0370 bic.w r3, r3, #112 ; 0x70
8005b28: 83fb strh r3, [r7, #30]
8005b2a: 8bfb ldrh r3, [r7, #30]
8005b2c: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8005b30: 83fb strh r3, [r7, #30]
8005b32: 8bfb ldrh r3, [r7, #30]
8005b34: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8005b38: 83fb strh r3, [r7, #30]
8005b3a: 687a ldr r2, [r7, #4]
8005b3c: 683b ldr r3, [r7, #0]
8005b3e: 781b ldrb r3, [r3, #0]
8005b40: 009b lsls r3, r3, #2
8005b42: 441a add r2, r3
8005b44: 8bfb ldrh r3, [r7, #30]
8005b46: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005b4a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005b4e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005b52: f043 0380 orr.w r3, r3, #128 ; 0x80
8005b56: b29b uxth r3, r3
8005b58: 8013 strh r3, [r2, #0]
8005b5a: e1c9 b.n 8005ef0 <USB_ActivateEndpoint+0x718>
}
}
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8005b5c: 683b ldr r3, [r7, #0]
8005b5e: 78db ldrb r3, [r3, #3]
8005b60: 2b02 cmp r3, #2
8005b62: d11e bne.n 8005ba2 <USB_ActivateEndpoint+0x3ca>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8005b64: 687a ldr r2, [r7, #4]
8005b66: 683b ldr r3, [r7, #0]
8005b68: 781b ldrb r3, [r3, #0]
8005b6a: 009b lsls r3, r3, #2
8005b6c: 4413 add r3, r2
8005b6e: 881b ldrh r3, [r3, #0]
8005b70: b29b uxth r3, r3
8005b72: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005b76: f023 0370 bic.w r3, r3, #112 ; 0x70
8005b7a: f8a7 3062 strh.w r3, [r7, #98] ; 0x62
8005b7e: 687a ldr r2, [r7, #4]
8005b80: 683b ldr r3, [r7, #0]
8005b82: 781b ldrb r3, [r3, #0]
8005b84: 009b lsls r3, r3, #2
8005b86: 441a add r2, r3
8005b88: f8b7 3062 ldrh.w r3, [r7, #98] ; 0x62
8005b8c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005b90: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005b94: f443 4301 orr.w r3, r3, #33024 ; 0x8100
8005b98: f043 0380 orr.w r3, r3, #128 ; 0x80
8005b9c: b29b uxth r3, r3
8005b9e: 8013 strh r3, [r2, #0]
8005ba0: e01d b.n 8005bde <USB_ActivateEndpoint+0x406>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
8005ba2: 687a ldr r2, [r7, #4]
8005ba4: 683b ldr r3, [r7, #0]
8005ba6: 781b ldrb r3, [r3, #0]
8005ba8: 009b lsls r3, r3, #2
8005baa: 4413 add r3, r2
8005bac: 881b ldrh r3, [r3, #0]
8005bae: b29b uxth r3, r3
8005bb0: f423 43e2 bic.w r3, r3, #28928 ; 0x7100
8005bb4: f023 0370 bic.w r3, r3, #112 ; 0x70
8005bb8: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
8005bbc: 687a ldr r2, [r7, #4]
8005bbe: 683b ldr r3, [r7, #0]
8005bc0: 781b ldrb r3, [r3, #0]
8005bc2: 009b lsls r3, r3, #2
8005bc4: 441a add r2, r3
8005bc6: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
8005bca: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005bce: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005bd2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005bd6: f043 0380 orr.w r3, r3, #128 ; 0x80
8005bda: b29b uxth r3, r3
8005bdc: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8005bde: 687b ldr r3, [r7, #4]
8005be0: 65fb str r3, [r7, #92] ; 0x5c
8005be2: 687b ldr r3, [r7, #4]
8005be4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8005be8: b29b uxth r3, r3
8005bea: 461a mov r2, r3
8005bec: 6dfb ldr r3, [r7, #92] ; 0x5c
8005bee: 4413 add r3, r2
8005bf0: 65fb str r3, [r7, #92] ; 0x5c
8005bf2: 683b ldr r3, [r7, #0]
8005bf4: 781b ldrb r3, [r3, #0]
8005bf6: 011a lsls r2, r3, #4
8005bf8: 6dfb ldr r3, [r7, #92] ; 0x5c
8005bfa: 4413 add r3, r2
8005bfc: f503 6380 add.w r3, r3, #1024 ; 0x400
8005c00: 65bb str r3, [r7, #88] ; 0x58
8005c02: 683b ldr r3, [r7, #0]
8005c04: 891b ldrh r3, [r3, #8]
8005c06: 085b lsrs r3, r3, #1
8005c08: b29b uxth r3, r3
8005c0a: 005b lsls r3, r3, #1
8005c0c: b29a uxth r2, r3
8005c0e: 6dbb ldr r3, [r7, #88] ; 0x58
8005c10: 801a strh r2, [r3, #0]
8005c12: 687b ldr r3, [r7, #4]
8005c14: 657b str r3, [r7, #84] ; 0x54
8005c16: 687b ldr r3, [r7, #4]
8005c18: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8005c1c: b29b uxth r3, r3
8005c1e: 461a mov r2, r3
8005c20: 6d7b ldr r3, [r7, #84] ; 0x54
8005c22: 4413 add r3, r2
8005c24: 657b str r3, [r7, #84] ; 0x54
8005c26: 683b ldr r3, [r7, #0]
8005c28: 781b ldrb r3, [r3, #0]
8005c2a: 011a lsls r2, r3, #4
8005c2c: 6d7b ldr r3, [r7, #84] ; 0x54
8005c2e: 4413 add r3, r2
8005c30: f503 6381 add.w r3, r3, #1032 ; 0x408
8005c34: 653b str r3, [r7, #80] ; 0x50
8005c36: 683b ldr r3, [r7, #0]
8005c38: 895b ldrh r3, [r3, #10]
8005c3a: 085b lsrs r3, r3, #1
8005c3c: b29b uxth r3, r3
8005c3e: 005b lsls r3, r3, #1
8005c40: b29a uxth r2, r3
8005c42: 6d3b ldr r3, [r7, #80] ; 0x50
8005c44: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8005c46: 683b ldr r3, [r7, #0]
8005c48: 785b ldrb r3, [r3, #1]
8005c4a: 2b00 cmp r3, #0
8005c4c: f040 8093 bne.w 8005d76 <USB_ActivateEndpoint+0x59e>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005c50: 687a ldr r2, [r7, #4]
8005c52: 683b ldr r3, [r7, #0]
8005c54: 781b ldrb r3, [r3, #0]
8005c56: 009b lsls r3, r3, #2
8005c58: 4413 add r3, r2
8005c5a: 881b ldrh r3, [r3, #0]
8005c5c: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
8005c60: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8005c64: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005c68: 2b00 cmp r3, #0
8005c6a: d01b beq.n 8005ca4 <USB_ActivateEndpoint+0x4cc>
8005c6c: 687a ldr r2, [r7, #4]
8005c6e: 683b ldr r3, [r7, #0]
8005c70: 781b ldrb r3, [r3, #0]
8005c72: 009b lsls r3, r3, #2
8005c74: 4413 add r3, r2
8005c76: 881b ldrh r3, [r3, #0]
8005c78: b29b uxth r3, r3
8005c7a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005c7e: f023 0370 bic.w r3, r3, #112 ; 0x70
8005c82: 87fb strh r3, [r7, #62] ; 0x3e
8005c84: 687a ldr r2, [r7, #4]
8005c86: 683b ldr r3, [r7, #0]
8005c88: 781b ldrb r3, [r3, #0]
8005c8a: 009b lsls r3, r3, #2
8005c8c: 441a add r2, r3
8005c8e: 8ffb ldrh r3, [r7, #62] ; 0x3e
8005c90: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005c94: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005c98: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005c9c: f043 0380 orr.w r3, r3, #128 ; 0x80
8005ca0: b29b uxth r3, r3
8005ca2: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005ca4: 687a ldr r2, [r7, #4]
8005ca6: 683b ldr r3, [r7, #0]
8005ca8: 781b ldrb r3, [r3, #0]
8005caa: 009b lsls r3, r3, #2
8005cac: 4413 add r3, r2
8005cae: 881b ldrh r3, [r3, #0]
8005cb0: 87bb strh r3, [r7, #60] ; 0x3c
8005cb2: 8fbb ldrh r3, [r7, #60] ; 0x3c
8005cb4: f003 0340 and.w r3, r3, #64 ; 0x40
8005cb8: 2b00 cmp r3, #0
8005cba: d01b beq.n 8005cf4 <USB_ActivateEndpoint+0x51c>
8005cbc: 687a ldr r2, [r7, #4]
8005cbe: 683b ldr r3, [r7, #0]
8005cc0: 781b ldrb r3, [r3, #0]
8005cc2: 009b lsls r3, r3, #2
8005cc4: 4413 add r3, r2
8005cc6: 881b ldrh r3, [r3, #0]
8005cc8: b29b uxth r3, r3
8005cca: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005cce: f023 0370 bic.w r3, r3, #112 ; 0x70
8005cd2: 877b strh r3, [r7, #58] ; 0x3a
8005cd4: 687a ldr r2, [r7, #4]
8005cd6: 683b ldr r3, [r7, #0]
8005cd8: 781b ldrb r3, [r3, #0]
8005cda: 009b lsls r3, r3, #2
8005cdc: 441a add r2, r3
8005cde: 8f7b ldrh r3, [r7, #58] ; 0x3a
8005ce0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005ce4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005ce8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005cec: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005cf0: b29b uxth r3, r3
8005cf2: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8005cf4: 687a ldr r2, [r7, #4]
8005cf6: 683b ldr r3, [r7, #0]
8005cf8: 781b ldrb r3, [r3, #0]
8005cfa: 009b lsls r3, r3, #2
8005cfc: 4413 add r3, r2
8005cfe: 881b ldrh r3, [r3, #0]
8005d00: b29b uxth r3, r3
8005d02: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005d06: f023 0370 bic.w r3, r3, #112 ; 0x70
8005d0a: 873b strh r3, [r7, #56] ; 0x38
8005d0c: 8f3b ldrh r3, [r7, #56] ; 0x38
8005d0e: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8005d12: 873b strh r3, [r7, #56] ; 0x38
8005d14: 8f3b ldrh r3, [r7, #56] ; 0x38
8005d16: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8005d1a: 873b strh r3, [r7, #56] ; 0x38
8005d1c: 687a ldr r2, [r7, #4]
8005d1e: 683b ldr r3, [r7, #0]
8005d20: 781b ldrb r3, [r3, #0]
8005d22: 009b lsls r3, r3, #2
8005d24: 441a add r2, r3
8005d26: 8f3b ldrh r3, [r7, #56] ; 0x38
8005d28: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005d2c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005d30: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005d34: f043 0380 orr.w r3, r3, #128 ; 0x80
8005d38: b29b uxth r3, r3
8005d3a: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005d3c: 687a ldr r2, [r7, #4]
8005d3e: 683b ldr r3, [r7, #0]
8005d40: 781b ldrb r3, [r3, #0]
8005d42: 009b lsls r3, r3, #2
8005d44: 4413 add r3, r2
8005d46: 881b ldrh r3, [r3, #0]
8005d48: b29b uxth r3, r3
8005d4a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005d4e: f023 0340 bic.w r3, r3, #64 ; 0x40
8005d52: 86fb strh r3, [r7, #54] ; 0x36
8005d54: 687a ldr r2, [r7, #4]
8005d56: 683b ldr r3, [r7, #0]
8005d58: 781b ldrb r3, [r3, #0]
8005d5a: 009b lsls r3, r3, #2
8005d5c: 441a add r2, r3
8005d5e: 8efb ldrh r3, [r7, #54] ; 0x36
8005d60: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005d64: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005d68: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005d6c: f043 0380 orr.w r3, r3, #128 ; 0x80
8005d70: b29b uxth r3, r3
8005d72: 8013 strh r3, [r2, #0]
8005d74: e0bc b.n 8005ef0 <USB_ActivateEndpoint+0x718>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005d76: 687a ldr r2, [r7, #4]
8005d78: 683b ldr r3, [r7, #0]
8005d7a: 781b ldrb r3, [r3, #0]
8005d7c: 009b lsls r3, r3, #2
8005d7e: 4413 add r3, r2
8005d80: 881b ldrh r3, [r3, #0]
8005d82: f8a7 304e strh.w r3, [r7, #78] ; 0x4e
8005d86: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8005d8a: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005d8e: 2b00 cmp r3, #0
8005d90: d01d beq.n 8005dce <USB_ActivateEndpoint+0x5f6>
8005d92: 687a ldr r2, [r7, #4]
8005d94: 683b ldr r3, [r7, #0]
8005d96: 781b ldrb r3, [r3, #0]
8005d98: 009b lsls r3, r3, #2
8005d9a: 4413 add r3, r2
8005d9c: 881b ldrh r3, [r3, #0]
8005d9e: b29b uxth r3, r3
8005da0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005da4: f023 0370 bic.w r3, r3, #112 ; 0x70
8005da8: f8a7 304c strh.w r3, [r7, #76] ; 0x4c
8005dac: 687a ldr r2, [r7, #4]
8005dae: 683b ldr r3, [r7, #0]
8005db0: 781b ldrb r3, [r3, #0]
8005db2: 009b lsls r3, r3, #2
8005db4: 441a add r2, r3
8005db6: f8b7 304c ldrh.w r3, [r7, #76] ; 0x4c
8005dba: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005dbe: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005dc2: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005dc6: f043 0380 orr.w r3, r3, #128 ; 0x80
8005dca: b29b uxth r3, r3
8005dcc: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005dce: 687a ldr r2, [r7, #4]
8005dd0: 683b ldr r3, [r7, #0]
8005dd2: 781b ldrb r3, [r3, #0]
8005dd4: 009b lsls r3, r3, #2
8005dd6: 4413 add r3, r2
8005dd8: 881b ldrh r3, [r3, #0]
8005dda: f8a7 304a strh.w r3, [r7, #74] ; 0x4a
8005dde: f8b7 304a ldrh.w r3, [r7, #74] ; 0x4a
8005de2: f003 0340 and.w r3, r3, #64 ; 0x40
8005de6: 2b00 cmp r3, #0
8005de8: d01d beq.n 8005e26 <USB_ActivateEndpoint+0x64e>
8005dea: 687a ldr r2, [r7, #4]
8005dec: 683b ldr r3, [r7, #0]
8005dee: 781b ldrb r3, [r3, #0]
8005df0: 009b lsls r3, r3, #2
8005df2: 4413 add r3, r2
8005df4: 881b ldrh r3, [r3, #0]
8005df6: b29b uxth r3, r3
8005df8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005dfc: f023 0370 bic.w r3, r3, #112 ; 0x70
8005e00: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
8005e04: 687a ldr r2, [r7, #4]
8005e06: 683b ldr r3, [r7, #0]
8005e08: 781b ldrb r3, [r3, #0]
8005e0a: 009b lsls r3, r3, #2
8005e0c: 441a add r2, r3
8005e0e: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8005e12: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005e16: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005e1a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005e1e: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005e22: b29b uxth r3, r3
8005e24: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8005e26: 683b ldr r3, [r7, #0]
8005e28: 78db ldrb r3, [r3, #3]
8005e2a: 2b01 cmp r3, #1
8005e2c: d024 beq.n 8005e78 <USB_ActivateEndpoint+0x6a0>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8005e2e: 687a ldr r2, [r7, #4]
8005e30: 683b ldr r3, [r7, #0]
8005e32: 781b ldrb r3, [r3, #0]
8005e34: 009b lsls r3, r3, #2
8005e36: 4413 add r3, r2
8005e38: 881b ldrh r3, [r3, #0]
8005e3a: b29b uxth r3, r3
8005e3c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005e40: f023 0340 bic.w r3, r3, #64 ; 0x40
8005e44: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
8005e48: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
8005e4c: f083 0320 eor.w r3, r3, #32
8005e50: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
8005e54: 687a ldr r2, [r7, #4]
8005e56: 683b ldr r3, [r7, #0]
8005e58: 781b ldrb r3, [r3, #0]
8005e5a: 009b lsls r3, r3, #2
8005e5c: 441a add r2, r3
8005e5e: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
8005e62: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005e66: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005e6a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005e6e: f043 0380 orr.w r3, r3, #128 ; 0x80
8005e72: b29b uxth r3, r3
8005e74: 8013 strh r3, [r2, #0]
8005e76: e01d b.n 8005eb4 <USB_ActivateEndpoint+0x6dc>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005e78: 687a ldr r2, [r7, #4]
8005e7a: 683b ldr r3, [r7, #0]
8005e7c: 781b ldrb r3, [r3, #0]
8005e7e: 009b lsls r3, r3, #2
8005e80: 4413 add r3, r2
8005e82: 881b ldrh r3, [r3, #0]
8005e84: b29b uxth r3, r3
8005e86: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005e8a: f023 0340 bic.w r3, r3, #64 ; 0x40
8005e8e: f8a7 3046 strh.w r3, [r7, #70] ; 0x46
8005e92: 687a ldr r2, [r7, #4]
8005e94: 683b ldr r3, [r7, #0]
8005e96: 781b ldrb r3, [r3, #0]
8005e98: 009b lsls r3, r3, #2
8005e9a: 441a add r2, r3
8005e9c: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46
8005ea0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005ea4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005ea8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005eac: f043 0380 orr.w r3, r3, #128 ; 0x80
8005eb0: b29b uxth r3, r3
8005eb2: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005eb4: 687a ldr r2, [r7, #4]
8005eb6: 683b ldr r3, [r7, #0]
8005eb8: 781b ldrb r3, [r3, #0]
8005eba: 009b lsls r3, r3, #2
8005ebc: 4413 add r3, r2
8005ebe: 881b ldrh r3, [r3, #0]
8005ec0: b29b uxth r3, r3
8005ec2: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005ec6: f023 0370 bic.w r3, r3, #112 ; 0x70
8005eca: f8a7 3042 strh.w r3, [r7, #66] ; 0x42
8005ece: 687a ldr r2, [r7, #4]
8005ed0: 683b ldr r3, [r7, #0]
8005ed2: 781b ldrb r3, [r3, #0]
8005ed4: 009b lsls r3, r3, #2
8005ed6: 441a add r2, r3
8005ed8: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42
8005edc: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005ee0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005ee4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005ee8: f043 0380 orr.w r3, r3, #128 ; 0x80
8005eec: b29b uxth r3, r3
8005eee: 8013 strh r3, [r2, #0]
}
}
return ret;
8005ef0: f897 306f ldrb.w r3, [r7, #111] ; 0x6f
}
8005ef4: 4618 mov r0, r3
8005ef6: 3774 adds r7, #116 ; 0x74
8005ef8: 46bd mov sp, r7
8005efa: f85d 7b04 ldr.w r7, [sp], #4
8005efe: 4770 bx lr
08005f00 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8005f00: b480 push {r7}
8005f02: b08d sub sp, #52 ; 0x34
8005f04: af00 add r7, sp, #0
8005f06: 6078 str r0, [r7, #4]
8005f08: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8005f0a: 683b ldr r3, [r7, #0]
8005f0c: 7b1b ldrb r3, [r3, #12]
8005f0e: 2b00 cmp r3, #0
8005f10: f040 808e bne.w 8006030 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
8005f14: 683b ldr r3, [r7, #0]
8005f16: 785b ldrb r3, [r3, #1]
8005f18: 2b00 cmp r3, #0
8005f1a: d044 beq.n 8005fa6 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005f1c: 687a ldr r2, [r7, #4]
8005f1e: 683b ldr r3, [r7, #0]
8005f20: 781b ldrb r3, [r3, #0]
8005f22: 009b lsls r3, r3, #2
8005f24: 4413 add r3, r2
8005f26: 881b ldrh r3, [r3, #0]
8005f28: 81bb strh r3, [r7, #12]
8005f2a: 89bb ldrh r3, [r7, #12]
8005f2c: f003 0340 and.w r3, r3, #64 ; 0x40
8005f30: 2b00 cmp r3, #0
8005f32: d01b beq.n 8005f6c <USB_DeactivateEndpoint+0x6c>
8005f34: 687a ldr r2, [r7, #4]
8005f36: 683b ldr r3, [r7, #0]
8005f38: 781b ldrb r3, [r3, #0]
8005f3a: 009b lsls r3, r3, #2
8005f3c: 4413 add r3, r2
8005f3e: 881b ldrh r3, [r3, #0]
8005f40: b29b uxth r3, r3
8005f42: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005f46: f023 0370 bic.w r3, r3, #112 ; 0x70
8005f4a: 817b strh r3, [r7, #10]
8005f4c: 687a ldr r2, [r7, #4]
8005f4e: 683b ldr r3, [r7, #0]
8005f50: 781b ldrb r3, [r3, #0]
8005f52: 009b lsls r3, r3, #2
8005f54: 441a add r2, r3
8005f56: 897b ldrh r3, [r7, #10]
8005f58: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005f5c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005f60: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005f64: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005f68: b29b uxth r3, r3
8005f6a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005f6c: 687a ldr r2, [r7, #4]
8005f6e: 683b ldr r3, [r7, #0]
8005f70: 781b ldrb r3, [r3, #0]
8005f72: 009b lsls r3, r3, #2
8005f74: 4413 add r3, r2
8005f76: 881b ldrh r3, [r3, #0]
8005f78: b29b uxth r3, r3
8005f7a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005f7e: f023 0340 bic.w r3, r3, #64 ; 0x40
8005f82: 813b strh r3, [r7, #8]
8005f84: 687a ldr r2, [r7, #4]
8005f86: 683b ldr r3, [r7, #0]
8005f88: 781b ldrb r3, [r3, #0]
8005f8a: 009b lsls r3, r3, #2
8005f8c: 441a add r2, r3
8005f8e: 893b ldrh r3, [r7, #8]
8005f90: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005f94: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005f98: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005f9c: f043 0380 orr.w r3, r3, #128 ; 0x80
8005fa0: b29b uxth r3, r3
8005fa2: 8013 strh r3, [r2, #0]
8005fa4: e192 b.n 80062cc <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005fa6: 687a ldr r2, [r7, #4]
8005fa8: 683b ldr r3, [r7, #0]
8005faa: 781b ldrb r3, [r3, #0]
8005fac: 009b lsls r3, r3, #2
8005fae: 4413 add r3, r2
8005fb0: 881b ldrh r3, [r3, #0]
8005fb2: 827b strh r3, [r7, #18]
8005fb4: 8a7b ldrh r3, [r7, #18]
8005fb6: f403 4380 and.w r3, r3, #16384 ; 0x4000
8005fba: 2b00 cmp r3, #0
8005fbc: d01b beq.n 8005ff6 <USB_DeactivateEndpoint+0xf6>
8005fbe: 687a ldr r2, [r7, #4]
8005fc0: 683b ldr r3, [r7, #0]
8005fc2: 781b ldrb r3, [r3, #0]
8005fc4: 009b lsls r3, r3, #2
8005fc6: 4413 add r3, r2
8005fc8: 881b ldrh r3, [r3, #0]
8005fca: b29b uxth r3, r3
8005fcc: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005fd0: f023 0370 bic.w r3, r3, #112 ; 0x70
8005fd4: 823b strh r3, [r7, #16]
8005fd6: 687a ldr r2, [r7, #4]
8005fd8: 683b ldr r3, [r7, #0]
8005fda: 781b ldrb r3, [r3, #0]
8005fdc: 009b lsls r3, r3, #2
8005fde: 441a add r2, r3
8005fe0: 8a3b ldrh r3, [r7, #16]
8005fe2: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005fe6: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005fea: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8005fee: f043 0380 orr.w r3, r3, #128 ; 0x80
8005ff2: b29b uxth r3, r3
8005ff4: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005ff6: 687a ldr r2, [r7, #4]
8005ff8: 683b ldr r3, [r7, #0]
8005ffa: 781b ldrb r3, [r3, #0]
8005ffc: 009b lsls r3, r3, #2
8005ffe: 4413 add r3, r2
8006000: 881b ldrh r3, [r3, #0]
8006002: b29b uxth r3, r3
8006004: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8006008: f023 0370 bic.w r3, r3, #112 ; 0x70
800600c: 81fb strh r3, [r7, #14]
800600e: 687a ldr r2, [r7, #4]
8006010: 683b ldr r3, [r7, #0]
8006012: 781b ldrb r3, [r3, #0]
8006014: 009b lsls r3, r3, #2
8006016: 441a add r2, r3
8006018: 89fb ldrh r3, [r7, #14]
800601a: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800601e: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006022: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006026: f043 0380 orr.w r3, r3, #128 ; 0x80
800602a: b29b uxth r3, r3
800602c: 8013 strh r3, [r2, #0]
800602e: e14d b.n 80062cc <USB_DeactivateEndpoint+0x3cc>
}
}
/*Double Buffer*/
else
{
if (ep->is_in == 0U)
8006030: 683b ldr r3, [r7, #0]
8006032: 785b ldrb r3, [r3, #1]
8006034: 2b00 cmp r3, #0
8006036: f040 80a5 bne.w 8006184 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800603a: 687a ldr r2, [r7, #4]
800603c: 683b ldr r3, [r7, #0]
800603e: 781b ldrb r3, [r3, #0]
8006040: 009b lsls r3, r3, #2
8006042: 4413 add r3, r2
8006044: 881b ldrh r3, [r3, #0]
8006046: 843b strh r3, [r7, #32]
8006048: 8c3b ldrh r3, [r7, #32]
800604a: f403 4380 and.w r3, r3, #16384 ; 0x4000
800604e: 2b00 cmp r3, #0
8006050: d01b beq.n 800608a <USB_DeactivateEndpoint+0x18a>
8006052: 687a ldr r2, [r7, #4]
8006054: 683b ldr r3, [r7, #0]
8006056: 781b ldrb r3, [r3, #0]
8006058: 009b lsls r3, r3, #2
800605a: 4413 add r3, r2
800605c: 881b ldrh r3, [r3, #0]
800605e: b29b uxth r3, r3
8006060: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006064: f023 0370 bic.w r3, r3, #112 ; 0x70
8006068: 83fb strh r3, [r7, #30]
800606a: 687a ldr r2, [r7, #4]
800606c: 683b ldr r3, [r7, #0]
800606e: 781b ldrb r3, [r3, #0]
8006070: 009b lsls r3, r3, #2
8006072: 441a add r2, r3
8006074: 8bfb ldrh r3, [r7, #30]
8006076: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800607a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800607e: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8006082: f043 0380 orr.w r3, r3, #128 ; 0x80
8006086: b29b uxth r3, r3
8006088: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800608a: 687a ldr r2, [r7, #4]
800608c: 683b ldr r3, [r7, #0]
800608e: 781b ldrb r3, [r3, #0]
8006090: 009b lsls r3, r3, #2
8006092: 4413 add r3, r2
8006094: 881b ldrh r3, [r3, #0]
8006096: 83bb strh r3, [r7, #28]
8006098: 8bbb ldrh r3, [r7, #28]
800609a: f003 0340 and.w r3, r3, #64 ; 0x40
800609e: 2b00 cmp r3, #0
80060a0: d01b beq.n 80060da <USB_DeactivateEndpoint+0x1da>
80060a2: 687a ldr r2, [r7, #4]
80060a4: 683b ldr r3, [r7, #0]
80060a6: 781b ldrb r3, [r3, #0]
80060a8: 009b lsls r3, r3, #2
80060aa: 4413 add r3, r2
80060ac: 881b ldrh r3, [r3, #0]
80060ae: b29b uxth r3, r3
80060b0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80060b4: f023 0370 bic.w r3, r3, #112 ; 0x70
80060b8: 837b strh r3, [r7, #26]
80060ba: 687a ldr r2, [r7, #4]
80060bc: 683b ldr r3, [r7, #0]
80060be: 781b ldrb r3, [r3, #0]
80060c0: 009b lsls r3, r3, #2
80060c2: 441a add r2, r3
80060c4: 8b7b ldrh r3, [r7, #26]
80060c6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80060ca: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80060ce: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80060d2: f043 03c0 orr.w r3, r3, #192 ; 0xc0
80060d6: b29b uxth r3, r3
80060d8: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
80060da: 687a ldr r2, [r7, #4]
80060dc: 683b ldr r3, [r7, #0]
80060de: 781b ldrb r3, [r3, #0]
80060e0: 009b lsls r3, r3, #2
80060e2: 4413 add r3, r2
80060e4: 881b ldrh r3, [r3, #0]
80060e6: b29b uxth r3, r3
80060e8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80060ec: f023 0370 bic.w r3, r3, #112 ; 0x70
80060f0: 833b strh r3, [r7, #24]
80060f2: 687a ldr r2, [r7, #4]
80060f4: 683b ldr r3, [r7, #0]
80060f6: 781b ldrb r3, [r3, #0]
80060f8: 009b lsls r3, r3, #2
80060fa: 441a add r2, r3
80060fc: 8b3b ldrh r3, [r7, #24]
80060fe: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006102: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006106: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800610a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
800610e: b29b uxth r3, r3
8006110: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8006112: 687a ldr r2, [r7, #4]
8006114: 683b ldr r3, [r7, #0]
8006116: 781b ldrb r3, [r3, #0]
8006118: 009b lsls r3, r3, #2
800611a: 4413 add r3, r2
800611c: 881b ldrh r3, [r3, #0]
800611e: b29b uxth r3, r3
8006120: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8006124: f023 0370 bic.w r3, r3, #112 ; 0x70
8006128: 82fb strh r3, [r7, #22]
800612a: 687a ldr r2, [r7, #4]
800612c: 683b ldr r3, [r7, #0]
800612e: 781b ldrb r3, [r3, #0]
8006130: 009b lsls r3, r3, #2
8006132: 441a add r2, r3
8006134: 8afb ldrh r3, [r7, #22]
8006136: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800613a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800613e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006142: f043 0380 orr.w r3, r3, #128 ; 0x80
8006146: b29b uxth r3, r3
8006148: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800614a: 687a ldr r2, [r7, #4]
800614c: 683b ldr r3, [r7, #0]
800614e: 781b ldrb r3, [r3, #0]
8006150: 009b lsls r3, r3, #2
8006152: 4413 add r3, r2
8006154: 881b ldrh r3, [r3, #0]
8006156: b29b uxth r3, r3
8006158: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800615c: f023 0340 bic.w r3, r3, #64 ; 0x40
8006160: 82bb strh r3, [r7, #20]
8006162: 687a ldr r2, [r7, #4]
8006164: 683b ldr r3, [r7, #0]
8006166: 781b ldrb r3, [r3, #0]
8006168: 009b lsls r3, r3, #2
800616a: 441a add r2, r3
800616c: 8abb ldrh r3, [r7, #20]
800616e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006172: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006176: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800617a: f043 0380 orr.w r3, r3, #128 ; 0x80
800617e: b29b uxth r3, r3
8006180: 8013 strh r3, [r2, #0]
8006182: e0a3 b.n 80062cc <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006184: 687a ldr r2, [r7, #4]
8006186: 683b ldr r3, [r7, #0]
8006188: 781b ldrb r3, [r3, #0]
800618a: 009b lsls r3, r3, #2
800618c: 4413 add r3, r2
800618e: 881b ldrh r3, [r3, #0]
8006190: 85fb strh r3, [r7, #46] ; 0x2e
8006192: 8dfb ldrh r3, [r7, #46] ; 0x2e
8006194: f403 4380 and.w r3, r3, #16384 ; 0x4000
8006198: 2b00 cmp r3, #0
800619a: d01b beq.n 80061d4 <USB_DeactivateEndpoint+0x2d4>
800619c: 687a ldr r2, [r7, #4]
800619e: 683b ldr r3, [r7, #0]
80061a0: 781b ldrb r3, [r3, #0]
80061a2: 009b lsls r3, r3, #2
80061a4: 4413 add r3, r2
80061a6: 881b ldrh r3, [r3, #0]
80061a8: b29b uxth r3, r3
80061aa: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80061ae: f023 0370 bic.w r3, r3, #112 ; 0x70
80061b2: 85bb strh r3, [r7, #44] ; 0x2c
80061b4: 687a ldr r2, [r7, #4]
80061b6: 683b ldr r3, [r7, #0]
80061b8: 781b ldrb r3, [r3, #0]
80061ba: 009b lsls r3, r3, #2
80061bc: 441a add r2, r3
80061be: 8dbb ldrh r3, [r7, #44] ; 0x2c
80061c0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80061c4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80061c8: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80061cc: f043 0380 orr.w r3, r3, #128 ; 0x80
80061d0: b29b uxth r3, r3
80061d2: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80061d4: 687a ldr r2, [r7, #4]
80061d6: 683b ldr r3, [r7, #0]
80061d8: 781b ldrb r3, [r3, #0]
80061da: 009b lsls r3, r3, #2
80061dc: 4413 add r3, r2
80061de: 881b ldrh r3, [r3, #0]
80061e0: 857b strh r3, [r7, #42] ; 0x2a
80061e2: 8d7b ldrh r3, [r7, #42] ; 0x2a
80061e4: f003 0340 and.w r3, r3, #64 ; 0x40
80061e8: 2b00 cmp r3, #0
80061ea: d01b beq.n 8006224 <USB_DeactivateEndpoint+0x324>
80061ec: 687a ldr r2, [r7, #4]
80061ee: 683b ldr r3, [r7, #0]
80061f0: 781b ldrb r3, [r3, #0]
80061f2: 009b lsls r3, r3, #2
80061f4: 4413 add r3, r2
80061f6: 881b ldrh r3, [r3, #0]
80061f8: b29b uxth r3, r3
80061fa: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80061fe: f023 0370 bic.w r3, r3, #112 ; 0x70
8006202: 853b strh r3, [r7, #40] ; 0x28
8006204: 687a ldr r2, [r7, #4]
8006206: 683b ldr r3, [r7, #0]
8006208: 781b ldrb r3, [r3, #0]
800620a: 009b lsls r3, r3, #2
800620c: 441a add r2, r3
800620e: 8d3b ldrh r3, [r7, #40] ; 0x28
8006210: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006214: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006218: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800621c: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8006220: b29b uxth r3, r3
8006222: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8006224: 687a ldr r2, [r7, #4]
8006226: 683b ldr r3, [r7, #0]
8006228: 781b ldrb r3, [r3, #0]
800622a: 009b lsls r3, r3, #2
800622c: 4413 add r3, r2
800622e: 881b ldrh r3, [r3, #0]
8006230: b29b uxth r3, r3
8006232: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006236: f023 0370 bic.w r3, r3, #112 ; 0x70
800623a: 84fb strh r3, [r7, #38] ; 0x26
800623c: 687a ldr r2, [r7, #4]
800623e: 683b ldr r3, [r7, #0]
8006240: 781b ldrb r3, [r3, #0]
8006242: 009b lsls r3, r3, #2
8006244: 441a add r2, r3
8006246: 8cfb ldrh r3, [r7, #38] ; 0x26
8006248: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800624c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006250: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8006254: f043 0380 orr.w r3, r3, #128 ; 0x80
8006258: b29b uxth r3, r3
800625a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800625c: 687a ldr r2, [r7, #4]
800625e: 683b ldr r3, [r7, #0]
8006260: 781b ldrb r3, [r3, #0]
8006262: 009b lsls r3, r3, #2
8006264: 4413 add r3, r2
8006266: 881b ldrh r3, [r3, #0]
8006268: b29b uxth r3, r3
800626a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800626e: f023 0340 bic.w r3, r3, #64 ; 0x40
8006272: 84bb strh r3, [r7, #36] ; 0x24
8006274: 687a ldr r2, [r7, #4]
8006276: 683b ldr r3, [r7, #0]
8006278: 781b ldrb r3, [r3, #0]
800627a: 009b lsls r3, r3, #2
800627c: 441a add r2, r3
800627e: 8cbb ldrh r3, [r7, #36] ; 0x24
8006280: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006284: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006288: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800628c: f043 0380 orr.w r3, r3, #128 ; 0x80
8006290: b29b uxth r3, r3
8006292: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8006294: 687a ldr r2, [r7, #4]
8006296: 683b ldr r3, [r7, #0]
8006298: 781b ldrb r3, [r3, #0]
800629a: 009b lsls r3, r3, #2
800629c: 4413 add r3, r2
800629e: 881b ldrh r3, [r3, #0]
80062a0: b29b uxth r3, r3
80062a2: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80062a6: f023 0370 bic.w r3, r3, #112 ; 0x70
80062aa: 847b strh r3, [r7, #34] ; 0x22
80062ac: 687a ldr r2, [r7, #4]
80062ae: 683b ldr r3, [r7, #0]
80062b0: 781b ldrb r3, [r3, #0]
80062b2: 009b lsls r3, r3, #2
80062b4: 441a add r2, r3
80062b6: 8c7b ldrh r3, [r7, #34] ; 0x22
80062b8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80062bc: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80062c0: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80062c4: f043 0380 orr.w r3, r3, #128 ; 0x80
80062c8: b29b uxth r3, r3
80062ca: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
80062cc: 2300 movs r3, #0
}
80062ce: 4618 mov r0, r3
80062d0: 3734 adds r7, #52 ; 0x34
80062d2: 46bd mov sp, r7
80062d4: f85d 7b04 ldr.w r7, [sp], #4
80062d8: 4770 bx lr
080062da <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80062da: b580 push {r7, lr}
80062dc: b0c2 sub sp, #264 ; 0x108
80062de: af00 add r7, sp, #0
80062e0: f507 7384 add.w r3, r7, #264 ; 0x108
80062e4: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80062e8: 6018 str r0, [r3, #0]
80062ea: f507 7384 add.w r3, r7, #264 ; 0x108
80062ee: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80062f2: 6019 str r1, [r3, #0]
uint32_t len;
uint16_t pmabuffer;
uint16_t wEPVal;
/* IN endpoint */
if (ep->is_in == 1U)
80062f4: f507 7384 add.w r3, r7, #264 ; 0x108
80062f8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80062fc: 681b ldr r3, [r3, #0]
80062fe: 785b ldrb r3, [r3, #1]
8006300: 2b01 cmp r3, #1
8006302: f040 867b bne.w 8006ffc <USB_EPStartXfer+0xd22>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8006306: f507 7384 add.w r3, r7, #264 ; 0x108
800630a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800630e: 681b ldr r3, [r3, #0]
8006310: 699a ldr r2, [r3, #24]
8006312: f507 7384 add.w r3, r7, #264 ; 0x108
8006316: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800631a: 681b ldr r3, [r3, #0]
800631c: 691b ldr r3, [r3, #16]
800631e: 429a cmp r2, r3
8006320: d908 bls.n 8006334 <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8006322: f507 7384 add.w r3, r7, #264 ; 0x108
8006326: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800632a: 681b ldr r3, [r3, #0]
800632c: 691b ldr r3, [r3, #16]
800632e: f8c7 3104 str.w r3, [r7, #260] ; 0x104
8006332: e007 b.n 8006344 <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8006334: f507 7384 add.w r3, r7, #264 ; 0x108
8006338: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800633c: 681b ldr r3, [r3, #0]
800633e: 699b ldr r3, [r3, #24]
8006340: f8c7 3104 str.w r3, [r7, #260] ; 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8006344: f507 7384 add.w r3, r7, #264 ; 0x108
8006348: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800634c: 681b ldr r3, [r3, #0]
800634e: 7b1b ldrb r3, [r3, #12]
8006350: 2b00 cmp r3, #0
8006352: d13a bne.n 80063ca <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8006354: f507 7384 add.w r3, r7, #264 ; 0x108
8006358: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800635c: 681b ldr r3, [r3, #0]
800635e: 6959 ldr r1, [r3, #20]
8006360: f507 7384 add.w r3, r7, #264 ; 0x108
8006364: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006368: 681b ldr r3, [r3, #0]
800636a: 88da ldrh r2, [r3, #6]
800636c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006370: b29b uxth r3, r3
8006372: f507 7084 add.w r0, r7, #264 ; 0x108
8006376: f5a0 7082 sub.w r0, r0, #260 ; 0x104
800637a: 6800 ldr r0, [r0, #0]
800637c: f001 fc11 bl 8007ba2 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8006380: f507 7384 add.w r3, r7, #264 ; 0x108
8006384: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006388: 681b ldr r3, [r3, #0]
800638a: 613b str r3, [r7, #16]
800638c: f507 7384 add.w r3, r7, #264 ; 0x108
8006390: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006394: 681b ldr r3, [r3, #0]
8006396: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800639a: b29b uxth r3, r3
800639c: 461a mov r2, r3
800639e: 693b ldr r3, [r7, #16]
80063a0: 4413 add r3, r2
80063a2: 613b str r3, [r7, #16]
80063a4: f507 7384 add.w r3, r7, #264 ; 0x108
80063a8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80063ac: 681b ldr r3, [r3, #0]
80063ae: 781b ldrb r3, [r3, #0]
80063b0: 011a lsls r2, r3, #4
80063b2: 693b ldr r3, [r7, #16]
80063b4: 4413 add r3, r2
80063b6: f203 4304 addw r3, r3, #1028 ; 0x404
80063ba: 60fb str r3, [r7, #12]
80063bc: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80063c0: b29a uxth r2, r3
80063c2: 68fb ldr r3, [r7, #12]
80063c4: 801a strh r2, [r3, #0]
80063c6: f000 bde3 b.w 8006f90 <USB_EPStartXfer+0xcb6>
}
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
80063ca: f507 7384 add.w r3, r7, #264 ; 0x108
80063ce: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80063d2: 681b ldr r3, [r3, #0]
80063d4: 78db ldrb r3, [r3, #3]
80063d6: 2b02 cmp r3, #2
80063d8: f040 843a bne.w 8006c50 <USB_EPStartXfer+0x976>
{
if (ep->xfer_len_db > ep->maxpacket)
80063dc: f507 7384 add.w r3, r7, #264 ; 0x108
80063e0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80063e4: 681b ldr r3, [r3, #0]
80063e6: 6a1a ldr r2, [r3, #32]
80063e8: f507 7384 add.w r3, r7, #264 ; 0x108
80063ec: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80063f0: 681b ldr r3, [r3, #0]
80063f2: 691b ldr r3, [r3, #16]
80063f4: 429a cmp r2, r3
80063f6: f240 83b7 bls.w 8006b68 <USB_EPStartXfer+0x88e>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
80063fa: f507 7384 add.w r3, r7, #264 ; 0x108
80063fe: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006402: 681a ldr r2, [r3, #0]
8006404: f507 7384 add.w r3, r7, #264 ; 0x108
8006408: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800640c: 681b ldr r3, [r3, #0]
800640e: 781b ldrb r3, [r3, #0]
8006410: 009b lsls r3, r3, #2
8006412: 4413 add r3, r2
8006414: 881b ldrh r3, [r3, #0]
8006416: b29b uxth r3, r3
8006418: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800641c: f023 0370 bic.w r3, r3, #112 ; 0x70
8006420: f8a7 3056 strh.w r3, [r7, #86] ; 0x56
8006424: f507 7384 add.w r3, r7, #264 ; 0x108
8006428: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800642c: 681a ldr r2, [r3, #0]
800642e: f507 7384 add.w r3, r7, #264 ; 0x108
8006432: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006436: 681b ldr r3, [r3, #0]
8006438: 781b ldrb r3, [r3, #0]
800643a: 009b lsls r3, r3, #2
800643c: 441a add r2, r3
800643e: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56
8006442: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006446: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800644a: f443 4301 orr.w r3, r3, #33024 ; 0x8100
800644e: f043 0380 orr.w r3, r3, #128 ; 0x80
8006452: b29b uxth r3, r3
8006454: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8006456: f507 7384 add.w r3, r7, #264 ; 0x108
800645a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800645e: 681b ldr r3, [r3, #0]
8006460: 6a1a ldr r2, [r3, #32]
8006462: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006466: 1ad2 subs r2, r2, r3
8006468: f507 7384 add.w r3, r7, #264 ; 0x108
800646c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006470: 681b ldr r3, [r3, #0]
8006472: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8006474: f507 7384 add.w r3, r7, #264 ; 0x108
8006478: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800647c: 681a ldr r2, [r3, #0]
800647e: f507 7384 add.w r3, r7, #264 ; 0x108
8006482: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006486: 681b ldr r3, [r3, #0]
8006488: 781b ldrb r3, [r3, #0]
800648a: 009b lsls r3, r3, #2
800648c: 4413 add r3, r2
800648e: 881b ldrh r3, [r3, #0]
8006490: b29b uxth r3, r3
8006492: f003 0340 and.w r3, r3, #64 ; 0x40
8006496: 2b00 cmp r3, #0
8006498: f000 81b3 beq.w 8006802 <USB_EPStartXfer+0x528>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800649c: f507 7384 add.w r3, r7, #264 ; 0x108
80064a0: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80064a4: 681b ldr r3, [r3, #0]
80064a6: 633b str r3, [r7, #48] ; 0x30
80064a8: f507 7384 add.w r3, r7, #264 ; 0x108
80064ac: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80064b0: 681b ldr r3, [r3, #0]
80064b2: 785b ldrb r3, [r3, #1]
80064b4: 2b00 cmp r3, #0
80064b6: d16d bne.n 8006594 <USB_EPStartXfer+0x2ba>
80064b8: f507 7384 add.w r3, r7, #264 ; 0x108
80064bc: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80064c0: 681b ldr r3, [r3, #0]
80064c2: 62bb str r3, [r7, #40] ; 0x28
80064c4: f507 7384 add.w r3, r7, #264 ; 0x108
80064c8: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80064cc: 681b ldr r3, [r3, #0]
80064ce: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80064d2: b29b uxth r3, r3
80064d4: 461a mov r2, r3
80064d6: 6abb ldr r3, [r7, #40] ; 0x28
80064d8: 4413 add r3, r2
80064da: 62bb str r3, [r7, #40] ; 0x28
80064dc: f507 7384 add.w r3, r7, #264 ; 0x108
80064e0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80064e4: 681b ldr r3, [r3, #0]
80064e6: 781b ldrb r3, [r3, #0]
80064e8: 011a lsls r2, r3, #4
80064ea: 6abb ldr r3, [r7, #40] ; 0x28
80064ec: 4413 add r3, r2
80064ee: f203 430c addw r3, r3, #1036 ; 0x40c
80064f2: 627b str r3, [r7, #36] ; 0x24
80064f4: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80064f8: 2b00 cmp r3, #0
80064fa: d112 bne.n 8006522 <USB_EPStartXfer+0x248>
80064fc: 6a7b ldr r3, [r7, #36] ; 0x24
80064fe: 881b ldrh r3, [r3, #0]
8006500: b29b uxth r3, r3
8006502: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006506: b29a uxth r2, r3
8006508: 6a7b ldr r3, [r7, #36] ; 0x24
800650a: 801a strh r2, [r3, #0]
800650c: 6a7b ldr r3, [r7, #36] ; 0x24
800650e: 881b ldrh r3, [r3, #0]
8006510: b29b uxth r3, r3
8006512: ea6f 4343 mvn.w r3, r3, lsl #17
8006516: ea6f 4353 mvn.w r3, r3, lsr #17
800651a: b29a uxth r2, r3
800651c: 6a7b ldr r3, [r7, #36] ; 0x24
800651e: 801a strh r2, [r3, #0]
8006520: e05d b.n 80065de <USB_EPStartXfer+0x304>
8006522: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006526: 2b3e cmp r3, #62 ; 0x3e
8006528: d817 bhi.n 800655a <USB_EPStartXfer+0x280>
800652a: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800652e: 085b lsrs r3, r3, #1
8006530: f8c7 3100 str.w r3, [r7, #256] ; 0x100
8006534: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006538: f003 0301 and.w r3, r3, #1
800653c: 2b00 cmp r3, #0
800653e: d004 beq.n 800654a <USB_EPStartXfer+0x270>
8006540: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8006544: 3301 adds r3, #1
8006546: f8c7 3100 str.w r3, [r7, #256] ; 0x100
800654a: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
800654e: b29b uxth r3, r3
8006550: 029b lsls r3, r3, #10
8006552: b29a uxth r2, r3
8006554: 6a7b ldr r3, [r7, #36] ; 0x24
8006556: 801a strh r2, [r3, #0]
8006558: e041 b.n 80065de <USB_EPStartXfer+0x304>
800655a: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800655e: 095b lsrs r3, r3, #5
8006560: f8c7 3100 str.w r3, [r7, #256] ; 0x100
8006564: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006568: f003 031f and.w r3, r3, #31
800656c: 2b00 cmp r3, #0
800656e: d104 bne.n 800657a <USB_EPStartXfer+0x2a0>
8006570: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8006574: 3b01 subs r3, #1
8006576: f8c7 3100 str.w r3, [r7, #256] ; 0x100
800657a: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
800657e: b29b uxth r3, r3
8006580: 029b lsls r3, r3, #10
8006582: b29b uxth r3, r3
8006584: ea6f 4343 mvn.w r3, r3, lsl #17
8006588: ea6f 4353 mvn.w r3, r3, lsr #17
800658c: b29a uxth r2, r3
800658e: 6a7b ldr r3, [r7, #36] ; 0x24
8006590: 801a strh r2, [r3, #0]
8006592: e024 b.n 80065de <USB_EPStartXfer+0x304>
8006594: f507 7384 add.w r3, r7, #264 ; 0x108
8006598: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800659c: 681b ldr r3, [r3, #0]
800659e: 785b ldrb r3, [r3, #1]
80065a0: 2b01 cmp r3, #1
80065a2: d11c bne.n 80065de <USB_EPStartXfer+0x304>
80065a4: f507 7384 add.w r3, r7, #264 ; 0x108
80065a8: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80065ac: 681b ldr r3, [r3, #0]
80065ae: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80065b2: b29b uxth r3, r3
80065b4: 461a mov r2, r3
80065b6: 6b3b ldr r3, [r7, #48] ; 0x30
80065b8: 4413 add r3, r2
80065ba: 633b str r3, [r7, #48] ; 0x30
80065bc: f507 7384 add.w r3, r7, #264 ; 0x108
80065c0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80065c4: 681b ldr r3, [r3, #0]
80065c6: 781b ldrb r3, [r3, #0]
80065c8: 011a lsls r2, r3, #4
80065ca: 6b3b ldr r3, [r7, #48] ; 0x30
80065cc: 4413 add r3, r2
80065ce: f203 430c addw r3, r3, #1036 ; 0x40c
80065d2: 62fb str r3, [r7, #44] ; 0x2c
80065d4: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80065d8: b29a uxth r2, r3
80065da: 6afb ldr r3, [r7, #44] ; 0x2c
80065dc: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
80065de: f507 7384 add.w r3, r7, #264 ; 0x108
80065e2: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80065e6: 681b ldr r3, [r3, #0]
80065e8: 895b ldrh r3, [r3, #10]
80065ea: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80065ee: f507 7384 add.w r3, r7, #264 ; 0x108
80065f2: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80065f6: 681b ldr r3, [r3, #0]
80065f8: 6959 ldr r1, [r3, #20]
80065fa: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80065fe: b29b uxth r3, r3
8006600: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
8006604: f507 7084 add.w r0, r7, #264 ; 0x108
8006608: f5a0 7082 sub.w r0, r0, #260 ; 0x104
800660c: 6800 ldr r0, [r0, #0]
800660e: f001 fac8 bl 8007ba2 <USB_WritePMA>
ep->xfer_buff += len;
8006612: f507 7384 add.w r3, r7, #264 ; 0x108
8006616: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800661a: 681b ldr r3, [r3, #0]
800661c: 695a ldr r2, [r3, #20]
800661e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006622: 441a add r2, r3
8006624: f507 7384 add.w r3, r7, #264 ; 0x108
8006628: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800662c: 681b ldr r3, [r3, #0]
800662e: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8006630: f507 7384 add.w r3, r7, #264 ; 0x108
8006634: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006638: 681b ldr r3, [r3, #0]
800663a: 6a1a ldr r2, [r3, #32]
800663c: f507 7384 add.w r3, r7, #264 ; 0x108
8006640: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006644: 681b ldr r3, [r3, #0]
8006646: 691b ldr r3, [r3, #16]
8006648: 429a cmp r2, r3
800664a: d90f bls.n 800666c <USB_EPStartXfer+0x392>
{
ep->xfer_len_db -= len;
800664c: f507 7384 add.w r3, r7, #264 ; 0x108
8006650: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006654: 681b ldr r3, [r3, #0]
8006656: 6a1a ldr r2, [r3, #32]
8006658: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800665c: 1ad2 subs r2, r2, r3
800665e: f507 7384 add.w r3, r7, #264 ; 0x108
8006662: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006666: 681b ldr r3, [r3, #0]
8006668: 621a str r2, [r3, #32]
800666a: e00e b.n 800668a <USB_EPStartXfer+0x3b0>
}
else
{
len = ep->xfer_len_db;
800666c: f507 7384 add.w r3, r7, #264 ; 0x108
8006670: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006674: 681b ldr r3, [r3, #0]
8006676: 6a1b ldr r3, [r3, #32]
8006678: f8c7 3104 str.w r3, [r7, #260] ; 0x104
ep->xfer_len_db = 0U;
800667c: f507 7384 add.w r3, r7, #264 ; 0x108
8006680: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006684: 681b ldr r3, [r3, #0]
8006686: 2200 movs r2, #0
8006688: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800668a: f507 7384 add.w r3, r7, #264 ; 0x108
800668e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006692: 681b ldr r3, [r3, #0]
8006694: 785b ldrb r3, [r3, #1]
8006696: 2b00 cmp r3, #0
8006698: d16d bne.n 8006776 <USB_EPStartXfer+0x49c>
800669a: f507 7384 add.w r3, r7, #264 ; 0x108
800669e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80066a2: 681b ldr r3, [r3, #0]
80066a4: 61bb str r3, [r7, #24]
80066a6: f507 7384 add.w r3, r7, #264 ; 0x108
80066aa: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80066ae: 681b ldr r3, [r3, #0]
80066b0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80066b4: b29b uxth r3, r3
80066b6: 461a mov r2, r3
80066b8: 69bb ldr r3, [r7, #24]
80066ba: 4413 add r3, r2
80066bc: 61bb str r3, [r7, #24]
80066be: f507 7384 add.w r3, r7, #264 ; 0x108
80066c2: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80066c6: 681b ldr r3, [r3, #0]
80066c8: 781b ldrb r3, [r3, #0]
80066ca: 011a lsls r2, r3, #4
80066cc: 69bb ldr r3, [r7, #24]
80066ce: 4413 add r3, r2
80066d0: f203 4304 addw r3, r3, #1028 ; 0x404
80066d4: 617b str r3, [r7, #20]
80066d6: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80066da: 2b00 cmp r3, #0
80066dc: d112 bne.n 8006704 <USB_EPStartXfer+0x42a>
80066de: 697b ldr r3, [r7, #20]
80066e0: 881b ldrh r3, [r3, #0]
80066e2: b29b uxth r3, r3
80066e4: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80066e8: b29a uxth r2, r3
80066ea: 697b ldr r3, [r7, #20]
80066ec: 801a strh r2, [r3, #0]
80066ee: 697b ldr r3, [r7, #20]
80066f0: 881b ldrh r3, [r3, #0]
80066f2: b29b uxth r3, r3
80066f4: ea6f 4343 mvn.w r3, r3, lsl #17
80066f8: ea6f 4353 mvn.w r3, r3, lsr #17
80066fc: b29a uxth r2, r3
80066fe: 697b ldr r3, [r7, #20]
8006700: 801a strh r2, [r3, #0]
8006702: e063 b.n 80067cc <USB_EPStartXfer+0x4f2>
8006704: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006708: 2b3e cmp r3, #62 ; 0x3e
800670a: d817 bhi.n 800673c <USB_EPStartXfer+0x462>
800670c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006710: 085b lsrs r3, r3, #1
8006712: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8006716: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800671a: f003 0301 and.w r3, r3, #1
800671e: 2b00 cmp r3, #0
8006720: d004 beq.n 800672c <USB_EPStartXfer+0x452>
8006722: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8006726: 3301 adds r3, #1
8006728: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
800672c: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8006730: b29b uxth r3, r3
8006732: 029b lsls r3, r3, #10
8006734: b29a uxth r2, r3
8006736: 697b ldr r3, [r7, #20]
8006738: 801a strh r2, [r3, #0]
800673a: e047 b.n 80067cc <USB_EPStartXfer+0x4f2>
800673c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006740: 095b lsrs r3, r3, #5
8006742: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8006746: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800674a: f003 031f and.w r3, r3, #31
800674e: 2b00 cmp r3, #0
8006750: d104 bne.n 800675c <USB_EPStartXfer+0x482>
8006752: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8006756: 3b01 subs r3, #1
8006758: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
800675c: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8006760: b29b uxth r3, r3
8006762: 029b lsls r3, r3, #10
8006764: b29b uxth r3, r3
8006766: ea6f 4343 mvn.w r3, r3, lsl #17
800676a: ea6f 4353 mvn.w r3, r3, lsr #17
800676e: b29a uxth r2, r3
8006770: 697b ldr r3, [r7, #20]
8006772: 801a strh r2, [r3, #0]
8006774: e02a b.n 80067cc <USB_EPStartXfer+0x4f2>
8006776: f507 7384 add.w r3, r7, #264 ; 0x108
800677a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800677e: 681b ldr r3, [r3, #0]
8006780: 785b ldrb r3, [r3, #1]
8006782: 2b01 cmp r3, #1
8006784: d122 bne.n 80067cc <USB_EPStartXfer+0x4f2>
8006786: f507 7384 add.w r3, r7, #264 ; 0x108
800678a: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800678e: 681b ldr r3, [r3, #0]
8006790: 623b str r3, [r7, #32]
8006792: f507 7384 add.w r3, r7, #264 ; 0x108
8006796: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800679a: 681b ldr r3, [r3, #0]
800679c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80067a0: b29b uxth r3, r3
80067a2: 461a mov r2, r3
80067a4: 6a3b ldr r3, [r7, #32]
80067a6: 4413 add r3, r2
80067a8: 623b str r3, [r7, #32]
80067aa: f507 7384 add.w r3, r7, #264 ; 0x108
80067ae: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80067b2: 681b ldr r3, [r3, #0]
80067b4: 781b ldrb r3, [r3, #0]
80067b6: 011a lsls r2, r3, #4
80067b8: 6a3b ldr r3, [r7, #32]
80067ba: 4413 add r3, r2
80067bc: f203 4304 addw r3, r3, #1028 ; 0x404
80067c0: 61fb str r3, [r7, #28]
80067c2: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80067c6: b29a uxth r2, r3
80067c8: 69fb ldr r3, [r7, #28]
80067ca: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80067cc: f507 7384 add.w r3, r7, #264 ; 0x108
80067d0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80067d4: 681b ldr r3, [r3, #0]
80067d6: 891b ldrh r3, [r3, #8]
80067d8: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80067dc: f507 7384 add.w r3, r7, #264 ; 0x108
80067e0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80067e4: 681b ldr r3, [r3, #0]
80067e6: 6959 ldr r1, [r3, #20]
80067e8: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80067ec: b29b uxth r3, r3
80067ee: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
80067f2: f507 7084 add.w r0, r7, #264 ; 0x108
80067f6: f5a0 7082 sub.w r0, r0, #260 ; 0x104
80067fa: 6800 ldr r0, [r0, #0]
80067fc: f001 f9d1 bl 8007ba2 <USB_WritePMA>
8006800: e3c6 b.n 8006f90 <USB_EPStartXfer+0xcb6>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006802: f507 7384 add.w r3, r7, #264 ; 0x108
8006806: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800680a: 681b ldr r3, [r3, #0]
800680c: 785b ldrb r3, [r3, #1]
800680e: 2b00 cmp r3, #0
8006810: d16d bne.n 80068ee <USB_EPStartXfer+0x614>
8006812: f507 7384 add.w r3, r7, #264 ; 0x108
8006816: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800681a: 681b ldr r3, [r3, #0]
800681c: 64bb str r3, [r7, #72] ; 0x48
800681e: f507 7384 add.w r3, r7, #264 ; 0x108
8006822: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006826: 681b ldr r3, [r3, #0]
8006828: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800682c: b29b uxth r3, r3
800682e: 461a mov r2, r3
8006830: 6cbb ldr r3, [r7, #72] ; 0x48
8006832: 4413 add r3, r2
8006834: 64bb str r3, [r7, #72] ; 0x48
8006836: f507 7384 add.w r3, r7, #264 ; 0x108
800683a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800683e: 681b ldr r3, [r3, #0]
8006840: 781b ldrb r3, [r3, #0]
8006842: 011a lsls r2, r3, #4
8006844: 6cbb ldr r3, [r7, #72] ; 0x48
8006846: 4413 add r3, r2
8006848: f203 4304 addw r3, r3, #1028 ; 0x404
800684c: 647b str r3, [r7, #68] ; 0x44
800684e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006852: 2b00 cmp r3, #0
8006854: d112 bne.n 800687c <USB_EPStartXfer+0x5a2>
8006856: 6c7b ldr r3, [r7, #68] ; 0x44
8006858: 881b ldrh r3, [r3, #0]
800685a: b29b uxth r3, r3
800685c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006860: b29a uxth r2, r3
8006862: 6c7b ldr r3, [r7, #68] ; 0x44
8006864: 801a strh r2, [r3, #0]
8006866: 6c7b ldr r3, [r7, #68] ; 0x44
8006868: 881b ldrh r3, [r3, #0]
800686a: b29b uxth r3, r3
800686c: ea6f 4343 mvn.w r3, r3, lsl #17
8006870: ea6f 4353 mvn.w r3, r3, lsr #17
8006874: b29a uxth r2, r3
8006876: 6c7b ldr r3, [r7, #68] ; 0x44
8006878: 801a strh r2, [r3, #0]
800687a: e063 b.n 8006944 <USB_EPStartXfer+0x66a>
800687c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006880: 2b3e cmp r3, #62 ; 0x3e
8006882: d817 bhi.n 80068b4 <USB_EPStartXfer+0x5da>
8006884: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006888: 085b lsrs r3, r3, #1
800688a: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
800688e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006892: f003 0301 and.w r3, r3, #1
8006896: 2b00 cmp r3, #0
8006898: d004 beq.n 80068a4 <USB_EPStartXfer+0x5ca>
800689a: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
800689e: 3301 adds r3, #1
80068a0: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
80068a4: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
80068a8: b29b uxth r3, r3
80068aa: 029b lsls r3, r3, #10
80068ac: b29a uxth r2, r3
80068ae: 6c7b ldr r3, [r7, #68] ; 0x44
80068b0: 801a strh r2, [r3, #0]
80068b2: e047 b.n 8006944 <USB_EPStartXfer+0x66a>
80068b4: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80068b8: 095b lsrs r3, r3, #5
80068ba: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
80068be: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80068c2: f003 031f and.w r3, r3, #31
80068c6: 2b00 cmp r3, #0
80068c8: d104 bne.n 80068d4 <USB_EPStartXfer+0x5fa>
80068ca: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
80068ce: 3b01 subs r3, #1
80068d0: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
80068d4: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
80068d8: b29b uxth r3, r3
80068da: 029b lsls r3, r3, #10
80068dc: b29b uxth r3, r3
80068de: ea6f 4343 mvn.w r3, r3, lsl #17
80068e2: ea6f 4353 mvn.w r3, r3, lsr #17
80068e6: b29a uxth r2, r3
80068e8: 6c7b ldr r3, [r7, #68] ; 0x44
80068ea: 801a strh r2, [r3, #0]
80068ec: e02a b.n 8006944 <USB_EPStartXfer+0x66a>
80068ee: f507 7384 add.w r3, r7, #264 ; 0x108
80068f2: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80068f6: 681b ldr r3, [r3, #0]
80068f8: 785b ldrb r3, [r3, #1]
80068fa: 2b01 cmp r3, #1
80068fc: d122 bne.n 8006944 <USB_EPStartXfer+0x66a>
80068fe: f507 7384 add.w r3, r7, #264 ; 0x108
8006902: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006906: 681b ldr r3, [r3, #0]
8006908: 653b str r3, [r7, #80] ; 0x50
800690a: f507 7384 add.w r3, r7, #264 ; 0x108
800690e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006912: 681b ldr r3, [r3, #0]
8006914: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006918: b29b uxth r3, r3
800691a: 461a mov r2, r3
800691c: 6d3b ldr r3, [r7, #80] ; 0x50
800691e: 4413 add r3, r2
8006920: 653b str r3, [r7, #80] ; 0x50
8006922: f507 7384 add.w r3, r7, #264 ; 0x108
8006926: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800692a: 681b ldr r3, [r3, #0]
800692c: 781b ldrb r3, [r3, #0]
800692e: 011a lsls r2, r3, #4
8006930: 6d3b ldr r3, [r7, #80] ; 0x50
8006932: 4413 add r3, r2
8006934: f203 4304 addw r3, r3, #1028 ; 0x404
8006938: 64fb str r3, [r7, #76] ; 0x4c
800693a: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800693e: b29a uxth r2, r3
8006940: 6cfb ldr r3, [r7, #76] ; 0x4c
8006942: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006944: f507 7384 add.w r3, r7, #264 ; 0x108
8006948: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800694c: 681b ldr r3, [r3, #0]
800694e: 891b ldrh r3, [r3, #8]
8006950: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006954: f507 7384 add.w r3, r7, #264 ; 0x108
8006958: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800695c: 681b ldr r3, [r3, #0]
800695e: 6959 ldr r1, [r3, #20]
8006960: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006964: b29b uxth r3, r3
8006966: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
800696a: f507 7084 add.w r0, r7, #264 ; 0x108
800696e: f5a0 7082 sub.w r0, r0, #260 ; 0x104
8006972: 6800 ldr r0, [r0, #0]
8006974: f001 f915 bl 8007ba2 <USB_WritePMA>
ep->xfer_buff += len;
8006978: f507 7384 add.w r3, r7, #264 ; 0x108
800697c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006980: 681b ldr r3, [r3, #0]
8006982: 695a ldr r2, [r3, #20]
8006984: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006988: 441a add r2, r3
800698a: f507 7384 add.w r3, r7, #264 ; 0x108
800698e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006992: 681b ldr r3, [r3, #0]
8006994: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8006996: f507 7384 add.w r3, r7, #264 ; 0x108
800699a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800699e: 681b ldr r3, [r3, #0]
80069a0: 6a1a ldr r2, [r3, #32]
80069a2: f507 7384 add.w r3, r7, #264 ; 0x108
80069a6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80069aa: 681b ldr r3, [r3, #0]
80069ac: 691b ldr r3, [r3, #16]
80069ae: 429a cmp r2, r3
80069b0: d90f bls.n 80069d2 <USB_EPStartXfer+0x6f8>
{
ep->xfer_len_db -= len;
80069b2: f507 7384 add.w r3, r7, #264 ; 0x108
80069b6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80069ba: 681b ldr r3, [r3, #0]
80069bc: 6a1a ldr r2, [r3, #32]
80069be: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80069c2: 1ad2 subs r2, r2, r3
80069c4: f507 7384 add.w r3, r7, #264 ; 0x108
80069c8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80069cc: 681b ldr r3, [r3, #0]
80069ce: 621a str r2, [r3, #32]
80069d0: e00e b.n 80069f0 <USB_EPStartXfer+0x716>
}
else
{
len = ep->xfer_len_db;
80069d2: f507 7384 add.w r3, r7, #264 ; 0x108
80069d6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80069da: 681b ldr r3, [r3, #0]
80069dc: 6a1b ldr r3, [r3, #32]
80069de: f8c7 3104 str.w r3, [r7, #260] ; 0x104
ep->xfer_len_db = 0U;
80069e2: f507 7384 add.w r3, r7, #264 ; 0x108
80069e6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80069ea: 681b ldr r3, [r3, #0]
80069ec: 2200 movs r2, #0
80069ee: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80069f0: f507 7384 add.w r3, r7, #264 ; 0x108
80069f4: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80069f8: 681b ldr r3, [r3, #0]
80069fa: 643b str r3, [r7, #64] ; 0x40
80069fc: f507 7384 add.w r3, r7, #264 ; 0x108
8006a00: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006a04: 681b ldr r3, [r3, #0]
8006a06: 785b ldrb r3, [r3, #1]
8006a08: 2b00 cmp r3, #0
8006a0a: d16d bne.n 8006ae8 <USB_EPStartXfer+0x80e>
8006a0c: f507 7384 add.w r3, r7, #264 ; 0x108
8006a10: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006a14: 681b ldr r3, [r3, #0]
8006a16: 63bb str r3, [r7, #56] ; 0x38
8006a18: f507 7384 add.w r3, r7, #264 ; 0x108
8006a1c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006a20: 681b ldr r3, [r3, #0]
8006a22: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006a26: b29b uxth r3, r3
8006a28: 461a mov r2, r3
8006a2a: 6bbb ldr r3, [r7, #56] ; 0x38
8006a2c: 4413 add r3, r2
8006a2e: 63bb str r3, [r7, #56] ; 0x38
8006a30: f507 7384 add.w r3, r7, #264 ; 0x108
8006a34: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006a38: 681b ldr r3, [r3, #0]
8006a3a: 781b ldrb r3, [r3, #0]
8006a3c: 011a lsls r2, r3, #4
8006a3e: 6bbb ldr r3, [r7, #56] ; 0x38
8006a40: 4413 add r3, r2
8006a42: f203 430c addw r3, r3, #1036 ; 0x40c
8006a46: 637b str r3, [r7, #52] ; 0x34
8006a48: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006a4c: 2b00 cmp r3, #0
8006a4e: d112 bne.n 8006a76 <USB_EPStartXfer+0x79c>
8006a50: 6b7b ldr r3, [r7, #52] ; 0x34
8006a52: 881b ldrh r3, [r3, #0]
8006a54: b29b uxth r3, r3
8006a56: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006a5a: b29a uxth r2, r3
8006a5c: 6b7b ldr r3, [r7, #52] ; 0x34
8006a5e: 801a strh r2, [r3, #0]
8006a60: 6b7b ldr r3, [r7, #52] ; 0x34
8006a62: 881b ldrh r3, [r3, #0]
8006a64: b29b uxth r3, r3
8006a66: ea6f 4343 mvn.w r3, r3, lsl #17
8006a6a: ea6f 4353 mvn.w r3, r3, lsr #17
8006a6e: b29a uxth r2, r3
8006a70: 6b7b ldr r3, [r7, #52] ; 0x34
8006a72: 801a strh r2, [r3, #0]
8006a74: e05d b.n 8006b32 <USB_EPStartXfer+0x858>
8006a76: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006a7a: 2b3e cmp r3, #62 ; 0x3e
8006a7c: d817 bhi.n 8006aae <USB_EPStartXfer+0x7d4>
8006a7e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006a82: 085b lsrs r3, r3, #1
8006a84: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
8006a88: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006a8c: f003 0301 and.w r3, r3, #1
8006a90: 2b00 cmp r3, #0
8006a92: d004 beq.n 8006a9e <USB_EPStartXfer+0x7c4>
8006a94: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
8006a98: 3301 adds r3, #1
8006a9a: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
8006a9e: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
8006aa2: b29b uxth r3, r3
8006aa4: 029b lsls r3, r3, #10
8006aa6: b29a uxth r2, r3
8006aa8: 6b7b ldr r3, [r7, #52] ; 0x34
8006aaa: 801a strh r2, [r3, #0]
8006aac: e041 b.n 8006b32 <USB_EPStartXfer+0x858>
8006aae: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006ab2: 095b lsrs r3, r3, #5
8006ab4: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
8006ab8: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006abc: f003 031f and.w r3, r3, #31
8006ac0: 2b00 cmp r3, #0
8006ac2: d104 bne.n 8006ace <USB_EPStartXfer+0x7f4>
8006ac4: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
8006ac8: 3b01 subs r3, #1
8006aca: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
8006ace: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
8006ad2: b29b uxth r3, r3
8006ad4: 029b lsls r3, r3, #10
8006ad6: b29b uxth r3, r3
8006ad8: ea6f 4343 mvn.w r3, r3, lsl #17
8006adc: ea6f 4353 mvn.w r3, r3, lsr #17
8006ae0: b29a uxth r2, r3
8006ae2: 6b7b ldr r3, [r7, #52] ; 0x34
8006ae4: 801a strh r2, [r3, #0]
8006ae6: e024 b.n 8006b32 <USB_EPStartXfer+0x858>
8006ae8: f507 7384 add.w r3, r7, #264 ; 0x108
8006aec: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006af0: 681b ldr r3, [r3, #0]
8006af2: 785b ldrb r3, [r3, #1]
8006af4: 2b01 cmp r3, #1
8006af6: d11c bne.n 8006b32 <USB_EPStartXfer+0x858>
8006af8: f507 7384 add.w r3, r7, #264 ; 0x108
8006afc: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006b00: 681b ldr r3, [r3, #0]
8006b02: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006b06: b29b uxth r3, r3
8006b08: 461a mov r2, r3
8006b0a: 6c3b ldr r3, [r7, #64] ; 0x40
8006b0c: 4413 add r3, r2
8006b0e: 643b str r3, [r7, #64] ; 0x40
8006b10: f507 7384 add.w r3, r7, #264 ; 0x108
8006b14: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006b18: 681b ldr r3, [r3, #0]
8006b1a: 781b ldrb r3, [r3, #0]
8006b1c: 011a lsls r2, r3, #4
8006b1e: 6c3b ldr r3, [r7, #64] ; 0x40
8006b20: 4413 add r3, r2
8006b22: f203 430c addw r3, r3, #1036 ; 0x40c
8006b26: 63fb str r3, [r7, #60] ; 0x3c
8006b28: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006b2c: b29a uxth r2, r3
8006b2e: 6bfb ldr r3, [r7, #60] ; 0x3c
8006b30: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8006b32: f507 7384 add.w r3, r7, #264 ; 0x108
8006b36: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006b3a: 681b ldr r3, [r3, #0]
8006b3c: 895b ldrh r3, [r3, #10]
8006b3e: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006b42: f507 7384 add.w r3, r7, #264 ; 0x108
8006b46: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006b4a: 681b ldr r3, [r3, #0]
8006b4c: 6959 ldr r1, [r3, #20]
8006b4e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006b52: b29b uxth r3, r3
8006b54: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
8006b58: f507 7084 add.w r0, r7, #264 ; 0x108
8006b5c: f5a0 7082 sub.w r0, r0, #260 ; 0x104
8006b60: 6800 ldr r0, [r0, #0]
8006b62: f001 f81e bl 8007ba2 <USB_WritePMA>
8006b66: e213 b.n 8006f90 <USB_EPStartXfer+0xcb6>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
8006b68: f507 7384 add.w r3, r7, #264 ; 0x108
8006b6c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006b70: 681b ldr r3, [r3, #0]
8006b72: 6a1b ldr r3, [r3, #32]
8006b74: f8c7 3104 str.w r3, [r7, #260] ; 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
8006b78: f507 7384 add.w r3, r7, #264 ; 0x108
8006b7c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006b80: 681a ldr r2, [r3, #0]
8006b82: f507 7384 add.w r3, r7, #264 ; 0x108
8006b86: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006b8a: 681b ldr r3, [r3, #0]
8006b8c: 781b ldrb r3, [r3, #0]
8006b8e: 009b lsls r3, r3, #2
8006b90: 4413 add r3, r2
8006b92: 881b ldrh r3, [r3, #0]
8006b94: b29b uxth r3, r3
8006b96: f423 43e2 bic.w r3, r3, #28928 ; 0x7100
8006b9a: f023 0370 bic.w r3, r3, #112 ; 0x70
8006b9e: f8a7 3062 strh.w r3, [r7, #98] ; 0x62
8006ba2: f507 7384 add.w r3, r7, #264 ; 0x108
8006ba6: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006baa: 681a ldr r2, [r3, #0]
8006bac: f507 7384 add.w r3, r7, #264 ; 0x108
8006bb0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006bb4: 681b ldr r3, [r3, #0]
8006bb6: 781b ldrb r3, [r3, #0]
8006bb8: 009b lsls r3, r3, #2
8006bba: 441a add r2, r3
8006bbc: f8b7 3062 ldrh.w r3, [r7, #98] ; 0x62
8006bc0: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006bc4: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006bc8: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006bcc: f043 0380 orr.w r3, r3, #128 ; 0x80
8006bd0: b29b uxth r3, r3
8006bd2: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8006bd4: f507 7384 add.w r3, r7, #264 ; 0x108
8006bd8: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006bdc: 681b ldr r3, [r3, #0]
8006bde: 65fb str r3, [r7, #92] ; 0x5c
8006be0: f507 7384 add.w r3, r7, #264 ; 0x108
8006be4: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006be8: 681b ldr r3, [r3, #0]
8006bea: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006bee: b29b uxth r3, r3
8006bf0: 461a mov r2, r3
8006bf2: 6dfb ldr r3, [r7, #92] ; 0x5c
8006bf4: 4413 add r3, r2
8006bf6: 65fb str r3, [r7, #92] ; 0x5c
8006bf8: f507 7384 add.w r3, r7, #264 ; 0x108
8006bfc: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006c00: 681b ldr r3, [r3, #0]
8006c02: 781b ldrb r3, [r3, #0]
8006c04: 011a lsls r2, r3, #4
8006c06: 6dfb ldr r3, [r7, #92] ; 0x5c
8006c08: 4413 add r3, r2
8006c0a: f203 4304 addw r3, r3, #1028 ; 0x404
8006c0e: 65bb str r3, [r7, #88] ; 0x58
8006c10: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006c14: b29a uxth r2, r3
8006c16: 6dbb ldr r3, [r7, #88] ; 0x58
8006c18: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006c1a: f507 7384 add.w r3, r7, #264 ; 0x108
8006c1e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006c22: 681b ldr r3, [r3, #0]
8006c24: 891b ldrh r3, [r3, #8]
8006c26: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006c2a: f507 7384 add.w r3, r7, #264 ; 0x108
8006c2e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006c32: 681b ldr r3, [r3, #0]
8006c34: 6959 ldr r1, [r3, #20]
8006c36: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006c3a: b29b uxth r3, r3
8006c3c: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
8006c40: f507 7084 add.w r0, r7, #264 ; 0x108
8006c44: f5a0 7082 sub.w r0, r0, #260 ; 0x104
8006c48: 6800 ldr r0, [r0, #0]
8006c4a: f000 ffaa bl 8007ba2 <USB_WritePMA>
8006c4e: e19f b.n 8006f90 <USB_EPStartXfer+0xcb6>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8006c50: f507 7384 add.w r3, r7, #264 ; 0x108
8006c54: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006c58: 681b ldr r3, [r3, #0]
8006c5a: 6a1a ldr r2, [r3, #32]
8006c5c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006c60: 1ad2 subs r2, r2, r3
8006c62: f507 7384 add.w r3, r7, #264 ; 0x108
8006c66: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006c6a: 681b ldr r3, [r3, #0]
8006c6c: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8006c6e: f507 7384 add.w r3, r7, #264 ; 0x108
8006c72: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006c76: 681a ldr r2, [r3, #0]
8006c78: f507 7384 add.w r3, r7, #264 ; 0x108
8006c7c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006c80: 681b ldr r3, [r3, #0]
8006c82: 781b ldrb r3, [r3, #0]
8006c84: 009b lsls r3, r3, #2
8006c86: 4413 add r3, r2
8006c88: 881b ldrh r3, [r3, #0]
8006c8a: b29b uxth r3, r3
8006c8c: f003 0340 and.w r3, r3, #64 ; 0x40
8006c90: 2b00 cmp r3, #0
8006c92: f000 80bc beq.w 8006e0e <USB_EPStartXfer+0xb34>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8006c96: f507 7384 add.w r3, r7, #264 ; 0x108
8006c9a: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006c9e: 681b ldr r3, [r3, #0]
8006ca0: 673b str r3, [r7, #112] ; 0x70
8006ca2: f507 7384 add.w r3, r7, #264 ; 0x108
8006ca6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006caa: 681b ldr r3, [r3, #0]
8006cac: 785b ldrb r3, [r3, #1]
8006cae: 2b00 cmp r3, #0
8006cb0: d16d bne.n 8006d8e <USB_EPStartXfer+0xab4>
8006cb2: f507 7384 add.w r3, r7, #264 ; 0x108
8006cb6: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006cba: 681b ldr r3, [r3, #0]
8006cbc: 66bb str r3, [r7, #104] ; 0x68
8006cbe: f507 7384 add.w r3, r7, #264 ; 0x108
8006cc2: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006cc6: 681b ldr r3, [r3, #0]
8006cc8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006ccc: b29b uxth r3, r3
8006cce: 461a mov r2, r3
8006cd0: 6ebb ldr r3, [r7, #104] ; 0x68
8006cd2: 4413 add r3, r2
8006cd4: 66bb str r3, [r7, #104] ; 0x68
8006cd6: f507 7384 add.w r3, r7, #264 ; 0x108
8006cda: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006cde: 681b ldr r3, [r3, #0]
8006ce0: 781b ldrb r3, [r3, #0]
8006ce2: 011a lsls r2, r3, #4
8006ce4: 6ebb ldr r3, [r7, #104] ; 0x68
8006ce6: 4413 add r3, r2
8006ce8: f203 430c addw r3, r3, #1036 ; 0x40c
8006cec: 667b str r3, [r7, #100] ; 0x64
8006cee: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006cf2: 2b00 cmp r3, #0
8006cf4: d112 bne.n 8006d1c <USB_EPStartXfer+0xa42>
8006cf6: 6e7b ldr r3, [r7, #100] ; 0x64
8006cf8: 881b ldrh r3, [r3, #0]
8006cfa: b29b uxth r3, r3
8006cfc: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006d00: b29a uxth r2, r3
8006d02: 6e7b ldr r3, [r7, #100] ; 0x64
8006d04: 801a strh r2, [r3, #0]
8006d06: 6e7b ldr r3, [r7, #100] ; 0x64
8006d08: 881b ldrh r3, [r3, #0]
8006d0a: b29b uxth r3, r3
8006d0c: ea6f 4343 mvn.w r3, r3, lsl #17
8006d10: ea6f 4353 mvn.w r3, r3, lsr #17
8006d14: b29a uxth r2, r3
8006d16: 6e7b ldr r3, [r7, #100] ; 0x64
8006d18: 801a strh r2, [r3, #0]
8006d1a: e05d b.n 8006dd8 <USB_EPStartXfer+0xafe>
8006d1c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006d20: 2b3e cmp r3, #62 ; 0x3e
8006d22: d817 bhi.n 8006d54 <USB_EPStartXfer+0xa7a>
8006d24: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006d28: 085b lsrs r3, r3, #1
8006d2a: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006d2e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006d32: f003 0301 and.w r3, r3, #1
8006d36: 2b00 cmp r3, #0
8006d38: d004 beq.n 8006d44 <USB_EPStartXfer+0xa6a>
8006d3a: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006d3e: 3301 adds r3, #1
8006d40: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006d44: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006d48: b29b uxth r3, r3
8006d4a: 029b lsls r3, r3, #10
8006d4c: b29a uxth r2, r3
8006d4e: 6e7b ldr r3, [r7, #100] ; 0x64
8006d50: 801a strh r2, [r3, #0]
8006d52: e041 b.n 8006dd8 <USB_EPStartXfer+0xafe>
8006d54: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006d58: 095b lsrs r3, r3, #5
8006d5a: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006d5e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006d62: f003 031f and.w r3, r3, #31
8006d66: 2b00 cmp r3, #0
8006d68: d104 bne.n 8006d74 <USB_EPStartXfer+0xa9a>
8006d6a: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006d6e: 3b01 subs r3, #1
8006d70: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
8006d74: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
8006d78: b29b uxth r3, r3
8006d7a: 029b lsls r3, r3, #10
8006d7c: b29b uxth r3, r3
8006d7e: ea6f 4343 mvn.w r3, r3, lsl #17
8006d82: ea6f 4353 mvn.w r3, r3, lsr #17
8006d86: b29a uxth r2, r3
8006d88: 6e7b ldr r3, [r7, #100] ; 0x64
8006d8a: 801a strh r2, [r3, #0]
8006d8c: e024 b.n 8006dd8 <USB_EPStartXfer+0xafe>
8006d8e: f507 7384 add.w r3, r7, #264 ; 0x108
8006d92: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006d96: 681b ldr r3, [r3, #0]
8006d98: 785b ldrb r3, [r3, #1]
8006d9a: 2b01 cmp r3, #1
8006d9c: d11c bne.n 8006dd8 <USB_EPStartXfer+0xafe>
8006d9e: f507 7384 add.w r3, r7, #264 ; 0x108
8006da2: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006da6: 681b ldr r3, [r3, #0]
8006da8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006dac: b29b uxth r3, r3
8006dae: 461a mov r2, r3
8006db0: 6f3b ldr r3, [r7, #112] ; 0x70
8006db2: 4413 add r3, r2
8006db4: 673b str r3, [r7, #112] ; 0x70
8006db6: f507 7384 add.w r3, r7, #264 ; 0x108
8006dba: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006dbe: 681b ldr r3, [r3, #0]
8006dc0: 781b ldrb r3, [r3, #0]
8006dc2: 011a lsls r2, r3, #4
8006dc4: 6f3b ldr r3, [r7, #112] ; 0x70
8006dc6: 4413 add r3, r2
8006dc8: f203 430c addw r3, r3, #1036 ; 0x40c
8006dcc: 66fb str r3, [r7, #108] ; 0x6c
8006dce: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006dd2: b29a uxth r2, r3
8006dd4: 6efb ldr r3, [r7, #108] ; 0x6c
8006dd6: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8006dd8: f507 7384 add.w r3, r7, #264 ; 0x108
8006ddc: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006de0: 681b ldr r3, [r3, #0]
8006de2: 895b ldrh r3, [r3, #10]
8006de4: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006de8: f507 7384 add.w r3, r7, #264 ; 0x108
8006dec: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006df0: 681b ldr r3, [r3, #0]
8006df2: 6959 ldr r1, [r3, #20]
8006df4: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006df8: b29b uxth r3, r3
8006dfa: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
8006dfe: f507 7084 add.w r0, r7, #264 ; 0x108
8006e02: f5a0 7082 sub.w r0, r0, #260 ; 0x104
8006e06: 6800 ldr r0, [r0, #0]
8006e08: f000 fecb bl 8007ba2 <USB_WritePMA>
8006e0c: e0c0 b.n 8006f90 <USB_EPStartXfer+0xcb6>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006e0e: f507 7384 add.w r3, r7, #264 ; 0x108
8006e12: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006e16: 681b ldr r3, [r3, #0]
8006e18: 785b ldrb r3, [r3, #1]
8006e1a: 2b00 cmp r3, #0
8006e1c: d16d bne.n 8006efa <USB_EPStartXfer+0xc20>
8006e1e: f507 7384 add.w r3, r7, #264 ; 0x108
8006e22: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006e26: 681b ldr r3, [r3, #0]
8006e28: 67fb str r3, [r7, #124] ; 0x7c
8006e2a: f507 7384 add.w r3, r7, #264 ; 0x108
8006e2e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006e32: 681b ldr r3, [r3, #0]
8006e34: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006e38: b29b uxth r3, r3
8006e3a: 461a mov r2, r3
8006e3c: 6ffb ldr r3, [r7, #124] ; 0x7c
8006e3e: 4413 add r3, r2
8006e40: 67fb str r3, [r7, #124] ; 0x7c
8006e42: f507 7384 add.w r3, r7, #264 ; 0x108
8006e46: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006e4a: 681b ldr r3, [r3, #0]
8006e4c: 781b ldrb r3, [r3, #0]
8006e4e: 011a lsls r2, r3, #4
8006e50: 6ffb ldr r3, [r7, #124] ; 0x7c
8006e52: 4413 add r3, r2
8006e54: f203 4304 addw r3, r3, #1028 ; 0x404
8006e58: 67bb str r3, [r7, #120] ; 0x78
8006e5a: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006e5e: 2b00 cmp r3, #0
8006e60: d112 bne.n 8006e88 <USB_EPStartXfer+0xbae>
8006e62: 6fbb ldr r3, [r7, #120] ; 0x78
8006e64: 881b ldrh r3, [r3, #0]
8006e66: b29b uxth r3, r3
8006e68: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8006e6c: b29a uxth r2, r3
8006e6e: 6fbb ldr r3, [r7, #120] ; 0x78
8006e70: 801a strh r2, [r3, #0]
8006e72: 6fbb ldr r3, [r7, #120] ; 0x78
8006e74: 881b ldrh r3, [r3, #0]
8006e76: b29b uxth r3, r3
8006e78: ea6f 4343 mvn.w r3, r3, lsl #17
8006e7c: ea6f 4353 mvn.w r3, r3, lsr #17
8006e80: b29a uxth r2, r3
8006e82: 6fbb ldr r3, [r7, #120] ; 0x78
8006e84: 801a strh r2, [r3, #0]
8006e86: e069 b.n 8006f5c <USB_EPStartXfer+0xc82>
8006e88: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006e8c: 2b3e cmp r3, #62 ; 0x3e
8006e8e: d817 bhi.n 8006ec0 <USB_EPStartXfer+0xbe6>
8006e90: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006e94: 085b lsrs r3, r3, #1
8006e96: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006e9a: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006e9e: f003 0301 and.w r3, r3, #1
8006ea2: 2b00 cmp r3, #0
8006ea4: d004 beq.n 8006eb0 <USB_EPStartXfer+0xbd6>
8006ea6: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006eaa: 3301 adds r3, #1
8006eac: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006eb0: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006eb4: b29b uxth r3, r3
8006eb6: 029b lsls r3, r3, #10
8006eb8: b29a uxth r2, r3
8006eba: 6fbb ldr r3, [r7, #120] ; 0x78
8006ebc: 801a strh r2, [r3, #0]
8006ebe: e04d b.n 8006f5c <USB_EPStartXfer+0xc82>
8006ec0: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006ec4: 095b lsrs r3, r3, #5
8006ec6: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006eca: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006ece: f003 031f and.w r3, r3, #31
8006ed2: 2b00 cmp r3, #0
8006ed4: d104 bne.n 8006ee0 <USB_EPStartXfer+0xc06>
8006ed6: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006eda: 3b01 subs r3, #1
8006edc: f8c7 30ec str.w r3, [r7, #236] ; 0xec
8006ee0: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
8006ee4: b29b uxth r3, r3
8006ee6: 029b lsls r3, r3, #10
8006ee8: b29b uxth r3, r3
8006eea: ea6f 4343 mvn.w r3, r3, lsl #17
8006eee: ea6f 4353 mvn.w r3, r3, lsr #17
8006ef2: b29a uxth r2, r3
8006ef4: 6fbb ldr r3, [r7, #120] ; 0x78
8006ef6: 801a strh r2, [r3, #0]
8006ef8: e030 b.n 8006f5c <USB_EPStartXfer+0xc82>
8006efa: f507 7384 add.w r3, r7, #264 ; 0x108
8006efe: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006f02: 681b ldr r3, [r3, #0]
8006f04: 785b ldrb r3, [r3, #1]
8006f06: 2b01 cmp r3, #1
8006f08: d128 bne.n 8006f5c <USB_EPStartXfer+0xc82>
8006f0a: f507 7384 add.w r3, r7, #264 ; 0x108
8006f0e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006f12: 681b ldr r3, [r3, #0]
8006f14: f8c7 3084 str.w r3, [r7, #132] ; 0x84
8006f18: f507 7384 add.w r3, r7, #264 ; 0x108
8006f1c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006f20: 681b ldr r3, [r3, #0]
8006f22: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8006f26: b29b uxth r3, r3
8006f28: 461a mov r2, r3
8006f2a: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8006f2e: 4413 add r3, r2
8006f30: f8c7 3084 str.w r3, [r7, #132] ; 0x84
8006f34: f507 7384 add.w r3, r7, #264 ; 0x108
8006f38: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006f3c: 681b ldr r3, [r3, #0]
8006f3e: 781b ldrb r3, [r3, #0]
8006f40: 011a lsls r2, r3, #4
8006f42: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8006f46: 4413 add r3, r2
8006f48: f203 4304 addw r3, r3, #1028 ; 0x404
8006f4c: f8c7 3080 str.w r3, [r7, #128] ; 0x80
8006f50: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006f54: b29a uxth r2, r3
8006f56: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
8006f5a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006f5c: f507 7384 add.w r3, r7, #264 ; 0x108
8006f60: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006f64: 681b ldr r3, [r3, #0]
8006f66: 891b ldrh r3, [r3, #8]
8006f68: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006f6c: f507 7384 add.w r3, r7, #264 ; 0x108
8006f70: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006f74: 681b ldr r3, [r3, #0]
8006f76: 6959 ldr r1, [r3, #20]
8006f78: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8006f7c: b29b uxth r3, r3
8006f7e: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
8006f82: f507 7084 add.w r0, r7, #264 ; 0x108
8006f86: f5a0 7082 sub.w r0, r0, #260 ; 0x104
8006f8a: 6800 ldr r0, [r0, #0]
8006f8c: f000 fe09 bl 8007ba2 <USB_WritePMA>
}
}
}
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
8006f90: f507 7384 add.w r3, r7, #264 ; 0x108
8006f94: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006f98: 681a ldr r2, [r3, #0]
8006f9a: f507 7384 add.w r3, r7, #264 ; 0x108
8006f9e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006fa2: 681b ldr r3, [r3, #0]
8006fa4: 781b ldrb r3, [r3, #0]
8006fa6: 009b lsls r3, r3, #2
8006fa8: 4413 add r3, r2
8006faa: 881b ldrh r3, [r3, #0]
8006fac: b29b uxth r3, r3
8006fae: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8006fb2: f023 0340 bic.w r3, r3, #64 ; 0x40
8006fb6: 817b strh r3, [r7, #10]
8006fb8: 897b ldrh r3, [r7, #10]
8006fba: f083 0310 eor.w r3, r3, #16
8006fbe: 817b strh r3, [r7, #10]
8006fc0: 897b ldrh r3, [r7, #10]
8006fc2: f083 0320 eor.w r3, r3, #32
8006fc6: 817b strh r3, [r7, #10]
8006fc8: f507 7384 add.w r3, r7, #264 ; 0x108
8006fcc: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8006fd0: 681a ldr r2, [r3, #0]
8006fd2: f507 7384 add.w r3, r7, #264 ; 0x108
8006fd6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8006fda: 681b ldr r3, [r3, #0]
8006fdc: 781b ldrb r3, [r3, #0]
8006fde: 009b lsls r3, r3, #2
8006fe0: 441a add r2, r3
8006fe2: 897b ldrh r3, [r7, #10]
8006fe4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8006fe8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8006fec: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8006ff0: f043 0380 orr.w r3, r3, #128 ; 0x80
8006ff4: b29b uxth r3, r3
8006ff6: 8013 strh r3, [r2, #0]
8006ff8: f000 bc9f b.w 800793a <USB_EPStartXfer+0x1660>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
8006ffc: f507 7384 add.w r3, r7, #264 ; 0x108
8007000: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007004: 681b ldr r3, [r3, #0]
8007006: 7b1b ldrb r3, [r3, #12]
8007008: 2b00 cmp r3, #0
800700a: f040 80ae bne.w 800716a <USB_EPStartXfer+0xe90>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800700e: f507 7384 add.w r3, r7, #264 ; 0x108
8007012: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007016: 681b ldr r3, [r3, #0]
8007018: 699a ldr r2, [r3, #24]
800701a: f507 7384 add.w r3, r7, #264 ; 0x108
800701e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007022: 681b ldr r3, [r3, #0]
8007024: 691b ldr r3, [r3, #16]
8007026: 429a cmp r2, r3
8007028: d917 bls.n 800705a <USB_EPStartXfer+0xd80>
{
len = ep->maxpacket;
800702a: f507 7384 add.w r3, r7, #264 ; 0x108
800702e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007032: 681b ldr r3, [r3, #0]
8007034: 691b ldr r3, [r3, #16]
8007036: f8c7 3104 str.w r3, [r7, #260] ; 0x104
ep->xfer_len -= len;
800703a: f507 7384 add.w r3, r7, #264 ; 0x108
800703e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007042: 681b ldr r3, [r3, #0]
8007044: 699a ldr r2, [r3, #24]
8007046: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800704a: 1ad2 subs r2, r2, r3
800704c: f507 7384 add.w r3, r7, #264 ; 0x108
8007050: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007054: 681b ldr r3, [r3, #0]
8007056: 619a str r2, [r3, #24]
8007058: e00e b.n 8007078 <USB_EPStartXfer+0xd9e>
}
else
{
len = ep->xfer_len;
800705a: f507 7384 add.w r3, r7, #264 ; 0x108
800705e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007062: 681b ldr r3, [r3, #0]
8007064: 699b ldr r3, [r3, #24]
8007066: f8c7 3104 str.w r3, [r7, #260] ; 0x104
ep->xfer_len = 0U;
800706a: f507 7384 add.w r3, r7, #264 ; 0x108
800706e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007072: 681b ldr r3, [r3, #0]
8007074: 2200 movs r2, #0
8007076: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
8007078: f507 7384 add.w r3, r7, #264 ; 0x108
800707c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007080: 681b ldr r3, [r3, #0]
8007082: f8c7 3090 str.w r3, [r7, #144] ; 0x90
8007086: f507 7384 add.w r3, r7, #264 ; 0x108
800708a: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800708e: 681b ldr r3, [r3, #0]
8007090: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8007094: b29b uxth r3, r3
8007096: 461a mov r2, r3
8007098: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
800709c: 4413 add r3, r2
800709e: f8c7 3090 str.w r3, [r7, #144] ; 0x90
80070a2: f507 7384 add.w r3, r7, #264 ; 0x108
80070a6: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80070aa: 681b ldr r3, [r3, #0]
80070ac: 781b ldrb r3, [r3, #0]
80070ae: 011a lsls r2, r3, #4
80070b0: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
80070b4: 4413 add r3, r2
80070b6: f203 430c addw r3, r3, #1036 ; 0x40c
80070ba: f8c7 308c str.w r3, [r7, #140] ; 0x8c
80070be: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80070c2: 2b00 cmp r3, #0
80070c4: d116 bne.n 80070f4 <USB_EPStartXfer+0xe1a>
80070c6: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
80070ca: 881b ldrh r3, [r3, #0]
80070cc: b29b uxth r3, r3
80070ce: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80070d2: b29a uxth r2, r3
80070d4: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
80070d8: 801a strh r2, [r3, #0]
80070da: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
80070de: 881b ldrh r3, [r3, #0]
80070e0: b29b uxth r3, r3
80070e2: ea6f 4343 mvn.w r3, r3, lsl #17
80070e6: ea6f 4353 mvn.w r3, r3, lsr #17
80070ea: b29a uxth r2, r3
80070ec: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
80070f0: 801a strh r2, [r3, #0]
80070f2: e3e8 b.n 80078c6 <USB_EPStartXfer+0x15ec>
80070f4: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80070f8: 2b3e cmp r3, #62 ; 0x3e
80070fa: d818 bhi.n 800712e <USB_EPStartXfer+0xe54>
80070fc: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007100: 085b lsrs r3, r3, #1
8007102: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
8007106: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800710a: f003 0301 and.w r3, r3, #1
800710e: 2b00 cmp r3, #0
8007110: d004 beq.n 800711c <USB_EPStartXfer+0xe42>
8007112: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8007116: 3301 adds r3, #1
8007118: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
800711c: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8007120: b29b uxth r3, r3
8007122: 029b lsls r3, r3, #10
8007124: b29a uxth r2, r3
8007126: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
800712a: 801a strh r2, [r3, #0]
800712c: e3cb b.n 80078c6 <USB_EPStartXfer+0x15ec>
800712e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007132: 095b lsrs r3, r3, #5
8007134: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
8007138: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800713c: f003 031f and.w r3, r3, #31
8007140: 2b00 cmp r3, #0
8007142: d104 bne.n 800714e <USB_EPStartXfer+0xe74>
8007144: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8007148: 3b01 subs r3, #1
800714a: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
800714e: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8007152: b29b uxth r3, r3
8007154: 029b lsls r3, r3, #10
8007156: b29b uxth r3, r3
8007158: ea6f 4343 mvn.w r3, r3, lsl #17
800715c: ea6f 4353 mvn.w r3, r3, lsr #17
8007160: b29a uxth r2, r3
8007162: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
8007166: 801a strh r2, [r3, #0]
8007168: e3ad b.n 80078c6 <USB_EPStartXfer+0x15ec>
}
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800716a: f507 7384 add.w r3, r7, #264 ; 0x108
800716e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007172: 681b ldr r3, [r3, #0]
8007174: 78db ldrb r3, [r3, #3]
8007176: 2b02 cmp r3, #2
8007178: f040 8200 bne.w 800757c <USB_EPStartXfer+0x12a2>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800717c: f507 7384 add.w r3, r7, #264 ; 0x108
8007180: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007184: 681b ldr r3, [r3, #0]
8007186: 785b ldrb r3, [r3, #1]
8007188: 2b00 cmp r3, #0
800718a: f040 8091 bne.w 80072b0 <USB_EPStartXfer+0xfd6>
800718e: f507 7384 add.w r3, r7, #264 ; 0x108
8007192: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007196: 681b ldr r3, [r3, #0]
8007198: f8c7 30ac str.w r3, [r7, #172] ; 0xac
800719c: f507 7384 add.w r3, r7, #264 ; 0x108
80071a0: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80071a4: 681b ldr r3, [r3, #0]
80071a6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80071aa: b29b uxth r3, r3
80071ac: 461a mov r2, r3
80071ae: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
80071b2: 4413 add r3, r2
80071b4: f8c7 30ac str.w r3, [r7, #172] ; 0xac
80071b8: f507 7384 add.w r3, r7, #264 ; 0x108
80071bc: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80071c0: 681b ldr r3, [r3, #0]
80071c2: 781b ldrb r3, [r3, #0]
80071c4: 011a lsls r2, r3, #4
80071c6: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
80071ca: 4413 add r3, r2
80071cc: f203 4304 addw r3, r3, #1028 ; 0x404
80071d0: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8
80071d4: f507 7384 add.w r3, r7, #264 ; 0x108
80071d8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80071dc: 681b ldr r3, [r3, #0]
80071de: 691b ldr r3, [r3, #16]
80071e0: 2b00 cmp r3, #0
80071e2: d116 bne.n 8007212 <USB_EPStartXfer+0xf38>
80071e4: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
80071e8: 881b ldrh r3, [r3, #0]
80071ea: b29b uxth r3, r3
80071ec: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80071f0: b29a uxth r2, r3
80071f2: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
80071f6: 801a strh r2, [r3, #0]
80071f8: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
80071fc: 881b ldrh r3, [r3, #0]
80071fe: b29b uxth r3, r3
8007200: ea6f 4343 mvn.w r3, r3, lsl #17
8007204: ea6f 4353 mvn.w r3, r3, lsr #17
8007208: b29a uxth r2, r3
800720a: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
800720e: 801a strh r2, [r3, #0]
8007210: e083 b.n 800731a <USB_EPStartXfer+0x1040>
8007212: f507 7384 add.w r3, r7, #264 ; 0x108
8007216: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800721a: 681b ldr r3, [r3, #0]
800721c: 691b ldr r3, [r3, #16]
800721e: 2b3e cmp r3, #62 ; 0x3e
8007220: d820 bhi.n 8007264 <USB_EPStartXfer+0xf8a>
8007222: f507 7384 add.w r3, r7, #264 ; 0x108
8007226: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800722a: 681b ldr r3, [r3, #0]
800722c: 691b ldr r3, [r3, #16]
800722e: 085b lsrs r3, r3, #1
8007230: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8007234: f507 7384 add.w r3, r7, #264 ; 0x108
8007238: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800723c: 681b ldr r3, [r3, #0]
800723e: 691b ldr r3, [r3, #16]
8007240: f003 0301 and.w r3, r3, #1
8007244: 2b00 cmp r3, #0
8007246: d004 beq.n 8007252 <USB_EPStartXfer+0xf78>
8007248: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
800724c: 3301 adds r3, #1
800724e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8007252: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
8007256: b29b uxth r3, r3
8007258: 029b lsls r3, r3, #10
800725a: b29a uxth r2, r3
800725c: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
8007260: 801a strh r2, [r3, #0]
8007262: e05a b.n 800731a <USB_EPStartXfer+0x1040>
8007264: f507 7384 add.w r3, r7, #264 ; 0x108
8007268: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800726c: 681b ldr r3, [r3, #0]
800726e: 691b ldr r3, [r3, #16]
8007270: 095b lsrs r3, r3, #5
8007272: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8007276: f507 7384 add.w r3, r7, #264 ; 0x108
800727a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800727e: 681b ldr r3, [r3, #0]
8007280: 691b ldr r3, [r3, #16]
8007282: f003 031f and.w r3, r3, #31
8007286: 2b00 cmp r3, #0
8007288: d104 bne.n 8007294 <USB_EPStartXfer+0xfba>
800728a: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
800728e: 3b01 subs r3, #1
8007290: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
8007294: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
8007298: b29b uxth r3, r3
800729a: 029b lsls r3, r3, #10
800729c: b29b uxth r3, r3
800729e: ea6f 4343 mvn.w r3, r3, lsl #17
80072a2: ea6f 4353 mvn.w r3, r3, lsr #17
80072a6: b29a uxth r2, r3
80072a8: f8d7 30a8 ldr.w r3, [r7, #168] ; 0xa8
80072ac: 801a strh r2, [r3, #0]
80072ae: e034 b.n 800731a <USB_EPStartXfer+0x1040>
80072b0: f507 7384 add.w r3, r7, #264 ; 0x108
80072b4: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80072b8: 681b ldr r3, [r3, #0]
80072ba: 785b ldrb r3, [r3, #1]
80072bc: 2b01 cmp r3, #1
80072be: d12c bne.n 800731a <USB_EPStartXfer+0x1040>
80072c0: f507 7384 add.w r3, r7, #264 ; 0x108
80072c4: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80072c8: 681b ldr r3, [r3, #0]
80072ca: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4
80072ce: f507 7384 add.w r3, r7, #264 ; 0x108
80072d2: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80072d6: 681b ldr r3, [r3, #0]
80072d8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80072dc: b29b uxth r3, r3
80072de: 461a mov r2, r3
80072e0: f8d7 30b4 ldr.w r3, [r7, #180] ; 0xb4
80072e4: 4413 add r3, r2
80072e6: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4
80072ea: f507 7384 add.w r3, r7, #264 ; 0x108
80072ee: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80072f2: 681b ldr r3, [r3, #0]
80072f4: 781b ldrb r3, [r3, #0]
80072f6: 011a lsls r2, r3, #4
80072f8: f8d7 30b4 ldr.w r3, [r7, #180] ; 0xb4
80072fc: 4413 add r3, r2
80072fe: f203 4304 addw r3, r3, #1028 ; 0x404
8007302: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
8007306: f507 7384 add.w r3, r7, #264 ; 0x108
800730a: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800730e: 681b ldr r3, [r3, #0]
8007310: 691b ldr r3, [r3, #16]
8007312: b29a uxth r2, r3
8007314: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
8007318: 801a strh r2, [r3, #0]
800731a: f507 7384 add.w r3, r7, #264 ; 0x108
800731e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007322: 681b ldr r3, [r3, #0]
8007324: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
8007328: f507 7384 add.w r3, r7, #264 ; 0x108
800732c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007330: 681b ldr r3, [r3, #0]
8007332: 785b ldrb r3, [r3, #1]
8007334: 2b00 cmp r3, #0
8007336: f040 8091 bne.w 800745c <USB_EPStartXfer+0x1182>
800733a: f507 7384 add.w r3, r7, #264 ; 0x108
800733e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007342: 681b ldr r3, [r3, #0]
8007344: f8c7 309c str.w r3, [r7, #156] ; 0x9c
8007348: f507 7384 add.w r3, r7, #264 ; 0x108
800734c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007350: 681b ldr r3, [r3, #0]
8007352: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8007356: b29b uxth r3, r3
8007358: 461a mov r2, r3
800735a: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
800735e: 4413 add r3, r2
8007360: f8c7 309c str.w r3, [r7, #156] ; 0x9c
8007364: f507 7384 add.w r3, r7, #264 ; 0x108
8007368: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800736c: 681b ldr r3, [r3, #0]
800736e: 781b ldrb r3, [r3, #0]
8007370: 011a lsls r2, r3, #4
8007372: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8007376: 4413 add r3, r2
8007378: f203 430c addw r3, r3, #1036 ; 0x40c
800737c: f8c7 3098 str.w r3, [r7, #152] ; 0x98
8007380: f507 7384 add.w r3, r7, #264 ; 0x108
8007384: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007388: 681b ldr r3, [r3, #0]
800738a: 691b ldr r3, [r3, #16]
800738c: 2b00 cmp r3, #0
800738e: d116 bne.n 80073be <USB_EPStartXfer+0x10e4>
8007390: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8007394: 881b ldrh r3, [r3, #0]
8007396: b29b uxth r3, r3
8007398: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800739c: b29a uxth r2, r3
800739e: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
80073a2: 801a strh r2, [r3, #0]
80073a4: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
80073a8: 881b ldrh r3, [r3, #0]
80073aa: b29b uxth r3, r3
80073ac: ea6f 4343 mvn.w r3, r3, lsl #17
80073b0: ea6f 4353 mvn.w r3, r3, lsr #17
80073b4: b29a uxth r2, r3
80073b6: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
80073ba: 801a strh r2, [r3, #0]
80073bc: e07c b.n 80074b8 <USB_EPStartXfer+0x11de>
80073be: f507 7384 add.w r3, r7, #264 ; 0x108
80073c2: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80073c6: 681b ldr r3, [r3, #0]
80073c8: 691b ldr r3, [r3, #16]
80073ca: 2b3e cmp r3, #62 ; 0x3e
80073cc: d820 bhi.n 8007410 <USB_EPStartXfer+0x1136>
80073ce: f507 7384 add.w r3, r7, #264 ; 0x108
80073d2: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80073d6: 681b ldr r3, [r3, #0]
80073d8: 691b ldr r3, [r3, #16]
80073da: 085b lsrs r3, r3, #1
80073dc: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
80073e0: f507 7384 add.w r3, r7, #264 ; 0x108
80073e4: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80073e8: 681b ldr r3, [r3, #0]
80073ea: 691b ldr r3, [r3, #16]
80073ec: f003 0301 and.w r3, r3, #1
80073f0: 2b00 cmp r3, #0
80073f2: d004 beq.n 80073fe <USB_EPStartXfer+0x1124>
80073f4: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
80073f8: 3301 adds r3, #1
80073fa: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
80073fe: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
8007402: b29b uxth r3, r3
8007404: 029b lsls r3, r3, #10
8007406: b29a uxth r2, r3
8007408: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
800740c: 801a strh r2, [r3, #0]
800740e: e053 b.n 80074b8 <USB_EPStartXfer+0x11de>
8007410: f507 7384 add.w r3, r7, #264 ; 0x108
8007414: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007418: 681b ldr r3, [r3, #0]
800741a: 691b ldr r3, [r3, #16]
800741c: 095b lsrs r3, r3, #5
800741e: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
8007422: f507 7384 add.w r3, r7, #264 ; 0x108
8007426: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800742a: 681b ldr r3, [r3, #0]
800742c: 691b ldr r3, [r3, #16]
800742e: f003 031f and.w r3, r3, #31
8007432: 2b00 cmp r3, #0
8007434: d104 bne.n 8007440 <USB_EPStartXfer+0x1166>
8007436: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
800743a: 3b01 subs r3, #1
800743c: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
8007440: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
8007444: b29b uxth r3, r3
8007446: 029b lsls r3, r3, #10
8007448: b29b uxth r3, r3
800744a: ea6f 4343 mvn.w r3, r3, lsl #17
800744e: ea6f 4353 mvn.w r3, r3, lsr #17
8007452: b29a uxth r2, r3
8007454: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8007458: 801a strh r2, [r3, #0]
800745a: e02d b.n 80074b8 <USB_EPStartXfer+0x11de>
800745c: f507 7384 add.w r3, r7, #264 ; 0x108
8007460: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007464: 681b ldr r3, [r3, #0]
8007466: 785b ldrb r3, [r3, #1]
8007468: 2b01 cmp r3, #1
800746a: d125 bne.n 80074b8 <USB_EPStartXfer+0x11de>
800746c: f507 7384 add.w r3, r7, #264 ; 0x108
8007470: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007474: 681b ldr r3, [r3, #0]
8007476: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800747a: b29b uxth r3, r3
800747c: 461a mov r2, r3
800747e: f8d7 30a4 ldr.w r3, [r7, #164] ; 0xa4
8007482: 4413 add r3, r2
8007484: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
8007488: f507 7384 add.w r3, r7, #264 ; 0x108
800748c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007490: 681b ldr r3, [r3, #0]
8007492: 781b ldrb r3, [r3, #0]
8007494: 011a lsls r2, r3, #4
8007496: f8d7 30a4 ldr.w r3, [r7, #164] ; 0xa4
800749a: 4413 add r3, r2
800749c: f203 430c addw r3, r3, #1036 ; 0x40c
80074a0: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
80074a4: f507 7384 add.w r3, r7, #264 ; 0x108
80074a8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80074ac: 681b ldr r3, [r3, #0]
80074ae: 691b ldr r3, [r3, #16]
80074b0: b29a uxth r2, r3
80074b2: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0
80074b6: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
80074b8: f507 7384 add.w r3, r7, #264 ; 0x108
80074bc: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80074c0: 681b ldr r3, [r3, #0]
80074c2: 69db ldr r3, [r3, #28]
80074c4: 2b00 cmp r3, #0
80074c6: f000 81fe beq.w 80078c6 <USB_EPStartXfer+0x15ec>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
80074ca: f507 7384 add.w r3, r7, #264 ; 0x108
80074ce: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80074d2: 681a ldr r2, [r3, #0]
80074d4: f507 7384 add.w r3, r7, #264 ; 0x108
80074d8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80074dc: 681b ldr r3, [r3, #0]
80074de: 781b ldrb r3, [r3, #0]
80074e0: 009b lsls r3, r3, #2
80074e2: 4413 add r3, r2
80074e4: 881b ldrh r3, [r3, #0]
80074e6: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
80074ea: f8b7 3096 ldrh.w r3, [r7, #150] ; 0x96
80074ee: f403 4380 and.w r3, r3, #16384 ; 0x4000
80074f2: 2b00 cmp r3, #0
80074f4: d005 beq.n 8007502 <USB_EPStartXfer+0x1228>
80074f6: f8b7 3096 ldrh.w r3, [r7, #150] ; 0x96
80074fa: f003 0340 and.w r3, r3, #64 ; 0x40
80074fe: 2b00 cmp r3, #0
8007500: d10d bne.n 800751e <USB_EPStartXfer+0x1244>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8007502: f8b7 3096 ldrh.w r3, [r7, #150] ; 0x96
8007506: f403 4380 and.w r3, r3, #16384 ; 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800750a: 2b00 cmp r3, #0
800750c: f040 81db bne.w 80078c6 <USB_EPStartXfer+0x15ec>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8007510: f8b7 3096 ldrh.w r3, [r7, #150] ; 0x96
8007514: f003 0340 and.w r3, r3, #64 ; 0x40
8007518: 2b00 cmp r3, #0
800751a: f040 81d4 bne.w 80078c6 <USB_EPStartXfer+0x15ec>
{
PCD_FreeUserBuffer(USBx, ep->num, 0U);
800751e: f507 7384 add.w r3, r7, #264 ; 0x108
8007522: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007526: 681a ldr r2, [r3, #0]
8007528: f507 7384 add.w r3, r7, #264 ; 0x108
800752c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007530: 681b ldr r3, [r3, #0]
8007532: 781b ldrb r3, [r3, #0]
8007534: 009b lsls r3, r3, #2
8007536: 4413 add r3, r2
8007538: 881b ldrh r3, [r3, #0]
800753a: b29b uxth r3, r3
800753c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8007540: f023 0370 bic.w r3, r3, #112 ; 0x70
8007544: f8a7 3094 strh.w r3, [r7, #148] ; 0x94
8007548: f507 7384 add.w r3, r7, #264 ; 0x108
800754c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007550: 681a ldr r2, [r3, #0]
8007552: f507 7384 add.w r3, r7, #264 ; 0x108
8007556: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800755a: 681b ldr r3, [r3, #0]
800755c: 781b ldrb r3, [r3, #0]
800755e: 009b lsls r3, r3, #2
8007560: 441a add r2, r3
8007562: f8b7 3094 ldrh.w r3, [r7, #148] ; 0x94
8007566: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800756a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800756e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007572: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8007576: b29b uxth r3, r3
8007578: 8013 strh r3, [r2, #0]
800757a: e1a4 b.n 80078c6 <USB_EPStartXfer+0x15ec>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800757c: f507 7384 add.w r3, r7, #264 ; 0x108
8007580: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007584: 681b ldr r3, [r3, #0]
8007586: 78db ldrb r3, [r3, #3]
8007588: 2b01 cmp r3, #1
800758a: f040 819a bne.w 80078c2 <USB_EPStartXfer+0x15e8>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800758e: f507 7384 add.w r3, r7, #264 ; 0x108
8007592: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007596: 681b ldr r3, [r3, #0]
8007598: 699a ldr r2, [r3, #24]
800759a: f507 7384 add.w r3, r7, #264 ; 0x108
800759e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80075a2: 681b ldr r3, [r3, #0]
80075a4: 691b ldr r3, [r3, #16]
80075a6: 429a cmp r2, r3
80075a8: d917 bls.n 80075da <USB_EPStartXfer+0x1300>
{
len = ep->maxpacket;
80075aa: f507 7384 add.w r3, r7, #264 ; 0x108
80075ae: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80075b2: 681b ldr r3, [r3, #0]
80075b4: 691b ldr r3, [r3, #16]
80075b6: f8c7 3104 str.w r3, [r7, #260] ; 0x104
ep->xfer_len -= len;
80075ba: f507 7384 add.w r3, r7, #264 ; 0x108
80075be: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80075c2: 681b ldr r3, [r3, #0]
80075c4: 699a ldr r2, [r3, #24]
80075c6: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80075ca: 1ad2 subs r2, r2, r3
80075cc: f507 7384 add.w r3, r7, #264 ; 0x108
80075d0: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80075d4: 681b ldr r3, [r3, #0]
80075d6: 619a str r2, [r3, #24]
80075d8: e00e b.n 80075f8 <USB_EPStartXfer+0x131e>
}
else
{
len = ep->xfer_len;
80075da: f507 7384 add.w r3, r7, #264 ; 0x108
80075de: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80075e2: 681b ldr r3, [r3, #0]
80075e4: 699b ldr r3, [r3, #24]
80075e6: f8c7 3104 str.w r3, [r7, #260] ; 0x104
ep->xfer_len = 0U;
80075ea: f507 7384 add.w r3, r7, #264 ; 0x108
80075ee: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80075f2: 681b ldr r3, [r3, #0]
80075f4: 2200 movs r2, #0
80075f6: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
80075f8: f507 7384 add.w r3, r7, #264 ; 0x108
80075fc: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007600: 681b ldr r3, [r3, #0]
8007602: 785b ldrb r3, [r3, #1]
8007604: 2b00 cmp r3, #0
8007606: d178 bne.n 80076fa <USB_EPStartXfer+0x1420>
8007608: f507 7384 add.w r3, r7, #264 ; 0x108
800760c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007610: 681b ldr r3, [r3, #0]
8007612: f8c7 30cc str.w r3, [r7, #204] ; 0xcc
8007616: f507 7384 add.w r3, r7, #264 ; 0x108
800761a: f5a3 7382 sub.w r3, r3, #260 ; 0x104
800761e: 681b ldr r3, [r3, #0]
8007620: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8007624: b29b uxth r3, r3
8007626: 461a mov r2, r3
8007628: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
800762c: 4413 add r3, r2
800762e: f8c7 30cc str.w r3, [r7, #204] ; 0xcc
8007632: f507 7384 add.w r3, r7, #264 ; 0x108
8007636: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800763a: 681b ldr r3, [r3, #0]
800763c: 781b ldrb r3, [r3, #0]
800763e: 011a lsls r2, r3, #4
8007640: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
8007644: 4413 add r3, r2
8007646: f203 4304 addw r3, r3, #1028 ; 0x404
800764a: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8
800764e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007652: 2b00 cmp r3, #0
8007654: d116 bne.n 8007684 <USB_EPStartXfer+0x13aa>
8007656: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
800765a: 881b ldrh r3, [r3, #0]
800765c: b29b uxth r3, r3
800765e: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8007662: b29a uxth r2, r3
8007664: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8007668: 801a strh r2, [r3, #0]
800766a: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
800766e: 881b ldrh r3, [r3, #0]
8007670: b29b uxth r3, r3
8007672: ea6f 4343 mvn.w r3, r3, lsl #17
8007676: ea6f 4353 mvn.w r3, r3, lsr #17
800767a: b29a uxth r2, r3
800767c: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8007680: 801a strh r2, [r3, #0]
8007682: e06b b.n 800775c <USB_EPStartXfer+0x1482>
8007684: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007688: 2b3e cmp r3, #62 ; 0x3e
800768a: d818 bhi.n 80076be <USB_EPStartXfer+0x13e4>
800768c: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007690: 085b lsrs r3, r3, #1
8007692: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
8007696: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800769a: f003 0301 and.w r3, r3, #1
800769e: 2b00 cmp r3, #0
80076a0: d004 beq.n 80076ac <USB_EPStartXfer+0x13d2>
80076a2: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
80076a6: 3301 adds r3, #1
80076a8: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
80076ac: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
80076b0: b29b uxth r3, r3
80076b2: 029b lsls r3, r3, #10
80076b4: b29a uxth r2, r3
80076b6: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
80076ba: 801a strh r2, [r3, #0]
80076bc: e04e b.n 800775c <USB_EPStartXfer+0x1482>
80076be: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80076c2: 095b lsrs r3, r3, #5
80076c4: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
80076c8: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80076cc: f003 031f and.w r3, r3, #31
80076d0: 2b00 cmp r3, #0
80076d2: d104 bne.n 80076de <USB_EPStartXfer+0x1404>
80076d4: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
80076d8: 3b01 subs r3, #1
80076da: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
80076de: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
80076e2: b29b uxth r3, r3
80076e4: 029b lsls r3, r3, #10
80076e6: b29b uxth r3, r3
80076e8: ea6f 4343 mvn.w r3, r3, lsl #17
80076ec: ea6f 4353 mvn.w r3, r3, lsr #17
80076f0: b29a uxth r2, r3
80076f2: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
80076f6: 801a strh r2, [r3, #0]
80076f8: e030 b.n 800775c <USB_EPStartXfer+0x1482>
80076fa: f507 7384 add.w r3, r7, #264 ; 0x108
80076fe: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007702: 681b ldr r3, [r3, #0]
8007704: 785b ldrb r3, [r3, #1]
8007706: 2b01 cmp r3, #1
8007708: d128 bne.n 800775c <USB_EPStartXfer+0x1482>
800770a: f507 7384 add.w r3, r7, #264 ; 0x108
800770e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007712: 681b ldr r3, [r3, #0]
8007714: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4
8007718: f507 7384 add.w r3, r7, #264 ; 0x108
800771c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007720: 681b ldr r3, [r3, #0]
8007722: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8007726: b29b uxth r3, r3
8007728: 461a mov r2, r3
800772a: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4
800772e: 4413 add r3, r2
8007730: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4
8007734: f507 7384 add.w r3, r7, #264 ; 0x108
8007738: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800773c: 681b ldr r3, [r3, #0]
800773e: 781b ldrb r3, [r3, #0]
8007740: 011a lsls r2, r3, #4
8007742: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4
8007746: 4413 add r3, r2
8007748: f203 4304 addw r3, r3, #1028 ; 0x404
800774c: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0
8007750: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007754: b29a uxth r2, r3
8007756: f8d7 30d0 ldr.w r3, [r7, #208] ; 0xd0
800775a: 801a strh r2, [r3, #0]
800775c: f507 7384 add.w r3, r7, #264 ; 0x108
8007760: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007764: 681b ldr r3, [r3, #0]
8007766: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
800776a: f507 7384 add.w r3, r7, #264 ; 0x108
800776e: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007772: 681b ldr r3, [r3, #0]
8007774: 785b ldrb r3, [r3, #1]
8007776: 2b00 cmp r3, #0
8007778: d178 bne.n 800786c <USB_EPStartXfer+0x1592>
800777a: f507 7384 add.w r3, r7, #264 ; 0x108
800777e: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007782: 681b ldr r3, [r3, #0]
8007784: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
8007788: f507 7384 add.w r3, r7, #264 ; 0x108
800778c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007790: 681b ldr r3, [r3, #0]
8007792: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8007796: b29b uxth r3, r3
8007798: 461a mov r2, r3
800779a: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
800779e: 4413 add r3, r2
80077a0: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
80077a4: f507 7384 add.w r3, r7, #264 ; 0x108
80077a8: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80077ac: 681b ldr r3, [r3, #0]
80077ae: 781b ldrb r3, [r3, #0]
80077b0: 011a lsls r2, r3, #4
80077b2: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
80077b6: 4413 add r3, r2
80077b8: f203 430c addw r3, r3, #1036 ; 0x40c
80077bc: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
80077c0: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80077c4: 2b00 cmp r3, #0
80077c6: d116 bne.n 80077f6 <USB_EPStartXfer+0x151c>
80077c8: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80077cc: 881b ldrh r3, [r3, #0]
80077ce: b29b uxth r3, r3
80077d0: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80077d4: b29a uxth r2, r3
80077d6: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80077da: 801a strh r2, [r3, #0]
80077dc: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80077e0: 881b ldrh r3, [r3, #0]
80077e2: b29b uxth r3, r3
80077e4: ea6f 4343 mvn.w r3, r3, lsl #17
80077e8: ea6f 4353 mvn.w r3, r3, lsr #17
80077ec: b29a uxth r2, r3
80077ee: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80077f2: 801a strh r2, [r3, #0]
80077f4: e067 b.n 80078c6 <USB_EPStartXfer+0x15ec>
80077f6: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80077fa: 2b3e cmp r3, #62 ; 0x3e
80077fc: d818 bhi.n 8007830 <USB_EPStartXfer+0x1556>
80077fe: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007802: 085b lsrs r3, r3, #1
8007804: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
8007808: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800780c: f003 0301 and.w r3, r3, #1
8007810: 2b00 cmp r3, #0
8007812: d004 beq.n 800781e <USB_EPStartXfer+0x1544>
8007814: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
8007818: 3301 adds r3, #1
800781a: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
800781e: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
8007822: b29b uxth r3, r3
8007824: 029b lsls r3, r3, #10
8007826: b29a uxth r2, r3
8007828: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
800782c: 801a strh r2, [r3, #0]
800782e: e04a b.n 80078c6 <USB_EPStartXfer+0x15ec>
8007830: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8007834: 095b lsrs r3, r3, #5
8007836: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
800783a: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800783e: f003 031f and.w r3, r3, #31
8007842: 2b00 cmp r3, #0
8007844: d104 bne.n 8007850 <USB_EPStartXfer+0x1576>
8007846: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
800784a: 3b01 subs r3, #1
800784c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
8007850: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
8007854: b29b uxth r3, r3
8007856: 029b lsls r3, r3, #10
8007858: b29b uxth r3, r3
800785a: ea6f 4343 mvn.w r3, r3, lsl #17
800785e: ea6f 4353 mvn.w r3, r3, lsr #17
8007862: b29a uxth r2, r3
8007864: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
8007868: 801a strh r2, [r3, #0]
800786a: e02c b.n 80078c6 <USB_EPStartXfer+0x15ec>
800786c: f507 7384 add.w r3, r7, #264 ; 0x108
8007870: f5a3 7384 sub.w r3, r3, #264 ; 0x108
8007874: 681b ldr r3, [r3, #0]
8007876: 785b ldrb r3, [r3, #1]
8007878: 2b01 cmp r3, #1
800787a: d124 bne.n 80078c6 <USB_EPStartXfer+0x15ec>
800787c: f507 7384 add.w r3, r7, #264 ; 0x108
8007880: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007884: 681b ldr r3, [r3, #0]
8007886: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800788a: b29b uxth r3, r3
800788c: 461a mov r2, r3
800788e: f8d7 30c4 ldr.w r3, [r7, #196] ; 0xc4
8007892: 4413 add r3, r2
8007894: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
8007898: f507 7384 add.w r3, r7, #264 ; 0x108
800789c: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80078a0: 681b ldr r3, [r3, #0]
80078a2: 781b ldrb r3, [r3, #0]
80078a4: 011a lsls r2, r3, #4
80078a6: f8d7 30c4 ldr.w r3, [r7, #196] ; 0xc4
80078aa: 4413 add r3, r2
80078ac: f203 430c addw r3, r3, #1036 ; 0x40c
80078b0: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
80078b4: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
80078b8: b29a uxth r2, r3
80078ba: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
80078be: 801a strh r2, [r3, #0]
80078c0: e001 b.n 80078c6 <USB_EPStartXfer+0x15ec>
}
else
{
return HAL_ERROR;
80078c2: 2301 movs r3, #1
80078c4: e03a b.n 800793c <USB_EPStartXfer+0x1662>
}
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80078c6: f507 7384 add.w r3, r7, #264 ; 0x108
80078ca: f5a3 7382 sub.w r3, r3, #260 ; 0x104
80078ce: 681a ldr r2, [r3, #0]
80078d0: f507 7384 add.w r3, r7, #264 ; 0x108
80078d4: f5a3 7384 sub.w r3, r3, #264 ; 0x108
80078d8: 681b ldr r3, [r3, #0]
80078da: 781b ldrb r3, [r3, #0]
80078dc: 009b lsls r3, r3, #2
80078de: 4413 add r3, r2
80078e0: 881b ldrh r3, [r3, #0]
80078e2: b29b uxth r3, r3
80078e4: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80078e8: f023 0370 bic.w r3, r3, #112 ; 0x70
80078ec: f8a7 308a strh.w r3, [r7, #138] ; 0x8a
80078f0: f8b7 308a ldrh.w r3, [r7, #138] ; 0x8a
80078f4: f483 5380 eor.w r3, r3, #4096 ; 0x1000
80078f8: f8a7 308a strh.w r3, [r7, #138] ; 0x8a
80078fc: f8b7 308a ldrh.w r3, [r7, #138] ; 0x8a
8007900: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8007904: f8a7 308a strh.w r3, [r7, #138] ; 0x8a
8007908: f507 7384 add.w r3, r7, #264 ; 0x108
800790c: f5a3 7382 sub.w r3, r3, #260 ; 0x104
8007910: 681a ldr r2, [r3, #0]
8007912: f507 7384 add.w r3, r7, #264 ; 0x108
8007916: f5a3 7384 sub.w r3, r3, #264 ; 0x108
800791a: 681b ldr r3, [r3, #0]
800791c: 781b ldrb r3, [r3, #0]
800791e: 009b lsls r3, r3, #2
8007920: 441a add r2, r3
8007922: f8b7 308a ldrh.w r3, [r7, #138] ; 0x8a
8007926: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800792a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800792e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007932: f043 0380 orr.w r3, r3, #128 ; 0x80
8007936: b29b uxth r3, r3
8007938: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800793a: 2300 movs r3, #0
}
800793c: 4618 mov r0, r3
800793e: f507 7784 add.w r7, r7, #264 ; 0x108
8007942: 46bd mov sp, r7
8007944: bd80 pop {r7, pc}
08007946 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8007946: b480 push {r7}
8007948: b085 sub sp, #20
800794a: af00 add r7, sp, #0
800794c: 6078 str r0, [r7, #4]
800794e: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
8007950: 683b ldr r3, [r7, #0]
8007952: 785b ldrb r3, [r3, #1]
8007954: 2b00 cmp r3, #0
8007956: d020 beq.n 800799a <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
8007958: 687a ldr r2, [r7, #4]
800795a: 683b ldr r3, [r7, #0]
800795c: 781b ldrb r3, [r3, #0]
800795e: 009b lsls r3, r3, #2
8007960: 4413 add r3, r2
8007962: 881b ldrh r3, [r3, #0]
8007964: b29b uxth r3, r3
8007966: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800796a: f023 0340 bic.w r3, r3, #64 ; 0x40
800796e: 81bb strh r3, [r7, #12]
8007970: 89bb ldrh r3, [r7, #12]
8007972: f083 0310 eor.w r3, r3, #16
8007976: 81bb strh r3, [r7, #12]
8007978: 687a ldr r2, [r7, #4]
800797a: 683b ldr r3, [r7, #0]
800797c: 781b ldrb r3, [r3, #0]
800797e: 009b lsls r3, r3, #2
8007980: 441a add r2, r3
8007982: 89bb ldrh r3, [r7, #12]
8007984: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007988: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800798c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007990: f043 0380 orr.w r3, r3, #128 ; 0x80
8007994: b29b uxth r3, r3
8007996: 8013 strh r3, [r2, #0]
8007998: e01f b.n 80079da <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800799a: 687a ldr r2, [r7, #4]
800799c: 683b ldr r3, [r7, #0]
800799e: 781b ldrb r3, [r3, #0]
80079a0: 009b lsls r3, r3, #2
80079a2: 4413 add r3, r2
80079a4: 881b ldrh r3, [r3, #0]
80079a6: b29b uxth r3, r3
80079a8: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80079ac: f023 0370 bic.w r3, r3, #112 ; 0x70
80079b0: 81fb strh r3, [r7, #14]
80079b2: 89fb ldrh r3, [r7, #14]
80079b4: f483 5380 eor.w r3, r3, #4096 ; 0x1000
80079b8: 81fb strh r3, [r7, #14]
80079ba: 687a ldr r2, [r7, #4]
80079bc: 683b ldr r3, [r7, #0]
80079be: 781b ldrb r3, [r3, #0]
80079c0: 009b lsls r3, r3, #2
80079c2: 441a add r2, r3
80079c4: 89fb ldrh r3, [r7, #14]
80079c6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80079ca: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80079ce: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80079d2: f043 0380 orr.w r3, r3, #128 ; 0x80
80079d6: b29b uxth r3, r3
80079d8: 8013 strh r3, [r2, #0]
}
return HAL_OK;
80079da: 2300 movs r3, #0
}
80079dc: 4618 mov r0, r3
80079de: 3714 adds r7, #20
80079e0: 46bd mov sp, r7
80079e2: f85d 7b04 ldr.w r7, [sp], #4
80079e6: 4770 bx lr
080079e8 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80079e8: b480 push {r7}
80079ea: b087 sub sp, #28
80079ec: af00 add r7, sp, #0
80079ee: 6078 str r0, [r7, #4]
80079f0: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
80079f2: 683b ldr r3, [r7, #0]
80079f4: 7b1b ldrb r3, [r3, #12]
80079f6: 2b00 cmp r3, #0
80079f8: f040 809d bne.w 8007b36 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
80079fc: 683b ldr r3, [r7, #0]
80079fe: 785b ldrb r3, [r3, #1]
8007a00: 2b00 cmp r3, #0
8007a02: d04c beq.n 8007a9e <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8007a04: 687a ldr r2, [r7, #4]
8007a06: 683b ldr r3, [r7, #0]
8007a08: 781b ldrb r3, [r3, #0]
8007a0a: 009b lsls r3, r3, #2
8007a0c: 4413 add r3, r2
8007a0e: 881b ldrh r3, [r3, #0]
8007a10: 823b strh r3, [r7, #16]
8007a12: 8a3b ldrh r3, [r7, #16]
8007a14: f003 0340 and.w r3, r3, #64 ; 0x40
8007a18: 2b00 cmp r3, #0
8007a1a: d01b beq.n 8007a54 <USB_EPClearStall+0x6c>
8007a1c: 687a ldr r2, [r7, #4]
8007a1e: 683b ldr r3, [r7, #0]
8007a20: 781b ldrb r3, [r3, #0]
8007a22: 009b lsls r3, r3, #2
8007a24: 4413 add r3, r2
8007a26: 881b ldrh r3, [r3, #0]
8007a28: b29b uxth r3, r3
8007a2a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8007a2e: f023 0370 bic.w r3, r3, #112 ; 0x70
8007a32: 81fb strh r3, [r7, #14]
8007a34: 687a ldr r2, [r7, #4]
8007a36: 683b ldr r3, [r7, #0]
8007a38: 781b ldrb r3, [r3, #0]
8007a3a: 009b lsls r3, r3, #2
8007a3c: 441a add r2, r3
8007a3e: 89fb ldrh r3, [r7, #14]
8007a40: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007a44: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007a48: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007a4c: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8007a50: b29b uxth r3, r3
8007a52: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8007a54: 683b ldr r3, [r7, #0]
8007a56: 78db ldrb r3, [r3, #3]
8007a58: 2b01 cmp r3, #1
8007a5a: d06c beq.n 8007b36 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8007a5c: 687a ldr r2, [r7, #4]
8007a5e: 683b ldr r3, [r7, #0]
8007a60: 781b ldrb r3, [r3, #0]
8007a62: 009b lsls r3, r3, #2
8007a64: 4413 add r3, r2
8007a66: 881b ldrh r3, [r3, #0]
8007a68: b29b uxth r3, r3
8007a6a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8007a6e: f023 0340 bic.w r3, r3, #64 ; 0x40
8007a72: 81bb strh r3, [r7, #12]
8007a74: 89bb ldrh r3, [r7, #12]
8007a76: f083 0320 eor.w r3, r3, #32
8007a7a: 81bb strh r3, [r7, #12]
8007a7c: 687a ldr r2, [r7, #4]
8007a7e: 683b ldr r3, [r7, #0]
8007a80: 781b ldrb r3, [r3, #0]
8007a82: 009b lsls r3, r3, #2
8007a84: 441a add r2, r3
8007a86: 89bb ldrh r3, [r7, #12]
8007a88: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007a8c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007a90: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007a94: f043 0380 orr.w r3, r3, #128 ; 0x80
8007a98: b29b uxth r3, r3
8007a9a: 8013 strh r3, [r2, #0]
8007a9c: e04b b.n 8007b36 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8007a9e: 687a ldr r2, [r7, #4]
8007aa0: 683b ldr r3, [r7, #0]
8007aa2: 781b ldrb r3, [r3, #0]
8007aa4: 009b lsls r3, r3, #2
8007aa6: 4413 add r3, r2
8007aa8: 881b ldrh r3, [r3, #0]
8007aaa: 82fb strh r3, [r7, #22]
8007aac: 8afb ldrh r3, [r7, #22]
8007aae: f403 4380 and.w r3, r3, #16384 ; 0x4000
8007ab2: 2b00 cmp r3, #0
8007ab4: d01b beq.n 8007aee <USB_EPClearStall+0x106>
8007ab6: 687a ldr r2, [r7, #4]
8007ab8: 683b ldr r3, [r7, #0]
8007aba: 781b ldrb r3, [r3, #0]
8007abc: 009b lsls r3, r3, #2
8007abe: 4413 add r3, r2
8007ac0: 881b ldrh r3, [r3, #0]
8007ac2: b29b uxth r3, r3
8007ac4: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8007ac8: f023 0370 bic.w r3, r3, #112 ; 0x70
8007acc: 82bb strh r3, [r7, #20]
8007ace: 687a ldr r2, [r7, #4]
8007ad0: 683b ldr r3, [r7, #0]
8007ad2: 781b ldrb r3, [r3, #0]
8007ad4: 009b lsls r3, r3, #2
8007ad6: 441a add r2, r3
8007ad8: 8abb ldrh r3, [r7, #20]
8007ada: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007ade: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007ae2: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8007ae6: f043 0380 orr.w r3, r3, #128 ; 0x80
8007aea: b29b uxth r3, r3
8007aec: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8007aee: 687a ldr r2, [r7, #4]
8007af0: 683b ldr r3, [r7, #0]
8007af2: 781b ldrb r3, [r3, #0]
8007af4: 009b lsls r3, r3, #2
8007af6: 4413 add r3, r2
8007af8: 881b ldrh r3, [r3, #0]
8007afa: b29b uxth r3, r3
8007afc: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8007b00: f023 0370 bic.w r3, r3, #112 ; 0x70
8007b04: 827b strh r3, [r7, #18]
8007b06: 8a7b ldrh r3, [r7, #18]
8007b08: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8007b0c: 827b strh r3, [r7, #18]
8007b0e: 8a7b ldrh r3, [r7, #18]
8007b10: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8007b14: 827b strh r3, [r7, #18]
8007b16: 687a ldr r2, [r7, #4]
8007b18: 683b ldr r3, [r7, #0]
8007b1a: 781b ldrb r3, [r3, #0]
8007b1c: 009b lsls r3, r3, #2
8007b1e: 441a add r2, r3
8007b20: 8a7b ldrh r3, [r7, #18]
8007b22: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8007b26: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8007b2a: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8007b2e: f043 0380 orr.w r3, r3, #128 ; 0x80
8007b32: b29b uxth r3, r3
8007b34: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
8007b36: 2300 movs r3, #0
}
8007b38: 4618 mov r0, r3
8007b3a: 371c adds r7, #28
8007b3c: 46bd mov sp, r7
8007b3e: f85d 7b04 ldr.w r7, [sp], #4
8007b42: 4770 bx lr
08007b44 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
8007b44: b480 push {r7}
8007b46: b083 sub sp, #12
8007b48: af00 add r7, sp, #0
8007b4a: 6078 str r0, [r7, #4]
8007b4c: 460b mov r3, r1
8007b4e: 70fb strb r3, [r7, #3]
if (address == 0U)
8007b50: 78fb ldrb r3, [r7, #3]
8007b52: 2b00 cmp r3, #0
8007b54: d103 bne.n 8007b5e <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
8007b56: 687b ldr r3, [r7, #4]
8007b58: 2280 movs r2, #128 ; 0x80
8007b5a: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
}
return HAL_OK;
8007b5e: 2300 movs r3, #0
}
8007b60: 4618 mov r0, r3
8007b62: 370c adds r7, #12
8007b64: 46bd mov sp, r7
8007b66: f85d 7b04 ldr.w r7, [sp], #4
8007b6a: 4770 bx lr
08007b6c <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
8007b6c: b480 push {r7}
8007b6e: b083 sub sp, #12
8007b70: af00 add r7, sp, #0
8007b72: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8007b74: 2300 movs r3, #0
}
8007b76: 4618 mov r0, r3
8007b78: 370c adds r7, #12
8007b7a: 46bd mov sp, r7
8007b7c: f85d 7b04 ldr.w r7, [sp], #4
8007b80: 4770 bx lr
08007b82 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
{
8007b82: b480 push {r7}
8007b84: b085 sub sp, #20
8007b86: af00 add r7, sp, #0
8007b88: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
8007b8a: 687b ldr r3, [r7, #4]
8007b8c: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8007b90: b29b uxth r3, r3
8007b92: 60fb str r3, [r7, #12]
return tmpreg;
8007b94: 68fb ldr r3, [r7, #12]
}
8007b96: 4618 mov r0, r3
8007b98: 3714 adds r7, #20
8007b9a: 46bd mov sp, r7
8007b9c: f85d 7b04 ldr.w r7, [sp], #4
8007ba0: 4770 bx lr
08007ba2 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8007ba2: b480 push {r7}
8007ba4: b08d sub sp, #52 ; 0x34
8007ba6: af00 add r7, sp, #0
8007ba8: 60f8 str r0, [r7, #12]
8007baa: 60b9 str r1, [r7, #8]
8007bac: 4611 mov r1, r2
8007bae: 461a mov r2, r3
8007bb0: 460b mov r3, r1
8007bb2: 80fb strh r3, [r7, #6]
8007bb4: 4613 mov r3, r2
8007bb6: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
8007bb8: 88bb ldrh r3, [r7, #4]
8007bba: 3301 adds r3, #1
8007bbc: 085b lsrs r3, r3, #1
8007bbe: 623b str r3, [r7, #32]
uint32_t BaseAddr = (uint32_t)USBx;
8007bc0: 68fb ldr r3, [r7, #12]
8007bc2: 61fb str r3, [r7, #28]
uint32_t i, temp1, temp2;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8007bc4: 68bb ldr r3, [r7, #8]
8007bc6: 627b str r3, [r7, #36] ; 0x24
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8007bc8: 88fb ldrh r3, [r7, #6]
8007bca: 005a lsls r2, r3, #1
8007bcc: 69fb ldr r3, [r7, #28]
8007bce: 4413 add r3, r2
8007bd0: f503 6380 add.w r3, r3, #1024 ; 0x400
8007bd4: 62bb str r3, [r7, #40] ; 0x28
for (i = n; i != 0U; i--)
8007bd6: 6a3b ldr r3, [r7, #32]
8007bd8: 62fb str r3, [r7, #44] ; 0x2c
8007bda: e01e b.n 8007c1a <USB_WritePMA+0x78>
{
temp1 = *pBuf;
8007bdc: 6a7b ldr r3, [r7, #36] ; 0x24
8007bde: 781b ldrb r3, [r3, #0]
8007be0: 61bb str r3, [r7, #24]
pBuf++;
8007be2: 6a7b ldr r3, [r7, #36] ; 0x24
8007be4: 3301 adds r3, #1
8007be6: 627b str r3, [r7, #36] ; 0x24
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8));
8007be8: 6a7b ldr r3, [r7, #36] ; 0x24
8007bea: 781b ldrb r3, [r3, #0]
8007bec: b29b uxth r3, r3
8007bee: 021b lsls r3, r3, #8
8007bf0: b29b uxth r3, r3
8007bf2: 461a mov r2, r3
8007bf4: 69bb ldr r3, [r7, #24]
8007bf6: 4313 orrs r3, r2
8007bf8: 617b str r3, [r7, #20]
*pdwVal = (uint16_t)temp2;
8007bfa: 697b ldr r3, [r7, #20]
8007bfc: b29a uxth r2, r3
8007bfe: 6abb ldr r3, [r7, #40] ; 0x28
8007c00: 801a strh r2, [r3, #0]
pdwVal++;
8007c02: 6abb ldr r3, [r7, #40] ; 0x28
8007c04: 3302 adds r3, #2
8007c06: 62bb str r3, [r7, #40] ; 0x28
#if PMA_ACCESS > 1U
pdwVal++;
8007c08: 6abb ldr r3, [r7, #40] ; 0x28
8007c0a: 3302 adds r3, #2
8007c0c: 62bb str r3, [r7, #40] ; 0x28
#endif
pBuf++;
8007c0e: 6a7b ldr r3, [r7, #36] ; 0x24
8007c10: 3301 adds r3, #1
8007c12: 627b str r3, [r7, #36] ; 0x24
for (i = n; i != 0U; i--)
8007c14: 6afb ldr r3, [r7, #44] ; 0x2c
8007c16: 3b01 subs r3, #1
8007c18: 62fb str r3, [r7, #44] ; 0x2c
8007c1a: 6afb ldr r3, [r7, #44] ; 0x2c
8007c1c: 2b00 cmp r3, #0
8007c1e: d1dd bne.n 8007bdc <USB_WritePMA+0x3a>
}
}
8007c20: bf00 nop
8007c22: bf00 nop
8007c24: 3734 adds r7, #52 ; 0x34
8007c26: 46bd mov sp, r7
8007c28: f85d 7b04 ldr.w r7, [sp], #4
8007c2c: 4770 bx lr
08007c2e <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8007c2e: b480 push {r7}
8007c30: b08b sub sp, #44 ; 0x2c
8007c32: af00 add r7, sp, #0
8007c34: 60f8 str r0, [r7, #12]
8007c36: 60b9 str r1, [r7, #8]
8007c38: 4611 mov r1, r2
8007c3a: 461a mov r2, r3
8007c3c: 460b mov r3, r1
8007c3e: 80fb strh r3, [r7, #6]
8007c40: 4613 mov r3, r2
8007c42: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8007c44: 88bb ldrh r3, [r7, #4]
8007c46: 085b lsrs r3, r3, #1
8007c48: b29b uxth r3, r3
8007c4a: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8007c4c: 68fb ldr r3, [r7, #12]
8007c4e: 617b str r3, [r7, #20]
uint32_t i, temp;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8007c50: 68bb ldr r3, [r7, #8]
8007c52: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8007c54: 88fb ldrh r3, [r7, #6]
8007c56: 005a lsls r2, r3, #1
8007c58: 697b ldr r3, [r7, #20]
8007c5a: 4413 add r3, r2
8007c5c: f503 6380 add.w r3, r3, #1024 ; 0x400
8007c60: 623b str r3, [r7, #32]
for (i = n; i != 0U; i--)
8007c62: 69bb ldr r3, [r7, #24]
8007c64: 627b str r3, [r7, #36] ; 0x24
8007c66: e01b b.n 8007ca0 <USB_ReadPMA+0x72>
{
temp = *(__IO uint16_t *)pdwVal;
8007c68: 6a3b ldr r3, [r7, #32]
8007c6a: 881b ldrh r3, [r3, #0]
8007c6c: b29b uxth r3, r3
8007c6e: 613b str r3, [r7, #16]
pdwVal++;
8007c70: 6a3b ldr r3, [r7, #32]
8007c72: 3302 adds r3, #2
8007c74: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
8007c76: 693b ldr r3, [r7, #16]
8007c78: b2da uxtb r2, r3
8007c7a: 69fb ldr r3, [r7, #28]
8007c7c: 701a strb r2, [r3, #0]
pBuf++;
8007c7e: 69fb ldr r3, [r7, #28]
8007c80: 3301 adds r3, #1
8007c82: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
8007c84: 693b ldr r3, [r7, #16]
8007c86: 0a1b lsrs r3, r3, #8
8007c88: b2da uxtb r2, r3
8007c8a: 69fb ldr r3, [r7, #28]
8007c8c: 701a strb r2, [r3, #0]
pBuf++;
8007c8e: 69fb ldr r3, [r7, #28]
8007c90: 3301 adds r3, #1
8007c92: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
8007c94: 6a3b ldr r3, [r7, #32]
8007c96: 3302 adds r3, #2
8007c98: 623b str r3, [r7, #32]
for (i = n; i != 0U; i--)
8007c9a: 6a7b ldr r3, [r7, #36] ; 0x24
8007c9c: 3b01 subs r3, #1
8007c9e: 627b str r3, [r7, #36] ; 0x24
8007ca0: 6a7b ldr r3, [r7, #36] ; 0x24
8007ca2: 2b00 cmp r3, #0
8007ca4: d1e0 bne.n 8007c68 <USB_ReadPMA+0x3a>
#endif
}
if ((wNBytes % 2U) != 0U)
8007ca6: 88bb ldrh r3, [r7, #4]
8007ca8: f003 0301 and.w r3, r3, #1
8007cac: b29b uxth r3, r3
8007cae: 2b00 cmp r3, #0
8007cb0: d007 beq.n 8007cc2 <USB_ReadPMA+0x94>
{
temp = *pdwVal;
8007cb2: 6a3b ldr r3, [r7, #32]
8007cb4: 881b ldrh r3, [r3, #0]
8007cb6: b29b uxth r3, r3
8007cb8: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
8007cba: 693b ldr r3, [r7, #16]
8007cbc: b2da uxtb r2, r3
8007cbe: 69fb ldr r3, [r7, #28]
8007cc0: 701a strb r2, [r3, #0]
}
}
8007cc2: bf00 nop
8007cc4: 372c adds r7, #44 ; 0x2c
8007cc6: 46bd mov sp, r7
8007cc8: f85d 7b04 ldr.w r7, [sp], #4
8007ccc: 4770 bx lr
08007cce <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8007cce: b580 push {r7, lr}
8007cd0: b084 sub sp, #16
8007cd2: af00 add r7, sp, #0
8007cd4: 6078 str r0, [r7, #4]
8007cd6: 460b mov r3, r1
8007cd8: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8007cda: 2300 movs r3, #0
8007cdc: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007cde: 687b ldr r3, [r7, #4]
8007ce0: 7c1b ldrb r3, [r3, #16]
8007ce2: 2b00 cmp r3, #0
8007ce4: d115 bne.n 8007d12 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8007ce6: f44f 7300 mov.w r3, #512 ; 0x200
8007cea: 2202 movs r2, #2
8007cec: 2181 movs r1, #129 ; 0x81
8007cee: 6878 ldr r0, [r7, #4]
8007cf0: f001 ff6b bl 8009bca <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8007cf4: 687b ldr r3, [r7, #4]
8007cf6: 2201 movs r2, #1
8007cf8: 62da str r2, [r3, #44] ; 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8007cfa: f44f 7300 mov.w r3, #512 ; 0x200
8007cfe: 2202 movs r2, #2
8007d00: 2101 movs r1, #1
8007d02: 6878 ldr r0, [r7, #4]
8007d04: f001 ff61 bl 8009bca <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8007d08: 687b ldr r3, [r7, #4]
8007d0a: 2201 movs r2, #1
8007d0c: f8c3 216c str.w r2, [r3, #364] ; 0x16c
8007d10: e012 b.n 8007d38 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8007d12: 2340 movs r3, #64 ; 0x40
8007d14: 2202 movs r2, #2
8007d16: 2181 movs r1, #129 ; 0x81
8007d18: 6878 ldr r0, [r7, #4]
8007d1a: f001 ff56 bl 8009bca <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8007d1e: 687b ldr r3, [r7, #4]
8007d20: 2201 movs r2, #1
8007d22: 62da str r2, [r3, #44] ; 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8007d24: 2340 movs r3, #64 ; 0x40
8007d26: 2202 movs r2, #2
8007d28: 2101 movs r1, #1
8007d2a: 6878 ldr r0, [r7, #4]
8007d2c: f001 ff4d bl 8009bca <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8007d30: 687b ldr r3, [r7, #4]
8007d32: 2201 movs r2, #1
8007d34: f8c3 216c str.w r2, [r3, #364] ; 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
8007d38: 2308 movs r3, #8
8007d3a: 2203 movs r2, #3
8007d3c: 2182 movs r1, #130 ; 0x82
8007d3e: 6878 ldr r0, [r7, #4]
8007d40: f001 ff43 bl 8009bca <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
8007d44: 687b ldr r3, [r7, #4]
8007d46: 2201 movs r2, #1
8007d48: 641a str r2, [r3, #64] ; 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
8007d4a: f44f 7007 mov.w r0, #540 ; 0x21c
8007d4e: f002 f865 bl 8009e1c <USBD_static_malloc>
8007d52: 4602 mov r2, r0
8007d54: 687b ldr r3, [r7, #4]
8007d56: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
if (pdev->pClassData == NULL)
8007d5a: 687b ldr r3, [r7, #4]
8007d5c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007d60: 2b00 cmp r3, #0
8007d62: d102 bne.n 8007d6a <USBD_CDC_Init+0x9c>
{
ret = 1U;
8007d64: 2301 movs r3, #1
8007d66: 73fb strb r3, [r7, #15]
8007d68: e026 b.n 8007db8 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007d6a: 687b ldr r3, [r7, #4]
8007d6c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007d70: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
8007d72: 687b ldr r3, [r7, #4]
8007d74: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8007d78: 681b ldr r3, [r3, #0]
8007d7a: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
8007d7c: 68bb ldr r3, [r7, #8]
8007d7e: 2200 movs r2, #0
8007d80: f8c3 2214 str.w r2, [r3, #532] ; 0x214
hcdc->RxState = 0U;
8007d84: 68bb ldr r3, [r7, #8]
8007d86: 2200 movs r2, #0
8007d88: f8c3 2218 str.w r2, [r3, #536] ; 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007d8c: 687b ldr r3, [r7, #4]
8007d8e: 7c1b ldrb r3, [r3, #16]
8007d90: 2b00 cmp r3, #0
8007d92: d109 bne.n 8007da8 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
8007d94: 68bb ldr r3, [r7, #8]
8007d96: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
8007d9a: f44f 7300 mov.w r3, #512 ; 0x200
8007d9e: 2101 movs r1, #1
8007da0: 6878 ldr r0, [r7, #4]
8007da2: f002 f804 bl 8009dae <USBD_LL_PrepareReceive>
8007da6: e007 b.n 8007db8 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
8007da8: 68bb ldr r3, [r7, #8]
8007daa: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
8007dae: 2340 movs r3, #64 ; 0x40
8007db0: 2101 movs r1, #1
8007db2: 6878 ldr r0, [r7, #4]
8007db4: f001 fffb bl 8009dae <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
8007db8: 7bfb ldrb r3, [r7, #15]
}
8007dba: 4618 mov r0, r3
8007dbc: 3710 adds r7, #16
8007dbe: 46bd mov sp, r7
8007dc0: bd80 pop {r7, pc}
08007dc2 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8007dc2: b580 push {r7, lr}
8007dc4: b084 sub sp, #16
8007dc6: af00 add r7, sp, #0
8007dc8: 6078 str r0, [r7, #4]
8007dca: 460b mov r3, r1
8007dcc: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8007dce: 2300 movs r3, #0
8007dd0: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
8007dd2: 2181 movs r1, #129 ; 0x81
8007dd4: 6878 ldr r0, [r7, #4]
8007dd6: f001 ff1e bl 8009c16 <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
8007dda: 687b ldr r3, [r7, #4]
8007ddc: 2200 movs r2, #0
8007dde: 62da str r2, [r3, #44] ; 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
8007de0: 2101 movs r1, #1
8007de2: 6878 ldr r0, [r7, #4]
8007de4: f001 ff17 bl 8009c16 <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
8007de8: 687b ldr r3, [r7, #4]
8007dea: 2200 movs r2, #0
8007dec: f8c3 216c str.w r2, [r3, #364] ; 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
8007df0: 2182 movs r1, #130 ; 0x82
8007df2: 6878 ldr r0, [r7, #4]
8007df4: f001 ff0f bl 8009c16 <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
8007df8: 687b ldr r3, [r7, #4]
8007dfa: 2200 movs r2, #0
8007dfc: 641a str r2, [r3, #64] ; 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
8007dfe: 687b ldr r3, [r7, #4]
8007e00: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007e04: 2b00 cmp r3, #0
8007e06: d00e beq.n 8007e26 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
8007e08: 687b ldr r3, [r7, #4]
8007e0a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8007e0e: 685b ldr r3, [r3, #4]
8007e10: 4798 blx r3
USBD_free(pdev->pClassData);
8007e12: 687b ldr r3, [r7, #4]
8007e14: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007e18: 4618 mov r0, r3
8007e1a: f002 f80d bl 8009e38 <USBD_static_free>
pdev->pClassData = NULL;
8007e1e: 687b ldr r3, [r7, #4]
8007e20: 2200 movs r2, #0
8007e22: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
}
return ret;
8007e26: 7bfb ldrb r3, [r7, #15]
}
8007e28: 4618 mov r0, r3
8007e2a: 3710 adds r7, #16
8007e2c: 46bd mov sp, r7
8007e2e: bd80 pop {r7, pc}
08007e30 <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007e30: b580 push {r7, lr}
8007e32: b086 sub sp, #24
8007e34: af00 add r7, sp, #0
8007e36: 6078 str r0, [r7, #4]
8007e38: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007e3a: 687b ldr r3, [r7, #4]
8007e3c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007e40: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
8007e42: 2300 movs r3, #0
8007e44: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
8007e46: 2300 movs r3, #0
8007e48: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
8007e4a: 2300 movs r3, #0
8007e4c: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007e4e: 683b ldr r3, [r7, #0]
8007e50: 781b ldrb r3, [r3, #0]
8007e52: f003 0360 and.w r3, r3, #96 ; 0x60
8007e56: 2b00 cmp r3, #0
8007e58: d039 beq.n 8007ece <USBD_CDC_Setup+0x9e>
8007e5a: 2b20 cmp r3, #32
8007e5c: d17f bne.n 8007f5e <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
8007e5e: 683b ldr r3, [r7, #0]
8007e60: 88db ldrh r3, [r3, #6]
8007e62: 2b00 cmp r3, #0
8007e64: d029 beq.n 8007eba <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
8007e66: 683b ldr r3, [r7, #0]
8007e68: 781b ldrb r3, [r3, #0]
8007e6a: b25b sxtb r3, r3
8007e6c: 2b00 cmp r3, #0
8007e6e: da11 bge.n 8007e94 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8007e70: 687b ldr r3, [r7, #4]
8007e72: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8007e76: 689b ldr r3, [r3, #8]
8007e78: 683a ldr r2, [r7, #0]
8007e7a: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
8007e7c: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8007e7e: 683a ldr r2, [r7, #0]
8007e80: 88d2 ldrh r2, [r2, #6]
8007e82: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
8007e84: 6939 ldr r1, [r7, #16]
8007e86: 683b ldr r3, [r7, #0]
8007e88: 88db ldrh r3, [r3, #6]
8007e8a: 461a mov r2, r3
8007e8c: 6878 ldr r0, [r7, #4]
8007e8e: f001 fa14 bl 80092ba <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
8007e92: e06b b.n 8007f6c <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
8007e94: 683b ldr r3, [r7, #0]
8007e96: 785a ldrb r2, [r3, #1]
8007e98: 693b ldr r3, [r7, #16]
8007e9a: f883 2200 strb.w r2, [r3, #512] ; 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
8007e9e: 683b ldr r3, [r7, #0]
8007ea0: 88db ldrh r3, [r3, #6]
8007ea2: b2da uxtb r2, r3
8007ea4: 693b ldr r3, [r7, #16]
8007ea6: f883 2201 strb.w r2, [r3, #513] ; 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
8007eaa: 6939 ldr r1, [r7, #16]
8007eac: 683b ldr r3, [r7, #0]
8007eae: 88db ldrh r3, [r3, #6]
8007eb0: 461a mov r2, r3
8007eb2: 6878 ldr r0, [r7, #4]
8007eb4: f001 fa2f bl 8009316 <USBD_CtlPrepareRx>
break;
8007eb8: e058 b.n 8007f6c <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8007eba: 687b ldr r3, [r7, #4]
8007ebc: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8007ec0: 689b ldr r3, [r3, #8]
8007ec2: 683a ldr r2, [r7, #0]
8007ec4: 7850 ldrb r0, [r2, #1]
8007ec6: 2200 movs r2, #0
8007ec8: 6839 ldr r1, [r7, #0]
8007eca: 4798 blx r3
break;
8007ecc: e04e b.n 8007f6c <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8007ece: 683b ldr r3, [r7, #0]
8007ed0: 785b ldrb r3, [r3, #1]
8007ed2: 2b0b cmp r3, #11
8007ed4: d02e beq.n 8007f34 <USBD_CDC_Setup+0x104>
8007ed6: 2b0b cmp r3, #11
8007ed8: dc38 bgt.n 8007f4c <USBD_CDC_Setup+0x11c>
8007eda: 2b00 cmp r3, #0
8007edc: d002 beq.n 8007ee4 <USBD_CDC_Setup+0xb4>
8007ede: 2b0a cmp r3, #10
8007ee0: d014 beq.n 8007f0c <USBD_CDC_Setup+0xdc>
8007ee2: e033 b.n 8007f4c <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007ee4: 687b ldr r3, [r7, #4]
8007ee6: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8007eea: 2b03 cmp r3, #3
8007eec: d107 bne.n 8007efe <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
8007eee: f107 030c add.w r3, r7, #12
8007ef2: 2202 movs r2, #2
8007ef4: 4619 mov r1, r3
8007ef6: 6878 ldr r0, [r7, #4]
8007ef8: f001 f9df bl 80092ba <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8007efc: e02e b.n 8007f5c <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8007efe: 6839 ldr r1, [r7, #0]
8007f00: 6878 ldr r0, [r7, #4]
8007f02: f001 f96f bl 80091e4 <USBD_CtlError>
ret = USBD_FAIL;
8007f06: 2302 movs r3, #2
8007f08: 75fb strb r3, [r7, #23]
break;
8007f0a: e027 b.n 8007f5c <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007f0c: 687b ldr r3, [r7, #4]
8007f0e: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8007f12: 2b03 cmp r3, #3
8007f14: d107 bne.n 8007f26 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
8007f16: f107 030f add.w r3, r7, #15
8007f1a: 2201 movs r2, #1
8007f1c: 4619 mov r1, r3
8007f1e: 6878 ldr r0, [r7, #4]
8007f20: f001 f9cb bl 80092ba <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8007f24: e01a b.n 8007f5c <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8007f26: 6839 ldr r1, [r7, #0]
8007f28: 6878 ldr r0, [r7, #4]
8007f2a: f001 f95b bl 80091e4 <USBD_CtlError>
ret = USBD_FAIL;
8007f2e: 2302 movs r3, #2
8007f30: 75fb strb r3, [r7, #23]
break;
8007f32: e013 b.n 8007f5c <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
8007f34: 687b ldr r3, [r7, #4]
8007f36: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8007f3a: 2b03 cmp r3, #3
8007f3c: d00d beq.n 8007f5a <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
8007f3e: 6839 ldr r1, [r7, #0]
8007f40: 6878 ldr r0, [r7, #4]
8007f42: f001 f94f bl 80091e4 <USBD_CtlError>
ret = USBD_FAIL;
8007f46: 2302 movs r3, #2
8007f48: 75fb strb r3, [r7, #23]
}
break;
8007f4a: e006 b.n 8007f5a <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
8007f4c: 6839 ldr r1, [r7, #0]
8007f4e: 6878 ldr r0, [r7, #4]
8007f50: f001 f948 bl 80091e4 <USBD_CtlError>
ret = USBD_FAIL;
8007f54: 2302 movs r3, #2
8007f56: 75fb strb r3, [r7, #23]
break;
8007f58: e000 b.n 8007f5c <USBD_CDC_Setup+0x12c>
break;
8007f5a: bf00 nop
}
break;
8007f5c: e006 b.n 8007f6c <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
8007f5e: 6839 ldr r1, [r7, #0]
8007f60: 6878 ldr r0, [r7, #4]
8007f62: f001 f93f bl 80091e4 <USBD_CtlError>
ret = USBD_FAIL;
8007f66: 2302 movs r3, #2
8007f68: 75fb strb r3, [r7, #23]
break;
8007f6a: bf00 nop
}
return ret;
8007f6c: 7dfb ldrb r3, [r7, #23]
}
8007f6e: 4618 mov r0, r3
8007f70: 3718 adds r7, #24
8007f72: 46bd mov sp, r7
8007f74: bd80 pop {r7, pc}
08007f76 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8007f76: b580 push {r7, lr}
8007f78: b084 sub sp, #16
8007f7a: af00 add r7, sp, #0
8007f7c: 6078 str r0, [r7, #4]
8007f7e: 460b mov r3, r1
8007f80: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
8007f82: 687b ldr r3, [r7, #4]
8007f84: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007f88: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
8007f8a: 687b ldr r3, [r7, #4]
8007f8c: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007f90: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
8007f92: 687b ldr r3, [r7, #4]
8007f94: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8007f98: 2b00 cmp r3, #0
8007f9a: d03a beq.n 8008012 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
8007f9c: 78fa ldrb r2, [r7, #3]
8007f9e: 6879 ldr r1, [r7, #4]
8007fa0: 4613 mov r3, r2
8007fa2: 009b lsls r3, r3, #2
8007fa4: 4413 add r3, r2
8007fa6: 009b lsls r3, r3, #2
8007fa8: 440b add r3, r1
8007faa: 331c adds r3, #28
8007fac: 681b ldr r3, [r3, #0]
8007fae: 2b00 cmp r3, #0
8007fb0: d029 beq.n 8008006 <USBD_CDC_DataIn+0x90>
8007fb2: 78fa ldrb r2, [r7, #3]
8007fb4: 6879 ldr r1, [r7, #4]
8007fb6: 4613 mov r3, r2
8007fb8: 009b lsls r3, r3, #2
8007fba: 4413 add r3, r2
8007fbc: 009b lsls r3, r3, #2
8007fbe: 440b add r3, r1
8007fc0: 331c adds r3, #28
8007fc2: 681a ldr r2, [r3, #0]
8007fc4: 78f9 ldrb r1, [r7, #3]
8007fc6: 68b8 ldr r0, [r7, #8]
8007fc8: 460b mov r3, r1
8007fca: 009b lsls r3, r3, #2
8007fcc: 440b add r3, r1
8007fce: 00db lsls r3, r3, #3
8007fd0: 4403 add r3, r0
8007fd2: 3338 adds r3, #56 ; 0x38
8007fd4: 681b ldr r3, [r3, #0]
8007fd6: fbb2 f1f3 udiv r1, r2, r3
8007fda: fb01 f303 mul.w r3, r1, r3
8007fde: 1ad3 subs r3, r2, r3
8007fe0: 2b00 cmp r3, #0
8007fe2: d110 bne.n 8008006 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
8007fe4: 78fa ldrb r2, [r7, #3]
8007fe6: 6879 ldr r1, [r7, #4]
8007fe8: 4613 mov r3, r2
8007fea: 009b lsls r3, r3, #2
8007fec: 4413 add r3, r2
8007fee: 009b lsls r3, r3, #2
8007ff0: 440b add r3, r1
8007ff2: 331c adds r3, #28
8007ff4: 2200 movs r2, #0
8007ff6: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
8007ff8: 78f9 ldrb r1, [r7, #3]
8007ffa: 2300 movs r3, #0
8007ffc: 2200 movs r2, #0
8007ffe: 6878 ldr r0, [r7, #4]
8008000: f001 feb2 bl 8009d68 <USBD_LL_Transmit>
8008004: e003 b.n 800800e <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
8008006: 68fb ldr r3, [r7, #12]
8008008: 2200 movs r2, #0
800800a: f8c3 2214 str.w r2, [r3, #532] ; 0x214
}
return USBD_OK;
800800e: 2300 movs r3, #0
8008010: e000 b.n 8008014 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
8008012: 2302 movs r3, #2
}
}
8008014: 4618 mov r0, r3
8008016: 3710 adds r7, #16
8008018: 46bd mov sp, r7
800801a: bd80 pop {r7, pc}
0800801c <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800801c: b580 push {r7, lr}
800801e: b084 sub sp, #16
8008020: af00 add r7, sp, #0
8008022: 6078 str r0, [r7, #4]
8008024: 460b mov r3, r1
8008026: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008028: 687b ldr r3, [r7, #4]
800802a: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800802e: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
8008030: 78fb ldrb r3, [r7, #3]
8008032: 4619 mov r1, r3
8008034: 6878 ldr r0, [r7, #4]
8008036: f001 fedd bl 8009df4 <USBD_LL_GetRxDataSize>
800803a: 4602 mov r2, r0
800803c: 68fb ldr r3, [r7, #12]
800803e: f8c3 220c str.w r2, [r3, #524] ; 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
8008042: 687b ldr r3, [r7, #4]
8008044: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008048: 2b00 cmp r3, #0
800804a: d00d beq.n 8008068 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800804c: 687b ldr r3, [r7, #4]
800804e: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8008052: 68db ldr r3, [r3, #12]
8008054: 68fa ldr r2, [r7, #12]
8008056: f8d2 0204 ldr.w r0, [r2, #516] ; 0x204
800805a: 68fa ldr r2, [r7, #12]
800805c: f502 7203 add.w r2, r2, #524 ; 0x20c
8008060: 4611 mov r1, r2
8008062: 4798 blx r3
return USBD_OK;
8008064: 2300 movs r3, #0
8008066: e000 b.n 800806a <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
8008068: 2302 movs r3, #2
}
}
800806a: 4618 mov r0, r3
800806c: 3710 adds r7, #16
800806e: 46bd mov sp, r7
8008070: bd80 pop {r7, pc}
08008072 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8008072: b580 push {r7, lr}
8008074: b084 sub sp, #16
8008076: af00 add r7, sp, #0
8008078: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800807a: 687b ldr r3, [r7, #4]
800807c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008080: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
8008082: 687b ldr r3, [r7, #4]
8008084: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8008088: 2b00 cmp r3, #0
800808a: d015 beq.n 80080b8 <USBD_CDC_EP0_RxReady+0x46>
800808c: 68fb ldr r3, [r7, #12]
800808e: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
8008092: 2bff cmp r3, #255 ; 0xff
8008094: d010 beq.n 80080b8 <USBD_CDC_EP0_RxReady+0x46>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
8008096: 687b ldr r3, [r7, #4]
8008098: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
800809c: 689b ldr r3, [r3, #8]
800809e: 68fa ldr r2, [r7, #12]
80080a0: f892 0200 ldrb.w r0, [r2, #512] ; 0x200
(uint8_t *)(void *)hcdc->data,
80080a4: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
80080a6: 68fa ldr r2, [r7, #12]
80080a8: f892 2201 ldrb.w r2, [r2, #513] ; 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
80080ac: b292 uxth r2, r2
80080ae: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
80080b0: 68fb ldr r3, [r7, #12]
80080b2: 22ff movs r2, #255 ; 0xff
80080b4: f883 2200 strb.w r2, [r3, #512] ; 0x200
}
return USBD_OK;
80080b8: 2300 movs r3, #0
}
80080ba: 4618 mov r0, r3
80080bc: 3710 adds r7, #16
80080be: 46bd mov sp, r7
80080c0: bd80 pop {r7, pc}
...
080080c4 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
80080c4: b480 push {r7}
80080c6: b083 sub sp, #12
80080c8: af00 add r7, sp, #0
80080ca: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
80080cc: 687b ldr r3, [r7, #4]
80080ce: 2243 movs r2, #67 ; 0x43
80080d0: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
80080d2: 4b03 ldr r3, [pc, #12] ; (80080e0 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
80080d4: 4618 mov r0, r3
80080d6: 370c adds r7, #12
80080d8: 46bd mov sp, r7
80080da: f85d 7b04 ldr.w r7, [sp], #4
80080de: 4770 bx lr
80080e0: 20000094 .word 0x20000094
080080e4 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
80080e4: b480 push {r7}
80080e6: b083 sub sp, #12
80080e8: af00 add r7, sp, #0
80080ea: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
80080ec: 687b ldr r3, [r7, #4]
80080ee: 2243 movs r2, #67 ; 0x43
80080f0: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
80080f2: 4b03 ldr r3, [pc, #12] ; (8008100 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
80080f4: 4618 mov r0, r3
80080f6: 370c adds r7, #12
80080f8: 46bd mov sp, r7
80080fa: f85d 7b04 ldr.w r7, [sp], #4
80080fe: 4770 bx lr
8008100: 20000050 .word 0x20000050
08008104 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
8008104: b480 push {r7}
8008106: b083 sub sp, #12
8008108: af00 add r7, sp, #0
800810a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800810c: 687b ldr r3, [r7, #4]
800810e: 2243 movs r2, #67 ; 0x43
8008110: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
8008112: 4b03 ldr r3, [pc, #12] ; (8008120 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
8008114: 4618 mov r0, r3
8008116: 370c adds r7, #12
8008118: 46bd mov sp, r7
800811a: f85d 7b04 ldr.w r7, [sp], #4
800811e: 4770 bx lr
8008120: 200000d8 .word 0x200000d8
08008124 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
8008124: b480 push {r7}
8008126: b083 sub sp, #12
8008128: af00 add r7, sp, #0
800812a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800812c: 687b ldr r3, [r7, #4]
800812e: 220a movs r2, #10
8008130: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
8008132: 4b03 ldr r3, [pc, #12] ; (8008140 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
8008134: 4618 mov r0, r3
8008136: 370c adds r7, #12
8008138: 46bd mov sp, r7
800813a: f85d 7b04 ldr.w r7, [sp], #4
800813e: 4770 bx lr
8008140: 2000000c .word 0x2000000c
08008144 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
8008144: b480 push {r7}
8008146: b085 sub sp, #20
8008148: af00 add r7, sp, #0
800814a: 6078 str r0, [r7, #4]
800814c: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800814e: 2302 movs r3, #2
8008150: 73fb strb r3, [r7, #15]
if (fops != NULL)
8008152: 683b ldr r3, [r7, #0]
8008154: 2b00 cmp r3, #0
8008156: d005 beq.n 8008164 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
8008158: 687b ldr r3, [r7, #4]
800815a: 683a ldr r2, [r7, #0]
800815c: f8c3 22bc str.w r2, [r3, #700] ; 0x2bc
ret = USBD_OK;
8008160: 2300 movs r3, #0
8008162: 73fb strb r3, [r7, #15]
}
return ret;
8008164: 7bfb ldrb r3, [r7, #15]
}
8008166: 4618 mov r0, r3
8008168: 3714 adds r7, #20
800816a: 46bd mov sp, r7
800816c: f85d 7b04 ldr.w r7, [sp], #4
8008170: 4770 bx lr
08008172 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
8008172: b480 push {r7}
8008174: b087 sub sp, #28
8008176: af00 add r7, sp, #0
8008178: 60f8 str r0, [r7, #12]
800817a: 60b9 str r1, [r7, #8]
800817c: 4613 mov r3, r2
800817e: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008180: 68fb ldr r3, [r7, #12]
8008182: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008186: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
8008188: 697b ldr r3, [r7, #20]
800818a: 68ba ldr r2, [r7, #8]
800818c: f8c3 2208 str.w r2, [r3, #520] ; 0x208
hcdc->TxLength = length;
8008190: 88fa ldrh r2, [r7, #6]
8008192: 697b ldr r3, [r7, #20]
8008194: f8c3 2210 str.w r2, [r3, #528] ; 0x210
return USBD_OK;
8008198: 2300 movs r3, #0
}
800819a: 4618 mov r0, r3
800819c: 371c adds r7, #28
800819e: 46bd mov sp, r7
80081a0: f85d 7b04 ldr.w r7, [sp], #4
80081a4: 4770 bx lr
080081a6 <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
80081a6: b480 push {r7}
80081a8: b085 sub sp, #20
80081aa: af00 add r7, sp, #0
80081ac: 6078 str r0, [r7, #4]
80081ae: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80081b0: 687b ldr r3, [r7, #4]
80081b2: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80081b6: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
80081b8: 68fb ldr r3, [r7, #12]
80081ba: 683a ldr r2, [r7, #0]
80081bc: f8c3 2204 str.w r2, [r3, #516] ; 0x204
return USBD_OK;
80081c0: 2300 movs r3, #0
}
80081c2: 4618 mov r0, r3
80081c4: 3714 adds r7, #20
80081c6: 46bd mov sp, r7
80081c8: f85d 7b04 ldr.w r7, [sp], #4
80081cc: 4770 bx lr
080081ce <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
80081ce: b580 push {r7, lr}
80081d0: b084 sub sp, #16
80081d2: af00 add r7, sp, #0
80081d4: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80081d6: 687b ldr r3, [r7, #4]
80081d8: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80081dc: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
80081de: 687b ldr r3, [r7, #4]
80081e0: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80081e4: 2b00 cmp r3, #0
80081e6: d01c beq.n 8008222 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
80081e8: 68fb ldr r3, [r7, #12]
80081ea: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
80081ee: 2b00 cmp r3, #0
80081f0: d115 bne.n 800821e <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
80081f2: 68fb ldr r3, [r7, #12]
80081f4: 2201 movs r2, #1
80081f6: f8c3 2214 str.w r2, [r3, #532] ; 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
80081fa: 68fb ldr r3, [r7, #12]
80081fc: f8d3 2210 ldr.w r2, [r3, #528] ; 0x210
8008200: 687b ldr r3, [r7, #4]
8008202: 631a str r2, [r3, #48] ; 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
8008204: 68fb ldr r3, [r7, #12]
8008206: f8d3 2208 ldr.w r2, [r3, #520] ; 0x208
(uint16_t)hcdc->TxLength);
800820a: 68fb ldr r3, [r7, #12]
800820c: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
8008210: b29b uxth r3, r3
8008212: 2181 movs r1, #129 ; 0x81
8008214: 6878 ldr r0, [r7, #4]
8008216: f001 fda7 bl 8009d68 <USBD_LL_Transmit>
return USBD_OK;
800821a: 2300 movs r3, #0
800821c: e002 b.n 8008224 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800821e: 2301 movs r3, #1
8008220: e000 b.n 8008224 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
8008222: 2302 movs r3, #2
}
}
8008224: 4618 mov r0, r3
8008226: 3710 adds r7, #16
8008228: 46bd mov sp, r7
800822a: bd80 pop {r7, pc}
0800822c <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800822c: b580 push {r7, lr}
800822e: b084 sub sp, #16
8008230: af00 add r7, sp, #0
8008232: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008234: 687b ldr r3, [r7, #4]
8008236: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800823a: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800823c: 687b ldr r3, [r7, #4]
800823e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8008242: 2b00 cmp r3, #0
8008244: d017 beq.n 8008276 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
8008246: 687b ldr r3, [r7, #4]
8008248: 7c1b ldrb r3, [r3, #16]
800824a: 2b00 cmp r3, #0
800824c: d109 bne.n 8008262 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800824e: 68fb ldr r3, [r7, #12]
8008250: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
8008254: f44f 7300 mov.w r3, #512 ; 0x200
8008258: 2101 movs r1, #1
800825a: 6878 ldr r0, [r7, #4]
800825c: f001 fda7 bl 8009dae <USBD_LL_PrepareReceive>
8008260: e007 b.n 8008272 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8008262: 68fb ldr r3, [r7, #12]
8008264: f8d3 2204 ldr.w r2, [r3, #516] ; 0x204
8008268: 2340 movs r3, #64 ; 0x40
800826a: 2101 movs r1, #1
800826c: 6878 ldr r0, [r7, #4]
800826e: f001 fd9e bl 8009dae <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
8008272: 2300 movs r3, #0
8008274: e000 b.n 8008278 <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
8008276: 2302 movs r3, #2
}
}
8008278: 4618 mov r0, r3
800827a: 3710 adds r7, #16
800827c: 46bd mov sp, r7
800827e: bd80 pop {r7, pc}
08008280 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
8008280: b580 push {r7, lr}
8008282: b084 sub sp, #16
8008284: af00 add r7, sp, #0
8008286: 60f8 str r0, [r7, #12]
8008288: 60b9 str r1, [r7, #8]
800828a: 4613 mov r3, r2
800828c: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800828e: 68fb ldr r3, [r7, #12]
8008290: 2b00 cmp r3, #0
8008292: d101 bne.n 8008298 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
8008294: 2302 movs r3, #2
8008296: e01a b.n 80082ce <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8008298: 68fb ldr r3, [r7, #12]
800829a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800829e: 2b00 cmp r3, #0
80082a0: d003 beq.n 80082aa <USBD_Init+0x2a>
{
pdev->pClass = NULL;
80082a2: 68fb ldr r3, [r7, #12]
80082a4: 2200 movs r2, #0
80082a6: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
80082aa: 68bb ldr r3, [r7, #8]
80082ac: 2b00 cmp r3, #0
80082ae: d003 beq.n 80082b8 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
80082b0: 68fb ldr r3, [r7, #12]
80082b2: 68ba ldr r2, [r7, #8]
80082b4: f8c3 22b0 str.w r2, [r3, #688] ; 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
80082b8: 68fb ldr r3, [r7, #12]
80082ba: 2201 movs r2, #1
80082bc: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->id = id;
80082c0: 68fb ldr r3, [r7, #12]
80082c2: 79fa ldrb r2, [r7, #7]
80082c4: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
80082c6: 68f8 ldr r0, [r7, #12]
80082c8: f001 fc0a bl 8009ae0 <USBD_LL_Init>
return USBD_OK;
80082cc: 2300 movs r3, #0
}
80082ce: 4618 mov r0, r3
80082d0: 3710 adds r7, #16
80082d2: 46bd mov sp, r7
80082d4: bd80 pop {r7, pc}
080082d6 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
80082d6: b480 push {r7}
80082d8: b085 sub sp, #20
80082da: af00 add r7, sp, #0
80082dc: 6078 str r0, [r7, #4]
80082de: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
80082e0: 2300 movs r3, #0
80082e2: 73fb strb r3, [r7, #15]
if (pclass != NULL)
80082e4: 683b ldr r3, [r7, #0]
80082e6: 2b00 cmp r3, #0
80082e8: d006 beq.n 80082f8 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
80082ea: 687b ldr r3, [r7, #4]
80082ec: 683a ldr r2, [r7, #0]
80082ee: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
status = USBD_OK;
80082f2: 2300 movs r3, #0
80082f4: 73fb strb r3, [r7, #15]
80082f6: e001 b.n 80082fc <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
80082f8: 2302 movs r3, #2
80082fa: 73fb strb r3, [r7, #15]
}
return status;
80082fc: 7bfb ldrb r3, [r7, #15]
}
80082fe: 4618 mov r0, r3
8008300: 3714 adds r7, #20
8008302: 46bd mov sp, r7
8008304: f85d 7b04 ldr.w r7, [sp], #4
8008308: 4770 bx lr
0800830a <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800830a: b580 push {r7, lr}
800830c: b082 sub sp, #8
800830e: af00 add r7, sp, #0
8008310: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
8008312: 6878 ldr r0, [r7, #4]
8008314: f001 fc3e bl 8009b94 <USBD_LL_Start>
return USBD_OK;
8008318: 2300 movs r3, #0
}
800831a: 4618 mov r0, r3
800831c: 3708 adds r7, #8
800831e: 46bd mov sp, r7
8008320: bd80 pop {r7, pc}
08008322 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
8008322: b480 push {r7}
8008324: b083 sub sp, #12
8008326: af00 add r7, sp, #0
8008328: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800832a: 2300 movs r3, #0
}
800832c: 4618 mov r0, r3
800832e: 370c adds r7, #12
8008330: 46bd mov sp, r7
8008332: f85d 7b04 ldr.w r7, [sp], #4
8008336: 4770 bx lr
08008338 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008338: b580 push {r7, lr}
800833a: b084 sub sp, #16
800833c: af00 add r7, sp, #0
800833e: 6078 str r0, [r7, #4]
8008340: 460b mov r3, r1
8008342: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
8008344: 2302 movs r3, #2
8008346: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
8008348: 687b ldr r3, [r7, #4]
800834a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800834e: 2b00 cmp r3, #0
8008350: d00c beq.n 800836c <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
8008352: 687b ldr r3, [r7, #4]
8008354: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008358: 681b ldr r3, [r3, #0]
800835a: 78fa ldrb r2, [r7, #3]
800835c: 4611 mov r1, r2
800835e: 6878 ldr r0, [r7, #4]
8008360: 4798 blx r3
8008362: 4603 mov r3, r0
8008364: 2b00 cmp r3, #0
8008366: d101 bne.n 800836c <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
8008368: 2300 movs r3, #0
800836a: 73fb strb r3, [r7, #15]
}
}
return ret;
800836c: 7bfb ldrb r3, [r7, #15]
}
800836e: 4618 mov r0, r3
8008370: 3710 adds r7, #16
8008372: 46bd mov sp, r7
8008374: bd80 pop {r7, pc}
08008376 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008376: b580 push {r7, lr}
8008378: b082 sub sp, #8
800837a: af00 add r7, sp, #0
800837c: 6078 str r0, [r7, #4]
800837e: 460b mov r3, r1
8008380: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8008382: 687b ldr r3, [r7, #4]
8008384: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008388: 685b ldr r3, [r3, #4]
800838a: 78fa ldrb r2, [r7, #3]
800838c: 4611 mov r1, r2
800838e: 6878 ldr r0, [r7, #4]
8008390: 4798 blx r3
return USBD_OK;
8008392: 2300 movs r3, #0
}
8008394: 4618 mov r0, r3
8008396: 3708 adds r7, #8
8008398: 46bd mov sp, r7
800839a: bd80 pop {r7, pc}
0800839c <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800839c: b580 push {r7, lr}
800839e: b082 sub sp, #8
80083a0: af00 add r7, sp, #0
80083a2: 6078 str r0, [r7, #4]
80083a4: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
80083a6: 687b ldr r3, [r7, #4]
80083a8: f503 732a add.w r3, r3, #680 ; 0x2a8
80083ac: 6839 ldr r1, [r7, #0]
80083ae: 4618 mov r0, r3
80083b0: f000 fedb bl 800916a <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
80083b4: 687b ldr r3, [r7, #4]
80083b6: 2201 movs r2, #1
80083b8: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep0_data_len = pdev->request.wLength;
80083bc: 687b ldr r3, [r7, #4]
80083be: f8b3 32ae ldrh.w r3, [r3, #686] ; 0x2ae
80083c2: 461a mov r2, r3
80083c4: 687b ldr r3, [r7, #4]
80083c6: f8c3 2298 str.w r2, [r3, #664] ; 0x298
switch (pdev->request.bmRequest & 0x1FU)
80083ca: 687b ldr r3, [r7, #4]
80083cc: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80083d0: f003 031f and.w r3, r3, #31
80083d4: 2b02 cmp r3, #2
80083d6: d016 beq.n 8008406 <USBD_LL_SetupStage+0x6a>
80083d8: 2b02 cmp r3, #2
80083da: d81c bhi.n 8008416 <USBD_LL_SetupStage+0x7a>
80083dc: 2b00 cmp r3, #0
80083de: d002 beq.n 80083e6 <USBD_LL_SetupStage+0x4a>
80083e0: 2b01 cmp r3, #1
80083e2: d008 beq.n 80083f6 <USBD_LL_SetupStage+0x5a>
80083e4: e017 b.n 8008416 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
80083e6: 687b ldr r3, [r7, #4]
80083e8: f503 732a add.w r3, r3, #680 ; 0x2a8
80083ec: 4619 mov r1, r3
80083ee: 6878 ldr r0, [r7, #4]
80083f0: f000 f9ce bl 8008790 <USBD_StdDevReq>
break;
80083f4: e01a b.n 800842c <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
80083f6: 687b ldr r3, [r7, #4]
80083f8: f503 732a add.w r3, r3, #680 ; 0x2a8
80083fc: 4619 mov r1, r3
80083fe: 6878 ldr r0, [r7, #4]
8008400: f000 fa30 bl 8008864 <USBD_StdItfReq>
break;
8008404: e012 b.n 800842c <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
8008406: 687b ldr r3, [r7, #4]
8008408: f503 732a add.w r3, r3, #680 ; 0x2a8
800840c: 4619 mov r1, r3
800840e: 6878 ldr r0, [r7, #4]
8008410: f000 fa70 bl 80088f4 <USBD_StdEPReq>
break;
8008414: e00a b.n 800842c <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8008416: 687b ldr r3, [r7, #4]
8008418: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
800841c: f023 037f bic.w r3, r3, #127 ; 0x7f
8008420: b2db uxtb r3, r3
8008422: 4619 mov r1, r3
8008424: 6878 ldr r0, [r7, #4]
8008426: f001 fc15 bl 8009c54 <USBD_LL_StallEP>
break;
800842a: bf00 nop
}
return USBD_OK;
800842c: 2300 movs r3, #0
}
800842e: 4618 mov r0, r3
8008430: 3708 adds r7, #8
8008432: 46bd mov sp, r7
8008434: bd80 pop {r7, pc}
08008436 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008436: b580 push {r7, lr}
8008438: b086 sub sp, #24
800843a: af00 add r7, sp, #0
800843c: 60f8 str r0, [r7, #12]
800843e: 460b mov r3, r1
8008440: 607a str r2, [r7, #4]
8008442: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008444: 7afb ldrb r3, [r7, #11]
8008446: 2b00 cmp r3, #0
8008448: d14b bne.n 80084e2 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800844a: 68fb ldr r3, [r7, #12]
800844c: f503 73aa add.w r3, r3, #340 ; 0x154
8008450: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8008452: 68fb ldr r3, [r7, #12]
8008454: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
8008458: 2b03 cmp r3, #3
800845a: d134 bne.n 80084c6 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800845c: 697b ldr r3, [r7, #20]
800845e: 68da ldr r2, [r3, #12]
8008460: 697b ldr r3, [r7, #20]
8008462: 691b ldr r3, [r3, #16]
8008464: 429a cmp r2, r3
8008466: d919 bls.n 800849c <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
8008468: 697b ldr r3, [r7, #20]
800846a: 68da ldr r2, [r3, #12]
800846c: 697b ldr r3, [r7, #20]
800846e: 691b ldr r3, [r3, #16]
8008470: 1ad2 subs r2, r2, r3
8008472: 697b ldr r3, [r7, #20]
8008474: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008476: 697b ldr r3, [r7, #20]
8008478: 68da ldr r2, [r3, #12]
800847a: 697b ldr r3, [r7, #20]
800847c: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800847e: 429a cmp r2, r3
8008480: d203 bcs.n 800848a <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008482: 697b ldr r3, [r7, #20]
8008484: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8008486: b29b uxth r3, r3
8008488: e002 b.n 8008490 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800848a: 697b ldr r3, [r7, #20]
800848c: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800848e: b29b uxth r3, r3
8008490: 461a mov r2, r3
8008492: 6879 ldr r1, [r7, #4]
8008494: 68f8 ldr r0, [r7, #12]
8008496: f000 ff5c bl 8009352 <USBD_CtlContinueRx>
800849a: e038 b.n 800850e <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800849c: 68fb ldr r3, [r7, #12]
800849e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80084a2: 691b ldr r3, [r3, #16]
80084a4: 2b00 cmp r3, #0
80084a6: d00a beq.n 80084be <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80084a8: 68fb ldr r3, [r7, #12]
80084aa: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
80084ae: 2b03 cmp r3, #3
80084b0: d105 bne.n 80084be <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
80084b2: 68fb ldr r3, [r7, #12]
80084b4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80084b8: 691b ldr r3, [r3, #16]
80084ba: 68f8 ldr r0, [r7, #12]
80084bc: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
80084be: 68f8 ldr r0, [r7, #12]
80084c0: f000 ff59 bl 8009376 <USBD_CtlSendStatus>
80084c4: e023 b.n 800850e <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
80084c6: 68fb ldr r3, [r7, #12]
80084c8: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
80084cc: 2b05 cmp r3, #5
80084ce: d11e bne.n 800850e <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
80084d0: 68fb ldr r3, [r7, #12]
80084d2: 2200 movs r2, #0
80084d4: f8c3 2294 str.w r2, [r3, #660] ; 0x294
USBD_LL_StallEP(pdev, 0U);
80084d8: 2100 movs r1, #0
80084da: 68f8 ldr r0, [r7, #12]
80084dc: f001 fbba bl 8009c54 <USBD_LL_StallEP>
80084e0: e015 b.n 800850e <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
80084e2: 68fb ldr r3, [r7, #12]
80084e4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80084e8: 699b ldr r3, [r3, #24]
80084ea: 2b00 cmp r3, #0
80084ec: d00d beq.n 800850a <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80084ee: 68fb ldr r3, [r7, #12]
80084f0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
80084f4: 2b03 cmp r3, #3
80084f6: d108 bne.n 800850a <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
80084f8: 68fb ldr r3, [r7, #12]
80084fa: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80084fe: 699b ldr r3, [r3, #24]
8008500: 7afa ldrb r2, [r7, #11]
8008502: 4611 mov r1, r2
8008504: 68f8 ldr r0, [r7, #12]
8008506: 4798 blx r3
8008508: e001 b.n 800850e <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800850a: 2302 movs r3, #2
800850c: e000 b.n 8008510 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800850e: 2300 movs r3, #0
}
8008510: 4618 mov r0, r3
8008512: 3718 adds r7, #24
8008514: 46bd mov sp, r7
8008516: bd80 pop {r7, pc}
08008518 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008518: b580 push {r7, lr}
800851a: b086 sub sp, #24
800851c: af00 add r7, sp, #0
800851e: 60f8 str r0, [r7, #12]
8008520: 460b mov r3, r1
8008522: 607a str r2, [r7, #4]
8008524: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008526: 7afb ldrb r3, [r7, #11]
8008528: 2b00 cmp r3, #0
800852a: d17f bne.n 800862c <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800852c: 68fb ldr r3, [r7, #12]
800852e: 3314 adds r3, #20
8008530: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8008532: 68fb ldr r3, [r7, #12]
8008534: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
8008538: 2b02 cmp r3, #2
800853a: d15c bne.n 80085f6 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800853c: 697b ldr r3, [r7, #20]
800853e: 68da ldr r2, [r3, #12]
8008540: 697b ldr r3, [r7, #20]
8008542: 691b ldr r3, [r3, #16]
8008544: 429a cmp r2, r3
8008546: d915 bls.n 8008574 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
8008548: 697b ldr r3, [r7, #20]
800854a: 68da ldr r2, [r3, #12]
800854c: 697b ldr r3, [r7, #20]
800854e: 691b ldr r3, [r3, #16]
8008550: 1ad2 subs r2, r2, r3
8008552: 697b ldr r3, [r7, #20]
8008554: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
8008556: 697b ldr r3, [r7, #20]
8008558: 68db ldr r3, [r3, #12]
800855a: b29b uxth r3, r3
800855c: 461a mov r2, r3
800855e: 6879 ldr r1, [r7, #4]
8008560: 68f8 ldr r0, [r7, #12]
8008562: f000 fec6 bl 80092f2 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008566: 2300 movs r3, #0
8008568: 2200 movs r2, #0
800856a: 2100 movs r1, #0
800856c: 68f8 ldr r0, [r7, #12]
800856e: f001 fc1e bl 8009dae <USBD_LL_PrepareReceive>
8008572: e04e b.n 8008612 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
8008574: 697b ldr r3, [r7, #20]
8008576: 689b ldr r3, [r3, #8]
8008578: 697a ldr r2, [r7, #20]
800857a: 6912 ldr r2, [r2, #16]
800857c: fbb3 f1f2 udiv r1, r3, r2
8008580: fb01 f202 mul.w r2, r1, r2
8008584: 1a9b subs r3, r3, r2
8008586: 2b00 cmp r3, #0
8008588: d11c bne.n 80085c4 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800858a: 697b ldr r3, [r7, #20]
800858c: 689a ldr r2, [r3, #8]
800858e: 697b ldr r3, [r7, #20]
8008590: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
8008592: 429a cmp r2, r3
8008594: d316 bcc.n 80085c4 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8008596: 697b ldr r3, [r7, #20]
8008598: 689a ldr r2, [r3, #8]
800859a: 68fb ldr r3, [r7, #12]
800859c: f8d3 3298 ldr.w r3, [r3, #664] ; 0x298
(pep->total_length >= pep->maxpacket) &&
80085a0: 429a cmp r2, r3
80085a2: d20f bcs.n 80085c4 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
80085a4: 2200 movs r2, #0
80085a6: 2100 movs r1, #0
80085a8: 68f8 ldr r0, [r7, #12]
80085aa: f000 fea2 bl 80092f2 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
80085ae: 68fb ldr r3, [r7, #12]
80085b0: 2200 movs r2, #0
80085b2: f8c3 2298 str.w r2, [r3, #664] ; 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80085b6: 2300 movs r3, #0
80085b8: 2200 movs r2, #0
80085ba: 2100 movs r1, #0
80085bc: 68f8 ldr r0, [r7, #12]
80085be: f001 fbf6 bl 8009dae <USBD_LL_PrepareReceive>
80085c2: e026 b.n 8008612 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
80085c4: 68fb ldr r3, [r7, #12]
80085c6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80085ca: 68db ldr r3, [r3, #12]
80085cc: 2b00 cmp r3, #0
80085ce: d00a beq.n 80085e6 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80085d0: 68fb ldr r3, [r7, #12]
80085d2: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
80085d6: 2b03 cmp r3, #3
80085d8: d105 bne.n 80085e6 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
80085da: 68fb ldr r3, [r7, #12]
80085dc: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80085e0: 68db ldr r3, [r3, #12]
80085e2: 68f8 ldr r0, [r7, #12]
80085e4: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
80085e6: 2180 movs r1, #128 ; 0x80
80085e8: 68f8 ldr r0, [r7, #12]
80085ea: f001 fb33 bl 8009c54 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
80085ee: 68f8 ldr r0, [r7, #12]
80085f0: f000 fed4 bl 800939c <USBD_CtlReceiveStatus>
80085f4: e00d b.n 8008612 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
80085f6: 68fb ldr r3, [r7, #12]
80085f8: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
80085fc: 2b04 cmp r3, #4
80085fe: d004 beq.n 800860a <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
8008600: 68fb ldr r3, [r7, #12]
8008602: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008606: 2b00 cmp r3, #0
8008608: d103 bne.n 8008612 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800860a: 2180 movs r1, #128 ; 0x80
800860c: 68f8 ldr r0, [r7, #12]
800860e: f001 fb21 bl 8009c54 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
8008612: 68fb ldr r3, [r7, #12]
8008614: f893 32a0 ldrb.w r3, [r3, #672] ; 0x2a0
8008618: 2b01 cmp r3, #1
800861a: d11d bne.n 8008658 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800861c: 68f8 ldr r0, [r7, #12]
800861e: f7ff fe80 bl 8008322 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8008622: 68fb ldr r3, [r7, #12]
8008624: 2200 movs r2, #0
8008626: f883 22a0 strb.w r2, [r3, #672] ; 0x2a0
800862a: e015 b.n 8008658 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800862c: 68fb ldr r3, [r7, #12]
800862e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008632: 695b ldr r3, [r3, #20]
8008634: 2b00 cmp r3, #0
8008636: d00d beq.n 8008654 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008638: 68fb ldr r3, [r7, #12]
800863a: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800863e: 2b03 cmp r3, #3
8008640: d108 bne.n 8008654 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
8008642: 68fb ldr r3, [r7, #12]
8008644: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008648: 695b ldr r3, [r3, #20]
800864a: 7afa ldrb r2, [r7, #11]
800864c: 4611 mov r1, r2
800864e: 68f8 ldr r0, [r7, #12]
8008650: 4798 blx r3
8008652: e001 b.n 8008658 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008654: 2302 movs r3, #2
8008656: e000 b.n 800865a <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
8008658: 2300 movs r3, #0
}
800865a: 4618 mov r0, r3
800865c: 3718 adds r7, #24
800865e: 46bd mov sp, r7
8008660: bd80 pop {r7, pc}
08008662 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
8008662: b580 push {r7, lr}
8008664: b082 sub sp, #8
8008666: af00 add r7, sp, #0
8008668: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800866a: 2340 movs r3, #64 ; 0x40
800866c: 2200 movs r2, #0
800866e: 2100 movs r1, #0
8008670: 6878 ldr r0, [r7, #4]
8008672: f001 faaa bl 8009bca <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8008676: 687b ldr r3, [r7, #4]
8008678: 2201 movs r2, #1
800867a: f8c3 2158 str.w r2, [r3, #344] ; 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800867e: 687b ldr r3, [r7, #4]
8008680: 2240 movs r2, #64 ; 0x40
8008682: f8c3 2164 str.w r2, [r3, #356] ; 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008686: 2340 movs r3, #64 ; 0x40
8008688: 2200 movs r2, #0
800868a: 2180 movs r1, #128 ; 0x80
800868c: 6878 ldr r0, [r7, #4]
800868e: f001 fa9c bl 8009bca <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
8008692: 687b ldr r3, [r7, #4]
8008694: 2201 movs r2, #1
8008696: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8008698: 687b ldr r3, [r7, #4]
800869a: 2240 movs r2, #64 ; 0x40
800869c: 625a str r2, [r3, #36] ; 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800869e: 687b ldr r3, [r7, #4]
80086a0: 2201 movs r2, #1
80086a2: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
80086a6: 687b ldr r3, [r7, #4]
80086a8: 2200 movs r2, #0
80086aa: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->dev_config = 0U;
80086ae: 687b ldr r3, [r7, #4]
80086b0: 2200 movs r2, #0
80086b2: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
80086b4: 687b ldr r3, [r7, #4]
80086b6: 2200 movs r2, #0
80086b8: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
if (pdev->pClassData)
80086bc: 687b ldr r3, [r7, #4]
80086be: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80086c2: 2b00 cmp r3, #0
80086c4: d009 beq.n 80086da <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
80086c6: 687b ldr r3, [r7, #4]
80086c8: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80086cc: 685b ldr r3, [r3, #4]
80086ce: 687a ldr r2, [r7, #4]
80086d0: 6852 ldr r2, [r2, #4]
80086d2: b2d2 uxtb r2, r2
80086d4: 4611 mov r1, r2
80086d6: 6878 ldr r0, [r7, #4]
80086d8: 4798 blx r3
}
return USBD_OK;
80086da: 2300 movs r3, #0
}
80086dc: 4618 mov r0, r3
80086de: 3708 adds r7, #8
80086e0: 46bd mov sp, r7
80086e2: bd80 pop {r7, pc}
080086e4 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
80086e4: b480 push {r7}
80086e6: b083 sub sp, #12
80086e8: af00 add r7, sp, #0
80086ea: 6078 str r0, [r7, #4]
80086ec: 460b mov r3, r1
80086ee: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
80086f0: 687b ldr r3, [r7, #4]
80086f2: 78fa ldrb r2, [r7, #3]
80086f4: 741a strb r2, [r3, #16]
return USBD_OK;
80086f6: 2300 movs r3, #0
}
80086f8: 4618 mov r0, r3
80086fa: 370c adds r7, #12
80086fc: 46bd mov sp, r7
80086fe: f85d 7b04 ldr.w r7, [sp], #4
8008702: 4770 bx lr
08008704 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8008704: b480 push {r7}
8008706: b083 sub sp, #12
8008708: af00 add r7, sp, #0
800870a: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800870c: 687b ldr r3, [r7, #4]
800870e: f893 229c ldrb.w r2, [r3, #668] ; 0x29c
8008712: 687b ldr r3, [r7, #4]
8008714: f883 229d strb.w r2, [r3, #669] ; 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8008718: 687b ldr r3, [r7, #4]
800871a: 2204 movs r2, #4
800871c: f883 229c strb.w r2, [r3, #668] ; 0x29c
return USBD_OK;
8008720: 2300 movs r3, #0
}
8008722: 4618 mov r0, r3
8008724: 370c adds r7, #12
8008726: 46bd mov sp, r7
8008728: f85d 7b04 ldr.w r7, [sp], #4
800872c: 4770 bx lr
0800872e <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800872e: b480 push {r7}
8008730: b083 sub sp, #12
8008732: af00 add r7, sp, #0
8008734: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8008736: 687b ldr r3, [r7, #4]
8008738: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
800873c: 2b04 cmp r3, #4
800873e: d105 bne.n 800874c <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
8008740: 687b ldr r3, [r7, #4]
8008742: f893 229d ldrb.w r2, [r3, #669] ; 0x29d
8008746: 687b ldr r3, [r7, #4]
8008748: f883 229c strb.w r2, [r3, #668] ; 0x29c
}
return USBD_OK;
800874c: 2300 movs r3, #0
}
800874e: 4618 mov r0, r3
8008750: 370c adds r7, #12
8008752: 46bd mov sp, r7
8008754: f85d 7b04 ldr.w r7, [sp], #4
8008758: 4770 bx lr
0800875a <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800875a: b580 push {r7, lr}
800875c: b082 sub sp, #8
800875e: af00 add r7, sp, #0
8008760: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008762: 687b ldr r3, [r7, #4]
8008764: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8008768: 2b03 cmp r3, #3
800876a: d10b bne.n 8008784 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800876c: 687b ldr r3, [r7, #4]
800876e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008772: 69db ldr r3, [r3, #28]
8008774: 2b00 cmp r3, #0
8008776: d005 beq.n 8008784 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
8008778: 687b ldr r3, [r7, #4]
800877a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800877e: 69db ldr r3, [r3, #28]
8008780: 6878 ldr r0, [r7, #4]
8008782: 4798 blx r3
}
}
return USBD_OK;
8008784: 2300 movs r3, #0
}
8008786: 4618 mov r0, r3
8008788: 3708 adds r7, #8
800878a: 46bd mov sp, r7
800878c: bd80 pop {r7, pc}
...
08008790 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008790: b580 push {r7, lr}
8008792: b084 sub sp, #16
8008794: af00 add r7, sp, #0
8008796: 6078 str r0, [r7, #4]
8008798: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800879a: 2300 movs r3, #0
800879c: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800879e: 683b ldr r3, [r7, #0]
80087a0: 781b ldrb r3, [r3, #0]
80087a2: f003 0360 and.w r3, r3, #96 ; 0x60
80087a6: 2b40 cmp r3, #64 ; 0x40
80087a8: d005 beq.n 80087b6 <USBD_StdDevReq+0x26>
80087aa: 2b40 cmp r3, #64 ; 0x40
80087ac: d84f bhi.n 800884e <USBD_StdDevReq+0xbe>
80087ae: 2b00 cmp r3, #0
80087b0: d009 beq.n 80087c6 <USBD_StdDevReq+0x36>
80087b2: 2b20 cmp r3, #32
80087b4: d14b bne.n 800884e <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
80087b6: 687b ldr r3, [r7, #4]
80087b8: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80087bc: 689b ldr r3, [r3, #8]
80087be: 6839 ldr r1, [r7, #0]
80087c0: 6878 ldr r0, [r7, #4]
80087c2: 4798 blx r3
break;
80087c4: e048 b.n 8008858 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80087c6: 683b ldr r3, [r7, #0]
80087c8: 785b ldrb r3, [r3, #1]
80087ca: 2b09 cmp r3, #9
80087cc: d839 bhi.n 8008842 <USBD_StdDevReq+0xb2>
80087ce: a201 add r2, pc, #4 ; (adr r2, 80087d4 <USBD_StdDevReq+0x44>)
80087d0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80087d4: 08008825 .word 0x08008825
80087d8: 08008839 .word 0x08008839
80087dc: 08008843 .word 0x08008843
80087e0: 0800882f .word 0x0800882f
80087e4: 08008843 .word 0x08008843
80087e8: 08008807 .word 0x08008807
80087ec: 080087fd .word 0x080087fd
80087f0: 08008843 .word 0x08008843
80087f4: 0800881b .word 0x0800881b
80087f8: 08008811 .word 0x08008811
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
80087fc: 6839 ldr r1, [r7, #0]
80087fe: 6878 ldr r0, [r7, #4]
8008800: f000 f9dc bl 8008bbc <USBD_GetDescriptor>
break;
8008804: e022 b.n 800884c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
8008806: 6839 ldr r1, [r7, #0]
8008808: 6878 ldr r0, [r7, #4]
800880a: f000 fb3f bl 8008e8c <USBD_SetAddress>
break;
800880e: e01d b.n 800884c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
8008810: 6839 ldr r1, [r7, #0]
8008812: 6878 ldr r0, [r7, #4]
8008814: f000 fb7e bl 8008f14 <USBD_SetConfig>
break;
8008818: e018 b.n 800884c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800881a: 6839 ldr r1, [r7, #0]
800881c: 6878 ldr r0, [r7, #4]
800881e: f000 fc07 bl 8009030 <USBD_GetConfig>
break;
8008822: e013 b.n 800884c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8008824: 6839 ldr r1, [r7, #0]
8008826: 6878 ldr r0, [r7, #4]
8008828: f000 fc37 bl 800909a <USBD_GetStatus>
break;
800882c: e00e b.n 800884c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800882e: 6839 ldr r1, [r7, #0]
8008830: 6878 ldr r0, [r7, #4]
8008832: f000 fc65 bl 8009100 <USBD_SetFeature>
break;
8008836: e009 b.n 800884c <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8008838: 6839 ldr r1, [r7, #0]
800883a: 6878 ldr r0, [r7, #4]
800883c: f000 fc74 bl 8009128 <USBD_ClrFeature>
break;
8008840: e004 b.n 800884c <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
8008842: 6839 ldr r1, [r7, #0]
8008844: 6878 ldr r0, [r7, #4]
8008846: f000 fccd bl 80091e4 <USBD_CtlError>
break;
800884a: bf00 nop
}
break;
800884c: e004 b.n 8008858 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800884e: 6839 ldr r1, [r7, #0]
8008850: 6878 ldr r0, [r7, #4]
8008852: f000 fcc7 bl 80091e4 <USBD_CtlError>
break;
8008856: bf00 nop
}
return ret;
8008858: 7bfb ldrb r3, [r7, #15]
}
800885a: 4618 mov r0, r3
800885c: 3710 adds r7, #16
800885e: 46bd mov sp, r7
8008860: bd80 pop {r7, pc}
8008862: bf00 nop
08008864 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008864: b580 push {r7, lr}
8008866: b084 sub sp, #16
8008868: af00 add r7, sp, #0
800886a: 6078 str r0, [r7, #4]
800886c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800886e: 2300 movs r3, #0
8008870: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8008872: 683b ldr r3, [r7, #0]
8008874: 781b ldrb r3, [r3, #0]
8008876: f003 0360 and.w r3, r3, #96 ; 0x60
800887a: 2b40 cmp r3, #64 ; 0x40
800887c: d005 beq.n 800888a <USBD_StdItfReq+0x26>
800887e: 2b40 cmp r3, #64 ; 0x40
8008880: d82e bhi.n 80088e0 <USBD_StdItfReq+0x7c>
8008882: 2b00 cmp r3, #0
8008884: d001 beq.n 800888a <USBD_StdItfReq+0x26>
8008886: 2b20 cmp r3, #32
8008888: d12a bne.n 80088e0 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800888a: 687b ldr r3, [r7, #4]
800888c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8008890: 3b01 subs r3, #1
8008892: 2b02 cmp r3, #2
8008894: d81d bhi.n 80088d2 <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8008896: 683b ldr r3, [r7, #0]
8008898: 889b ldrh r3, [r3, #4]
800889a: b2db uxtb r3, r3
800889c: 2b01 cmp r3, #1
800889e: d813 bhi.n 80088c8 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
80088a0: 687b ldr r3, [r7, #4]
80088a2: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80088a6: 689b ldr r3, [r3, #8]
80088a8: 6839 ldr r1, [r7, #0]
80088aa: 6878 ldr r0, [r7, #4]
80088ac: 4798 blx r3
80088ae: 4603 mov r3, r0
80088b0: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
80088b2: 683b ldr r3, [r7, #0]
80088b4: 88db ldrh r3, [r3, #6]
80088b6: 2b00 cmp r3, #0
80088b8: d110 bne.n 80088dc <USBD_StdItfReq+0x78>
80088ba: 7bfb ldrb r3, [r7, #15]
80088bc: 2b00 cmp r3, #0
80088be: d10d bne.n 80088dc <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
80088c0: 6878 ldr r0, [r7, #4]
80088c2: f000 fd58 bl 8009376 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80088c6: e009 b.n 80088dc <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
80088c8: 6839 ldr r1, [r7, #0]
80088ca: 6878 ldr r0, [r7, #4]
80088cc: f000 fc8a bl 80091e4 <USBD_CtlError>
break;
80088d0: e004 b.n 80088dc <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
80088d2: 6839 ldr r1, [r7, #0]
80088d4: 6878 ldr r0, [r7, #4]
80088d6: f000 fc85 bl 80091e4 <USBD_CtlError>
break;
80088da: e000 b.n 80088de <USBD_StdItfReq+0x7a>
break;
80088dc: bf00 nop
}
break;
80088de: e004 b.n 80088ea <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
80088e0: 6839 ldr r1, [r7, #0]
80088e2: 6878 ldr r0, [r7, #4]
80088e4: f000 fc7e bl 80091e4 <USBD_CtlError>
break;
80088e8: bf00 nop
}
return USBD_OK;
80088ea: 2300 movs r3, #0
}
80088ec: 4618 mov r0, r3
80088ee: 3710 adds r7, #16
80088f0: 46bd mov sp, r7
80088f2: bd80 pop {r7, pc}
080088f4 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80088f4: b580 push {r7, lr}
80088f6: b084 sub sp, #16
80088f8: af00 add r7, sp, #0
80088fa: 6078 str r0, [r7, #4]
80088fc: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
80088fe: 2300 movs r3, #0
8008900: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
8008902: 683b ldr r3, [r7, #0]
8008904: 889b ldrh r3, [r3, #4]
8008906: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8008908: 683b ldr r3, [r7, #0]
800890a: 781b ldrb r3, [r3, #0]
800890c: f003 0360 and.w r3, r3, #96 ; 0x60
8008910: 2b40 cmp r3, #64 ; 0x40
8008912: d007 beq.n 8008924 <USBD_StdEPReq+0x30>
8008914: 2b40 cmp r3, #64 ; 0x40
8008916: f200 8146 bhi.w 8008ba6 <USBD_StdEPReq+0x2b2>
800891a: 2b00 cmp r3, #0
800891c: d00a beq.n 8008934 <USBD_StdEPReq+0x40>
800891e: 2b20 cmp r3, #32
8008920: f040 8141 bne.w 8008ba6 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8008924: 687b ldr r3, [r7, #4]
8008926: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800892a: 689b ldr r3, [r3, #8]
800892c: 6839 ldr r1, [r7, #0]
800892e: 6878 ldr r0, [r7, #4]
8008930: 4798 blx r3
break;
8008932: e13d b.n 8008bb0 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
8008934: 683b ldr r3, [r7, #0]
8008936: 781b ldrb r3, [r3, #0]
8008938: f003 0360 and.w r3, r3, #96 ; 0x60
800893c: 2b20 cmp r3, #32
800893e: d10a bne.n 8008956 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8008940: 687b ldr r3, [r7, #4]
8008942: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008946: 689b ldr r3, [r3, #8]
8008948: 6839 ldr r1, [r7, #0]
800894a: 6878 ldr r0, [r7, #4]
800894c: 4798 blx r3
800894e: 4603 mov r3, r0
8008950: 73fb strb r3, [r7, #15]
return ret;
8008952: 7bfb ldrb r3, [r7, #15]
8008954: e12d b.n 8008bb2 <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
8008956: 683b ldr r3, [r7, #0]
8008958: 785b ldrb r3, [r3, #1]
800895a: 2b03 cmp r3, #3
800895c: d007 beq.n 800896e <USBD_StdEPReq+0x7a>
800895e: 2b03 cmp r3, #3
8008960: f300 811b bgt.w 8008b9a <USBD_StdEPReq+0x2a6>
8008964: 2b00 cmp r3, #0
8008966: d072 beq.n 8008a4e <USBD_StdEPReq+0x15a>
8008968: 2b01 cmp r3, #1
800896a: d03a beq.n 80089e2 <USBD_StdEPReq+0xee>
800896c: e115 b.n 8008b9a <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800896e: 687b ldr r3, [r7, #4]
8008970: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8008974: 2b02 cmp r3, #2
8008976: d002 beq.n 800897e <USBD_StdEPReq+0x8a>
8008978: 2b03 cmp r3, #3
800897a: d015 beq.n 80089a8 <USBD_StdEPReq+0xb4>
800897c: e02b b.n 80089d6 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800897e: 7bbb ldrb r3, [r7, #14]
8008980: 2b00 cmp r3, #0
8008982: d00c beq.n 800899e <USBD_StdEPReq+0xaa>
8008984: 7bbb ldrb r3, [r7, #14]
8008986: 2b80 cmp r3, #128 ; 0x80
8008988: d009 beq.n 800899e <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800898a: 7bbb ldrb r3, [r7, #14]
800898c: 4619 mov r1, r3
800898e: 6878 ldr r0, [r7, #4]
8008990: f001 f960 bl 8009c54 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8008994: 2180 movs r1, #128 ; 0x80
8008996: 6878 ldr r0, [r7, #4]
8008998: f001 f95c bl 8009c54 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800899c: e020 b.n 80089e0 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800899e: 6839 ldr r1, [r7, #0]
80089a0: 6878 ldr r0, [r7, #4]
80089a2: f000 fc1f bl 80091e4 <USBD_CtlError>
break;
80089a6: e01b b.n 80089e0 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
80089a8: 683b ldr r3, [r7, #0]
80089aa: 885b ldrh r3, [r3, #2]
80089ac: 2b00 cmp r3, #0
80089ae: d10e bne.n 80089ce <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
80089b0: 7bbb ldrb r3, [r7, #14]
80089b2: 2b00 cmp r3, #0
80089b4: d00b beq.n 80089ce <USBD_StdEPReq+0xda>
80089b6: 7bbb ldrb r3, [r7, #14]
80089b8: 2b80 cmp r3, #128 ; 0x80
80089ba: d008 beq.n 80089ce <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
80089bc: 683b ldr r3, [r7, #0]
80089be: 88db ldrh r3, [r3, #6]
80089c0: 2b00 cmp r3, #0
80089c2: d104 bne.n 80089ce <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
80089c4: 7bbb ldrb r3, [r7, #14]
80089c6: 4619 mov r1, r3
80089c8: 6878 ldr r0, [r7, #4]
80089ca: f001 f943 bl 8009c54 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
80089ce: 6878 ldr r0, [r7, #4]
80089d0: f000 fcd1 bl 8009376 <USBD_CtlSendStatus>
break;
80089d4: e004 b.n 80089e0 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
80089d6: 6839 ldr r1, [r7, #0]
80089d8: 6878 ldr r0, [r7, #4]
80089da: f000 fc03 bl 80091e4 <USBD_CtlError>
break;
80089de: bf00 nop
}
break;
80089e0: e0e0 b.n 8008ba4 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
80089e2: 687b ldr r3, [r7, #4]
80089e4: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80089e8: 2b02 cmp r3, #2
80089ea: d002 beq.n 80089f2 <USBD_StdEPReq+0xfe>
80089ec: 2b03 cmp r3, #3
80089ee: d015 beq.n 8008a1c <USBD_StdEPReq+0x128>
80089f0: e026 b.n 8008a40 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80089f2: 7bbb ldrb r3, [r7, #14]
80089f4: 2b00 cmp r3, #0
80089f6: d00c beq.n 8008a12 <USBD_StdEPReq+0x11e>
80089f8: 7bbb ldrb r3, [r7, #14]
80089fa: 2b80 cmp r3, #128 ; 0x80
80089fc: d009 beq.n 8008a12 <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
80089fe: 7bbb ldrb r3, [r7, #14]
8008a00: 4619 mov r1, r3
8008a02: 6878 ldr r0, [r7, #4]
8008a04: f001 f926 bl 8009c54 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8008a08: 2180 movs r1, #128 ; 0x80
8008a0a: 6878 ldr r0, [r7, #4]
8008a0c: f001 f922 bl 8009c54 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8008a10: e01c b.n 8008a4c <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
8008a12: 6839 ldr r1, [r7, #0]
8008a14: 6878 ldr r0, [r7, #4]
8008a16: f000 fbe5 bl 80091e4 <USBD_CtlError>
break;
8008a1a: e017 b.n 8008a4c <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8008a1c: 683b ldr r3, [r7, #0]
8008a1e: 885b ldrh r3, [r3, #2]
8008a20: 2b00 cmp r3, #0
8008a22: d112 bne.n 8008a4a <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
8008a24: 7bbb ldrb r3, [r7, #14]
8008a26: f003 037f and.w r3, r3, #127 ; 0x7f
8008a2a: 2b00 cmp r3, #0
8008a2c: d004 beq.n 8008a38 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
8008a2e: 7bbb ldrb r3, [r7, #14]
8008a30: 4619 mov r1, r3
8008a32: 6878 ldr r0, [r7, #4]
8008a34: f001 f92d bl 8009c92 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
8008a38: 6878 ldr r0, [r7, #4]
8008a3a: f000 fc9c bl 8009376 <USBD_CtlSendStatus>
}
break;
8008a3e: e004 b.n 8008a4a <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
8008a40: 6839 ldr r1, [r7, #0]
8008a42: 6878 ldr r0, [r7, #4]
8008a44: f000 fbce bl 80091e4 <USBD_CtlError>
break;
8008a48: e000 b.n 8008a4c <USBD_StdEPReq+0x158>
break;
8008a4a: bf00 nop
}
break;
8008a4c: e0aa b.n 8008ba4 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
8008a4e: 687b ldr r3, [r7, #4]
8008a50: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8008a54: 2b02 cmp r3, #2
8008a56: d002 beq.n 8008a5e <USBD_StdEPReq+0x16a>
8008a58: 2b03 cmp r3, #3
8008a5a: d032 beq.n 8008ac2 <USBD_StdEPReq+0x1ce>
8008a5c: e097 b.n 8008b8e <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8008a5e: 7bbb ldrb r3, [r7, #14]
8008a60: 2b00 cmp r3, #0
8008a62: d007 beq.n 8008a74 <USBD_StdEPReq+0x180>
8008a64: 7bbb ldrb r3, [r7, #14]
8008a66: 2b80 cmp r3, #128 ; 0x80
8008a68: d004 beq.n 8008a74 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
8008a6a: 6839 ldr r1, [r7, #0]
8008a6c: 6878 ldr r0, [r7, #4]
8008a6e: f000 fbb9 bl 80091e4 <USBD_CtlError>
break;
8008a72: e091 b.n 8008b98 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8008a74: f997 300e ldrsb.w r3, [r7, #14]
8008a78: 2b00 cmp r3, #0
8008a7a: da0b bge.n 8008a94 <USBD_StdEPReq+0x1a0>
8008a7c: 7bbb ldrb r3, [r7, #14]
8008a7e: f003 027f and.w r2, r3, #127 ; 0x7f
8008a82: 4613 mov r3, r2
8008a84: 009b lsls r3, r3, #2
8008a86: 4413 add r3, r2
8008a88: 009b lsls r3, r3, #2
8008a8a: 3310 adds r3, #16
8008a8c: 687a ldr r2, [r7, #4]
8008a8e: 4413 add r3, r2
8008a90: 3304 adds r3, #4
8008a92: e00b b.n 8008aac <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
8008a94: 7bbb ldrb r3, [r7, #14]
8008a96: f003 027f and.w r2, r3, #127 ; 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8008a9a: 4613 mov r3, r2
8008a9c: 009b lsls r3, r3, #2
8008a9e: 4413 add r3, r2
8008aa0: 009b lsls r3, r3, #2
8008aa2: f503 73a8 add.w r3, r3, #336 ; 0x150
8008aa6: 687a ldr r2, [r7, #4]
8008aa8: 4413 add r3, r2
8008aaa: 3304 adds r3, #4
8008aac: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
8008aae: 68bb ldr r3, [r7, #8]
8008ab0: 2200 movs r2, #0
8008ab2: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8008ab4: 68bb ldr r3, [r7, #8]
8008ab6: 2202 movs r2, #2
8008ab8: 4619 mov r1, r3
8008aba: 6878 ldr r0, [r7, #4]
8008abc: f000 fbfd bl 80092ba <USBD_CtlSendData>
break;
8008ac0: e06a b.n 8008b98 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
8008ac2: f997 300e ldrsb.w r3, [r7, #14]
8008ac6: 2b00 cmp r3, #0
8008ac8: da11 bge.n 8008aee <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
8008aca: 7bbb ldrb r3, [r7, #14]
8008acc: f003 020f and.w r2, r3, #15
8008ad0: 6879 ldr r1, [r7, #4]
8008ad2: 4613 mov r3, r2
8008ad4: 009b lsls r3, r3, #2
8008ad6: 4413 add r3, r2
8008ad8: 009b lsls r3, r3, #2
8008ada: 440b add r3, r1
8008adc: 3318 adds r3, #24
8008ade: 681b ldr r3, [r3, #0]
8008ae0: 2b00 cmp r3, #0
8008ae2: d117 bne.n 8008b14 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8008ae4: 6839 ldr r1, [r7, #0]
8008ae6: 6878 ldr r0, [r7, #4]
8008ae8: f000 fb7c bl 80091e4 <USBD_CtlError>
break;
8008aec: e054 b.n 8008b98 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
8008aee: 7bbb ldrb r3, [r7, #14]
8008af0: f003 020f and.w r2, r3, #15
8008af4: 6879 ldr r1, [r7, #4]
8008af6: 4613 mov r3, r2
8008af8: 009b lsls r3, r3, #2
8008afa: 4413 add r3, r2
8008afc: 009b lsls r3, r3, #2
8008afe: 440b add r3, r1
8008b00: f503 73ac add.w r3, r3, #344 ; 0x158
8008b04: 681b ldr r3, [r3, #0]
8008b06: 2b00 cmp r3, #0
8008b08: d104 bne.n 8008b14 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8008b0a: 6839 ldr r1, [r7, #0]
8008b0c: 6878 ldr r0, [r7, #4]
8008b0e: f000 fb69 bl 80091e4 <USBD_CtlError>
break;
8008b12: e041 b.n 8008b98 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8008b14: f997 300e ldrsb.w r3, [r7, #14]
8008b18: 2b00 cmp r3, #0
8008b1a: da0b bge.n 8008b34 <USBD_StdEPReq+0x240>
8008b1c: 7bbb ldrb r3, [r7, #14]
8008b1e: f003 027f and.w r2, r3, #127 ; 0x7f
8008b22: 4613 mov r3, r2
8008b24: 009b lsls r3, r3, #2
8008b26: 4413 add r3, r2
8008b28: 009b lsls r3, r3, #2
8008b2a: 3310 adds r3, #16
8008b2c: 687a ldr r2, [r7, #4]
8008b2e: 4413 add r3, r2
8008b30: 3304 adds r3, #4
8008b32: e00b b.n 8008b4c <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
8008b34: 7bbb ldrb r3, [r7, #14]
8008b36: f003 027f and.w r2, r3, #127 ; 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8008b3a: 4613 mov r3, r2
8008b3c: 009b lsls r3, r3, #2
8008b3e: 4413 add r3, r2
8008b40: 009b lsls r3, r3, #2
8008b42: f503 73a8 add.w r3, r3, #336 ; 0x150
8008b46: 687a ldr r2, [r7, #4]
8008b48: 4413 add r3, r2
8008b4a: 3304 adds r3, #4
8008b4c: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
8008b4e: 7bbb ldrb r3, [r7, #14]
8008b50: 2b00 cmp r3, #0
8008b52: d002 beq.n 8008b5a <USBD_StdEPReq+0x266>
8008b54: 7bbb ldrb r3, [r7, #14]
8008b56: 2b80 cmp r3, #128 ; 0x80
8008b58: d103 bne.n 8008b62 <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
8008b5a: 68bb ldr r3, [r7, #8]
8008b5c: 2200 movs r2, #0
8008b5e: 601a str r2, [r3, #0]
8008b60: e00e b.n 8008b80 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
8008b62: 7bbb ldrb r3, [r7, #14]
8008b64: 4619 mov r1, r3
8008b66: 6878 ldr r0, [r7, #4]
8008b68: f001 f8b2 bl 8009cd0 <USBD_LL_IsStallEP>
8008b6c: 4603 mov r3, r0
8008b6e: 2b00 cmp r3, #0
8008b70: d003 beq.n 8008b7a <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
8008b72: 68bb ldr r3, [r7, #8]
8008b74: 2201 movs r2, #1
8008b76: 601a str r2, [r3, #0]
8008b78: e002 b.n 8008b80 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
8008b7a: 68bb ldr r3, [r7, #8]
8008b7c: 2200 movs r2, #0
8008b7e: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8008b80: 68bb ldr r3, [r7, #8]
8008b82: 2202 movs r2, #2
8008b84: 4619 mov r1, r3
8008b86: 6878 ldr r0, [r7, #4]
8008b88: f000 fb97 bl 80092ba <USBD_CtlSendData>
break;
8008b8c: e004 b.n 8008b98 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
8008b8e: 6839 ldr r1, [r7, #0]
8008b90: 6878 ldr r0, [r7, #4]
8008b92: f000 fb27 bl 80091e4 <USBD_CtlError>
break;
8008b96: bf00 nop
}
break;
8008b98: e004 b.n 8008ba4 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
8008b9a: 6839 ldr r1, [r7, #0]
8008b9c: 6878 ldr r0, [r7, #4]
8008b9e: f000 fb21 bl 80091e4 <USBD_CtlError>
break;
8008ba2: bf00 nop
}
break;
8008ba4: e004 b.n 8008bb0 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
8008ba6: 6839 ldr r1, [r7, #0]
8008ba8: 6878 ldr r0, [r7, #4]
8008baa: f000 fb1b bl 80091e4 <USBD_CtlError>
break;
8008bae: bf00 nop
}
return ret;
8008bb0: 7bfb ldrb r3, [r7, #15]
}
8008bb2: 4618 mov r0, r3
8008bb4: 3710 adds r7, #16
8008bb6: 46bd mov sp, r7
8008bb8: bd80 pop {r7, pc}
...
08008bbc <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008bbc: b580 push {r7, lr}
8008bbe: b084 sub sp, #16
8008bc0: af00 add r7, sp, #0
8008bc2: 6078 str r0, [r7, #4]
8008bc4: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8008bc6: 2300 movs r3, #0
8008bc8: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
8008bca: 2300 movs r3, #0
8008bcc: 60fb str r3, [r7, #12]
uint8_t err = 0U;
8008bce: 2300 movs r3, #0
8008bd0: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8008bd2: 683b ldr r3, [r7, #0]
8008bd4: 885b ldrh r3, [r3, #2]
8008bd6: 0a1b lsrs r3, r3, #8
8008bd8: b29b uxth r3, r3
8008bda: 3b01 subs r3, #1
8008bdc: 2b06 cmp r3, #6
8008bde: f200 8128 bhi.w 8008e32 <USBD_GetDescriptor+0x276>
8008be2: a201 add r2, pc, #4 ; (adr r2, 8008be8 <USBD_GetDescriptor+0x2c>)
8008be4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008be8: 08008c05 .word 0x08008c05
8008bec: 08008c1d .word 0x08008c1d
8008bf0: 08008c5d .word 0x08008c5d
8008bf4: 08008e33 .word 0x08008e33
8008bf8: 08008e33 .word 0x08008e33
8008bfc: 08008dd3 .word 0x08008dd3
8008c00: 08008dff .word 0x08008dff
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
8008c04: 687b ldr r3, [r7, #4]
8008c06: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008c0a: 681b ldr r3, [r3, #0]
8008c0c: 687a ldr r2, [r7, #4]
8008c0e: 7c12 ldrb r2, [r2, #16]
8008c10: f107 0108 add.w r1, r7, #8
8008c14: 4610 mov r0, r2
8008c16: 4798 blx r3
8008c18: 60f8 str r0, [r7, #12]
break;
8008c1a: e112 b.n 8008e42 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8008c1c: 687b ldr r3, [r7, #4]
8008c1e: 7c1b ldrb r3, [r3, #16]
8008c20: 2b00 cmp r3, #0
8008c22: d10d bne.n 8008c40 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
8008c24: 687b ldr r3, [r7, #4]
8008c26: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008c2a: 6a9b ldr r3, [r3, #40] ; 0x28
8008c2c: f107 0208 add.w r2, r7, #8
8008c30: 4610 mov r0, r2
8008c32: 4798 blx r3
8008c34: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8008c36: 68fb ldr r3, [r7, #12]
8008c38: 3301 adds r3, #1
8008c3a: 2202 movs r2, #2
8008c3c: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
8008c3e: e100 b.n 8008e42 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
8008c40: 687b ldr r3, [r7, #4]
8008c42: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008c46: 6adb ldr r3, [r3, #44] ; 0x2c
8008c48: f107 0208 add.w r2, r7, #8
8008c4c: 4610 mov r0, r2
8008c4e: 4798 blx r3
8008c50: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8008c52: 68fb ldr r3, [r7, #12]
8008c54: 3301 adds r3, #1
8008c56: 2202 movs r2, #2
8008c58: 701a strb r2, [r3, #0]
break;
8008c5a: e0f2 b.n 8008e42 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8008c5c: 683b ldr r3, [r7, #0]
8008c5e: 885b ldrh r3, [r3, #2]
8008c60: b2db uxtb r3, r3
8008c62: 2b05 cmp r3, #5
8008c64: f200 80ac bhi.w 8008dc0 <USBD_GetDescriptor+0x204>
8008c68: a201 add r2, pc, #4 ; (adr r2, 8008c70 <USBD_GetDescriptor+0xb4>)
8008c6a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008c6e: bf00 nop
8008c70: 08008c89 .word 0x08008c89
8008c74: 08008cbd .word 0x08008cbd
8008c78: 08008cf1 .word 0x08008cf1
8008c7c: 08008d25 .word 0x08008d25
8008c80: 08008d59 .word 0x08008d59
8008c84: 08008d8d .word 0x08008d8d
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8008c88: 687b ldr r3, [r7, #4]
8008c8a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008c8e: 685b ldr r3, [r3, #4]
8008c90: 2b00 cmp r3, #0
8008c92: d00b beq.n 8008cac <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8008c94: 687b ldr r3, [r7, #4]
8008c96: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008c9a: 685b ldr r3, [r3, #4]
8008c9c: 687a ldr r2, [r7, #4]
8008c9e: 7c12 ldrb r2, [r2, #16]
8008ca0: f107 0108 add.w r1, r7, #8
8008ca4: 4610 mov r0, r2
8008ca6: 4798 blx r3
8008ca8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008caa: e091 b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008cac: 6839 ldr r1, [r7, #0]
8008cae: 6878 ldr r0, [r7, #4]
8008cb0: f000 fa98 bl 80091e4 <USBD_CtlError>
err++;
8008cb4: 7afb ldrb r3, [r7, #11]
8008cb6: 3301 adds r3, #1
8008cb8: 72fb strb r3, [r7, #11]
break;
8008cba: e089 b.n 8008dd0 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
8008cbc: 687b ldr r3, [r7, #4]
8008cbe: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008cc2: 689b ldr r3, [r3, #8]
8008cc4: 2b00 cmp r3, #0
8008cc6: d00b beq.n 8008ce0 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8008cc8: 687b ldr r3, [r7, #4]
8008cca: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008cce: 689b ldr r3, [r3, #8]
8008cd0: 687a ldr r2, [r7, #4]
8008cd2: 7c12 ldrb r2, [r2, #16]
8008cd4: f107 0108 add.w r1, r7, #8
8008cd8: 4610 mov r0, r2
8008cda: 4798 blx r3
8008cdc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008cde: e077 b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008ce0: 6839 ldr r1, [r7, #0]
8008ce2: 6878 ldr r0, [r7, #4]
8008ce4: f000 fa7e bl 80091e4 <USBD_CtlError>
err++;
8008ce8: 7afb ldrb r3, [r7, #11]
8008cea: 3301 adds r3, #1
8008cec: 72fb strb r3, [r7, #11]
break;
8008cee: e06f b.n 8008dd0 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
8008cf0: 687b ldr r3, [r7, #4]
8008cf2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008cf6: 68db ldr r3, [r3, #12]
8008cf8: 2b00 cmp r3, #0
8008cfa: d00b beq.n 8008d14 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
8008cfc: 687b ldr r3, [r7, #4]
8008cfe: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d02: 68db ldr r3, [r3, #12]
8008d04: 687a ldr r2, [r7, #4]
8008d06: 7c12 ldrb r2, [r2, #16]
8008d08: f107 0108 add.w r1, r7, #8
8008d0c: 4610 mov r0, r2
8008d0e: 4798 blx r3
8008d10: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008d12: e05d b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008d14: 6839 ldr r1, [r7, #0]
8008d16: 6878 ldr r0, [r7, #4]
8008d18: f000 fa64 bl 80091e4 <USBD_CtlError>
err++;
8008d1c: 7afb ldrb r3, [r7, #11]
8008d1e: 3301 adds r3, #1
8008d20: 72fb strb r3, [r7, #11]
break;
8008d22: e055 b.n 8008dd0 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
8008d24: 687b ldr r3, [r7, #4]
8008d26: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d2a: 691b ldr r3, [r3, #16]
8008d2c: 2b00 cmp r3, #0
8008d2e: d00b beq.n 8008d48 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
8008d30: 687b ldr r3, [r7, #4]
8008d32: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d36: 691b ldr r3, [r3, #16]
8008d38: 687a ldr r2, [r7, #4]
8008d3a: 7c12 ldrb r2, [r2, #16]
8008d3c: f107 0108 add.w r1, r7, #8
8008d40: 4610 mov r0, r2
8008d42: 4798 blx r3
8008d44: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008d46: e043 b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008d48: 6839 ldr r1, [r7, #0]
8008d4a: 6878 ldr r0, [r7, #4]
8008d4c: f000 fa4a bl 80091e4 <USBD_CtlError>
err++;
8008d50: 7afb ldrb r3, [r7, #11]
8008d52: 3301 adds r3, #1
8008d54: 72fb strb r3, [r7, #11]
break;
8008d56: e03b b.n 8008dd0 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8008d58: 687b ldr r3, [r7, #4]
8008d5a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d5e: 695b ldr r3, [r3, #20]
8008d60: 2b00 cmp r3, #0
8008d62: d00b beq.n 8008d7c <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8008d64: 687b ldr r3, [r7, #4]
8008d66: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d6a: 695b ldr r3, [r3, #20]
8008d6c: 687a ldr r2, [r7, #4]
8008d6e: 7c12 ldrb r2, [r2, #16]
8008d70: f107 0108 add.w r1, r7, #8
8008d74: 4610 mov r0, r2
8008d76: 4798 blx r3
8008d78: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008d7a: e029 b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008d7c: 6839 ldr r1, [r7, #0]
8008d7e: 6878 ldr r0, [r7, #4]
8008d80: f000 fa30 bl 80091e4 <USBD_CtlError>
err++;
8008d84: 7afb ldrb r3, [r7, #11]
8008d86: 3301 adds r3, #1
8008d88: 72fb strb r3, [r7, #11]
break;
8008d8a: e021 b.n 8008dd0 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
8008d8c: 687b ldr r3, [r7, #4]
8008d8e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d92: 699b ldr r3, [r3, #24]
8008d94: 2b00 cmp r3, #0
8008d96: d00b beq.n 8008db0 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8008d98: 687b ldr r3, [r7, #4]
8008d9a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8008d9e: 699b ldr r3, [r3, #24]
8008da0: 687a ldr r2, [r7, #4]
8008da2: 7c12 ldrb r2, [r2, #16]
8008da4: f107 0108 add.w r1, r7, #8
8008da8: 4610 mov r0, r2
8008daa: 4798 blx r3
8008dac: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008dae: e00f b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008db0: 6839 ldr r1, [r7, #0]
8008db2: 6878 ldr r0, [r7, #4]
8008db4: f000 fa16 bl 80091e4 <USBD_CtlError>
err++;
8008db8: 7afb ldrb r3, [r7, #11]
8008dba: 3301 adds r3, #1
8008dbc: 72fb strb r3, [r7, #11]
break;
8008dbe: e007 b.n 8008dd0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
8008dc0: 6839 ldr r1, [r7, #0]
8008dc2: 6878 ldr r0, [r7, #4]
8008dc4: f000 fa0e bl 80091e4 <USBD_CtlError>
err++;
8008dc8: 7afb ldrb r3, [r7, #11]
8008dca: 3301 adds r3, #1
8008dcc: 72fb strb r3, [r7, #11]
#endif
}
break;
8008dce: e038 b.n 8008e42 <USBD_GetDescriptor+0x286>
8008dd0: e037 b.n 8008e42 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8008dd2: 687b ldr r3, [r7, #4]
8008dd4: 7c1b ldrb r3, [r3, #16]
8008dd6: 2b00 cmp r3, #0
8008dd8: d109 bne.n 8008dee <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
8008dda: 687b ldr r3, [r7, #4]
8008ddc: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008de0: 6b5b ldr r3, [r3, #52] ; 0x34
8008de2: f107 0208 add.w r2, r7, #8
8008de6: 4610 mov r0, r2
8008de8: 4798 blx r3
8008dea: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008dec: e029 b.n 8008e42 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
8008dee: 6839 ldr r1, [r7, #0]
8008df0: 6878 ldr r0, [r7, #4]
8008df2: f000 f9f7 bl 80091e4 <USBD_CtlError>
err++;
8008df6: 7afb ldrb r3, [r7, #11]
8008df8: 3301 adds r3, #1
8008dfa: 72fb strb r3, [r7, #11]
break;
8008dfc: e021 b.n 8008e42 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8008dfe: 687b ldr r3, [r7, #4]
8008e00: 7c1b ldrb r3, [r3, #16]
8008e02: 2b00 cmp r3, #0
8008e04: d10d bne.n 8008e22 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
8008e06: 687b ldr r3, [r7, #4]
8008e08: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8008e0c: 6b1b ldr r3, [r3, #48] ; 0x30
8008e0e: f107 0208 add.w r2, r7, #8
8008e12: 4610 mov r0, r2
8008e14: 4798 blx r3
8008e16: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
8008e18: 68fb ldr r3, [r7, #12]
8008e1a: 3301 adds r3, #1
8008e1c: 2207 movs r2, #7
8008e1e: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008e20: e00f b.n 8008e42 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
8008e22: 6839 ldr r1, [r7, #0]
8008e24: 6878 ldr r0, [r7, #4]
8008e26: f000 f9dd bl 80091e4 <USBD_CtlError>
err++;
8008e2a: 7afb ldrb r3, [r7, #11]
8008e2c: 3301 adds r3, #1
8008e2e: 72fb strb r3, [r7, #11]
break;
8008e30: e007 b.n 8008e42 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
8008e32: 6839 ldr r1, [r7, #0]
8008e34: 6878 ldr r0, [r7, #4]
8008e36: f000 f9d5 bl 80091e4 <USBD_CtlError>
err++;
8008e3a: 7afb ldrb r3, [r7, #11]
8008e3c: 3301 adds r3, #1
8008e3e: 72fb strb r3, [r7, #11]
break;
8008e40: bf00 nop
}
if (err != 0U)
8008e42: 7afb ldrb r3, [r7, #11]
8008e44: 2b00 cmp r3, #0
8008e46: d11c bne.n 8008e82 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
8008e48: 893b ldrh r3, [r7, #8]
8008e4a: 2b00 cmp r3, #0
8008e4c: d011 beq.n 8008e72 <USBD_GetDescriptor+0x2b6>
8008e4e: 683b ldr r3, [r7, #0]
8008e50: 88db ldrh r3, [r3, #6]
8008e52: 2b00 cmp r3, #0
8008e54: d00d beq.n 8008e72 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
8008e56: 683b ldr r3, [r7, #0]
8008e58: 88da ldrh r2, [r3, #6]
8008e5a: 893b ldrh r3, [r7, #8]
8008e5c: 4293 cmp r3, r2
8008e5e: bf28 it cs
8008e60: 4613 movcs r3, r2
8008e62: b29b uxth r3, r3
8008e64: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8008e66: 893b ldrh r3, [r7, #8]
8008e68: 461a mov r2, r3
8008e6a: 68f9 ldr r1, [r7, #12]
8008e6c: 6878 ldr r0, [r7, #4]
8008e6e: f000 fa24 bl 80092ba <USBD_CtlSendData>
}
if (req->wLength == 0U)
8008e72: 683b ldr r3, [r7, #0]
8008e74: 88db ldrh r3, [r3, #6]
8008e76: 2b00 cmp r3, #0
8008e78: d104 bne.n 8008e84 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
8008e7a: 6878 ldr r0, [r7, #4]
8008e7c: f000 fa7b bl 8009376 <USBD_CtlSendStatus>
8008e80: e000 b.n 8008e84 <USBD_GetDescriptor+0x2c8>
return;
8008e82: bf00 nop
}
}
}
8008e84: 3710 adds r7, #16
8008e86: 46bd mov sp, r7
8008e88: bd80 pop {r7, pc}
8008e8a: bf00 nop
08008e8c <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008e8c: b580 push {r7, lr}
8008e8e: b084 sub sp, #16
8008e90: af00 add r7, sp, #0
8008e92: 6078 str r0, [r7, #4]
8008e94: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8008e96: 683b ldr r3, [r7, #0]
8008e98: 889b ldrh r3, [r3, #4]
8008e9a: 2b00 cmp r3, #0
8008e9c: d130 bne.n 8008f00 <USBD_SetAddress+0x74>
8008e9e: 683b ldr r3, [r7, #0]
8008ea0: 88db ldrh r3, [r3, #6]
8008ea2: 2b00 cmp r3, #0
8008ea4: d12c bne.n 8008f00 <USBD_SetAddress+0x74>
8008ea6: 683b ldr r3, [r7, #0]
8008ea8: 885b ldrh r3, [r3, #2]
8008eaa: 2b7f cmp r3, #127 ; 0x7f
8008eac: d828 bhi.n 8008f00 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
8008eae: 683b ldr r3, [r7, #0]
8008eb0: 885b ldrh r3, [r3, #2]
8008eb2: b2db uxtb r3, r3
8008eb4: f003 037f and.w r3, r3, #127 ; 0x7f
8008eb8: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008eba: 687b ldr r3, [r7, #4]
8008ebc: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8008ec0: 2b03 cmp r3, #3
8008ec2: d104 bne.n 8008ece <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
8008ec4: 6839 ldr r1, [r7, #0]
8008ec6: 6878 ldr r0, [r7, #4]
8008ec8: f000 f98c bl 80091e4 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008ecc: e01d b.n 8008f0a <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
8008ece: 687b ldr r3, [r7, #4]
8008ed0: 7bfa ldrb r2, [r7, #15]
8008ed2: f883 229e strb.w r2, [r3, #670] ; 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
8008ed6: 7bfb ldrb r3, [r7, #15]
8008ed8: 4619 mov r1, r3
8008eda: 6878 ldr r0, [r7, #4]
8008edc: f000 ff25 bl 8009d2a <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
8008ee0: 6878 ldr r0, [r7, #4]
8008ee2: f000 fa48 bl 8009376 <USBD_CtlSendStatus>
if (dev_addr != 0U)
8008ee6: 7bfb ldrb r3, [r7, #15]
8008ee8: 2b00 cmp r3, #0
8008eea: d004 beq.n 8008ef6 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8008eec: 687b ldr r3, [r7, #4]
8008eee: 2202 movs r2, #2
8008ef0: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008ef4: e009 b.n 8008f0a <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
8008ef6: 687b ldr r3, [r7, #4]
8008ef8: 2201 movs r2, #1
8008efa: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008efe: e004 b.n 8008f0a <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
8008f00: 6839 ldr r1, [r7, #0]
8008f02: 6878 ldr r0, [r7, #4]
8008f04: f000 f96e bl 80091e4 <USBD_CtlError>
}
}
8008f08: bf00 nop
8008f0a: bf00 nop
8008f0c: 3710 adds r7, #16
8008f0e: 46bd mov sp, r7
8008f10: bd80 pop {r7, pc}
...
08008f14 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8008f14: b580 push {r7, lr}
8008f16: b082 sub sp, #8
8008f18: af00 add r7, sp, #0
8008f1a: 6078 str r0, [r7, #4]
8008f1c: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
8008f1e: 683b ldr r3, [r7, #0]
8008f20: 885b ldrh r3, [r3, #2]
8008f22: b2da uxtb r2, r3
8008f24: 4b41 ldr r3, [pc, #260] ; (800902c <USBD_SetConfig+0x118>)
8008f26: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
8008f28: 4b40 ldr r3, [pc, #256] ; (800902c <USBD_SetConfig+0x118>)
8008f2a: 781b ldrb r3, [r3, #0]
8008f2c: 2b01 cmp r3, #1
8008f2e: d904 bls.n 8008f3a <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
8008f30: 6839 ldr r1, [r7, #0]
8008f32: 6878 ldr r0, [r7, #4]
8008f34: f000 f956 bl 80091e4 <USBD_CtlError>
8008f38: e075 b.n 8009026 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
8008f3a: 687b ldr r3, [r7, #4]
8008f3c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8008f40: 2b02 cmp r3, #2
8008f42: d002 beq.n 8008f4a <USBD_SetConfig+0x36>
8008f44: 2b03 cmp r3, #3
8008f46: d023 beq.n 8008f90 <USBD_SetConfig+0x7c>
8008f48: e062 b.n 8009010 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
8008f4a: 4b38 ldr r3, [pc, #224] ; (800902c <USBD_SetConfig+0x118>)
8008f4c: 781b ldrb r3, [r3, #0]
8008f4e: 2b00 cmp r3, #0
8008f50: d01a beq.n 8008f88 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
8008f52: 4b36 ldr r3, [pc, #216] ; (800902c <USBD_SetConfig+0x118>)
8008f54: 781b ldrb r3, [r3, #0]
8008f56: 461a mov r2, r3
8008f58: 687b ldr r3, [r7, #4]
8008f5a: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
8008f5c: 687b ldr r3, [r7, #4]
8008f5e: 2203 movs r2, #3
8008f60: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8008f64: 4b31 ldr r3, [pc, #196] ; (800902c <USBD_SetConfig+0x118>)
8008f66: 781b ldrb r3, [r3, #0]
8008f68: 4619 mov r1, r3
8008f6a: 6878 ldr r0, [r7, #4]
8008f6c: f7ff f9e4 bl 8008338 <USBD_SetClassConfig>
8008f70: 4603 mov r3, r0
8008f72: 2b02 cmp r3, #2
8008f74: d104 bne.n 8008f80 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
8008f76: 6839 ldr r1, [r7, #0]
8008f78: 6878 ldr r0, [r7, #4]
8008f7a: f000 f933 bl 80091e4 <USBD_CtlError>
return;
8008f7e: e052 b.n 8009026 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
8008f80: 6878 ldr r0, [r7, #4]
8008f82: f000 f9f8 bl 8009376 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8008f86: e04e b.n 8009026 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8008f88: 6878 ldr r0, [r7, #4]
8008f8a: f000 f9f4 bl 8009376 <USBD_CtlSendStatus>
break;
8008f8e: e04a b.n 8009026 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
8008f90: 4b26 ldr r3, [pc, #152] ; (800902c <USBD_SetConfig+0x118>)
8008f92: 781b ldrb r3, [r3, #0]
8008f94: 2b00 cmp r3, #0
8008f96: d112 bne.n 8008fbe <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8008f98: 687b ldr r3, [r7, #4]
8008f9a: 2202 movs r2, #2
8008f9c: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->dev_config = cfgidx;
8008fa0: 4b22 ldr r3, [pc, #136] ; (800902c <USBD_SetConfig+0x118>)
8008fa2: 781b ldrb r3, [r3, #0]
8008fa4: 461a mov r2, r3
8008fa6: 687b ldr r3, [r7, #4]
8008fa8: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
8008faa: 4b20 ldr r3, [pc, #128] ; (800902c <USBD_SetConfig+0x118>)
8008fac: 781b ldrb r3, [r3, #0]
8008fae: 4619 mov r1, r3
8008fb0: 6878 ldr r0, [r7, #4]
8008fb2: f7ff f9e0 bl 8008376 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
8008fb6: 6878 ldr r0, [r7, #4]
8008fb8: f000 f9dd bl 8009376 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8008fbc: e033 b.n 8009026 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
8008fbe: 4b1b ldr r3, [pc, #108] ; (800902c <USBD_SetConfig+0x118>)
8008fc0: 781b ldrb r3, [r3, #0]
8008fc2: 461a mov r2, r3
8008fc4: 687b ldr r3, [r7, #4]
8008fc6: 685b ldr r3, [r3, #4]
8008fc8: 429a cmp r2, r3
8008fca: d01d beq.n 8009008 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
8008fcc: 687b ldr r3, [r7, #4]
8008fce: 685b ldr r3, [r3, #4]
8008fd0: b2db uxtb r3, r3
8008fd2: 4619 mov r1, r3
8008fd4: 6878 ldr r0, [r7, #4]
8008fd6: f7ff f9ce bl 8008376 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
8008fda: 4b14 ldr r3, [pc, #80] ; (800902c <USBD_SetConfig+0x118>)
8008fdc: 781b ldrb r3, [r3, #0]
8008fde: 461a mov r2, r3
8008fe0: 687b ldr r3, [r7, #4]
8008fe2: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8008fe4: 4b11 ldr r3, [pc, #68] ; (800902c <USBD_SetConfig+0x118>)
8008fe6: 781b ldrb r3, [r3, #0]
8008fe8: 4619 mov r1, r3
8008fea: 6878 ldr r0, [r7, #4]
8008fec: f7ff f9a4 bl 8008338 <USBD_SetClassConfig>
8008ff0: 4603 mov r3, r0
8008ff2: 2b02 cmp r3, #2
8008ff4: d104 bne.n 8009000 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
8008ff6: 6839 ldr r1, [r7, #0]
8008ff8: 6878 ldr r0, [r7, #4]
8008ffa: f000 f8f3 bl 80091e4 <USBD_CtlError>
return;
8008ffe: e012 b.n 8009026 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8009000: 6878 ldr r0, [r7, #4]
8009002: f000 f9b8 bl 8009376 <USBD_CtlSendStatus>
break;
8009006: e00e b.n 8009026 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8009008: 6878 ldr r0, [r7, #4]
800900a: f000 f9b4 bl 8009376 <USBD_CtlSendStatus>
break;
800900e: e00a b.n 8009026 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
8009010: 6839 ldr r1, [r7, #0]
8009012: 6878 ldr r0, [r7, #4]
8009014: f000 f8e6 bl 80091e4 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
8009018: 4b04 ldr r3, [pc, #16] ; (800902c <USBD_SetConfig+0x118>)
800901a: 781b ldrb r3, [r3, #0]
800901c: 4619 mov r1, r3
800901e: 6878 ldr r0, [r7, #4]
8009020: f7ff f9a9 bl 8008376 <USBD_ClrClassConfig>
break;
8009024: bf00 nop
}
}
}
8009026: 3708 adds r7, #8
8009028: 46bd mov sp, r7
800902a: bd80 pop {r7, pc}
800902c: 200003a8 .word 0x200003a8
08009030 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8009030: b580 push {r7, lr}
8009032: b082 sub sp, #8
8009034: af00 add r7, sp, #0
8009036: 6078 str r0, [r7, #4]
8009038: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800903a: 683b ldr r3, [r7, #0]
800903c: 88db ldrh r3, [r3, #6]
800903e: 2b01 cmp r3, #1
8009040: d004 beq.n 800904c <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
8009042: 6839 ldr r1, [r7, #0]
8009044: 6878 ldr r0, [r7, #4]
8009046: f000 f8cd bl 80091e4 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800904a: e022 b.n 8009092 <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800904c: 687b ldr r3, [r7, #4]
800904e: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009052: 2b02 cmp r3, #2
8009054: dc02 bgt.n 800905c <USBD_GetConfig+0x2c>
8009056: 2b00 cmp r3, #0
8009058: dc03 bgt.n 8009062 <USBD_GetConfig+0x32>
800905a: e015 b.n 8009088 <USBD_GetConfig+0x58>
800905c: 2b03 cmp r3, #3
800905e: d00b beq.n 8009078 <USBD_GetConfig+0x48>
8009060: e012 b.n 8009088 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
8009062: 687b ldr r3, [r7, #4]
8009064: 2200 movs r2, #0
8009066: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8009068: 687b ldr r3, [r7, #4]
800906a: 3308 adds r3, #8
800906c: 2201 movs r2, #1
800906e: 4619 mov r1, r3
8009070: 6878 ldr r0, [r7, #4]
8009072: f000 f922 bl 80092ba <USBD_CtlSendData>
break;
8009076: e00c b.n 8009092 <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8009078: 687b ldr r3, [r7, #4]
800907a: 3304 adds r3, #4
800907c: 2201 movs r2, #1
800907e: 4619 mov r1, r3
8009080: 6878 ldr r0, [r7, #4]
8009082: f000 f91a bl 80092ba <USBD_CtlSendData>
break;
8009086: e004 b.n 8009092 <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
8009088: 6839 ldr r1, [r7, #0]
800908a: 6878 ldr r0, [r7, #4]
800908c: f000 f8aa bl 80091e4 <USBD_CtlError>
break;
8009090: bf00 nop
}
8009092: bf00 nop
8009094: 3708 adds r7, #8
8009096: 46bd mov sp, r7
8009098: bd80 pop {r7, pc}
0800909a <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800909a: b580 push {r7, lr}
800909c: b082 sub sp, #8
800909e: af00 add r7, sp, #0
80090a0: 6078 str r0, [r7, #4]
80090a2: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
80090a4: 687b ldr r3, [r7, #4]
80090a6: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80090aa: 3b01 subs r3, #1
80090ac: 2b02 cmp r3, #2
80090ae: d81e bhi.n 80090ee <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
80090b0: 683b ldr r3, [r7, #0]
80090b2: 88db ldrh r3, [r3, #6]
80090b4: 2b02 cmp r3, #2
80090b6: d004 beq.n 80090c2 <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
80090b8: 6839 ldr r1, [r7, #0]
80090ba: 6878 ldr r0, [r7, #4]
80090bc: f000 f892 bl 80091e4 <USBD_CtlError>
break;
80090c0: e01a b.n 80090f8 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
80090c2: 687b ldr r3, [r7, #4]
80090c4: 2201 movs r2, #1
80090c6: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
80090c8: 687b ldr r3, [r7, #4]
80090ca: f8d3 32a4 ldr.w r3, [r3, #676] ; 0x2a4
80090ce: 2b00 cmp r3, #0
80090d0: d005 beq.n 80090de <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
80090d2: 687b ldr r3, [r7, #4]
80090d4: 68db ldr r3, [r3, #12]
80090d6: f043 0202 orr.w r2, r3, #2
80090da: 687b ldr r3, [r7, #4]
80090dc: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
80090de: 687b ldr r3, [r7, #4]
80090e0: 330c adds r3, #12
80090e2: 2202 movs r2, #2
80090e4: 4619 mov r1, r3
80090e6: 6878 ldr r0, [r7, #4]
80090e8: f000 f8e7 bl 80092ba <USBD_CtlSendData>
break;
80090ec: e004 b.n 80090f8 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
80090ee: 6839 ldr r1, [r7, #0]
80090f0: 6878 ldr r0, [r7, #4]
80090f2: f000 f877 bl 80091e4 <USBD_CtlError>
break;
80090f6: bf00 nop
}
}
80090f8: bf00 nop
80090fa: 3708 adds r7, #8
80090fc: 46bd mov sp, r7
80090fe: bd80 pop {r7, pc}
08009100 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009100: b580 push {r7, lr}
8009102: b082 sub sp, #8
8009104: af00 add r7, sp, #0
8009106: 6078 str r0, [r7, #4]
8009108: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800910a: 683b ldr r3, [r7, #0]
800910c: 885b ldrh r3, [r3, #2]
800910e: 2b01 cmp r3, #1
8009110: d106 bne.n 8009120 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
8009112: 687b ldr r3, [r7, #4]
8009114: 2201 movs r2, #1
8009116: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
USBD_CtlSendStatus(pdev);
800911a: 6878 ldr r0, [r7, #4]
800911c: f000 f92b bl 8009376 <USBD_CtlSendStatus>
}
}
8009120: bf00 nop
8009122: 3708 adds r7, #8
8009124: 46bd mov sp, r7
8009126: bd80 pop {r7, pc}
08009128 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009128: b580 push {r7, lr}
800912a: b082 sub sp, #8
800912c: af00 add r7, sp, #0
800912e: 6078 str r0, [r7, #4]
8009130: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8009132: 687b ldr r3, [r7, #4]
8009134: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8009138: 3b01 subs r3, #1
800913a: 2b02 cmp r3, #2
800913c: d80b bhi.n 8009156 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800913e: 683b ldr r3, [r7, #0]
8009140: 885b ldrh r3, [r3, #2]
8009142: 2b01 cmp r3, #1
8009144: d10c bne.n 8009160 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
8009146: 687b ldr r3, [r7, #4]
8009148: 2200 movs r2, #0
800914a: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
USBD_CtlSendStatus(pdev);
800914e: 6878 ldr r0, [r7, #4]
8009150: f000 f911 bl 8009376 <USBD_CtlSendStatus>
}
break;
8009154: e004 b.n 8009160 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8009156: 6839 ldr r1, [r7, #0]
8009158: 6878 ldr r0, [r7, #4]
800915a: f000 f843 bl 80091e4 <USBD_CtlError>
break;
800915e: e000 b.n 8009162 <USBD_ClrFeature+0x3a>
break;
8009160: bf00 nop
}
}
8009162: bf00 nop
8009164: 3708 adds r7, #8
8009166: 46bd mov sp, r7
8009168: bd80 pop {r7, pc}
0800916a <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800916a: b480 push {r7}
800916c: b083 sub sp, #12
800916e: af00 add r7, sp, #0
8009170: 6078 str r0, [r7, #4]
8009172: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8009174: 683b ldr r3, [r7, #0]
8009176: 781a ldrb r2, [r3, #0]
8009178: 687b ldr r3, [r7, #4]
800917a: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800917c: 683b ldr r3, [r7, #0]
800917e: 785a ldrb r2, [r3, #1]
8009180: 687b ldr r3, [r7, #4]
8009182: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8009184: 683b ldr r3, [r7, #0]
8009186: 3302 adds r3, #2
8009188: 781b ldrb r3, [r3, #0]
800918a: b29a uxth r2, r3
800918c: 683b ldr r3, [r7, #0]
800918e: 3303 adds r3, #3
8009190: 781b ldrb r3, [r3, #0]
8009192: b29b uxth r3, r3
8009194: 021b lsls r3, r3, #8
8009196: b29b uxth r3, r3
8009198: 4413 add r3, r2
800919a: b29a uxth r2, r3
800919c: 687b ldr r3, [r7, #4]
800919e: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
80091a0: 683b ldr r3, [r7, #0]
80091a2: 3304 adds r3, #4
80091a4: 781b ldrb r3, [r3, #0]
80091a6: b29a uxth r2, r3
80091a8: 683b ldr r3, [r7, #0]
80091aa: 3305 adds r3, #5
80091ac: 781b ldrb r3, [r3, #0]
80091ae: b29b uxth r3, r3
80091b0: 021b lsls r3, r3, #8
80091b2: b29b uxth r3, r3
80091b4: 4413 add r3, r2
80091b6: b29a uxth r2, r3
80091b8: 687b ldr r3, [r7, #4]
80091ba: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
80091bc: 683b ldr r3, [r7, #0]
80091be: 3306 adds r3, #6
80091c0: 781b ldrb r3, [r3, #0]
80091c2: b29a uxth r2, r3
80091c4: 683b ldr r3, [r7, #0]
80091c6: 3307 adds r3, #7
80091c8: 781b ldrb r3, [r3, #0]
80091ca: b29b uxth r3, r3
80091cc: 021b lsls r3, r3, #8
80091ce: b29b uxth r3, r3
80091d0: 4413 add r3, r2
80091d2: b29a uxth r2, r3
80091d4: 687b ldr r3, [r7, #4]
80091d6: 80da strh r2, [r3, #6]
}
80091d8: bf00 nop
80091da: 370c adds r7, #12
80091dc: 46bd mov sp, r7
80091de: f85d 7b04 ldr.w r7, [sp], #4
80091e2: 4770 bx lr
080091e4 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80091e4: b580 push {r7, lr}
80091e6: b082 sub sp, #8
80091e8: af00 add r7, sp, #0
80091ea: 6078 str r0, [r7, #4]
80091ec: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
80091ee: 2180 movs r1, #128 ; 0x80
80091f0: 6878 ldr r0, [r7, #4]
80091f2: f000 fd2f bl 8009c54 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
80091f6: 2100 movs r1, #0
80091f8: 6878 ldr r0, [r7, #4]
80091fa: f000 fd2b bl 8009c54 <USBD_LL_StallEP>
}
80091fe: bf00 nop
8009200: 3708 adds r7, #8
8009202: 46bd mov sp, r7
8009204: bd80 pop {r7, pc}
08009206 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
8009206: b580 push {r7, lr}
8009208: b086 sub sp, #24
800920a: af00 add r7, sp, #0
800920c: 60f8 str r0, [r7, #12]
800920e: 60b9 str r1, [r7, #8]
8009210: 607a str r2, [r7, #4]
uint8_t idx = 0U;
8009212: 2300 movs r3, #0
8009214: 75fb strb r3, [r7, #23]
if (desc != NULL)
8009216: 68fb ldr r3, [r7, #12]
8009218: 2b00 cmp r3, #0
800921a: d032 beq.n 8009282 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800921c: 68f8 ldr r0, [r7, #12]
800921e: f000 f834 bl 800928a <USBD_GetLen>
8009222: 4603 mov r3, r0
8009224: 3301 adds r3, #1
8009226: b29b uxth r3, r3
8009228: 005b lsls r3, r3, #1
800922a: b29a uxth r2, r3
800922c: 687b ldr r3, [r7, #4]
800922e: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
8009230: 7dfb ldrb r3, [r7, #23]
8009232: 1c5a adds r2, r3, #1
8009234: 75fa strb r2, [r7, #23]
8009236: 461a mov r2, r3
8009238: 68bb ldr r3, [r7, #8]
800923a: 4413 add r3, r2
800923c: 687a ldr r2, [r7, #4]
800923e: 7812 ldrb r2, [r2, #0]
8009240: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
8009242: 7dfb ldrb r3, [r7, #23]
8009244: 1c5a adds r2, r3, #1
8009246: 75fa strb r2, [r7, #23]
8009248: 461a mov r2, r3
800924a: 68bb ldr r3, [r7, #8]
800924c: 4413 add r3, r2
800924e: 2203 movs r2, #3
8009250: 701a strb r2, [r3, #0]
while (*desc != '\0')
8009252: e012 b.n 800927a <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
8009254: 68fb ldr r3, [r7, #12]
8009256: 1c5a adds r2, r3, #1
8009258: 60fa str r2, [r7, #12]
800925a: 7dfa ldrb r2, [r7, #23]
800925c: 1c51 adds r1, r2, #1
800925e: 75f9 strb r1, [r7, #23]
8009260: 4611 mov r1, r2
8009262: 68ba ldr r2, [r7, #8]
8009264: 440a add r2, r1
8009266: 781b ldrb r3, [r3, #0]
8009268: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800926a: 7dfb ldrb r3, [r7, #23]
800926c: 1c5a adds r2, r3, #1
800926e: 75fa strb r2, [r7, #23]
8009270: 461a mov r2, r3
8009272: 68bb ldr r3, [r7, #8]
8009274: 4413 add r3, r2
8009276: 2200 movs r2, #0
8009278: 701a strb r2, [r3, #0]
while (*desc != '\0')
800927a: 68fb ldr r3, [r7, #12]
800927c: 781b ldrb r3, [r3, #0]
800927e: 2b00 cmp r3, #0
8009280: d1e8 bne.n 8009254 <USBD_GetString+0x4e>
}
}
}
8009282: bf00 nop
8009284: 3718 adds r7, #24
8009286: 46bd mov sp, r7
8009288: bd80 pop {r7, pc}
0800928a <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800928a: b480 push {r7}
800928c: b085 sub sp, #20
800928e: af00 add r7, sp, #0
8009290: 6078 str r0, [r7, #4]
uint8_t len = 0U;
8009292: 2300 movs r3, #0
8009294: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8009296: e005 b.n 80092a4 <USBD_GetLen+0x1a>
{
len++;
8009298: 7bfb ldrb r3, [r7, #15]
800929a: 3301 adds r3, #1
800929c: 73fb strb r3, [r7, #15]
buf++;
800929e: 687b ldr r3, [r7, #4]
80092a0: 3301 adds r3, #1
80092a2: 607b str r3, [r7, #4]
while (*buf != '\0')
80092a4: 687b ldr r3, [r7, #4]
80092a6: 781b ldrb r3, [r3, #0]
80092a8: 2b00 cmp r3, #0
80092aa: d1f5 bne.n 8009298 <USBD_GetLen+0xe>
}
return len;
80092ac: 7bfb ldrb r3, [r7, #15]
}
80092ae: 4618 mov r0, r3
80092b0: 3714 adds r7, #20
80092b2: 46bd mov sp, r7
80092b4: f85d 7b04 ldr.w r7, [sp], #4
80092b8: 4770 bx lr
080092ba <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80092ba: b580 push {r7, lr}
80092bc: b084 sub sp, #16
80092be: af00 add r7, sp, #0
80092c0: 60f8 str r0, [r7, #12]
80092c2: 60b9 str r1, [r7, #8]
80092c4: 4613 mov r3, r2
80092c6: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
80092c8: 68fb ldr r3, [r7, #12]
80092ca: 2202 movs r2, #2
80092cc: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep_in[0].total_length = len;
80092d0: 88fa ldrh r2, [r7, #6]
80092d2: 68fb ldr r3, [r7, #12]
80092d4: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
80092d6: 88fa ldrh r2, [r7, #6]
80092d8: 68fb ldr r3, [r7, #12]
80092da: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
80092dc: 88fb ldrh r3, [r7, #6]
80092de: 68ba ldr r2, [r7, #8]
80092e0: 2100 movs r1, #0
80092e2: 68f8 ldr r0, [r7, #12]
80092e4: f000 fd40 bl 8009d68 <USBD_LL_Transmit>
return USBD_OK;
80092e8: 2300 movs r3, #0
}
80092ea: 4618 mov r0, r3
80092ec: 3710 adds r7, #16
80092ee: 46bd mov sp, r7
80092f0: bd80 pop {r7, pc}
080092f2 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80092f2: b580 push {r7, lr}
80092f4: b084 sub sp, #16
80092f6: af00 add r7, sp, #0
80092f8: 60f8 str r0, [r7, #12]
80092fa: 60b9 str r1, [r7, #8]
80092fc: 4613 mov r3, r2
80092fe: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009300: 88fb ldrh r3, [r7, #6]
8009302: 68ba ldr r2, [r7, #8]
8009304: 2100 movs r1, #0
8009306: 68f8 ldr r0, [r7, #12]
8009308: f000 fd2e bl 8009d68 <USBD_LL_Transmit>
return USBD_OK;
800930c: 2300 movs r3, #0
}
800930e: 4618 mov r0, r3
8009310: 3710 adds r7, #16
8009312: 46bd mov sp, r7
8009314: bd80 pop {r7, pc}
08009316 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009316: b580 push {r7, lr}
8009318: b084 sub sp, #16
800931a: af00 add r7, sp, #0
800931c: 60f8 str r0, [r7, #12]
800931e: 60b9 str r1, [r7, #8]
8009320: 4613 mov r3, r2
8009322: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
8009324: 68fb ldr r3, [r7, #12]
8009326: 2203 movs r2, #3
8009328: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep_out[0].total_length = len;
800932c: 88fa ldrh r2, [r7, #6]
800932e: 68fb ldr r3, [r7, #12]
8009330: f8c3 215c str.w r2, [r3, #348] ; 0x15c
pdev->ep_out[0].rem_length = len;
8009334: 88fa ldrh r2, [r7, #6]
8009336: 68fb ldr r3, [r7, #12]
8009338: f8c3 2160 str.w r2, [r3, #352] ; 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800933c: 88fb ldrh r3, [r7, #6]
800933e: 68ba ldr r2, [r7, #8]
8009340: 2100 movs r1, #0
8009342: 68f8 ldr r0, [r7, #12]
8009344: f000 fd33 bl 8009dae <USBD_LL_PrepareReceive>
return USBD_OK;
8009348: 2300 movs r3, #0
}
800934a: 4618 mov r0, r3
800934c: 3710 adds r7, #16
800934e: 46bd mov sp, r7
8009350: bd80 pop {r7, pc}
08009352 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009352: b580 push {r7, lr}
8009354: b084 sub sp, #16
8009356: af00 add r7, sp, #0
8009358: 60f8 str r0, [r7, #12]
800935a: 60b9 str r1, [r7, #8]
800935c: 4613 mov r3, r2
800935e: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8009360: 88fb ldrh r3, [r7, #6]
8009362: 68ba ldr r2, [r7, #8]
8009364: 2100 movs r1, #0
8009366: 68f8 ldr r0, [r7, #12]
8009368: f000 fd21 bl 8009dae <USBD_LL_PrepareReceive>
return USBD_OK;
800936c: 2300 movs r3, #0
}
800936e: 4618 mov r0, r3
8009370: 3710 adds r7, #16
8009372: 46bd mov sp, r7
8009374: bd80 pop {r7, pc}
08009376 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
8009376: b580 push {r7, lr}
8009378: b082 sub sp, #8
800937a: af00 add r7, sp, #0
800937c: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800937e: 687b ldr r3, [r7, #4]
8009380: 2204 movs r2, #4
8009382: f8c3 2294 str.w r2, [r3, #660] ; 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
8009386: 2300 movs r3, #0
8009388: 2200 movs r2, #0
800938a: 2100 movs r1, #0
800938c: 6878 ldr r0, [r7, #4]
800938e: f000 fceb bl 8009d68 <USBD_LL_Transmit>
return USBD_OK;
8009392: 2300 movs r3, #0
}
8009394: 4618 mov r0, r3
8009396: 3708 adds r7, #8
8009398: 46bd mov sp, r7
800939a: bd80 pop {r7, pc}
0800939c <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800939c: b580 push {r7, lr}
800939e: b082 sub sp, #8
80093a0: af00 add r7, sp, #0
80093a2: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
80093a4: 687b ldr r3, [r7, #4]
80093a6: 2205 movs r2, #5
80093a8: f8c3 2294 str.w r2, [r3, #660] ; 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80093ac: 2300 movs r3, #0
80093ae: 2200 movs r2, #0
80093b0: 2100 movs r1, #0
80093b2: 6878 ldr r0, [r7, #4]
80093b4: f000 fcfb bl 8009dae <USBD_LL_PrepareReceive>
return USBD_OK;
80093b8: 2300 movs r3, #0
}
80093ba: 4618 mov r0, r3
80093bc: 3708 adds r7, #8
80093be: 46bd mov sp, r7
80093c0: bd80 pop {r7, pc}
...
080093c4 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
80093c4: b580 push {r7, lr}
80093c6: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
80093c8: 2200 movs r2, #0
80093ca: 4912 ldr r1, [pc, #72] ; (8009414 <MX_USB_DEVICE_Init+0x50>)
80093cc: 4812 ldr r0, [pc, #72] ; (8009418 <MX_USB_DEVICE_Init+0x54>)
80093ce: f7fe ff57 bl 8008280 <USBD_Init>
80093d2: 4603 mov r3, r0
80093d4: 2b00 cmp r3, #0
80093d6: d001 beq.n 80093dc <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
80093d8: f7f7 fa44 bl 8000864 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
80093dc: 490f ldr r1, [pc, #60] ; (800941c <MX_USB_DEVICE_Init+0x58>)
80093de: 480e ldr r0, [pc, #56] ; (8009418 <MX_USB_DEVICE_Init+0x54>)
80093e0: f7fe ff79 bl 80082d6 <USBD_RegisterClass>
80093e4: 4603 mov r3, r0
80093e6: 2b00 cmp r3, #0
80093e8: d001 beq.n 80093ee <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
80093ea: f7f7 fa3b bl 8000864 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
80093ee: 490c ldr r1, [pc, #48] ; (8009420 <MX_USB_DEVICE_Init+0x5c>)
80093f0: 4809 ldr r0, [pc, #36] ; (8009418 <MX_USB_DEVICE_Init+0x54>)
80093f2: f7fe fea7 bl 8008144 <USBD_CDC_RegisterInterface>
80093f6: 4603 mov r3, r0
80093f8: 2b00 cmp r3, #0
80093fa: d001 beq.n 8009400 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
80093fc: f7f7 fa32 bl 8000864 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
8009400: 4805 ldr r0, [pc, #20] ; (8009418 <MX_USB_DEVICE_Init+0x54>)
8009402: f7fe ff82 bl 800830a <USBD_Start>
8009406: 4603 mov r3, r0
8009408: 2b00 cmp r3, #0
800940a: d001 beq.n 8009410 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800940c: f7f7 fa2a bl 8000864 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
8009410: bf00 nop
8009412: bd80 pop {r7, pc}
8009414: 2000012c .word 0x2000012c
8009418: 200003ac .word 0x200003ac
800941c: 20000018 .word 0x20000018
8009420: 2000011c .word 0x2000011c
08009424 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
8009424: b580 push {r7, lr}
8009426: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
8009428: 2200 movs r2, #0
800942a: 4908 ldr r1, [pc, #32] ; (800944c <CDC_Init_FS+0x28>)
800942c: 4808 ldr r0, [pc, #32] ; (8009450 <CDC_Init_FS+0x2c>)
800942e: f7fe fea0 bl 8008172 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
8009432: 4908 ldr r1, [pc, #32] ; (8009454 <CDC_Init_FS+0x30>)
8009434: 4806 ldr r0, [pc, #24] ; (8009450 <CDC_Init_FS+0x2c>)
8009436: f7fe feb6 bl 80081a6 <USBD_CDC_SetRxBuffer>
usb_cdc_init_cmplt = 1;
800943a: 4b07 ldr r3, [pc, #28] ; (8009458 <CDC_Init_FS+0x34>)
800943c: 2201 movs r2, #1
800943e: 701a strb r2, [r3, #0]
usb_rx_available = 0;
8009440: 4b06 ldr r3, [pc, #24] ; (800945c <CDC_Init_FS+0x38>)
8009442: 2200 movs r2, #0
8009444: 601a str r2, [r3, #0]
return (USBD_OK);
8009446: 2300 movs r3, #0
/* USER CODE END 3 */
}
8009448: 4618 mov r0, r3
800944a: bd80 pop {r7, pc}
800944c: 20000a70 .word 0x20000a70
8009450: 200003ac .word 0x200003ac
8009454: 20000670 .word 0x20000670
8009458: 20000e77 .word 0x20000e77
800945c: 20000e7c .word 0x20000e7c
08009460 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
8009460: b480 push {r7}
8009462: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
usb_cdc_init_cmplt = 0;
8009464: 4b04 ldr r3, [pc, #16] ; (8009478 <CDC_DeInit_FS+0x18>)
8009466: 2200 movs r2, #0
8009468: 701a strb r2, [r3, #0]
return (USBD_OK);
800946a: 2300 movs r3, #0
/* USER CODE END 4 */
}
800946c: 4618 mov r0, r3
800946e: 46bd mov sp, r7
8009470: f85d 7b04 ldr.w r7, [sp], #4
8009474: 4770 bx lr
8009476: bf00 nop
8009478: 20000e77 .word 0x20000e77
0800947c <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800947c: b480 push {r7}
800947e: b083 sub sp, #12
8009480: af00 add r7, sp, #0
8009482: 4603 mov r3, r0
8009484: 6039 str r1, [r7, #0]
8009486: 71fb strb r3, [r7, #7]
8009488: 4613 mov r3, r2
800948a: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800948c: 79fb ldrb r3, [r7, #7]
800948e: 2b23 cmp r3, #35 ; 0x23
8009490: f200 808c bhi.w 80095ac <CDC_Control_FS+0x130>
8009494: a201 add r2, pc, #4 ; (adr r2, 800949c <CDC_Control_FS+0x20>)
8009496: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800949a: bf00 nop
800949c: 080095ad .word 0x080095ad
80094a0: 080095ad .word 0x080095ad
80094a4: 080095ad .word 0x080095ad
80094a8: 080095ad .word 0x080095ad
80094ac: 080095ad .word 0x080095ad
80094b0: 080095ad .word 0x080095ad
80094b4: 080095ad .word 0x080095ad
80094b8: 080095ad .word 0x080095ad
80094bc: 080095ad .word 0x080095ad
80094c0: 080095ad .word 0x080095ad
80094c4: 080095ad .word 0x080095ad
80094c8: 080095ad .word 0x080095ad
80094cc: 080095ad .word 0x080095ad
80094d0: 080095ad .word 0x080095ad
80094d4: 080095ad .word 0x080095ad
80094d8: 080095ad .word 0x080095ad
80094dc: 080095ad .word 0x080095ad
80094e0: 080095ad .word 0x080095ad
80094e4: 080095ad .word 0x080095ad
80094e8: 080095ad .word 0x080095ad
80094ec: 080095ad .word 0x080095ad
80094f0: 080095ad .word 0x080095ad
80094f4: 080095ad .word 0x080095ad
80094f8: 080095ad .word 0x080095ad
80094fc: 080095ad .word 0x080095ad
8009500: 080095ad .word 0x080095ad
8009504: 080095ad .word 0x080095ad
8009508: 080095ad .word 0x080095ad
800950c: 080095ad .word 0x080095ad
8009510: 080095ad .word 0x080095ad
8009514: 080095ad .word 0x080095ad
8009518: 080095ad .word 0x080095ad
800951c: 0800952d .word 0x0800952d
8009520: 08009567 .word 0x08009567
8009524: 080095ad .word 0x080095ad
8009528: 080095ad .word 0x080095ad
/* 3 - Mark */
/* 4 - Space */
/* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */
/*******************************************************************************/
case CDC_SET_LINE_CODING:
LineCodingBuffer[0] = pbuf[0];
800952c: 683b ldr r3, [r7, #0]
800952e: 781a ldrb r2, [r3, #0]
8009530: 4b22 ldr r3, [pc, #136] ; (80095bc <CDC_Control_FS+0x140>)
8009532: 701a strb r2, [r3, #0]
LineCodingBuffer[1] = pbuf[1];
8009534: 683b ldr r3, [r7, #0]
8009536: 785a ldrb r2, [r3, #1]
8009538: 4b20 ldr r3, [pc, #128] ; (80095bc <CDC_Control_FS+0x140>)
800953a: 705a strb r2, [r3, #1]
LineCodingBuffer[2] = pbuf[2];
800953c: 683b ldr r3, [r7, #0]
800953e: 789a ldrb r2, [r3, #2]
8009540: 4b1e ldr r3, [pc, #120] ; (80095bc <CDC_Control_FS+0x140>)
8009542: 709a strb r2, [r3, #2]
LineCodingBuffer[3] = pbuf[3];
8009544: 683b ldr r3, [r7, #0]
8009546: 78da ldrb r2, [r3, #3]
8009548: 4b1c ldr r3, [pc, #112] ; (80095bc <CDC_Control_FS+0x140>)
800954a: 70da strb r2, [r3, #3]
LineCodingBuffer[4] = pbuf[4];
800954c: 683b ldr r3, [r7, #0]
800954e: 791a ldrb r2, [r3, #4]
8009550: 4b1a ldr r3, [pc, #104] ; (80095bc <CDC_Control_FS+0x140>)
8009552: 711a strb r2, [r3, #4]
LineCodingBuffer[5] = pbuf[5];
8009554: 683b ldr r3, [r7, #0]
8009556: 795a ldrb r2, [r3, #5]
8009558: 4b18 ldr r3, [pc, #96] ; (80095bc <CDC_Control_FS+0x140>)
800955a: 715a strb r2, [r3, #5]
LineCodingBuffer[6] = pbuf[6];
800955c: 683b ldr r3, [r7, #0]
800955e: 799a ldrb r2, [r3, #6]
8009560: 4b16 ldr r3, [pc, #88] ; (80095bc <CDC_Control_FS+0x140>)
8009562: 719a strb r2, [r3, #6]
break;
8009564: e023 b.n 80095ae <CDC_Control_FS+0x132>
case CDC_GET_LINE_CODING:
pbuf[0] = LineCodingBuffer[0];
8009566: 4b15 ldr r3, [pc, #84] ; (80095bc <CDC_Control_FS+0x140>)
8009568: 781a ldrb r2, [r3, #0]
800956a: 683b ldr r3, [r7, #0]
800956c: 701a strb r2, [r3, #0]
pbuf[1] = LineCodingBuffer[1];
800956e: 683b ldr r3, [r7, #0]
8009570: 3301 adds r3, #1
8009572: 4a12 ldr r2, [pc, #72] ; (80095bc <CDC_Control_FS+0x140>)
8009574: 7852 ldrb r2, [r2, #1]
8009576: 701a strb r2, [r3, #0]
pbuf[2] = LineCodingBuffer[2];
8009578: 683b ldr r3, [r7, #0]
800957a: 3302 adds r3, #2
800957c: 4a0f ldr r2, [pc, #60] ; (80095bc <CDC_Control_FS+0x140>)
800957e: 7892 ldrb r2, [r2, #2]
8009580: 701a strb r2, [r3, #0]
pbuf[3] = LineCodingBuffer[3];
8009582: 683b ldr r3, [r7, #0]
8009584: 3303 adds r3, #3
8009586: 4a0d ldr r2, [pc, #52] ; (80095bc <CDC_Control_FS+0x140>)
8009588: 78d2 ldrb r2, [r2, #3]
800958a: 701a strb r2, [r3, #0]
pbuf[4] = LineCodingBuffer[4];
800958c: 683b ldr r3, [r7, #0]
800958e: 3304 adds r3, #4
8009590: 4a0a ldr r2, [pc, #40] ; (80095bc <CDC_Control_FS+0x140>)
8009592: 7912 ldrb r2, [r2, #4]
8009594: 701a strb r2, [r3, #0]
pbuf[5] = LineCodingBuffer[5];
8009596: 683b ldr r3, [r7, #0]
8009598: 3305 adds r3, #5
800959a: 4a08 ldr r2, [pc, #32] ; (80095bc <CDC_Control_FS+0x140>)
800959c: 7952 ldrb r2, [r2, #5]
800959e: 701a strb r2, [r3, #0]
pbuf[6] = LineCodingBuffer[6];
80095a0: 683b ldr r3, [r7, #0]
80095a2: 3306 adds r3, #6
80095a4: 4a05 ldr r2, [pc, #20] ; (80095bc <CDC_Control_FS+0x140>)
80095a6: 7992 ldrb r2, [r2, #6]
80095a8: 701a strb r2, [r3, #0]
break;
80095aa: e000 b.n 80095ae <CDC_Control_FS+0x132>
case CDC_SEND_BREAK:
break;
default:
break;
80095ac: bf00 nop
}
return (USBD_OK);
80095ae: 2300 movs r3, #0
/* USER CODE END 5 */
}
80095b0: 4618 mov r0, r3
80095b2: 370c adds r7, #12
80095b4: 46bd mov sp, r7
80095b6: f85d 7b04 ldr.w r7, [sp], #4
80095ba: 4770 bx lr
80095bc: 20000e70 .word 0x20000e70
080095c0 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
80095c0: b580 push {r7, lr}
80095c2: b082 sub sp, #8
80095c4: af00 add r7, sp, #0
80095c6: 6078 str r0, [r7, #4]
80095c8: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if(usb_rx_available != 0)
80095ca: 4b11 ldr r3, [pc, #68] ; (8009610 <CDC_Receive_FS+0x50>)
80095cc: 681b ldr r3, [r3, #0]
80095ce: 2b00 cmp r3, #0
80095d0: d002 beq.n 80095d8 <CDC_Receive_FS+0x18>
{
usb_rx_overflow = 1;
80095d2: 4b10 ldr r3, [pc, #64] ; (8009614 <CDC_Receive_FS+0x54>)
80095d4: 2201 movs r2, #1
80095d6: 701a strb r2, [r3, #0]
}
usb_rx_available = *Len;
80095d8: 683b ldr r3, [r7, #0]
80095da: 681b ldr r3, [r3, #0]
80095dc: 4a0c ldr r2, [pc, #48] ; (8009610 <CDC_Receive_FS+0x50>)
80095de: 6013 str r3, [r2, #0]
if(usb_rx_available < 256)
80095e0: 4b0b ldr r3, [pc, #44] ; (8009610 <CDC_Receive_FS+0x50>)
80095e2: 681b ldr r3, [r3, #0]
80095e4: 2bff cmp r3, #255 ; 0xff
80095e6: d806 bhi.n 80095f6 <CDC_Receive_FS+0x36>
{
memcpy(UsbRxBufferFS, UserRxBufferFS, usb_rx_available);
80095e8: 4b09 ldr r3, [pc, #36] ; (8009610 <CDC_Receive_FS+0x50>)
80095ea: 681b ldr r3, [r3, #0]
80095ec: 461a mov r2, r3
80095ee: 490a ldr r1, [pc, #40] ; (8009618 <CDC_Receive_FS+0x58>)
80095f0: 480a ldr r0, [pc, #40] ; (800961c <CDC_Receive_FS+0x5c>)
80095f2: f000 fc87 bl 8009f04 <memcpy>
}
USBD_CDC_SetRxBuffer(&hUsbDeviceFS,UserRxBufferFS);
80095f6: 4908 ldr r1, [pc, #32] ; (8009618 <CDC_Receive_FS+0x58>)
80095f8: 4809 ldr r0, [pc, #36] ; (8009620 <CDC_Receive_FS+0x60>)
80095fa: f7fe fdd4 bl 80081a6 <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
80095fe: 4808 ldr r0, [pc, #32] ; (8009620 <CDC_Receive_FS+0x60>)
8009600: f7fe fe14 bl 800822c <USBD_CDC_ReceivePacket>
return (USBD_OK);
8009604: 2300 movs r3, #0
/* USER CODE END 6 */
}
8009606: 4618 mov r0, r3
8009608: 3708 adds r7, #8
800960a: 46bd mov sp, r7
800960c: bd80 pop {r7, pc}
800960e: bf00 nop
8009610: 20000e7c .word 0x20000e7c
8009614: 20000e78 .word 0x20000e78
8009618: 20000670 .word 0x20000670
800961c: 200002a0 .word 0x200002a0
8009620: 200003ac .word 0x200003ac
08009624 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
8009624: b580 push {r7, lr}
8009626: b084 sub sp, #16
8009628: af00 add r7, sp, #0
800962a: 6078 str r0, [r7, #4]
800962c: 460b mov r3, r1
800962e: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
8009630: 2300 movs r3, #0
8009632: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
TxBusyFlag = 0;
8009634: 4b0e ldr r3, [pc, #56] ; (8009670 <CDC_Transmit_FS+0x4c>)
8009636: 2200 movs r2, #0
8009638: 701a strb r2, [r3, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800963a: 4b0e ldr r3, [pc, #56] ; (8009674 <CDC_Transmit_FS+0x50>)
800963c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8009640: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
8009642: 68bb ldr r3, [r7, #8]
8009644: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
8009648: 2b00 cmp r3, #0
800964a: d001 beq.n 8009650 <CDC_Transmit_FS+0x2c>
return USBD_BUSY;
800964c: 2301 movs r3, #1
800964e: e00b b.n 8009668 <CDC_Transmit_FS+0x44>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
8009650: 887b ldrh r3, [r7, #2]
8009652: 461a mov r2, r3
8009654: 6879 ldr r1, [r7, #4]
8009656: 4807 ldr r0, [pc, #28] ; (8009674 <CDC_Transmit_FS+0x50>)
8009658: f7fe fd8b bl 8008172 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800965c: 4805 ldr r0, [pc, #20] ; (8009674 <CDC_Transmit_FS+0x50>)
800965e: f7fe fdb6 bl 80081ce <USBD_CDC_TransmitPacket>
8009662: 4603 mov r3, r0
8009664: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
8009666: 7bfb ldrb r3, [r7, #15]
}
8009668: 4618 mov r0, r3
800966a: 3710 adds r7, #16
800966c: 46bd mov sp, r7
800966e: bd80 pop {r7, pc}
8009670: 20000e80 .word 0x20000e80
8009674: 200003ac .word 0x200003ac
08009678 <VCOM_Transmit>:
txbuf = UserTxBufferFS;
rxbuf = UserRxBufferFS;
}
uint8_t VCOM_Transmit(uint8_t* TxBuf,uint16_t Len)
{
8009678: b580 push {r7, lr}
800967a: b082 sub sp, #8
800967c: af00 add r7, sp, #0
800967e: 6078 str r0, [r7, #4]
8009680: 460b mov r3, r1
8009682: 807b strh r3, [r7, #2]
TxBusyFlag = 1;
8009684: 4b15 ldr r3, [pc, #84] ; (80096dc <VCOM_Transmit+0x64>)
8009686: 2201 movs r2, #1
8009688: 701a strb r2, [r3, #0]
while(CDC_Transmit_FS(TxBuf,Len) != USBD_OK);
800968a: bf00 nop
800968c: 887b ldrh r3, [r7, #2]
800968e: 4619 mov r1, r3
8009690: 6878 ldr r0, [r7, #4]
8009692: f7ff ffc7 bl 8009624 <CDC_Transmit_FS>
8009696: 4603 mov r3, r0
8009698: 2b00 cmp r3, #0
800969a: d1f7 bne.n 800968c <VCOM_Transmit+0x14>
while(TxBusyFlag == 1);
800969c: bf00 nop
800969e: 4b0f ldr r3, [pc, #60] ; (80096dc <VCOM_Transmit+0x64>)
80096a0: 781b ldrb r3, [r3, #0]
80096a2: 2b01 cmp r3, #1
80096a4: d0fb beq.n 800969e <VCOM_Transmit+0x26>
if(Len%64 == 0)
80096a6: 887b ldrh r3, [r7, #2]
80096a8: f003 033f and.w r3, r3, #63 ; 0x3f
80096ac: b29b uxth r3, r3
80096ae: 2b00 cmp r3, #0
80096b0: d10f bne.n 80096d2 <VCOM_Transmit+0x5a>
{
TxBusyFlag = 1;
80096b2: 4b0a ldr r3, [pc, #40] ; (80096dc <VCOM_Transmit+0x64>)
80096b4: 2201 movs r2, #1
80096b6: 701a strb r2, [r3, #0]
while(CDC_Transmit_FS(TxBuf,0) != USBD_OK);
80096b8: bf00 nop
80096ba: 2100 movs r1, #0
80096bc: 6878 ldr r0, [r7, #4]
80096be: f7ff ffb1 bl 8009624 <CDC_Transmit_FS>
80096c2: 4603 mov r3, r0
80096c4: 2b00 cmp r3, #0
80096c6: d1f8 bne.n 80096ba <VCOM_Transmit+0x42>
while(TxBusyFlag == 1);
80096c8: bf00 nop
80096ca: 4b04 ldr r3, [pc, #16] ; (80096dc <VCOM_Transmit+0x64>)
80096cc: 781b ldrb r3, [r3, #0]
80096ce: 2b01 cmp r3, #1
80096d0: d0fb beq.n 80096ca <VCOM_Transmit+0x52>
}
return 1;
80096d2: 2301 movs r3, #1
}
80096d4: 4618 mov r0, r3
80096d6: 3708 adds r7, #8
80096d8: 46bd mov sp, r7
80096da: bd80 pop {r7, pc}
80096dc: 20000e80 .word 0x20000e80
080096e0 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80096e0: b480 push {r7}
80096e2: b083 sub sp, #12
80096e4: af00 add r7, sp, #0
80096e6: 4603 mov r3, r0
80096e8: 6039 str r1, [r7, #0]
80096ea: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
80096ec: 683b ldr r3, [r7, #0]
80096ee: 2212 movs r2, #18
80096f0: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
80096f2: 4b03 ldr r3, [pc, #12] ; (8009700 <USBD_FS_DeviceDescriptor+0x20>)
}
80096f4: 4618 mov r0, r3
80096f6: 370c adds r7, #12
80096f8: 46bd mov sp, r7
80096fa: f85d 7b04 ldr.w r7, [sp], #4
80096fe: 4770 bx lr
8009700: 20000148 .word 0x20000148
08009704 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009704: b480 push {r7}
8009706: b083 sub sp, #12
8009708: af00 add r7, sp, #0
800970a: 4603 mov r3, r0
800970c: 6039 str r1, [r7, #0]
800970e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8009710: 683b ldr r3, [r7, #0]
8009712: 2204 movs r2, #4
8009714: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8009716: 4b03 ldr r3, [pc, #12] ; (8009724 <USBD_FS_LangIDStrDescriptor+0x20>)
}
8009718: 4618 mov r0, r3
800971a: 370c adds r7, #12
800971c: 46bd mov sp, r7
800971e: f85d 7b04 ldr.w r7, [sp], #4
8009722: 4770 bx lr
8009724: 2000015c .word 0x2000015c
08009728 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009728: b580 push {r7, lr}
800972a: b082 sub sp, #8
800972c: af00 add r7, sp, #0
800972e: 4603 mov r3, r0
8009730: 6039 str r1, [r7, #0]
8009732: 71fb strb r3, [r7, #7]
if(speed == 0)
8009734: 79fb ldrb r3, [r7, #7]
8009736: 2b00 cmp r3, #0
8009738: d105 bne.n 8009746 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800973a: 683a ldr r2, [r7, #0]
800973c: 4907 ldr r1, [pc, #28] ; (800975c <USBD_FS_ProductStrDescriptor+0x34>)
800973e: 4808 ldr r0, [pc, #32] ; (8009760 <USBD_FS_ProductStrDescriptor+0x38>)
8009740: f7ff fd61 bl 8009206 <USBD_GetString>
8009744: e004 b.n 8009750 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009746: 683a ldr r2, [r7, #0]
8009748: 4904 ldr r1, [pc, #16] ; (800975c <USBD_FS_ProductStrDescriptor+0x34>)
800974a: 4805 ldr r0, [pc, #20] ; (8009760 <USBD_FS_ProductStrDescriptor+0x38>)
800974c: f7ff fd5b bl 8009206 <USBD_GetString>
}
return USBD_StrDesc;
8009750: 4b02 ldr r3, [pc, #8] ; (800975c <USBD_FS_ProductStrDescriptor+0x34>)
}
8009752: 4618 mov r0, r3
8009754: 3708 adds r7, #8
8009756: 46bd mov sp, r7
8009758: bd80 pop {r7, pc}
800975a: bf00 nop
800975c: 20000e84 .word 0x20000e84
8009760: 08009f48 .word 0x08009f48
08009764 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009764: b580 push {r7, lr}
8009766: b082 sub sp, #8
8009768: af00 add r7, sp, #0
800976a: 4603 mov r3, r0
800976c: 6039 str r1, [r7, #0]
800976e: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
8009770: 683a ldr r2, [r7, #0]
8009772: 4904 ldr r1, [pc, #16] ; (8009784 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8009774: 4804 ldr r0, [pc, #16] ; (8009788 <USBD_FS_ManufacturerStrDescriptor+0x24>)
8009776: f7ff fd46 bl 8009206 <USBD_GetString>
return USBD_StrDesc;
800977a: 4b02 ldr r3, [pc, #8] ; (8009784 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800977c: 4618 mov r0, r3
800977e: 3708 adds r7, #8
8009780: 46bd mov sp, r7
8009782: bd80 pop {r7, pc}
8009784: 20000e84 .word 0x20000e84
8009788: 08009f60 .word 0x08009f60
0800978c <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800978c: b580 push {r7, lr}
800978e: b082 sub sp, #8
8009790: af00 add r7, sp, #0
8009792: 4603 mov r3, r0
8009794: 6039 str r1, [r7, #0]
8009796: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8009798: 683b ldr r3, [r7, #0]
800979a: 221a movs r2, #26
800979c: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800979e: f000 f843 bl 8009828 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
80097a2: 4b02 ldr r3, [pc, #8] ; (80097ac <USBD_FS_SerialStrDescriptor+0x20>)
}
80097a4: 4618 mov r0, r3
80097a6: 3708 adds r7, #8
80097a8: 46bd mov sp, r7
80097aa: bd80 pop {r7, pc}
80097ac: 20000160 .word 0x20000160
080097b0 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80097b0: b580 push {r7, lr}
80097b2: b082 sub sp, #8
80097b4: af00 add r7, sp, #0
80097b6: 4603 mov r3, r0
80097b8: 6039 str r1, [r7, #0]
80097ba: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
80097bc: 79fb ldrb r3, [r7, #7]
80097be: 2b00 cmp r3, #0
80097c0: d105 bne.n 80097ce <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
80097c2: 683a ldr r2, [r7, #0]
80097c4: 4907 ldr r1, [pc, #28] ; (80097e4 <USBD_FS_ConfigStrDescriptor+0x34>)
80097c6: 4808 ldr r0, [pc, #32] ; (80097e8 <USBD_FS_ConfigStrDescriptor+0x38>)
80097c8: f7ff fd1d bl 8009206 <USBD_GetString>
80097cc: e004 b.n 80097d8 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
80097ce: 683a ldr r2, [r7, #0]
80097d0: 4904 ldr r1, [pc, #16] ; (80097e4 <USBD_FS_ConfigStrDescriptor+0x34>)
80097d2: 4805 ldr r0, [pc, #20] ; (80097e8 <USBD_FS_ConfigStrDescriptor+0x38>)
80097d4: f7ff fd17 bl 8009206 <USBD_GetString>
}
return USBD_StrDesc;
80097d8: 4b02 ldr r3, [pc, #8] ; (80097e4 <USBD_FS_ConfigStrDescriptor+0x34>)
}
80097da: 4618 mov r0, r3
80097dc: 3708 adds r7, #8
80097de: 46bd mov sp, r7
80097e0: bd80 pop {r7, pc}
80097e2: bf00 nop
80097e4: 20000e84 .word 0x20000e84
80097e8: 08009f74 .word 0x08009f74
080097ec <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80097ec: b580 push {r7, lr}
80097ee: b082 sub sp, #8
80097f0: af00 add r7, sp, #0
80097f2: 4603 mov r3, r0
80097f4: 6039 str r1, [r7, #0]
80097f6: 71fb strb r3, [r7, #7]
if(speed == 0)
80097f8: 79fb ldrb r3, [r7, #7]
80097fa: 2b00 cmp r3, #0
80097fc: d105 bne.n 800980a <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80097fe: 683a ldr r2, [r7, #0]
8009800: 4907 ldr r1, [pc, #28] ; (8009820 <USBD_FS_InterfaceStrDescriptor+0x34>)
8009802: 4808 ldr r0, [pc, #32] ; (8009824 <USBD_FS_InterfaceStrDescriptor+0x38>)
8009804: f7ff fcff bl 8009206 <USBD_GetString>
8009808: e004 b.n 8009814 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800980a: 683a ldr r2, [r7, #0]
800980c: 4904 ldr r1, [pc, #16] ; (8009820 <USBD_FS_InterfaceStrDescriptor+0x34>)
800980e: 4805 ldr r0, [pc, #20] ; (8009824 <USBD_FS_InterfaceStrDescriptor+0x38>)
8009810: f7ff fcf9 bl 8009206 <USBD_GetString>
}
return USBD_StrDesc;
8009814: 4b02 ldr r3, [pc, #8] ; (8009820 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
8009816: 4618 mov r0, r3
8009818: 3708 adds r7, #8
800981a: 46bd mov sp, r7
800981c: bd80 pop {r7, pc}
800981e: bf00 nop
8009820: 20000e84 .word 0x20000e84
8009824: 08009f80 .word 0x08009f80
08009828 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
8009828: b580 push {r7, lr}
800982a: b084 sub sp, #16
800982c: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800982e: 4b0f ldr r3, [pc, #60] ; (800986c <Get_SerialNum+0x44>)
8009830: 681b ldr r3, [r3, #0]
8009832: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
8009834: 4b0e ldr r3, [pc, #56] ; (8009870 <Get_SerialNum+0x48>)
8009836: 681b ldr r3, [r3, #0]
8009838: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800983a: 4b0e ldr r3, [pc, #56] ; (8009874 <Get_SerialNum+0x4c>)
800983c: 681b ldr r3, [r3, #0]
800983e: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
8009840: 68fa ldr r2, [r7, #12]
8009842: 687b ldr r3, [r7, #4]
8009844: 4413 add r3, r2
8009846: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
8009848: 68fb ldr r3, [r7, #12]
800984a: 2b00 cmp r3, #0
800984c: d009 beq.n 8009862 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800984e: 2208 movs r2, #8
8009850: 4909 ldr r1, [pc, #36] ; (8009878 <Get_SerialNum+0x50>)
8009852: 68f8 ldr r0, [r7, #12]
8009854: f000 f814 bl 8009880 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
8009858: 2204 movs r2, #4
800985a: 4908 ldr r1, [pc, #32] ; (800987c <Get_SerialNum+0x54>)
800985c: 68b8 ldr r0, [r7, #8]
800985e: f000 f80f bl 8009880 <IntToUnicode>
}
}
8009862: bf00 nop
8009864: 3710 adds r7, #16
8009866: 46bd mov sp, r7
8009868: bd80 pop {r7, pc}
800986a: bf00 nop
800986c: 1ffff7ac .word 0x1ffff7ac
8009870: 1ffff7b0 .word 0x1ffff7b0
8009874: 1ffff7b4 .word 0x1ffff7b4
8009878: 20000162 .word 0x20000162
800987c: 20000172 .word 0x20000172
08009880 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8009880: b480 push {r7}
8009882: b087 sub sp, #28
8009884: af00 add r7, sp, #0
8009886: 60f8 str r0, [r7, #12]
8009888: 60b9 str r1, [r7, #8]
800988a: 4613 mov r3, r2
800988c: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800988e: 2300 movs r3, #0
8009890: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
8009892: 2300 movs r3, #0
8009894: 75fb strb r3, [r7, #23]
8009896: e027 b.n 80098e8 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
8009898: 68fb ldr r3, [r7, #12]
800989a: 0f1b lsrs r3, r3, #28
800989c: 2b09 cmp r3, #9
800989e: d80b bhi.n 80098b8 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
80098a0: 68fb ldr r3, [r7, #12]
80098a2: 0f1b lsrs r3, r3, #28
80098a4: b2da uxtb r2, r3
80098a6: 7dfb ldrb r3, [r7, #23]
80098a8: 005b lsls r3, r3, #1
80098aa: 4619 mov r1, r3
80098ac: 68bb ldr r3, [r7, #8]
80098ae: 440b add r3, r1
80098b0: 3230 adds r2, #48 ; 0x30
80098b2: b2d2 uxtb r2, r2
80098b4: 701a strb r2, [r3, #0]
80098b6: e00a b.n 80098ce <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
80098b8: 68fb ldr r3, [r7, #12]
80098ba: 0f1b lsrs r3, r3, #28
80098bc: b2da uxtb r2, r3
80098be: 7dfb ldrb r3, [r7, #23]
80098c0: 005b lsls r3, r3, #1
80098c2: 4619 mov r1, r3
80098c4: 68bb ldr r3, [r7, #8]
80098c6: 440b add r3, r1
80098c8: 3237 adds r2, #55 ; 0x37
80098ca: b2d2 uxtb r2, r2
80098cc: 701a strb r2, [r3, #0]
}
value = value << 4;
80098ce: 68fb ldr r3, [r7, #12]
80098d0: 011b lsls r3, r3, #4
80098d2: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
80098d4: 7dfb ldrb r3, [r7, #23]
80098d6: 005b lsls r3, r3, #1
80098d8: 3301 adds r3, #1
80098da: 68ba ldr r2, [r7, #8]
80098dc: 4413 add r3, r2
80098de: 2200 movs r2, #0
80098e0: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
80098e2: 7dfb ldrb r3, [r7, #23]
80098e4: 3301 adds r3, #1
80098e6: 75fb strb r3, [r7, #23]
80098e8: 7dfa ldrb r2, [r7, #23]
80098ea: 79fb ldrb r3, [r7, #7]
80098ec: 429a cmp r2, r3
80098ee: d3d3 bcc.n 8009898 <IntToUnicode+0x18>
}
}
80098f0: bf00 nop
80098f2: bf00 nop
80098f4: 371c adds r7, #28
80098f6: 46bd mov sp, r7
80098f8: f85d 7b04 ldr.w r7, [sp], #4
80098fc: 4770 bx lr
...
08009900 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
8009900: b580 push {r7, lr}
8009902: b08a sub sp, #40 ; 0x28
8009904: af00 add r7, sp, #0
8009906: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8009908: f107 0314 add.w r3, r7, #20
800990c: 2200 movs r2, #0
800990e: 601a str r2, [r3, #0]
8009910: 605a str r2, [r3, #4]
8009912: 609a str r2, [r3, #8]
8009914: 60da str r2, [r3, #12]
8009916: 611a str r2, [r3, #16]
if(pcdHandle->Instance==USB)
8009918: 687b ldr r3, [r7, #4]
800991a: 681b ldr r3, [r3, #0]
800991c: 4a20 ldr r2, [pc, #128] ; (80099a0 <HAL_PCD_MspInit+0xa0>)
800991e: 4293 cmp r3, r2
8009920: d139 bne.n 8009996 <HAL_PCD_MspInit+0x96>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8009922: 4b20 ldr r3, [pc, #128] ; (80099a4 <HAL_PCD_MspInit+0xa4>)
8009924: 695b ldr r3, [r3, #20]
8009926: 4a1f ldr r2, [pc, #124] ; (80099a4 <HAL_PCD_MspInit+0xa4>)
8009928: f443 3300 orr.w r3, r3, #131072 ; 0x20000
800992c: 6153 str r3, [r2, #20]
800992e: 4b1d ldr r3, [pc, #116] ; (80099a4 <HAL_PCD_MspInit+0xa4>)
8009930: 695b ldr r3, [r3, #20]
8009932: f403 3300 and.w r3, r3, #131072 ; 0x20000
8009936: 613b str r3, [r7, #16]
8009938: 693b ldr r3, [r7, #16]
/**USB GPIO Configuration
PA11 ------> USB_DM
PA12 ------> USB_DP
*/
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
800993a: f44f 53c0 mov.w r3, #6144 ; 0x1800
800993e: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8009940: 2302 movs r3, #2
8009942: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8009944: 2300 movs r3, #0
8009946: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8009948: 2303 movs r3, #3
800994a: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF14_USB;
800994c: 230e movs r3, #14
800994e: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8009950: f107 0314 add.w r3, r7, #20
8009954: 4619 mov r1, r3
8009956: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
800995a: f7f7 ffd5 bl 8001908 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800995e: 4b11 ldr r3, [pc, #68] ; (80099a4 <HAL_PCD_MspInit+0xa4>)
8009960: 69db ldr r3, [r3, #28]
8009962: 4a10 ldr r2, [pc, #64] ; (80099a4 <HAL_PCD_MspInit+0xa4>)
8009964: f443 0300 orr.w r3, r3, #8388608 ; 0x800000
8009968: 61d3 str r3, [r2, #28]
800996a: 4b0e ldr r3, [pc, #56] ; (80099a4 <HAL_PCD_MspInit+0xa4>)
800996c: 69db ldr r3, [r3, #28]
800996e: f403 0300 and.w r3, r3, #8388608 ; 0x800000
8009972: 60fb str r3, [r7, #12]
8009974: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_HP_CAN_TX_IRQn, 0, 0);
8009976: 2200 movs r2, #0
8009978: 2100 movs r1, #0
800997a: 2013 movs r0, #19
800997c: f7f7 ff8d bl 800189a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn);
8009980: 2013 movs r0, #19
8009982: f7f7 ffa6 bl 80018d2 <HAL_NVIC_EnableIRQ>
HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0);
8009986: 2200 movs r2, #0
8009988: 2100 movs r1, #0
800998a: 2014 movs r0, #20
800998c: f7f7 ff85 bl 800189a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
8009990: 2014 movs r0, #20
8009992: f7f7 ff9e bl 80018d2 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
8009996: bf00 nop
8009998: 3728 adds r7, #40 ; 0x28
800999a: 46bd mov sp, r7
800999c: bd80 pop {r7, pc}
800999e: bf00 nop
80099a0: 40005c00 .word 0x40005c00
80099a4: 40021000 .word 0x40021000
080099a8 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80099a8: b580 push {r7, lr}
80099aa: b082 sub sp, #8
80099ac: af00 add r7, sp, #0
80099ae: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
80099b0: 687b ldr r3, [r7, #4]
80099b2: f8d3 22e8 ldr.w r2, [r3, #744] ; 0x2e8
80099b6: 687b ldr r3, [r7, #4]
80099b8: f503 732c add.w r3, r3, #688 ; 0x2b0
80099bc: 4619 mov r1, r3
80099be: 4610 mov r0, r2
80099c0: f7fe fcec bl 800839c <USBD_LL_SetupStage>
}
80099c4: bf00 nop
80099c6: 3708 adds r7, #8
80099c8: 46bd mov sp, r7
80099ca: bd80 pop {r7, pc}
080099cc <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80099cc: b580 push {r7, lr}
80099ce: b082 sub sp, #8
80099d0: af00 add r7, sp, #0
80099d2: 6078 str r0, [r7, #4]
80099d4: 460b mov r3, r1
80099d6: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
80099d8: 687b ldr r3, [r7, #4]
80099da: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
80099de: 78fa ldrb r2, [r7, #3]
80099e0: 6879 ldr r1, [r7, #4]
80099e2: 4613 mov r3, r2
80099e4: 009b lsls r3, r3, #2
80099e6: 4413 add r3, r2
80099e8: 00db lsls r3, r3, #3
80099ea: 440b add r3, r1
80099ec: f503 73be add.w r3, r3, #380 ; 0x17c
80099f0: 681a ldr r2, [r3, #0]
80099f2: 78fb ldrb r3, [r7, #3]
80099f4: 4619 mov r1, r3
80099f6: f7fe fd1e bl 8008436 <USBD_LL_DataOutStage>
}
80099fa: bf00 nop
80099fc: 3708 adds r7, #8
80099fe: 46bd mov sp, r7
8009a00: bd80 pop {r7, pc}
08009a02 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009a02: b580 push {r7, lr}
8009a04: b082 sub sp, #8
8009a06: af00 add r7, sp, #0
8009a08: 6078 str r0, [r7, #4]
8009a0a: 460b mov r3, r1
8009a0c: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
8009a0e: 687b ldr r3, [r7, #4]
8009a10: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
8009a14: 78fa ldrb r2, [r7, #3]
8009a16: 6879 ldr r1, [r7, #4]
8009a18: 4613 mov r3, r2
8009a1a: 009b lsls r3, r3, #2
8009a1c: 4413 add r3, r2
8009a1e: 00db lsls r3, r3, #3
8009a20: 440b add r3, r1
8009a22: 333c adds r3, #60 ; 0x3c
8009a24: 681a ldr r2, [r3, #0]
8009a26: 78fb ldrb r3, [r7, #3]
8009a28: 4619 mov r1, r3
8009a2a: f7fe fd75 bl 8008518 <USBD_LL_DataInStage>
}
8009a2e: bf00 nop
8009a30: 3708 adds r7, #8
8009a32: 46bd mov sp, r7
8009a34: bd80 pop {r7, pc}
08009a36 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009a36: b580 push {r7, lr}
8009a38: b082 sub sp, #8
8009a3a: af00 add r7, sp, #0
8009a3c: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
8009a3e: 687b ldr r3, [r7, #4]
8009a40: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8009a44: 4618 mov r0, r3
8009a46: f7fe fe88 bl 800875a <USBD_LL_SOF>
}
8009a4a: bf00 nop
8009a4c: 3708 adds r7, #8
8009a4e: 46bd mov sp, r7
8009a50: bd80 pop {r7, pc}
08009a52 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009a52: b580 push {r7, lr}
8009a54: b084 sub sp, #16
8009a56: af00 add r7, sp, #0
8009a58: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
8009a5a: 2301 movs r3, #1
8009a5c: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
8009a5e: 687b ldr r3, [r7, #4]
8009a60: 689b ldr r3, [r3, #8]
8009a62: 2b02 cmp r3, #2
8009a64: d001 beq.n 8009a6a <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
8009a66: f7f6 fefd bl 8000864 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
8009a6a: 687b ldr r3, [r7, #4]
8009a6c: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8009a70: 7bfa ldrb r2, [r7, #15]
8009a72: 4611 mov r1, r2
8009a74: 4618 mov r0, r3
8009a76: f7fe fe35 bl 80086e4 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
8009a7a: 687b ldr r3, [r7, #4]
8009a7c: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8009a80: 4618 mov r0, r3
8009a82: f7fe fdee bl 8008662 <USBD_LL_Reset>
}
8009a86: bf00 nop
8009a88: 3710 adds r7, #16
8009a8a: 46bd mov sp, r7
8009a8c: bd80 pop {r7, pc}
...
08009a90 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009a90: b580 push {r7, lr}
8009a92: b082 sub sp, #8
8009a94: af00 add r7, sp, #0
8009a96: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
8009a98: 687b ldr r3, [r7, #4]
8009a9a: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8009a9e: 4618 mov r0, r3
8009aa0: f7fe fe30 bl 8008704 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8009aa4: 687b ldr r3, [r7, #4]
8009aa6: 699b ldr r3, [r3, #24]
8009aa8: 2b00 cmp r3, #0
8009aaa: d005 beq.n 8009ab8 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8009aac: 4b04 ldr r3, [pc, #16] ; (8009ac0 <HAL_PCD_SuspendCallback+0x30>)
8009aae: 691b ldr r3, [r3, #16]
8009ab0: 4a03 ldr r2, [pc, #12] ; (8009ac0 <HAL_PCD_SuspendCallback+0x30>)
8009ab2: f043 0306 orr.w r3, r3, #6
8009ab6: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
8009ab8: bf00 nop
8009aba: 3708 adds r7, #8
8009abc: 46bd mov sp, r7
8009abe: bd80 pop {r7, pc}
8009ac0: e000ed00 .word 0xe000ed00
08009ac4 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009ac4: b580 push {r7, lr}
8009ac6: b082 sub sp, #8
8009ac8: af00 add r7, sp, #0
8009aca: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
8009acc: 687b ldr r3, [r7, #4]
8009ace: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8009ad2: 4618 mov r0, r3
8009ad4: f7fe fe2b bl 800872e <USBD_LL_Resume>
}
8009ad8: bf00 nop
8009ada: 3708 adds r7, #8
8009adc: 46bd mov sp, r7
8009ade: bd80 pop {r7, pc}
08009ae0 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
8009ae0: b580 push {r7, lr}
8009ae2: b082 sub sp, #8
8009ae4: af00 add r7, sp, #0
8009ae6: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
8009ae8: 4a28 ldr r2, [pc, #160] ; (8009b8c <USBD_LL_Init+0xac>)
8009aea: 687b ldr r3, [r7, #4]
8009aec: f8c2 32e8 str.w r3, [r2, #744] ; 0x2e8
pdev->pData = &hpcd_USB_FS;
8009af0: 687b ldr r3, [r7, #4]
8009af2: 4a26 ldr r2, [pc, #152] ; (8009b8c <USBD_LL_Init+0xac>)
8009af4: f8c3 22c0 str.w r2, [r3, #704] ; 0x2c0
hpcd_USB_FS.Instance = USB;
8009af8: 4b24 ldr r3, [pc, #144] ; (8009b8c <USBD_LL_Init+0xac>)
8009afa: 4a25 ldr r2, [pc, #148] ; (8009b90 <USBD_LL_Init+0xb0>)
8009afc: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
8009afe: 4b23 ldr r3, [pc, #140] ; (8009b8c <USBD_LL_Init+0xac>)
8009b00: 2208 movs r2, #8
8009b02: 605a str r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
8009b04: 4b21 ldr r3, [pc, #132] ; (8009b8c <USBD_LL_Init+0xac>)
8009b06: 2202 movs r2, #2
8009b08: 609a str r2, [r3, #8]
hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
8009b0a: 4b20 ldr r3, [pc, #128] ; (8009b8c <USBD_LL_Init+0xac>)
8009b0c: 2202 movs r2, #2
8009b0e: 611a str r2, [r3, #16]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
8009b10: 4b1e ldr r3, [pc, #120] ; (8009b8c <USBD_LL_Init+0xac>)
8009b12: 2200 movs r2, #0
8009b14: 619a str r2, [r3, #24]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
8009b16: 4b1d ldr r3, [pc, #116] ; (8009b8c <USBD_LL_Init+0xac>)
8009b18: 2200 movs r2, #0
8009b1a: 621a str r2, [r3, #32]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
8009b1c: 481b ldr r0, [pc, #108] ; (8009b8c <USBD_LL_Init+0xac>)
8009b1e: f7f8 f941 bl 8001da4 <HAL_PCD_Init>
8009b22: 4603 mov r3, r0
8009b24: 2b00 cmp r3, #0
8009b26: d001 beq.n 8009b2c <USBD_LL_Init+0x4c>
{
Error_Handler( );
8009b28: f7f6 fe9c bl 8000864 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
8009b2c: 687b ldr r3, [r7, #4]
8009b2e: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009b32: 2318 movs r3, #24
8009b34: 2200 movs r2, #0
8009b36: 2100 movs r1, #0
8009b38: f7f9 fddc bl 80036f4 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
8009b3c: 687b ldr r3, [r7, #4]
8009b3e: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009b42: 2358 movs r3, #88 ; 0x58
8009b44: 2200 movs r2, #0
8009b46: 2180 movs r1, #128 ; 0x80
8009b48: f7f9 fdd4 bl 80036f4 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
8009b4c: 687b ldr r3, [r7, #4]
8009b4e: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009b52: 23c0 movs r3, #192 ; 0xc0
8009b54: 2200 movs r2, #0
8009b56: 2181 movs r1, #129 ; 0x81
8009b58: f7f9 fdcc bl 80036f4 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
8009b5c: 687b ldr r3, [r7, #4]
8009b5e: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009b62: f44f 7388 mov.w r3, #272 ; 0x110
8009b66: 2200 movs r2, #0
8009b68: 2101 movs r1, #1
8009b6a: f7f9 fdc3 bl 80036f4 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
8009b6e: 687b ldr r3, [r7, #4]
8009b70: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009b74: f44f 7380 mov.w r3, #256 ; 0x100
8009b78: 2200 movs r2, #0
8009b7a: 2182 movs r1, #130 ; 0x82
8009b7c: f7f9 fdba bl 80036f4 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
8009b80: 2300 movs r3, #0
}
8009b82: 4618 mov r0, r3
8009b84: 3708 adds r7, #8
8009b86: 46bd mov sp, r7
8009b88: bd80 pop {r7, pc}
8009b8a: bf00 nop
8009b8c: 20001084 .word 0x20001084
8009b90: 40005c00 .word 0x40005c00
08009b94 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
8009b94: b580 push {r7, lr}
8009b96: b084 sub sp, #16
8009b98: af00 add r7, sp, #0
8009b9a: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8009b9c: 2300 movs r3, #0
8009b9e: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8009ba0: 2300 movs r3, #0
8009ba2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
8009ba4: 687b ldr r3, [r7, #4]
8009ba6: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009baa: 4618 mov r0, r3
8009bac: f7f8 f9d8 bl 8001f60 <HAL_PCD_Start>
8009bb0: 4603 mov r3, r0
8009bb2: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8009bb4: 7bfb ldrb r3, [r7, #15]
8009bb6: 4618 mov r0, r3
8009bb8: f000 f954 bl 8009e64 <USBD_Get_USB_Status>
8009bbc: 4603 mov r3, r0
8009bbe: 73bb strb r3, [r7, #14]
return usb_status;
8009bc0: 7bbb ldrb r3, [r7, #14]
}
8009bc2: 4618 mov r0, r3
8009bc4: 3710 adds r7, #16
8009bc6: 46bd mov sp, r7
8009bc8: bd80 pop {r7, pc}
08009bca <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
8009bca: b580 push {r7, lr}
8009bcc: b084 sub sp, #16
8009bce: af00 add r7, sp, #0
8009bd0: 6078 str r0, [r7, #4]
8009bd2: 4608 mov r0, r1
8009bd4: 4611 mov r1, r2
8009bd6: 461a mov r2, r3
8009bd8: 4603 mov r3, r0
8009bda: 70fb strb r3, [r7, #3]
8009bdc: 460b mov r3, r1
8009bde: 70bb strb r3, [r7, #2]
8009be0: 4613 mov r3, r2
8009be2: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8009be4: 2300 movs r3, #0
8009be6: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8009be8: 2300 movs r3, #0
8009bea: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
8009bec: 687b ldr r3, [r7, #4]
8009bee: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009bf2: 78bb ldrb r3, [r7, #2]
8009bf4: 883a ldrh r2, [r7, #0]
8009bf6: 78f9 ldrb r1, [r7, #3]
8009bf8: f7f8 faf4 bl 80021e4 <HAL_PCD_EP_Open>
8009bfc: 4603 mov r3, r0
8009bfe: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8009c00: 7bfb ldrb r3, [r7, #15]
8009c02: 4618 mov r0, r3
8009c04: f000 f92e bl 8009e64 <USBD_Get_USB_Status>
8009c08: 4603 mov r3, r0
8009c0a: 73bb strb r3, [r7, #14]
return usb_status;
8009c0c: 7bbb ldrb r3, [r7, #14]
}
8009c0e: 4618 mov r0, r3
8009c10: 3710 adds r7, #16
8009c12: 46bd mov sp, r7
8009c14: bd80 pop {r7, pc}
08009c16 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8009c16: b580 push {r7, lr}
8009c18: b084 sub sp, #16
8009c1a: af00 add r7, sp, #0
8009c1c: 6078 str r0, [r7, #4]
8009c1e: 460b mov r3, r1
8009c20: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8009c22: 2300 movs r3, #0
8009c24: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8009c26: 2300 movs r3, #0
8009c28: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
8009c2a: 687b ldr r3, [r7, #4]
8009c2c: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009c30: 78fa ldrb r2, [r7, #3]
8009c32: 4611 mov r1, r2
8009c34: 4618 mov r0, r3
8009c36: f7f8 fb3b bl 80022b0 <HAL_PCD_EP_Close>
8009c3a: 4603 mov r3, r0
8009c3c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8009c3e: 7bfb ldrb r3, [r7, #15]
8009c40: 4618 mov r0, r3
8009c42: f000 f90f bl 8009e64 <USBD_Get_USB_Status>
8009c46: 4603 mov r3, r0
8009c48: 73bb strb r3, [r7, #14]
return usb_status;
8009c4a: 7bbb ldrb r3, [r7, #14]
}
8009c4c: 4618 mov r0, r3
8009c4e: 3710 adds r7, #16
8009c50: 46bd mov sp, r7
8009c52: bd80 pop {r7, pc}
08009c54 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8009c54: b580 push {r7, lr}
8009c56: b084 sub sp, #16
8009c58: af00 add r7, sp, #0
8009c5a: 6078 str r0, [r7, #4]
8009c5c: 460b mov r3, r1
8009c5e: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8009c60: 2300 movs r3, #0
8009c62: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8009c64: 2300 movs r3, #0
8009c66: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
8009c68: 687b ldr r3, [r7, #4]
8009c6a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009c6e: 78fa ldrb r2, [r7, #3]
8009c70: 4611 mov r1, r2
8009c72: 4618 mov r0, r3
8009c74: f7f8 fbfc bl 8002470 <HAL_PCD_EP_SetStall>
8009c78: 4603 mov r3, r0
8009c7a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8009c7c: 7bfb ldrb r3, [r7, #15]
8009c7e: 4618 mov r0, r3
8009c80: f000 f8f0 bl 8009e64 <USBD_Get_USB_Status>
8009c84: 4603 mov r3, r0
8009c86: 73bb strb r3, [r7, #14]
return usb_status;
8009c88: 7bbb ldrb r3, [r7, #14]
}
8009c8a: 4618 mov r0, r3
8009c8c: 3710 adds r7, #16
8009c8e: 46bd mov sp, r7
8009c90: bd80 pop {r7, pc}
08009c92 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8009c92: b580 push {r7, lr}
8009c94: b084 sub sp, #16
8009c96: af00 add r7, sp, #0
8009c98: 6078 str r0, [r7, #4]
8009c9a: 460b mov r3, r1
8009c9c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8009c9e: 2300 movs r3, #0
8009ca0: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8009ca2: 2300 movs r3, #0
8009ca4: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
8009ca6: 687b ldr r3, [r7, #4]
8009ca8: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009cac: 78fa ldrb r2, [r7, #3]
8009cae: 4611 mov r1, r2
8009cb0: 4618 mov r0, r3
8009cb2: f7f8 fc2f bl 8002514 <HAL_PCD_EP_ClrStall>
8009cb6: 4603 mov r3, r0
8009cb8: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8009cba: 7bfb ldrb r3, [r7, #15]
8009cbc: 4618 mov r0, r3
8009cbe: f000 f8d1 bl 8009e64 <USBD_Get_USB_Status>
8009cc2: 4603 mov r3, r0
8009cc4: 73bb strb r3, [r7, #14]
return usb_status;
8009cc6: 7bbb ldrb r3, [r7, #14]
}
8009cc8: 4618 mov r0, r3
8009cca: 3710 adds r7, #16
8009ccc: 46bd mov sp, r7
8009cce: bd80 pop {r7, pc}
08009cd0 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8009cd0: b480 push {r7}
8009cd2: b085 sub sp, #20
8009cd4: af00 add r7, sp, #0
8009cd6: 6078 str r0, [r7, #4]
8009cd8: 460b mov r3, r1
8009cda: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
8009cdc: 687b ldr r3, [r7, #4]
8009cde: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009ce2: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8009ce4: f997 3003 ldrsb.w r3, [r7, #3]
8009ce8: 2b00 cmp r3, #0
8009cea: da0c bge.n 8009d06 <USBD_LL_IsStallEP+0x36>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
8009cec: 78fb ldrb r3, [r7, #3]
8009cee: f003 037f and.w r3, r3, #127 ; 0x7f
8009cf2: 68f9 ldr r1, [r7, #12]
8009cf4: 1c5a adds r2, r3, #1
8009cf6: 4613 mov r3, r2
8009cf8: 009b lsls r3, r3, #2
8009cfa: 4413 add r3, r2
8009cfc: 00db lsls r3, r3, #3
8009cfe: 440b add r3, r1
8009d00: 3302 adds r3, #2
8009d02: 781b ldrb r3, [r3, #0]
8009d04: e00b b.n 8009d1e <USBD_LL_IsStallEP+0x4e>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8009d06: 78fb ldrb r3, [r7, #3]
8009d08: f003 027f and.w r2, r3, #127 ; 0x7f
8009d0c: 68f9 ldr r1, [r7, #12]
8009d0e: 4613 mov r3, r2
8009d10: 009b lsls r3, r3, #2
8009d12: 4413 add r3, r2
8009d14: 00db lsls r3, r3, #3
8009d16: 440b add r3, r1
8009d18: f503 73b5 add.w r3, r3, #362 ; 0x16a
8009d1c: 781b ldrb r3, [r3, #0]
}
}
8009d1e: 4618 mov r0, r3
8009d20: 3714 adds r7, #20
8009d22: 46bd mov sp, r7
8009d24: f85d 7b04 ldr.w r7, [sp], #4
8009d28: 4770 bx lr
08009d2a <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
8009d2a: b580 push {r7, lr}
8009d2c: b084 sub sp, #16
8009d2e: af00 add r7, sp, #0
8009d30: 6078 str r0, [r7, #4]
8009d32: 460b mov r3, r1
8009d34: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8009d36: 2300 movs r3, #0
8009d38: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8009d3a: 2300 movs r3, #0
8009d3c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
8009d3e: 687b ldr r3, [r7, #4]
8009d40: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009d44: 78fa ldrb r2, [r7, #3]
8009d46: 4611 mov r1, r2
8009d48: 4618 mov r0, r3
8009d4a: f7f8 fa26 bl 800219a <HAL_PCD_SetAddress>
8009d4e: 4603 mov r3, r0
8009d50: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8009d52: 7bfb ldrb r3, [r7, #15]
8009d54: 4618 mov r0, r3
8009d56: f000 f885 bl 8009e64 <USBD_Get_USB_Status>
8009d5a: 4603 mov r3, r0
8009d5c: 73bb strb r3, [r7, #14]
return usb_status;
8009d5e: 7bbb ldrb r3, [r7, #14]
}
8009d60: 4618 mov r0, r3
8009d62: 3710 adds r7, #16
8009d64: 46bd mov sp, r7
8009d66: bd80 pop {r7, pc}
08009d68 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8009d68: b580 push {r7, lr}
8009d6a: b086 sub sp, #24
8009d6c: af00 add r7, sp, #0
8009d6e: 60f8 str r0, [r7, #12]
8009d70: 607a str r2, [r7, #4]
8009d72: 461a mov r2, r3
8009d74: 460b mov r3, r1
8009d76: 72fb strb r3, [r7, #11]
8009d78: 4613 mov r3, r2
8009d7a: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8009d7c: 2300 movs r3, #0
8009d7e: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8009d80: 2300 movs r3, #0
8009d82: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
8009d84: 68fb ldr r3, [r7, #12]
8009d86: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009d8a: 893b ldrh r3, [r7, #8]
8009d8c: 7af9 ldrb r1, [r7, #11]
8009d8e: 687a ldr r2, [r7, #4]
8009d90: f7f8 fb2b bl 80023ea <HAL_PCD_EP_Transmit>
8009d94: 4603 mov r3, r0
8009d96: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8009d98: 7dfb ldrb r3, [r7, #23]
8009d9a: 4618 mov r0, r3
8009d9c: f000 f862 bl 8009e64 <USBD_Get_USB_Status>
8009da0: 4603 mov r3, r0
8009da2: 75bb strb r3, [r7, #22]
return usb_status;
8009da4: 7dbb ldrb r3, [r7, #22]
}
8009da6: 4618 mov r0, r3
8009da8: 3718 adds r7, #24
8009daa: 46bd mov sp, r7
8009dac: bd80 pop {r7, pc}
08009dae <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8009dae: b580 push {r7, lr}
8009db0: b086 sub sp, #24
8009db2: af00 add r7, sp, #0
8009db4: 60f8 str r0, [r7, #12]
8009db6: 607a str r2, [r7, #4]
8009db8: 461a mov r2, r3
8009dba: 460b mov r3, r1
8009dbc: 72fb strb r3, [r7, #11]
8009dbe: 4613 mov r3, r2
8009dc0: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8009dc2: 2300 movs r3, #0
8009dc4: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8009dc6: 2300 movs r3, #0
8009dc8: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
8009dca: 68fb ldr r3, [r7, #12]
8009dcc: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8009dd0: 893b ldrh r3, [r7, #8]
8009dd2: 7af9 ldrb r1, [r7, #11]
8009dd4: 687a ldr r2, [r7, #4]
8009dd6: f7f8 fab3 bl 8002340 <HAL_PCD_EP_Receive>
8009dda: 4603 mov r3, r0
8009ddc: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8009dde: 7dfb ldrb r3, [r7, #23]
8009de0: 4618 mov r0, r3
8009de2: f000 f83f bl 8009e64 <USBD_Get_USB_Status>
8009de6: 4603 mov r3, r0
8009de8: 75bb strb r3, [r7, #22]
return usb_status;
8009dea: 7dbb ldrb r3, [r7, #22]
}
8009dec: 4618 mov r0, r3
8009dee: 3718 adds r7, #24
8009df0: 46bd mov sp, r7
8009df2: bd80 pop {r7, pc}
08009df4 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8009df4: b580 push {r7, lr}
8009df6: b082 sub sp, #8
8009df8: af00 add r7, sp, #0
8009dfa: 6078 str r0, [r7, #4]
8009dfc: 460b mov r3, r1
8009dfe: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
8009e00: 687b ldr r3, [r7, #4]
8009e02: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8009e06: 78fa ldrb r2, [r7, #3]
8009e08: 4611 mov r1, r2
8009e0a: 4618 mov r0, r3
8009e0c: f7f8 fad5 bl 80023ba <HAL_PCD_EP_GetRxCount>
8009e10: 4603 mov r3, r0
}
8009e12: 4618 mov r0, r3
8009e14: 3708 adds r7, #8
8009e16: 46bd mov sp, r7
8009e18: bd80 pop {r7, pc}
...
08009e1c <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
8009e1c: b480 push {r7}
8009e1e: b083 sub sp, #12
8009e20: af00 add r7, sp, #0
8009e22: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8009e24: 4b03 ldr r3, [pc, #12] ; (8009e34 <USBD_static_malloc+0x18>)
}
8009e26: 4618 mov r0, r3
8009e28: 370c adds r7, #12
8009e2a: 46bd mov sp, r7
8009e2c: f85d 7b04 ldr.w r7, [sp], #4
8009e30: 4770 bx lr
8009e32: bf00 nop
8009e34: 20001370 .word 0x20001370
08009e38 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8009e38: b480 push {r7}
8009e3a: b083 sub sp, #12
8009e3c: af00 add r7, sp, #0
8009e3e: 6078 str r0, [r7, #4]
}
8009e40: bf00 nop
8009e42: 370c adds r7, #12
8009e44: 46bd mov sp, r7
8009e46: f85d 7b04 ldr.w r7, [sp], #4
8009e4a: 4770 bx lr
08009e4c <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009e4c: b480 push {r7}
8009e4e: b083 sub sp, #12
8009e50: af00 add r7, sp, #0
8009e52: 6078 str r0, [r7, #4]
8009e54: 460b mov r3, r1
8009e56: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
8009e58: bf00 nop
8009e5a: 370c adds r7, #12
8009e5c: 46bd mov sp, r7
8009e5e: f85d 7b04 ldr.w r7, [sp], #4
8009e62: 4770 bx lr
08009e64 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8009e64: b480 push {r7}
8009e66: b085 sub sp, #20
8009e68: af00 add r7, sp, #0
8009e6a: 4603 mov r3, r0
8009e6c: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
8009e6e: 2300 movs r3, #0
8009e70: 73fb strb r3, [r7, #15]
switch (hal_status)
8009e72: 79fb ldrb r3, [r7, #7]
8009e74: 2b03 cmp r3, #3
8009e76: d817 bhi.n 8009ea8 <USBD_Get_USB_Status+0x44>
8009e78: a201 add r2, pc, #4 ; (adr r2, 8009e80 <USBD_Get_USB_Status+0x1c>)
8009e7a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009e7e: bf00 nop
8009e80: 08009e91 .word 0x08009e91
8009e84: 08009e97 .word 0x08009e97
8009e88: 08009e9d .word 0x08009e9d
8009e8c: 08009ea3 .word 0x08009ea3
{
case HAL_OK :
usb_status = USBD_OK;
8009e90: 2300 movs r3, #0
8009e92: 73fb strb r3, [r7, #15]
break;
8009e94: e00b b.n 8009eae <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
8009e96: 2302 movs r3, #2
8009e98: 73fb strb r3, [r7, #15]
break;
8009e9a: e008 b.n 8009eae <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
8009e9c: 2301 movs r3, #1
8009e9e: 73fb strb r3, [r7, #15]
break;
8009ea0: e005 b.n 8009eae <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
8009ea2: 2302 movs r3, #2
8009ea4: 73fb strb r3, [r7, #15]
break;
8009ea6: e002 b.n 8009eae <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
8009ea8: 2302 movs r3, #2
8009eaa: 73fb strb r3, [r7, #15]
break;
8009eac: bf00 nop
}
return usb_status;
8009eae: 7bfb ldrb r3, [r7, #15]
}
8009eb0: 4618 mov r0, r3
8009eb2: 3714 adds r7, #20
8009eb4: 46bd mov sp, r7
8009eb6: f85d 7b04 ldr.w r7, [sp], #4
8009eba: 4770 bx lr
08009ebc <__libc_init_array>:
8009ebc: b570 push {r4, r5, r6, lr}
8009ebe: 4d0d ldr r5, [pc, #52] ; (8009ef4 <__libc_init_array+0x38>)
8009ec0: 4c0d ldr r4, [pc, #52] ; (8009ef8 <__libc_init_array+0x3c>)
8009ec2: 1b64 subs r4, r4, r5
8009ec4: 10a4 asrs r4, r4, #2
8009ec6: 2600 movs r6, #0
8009ec8: 42a6 cmp r6, r4
8009eca: d109 bne.n 8009ee0 <__libc_init_array+0x24>
8009ecc: 4d0b ldr r5, [pc, #44] ; (8009efc <__libc_init_array+0x40>)
8009ece: 4c0c ldr r4, [pc, #48] ; (8009f00 <__libc_init_array+0x44>)
8009ed0: f000 f82e bl 8009f30 <_init>
8009ed4: 1b64 subs r4, r4, r5
8009ed6: 10a4 asrs r4, r4, #2
8009ed8: 2600 movs r6, #0
8009eda: 42a6 cmp r6, r4
8009edc: d105 bne.n 8009eea <__libc_init_array+0x2e>
8009ede: bd70 pop {r4, r5, r6, pc}
8009ee0: f855 3b04 ldr.w r3, [r5], #4
8009ee4: 4798 blx r3
8009ee6: 3601 adds r6, #1
8009ee8: e7ee b.n 8009ec8 <__libc_init_array+0xc>
8009eea: f855 3b04 ldr.w r3, [r5], #4
8009eee: 4798 blx r3
8009ef0: 3601 adds r6, #1
8009ef2: e7f2 b.n 8009eda <__libc_init_array+0x1e>
8009ef4: 08009fc8 .word 0x08009fc8
8009ef8: 08009fc8 .word 0x08009fc8
8009efc: 08009fc8 .word 0x08009fc8
8009f00: 08009fcc .word 0x08009fcc
08009f04 <memcpy>:
8009f04: 440a add r2, r1
8009f06: 4291 cmp r1, r2
8009f08: f100 33ff add.w r3, r0, #4294967295
8009f0c: d100 bne.n 8009f10 <memcpy+0xc>
8009f0e: 4770 bx lr
8009f10: b510 push {r4, lr}
8009f12: f811 4b01 ldrb.w r4, [r1], #1
8009f16: f803 4f01 strb.w r4, [r3, #1]!
8009f1a: 4291 cmp r1, r2
8009f1c: d1f9 bne.n 8009f12 <memcpy+0xe>
8009f1e: bd10 pop {r4, pc}
08009f20 <memset>:
8009f20: 4402 add r2, r0
8009f22: 4603 mov r3, r0
8009f24: 4293 cmp r3, r2
8009f26: d100 bne.n 8009f2a <memset+0xa>
8009f28: 4770 bx lr
8009f2a: f803 1b01 strb.w r1, [r3], #1
8009f2e: e7f9 b.n 8009f24 <memset+0x4>
08009f30 <_init>:
8009f30: b5f8 push {r3, r4, r5, r6, r7, lr}
8009f32: bf00 nop
8009f34: bcf8 pop {r3, r4, r5, r6, r7}
8009f36: bc08 pop {r3}
8009f38: 469e mov lr, r3
8009f3a: 4770 bx lr
08009f3c <_fini>:
8009f3c: b5f8 push {r3, r4, r5, r6, r7, lr}
8009f3e: bf00 nop
8009f40: bcf8 pop {r3, r4, r5, r6, r7}
8009f42: bc08 pop {r3}
8009f44: 469e mov lr, r3
8009f46: 4770 bx lr