From 09afab4ef605b16c2325baa7ef156ecfe60a1bd9 Mon Sep 17 00:00:00 2001 From: Janek Date: Tue, 24 Jun 2025 18:50:06 +0200 Subject: [PATCH] changed LEDs to work with new changes in CAN-message --- Software/Core/Src/main.c | 26 +- Software/Debug/Core/Src/main.cyclo | 10 +- Software/Debug/Core/Src/main.su | 10 +- Software/Debug/Dashboard.elf | Bin 880852 -> 880712 bytes Software/Debug/Dashboard.list | 9938 ++++++++++++++-------------- Software/Debug/Dashboard.map | 544 +- 6 files changed, 5245 insertions(+), 5283 deletions(-) diff --git a/Software/Core/Src/main.c b/Software/Core/Src/main.c index 4bc673b..5ea6378 100644 --- a/Software/Core/Src/main.c +++ b/Software/Core/Src/main.c @@ -63,7 +63,6 @@ static void MX_CAN_Init(void); extern dash_tx_t dash_tx; extern rx_acc acc_status; uint8_t sdc_closed; -uint8_t blink_state; uint8_t r2d_progress; uint32_t blink_tick_tson; uint32_t blink_tick_r2d; @@ -104,7 +103,6 @@ int main(void) /* USER CODE BEGIN 2 */ can_init(&hcan); - blink_state = 0; sdc_closed = 0; blink_tick_tson = HAL_GetTick(); blink_tick_r2d = HAL_GetTick(); @@ -127,8 +125,8 @@ int main(void) // Inverted in hardware if ((HAL_GetTick() - ams_last_tick) < 350) { //master sendet aller 100ms, fürs testen erstmal auf 150ms gesetzt -> kann später wieder runter - HAL_GPIO_WritePin(IMD_LED_GPIO_Port, IMD_LED_Pin, acc_status.led_status.imd_error); - HAL_GPIO_WritePin(AMS_LED_GPIO_Port, AMS_LED_Pin, acc_status.led_status.ams_error); + HAL_GPIO_WritePin(IMD_LED_GPIO_Port, IMD_LED_Pin, !acc_status.led_status.imd_error); + HAL_GPIO_WritePin(AMS_LED_GPIO_Port, AMS_LED_Pin, !acc_status.led_status.ams_error); HAL_GPIO_WritePin(TSOFF_LED_GPIO_Port, TSOFF_LED_Pin,acc_status.led_status.ts_green); } else { // Safe state: Error LEDs on, TSOFF off @@ -154,7 +152,7 @@ int main(void) br = bb = 1; } if(acc_status.ams_status.ts_state == TS_ERROR){ - r = 1; + br = 1; } } else{ @@ -165,10 +163,10 @@ int main(void) HAL_GPIO_WritePin(TSON_G_GPIO_Port, TSON_G_Pin, g); HAL_GPIO_WritePin(TSON_B_GPIO_Port, TSON_B_Pin, b); - if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_tson) > 10u)) { - HAL_GPIO_WritePin(TSON_R_GPIO_Port, TSON_R_Pin, br && blink_state); - HAL_GPIO_WritePin(TSON_G_GPIO_Port, TSON_G_Pin, bg && blink_state); - HAL_GPIO_WritePin(TSON_B_GPIO_Port, TSON_B_Pin, bb && blink_state); + if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_tson) > 1000u)) { + if (br) { HAL_GPIO_TogglePin(TSON_R_GPIO_Port, TSON_R_Pin); } + if (bg) { HAL_GPIO_TogglePin(TSON_G_GPIO_Port, TSON_G_Pin); } + if (bb) { HAL_GPIO_TogglePin(TSON_B_GPIO_Port, TSON_B_Pin); } blink_tick_tson = HAL_GetTick(); } @@ -194,15 +192,13 @@ int main(void) HAL_GPIO_WritePin(R2D_B_GPIO_Port, R2D_B_Pin, b); - if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_r2d) > 10u)) { - HAL_GPIO_WritePin(R2D_R_GPIO_Port, R2D_R_Pin, br && blink_state); - HAL_GPIO_WritePin(R2D_G_GPIO_Port, R2D_G_Pin, bg && blink_state); - HAL_GPIO_WritePin(R2D_B_GPIO_Port, R2D_B_Pin, bb && blink_state); + if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_r2d) > 1000u)) { + if (br) { HAL_GPIO_TogglePin(R2D_R_GPIO_Port, R2D_R_Pin); } + if (bg) { HAL_GPIO_TogglePin(R2D_G_GPIO_Port, R2D_G_Pin); } + if (bb) { HAL_GPIO_TogglePin(R2D_B_GPIO_Port, R2D_B_Pin); } blink_tick_r2d = HAL_GetTick(); } - blink_state = !blink_state; - if ((HAL_GetTick() - can_send_tick) > 50u){ can_send(); can_send_tick = HAL_GetTick(); diff --git a/Software/Debug/Core/Src/main.cyclo b/Software/Debug/Core/Src/main.cyclo index 8d90df8..a00734c 100644 --- a/Software/Debug/Core/Src/main.cyclo +++ b/Software/Debug/Core/Src/main.cyclo @@ -1,5 +1,5 @@ -../Core/Src/main.c:78:5:main 36 -../Core/Src/main.c:219:6:SystemClock_Config 3 -../Core/Src/main.c:256:13:MX_CAN_Init 2 -../Core/Src/main.c:293:13:MX_GPIO_Init 1 -../Core/Src/main.c:347:6:Error_Handler 1 +../Core/Src/main.c:77:5:main 30 +../Core/Src/main.c:215:6:SystemClock_Config 3 +../Core/Src/main.c:252:13:MX_CAN_Init 2 +../Core/Src/main.c:289:13:MX_GPIO_Init 1 +../Core/Src/main.c:343:6:Error_Handler 1 diff --git a/Software/Debug/Core/Src/main.su b/Software/Debug/Core/Src/main.su index 0bf0f99..b26450a 100644 --- a/Software/Debug/Core/Src/main.su +++ b/Software/Debug/Core/Src/main.su @@ -1,5 +1,5 @@ -../Core/Src/main.c:78:5:main 32 static -../Core/Src/main.c:219:6:SystemClock_Config 72 static -../Core/Src/main.c:256:13:MX_CAN_Init 8 static -../Core/Src/main.c:293:13:MX_GPIO_Init 40 static -../Core/Src/main.c:347:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:77:5:main 32 static +../Core/Src/main.c:215:6:SystemClock_Config 72 static +../Core/Src/main.c:252:13:MX_CAN_Init 8 static +../Core/Src/main.c:289:13:MX_GPIO_Init 40 static +../Core/Src/main.c:343:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Software/Debug/Dashboard.elf b/Software/Debug/Dashboard.elf index 8cbb04b0154d046c35114a7973f82c1e595eacfb..aa12e77bbebcde226747a6304cf60e052ba1c4db 100644 GIT binary patch delta 20765 zcmeHvX?Rq{wsuwRy?ghN&I}pJJRuBCtB`1-g05Q>$00Uiy32Ws?#$&9dE%HeGL#;Bx9VOWfZV9(4Aq3{D!ZCC_z49 zeA9kt@y4uK5kAVVAHKKYI~?D8@g0XRr3n2z1lsH%y&BIK@a^UKKmLxoA(QpUboc+A zjBm)dmwX^9ruy~Bw)Hip8rG)~4z0Q32QzTh2@`?$l8;4Y@`du{s3e5%MU4+C#G5vT? z`B6+q-wRjRh259gg=T-U3zsji>3Qwq;j63ru#ChB?85g~v>q?^jwxps&LXx-#ZDmh z0%EuP#=5NN$uA`RrS;G*aP8=u%X`O69r0@yEoMSm`Vw%$>o|)Qhk+BBUJVYf-b}@tg;eaq(kr6JbX4<`#G2nX_|iXq zw9lPW_xxI-efef$4`=!<7Z#TA3nyx)DC!JFjSNyht9_u)2oh$BoE9V>sEs<#GVG-9 z*0Kyc!A`_&sm--4bJ_@&*&g33zSHn+Up}l)($vfgKIF-o#2&muKG2{6zg5m{ z(AYPpw*44VO9V@LwDw9RVLgZ^)o!a~O^id+5Q;;$Q_I@g*N68T}v+ zrkPkv()vL=&#|?XPCsbpIkJ{r`0-DzM^^6``BcM%@tM$$`irzHJ(vb0nwSSu@Z?Rj zgUNWZCfXs6dbJ-jZA3gtH;Fjd5Kp~{=U^uUIX@(=*Y*UtY1=L!_qx9lk;}4Q-7~ zw8r>9MURBK)<_JthMnKXSEw~Kv`z$aIBOYv2z*%XHTBv`mjr;QM6z_{RJtd2f6!|FGt%_(H8=MD4YU_tjqg zmd#*k7`bVf_Avd`e4Nx=YyN9IbD9avnS}2&#Q%=(OZW!xJ%H~w_!fd!itp|Cu5s10 zN-d4NY2#zBvkgn4j0v2Yo-ZLL9H#&xW-#-aL+%k*o0NGQOjRFxpg?B zCaD$Yo>hO^0?TW1TX*DPe_bYm3uRooEGM+t=aGuw0pV#`+V-L+x(<75y0@FjqxxQ= z6k+Il7AZ=uUhGzLr2S~_S$NIL=&y@U*7WMwg?r9lwFzfx7Izx1xmx`-b+r5VUl*Ip zD_uT`orB>O-(za)9X)33u(Dd)LZ0mU565OKGW%M{r%MNhe~zgA{i;RHkEJnT)vuS= z@Ul1b@N0j$nDa>LEjnX5?c-DeHs31HlMnF#oKv7Le}y>TDNx3D66d@EgZR~& z$+vCgyr!nv?L$o-CKudQ;tQ(#n5AwlbU&JUPNQLC&Ib50^;1|`77tb-)eNZufx0RX zsH*~jx+)Mr6-cYo9s(Ws;S(G@3IM7W!|n89}-O`3?fZLVMr{)b?!L@-s> zUc|$n0{3?2^}t*C%*No~#&a1vYZJJYfD)?&9_D=v2^{E#aJha|qb5IHK}midManX9 z1-)b}v5+p-!`_Ug7IKP@R?0CH&15xF_mZ9w}PNiR?+2Uljr z7%@G;G#-j`Fm6O{=S&##smkP=ykt{X!l-E(f0)2k1$6NZjTFumamDSWBf@`beJ<7`NcjPj-*?#HWCTy#j0U5 zK9Cx-spmeR3(k(5K&#uQvVTTjwPm#xENU$ zcNk0C8RV*DH`$CKj1`p7fT;C`L7+;NTsR7K=SLiiOy-=bDEp9QdM)IRQrn8^vh?$4 z&o8JCwCe3XRx|~W_cI=cw5~JfLd{2YrD~>i1MZ4`j-JToJ4rxPPl_JR=0{lZ3DG0j z{DxM%DthEZ_GD0~GJ51__GF~RsfZpql06x3fpW&0T|#?_1xXtF4~=Q8Cdn|EM75fH zbj`(H@D0(~3KT}4H?$pFJk;pbUuslLFZ3MG0FKmbF+t>Zy=oP z90~d~r-AsR&YKZVcP4T-^YPt?GyWsEoWBQ(;E#i%@#e@u=g)v*@HkK$o%mJ&lW&2j zlWT~(crJw8d>BFxKMA2Qz7Je4j|C;1PenX}Z$~_mPn2&z5a(TtcmqBUVMG3y{PVF! zz73E`=EIS;5x*bt6g~~yRK5t5G`<1xbp9g3488{3OnxiqSv(x2XY-Dr=kU)!$>q7A z0tSR}Q{ZF!>XI5{Pu2C2?jl3}I22D0yhl1=5L$%R-TS5GcX zqy_R9MbFo0dHhwyi&*R^`Jc&msP)0oD(rTY>=d*Nkn3BMir)3^Vt)y9B zbcAZ=(bNMDn6MyE%ltBxl+F^g5}4n3Fcw*!AZO7$u0XyZXVE;NK#?G4(LAX@u^?yB zJf%PzL7tX*T7eFNJT3DK0eD)1JT3FAVs#VbL7Lwx&{L2HX`WM{uOJW7{7!)~K^~-e zUV%a4s_gXez!ATpE1YQe0CY6b6`1FTfaFNxF&`001=JACTZRE0`6YVXX>iB4*X2K@ zEOhSBF}_q5CdsRSMQ)ZqKb*`nWcVW)<|=gf;MFeK`jN&ddy!2%a$Sf-Q8WYHZBU!h z^ptSSC8s|US2P|r!8<#KL9!<#`SSRY!9+*wL_IVs(Il4eh)cfrNaLtigqyv95xo;B z=#y7-?U7@eTBaRGQoq3LLd*2`)2(IN@r{QLp{!-vaa;jwnRc8|z*?pqCl#=kX~!uA ztYzA9S^;aBcAQbbTBaRm6|k0R$F~Yt%e3Ph0ehKte5Y8}GVM6804>w2e0TYlpfZkK z!qJjiJ_-R#>`Eu{GM+E!e)$90E@B=G=F(HHR*bBUFA#k{b zV}YNabsdiZUO4GGZY|uUY-SY*=xNGeE(9i4T*qgC?-_O-KLk8z&~@wt?%r4Ko{=0? zizs!9m+T9l&hp0@&o#-`+)Urfqc;$VPbIXCN5iK;7hOaOeY=I6{Gi-8v-NG=Nn*D} z%i<3bddEU}ybqy07Ru)v2)%2eBK{7c_bgP*+Y{Prp*B2CmdtA1B#CGTcyt~tu#A@w z`her4i?MRP6T1ohLmquI&?M~MUYs@4`y@$x#5Y1!*CJUoJC$#gWeEQ!C(KTRS5-Zm z{PFd($sa#6yLAdpHxBsYRJVLi6OIG^IH4lu9VOe%$&FcyZK(Stlp!PFBH%wOe-@ zT4<=X&`@ikq1Hm%%s>SgCuZ8wns99^Fvr-;@{2~6i>^-+}qw@y5hFTHb26ht0 zJR1o9CA5x!@r&fbxv_1>V8sz#c~lFKm|i-NiBb#b;xS@%vyfACM$e1x7D85E%CF~U zM(jm~Vv3z$kBpdC7U`#C(=A#W^ZY5t&&y~;YpggI6x3;z72jFNDVoaH=8@r_oo5-o zfZ>xm)<#so@Cg+$&nVgciLy?MVRjX~2%($zN62|1h1k~7;@MSu6rOMRb}06U){qj0 z$Admii^`?=0=fT*=KNDx`$S^=a?o8)?k2`fm@8crVUfScg87fer67ZS77s*5D-U08 z{v~(MZ{WKC-lqS?I{+=#U#BKpDVn3%R$r$E^En4u_%y0O$XPS8BLev@f0Z9%jJ_VKY$G(KejK%mXNC z5O1)GHVODxS|vH7LIM{0TOo@FCR|IKVy?xJE zt2fT!-bZ8Aox>5RJH#STcZfxx?huPW-60l%x;1{~Mv9&wzX8&`Zc0)L#t4HmP9=MBbSf#y>(w?

>7y2C#`-H$mV^DV(N$=)iH<>*4wV|( zT|VlM@3cCWIr}Q9o3QOy?J&R*tVor}M0Nul149zATOGlUoWhKc<;VWkP5MFM6kCT$ zlru}Ug&t(a(c><**-$E#%i<;Z#TQY9Ek;K;oM?>-;eujYjQ*ol)0eB{+l;z0T&por z8rS5aC3!`^L7QidUY0gPw5dqA#Hef4Y_#f98&;_b{;;HwzaW#B<`q_fIoarES0rww z!KT`>mdX#?WkTi8-vJeL!z@M!{j?S5z^e_d2iO5RK}zMGscds?*qI`Mj(2 zFSCZ#GCkN*(0ZEuW?5d^zmdaOJ!*}zwF#;@@3V!VP*a)vT%H<{eXdiZKau6n<+i0c zJk~A^v!?vO#g1uYOKl>VbDpx2yojKc9Mg&|bFb18<*w%v#p-bR)pN@5M|Xx!<*d zbPr?ETrd@f%{D0}ENbCbN%YNOe+~;t5-q%&-!Upyq$PTEuQ;b2wexTxEVjCLh zLlut{13>?`ipPp!$mb&!j~6wFA5?K)vWN#bq(GWDg!soQo+Z){|3t;}SoE97^{}oD zhDL@{@A@ws@N5q>eTl^whcvH z`U9Z08%}Yz9v0fcud!{C2G(!ks{bF&3ecC6Z($p{zXVThlOqEONM8 z6*EH>>4U1 z=TUCdjcfC5k-Ry`PMkGWU+qg|&TdL_BP6v7Iq;u7eG&q+JTrE`VpYLQ)hbbt7-MlAzeW-CE$13cEk!&ITYZYZ?(^+M&0wYjaS!$g7E z+U}2tuiCm;ycvda2dQ#P;AyI{C*sW(_P{tQkF9OYn@Q)(*$4|%IOt`fOjq&MFSm+3 zh-)j>Zm=(osI+GC{L9I{jUZaK5OIfFXAe87KH*f)6{|Srw@A?m`8pIV?0m zRp-$ln#7W#!5pV0IZ)}58vBzbM9g-5u`_9)-v2bhR7RUlda+KQ$;0Ji>t0NF3*?b} zB?wObAmaC^co-inOI|6+{yQj@iju|~M7!A-70=>ZK_9E)dHlSTuVl5I1bvyp_IC2y)>b?6Q`Kpze+DnlGfWVO^9xtVg9Pp7Qy~x#rk{V=%sqAMU=`#uT0uf zG|bgc9$Q~nOs~)#Hw%eU-NT?saPGH;;MbsvU5eUt9umNhX?sd_l zuVwo-LZ(P%chr_y#d9o~NlLv{yp^TLL{X}GrT;6WdG!Mcm&}&b@`;j-jrHC zUQkyS^!M>jRz73Hrvl=-6VmlYMpKxZ-n}%nCg9CvF3V@znKb3uRwflnnWnrYH83^- z;fbhuArG_Qr0_NJUmH?}(_3`@ien)ry5G>}eEB706ibctN@g&h*zJ&cr2{dLjfb*X zZ|CA!1I=CwqAJftpbbGZAxW2AUoVV)CB_;&mx6tq_HWR6_?-yp zv^a28#>$4qivw3>2s!nSWS=+bs?6*+JL4_jo;REED*5}H);XmE=aedqL5A(XIi;1R zsVuIcbIPik>j(72$=B@zdP3@)a(7J@A0W@xjLf4OFs>_fPl$!n1sK;=it9Sve{tdd z3n3@-tdtWrTK8XExc_2_(ES$|?!PDzo$kN5aQ}r+m`?X!T)6*2C{m~UFD~4FArz}` zmS1eN?!UP3mOdHA>5X+2@Lv(p>Hdog_g_eo>5}rq{TD*I-d#3+%ew#K!u=POGxJo) zL2otn(NJ}_B9b$l#;Ut5#lyn;5xs*YYW{o?pp(Fq$683?RPR8d>bPvXn`CMXw+#T^4O;(5J6N|I-Y{SJ}t+BlN`fP$9-B03syKx!2OzP zM7)P#k&EQ3fmXOJeJaqZ`{Us8$(pKzrE-oFDi?!1SxdKa80MO)V6g>}Ip#Y^O6g#Bg8mMmT_OA#)Sm0PmJJ4N#8Et%qAk*onaStO5c$>x#r z+Lj#NM&@kI;oW3EgoETHggxbRTT{d622DGzw2PN}x2ANULW7otMsYj_op9OHs!~YRA-p=MuIpysfo+4KutdQ>^oG*WX)Mr^Tc2_oc%XYhRc(NRU zu(_OvaK7BID@Pp8mPd9$i)?unQjs!iH#Kt~gmdJ?-8tfHj$F2zlJ5ekKz@sGund1E zhv&j(D-DT)Zb+ zTxcq{@5x3lo+MgGczhrFATG@Qo8XR1?SOE}`DAxGvDmnf^>EsU_w zZj`0vzgzRsyTyjrV7+26`16<+p6rp4?>~fFzrA8OXyNH#6~ZBm@PgSc-Dq#LO;70+ z(+0yovRILLdrwuQE)tE&P3Vw788wm*9EhoT?m!go6W6T& z;MOQv`}NvJ3u$BouNv8xknC$vWpeki2C+41nEI$DY*_Hx0PY){KbGuUeUr`T8+=7Q zDEPErVOIn(oO$)idlH_sIh_@JE(|{Hcj~VKqoJ7n4xS37PZqv{N%#_$B8MTDMSDp4 zoVFe+v;>zG+k%%MNDfU;`NlU5Jnz@h`^rP#q(<5AVC*+EO!DJvJom$awu*_DZyYal ztqy0-Md-vf^1I`?0*9i}Cvtq{(b&UaGNBI@V4q48rZemdIHjJCrnQgVpAH_szZiVl zr}^&(@v-2O(o+lk62uO;>Vy-6&jRa-(|{mhu-tv3Y4St;Y@Kc2-gf#ACP??mf}!@_ zg7PPQ?L7`*+Hlc_8r0sK*}FM=lW6ZJNsjgs^ud&j4Xk|TzbtHD^y)i$yx>w|pj_{v00WuT@qPg5DEsZ7&UhG{CZG?h`B$|TJsWs#<3 zkK|g{<#*Wq%$fL3%D&8=c$X*G3!&`3AmuAPI;b!_7%G!9mBE=z4n8v-Q|G5=a(v3j zG*ca0Tlzm^J$kEzGb~VI?!vkDN=?z`TQs^Ri}q9DFq7=^U0s1PQyHa-_cxV6nx?Wx zQ(2>_Y|&Jf*xXcxXeu*QDPm1!f~GP+Q<My-TBYNbrO|pK#oL@EdfP0LY~PAfbvQ=xj_WDxG@HWC+u+a{y>)C|j6T&Q(|0zd z>Q_Kv|5qrtTi&90+1n&P;CCO~IAh?gM7p(z;)C{67PsxCA_pfC<@Vi_Y{;XO-5qBs zKGZ?G(W=_)EL(qx{SEFfzpLy6Rz)MhA*J%GY3OlUDR>bJo1HO&XwFxLHS<}EszXtL8245OpbpwNiv zfMVDB3WSL(7zWx~&|Ib+@gLnHI;a^7A%tBb&3M{j zFjV^H*BLYkYN!4OMuq?R{UW}KCPr;0^sb+f=1OfL=PdXR5VMVSyX#gpw5K`pACBqYQq8rUx>yo9v>KTN^BN*&*zUmEB5j>fum=| zc#b7J(EFS?%z1er^}JZX#p+o9`tL=#xDXqN_(2qi5j0C`uSW8L0{^XHRgtDlZO08H znm@IF-$0_tRQu)z5>2eyg&Ro6;{7Xr6j|jo!)h-@g%(58t+w$763xBZdpD41BGx{O z;sdVhN3*ha_6DiJfsCKTE>lz`_)q^Kic)Es))siVkyvPWU{xKJUBb%9G7lyMT3i%) z*l+uXT@n+~HXmIQf{T5L{!cE8)~#vE*49$z-9jmKyIp7!*LH#)_K*=%Y-pVfzU?}9 zsK3jfqMMkU6qx&`NOXyXNr9I%?RHJfN%7Y@v`n!v#h-3!**Z<>f!?Op*@dcW5KQ{uh7 zV*`ity?!lFRpgBnVxi`r-rSprLFixB+?#=#?r82!5>uW2F9??T|7z~d#mLHT;myU! z^7n7y9Sob>(ZUla2egxAA7_WZG7YEZT~ZAzLxBUn@q=0mb_2WVnjP9sWb@ z(P)X*qriG}wH|~0Z*=r-AoCm9$(tiKCiv%fLMt3h@UQFS{SnQ-w6pgXsP|oG?`X2K zfhDR_9xCx>@(lk{dJOgNDDmDy_LI>CS-^h$y-QIEn9s6O$}`3P4xY+<{6Ca>KR{b- z=>~-s`A>B7KF1dX{?^^wgriAb?%_@4J^lN8c;6mK7emQu((p$g`d>wQYC&i6I;JC* zP`)~m2$5HQ2K%Z-;ES8R;oL{=ph|(=3T;IqF+_--N=`N#A^Js0|)=;gg7`m12Q$W?z4;$OA!pYP@EA8pqUOFKIT z`sXbIy?dia{5|`6%X|-GDf(O$Ay{{~1bAbn{xwA)e-y%AcigDN=OLK*^RUL@fsdsm zt$CrCJb4?F{DcsUN@Xxw3qu8ZVm-7m)w;~zwx2h(*{~2Y<+CyblNjv<>}166=6?do ze6&*9WD=tVG8EIg7>a3|5Q=Hghhka|Louy|p_mrJ5M0V=84MvXnhk7BdTtNFq#$iR zLiq>X{;~bN1sS##liiZs;d*kvx&2%Fdpr4PN(oIrDFjnG+LDCwKM29Zr)4&je<=hL zpQfZxeryQ#bLO9Ni#N&_A3~%`R$)_ZC!$Pf{}YO7BNU2h-xG>ypA(8{s}qW8yAy(a zY9k&(U^MB4Vw(CwF-?G>n5Mx{Op{?KrYSKL(?Wh75O46UrCq>~5I)J%9?+IghWrTNQ6P{!@o7hB^NYaW58N%tzndZE zgoj}ZCTP}cDd<1I*r(ibbQaY%N1}*?D z^f$f@OHQa5-hQ)8m=s;1Ah9XH^y?CIT1VL|1-{MyFp~K~lYIy>{a_A`@KrK;Q~MSy zttg0p0uGhGS`WwSjDF`wbx0)p`5L{vst(b%32;AP5+Jo&>&(aQgq}1B5TQ2&>}H6> z{(UfTXn~`FpF#({8kF||564p4Gl-uAJ_Chuma6hw0c*23}*M$4m-R@2F{alY{z~!VLD6y5#2EKsIt=i&dH}K-%`8~BxXW%JlZTg1=!j~Y3 zf4Oz01o1%d>4#73{2l@hF$W);4MHy%nBCut35N`i*XrSa0k465tPK`$1qD_I4U`l( zQcwOn;N5hJiRLH%Rp8(1TFZx{9yryZ1vUbvpQfULMgyw}@b9pP&A|fcfHhRUA24*N zvxgzT{ZN7Yp!^8n@6aN7K}-jz^ph~EMSLjWaS%c?d={8~6UJ_`O~AXM5Mipp{(AB! zf!73YsT2QNJ$|$kL%2>s{QDWOU7n9>*gk|nxNkjtFYxsybF&BP@n_b<^s@=bMtx|` zc%dGDGq81rjk$ux@IDY|Ow+Ozg=OutdI^34J{?kntM&LXIBZ-TeBDYdkPGaEQPK%I z;cmb`grpw`OuxPpi}F<;PXqz|m1Yf5{G$>u{Zx?C%@OhGzckjv zG}LKoc^Zt zxa7Z$9=-j4!^4=f0&bT7^deeOZPUd#? c@ZS$;>>BQ6L;Xu9AW`CdUY6|V#O)g_u;hZ^ldz?Jvvx*lzqwIVCnV z<*&bKy)WK&aW-qo4_};Z)ae6KtCD)N`ourw6R|x+*`M-w>=XPmd2iexzF58=*V%vO zBCGfQ&gy65>G}KozJH$o=#Re*V9ipd+b*kbb4ly{aR0apR^JM~hm zpf9hVcv-||DTtDF2S$lu( zrhT?CrMHzeq<&#HUY~#YIz^qMsL_h*=k-l5k5Oc%$eBUm*vm0>teF$kdzm$}1MqqS zen;xhODuc#1eVU6x&Pp$PE#nMA{h7HOBbsM>p{Hj(zYtr(l|03t~k;O?#RQeel)V2sfZ%v#YjMToabr6H2{FH)%*hf!6H_#!JF{9R~(*Z;2djzu}fDw&8~s6JJBkpog-+ar-6-+zXd9ZL~HIB{OR!p7nU5@MPoZfM)=n@px{- zvlq`Nc)rC`=Bar)y=Qbya?xAd`@-e7E?nTAxVp*QMvZ1tHwL=49EuJm!WABoF~pX3?VCALqx_+|g+=_rCZik==Ed&#$RDQ{J6> z^$_9Dns!~T)7(QZ&zkH3f1q61{loYt(A1N9&+4$F_naNJDyu}!?eUx|2?Jezi7f0n zJhBvC=P56#d9-I-L=7LhL65v}*^M&G7@{+#^Q+|Uk;y$?H8IkC<-HwaXFm730qPVe z;F<^Em;%Lowh!RA0ww&f7QojEl=4EEIx4xx4@5epNWJ(mQuB=hefcmiz-a{r@@I*2 zMuDNcmN;h>7|GAq%pA3q^VK!2|8kAV4LN^YH-9j>57^1QgtQ;cIIY1X(VrK)8RsMtEus^rxtLI#coE(6h{ZI;NfOaX;OL5zCZav9-OS)S5GGSZ zk9tTj7yngYmL!;pYd`!^3&8ygi}Yf;^s$4%AH|z9cFG}eI{*b%0lX~o0R(WN8lvRO zH#BYe`9;JO;4zd~CQhT4jAb^`#dEMXW4Vniv0eUhLkE6`Y&E$>VkC)gAtjUw&Qf21 zKPFDzG`SgHEf-EsuKFE%tcwv;l#Jg%2K9#my7-h@2ImS{EM|fHuqwMx zbCQU&iMojV4Ja`vB5Fugs*NH~k7Sl8GQ9>&t*RvWBa)b}V3U&VZrb$2g8-5c8H5c9P`J@p6@z97PlFEZ9MNT4yy zw-oi$%R}~JXmvzr4#L$z!U-a@GyEFs9i*Hl%0FQ>eS(DVKxn!K6_mo`yilT?B=}gw zPMB*%1?nXEHt;?7i&HRHEH0Sw6f(k+uO}l~;Uel_qAEvOZUmW5axod_a`1;THiZPp zVG%D;N4}(kVBYSoyFqEen%)gFXwCy9qvBr;IpcolV97n8#GS_pYz*<`_-V=h!vs}I z($66!H)(N{l9t)9Jbo>Aoj~Lf(7;z2comeOV>=BJL>M2>HP*@`!CdZ(0QFNP=!alR zj7m#9|MZZTB;OaV0Px zY&-~YU1wGfvc^|YJ~R6RQtidw%H~_d7mH@ZPG<9?Z2$DwiEMs??XQlVcq>~F6sn4y zIGHVowmFrt6DP6-Nj9ipto2D0n3$icv46o<4L?SSG}u9k8YSNT)6Je7qq8Rv8U4DY zG4|c_oW&Xk&=-py0wfH4a+&mL99zF`LmwyII z1m6R$kNZH0nc~e)DW}g#1x(oA7(#Ch&V8lgKl= zS}ci6_k*$iwNQ}8M?-N_J{kUWJ_CXod;ut#d@cN0d?nmw{0VTg`9RQfxCu46yglf7 z{C!ZG^Gs0kc@f+eyv;N>yNZ7ee_Or}+!B62!nWgsdYP;}Zv{#zUkz>DWcQir=-4V|CSnMjHM0mq;M$o*DKrHB zq~r@U8UTM*{$dtCLjE}OuWCeawU77<;;{sc2(B^(B1FfUNp~c3)z6!sWK>Z^$vmY%FG15m^BV>F3Yrd@rwO2+7c?I<&nVVVLGwZLtO6s&dD-L6;qm`MAzLWX zTBOlLA!75%E&d}^nq_d;Hw}#UrsWSGi zX66di+2~S_>~vR)zSlrMbwCRt6hj@*c!TOnp!-R_HON!+2|@Z;bO2STXx`OTk0kU( zSiUOhSGn%4R1xWs2kvSS^Q`cw*18is`qkEGv%l0-4Y)qZ_$PV}8fkyH$F2d_S6pG@@J<__4D`1bbuCEoaM_Shj1?-X5by5L)q;;KAz#eH`-zZ>@w64XyOyGHRK^Hsjb zJ`wCtw+8$k__b|-(bQeLTJB@N_n#EHMc`lJkbvF*nHUNP+lezAyQ|sApICGt`k%gXV!+kV4KXYG)bn2O0n4FVb0jIvng~>UgV&)qmyWHPA z4qLUB=NYJ$Q3lK(mefzqx<6;q9wej*rBf`L?#%&cW`k<)c!1V6sA92?1MwGKRj`B{ zNb^;!057V^*I`<`x-CO5&)EAAqslx_;&X(ddsyKDujCIT`mb@>tZu=2K7}A%U*^mg zHi8;z1U1wMYN!#^P$Q_JMo>eIpoSVj4K;!q|K$jJ#Q-|_zi9-Oe>~9if99~M1smK1 z`RRkV^CNQbLoKF$ZD8_oNyL`Iaw3>_Ey2q|>kODgHg1*0G>6}V{Sq zv;|;#&*4n;w1F<}AyzLNS)vrCA+EL&G=C(IJ(L}_3;M+!PJrz)Zr;%7g%s=_o0iGE zKg-+ZHB&7^pk+`rx=t-apk)xUM2g%vk6Omrd3MVXXc@$@m#qRVgHSQ^j*wj+9@^zm z*kvVe0oTL(z~wxSTr3q4vDrhr8$DL!>qyvLS^@=(i~)VNrt%&6fPDAiHvGNCkEA3m z1=($J50%GN=%wA{VbR~pHjmuR6Xp6xnzZ^AT6WnIU@;o?_$u=ZsGI(cx=;T2NE3fc zl+v^R#yf@tu56&%eZR|so`oFKV~meVvrB{AJ>is;&Xl!En`951OE4678O`bx@(9h0CDu)zr%j2d8$ygO3dq0!@ zCGy?BHH}GwKzp7@!Nj7O%$y=G{w>qLB*Gs5F}TpMmcV`0pyaE-X)6&E|2&0MMu1wO zsMlf!)pUyD6gz2(ZHhF%2{yAwwpf}WY;C}CA0vy;I7us4dg5qV<$8pOb#nFmw3uYf znW*>rI@m>RuX%U=WCL4a?G|^N65I+ahBPJ*m`7qOOrk3dZH29Y($H4eJIHouH;+JQ zD~v#BD~v#BD~tf`=6$(1w3|ny(5@GO(5@GO(5@GO(5@E&nmd%q>&8BSX(Wb9xLogm zS)|Y{Oz|}R7UWdd--2uCcVY(U(#vSVsjrMco7QJT#;w(LVs%B$Z3ZiIdwT%R5Q zHpFvGoRal5KNdh6#qCZH14m_7hRzWO!CT$iHd5BKt2*H;*E~ zYt{-mZE3po4U+nd^OubgNrP?QO{8 zc&mT1Z1GrA>mq^=w%RAl!H+dDo?kmpZUo+l$y9b6}M=4BUVNE45RIW|;#k zG#?VZ+<{}6@h+rqb;S)(qdRsil!?o00`akvP-?fjM%rnp(oi9CP9RB?Hjyg=X_;vV zH_SCWjLSy2f>n73GY-m+107;}BW3AMWHXeCjAcpuoGe{dP*RVCZ817yc8fe#3W4ah z7=tIPN~<7Qw#^7BbU%x}(YPR&Ez2+d7ovX5=x0YgM!N+8ml>h5N=I2OcVM-Ovwm3- zUnVn`=krOj-}0u)?(TGS-^PshM_*2pf6U% zd7~qQgyzYXEAv%B3}~Rn9+H(Sn`0$Ae`Ru~L($Bdr>r4ADwzH+wGuo1)f)Bnb(&M? z%(&~goAuRH#!I7Q-O99{H=^$QYS%nUffrS1qmYOGPJn9dJ|u5|7X3Op9WrpL?SWb- z5AF}qT^d7W*H!sEUskP3=hw)GR^>^V3 zkLP=7UoMW5Nw1UFKHfBg65E7_65DJMYFhk5%b;4+vUkY9;|2c1QFbT(6%D`m^%%z3 ziB~ymYVd=oMZJf5nQEqKs+p##W}2p&X_{)LX{wo~sb-p{nrWK@|1DY@~<;rtnCtS%TZ0+qLnx2HZ#?8KqVa^4C4Off6k!&WHz9Pt)p zRx0{x?-=-3+49``0RlX32jJf2^6u5i{AKyr>JnZg53a5%D}n49uFrs7B+TE;7sE0I ztt+?kX=EybR+ZcMRQPp4Ys&4)Z;1o4`l+IRw4&UjC^>@GlW!=0zM$3QUga+kw3ghb z{KbM+l5Z-1iJ*1le&sI}$@0WgMLt?Z9^@Y*2}4Dh%zQc#!+z=0{wB1Be4lFzkm-cz z^P)fcN^wLUdOEw1X5yCwr8I)Y(mWi~aM}z=D0oZ%n#A6W^socEos}c9=`)G`i72!~ zI%OzAyoSubtNhWTKj`l%f4mrlQ12^$l2`}-VdYN~G4LNz{!H->{2wTPj!1_8L*>tB zu`faCN4ho|(HoZD<1Oq1Mw>DTYY}4AG=e@>KzbaTk>+?!m3$fz?`)*6e@N25lect46YoIO z>%$aI4~eZ0i`IY?jYF7As%ZCzq*n9Xpf2qR#ERY15<6SdwaG{;@E{VV5$8H60iM#$ zCRDK$l8h#llSN@4;2x(8?DC4a9^~;V-Z?5>A7*CS2Xg(ICWAghy$uRWQYo=oQ>MUFE+o~N=Y*s-%9!Wk{aq+qiw7TvTTqZDyVzRd&Ulqd-)>Cvt-2=Vx)WuldpUsm!uv z5;5abG9P6-^%eIXg6!M`ky530k|VM+SPj!6s}S|hU?o&VjzaZl&q7C18b{|oxWDN|L}Scvvg5x)jW?K(O7`M&=75TGHQ zv6~gE8uNZ_0%F37JeZD3WgNhLY_%22IDl_BsElK*G7jK*HXh@94T-2UgNg7pMHG{Q zXu2;0x^D=gYUXe9BTS)>!sk+$b%RO-_WhV0X&wWp0*au10!Bs`OxE)NZIE$!zPi zm=EOfwJoq49PvUf+&0P`^8!)kD*xIS+DBJHg}r7Rh}|yjD*62jX`}msXxm8CUp+cQ zuLnY3710`!qAC=3x;ok!tM+X{#%H^1G+kx$?jV}MQoUf_q^15DDJxz~j7>n#M+;Fp zo~NHNPCoqN)5&{4p2$~&VDW1BuUGyEK1B9D*$+KcTY>M*d@cp1qRsMYb zs|>u9Q#Kovo4Hs6MP|WLejII++ovR?n{oS;g#0?UPf5sc@$K^5OLR(-v#zWx4$b5# zE+!zXnf59#M=!#+LGMNt6XVTK8mxvdQ93Sx{u&<$5erk@$JS->f5^@2(vxX_^R$xJ z)$ZmQ<)^*PAJ);SOUBF2sSCw#?`;08WQv(JLRP(eeIlL1x2ISvH=VhZkvGEKQ67J} z=o&h8cl8mpNcW6F5`x13ni*Qz7odtmirQ)(D70=(woq*RXS=s4R$@4Kw8ehr`HooZ zYI)-;$ag6&H|c`VF5VA9}TxFOXd~WMHN@9_~!(-;kxY5nb3uJOCkG z-!9j0u(uIi*hVCp+D44p*hJl&apC3+5t&YA@50R)I~WNXk%9_ ztKQn!n$MEIZKRtrX*G0HrnH8(9H-YbY{pZ#0^Qk+C#1F<->k{u*U7Ur6Z7dRjQb*8 z5Mq&Z6UO}q`E~tMMC`^z7(y2FE|4=`voFH9aS_HAp^GqXT!c{~I$eZu<01^92%Rp% zxN#ANP_#}LVcfU~LnvNfBfosjz6j&SMVK_0oiE;9$bW`Mr;9LdT!bM>rqe|jH!i{u z()BK~)$8^}7&k7$D9y|}OpbZIRWda|PkSO+k<?ogjJ*k-XO1;=DC0gRM zsK3bxzrbr~bXP8Me>{4rAR!-wtTpn~>o`!B)~5EuJA%nq>tQ2*bT&wHkygek@$gky zV7lqnz+Alz`7w`kKcr-a!wcrqZEZp_Yj+Y z_C{v&i?BVuUsL4o+AwP!SbWt043aK7pL|52n9;DnvdqF2jTYuocP@*B8|W%}lX!fue5sb$###=7rUu*8OA+?fgv zwBblsrJT4qe=yxq*(BmVLX$XG#H5%xE|*QBoXSO8bidy{4{6;b#!zr=(Hy^v z*3z3rFe@{(ig?Cm%1<}vz@#t3eML6glEZh)K5#F{>Mc2r0fwlxoXGFQQURt|&vnw$l9t$cE8Mg-lE>Bv>;X32N9rk7KsK?}lWhHDYhgsYr( zma0=d`ONBpoWx-GbUg#!k38W4V02WeY56i|TPClRS8vPX^JF#L!&1V%Ah*K3K^}wq zh_trn@egDX+~4Ks?b-aeylZ=oh|iR(w`Ys|O!+2W-7@7_ux^l%J93cpwmWk9I{DWf zd3>Lovm;NWG?Qz0NpKg-`Ebw5n%#M#Bu{>}8>z^XVh4z^RPqPAMU5}mc4mG z6w2j$bH&g?xqELeYVj1&ie%)zT#;WS+u=35NRHi?&Zo%P`;yTKF5OoYwJ-v<-(w#7OJQ zXZ>_t$hmFg+(UA%LOFM*&=%CM0Ip!`Gtt*6?A$9T#cudoMZwN{@J+93Jc6yh%8_>t zxK9TUy6b5_*@BRBQtq6fJ4frzk-Kvg?;O!%hH9Z9GUrGiUiHg?E7;#LU9b~a<&}?o zmDcvL5{ED!0qMZybG*?9gnpmHC)oawT%A1nRYr_+mg1bWERpWIHQuS1;@axh$t`t7 z?$Rh`Ey0}Nko>W(xfmHEQ;y~N&&6W(5sZN%EN#N9fx+ko<9$EyBWSac!98PNdrl5Jo|x>cp@PdU<}BvEm-ik|6rMD>;`sfAxz{+lokpoKW-1diVPKYJD(fG zoTF^Xv@Pk$5F;NG{W@4zfeKTu+{mD-?8#KtWG<28PTqqK^^22vma-ttJS4rRGRc5i zok~{*v`<$7hnmWIlz*_PEXOpJ;h4&7Ol35tG8t1DjH%2;1&BA5shG-8Ol2mfG7?i+ zha)|RJLNO z9RkHoQ?6ygY6gCDL%OmRL(w*Crm_@M*@+^_!{6jvWD}P%&2x)SC-Lv@OFmtje46{# z@ENtu7l=Q&{{Ut*MjH)dr_uHYa!Uk8d86Gum}(jAvv6h7=rErArC$-fEQVw{wWm{vR&E9p@6~=J#b(Y=)h<{nUg!CpF(EZN_QL+D z(P<{Rz4@?Y1l*8haq6JySyy%FXM z@Jk}GcHFB%Gh^Rl+|V?4dAoK+#YR*YBeHW~dac;tFD=5kEq9f})v#*Q^+JrSLU*|` zjZ%8w4(I=ZZQT$Go~VKwP3To_M7B0Og@&uph$%863JtT+XkKiXV*+D0i@SK&z^9u< zk-zrKl)0!+)z$<)+9EnPrH)nmOmJPGcsJftXz(nZ z8@TJMbL~iN;a2PhrBF|+bw&C2*k?7#Btq_g` zb;#OBU?_!c8W{C~%WsRMRO+O)pZ)_r^9G6!h(tg2+}c9U+X-B!vSX!gTzmWq67}iY zi&v1SgV$;iL~CR4u!yP4*A4~g-5RvgAfWy83i=9@)$Tt4;}cchz`?`fLoweQSbank z^3QAEKO&l&ye@G5Q&A}*A_CVP6|F^eL}1}jk-(SKK7UlSaPxJwM~;ilLX<`Y{&rIA z=Z9*CpAyqJI{Vta--wSmKUcf#jF``H+8oIHR#b@lo7B$xRuqZ})X!_{qWN&)aCGhuOMXIPwsa^N0$j3iO1paYe z+=^o8dqD^;#-;`a{w6vk(@>(VrMehm@XkVaieOV<)o-FH|30wwH_;0dkxjpg6t~Dp zt4-6izi1*UBXGM*%NBhz0xMivu9~gY?saKhEk3JOi_*rKh-qSiHb(I89@>_q;nDFJ zcwBf)JQf}|9uFRG?Y5+dE*EPf;(gz0-ig&yZoYB+Z8Ij!m{j{~qHjQaY~St!$M+f9 zZ^-zO(zO=n-s^QVh^LgeUyv#ot8Xo&$=8y_}A0xjD3QbmM2 z(3{|iz?3$==Da?z2rp6U32bfS8x5n1Y3obmr|nn0{kouDX=*xyk-B@N{t)l(GigGU zi3ue&lR#aGFUcZAEu;Za;~*3tsB7!9L>q75Y+GN7q2@k;e<3O{(i>=2;=78>d~k_M z!I~1^9c0$&?R?D)HFXILEAhp-DZbZGuuEzuw1Wg+7dYC%_bnOt{!(8aKNR>^sc#qT zJMc=GZ$Cd5xVTZTrZSZ68^%?IXjreKfHl zU%m~=Y;7M|tL-BrwS8opwvS9w`S{sD)6Ty2WQgx|_T`Zw{@U4>4nqtibn$(UdNI2C zh9JG8y80%Q8Sd<=YU@~6UpC(qFuM7&b(+%zhIaEM1rBxhMUbx?CRqDuH|T>61~&CT z7GZ*}o)kewpb&3mf`KtTeTVq0KyEM8^|`>HUcQz5yV^6od@Z@LtSz&m0~&t-2|I*htB(^-5FWSp{8gk_&fzkbZgJYfiU^2tL1iiGRc2hsp6aO->bbxQX--iL| zQ_uzeuEsP7{|Kc1m4+~)VFO(a(NZ#Igkj=GKprpr>}1kN8ID(nVUpJoUl_j`cF`LM zB=C6{rU*|2mJak~bf$sR2}fcj815WQVzh*IF!4VP!;=C}4fMsSg^eRZL1;t`$F$f9 z$26jbW9l)&G4&MTnEHxvOua=I?#XB%4I?n>Hyli99vX%zfi#eY^DDi9{eygk%^aI1 zD<(NwVuj1i^9B+I`?~n+8qsk(KO{%tXgL)gt|AN*pL(ls{`@dZe7aH@&R-jb1Dpk( z8R(1guL~nmCUJ5e3Peh1?dB*UOxK9QFhv;lWzjQZ0C0$O?_OnqxOpH`F(e#tgnT1YyiH#oM5 zgGYc)EA17=r$VG9rz8IbXRE>lC;%;Eod9lZ z(>w({vLOKbE{sp|wA6Lv(;)u~@C`wE;?u&{;TMB{UGVVPPH->AR)q`4pE9Og@JL(67|PUd(iy#Z4=T1Y#5!We!&MmT>`sDIU16%t4o+bs2z5gdINVp|!ZpxBJz#%^EQA*M(t9S4Hj>d_SuUBapzl{3`_5<}ghB!!57m ze-ws^Utf47|6CYWd~EYW3_t4FL7{zrhd=^Dab)3O%E6d0O#IKoF!AY#!;vTc91PeF zel&3JFkhUH#&C!9gd#Ov8%Cl~bzyj&Em9vwqKGbq;Tk0pdoGMbBCI6v>j+pw!>DPp zgQ&HJ(bC1}VqXI`*-r`wdXMxKX3;lt09i8>PE$-Q=(9m|jU^Vi5O{B3=}2Ej>u|A& zAlJeu=`II}-2qG=zM#!WQnMWROyDGf`NM;~3o`y!Sp8!a1*7xiez2wDpqd|m!{z^I zgyS)BqAw#s93Mpb@lQI8qmLUosci{-3rYyU#Qx3L3uy$j~J}`2Jzp3odGKv`shAf1g6?xBSE-^2b>!`%%%9A)BRUQunPj= z5gu-YzXrZZFsmCBl7jCW@h=18mr1V}hJRYcL@!)l9x#1{#HolLeh^R`nLHR^5b(Rf z%dHf_wZI%j=oHz_z~Kt#0Eg%BQQ+jTDti(bzf5wXk)Y=qh4*i2L^uFkhGCL6$teMD zyk|i{B^1P<2)}G3{}V8MKgG#WET*#ckhe>~!;*npU|t3tN?!r6H+aPf`uz--CK>+I z*rMBM6k%5g(1%$Zg%g3Dra?9_9rz1GV3(MO-3|N#nw(<;j}jjx<}{h-8{yr+WiZ0E zDn7qp^x2FbgKd@)aJW%`^wuLq`2*f=HR2M#HOzP|(0Cu|)4 zdSLnv7-34l8)5Q(O5tZ9lwm3}Feq>#On~@aSYKTzfgY9$93EjwBYbruOqb)rOKfTb z->-`3t_Fg_4+A4!^`nl2{&6Ba!VSRAsSvgEJ;2oNX%LLTAW8qB8!mqu_(WI+&WHGD z|CB>44A?IibLgy@iYOEKDRfM9xm?=N2nd(Mn&Bsn0{qelN8)(ZhZ3p?mQX72O~Cm<+#EPO105RSKEMw&8DO96 zQ39?3;bkb8A1sl{z-*4w&N-XbNWq*&SO&U}#elkk)M(5agV3aQdn2*;fbT>PO$TVi z$HIxd4AbZvl>Y%3KUgT)GG~{7>0?z+!DmFMTcerOJg7sy3K)xR$MpQH0|?<6@81Yt z-w4kDrVkTRjFg}U8u0^-@biuER$%&imYqO+E8w4v1b%3QE!JWUzQ^?1aT9$f`4zi*Jt}=otw2S!ubj^bJYMa~a8XZS^$NUE?Q14V zO9GKM`BEOc$rlmy=LO#hfq^&qqFpq!l=cctyvf(hMKiSWUV%q$^1Z`f4ve}PyGUmO zcixQs9~O9uUiES4ssk%6@7;pZ0 gV9PXY6OQZ?I1Xrx9Oq*r0>0_c{d}PHbYJ5C2JcbWt^fc4 diff --git a/Software/Debug/Dashboard.list b/Software/Debug/Dashboard.list index a3e0132..695d05c 100644 --- a/Software/Debug/Dashboard.list +++ b/Software/Debug/Dashboard.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000188 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00003280 08000188 08000188 00001188 2**2 + 1 .text 00003220 08000188 08000188 00001188 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000030 08003408 08003408 00004408 2**2 + 2 .rodata 00000030 080033a8 080033a8 000043a8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08003438 08003438 0000500c 2**0 + 3 .ARM.extab 00000000 080033d8 080033d8 0000500c 2**0 CONTENTS - 4 .ARM 00000000 08003438 08003438 0000500c 2**0 + 4 .ARM 00000000 080033d8 080033d8 0000500c 2**0 CONTENTS - 5 .preinit_array 00000000 08003438 08003438 0000500c 2**0 + 5 .preinit_array 00000000 080033d8 080033d8 0000500c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08003438 08003438 00004438 2**2 + 6 .init_array 00000004 080033d8 080033d8 000043d8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 0800343c 0800343c 0000443c 2**2 + 7 .fini_array 00000004 080033dc 080033dc 000043dc 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 0000000c 20000000 08003440 00005000 2**2 + 8 .data 0000000c 20000000 080033e0 00005000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000000e8 2000000c 0800344c 0000500c 2**2 + 9 .bss 000000e8 2000000c 080033ec 0000500c 2**2 ALLOC - 10 ._user_heap_stack 00000604 200000f4 0800344c 000050f4 2**0 + 10 ._user_heap_stack 00000604 200000f4 080033ec 000050f4 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0000500c 2**0 CONTENTS, READONLY - 12 .debug_info 000074ad 00000000 00000000 0000503c 2**0 + 12 .debug_info 000074b1 00000000 00000000 0000503c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00001916 00000000 00000000 0000c4e9 2**0 + 13 .debug_abbrev 00001916 00000000 00000000 0000c4ed 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 000005f0 00000000 00000000 0000de00 2**3 + 14 .debug_aranges 000005f0 00000000 00000000 0000de08 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 00000452 00000000 00000000 0000e3f0 2**0 + 15 .debug_rnglists 00000452 00000000 00000000 0000e3f8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001b63a 00000000 00000000 0000e842 2**0 + 16 .debug_macro 0001b63a 00000000 00000000 0000e84a 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00007cbd 00000000 00000000 00029e7c 2**0 + 17 .debug_line 00007c2e 00000000 00000000 00029e84 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 000a14ed 00000000 00000000 00031b39 2**0 + 18 .debug_str 000a14e1 00000000 00000000 00031ab2 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000d3026 2**0 + 19 .comment 00000043 00000000 00000000 000d2f93 2**0 CONTENTS, READONLY - 20 .debug_frame 00001670 00000000 00000000 000d306c 2**2 + 20 .debug_frame 00001670 00000000 00000000 000d2fd8 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000075 00000000 00000000 000d46dc 2**0 + 21 .debug_line_str 00000075 00000000 00000000 000d4648 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 800019e: bd10 pop {r4, pc} 80001a0: 2000000c .word 0x2000000c 80001a4: 00000000 .word 0x00000000 - 80001a8: 080033f0 .word 0x080033f0 + 80001a8: 08003390 .word 0x08003390 080001ac : 80001ac: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 80001ba: bd08 pop {r3, pc} 80001bc: 00000000 .word 0x00000000 80001c0: 20000010 .word 0x20000010 - 80001c4: 080033f0 .word 0x080033f0 + 80001c4: 08003390 .word 0x08003390 080001c8 : extern int ts_on; @@ -143,7 +143,7 @@ void ftcan_msg_received_cb(uint16_t id, size_t datalen, const uint8_t* data){ 8000220: 2b0a cmp r3, #10 8000222: d10e bne.n 8000242 ams_last_tick = HAL_GetTick(); - 8000224: f000 fd36 bl 8000c94 + 8000224: f000 fcec bl 8000c00 8000228: 4603 mov r3, r0 800022a: 461a mov r2, r3 800022c: 4b0c ldr r3, [pc, #48] @ (8000260 ) @@ -179,7 +179,7 @@ void ftcan_msg_received_cb(uint16_t id, size_t datalen, const uint8_t* data){ 800025e: bd80 pop {r7, pc} 8000260: 200000e8 .word 0x200000e8 8000264: 20000028 .word 0x20000028 - 8000268: 200000de .word 0x200000de + 8000268: 200000dd .word 0x200000dd 0800026c : #include @@ -203,7 +203,7 @@ HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle) { 800027c: 681b ldr r3, [r3, #0] 800027e: 2102 movs r1, #2 8000280: 4618 mov r0, r3 - 8000282: f001 f959 bl 8001538 + 8000282: f001 f90f bl 80014a4 8000286: 4603 mov r3, r0 8000288: 73fb strb r3, [r7, #15] if (status != HAL_OK) { @@ -219,7 +219,7 @@ HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle) { 8000294: 4b04 ldr r3, [pc, #16] @ (80002a8 ) 8000296: 681b ldr r3, [r3, #0] 8000298: 4618 mov r0, r3 - 800029a: f000 ff17 bl 80010cc + 800029a: f000 fecd bl 8001038 800029e: 4603 mov r3, r0 } 80002a0: 4618 mov r0, r3 @@ -263,7 +263,7 @@ HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, 80002d6: f107 0314 add.w r3, r7, #20 80002da: 68ba ldr r2, [r7, #8] 80002dc: 4903 ldr r1, [pc, #12] @ (80002ec ) - 80002de: f000 ff39 bl 8001154 + 80002de: f000 feef bl 80010c0 80002e2: 4603 mov r3, r0 } 80002e4: 4618 mov r0, r3 @@ -371,7 +371,7 @@ HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) { 8000378: 681b ldr r3, [r3, #0] 800037a: 490a ldr r1, [pc, #40] @ (80003a4 ) 800037c: 4618 mov r0, r3 - 800037e: f000 fddb bl 8000f38 + 800037e: f000 fd91 bl 8000ea4 8000382: 4603 mov r3, r0 8000384: 73fb strb r3, [r7, #15] if (status == HAL_OK) { @@ -419,7 +419,7 @@ void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *handle) { 80003c2: f107 030c add.w r3, r7, #12 80003c6: f107 0214 add.w r2, r7, #20 80003ca: 2100 movs r1, #0 - 80003cc: f000 ff92 bl 80012f4 + 80003cc: f000 ff48 bl 8001260 80003d0: 4603 mov r3, r0 80003d2: 2b00 cmp r3, #0 80003d4: d10d bne.n 80003f2 @@ -472,7525 +472,7493 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 800040a: f000 fbe9 bl 8000be0 + 800040a: f000 fb9f bl 8000b4c /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 800040e: f000 fa0b bl 8000828 + 800040e: f000 f9c1 bl 8000794 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8000412: f000 fa7b bl 800090c + 8000412: f000 fa31 bl 8000878 MX_CAN_Init(); - 8000416: f000 fa43 bl 80008a0 + 8000416: f000 f9f9 bl 800080c /* USER CODE BEGIN 2 */ can_init(&hcan); - 800041a: 488c ldr r0, [pc, #560] @ (800064c ) + 800041a: 48a5 ldr r0, [pc, #660] @ (80006b0 ) 800041c: f7ff fed4 bl 80001c8 - blink_state = 0; - 8000420: 4b8b ldr r3, [pc, #556] @ (8000650 ) + sdc_closed = 0; + 8000420: 4ba4 ldr r3, [pc, #656] @ (80006b4 ) 8000422: 2200 movs r2, #0 8000424: 701a strb r2, [r3, #0] - sdc_closed = 0; - 8000426: 4b8b ldr r3, [pc, #556] @ (8000654 ) - 8000428: 2200 movs r2, #0 - 800042a: 701a strb r2, [r3, #0] blink_tick_tson = HAL_GetTick(); - 800042c: f000 fc32 bl 8000c94 - 8000430: 4603 mov r3, r0 - 8000432: 4a89 ldr r2, [pc, #548] @ (8000658 ) - 8000434: 6013 str r3, [r2, #0] + 8000426: f000 fbeb bl 8000c00 + 800042a: 4603 mov r3, r0 + 800042c: 4aa2 ldr r2, [pc, #648] @ (80006b8 ) + 800042e: 6013 str r3, [r2, #0] blink_tick_r2d = HAL_GetTick(); - 8000436: f000 fc2d bl 8000c94 - 800043a: 4603 mov r3, r0 - 800043c: 4a87 ldr r2, [pc, #540] @ (800065c ) - 800043e: 6013 str r3, [r2, #0] + 8000430: f000 fbe6 bl 8000c00 + 8000434: 4603 mov r3, r0 + 8000436: 4aa1 ldr r2, [pc, #644] @ (80006bc ) + 8000438: 6013 str r3, [r2, #0] can_send_tick = HAL_GetTick(); - 8000440: f000 fc28 bl 8000c94 - 8000444: 4603 mov r3, r0 - 8000446: 4a86 ldr r2, [pc, #536] @ (8000660 ) - 8000448: 6013 str r3, [r2, #0] + 800043a: f000 fbe1 bl 8000c00 + 800043e: 4603 mov r3, r0 + 8000440: 4a9f ldr r2, [pc, #636] @ (80006c0 ) + 8000442: 6013 str r3, [r2, #0] while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ dash_tx.tson = HAL_GPIO_ReadPin(TSON_BTN_GPIO_Port, TSON_BTN_Pin); - 800044a: f44f 4100 mov.w r1, #32768 @ 0x8000 - 800044e: 4885 ldr r0, [pc, #532] @ (8000664 ) - 8000450: f001 fd62 bl 8001f18 - 8000454: 4603 mov r3, r0 - 8000456: f003 0301 and.w r3, r3, #1 - 800045a: b2d9 uxtb r1, r3 - 800045c: 4a82 ldr r2, [pc, #520] @ (8000668 ) - 800045e: 7813 ldrb r3, [r2, #0] - 8000460: f361 0341 bfi r3, r1, #1, #1 - 8000464: 7013 strb r3, [r2, #0] + 8000444: f44f 4100 mov.w r1, #32768 @ 0x8000 + 8000448: 489e ldr r0, [pc, #632] @ (80006c4 ) + 800044a: f001 fd1b bl 8001e84 + 800044e: 4603 mov r3, r0 + 8000450: f003 0301 and.w r3, r3, #1 + 8000454: b2d9 uxtb r1, r3 + 8000456: 4a9c ldr r2, [pc, #624] @ (80006c8 ) + 8000458: 7813 ldrb r3, [r2, #0] + 800045a: f361 0341 bfi r3, r1, #1, #1 + 800045e: 7013 strb r3, [r2, #0] dash_tx.r2d = HAL_GPIO_ReadPin(R2D_BTN_GPIO_Port, R2D_BTN_Pin); - 8000466: 2120 movs r1, #32 - 8000468: 487e ldr r0, [pc, #504] @ (8000664 ) - 800046a: f001 fd55 bl 8001f18 - 800046e: 4603 mov r3, r0 - 8000470: f003 0301 and.w r3, r3, #1 - 8000474: b2d9 uxtb r1, r3 - 8000476: 4a7c ldr r2, [pc, #496] @ (8000668 ) - 8000478: 7813 ldrb r3, [r2, #0] - 800047a: f361 0300 bfi r3, r1, #0, #1 - 800047e: 7013 strb r3, [r2, #0] + 8000460: 2120 movs r1, #32 + 8000462: 4898 ldr r0, [pc, #608] @ (80006c4 ) + 8000464: f001 fd0e bl 8001e84 + 8000468: 4603 mov r3, r0 + 800046a: f003 0301 and.w r3, r3, #1 + 800046e: b2d9 uxtb r1, r3 + 8000470: 4a95 ldr r2, [pc, #596] @ (80006c8 ) + 8000472: 7813 ldrb r3, [r2, #0] + 8000474: f361 0300 bfi r3, r1, #0, #1 + 8000478: 7013 strb r3, [r2, #0] dash_tx.sdc_in = HAL_GPIO_ReadPin(SDC_In_3V3_GPIO_Port, SDC_In_3V3_Pin); - 8000480: 2110 movs r1, #16 - 8000482: 4878 ldr r0, [pc, #480] @ (8000664 ) - 8000484: f001 fd48 bl 8001f18 - 8000488: 4603 mov r3, r0 - 800048a: f003 0301 and.w r3, r3, #1 - 800048e: b2d9 uxtb r1, r3 - 8000490: 4a75 ldr r2, [pc, #468] @ (8000668 ) - 8000492: 7813 ldrb r3, [r2, #0] - 8000494: f361 03c3 bfi r3, r1, #3, #1 - 8000498: 7013 strb r3, [r2, #0] + 800047a: 2110 movs r1, #16 + 800047c: 4891 ldr r0, [pc, #580] @ (80006c4 ) + 800047e: f001 fd01 bl 8001e84 + 8000482: 4603 mov r3, r0 + 8000484: f003 0301 and.w r3, r3, #1 + 8000488: b2d9 uxtb r1, r3 + 800048a: 4a8f ldr r2, [pc, #572] @ (80006c8 ) + 800048c: 7813 ldrb r3, [r2, #0] + 800048e: f361 03c3 bfi r3, r1, #3, #1 + 8000492: 7013 strb r3, [r2, #0] dash_tx.sdc_out = HAL_GPIO_ReadPin(SDC_Out_3V3_GPIO_Port, SDC_Out_3V3_Pin); - 800049a: 2108 movs r1, #8 - 800049c: 4871 ldr r0, [pc, #452] @ (8000664 ) - 800049e: f001 fd3b bl 8001f18 - 80004a2: 4603 mov r3, r0 - 80004a4: f003 0301 and.w r3, r3, #1 - 80004a8: b2d9 uxtb r1, r3 - 80004aa: 4a6f ldr r2, [pc, #444] @ (8000668 ) - 80004ac: 7813 ldrb r3, [r2, #0] - 80004ae: f361 1304 bfi r3, r1, #4, #1 - 80004b2: 7013 strb r3, [r2, #0] + 8000494: 2108 movs r1, #8 + 8000496: 488b ldr r0, [pc, #556] @ (80006c4 ) + 8000498: f001 fcf4 bl 8001e84 + 800049c: 4603 mov r3, r0 + 800049e: f003 0301 and.w r3, r3, #1 + 80004a2: b2d9 uxtb r1, r3 + 80004a4: 4a88 ldr r2, [pc, #544] @ (80006c8 ) + 80004a6: 7813 ldrb r3, [r2, #0] + 80004a8: f361 1304 bfi r3, r1, #4, #1 + 80004ac: 7013 strb r3, [r2, #0] dash_tx.racemode = HAL_GPIO_ReadPin(RMode_Out_3V3_GPIO_Port, RMode_Out_3V3_Pin); - 80004b4: f44f 7180 mov.w r1, #256 @ 0x100 - 80004b8: 486a ldr r0, [pc, #424] @ (8000664 ) - 80004ba: f001 fd2d bl 8001f18 - 80004be: 4603 mov r3, r0 - 80004c0: f003 0301 and.w r3, r3, #1 - 80004c4: b2d9 uxtb r1, r3 - 80004c6: 4a68 ldr r2, [pc, #416] @ (8000668 ) - 80004c8: 7813 ldrb r3, [r2, #0] - 80004ca: f361 0382 bfi r3, r1, #2, #1 - 80004ce: 7013 strb r3, [r2, #0] + 80004ae: f44f 7180 mov.w r1, #256 @ 0x100 + 80004b2: 4884 ldr r0, [pc, #528] @ (80006c4 ) + 80004b4: f001 fce6 bl 8001e84 + 80004b8: 4603 mov r3, r0 + 80004ba: f003 0301 and.w r3, r3, #1 + 80004be: b2d9 uxtb r1, r3 + 80004c0: 4a81 ldr r2, [pc, #516] @ (80006c8 ) + 80004c2: 7813 ldrb r3, [r2, #0] + 80004c4: f361 0382 bfi r3, r1, #2, #1 + 80004c8: 7013 strb r3, [r2, #0] // Inverted in hardware if ((HAL_GetTick() - ams_last_tick) < 350) { //master sendet aller 100ms, fürs testen erstmal auf 150ms gesetzt -> kann später wieder runter - 80004d0: f000 fbe0 bl 8000c94 - 80004d4: 4602 mov r2, r0 - 80004d6: 4b65 ldr r3, [pc, #404] @ (800066c ) - 80004d8: 681b ldr r3, [r3, #0] - 80004da: 1ad3 subs r3, r2, r3 - 80004dc: f5b3 7faf cmp.w r3, #350 @ 0x15e - 80004e0: d221 bcs.n 8000526 + 80004ca: f000 fb99 bl 8000c00 + 80004ce: 4602 mov r2, r0 + 80004d0: 4b7e ldr r3, [pc, #504] @ (80006cc ) + 80004d2: 681b ldr r3, [r3, #0] + 80004d4: 1ad3 subs r3, r2, r3 + 80004d6: f5b3 7faf cmp.w r3, #350 @ 0x15e + 80004da: d221 bcs.n 8000520 HAL_GPIO_WritePin(IMD_LED_GPIO_Port, IMD_LED_Pin, acc_status.led_status.imd_error); - 80004e2: 4b63 ldr r3, [pc, #396] @ (8000670 ) - 80004e4: 785b ldrb r3, [r3, #1] - 80004e6: f3c3 0340 ubfx r3, r3, #1, #1 - 80004ea: b2db uxtb r3, r3 - 80004ec: 461a mov r2, r3 - 80004ee: 2108 movs r1, #8 - 80004f0: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 80004f4: f001 fd28 bl 8001f48 + 80004dc: 4b7c ldr r3, [pc, #496] @ (80006d0 ) + 80004de: 785b ldrb r3, [r3, #1] + 80004e0: f3c3 0340 ubfx r3, r3, #1, #1 + 80004e4: b2db uxtb r3, r3 + 80004e6: 461a mov r2, r3 + 80004e8: 2108 movs r1, #8 + 80004ea: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80004ee: f001 fce1 bl 8001eb4 HAL_GPIO_WritePin(AMS_LED_GPIO_Port, AMS_LED_Pin, acc_status.led_status.ams_error); - 80004f8: 4b5d ldr r3, [pc, #372] @ (8000670 ) - 80004fa: 785b ldrb r3, [r3, #1] - 80004fc: f3c3 0380 ubfx r3, r3, #2, #1 - 8000500: b2db uxtb r3, r3 - 8000502: 461a mov r2, r3 - 8000504: 2110 movs r1, #16 - 8000506: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 800050a: f001 fd1d bl 8001f48 + 80004f2: 4b77 ldr r3, [pc, #476] @ (80006d0 ) + 80004f4: 785b ldrb r3, [r3, #1] + 80004f6: f3c3 0380 ubfx r3, r3, #2, #1 + 80004fa: b2db uxtb r3, r3 + 80004fc: 461a mov r2, r3 + 80004fe: 2110 movs r1, #16 + 8000500: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 8000504: f001 fcd6 bl 8001eb4 HAL_GPIO_WritePin(TSOFF_LED_GPIO_Port, TSOFF_LED_Pin,acc_status.led_status.ts_green); - 800050e: 4b58 ldr r3, [pc, #352] @ (8000670 ) - 8000510: 785b ldrb r3, [r3, #1] - 8000512: f3c3 0300 ubfx r3, r3, #0, #1 - 8000516: b2db uxtb r3, r3 - 8000518: 461a mov r2, r3 - 800051a: 2120 movs r1, #32 - 800051c: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000520: f001 fd12 bl 8001f48 - 8000524: e011 b.n 800054a + 8000508: 4b71 ldr r3, [pc, #452] @ (80006d0 ) + 800050a: 785b ldrb r3, [r3, #1] + 800050c: f3c3 0300 ubfx r3, r3, #0, #1 + 8000510: b2db uxtb r3, r3 + 8000512: 461a mov r2, r3 + 8000514: 2120 movs r1, #32 + 8000516: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 800051a: f001 fccb bl 8001eb4 + 800051e: e011 b.n 8000544 } else { // Safe state: Error LEDs on, TSOFF off HAL_GPIO_WritePin(IMD_LED_GPIO_Port, IMD_LED_Pin, 0); - 8000526: 2200 movs r2, #0 - 8000528: 2108 movs r1, #8 - 800052a: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 800052e: f001 fd0b bl 8001f48 + 8000520: 2200 movs r2, #0 + 8000522: 2108 movs r1, #8 + 8000524: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 8000528: f001 fcc4 bl 8001eb4 HAL_GPIO_WritePin(AMS_LED_GPIO_Port, AMS_LED_Pin, 0); - 8000532: 2200 movs r2, #0 - 8000534: 2110 movs r1, #16 - 8000536: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 800053a: f001 fd05 bl 8001f48 + 800052c: 2200 movs r2, #0 + 800052e: 2110 movs r1, #16 + 8000530: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 8000534: f001 fcbe bl 8001eb4 HAL_GPIO_WritePin(TSOFF_LED_GPIO_Port, TSOFF_LED_Pin, 0); - 800053e: 2200 movs r2, #0 - 8000540: 2120 movs r1, #32 - 8000542: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000546: f001 fcff bl 8001f48 + 8000538: 2200 movs r2, #0 + 800053a: 2120 movs r1, #32 + 800053c: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 8000540: f001 fcb8 bl 8001eb4 } int r = 0, g = 0, b = 0; - 800054a: 2300 movs r3, #0 - 800054c: 617b str r3, [r7, #20] - 800054e: 2300 movs r3, #0 - 8000550: 613b str r3, [r7, #16] - 8000552: 2300 movs r3, #0 - 8000554: 60fb str r3, [r7, #12] + 8000544: 2300 movs r3, #0 + 8000546: 617b str r3, [r7, #20] + 8000548: 2300 movs r3, #0 + 800054a: 613b str r3, [r7, #16] + 800054c: 2300 movs r3, #0 + 800054e: 60fb str r3, [r7, #12] int br = 0, bg = 0, bb = 0; - 8000556: 2300 movs r3, #0 - 8000558: 60bb str r3, [r7, #8] - 800055a: 2300 movs r3, #0 - 800055c: 607b str r3, [r7, #4] - 800055e: 2300 movs r3, #0 - 8000560: 603b str r3, [r7, #0] + 8000550: 2300 movs r3, #0 + 8000552: 60bb str r3, [r7, #8] + 8000554: 2300 movs r3, #0 + 8000556: 607b str r3, [r7, #4] + 8000558: 2300 movs r3, #0 + 800055a: 603b str r3, [r7, #0] if(acc_status.ams_status.sdc_closed == 1){ - 8000562: 4b43 ldr r3, [pc, #268] @ (8000670 ) - 8000564: 781b ldrb r3, [r3, #0] - 8000566: f023 037f bic.w r3, r3, #127 @ 0x7f - 800056a: b2db uxtb r3, r3 - 800056c: 2b00 cmp r3, #0 - 800056e: d014 beq.n 800059a + 800055c: 4b5c ldr r3, [pc, #368] @ (80006d0 ) + 800055e: 781b ldrb r3, [r3, #0] + 8000560: f023 037f bic.w r3, r3, #127 @ 0x7f + 8000564: b2db uxtb r3, r3 + 8000566: 2b00 cmp r3, #0 + 8000568: d014 beq.n 8000594 if(acc_status.ams_status.ts_state == TS_INACTIVE){ - 8000570: 4b3f ldr r3, [pc, #252] @ (8000670 ) - 8000572: 781b ldrb r3, [r3, #0] - 8000574: f003 0301 and.w r3, r3, #1 - 8000578: b2db uxtb r3, r3 - 800057a: 2b00 cmp r3, #0 - 800057c: d103 bne.n 8000586 + 800056a: 4b59 ldr r3, [pc, #356] @ (80006d0 ) + 800056c: 781b ldrb r3, [r3, #0] + 800056e: f003 0301 and.w r3, r3, #1 + 8000572: b2db uxtb r3, r3 + 8000574: 2b00 cmp r3, #0 + 8000576: d103 bne.n 8000580 r = g = 1; - 800057e: 2301 movs r3, #1 - 8000580: 613b str r3, [r7, #16] - 8000582: 693b ldr r3, [r7, #16] - 8000584: 617b str r3, [r7, #20] + 8000578: 2301 movs r3, #1 + 800057a: 613b str r3, [r7, #16] + 800057c: 693b ldr r3, [r7, #16] + 800057e: 617b str r3, [r7, #20] } if(acc_status.ams_status.ts_state == TS_PRECHARGE){ br = bg = 1; } if(acc_status.ams_status.ts_state == TS_ACTIVE){ - 8000586: 4b3a ldr r3, [pc, #232] @ (8000670 ) - 8000588: 781b ldrb r3, [r3, #0] - 800058a: f003 0301 and.w r3, r3, #1 - 800058e: b2db uxtb r3, r3 - 8000590: 2b00 cmp r3, #0 - 8000592: d006 beq.n 80005a2 + 8000580: 4b53 ldr r3, [pc, #332] @ (80006d0 ) + 8000582: 781b ldrb r3, [r3, #0] + 8000584: f003 0301 and.w r3, r3, #1 + 8000588: b2db uxtb r3, r3 + 800058a: 2b00 cmp r3, #0 + 800058c: d006 beq.n 800059c g = 1; - 8000594: 2301 movs r3, #1 - 8000596: 613b str r3, [r7, #16] - 8000598: e003 b.n 80005a2 + 800058e: 2301 movs r3, #1 + 8000590: 613b str r3, [r7, #16] + 8000592: e003 b.n 800059c if(acc_status.ams_status.ts_state == TS_ERROR){ - r = 1; + br = 1; } } else{ b = r = 1; - 800059a: 2301 movs r3, #1 - 800059c: 617b str r3, [r7, #20] - 800059e: 697b ldr r3, [r7, #20] - 80005a0: 60fb str r3, [r7, #12] + 8000594: 2301 movs r3, #1 + 8000596: 617b str r3, [r7, #20] + 8000598: 697b ldr r3, [r7, #20] + 800059a: 60fb str r3, [r7, #12] } HAL_GPIO_WritePin(TSON_R_GPIO_Port, TSON_R_Pin, r); - 80005a2: 697b ldr r3, [r7, #20] - 80005a4: b2db uxtb r3, r3 - 80005a6: 461a mov r2, r3 - 80005a8: 2101 movs r1, #1 - 80005aa: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 80005ae: f001 fccb bl 8001f48 + 800059c: 697b ldr r3, [r7, #20] + 800059e: b2db uxtb r3, r3 + 80005a0: 461a mov r2, r3 + 80005a2: 2101 movs r1, #1 + 80005a4: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80005a8: f001 fc84 bl 8001eb4 HAL_GPIO_WritePin(TSON_G_GPIO_Port, TSON_G_Pin, g); - 80005b2: 693b ldr r3, [r7, #16] - 80005b4: b2db uxtb r3, r3 - 80005b6: 461a mov r2, r3 - 80005b8: 2102 movs r1, #2 - 80005ba: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 80005be: f001 fcc3 bl 8001f48 + 80005ac: 693b ldr r3, [r7, #16] + 80005ae: b2db uxtb r3, r3 + 80005b0: 461a mov r2, r3 + 80005b2: 2102 movs r1, #2 + 80005b4: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80005b8: f001 fc7c bl 8001eb4 HAL_GPIO_WritePin(TSON_B_GPIO_Port, TSON_B_Pin, b); - 80005c2: 68fb ldr r3, [r7, #12] - 80005c4: b2db uxtb r3, r3 - 80005c6: 461a mov r2, r3 - 80005c8: 2104 movs r1, #4 - 80005ca: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 80005ce: f001 fcbb bl 8001f48 + 80005bc: 68fb ldr r3, [r7, #12] + 80005be: b2db uxtb r3, r3 + 80005c0: 461a mov r2, r3 + 80005c2: 2104 movs r1, #4 + 80005c4: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80005c8: f001 fc74 bl 8001eb4 - if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_tson) > 100u)) { - 80005d2: 68bb ldr r3, [r7, #8] + if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_tson) > 1000u)) { + 80005cc: 68bb ldr r3, [r7, #8] + 80005ce: 2b00 cmp r3, #0 + 80005d0: d105 bne.n 80005de + 80005d2: 687b ldr r3, [r7, #4] 80005d4: 2b00 cmp r3, #0 - 80005d6: d105 bne.n 80005e4 - 80005d8: 687b ldr r3, [r7, #4] + 80005d6: d102 bne.n 80005de + 80005d8: 683b ldr r3, [r7, #0] 80005da: 2b00 cmp r3, #0 - 80005dc: d102 bne.n 80005e4 - 80005de: 683b ldr r3, [r7, #0] - 80005e0: 2b00 cmp r3, #0 - 80005e2: d054 beq.n 800068e - 80005e4: f000 fb56 bl 8000c94 - 80005e8: 4602 mov r2, r0 - 80005ea: 4b1b ldr r3, [pc, #108] @ (8000658 ) - 80005ec: 681b ldr r3, [r3, #0] - 80005ee: 1ad3 subs r3, r2, r3 - 80005f0: 2b64 cmp r3, #100 @ 0x64 - 80005f2: d94c bls.n 800068e - HAL_GPIO_WritePin(TSON_R_GPIO_Port, TSON_R_Pin, br && blink_state); - 80005f4: 68bb ldr r3, [r7, #8] - 80005f6: 2b00 cmp r3, #0 - 80005f8: d005 beq.n 8000606 - 80005fa: 4b15 ldr r3, [pc, #84] @ (8000650 ) - 80005fc: 781b ldrb r3, [r3, #0] - 80005fe: 2b00 cmp r3, #0 - 8000600: d001 beq.n 8000606 - 8000602: 2301 movs r3, #1 - 8000604: e000 b.n 8000608 - 8000606: 2300 movs r3, #0 - 8000608: b2db uxtb r3, r3 - 800060a: 461a mov r2, r3 - 800060c: 2101 movs r1, #1 - 800060e: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000612: f001 fc99 bl 8001f48 - HAL_GPIO_WritePin(TSON_G_GPIO_Port, TSON_G_Pin, bg && blink_state); - 8000616: 687b ldr r3, [r7, #4] - 8000618: 2b00 cmp r3, #0 - 800061a: d005 beq.n 8000628 - 800061c: 4b0c ldr r3, [pc, #48] @ (8000650 ) - 800061e: 781b ldrb r3, [r3, #0] - 8000620: 2b00 cmp r3, #0 - 8000622: d001 beq.n 8000628 - 8000624: 2301 movs r3, #1 - 8000626: e000 b.n 800062a - 8000628: 2300 movs r3, #0 - 800062a: b2db uxtb r3, r3 - 800062c: 461a mov r2, r3 - 800062e: 2102 movs r1, #2 - 8000630: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000634: f001 fc88 bl 8001f48 - HAL_GPIO_WritePin(TSON_B_GPIO_Port, TSON_B_Pin, bb && blink_state); - 8000638: 683b ldr r3, [r7, #0] - 800063a: 2b00 cmp r3, #0 - 800063c: d01a beq.n 8000674 - 800063e: 4b04 ldr r3, [pc, #16] @ (8000650 ) - 8000640: 781b ldrb r3, [r3, #0] - 8000642: 2b00 cmp r3, #0 - 8000644: d016 beq.n 8000674 - 8000646: 2301 movs r3, #1 - 8000648: e015 b.n 8000676 - 800064a: bf00 nop - 800064c: 20000078 .word 0x20000078 - 8000650: 200000dd .word 0x200000dd - 8000654: 200000dc .word 0x200000dc - 8000658: 200000e0 .word 0x200000e0 - 800065c: 200000e4 .word 0x200000e4 - 8000660: 200000ec .word 0x200000ec - 8000664: 48000400 .word 0x48000400 - 8000668: 2000002c .word 0x2000002c - 800066c: 200000e8 .word 0x200000e8 - 8000670: 20000028 .word 0x20000028 - 8000674: 2300 movs r3, #0 - 8000676: b2db uxtb r3, r3 - 8000678: 461a mov r2, r3 - 800067a: 2104 movs r1, #4 - 800067c: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000680: f001 fc62 bl 8001f48 + 80005dc: d025 beq.n 800062a + 80005de: f000 fb0f bl 8000c00 + 80005e2: 4602 mov r2, r0 + 80005e4: 4b34 ldr r3, [pc, #208] @ (80006b8 ) + 80005e6: 681b ldr r3, [r3, #0] + 80005e8: 1ad3 subs r3, r2, r3 + 80005ea: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 80005ee: d91c bls.n 800062a + if (br) { HAL_GPIO_TogglePin(TSON_R_GPIO_Port, TSON_R_Pin); } + 80005f0: 68bb ldr r3, [r7, #8] + 80005f2: 2b00 cmp r3, #0 + 80005f4: d004 beq.n 8000600 + 80005f6: 2101 movs r1, #1 + 80005f8: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80005fc: f001 fc72 bl 8001ee4 + if (bg) { HAL_GPIO_TogglePin(TSON_G_GPIO_Port, TSON_G_Pin); } + 8000600: 687b ldr r3, [r7, #4] + 8000602: 2b00 cmp r3, #0 + 8000604: d004 beq.n 8000610 + 8000606: 2102 movs r1, #2 + 8000608: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 800060c: f001 fc6a bl 8001ee4 + if (bb) { HAL_GPIO_TogglePin(TSON_B_GPIO_Port, TSON_B_Pin); } + 8000610: 683b ldr r3, [r7, #0] + 8000612: 2b00 cmp r3, #0 + 8000614: d004 beq.n 8000620 + 8000616: 2104 movs r1, #4 + 8000618: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 800061c: f001 fc62 bl 8001ee4 blink_tick_tson = HAL_GetTick(); - 8000684: f000 fb06 bl 8000c94 - 8000688: 4603 mov r3, r0 - 800068a: 4a60 ldr r2, [pc, #384] @ (800080c ) - 800068c: 6013 str r3, [r2, #0] + 8000620: f000 faee bl 8000c00 + 8000624: 4603 mov r3, r0 + 8000626: 4a24 ldr r2, [pc, #144] @ (80006b8 ) + 8000628: 6013 str r3, [r2, #0] } r = g = b = 0; - 800068e: 2300 movs r3, #0 - 8000690: 60fb str r3, [r7, #12] - 8000692: 68fb ldr r3, [r7, #12] - 8000694: 613b str r3, [r7, #16] - 8000696: 693b ldr r3, [r7, #16] - 8000698: 617b str r3, [r7, #20] + 800062a: 2300 movs r3, #0 + 800062c: 60fb str r3, [r7, #12] + 800062e: 68fb ldr r3, [r7, #12] + 8000630: 613b str r3, [r7, #16] + 8000632: 693b ldr r3, [r7, #16] + 8000634: 617b str r3, [r7, #20] br = bg = bb = 0; - 800069a: 2300 movs r3, #0 - 800069c: 603b str r3, [r7, #0] - 800069e: 683b ldr r3, [r7, #0] - 80006a0: 607b str r3, [r7, #4] - 80006a2: 687b ldr r3, [r7, #4] - 80006a4: 60bb str r3, [r7, #8] + 8000636: 2300 movs r3, #0 + 8000638: 603b str r3, [r7, #0] + 800063a: 683b ldr r3, [r7, #0] + 800063c: 607b str r3, [r7, #4] + 800063e: 687b ldr r3, [r7, #4] + 8000640: 60bb str r3, [r7, #8] if (acc_status.ams_status.ts_state == TS_ACTIVE) { - 80006a6: 4b5a ldr r3, [pc, #360] @ (8000810 ) - 80006a8: 781b ldrb r3, [r3, #0] - 80006aa: f003 0301 and.w r3, r3, #1 - 80006ae: b2db uxtb r3, r3 - 80006b0: 2b00 cmp r3, #0 - 80006b2: d02e beq.n 8000712 + 8000642: 4b23 ldr r3, [pc, #140] @ (80006d0 ) + 8000644: 781b ldrb r3, [r3, #0] + 8000646: f003 0301 and.w r3, r3, #1 + 800064a: b2db uxtb r3, r3 + 800064c: 2b00 cmp r3, #0 + 800064e: d043 beq.n 80006d8 if((r2d_progress == R2D_TS_ACTIVE) || (r2d_progress == R2D_TSMS) || (r2d_progress == R2D_NONE)){ - 80006b4: 4b57 ldr r3, [pc, #348] @ (8000814 ) - 80006b6: 781b ldrb r3, [r3, #0] - 80006b8: 2b02 cmp r3, #2 - 80006ba: d007 beq.n 80006cc - 80006bc: 4b55 ldr r3, [pc, #340] @ (8000814 ) - 80006be: 781b ldrb r3, [r3, #0] - 80006c0: 2b01 cmp r3, #1 - 80006c2: d003 beq.n 80006cc - 80006c4: 4b53 ldr r3, [pc, #332] @ (8000814 ) - 80006c6: 781b ldrb r3, [r3, #0] - 80006c8: 2b00 cmp r3, #0 - 80006ca: d103 bne.n 80006d4 + 8000650: 4b20 ldr r3, [pc, #128] @ (80006d4 ) + 8000652: 781b ldrb r3, [r3, #0] + 8000654: 2b02 cmp r3, #2 + 8000656: d007 beq.n 8000668 + 8000658: 4b1e ldr r3, [pc, #120] @ (80006d4 ) + 800065a: 781b ldrb r3, [r3, #0] + 800065c: 2b01 cmp r3, #1 + 800065e: d003 beq.n 8000668 + 8000660: 4b1c ldr r3, [pc, #112] @ (80006d4 ) + 8000662: 781b ldrb r3, [r3, #0] + 8000664: 2b00 cmp r3, #0 + 8000666: d103 bne.n 8000670 r = g = 1; - 80006cc: 2301 movs r3, #1 - 80006ce: 613b str r3, [r7, #16] - 80006d0: 693b ldr r3, [r7, #16] - 80006d2: 617b str r3, [r7, #20] + 8000668: 2301 movs r3, #1 + 800066a: 613b str r3, [r7, #16] + 800066c: 693b ldr r3, [r7, #16] + 800066e: 617b str r3, [r7, #20] } if((r2d_progress == R2D_RESETTING_NODES) || (r2d_progress == R2D_RESETTING_COMMS) || (r2d_progress == R2D_WAITING_INIT) || (r2d_progress == R2D_INIT_STAGE1) || (r2d_progress == R2D_INIT_STAGE2)){ - 80006d4: 4b4f ldr r3, [pc, #316] @ (8000814 ) - 80006d6: 781b ldrb r3, [r3, #0] - 80006d8: 2b03 cmp r3, #3 - 80006da: d00f beq.n 80006fc - 80006dc: 4b4d ldr r3, [pc, #308] @ (8000814 ) - 80006de: 781b ldrb r3, [r3, #0] - 80006e0: 2b04 cmp r3, #4 - 80006e2: d00b beq.n 80006fc - 80006e4: 4b4b ldr r3, [pc, #300] @ (8000814 ) - 80006e6: 781b ldrb r3, [r3, #0] - 80006e8: 2b05 cmp r3, #5 - 80006ea: d007 beq.n 80006fc - 80006ec: 4b49 ldr r3, [pc, #292] @ (8000814 ) - 80006ee: 781b ldrb r3, [r3, #0] - 80006f0: 2b06 cmp r3, #6 - 80006f2: d003 beq.n 80006fc - 80006f4: 4b47 ldr r3, [pc, #284] @ (8000814 ) - 80006f6: 781b ldrb r3, [r3, #0] - 80006f8: 2b07 cmp r3, #7 - 80006fa: d103 bne.n 8000704 + 8000670: 4b18 ldr r3, [pc, #96] @ (80006d4 ) + 8000672: 781b ldrb r3, [r3, #0] + 8000674: 2b03 cmp r3, #3 + 8000676: d00f beq.n 8000698 + 8000678: 4b16 ldr r3, [pc, #88] @ (80006d4 ) + 800067a: 781b ldrb r3, [r3, #0] + 800067c: 2b04 cmp r3, #4 + 800067e: d00b beq.n 8000698 + 8000680: 4b14 ldr r3, [pc, #80] @ (80006d4 ) + 8000682: 781b ldrb r3, [r3, #0] + 8000684: 2b05 cmp r3, #5 + 8000686: d007 beq.n 8000698 + 8000688: 4b12 ldr r3, [pc, #72] @ (80006d4 ) + 800068a: 781b ldrb r3, [r3, #0] + 800068c: 2b06 cmp r3, #6 + 800068e: d003 beq.n 8000698 + 8000690: 4b10 ldr r3, [pc, #64] @ (80006d4 ) + 8000692: 781b ldrb r3, [r3, #0] + 8000694: 2b07 cmp r3, #7 + 8000696: d103 bne.n 80006a0 br = bg = 1; - 80006fc: 2301 movs r3, #1 - 80006fe: 607b str r3, [r7, #4] - 8000700: 687b ldr r3, [r7, #4] - 8000702: 60bb str r3, [r7, #8] + 8000698: 2301 movs r3, #1 + 800069a: 607b str r3, [r7, #4] + 800069c: 687b ldr r3, [r7, #4] + 800069e: 60bb str r3, [r7, #8] } if(r2d_progress == R2D_INIT_SUCCESS){ - 8000704: 4b43 ldr r3, [pc, #268] @ (8000814 ) - 8000706: 781b ldrb r3, [r3, #0] - 8000708: 2b0f cmp r3, #15 - 800070a: d106 bne.n 800071a + 80006a0: 4b0c ldr r3, [pc, #48] @ (80006d4 ) + 80006a2: 781b ldrb r3, [r3, #0] + 80006a4: 2b0f cmp r3, #15 + 80006a6: d11b bne.n 80006e0 g = 1; - 800070c: 2301 movs r3, #1 - 800070e: 613b str r3, [r7, #16] - 8000710: e003 b.n 800071a + 80006a8: 2301 movs r3, #1 + 80006aa: 613b str r3, [r7, #16] + 80006ac: e018 b.n 80006e0 + 80006ae: bf00 nop + 80006b0: 20000078 .word 0x20000078 + 80006b4: 200000dc .word 0x200000dc + 80006b8: 200000e0 .word 0x200000e0 + 80006bc: 200000e4 .word 0x200000e4 + 80006c0: 200000ec .word 0x200000ec + 80006c4: 48000400 .word 0x48000400 + 80006c8: 2000002c .word 0x2000002c + 80006cc: 200000e8 .word 0x200000e8 + 80006d0: 20000028 .word 0x20000028 + 80006d4: 200000dd .word 0x200000dd } } else { b = r = 1; - 8000712: 2301 movs r3, #1 - 8000714: 617b str r3, [r7, #20] - 8000716: 697b ldr r3, [r7, #20] - 8000718: 60fb str r3, [r7, #12] + 80006d8: 2301 movs r3, #1 + 80006da: 617b str r3, [r7, #20] + 80006dc: 697b ldr r3, [r7, #20] + 80006de: 60fb str r3, [r7, #12] } HAL_GPIO_WritePin(R2D_R_GPIO_Port, R2D_R_Pin, r); - 800071a: 697b ldr r3, [r7, #20] - 800071c: b2db uxtb r3, r3 - 800071e: 461a mov r2, r3 - 8000720: 2180 movs r1, #128 @ 0x80 - 8000722: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000726: f001 fc0f bl 8001f48 + 80006e0: 697b ldr r3, [r7, #20] + 80006e2: b2db uxtb r3, r3 + 80006e4: 461a mov r2, r3 + 80006e6: 2180 movs r1, #128 @ 0x80 + 80006e8: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80006ec: f001 fbe2 bl 8001eb4 HAL_GPIO_WritePin(R2D_G_GPIO_Port, R2D_G_Pin, g); - 800072a: 693b ldr r3, [r7, #16] - 800072c: b2db uxtb r3, r3 - 800072e: 461a mov r2, r3 - 8000730: 2101 movs r1, #1 - 8000732: 4839 ldr r0, [pc, #228] @ (8000818 ) - 8000734: f001 fc08 bl 8001f48 + 80006f0: 693b ldr r3, [r7, #16] + 80006f2: b2db uxtb r3, r3 + 80006f4: 461a mov r2, r3 + 80006f6: 2101 movs r1, #1 + 80006f8: 4823 ldr r0, [pc, #140] @ (8000788 ) + 80006fa: f001 fbdb bl 8001eb4 HAL_GPIO_WritePin(R2D_B_GPIO_Port, R2D_B_Pin, b); - 8000738: 68fb ldr r3, [r7, #12] - 800073a: b2db uxtb r3, r3 - 800073c: 461a mov r2, r3 - 800073e: 2102 movs r1, #2 - 8000740: 4835 ldr r0, [pc, #212] @ (8000818 ) - 8000742: f001 fc01 bl 8001f48 + 80006fe: 68fb ldr r3, [r7, #12] + 8000700: b2db uxtb r3, r3 + 8000702: 461a mov r2, r3 + 8000704: 2102 movs r1, #2 + 8000706: 4820 ldr r0, [pc, #128] @ (8000788 ) + 8000708: f001 fbd4 bl 8001eb4 - if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_r2d) > 100u)) { - 8000746: 68bb ldr r3, [r7, #8] - 8000748: 2b00 cmp r3, #0 - 800074a: d105 bne.n 8000758 - 800074c: 687b ldr r3, [r7, #4] - 800074e: 2b00 cmp r3, #0 - 8000750: d102 bne.n 8000758 - 8000752: 683b ldr r3, [r7, #0] - 8000754: 2b00 cmp r3, #0 - 8000756: d03d beq.n 80007d4 - 8000758: f000 fa9c bl 8000c94 - 800075c: 4602 mov r2, r0 - 800075e: 4b2f ldr r3, [pc, #188] @ (800081c ) - 8000760: 681b ldr r3, [r3, #0] - 8000762: 1ad3 subs r3, r2, r3 - 8000764: 2b64 cmp r3, #100 @ 0x64 - 8000766: d935 bls.n 80007d4 - HAL_GPIO_WritePin(R2D_R_GPIO_Port, R2D_R_Pin, br && blink_state); - 8000768: 68bb ldr r3, [r7, #8] - 800076a: 2b00 cmp r3, #0 - 800076c: d005 beq.n 800077a - 800076e: 4b2c ldr r3, [pc, #176] @ (8000820 ) - 8000770: 781b ldrb r3, [r3, #0] - 8000772: 2b00 cmp r3, #0 - 8000774: d001 beq.n 800077a - 8000776: 2301 movs r3, #1 - 8000778: e000 b.n 800077c - 800077a: 2300 movs r3, #0 - 800077c: b2db uxtb r3, r3 - 800077e: 461a mov r2, r3 - 8000780: 2180 movs r1, #128 @ 0x80 - 8000782: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000786: f001 fbdf bl 8001f48 - HAL_GPIO_WritePin(R2D_G_GPIO_Port, R2D_G_Pin, bg && blink_state); - 800078a: 687b ldr r3, [r7, #4] - 800078c: 2b00 cmp r3, #0 - 800078e: d005 beq.n 800079c - 8000790: 4b23 ldr r3, [pc, #140] @ (8000820 ) - 8000792: 781b ldrb r3, [r3, #0] - 8000794: 2b00 cmp r3, #0 - 8000796: d001 beq.n 800079c - 8000798: 2301 movs r3, #1 - 800079a: e000 b.n 800079e - 800079c: 2300 movs r3, #0 - 800079e: b2db uxtb r3, r3 - 80007a0: 461a mov r2, r3 - 80007a2: 2101 movs r1, #1 - 80007a4: 481c ldr r0, [pc, #112] @ (8000818 ) - 80007a6: f001 fbcf bl 8001f48 - HAL_GPIO_WritePin(R2D_B_GPIO_Port, R2D_B_Pin, bb && blink_state); - 80007aa: 683b ldr r3, [r7, #0] - 80007ac: 2b00 cmp r3, #0 - 80007ae: d005 beq.n 80007bc - 80007b0: 4b1b ldr r3, [pc, #108] @ (8000820 ) - 80007b2: 781b ldrb r3, [r3, #0] - 80007b4: 2b00 cmp r3, #0 - 80007b6: d001 beq.n 80007bc - 80007b8: 2301 movs r3, #1 - 80007ba: e000 b.n 80007be - 80007bc: 2300 movs r3, #0 - 80007be: b2db uxtb r3, r3 - 80007c0: 461a mov r2, r3 - 80007c2: 2102 movs r1, #2 - 80007c4: 4814 ldr r0, [pc, #80] @ (8000818 ) - 80007c6: f001 fbbf bl 8001f48 + if ((br || bg || bb) && ((HAL_GetTick() - blink_tick_r2d) > 1000u)) { + 800070c: 68bb ldr r3, [r7, #8] + 800070e: 2b00 cmp r3, #0 + 8000710: d105 bne.n 800071e + 8000712: 687b ldr r3, [r7, #4] + 8000714: 2b00 cmp r3, #0 + 8000716: d102 bne.n 800071e + 8000718: 683b ldr r3, [r7, #0] + 800071a: 2b00 cmp r3, #0 + 800071c: d023 beq.n 8000766 + 800071e: f000 fa6f bl 8000c00 + 8000722: 4602 mov r2, r0 + 8000724: 4b19 ldr r3, [pc, #100] @ (800078c ) + 8000726: 681b ldr r3, [r3, #0] + 8000728: 1ad3 subs r3, r2, r3 + 800072a: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 800072e: d91a bls.n 8000766 + if (br) { HAL_GPIO_TogglePin(R2D_R_GPIO_Port, R2D_R_Pin); } + 8000730: 68bb ldr r3, [r7, #8] + 8000732: 2b00 cmp r3, #0 + 8000734: d004 beq.n 8000740 + 8000736: 2180 movs r1, #128 @ 0x80 + 8000738: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 800073c: f001 fbd2 bl 8001ee4 + if (bg) { HAL_GPIO_TogglePin(R2D_G_GPIO_Port, R2D_G_Pin); } + 8000740: 687b ldr r3, [r7, #4] + 8000742: 2b00 cmp r3, #0 + 8000744: d003 beq.n 800074e + 8000746: 2101 movs r1, #1 + 8000748: 480f ldr r0, [pc, #60] @ (8000788 ) + 800074a: f001 fbcb bl 8001ee4 + if (bb) { HAL_GPIO_TogglePin(R2D_B_GPIO_Port, R2D_B_Pin); } + 800074e: 683b ldr r3, [r7, #0] + 8000750: 2b00 cmp r3, #0 + 8000752: d003 beq.n 800075c + 8000754: 2102 movs r1, #2 + 8000756: 480c ldr r0, [pc, #48] @ (8000788 ) + 8000758: f001 fbc4 bl 8001ee4 blink_tick_r2d = HAL_GetTick(); - 80007ca: f000 fa63 bl 8000c94 - 80007ce: 4603 mov r3, r0 - 80007d0: 4a12 ldr r2, [pc, #72] @ (800081c ) - 80007d2: 6013 str r3, [r2, #0] + 800075c: f000 fa50 bl 8000c00 + 8000760: 4603 mov r3, r0 + 8000762: 4a0a ldr r2, [pc, #40] @ (800078c ) + 8000764: 6013 str r3, [r2, #0] } - blink_state = !blink_state; - 80007d4: 4b12 ldr r3, [pc, #72] @ (8000820 ) - 80007d6: 781b ldrb r3, [r3, #0] - 80007d8: 2b00 cmp r3, #0 - 80007da: bf0c ite eq - 80007dc: 2301 moveq r3, #1 - 80007de: 2300 movne r3, #0 - 80007e0: b2db uxtb r3, r3 - 80007e2: 461a mov r2, r3 - 80007e4: 4b0e ldr r3, [pc, #56] @ (8000820 ) - 80007e6: 701a strb r2, [r3, #0] - if ((HAL_GetTick() - can_send_tick) > 50u){ - 80007e8: f000 fa54 bl 8000c94 - 80007ec: 4602 mov r2, r0 - 80007ee: 4b0d ldr r3, [pc, #52] @ (8000824 ) - 80007f0: 681b ldr r3, [r3, #0] - 80007f2: 1ad3 subs r3, r2, r3 - 80007f4: 2b32 cmp r3, #50 @ 0x32 - 80007f6: f67f ae28 bls.w 800044a + 8000766: f000 fa4b bl 8000c00 + 800076a: 4602 mov r2, r0 + 800076c: 4b08 ldr r3, [pc, #32] @ (8000790 ) + 800076e: 681b ldr r3, [r3, #0] + 8000770: 1ad3 subs r3, r2, r3 + 8000772: 2b32 cmp r3, #50 @ 0x32 + 8000774: f67f ae66 bls.w 8000444 can_send(); - 80007fa: f7ff fcf5 bl 80001e8 + 8000778: f7ff fd36 bl 80001e8 can_send_tick = HAL_GetTick(); - 80007fe: f000 fa49 bl 8000c94 - 8000802: 4603 mov r3, r0 - 8000804: 4a07 ldr r2, [pc, #28] @ (8000824 ) - 8000806: 6013 str r3, [r2, #0] + 800077c: f000 fa40 bl 8000c00 + 8000780: 4603 mov r3, r0 + 8000782: 4a03 ldr r2, [pc, #12] @ (8000790 ) + 8000784: 6013 str r3, [r2, #0] { - 8000808: e61f b.n 800044a - 800080a: bf00 nop - 800080c: 200000e0 .word 0x200000e0 - 8000810: 20000028 .word 0x20000028 - 8000814: 200000de .word 0x200000de - 8000818: 48000400 .word 0x48000400 - 800081c: 200000e4 .word 0x200000e4 - 8000820: 200000dd .word 0x200000dd - 8000824: 200000ec .word 0x200000ec + 8000786: e65d b.n 8000444 + 8000788: 48000400 .word 0x48000400 + 800078c: 200000e4 .word 0x200000e4 + 8000790: 200000ec .word 0x200000ec -08000828 : +08000794 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8000828: b580 push {r7, lr} - 800082a: b090 sub sp, #64 @ 0x40 - 800082c: af00 add r7, sp, #0 + 8000794: b580 push {r7, lr} + 8000796: b090 sub sp, #64 @ 0x40 + 8000798: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800082e: f107 0318 add.w r3, r7, #24 - 8000832: 2228 movs r2, #40 @ 0x28 - 8000834: 2100 movs r1, #0 - 8000836: 4618 mov r0, r3 - 8000838: f002 fdae bl 8003398 + 800079a: f107 0318 add.w r3, r7, #24 + 800079e: 2228 movs r2, #40 @ 0x28 + 80007a0: 2100 movs r1, #0 + 80007a2: 4618 mov r0, r3 + 80007a4: f002 fdc8 bl 8003338 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 800083c: 1d3b adds r3, r7, #4 - 800083e: 2200 movs r2, #0 - 8000840: 601a str r2, [r3, #0] - 8000842: 605a str r2, [r3, #4] - 8000844: 609a str r2, [r3, #8] - 8000846: 60da str r2, [r3, #12] - 8000848: 611a str r2, [r3, #16] + 80007a8: 1d3b adds r3, r7, #4 + 80007aa: 2200 movs r2, #0 + 80007ac: 601a str r2, [r3, #0] + 80007ae: 605a str r2, [r3, #4] + 80007b0: 609a str r2, [r3, #8] + 80007b2: 60da str r2, [r3, #12] + 80007b4: 611a str r2, [r3, #16] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 800084a: 2301 movs r3, #1 - 800084c: 61bb str r3, [r7, #24] + 80007b6: 2301 movs r3, #1 + 80007b8: 61bb str r3, [r7, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 800084e: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8000852: 61fb str r3, [r7, #28] + 80007ba: f44f 3380 mov.w r3, #65536 @ 0x10000 + 80007be: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8000854: 2301 movs r3, #1 - 8000856: 62bb str r3, [r7, #40] @ 0x28 + 80007c0: 2301 movs r3, #1 + 80007c2: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8000858: 2300 movs r3, #0 - 800085a: 637b str r3, [r7, #52] @ 0x34 + 80007c4: 2300 movs r3, #0 + 80007c6: 637b str r3, [r7, #52] @ 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 800085c: f107 0318 add.w r3, r7, #24 - 8000860: 4618 mov r0, r3 - 8000862: f001 fb89 bl 8001f78 - 8000866: 4603 mov r3, r0 - 8000868: 2b00 cmp r3, #0 - 800086a: d001 beq.n 8000870 + 80007c8: f107 0318 add.w r3, r7, #24 + 80007cc: 4618 mov r0, r3 + 80007ce: f001 fba3 bl 8001f18 + 80007d2: 4603 mov r3, r0 + 80007d4: 2b00 cmp r3, #0 + 80007d6: d001 beq.n 80007dc { Error_Handler(); - 800086c: f000 f8ba bl 80009e4 + 80007d8: f000 f8ba bl 8000950 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000870: 230f movs r3, #15 - 8000872: 607b str r3, [r7, #4] + 80007dc: 230f movs r3, #15 + 80007de: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - 8000874: 2301 movs r3, #1 - 8000876: 60bb str r3, [r7, #8] + 80007e0: 2301 movs r3, #1 + 80007e2: 60bb str r3, [r7, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000878: 2300 movs r3, #0 - 800087a: 60fb str r3, [r7, #12] + 80007e4: 2300 movs r3, #0 + 80007e6: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 800087c: 2300 movs r3, #0 - 800087e: 613b str r3, [r7, #16] + 80007e8: 2300 movs r3, #0 + 80007ea: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8000880: 2300 movs r3, #0 - 8000882: 617b str r3, [r7, #20] + 80007ec: 2300 movs r3, #0 + 80007ee: 617b str r3, [r7, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 8000884: 1d3b adds r3, r7, #4 - 8000886: 2100 movs r1, #0 - 8000888: 4618 mov r0, r3 - 800088a: f002 fbb3 bl 8002ff4 - 800088e: 4603 mov r3, r0 - 8000890: 2b00 cmp r3, #0 - 8000892: d001 beq.n 8000898 + 80007f0: 1d3b adds r3, r7, #4 + 80007f2: 2100 movs r1, #0 + 80007f4: 4618 mov r0, r3 + 80007f6: f002 fbcd bl 8002f94 + 80007fa: 4603 mov r3, r0 + 80007fc: 2b00 cmp r3, #0 + 80007fe: d001 beq.n 8000804 { Error_Handler(); - 8000894: f000 f8a6 bl 80009e4 + 8000800: f000 f8a6 bl 8000950 } } - 8000898: bf00 nop - 800089a: 3740 adds r7, #64 @ 0x40 - 800089c: 46bd mov sp, r7 - 800089e: bd80 pop {r7, pc} + 8000804: bf00 nop + 8000806: 3740 adds r7, #64 @ 0x40 + 8000808: 46bd mov sp, r7 + 800080a: bd80 pop {r7, pc} -080008a0 : +0800080c : * @brief CAN Initialization Function * @param None * @retval None */ static void MX_CAN_Init(void) { - 80008a0: b580 push {r7, lr} - 80008a2: af00 add r7, sp, #0 + 800080c: b580 push {r7, lr} + 800080e: af00 add r7, sp, #0 /* USER CODE END CAN_Init 0 */ /* USER CODE BEGIN CAN_Init 1 */ /* USER CODE END CAN_Init 1 */ hcan.Instance = CAN; - 80008a4: 4b17 ldr r3, [pc, #92] @ (8000904 ) - 80008a6: 4a18 ldr r2, [pc, #96] @ (8000908 ) - 80008a8: 601a str r2, [r3, #0] + 8000810: 4b17 ldr r3, [pc, #92] @ (8000870 ) + 8000812: 4a18 ldr r2, [pc, #96] @ (8000874 ) + 8000814: 601a str r2, [r3, #0] hcan.Init.Prescaler = 2; - 80008aa: 4b16 ldr r3, [pc, #88] @ (8000904 ) - 80008ac: 2202 movs r2, #2 - 80008ae: 605a str r2, [r3, #4] + 8000816: 4b16 ldr r3, [pc, #88] @ (8000870 ) + 8000818: 2202 movs r2, #2 + 800081a: 605a str r2, [r3, #4] hcan.Init.Mode = CAN_MODE_NORMAL; - 80008b0: 4b14 ldr r3, [pc, #80] @ (8000904 ) - 80008b2: 2200 movs r2, #0 - 80008b4: 609a str r2, [r3, #8] + 800081c: 4b14 ldr r3, [pc, #80] @ (8000870 ) + 800081e: 2200 movs r2, #0 + 8000820: 609a str r2, [r3, #8] hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; - 80008b6: 4b13 ldr r3, [pc, #76] @ (8000904 ) - 80008b8: 2200 movs r2, #0 - 80008ba: 60da str r2, [r3, #12] + 8000822: 4b13 ldr r3, [pc, #76] @ (8000870 ) + 8000824: 2200 movs r2, #0 + 8000826: 60da str r2, [r3, #12] hcan.Init.TimeSeg1 = CAN_BS1_13TQ; - 80008bc: 4b11 ldr r3, [pc, #68] @ (8000904 ) - 80008be: f44f 2240 mov.w r2, #786432 @ 0xc0000 - 80008c2: 611a str r2, [r3, #16] + 8000828: 4b11 ldr r3, [pc, #68] @ (8000870 ) + 800082a: f44f 2240 mov.w r2, #786432 @ 0xc0000 + 800082e: 611a str r2, [r3, #16] hcan.Init.TimeSeg2 = CAN_BS2_2TQ; - 80008c4: 4b0f ldr r3, [pc, #60] @ (8000904 ) - 80008c6: f44f 1280 mov.w r2, #1048576 @ 0x100000 - 80008ca: 615a str r2, [r3, #20] + 8000830: 4b0f ldr r3, [pc, #60] @ (8000870 ) + 8000832: f44f 1280 mov.w r2, #1048576 @ 0x100000 + 8000836: 615a str r2, [r3, #20] hcan.Init.TimeTriggeredMode = DISABLE; - 80008cc: 4b0d ldr r3, [pc, #52] @ (8000904 ) - 80008ce: 2200 movs r2, #0 - 80008d0: 761a strb r2, [r3, #24] + 8000838: 4b0d ldr r3, [pc, #52] @ (8000870 ) + 800083a: 2200 movs r2, #0 + 800083c: 761a strb r2, [r3, #24] hcan.Init.AutoBusOff = DISABLE; - 80008d2: 4b0c ldr r3, [pc, #48] @ (8000904 ) - 80008d4: 2200 movs r2, #0 - 80008d6: 765a strb r2, [r3, #25] + 800083e: 4b0c ldr r3, [pc, #48] @ (8000870 ) + 8000840: 2200 movs r2, #0 + 8000842: 765a strb r2, [r3, #25] hcan.Init.AutoWakeUp = DISABLE; - 80008d8: 4b0a ldr r3, [pc, #40] @ (8000904 ) - 80008da: 2200 movs r2, #0 - 80008dc: 769a strb r2, [r3, #26] + 8000844: 4b0a ldr r3, [pc, #40] @ (8000870 ) + 8000846: 2200 movs r2, #0 + 8000848: 769a strb r2, [r3, #26] hcan.Init.AutoRetransmission = DISABLE; - 80008de: 4b09 ldr r3, [pc, #36] @ (8000904 ) - 80008e0: 2200 movs r2, #0 - 80008e2: 76da strb r2, [r3, #27] + 800084a: 4b09 ldr r3, [pc, #36] @ (8000870 ) + 800084c: 2200 movs r2, #0 + 800084e: 76da strb r2, [r3, #27] hcan.Init.ReceiveFifoLocked = DISABLE; - 80008e4: 4b07 ldr r3, [pc, #28] @ (8000904 ) - 80008e6: 2200 movs r2, #0 - 80008e8: 771a strb r2, [r3, #28] + 8000850: 4b07 ldr r3, [pc, #28] @ (8000870 ) + 8000852: 2200 movs r2, #0 + 8000854: 771a strb r2, [r3, #28] hcan.Init.TransmitFifoPriority = DISABLE; - 80008ea: 4b06 ldr r3, [pc, #24] @ (8000904 ) - 80008ec: 2200 movs r2, #0 - 80008ee: 775a strb r2, [r3, #29] + 8000856: 4b06 ldr r3, [pc, #24] @ (8000870 ) + 8000858: 2200 movs r2, #0 + 800085a: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan) != HAL_OK) - 80008f0: 4804 ldr r0, [pc, #16] @ (8000904 ) - 80008f2: f000 f9db bl 8000cac - 80008f6: 4603 mov r3, r0 - 80008f8: 2b00 cmp r3, #0 - 80008fa: d001 beq.n 8000900 + 800085c: 4804 ldr r0, [pc, #16] @ (8000870 ) + 800085e: f000 f9db bl 8000c18 + 8000862: 4603 mov r3, r0 + 8000864: 2b00 cmp r3, #0 + 8000866: d001 beq.n 800086c { Error_Handler(); - 80008fc: f000 f872 bl 80009e4 + 8000868: f000 f872 bl 8000950 } /* USER CODE BEGIN CAN_Init 2 */ /* USER CODE END CAN_Init 2 */ } - 8000900: bf00 nop - 8000902: bd80 pop {r7, pc} - 8000904: 20000078 .word 0x20000078 - 8000908: 40006400 .word 0x40006400 + 800086c: bf00 nop + 800086e: bd80 pop {r7, pc} + 8000870: 20000078 .word 0x20000078 + 8000874: 40006400 .word 0x40006400 -0800090c : +08000878 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 800090c: b580 push {r7, lr} - 800090e: b088 sub sp, #32 - 8000910: af00 add r7, sp, #0 + 8000878: b580 push {r7, lr} + 800087a: b088 sub sp, #32 + 800087c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000912: f107 030c add.w r3, r7, #12 - 8000916: 2200 movs r2, #0 - 8000918: 601a str r2, [r3, #0] - 800091a: 605a str r2, [r3, #4] - 800091c: 609a str r2, [r3, #8] - 800091e: 60da str r2, [r3, #12] - 8000920: 611a str r2, [r3, #16] + 800087e: f107 030c add.w r3, r7, #12 + 8000882: 2200 movs r2, #0 + 8000884: 601a str r2, [r3, #0] + 8000886: 605a str r2, [r3, #4] + 8000888: 609a str r2, [r3, #8] + 800088a: 60da str r2, [r3, #12] + 800088c: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); - 8000922: 4b2e ldr r3, [pc, #184] @ (80009dc ) - 8000924: 695b ldr r3, [r3, #20] - 8000926: 4a2d ldr r2, [pc, #180] @ (80009dc ) - 8000928: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 - 800092c: 6153 str r3, [r2, #20] - 800092e: 4b2b ldr r3, [pc, #172] @ (80009dc ) - 8000930: 695b ldr r3, [r3, #20] - 8000932: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 8000936: 60bb str r3, [r7, #8] - 8000938: 68bb ldr r3, [r7, #8] + 800088e: 4b2e ldr r3, [pc, #184] @ (8000948 ) + 8000890: 695b ldr r3, [r3, #20] + 8000892: 4a2d ldr r2, [pc, #180] @ (8000948 ) + 8000894: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 + 8000898: 6153 str r3, [r2, #20] + 800089a: 4b2b ldr r3, [pc, #172] @ (8000948 ) + 800089c: 695b ldr r3, [r3, #20] + 800089e: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 80008a2: 60bb str r3, [r7, #8] + 80008a4: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 800093a: 4b28 ldr r3, [pc, #160] @ (80009dc ) - 800093c: 695b ldr r3, [r3, #20] - 800093e: 4a27 ldr r2, [pc, #156] @ (80009dc ) - 8000940: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8000944: 6153 str r3, [r2, #20] - 8000946: 4b25 ldr r3, [pc, #148] @ (80009dc ) - 8000948: 695b ldr r3, [r3, #20] - 800094a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800094e: 607b str r3, [r7, #4] - 8000950: 687b ldr r3, [r7, #4] + 80008a6: 4b28 ldr r3, [pc, #160] @ (8000948 ) + 80008a8: 695b ldr r3, [r3, #20] + 80008aa: 4a27 ldr r2, [pc, #156] @ (8000948 ) + 80008ac: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 80008b0: 6153 str r3, [r2, #20] + 80008b2: 4b25 ldr r3, [pc, #148] @ (8000948 ) + 80008b4: 695b ldr r3, [r3, #20] + 80008b6: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80008ba: 607b str r3, [r7, #4] + 80008bc: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000952: 4b22 ldr r3, [pc, #136] @ (80009dc ) - 8000954: 695b ldr r3, [r3, #20] - 8000956: 4a21 ldr r2, [pc, #132] @ (80009dc ) - 8000958: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 800095c: 6153 str r3, [r2, #20] - 800095e: 4b1f ldr r3, [pc, #124] @ (80009dc ) - 8000960: 695b ldr r3, [r3, #20] - 8000962: f403 2380 and.w r3, r3, #262144 @ 0x40000 - 8000966: 603b str r3, [r7, #0] - 8000968: 683b ldr r3, [r7, #0] + 80008be: 4b22 ldr r3, [pc, #136] @ (8000948 ) + 80008c0: 695b ldr r3, [r3, #20] + 80008c2: 4a21 ldr r2, [pc, #132] @ (8000948 ) + 80008c4: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 80008c8: 6153 str r3, [r2, #20] + 80008ca: 4b1f ldr r3, [pc, #124] @ (8000948 ) + 80008cc: 695b ldr r3, [r3, #20] + 80008ce: f403 2380 and.w r3, r3, #262144 @ 0x40000 + 80008d2: 603b str r3, [r7, #0] + 80008d4: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, TSON_R_Pin|TSON_G_Pin|TSON_B_Pin|IMD_LED_Pin - 800096a: 2200 movs r2, #0 - 800096c: 21bf movs r1, #191 @ 0xbf - 800096e: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000972: f001 fae9 bl 8001f48 + 80008d6: 2200 movs r2, #0 + 80008d8: 21bf movs r1, #191 @ 0xbf + 80008da: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 80008de: f001 fae9 bl 8001eb4 |AMS_LED_Pin|TSOFF_LED_Pin|R2D_R_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, R2D_G_Pin|R2D_B_Pin, GPIO_PIN_RESET); - 8000976: 2200 movs r2, #0 - 8000978: 2103 movs r1, #3 - 800097a: 4819 ldr r0, [pc, #100] @ (80009e0 ) - 800097c: f001 fae4 bl 8001f48 + 80008e2: 2200 movs r2, #0 + 80008e4: 2103 movs r1, #3 + 80008e6: 4819 ldr r0, [pc, #100] @ (800094c ) + 80008e8: f001 fae4 bl 8001eb4 /*Configure GPIO pins : TSON_R_Pin TSON_G_Pin TSON_B_Pin IMD_LED_Pin AMS_LED_Pin TSOFF_LED_Pin R2D_R_Pin */ GPIO_InitStruct.Pin = TSON_R_Pin|TSON_G_Pin|TSON_B_Pin|IMD_LED_Pin - 8000980: 23bf movs r3, #191 @ 0xbf - 8000982: 60fb str r3, [r7, #12] + 80008ec: 23bf movs r3, #191 @ 0xbf + 80008ee: 60fb str r3, [r7, #12] |AMS_LED_Pin|TSOFF_LED_Pin|R2D_R_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000984: 2301 movs r3, #1 - 8000986: 613b str r3, [r7, #16] + 80008f0: 2301 movs r3, #1 + 80008f2: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000988: 2300 movs r3, #0 - 800098a: 617b str r3, [r7, #20] + 80008f4: 2300 movs r3, #0 + 80008f6: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800098c: 2300 movs r3, #0 - 800098e: 61bb str r3, [r7, #24] + 80008f8: 2300 movs r3, #0 + 80008fa: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000990: f107 030c add.w r3, r7, #12 - 8000994: 4619 mov r1, r3 - 8000996: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 800099a: f001 f943 bl 8001c24 + 80008fc: f107 030c add.w r3, r7, #12 + 8000900: 4619 mov r1, r3 + 8000902: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 8000906: f001 f943 bl 8001b90 /*Configure GPIO pins : R2D_G_Pin R2D_B_Pin */ GPIO_InitStruct.Pin = R2D_G_Pin|R2D_B_Pin; - 800099e: 2303 movs r3, #3 - 80009a0: 60fb str r3, [r7, #12] + 800090a: 2303 movs r3, #3 + 800090c: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80009a2: 2301 movs r3, #1 - 80009a4: 613b str r3, [r7, #16] + 800090e: 2301 movs r3, #1 + 8000910: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80009a6: 2300 movs r3, #0 - 80009a8: 617b str r3, [r7, #20] + 8000912: 2300 movs r3, #0 + 8000914: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80009aa: 2300 movs r3, #0 - 80009ac: 61bb str r3, [r7, #24] + 8000916: 2300 movs r3, #0 + 8000918: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80009ae: f107 030c add.w r3, r7, #12 - 80009b2: 4619 mov r1, r3 - 80009b4: 480a ldr r0, [pc, #40] @ (80009e0 ) - 80009b6: f001 f935 bl 8001c24 + 800091a: f107 030c add.w r3, r7, #12 + 800091e: 4619 mov r1, r3 + 8000920: 480a ldr r0, [pc, #40] @ (800094c ) + 8000922: f001 f935 bl 8001b90 /*Configure GPIO pins : TSON_BTN_Pin SDC_Out_3V3_Pin SDC_In_3V3_Pin R2D_BTN_Pin RMode_Out_3V3_Pin */ GPIO_InitStruct.Pin = TSON_BTN_Pin|SDC_Out_3V3_Pin|SDC_In_3V3_Pin|R2D_BTN_Pin - 80009ba: f248 1338 movw r3, #33080 @ 0x8138 - 80009be: 60fb str r3, [r7, #12] + 8000926: f248 1338 movw r3, #33080 @ 0x8138 + 800092a: 60fb str r3, [r7, #12] |RMode_Out_3V3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80009c0: 2300 movs r3, #0 - 80009c2: 613b str r3, [r7, #16] + 800092c: 2300 movs r3, #0 + 800092e: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80009c4: 2300 movs r3, #0 - 80009c6: 617b str r3, [r7, #20] + 8000930: 2300 movs r3, #0 + 8000932: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80009c8: f107 030c add.w r3, r7, #12 - 80009cc: 4619 mov r1, r3 - 80009ce: 4804 ldr r0, [pc, #16] @ (80009e0 ) - 80009d0: f001 f928 bl 8001c24 + 8000934: f107 030c add.w r3, r7, #12 + 8000938: 4619 mov r1, r3 + 800093a: 4804 ldr r0, [pc, #16] @ (800094c ) + 800093c: f001 f928 bl 8001b90 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 80009d4: bf00 nop - 80009d6: 3720 adds r7, #32 - 80009d8: 46bd mov sp, r7 - 80009da: bd80 pop {r7, pc} - 80009dc: 40021000 .word 0x40021000 - 80009e0: 48000400 .word 0x48000400 + 8000940: bf00 nop + 8000942: 3720 adds r7, #32 + 8000944: 46bd mov sp, r7 + 8000946: bd80 pop {r7, pc} + 8000948: 40021000 .word 0x40021000 + 800094c: 48000400 .word 0x48000400 -080009e4 : +08000950 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 80009e4: b480 push {r7} - 80009e6: af00 add r7, sp, #0 + 8000950: b480 push {r7} + 8000952: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 80009e8: b672 cpsid i + 8000954: b672 cpsid i } - 80009ea: bf00 nop + 8000956: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 80009ec: bf00 nop - 80009ee: e7fd b.n 80009ec + 8000958: bf00 nop + 800095a: e7fd b.n 8000958 -080009f0 : +0800095c : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 80009f0: b480 push {r7} - 80009f2: b083 sub sp, #12 - 80009f4: af00 add r7, sp, #0 + 800095c: b480 push {r7} + 800095e: b083 sub sp, #12 + 8000960: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80009f6: 4b0f ldr r3, [pc, #60] @ (8000a34 ) - 80009f8: 699b ldr r3, [r3, #24] - 80009fa: 4a0e ldr r2, [pc, #56] @ (8000a34 ) - 80009fc: f043 0301 orr.w r3, r3, #1 - 8000a00: 6193 str r3, [r2, #24] - 8000a02: 4b0c ldr r3, [pc, #48] @ (8000a34 ) - 8000a04: 699b ldr r3, [r3, #24] - 8000a06: f003 0301 and.w r3, r3, #1 - 8000a0a: 607b str r3, [r7, #4] - 8000a0c: 687b ldr r3, [r7, #4] + 8000962: 4b0f ldr r3, [pc, #60] @ (80009a0 ) + 8000964: 699b ldr r3, [r3, #24] + 8000966: 4a0e ldr r2, [pc, #56] @ (80009a0 ) + 8000968: f043 0301 orr.w r3, r3, #1 + 800096c: 6193 str r3, [r2, #24] + 800096e: 4b0c ldr r3, [pc, #48] @ (80009a0 ) + 8000970: 699b ldr r3, [r3, #24] + 8000972: f003 0301 and.w r3, r3, #1 + 8000976: 607b str r3, [r7, #4] + 8000978: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8000a0e: 4b09 ldr r3, [pc, #36] @ (8000a34 ) - 8000a10: 69db ldr r3, [r3, #28] - 8000a12: 4a08 ldr r2, [pc, #32] @ (8000a34 ) - 8000a14: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8000a18: 61d3 str r3, [r2, #28] - 8000a1a: 4b06 ldr r3, [pc, #24] @ (8000a34 ) - 8000a1c: 69db ldr r3, [r3, #28] - 8000a1e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8000a22: 603b str r3, [r7, #0] - 8000a24: 683b ldr r3, [r7, #0] + 800097a: 4b09 ldr r3, [pc, #36] @ (80009a0 ) + 800097c: 69db ldr r3, [r3, #28] + 800097e: 4a08 ldr r2, [pc, #32] @ (80009a0 ) + 8000980: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8000984: 61d3 str r3, [r2, #28] + 8000986: 4b06 ldr r3, [pc, #24] @ (80009a0 ) + 8000988: 69db ldr r3, [r3, #28] + 800098a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 800098e: 603b str r3, [r7, #0] + 8000990: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8000a26: bf00 nop - 8000a28: 370c adds r7, #12 - 8000a2a: 46bd mov sp, r7 - 8000a2c: f85d 7b04 ldr.w r7, [sp], #4 - 8000a30: 4770 bx lr - 8000a32: bf00 nop - 8000a34: 40021000 .word 0x40021000 + 8000992: bf00 nop + 8000994: 370c adds r7, #12 + 8000996: 46bd mov sp, r7 + 8000998: f85d 7b04 ldr.w r7, [sp], #4 + 800099c: 4770 bx lr + 800099e: bf00 nop + 80009a0: 40021000 .word 0x40021000 -08000a38 : +080009a4 : * This function configures the hardware resources used in this example * @param hcan: CAN handle pointer * @retval None */ void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) { - 8000a38: b580 push {r7, lr} - 8000a3a: b08a sub sp, #40 @ 0x28 - 8000a3c: af00 add r7, sp, #0 - 8000a3e: 6078 str r0, [r7, #4] + 80009a4: b580 push {r7, lr} + 80009a6: b08a sub sp, #40 @ 0x28 + 80009a8: af00 add r7, sp, #0 + 80009aa: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000a40: f107 0314 add.w r3, r7, #20 - 8000a44: 2200 movs r2, #0 - 8000a46: 601a str r2, [r3, #0] - 8000a48: 605a str r2, [r3, #4] - 8000a4a: 609a str r2, [r3, #8] - 8000a4c: 60da str r2, [r3, #12] - 8000a4e: 611a str r2, [r3, #16] + 80009ac: f107 0314 add.w r3, r7, #20 + 80009b0: 2200 movs r2, #0 + 80009b2: 601a str r2, [r3, #0] + 80009b4: 605a str r2, [r3, #4] + 80009b6: 609a str r2, [r3, #8] + 80009b8: 60da str r2, [r3, #12] + 80009ba: 611a str r2, [r3, #16] if(hcan->Instance==CAN) - 8000a50: 687b ldr r3, [r7, #4] - 8000a52: 681b ldr r3, [r3, #0] - 8000a54: 4a20 ldr r2, [pc, #128] @ (8000ad8 ) - 8000a56: 4293 cmp r3, r2 - 8000a58: d139 bne.n 8000ace + 80009bc: 687b ldr r3, [r7, #4] + 80009be: 681b ldr r3, [r3, #0] + 80009c0: 4a20 ldr r2, [pc, #128] @ (8000a44 ) + 80009c2: 4293 cmp r3, r2 + 80009c4: d139 bne.n 8000a3a { /* USER CODE BEGIN CAN_MspInit 0 */ /* USER CODE END CAN_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_CAN1_CLK_ENABLE(); - 8000a5a: 4b20 ldr r3, [pc, #128] @ (8000adc ) - 8000a5c: 69db ldr r3, [r3, #28] - 8000a5e: 4a1f ldr r2, [pc, #124] @ (8000adc ) - 8000a60: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 - 8000a64: 61d3 str r3, [r2, #28] - 8000a66: 4b1d ldr r3, [pc, #116] @ (8000adc ) - 8000a68: 69db ldr r3, [r3, #28] - 8000a6a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8000a6e: 613b str r3, [r7, #16] - 8000a70: 693b ldr r3, [r7, #16] + 80009c6: 4b20 ldr r3, [pc, #128] @ (8000a48 ) + 80009c8: 69db ldr r3, [r3, #28] + 80009ca: 4a1f ldr r2, [pc, #124] @ (8000a48 ) + 80009cc: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 + 80009d0: 61d3 str r3, [r2, #28] + 80009d2: 4b1d ldr r3, [pc, #116] @ (8000a48 ) + 80009d4: 69db ldr r3, [r3, #28] + 80009d6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80009da: 613b str r3, [r7, #16] + 80009dc: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000a72: 4b1a ldr r3, [pc, #104] @ (8000adc ) - 8000a74: 695b ldr r3, [r3, #20] - 8000a76: 4a19 ldr r2, [pc, #100] @ (8000adc ) - 8000a78: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8000a7c: 6153 str r3, [r2, #20] - 8000a7e: 4b17 ldr r3, [pc, #92] @ (8000adc ) - 8000a80: 695b ldr r3, [r3, #20] - 8000a82: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8000a86: 60fb str r3, [r7, #12] - 8000a88: 68fb ldr r3, [r7, #12] + 80009de: 4b1a ldr r3, [pc, #104] @ (8000a48 ) + 80009e0: 695b ldr r3, [r3, #20] + 80009e2: 4a19 ldr r2, [pc, #100] @ (8000a48 ) + 80009e4: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 80009e8: 6153 str r3, [r2, #20] + 80009ea: 4b17 ldr r3, [pc, #92] @ (8000a48 ) + 80009ec: 695b ldr r3, [r3, #20] + 80009ee: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80009f2: 60fb str r3, [r7, #12] + 80009f4: 68fb ldr r3, [r7, #12] /**CAN GPIO Configuration PA11 ------> CAN_RX PA12 ------> CAN_TX */ GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; - 8000a8a: f44f 53c0 mov.w r3, #6144 @ 0x1800 - 8000a8e: 617b str r3, [r7, #20] + 80009f6: f44f 53c0 mov.w r3, #6144 @ 0x1800 + 80009fa: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000a90: 2302 movs r3, #2 - 8000a92: 61bb str r3, [r7, #24] + 80009fc: 2302 movs r3, #2 + 80009fe: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000a94: 2300 movs r3, #0 - 8000a96: 61fb str r3, [r7, #28] + 8000a00: 2300 movs r3, #0 + 8000a02: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8000a98: 2303 movs r3, #3 - 8000a9a: 623b str r3, [r7, #32] + 8000a04: 2303 movs r3, #3 + 8000a06: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF9_CAN; - 8000a9c: 2309 movs r3, #9 - 8000a9e: 627b str r3, [r7, #36] @ 0x24 + 8000a08: 2309 movs r3, #9 + 8000a0a: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000aa0: f107 0314 add.w r3, r7, #20 - 8000aa4: 4619 mov r1, r3 - 8000aa6: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 - 8000aaa: f001 f8bb bl 8001c24 + 8000a0c: f107 0314 add.w r3, r7, #20 + 8000a10: 4619 mov r1, r3 + 8000a12: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 + 8000a16: f001 f8bb bl 8001b90 /* CAN interrupt Init */ HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0); - 8000aae: 2200 movs r2, #0 - 8000ab0: 2100 movs r1, #0 - 8000ab2: 2014 movs r0, #20 - 8000ab4: f001 f87f bl 8001bb6 + 8000a1a: 2200 movs r2, #0 + 8000a1c: 2100 movs r1, #0 + 8000a1e: 2014 movs r0, #20 + 8000a20: f001 f87f bl 8001b22 HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); - 8000ab8: 2014 movs r0, #20 - 8000aba: f001 f898 bl 8001bee + 8000a24: 2014 movs r0, #20 + 8000a26: f001 f898 bl 8001b5a HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0); - 8000abe: 2200 movs r2, #0 - 8000ac0: 2100 movs r1, #0 - 8000ac2: 2015 movs r0, #21 - 8000ac4: f001 f877 bl 8001bb6 + 8000a2a: 2200 movs r2, #0 + 8000a2c: 2100 movs r1, #0 + 8000a2e: 2015 movs r0, #21 + 8000a30: f001 f877 bl 8001b22 HAL_NVIC_EnableIRQ(CAN_RX1_IRQn); - 8000ac8: 2015 movs r0, #21 - 8000aca: f001 f890 bl 8001bee + 8000a34: 2015 movs r0, #21 + 8000a36: f001 f890 bl 8001b5a /* USER CODE END CAN_MspInit 1 */ } } - 8000ace: bf00 nop - 8000ad0: 3728 adds r7, #40 @ 0x28 - 8000ad2: 46bd mov sp, r7 - 8000ad4: bd80 pop {r7, pc} - 8000ad6: bf00 nop - 8000ad8: 40006400 .word 0x40006400 - 8000adc: 40021000 .word 0x40021000 + 8000a3a: bf00 nop + 8000a3c: 3728 adds r7, #40 @ 0x28 + 8000a3e: 46bd mov sp, r7 + 8000a40: bd80 pop {r7, pc} + 8000a42: bf00 nop + 8000a44: 40006400 .word 0x40006400 + 8000a48: 40021000 .word 0x40021000 -08000ae0 : +08000a4c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8000ae0: b480 push {r7} - 8000ae2: af00 add r7, sp, #0 + 8000a4c: b480 push {r7} + 8000a4e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8000ae4: bf00 nop - 8000ae6: e7fd b.n 8000ae4 + 8000a50: bf00 nop + 8000a52: e7fd b.n 8000a50 -08000ae8 : +08000a54 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8000ae8: b480 push {r7} - 8000aea: af00 add r7, sp, #0 + 8000a54: b480 push {r7} + 8000a56: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8000aec: bf00 nop - 8000aee: e7fd b.n 8000aec + 8000a58: bf00 nop + 8000a5a: e7fd b.n 8000a58 -08000af0 : +08000a5c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8000af0: b480 push {r7} - 8000af2: af00 add r7, sp, #0 + 8000a5c: b480 push {r7} + 8000a5e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8000af4: bf00 nop - 8000af6: e7fd b.n 8000af4 + 8000a60: bf00 nop + 8000a62: e7fd b.n 8000a60 -08000af8 : +08000a64 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 8000af8: b480 push {r7} - 8000afa: af00 add r7, sp, #0 + 8000a64: b480 push {r7} + 8000a66: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8000afc: bf00 nop - 8000afe: e7fd b.n 8000afc + 8000a68: bf00 nop + 8000a6a: e7fd b.n 8000a68 -08000b00 : +08000a6c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8000b00: b480 push {r7} - 8000b02: af00 add r7, sp, #0 + 8000a6c: b480 push {r7} + 8000a6e: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8000b04: bf00 nop - 8000b06: e7fd b.n 8000b04 + 8000a70: bf00 nop + 8000a72: e7fd b.n 8000a70 -08000b08 : +08000a74 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8000b08: b480 push {r7} - 8000b0a: af00 add r7, sp, #0 + 8000a74: b480 push {r7} + 8000a76: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8000b0c: bf00 nop - 8000b0e: 46bd mov sp, r7 - 8000b10: f85d 7b04 ldr.w r7, [sp], #4 - 8000b14: 4770 bx lr + 8000a78: bf00 nop + 8000a7a: 46bd mov sp, r7 + 8000a7c: f85d 7b04 ldr.w r7, [sp], #4 + 8000a80: 4770 bx lr -08000b16 : +08000a82 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8000b16: b480 push {r7} - 8000b18: af00 add r7, sp, #0 + 8000a82: b480 push {r7} + 8000a84: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8000b1a: bf00 nop - 8000b1c: 46bd mov sp, r7 - 8000b1e: f85d 7b04 ldr.w r7, [sp], #4 - 8000b22: 4770 bx lr + 8000a86: bf00 nop + 8000a88: 46bd mov sp, r7 + 8000a8a: f85d 7b04 ldr.w r7, [sp], #4 + 8000a8e: 4770 bx lr -08000b24 : +08000a90 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8000b24: b480 push {r7} - 8000b26: af00 add r7, sp, #0 + 8000a90: b480 push {r7} + 8000a92: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8000b28: bf00 nop - 8000b2a: 46bd mov sp, r7 - 8000b2c: f85d 7b04 ldr.w r7, [sp], #4 - 8000b30: 4770 bx lr + 8000a94: bf00 nop + 8000a96: 46bd mov sp, r7 + 8000a98: f85d 7b04 ldr.w r7, [sp], #4 + 8000a9c: 4770 bx lr -08000b32 : +08000a9e : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8000b32: b580 push {r7, lr} - 8000b34: af00 add r7, sp, #0 + 8000a9e: b580 push {r7, lr} + 8000aa0: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8000b36: f000 f899 bl 8000c6c + 8000aa2: f000 f899 bl 8000bd8 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8000b3a: bf00 nop - 8000b3c: bd80 pop {r7, pc} + 8000aa6: bf00 nop + 8000aa8: bd80 pop {r7, pc} ... -08000b40 : +08000aac : /** * @brief This function handles USB low priority or CAN_RX0 interrupts. */ void USB_LP_CAN_RX0_IRQHandler(void) { - 8000b40: b580 push {r7, lr} - 8000b42: af00 add r7, sp, #0 + 8000aac: b580 push {r7, lr} + 8000aae: af00 add r7, sp, #0 /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */ /* USER CODE END USB_LP_CAN_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan); - 8000b44: 4802 ldr r0, [pc, #8] @ (8000b50 ) - 8000b46: f000 fd1d bl 8001584 + 8000ab0: 4802 ldr r0, [pc, #8] @ (8000abc ) + 8000ab2: f000 fd1d bl 80014f0 /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */ /* USER CODE END USB_LP_CAN_RX0_IRQn 1 */ } - 8000b4a: bf00 nop - 8000b4c: bd80 pop {r7, pc} - 8000b4e: bf00 nop - 8000b50: 20000078 .word 0x20000078 + 8000ab6: bf00 nop + 8000ab8: bd80 pop {r7, pc} + 8000aba: bf00 nop + 8000abc: 20000078 .word 0x20000078 -08000b54 : +08000ac0 : /** * @brief This function handles CAN RX1 interrupt. */ void CAN_RX1_IRQHandler(void) { - 8000b54: b580 push {r7, lr} - 8000b56: af00 add r7, sp, #0 + 8000ac0: b580 push {r7, lr} + 8000ac2: af00 add r7, sp, #0 /* USER CODE BEGIN CAN_RX1_IRQn 0 */ /* USER CODE END CAN_RX1_IRQn 0 */ HAL_CAN_IRQHandler(&hcan); - 8000b58: 4802 ldr r0, [pc, #8] @ (8000b64 ) - 8000b5a: f000 fd13 bl 8001584 + 8000ac4: 4802 ldr r0, [pc, #8] @ (8000ad0 ) + 8000ac6: f000 fd13 bl 80014f0 /* USER CODE BEGIN CAN_RX1_IRQn 1 */ /* USER CODE END CAN_RX1_IRQn 1 */ } - 8000b5e: bf00 nop - 8000b60: bd80 pop {r7, pc} - 8000b62: bf00 nop - 8000b64: 20000078 .word 0x20000078 + 8000aca: bf00 nop + 8000acc: bd80 pop {r7, pc} + 8000ace: bf00 nop + 8000ad0: 20000078 .word 0x20000078 -08000b68 : +08000ad4 : * @brief Setup the microcontroller system * @param None * @retval None */ void SystemInit(void) { - 8000b68: b480 push {r7} - 8000b6a: af00 add r7, sp, #0 + 8000ad4: b480 push {r7} + 8000ad6: af00 add r7, sp, #0 /* FPU settings --------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 8000b6c: 4b06 ldr r3, [pc, #24] @ (8000b88 ) - 8000b6e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 - 8000b72: 4a05 ldr r2, [pc, #20] @ (8000b88 ) - 8000b74: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 - 8000b78: f8c2 3088 str.w r3, [r2, #136] @ 0x88 + 8000ad8: 4b06 ldr r3, [pc, #24] @ (8000af4 ) + 8000ada: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 + 8000ade: 4a05 ldr r2, [pc, #20] @ (8000af4 ) + 8000ae0: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 + 8000ae4: f8c2 3088 str.w r3, [r2, #136] @ 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8000b7c: bf00 nop - 8000b7e: 46bd mov sp, r7 - 8000b80: f85d 7b04 ldr.w r7, [sp], #4 - 8000b84: 4770 bx lr - 8000b86: bf00 nop - 8000b88: e000ed00 .word 0xe000ed00 + 8000ae8: bf00 nop + 8000aea: 46bd mov sp, r7 + 8000aec: f85d 7b04 ldr.w r7, [sp], #4 + 8000af0: 4770 bx lr + 8000af2: bf00 nop + 8000af4: e000ed00 .word 0xe000ed00 -08000b8c : +08000af8 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ - 8000b8c: f8df d034 ldr.w sp, [pc, #52] @ 8000bc4 + 8000af8: f8df d034 ldr.w sp, [pc, #52] @ 8000b30 /* Call the clock system initialization function.*/ bl SystemInit - 8000b90: f7ff ffea bl 8000b68 + 8000afc: f7ff ffea bl 8000ad4 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8000b94: 480c ldr r0, [pc, #48] @ (8000bc8 ) + 8000b00: 480c ldr r0, [pc, #48] @ (8000b34 ) ldr r1, =_edata - 8000b96: 490d ldr r1, [pc, #52] @ (8000bcc ) + 8000b02: 490d ldr r1, [pc, #52] @ (8000b38 ) ldr r2, =_sidata - 8000b98: 4a0d ldr r2, [pc, #52] @ (8000bd0 ) + 8000b04: 4a0d ldr r2, [pc, #52] @ (8000b3c ) movs r3, #0 - 8000b9a: 2300 movs r3, #0 + 8000b06: 2300 movs r3, #0 b LoopCopyDataInit - 8000b9c: e002 b.n 8000ba4 + 8000b08: e002 b.n 8000b10 -08000b9e : +08000b0a : CopyDataInit: ldr r4, [r2, r3] - 8000b9e: 58d4 ldr r4, [r2, r3] + 8000b0a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8000ba0: 50c4 str r4, [r0, r3] + 8000b0c: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8000ba2: 3304 adds r3, #4 + 8000b0e: 3304 adds r3, #4 -08000ba4 : +08000b10 : LoopCopyDataInit: adds r4, r0, r3 - 8000ba4: 18c4 adds r4, r0, r3 + 8000b10: 18c4 adds r4, r0, r3 cmp r4, r1 - 8000ba6: 428c cmp r4, r1 + 8000b12: 428c cmp r4, r1 bcc CopyDataInit - 8000ba8: d3f9 bcc.n 8000b9e + 8000b14: d3f9 bcc.n 8000b0a /* Zero fill the bss segment. */ ldr r2, =_sbss - 8000baa: 4a0a ldr r2, [pc, #40] @ (8000bd4 ) + 8000b16: 4a0a ldr r2, [pc, #40] @ (8000b40 ) ldr r4, =_ebss - 8000bac: 4c0a ldr r4, [pc, #40] @ (8000bd8 ) + 8000b18: 4c0a ldr r4, [pc, #40] @ (8000b44 ) movs r3, #0 - 8000bae: 2300 movs r3, #0 + 8000b1a: 2300 movs r3, #0 b LoopFillZerobss - 8000bb0: e001 b.n 8000bb6 + 8000b1c: e001 b.n 8000b22 -08000bb2 : +08000b1e : FillZerobss: str r3, [r2] - 8000bb2: 6013 str r3, [r2, #0] + 8000b1e: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8000bb4: 3204 adds r2, #4 + 8000b20: 3204 adds r2, #4 -08000bb6 : +08000b22 : LoopFillZerobss: cmp r2, r4 - 8000bb6: 42a2 cmp r2, r4 + 8000b22: 42a2 cmp r2, r4 bcc FillZerobss - 8000bb8: d3fb bcc.n 8000bb2 + 8000b24: d3fb bcc.n 8000b1e /* Call static constructors */ bl __libc_init_array - 8000bba: f002 fbf5 bl 80033a8 <__libc_init_array> + 8000b26: f002 fc0f bl 8003348 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8000bbe: f7ff fc21 bl 8000404

+ 8000b2a: f7ff fc6b bl 8000404
-08000bc2 : +08000b2e : LoopForever: b LoopForever - 8000bc2: e7fe b.n 8000bc2 + 8000b2e: e7fe b.n 8000b2e ldr sp, =_estack /* Atollic update: set stack pointer */ - 8000bc4: 20008000 .word 0x20008000 + 8000b30: 20008000 .word 0x20008000 ldr r0, =_sdata - 8000bc8: 20000000 .word 0x20000000 + 8000b34: 20000000 .word 0x20000000 ldr r1, =_edata - 8000bcc: 2000000c .word 0x2000000c + 8000b38: 2000000c .word 0x2000000c ldr r2, =_sidata - 8000bd0: 08003440 .word 0x08003440 + 8000b3c: 080033e0 .word 0x080033e0 ldr r2, =_sbss - 8000bd4: 2000000c .word 0x2000000c + 8000b40: 2000000c .word 0x2000000c ldr r4, =_ebss - 8000bd8: 200000f4 .word 0x200000f4 + 8000b44: 200000f4 .word 0x200000f4 -08000bdc : +08000b48 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8000bdc: e7fe b.n 8000bdc + 8000b48: e7fe b.n 8000b48 ... -08000be0 : +08000b4c : * In the default implementation,Systick is used as source of time base. * The tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8000be0: b580 push {r7, lr} - 8000be2: af00 add r7, sp, #0 + 8000b4c: b580 push {r7, lr} + 8000b4e: af00 add r7, sp, #0 /* Configure Flash prefetch */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8000be4: 4b08 ldr r3, [pc, #32] @ (8000c08 ) - 8000be6: 681b ldr r3, [r3, #0] - 8000be8: 4a07 ldr r2, [pc, #28] @ (8000c08 ) - 8000bea: f043 0310 orr.w r3, r3, #16 - 8000bee: 6013 str r3, [r2, #0] + 8000b50: 4b08 ldr r3, [pc, #32] @ (8000b74 ) + 8000b52: 681b ldr r3, [r3, #0] + 8000b54: 4a07 ldr r2, [pc, #28] @ (8000b74 ) + 8000b56: f043 0310 orr.w r3, r3, #16 + 8000b5a: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8000bf0: 2003 movs r0, #3 - 8000bf2: f000 ffd5 bl 8001ba0 + 8000b5c: 2003 movs r0, #3 + 8000b5e: f000 ffd5 bl 8001b0c /* Enable systick and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 8000bf6: 200f movs r0, #15 - 8000bf8: f000 f808 bl 8000c0c + 8000b62: 200f movs r0, #15 + 8000b64: f000 f808 bl 8000b78 /* Init the low level hardware */ HAL_MspInit(); - 8000bfc: f7ff fef8 bl 80009f0 + 8000b68: f7ff fef8 bl 800095c /* Return function status */ return HAL_OK; - 8000c00: 2300 movs r3, #0 + 8000b6c: 2300 movs r3, #0 } - 8000c02: 4618 mov r0, r3 - 8000c04: bd80 pop {r7, pc} - 8000c06: bf00 nop - 8000c08: 40022000 .word 0x40022000 + 8000b6e: 4618 mov r0, r3 + 8000b70: bd80 pop {r7, pc} + 8000b72: bf00 nop + 8000b74: 40022000 .word 0x40022000 -08000c0c : +08000b78 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8000c0c: b580 push {r7, lr} - 8000c0e: b082 sub sp, #8 - 8000c10: af00 add r7, sp, #0 - 8000c12: 6078 str r0, [r7, #4] + 8000b78: b580 push {r7, lr} + 8000b7a: b082 sub sp, #8 + 8000b7c: af00 add r7, sp, #0 + 8000b7e: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8000c14: 4b12 ldr r3, [pc, #72] @ (8000c60 ) - 8000c16: 681a ldr r2, [r3, #0] - 8000c18: 4b12 ldr r3, [pc, #72] @ (8000c64 ) - 8000c1a: 781b ldrb r3, [r3, #0] - 8000c1c: 4619 mov r1, r3 - 8000c1e: f44f 737a mov.w r3, #1000 @ 0x3e8 - 8000c22: fbb3 f3f1 udiv r3, r3, r1 - 8000c26: fbb2 f3f3 udiv r3, r2, r3 - 8000c2a: 4618 mov r0, r3 - 8000c2c: f000 ffed bl 8001c0a - 8000c30: 4603 mov r3, r0 - 8000c32: 2b00 cmp r3, #0 - 8000c34: d001 beq.n 8000c3a + 8000b80: 4b12 ldr r3, [pc, #72] @ (8000bcc ) + 8000b82: 681a ldr r2, [r3, #0] + 8000b84: 4b12 ldr r3, [pc, #72] @ (8000bd0 ) + 8000b86: 781b ldrb r3, [r3, #0] + 8000b88: 4619 mov r1, r3 + 8000b8a: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8000b8e: fbb3 f3f1 udiv r3, r3, r1 + 8000b92: fbb2 f3f3 udiv r3, r2, r3 + 8000b96: 4618 mov r0, r3 + 8000b98: f000 ffed bl 8001b76 + 8000b9c: 4603 mov r3, r0 + 8000b9e: 2b00 cmp r3, #0 + 8000ba0: d001 beq.n 8000ba6 { return HAL_ERROR; - 8000c36: 2301 movs r3, #1 - 8000c38: e00e b.n 8000c58 + 8000ba2: 2301 movs r3, #1 + 8000ba4: e00e b.n 8000bc4 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8000c3a: 687b ldr r3, [r7, #4] - 8000c3c: 2b0f cmp r3, #15 - 8000c3e: d80a bhi.n 8000c56 + 8000ba6: 687b ldr r3, [r7, #4] + 8000ba8: 2b0f cmp r3, #15 + 8000baa: d80a bhi.n 8000bc2 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8000c40: 2200 movs r2, #0 - 8000c42: 6879 ldr r1, [r7, #4] - 8000c44: f04f 30ff mov.w r0, #4294967295 - 8000c48: f000 ffb5 bl 8001bb6 + 8000bac: 2200 movs r2, #0 + 8000bae: 6879 ldr r1, [r7, #4] + 8000bb0: f04f 30ff mov.w r0, #4294967295 + 8000bb4: f000 ffb5 bl 8001b22 uwTickPrio = TickPriority; - 8000c4c: 4a06 ldr r2, [pc, #24] @ (8000c68 ) - 8000c4e: 687b ldr r3, [r7, #4] - 8000c50: 6013 str r3, [r2, #0] + 8000bb8: 4a06 ldr r2, [pc, #24] @ (8000bd4 ) + 8000bba: 687b ldr r3, [r7, #4] + 8000bbc: 6013 str r3, [r2, #0] else { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8000c52: 2300 movs r3, #0 - 8000c54: e000 b.n 8000c58 + 8000bbe: 2300 movs r3, #0 + 8000bc0: e000 b.n 8000bc4 return HAL_ERROR; - 8000c56: 2301 movs r3, #1 + 8000bc2: 2301 movs r3, #1 } - 8000c58: 4618 mov r0, r3 - 8000c5a: 3708 adds r7, #8 - 8000c5c: 46bd mov sp, r7 - 8000c5e: bd80 pop {r7, pc} - 8000c60: 20000000 .word 0x20000000 - 8000c64: 20000008 .word 0x20000008 - 8000c68: 20000004 .word 0x20000004 + 8000bc4: 4618 mov r0, r3 + 8000bc6: 3708 adds r7, #8 + 8000bc8: 46bd mov sp, r7 + 8000bca: bd80 pop {r7, pc} + 8000bcc: 20000000 .word 0x20000000 + 8000bd0: 20000008 .word 0x20000008 + 8000bd4: 20000004 .word 0x20000004 -08000c6c : +08000bd8 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8000c6c: b480 push {r7} - 8000c6e: af00 add r7, sp, #0 + 8000bd8: b480 push {r7} + 8000bda: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8000c70: 4b06 ldr r3, [pc, #24] @ (8000c8c ) - 8000c72: 781b ldrb r3, [r3, #0] - 8000c74: 461a mov r2, r3 - 8000c76: 4b06 ldr r3, [pc, #24] @ (8000c90 ) - 8000c78: 681b ldr r3, [r3, #0] - 8000c7a: 4413 add r3, r2 - 8000c7c: 4a04 ldr r2, [pc, #16] @ (8000c90 ) - 8000c7e: 6013 str r3, [r2, #0] + 8000bdc: 4b06 ldr r3, [pc, #24] @ (8000bf8 ) + 8000bde: 781b ldrb r3, [r3, #0] + 8000be0: 461a mov r2, r3 + 8000be2: 4b06 ldr r3, [pc, #24] @ (8000bfc ) + 8000be4: 681b ldr r3, [r3, #0] + 8000be6: 4413 add r3, r2 + 8000be8: 4a04 ldr r2, [pc, #16] @ (8000bfc ) + 8000bea: 6013 str r3, [r2, #0] } - 8000c80: bf00 nop - 8000c82: 46bd mov sp, r7 - 8000c84: f85d 7b04 ldr.w r7, [sp], #4 - 8000c88: 4770 bx lr - 8000c8a: bf00 nop - 8000c8c: 20000008 .word 0x20000008 - 8000c90: 200000f0 .word 0x200000f0 + 8000bec: bf00 nop + 8000bee: 46bd mov sp, r7 + 8000bf0: f85d 7b04 ldr.w r7, [sp], #4 + 8000bf4: 4770 bx lr + 8000bf6: bf00 nop + 8000bf8: 20000008 .word 0x20000008 + 8000bfc: 200000f0 .word 0x200000f0 -08000c94 : +08000c00 : * @note The function is declared as __Weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8000c94: b480 push {r7} - 8000c96: af00 add r7, sp, #0 + 8000c00: b480 push {r7} + 8000c02: af00 add r7, sp, #0 return uwTick; - 8000c98: 4b03 ldr r3, [pc, #12] @ (8000ca8 ) - 8000c9a: 681b ldr r3, [r3, #0] + 8000c04: 4b03 ldr r3, [pc, #12] @ (8000c14 ) + 8000c06: 681b ldr r3, [r3, #0] } - 8000c9c: 4618 mov r0, r3 - 8000c9e: 46bd mov sp, r7 - 8000ca0: f85d 7b04 ldr.w r7, [sp], #4 - 8000ca4: 4770 bx lr - 8000ca6: bf00 nop - 8000ca8: 200000f0 .word 0x200000f0 + 8000c08: 4618 mov r0, r3 + 8000c0a: 46bd mov sp, r7 + 8000c0c: f85d 7b04 ldr.w r7, [sp], #4 + 8000c10: 4770 bx lr + 8000c12: bf00 nop + 8000c14: 200000f0 .word 0x200000f0 -08000cac : +08000c18 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { - 8000cac: b580 push {r7, lr} - 8000cae: b084 sub sp, #16 - 8000cb0: af00 add r7, sp, #0 - 8000cb2: 6078 str r0, [r7, #4] + 8000c18: b580 push {r7, lr} + 8000c1a: b084 sub sp, #16 + 8000c1c: af00 add r7, sp, #0 + 8000c1e: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) - 8000cb4: 687b ldr r3, [r7, #4] - 8000cb6: 2b00 cmp r3, #0 - 8000cb8: d101 bne.n 8000cbe + 8000c20: 687b ldr r3, [r7, #4] + 8000c22: 2b00 cmp r3, #0 + 8000c24: d101 bne.n 8000c2a { return HAL_ERROR; - 8000cba: 2301 movs r3, #1 - 8000cbc: e11c b.n 8000ef8 + 8000c26: 2301 movs r3, #1 + 8000c28: e11c b.n 8000e64 assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 if (hcan->State == HAL_CAN_STATE_RESET) - 8000cbe: 687b ldr r3, [r7, #4] - 8000cc0: f893 3020 ldrb.w r3, [r3, #32] - 8000cc4: b2db uxtb r3, r3 - 8000cc6: 2b00 cmp r3, #0 - 8000cc8: d131 bne.n 8000d2e + 8000c2a: 687b ldr r3, [r7, #4] + 8000c2c: f893 3020 ldrb.w r3, [r3, #32] + 8000c30: b2db uxtb r3, r3 + 8000c32: 2b00 cmp r3, #0 + 8000c34: d131 bne.n 8000c9a { /* Reset callbacks to legacy functions */ hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0MsgPendingCallback */ - 8000cca: 687b ldr r3, [r7, #4] - 8000ccc: 4a8c ldr r2, [pc, #560] @ (8000f00 ) - 8000cce: 641a str r2, [r3, #64] @ 0x40 + 8000c36: 687b ldr r3, [r7, #4] + 8000c38: 4a8c ldr r2, [pc, #560] @ (8000e6c ) + 8000c3a: 641a str r2, [r3, #64] @ 0x40 hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0FullCallback */ - 8000cd0: 687b ldr r3, [r7, #4] - 8000cd2: 4a8c ldr r2, [pc, #560] @ (8000f04 ) - 8000cd4: 645a str r2, [r3, #68] @ 0x44 + 8000c3c: 687b ldr r3, [r7, #4] + 8000c3e: 4a8c ldr r2, [pc, #560] @ (8000e70 ) + 8000c40: 645a str r2, [r3, #68] @ 0x44 hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1MsgPendingCallback */ - 8000cd6: 687b ldr r3, [r7, #4] - 8000cd8: 4a8b ldr r2, [pc, #556] @ (8000f08 ) - 8000cda: 649a str r2, [r3, #72] @ 0x48 + 8000c42: 687b ldr r3, [r7, #4] + 8000c44: 4a8b ldr r2, [pc, #556] @ (8000e74 ) + 8000c46: 649a str r2, [r3, #72] @ 0x48 hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1FullCallback */ - 8000cdc: 687b ldr r3, [r7, #4] - 8000cde: 4a8b ldr r2, [pc, #556] @ (8000f0c ) - 8000ce0: 64da str r2, [r3, #76] @ 0x4c + 8000c48: 687b ldr r3, [r7, #4] + 8000c4a: 4a8b ldr r2, [pc, #556] @ (8000e78 ) + 8000c4c: 64da str r2, [r3, #76] @ 0x4c hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbox0CompleteCallback */ - 8000ce2: 687b ldr r3, [r7, #4] - 8000ce4: 4a8a ldr r2, [pc, #552] @ (8000f10 ) - 8000ce6: 629a str r2, [r3, #40] @ 0x28 + 8000c4e: 687b ldr r3, [r7, #4] + 8000c50: 4a8a ldr r2, [pc, #552] @ (8000e7c ) + 8000c52: 629a str r2, [r3, #40] @ 0x28 hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbox1CompleteCallback */ - 8000ce8: 687b ldr r3, [r7, #4] - 8000cea: 4a8a ldr r2, [pc, #552] @ (8000f14 ) - 8000cec: 62da str r2, [r3, #44] @ 0x2c + 8000c54: 687b ldr r3, [r7, #4] + 8000c56: 4a8a ldr r2, [pc, #552] @ (8000e80 ) + 8000c58: 62da str r2, [r3, #44] @ 0x2c hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbox2CompleteCallback */ - 8000cee: 687b ldr r3, [r7, #4] - 8000cf0: 4a89 ldr r2, [pc, #548] @ (8000f18 ) - 8000cf2: 631a str r2, [r3, #48] @ 0x30 + 8000c5a: 687b ldr r3, [r7, #4] + 8000c5c: 4a89 ldr r2, [pc, #548] @ (8000e84 ) + 8000c5e: 631a str r2, [r3, #48] @ 0x30 hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbox0AbortCallback */ - 8000cf4: 687b ldr r3, [r7, #4] - 8000cf6: 4a89 ldr r2, [pc, #548] @ (8000f1c ) - 8000cf8: 635a str r2, [r3, #52] @ 0x34 + 8000c60: 687b ldr r3, [r7, #4] + 8000c62: 4a89 ldr r2, [pc, #548] @ (8000e88 ) + 8000c64: 635a str r2, [r3, #52] @ 0x34 hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbox1AbortCallback */ - 8000cfa: 687b ldr r3, [r7, #4] - 8000cfc: 4a88 ldr r2, [pc, #544] @ (8000f20 ) - 8000cfe: 639a str r2, [r3, #56] @ 0x38 + 8000c66: 687b ldr r3, [r7, #4] + 8000c68: 4a88 ldr r2, [pc, #544] @ (8000e8c ) + 8000c6a: 639a str r2, [r3, #56] @ 0x38 hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbox2AbortCallback */ - 8000d00: 687b ldr r3, [r7, #4] - 8000d02: 4a88 ldr r2, [pc, #544] @ (8000f24 ) - 8000d04: 63da str r2, [r3, #60] @ 0x3c + 8000c6c: 687b ldr r3, [r7, #4] + 8000c6e: 4a88 ldr r2, [pc, #544] @ (8000e90 ) + 8000c70: 63da str r2, [r3, #60] @ 0x3c hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCallback */ - 8000d06: 687b ldr r3, [r7, #4] - 8000d08: 4a87 ldr r2, [pc, #540] @ (8000f28 ) - 8000d0a: 651a str r2, [r3, #80] @ 0x50 + 8000c72: 687b ldr r3, [r7, #4] + 8000c74: 4a87 ldr r2, [pc, #540] @ (8000e94 ) + 8000c76: 651a str r2, [r3, #80] @ 0x50 hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFromRxMsgCallback */ - 8000d0c: 687b ldr r3, [r7, #4] - 8000d0e: 4a87 ldr r2, [pc, #540] @ (8000f2c ) - 8000d10: 655a str r2, [r3, #84] @ 0x54 + 8000c78: 687b ldr r3, [r7, #4] + 8000c7a: 4a87 ldr r2, [pc, #540] @ (8000e98 ) + 8000c7c: 655a str r2, [r3, #84] @ 0x54 hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCallback */ - 8000d12: 687b ldr r3, [r7, #4] - 8000d14: 4a86 ldr r2, [pc, #536] @ (8000f30 ) - 8000d16: 659a str r2, [r3, #88] @ 0x58 + 8000c7e: 687b ldr r3, [r7, #4] + 8000c80: 4a86 ldr r2, [pc, #536] @ (8000e9c ) + 8000c82: 659a str r2, [r3, #88] @ 0x58 if (hcan->MspInitCallback == NULL) - 8000d18: 687b ldr r3, [r7, #4] - 8000d1a: 6ddb ldr r3, [r3, #92] @ 0x5c - 8000d1c: 2b00 cmp r3, #0 - 8000d1e: d102 bne.n 8000d26 + 8000c84: 687b ldr r3, [r7, #4] + 8000c86: 6ddb ldr r3, [r3, #92] @ 0x5c + 8000c88: 2b00 cmp r3, #0 + 8000c8a: d102 bne.n 8000c92 { hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ - 8000d20: 687b ldr r3, [r7, #4] - 8000d22: 4a84 ldr r2, [pc, #528] @ (8000f34 ) - 8000d24: 65da str r2, [r3, #92] @ 0x5c + 8000c8c: 687b ldr r3, [r7, #4] + 8000c8e: 4a84 ldr r2, [pc, #528] @ (8000ea0 ) + 8000c90: 65da str r2, [r3, #92] @ 0x5c } /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); - 8000d26: 687b ldr r3, [r7, #4] - 8000d28: 6ddb ldr r3, [r3, #92] @ 0x5c - 8000d2a: 6878 ldr r0, [r7, #4] - 8000d2c: 4798 blx r3 + 8000c92: 687b ldr r3, [r7, #4] + 8000c94: 6ddb ldr r3, [r3, #92] @ 0x5c + 8000c96: 6878 ldr r0, [r7, #4] + 8000c98: 4798 blx r3 HAL_CAN_MspInit(hcan); } #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); - 8000d2e: 687b ldr r3, [r7, #4] - 8000d30: 681b ldr r3, [r3, #0] - 8000d32: 681a ldr r2, [r3, #0] - 8000d34: 687b ldr r3, [r7, #4] - 8000d36: 681b ldr r3, [r3, #0] - 8000d38: f042 0201 orr.w r2, r2, #1 - 8000d3c: 601a str r2, [r3, #0] + 8000c9a: 687b ldr r3, [r7, #4] + 8000c9c: 681b ldr r3, [r3, #0] + 8000c9e: 681a ldr r2, [r3, #0] + 8000ca0: 687b ldr r3, [r7, #4] + 8000ca2: 681b ldr r3, [r3, #0] + 8000ca4: f042 0201 orr.w r2, r2, #1 + 8000ca8: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); - 8000d3e: f7ff ffa9 bl 8000c94 - 8000d42: 60f8 str r0, [r7, #12] + 8000caa: f7ff ffa9 bl 8000c00 + 8000cae: 60f8 str r0, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) - 8000d44: e012 b.n 8000d6c + 8000cb0: e012 b.n 8000cd8 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) - 8000d46: f7ff ffa5 bl 8000c94 - 8000d4a: 4602 mov r2, r0 - 8000d4c: 68fb ldr r3, [r7, #12] - 8000d4e: 1ad3 subs r3, r2, r3 - 8000d50: 2b0a cmp r3, #10 - 8000d52: d90b bls.n 8000d6c + 8000cb2: f7ff ffa5 bl 8000c00 + 8000cb6: 4602 mov r2, r0 + 8000cb8: 68fb ldr r3, [r7, #12] + 8000cba: 1ad3 subs r3, r2, r3 + 8000cbc: 2b0a cmp r3, #10 + 8000cbe: d90b bls.n 8000cd8 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; - 8000d54: 687b ldr r3, [r7, #4] - 8000d56: 6a5b ldr r3, [r3, #36] @ 0x24 - 8000d58: f443 3200 orr.w r2, r3, #131072 @ 0x20000 - 8000d5c: 687b ldr r3, [r7, #4] - 8000d5e: 625a str r2, [r3, #36] @ 0x24 + 8000cc0: 687b ldr r3, [r7, #4] + 8000cc2: 6a5b ldr r3, [r3, #36] @ 0x24 + 8000cc4: f443 3200 orr.w r2, r3, #131072 @ 0x20000 + 8000cc8: 687b ldr r3, [r7, #4] + 8000cca: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; - 8000d60: 687b ldr r3, [r7, #4] - 8000d62: 2205 movs r2, #5 - 8000d64: f883 2020 strb.w r2, [r3, #32] + 8000ccc: 687b ldr r3, [r7, #4] + 8000cce: 2205 movs r2, #5 + 8000cd0: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8000d68: 2301 movs r3, #1 - 8000d6a: e0c5 b.n 8000ef8 + 8000cd4: 2301 movs r3, #1 + 8000cd6: e0c5 b.n 8000e64 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) - 8000d6c: 687b ldr r3, [r7, #4] - 8000d6e: 681b ldr r3, [r3, #0] - 8000d70: 685b ldr r3, [r3, #4] - 8000d72: f003 0301 and.w r3, r3, #1 - 8000d76: 2b00 cmp r3, #0 - 8000d78: d0e5 beq.n 8000d46 + 8000cd8: 687b ldr r3, [r7, #4] + 8000cda: 681b ldr r3, [r3, #0] + 8000cdc: 685b ldr r3, [r3, #4] + 8000cde: f003 0301 and.w r3, r3, #1 + 8000ce2: 2b00 cmp r3, #0 + 8000ce4: d0e5 beq.n 8000cb2 } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); - 8000d7a: 687b ldr r3, [r7, #4] - 8000d7c: 681b ldr r3, [r3, #0] - 8000d7e: 681a ldr r2, [r3, #0] - 8000d80: 687b ldr r3, [r7, #4] - 8000d82: 681b ldr r3, [r3, #0] - 8000d84: f022 0202 bic.w r2, r2, #2 - 8000d88: 601a str r2, [r3, #0] + 8000ce6: 687b ldr r3, [r7, #4] + 8000ce8: 681b ldr r3, [r3, #0] + 8000cea: 681a ldr r2, [r3, #0] + 8000cec: 687b ldr r3, [r7, #4] + 8000cee: 681b ldr r3, [r3, #0] + 8000cf0: f022 0202 bic.w r2, r2, #2 + 8000cf4: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); - 8000d8a: f7ff ff83 bl 8000c94 - 8000d8e: 60f8 str r0, [r7, #12] + 8000cf6: f7ff ff83 bl 8000c00 + 8000cfa: 60f8 str r0, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) - 8000d90: e012 b.n 8000db8 + 8000cfc: e012 b.n 8000d24 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) - 8000d92: f7ff ff7f bl 8000c94 - 8000d96: 4602 mov r2, r0 - 8000d98: 68fb ldr r3, [r7, #12] - 8000d9a: 1ad3 subs r3, r2, r3 - 8000d9c: 2b0a cmp r3, #10 - 8000d9e: d90b bls.n 8000db8 + 8000cfe: f7ff ff7f bl 8000c00 + 8000d02: 4602 mov r2, r0 + 8000d04: 68fb ldr r3, [r7, #12] + 8000d06: 1ad3 subs r3, r2, r3 + 8000d08: 2b0a cmp r3, #10 + 8000d0a: d90b bls.n 8000d24 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; - 8000da0: 687b ldr r3, [r7, #4] - 8000da2: 6a5b ldr r3, [r3, #36] @ 0x24 - 8000da4: f443 3200 orr.w r2, r3, #131072 @ 0x20000 - 8000da8: 687b ldr r3, [r7, #4] - 8000daa: 625a str r2, [r3, #36] @ 0x24 + 8000d0c: 687b ldr r3, [r7, #4] + 8000d0e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8000d10: f443 3200 orr.w r2, r3, #131072 @ 0x20000 + 8000d14: 687b ldr r3, [r7, #4] + 8000d16: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; - 8000dac: 687b ldr r3, [r7, #4] - 8000dae: 2205 movs r2, #5 - 8000db0: f883 2020 strb.w r2, [r3, #32] + 8000d18: 687b ldr r3, [r7, #4] + 8000d1a: 2205 movs r2, #5 + 8000d1c: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8000db4: 2301 movs r3, #1 - 8000db6: e09f b.n 8000ef8 + 8000d20: 2301 movs r3, #1 + 8000d22: e09f b.n 8000e64 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) - 8000db8: 687b ldr r3, [r7, #4] - 8000dba: 681b ldr r3, [r3, #0] - 8000dbc: 685b ldr r3, [r3, #4] - 8000dbe: f003 0302 and.w r3, r3, #2 - 8000dc2: 2b00 cmp r3, #0 - 8000dc4: d1e5 bne.n 8000d92 + 8000d24: 687b ldr r3, [r7, #4] + 8000d26: 681b ldr r3, [r3, #0] + 8000d28: 685b ldr r3, [r3, #4] + 8000d2a: f003 0302 and.w r3, r3, #2 + 8000d2e: 2b00 cmp r3, #0 + 8000d30: d1e5 bne.n 8000cfe } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) - 8000dc6: 687b ldr r3, [r7, #4] - 8000dc8: 7e1b ldrb r3, [r3, #24] - 8000dca: 2b01 cmp r3, #1 - 8000dcc: d108 bne.n 8000de0 + 8000d32: 687b ldr r3, [r7, #4] + 8000d34: 7e1b ldrb r3, [r3, #24] + 8000d36: 2b01 cmp r3, #1 + 8000d38: d108 bne.n 8000d4c { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); - 8000dce: 687b ldr r3, [r7, #4] - 8000dd0: 681b ldr r3, [r3, #0] - 8000dd2: 681a ldr r2, [r3, #0] - 8000dd4: 687b ldr r3, [r7, #4] - 8000dd6: 681b ldr r3, [r3, #0] - 8000dd8: f042 0280 orr.w r2, r2, #128 @ 0x80 - 8000ddc: 601a str r2, [r3, #0] - 8000dde: e007 b.n 8000df0 + 8000d3a: 687b ldr r3, [r7, #4] + 8000d3c: 681b ldr r3, [r3, #0] + 8000d3e: 681a ldr r2, [r3, #0] + 8000d40: 687b ldr r3, [r7, #4] + 8000d42: 681b ldr r3, [r3, #0] + 8000d44: f042 0280 orr.w r2, r2, #128 @ 0x80 + 8000d48: 601a str r2, [r3, #0] + 8000d4a: e007 b.n 8000d5c } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); - 8000de0: 687b ldr r3, [r7, #4] - 8000de2: 681b ldr r3, [r3, #0] - 8000de4: 681a ldr r2, [r3, #0] - 8000de6: 687b ldr r3, [r7, #4] - 8000de8: 681b ldr r3, [r3, #0] - 8000dea: f022 0280 bic.w r2, r2, #128 @ 0x80 - 8000dee: 601a str r2, [r3, #0] + 8000d4c: 687b ldr r3, [r7, #4] + 8000d4e: 681b ldr r3, [r3, #0] + 8000d50: 681a ldr r2, [r3, #0] + 8000d52: 687b ldr r3, [r7, #4] + 8000d54: 681b ldr r3, [r3, #0] + 8000d56: f022 0280 bic.w r2, r2, #128 @ 0x80 + 8000d5a: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) - 8000df0: 687b ldr r3, [r7, #4] - 8000df2: 7e5b ldrb r3, [r3, #25] - 8000df4: 2b01 cmp r3, #1 - 8000df6: d108 bne.n 8000e0a + 8000d5c: 687b ldr r3, [r7, #4] + 8000d5e: 7e5b ldrb r3, [r3, #25] + 8000d60: 2b01 cmp r3, #1 + 8000d62: d108 bne.n 8000d76 { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); - 8000df8: 687b ldr r3, [r7, #4] - 8000dfa: 681b ldr r3, [r3, #0] - 8000dfc: 681a ldr r2, [r3, #0] - 8000dfe: 687b ldr r3, [r7, #4] - 8000e00: 681b ldr r3, [r3, #0] - 8000e02: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8000e06: 601a str r2, [r3, #0] - 8000e08: e007 b.n 8000e1a + 8000d64: 687b ldr r3, [r7, #4] + 8000d66: 681b ldr r3, [r3, #0] + 8000d68: 681a ldr r2, [r3, #0] + 8000d6a: 687b ldr r3, [r7, #4] + 8000d6c: 681b ldr r3, [r3, #0] + 8000d6e: f042 0240 orr.w r2, r2, #64 @ 0x40 + 8000d72: 601a str r2, [r3, #0] + 8000d74: e007 b.n 8000d86 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); - 8000e0a: 687b ldr r3, [r7, #4] - 8000e0c: 681b ldr r3, [r3, #0] - 8000e0e: 681a ldr r2, [r3, #0] - 8000e10: 687b ldr r3, [r7, #4] - 8000e12: 681b ldr r3, [r3, #0] - 8000e14: f022 0240 bic.w r2, r2, #64 @ 0x40 - 8000e18: 601a str r2, [r3, #0] + 8000d76: 687b ldr r3, [r7, #4] + 8000d78: 681b ldr r3, [r3, #0] + 8000d7a: 681a ldr r2, [r3, #0] + 8000d7c: 687b ldr r3, [r7, #4] + 8000d7e: 681b ldr r3, [r3, #0] + 8000d80: f022 0240 bic.w r2, r2, #64 @ 0x40 + 8000d84: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) - 8000e1a: 687b ldr r3, [r7, #4] - 8000e1c: 7e9b ldrb r3, [r3, #26] - 8000e1e: 2b01 cmp r3, #1 - 8000e20: d108 bne.n 8000e34 + 8000d86: 687b ldr r3, [r7, #4] + 8000d88: 7e9b ldrb r3, [r3, #26] + 8000d8a: 2b01 cmp r3, #1 + 8000d8c: d108 bne.n 8000da0 { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); - 8000e22: 687b ldr r3, [r7, #4] - 8000e24: 681b ldr r3, [r3, #0] - 8000e26: 681a ldr r2, [r3, #0] - 8000e28: 687b ldr r3, [r7, #4] - 8000e2a: 681b ldr r3, [r3, #0] - 8000e2c: f042 0220 orr.w r2, r2, #32 - 8000e30: 601a str r2, [r3, #0] - 8000e32: e007 b.n 8000e44 + 8000d8e: 687b ldr r3, [r7, #4] + 8000d90: 681b ldr r3, [r3, #0] + 8000d92: 681a ldr r2, [r3, #0] + 8000d94: 687b ldr r3, [r7, #4] + 8000d96: 681b ldr r3, [r3, #0] + 8000d98: f042 0220 orr.w r2, r2, #32 + 8000d9c: 601a str r2, [r3, #0] + 8000d9e: e007 b.n 8000db0 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); - 8000e34: 687b ldr r3, [r7, #4] - 8000e36: 681b ldr r3, [r3, #0] - 8000e38: 681a ldr r2, [r3, #0] - 8000e3a: 687b ldr r3, [r7, #4] - 8000e3c: 681b ldr r3, [r3, #0] - 8000e3e: f022 0220 bic.w r2, r2, #32 - 8000e42: 601a str r2, [r3, #0] + 8000da0: 687b ldr r3, [r7, #4] + 8000da2: 681b ldr r3, [r3, #0] + 8000da4: 681a ldr r2, [r3, #0] + 8000da6: 687b ldr r3, [r7, #4] + 8000da8: 681b ldr r3, [r3, #0] + 8000daa: f022 0220 bic.w r2, r2, #32 + 8000dae: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) - 8000e44: 687b ldr r3, [r7, #4] - 8000e46: 7edb ldrb r3, [r3, #27] - 8000e48: 2b01 cmp r3, #1 - 8000e4a: d108 bne.n 8000e5e + 8000db0: 687b ldr r3, [r7, #4] + 8000db2: 7edb ldrb r3, [r3, #27] + 8000db4: 2b01 cmp r3, #1 + 8000db6: d108 bne.n 8000dca { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); - 8000e4c: 687b ldr r3, [r7, #4] - 8000e4e: 681b ldr r3, [r3, #0] - 8000e50: 681a ldr r2, [r3, #0] - 8000e52: 687b ldr r3, [r7, #4] - 8000e54: 681b ldr r3, [r3, #0] - 8000e56: f022 0210 bic.w r2, r2, #16 - 8000e5a: 601a str r2, [r3, #0] - 8000e5c: e007 b.n 8000e6e + 8000db8: 687b ldr r3, [r7, #4] + 8000dba: 681b ldr r3, [r3, #0] + 8000dbc: 681a ldr r2, [r3, #0] + 8000dbe: 687b ldr r3, [r7, #4] + 8000dc0: 681b ldr r3, [r3, #0] + 8000dc2: f022 0210 bic.w r2, r2, #16 + 8000dc6: 601a str r2, [r3, #0] + 8000dc8: e007 b.n 8000dda } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); - 8000e5e: 687b ldr r3, [r7, #4] - 8000e60: 681b ldr r3, [r3, #0] - 8000e62: 681a ldr r2, [r3, #0] - 8000e64: 687b ldr r3, [r7, #4] - 8000e66: 681b ldr r3, [r3, #0] - 8000e68: f042 0210 orr.w r2, r2, #16 - 8000e6c: 601a str r2, [r3, #0] + 8000dca: 687b ldr r3, [r7, #4] + 8000dcc: 681b ldr r3, [r3, #0] + 8000dce: 681a ldr r2, [r3, #0] + 8000dd0: 687b ldr r3, [r7, #4] + 8000dd2: 681b ldr r3, [r3, #0] + 8000dd4: f042 0210 orr.w r2, r2, #16 + 8000dd8: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) - 8000e6e: 687b ldr r3, [r7, #4] - 8000e70: 7f1b ldrb r3, [r3, #28] - 8000e72: 2b01 cmp r3, #1 - 8000e74: d108 bne.n 8000e88 + 8000dda: 687b ldr r3, [r7, #4] + 8000ddc: 7f1b ldrb r3, [r3, #28] + 8000dde: 2b01 cmp r3, #1 + 8000de0: d108 bne.n 8000df4 { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); - 8000e76: 687b ldr r3, [r7, #4] - 8000e78: 681b ldr r3, [r3, #0] - 8000e7a: 681a ldr r2, [r3, #0] - 8000e7c: 687b ldr r3, [r7, #4] - 8000e7e: 681b ldr r3, [r3, #0] - 8000e80: f042 0208 orr.w r2, r2, #8 - 8000e84: 601a str r2, [r3, #0] - 8000e86: e007 b.n 8000e98 + 8000de2: 687b ldr r3, [r7, #4] + 8000de4: 681b ldr r3, [r3, #0] + 8000de6: 681a ldr r2, [r3, #0] + 8000de8: 687b ldr r3, [r7, #4] + 8000dea: 681b ldr r3, [r3, #0] + 8000dec: f042 0208 orr.w r2, r2, #8 + 8000df0: 601a str r2, [r3, #0] + 8000df2: e007 b.n 8000e04 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); - 8000e88: 687b ldr r3, [r7, #4] - 8000e8a: 681b ldr r3, [r3, #0] - 8000e8c: 681a ldr r2, [r3, #0] - 8000e8e: 687b ldr r3, [r7, #4] - 8000e90: 681b ldr r3, [r3, #0] - 8000e92: f022 0208 bic.w r2, r2, #8 - 8000e96: 601a str r2, [r3, #0] + 8000df4: 687b ldr r3, [r7, #4] + 8000df6: 681b ldr r3, [r3, #0] + 8000df8: 681a ldr r2, [r3, #0] + 8000dfa: 687b ldr r3, [r7, #4] + 8000dfc: 681b ldr r3, [r3, #0] + 8000dfe: f022 0208 bic.w r2, r2, #8 + 8000e02: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) - 8000e98: 687b ldr r3, [r7, #4] - 8000e9a: 7f5b ldrb r3, [r3, #29] - 8000e9c: 2b01 cmp r3, #1 - 8000e9e: d108 bne.n 8000eb2 + 8000e04: 687b ldr r3, [r7, #4] + 8000e06: 7f5b ldrb r3, [r3, #29] + 8000e08: 2b01 cmp r3, #1 + 8000e0a: d108 bne.n 8000e1e { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); - 8000ea0: 687b ldr r3, [r7, #4] - 8000ea2: 681b ldr r3, [r3, #0] - 8000ea4: 681a ldr r2, [r3, #0] - 8000ea6: 687b ldr r3, [r7, #4] - 8000ea8: 681b ldr r3, [r3, #0] - 8000eaa: f042 0204 orr.w r2, r2, #4 - 8000eae: 601a str r2, [r3, #0] - 8000eb0: e007 b.n 8000ec2 + 8000e0c: 687b ldr r3, [r7, #4] + 8000e0e: 681b ldr r3, [r3, #0] + 8000e10: 681a ldr r2, [r3, #0] + 8000e12: 687b ldr r3, [r7, #4] + 8000e14: 681b ldr r3, [r3, #0] + 8000e16: f042 0204 orr.w r2, r2, #4 + 8000e1a: 601a str r2, [r3, #0] + 8000e1c: e007 b.n 8000e2e } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); - 8000eb2: 687b ldr r3, [r7, #4] - 8000eb4: 681b ldr r3, [r3, #0] - 8000eb6: 681a ldr r2, [r3, #0] - 8000eb8: 687b ldr r3, [r7, #4] - 8000eba: 681b ldr r3, [r3, #0] - 8000ebc: f022 0204 bic.w r2, r2, #4 - 8000ec0: 601a str r2, [r3, #0] + 8000e1e: 687b ldr r3, [r7, #4] + 8000e20: 681b ldr r3, [r3, #0] + 8000e22: 681a ldr r2, [r3, #0] + 8000e24: 687b ldr r3, [r7, #4] + 8000e26: 681b ldr r3, [r3, #0] + 8000e28: f022 0204 bic.w r2, r2, #4 + 8000e2c: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | - 8000ec2: 687b ldr r3, [r7, #4] - 8000ec4: 689a ldr r2, [r3, #8] - 8000ec6: 687b ldr r3, [r7, #4] - 8000ec8: 68db ldr r3, [r3, #12] - 8000eca: 431a orrs r2, r3 - 8000ecc: 687b ldr r3, [r7, #4] - 8000ece: 691b ldr r3, [r3, #16] - 8000ed0: 431a orrs r2, r3 - 8000ed2: 687b ldr r3, [r7, #4] - 8000ed4: 695b ldr r3, [r3, #20] - 8000ed6: ea42 0103 orr.w r1, r2, r3 - 8000eda: 687b ldr r3, [r7, #4] - 8000edc: 685b ldr r3, [r3, #4] - 8000ede: 1e5a subs r2, r3, #1 - 8000ee0: 687b ldr r3, [r7, #4] - 8000ee2: 681b ldr r3, [r3, #0] - 8000ee4: 430a orrs r2, r1 - 8000ee6: 61da str r2, [r3, #28] + 8000e2e: 687b ldr r3, [r7, #4] + 8000e30: 689a ldr r2, [r3, #8] + 8000e32: 687b ldr r3, [r7, #4] + 8000e34: 68db ldr r3, [r3, #12] + 8000e36: 431a orrs r2, r3 + 8000e38: 687b ldr r3, [r7, #4] + 8000e3a: 691b ldr r3, [r3, #16] + 8000e3c: 431a orrs r2, r3 + 8000e3e: 687b ldr r3, [r7, #4] + 8000e40: 695b ldr r3, [r3, #20] + 8000e42: ea42 0103 orr.w r1, r2, r3 + 8000e46: 687b ldr r3, [r7, #4] + 8000e48: 685b ldr r3, [r3, #4] + 8000e4a: 1e5a subs r2, r3, #1 + 8000e4c: 687b ldr r3, [r7, #4] + 8000e4e: 681b ldr r3, [r3, #0] + 8000e50: 430a orrs r2, r1 + 8000e52: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; - 8000ee8: 687b ldr r3, [r7, #4] - 8000eea: 2200 movs r2, #0 - 8000eec: 625a str r2, [r3, #36] @ 0x24 + 8000e54: 687b ldr r3, [r7, #4] + 8000e56: 2200 movs r2, #0 + 8000e58: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; - 8000eee: 687b ldr r3, [r7, #4] - 8000ef0: 2201 movs r2, #1 - 8000ef2: f883 2020 strb.w r2, [r3, #32] + 8000e5a: 687b ldr r3, [r7, #4] + 8000e5c: 2201 movs r2, #1 + 8000e5e: f883 2020 strb.w r2, [r3, #32] /* Return function status */ return HAL_OK; - 8000ef6: 2300 movs r3, #0 + 8000e62: 2300 movs r3, #0 } - 8000ef8: 4618 mov r0, r3 - 8000efa: 3710 adds r7, #16 - 8000efc: 46bd mov sp, r7 - 8000efe: bd80 pop {r7, pc} - 8000f00: 080003ad .word 0x080003ad - 8000f04: 08001987 .word 0x08001987 - 8000f08: 0800199b .word 0x0800199b - 8000f0c: 080019af .word 0x080019af - 8000f10: 0800190f .word 0x0800190f - 8000f14: 08001923 .word 0x08001923 - 8000f18: 08001937 .word 0x08001937 - 8000f1c: 0800194b .word 0x0800194b - 8000f20: 0800195f .word 0x0800195f - 8000f24: 08001973 .word 0x08001973 - 8000f28: 080019c3 .word 0x080019c3 - 8000f2c: 080019d7 .word 0x080019d7 - 8000f30: 080019eb .word 0x080019eb - 8000f34: 08000a39 .word 0x08000a39 + 8000e64: 4618 mov r0, r3 + 8000e66: 3710 adds r7, #16 + 8000e68: 46bd mov sp, r7 + 8000e6a: bd80 pop {r7, pc} + 8000e6c: 080003ad .word 0x080003ad + 8000e70: 080018f3 .word 0x080018f3 + 8000e74: 08001907 .word 0x08001907 + 8000e78: 0800191b .word 0x0800191b + 8000e7c: 0800187b .word 0x0800187b + 8000e80: 0800188f .word 0x0800188f + 8000e84: 080018a3 .word 0x080018a3 + 8000e88: 080018b7 .word 0x080018b7 + 8000e8c: 080018cb .word 0x080018cb + 8000e90: 080018df .word 0x080018df + 8000e94: 0800192f .word 0x0800192f + 8000e98: 08001943 .word 0x08001943 + 8000e9c: 08001957 .word 0x08001957 + 8000ea0: 080009a5 .word 0x080009a5 -08000f38 : +08000ea4 : * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that * contains the filter configuration information. * @retval None */ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) { - 8000f38: b480 push {r7} - 8000f3a: b087 sub sp, #28 - 8000f3c: af00 add r7, sp, #0 - 8000f3e: 6078 str r0, [r7, #4] - 8000f40: 6039 str r1, [r7, #0] + 8000ea4: b480 push {r7} + 8000ea6: b087 sub sp, #28 + 8000ea8: af00 add r7, sp, #0 + 8000eaa: 6078 str r0, [r7, #4] + 8000eac: 6039 str r1, [r7, #0] uint32_t filternbrbitpos; CAN_TypeDef *can_ip = hcan->Instance; - 8000f42: 687b ldr r3, [r7, #4] - 8000f44: 681b ldr r3, [r3, #0] - 8000f46: 617b str r3, [r7, #20] + 8000eae: 687b ldr r3, [r7, #4] + 8000eb0: 681b ldr r3, [r3, #0] + 8000eb2: 617b str r3, [r7, #20] HAL_CAN_StateTypeDef state = hcan->State; - 8000f48: 687b ldr r3, [r7, #4] - 8000f4a: f893 3020 ldrb.w r3, [r3, #32] - 8000f4e: 74fb strb r3, [r7, #19] + 8000eb4: 687b ldr r3, [r7, #4] + 8000eb6: f893 3020 ldrb.w r3, [r3, #32] + 8000eba: 74fb strb r3, [r7, #19] if ((state == HAL_CAN_STATE_READY) || - 8000f50: 7cfb ldrb r3, [r7, #19] - 8000f52: 2b01 cmp r3, #1 - 8000f54: d003 beq.n 8000f5e - 8000f56: 7cfb ldrb r3, [r7, #19] - 8000f58: 2b02 cmp r3, #2 - 8000f5a: f040 80aa bne.w 80010b2 + 8000ebc: 7cfb ldrb r3, [r7, #19] + 8000ebe: 2b01 cmp r3, #1 + 8000ec0: d003 beq.n 8000eca + 8000ec2: 7cfb ldrb r3, [r7, #19] + 8000ec4: 2b02 cmp r3, #2 + 8000ec6: f040 80aa bne.w 800101e /* Check the parameters */ assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); /* Initialisation mode for the filter */ SET_BIT(can_ip->FMR, CAN_FMR_FINIT); - 8000f5e: 697b ldr r3, [r7, #20] - 8000f60: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 - 8000f64: f043 0201 orr.w r2, r3, #1 - 8000f68: 697b ldr r3, [r7, #20] - 8000f6a: f8c3 2200 str.w r2, [r3, #512] @ 0x200 + 8000eca: 697b ldr r3, [r7, #20] + 8000ecc: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 + 8000ed0: f043 0201 orr.w r2, r3, #1 + 8000ed4: 697b ldr r3, [r7, #20] + 8000ed6: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Convert filter number into bit position */ filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); - 8000f6e: 683b ldr r3, [r7, #0] - 8000f70: 695b ldr r3, [r3, #20] - 8000f72: f003 031f and.w r3, r3, #31 - 8000f76: 2201 movs r2, #1 - 8000f78: fa02 f303 lsl.w r3, r2, r3 - 8000f7c: 60fb str r3, [r7, #12] + 8000eda: 683b ldr r3, [r7, #0] + 8000edc: 695b ldr r3, [r3, #20] + 8000ede: f003 031f and.w r3, r3, #31 + 8000ee2: 2201 movs r2, #1 + 8000ee4: fa02 f303 lsl.w r3, r2, r3 + 8000ee8: 60fb str r3, [r7, #12] /* Filter Deactivation */ CLEAR_BIT(can_ip->FA1R, filternbrbitpos); - 8000f7e: 697b ldr r3, [r7, #20] - 8000f80: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c - 8000f84: 68fb ldr r3, [r7, #12] - 8000f86: 43db mvns r3, r3 - 8000f88: 401a ands r2, r3 - 8000f8a: 697b ldr r3, [r7, #20] - 8000f8c: f8c3 221c str.w r2, [r3, #540] @ 0x21c + 8000eea: 697b ldr r3, [r7, #20] + 8000eec: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c + 8000ef0: 68fb ldr r3, [r7, #12] + 8000ef2: 43db mvns r3, r3 + 8000ef4: 401a ands r2, r3 + 8000ef6: 697b ldr r3, [r7, #20] + 8000ef8: f8c3 221c str.w r2, [r3, #540] @ 0x21c /* Filter Scale */ if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) - 8000f90: 683b ldr r3, [r7, #0] - 8000f92: 69db ldr r3, [r3, #28] - 8000f94: 2b00 cmp r3, #0 - 8000f96: d123 bne.n 8000fe0 + 8000efc: 683b ldr r3, [r7, #0] + 8000efe: 69db ldr r3, [r3, #28] + 8000f00: 2b00 cmp r3, #0 + 8000f02: d123 bne.n 8000f4c { /* 16-bit scale for the filter */ CLEAR_BIT(can_ip->FS1R, filternbrbitpos); - 8000f98: 697b ldr r3, [r7, #20] - 8000f9a: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c - 8000f9e: 68fb ldr r3, [r7, #12] - 8000fa0: 43db mvns r3, r3 - 8000fa2: 401a ands r2, r3 - 8000fa4: 697b ldr r3, [r7, #20] - 8000fa6: f8c3 220c str.w r2, [r3, #524] @ 0x20c + 8000f04: 697b ldr r3, [r7, #20] + 8000f06: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c + 8000f0a: 68fb ldr r3, [r7, #12] + 8000f0c: 43db mvns r3, r3 + 8000f0e: 401a ands r2, r3 + 8000f10: 697b ldr r3, [r7, #20] + 8000f12: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* First 16-bit identifier and First 16-bit mask */ /* Or First 16-bit identifier and Second 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | - 8000faa: 683b ldr r3, [r7, #0] - 8000fac: 68db ldr r3, [r3, #12] - 8000fae: 0419 lsls r1, r3, #16 + 8000f16: 683b ldr r3, [r7, #0] + 8000f18: 68db ldr r3, [r3, #12] + 8000f1a: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); - 8000fb0: 683b ldr r3, [r7, #0] - 8000fb2: 685b ldr r3, [r3, #4] - 8000fb4: b29b uxth r3, r3 + 8000f1c: 683b ldr r3, [r7, #0] + 8000f1e: 685b ldr r3, [r3, #4] + 8000f20: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = - 8000fb6: 683a ldr r2, [r7, #0] - 8000fb8: 6952 ldr r2, [r2, #20] + 8000f22: 683a ldr r2, [r7, #0] + 8000f24: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | - 8000fba: 4319 orrs r1, r3 + 8000f26: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = - 8000fbc: 697b ldr r3, [r7, #20] - 8000fbe: 3248 adds r2, #72 @ 0x48 - 8000fc0: f843 1032 str.w r1, [r3, r2, lsl #3] + 8000f28: 697b ldr r3, [r7, #20] + 8000f2a: 3248 adds r2, #72 @ 0x48 + 8000f2c: f843 1032 str.w r1, [r3, r2, lsl #3] /* Second 16-bit identifier and Second 16-bit mask */ /* Or Third 16-bit identifier and Fourth 16-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | - 8000fc4: 683b ldr r3, [r7, #0] - 8000fc6: 689b ldr r3, [r3, #8] - 8000fc8: 0419 lsls r1, r3, #16 + 8000f30: 683b ldr r3, [r7, #0] + 8000f32: 689b ldr r3, [r3, #8] + 8000f34: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); - 8000fca: 683b ldr r3, [r7, #0] - 8000fcc: 681b ldr r3, [r3, #0] - 8000fce: b29a uxth r2, r3 + 8000f36: 683b ldr r3, [r7, #0] + 8000f38: 681b ldr r3, [r3, #0] + 8000f3a: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = - 8000fd0: 683b ldr r3, [r7, #0] - 8000fd2: 695b ldr r3, [r3, #20] + 8000f3c: 683b ldr r3, [r7, #0] + 8000f3e: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | - 8000fd4: 430a orrs r2, r1 + 8000f40: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = - 8000fd6: 6979 ldr r1, [r7, #20] - 8000fd8: 3348 adds r3, #72 @ 0x48 - 8000fda: 00db lsls r3, r3, #3 - 8000fdc: 440b add r3, r1 - 8000fde: 605a str r2, [r3, #4] + 8000f42: 6979 ldr r1, [r7, #20] + 8000f44: 3348 adds r3, #72 @ 0x48 + 8000f46: 00db lsls r3, r3, #3 + 8000f48: 440b add r3, r1 + 8000f4a: 605a str r2, [r3, #4] } if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) - 8000fe0: 683b ldr r3, [r7, #0] - 8000fe2: 69db ldr r3, [r3, #28] - 8000fe4: 2b01 cmp r3, #1 - 8000fe6: d122 bne.n 800102e + 8000f4c: 683b ldr r3, [r7, #0] + 8000f4e: 69db ldr r3, [r3, #28] + 8000f50: 2b01 cmp r3, #1 + 8000f52: d122 bne.n 8000f9a { /* 32-bit scale for the filter */ SET_BIT(can_ip->FS1R, filternbrbitpos); - 8000fe8: 697b ldr r3, [r7, #20] - 8000fea: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c - 8000fee: 68fb ldr r3, [r7, #12] - 8000ff0: 431a orrs r2, r3 - 8000ff2: 697b ldr r3, [r7, #20] - 8000ff4: f8c3 220c str.w r2, [r3, #524] @ 0x20c + 8000f54: 697b ldr r3, [r7, #20] + 8000f56: f8d3 220c ldr.w r2, [r3, #524] @ 0x20c + 8000f5a: 68fb ldr r3, [r7, #12] + 8000f5c: 431a orrs r2, r3 + 8000f5e: 697b ldr r3, [r7, #20] + 8000f60: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* 32-bit identifier or First 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | - 8000ff8: 683b ldr r3, [r7, #0] - 8000ffa: 681b ldr r3, [r3, #0] - 8000ffc: 0419 lsls r1, r3, #16 + 8000f64: 683b ldr r3, [r7, #0] + 8000f66: 681b ldr r3, [r3, #0] + 8000f68: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); - 8000ffe: 683b ldr r3, [r7, #0] - 8001000: 685b ldr r3, [r3, #4] - 8001002: b29b uxth r3, r3 + 8000f6a: 683b ldr r3, [r7, #0] + 8000f6c: 685b ldr r3, [r3, #4] + 8000f6e: b29b uxth r3, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = - 8001004: 683a ldr r2, [r7, #0] - 8001006: 6952 ldr r2, [r2, #20] + 8000f70: 683a ldr r2, [r7, #0] + 8000f72: 6952 ldr r2, [r2, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | - 8001008: 4319 orrs r1, r3 + 8000f74: 4319 orrs r1, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = - 800100a: 697b ldr r3, [r7, #20] - 800100c: 3248 adds r2, #72 @ 0x48 - 800100e: f843 1032 str.w r1, [r3, r2, lsl #3] + 8000f76: 697b ldr r3, [r7, #20] + 8000f78: 3248 adds r2, #72 @ 0x48 + 8000f7a: f843 1032 str.w r1, [r3, r2, lsl #3] /* 32-bit mask or Second 32-bit identifier */ can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | - 8001012: 683b ldr r3, [r7, #0] - 8001014: 689b ldr r3, [r3, #8] - 8001016: 0419 lsls r1, r3, #16 + 8000f7e: 683b ldr r3, [r7, #0] + 8000f80: 689b ldr r3, [r3, #8] + 8000f82: 0419 lsls r1, r3, #16 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); - 8001018: 683b ldr r3, [r7, #0] - 800101a: 68db ldr r3, [r3, #12] - 800101c: b29a uxth r2, r3 + 8000f84: 683b ldr r3, [r7, #0] + 8000f86: 68db ldr r3, [r3, #12] + 8000f88: b29a uxth r2, r3 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = - 800101e: 683b ldr r3, [r7, #0] - 8001020: 695b ldr r3, [r3, #20] + 8000f8a: 683b ldr r3, [r7, #0] + 8000f8c: 695b ldr r3, [r3, #20] ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | - 8001022: 430a orrs r2, r1 + 8000f8e: 430a orrs r2, r1 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = - 8001024: 6979 ldr r1, [r7, #20] - 8001026: 3348 adds r3, #72 @ 0x48 - 8001028: 00db lsls r3, r3, #3 - 800102a: 440b add r3, r1 - 800102c: 605a str r2, [r3, #4] + 8000f90: 6979 ldr r1, [r7, #20] + 8000f92: 3348 adds r3, #72 @ 0x48 + 8000f94: 00db lsls r3, r3, #3 + 8000f96: 440b add r3, r1 + 8000f98: 605a str r2, [r3, #4] } /* Filter Mode */ if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) - 800102e: 683b ldr r3, [r7, #0] - 8001030: 699b ldr r3, [r3, #24] - 8001032: 2b00 cmp r3, #0 - 8001034: d109 bne.n 800104a + 8000f9a: 683b ldr r3, [r7, #0] + 8000f9c: 699b ldr r3, [r3, #24] + 8000f9e: 2b00 cmp r3, #0 + 8000fa0: d109 bne.n 8000fb6 { /* Id/Mask mode for the filter*/ CLEAR_BIT(can_ip->FM1R, filternbrbitpos); - 8001036: 697b ldr r3, [r7, #20] - 8001038: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 - 800103c: 68fb ldr r3, [r7, #12] - 800103e: 43db mvns r3, r3 - 8001040: 401a ands r2, r3 - 8001042: 697b ldr r3, [r7, #20] - 8001044: f8c3 2204 str.w r2, [r3, #516] @ 0x204 - 8001048: e007 b.n 800105a + 8000fa2: 697b ldr r3, [r7, #20] + 8000fa4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 + 8000fa8: 68fb ldr r3, [r7, #12] + 8000faa: 43db mvns r3, r3 + 8000fac: 401a ands r2, r3 + 8000fae: 697b ldr r3, [r7, #20] + 8000fb0: f8c3 2204 str.w r2, [r3, #516] @ 0x204 + 8000fb4: e007 b.n 8000fc6 } else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ { /* Identifier list mode for the filter*/ SET_BIT(can_ip->FM1R, filternbrbitpos); - 800104a: 697b ldr r3, [r7, #20] - 800104c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 - 8001050: 68fb ldr r3, [r7, #12] - 8001052: 431a orrs r2, r3 - 8001054: 697b ldr r3, [r7, #20] - 8001056: f8c3 2204 str.w r2, [r3, #516] @ 0x204 + 8000fb6: 697b ldr r3, [r7, #20] + 8000fb8: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 + 8000fbc: 68fb ldr r3, [r7, #12] + 8000fbe: 431a orrs r2, r3 + 8000fc0: 697b ldr r3, [r7, #20] + 8000fc2: f8c3 2204 str.w r2, [r3, #516] @ 0x204 } /* Filter FIFO assignment */ if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) - 800105a: 683b ldr r3, [r7, #0] - 800105c: 691b ldr r3, [r3, #16] - 800105e: 2b00 cmp r3, #0 - 8001060: d109 bne.n 8001076 + 8000fc6: 683b ldr r3, [r7, #0] + 8000fc8: 691b ldr r3, [r3, #16] + 8000fca: 2b00 cmp r3, #0 + 8000fcc: d109 bne.n 8000fe2 { /* FIFO 0 assignation for the filter */ CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); - 8001062: 697b ldr r3, [r7, #20] - 8001064: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 - 8001068: 68fb ldr r3, [r7, #12] - 800106a: 43db mvns r3, r3 - 800106c: 401a ands r2, r3 - 800106e: 697b ldr r3, [r7, #20] - 8001070: f8c3 2214 str.w r2, [r3, #532] @ 0x214 - 8001074: e007 b.n 8001086 + 8000fce: 697b ldr r3, [r7, #20] + 8000fd0: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 + 8000fd4: 68fb ldr r3, [r7, #12] + 8000fd6: 43db mvns r3, r3 + 8000fd8: 401a ands r2, r3 + 8000fda: 697b ldr r3, [r7, #20] + 8000fdc: f8c3 2214 str.w r2, [r3, #532] @ 0x214 + 8000fe0: e007 b.n 8000ff2 } else { /* FIFO 1 assignation for the filter */ SET_BIT(can_ip->FFA1R, filternbrbitpos); - 8001076: 697b ldr r3, [r7, #20] - 8001078: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 - 800107c: 68fb ldr r3, [r7, #12] - 800107e: 431a orrs r2, r3 - 8001080: 697b ldr r3, [r7, #20] - 8001082: f8c3 2214 str.w r2, [r3, #532] @ 0x214 + 8000fe2: 697b ldr r3, [r7, #20] + 8000fe4: f8d3 2214 ldr.w r2, [r3, #532] @ 0x214 + 8000fe8: 68fb ldr r3, [r7, #12] + 8000fea: 431a orrs r2, r3 + 8000fec: 697b ldr r3, [r7, #20] + 8000fee: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } /* Filter activation */ if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) - 8001086: 683b ldr r3, [r7, #0] - 8001088: 6a1b ldr r3, [r3, #32] - 800108a: 2b01 cmp r3, #1 - 800108c: d107 bne.n 800109e + 8000ff2: 683b ldr r3, [r7, #0] + 8000ff4: 6a1b ldr r3, [r3, #32] + 8000ff6: 2b01 cmp r3, #1 + 8000ff8: d107 bne.n 800100a { SET_BIT(can_ip->FA1R, filternbrbitpos); - 800108e: 697b ldr r3, [r7, #20] - 8001090: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c - 8001094: 68fb ldr r3, [r7, #12] - 8001096: 431a orrs r2, r3 - 8001098: 697b ldr r3, [r7, #20] - 800109a: f8c3 221c str.w r2, [r3, #540] @ 0x21c + 8000ffa: 697b ldr r3, [r7, #20] + 8000ffc: f8d3 221c ldr.w r2, [r3, #540] @ 0x21c + 8001000: 68fb ldr r3, [r7, #12] + 8001002: 431a orrs r2, r3 + 8001004: 697b ldr r3, [r7, #20] + 8001006: f8c3 221c str.w r2, [r3, #540] @ 0x21c } /* Leave the initialisation mode for the filter */ CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); - 800109e: 697b ldr r3, [r7, #20] - 80010a0: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 - 80010a4: f023 0201 bic.w r2, r3, #1 - 80010a8: 697b ldr r3, [r7, #20] - 80010aa: f8c3 2200 str.w r2, [r3, #512] @ 0x200 + 800100a: 697b ldr r3, [r7, #20] + 800100c: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200 + 8001010: f023 0201 bic.w r2, r3, #1 + 8001014: 697b ldr r3, [r7, #20] + 8001016: f8c3 2200 str.w r2, [r3, #512] @ 0x200 /* Return function status */ return HAL_OK; - 80010ae: 2300 movs r3, #0 - 80010b0: e006 b.n 80010c0 + 800101a: 2300 movs r3, #0 + 800101c: e006 b.n 800102c } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; - 80010b2: 687b ldr r3, [r7, #4] - 80010b4: 6a5b ldr r3, [r3, #36] @ 0x24 - 80010b6: f443 2280 orr.w r2, r3, #262144 @ 0x40000 - 80010ba: 687b ldr r3, [r7, #4] - 80010bc: 625a str r2, [r3, #36] @ 0x24 + 800101e: 687b ldr r3, [r7, #4] + 8001020: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001022: f443 2280 orr.w r2, r3, #262144 @ 0x40000 + 8001026: 687b ldr r3, [r7, #4] + 8001028: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 80010be: 2301 movs r3, #1 + 800102a: 2301 movs r3, #1 } } - 80010c0: 4618 mov r0, r3 - 80010c2: 371c adds r7, #28 - 80010c4: 46bd mov sp, r7 - 80010c6: f85d 7b04 ldr.w r7, [sp], #4 - 80010ca: 4770 bx lr + 800102c: 4618 mov r0, r3 + 800102e: 371c adds r7, #28 + 8001030: 46bd mov sp, r7 + 8001032: f85d 7b04 ldr.w r7, [sp], #4 + 8001036: 4770 bx lr -080010cc : +08001038 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { - 80010cc: b580 push {r7, lr} - 80010ce: b084 sub sp, #16 - 80010d0: af00 add r7, sp, #0 - 80010d2: 6078 str r0, [r7, #4] + 8001038: b580 push {r7, lr} + 800103a: b084 sub sp, #16 + 800103c: af00 add r7, sp, #0 + 800103e: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) - 80010d4: 687b ldr r3, [r7, #4] - 80010d6: f893 3020 ldrb.w r3, [r3, #32] - 80010da: b2db uxtb r3, r3 - 80010dc: 2b01 cmp r3, #1 - 80010de: d12e bne.n 800113e + 8001040: 687b ldr r3, [r7, #4] + 8001042: f893 3020 ldrb.w r3, [r3, #32] + 8001046: b2db uxtb r3, r3 + 8001048: 2b01 cmp r3, #1 + 800104a: d12e bne.n 80010aa { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; - 80010e0: 687b ldr r3, [r7, #4] - 80010e2: 2202 movs r2, #2 - 80010e4: f883 2020 strb.w r2, [r3, #32] + 800104c: 687b ldr r3, [r7, #4] + 800104e: 2202 movs r2, #2 + 8001050: f883 2020 strb.w r2, [r3, #32] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); - 80010e8: 687b ldr r3, [r7, #4] - 80010ea: 681b ldr r3, [r3, #0] - 80010ec: 681a ldr r2, [r3, #0] - 80010ee: 687b ldr r3, [r7, #4] - 80010f0: 681b ldr r3, [r3, #0] - 80010f2: f022 0201 bic.w r2, r2, #1 - 80010f6: 601a str r2, [r3, #0] + 8001054: 687b ldr r3, [r7, #4] + 8001056: 681b ldr r3, [r3, #0] + 8001058: 681a ldr r2, [r3, #0] + 800105a: 687b ldr r3, [r7, #4] + 800105c: 681b ldr r3, [r3, #0] + 800105e: f022 0201 bic.w r2, r2, #1 + 8001062: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); - 80010f8: f7ff fdcc bl 8000c94 - 80010fc: 60f8 str r0, [r7, #12] + 8001064: f7ff fdcc bl 8000c00 + 8001068: 60f8 str r0, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) - 80010fe: e012 b.n 8001126 + 800106a: e012 b.n 8001092 { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) - 8001100: f7ff fdc8 bl 8000c94 - 8001104: 4602 mov r2, r0 - 8001106: 68fb ldr r3, [r7, #12] - 8001108: 1ad3 subs r3, r2, r3 - 800110a: 2b0a cmp r3, #10 - 800110c: d90b bls.n 8001126 + 800106c: f7ff fdc8 bl 8000c00 + 8001070: 4602 mov r2, r0 + 8001072: 68fb ldr r3, [r7, #12] + 8001074: 1ad3 subs r3, r2, r3 + 8001076: 2b0a cmp r3, #10 + 8001078: d90b bls.n 8001092 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; - 800110e: 687b ldr r3, [r7, #4] - 8001110: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001112: f443 3200 orr.w r2, r3, #131072 @ 0x20000 - 8001116: 687b ldr r3, [r7, #4] - 8001118: 625a str r2, [r3, #36] @ 0x24 + 800107a: 687b ldr r3, [r7, #4] + 800107c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800107e: f443 3200 orr.w r2, r3, #131072 @ 0x20000 + 8001082: 687b ldr r3, [r7, #4] + 8001084: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; - 800111a: 687b ldr r3, [r7, #4] - 800111c: 2205 movs r2, #5 - 800111e: f883 2020 strb.w r2, [r3, #32] + 8001086: 687b ldr r3, [r7, #4] + 8001088: 2205 movs r2, #5 + 800108a: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8001122: 2301 movs r3, #1 - 8001124: e012 b.n 800114c + 800108e: 2301 movs r3, #1 + 8001090: e012 b.n 80010b8 while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) - 8001126: 687b ldr r3, [r7, #4] - 8001128: 681b ldr r3, [r3, #0] - 800112a: 685b ldr r3, [r3, #4] - 800112c: f003 0301 and.w r3, r3, #1 - 8001130: 2b00 cmp r3, #0 - 8001132: d1e5 bne.n 8001100 + 8001092: 687b ldr r3, [r7, #4] + 8001094: 681b ldr r3, [r3, #0] + 8001096: 685b ldr r3, [r3, #4] + 8001098: f003 0301 and.w r3, r3, #1 + 800109c: 2b00 cmp r3, #0 + 800109e: d1e5 bne.n 800106c } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; - 8001134: 687b ldr r3, [r7, #4] - 8001136: 2200 movs r2, #0 - 8001138: 625a str r2, [r3, #36] @ 0x24 + 80010a0: 687b ldr r3, [r7, #4] + 80010a2: 2200 movs r2, #0 + 80010a4: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; - 800113a: 2300 movs r3, #0 - 800113c: e006 b.n 800114c + 80010a6: 2300 movs r3, #0 + 80010a8: e006 b.n 80010b8 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; - 800113e: 687b ldr r3, [r7, #4] - 8001140: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001142: f443 2200 orr.w r2, r3, #524288 @ 0x80000 - 8001146: 687b ldr r3, [r7, #4] - 8001148: 625a str r2, [r3, #36] @ 0x24 + 80010aa: 687b ldr r3, [r7, #4] + 80010ac: 6a5b ldr r3, [r3, #36] @ 0x24 + 80010ae: f443 2200 orr.w r2, r3, #524288 @ 0x80000 + 80010b2: 687b ldr r3, [r7, #4] + 80010b4: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 800114a: 2301 movs r3, #1 + 80010b6: 2301 movs r3, #1 } } - 800114c: 4618 mov r0, r3 - 800114e: 3710 adds r7, #16 - 8001150: 46bd mov sp, r7 - 8001152: bd80 pop {r7, pc} + 80010b8: 4618 mov r0, r3 + 80010ba: 3710 adds r7, #16 + 80010bc: 46bd mov sp, r7 + 80010be: bd80 pop {r7, pc} -08001154 : +080010c0 : * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox) { - 8001154: b480 push {r7} - 8001156: b089 sub sp, #36 @ 0x24 - 8001158: af00 add r7, sp, #0 - 800115a: 60f8 str r0, [r7, #12] - 800115c: 60b9 str r1, [r7, #8] - 800115e: 607a str r2, [r7, #4] - 8001160: 603b str r3, [r7, #0] + 80010c0: b480 push {r7} + 80010c2: b089 sub sp, #36 @ 0x24 + 80010c4: af00 add r7, sp, #0 + 80010c6: 60f8 str r0, [r7, #12] + 80010c8: 60b9 str r1, [r7, #8] + 80010ca: 607a str r2, [r7, #4] + 80010cc: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; - 8001162: 68fb ldr r3, [r7, #12] - 8001164: f893 3020 ldrb.w r3, [r3, #32] - 8001168: 77fb strb r3, [r7, #31] + 80010ce: 68fb ldr r3, [r7, #12] + 80010d0: f893 3020 ldrb.w r3, [r3, #32] + 80010d4: 77fb strb r3, [r7, #31] uint32_t tsr = READ_REG(hcan->Instance->TSR); - 800116a: 68fb ldr r3, [r7, #12] - 800116c: 681b ldr r3, [r3, #0] - 800116e: 689b ldr r3, [r3, #8] - 8001170: 61bb str r3, [r7, #24] + 80010d6: 68fb ldr r3, [r7, #12] + 80010d8: 681b ldr r3, [r3, #0] + 80010da: 689b ldr r3, [r3, #8] + 80010dc: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || - 8001172: 7ffb ldrb r3, [r7, #31] - 8001174: 2b01 cmp r3, #1 - 8001176: d003 beq.n 8001180 - 8001178: 7ffb ldrb r3, [r7, #31] - 800117a: 2b02 cmp r3, #2 - 800117c: f040 80ad bne.w 80012da + 80010de: 7ffb ldrb r3, [r7, #31] + 80010e0: 2b01 cmp r3, #1 + 80010e2: d003 beq.n 80010ec + 80010e4: 7ffb ldrb r3, [r7, #31] + 80010e6: 2b02 cmp r3, #2 + 80010e8: f040 80ad bne.w 8001246 (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || - 8001180: 69bb ldr r3, [r7, #24] - 8001182: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 - 8001186: 2b00 cmp r3, #0 - 8001188: d10a bne.n 80011a0 + 80010ec: 69bb ldr r3, [r7, #24] + 80010ee: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 + 80010f2: 2b00 cmp r3, #0 + 80010f4: d10a bne.n 800110c ((tsr & CAN_TSR_TME1) != 0U) || - 800118a: 69bb ldr r3, [r7, #24] - 800118c: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 + 80010f6: 69bb ldr r3, [r7, #24] + 80010f8: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 if (((tsr & CAN_TSR_TME0) != 0U) || - 8001190: 2b00 cmp r3, #0 - 8001192: d105 bne.n 80011a0 + 80010fc: 2b00 cmp r3, #0 + 80010fe: d105 bne.n 800110c ((tsr & CAN_TSR_TME2) != 0U)) - 8001194: 69bb ldr r3, [r7, #24] - 8001196: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8001100: 69bb ldr r3, [r7, #24] + 8001102: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 ((tsr & CAN_TSR_TME1) != 0U) || - 800119a: 2b00 cmp r3, #0 - 800119c: f000 8095 beq.w 80012ca + 8001106: 2b00 cmp r3, #0 + 8001108: f000 8095 beq.w 8001236 { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; - 80011a0: 69bb ldr r3, [r7, #24] - 80011a2: 0e1b lsrs r3, r3, #24 - 80011a4: f003 0303 and.w r3, r3, #3 - 80011a8: 617b str r3, [r7, #20] + 800110c: 69bb ldr r3, [r7, #24] + 800110e: 0e1b lsrs r3, r3, #24 + 8001110: f003 0303 and.w r3, r3, #3 + 8001114: 617b str r3, [r7, #20] /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; - 80011aa: 2201 movs r2, #1 - 80011ac: 697b ldr r3, [r7, #20] - 80011ae: 409a lsls r2, r3 - 80011b0: 683b ldr r3, [r7, #0] - 80011b2: 601a str r2, [r3, #0] + 8001116: 2201 movs r2, #1 + 8001118: 697b ldr r3, [r7, #20] + 800111a: 409a lsls r2, r3 + 800111c: 683b ldr r3, [r7, #0] + 800111e: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) - 80011b4: 68bb ldr r3, [r7, #8] - 80011b6: 689b ldr r3, [r3, #8] - 80011b8: 2b00 cmp r3, #0 - 80011ba: d10d bne.n 80011d8 + 8001120: 68bb ldr r3, [r7, #8] + 8001122: 689b ldr r3, [r3, #8] + 8001124: 2b00 cmp r3, #0 + 8001126: d10d bne.n 8001144 { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | - 80011bc: 68bb ldr r3, [r7, #8] - 80011be: 681b ldr r3, [r3, #0] - 80011c0: 055a lsls r2, r3, #21 + 8001128: 68bb ldr r3, [r7, #8] + 800112a: 681b ldr r3, [r3, #0] + 800112c: 055a lsls r2, r3, #21 pHeader->RTR); - 80011c2: 68bb ldr r3, [r7, #8] - 80011c4: 68db ldr r3, [r3, #12] + 800112e: 68bb ldr r3, [r7, #8] + 8001130: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | - 80011c6: 68f9 ldr r1, [r7, #12] - 80011c8: 6809 ldr r1, [r1, #0] - 80011ca: 431a orrs r2, r3 - 80011cc: 697b ldr r3, [r7, #20] - 80011ce: 3318 adds r3, #24 - 80011d0: 011b lsls r3, r3, #4 - 80011d2: 440b add r3, r1 - 80011d4: 601a str r2, [r3, #0] - 80011d6: e00f b.n 80011f8 + 8001132: 68f9 ldr r1, [r7, #12] + 8001134: 6809 ldr r1, [r1, #0] + 8001136: 431a orrs r2, r3 + 8001138: 697b ldr r3, [r7, #20] + 800113a: 3318 adds r3, #24 + 800113c: 011b lsls r3, r3, #4 + 800113e: 440b add r3, r1 + 8001140: 601a str r2, [r3, #0] + 8001142: e00f b.n 8001164 } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | - 80011d8: 68bb ldr r3, [r7, #8] - 80011da: 685b ldr r3, [r3, #4] - 80011dc: 00da lsls r2, r3, #3 + 8001144: 68bb ldr r3, [r7, #8] + 8001146: 685b ldr r3, [r3, #4] + 8001148: 00da lsls r2, r3, #3 pHeader->IDE | - 80011de: 68bb ldr r3, [r7, #8] - 80011e0: 689b ldr r3, [r3, #8] + 800114a: 68bb ldr r3, [r7, #8] + 800114c: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | - 80011e2: 431a orrs r2, r3 + 800114e: 431a orrs r2, r3 pHeader->RTR); - 80011e4: 68bb ldr r3, [r7, #8] - 80011e6: 68db ldr r3, [r3, #12] + 8001150: 68bb ldr r3, [r7, #8] + 8001152: 68db ldr r3, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | - 80011e8: 68f9 ldr r1, [r7, #12] - 80011ea: 6809 ldr r1, [r1, #0] + 8001154: 68f9 ldr r1, [r7, #12] + 8001156: 6809 ldr r1, [r1, #0] pHeader->IDE | - 80011ec: 431a orrs r2, r3 + 8001158: 431a orrs r2, r3 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | - 80011ee: 697b ldr r3, [r7, #20] - 80011f0: 3318 adds r3, #24 - 80011f2: 011b lsls r3, r3, #4 - 80011f4: 440b add r3, r1 - 80011f6: 601a str r2, [r3, #0] + 800115a: 697b ldr r3, [r7, #20] + 800115c: 3318 adds r3, #24 + 800115e: 011b lsls r3, r3, #4 + 8001160: 440b add r3, r1 + 8001162: 601a str r2, [r3, #0] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); - 80011f8: 68fb ldr r3, [r7, #12] - 80011fa: 6819 ldr r1, [r3, #0] - 80011fc: 68bb ldr r3, [r7, #8] - 80011fe: 691a ldr r2, [r3, #16] - 8001200: 697b ldr r3, [r7, #20] - 8001202: 3318 adds r3, #24 - 8001204: 011b lsls r3, r3, #4 - 8001206: 440b add r3, r1 - 8001208: 3304 adds r3, #4 - 800120a: 601a str r2, [r3, #0] + 8001164: 68fb ldr r3, [r7, #12] + 8001166: 6819 ldr r1, [r3, #0] + 8001168: 68bb ldr r3, [r7, #8] + 800116a: 691a ldr r2, [r3, #16] + 800116c: 697b ldr r3, [r7, #20] + 800116e: 3318 adds r3, #24 + 8001170: 011b lsls r3, r3, #4 + 8001172: 440b add r3, r1 + 8001174: 3304 adds r3, #4 + 8001176: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) - 800120c: 68bb ldr r3, [r7, #8] - 800120e: 7d1b ldrb r3, [r3, #20] - 8001210: 2b01 cmp r3, #1 - 8001212: d111 bne.n 8001238 + 8001178: 68bb ldr r3, [r7, #8] + 800117a: 7d1b ldrb r3, [r3, #20] + 800117c: 2b01 cmp r3, #1 + 800117e: d111 bne.n 80011a4 { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); - 8001214: 68fb ldr r3, [r7, #12] - 8001216: 681a ldr r2, [r3, #0] - 8001218: 697b ldr r3, [r7, #20] - 800121a: 3318 adds r3, #24 - 800121c: 011b lsls r3, r3, #4 - 800121e: 4413 add r3, r2 - 8001220: 3304 adds r3, #4 - 8001222: 681b ldr r3, [r3, #0] - 8001224: 68fa ldr r2, [r7, #12] - 8001226: 6811 ldr r1, [r2, #0] - 8001228: f443 7280 orr.w r2, r3, #256 @ 0x100 - 800122c: 697b ldr r3, [r7, #20] - 800122e: 3318 adds r3, #24 - 8001230: 011b lsls r3, r3, #4 - 8001232: 440b add r3, r1 - 8001234: 3304 adds r3, #4 - 8001236: 601a str r2, [r3, #0] + 8001180: 68fb ldr r3, [r7, #12] + 8001182: 681a ldr r2, [r3, #0] + 8001184: 697b ldr r3, [r7, #20] + 8001186: 3318 adds r3, #24 + 8001188: 011b lsls r3, r3, #4 + 800118a: 4413 add r3, r2 + 800118c: 3304 adds r3, #4 + 800118e: 681b ldr r3, [r3, #0] + 8001190: 68fa ldr r2, [r7, #12] + 8001192: 6811 ldr r1, [r2, #0] + 8001194: f443 7280 orr.w r2, r3, #256 @ 0x100 + 8001198: 697b ldr r3, [r7, #20] + 800119a: 3318 adds r3, #24 + 800119c: 011b lsls r3, r3, #4 + 800119e: 440b add r3, r1 + 80011a0: 3304 adds r3, #4 + 80011a2: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, - 8001238: 687b ldr r3, [r7, #4] - 800123a: 3307 adds r3, #7 - 800123c: 781b ldrb r3, [r3, #0] - 800123e: 061a lsls r2, r3, #24 - 8001240: 687b ldr r3, [r7, #4] - 8001242: 3306 adds r3, #6 - 8001244: 781b ldrb r3, [r3, #0] - 8001246: 041b lsls r3, r3, #16 - 8001248: 431a orrs r2, r3 - 800124a: 687b ldr r3, [r7, #4] - 800124c: 3305 adds r3, #5 - 800124e: 781b ldrb r3, [r3, #0] - 8001250: 021b lsls r3, r3, #8 - 8001252: 4313 orrs r3, r2 - 8001254: 687a ldr r2, [r7, #4] - 8001256: 3204 adds r2, #4 - 8001258: 7812 ldrb r2, [r2, #0] - 800125a: 4610 mov r0, r2 - 800125c: 68fa ldr r2, [r7, #12] - 800125e: 6811 ldr r1, [r2, #0] - 8001260: ea43 0200 orr.w r2, r3, r0 - 8001264: 697b ldr r3, [r7, #20] - 8001266: 011b lsls r3, r3, #4 - 8001268: 440b add r3, r1 - 800126a: f503 73c6 add.w r3, r3, #396 @ 0x18c - 800126e: 601a str r2, [r3, #0] + 80011a4: 687b ldr r3, [r7, #4] + 80011a6: 3307 adds r3, #7 + 80011a8: 781b ldrb r3, [r3, #0] + 80011aa: 061a lsls r2, r3, #24 + 80011ac: 687b ldr r3, [r7, #4] + 80011ae: 3306 adds r3, #6 + 80011b0: 781b ldrb r3, [r3, #0] + 80011b2: 041b lsls r3, r3, #16 + 80011b4: 431a orrs r2, r3 + 80011b6: 687b ldr r3, [r7, #4] + 80011b8: 3305 adds r3, #5 + 80011ba: 781b ldrb r3, [r3, #0] + 80011bc: 021b lsls r3, r3, #8 + 80011be: 4313 orrs r3, r2 + 80011c0: 687a ldr r2, [r7, #4] + 80011c2: 3204 adds r2, #4 + 80011c4: 7812 ldrb r2, [r2, #0] + 80011c6: 4610 mov r0, r2 + 80011c8: 68fa ldr r2, [r7, #12] + 80011ca: 6811 ldr r1, [r2, #0] + 80011cc: ea43 0200 orr.w r2, r3, r0 + 80011d0: 697b ldr r3, [r7, #20] + 80011d2: 011b lsls r3, r3, #4 + 80011d4: 440b add r3, r1 + 80011d6: f503 73c6 add.w r3, r3, #396 @ 0x18c + 80011da: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, - 8001270: 687b ldr r3, [r7, #4] - 8001272: 3303 adds r3, #3 - 8001274: 781b ldrb r3, [r3, #0] - 8001276: 061a lsls r2, r3, #24 - 8001278: 687b ldr r3, [r7, #4] - 800127a: 3302 adds r3, #2 - 800127c: 781b ldrb r3, [r3, #0] - 800127e: 041b lsls r3, r3, #16 - 8001280: 431a orrs r2, r3 - 8001282: 687b ldr r3, [r7, #4] - 8001284: 3301 adds r3, #1 - 8001286: 781b ldrb r3, [r3, #0] - 8001288: 021b lsls r3, r3, #8 - 800128a: 4313 orrs r3, r2 - 800128c: 687a ldr r2, [r7, #4] - 800128e: 7812 ldrb r2, [r2, #0] - 8001290: 4610 mov r0, r2 - 8001292: 68fa ldr r2, [r7, #12] - 8001294: 6811 ldr r1, [r2, #0] - 8001296: ea43 0200 orr.w r2, r3, r0 - 800129a: 697b ldr r3, [r7, #20] - 800129c: 011b lsls r3, r3, #4 - 800129e: 440b add r3, r1 - 80012a0: f503 73c4 add.w r3, r3, #392 @ 0x188 - 80012a4: 601a str r2, [r3, #0] + 80011dc: 687b ldr r3, [r7, #4] + 80011de: 3303 adds r3, #3 + 80011e0: 781b ldrb r3, [r3, #0] + 80011e2: 061a lsls r2, r3, #24 + 80011e4: 687b ldr r3, [r7, #4] + 80011e6: 3302 adds r3, #2 + 80011e8: 781b ldrb r3, [r3, #0] + 80011ea: 041b lsls r3, r3, #16 + 80011ec: 431a orrs r2, r3 + 80011ee: 687b ldr r3, [r7, #4] + 80011f0: 3301 adds r3, #1 + 80011f2: 781b ldrb r3, [r3, #0] + 80011f4: 021b lsls r3, r3, #8 + 80011f6: 4313 orrs r3, r2 + 80011f8: 687a ldr r2, [r7, #4] + 80011fa: 7812 ldrb r2, [r2, #0] + 80011fc: 4610 mov r0, r2 + 80011fe: 68fa ldr r2, [r7, #12] + 8001200: 6811 ldr r1, [r2, #0] + 8001202: ea43 0200 orr.w r2, r3, r0 + 8001206: 697b ldr r3, [r7, #20] + 8001208: 011b lsls r3, r3, #4 + 800120a: 440b add r3, r1 + 800120c: f503 73c4 add.w r3, r3, #392 @ 0x188 + 8001210: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); - 80012a6: 68fb ldr r3, [r7, #12] - 80012a8: 681a ldr r2, [r3, #0] - 80012aa: 697b ldr r3, [r7, #20] - 80012ac: 3318 adds r3, #24 - 80012ae: 011b lsls r3, r3, #4 - 80012b0: 4413 add r3, r2 - 80012b2: 681b ldr r3, [r3, #0] - 80012b4: 68fa ldr r2, [r7, #12] - 80012b6: 6811 ldr r1, [r2, #0] - 80012b8: f043 0201 orr.w r2, r3, #1 - 80012bc: 697b ldr r3, [r7, #20] - 80012be: 3318 adds r3, #24 - 80012c0: 011b lsls r3, r3, #4 - 80012c2: 440b add r3, r1 - 80012c4: 601a str r2, [r3, #0] + 8001212: 68fb ldr r3, [r7, #12] + 8001214: 681a ldr r2, [r3, #0] + 8001216: 697b ldr r3, [r7, #20] + 8001218: 3318 adds r3, #24 + 800121a: 011b lsls r3, r3, #4 + 800121c: 4413 add r3, r2 + 800121e: 681b ldr r3, [r3, #0] + 8001220: 68fa ldr r2, [r7, #12] + 8001222: 6811 ldr r1, [r2, #0] + 8001224: f043 0201 orr.w r2, r3, #1 + 8001228: 697b ldr r3, [r7, #20] + 800122a: 3318 adds r3, #24 + 800122c: 011b lsls r3, r3, #4 + 800122e: 440b add r3, r1 + 8001230: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; - 80012c6: 2300 movs r3, #0 - 80012c8: e00e b.n 80012e8 + 8001232: 2300 movs r3, #0 + 8001234: e00e b.n 8001254 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; - 80012ca: 68fb ldr r3, [r7, #12] - 80012cc: 6a5b ldr r3, [r3, #36] @ 0x24 - 80012ce: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 - 80012d2: 68fb ldr r3, [r7, #12] - 80012d4: 625a str r2, [r3, #36] @ 0x24 + 8001236: 68fb ldr r3, [r7, #12] + 8001238: 6a5b ldr r3, [r3, #36] @ 0x24 + 800123a: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 + 800123e: 68fb ldr r3, [r7, #12] + 8001240: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 80012d6: 2301 movs r3, #1 - 80012d8: e006 b.n 80012e8 + 8001242: 2301 movs r3, #1 + 8001244: e006 b.n 8001254 } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; - 80012da: 68fb ldr r3, [r7, #12] - 80012dc: 6a5b ldr r3, [r3, #36] @ 0x24 - 80012de: f443 2280 orr.w r2, r3, #262144 @ 0x40000 - 80012e2: 68fb ldr r3, [r7, #12] - 80012e4: 625a str r2, [r3, #36] @ 0x24 + 8001246: 68fb ldr r3, [r7, #12] + 8001248: 6a5b ldr r3, [r3, #36] @ 0x24 + 800124a: f443 2280 orr.w r2, r3, #262144 @ 0x40000 + 800124e: 68fb ldr r3, [r7, #12] + 8001250: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 80012e6: 2301 movs r3, #1 + 8001252: 2301 movs r3, #1 } } - 80012e8: 4618 mov r0, r3 - 80012ea: 3724 adds r7, #36 @ 0x24 - 80012ec: 46bd mov sp, r7 - 80012ee: f85d 7b04 ldr.w r7, [sp], #4 - 80012f2: 4770 bx lr + 8001254: 4618 mov r0, r3 + 8001256: 3724 adds r7, #36 @ 0x24 + 8001258: 46bd mov sp, r7 + 800125a: f85d 7b04 ldr.w r7, [sp], #4 + 800125e: 4770 bx lr -080012f4 : +08001260 : * @param aData array where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) { - 80012f4: b480 push {r7} - 80012f6: b087 sub sp, #28 - 80012f8: af00 add r7, sp, #0 - 80012fa: 60f8 str r0, [r7, #12] - 80012fc: 60b9 str r1, [r7, #8] - 80012fe: 607a str r2, [r7, #4] - 8001300: 603b str r3, [r7, #0] + 8001260: b480 push {r7} + 8001262: b087 sub sp, #28 + 8001264: af00 add r7, sp, #0 + 8001266: 60f8 str r0, [r7, #12] + 8001268: 60b9 str r1, [r7, #8] + 800126a: 607a str r2, [r7, #4] + 800126c: 603b str r3, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; - 8001302: 68fb ldr r3, [r7, #12] - 8001304: f893 3020 ldrb.w r3, [r3, #32] - 8001308: 75fb strb r3, [r7, #23] + 800126e: 68fb ldr r3, [r7, #12] + 8001270: f893 3020 ldrb.w r3, [r3, #32] + 8001274: 75fb strb r3, [r7, #23] assert_param(IS_CAN_RX_FIFO(RxFifo)); if ((state == HAL_CAN_STATE_READY) || - 800130a: 7dfb ldrb r3, [r7, #23] - 800130c: 2b01 cmp r3, #1 - 800130e: d003 beq.n 8001318 - 8001310: 7dfb ldrb r3, [r7, #23] - 8001312: 2b02 cmp r3, #2 - 8001314: f040 8103 bne.w 800151e + 8001276: 7dfb ldrb r3, [r7, #23] + 8001278: 2b01 cmp r3, #1 + 800127a: d003 beq.n 8001284 + 800127c: 7dfb ldrb r3, [r7, #23] + 800127e: 2b02 cmp r3, #2 + 8001280: f040 8103 bne.w 800148a (state == HAL_CAN_STATE_LISTENING)) { /* Check the Rx FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ - 8001318: 68bb ldr r3, [r7, #8] - 800131a: 2b00 cmp r3, #0 - 800131c: d10e bne.n 800133c + 8001284: 68bb ldr r3, [r7, #8] + 8001286: 2b00 cmp r3, #0 + 8001288: d10e bne.n 80012a8 { /* Check that the Rx FIFO 0 is not empty */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) - 800131e: 68fb ldr r3, [r7, #12] - 8001320: 681b ldr r3, [r3, #0] - 8001322: 68db ldr r3, [r3, #12] - 8001324: f003 0303 and.w r3, r3, #3 - 8001328: 2b00 cmp r3, #0 - 800132a: d116 bne.n 800135a + 800128a: 68fb ldr r3, [r7, #12] + 800128c: 681b ldr r3, [r3, #0] + 800128e: 68db ldr r3, [r3, #12] + 8001290: f003 0303 and.w r3, r3, #3 + 8001294: 2b00 cmp r3, #0 + 8001296: d116 bne.n 80012c6 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; - 800132c: 68fb ldr r3, [r7, #12] - 800132e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001330: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 - 8001334: 68fb ldr r3, [r7, #12] - 8001336: 625a str r2, [r3, #36] @ 0x24 + 8001298: 68fb ldr r3, [r7, #12] + 800129a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800129c: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 + 80012a0: 68fb ldr r3, [r7, #12] + 80012a2: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 8001338: 2301 movs r3, #1 - 800133a: e0f7 b.n 800152c + 80012a4: 2301 movs r3, #1 + 80012a6: e0f7 b.n 8001498 } } else /* Rx element is assigned to Rx FIFO 1 */ { /* Check that the Rx FIFO 1 is not empty */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) - 800133c: 68fb ldr r3, [r7, #12] - 800133e: 681b ldr r3, [r3, #0] - 8001340: 691b ldr r3, [r3, #16] - 8001342: f003 0303 and.w r3, r3, #3 - 8001346: 2b00 cmp r3, #0 - 8001348: d107 bne.n 800135a + 80012a8: 68fb ldr r3, [r7, #12] + 80012aa: 681b ldr r3, [r3, #0] + 80012ac: 691b ldr r3, [r3, #16] + 80012ae: f003 0303 and.w r3, r3, #3 + 80012b2: 2b00 cmp r3, #0 + 80012b4: d107 bne.n 80012c6 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; - 800134a: 68fb ldr r3, [r7, #12] - 800134c: 6a5b ldr r3, [r3, #36] @ 0x24 - 800134e: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 - 8001352: 68fb ldr r3, [r7, #12] - 8001354: 625a str r2, [r3, #36] @ 0x24 + 80012b6: 68fb ldr r3, [r7, #12] + 80012b8: 6a5b ldr r3, [r3, #36] @ 0x24 + 80012ba: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 + 80012be: 68fb ldr r3, [r7, #12] + 80012c0: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 8001356: 2301 movs r3, #1 - 8001358: e0e8 b.n 800152c + 80012c2: 2301 movs r3, #1 + 80012c4: e0e8 b.n 8001498 } } /* Get the header */ pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; - 800135a: 68fb ldr r3, [r7, #12] - 800135c: 681a ldr r2, [r3, #0] - 800135e: 68bb ldr r3, [r7, #8] - 8001360: 331b adds r3, #27 - 8001362: 011b lsls r3, r3, #4 - 8001364: 4413 add r3, r2 - 8001366: 681b ldr r3, [r3, #0] - 8001368: f003 0204 and.w r2, r3, #4 - 800136c: 687b ldr r3, [r7, #4] - 800136e: 609a str r2, [r3, #8] + 80012c6: 68fb ldr r3, [r7, #12] + 80012c8: 681a ldr r2, [r3, #0] + 80012ca: 68bb ldr r3, [r7, #8] + 80012cc: 331b adds r3, #27 + 80012ce: 011b lsls r3, r3, #4 + 80012d0: 4413 add r3, r2 + 80012d2: 681b ldr r3, [r3, #0] + 80012d4: f003 0204 and.w r2, r3, #4 + 80012d8: 687b ldr r3, [r7, #4] + 80012da: 609a str r2, [r3, #8] if (pHeader->IDE == CAN_ID_STD) - 8001370: 687b ldr r3, [r7, #4] - 8001372: 689b ldr r3, [r3, #8] - 8001374: 2b00 cmp r3, #0 - 8001376: d10c bne.n 8001392 + 80012dc: 687b ldr r3, [r7, #4] + 80012de: 689b ldr r3, [r3, #8] + 80012e0: 2b00 cmp r3, #0 + 80012e2: d10c bne.n 80012fe { pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; - 8001378: 68fb ldr r3, [r7, #12] - 800137a: 681a ldr r2, [r3, #0] - 800137c: 68bb ldr r3, [r7, #8] - 800137e: 331b adds r3, #27 - 8001380: 011b lsls r3, r3, #4 - 8001382: 4413 add r3, r2 - 8001384: 681b ldr r3, [r3, #0] - 8001386: 0d5b lsrs r3, r3, #21 - 8001388: f3c3 020a ubfx r2, r3, #0, #11 - 800138c: 687b ldr r3, [r7, #4] - 800138e: 601a str r2, [r3, #0] - 8001390: e00b b.n 80013aa + 80012e4: 68fb ldr r3, [r7, #12] + 80012e6: 681a ldr r2, [r3, #0] + 80012e8: 68bb ldr r3, [r7, #8] + 80012ea: 331b adds r3, #27 + 80012ec: 011b lsls r3, r3, #4 + 80012ee: 4413 add r3, r2 + 80012f0: 681b ldr r3, [r3, #0] + 80012f2: 0d5b lsrs r3, r3, #21 + 80012f4: f3c3 020a ubfx r2, r3, #0, #11 + 80012f8: 687b ldr r3, [r7, #4] + 80012fa: 601a str r2, [r3, #0] + 80012fc: e00b b.n 8001316 } else { pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; - 8001392: 68fb ldr r3, [r7, #12] - 8001394: 681a ldr r2, [r3, #0] - 8001396: 68bb ldr r3, [r7, #8] - 8001398: 331b adds r3, #27 - 800139a: 011b lsls r3, r3, #4 - 800139c: 4413 add r3, r2 - 800139e: 681b ldr r3, [r3, #0] - 80013a0: 08db lsrs r3, r3, #3 - 80013a2: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 + 80012fe: 68fb ldr r3, [r7, #12] + 8001300: 681a ldr r2, [r3, #0] + 8001302: 68bb ldr r3, [r7, #8] + 8001304: 331b adds r3, #27 + 8001306: 011b lsls r3, r3, #4 + 8001308: 4413 add r3, r2 + 800130a: 681b ldr r3, [r3, #0] + 800130c: 08db lsrs r3, r3, #3 + 800130e: f023 4260 bic.w r2, r3, #3758096384 @ 0xe0000000 pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & - 80013a6: 687b ldr r3, [r7, #4] - 80013a8: 605a str r2, [r3, #4] + 8001312: 687b ldr r3, [r7, #4] + 8001314: 605a str r2, [r3, #4] } pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); - 80013aa: 68fb ldr r3, [r7, #12] - 80013ac: 681a ldr r2, [r3, #0] - 80013ae: 68bb ldr r3, [r7, #8] - 80013b0: 331b adds r3, #27 - 80013b2: 011b lsls r3, r3, #4 - 80013b4: 4413 add r3, r2 - 80013b6: 681b ldr r3, [r3, #0] - 80013b8: f003 0202 and.w r2, r3, #2 - 80013bc: 687b ldr r3, [r7, #4] - 80013be: 60da str r2, [r3, #12] + 8001316: 68fb ldr r3, [r7, #12] + 8001318: 681a ldr r2, [r3, #0] + 800131a: 68bb ldr r3, [r7, #8] + 800131c: 331b adds r3, #27 + 800131e: 011b lsls r3, r3, #4 + 8001320: 4413 add r3, r2 + 8001322: 681b ldr r3, [r3, #0] + 8001324: f003 0202 and.w r2, r3, #2 + 8001328: 687b ldr r3, [r7, #4] + 800132a: 60da str r2, [r3, #12] if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) - 80013c0: 68fb ldr r3, [r7, #12] - 80013c2: 681a ldr r2, [r3, #0] - 80013c4: 68bb ldr r3, [r7, #8] - 80013c6: 331b adds r3, #27 - 80013c8: 011b lsls r3, r3, #4 - 80013ca: 4413 add r3, r2 - 80013cc: 3304 adds r3, #4 - 80013ce: 681b ldr r3, [r3, #0] - 80013d0: f003 0308 and.w r3, r3, #8 - 80013d4: 2b00 cmp r3, #0 - 80013d6: d003 beq.n 80013e0 + 800132c: 68fb ldr r3, [r7, #12] + 800132e: 681a ldr r2, [r3, #0] + 8001330: 68bb ldr r3, [r7, #8] + 8001332: 331b adds r3, #27 + 8001334: 011b lsls r3, r3, #4 + 8001336: 4413 add r3, r2 + 8001338: 3304 adds r3, #4 + 800133a: 681b ldr r3, [r3, #0] + 800133c: f003 0308 and.w r3, r3, #8 + 8001340: 2b00 cmp r3, #0 + 8001342: d003 beq.n 800134c { /* Truncate DLC to 8 if received field is over range */ pHeader->DLC = 8U; - 80013d8: 687b ldr r3, [r7, #4] - 80013da: 2208 movs r2, #8 - 80013dc: 611a str r2, [r3, #16] - 80013de: e00b b.n 80013f8 + 8001344: 687b ldr r3, [r7, #4] + 8001346: 2208 movs r2, #8 + 8001348: 611a str r2, [r3, #16] + 800134a: e00b b.n 8001364 } else { pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; - 80013e0: 68fb ldr r3, [r7, #12] - 80013e2: 681a ldr r2, [r3, #0] - 80013e4: 68bb ldr r3, [r7, #8] - 80013e6: 331b adds r3, #27 - 80013e8: 011b lsls r3, r3, #4 - 80013ea: 4413 add r3, r2 - 80013ec: 3304 adds r3, #4 - 80013ee: 681b ldr r3, [r3, #0] - 80013f0: f003 020f and.w r2, r3, #15 - 80013f4: 687b ldr r3, [r7, #4] - 80013f6: 611a str r2, [r3, #16] + 800134c: 68fb ldr r3, [r7, #12] + 800134e: 681a ldr r2, [r3, #0] + 8001350: 68bb ldr r3, [r7, #8] + 8001352: 331b adds r3, #27 + 8001354: 011b lsls r3, r3, #4 + 8001356: 4413 add r3, r2 + 8001358: 3304 adds r3, #4 + 800135a: 681b ldr r3, [r3, #0] + 800135c: f003 020f and.w r2, r3, #15 + 8001360: 687b ldr r3, [r7, #4] + 8001362: 611a str r2, [r3, #16] } pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; - 80013f8: 68fb ldr r3, [r7, #12] - 80013fa: 681a ldr r2, [r3, #0] - 80013fc: 68bb ldr r3, [r7, #8] - 80013fe: 331b adds r3, #27 - 8001400: 011b lsls r3, r3, #4 - 8001402: 4413 add r3, r2 - 8001404: 3304 adds r3, #4 - 8001406: 681b ldr r3, [r3, #0] - 8001408: 0a1b lsrs r3, r3, #8 - 800140a: b2da uxtb r2, r3 - 800140c: 687b ldr r3, [r7, #4] - 800140e: 619a str r2, [r3, #24] + 8001364: 68fb ldr r3, [r7, #12] + 8001366: 681a ldr r2, [r3, #0] + 8001368: 68bb ldr r3, [r7, #8] + 800136a: 331b adds r3, #27 + 800136c: 011b lsls r3, r3, #4 + 800136e: 4413 add r3, r2 + 8001370: 3304 adds r3, #4 + 8001372: 681b ldr r3, [r3, #0] + 8001374: 0a1b lsrs r3, r3, #8 + 8001376: b2da uxtb r2, r3 + 8001378: 687b ldr r3, [r7, #4] + 800137a: 619a str r2, [r3, #24] pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; - 8001410: 68fb ldr r3, [r7, #12] - 8001412: 681a ldr r2, [r3, #0] - 8001414: 68bb ldr r3, [r7, #8] - 8001416: 331b adds r3, #27 - 8001418: 011b lsls r3, r3, #4 - 800141a: 4413 add r3, r2 - 800141c: 3304 adds r3, #4 - 800141e: 681b ldr r3, [r3, #0] - 8001420: 0c1b lsrs r3, r3, #16 - 8001422: b29a uxth r2, r3 - 8001424: 687b ldr r3, [r7, #4] - 8001426: 615a str r2, [r3, #20] + 800137c: 68fb ldr r3, [r7, #12] + 800137e: 681a ldr r2, [r3, #0] + 8001380: 68bb ldr r3, [r7, #8] + 8001382: 331b adds r3, #27 + 8001384: 011b lsls r3, r3, #4 + 8001386: 4413 add r3, r2 + 8001388: 3304 adds r3, #4 + 800138a: 681b ldr r3, [r3, #0] + 800138c: 0c1b lsrs r3, r3, #16 + 800138e: b29a uxth r2, r3 + 8001390: 687b ldr r3, [r7, #4] + 8001392: 615a str r2, [r3, #20] /* Get the data */ aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); - 8001428: 68fb ldr r3, [r7, #12] - 800142a: 681a ldr r2, [r3, #0] - 800142c: 68bb ldr r3, [r7, #8] - 800142e: 011b lsls r3, r3, #4 - 8001430: 4413 add r3, r2 - 8001432: f503 73dc add.w r3, r3, #440 @ 0x1b8 - 8001436: 681b ldr r3, [r3, #0] - 8001438: b2da uxtb r2, r3 - 800143a: 683b ldr r3, [r7, #0] - 800143c: 701a strb r2, [r3, #0] + 8001394: 68fb ldr r3, [r7, #12] + 8001396: 681a ldr r2, [r3, #0] + 8001398: 68bb ldr r3, [r7, #8] + 800139a: 011b lsls r3, r3, #4 + 800139c: 4413 add r3, r2 + 800139e: f503 73dc add.w r3, r3, #440 @ 0x1b8 + 80013a2: 681b ldr r3, [r3, #0] + 80013a4: b2da uxtb r2, r3 + 80013a6: 683b ldr r3, [r7, #0] + 80013a8: 701a strb r2, [r3, #0] aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); - 800143e: 68fb ldr r3, [r7, #12] - 8001440: 681a ldr r2, [r3, #0] - 8001442: 68bb ldr r3, [r7, #8] - 8001444: 011b lsls r3, r3, #4 - 8001446: 4413 add r3, r2 - 8001448: f503 73dc add.w r3, r3, #440 @ 0x1b8 - 800144c: 681b ldr r3, [r3, #0] - 800144e: 0a1a lsrs r2, r3, #8 - 8001450: 683b ldr r3, [r7, #0] - 8001452: 3301 adds r3, #1 - 8001454: b2d2 uxtb r2, r2 - 8001456: 701a strb r2, [r3, #0] + 80013aa: 68fb ldr r3, [r7, #12] + 80013ac: 681a ldr r2, [r3, #0] + 80013ae: 68bb ldr r3, [r7, #8] + 80013b0: 011b lsls r3, r3, #4 + 80013b2: 4413 add r3, r2 + 80013b4: f503 73dc add.w r3, r3, #440 @ 0x1b8 + 80013b8: 681b ldr r3, [r3, #0] + 80013ba: 0a1a lsrs r2, r3, #8 + 80013bc: 683b ldr r3, [r7, #0] + 80013be: 3301 adds r3, #1 + 80013c0: b2d2 uxtb r2, r2 + 80013c2: 701a strb r2, [r3, #0] aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); - 8001458: 68fb ldr r3, [r7, #12] - 800145a: 681a ldr r2, [r3, #0] - 800145c: 68bb ldr r3, [r7, #8] - 800145e: 011b lsls r3, r3, #4 - 8001460: 4413 add r3, r2 - 8001462: f503 73dc add.w r3, r3, #440 @ 0x1b8 - 8001466: 681b ldr r3, [r3, #0] - 8001468: 0c1a lsrs r2, r3, #16 - 800146a: 683b ldr r3, [r7, #0] - 800146c: 3302 adds r3, #2 - 800146e: b2d2 uxtb r2, r2 - 8001470: 701a strb r2, [r3, #0] + 80013c4: 68fb ldr r3, [r7, #12] + 80013c6: 681a ldr r2, [r3, #0] + 80013c8: 68bb ldr r3, [r7, #8] + 80013ca: 011b lsls r3, r3, #4 + 80013cc: 4413 add r3, r2 + 80013ce: f503 73dc add.w r3, r3, #440 @ 0x1b8 + 80013d2: 681b ldr r3, [r3, #0] + 80013d4: 0c1a lsrs r2, r3, #16 + 80013d6: 683b ldr r3, [r7, #0] + 80013d8: 3302 adds r3, #2 + 80013da: b2d2 uxtb r2, r2 + 80013dc: 701a strb r2, [r3, #0] aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); - 8001472: 68fb ldr r3, [r7, #12] - 8001474: 681a ldr r2, [r3, #0] - 8001476: 68bb ldr r3, [r7, #8] - 8001478: 011b lsls r3, r3, #4 - 800147a: 4413 add r3, r2 - 800147c: f503 73dc add.w r3, r3, #440 @ 0x1b8 - 8001480: 681b ldr r3, [r3, #0] - 8001482: 0e1a lsrs r2, r3, #24 - 8001484: 683b ldr r3, [r7, #0] - 8001486: 3303 adds r3, #3 - 8001488: b2d2 uxtb r2, r2 - 800148a: 701a strb r2, [r3, #0] + 80013de: 68fb ldr r3, [r7, #12] + 80013e0: 681a ldr r2, [r3, #0] + 80013e2: 68bb ldr r3, [r7, #8] + 80013e4: 011b lsls r3, r3, #4 + 80013e6: 4413 add r3, r2 + 80013e8: f503 73dc add.w r3, r3, #440 @ 0x1b8 + 80013ec: 681b ldr r3, [r3, #0] + 80013ee: 0e1a lsrs r2, r3, #24 + 80013f0: 683b ldr r3, [r7, #0] + 80013f2: 3303 adds r3, #3 + 80013f4: b2d2 uxtb r2, r2 + 80013f6: 701a strb r2, [r3, #0] aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); - 800148c: 68fb ldr r3, [r7, #12] - 800148e: 681a ldr r2, [r3, #0] - 8001490: 68bb ldr r3, [r7, #8] - 8001492: 011b lsls r3, r3, #4 - 8001494: 4413 add r3, r2 - 8001496: f503 73de add.w r3, r3, #444 @ 0x1bc - 800149a: 681a ldr r2, [r3, #0] - 800149c: 683b ldr r3, [r7, #0] - 800149e: 3304 adds r3, #4 - 80014a0: b2d2 uxtb r2, r2 - 80014a2: 701a strb r2, [r3, #0] + 80013f8: 68fb ldr r3, [r7, #12] + 80013fa: 681a ldr r2, [r3, #0] + 80013fc: 68bb ldr r3, [r7, #8] + 80013fe: 011b lsls r3, r3, #4 + 8001400: 4413 add r3, r2 + 8001402: f503 73de add.w r3, r3, #444 @ 0x1bc + 8001406: 681a ldr r2, [r3, #0] + 8001408: 683b ldr r3, [r7, #0] + 800140a: 3304 adds r3, #4 + 800140c: b2d2 uxtb r2, r2 + 800140e: 701a strb r2, [r3, #0] aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); - 80014a4: 68fb ldr r3, [r7, #12] - 80014a6: 681a ldr r2, [r3, #0] - 80014a8: 68bb ldr r3, [r7, #8] - 80014aa: 011b lsls r3, r3, #4 - 80014ac: 4413 add r3, r2 - 80014ae: f503 73de add.w r3, r3, #444 @ 0x1bc - 80014b2: 681b ldr r3, [r3, #0] - 80014b4: 0a1a lsrs r2, r3, #8 - 80014b6: 683b ldr r3, [r7, #0] - 80014b8: 3305 adds r3, #5 - 80014ba: b2d2 uxtb r2, r2 - 80014bc: 701a strb r2, [r3, #0] + 8001410: 68fb ldr r3, [r7, #12] + 8001412: 681a ldr r2, [r3, #0] + 8001414: 68bb ldr r3, [r7, #8] + 8001416: 011b lsls r3, r3, #4 + 8001418: 4413 add r3, r2 + 800141a: f503 73de add.w r3, r3, #444 @ 0x1bc + 800141e: 681b ldr r3, [r3, #0] + 8001420: 0a1a lsrs r2, r3, #8 + 8001422: 683b ldr r3, [r7, #0] + 8001424: 3305 adds r3, #5 + 8001426: b2d2 uxtb r2, r2 + 8001428: 701a strb r2, [r3, #0] aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); - 80014be: 68fb ldr r3, [r7, #12] - 80014c0: 681a ldr r2, [r3, #0] - 80014c2: 68bb ldr r3, [r7, #8] - 80014c4: 011b lsls r3, r3, #4 - 80014c6: 4413 add r3, r2 - 80014c8: f503 73de add.w r3, r3, #444 @ 0x1bc - 80014cc: 681b ldr r3, [r3, #0] - 80014ce: 0c1a lsrs r2, r3, #16 - 80014d0: 683b ldr r3, [r7, #0] - 80014d2: 3306 adds r3, #6 - 80014d4: b2d2 uxtb r2, r2 - 80014d6: 701a strb r2, [r3, #0] + 800142a: 68fb ldr r3, [r7, #12] + 800142c: 681a ldr r2, [r3, #0] + 800142e: 68bb ldr r3, [r7, #8] + 8001430: 011b lsls r3, r3, #4 + 8001432: 4413 add r3, r2 + 8001434: f503 73de add.w r3, r3, #444 @ 0x1bc + 8001438: 681b ldr r3, [r3, #0] + 800143a: 0c1a lsrs r2, r3, #16 + 800143c: 683b ldr r3, [r7, #0] + 800143e: 3306 adds r3, #6 + 8001440: b2d2 uxtb r2, r2 + 8001442: 701a strb r2, [r3, #0] aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); - 80014d8: 68fb ldr r3, [r7, #12] - 80014da: 681a ldr r2, [r3, #0] - 80014dc: 68bb ldr r3, [r7, #8] - 80014de: 011b lsls r3, r3, #4 - 80014e0: 4413 add r3, r2 - 80014e2: f503 73de add.w r3, r3, #444 @ 0x1bc - 80014e6: 681b ldr r3, [r3, #0] - 80014e8: 0e1a lsrs r2, r3, #24 - 80014ea: 683b ldr r3, [r7, #0] - 80014ec: 3307 adds r3, #7 - 80014ee: b2d2 uxtb r2, r2 - 80014f0: 701a strb r2, [r3, #0] + 8001444: 68fb ldr r3, [r7, #12] + 8001446: 681a ldr r2, [r3, #0] + 8001448: 68bb ldr r3, [r7, #8] + 800144a: 011b lsls r3, r3, #4 + 800144c: 4413 add r3, r2 + 800144e: f503 73de add.w r3, r3, #444 @ 0x1bc + 8001452: 681b ldr r3, [r3, #0] + 8001454: 0e1a lsrs r2, r3, #24 + 8001456: 683b ldr r3, [r7, #0] + 8001458: 3307 adds r3, #7 + 800145a: b2d2 uxtb r2, r2 + 800145c: 701a strb r2, [r3, #0] /* Release the FIFO */ if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ - 80014f2: 68bb ldr r3, [r7, #8] - 80014f4: 2b00 cmp r3, #0 - 80014f6: d108 bne.n 800150a + 800145e: 68bb ldr r3, [r7, #8] + 8001460: 2b00 cmp r3, #0 + 8001462: d108 bne.n 8001476 { /* Release RX FIFO 0 */ SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); - 80014f8: 68fb ldr r3, [r7, #12] - 80014fa: 681b ldr r3, [r3, #0] - 80014fc: 68da ldr r2, [r3, #12] - 80014fe: 68fb ldr r3, [r7, #12] - 8001500: 681b ldr r3, [r3, #0] - 8001502: f042 0220 orr.w r2, r2, #32 - 8001506: 60da str r2, [r3, #12] - 8001508: e007 b.n 800151a + 8001464: 68fb ldr r3, [r7, #12] + 8001466: 681b ldr r3, [r3, #0] + 8001468: 68da ldr r2, [r3, #12] + 800146a: 68fb ldr r3, [r7, #12] + 800146c: 681b ldr r3, [r3, #0] + 800146e: f042 0220 orr.w r2, r2, #32 + 8001472: 60da str r2, [r3, #12] + 8001474: e007 b.n 8001486 } else /* Rx element is assigned to Rx FIFO 1 */ { /* Release RX FIFO 1 */ SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); - 800150a: 68fb ldr r3, [r7, #12] - 800150c: 681b ldr r3, [r3, #0] - 800150e: 691a ldr r2, [r3, #16] - 8001510: 68fb ldr r3, [r7, #12] - 8001512: 681b ldr r3, [r3, #0] - 8001514: f042 0220 orr.w r2, r2, #32 - 8001518: 611a str r2, [r3, #16] + 8001476: 68fb ldr r3, [r7, #12] + 8001478: 681b ldr r3, [r3, #0] + 800147a: 691a ldr r2, [r3, #16] + 800147c: 68fb ldr r3, [r7, #12] + 800147e: 681b ldr r3, [r3, #0] + 8001480: f042 0220 orr.w r2, r2, #32 + 8001484: 611a str r2, [r3, #16] } /* Return function status */ return HAL_OK; - 800151a: 2300 movs r3, #0 - 800151c: e006 b.n 800152c + 8001486: 2300 movs r3, #0 + 8001488: e006 b.n 8001498 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; - 800151e: 68fb ldr r3, [r7, #12] - 8001520: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001522: f443 2280 orr.w r2, r3, #262144 @ 0x40000 - 8001526: 68fb ldr r3, [r7, #12] - 8001528: 625a str r2, [r3, #36] @ 0x24 + 800148a: 68fb ldr r3, [r7, #12] + 800148c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800148e: f443 2280 orr.w r2, r3, #262144 @ 0x40000 + 8001492: 68fb ldr r3, [r7, #12] + 8001494: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 800152a: 2301 movs r3, #1 + 8001496: 2301 movs r3, #1 } } - 800152c: 4618 mov r0, r3 - 800152e: 371c adds r7, #28 - 8001530: 46bd mov sp, r7 - 8001532: f85d 7b04 ldr.w r7, [sp], #4 - 8001536: 4770 bx lr + 8001498: 4618 mov r0, r3 + 800149a: 371c adds r7, #28 + 800149c: 46bd mov sp, r7 + 800149e: f85d 7b04 ldr.w r7, [sp], #4 + 80014a2: 4770 bx lr -08001538 : +080014a4 : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { - 8001538: b480 push {r7} - 800153a: b085 sub sp, #20 - 800153c: af00 add r7, sp, #0 - 800153e: 6078 str r0, [r7, #4] - 8001540: 6039 str r1, [r7, #0] + 80014a4: b480 push {r7} + 80014a6: b085 sub sp, #20 + 80014a8: af00 add r7, sp, #0 + 80014aa: 6078 str r0, [r7, #4] + 80014ac: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; - 8001542: 687b ldr r3, [r7, #4] - 8001544: f893 3020 ldrb.w r3, [r3, #32] - 8001548: 73fb strb r3, [r7, #15] + 80014ae: 687b ldr r3, [r7, #4] + 80014b0: f893 3020 ldrb.w r3, [r3, #32] + 80014b4: 73fb strb r3, [r7, #15] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || - 800154a: 7bfb ldrb r3, [r7, #15] - 800154c: 2b01 cmp r3, #1 - 800154e: d002 beq.n 8001556 - 8001550: 7bfb ldrb r3, [r7, #15] - 8001552: 2b02 cmp r3, #2 - 8001554: d109 bne.n 800156a + 80014b6: 7bfb ldrb r3, [r7, #15] + 80014b8: 2b01 cmp r3, #1 + 80014ba: d002 beq.n 80014c2 + 80014bc: 7bfb ldrb r3, [r7, #15] + 80014be: 2b02 cmp r3, #2 + 80014c0: d109 bne.n 80014d6 (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); - 8001556: 687b ldr r3, [r7, #4] - 8001558: 681b ldr r3, [r3, #0] - 800155a: 6959 ldr r1, [r3, #20] - 800155c: 687b ldr r3, [r7, #4] - 800155e: 681b ldr r3, [r3, #0] - 8001560: 683a ldr r2, [r7, #0] - 8001562: 430a orrs r2, r1 - 8001564: 615a str r2, [r3, #20] + 80014c2: 687b ldr r3, [r7, #4] + 80014c4: 681b ldr r3, [r3, #0] + 80014c6: 6959 ldr r1, [r3, #20] + 80014c8: 687b ldr r3, [r7, #4] + 80014ca: 681b ldr r3, [r3, #0] + 80014cc: 683a ldr r2, [r7, #0] + 80014ce: 430a orrs r2, r1 + 80014d0: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; - 8001566: 2300 movs r3, #0 - 8001568: e006 b.n 8001578 + 80014d2: 2300 movs r3, #0 + 80014d4: e006 b.n 80014e4 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; - 800156a: 687b ldr r3, [r7, #4] - 800156c: 6a5b ldr r3, [r3, #36] @ 0x24 - 800156e: f443 2280 orr.w r2, r3, #262144 @ 0x40000 - 8001572: 687b ldr r3, [r7, #4] - 8001574: 625a str r2, [r3, #36] @ 0x24 + 80014d6: 687b ldr r3, [r7, #4] + 80014d8: 6a5b ldr r3, [r3, #36] @ 0x24 + 80014da: f443 2280 orr.w r2, r3, #262144 @ 0x40000 + 80014de: 687b ldr r3, [r7, #4] + 80014e0: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; - 8001576: 2301 movs r3, #1 + 80014e2: 2301 movs r3, #1 } } - 8001578: 4618 mov r0, r3 - 800157a: 3714 adds r7, #20 - 800157c: 46bd mov sp, r7 - 800157e: f85d 7b04 ldr.w r7, [sp], #4 - 8001582: 4770 bx lr + 80014e4: 4618 mov r0, r3 + 80014e6: 3714 adds r7, #20 + 80014e8: 46bd mov sp, r7 + 80014ea: f85d 7b04 ldr.w r7, [sp], #4 + 80014ee: 4770 bx lr -08001584 : +080014f0 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) { - 8001584: b580 push {r7, lr} - 8001586: b08a sub sp, #40 @ 0x28 - 8001588: af00 add r7, sp, #0 - 800158a: 6078 str r0, [r7, #4] + 80014f0: b580 push {r7, lr} + 80014f2: b08a sub sp, #40 @ 0x28 + 80014f4: af00 add r7, sp, #0 + 80014f6: 6078 str r0, [r7, #4] uint32_t errorcode = HAL_CAN_ERROR_NONE; - 800158c: 2300 movs r3, #0 - 800158e: 627b str r3, [r7, #36] @ 0x24 + 80014f8: 2300 movs r3, #0 + 80014fa: 627b str r3, [r7, #36] @ 0x24 uint32_t interrupts = READ_REG(hcan->Instance->IER); - 8001590: 687b ldr r3, [r7, #4] - 8001592: 681b ldr r3, [r3, #0] - 8001594: 695b ldr r3, [r3, #20] - 8001596: 623b str r3, [r7, #32] + 80014fc: 687b ldr r3, [r7, #4] + 80014fe: 681b ldr r3, [r3, #0] + 8001500: 695b ldr r3, [r3, #20] + 8001502: 623b str r3, [r7, #32] uint32_t msrflags = READ_REG(hcan->Instance->MSR); - 8001598: 687b ldr r3, [r7, #4] - 800159a: 681b ldr r3, [r3, #0] - 800159c: 685b ldr r3, [r3, #4] - 800159e: 61fb str r3, [r7, #28] + 8001504: 687b ldr r3, [r7, #4] + 8001506: 681b ldr r3, [r3, #0] + 8001508: 685b ldr r3, [r3, #4] + 800150a: 61fb str r3, [r7, #28] uint32_t tsrflags = READ_REG(hcan->Instance->TSR); - 80015a0: 687b ldr r3, [r7, #4] - 80015a2: 681b ldr r3, [r3, #0] - 80015a4: 689b ldr r3, [r3, #8] - 80015a6: 61bb str r3, [r7, #24] + 800150c: 687b ldr r3, [r7, #4] + 800150e: 681b ldr r3, [r3, #0] + 8001510: 689b ldr r3, [r3, #8] + 8001512: 61bb str r3, [r7, #24] uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); - 80015a8: 687b ldr r3, [r7, #4] - 80015aa: 681b ldr r3, [r3, #0] - 80015ac: 68db ldr r3, [r3, #12] - 80015ae: 617b str r3, [r7, #20] + 8001514: 687b ldr r3, [r7, #4] + 8001516: 681b ldr r3, [r3, #0] + 8001518: 68db ldr r3, [r3, #12] + 800151a: 617b str r3, [r7, #20] uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); - 80015b0: 687b ldr r3, [r7, #4] - 80015b2: 681b ldr r3, [r3, #0] - 80015b4: 691b ldr r3, [r3, #16] - 80015b6: 613b str r3, [r7, #16] + 800151c: 687b ldr r3, [r7, #4] + 800151e: 681b ldr r3, [r3, #0] + 8001520: 691b ldr r3, [r3, #16] + 8001522: 613b str r3, [r7, #16] uint32_t esrflags = READ_REG(hcan->Instance->ESR); - 80015b8: 687b ldr r3, [r7, #4] - 80015ba: 681b ldr r3, [r3, #0] - 80015bc: 699b ldr r3, [r3, #24] - 80015be: 60fb str r3, [r7, #12] + 8001524: 687b ldr r3, [r7, #4] + 8001526: 681b ldr r3, [r3, #0] + 8001528: 699b ldr r3, [r3, #24] + 800152a: 60fb str r3, [r7, #12] /* Transmit Mailbox empty interrupt management *****************************/ if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) - 80015c0: 6a3b ldr r3, [r7, #32] - 80015c2: f003 0301 and.w r3, r3, #1 - 80015c6: 2b00 cmp r3, #0 - 80015c8: f000 8083 beq.w 80016d2 + 800152c: 6a3b ldr r3, [r7, #32] + 800152e: f003 0301 and.w r3, r3, #1 + 8001532: 2b00 cmp r3, #0 + 8001534: f000 8083 beq.w 800163e { /* Transmit Mailbox 0 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP0) != 0U) - 80015cc: 69bb ldr r3, [r7, #24] - 80015ce: f003 0301 and.w r3, r3, #1 - 80015d2: 2b00 cmp r3, #0 - 80015d4: d025 beq.n 8001622 + 8001538: 69bb ldr r3, [r7, #24] + 800153a: f003 0301 and.w r3, r3, #1 + 800153e: 2b00 cmp r3, #0 + 8001540: d025 beq.n 800158e { /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); - 80015d6: 687b ldr r3, [r7, #4] - 80015d8: 681b ldr r3, [r3, #0] - 80015da: 2201 movs r2, #1 - 80015dc: 609a str r2, [r3, #8] + 8001542: 687b ldr r3, [r7, #4] + 8001544: 681b ldr r3, [r3, #0] + 8001546: 2201 movs r2, #1 + 8001548: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK0) != 0U) - 80015de: 69bb ldr r3, [r7, #24] - 80015e0: f003 0302 and.w r3, r3, #2 - 80015e4: 2b00 cmp r3, #0 - 80015e6: d004 beq.n 80015f2 + 800154a: 69bb ldr r3, [r7, #24] + 800154c: f003 0302 and.w r3, r3, #2 + 8001550: 2b00 cmp r3, #0 + 8001552: d004 beq.n 800155e { /* Transmission Mailbox 0 complete callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0CompleteCallback(hcan); - 80015e8: 687b ldr r3, [r7, #4] - 80015ea: 6a9b ldr r3, [r3, #40] @ 0x28 - 80015ec: 6878 ldr r0, [r7, #4] - 80015ee: 4798 blx r3 - 80015f0: e017 b.n 8001622 + 8001554: 687b ldr r3, [r7, #4] + 8001556: 6a9b ldr r3, [r3, #40] @ 0x28 + 8001558: 6878 ldr r0, [r7, #4] + 800155a: 4798 blx r3 + 800155c: e017 b.n 800158e HAL_CAN_TxMailbox0CompleteCallback(hcan); #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST0) != 0U) - 80015f2: 69bb ldr r3, [r7, #24] - 80015f4: f003 0304 and.w r3, r3, #4 - 80015f8: 2b00 cmp r3, #0 - 80015fa: d004 beq.n 8001606 + 800155e: 69bb ldr r3, [r7, #24] + 8001560: f003 0304 and.w r3, r3, #4 + 8001564: 2b00 cmp r3, #0 + 8001566: d004 beq.n 8001572 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST0; - 80015fc: 6a7b ldr r3, [r7, #36] @ 0x24 - 80015fe: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8001602: 627b str r3, [r7, #36] @ 0x24 - 8001604: e00d b.n 8001622 + 8001568: 6a7b ldr r3, [r7, #36] @ 0x24 + 800156a: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 800156e: 627b str r3, [r7, #36] @ 0x24 + 8001570: e00d b.n 800158e } else if ((tsrflags & CAN_TSR_TERR0) != 0U) - 8001606: 69bb ldr r3, [r7, #24] - 8001608: f003 0308 and.w r3, r3, #8 - 800160c: 2b00 cmp r3, #0 - 800160e: d004 beq.n 800161a + 8001572: 69bb ldr r3, [r7, #24] + 8001574: f003 0308 and.w r3, r3, #8 + 8001578: 2b00 cmp r3, #0 + 800157a: d004 beq.n 8001586 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR0; - 8001610: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001612: f443 5380 orr.w r3, r3, #4096 @ 0x1000 - 8001616: 627b str r3, [r7, #36] @ 0x24 - 8001618: e003 b.n 8001622 + 800157c: 6a7b ldr r3, [r7, #36] @ 0x24 + 800157e: f443 5380 orr.w r3, r3, #4096 @ 0x1000 + 8001582: 627b str r3, [r7, #36] @ 0x24 + 8001584: e003 b.n 800158e else { /* Transmission Mailbox 0 abort callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox0AbortCallback(hcan); - 800161a: 687b ldr r3, [r7, #4] - 800161c: 6b5b ldr r3, [r3, #52] @ 0x34 - 800161e: 6878 ldr r0, [r7, #4] - 8001620: 4798 blx r3 + 8001586: 687b ldr r3, [r7, #4] + 8001588: 6b5b ldr r3, [r3, #52] @ 0x34 + 800158a: 6878 ldr r0, [r7, #4] + 800158c: 4798 blx r3 } } } /* Transmit Mailbox 1 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP1) != 0U) - 8001622: 69bb ldr r3, [r7, #24] - 8001624: f403 7380 and.w r3, r3, #256 @ 0x100 - 8001628: 2b00 cmp r3, #0 - 800162a: d026 beq.n 800167a + 800158e: 69bb ldr r3, [r7, #24] + 8001590: f403 7380 and.w r3, r3, #256 @ 0x100 + 8001594: 2b00 cmp r3, #0 + 8001596: d026 beq.n 80015e6 { /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); - 800162c: 687b ldr r3, [r7, #4] - 800162e: 681b ldr r3, [r3, #0] - 8001630: f44f 7280 mov.w r2, #256 @ 0x100 - 8001634: 609a str r2, [r3, #8] + 8001598: 687b ldr r3, [r7, #4] + 800159a: 681b ldr r3, [r3, #0] + 800159c: f44f 7280 mov.w r2, #256 @ 0x100 + 80015a0: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK1) != 0U) - 8001636: 69bb ldr r3, [r7, #24] - 8001638: f403 7300 and.w r3, r3, #512 @ 0x200 - 800163c: 2b00 cmp r3, #0 - 800163e: d004 beq.n 800164a + 80015a2: 69bb ldr r3, [r7, #24] + 80015a4: f403 7300 and.w r3, r3, #512 @ 0x200 + 80015a8: 2b00 cmp r3, #0 + 80015aa: d004 beq.n 80015b6 { /* Transmission Mailbox 1 complete callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1CompleteCallback(hcan); - 8001640: 687b ldr r3, [r7, #4] - 8001642: 6adb ldr r3, [r3, #44] @ 0x2c - 8001644: 6878 ldr r0, [r7, #4] - 8001646: 4798 blx r3 - 8001648: e017 b.n 800167a + 80015ac: 687b ldr r3, [r7, #4] + 80015ae: 6adb ldr r3, [r3, #44] @ 0x2c + 80015b0: 6878 ldr r0, [r7, #4] + 80015b2: 4798 blx r3 + 80015b4: e017 b.n 80015e6 HAL_CAN_TxMailbox1CompleteCallback(hcan); #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST1) != 0U) - 800164a: 69bb ldr r3, [r7, #24] - 800164c: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8001650: 2b00 cmp r3, #0 - 8001652: d004 beq.n 800165e + 80015b6: 69bb ldr r3, [r7, #24] + 80015b8: f403 6380 and.w r3, r3, #1024 @ 0x400 + 80015bc: 2b00 cmp r3, #0 + 80015be: d004 beq.n 80015ca { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST1; - 8001654: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001656: f443 5300 orr.w r3, r3, #8192 @ 0x2000 - 800165a: 627b str r3, [r7, #36] @ 0x24 - 800165c: e00d b.n 800167a + 80015c0: 6a7b ldr r3, [r7, #36] @ 0x24 + 80015c2: f443 5300 orr.w r3, r3, #8192 @ 0x2000 + 80015c6: 627b str r3, [r7, #36] @ 0x24 + 80015c8: e00d b.n 80015e6 } else if ((tsrflags & CAN_TSR_TERR1) != 0U) - 800165e: 69bb ldr r3, [r7, #24] - 8001660: f403 6300 and.w r3, r3, #2048 @ 0x800 - 8001664: 2b00 cmp r3, #0 - 8001666: d004 beq.n 8001672 + 80015ca: 69bb ldr r3, [r7, #24] + 80015cc: f403 6300 and.w r3, r3, #2048 @ 0x800 + 80015d0: 2b00 cmp r3, #0 + 80015d2: d004 beq.n 80015de { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR1; - 8001668: 6a7b ldr r3, [r7, #36] @ 0x24 - 800166a: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 800166e: 627b str r3, [r7, #36] @ 0x24 - 8001670: e003 b.n 800167a + 80015d4: 6a7b ldr r3, [r7, #36] @ 0x24 + 80015d6: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 80015da: 627b str r3, [r7, #36] @ 0x24 + 80015dc: e003 b.n 80015e6 else { /* Transmission Mailbox 1 abort callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox1AbortCallback(hcan); - 8001672: 687b ldr r3, [r7, #4] - 8001674: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001676: 6878 ldr r0, [r7, #4] - 8001678: 4798 blx r3 + 80015de: 687b ldr r3, [r7, #4] + 80015e0: 6b9b ldr r3, [r3, #56] @ 0x38 + 80015e2: 6878 ldr r0, [r7, #4] + 80015e4: 4798 blx r3 } } } /* Transmit Mailbox 2 management *****************************************/ if ((tsrflags & CAN_TSR_RQCP2) != 0U) - 800167a: 69bb ldr r3, [r7, #24] - 800167c: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8001680: 2b00 cmp r3, #0 - 8001682: d026 beq.n 80016d2 + 80015e6: 69bb ldr r3, [r7, #24] + 80015e8: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80015ec: 2b00 cmp r3, #0 + 80015ee: d026 beq.n 800163e { /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); - 8001684: 687b ldr r3, [r7, #4] - 8001686: 681b ldr r3, [r3, #0] - 8001688: f44f 3280 mov.w r2, #65536 @ 0x10000 - 800168c: 609a str r2, [r3, #8] + 80015f0: 687b ldr r3, [r7, #4] + 80015f2: 681b ldr r3, [r3, #0] + 80015f4: f44f 3280 mov.w r2, #65536 @ 0x10000 + 80015f8: 609a str r2, [r3, #8] if ((tsrflags & CAN_TSR_TXOK2) != 0U) - 800168e: 69bb ldr r3, [r7, #24] - 8001690: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8001694: 2b00 cmp r3, #0 - 8001696: d004 beq.n 80016a2 + 80015fa: 69bb ldr r3, [r7, #24] + 80015fc: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8001600: 2b00 cmp r3, #0 + 8001602: d004 beq.n 800160e { /* Transmission Mailbox 2 complete callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2CompleteCallback(hcan); - 8001698: 687b ldr r3, [r7, #4] - 800169a: 6b1b ldr r3, [r3, #48] @ 0x30 - 800169c: 6878 ldr r0, [r7, #4] - 800169e: 4798 blx r3 - 80016a0: e017 b.n 80016d2 + 8001604: 687b ldr r3, [r7, #4] + 8001606: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001608: 6878 ldr r0, [r7, #4] + 800160a: 4798 blx r3 + 800160c: e017 b.n 800163e HAL_CAN_TxMailbox2CompleteCallback(hcan); #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } else { if ((tsrflags & CAN_TSR_ALST2) != 0U) - 80016a2: 69bb ldr r3, [r7, #24] - 80016a4: f403 2380 and.w r3, r3, #262144 @ 0x40000 - 80016a8: 2b00 cmp r3, #0 - 80016aa: d004 beq.n 80016b6 + 800160e: 69bb ldr r3, [r7, #24] + 8001610: f403 2380 and.w r3, r3, #262144 @ 0x40000 + 8001614: 2b00 cmp r3, #0 + 8001616: d004 beq.n 8001622 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_ALST2; - 80016ac: 6a7b ldr r3, [r7, #36] @ 0x24 - 80016ae: f443 4300 orr.w r3, r3, #32768 @ 0x8000 - 80016b2: 627b str r3, [r7, #36] @ 0x24 - 80016b4: e00d b.n 80016d2 + 8001618: 6a7b ldr r3, [r7, #36] @ 0x24 + 800161a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 + 800161e: 627b str r3, [r7, #36] @ 0x24 + 8001620: e00d b.n 800163e } else if ((tsrflags & CAN_TSR_TERR2) != 0U) - 80016b6: 69bb ldr r3, [r7, #24] - 80016b8: f403 2300 and.w r3, r3, #524288 @ 0x80000 - 80016bc: 2b00 cmp r3, #0 - 80016be: d004 beq.n 80016ca + 8001622: 69bb ldr r3, [r7, #24] + 8001624: f403 2300 and.w r3, r3, #524288 @ 0x80000 + 8001628: 2b00 cmp r3, #0 + 800162a: d004 beq.n 8001636 { /* Update error code */ errorcode |= HAL_CAN_ERROR_TX_TERR2; - 80016c0: 6a7b ldr r3, [r7, #36] @ 0x24 - 80016c2: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80016c6: 627b str r3, [r7, #36] @ 0x24 - 80016c8: e003 b.n 80016d2 + 800162c: 6a7b ldr r3, [r7, #36] @ 0x24 + 800162e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8001632: 627b str r3, [r7, #36] @ 0x24 + 8001634: e003 b.n 800163e else { /* Transmission Mailbox 2 abort callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->TxMailbox2AbortCallback(hcan); - 80016ca: 687b ldr r3, [r7, #4] - 80016cc: 6bdb ldr r3, [r3, #60] @ 0x3c - 80016ce: 6878 ldr r0, [r7, #4] - 80016d0: 4798 blx r3 + 8001636: 687b ldr r3, [r7, #4] + 8001638: 6bdb ldr r3, [r3, #60] @ 0x3c + 800163a: 6878 ldr r0, [r7, #4] + 800163c: 4798 blx r3 } } } /* Receive FIFO 0 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) - 80016d2: 6a3b ldr r3, [r7, #32] - 80016d4: f003 0308 and.w r3, r3, #8 - 80016d8: 2b00 cmp r3, #0 - 80016da: d00c beq.n 80016f6 + 800163e: 6a3b ldr r3, [r7, #32] + 8001640: f003 0308 and.w r3, r3, #8 + 8001644: 2b00 cmp r3, #0 + 8001646: d00c beq.n 8001662 { if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) - 80016dc: 697b ldr r3, [r7, #20] - 80016de: f003 0310 and.w r3, r3, #16 - 80016e2: 2b00 cmp r3, #0 - 80016e4: d007 beq.n 80016f6 + 8001648: 697b ldr r3, [r7, #20] + 800164a: f003 0310 and.w r3, r3, #16 + 800164e: 2b00 cmp r3, #0 + 8001650: d007 beq.n 8001662 { /* Set CAN error code to Rx Fifo 0 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV0; - 80016e6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80016e8: f443 7300 orr.w r3, r3, #512 @ 0x200 - 80016ec: 627b str r3, [r7, #36] @ 0x24 + 8001652: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001654: f443 7300 orr.w r3, r3, #512 @ 0x200 + 8001658: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO0 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); - 80016ee: 687b ldr r3, [r7, #4] - 80016f0: 681b ldr r3, [r3, #0] - 80016f2: 2210 movs r2, #16 - 80016f4: 60da str r2, [r3, #12] + 800165a: 687b ldr r3, [r7, #4] + 800165c: 681b ldr r3, [r3, #0] + 800165e: 2210 movs r2, #16 + 8001660: 60da str r2, [r3, #12] } } /* Receive FIFO 0 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) - 80016f6: 6a3b ldr r3, [r7, #32] - 80016f8: f003 0304 and.w r3, r3, #4 - 80016fc: 2b00 cmp r3, #0 - 80016fe: d00c beq.n 800171a + 8001662: 6a3b ldr r3, [r7, #32] + 8001664: f003 0304 and.w r3, r3, #4 + 8001668: 2b00 cmp r3, #0 + 800166a: d00c beq.n 8001686 { if ((rf0rflags & CAN_RF0R_FULL0) != 0U) - 8001700: 697b ldr r3, [r7, #20] - 8001702: f003 0308 and.w r3, r3, #8 - 8001706: 2b00 cmp r3, #0 - 8001708: d007 beq.n 800171a + 800166c: 697b ldr r3, [r7, #20] + 800166e: f003 0308 and.w r3, r3, #8 + 8001672: 2b00 cmp r3, #0 + 8001674: d007 beq.n 8001686 { /* Clear FIFO 0 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); - 800170a: 687b ldr r3, [r7, #4] - 800170c: 681b ldr r3, [r3, #0] - 800170e: 2208 movs r2, #8 - 8001710: 60da str r2, [r3, #12] + 8001676: 687b ldr r3, [r7, #4] + 8001678: 681b ldr r3, [r3, #0] + 800167a: 2208 movs r2, #8 + 800167c: 60da str r2, [r3, #12] /* Receive FIFO 0 full Callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0FullCallback(hcan); - 8001712: 687b ldr r3, [r7, #4] - 8001714: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001716: 6878 ldr r0, [r7, #4] - 8001718: 4798 blx r3 + 800167e: 687b ldr r3, [r7, #4] + 8001680: 6c5b ldr r3, [r3, #68] @ 0x44 + 8001682: 6878 ldr r0, [r7, #4] + 8001684: 4798 blx r3 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 0 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) - 800171a: 6a3b ldr r3, [r7, #32] - 800171c: f003 0302 and.w r3, r3, #2 - 8001720: 2b00 cmp r3, #0 - 8001722: d00a beq.n 800173a + 8001686: 6a3b ldr r3, [r7, #32] + 8001688: f003 0302 and.w r3, r3, #2 + 800168c: 2b00 cmp r3, #0 + 800168e: d00a beq.n 80016a6 { /* Check if message is still pending */ if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) - 8001724: 687b ldr r3, [r7, #4] - 8001726: 681b ldr r3, [r3, #0] - 8001728: 68db ldr r3, [r3, #12] - 800172a: f003 0303 and.w r3, r3, #3 - 800172e: 2b00 cmp r3, #0 - 8001730: d003 beq.n 800173a + 8001690: 687b ldr r3, [r7, #4] + 8001692: 681b ldr r3, [r3, #0] + 8001694: 68db ldr r3, [r3, #12] + 8001696: f003 0303 and.w r3, r3, #3 + 800169a: 2b00 cmp r3, #0 + 800169c: d003 beq.n 80016a6 { /* Receive FIFO 0 message pending Callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo0MsgPendingCallback(hcan); - 8001732: 687b ldr r3, [r7, #4] - 8001734: 6c1b ldr r3, [r3, #64] @ 0x40 - 8001736: 6878 ldr r0, [r7, #4] - 8001738: 4798 blx r3 + 800169e: 687b ldr r3, [r7, #4] + 80016a0: 6c1b ldr r3, [r3, #64] @ 0x40 + 80016a2: 6878 ldr r0, [r7, #4] + 80016a4: 4798 blx r3 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 overrun interrupt management *****************************/ if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) - 800173a: 6a3b ldr r3, [r7, #32] - 800173c: f003 0340 and.w r3, r3, #64 @ 0x40 - 8001740: 2b00 cmp r3, #0 - 8001742: d00c beq.n 800175e + 80016a6: 6a3b ldr r3, [r7, #32] + 80016a8: f003 0340 and.w r3, r3, #64 @ 0x40 + 80016ac: 2b00 cmp r3, #0 + 80016ae: d00c beq.n 80016ca { if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) - 8001744: 693b ldr r3, [r7, #16] - 8001746: f003 0310 and.w r3, r3, #16 - 800174a: 2b00 cmp r3, #0 - 800174c: d007 beq.n 800175e + 80016b0: 693b ldr r3, [r7, #16] + 80016b2: f003 0310 and.w r3, r3, #16 + 80016b6: 2b00 cmp r3, #0 + 80016b8: d007 beq.n 80016ca { /* Set CAN error code to Rx Fifo 1 overrun error */ errorcode |= HAL_CAN_ERROR_RX_FOV1; - 800174e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001750: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 8001754: 627b str r3, [r7, #36] @ 0x24 + 80016ba: 6a7b ldr r3, [r7, #36] @ 0x24 + 80016bc: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 80016c0: 627b str r3, [r7, #36] @ 0x24 /* Clear FIFO1 Overrun Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); - 8001756: 687b ldr r3, [r7, #4] - 8001758: 681b ldr r3, [r3, #0] - 800175a: 2210 movs r2, #16 - 800175c: 611a str r2, [r3, #16] + 80016c2: 687b ldr r3, [r7, #4] + 80016c4: 681b ldr r3, [r3, #0] + 80016c6: 2210 movs r2, #16 + 80016c8: 611a str r2, [r3, #16] } } /* Receive FIFO 1 full interrupt management ********************************/ if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) - 800175e: 6a3b ldr r3, [r7, #32] - 8001760: f003 0320 and.w r3, r3, #32 - 8001764: 2b00 cmp r3, #0 - 8001766: d00c beq.n 8001782 + 80016ca: 6a3b ldr r3, [r7, #32] + 80016cc: f003 0320 and.w r3, r3, #32 + 80016d0: 2b00 cmp r3, #0 + 80016d2: d00c beq.n 80016ee { if ((rf1rflags & CAN_RF1R_FULL1) != 0U) - 8001768: 693b ldr r3, [r7, #16] - 800176a: f003 0308 and.w r3, r3, #8 - 800176e: 2b00 cmp r3, #0 - 8001770: d007 beq.n 8001782 + 80016d4: 693b ldr r3, [r7, #16] + 80016d6: f003 0308 and.w r3, r3, #8 + 80016da: 2b00 cmp r3, #0 + 80016dc: d007 beq.n 80016ee { /* Clear FIFO 1 full Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); - 8001772: 687b ldr r3, [r7, #4] - 8001774: 681b ldr r3, [r3, #0] - 8001776: 2208 movs r2, #8 - 8001778: 611a str r2, [r3, #16] + 80016de: 687b ldr r3, [r7, #4] + 80016e0: 681b ldr r3, [r3, #0] + 80016e2: 2208 movs r2, #8 + 80016e4: 611a str r2, [r3, #16] /* Receive FIFO 1 full Callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1FullCallback(hcan); - 800177a: 687b ldr r3, [r7, #4] - 800177c: 6cdb ldr r3, [r3, #76] @ 0x4c - 800177e: 6878 ldr r0, [r7, #4] - 8001780: 4798 blx r3 + 80016e6: 687b ldr r3, [r7, #4] + 80016e8: 6cdb ldr r3, [r3, #76] @ 0x4c + 80016ea: 6878 ldr r0, [r7, #4] + 80016ec: 4798 blx r3 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Receive FIFO 1 message pending interrupt management *********************/ if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) - 8001782: 6a3b ldr r3, [r7, #32] - 8001784: f003 0310 and.w r3, r3, #16 - 8001788: 2b00 cmp r3, #0 - 800178a: d00a beq.n 80017a2 + 80016ee: 6a3b ldr r3, [r7, #32] + 80016f0: f003 0310 and.w r3, r3, #16 + 80016f4: 2b00 cmp r3, #0 + 80016f6: d00a beq.n 800170e { /* Check if message is still pending */ if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) - 800178c: 687b ldr r3, [r7, #4] - 800178e: 681b ldr r3, [r3, #0] - 8001790: 691b ldr r3, [r3, #16] - 8001792: f003 0303 and.w r3, r3, #3 - 8001796: 2b00 cmp r3, #0 - 8001798: d003 beq.n 80017a2 + 80016f8: 687b ldr r3, [r7, #4] + 80016fa: 681b ldr r3, [r3, #0] + 80016fc: 691b ldr r3, [r3, #16] + 80016fe: f003 0303 and.w r3, r3, #3 + 8001702: 2b00 cmp r3, #0 + 8001704: d003 beq.n 800170e { /* Receive FIFO 1 message pending Callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->RxFifo1MsgPendingCallback(hcan); - 800179a: 687b ldr r3, [r7, #4] - 800179c: 6c9b ldr r3, [r3, #72] @ 0x48 - 800179e: 6878 ldr r0, [r7, #4] - 80017a0: 4798 blx r3 + 8001706: 687b ldr r3, [r7, #4] + 8001708: 6c9b ldr r3, [r3, #72] @ 0x48 + 800170a: 6878 ldr r0, [r7, #4] + 800170c: 4798 blx r3 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Sleep interrupt management *********************************************/ if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) - 80017a2: 6a3b ldr r3, [r7, #32] - 80017a4: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80017a8: 2b00 cmp r3, #0 - 80017aa: d00c beq.n 80017c6 + 800170e: 6a3b ldr r3, [r7, #32] + 8001710: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8001714: 2b00 cmp r3, #0 + 8001716: d00c beq.n 8001732 { if ((msrflags & CAN_MSR_SLAKI) != 0U) - 80017ac: 69fb ldr r3, [r7, #28] - 80017ae: f003 0310 and.w r3, r3, #16 - 80017b2: 2b00 cmp r3, #0 - 80017b4: d007 beq.n 80017c6 + 8001718: 69fb ldr r3, [r7, #28] + 800171a: f003 0310 and.w r3, r3, #16 + 800171e: 2b00 cmp r3, #0 + 8001720: d007 beq.n 8001732 { /* Clear Sleep interrupt Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); - 80017b6: 687b ldr r3, [r7, #4] - 80017b8: 681b ldr r3, [r3, #0] - 80017ba: 2210 movs r2, #16 - 80017bc: 605a str r2, [r3, #4] + 8001722: 687b ldr r3, [r7, #4] + 8001724: 681b ldr r3, [r3, #0] + 8001726: 2210 movs r2, #16 + 8001728: 605a str r2, [r3, #4] /* Sleep Callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->SleepCallback(hcan); - 80017be: 687b ldr r3, [r7, #4] - 80017c0: 6d1b ldr r3, [r3, #80] @ 0x50 - 80017c2: 6878 ldr r0, [r7, #4] - 80017c4: 4798 blx r3 + 800172a: 687b ldr r3, [r7, #4] + 800172c: 6d1b ldr r3, [r3, #80] @ 0x50 + 800172e: 6878 ldr r0, [r7, #4] + 8001730: 4798 blx r3 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* WakeUp interrupt management *********************************************/ if ((interrupts & CAN_IT_WAKEUP) != 0U) - 80017c6: 6a3b ldr r3, [r7, #32] - 80017c8: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 80017cc: 2b00 cmp r3, #0 - 80017ce: d00c beq.n 80017ea + 8001732: 6a3b ldr r3, [r7, #32] + 8001734: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8001738: 2b00 cmp r3, #0 + 800173a: d00c beq.n 8001756 { if ((msrflags & CAN_MSR_WKUI) != 0U) - 80017d0: 69fb ldr r3, [r7, #28] - 80017d2: f003 0308 and.w r3, r3, #8 - 80017d6: 2b00 cmp r3, #0 - 80017d8: d007 beq.n 80017ea + 800173c: 69fb ldr r3, [r7, #28] + 800173e: f003 0308 and.w r3, r3, #8 + 8001742: 2b00 cmp r3, #0 + 8001744: d007 beq.n 8001756 { /* Clear WakeUp Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); - 80017da: 687b ldr r3, [r7, #4] - 80017dc: 681b ldr r3, [r3, #0] - 80017de: 2208 movs r2, #8 - 80017e0: 605a str r2, [r3, #4] + 8001746: 687b ldr r3, [r7, #4] + 8001748: 681b ldr r3, [r3, #0] + 800174a: 2208 movs r2, #8 + 800174c: 605a str r2, [r3, #4] /* WakeUp Callback */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->WakeUpFromRxMsgCallback(hcan); - 80017e2: 687b ldr r3, [r7, #4] - 80017e4: 6d5b ldr r3, [r3, #84] @ 0x54 - 80017e6: 6878 ldr r0, [r7, #4] - 80017e8: 4798 blx r3 + 800174e: 687b ldr r3, [r7, #4] + 8001750: 6d5b ldr r3, [r3, #84] @ 0x54 + 8001752: 6878 ldr r0, [r7, #4] + 8001754: 4798 blx r3 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } /* Error interrupts management *********************************************/ if ((interrupts & CAN_IT_ERROR) != 0U) - 80017ea: 6a3b ldr r3, [r7, #32] - 80017ec: f403 4300 and.w r3, r3, #32768 @ 0x8000 - 80017f0: 2b00 cmp r3, #0 - 80017f2: d07b beq.n 80018ec + 8001756: 6a3b ldr r3, [r7, #32] + 8001758: f403 4300 and.w r3, r3, #32768 @ 0x8000 + 800175c: 2b00 cmp r3, #0 + 800175e: d07b beq.n 8001858 { if ((msrflags & CAN_MSR_ERRI) != 0U) - 80017f4: 69fb ldr r3, [r7, #28] - 80017f6: f003 0304 and.w r3, r3, #4 - 80017fa: 2b00 cmp r3, #0 - 80017fc: d072 beq.n 80018e4 + 8001760: 69fb ldr r3, [r7, #28] + 8001762: f003 0304 and.w r3, r3, #4 + 8001766: 2b00 cmp r3, #0 + 8001768: d072 beq.n 8001850 { /* Check Error Warning Flag */ if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && - 80017fe: 6a3b ldr r3, [r7, #32] - 8001800: f403 7380 and.w r3, r3, #256 @ 0x100 - 8001804: 2b00 cmp r3, #0 - 8001806: d008 beq.n 800181a + 800176a: 6a3b ldr r3, [r7, #32] + 800176c: f403 7380 and.w r3, r3, #256 @ 0x100 + 8001770: 2b00 cmp r3, #0 + 8001772: d008 beq.n 8001786 ((esrflags & CAN_ESR_EWGF) != 0U)) - 8001808: 68fb ldr r3, [r7, #12] - 800180a: f003 0301 and.w r3, r3, #1 + 8001774: 68fb ldr r3, [r7, #12] + 8001776: f003 0301 and.w r3, r3, #1 if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && - 800180e: 2b00 cmp r3, #0 - 8001810: d003 beq.n 800181a + 800177a: 2b00 cmp r3, #0 + 800177c: d003 beq.n 8001786 { /* Set CAN error code to Error Warning */ errorcode |= HAL_CAN_ERROR_EWG; - 8001812: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001814: f043 0301 orr.w r3, r3, #1 - 8001818: 627b str r3, [r7, #36] @ 0x24 + 800177e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001780: f043 0301 orr.w r3, r3, #1 + 8001784: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Warning Flag as read-only */ } /* Check Error Passive Flag */ if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && - 800181a: 6a3b ldr r3, [r7, #32] - 800181c: f403 7300 and.w r3, r3, #512 @ 0x200 - 8001820: 2b00 cmp r3, #0 - 8001822: d008 beq.n 8001836 + 8001786: 6a3b ldr r3, [r7, #32] + 8001788: f403 7300 and.w r3, r3, #512 @ 0x200 + 800178c: 2b00 cmp r3, #0 + 800178e: d008 beq.n 80017a2 ((esrflags & CAN_ESR_EPVF) != 0U)) - 8001824: 68fb ldr r3, [r7, #12] - 8001826: f003 0302 and.w r3, r3, #2 + 8001790: 68fb ldr r3, [r7, #12] + 8001792: f003 0302 and.w r3, r3, #2 if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && - 800182a: 2b00 cmp r3, #0 - 800182c: d003 beq.n 8001836 + 8001796: 2b00 cmp r3, #0 + 8001798: d003 beq.n 80017a2 { /* Set CAN error code to Error Passive */ errorcode |= HAL_CAN_ERROR_EPV; - 800182e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001830: f043 0302 orr.w r3, r3, #2 - 8001834: 627b str r3, [r7, #36] @ 0x24 + 800179a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800179c: f043 0302 orr.w r3, r3, #2 + 80017a0: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Passive Flag as read-only */ } /* Check Bus-off Flag */ if (((interrupts & CAN_IT_BUSOFF) != 0U) && - 8001836: 6a3b ldr r3, [r7, #32] - 8001838: f403 6380 and.w r3, r3, #1024 @ 0x400 - 800183c: 2b00 cmp r3, #0 - 800183e: d008 beq.n 8001852 + 80017a2: 6a3b ldr r3, [r7, #32] + 80017a4: f403 6380 and.w r3, r3, #1024 @ 0x400 + 80017a8: 2b00 cmp r3, #0 + 80017aa: d008 beq.n 80017be ((esrflags & CAN_ESR_BOFF) != 0U)) - 8001840: 68fb ldr r3, [r7, #12] - 8001842: f003 0304 and.w r3, r3, #4 + 80017ac: 68fb ldr r3, [r7, #12] + 80017ae: f003 0304 and.w r3, r3, #4 if (((interrupts & CAN_IT_BUSOFF) != 0U) && - 8001846: 2b00 cmp r3, #0 - 8001848: d003 beq.n 8001852 + 80017b2: 2b00 cmp r3, #0 + 80017b4: d003 beq.n 80017be { /* Set CAN error code to Bus-Off */ errorcode |= HAL_CAN_ERROR_BOF; - 800184a: 6a7b ldr r3, [r7, #36] @ 0x24 - 800184c: f043 0304 orr.w r3, r3, #4 - 8001850: 627b str r3, [r7, #36] @ 0x24 + 80017b6: 6a7b ldr r3, [r7, #36] @ 0x24 + 80017b8: f043 0304 orr.w r3, r3, #4 + 80017bc: 627b str r3, [r7, #36] @ 0x24 /* No need for clear of Error Bus-Off as read-only */ } /* Check Last Error Code Flag */ if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && - 8001852: 6a3b ldr r3, [r7, #32] - 8001854: f403 6300 and.w r3, r3, #2048 @ 0x800 - 8001858: 2b00 cmp r3, #0 - 800185a: d043 beq.n 80018e4 + 80017be: 6a3b ldr r3, [r7, #32] + 80017c0: f403 6300 and.w r3, r3, #2048 @ 0x800 + 80017c4: 2b00 cmp r3, #0 + 80017c6: d043 beq.n 8001850 ((esrflags & CAN_ESR_LEC) != 0U)) - 800185c: 68fb ldr r3, [r7, #12] - 800185e: f003 0370 and.w r3, r3, #112 @ 0x70 + 80017c8: 68fb ldr r3, [r7, #12] + 80017ca: f003 0370 and.w r3, r3, #112 @ 0x70 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && - 8001862: 2b00 cmp r3, #0 - 8001864: d03e beq.n 80018e4 + 80017ce: 2b00 cmp r3, #0 + 80017d0: d03e beq.n 8001850 { switch (esrflags & CAN_ESR_LEC) - 8001866: 68fb ldr r3, [r7, #12] - 8001868: f003 0370 and.w r3, r3, #112 @ 0x70 - 800186c: 2b60 cmp r3, #96 @ 0x60 - 800186e: d02b beq.n 80018c8 - 8001870: 2b60 cmp r3, #96 @ 0x60 - 8001872: d82e bhi.n 80018d2 - 8001874: 2b50 cmp r3, #80 @ 0x50 - 8001876: d022 beq.n 80018be - 8001878: 2b50 cmp r3, #80 @ 0x50 - 800187a: d82a bhi.n 80018d2 - 800187c: 2b40 cmp r3, #64 @ 0x40 - 800187e: d019 beq.n 80018b4 - 8001880: 2b40 cmp r3, #64 @ 0x40 - 8001882: d826 bhi.n 80018d2 - 8001884: 2b30 cmp r3, #48 @ 0x30 - 8001886: d010 beq.n 80018aa - 8001888: 2b30 cmp r3, #48 @ 0x30 - 800188a: d822 bhi.n 80018d2 - 800188c: 2b10 cmp r3, #16 - 800188e: d002 beq.n 8001896 - 8001890: 2b20 cmp r3, #32 - 8001892: d005 beq.n 80018a0 + 80017d2: 68fb ldr r3, [r7, #12] + 80017d4: f003 0370 and.w r3, r3, #112 @ 0x70 + 80017d8: 2b60 cmp r3, #96 @ 0x60 + 80017da: d02b beq.n 8001834 + 80017dc: 2b60 cmp r3, #96 @ 0x60 + 80017de: d82e bhi.n 800183e + 80017e0: 2b50 cmp r3, #80 @ 0x50 + 80017e2: d022 beq.n 800182a + 80017e4: 2b50 cmp r3, #80 @ 0x50 + 80017e6: d82a bhi.n 800183e + 80017e8: 2b40 cmp r3, #64 @ 0x40 + 80017ea: d019 beq.n 8001820 + 80017ec: 2b40 cmp r3, #64 @ 0x40 + 80017ee: d826 bhi.n 800183e + 80017f0: 2b30 cmp r3, #48 @ 0x30 + 80017f2: d010 beq.n 8001816 + 80017f4: 2b30 cmp r3, #48 @ 0x30 + 80017f6: d822 bhi.n 800183e + 80017f8: 2b10 cmp r3, #16 + 80017fa: d002 beq.n 8001802 + 80017fc: 2b20 cmp r3, #32 + 80017fe: d005 beq.n 800180c case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): /* Set CAN error code to CRC error */ errorcode |= HAL_CAN_ERROR_CRC; break; default: break; - 8001894: e01d b.n 80018d2 + 8001800: e01d b.n 800183e errorcode |= HAL_CAN_ERROR_STF; - 8001896: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001898: f043 0308 orr.w r3, r3, #8 - 800189c: 627b str r3, [r7, #36] @ 0x24 + 8001802: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001804: f043 0308 orr.w r3, r3, #8 + 8001808: 627b str r3, [r7, #36] @ 0x24 break; - 800189e: e019 b.n 80018d4 + 800180a: e019 b.n 8001840 errorcode |= HAL_CAN_ERROR_FOR; - 80018a0: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018a2: f043 0310 orr.w r3, r3, #16 - 80018a6: 627b str r3, [r7, #36] @ 0x24 + 800180c: 6a7b ldr r3, [r7, #36] @ 0x24 + 800180e: f043 0310 orr.w r3, r3, #16 + 8001812: 627b str r3, [r7, #36] @ 0x24 break; - 80018a8: e014 b.n 80018d4 + 8001814: e014 b.n 8001840 errorcode |= HAL_CAN_ERROR_ACK; - 80018aa: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018ac: f043 0320 orr.w r3, r3, #32 - 80018b0: 627b str r3, [r7, #36] @ 0x24 + 8001816: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001818: f043 0320 orr.w r3, r3, #32 + 800181c: 627b str r3, [r7, #36] @ 0x24 break; - 80018b2: e00f b.n 80018d4 + 800181e: e00f b.n 8001840 errorcode |= HAL_CAN_ERROR_BR; - 80018b4: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018b6: f043 0340 orr.w r3, r3, #64 @ 0x40 - 80018ba: 627b str r3, [r7, #36] @ 0x24 + 8001820: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001822: f043 0340 orr.w r3, r3, #64 @ 0x40 + 8001826: 627b str r3, [r7, #36] @ 0x24 break; - 80018bc: e00a b.n 80018d4 + 8001828: e00a b.n 8001840 errorcode |= HAL_CAN_ERROR_BD; - 80018be: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018c0: f043 0380 orr.w r3, r3, #128 @ 0x80 - 80018c4: 627b str r3, [r7, #36] @ 0x24 + 800182a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800182c: f043 0380 orr.w r3, r3, #128 @ 0x80 + 8001830: 627b str r3, [r7, #36] @ 0x24 break; - 80018c6: e005 b.n 80018d4 + 8001832: e005 b.n 8001840 errorcode |= HAL_CAN_ERROR_CRC; - 80018c8: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018ca: f443 7380 orr.w r3, r3, #256 @ 0x100 - 80018ce: 627b str r3, [r7, #36] @ 0x24 + 8001834: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001836: f443 7380 orr.w r3, r3, #256 @ 0x100 + 800183a: 627b str r3, [r7, #36] @ 0x24 break; - 80018d0: e000 b.n 80018d4 + 800183c: e000 b.n 8001840 break; - 80018d2: bf00 nop + 800183e: bf00 nop } /* Clear Last error code Flag */ CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); - 80018d4: 687b ldr r3, [r7, #4] - 80018d6: 681b ldr r3, [r3, #0] - 80018d8: 699a ldr r2, [r3, #24] - 80018da: 687b ldr r3, [r7, #4] - 80018dc: 681b ldr r3, [r3, #0] - 80018de: f022 0270 bic.w r2, r2, #112 @ 0x70 - 80018e2: 619a str r2, [r3, #24] + 8001840: 687b ldr r3, [r7, #4] + 8001842: 681b ldr r3, [r3, #0] + 8001844: 699a ldr r2, [r3, #24] + 8001846: 687b ldr r3, [r7, #4] + 8001848: 681b ldr r3, [r3, #0] + 800184a: f022 0270 bic.w r2, r2, #112 @ 0x70 + 800184e: 619a str r2, [r3, #24] } } /* Clear ERRI Flag */ __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); - 80018e4: 687b ldr r3, [r7, #4] - 80018e6: 681b ldr r3, [r3, #0] - 80018e8: 2204 movs r2, #4 - 80018ea: 605a str r2, [r3, #4] + 8001850: 687b ldr r3, [r7, #4] + 8001852: 681b ldr r3, [r3, #0] + 8001854: 2204 movs r2, #4 + 8001856: 605a str r2, [r3, #4] } /* Call the Error call Back in case of Errors */ if (errorcode != HAL_CAN_ERROR_NONE) - 80018ec: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018ee: 2b00 cmp r3, #0 - 80018f0: d009 beq.n 8001906 + 8001858: 6a7b ldr r3, [r7, #36] @ 0x24 + 800185a: 2b00 cmp r3, #0 + 800185c: d009 beq.n 8001872 { /* Update error code in handle */ hcan->ErrorCode |= errorcode; - 80018f2: 687b ldr r3, [r7, #4] - 80018f4: 6a5a ldr r2, [r3, #36] @ 0x24 - 80018f6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80018f8: 431a orrs r2, r3 - 80018fa: 687b ldr r3, [r7, #4] - 80018fc: 625a str r2, [r3, #36] @ 0x24 + 800185e: 687b ldr r3, [r7, #4] + 8001860: 6a5a ldr r2, [r3, #36] @ 0x24 + 8001862: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001864: 431a orrs r2, r3 + 8001866: 687b ldr r3, [r7, #4] + 8001868: 625a str r2, [r3, #36] @ 0x24 /* Call Error callback function */ #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hcan->ErrorCallback(hcan); - 80018fe: 687b ldr r3, [r7, #4] - 8001900: 6d9b ldr r3, [r3, #88] @ 0x58 - 8001902: 6878 ldr r0, [r7, #4] - 8001904: 4798 blx r3 + 800186a: 687b ldr r3, [r7, #4] + 800186c: 6d9b ldr r3, [r3, #88] @ 0x58 + 800186e: 6878 ldr r0, [r7, #4] + 8001870: 4798 blx r3 #else /* Call weak (surcharged) callback */ HAL_CAN_ErrorCallback(hcan); #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ } } - 8001906: bf00 nop - 8001908: 3728 adds r7, #40 @ 0x28 - 800190a: 46bd mov sp, r7 - 800190c: bd80 pop {r7, pc} + 8001872: bf00 nop + 8001874: 3728 adds r7, #40 @ 0x28 + 8001876: 46bd mov sp, r7 + 8001878: bd80 pop {r7, pc} -0800190e : +0800187a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) { - 800190e: b480 push {r7} - 8001910: b083 sub sp, #12 - 8001912: af00 add r7, sp, #0 - 8001914: 6078 str r0, [r7, #4] + 800187a: b480 push {r7} + 800187c: b083 sub sp, #12 + 800187e: af00 add r7, sp, #0 + 8001880: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the user file */ } - 8001916: bf00 nop - 8001918: 370c adds r7, #12 - 800191a: 46bd mov sp, r7 - 800191c: f85d 7b04 ldr.w r7, [sp], #4 - 8001920: 4770 bx lr + 8001882: bf00 nop + 8001884: 370c adds r7, #12 + 8001886: 46bd mov sp, r7 + 8001888: f85d 7b04 ldr.w r7, [sp], #4 + 800188c: 4770 bx lr -08001922 : +0800188e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) { - 8001922: b480 push {r7} - 8001924: b083 sub sp, #12 - 8001926: af00 add r7, sp, #0 - 8001928: 6078 str r0, [r7, #4] + 800188e: b480 push {r7} + 8001890: b083 sub sp, #12 + 8001892: af00 add r7, sp, #0 + 8001894: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the user file */ } - 800192a: bf00 nop - 800192c: 370c adds r7, #12 - 800192e: 46bd mov sp, r7 - 8001930: f85d 7b04 ldr.w r7, [sp], #4 - 8001934: 4770 bx lr + 8001896: bf00 nop + 8001898: 370c adds r7, #12 + 800189a: 46bd mov sp, r7 + 800189c: f85d 7b04 ldr.w r7, [sp], #4 + 80018a0: 4770 bx lr -08001936 : +080018a2 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) { - 8001936: b480 push {r7} - 8001938: b083 sub sp, #12 - 800193a: af00 add r7, sp, #0 - 800193c: 6078 str r0, [r7, #4] + 80018a2: b480 push {r7} + 80018a4: b083 sub sp, #12 + 80018a6: af00 add r7, sp, #0 + 80018a8: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the user file */ } - 800193e: bf00 nop - 8001940: 370c adds r7, #12 - 8001942: 46bd mov sp, r7 - 8001944: f85d 7b04 ldr.w r7, [sp], #4 - 8001948: 4770 bx lr + 80018aa: bf00 nop + 80018ac: 370c adds r7, #12 + 80018ae: 46bd mov sp, r7 + 80018b0: f85d 7b04 ldr.w r7, [sp], #4 + 80018b4: 4770 bx lr -0800194a : +080018b6 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { - 800194a: b480 push {r7} - 800194c: b083 sub sp, #12 - 800194e: af00 add r7, sp, #0 - 8001950: 6078 str r0, [r7, #4] + 80018b6: b480 push {r7} + 80018b8: b083 sub sp, #12 + 80018ba: af00 add r7, sp, #0 + 80018bc: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox0AbortCallback could be implemented in the user file */ } - 8001952: bf00 nop - 8001954: 370c adds r7, #12 - 8001956: 46bd mov sp, r7 - 8001958: f85d 7b04 ldr.w r7, [sp], #4 - 800195c: 4770 bx lr + 80018be: bf00 nop + 80018c0: 370c adds r7, #12 + 80018c2: 46bd mov sp, r7 + 80018c4: f85d 7b04 ldr.w r7, [sp], #4 + 80018c8: 4770 bx lr -0800195e : +080018ca : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { - 800195e: b480 push {r7} - 8001960: b083 sub sp, #12 - 8001962: af00 add r7, sp, #0 - 8001964: 6078 str r0, [r7, #4] + 80018ca: b480 push {r7} + 80018cc: b083 sub sp, #12 + 80018ce: af00 add r7, sp, #0 + 80018d0: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox1AbortCallback could be implemented in the user file */ } - 8001966: bf00 nop - 8001968: 370c adds r7, #12 - 800196a: 46bd mov sp, r7 - 800196c: f85d 7b04 ldr.w r7, [sp], #4 - 8001970: 4770 bx lr + 80018d2: bf00 nop + 80018d4: 370c adds r7, #12 + 80018d6: 46bd mov sp, r7 + 80018d8: f85d 7b04 ldr.w r7, [sp], #4 + 80018dc: 4770 bx lr -08001972 : +080018de : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { - 8001972: b480 push {r7} - 8001974: b083 sub sp, #12 - 8001976: af00 add r7, sp, #0 - 8001978: 6078 str r0, [r7, #4] + 80018de: b480 push {r7} + 80018e0: b083 sub sp, #12 + 80018e2: af00 add r7, sp, #0 + 80018e4: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_TxMailbox2AbortCallback could be implemented in the user file */ } - 800197a: bf00 nop - 800197c: 370c adds r7, #12 - 800197e: 46bd mov sp, r7 - 8001980: f85d 7b04 ldr.w r7, [sp], #4 - 8001984: 4770 bx lr + 80018e6: bf00 nop + 80018e8: 370c adds r7, #12 + 80018ea: 46bd mov sp, r7 + 80018ec: f85d 7b04 ldr.w r7, [sp], #4 + 80018f0: 4770 bx lr -08001986 : +080018f2 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { - 8001986: b480 push {r7} - 8001988: b083 sub sp, #12 - 800198a: af00 add r7, sp, #0 - 800198c: 6078 str r0, [r7, #4] + 80018f2: b480 push {r7} + 80018f4: b083 sub sp, #12 + 80018f6: af00 add r7, sp, #0 + 80018f8: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo0FullCallback could be implemented in the user file */ } - 800198e: bf00 nop - 8001990: 370c adds r7, #12 - 8001992: 46bd mov sp, r7 - 8001994: f85d 7b04 ldr.w r7, [sp], #4 - 8001998: 4770 bx lr + 80018fa: bf00 nop + 80018fc: 370c adds r7, #12 + 80018fe: 46bd mov sp, r7 + 8001900: f85d 7b04 ldr.w r7, [sp], #4 + 8001904: 4770 bx lr -0800199a : +08001906 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) { - 800199a: b480 push {r7} - 800199c: b083 sub sp, #12 - 800199e: af00 add r7, sp, #0 - 80019a0: 6078 str r0, [r7, #4] + 8001906: b480 push {r7} + 8001908: b083 sub sp, #12 + 800190a: af00 add r7, sp, #0 + 800190c: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the user file */ } - 80019a2: bf00 nop - 80019a4: 370c adds r7, #12 - 80019a6: 46bd mov sp, r7 - 80019a8: f85d 7b04 ldr.w r7, [sp], #4 - 80019ac: 4770 bx lr + 800190e: bf00 nop + 8001910: 370c adds r7, #12 + 8001912: 46bd mov sp, r7 + 8001914: f85d 7b04 ldr.w r7, [sp], #4 + 8001918: 4770 bx lr -080019ae : +0800191a : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { - 80019ae: b480 push {r7} - 80019b0: b083 sub sp, #12 - 80019b2: af00 add r7, sp, #0 - 80019b4: 6078 str r0, [r7, #4] + 800191a: b480 push {r7} + 800191c: b083 sub sp, #12 + 800191e: af00 add r7, sp, #0 + 8001920: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_RxFifo1FullCallback could be implemented in the user file */ } - 80019b6: bf00 nop - 80019b8: 370c adds r7, #12 - 80019ba: 46bd mov sp, r7 - 80019bc: f85d 7b04 ldr.w r7, [sp], #4 - 80019c0: 4770 bx lr + 8001922: bf00 nop + 8001924: 370c adds r7, #12 + 8001926: 46bd mov sp, r7 + 8001928: f85d 7b04 ldr.w r7, [sp], #4 + 800192c: 4770 bx lr -080019c2 : +0800192e : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { - 80019c2: b480 push {r7} - 80019c4: b083 sub sp, #12 - 80019c6: af00 add r7, sp, #0 - 80019c8: 6078 str r0, [r7, #4] + 800192e: b480 push {r7} + 8001930: b083 sub sp, #12 + 8001932: af00 add r7, sp, #0 + 8001934: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_SleepCallback could be implemented in the user file */ } - 80019ca: bf00 nop - 80019cc: 370c adds r7, #12 - 80019ce: 46bd mov sp, r7 - 80019d0: f85d 7b04 ldr.w r7, [sp], #4 - 80019d4: 4770 bx lr + 8001936: bf00 nop + 8001938: 370c adds r7, #12 + 800193a: 46bd mov sp, r7 + 800193c: f85d 7b04 ldr.w r7, [sp], #4 + 8001940: 4770 bx lr -080019d6 : +08001942 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { - 80019d6: b480 push {r7} - 80019d8: b083 sub sp, #12 - 80019da: af00 add r7, sp, #0 - 80019dc: 6078 str r0, [r7, #4] + 8001942: b480 push {r7} + 8001944: b083 sub sp, #12 + 8001946: af00 add r7, sp, #0 + 8001948: 6078 str r0, [r7, #4] /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the user file */ } - 80019de: bf00 nop - 80019e0: 370c adds r7, #12 - 80019e2: 46bd mov sp, r7 - 80019e4: f85d 7b04 ldr.w r7, [sp], #4 - 80019e8: 4770 bx lr + 800194a: bf00 nop + 800194c: 370c adds r7, #12 + 800194e: 46bd mov sp, r7 + 8001950: f85d 7b04 ldr.w r7, [sp], #4 + 8001954: 4770 bx lr -080019ea : +08001956 : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval None */ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { - 80019ea: b480 push {r7} - 80019ec: b083 sub sp, #12 - 80019ee: af00 add r7, sp, #0 - 80019f0: 6078 str r0, [r7, #4] + 8001956: b480 push {r7} + 8001958: b083 sub sp, #12 + 800195a: af00 add r7, sp, #0 + 800195c: 6078 str r0, [r7, #4] UNUSED(hcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_CAN_ErrorCallback could be implemented in the user file */ } - 80019f2: bf00 nop - 80019f4: 370c adds r7, #12 - 80019f6: 46bd mov sp, r7 - 80019f8: f85d 7b04 ldr.w r7, [sp], #4 - 80019fc: 4770 bx lr + 800195e: bf00 nop + 8001960: 370c adds r7, #12 + 8001962: 46bd mov sp, r7 + 8001964: f85d 7b04 ldr.w r7, [sp], #4 + 8001968: 4770 bx lr ... -08001a00 <__NVIC_SetPriorityGrouping>: +0800196c <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8001a00: b480 push {r7} - 8001a02: b085 sub sp, #20 - 8001a04: af00 add r7, sp, #0 - 8001a06: 6078 str r0, [r7, #4] + 800196c: b480 push {r7} + 800196e: b085 sub sp, #20 + 8001970: af00 add r7, sp, #0 + 8001972: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8001a08: 687b ldr r3, [r7, #4] - 8001a0a: f003 0307 and.w r3, r3, #7 - 8001a0e: 60fb str r3, [r7, #12] + 8001974: 687b ldr r3, [r7, #4] + 8001976: f003 0307 and.w r3, r3, #7 + 800197a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8001a10: 4b0c ldr r3, [pc, #48] @ (8001a44 <__NVIC_SetPriorityGrouping+0x44>) - 8001a12: 68db ldr r3, [r3, #12] - 8001a14: 60bb str r3, [r7, #8] + 800197c: 4b0c ldr r3, [pc, #48] @ (80019b0 <__NVIC_SetPriorityGrouping+0x44>) + 800197e: 68db ldr r3, [r3, #12] + 8001980: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8001a16: 68ba ldr r2, [r7, #8] - 8001a18: f64f 03ff movw r3, #63743 @ 0xf8ff - 8001a1c: 4013 ands r3, r2 - 8001a1e: 60bb str r3, [r7, #8] + 8001982: 68ba ldr r2, [r7, #8] + 8001984: f64f 03ff movw r3, #63743 @ 0xf8ff + 8001988: 4013 ands r3, r2 + 800198a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8001a20: 68fb ldr r3, [r7, #12] - 8001a22: 021a lsls r2, r3, #8 + 800198c: 68fb ldr r3, [r7, #12] + 800198e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8001a24: 68bb ldr r3, [r7, #8] - 8001a26: 4313 orrs r3, r2 + 8001990: 68bb ldr r3, [r7, #8] + 8001992: 4313 orrs r3, r2 reg_value = (reg_value | - 8001a28: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8001a2c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8001a30: 60bb str r3, [r7, #8] + 8001994: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8001998: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 800199c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 8001a32: 4a04 ldr r2, [pc, #16] @ (8001a44 <__NVIC_SetPriorityGrouping+0x44>) - 8001a34: 68bb ldr r3, [r7, #8] - 8001a36: 60d3 str r3, [r2, #12] + 800199e: 4a04 ldr r2, [pc, #16] @ (80019b0 <__NVIC_SetPriorityGrouping+0x44>) + 80019a0: 68bb ldr r3, [r7, #8] + 80019a2: 60d3 str r3, [r2, #12] } - 8001a38: bf00 nop - 8001a3a: 3714 adds r7, #20 - 8001a3c: 46bd mov sp, r7 - 8001a3e: f85d 7b04 ldr.w r7, [sp], #4 - 8001a42: 4770 bx lr - 8001a44: e000ed00 .word 0xe000ed00 + 80019a4: bf00 nop + 80019a6: 3714 adds r7, #20 + 80019a8: 46bd mov sp, r7 + 80019aa: f85d 7b04 ldr.w r7, [sp], #4 + 80019ae: 4770 bx lr + 80019b0: e000ed00 .word 0xe000ed00 -08001a48 <__NVIC_GetPriorityGrouping>: +080019b4 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8001a48: b480 push {r7} - 8001a4a: af00 add r7, sp, #0 + 80019b4: b480 push {r7} + 80019b6: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8001a4c: 4b04 ldr r3, [pc, #16] @ (8001a60 <__NVIC_GetPriorityGrouping+0x18>) - 8001a4e: 68db ldr r3, [r3, #12] - 8001a50: 0a1b lsrs r3, r3, #8 - 8001a52: f003 0307 and.w r3, r3, #7 + 80019b8: 4b04 ldr r3, [pc, #16] @ (80019cc <__NVIC_GetPriorityGrouping+0x18>) + 80019ba: 68db ldr r3, [r3, #12] + 80019bc: 0a1b lsrs r3, r3, #8 + 80019be: f003 0307 and.w r3, r3, #7 } - 8001a56: 4618 mov r0, r3 - 8001a58: 46bd mov sp, r7 - 8001a5a: f85d 7b04 ldr.w r7, [sp], #4 - 8001a5e: 4770 bx lr - 8001a60: e000ed00 .word 0xe000ed00 + 80019c2: 4618 mov r0, r3 + 80019c4: 46bd mov sp, r7 + 80019c6: f85d 7b04 ldr.w r7, [sp], #4 + 80019ca: 4770 bx lr + 80019cc: e000ed00 .word 0xe000ed00 -08001a64 <__NVIC_EnableIRQ>: +080019d0 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8001a64: b480 push {r7} - 8001a66: b083 sub sp, #12 - 8001a68: af00 add r7, sp, #0 - 8001a6a: 4603 mov r3, r0 - 8001a6c: 71fb strb r3, [r7, #7] + 80019d0: b480 push {r7} + 80019d2: b083 sub sp, #12 + 80019d4: af00 add r7, sp, #0 + 80019d6: 4603 mov r3, r0 + 80019d8: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8001a6e: f997 3007 ldrsb.w r3, [r7, #7] - 8001a72: 2b00 cmp r3, #0 - 8001a74: db0b blt.n 8001a8e <__NVIC_EnableIRQ+0x2a> + 80019da: f997 3007 ldrsb.w r3, [r7, #7] + 80019de: 2b00 cmp r3, #0 + 80019e0: db0b blt.n 80019fa <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8001a76: 79fb ldrb r3, [r7, #7] - 8001a78: f003 021f and.w r2, r3, #31 - 8001a7c: 4907 ldr r1, [pc, #28] @ (8001a9c <__NVIC_EnableIRQ+0x38>) - 8001a7e: f997 3007 ldrsb.w r3, [r7, #7] - 8001a82: 095b lsrs r3, r3, #5 - 8001a84: 2001 movs r0, #1 - 8001a86: fa00 f202 lsl.w r2, r0, r2 - 8001a8a: f841 2023 str.w r2, [r1, r3, lsl #2] + 80019e2: 79fb ldrb r3, [r7, #7] + 80019e4: f003 021f and.w r2, r3, #31 + 80019e8: 4907 ldr r1, [pc, #28] @ (8001a08 <__NVIC_EnableIRQ+0x38>) + 80019ea: f997 3007 ldrsb.w r3, [r7, #7] + 80019ee: 095b lsrs r3, r3, #5 + 80019f0: 2001 movs r0, #1 + 80019f2: fa00 f202 lsl.w r2, r0, r2 + 80019f6: f841 2023 str.w r2, [r1, r3, lsl #2] } } - 8001a8e: bf00 nop - 8001a90: 370c adds r7, #12 - 8001a92: 46bd mov sp, r7 - 8001a94: f85d 7b04 ldr.w r7, [sp], #4 - 8001a98: 4770 bx lr - 8001a9a: bf00 nop - 8001a9c: e000e100 .word 0xe000e100 + 80019fa: bf00 nop + 80019fc: 370c adds r7, #12 + 80019fe: 46bd mov sp, r7 + 8001a00: f85d 7b04 ldr.w r7, [sp], #4 + 8001a04: 4770 bx lr + 8001a06: bf00 nop + 8001a08: e000e100 .word 0xe000e100 -08001aa0 <__NVIC_SetPriority>: +08001a0c <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8001aa0: b480 push {r7} - 8001aa2: b083 sub sp, #12 - 8001aa4: af00 add r7, sp, #0 - 8001aa6: 4603 mov r3, r0 - 8001aa8: 6039 str r1, [r7, #0] - 8001aaa: 71fb strb r3, [r7, #7] + 8001a0c: b480 push {r7} + 8001a0e: b083 sub sp, #12 + 8001a10: af00 add r7, sp, #0 + 8001a12: 4603 mov r3, r0 + 8001a14: 6039 str r1, [r7, #0] + 8001a16: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8001aac: f997 3007 ldrsb.w r3, [r7, #7] - 8001ab0: 2b00 cmp r3, #0 - 8001ab2: db0a blt.n 8001aca <__NVIC_SetPriority+0x2a> + 8001a18: f997 3007 ldrsb.w r3, [r7, #7] + 8001a1c: 2b00 cmp r3, #0 + 8001a1e: db0a blt.n 8001a36 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8001ab4: 683b ldr r3, [r7, #0] - 8001ab6: b2da uxtb r2, r3 - 8001ab8: 490c ldr r1, [pc, #48] @ (8001aec <__NVIC_SetPriority+0x4c>) - 8001aba: f997 3007 ldrsb.w r3, [r7, #7] - 8001abe: 0112 lsls r2, r2, #4 - 8001ac0: b2d2 uxtb r2, r2 - 8001ac2: 440b add r3, r1 - 8001ac4: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 8001a20: 683b ldr r3, [r7, #0] + 8001a22: b2da uxtb r2, r3 + 8001a24: 490c ldr r1, [pc, #48] @ (8001a58 <__NVIC_SetPriority+0x4c>) + 8001a26: f997 3007 ldrsb.w r3, [r7, #7] + 8001a2a: 0112 lsls r2, r2, #4 + 8001a2c: b2d2 uxtb r2, r2 + 8001a2e: 440b add r3, r1 + 8001a30: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8001ac8: e00a b.n 8001ae0 <__NVIC_SetPriority+0x40> + 8001a34: e00a b.n 8001a4c <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8001aca: 683b ldr r3, [r7, #0] - 8001acc: b2da uxtb r2, r3 - 8001ace: 4908 ldr r1, [pc, #32] @ (8001af0 <__NVIC_SetPriority+0x50>) - 8001ad0: 79fb ldrb r3, [r7, #7] - 8001ad2: f003 030f and.w r3, r3, #15 - 8001ad6: 3b04 subs r3, #4 - 8001ad8: 0112 lsls r2, r2, #4 - 8001ada: b2d2 uxtb r2, r2 - 8001adc: 440b add r3, r1 - 8001ade: 761a strb r2, [r3, #24] + 8001a36: 683b ldr r3, [r7, #0] + 8001a38: b2da uxtb r2, r3 + 8001a3a: 4908 ldr r1, [pc, #32] @ (8001a5c <__NVIC_SetPriority+0x50>) + 8001a3c: 79fb ldrb r3, [r7, #7] + 8001a3e: f003 030f and.w r3, r3, #15 + 8001a42: 3b04 subs r3, #4 + 8001a44: 0112 lsls r2, r2, #4 + 8001a46: b2d2 uxtb r2, r2 + 8001a48: 440b add r3, r1 + 8001a4a: 761a strb r2, [r3, #24] } - 8001ae0: bf00 nop - 8001ae2: 370c adds r7, #12 - 8001ae4: 46bd mov sp, r7 - 8001ae6: f85d 7b04 ldr.w r7, [sp], #4 - 8001aea: 4770 bx lr - 8001aec: e000e100 .word 0xe000e100 - 8001af0: e000ed00 .word 0xe000ed00 + 8001a4c: bf00 nop + 8001a4e: 370c adds r7, #12 + 8001a50: 46bd mov sp, r7 + 8001a52: f85d 7b04 ldr.w r7, [sp], #4 + 8001a56: 4770 bx lr + 8001a58: e000e100 .word 0xe000e100 + 8001a5c: e000ed00 .word 0xe000ed00 -08001af4 : +08001a60 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8001af4: b480 push {r7} - 8001af6: b089 sub sp, #36 @ 0x24 - 8001af8: af00 add r7, sp, #0 - 8001afa: 60f8 str r0, [r7, #12] - 8001afc: 60b9 str r1, [r7, #8] - 8001afe: 607a str r2, [r7, #4] + 8001a60: b480 push {r7} + 8001a62: b089 sub sp, #36 @ 0x24 + 8001a64: af00 add r7, sp, #0 + 8001a66: 60f8 str r0, [r7, #12] + 8001a68: 60b9 str r1, [r7, #8] + 8001a6a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8001b00: 68fb ldr r3, [r7, #12] - 8001b02: f003 0307 and.w r3, r3, #7 - 8001b06: 61fb str r3, [r7, #28] + 8001a6c: 68fb ldr r3, [r7, #12] + 8001a6e: f003 0307 and.w r3, r3, #7 + 8001a72: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8001b08: 69fb ldr r3, [r7, #28] - 8001b0a: f1c3 0307 rsb r3, r3, #7 - 8001b0e: 2b04 cmp r3, #4 - 8001b10: bf28 it cs - 8001b12: 2304 movcs r3, #4 - 8001b14: 61bb str r3, [r7, #24] + 8001a74: 69fb ldr r3, [r7, #28] + 8001a76: f1c3 0307 rsb r3, r3, #7 + 8001a7a: 2b04 cmp r3, #4 + 8001a7c: bf28 it cs + 8001a7e: 2304 movcs r3, #4 + 8001a80: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8001b16: 69fb ldr r3, [r7, #28] - 8001b18: 3304 adds r3, #4 - 8001b1a: 2b06 cmp r3, #6 - 8001b1c: d902 bls.n 8001b24 - 8001b1e: 69fb ldr r3, [r7, #28] - 8001b20: 3b03 subs r3, #3 - 8001b22: e000 b.n 8001b26 - 8001b24: 2300 movs r3, #0 - 8001b26: 617b str r3, [r7, #20] + 8001a82: 69fb ldr r3, [r7, #28] + 8001a84: 3304 adds r3, #4 + 8001a86: 2b06 cmp r3, #6 + 8001a88: d902 bls.n 8001a90 + 8001a8a: 69fb ldr r3, [r7, #28] + 8001a8c: 3b03 subs r3, #3 + 8001a8e: e000 b.n 8001a92 + 8001a90: 2300 movs r3, #0 + 8001a92: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8001b28: f04f 32ff mov.w r2, #4294967295 - 8001b2c: 69bb ldr r3, [r7, #24] - 8001b2e: fa02 f303 lsl.w r3, r2, r3 - 8001b32: 43da mvns r2, r3 - 8001b34: 68bb ldr r3, [r7, #8] - 8001b36: 401a ands r2, r3 - 8001b38: 697b ldr r3, [r7, #20] - 8001b3a: 409a lsls r2, r3 + 8001a94: f04f 32ff mov.w r2, #4294967295 + 8001a98: 69bb ldr r3, [r7, #24] + 8001a9a: fa02 f303 lsl.w r3, r2, r3 + 8001a9e: 43da mvns r2, r3 + 8001aa0: 68bb ldr r3, [r7, #8] + 8001aa2: 401a ands r2, r3 + 8001aa4: 697b ldr r3, [r7, #20] + 8001aa6: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8001b3c: f04f 31ff mov.w r1, #4294967295 - 8001b40: 697b ldr r3, [r7, #20] - 8001b42: fa01 f303 lsl.w r3, r1, r3 - 8001b46: 43d9 mvns r1, r3 - 8001b48: 687b ldr r3, [r7, #4] - 8001b4a: 400b ands r3, r1 + 8001aa8: f04f 31ff mov.w r1, #4294967295 + 8001aac: 697b ldr r3, [r7, #20] + 8001aae: fa01 f303 lsl.w r3, r1, r3 + 8001ab2: 43d9 mvns r1, r3 + 8001ab4: 687b ldr r3, [r7, #4] + 8001ab6: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8001b4c: 4313 orrs r3, r2 + 8001ab8: 4313 orrs r3, r2 ); } - 8001b4e: 4618 mov r0, r3 - 8001b50: 3724 adds r7, #36 @ 0x24 - 8001b52: 46bd mov sp, r7 - 8001b54: f85d 7b04 ldr.w r7, [sp], #4 - 8001b58: 4770 bx lr + 8001aba: 4618 mov r0, r3 + 8001abc: 3724 adds r7, #36 @ 0x24 + 8001abe: 46bd mov sp, r7 + 8001ac0: f85d 7b04 ldr.w r7, [sp], #4 + 8001ac4: 4770 bx lr ... -08001b5c : +08001ac8 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8001b5c: b580 push {r7, lr} - 8001b5e: b082 sub sp, #8 - 8001b60: af00 add r7, sp, #0 - 8001b62: 6078 str r0, [r7, #4] + 8001ac8: b580 push {r7, lr} + 8001aca: b082 sub sp, #8 + 8001acc: af00 add r7, sp, #0 + 8001ace: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8001b64: 687b ldr r3, [r7, #4] - 8001b66: 3b01 subs r3, #1 - 8001b68: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8001b6c: d301 bcc.n 8001b72 + 8001ad0: 687b ldr r3, [r7, #4] + 8001ad2: 3b01 subs r3, #1 + 8001ad4: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8001ad8: d301 bcc.n 8001ade { return (1UL); /* Reload value impossible */ - 8001b6e: 2301 movs r3, #1 - 8001b70: e00f b.n 8001b92 + 8001ada: 2301 movs r3, #1 + 8001adc: e00f b.n 8001afe } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8001b72: 4a0a ldr r2, [pc, #40] @ (8001b9c ) - 8001b74: 687b ldr r3, [r7, #4] - 8001b76: 3b01 subs r3, #1 - 8001b78: 6053 str r3, [r2, #4] + 8001ade: 4a0a ldr r2, [pc, #40] @ (8001b08 ) + 8001ae0: 687b ldr r3, [r7, #4] + 8001ae2: 3b01 subs r3, #1 + 8001ae4: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8001b7a: 210f movs r1, #15 - 8001b7c: f04f 30ff mov.w r0, #4294967295 - 8001b80: f7ff ff8e bl 8001aa0 <__NVIC_SetPriority> + 8001ae6: 210f movs r1, #15 + 8001ae8: f04f 30ff mov.w r0, #4294967295 + 8001aec: f7ff ff8e bl 8001a0c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8001b84: 4b05 ldr r3, [pc, #20] @ (8001b9c ) - 8001b86: 2200 movs r2, #0 - 8001b88: 609a str r2, [r3, #8] + 8001af0: 4b05 ldr r3, [pc, #20] @ (8001b08 ) + 8001af2: 2200 movs r2, #0 + 8001af4: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8001b8a: 4b04 ldr r3, [pc, #16] @ (8001b9c ) - 8001b8c: 2207 movs r2, #7 - 8001b8e: 601a str r2, [r3, #0] + 8001af6: 4b04 ldr r3, [pc, #16] @ (8001b08 ) + 8001af8: 2207 movs r2, #7 + 8001afa: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8001b90: 2300 movs r3, #0 + 8001afc: 2300 movs r3, #0 } - 8001b92: 4618 mov r0, r3 - 8001b94: 3708 adds r7, #8 - 8001b96: 46bd mov sp, r7 - 8001b98: bd80 pop {r7, pc} - 8001b9a: bf00 nop - 8001b9c: e000e010 .word 0xe000e010 + 8001afe: 4618 mov r0, r3 + 8001b00: 3708 adds r7, #8 + 8001b02: 46bd mov sp, r7 + 8001b04: bd80 pop {r7, pc} + 8001b06: bf00 nop + 8001b08: e000e010 .word 0xe000e010 -08001ba0 : +08001b0c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8001ba0: b580 push {r7, lr} - 8001ba2: b082 sub sp, #8 - 8001ba4: af00 add r7, sp, #0 - 8001ba6: 6078 str r0, [r7, #4] + 8001b0c: b580 push {r7, lr} + 8001b0e: b082 sub sp, #8 + 8001b10: af00 add r7, sp, #0 + 8001b12: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8001ba8: 6878 ldr r0, [r7, #4] - 8001baa: f7ff ff29 bl 8001a00 <__NVIC_SetPriorityGrouping> + 8001b14: 6878 ldr r0, [r7, #4] + 8001b16: f7ff ff29 bl 800196c <__NVIC_SetPriorityGrouping> } - 8001bae: bf00 nop - 8001bb0: 3708 adds r7, #8 - 8001bb2: 46bd mov sp, r7 - 8001bb4: bd80 pop {r7, pc} + 8001b1a: bf00 nop + 8001b1c: 3708 adds r7, #8 + 8001b1e: 46bd mov sp, r7 + 8001b20: bd80 pop {r7, pc} -08001bb6 : +08001b22 : * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8001bb6: b580 push {r7, lr} - 8001bb8: b086 sub sp, #24 - 8001bba: af00 add r7, sp, #0 - 8001bbc: 4603 mov r3, r0 - 8001bbe: 60b9 str r1, [r7, #8] - 8001bc0: 607a str r2, [r7, #4] - 8001bc2: 73fb strb r3, [r7, #15] + 8001b22: b580 push {r7, lr} + 8001b24: b086 sub sp, #24 + 8001b26: af00 add r7, sp, #0 + 8001b28: 4603 mov r3, r0 + 8001b2a: 60b9 str r1, [r7, #8] + 8001b2c: 607a str r2, [r7, #4] + 8001b2e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8001bc4: 2300 movs r3, #0 - 8001bc6: 617b str r3, [r7, #20] + 8001b30: 2300 movs r3, #0 + 8001b32: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8001bc8: f7ff ff3e bl 8001a48 <__NVIC_GetPriorityGrouping> - 8001bcc: 6178 str r0, [r7, #20] + 8001b34: f7ff ff3e bl 80019b4 <__NVIC_GetPriorityGrouping> + 8001b38: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8001bce: 687a ldr r2, [r7, #4] - 8001bd0: 68b9 ldr r1, [r7, #8] - 8001bd2: 6978 ldr r0, [r7, #20] - 8001bd4: f7ff ff8e bl 8001af4 - 8001bd8: 4602 mov r2, r0 - 8001bda: f997 300f ldrsb.w r3, [r7, #15] - 8001bde: 4611 mov r1, r2 - 8001be0: 4618 mov r0, r3 - 8001be2: f7ff ff5d bl 8001aa0 <__NVIC_SetPriority> + 8001b3a: 687a ldr r2, [r7, #4] + 8001b3c: 68b9 ldr r1, [r7, #8] + 8001b3e: 6978 ldr r0, [r7, #20] + 8001b40: f7ff ff8e bl 8001a60 + 8001b44: 4602 mov r2, r0 + 8001b46: f997 300f ldrsb.w r3, [r7, #15] + 8001b4a: 4611 mov r1, r2 + 8001b4c: 4618 mov r0, r3 + 8001b4e: f7ff ff5d bl 8001a0c <__NVIC_SetPriority> } - 8001be6: bf00 nop - 8001be8: 3718 adds r7, #24 - 8001bea: 46bd mov sp, r7 - 8001bec: bd80 pop {r7, pc} + 8001b52: bf00 nop + 8001b54: 3718 adds r7, #24 + 8001b56: 46bd mov sp, r7 + 8001b58: bd80 pop {r7, pc} -08001bee : +08001b5a : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8001bee: b580 push {r7, lr} - 8001bf0: b082 sub sp, #8 - 8001bf2: af00 add r7, sp, #0 - 8001bf4: 4603 mov r3, r0 - 8001bf6: 71fb strb r3, [r7, #7] + 8001b5a: b580 push {r7, lr} + 8001b5c: b082 sub sp, #8 + 8001b5e: af00 add r7, sp, #0 + 8001b60: 4603 mov r3, r0 + 8001b62: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8001bf8: f997 3007 ldrsb.w r3, [r7, #7] - 8001bfc: 4618 mov r0, r3 - 8001bfe: f7ff ff31 bl 8001a64 <__NVIC_EnableIRQ> + 8001b64: f997 3007 ldrsb.w r3, [r7, #7] + 8001b68: 4618 mov r0, r3 + 8001b6a: f7ff ff31 bl 80019d0 <__NVIC_EnableIRQ> } - 8001c02: bf00 nop - 8001c04: 3708 adds r7, #8 - 8001c06: 46bd mov sp, r7 - 8001c08: bd80 pop {r7, pc} + 8001b6e: bf00 nop + 8001b70: 3708 adds r7, #8 + 8001b72: 46bd mov sp, r7 + 8001b74: bd80 pop {r7, pc} -08001c0a : +08001b76 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8001c0a: b580 push {r7, lr} - 8001c0c: b082 sub sp, #8 - 8001c0e: af00 add r7, sp, #0 - 8001c10: 6078 str r0, [r7, #4] + 8001b76: b580 push {r7, lr} + 8001b78: b082 sub sp, #8 + 8001b7a: af00 add r7, sp, #0 + 8001b7c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8001c12: 6878 ldr r0, [r7, #4] - 8001c14: f7ff ffa2 bl 8001b5c - 8001c18: 4603 mov r3, r0 + 8001b7e: 6878 ldr r0, [r7, #4] + 8001b80: f7ff ffa2 bl 8001ac8 + 8001b84: 4603 mov r3, r0 } - 8001c1a: 4618 mov r0, r3 - 8001c1c: 3708 adds r7, #8 - 8001c1e: 46bd mov sp, r7 - 8001c20: bd80 pop {r7, pc} + 8001b86: 4618 mov r0, r3 + 8001b88: 3708 adds r7, #8 + 8001b8a: 46bd mov sp, r7 + 8001b8c: bd80 pop {r7, pc} ... -08001c24 : +08001b90 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8001c24: b480 push {r7} - 8001c26: b087 sub sp, #28 - 8001c28: af00 add r7, sp, #0 - 8001c2a: 6078 str r0, [r7, #4] - 8001c2c: 6039 str r1, [r7, #0] + 8001b90: b480 push {r7} + 8001b92: b087 sub sp, #28 + 8001b94: af00 add r7, sp, #0 + 8001b96: 6078 str r0, [r7, #4] + 8001b98: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 8001c2e: 2300 movs r3, #0 - 8001c30: 617b str r3, [r7, #20] + 8001b9a: 2300 movs r3, #0 + 8001b9c: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 8001c32: e154 b.n 8001ede + 8001b9e: e154 b.n 8001e4a { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); - 8001c34: 683b ldr r3, [r7, #0] - 8001c36: 681a ldr r2, [r3, #0] - 8001c38: 2101 movs r1, #1 - 8001c3a: 697b ldr r3, [r7, #20] - 8001c3c: fa01 f303 lsl.w r3, r1, r3 - 8001c40: 4013 ands r3, r2 - 8001c42: 60fb str r3, [r7, #12] + 8001ba0: 683b ldr r3, [r7, #0] + 8001ba2: 681a ldr r2, [r3, #0] + 8001ba4: 2101 movs r1, #1 + 8001ba6: 697b ldr r3, [r7, #20] + 8001ba8: fa01 f303 lsl.w r3, r1, r3 + 8001bac: 4013 ands r3, r2 + 8001bae: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) - 8001c44: 68fb ldr r3, [r7, #12] - 8001c46: 2b00 cmp r3, #0 - 8001c48: f000 8146 beq.w 8001ed8 + 8001bb0: 68fb ldr r3, [r7, #12] + 8001bb2: 2b00 cmp r3, #0 + 8001bb4: f000 8146 beq.w 8001e44 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8001c4c: 683b ldr r3, [r7, #0] - 8001c4e: 685b ldr r3, [r3, #4] - 8001c50: f003 0303 and.w r3, r3, #3 - 8001c54: 2b01 cmp r3, #1 - 8001c56: d005 beq.n 8001c64 - 8001c58: 683b ldr r3, [r7, #0] - 8001c5a: 685b ldr r3, [r3, #4] - 8001c5c: f003 0303 and.w r3, r3, #3 - 8001c60: 2b02 cmp r3, #2 - 8001c62: d130 bne.n 8001cc6 + 8001bb8: 683b ldr r3, [r7, #0] + 8001bba: 685b ldr r3, [r3, #4] + 8001bbc: f003 0303 and.w r3, r3, #3 + 8001bc0: 2b01 cmp r3, #1 + 8001bc2: d005 beq.n 8001bd0 + 8001bc4: 683b ldr r3, [r7, #0] + 8001bc6: 685b ldr r3, [r3, #4] + 8001bc8: f003 0303 and.w r3, r3, #3 + 8001bcc: 2b02 cmp r3, #2 + 8001bce: d130 bne.n 8001c32 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8001c64: 687b ldr r3, [r7, #4] - 8001c66: 689b ldr r3, [r3, #8] - 8001c68: 613b str r3, [r7, #16] + 8001bd0: 687b ldr r3, [r7, #4] + 8001bd2: 689b ldr r3, [r3, #8] + 8001bd4: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); - 8001c6a: 697b ldr r3, [r7, #20] - 8001c6c: 005b lsls r3, r3, #1 - 8001c6e: 2203 movs r2, #3 - 8001c70: fa02 f303 lsl.w r3, r2, r3 - 8001c74: 43db mvns r3, r3 - 8001c76: 693a ldr r2, [r7, #16] - 8001c78: 4013 ands r3, r2 - 8001c7a: 613b str r3, [r7, #16] + 8001bd6: 697b ldr r3, [r7, #20] + 8001bd8: 005b lsls r3, r3, #1 + 8001bda: 2203 movs r2, #3 + 8001bdc: fa02 f303 lsl.w r3, r2, r3 + 8001be0: 43db mvns r3, r3 + 8001be2: 693a ldr r2, [r7, #16] + 8001be4: 4013 ands r3, r2 + 8001be6: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); - 8001c7c: 683b ldr r3, [r7, #0] - 8001c7e: 68da ldr r2, [r3, #12] - 8001c80: 697b ldr r3, [r7, #20] - 8001c82: 005b lsls r3, r3, #1 - 8001c84: fa02 f303 lsl.w r3, r2, r3 - 8001c88: 693a ldr r2, [r7, #16] - 8001c8a: 4313 orrs r3, r2 - 8001c8c: 613b str r3, [r7, #16] + 8001be8: 683b ldr r3, [r7, #0] + 8001bea: 68da ldr r2, [r3, #12] + 8001bec: 697b ldr r3, [r7, #20] + 8001bee: 005b lsls r3, r3, #1 + 8001bf0: fa02 f303 lsl.w r3, r2, r3 + 8001bf4: 693a ldr r2, [r7, #16] + 8001bf6: 4313 orrs r3, r2 + 8001bf8: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 8001c8e: 687b ldr r3, [r7, #4] - 8001c90: 693a ldr r2, [r7, #16] - 8001c92: 609a str r2, [r3, #8] + 8001bfa: 687b ldr r3, [r7, #4] + 8001bfc: 693a ldr r2, [r7, #16] + 8001bfe: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8001c94: 687b ldr r3, [r7, #4] - 8001c96: 685b ldr r3, [r3, #4] - 8001c98: 613b str r3, [r7, #16] + 8001c00: 687b ldr r3, [r7, #4] + 8001c02: 685b ldr r3, [r3, #4] + 8001c04: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8001c9a: 2201 movs r2, #1 - 8001c9c: 697b ldr r3, [r7, #20] - 8001c9e: fa02 f303 lsl.w r3, r2, r3 - 8001ca2: 43db mvns r3, r3 - 8001ca4: 693a ldr r2, [r7, #16] - 8001ca6: 4013 ands r3, r2 - 8001ca8: 613b str r3, [r7, #16] + 8001c06: 2201 movs r2, #1 + 8001c08: 697b ldr r3, [r7, #20] + 8001c0a: fa02 f303 lsl.w r3, r2, r3 + 8001c0e: 43db mvns r3, r3 + 8001c10: 693a ldr r2, [r7, #16] + 8001c12: 4013 ands r3, r2 + 8001c14: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8001caa: 683b ldr r3, [r7, #0] - 8001cac: 685b ldr r3, [r3, #4] - 8001cae: 091b lsrs r3, r3, #4 - 8001cb0: f003 0201 and.w r2, r3, #1 - 8001cb4: 697b ldr r3, [r7, #20] - 8001cb6: fa02 f303 lsl.w r3, r2, r3 - 8001cba: 693a ldr r2, [r7, #16] - 8001cbc: 4313 orrs r3, r2 - 8001cbe: 613b str r3, [r7, #16] + 8001c16: 683b ldr r3, [r7, #0] + 8001c18: 685b ldr r3, [r3, #4] + 8001c1a: 091b lsrs r3, r3, #4 + 8001c1c: f003 0201 and.w r2, r3, #1 + 8001c20: 697b ldr r3, [r7, #20] + 8001c22: fa02 f303 lsl.w r3, r2, r3 + 8001c26: 693a ldr r2, [r7, #16] + 8001c28: 4313 orrs r3, r2 + 8001c2a: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 8001cc0: 687b ldr r3, [r7, #4] - 8001cc2: 693a ldr r2, [r7, #16] - 8001cc4: 605a str r2, [r3, #4] + 8001c2c: 687b ldr r3, [r7, #4] + 8001c2e: 693a ldr r2, [r7, #16] + 8001c30: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8001cc6: 683b ldr r3, [r7, #0] - 8001cc8: 685b ldr r3, [r3, #4] - 8001cca: f003 0303 and.w r3, r3, #3 - 8001cce: 2b03 cmp r3, #3 - 8001cd0: d017 beq.n 8001d02 + 8001c32: 683b ldr r3, [r7, #0] + 8001c34: 685b ldr r3, [r3, #4] + 8001c36: f003 0303 and.w r3, r3, #3 + 8001c3a: 2b03 cmp r3, #3 + 8001c3c: d017 beq.n 8001c6e { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8001cd2: 687b ldr r3, [r7, #4] - 8001cd4: 68db ldr r3, [r3, #12] - 8001cd6: 613b str r3, [r7, #16] + 8001c3e: 687b ldr r3, [r7, #4] + 8001c40: 68db ldr r3, [r3, #12] + 8001c42: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); - 8001cd8: 697b ldr r3, [r7, #20] - 8001cda: 005b lsls r3, r3, #1 - 8001cdc: 2203 movs r2, #3 - 8001cde: fa02 f303 lsl.w r3, r2, r3 - 8001ce2: 43db mvns r3, r3 - 8001ce4: 693a ldr r2, [r7, #16] - 8001ce6: 4013 ands r3, r2 - 8001ce8: 613b str r3, [r7, #16] + 8001c44: 697b ldr r3, [r7, #20] + 8001c46: 005b lsls r3, r3, #1 + 8001c48: 2203 movs r2, #3 + 8001c4a: fa02 f303 lsl.w r3, r2, r3 + 8001c4e: 43db mvns r3, r3 + 8001c50: 693a ldr r2, [r7, #16] + 8001c52: 4013 ands r3, r2 + 8001c54: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2u)); - 8001cea: 683b ldr r3, [r7, #0] - 8001cec: 689a ldr r2, [r3, #8] - 8001cee: 697b ldr r3, [r7, #20] - 8001cf0: 005b lsls r3, r3, #1 - 8001cf2: fa02 f303 lsl.w r3, r2, r3 - 8001cf6: 693a ldr r2, [r7, #16] - 8001cf8: 4313 orrs r3, r2 - 8001cfa: 613b str r3, [r7, #16] + 8001c56: 683b ldr r3, [r7, #0] + 8001c58: 689a ldr r2, [r3, #8] + 8001c5a: 697b ldr r3, [r7, #20] + 8001c5c: 005b lsls r3, r3, #1 + 8001c5e: fa02 f303 lsl.w r3, r2, r3 + 8001c62: 693a ldr r2, [r7, #16] + 8001c64: 4313 orrs r3, r2 + 8001c66: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 8001cfc: 687b ldr r3, [r7, #4] - 8001cfe: 693a ldr r2, [r7, #16] - 8001d00: 60da str r2, [r3, #12] + 8001c68: 687b ldr r3, [r7, #4] + 8001c6a: 693a ldr r2, [r7, #16] + 8001c6c: 60da str r2, [r3, #12] } /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8001d02: 683b ldr r3, [r7, #0] - 8001d04: 685b ldr r3, [r3, #4] - 8001d06: f003 0303 and.w r3, r3, #3 - 8001d0a: 2b02 cmp r3, #2 - 8001d0c: d123 bne.n 8001d56 + 8001c6e: 683b ldr r3, [r7, #0] + 8001c70: 685b ldr r3, [r3, #4] + 8001c72: f003 0303 and.w r3, r3, #3 + 8001c76: 2b02 cmp r3, #2 + 8001c78: d123 bne.n 8001cc2 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; - 8001d0e: 697b ldr r3, [r7, #20] - 8001d10: 08da lsrs r2, r3, #3 - 8001d12: 687b ldr r3, [r7, #4] - 8001d14: 3208 adds r2, #8 - 8001d16: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8001d1a: 613b str r3, [r7, #16] + 8001c7a: 697b ldr r3, [r7, #20] + 8001c7c: 08da lsrs r2, r3, #3 + 8001c7e: 687b ldr r3, [r7, #4] + 8001c80: 3208 adds r2, #8 + 8001c82: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8001c86: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); - 8001d1c: 697b ldr r3, [r7, #20] - 8001d1e: f003 0307 and.w r3, r3, #7 - 8001d22: 009b lsls r3, r3, #2 - 8001d24: 220f movs r2, #15 - 8001d26: fa02 f303 lsl.w r3, r2, r3 - 8001d2a: 43db mvns r3, r3 - 8001d2c: 693a ldr r2, [r7, #16] - 8001d2e: 4013 ands r3, r2 - 8001d30: 613b str r3, [r7, #16] + 8001c88: 697b ldr r3, [r7, #20] + 8001c8a: f003 0307 and.w r3, r3, #7 + 8001c8e: 009b lsls r3, r3, #2 + 8001c90: 220f movs r2, #15 + 8001c92: fa02 f303 lsl.w r3, r2, r3 + 8001c96: 43db mvns r3, r3 + 8001c98: 693a ldr r2, [r7, #16] + 8001c9a: 4013 ands r3, r2 + 8001c9c: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - 8001d32: 683b ldr r3, [r7, #0] - 8001d34: 691a ldr r2, [r3, #16] - 8001d36: 697b ldr r3, [r7, #20] - 8001d38: f003 0307 and.w r3, r3, #7 - 8001d3c: 009b lsls r3, r3, #2 - 8001d3e: fa02 f303 lsl.w r3, r2, r3 - 8001d42: 693a ldr r2, [r7, #16] - 8001d44: 4313 orrs r3, r2 - 8001d46: 613b str r3, [r7, #16] + 8001c9e: 683b ldr r3, [r7, #0] + 8001ca0: 691a ldr r2, [r3, #16] + 8001ca2: 697b ldr r3, [r7, #20] + 8001ca4: f003 0307 and.w r3, r3, #7 + 8001ca8: 009b lsls r3, r3, #2 + 8001caa: fa02 f303 lsl.w r3, r2, r3 + 8001cae: 693a ldr r2, [r7, #16] + 8001cb0: 4313 orrs r3, r2 + 8001cb2: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; - 8001d48: 697b ldr r3, [r7, #20] - 8001d4a: 08da lsrs r2, r3, #3 - 8001d4c: 687b ldr r3, [r7, #4] - 8001d4e: 3208 adds r2, #8 - 8001d50: 6939 ldr r1, [r7, #16] - 8001d52: f843 1022 str.w r1, [r3, r2, lsl #2] + 8001cb4: 697b ldr r3, [r7, #20] + 8001cb6: 08da lsrs r2, r3, #3 + 8001cb8: 687b ldr r3, [r7, #4] + 8001cba: 3208 adds r2, #8 + 8001cbc: 6939 ldr r1, [r7, #16] + 8001cbe: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8001d56: 687b ldr r3, [r7, #4] - 8001d58: 681b ldr r3, [r3, #0] - 8001d5a: 613b str r3, [r7, #16] + 8001cc2: 687b ldr r3, [r7, #4] + 8001cc4: 681b ldr r3, [r3, #0] + 8001cc6: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); - 8001d5c: 697b ldr r3, [r7, #20] - 8001d5e: 005b lsls r3, r3, #1 - 8001d60: 2203 movs r2, #3 - 8001d62: fa02 f303 lsl.w r3, r2, r3 - 8001d66: 43db mvns r3, r3 - 8001d68: 693a ldr r2, [r7, #16] - 8001d6a: 4013 ands r3, r2 - 8001d6c: 613b str r3, [r7, #16] + 8001cc8: 697b ldr r3, [r7, #20] + 8001cca: 005b lsls r3, r3, #1 + 8001ccc: 2203 movs r2, #3 + 8001cce: fa02 f303 lsl.w r3, r2, r3 + 8001cd2: 43db mvns r3, r3 + 8001cd4: 693a ldr r2, [r7, #16] + 8001cd6: 4013 ands r3, r2 + 8001cd8: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - 8001d6e: 683b ldr r3, [r7, #0] - 8001d70: 685b ldr r3, [r3, #4] - 8001d72: f003 0203 and.w r2, r3, #3 - 8001d76: 697b ldr r3, [r7, #20] - 8001d78: 005b lsls r3, r3, #1 - 8001d7a: fa02 f303 lsl.w r3, r2, r3 - 8001d7e: 693a ldr r2, [r7, #16] - 8001d80: 4313 orrs r3, r2 - 8001d82: 613b str r3, [r7, #16] + 8001cda: 683b ldr r3, [r7, #0] + 8001cdc: 685b ldr r3, [r3, #4] + 8001cde: f003 0203 and.w r2, r3, #3 + 8001ce2: 697b ldr r3, [r7, #20] + 8001ce4: 005b lsls r3, r3, #1 + 8001ce6: fa02 f303 lsl.w r3, r2, r3 + 8001cea: 693a ldr r2, [r7, #16] + 8001cec: 4313 orrs r3, r2 + 8001cee: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8001d84: 687b ldr r3, [r7, #4] - 8001d86: 693a ldr r2, [r7, #16] - 8001d88: 601a str r2, [r3, #0] + 8001cf0: 687b ldr r3, [r7, #4] + 8001cf2: 693a ldr r2, [r7, #16] + 8001cf4: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) - 8001d8a: 683b ldr r3, [r7, #0] - 8001d8c: 685b ldr r3, [r3, #4] - 8001d8e: f403 3340 and.w r3, r3, #196608 @ 0x30000 - 8001d92: 2b00 cmp r3, #0 - 8001d94: f000 80a0 beq.w 8001ed8 + 8001cf6: 683b ldr r3, [r7, #0] + 8001cf8: 685b ldr r3, [r3, #4] + 8001cfa: f403 3340 and.w r3, r3, #196608 @ 0x30000 + 8001cfe: 2b00 cmp r3, #0 + 8001d00: f000 80a0 beq.w 8001e44 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8001d98: 4b58 ldr r3, [pc, #352] @ (8001efc ) - 8001d9a: 699b ldr r3, [r3, #24] - 8001d9c: 4a57 ldr r2, [pc, #348] @ (8001efc ) - 8001d9e: f043 0301 orr.w r3, r3, #1 - 8001da2: 6193 str r3, [r2, #24] - 8001da4: 4b55 ldr r3, [pc, #340] @ (8001efc ) - 8001da6: 699b ldr r3, [r3, #24] - 8001da8: f003 0301 and.w r3, r3, #1 - 8001dac: 60bb str r3, [r7, #8] - 8001dae: 68bb ldr r3, [r7, #8] + 8001d04: 4b58 ldr r3, [pc, #352] @ (8001e68 ) + 8001d06: 699b ldr r3, [r3, #24] + 8001d08: 4a57 ldr r2, [pc, #348] @ (8001e68 ) + 8001d0a: f043 0301 orr.w r3, r3, #1 + 8001d0e: 6193 str r3, [r2, #24] + 8001d10: 4b55 ldr r3, [pc, #340] @ (8001e68 ) + 8001d12: 699b ldr r3, [r3, #24] + 8001d14: f003 0301 and.w r3, r3, #1 + 8001d18: 60bb str r3, [r7, #8] + 8001d1a: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; - 8001db0: 4a53 ldr r2, [pc, #332] @ (8001f00 ) - 8001db2: 697b ldr r3, [r7, #20] - 8001db4: 089b lsrs r3, r3, #2 - 8001db6: 3302 adds r3, #2 - 8001db8: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8001dbc: 613b str r3, [r7, #16] + 8001d1c: 4a53 ldr r2, [pc, #332] @ (8001e6c ) + 8001d1e: 697b ldr r3, [r7, #20] + 8001d20: 089b lsrs r3, r3, #2 + 8001d22: 3302 adds r3, #2 + 8001d24: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8001d28: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); - 8001dbe: 697b ldr r3, [r7, #20] - 8001dc0: f003 0303 and.w r3, r3, #3 - 8001dc4: 009b lsls r3, r3, #2 - 8001dc6: 220f movs r2, #15 - 8001dc8: fa02 f303 lsl.w r3, r2, r3 - 8001dcc: 43db mvns r3, r3 - 8001dce: 693a ldr r2, [r7, #16] - 8001dd0: 4013 ands r3, r2 - 8001dd2: 613b str r3, [r7, #16] + 8001d2a: 697b ldr r3, [r7, #20] + 8001d2c: f003 0303 and.w r3, r3, #3 + 8001d30: 009b lsls r3, r3, #2 + 8001d32: 220f movs r2, #15 + 8001d34: fa02 f303 lsl.w r3, r2, r3 + 8001d38: 43db mvns r3, r3 + 8001d3a: 693a ldr r2, [r7, #16] + 8001d3c: 4013 ands r3, r2 + 8001d3e: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); - 8001dd4: 687b ldr r3, [r7, #4] - 8001dd6: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000 - 8001dda: d019 beq.n 8001e10 - 8001ddc: 687b ldr r3, [r7, #4] - 8001dde: 4a49 ldr r2, [pc, #292] @ (8001f04 ) - 8001de0: 4293 cmp r3, r2 - 8001de2: d013 beq.n 8001e0c - 8001de4: 687b ldr r3, [r7, #4] - 8001de6: 4a48 ldr r2, [pc, #288] @ (8001f08 ) - 8001de8: 4293 cmp r3, r2 - 8001dea: d00d beq.n 8001e08 - 8001dec: 687b ldr r3, [r7, #4] - 8001dee: 4a47 ldr r2, [pc, #284] @ (8001f0c ) - 8001df0: 4293 cmp r3, r2 - 8001df2: d007 beq.n 8001e04 - 8001df4: 687b ldr r3, [r7, #4] - 8001df6: 4a46 ldr r2, [pc, #280] @ (8001f10 ) - 8001df8: 4293 cmp r3, r2 - 8001dfa: d101 bne.n 8001e00 - 8001dfc: 2304 movs r3, #4 - 8001dfe: e008 b.n 8001e12 - 8001e00: 2305 movs r3, #5 - 8001e02: e006 b.n 8001e12 - 8001e04: 2303 movs r3, #3 - 8001e06: e004 b.n 8001e12 - 8001e08: 2302 movs r3, #2 - 8001e0a: e002 b.n 8001e12 - 8001e0c: 2301 movs r3, #1 - 8001e0e: e000 b.n 8001e12 - 8001e10: 2300 movs r3, #0 - 8001e12: 697a ldr r2, [r7, #20] - 8001e14: f002 0203 and.w r2, r2, #3 - 8001e18: 0092 lsls r2, r2, #2 - 8001e1a: 4093 lsls r3, r2 - 8001e1c: 693a ldr r2, [r7, #16] - 8001e1e: 4313 orrs r3, r2 - 8001e20: 613b str r3, [r7, #16] + 8001d40: 687b ldr r3, [r7, #4] + 8001d42: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000 + 8001d46: d019 beq.n 8001d7c + 8001d48: 687b ldr r3, [r7, #4] + 8001d4a: 4a49 ldr r2, [pc, #292] @ (8001e70 ) + 8001d4c: 4293 cmp r3, r2 + 8001d4e: d013 beq.n 8001d78 + 8001d50: 687b ldr r3, [r7, #4] + 8001d52: 4a48 ldr r2, [pc, #288] @ (8001e74 ) + 8001d54: 4293 cmp r3, r2 + 8001d56: d00d beq.n 8001d74 + 8001d58: 687b ldr r3, [r7, #4] + 8001d5a: 4a47 ldr r2, [pc, #284] @ (8001e78 ) + 8001d5c: 4293 cmp r3, r2 + 8001d5e: d007 beq.n 8001d70 + 8001d60: 687b ldr r3, [r7, #4] + 8001d62: 4a46 ldr r2, [pc, #280] @ (8001e7c ) + 8001d64: 4293 cmp r3, r2 + 8001d66: d101 bne.n 8001d6c + 8001d68: 2304 movs r3, #4 + 8001d6a: e008 b.n 8001d7e + 8001d6c: 2305 movs r3, #5 + 8001d6e: e006 b.n 8001d7e + 8001d70: 2303 movs r3, #3 + 8001d72: e004 b.n 8001d7e + 8001d74: 2302 movs r3, #2 + 8001d76: e002 b.n 8001d7e + 8001d78: 2301 movs r3, #1 + 8001d7a: e000 b.n 8001d7e + 8001d7c: 2300 movs r3, #0 + 8001d7e: 697a ldr r2, [r7, #20] + 8001d80: f002 0203 and.w r2, r2, #3 + 8001d84: 0092 lsls r2, r2, #2 + 8001d86: 4093 lsls r3, r2 + 8001d88: 693a ldr r2, [r7, #16] + 8001d8a: 4313 orrs r3, r2 + 8001d8c: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; - 8001e22: 4937 ldr r1, [pc, #220] @ (8001f00 ) - 8001e24: 697b ldr r3, [r7, #20] - 8001e26: 089b lsrs r3, r3, #2 - 8001e28: 3302 adds r3, #2 - 8001e2a: 693a ldr r2, [r7, #16] - 8001e2c: f841 2023 str.w r2, [r1, r3, lsl #2] + 8001d8e: 4937 ldr r1, [pc, #220] @ (8001e6c ) + 8001d90: 697b ldr r3, [r7, #20] + 8001d92: 089b lsrs r3, r3, #2 + 8001d94: 3302 adds r3, #2 + 8001d96: 693a ldr r2, [r7, #16] + 8001d98: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8001e30: 4b38 ldr r3, [pc, #224] @ (8001f14 ) - 8001e32: 689b ldr r3, [r3, #8] - 8001e34: 613b str r3, [r7, #16] + 8001d9c: 4b38 ldr r3, [pc, #224] @ (8001e80 ) + 8001d9e: 689b ldr r3, [r3, #8] + 8001da0: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001e36: 68fb ldr r3, [r7, #12] - 8001e38: 43db mvns r3, r3 - 8001e3a: 693a ldr r2, [r7, #16] - 8001e3c: 4013 ands r3, r2 - 8001e3e: 613b str r3, [r7, #16] + 8001da2: 68fb ldr r3, [r7, #12] + 8001da4: 43db mvns r3, r3 + 8001da6: 693a ldr r2, [r7, #16] + 8001da8: 4013 ands r3, r2 + 8001daa: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) - 8001e40: 683b ldr r3, [r7, #0] - 8001e42: 685b ldr r3, [r3, #4] - 8001e44: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 8001e48: 2b00 cmp r3, #0 - 8001e4a: d003 beq.n 8001e54 + 8001dac: 683b ldr r3, [r7, #0] + 8001dae: 685b ldr r3, [r3, #4] + 8001db0: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8001db4: 2b00 cmp r3, #0 + 8001db6: d003 beq.n 8001dc0 { temp |= iocurrent; - 8001e4c: 693a ldr r2, [r7, #16] - 8001e4e: 68fb ldr r3, [r7, #12] - 8001e50: 4313 orrs r3, r2 - 8001e52: 613b str r3, [r7, #16] + 8001db8: 693a ldr r2, [r7, #16] + 8001dba: 68fb ldr r3, [r7, #12] + 8001dbc: 4313 orrs r3, r2 + 8001dbe: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 8001e54: 4a2f ldr r2, [pc, #188] @ (8001f14 ) - 8001e56: 693b ldr r3, [r7, #16] - 8001e58: 6093 str r3, [r2, #8] + 8001dc0: 4a2f ldr r2, [pc, #188] @ (8001e80 ) + 8001dc2: 693b ldr r3, [r7, #16] + 8001dc4: 6093 str r3, [r2, #8] temp = EXTI->FTSR; - 8001e5a: 4b2e ldr r3, [pc, #184] @ (8001f14 ) - 8001e5c: 68db ldr r3, [r3, #12] - 8001e5e: 613b str r3, [r7, #16] + 8001dc6: 4b2e ldr r3, [pc, #184] @ (8001e80 ) + 8001dc8: 68db ldr r3, [r3, #12] + 8001dca: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001e60: 68fb ldr r3, [r7, #12] - 8001e62: 43db mvns r3, r3 - 8001e64: 693a ldr r2, [r7, #16] - 8001e66: 4013 ands r3, r2 - 8001e68: 613b str r3, [r7, #16] + 8001dcc: 68fb ldr r3, [r7, #12] + 8001dce: 43db mvns r3, r3 + 8001dd0: 693a ldr r2, [r7, #16] + 8001dd2: 4013 ands r3, r2 + 8001dd4: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) - 8001e6a: 683b ldr r3, [r7, #0] - 8001e6c: 685b ldr r3, [r3, #4] - 8001e6e: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8001e72: 2b00 cmp r3, #0 - 8001e74: d003 beq.n 8001e7e + 8001dd6: 683b ldr r3, [r7, #0] + 8001dd8: 685b ldr r3, [r3, #4] + 8001dda: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8001dde: 2b00 cmp r3, #0 + 8001de0: d003 beq.n 8001dea { temp |= iocurrent; - 8001e76: 693a ldr r2, [r7, #16] - 8001e78: 68fb ldr r3, [r7, #12] - 8001e7a: 4313 orrs r3, r2 - 8001e7c: 613b str r3, [r7, #16] + 8001de2: 693a ldr r2, [r7, #16] + 8001de4: 68fb ldr r3, [r7, #12] + 8001de6: 4313 orrs r3, r2 + 8001de8: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 8001e7e: 4a25 ldr r2, [pc, #148] @ (8001f14 ) - 8001e80: 693b ldr r3, [r7, #16] - 8001e82: 60d3 str r3, [r2, #12] + 8001dea: 4a25 ldr r2, [pc, #148] @ (8001e80 ) + 8001dec: 693b ldr r3, [r7, #16] + 8001dee: 60d3 str r3, [r2, #12] temp = EXTI->EMR; - 8001e84: 4b23 ldr r3, [pc, #140] @ (8001f14 ) - 8001e86: 685b ldr r3, [r3, #4] - 8001e88: 613b str r3, [r7, #16] + 8001df0: 4b23 ldr r3, [pc, #140] @ (8001e80 ) + 8001df2: 685b ldr r3, [r3, #4] + 8001df4: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001e8a: 68fb ldr r3, [r7, #12] - 8001e8c: 43db mvns r3, r3 - 8001e8e: 693a ldr r2, [r7, #16] - 8001e90: 4013 ands r3, r2 - 8001e92: 613b str r3, [r7, #16] + 8001df6: 68fb ldr r3, [r7, #12] + 8001df8: 43db mvns r3, r3 + 8001dfa: 693a ldr r2, [r7, #16] + 8001dfc: 4013 ands r3, r2 + 8001dfe: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) - 8001e94: 683b ldr r3, [r7, #0] - 8001e96: 685b ldr r3, [r3, #4] - 8001e98: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8001e9c: 2b00 cmp r3, #0 - 8001e9e: d003 beq.n 8001ea8 + 8001e00: 683b ldr r3, [r7, #0] + 8001e02: 685b ldr r3, [r3, #4] + 8001e04: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8001e08: 2b00 cmp r3, #0 + 8001e0a: d003 beq.n 8001e14 { temp |= iocurrent; - 8001ea0: 693a ldr r2, [r7, #16] - 8001ea2: 68fb ldr r3, [r7, #12] - 8001ea4: 4313 orrs r3, r2 - 8001ea6: 613b str r3, [r7, #16] + 8001e0c: 693a ldr r2, [r7, #16] + 8001e0e: 68fb ldr r3, [r7, #12] + 8001e10: 4313 orrs r3, r2 + 8001e12: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 8001ea8: 4a1a ldr r2, [pc, #104] @ (8001f14 ) - 8001eaa: 693b ldr r3, [r7, #16] - 8001eac: 6053 str r3, [r2, #4] + 8001e14: 4a1a ldr r2, [pc, #104] @ (8001e80 ) + 8001e16: 693b ldr r3, [r7, #16] + 8001e18: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8001eae: 4b19 ldr r3, [pc, #100] @ (8001f14 ) - 8001eb0: 681b ldr r3, [r3, #0] - 8001eb2: 613b str r3, [r7, #16] + 8001e1a: 4b19 ldr r3, [pc, #100] @ (8001e80 ) + 8001e1c: 681b ldr r3, [r3, #0] + 8001e1e: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001eb4: 68fb ldr r3, [r7, #12] - 8001eb6: 43db mvns r3, r3 - 8001eb8: 693a ldr r2, [r7, #16] - 8001eba: 4013 ands r3, r2 - 8001ebc: 613b str r3, [r7, #16] + 8001e20: 68fb ldr r3, [r7, #12] + 8001e22: 43db mvns r3, r3 + 8001e24: 693a ldr r2, [r7, #16] + 8001e26: 4013 ands r3, r2 + 8001e28: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_IT) != 0x00u) - 8001ebe: 683b ldr r3, [r7, #0] - 8001ec0: 685b ldr r3, [r3, #4] - 8001ec2: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8001ec6: 2b00 cmp r3, #0 - 8001ec8: d003 beq.n 8001ed2 + 8001e2a: 683b ldr r3, [r7, #0] + 8001e2c: 685b ldr r3, [r3, #4] + 8001e2e: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8001e32: 2b00 cmp r3, #0 + 8001e34: d003 beq.n 8001e3e { temp |= iocurrent; - 8001eca: 693a ldr r2, [r7, #16] - 8001ecc: 68fb ldr r3, [r7, #12] - 8001ece: 4313 orrs r3, r2 - 8001ed0: 613b str r3, [r7, #16] + 8001e36: 693a ldr r2, [r7, #16] + 8001e38: 68fb ldr r3, [r7, #12] + 8001e3a: 4313 orrs r3, r2 + 8001e3c: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 8001ed2: 4a10 ldr r2, [pc, #64] @ (8001f14 ) - 8001ed4: 693b ldr r3, [r7, #16] - 8001ed6: 6013 str r3, [r2, #0] + 8001e3e: 4a10 ldr r2, [pc, #64] @ (8001e80 ) + 8001e40: 693b ldr r3, [r7, #16] + 8001e42: 6013 str r3, [r2, #0] } } position++; - 8001ed8: 697b ldr r3, [r7, #20] - 8001eda: 3301 adds r3, #1 - 8001edc: 617b str r3, [r7, #20] + 8001e44: 697b ldr r3, [r7, #20] + 8001e46: 3301 adds r3, #1 + 8001e48: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) - 8001ede: 683b ldr r3, [r7, #0] - 8001ee0: 681a ldr r2, [r3, #0] - 8001ee2: 697b ldr r3, [r7, #20] - 8001ee4: fa22 f303 lsr.w r3, r2, r3 - 8001ee8: 2b00 cmp r3, #0 - 8001eea: f47f aea3 bne.w 8001c34 + 8001e4a: 683b ldr r3, [r7, #0] + 8001e4c: 681a ldr r2, [r3, #0] + 8001e4e: 697b ldr r3, [r7, #20] + 8001e50: fa22 f303 lsr.w r3, r2, r3 + 8001e54: 2b00 cmp r3, #0 + 8001e56: f47f aea3 bne.w 8001ba0 } } - 8001eee: bf00 nop - 8001ef0: bf00 nop - 8001ef2: 371c adds r7, #28 - 8001ef4: 46bd mov sp, r7 - 8001ef6: f85d 7b04 ldr.w r7, [sp], #4 - 8001efa: 4770 bx lr - 8001efc: 40021000 .word 0x40021000 - 8001f00: 40010000 .word 0x40010000 - 8001f04: 48000400 .word 0x48000400 - 8001f08: 48000800 .word 0x48000800 - 8001f0c: 48000c00 .word 0x48000c00 - 8001f10: 48001000 .word 0x48001000 - 8001f14: 40010400 .word 0x40010400 + 8001e5a: bf00 nop + 8001e5c: bf00 nop + 8001e5e: 371c adds r7, #28 + 8001e60: 46bd mov sp, r7 + 8001e62: f85d 7b04 ldr.w r7, [sp], #4 + 8001e66: 4770 bx lr + 8001e68: 40021000 .word 0x40021000 + 8001e6c: 40010000 .word 0x40010000 + 8001e70: 48000400 .word 0x48000400 + 8001e74: 48000800 .word 0x48000800 + 8001e78: 48000c00 .word 0x48000c00 + 8001e7c: 48001000 .word 0x48001000 + 8001e80: 40010400 .word 0x40010400 -08001f18 : +08001e84 : * @param GPIO_Pin specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { - 8001f18: b480 push {r7} - 8001f1a: b085 sub sp, #20 - 8001f1c: af00 add r7, sp, #0 - 8001f1e: 6078 str r0, [r7, #4] - 8001f20: 460b mov r3, r1 - 8001f22: 807b strh r3, [r7, #2] + 8001e84: b480 push {r7} + 8001e86: b085 sub sp, #20 + 8001e88: af00 add r7, sp, #0 + 8001e8a: 6078 str r0, [r7, #4] + 8001e8c: 460b mov r3, r1 + 8001e8e: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8001f24: 687b ldr r3, [r7, #4] - 8001f26: 691a ldr r2, [r3, #16] - 8001f28: 887b ldrh r3, [r7, #2] - 8001f2a: 4013 ands r3, r2 - 8001f2c: 2b00 cmp r3, #0 - 8001f2e: d002 beq.n 8001f36 + 8001e90: 687b ldr r3, [r7, #4] + 8001e92: 691a ldr r2, [r3, #16] + 8001e94: 887b ldrh r3, [r7, #2] + 8001e96: 4013 ands r3, r2 + 8001e98: 2b00 cmp r3, #0 + 8001e9a: d002 beq.n 8001ea2 { bitstatus = GPIO_PIN_SET; - 8001f30: 2301 movs r3, #1 - 8001f32: 73fb strb r3, [r7, #15] - 8001f34: e001 b.n 8001f3a + 8001e9c: 2301 movs r3, #1 + 8001e9e: 73fb strb r3, [r7, #15] + 8001ea0: e001 b.n 8001ea6 } else { bitstatus = GPIO_PIN_RESET; - 8001f36: 2300 movs r3, #0 - 8001f38: 73fb strb r3, [r7, #15] + 8001ea2: 2300 movs r3, #0 + 8001ea4: 73fb strb r3, [r7, #15] } return bitstatus; - 8001f3a: 7bfb ldrb r3, [r7, #15] + 8001ea6: 7bfb ldrb r3, [r7, #15] } - 8001f3c: 4618 mov r0, r3 - 8001f3e: 3714 adds r7, #20 - 8001f40: 46bd mov sp, r7 - 8001f42: f85d 7b04 ldr.w r7, [sp], #4 - 8001f46: 4770 bx lr + 8001ea8: 4618 mov r0, r3 + 8001eaa: 3714 adds r7, #20 + 8001eac: 46bd mov sp, r7 + 8001eae: f85d 7b04 ldr.w r7, [sp], #4 + 8001eb2: 4770 bx lr -08001f48 : +08001eb4 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8001f48: b480 push {r7} - 8001f4a: b083 sub sp, #12 - 8001f4c: af00 add r7, sp, #0 - 8001f4e: 6078 str r0, [r7, #4] - 8001f50: 460b mov r3, r1 - 8001f52: 807b strh r3, [r7, #2] - 8001f54: 4613 mov r3, r2 - 8001f56: 707b strb r3, [r7, #1] + 8001eb4: b480 push {r7} + 8001eb6: b083 sub sp, #12 + 8001eb8: af00 add r7, sp, #0 + 8001eba: 6078 str r0, [r7, #4] + 8001ebc: 460b mov r3, r1 + 8001ebe: 807b strh r3, [r7, #2] + 8001ec0: 4613 mov r3, r2 + 8001ec2: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) - 8001f58: 787b ldrb r3, [r7, #1] - 8001f5a: 2b00 cmp r3, #0 - 8001f5c: d003 beq.n 8001f66 + 8001ec4: 787b ldrb r3, [r7, #1] + 8001ec6: 2b00 cmp r3, #0 + 8001ec8: d003 beq.n 8001ed2 { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 8001f5e: 887a ldrh r2, [r7, #2] - 8001f60: 687b ldr r3, [r7, #4] - 8001f62: 619a str r2, [r3, #24] + 8001eca: 887a ldrh r2, [r7, #2] + 8001ecc: 687b ldr r3, [r7, #4] + 8001ece: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } - 8001f64: e002 b.n 8001f6c + 8001ed0: e002 b.n 8001ed8 GPIOx->BRR = (uint32_t)GPIO_Pin; - 8001f66: 887a ldrh r2, [r7, #2] - 8001f68: 687b ldr r3, [r7, #4] - 8001f6a: 629a str r2, [r3, #40] @ 0x28 + 8001ed2: 887a ldrh r2, [r7, #2] + 8001ed4: 687b ldr r3, [r7, #4] + 8001ed6: 629a str r2, [r3, #40] @ 0x28 } - 8001f6c: bf00 nop - 8001f6e: 370c adds r7, #12 - 8001f70: 46bd mov sp, r7 - 8001f72: f85d 7b04 ldr.w r7, [sp], #4 - 8001f76: 4770 bx lr + 8001ed8: bf00 nop + 8001eda: 370c adds r7, #12 + 8001edc: 46bd mov sp, r7 + 8001ede: f85d 7b04 ldr.w r7, [sp], #4 + 8001ee2: 4770 bx lr -08001f78 : +08001ee4 : + * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + * @param GPIO_Pin specifies the pin to be toggled. + * @retval None + */ +void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + 8001ee4: b480 push {r7} + 8001ee6: b085 sub sp, #20 + 8001ee8: af00 add r7, sp, #0 + 8001eea: 6078 str r0, [r7, #4] + 8001eec: 460b mov r3, r1 + 8001eee: 807b strh r3, [r7, #2] + + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + /* get current Output Data Register value */ + odr = GPIOx->ODR; + 8001ef0: 687b ldr r3, [r7, #4] + 8001ef2: 695b ldr r3, [r3, #20] + 8001ef4: 60fb str r3, [r7, #12] + + /* Set selected pins that were at low level, and reset ones that were high */ + GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 8001ef6: 887a ldrh r2, [r7, #2] + 8001ef8: 68fb ldr r3, [r7, #12] + 8001efa: 4013 ands r3, r2 + 8001efc: 041a lsls r2, r3, #16 + 8001efe: 68fb ldr r3, [r7, #12] + 8001f00: 43d9 mvns r1, r3 + 8001f02: 887b ldrh r3, [r7, #2] + 8001f04: 400b ands r3, r1 + 8001f06: 431a orrs r2, r3 + 8001f08: 687b ldr r3, [r7, #4] + 8001f0a: 619a str r2, [r3, #24] +} + 8001f0c: bf00 nop + 8001f0e: 3714 adds r7, #20 + 8001f10: 46bd mov sp, r7 + 8001f12: f85d 7b04 ldr.w r7, [sp], #4 + 8001f16: 4770 bx lr + +08001f18 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8001f78: b580 push {r7, lr} - 8001f7a: f5ad 7d00 sub.w sp, sp, #512 @ 0x200 - 8001f7e: af00 add r7, sp, #0 - 8001f80: f507 7300 add.w r3, r7, #512 @ 0x200 - 8001f84: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8001f88: 6018 str r0, [r3, #0] + 8001f18: b580 push {r7, lr} + 8001f1a: f5ad 7d00 sub.w sp, sp, #512 @ 0x200 + 8001f1e: af00 add r7, sp, #0 + 8001f20: f507 7300 add.w r3, r7, #512 @ 0x200 + 8001f24: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8001f28: 6018 str r0, [r3, #0] #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) uint32_t pll_config2; #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8001f8a: f507 7300 add.w r3, r7, #512 @ 0x200 - 8001f8e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8001f92: 681b ldr r3, [r3, #0] - 8001f94: 2b00 cmp r3, #0 - 8001f96: d102 bne.n 8001f9e + 8001f2a: f507 7300 add.w r3, r7, #512 @ 0x200 + 8001f2e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8001f32: 681b ldr r3, [r3, #0] + 8001f34: 2b00 cmp r3, #0 + 8001f36: d102 bne.n 8001f3e { return HAL_ERROR; - 8001f98: 2301 movs r3, #1 - 8001f9a: f001 b823 b.w 8002fe4 + 8001f38: 2301 movs r3, #1 + 8001f3a: f001 b823 b.w 8002f84 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8001f9e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8001fa2: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8001fa6: 681b ldr r3, [r3, #0] - 8001fa8: 681b ldr r3, [r3, #0] - 8001faa: f003 0301 and.w r3, r3, #1 - 8001fae: 2b00 cmp r3, #0 - 8001fb0: f000 817d beq.w 80022ae + 8001f3e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8001f42: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8001f46: 681b ldr r3, [r3, #0] + 8001f48: 681b ldr r3, [r3, #0] + 8001f4a: f003 0301 and.w r3, r3, #1 + 8001f4e: 2b00 cmp r3, #0 + 8001f50: f000 817d beq.w 800224e { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8001fb4: 4bbc ldr r3, [pc, #752] @ (80022a8 ) - 8001fb6: 685b ldr r3, [r3, #4] - 8001fb8: f003 030c and.w r3, r3, #12 - 8001fbc: 2b04 cmp r3, #4 - 8001fbe: d00c beq.n 8001fda + 8001f54: 4bbc ldr r3, [pc, #752] @ (8002248 ) + 8001f56: 685b ldr r3, [r3, #4] + 8001f58: f003 030c and.w r3, r3, #12 + 8001f5c: 2b04 cmp r3, #4 + 8001f5e: d00c beq.n 8001f7a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 8001fc0: 4bb9 ldr r3, [pc, #740] @ (80022a8 ) - 8001fc2: 685b ldr r3, [r3, #4] - 8001fc4: f003 030c and.w r3, r3, #12 - 8001fc8: 2b08 cmp r3, #8 - 8001fca: d15c bne.n 8002086 - 8001fcc: 4bb6 ldr r3, [pc, #728] @ (80022a8 ) - 8001fce: 685b ldr r3, [r3, #4] - 8001fd0: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8001fd4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8001fd8: d155 bne.n 8002086 - 8001fda: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8001fde: f8c7 31f0 str.w r3, [r7, #496] @ 0x1f0 + 8001f60: 4bb9 ldr r3, [pc, #740] @ (8002248 ) + 8001f62: 685b ldr r3, [r3, #4] + 8001f64: f003 030c and.w r3, r3, #12 + 8001f68: 2b08 cmp r3, #8 + 8001f6a: d15c bne.n 8002026 + 8001f6c: 4bb6 ldr r3, [pc, #728] @ (8002248 ) + 8001f6e: 685b ldr r3, [r3, #4] + 8001f70: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8001f74: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8001f78: d155 bne.n 8002026 + 8001f7a: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8001f7e: f8c7 31f0 str.w r3, [r7, #496] @ 0x1f0 uint32_t result; #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8001fe2: f8d7 31f0 ldr.w r3, [r7, #496] @ 0x1f0 - 8001fe6: fa93 f3a3 rbit r3, r3 - 8001fea: f8c7 31ec str.w r3, [r7, #492] @ 0x1ec + 8001f82: f8d7 31f0 ldr.w r3, [r7, #496] @ 0x1f0 + 8001f86: fa93 f3a3 rbit r3, r3 + 8001f8a: f8c7 31ec str.w r3, [r7, #492] @ 0x1ec result |= value & 1U; s--; } result <<= s; /* shift when v's highest bits are zero */ #endif return result; - 8001fee: f8d7 31ec ldr.w r3, [r7, #492] @ 0x1ec + 8001f8e: f8d7 31ec ldr.w r3, [r7, #492] @ 0x1ec { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8001ff2: fab3 f383 clz r3, r3 - 8001ff6: b2db uxtb r3, r3 - 8001ff8: 095b lsrs r3, r3, #5 - 8001ffa: b2db uxtb r3, r3 - 8001ffc: f043 0301 orr.w r3, r3, #1 - 8002000: b2db uxtb r3, r3 - 8002002: 2b01 cmp r3, #1 - 8002004: d102 bne.n 800200c - 8002006: 4ba8 ldr r3, [pc, #672] @ (80022a8 ) - 8002008: 681b ldr r3, [r3, #0] - 800200a: e015 b.n 8002038 - 800200c: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8002010: f8c7 31e8 str.w r3, [r7, #488] @ 0x1e8 + 8001f92: fab3 f383 clz r3, r3 + 8001f96: b2db uxtb r3, r3 + 8001f98: 095b lsrs r3, r3, #5 + 8001f9a: b2db uxtb r3, r3 + 8001f9c: f043 0301 orr.w r3, r3, #1 + 8001fa0: b2db uxtb r3, r3 + 8001fa2: 2b01 cmp r3, #1 + 8001fa4: d102 bne.n 8001fac + 8001fa6: 4ba8 ldr r3, [pc, #672] @ (8002248 ) + 8001fa8: 681b ldr r3, [r3, #0] + 8001faa: e015 b.n 8001fd8 + 8001fac: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8001fb0: f8c7 31e8 str.w r3, [r7, #488] @ 0x1e8 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002014: f8d7 31e8 ldr.w r3, [r7, #488] @ 0x1e8 - 8002018: fa93 f3a3 rbit r3, r3 - 800201c: f8c7 31e4 str.w r3, [r7, #484] @ 0x1e4 - 8002020: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8002024: f8c7 31e0 str.w r3, [r7, #480] @ 0x1e0 - 8002028: f8d7 31e0 ldr.w r3, [r7, #480] @ 0x1e0 - 800202c: fa93 f3a3 rbit r3, r3 - 8002030: f8c7 31dc str.w r3, [r7, #476] @ 0x1dc - 8002034: 4b9c ldr r3, [pc, #624] @ (80022a8 ) - 8002036: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002038: f44f 3200 mov.w r2, #131072 @ 0x20000 - 800203c: f8c7 21d8 str.w r2, [r7, #472] @ 0x1d8 - 8002040: f8d7 21d8 ldr.w r2, [r7, #472] @ 0x1d8 - 8002044: fa92 f2a2 rbit r2, r2 - 8002048: f8c7 21d4 str.w r2, [r7, #468] @ 0x1d4 + 8001fb4: f8d7 31e8 ldr.w r3, [r7, #488] @ 0x1e8 + 8001fb8: fa93 f3a3 rbit r3, r3 + 8001fbc: f8c7 31e4 str.w r3, [r7, #484] @ 0x1e4 + 8001fc0: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8001fc4: f8c7 31e0 str.w r3, [r7, #480] @ 0x1e0 + 8001fc8: f8d7 31e0 ldr.w r3, [r7, #480] @ 0x1e0 + 8001fcc: fa93 f3a3 rbit r3, r3 + 8001fd0: f8c7 31dc str.w r3, [r7, #476] @ 0x1dc + 8001fd4: 4b9c ldr r3, [pc, #624] @ (8002248 ) + 8001fd6: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001fd8: f44f 3200 mov.w r2, #131072 @ 0x20000 + 8001fdc: f8c7 21d8 str.w r2, [r7, #472] @ 0x1d8 + 8001fe0: f8d7 21d8 ldr.w r2, [r7, #472] @ 0x1d8 + 8001fe4: fa92 f2a2 rbit r2, r2 + 8001fe8: f8c7 21d4 str.w r2, [r7, #468] @ 0x1d4 return result; - 800204c: f8d7 21d4 ldr.w r2, [r7, #468] @ 0x1d4 - 8002050: fab2 f282 clz r2, r2 - 8002054: b2d2 uxtb r2, r2 - 8002056: f042 0220 orr.w r2, r2, #32 - 800205a: b2d2 uxtb r2, r2 - 800205c: f002 021f and.w r2, r2, #31 - 8002060: 2101 movs r1, #1 - 8002062: fa01 f202 lsl.w r2, r1, r2 - 8002066: 4013 ands r3, r2 - 8002068: 2b00 cmp r3, #0 - 800206a: f000 811f beq.w 80022ac - 800206e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002072: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002076: 681b ldr r3, [r3, #0] - 8002078: 685b ldr r3, [r3, #4] - 800207a: 2b00 cmp r3, #0 - 800207c: f040 8116 bne.w 80022ac + 8001fec: f8d7 21d4 ldr.w r2, [r7, #468] @ 0x1d4 + 8001ff0: fab2 f282 clz r2, r2 + 8001ff4: b2d2 uxtb r2, r2 + 8001ff6: f042 0220 orr.w r2, r2, #32 + 8001ffa: b2d2 uxtb r2, r2 + 8001ffc: f002 021f and.w r2, r2, #31 + 8002000: 2101 movs r1, #1 + 8002002: fa01 f202 lsl.w r2, r1, r2 + 8002006: 4013 ands r3, r2 + 8002008: 2b00 cmp r3, #0 + 800200a: f000 811f beq.w 800224c + 800200e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002012: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002016: 681b ldr r3, [r3, #0] + 8002018: 685b ldr r3, [r3, #4] + 800201a: 2b00 cmp r3, #0 + 800201c: f040 8116 bne.w 800224c { return HAL_ERROR; - 8002080: 2301 movs r3, #1 - 8002082: f000 bfaf b.w 8002fe4 + 8002020: 2301 movs r3, #1 + 8002022: f000 bfaf b.w 8002f84 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8002086: f507 7300 add.w r3, r7, #512 @ 0x200 - 800208a: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 800208e: 681b ldr r3, [r3, #0] - 8002090: 685b ldr r3, [r3, #4] - 8002092: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8002096: d106 bne.n 80020a6 - 8002098: 4b83 ldr r3, [pc, #524] @ (80022a8 ) - 800209a: 681b ldr r3, [r3, #0] - 800209c: 4a82 ldr r2, [pc, #520] @ (80022a8 ) - 800209e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80020a2: 6013 str r3, [r2, #0] - 80020a4: e036 b.n 8002114 - 80020a6: f507 7300 add.w r3, r7, #512 @ 0x200 - 80020aa: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80020ae: 681b ldr r3, [r3, #0] - 80020b0: 685b ldr r3, [r3, #4] - 80020b2: 2b00 cmp r3, #0 - 80020b4: d10c bne.n 80020d0 - 80020b6: 4b7c ldr r3, [pc, #496] @ (80022a8 ) - 80020b8: 681b ldr r3, [r3, #0] - 80020ba: 4a7b ldr r2, [pc, #492] @ (80022a8 ) - 80020bc: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 80020c0: 6013 str r3, [r2, #0] - 80020c2: 4b79 ldr r3, [pc, #484] @ (80022a8 ) - 80020c4: 681b ldr r3, [r3, #0] - 80020c6: 4a78 ldr r2, [pc, #480] @ (80022a8 ) - 80020c8: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 80020cc: 6013 str r3, [r2, #0] - 80020ce: e021 b.n 8002114 - 80020d0: f507 7300 add.w r3, r7, #512 @ 0x200 - 80020d4: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80020d8: 681b ldr r3, [r3, #0] - 80020da: 685b ldr r3, [r3, #4] - 80020dc: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 - 80020e0: d10c bne.n 80020fc - 80020e2: 4b71 ldr r3, [pc, #452] @ (80022a8 ) - 80020e4: 681b ldr r3, [r3, #0] - 80020e6: 4a70 ldr r2, [pc, #448] @ (80022a8 ) - 80020e8: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 80020ec: 6013 str r3, [r2, #0] - 80020ee: 4b6e ldr r3, [pc, #440] @ (80022a8 ) - 80020f0: 681b ldr r3, [r3, #0] - 80020f2: 4a6d ldr r2, [pc, #436] @ (80022a8 ) - 80020f4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80020f8: 6013 str r3, [r2, #0] - 80020fa: e00b b.n 8002114 - 80020fc: 4b6a ldr r3, [pc, #424] @ (80022a8 ) - 80020fe: 681b ldr r3, [r3, #0] - 8002100: 4a69 ldr r2, [pc, #420] @ (80022a8 ) - 8002102: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8002106: 6013 str r3, [r2, #0] - 8002108: 4b67 ldr r3, [pc, #412] @ (80022a8 ) - 800210a: 681b ldr r3, [r3, #0] - 800210c: 4a66 ldr r2, [pc, #408] @ (80022a8 ) - 800210e: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8002112: 6013 str r3, [r2, #0] + 8002026: f507 7300 add.w r3, r7, #512 @ 0x200 + 800202a: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800202e: 681b ldr r3, [r3, #0] + 8002030: 685b ldr r3, [r3, #4] + 8002032: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8002036: d106 bne.n 8002046 + 8002038: 4b83 ldr r3, [pc, #524] @ (8002248 ) + 800203a: 681b ldr r3, [r3, #0] + 800203c: 4a82 ldr r2, [pc, #520] @ (8002248 ) + 800203e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8002042: 6013 str r3, [r2, #0] + 8002044: e036 b.n 80020b4 + 8002046: f507 7300 add.w r3, r7, #512 @ 0x200 + 800204a: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800204e: 681b ldr r3, [r3, #0] + 8002050: 685b ldr r3, [r3, #4] + 8002052: 2b00 cmp r3, #0 + 8002054: d10c bne.n 8002070 + 8002056: 4b7c ldr r3, [pc, #496] @ (8002248 ) + 8002058: 681b ldr r3, [r3, #0] + 800205a: 4a7b ldr r2, [pc, #492] @ (8002248 ) + 800205c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8002060: 6013 str r3, [r2, #0] + 8002062: 4b79 ldr r3, [pc, #484] @ (8002248 ) + 8002064: 681b ldr r3, [r3, #0] + 8002066: 4a78 ldr r2, [pc, #480] @ (8002248 ) + 8002068: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 800206c: 6013 str r3, [r2, #0] + 800206e: e021 b.n 80020b4 + 8002070: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002074: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002078: 681b ldr r3, [r3, #0] + 800207a: 685b ldr r3, [r3, #4] + 800207c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 8002080: d10c bne.n 800209c + 8002082: 4b71 ldr r3, [pc, #452] @ (8002248 ) + 8002084: 681b ldr r3, [r3, #0] + 8002086: 4a70 ldr r2, [pc, #448] @ (8002248 ) + 8002088: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 800208c: 6013 str r3, [r2, #0] + 800208e: 4b6e ldr r3, [pc, #440] @ (8002248 ) + 8002090: 681b ldr r3, [r3, #0] + 8002092: 4a6d ldr r2, [pc, #436] @ (8002248 ) + 8002094: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8002098: 6013 str r3, [r2, #0] + 800209a: e00b b.n 80020b4 + 800209c: 4b6a ldr r3, [pc, #424] @ (8002248 ) + 800209e: 681b ldr r3, [r3, #0] + 80020a0: 4a69 ldr r2, [pc, #420] @ (8002248 ) + 80020a2: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 80020a6: 6013 str r3, [r2, #0] + 80020a8: 4b67 ldr r3, [pc, #412] @ (8002248 ) + 80020aa: 681b ldr r3, [r3, #0] + 80020ac: 4a66 ldr r2, [pc, #408] @ (8002248 ) + 80020ae: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 80020b2: 6013 str r3, [r2, #0] #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) /* Configure the HSE predivision factor --------------------------------*/ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 8002114: 4b64 ldr r3, [pc, #400] @ (80022a8 ) - 8002116: 6adb ldr r3, [r3, #44] @ 0x2c - 8002118: f023 020f bic.w r2, r3, #15 - 800211c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002120: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002124: 681b ldr r3, [r3, #0] - 8002126: 689b ldr r3, [r3, #8] - 8002128: 495f ldr r1, [pc, #380] @ (80022a8 ) - 800212a: 4313 orrs r3, r2 - 800212c: 62cb str r3, [r1, #44] @ 0x2c + 80020b4: 4b64 ldr r3, [pc, #400] @ (8002248 ) + 80020b6: 6adb ldr r3, [r3, #44] @ 0x2c + 80020b8: f023 020f bic.w r2, r3, #15 + 80020bc: f507 7300 add.w r3, r7, #512 @ 0x200 + 80020c0: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 80020c4: 681b ldr r3, [r3, #0] + 80020c6: 689b ldr r3, [r3, #8] + 80020c8: 495f ldr r1, [pc, #380] @ (8002248 ) + 80020ca: 4313 orrs r3, r2 + 80020cc: 62cb str r3, [r1, #44] @ 0x2c #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 800212e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002132: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002136: 681b ldr r3, [r3, #0] - 8002138: 685b ldr r3, [r3, #4] - 800213a: 2b00 cmp r3, #0 - 800213c: d059 beq.n 80021f2 + 80020ce: f507 7300 add.w r3, r7, #512 @ 0x200 + 80020d2: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 80020d6: 681b ldr r3, [r3, #0] + 80020d8: 685b ldr r3, [r3, #4] + 80020da: 2b00 cmp r3, #0 + 80020dc: d059 beq.n 8002192 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800213e: f7fe fda9 bl 8000c94 - 8002142: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80020de: f7fe fd8f bl 8000c00 + 80020e2: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8002146: e00a b.n 800215e + 80020e6: e00a b.n 80020fe { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8002148: f7fe fda4 bl 8000c94 - 800214c: 4602 mov r2, r0 - 800214e: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002152: 1ad3 subs r3, r2, r3 - 8002154: 2b64 cmp r3, #100 @ 0x64 - 8002156: d902 bls.n 800215e + 80020e8: f7fe fd8a bl 8000c00 + 80020ec: 4602 mov r2, r0 + 80020ee: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80020f2: 1ad3 subs r3, r2, r3 + 80020f4: 2b64 cmp r3, #100 @ 0x64 + 80020f6: d902 bls.n 80020fe { return HAL_TIMEOUT; - 8002158: 2303 movs r3, #3 - 800215a: f000 bf43 b.w 8002fe4 - 800215e: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8002162: f8c7 31d0 str.w r3, [r7, #464] @ 0x1d0 + 80020f8: 2303 movs r3, #3 + 80020fa: f000 bf43 b.w 8002f84 + 80020fe: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8002102: f8c7 31d0 str.w r3, [r7, #464] @ 0x1d0 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002166: f8d7 31d0 ldr.w r3, [r7, #464] @ 0x1d0 - 800216a: fa93 f3a3 rbit r3, r3 - 800216e: f8c7 31cc str.w r3, [r7, #460] @ 0x1cc + 8002106: f8d7 31d0 ldr.w r3, [r7, #464] @ 0x1d0 + 800210a: fa93 f3a3 rbit r3, r3 + 800210e: f8c7 31cc str.w r3, [r7, #460] @ 0x1cc return result; - 8002172: f8d7 31cc ldr.w r3, [r7, #460] @ 0x1cc + 8002112: f8d7 31cc ldr.w r3, [r7, #460] @ 0x1cc while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8002176: fab3 f383 clz r3, r3 - 800217a: b2db uxtb r3, r3 - 800217c: 095b lsrs r3, r3, #5 - 800217e: b2db uxtb r3, r3 - 8002180: f043 0301 orr.w r3, r3, #1 - 8002184: b2db uxtb r3, r3 - 8002186: 2b01 cmp r3, #1 - 8002188: d102 bne.n 8002190 - 800218a: 4b47 ldr r3, [pc, #284] @ (80022a8 ) - 800218c: 681b ldr r3, [r3, #0] - 800218e: e015 b.n 80021bc - 8002190: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8002194: f8c7 31c8 str.w r3, [r7, #456] @ 0x1c8 + 8002116: fab3 f383 clz r3, r3 + 800211a: b2db uxtb r3, r3 + 800211c: 095b lsrs r3, r3, #5 + 800211e: b2db uxtb r3, r3 + 8002120: f043 0301 orr.w r3, r3, #1 + 8002124: b2db uxtb r3, r3 + 8002126: 2b01 cmp r3, #1 + 8002128: d102 bne.n 8002130 + 800212a: 4b47 ldr r3, [pc, #284] @ (8002248 ) + 800212c: 681b ldr r3, [r3, #0] + 800212e: e015 b.n 800215c + 8002130: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8002134: f8c7 31c8 str.w r3, [r7, #456] @ 0x1c8 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002198: f8d7 31c8 ldr.w r3, [r7, #456] @ 0x1c8 - 800219c: fa93 f3a3 rbit r3, r3 - 80021a0: f8c7 31c4 str.w r3, [r7, #452] @ 0x1c4 - 80021a4: f44f 3300 mov.w r3, #131072 @ 0x20000 - 80021a8: f8c7 31c0 str.w r3, [r7, #448] @ 0x1c0 - 80021ac: f8d7 31c0 ldr.w r3, [r7, #448] @ 0x1c0 - 80021b0: fa93 f3a3 rbit r3, r3 - 80021b4: f8c7 31bc str.w r3, [r7, #444] @ 0x1bc - 80021b8: 4b3b ldr r3, [pc, #236] @ (80022a8 ) - 80021ba: 6a5b ldr r3, [r3, #36] @ 0x24 - 80021bc: f44f 3200 mov.w r2, #131072 @ 0x20000 - 80021c0: f8c7 21b8 str.w r2, [r7, #440] @ 0x1b8 - 80021c4: f8d7 21b8 ldr.w r2, [r7, #440] @ 0x1b8 - 80021c8: fa92 f2a2 rbit r2, r2 - 80021cc: f8c7 21b4 str.w r2, [r7, #436] @ 0x1b4 + 8002138: f8d7 31c8 ldr.w r3, [r7, #456] @ 0x1c8 + 800213c: fa93 f3a3 rbit r3, r3 + 8002140: f8c7 31c4 str.w r3, [r7, #452] @ 0x1c4 + 8002144: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8002148: f8c7 31c0 str.w r3, [r7, #448] @ 0x1c0 + 800214c: f8d7 31c0 ldr.w r3, [r7, #448] @ 0x1c0 + 8002150: fa93 f3a3 rbit r3, r3 + 8002154: f8c7 31bc str.w r3, [r7, #444] @ 0x1bc + 8002158: 4b3b ldr r3, [pc, #236] @ (8002248 ) + 800215a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800215c: f44f 3200 mov.w r2, #131072 @ 0x20000 + 8002160: f8c7 21b8 str.w r2, [r7, #440] @ 0x1b8 + 8002164: f8d7 21b8 ldr.w r2, [r7, #440] @ 0x1b8 + 8002168: fa92 f2a2 rbit r2, r2 + 800216c: f8c7 21b4 str.w r2, [r7, #436] @ 0x1b4 return result; - 80021d0: f8d7 21b4 ldr.w r2, [r7, #436] @ 0x1b4 - 80021d4: fab2 f282 clz r2, r2 - 80021d8: b2d2 uxtb r2, r2 - 80021da: f042 0220 orr.w r2, r2, #32 - 80021de: b2d2 uxtb r2, r2 - 80021e0: f002 021f and.w r2, r2, #31 - 80021e4: 2101 movs r1, #1 - 80021e6: fa01 f202 lsl.w r2, r1, r2 - 80021ea: 4013 ands r3, r2 - 80021ec: 2b00 cmp r3, #0 - 80021ee: d0ab beq.n 8002148 - 80021f0: e05d b.n 80022ae + 8002170: f8d7 21b4 ldr.w r2, [r7, #436] @ 0x1b4 + 8002174: fab2 f282 clz r2, r2 + 8002178: b2d2 uxtb r2, r2 + 800217a: f042 0220 orr.w r2, r2, #32 + 800217e: b2d2 uxtb r2, r2 + 8002180: f002 021f and.w r2, r2, #31 + 8002184: 2101 movs r1, #1 + 8002186: fa01 f202 lsl.w r2, r1, r2 + 800218a: 4013 ands r3, r2 + 800218c: 2b00 cmp r3, #0 + 800218e: d0ab beq.n 80020e8 + 8002190: e05d b.n 800224e } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80021f2: f7fe fd4f bl 8000c94 - 80021f6: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 8002192: f7fe fd35 bl 8000c00 + 8002196: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80021fa: e00a b.n 8002212 + 800219a: e00a b.n 80021b2 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 80021fc: f7fe fd4a bl 8000c94 - 8002200: 4602 mov r2, r0 - 8002202: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002206: 1ad3 subs r3, r2, r3 - 8002208: 2b64 cmp r3, #100 @ 0x64 - 800220a: d902 bls.n 8002212 + 800219c: f7fe fd30 bl 8000c00 + 80021a0: 4602 mov r2, r0 + 80021a2: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80021a6: 1ad3 subs r3, r2, r3 + 80021a8: 2b64 cmp r3, #100 @ 0x64 + 80021aa: d902 bls.n 80021b2 { return HAL_TIMEOUT; - 800220c: 2303 movs r3, #3 - 800220e: f000 bee9 b.w 8002fe4 - 8002212: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8002216: f8c7 31b0 str.w r3, [r7, #432] @ 0x1b0 + 80021ac: 2303 movs r3, #3 + 80021ae: f000 bee9 b.w 8002f84 + 80021b2: f44f 3300 mov.w r3, #131072 @ 0x20000 + 80021b6: f8c7 31b0 str.w r3, [r7, #432] @ 0x1b0 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800221a: f8d7 31b0 ldr.w r3, [r7, #432] @ 0x1b0 - 800221e: fa93 f3a3 rbit r3, r3 - 8002222: f8c7 31ac str.w r3, [r7, #428] @ 0x1ac + 80021ba: f8d7 31b0 ldr.w r3, [r7, #432] @ 0x1b0 + 80021be: fa93 f3a3 rbit r3, r3 + 80021c2: f8c7 31ac str.w r3, [r7, #428] @ 0x1ac return result; - 8002226: f8d7 31ac ldr.w r3, [r7, #428] @ 0x1ac + 80021c6: f8d7 31ac ldr.w r3, [r7, #428] @ 0x1ac while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 800222a: fab3 f383 clz r3, r3 - 800222e: b2db uxtb r3, r3 - 8002230: 095b lsrs r3, r3, #5 - 8002232: b2db uxtb r3, r3 - 8002234: f043 0301 orr.w r3, r3, #1 - 8002238: b2db uxtb r3, r3 - 800223a: 2b01 cmp r3, #1 - 800223c: d102 bne.n 8002244 - 800223e: 4b1a ldr r3, [pc, #104] @ (80022a8 ) - 8002240: 681b ldr r3, [r3, #0] - 8002242: e015 b.n 8002270 - 8002244: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8002248: f8c7 31a8 str.w r3, [r7, #424] @ 0x1a8 + 80021ca: fab3 f383 clz r3, r3 + 80021ce: b2db uxtb r3, r3 + 80021d0: 095b lsrs r3, r3, #5 + 80021d2: b2db uxtb r3, r3 + 80021d4: f043 0301 orr.w r3, r3, #1 + 80021d8: b2db uxtb r3, r3 + 80021da: 2b01 cmp r3, #1 + 80021dc: d102 bne.n 80021e4 + 80021de: 4b1a ldr r3, [pc, #104] @ (8002248 ) + 80021e0: 681b ldr r3, [r3, #0] + 80021e2: e015 b.n 8002210 + 80021e4: f44f 3300 mov.w r3, #131072 @ 0x20000 + 80021e8: f8c7 31a8 str.w r3, [r7, #424] @ 0x1a8 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800224c: f8d7 31a8 ldr.w r3, [r7, #424] @ 0x1a8 - 8002250: fa93 f3a3 rbit r3, r3 - 8002254: f8c7 31a4 str.w r3, [r7, #420] @ 0x1a4 - 8002258: f44f 3300 mov.w r3, #131072 @ 0x20000 - 800225c: f8c7 31a0 str.w r3, [r7, #416] @ 0x1a0 - 8002260: f8d7 31a0 ldr.w r3, [r7, #416] @ 0x1a0 - 8002264: fa93 f3a3 rbit r3, r3 - 8002268: f8c7 319c str.w r3, [r7, #412] @ 0x19c - 800226c: 4b0e ldr r3, [pc, #56] @ (80022a8 ) - 800226e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002270: f44f 3200 mov.w r2, #131072 @ 0x20000 - 8002274: f8c7 2198 str.w r2, [r7, #408] @ 0x198 - 8002278: f8d7 2198 ldr.w r2, [r7, #408] @ 0x198 - 800227c: fa92 f2a2 rbit r2, r2 - 8002280: f8c7 2194 str.w r2, [r7, #404] @ 0x194 + 80021ec: f8d7 31a8 ldr.w r3, [r7, #424] @ 0x1a8 + 80021f0: fa93 f3a3 rbit r3, r3 + 80021f4: f8c7 31a4 str.w r3, [r7, #420] @ 0x1a4 + 80021f8: f44f 3300 mov.w r3, #131072 @ 0x20000 + 80021fc: f8c7 31a0 str.w r3, [r7, #416] @ 0x1a0 + 8002200: f8d7 31a0 ldr.w r3, [r7, #416] @ 0x1a0 + 8002204: fa93 f3a3 rbit r3, r3 + 8002208: f8c7 319c str.w r3, [r7, #412] @ 0x19c + 800220c: 4b0e ldr r3, [pc, #56] @ (8002248 ) + 800220e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002210: f44f 3200 mov.w r2, #131072 @ 0x20000 + 8002214: f8c7 2198 str.w r2, [r7, #408] @ 0x198 + 8002218: f8d7 2198 ldr.w r2, [r7, #408] @ 0x198 + 800221c: fa92 f2a2 rbit r2, r2 + 8002220: f8c7 2194 str.w r2, [r7, #404] @ 0x194 return result; - 8002284: f8d7 2194 ldr.w r2, [r7, #404] @ 0x194 - 8002288: fab2 f282 clz r2, r2 - 800228c: b2d2 uxtb r2, r2 - 800228e: f042 0220 orr.w r2, r2, #32 - 8002292: b2d2 uxtb r2, r2 - 8002294: f002 021f and.w r2, r2, #31 - 8002298: 2101 movs r1, #1 - 800229a: fa01 f202 lsl.w r2, r1, r2 - 800229e: 4013 ands r3, r2 - 80022a0: 2b00 cmp r3, #0 - 80022a2: d1ab bne.n 80021fc - 80022a4: e003 b.n 80022ae - 80022a6: bf00 nop - 80022a8: 40021000 .word 0x40021000 + 8002224: f8d7 2194 ldr.w r2, [r7, #404] @ 0x194 + 8002228: fab2 f282 clz r2, r2 + 800222c: b2d2 uxtb r2, r2 + 800222e: f042 0220 orr.w r2, r2, #32 + 8002232: b2d2 uxtb r2, r2 + 8002234: f002 021f and.w r2, r2, #31 + 8002238: 2101 movs r1, #1 + 800223a: fa01 f202 lsl.w r2, r1, r2 + 800223e: 4013 ands r3, r2 + 8002240: 2b00 cmp r3, #0 + 8002242: d1ab bne.n 800219c + 8002244: e003 b.n 800224e + 8002246: bf00 nop + 8002248: 40021000 .word 0x40021000 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80022ac: bf00 nop + 800224c: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 80022ae: f507 7300 add.w r3, r7, #512 @ 0x200 - 80022b2: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80022b6: 681b ldr r3, [r3, #0] - 80022b8: 681b ldr r3, [r3, #0] - 80022ba: f003 0302 and.w r3, r3, #2 - 80022be: 2b00 cmp r3, #0 - 80022c0: f000 817d beq.w 80025be + 800224e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002252: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002256: 681b ldr r3, [r3, #0] + 8002258: 681b ldr r3, [r3, #0] + 800225a: f003 0302 and.w r3, r3, #2 + 800225e: 2b00 cmp r3, #0 + 8002260: f000 817d beq.w 800255e /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 80022c4: 4ba6 ldr r3, [pc, #664] @ (8002560 ) - 80022c6: 685b ldr r3, [r3, #4] - 80022c8: f003 030c and.w r3, r3, #12 - 80022cc: 2b00 cmp r3, #0 - 80022ce: d00b beq.n 80022e8 + 8002264: 4ba6 ldr r3, [pc, #664] @ (8002500 ) + 8002266: 685b ldr r3, [r3, #4] + 8002268: f003 030c and.w r3, r3, #12 + 800226c: 2b00 cmp r3, #0 + 800226e: d00b beq.n 8002288 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) - 80022d0: 4ba3 ldr r3, [pc, #652] @ (8002560 ) - 80022d2: 685b ldr r3, [r3, #4] - 80022d4: f003 030c and.w r3, r3, #12 - 80022d8: 2b08 cmp r3, #8 - 80022da: d172 bne.n 80023c2 - 80022dc: 4ba0 ldr r3, [pc, #640] @ (8002560 ) - 80022de: 685b ldr r3, [r3, #4] - 80022e0: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 80022e4: 2b00 cmp r3, #0 - 80022e6: d16c bne.n 80023c2 - 80022e8: 2302 movs r3, #2 - 80022ea: f8c7 3190 str.w r3, [r7, #400] @ 0x190 + 8002270: 4ba3 ldr r3, [pc, #652] @ (8002500 ) + 8002272: 685b ldr r3, [r3, #4] + 8002274: f003 030c and.w r3, r3, #12 + 8002278: 2b08 cmp r3, #8 + 800227a: d172 bne.n 8002362 + 800227c: 4ba0 ldr r3, [pc, #640] @ (8002500 ) + 800227e: 685b ldr r3, [r3, #4] + 8002280: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8002284: 2b00 cmp r3, #0 + 8002286: d16c bne.n 8002362 + 8002288: 2302 movs r3, #2 + 800228a: f8c7 3190 str.w r3, [r7, #400] @ 0x190 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80022ee: f8d7 3190 ldr.w r3, [r7, #400] @ 0x190 - 80022f2: fa93 f3a3 rbit r3, r3 - 80022f6: f8c7 318c str.w r3, [r7, #396] @ 0x18c + 800228e: f8d7 3190 ldr.w r3, [r7, #400] @ 0x190 + 8002292: fa93 f3a3 rbit r3, r3 + 8002296: f8c7 318c str.w r3, [r7, #396] @ 0x18c return result; - 80022fa: f8d7 318c ldr.w r3, [r7, #396] @ 0x18c + 800229a: f8d7 318c ldr.w r3, [r7, #396] @ 0x18c { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80022fe: fab3 f383 clz r3, r3 - 8002302: b2db uxtb r3, r3 - 8002304: 095b lsrs r3, r3, #5 - 8002306: b2db uxtb r3, r3 - 8002308: f043 0301 orr.w r3, r3, #1 - 800230c: b2db uxtb r3, r3 - 800230e: 2b01 cmp r3, #1 - 8002310: d102 bne.n 8002318 - 8002312: 4b93 ldr r3, [pc, #588] @ (8002560 ) - 8002314: 681b ldr r3, [r3, #0] - 8002316: e013 b.n 8002340 - 8002318: 2302 movs r3, #2 - 800231a: f8c7 3188 str.w r3, [r7, #392] @ 0x188 + 800229e: fab3 f383 clz r3, r3 + 80022a2: b2db uxtb r3, r3 + 80022a4: 095b lsrs r3, r3, #5 + 80022a6: b2db uxtb r3, r3 + 80022a8: f043 0301 orr.w r3, r3, #1 + 80022ac: b2db uxtb r3, r3 + 80022ae: 2b01 cmp r3, #1 + 80022b0: d102 bne.n 80022b8 + 80022b2: 4b93 ldr r3, [pc, #588] @ (8002500 ) + 80022b4: 681b ldr r3, [r3, #0] + 80022b6: e013 b.n 80022e0 + 80022b8: 2302 movs r3, #2 + 80022ba: f8c7 3188 str.w r3, [r7, #392] @ 0x188 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800231e: f8d7 3188 ldr.w r3, [r7, #392] @ 0x188 - 8002322: fa93 f3a3 rbit r3, r3 - 8002326: f8c7 3184 str.w r3, [r7, #388] @ 0x184 - 800232a: 2302 movs r3, #2 - 800232c: f8c7 3180 str.w r3, [r7, #384] @ 0x180 - 8002330: f8d7 3180 ldr.w r3, [r7, #384] @ 0x180 - 8002334: fa93 f3a3 rbit r3, r3 - 8002338: f8c7 317c str.w r3, [r7, #380] @ 0x17c - 800233c: 4b88 ldr r3, [pc, #544] @ (8002560 ) - 800233e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002340: 2202 movs r2, #2 - 8002342: f8c7 2178 str.w r2, [r7, #376] @ 0x178 - 8002346: f8d7 2178 ldr.w r2, [r7, #376] @ 0x178 - 800234a: fa92 f2a2 rbit r2, r2 - 800234e: f8c7 2174 str.w r2, [r7, #372] @ 0x174 + 80022be: f8d7 3188 ldr.w r3, [r7, #392] @ 0x188 + 80022c2: fa93 f3a3 rbit r3, r3 + 80022c6: f8c7 3184 str.w r3, [r7, #388] @ 0x184 + 80022ca: 2302 movs r3, #2 + 80022cc: f8c7 3180 str.w r3, [r7, #384] @ 0x180 + 80022d0: f8d7 3180 ldr.w r3, [r7, #384] @ 0x180 + 80022d4: fa93 f3a3 rbit r3, r3 + 80022d8: f8c7 317c str.w r3, [r7, #380] @ 0x17c + 80022dc: 4b88 ldr r3, [pc, #544] @ (8002500 ) + 80022de: 6a5b ldr r3, [r3, #36] @ 0x24 + 80022e0: 2202 movs r2, #2 + 80022e2: f8c7 2178 str.w r2, [r7, #376] @ 0x178 + 80022e6: f8d7 2178 ldr.w r2, [r7, #376] @ 0x178 + 80022ea: fa92 f2a2 rbit r2, r2 + 80022ee: f8c7 2174 str.w r2, [r7, #372] @ 0x174 return result; - 8002352: f8d7 2174 ldr.w r2, [r7, #372] @ 0x174 - 8002356: fab2 f282 clz r2, r2 - 800235a: b2d2 uxtb r2, r2 - 800235c: f042 0220 orr.w r2, r2, #32 - 8002360: b2d2 uxtb r2, r2 - 8002362: f002 021f and.w r2, r2, #31 - 8002366: 2101 movs r1, #1 - 8002368: fa01 f202 lsl.w r2, r1, r2 - 800236c: 4013 ands r3, r2 - 800236e: 2b00 cmp r3, #0 - 8002370: d00a beq.n 8002388 - 8002372: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002376: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 800237a: 681b ldr r3, [r3, #0] - 800237c: 691b ldr r3, [r3, #16] - 800237e: 2b01 cmp r3, #1 - 8002380: d002 beq.n 8002388 + 80022f2: f8d7 2174 ldr.w r2, [r7, #372] @ 0x174 + 80022f6: fab2 f282 clz r2, r2 + 80022fa: b2d2 uxtb r2, r2 + 80022fc: f042 0220 orr.w r2, r2, #32 + 8002300: b2d2 uxtb r2, r2 + 8002302: f002 021f and.w r2, r2, #31 + 8002306: 2101 movs r1, #1 + 8002308: fa01 f202 lsl.w r2, r1, r2 + 800230c: 4013 ands r3, r2 + 800230e: 2b00 cmp r3, #0 + 8002310: d00a beq.n 8002328 + 8002312: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002316: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800231a: 681b ldr r3, [r3, #0] + 800231c: 691b ldr r3, [r3, #16] + 800231e: 2b01 cmp r3, #1 + 8002320: d002 beq.n 8002328 { return HAL_ERROR; - 8002382: 2301 movs r3, #1 - 8002384: f000 be2e b.w 8002fe4 + 8002322: 2301 movs r3, #1 + 8002324: f000 be2e b.w 8002f84 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8002388: 4b75 ldr r3, [pc, #468] @ (8002560 ) - 800238a: 681b ldr r3, [r3, #0] - 800238c: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 8002390: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002394: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002398: 681b ldr r3, [r3, #0] - 800239a: 695b ldr r3, [r3, #20] - 800239c: 21f8 movs r1, #248 @ 0xf8 - 800239e: f8c7 1170 str.w r1, [r7, #368] @ 0x170 + 8002328: 4b75 ldr r3, [pc, #468] @ (8002500 ) + 800232a: 681b ldr r3, [r3, #0] + 800232c: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8002330: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002334: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002338: 681b ldr r3, [r3, #0] + 800233a: 695b ldr r3, [r3, #20] + 800233c: 21f8 movs r1, #248 @ 0xf8 + 800233e: f8c7 1170 str.w r1, [r7, #368] @ 0x170 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80023a2: f8d7 1170 ldr.w r1, [r7, #368] @ 0x170 - 80023a6: fa91 f1a1 rbit r1, r1 - 80023aa: f8c7 116c str.w r1, [r7, #364] @ 0x16c + 8002342: f8d7 1170 ldr.w r1, [r7, #368] @ 0x170 + 8002346: fa91 f1a1 rbit r1, r1 + 800234a: f8c7 116c str.w r1, [r7, #364] @ 0x16c return result; - 80023ae: f8d7 116c ldr.w r1, [r7, #364] @ 0x16c - 80023b2: fab1 f181 clz r1, r1 - 80023b6: b2c9 uxtb r1, r1 - 80023b8: 408b lsls r3, r1 - 80023ba: 4969 ldr r1, [pc, #420] @ (8002560 ) - 80023bc: 4313 orrs r3, r2 - 80023be: 600b str r3, [r1, #0] + 800234e: f8d7 116c ldr.w r1, [r7, #364] @ 0x16c + 8002352: fab1 f181 clz r1, r1 + 8002356: b2c9 uxtb r1, r1 + 8002358: 408b lsls r3, r1 + 800235a: 4969 ldr r1, [pc, #420] @ (8002500 ) + 800235c: 4313 orrs r3, r2 + 800235e: 600b str r3, [r1, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80023c0: e0fd b.n 80025be + 8002360: e0fd b.n 800255e } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 80023c2: f507 7300 add.w r3, r7, #512 @ 0x200 - 80023c6: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80023ca: 681b ldr r3, [r3, #0] - 80023cc: 691b ldr r3, [r3, #16] - 80023ce: 2b00 cmp r3, #0 - 80023d0: f000 8088 beq.w 80024e4 - 80023d4: 2301 movs r3, #1 - 80023d6: f8c7 3168 str.w r3, [r7, #360] @ 0x168 + 8002362: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002366: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800236a: 681b ldr r3, [r3, #0] + 800236c: 691b ldr r3, [r3, #16] + 800236e: 2b00 cmp r3, #0 + 8002370: f000 8088 beq.w 8002484 + 8002374: 2301 movs r3, #1 + 8002376: f8c7 3168 str.w r3, [r7, #360] @ 0x168 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80023da: f8d7 3168 ldr.w r3, [r7, #360] @ 0x168 - 80023de: fa93 f3a3 rbit r3, r3 - 80023e2: f8c7 3164 str.w r3, [r7, #356] @ 0x164 + 800237a: f8d7 3168 ldr.w r3, [r7, #360] @ 0x168 + 800237e: fa93 f3a3 rbit r3, r3 + 8002382: f8c7 3164 str.w r3, [r7, #356] @ 0x164 return result; - 80023e6: f8d7 3164 ldr.w r3, [r7, #356] @ 0x164 + 8002386: f8d7 3164 ldr.w r3, [r7, #356] @ 0x164 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 80023ea: fab3 f383 clz r3, r3 - 80023ee: b2db uxtb r3, r3 - 80023f0: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 - 80023f4: f503 1384 add.w r3, r3, #1081344 @ 0x108000 - 80023f8: 009b lsls r3, r3, #2 - 80023fa: 461a mov r2, r3 - 80023fc: 2301 movs r3, #1 - 80023fe: 6013 str r3, [r2, #0] + 800238a: fab3 f383 clz r3, r3 + 800238e: b2db uxtb r3, r3 + 8002390: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 + 8002394: f503 1384 add.w r3, r3, #1081344 @ 0x108000 + 8002398: 009b lsls r3, r3, #2 + 800239a: 461a mov r2, r3 + 800239c: 2301 movs r3, #1 + 800239e: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002400: f7fe fc48 bl 8000c94 - 8002404: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80023a0: f7fe fc2e bl 8000c00 + 80023a4: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8002408: e00a b.n 8002420 + 80023a8: e00a b.n 80023c0 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800240a: f7fe fc43 bl 8000c94 - 800240e: 4602 mov r2, r0 - 8002410: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002414: 1ad3 subs r3, r2, r3 - 8002416: 2b02 cmp r3, #2 - 8002418: d902 bls.n 8002420 + 80023aa: f7fe fc29 bl 8000c00 + 80023ae: 4602 mov r2, r0 + 80023b0: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80023b4: 1ad3 subs r3, r2, r3 + 80023b6: 2b02 cmp r3, #2 + 80023b8: d902 bls.n 80023c0 { return HAL_TIMEOUT; - 800241a: 2303 movs r3, #3 - 800241c: f000 bde2 b.w 8002fe4 - 8002420: 2302 movs r3, #2 - 8002422: f8c7 3160 str.w r3, [r7, #352] @ 0x160 + 80023ba: 2303 movs r3, #3 + 80023bc: f000 bde2 b.w 8002f84 + 80023c0: 2302 movs r3, #2 + 80023c2: f8c7 3160 str.w r3, [r7, #352] @ 0x160 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002426: f8d7 3160 ldr.w r3, [r7, #352] @ 0x160 - 800242a: fa93 f3a3 rbit r3, r3 - 800242e: f8c7 315c str.w r3, [r7, #348] @ 0x15c + 80023c6: f8d7 3160 ldr.w r3, [r7, #352] @ 0x160 + 80023ca: fa93 f3a3 rbit r3, r3 + 80023ce: f8c7 315c str.w r3, [r7, #348] @ 0x15c return result; - 8002432: f8d7 315c ldr.w r3, [r7, #348] @ 0x15c + 80023d2: f8d7 315c ldr.w r3, [r7, #348] @ 0x15c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8002436: fab3 f383 clz r3, r3 - 800243a: b2db uxtb r3, r3 - 800243c: 095b lsrs r3, r3, #5 - 800243e: b2db uxtb r3, r3 - 8002440: f043 0301 orr.w r3, r3, #1 - 8002444: b2db uxtb r3, r3 - 8002446: 2b01 cmp r3, #1 - 8002448: d102 bne.n 8002450 - 800244a: 4b45 ldr r3, [pc, #276] @ (8002560 ) - 800244c: 681b ldr r3, [r3, #0] - 800244e: e013 b.n 8002478 - 8002450: 2302 movs r3, #2 - 8002452: f8c7 3158 str.w r3, [r7, #344] @ 0x158 + 80023d6: fab3 f383 clz r3, r3 + 80023da: b2db uxtb r3, r3 + 80023dc: 095b lsrs r3, r3, #5 + 80023de: b2db uxtb r3, r3 + 80023e0: f043 0301 orr.w r3, r3, #1 + 80023e4: b2db uxtb r3, r3 + 80023e6: 2b01 cmp r3, #1 + 80023e8: d102 bne.n 80023f0 + 80023ea: 4b45 ldr r3, [pc, #276] @ (8002500 ) + 80023ec: 681b ldr r3, [r3, #0] + 80023ee: e013 b.n 8002418 + 80023f0: 2302 movs r3, #2 + 80023f2: f8c7 3158 str.w r3, [r7, #344] @ 0x158 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002456: f8d7 3158 ldr.w r3, [r7, #344] @ 0x158 - 800245a: fa93 f3a3 rbit r3, r3 - 800245e: f8c7 3154 str.w r3, [r7, #340] @ 0x154 - 8002462: 2302 movs r3, #2 - 8002464: f8c7 3150 str.w r3, [r7, #336] @ 0x150 - 8002468: f8d7 3150 ldr.w r3, [r7, #336] @ 0x150 - 800246c: fa93 f3a3 rbit r3, r3 - 8002470: f8c7 314c str.w r3, [r7, #332] @ 0x14c - 8002474: 4b3a ldr r3, [pc, #232] @ (8002560 ) - 8002476: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002478: 2202 movs r2, #2 - 800247a: f8c7 2148 str.w r2, [r7, #328] @ 0x148 - 800247e: f8d7 2148 ldr.w r2, [r7, #328] @ 0x148 - 8002482: fa92 f2a2 rbit r2, r2 - 8002486: f8c7 2144 str.w r2, [r7, #324] @ 0x144 + 80023f6: f8d7 3158 ldr.w r3, [r7, #344] @ 0x158 + 80023fa: fa93 f3a3 rbit r3, r3 + 80023fe: f8c7 3154 str.w r3, [r7, #340] @ 0x154 + 8002402: 2302 movs r3, #2 + 8002404: f8c7 3150 str.w r3, [r7, #336] @ 0x150 + 8002408: f8d7 3150 ldr.w r3, [r7, #336] @ 0x150 + 800240c: fa93 f3a3 rbit r3, r3 + 8002410: f8c7 314c str.w r3, [r7, #332] @ 0x14c + 8002414: 4b3a ldr r3, [pc, #232] @ (8002500 ) + 8002416: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002418: 2202 movs r2, #2 + 800241a: f8c7 2148 str.w r2, [r7, #328] @ 0x148 + 800241e: f8d7 2148 ldr.w r2, [r7, #328] @ 0x148 + 8002422: fa92 f2a2 rbit r2, r2 + 8002426: f8c7 2144 str.w r2, [r7, #324] @ 0x144 return result; - 800248a: f8d7 2144 ldr.w r2, [r7, #324] @ 0x144 - 800248e: fab2 f282 clz r2, r2 - 8002492: b2d2 uxtb r2, r2 - 8002494: f042 0220 orr.w r2, r2, #32 - 8002498: b2d2 uxtb r2, r2 - 800249a: f002 021f and.w r2, r2, #31 - 800249e: 2101 movs r1, #1 - 80024a0: fa01 f202 lsl.w r2, r1, r2 - 80024a4: 4013 ands r3, r2 - 80024a6: 2b00 cmp r3, #0 - 80024a8: d0af beq.n 800240a + 800242a: f8d7 2144 ldr.w r2, [r7, #324] @ 0x144 + 800242e: fab2 f282 clz r2, r2 + 8002432: b2d2 uxtb r2, r2 + 8002434: f042 0220 orr.w r2, r2, #32 + 8002438: b2d2 uxtb r2, r2 + 800243a: f002 021f and.w r2, r2, #31 + 800243e: 2101 movs r1, #1 + 8002440: fa01 f202 lsl.w r2, r1, r2 + 8002444: 4013 ands r3, r2 + 8002446: 2b00 cmp r3, #0 + 8002448: d0af beq.n 80023aa } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80024aa: 4b2d ldr r3, [pc, #180] @ (8002560 ) - 80024ac: 681b ldr r3, [r3, #0] - 80024ae: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 80024b2: f507 7300 add.w r3, r7, #512 @ 0x200 - 80024b6: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80024ba: 681b ldr r3, [r3, #0] - 80024bc: 695b ldr r3, [r3, #20] - 80024be: 21f8 movs r1, #248 @ 0xf8 - 80024c0: f8c7 1140 str.w r1, [r7, #320] @ 0x140 + 800244a: 4b2d ldr r3, [pc, #180] @ (8002500 ) + 800244c: 681b ldr r3, [r3, #0] + 800244e: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8002452: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002456: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800245a: 681b ldr r3, [r3, #0] + 800245c: 695b ldr r3, [r3, #20] + 800245e: 21f8 movs r1, #248 @ 0xf8 + 8002460: f8c7 1140 str.w r1, [r7, #320] @ 0x140 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80024c4: f8d7 1140 ldr.w r1, [r7, #320] @ 0x140 - 80024c8: fa91 f1a1 rbit r1, r1 - 80024cc: f8c7 113c str.w r1, [r7, #316] @ 0x13c + 8002464: f8d7 1140 ldr.w r1, [r7, #320] @ 0x140 + 8002468: fa91 f1a1 rbit r1, r1 + 800246c: f8c7 113c str.w r1, [r7, #316] @ 0x13c return result; - 80024d0: f8d7 113c ldr.w r1, [r7, #316] @ 0x13c - 80024d4: fab1 f181 clz r1, r1 - 80024d8: b2c9 uxtb r1, r1 - 80024da: 408b lsls r3, r1 - 80024dc: 4920 ldr r1, [pc, #128] @ (8002560 ) - 80024de: 4313 orrs r3, r2 - 80024e0: 600b str r3, [r1, #0] - 80024e2: e06c b.n 80025be - 80024e4: 2301 movs r3, #1 - 80024e6: f8c7 3138 str.w r3, [r7, #312] @ 0x138 + 8002470: f8d7 113c ldr.w r1, [r7, #316] @ 0x13c + 8002474: fab1 f181 clz r1, r1 + 8002478: b2c9 uxtb r1, r1 + 800247a: 408b lsls r3, r1 + 800247c: 4920 ldr r1, [pc, #128] @ (8002500 ) + 800247e: 4313 orrs r3, r2 + 8002480: 600b str r3, [r1, #0] + 8002482: e06c b.n 800255e + 8002484: 2301 movs r3, #1 + 8002486: f8c7 3138 str.w r3, [r7, #312] @ 0x138 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80024ea: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138 - 80024ee: fa93 f3a3 rbit r3, r3 - 80024f2: f8c7 3134 str.w r3, [r7, #308] @ 0x134 + 800248a: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138 + 800248e: fa93 f3a3 rbit r3, r3 + 8002492: f8c7 3134 str.w r3, [r7, #308] @ 0x134 return result; - 80024f6: f8d7 3134 ldr.w r3, [r7, #308] @ 0x134 + 8002496: f8d7 3134 ldr.w r3, [r7, #308] @ 0x134 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 80024fa: fab3 f383 clz r3, r3 - 80024fe: b2db uxtb r3, r3 - 8002500: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 - 8002504: f503 1384 add.w r3, r3, #1081344 @ 0x108000 - 8002508: 009b lsls r3, r3, #2 - 800250a: 461a mov r2, r3 - 800250c: 2300 movs r3, #0 - 800250e: 6013 str r3, [r2, #0] + 800249a: fab3 f383 clz r3, r3 + 800249e: b2db uxtb r3, r3 + 80024a0: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 + 80024a4: f503 1384 add.w r3, r3, #1081344 @ 0x108000 + 80024a8: 009b lsls r3, r3, #2 + 80024aa: 461a mov r2, r3 + 80024ac: 2300 movs r3, #0 + 80024ae: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002510: f7fe fbc0 bl 8000c94 - 8002514: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80024b0: f7fe fba6 bl 8000c00 + 80024b4: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8002518: e00a b.n 8002530 + 80024b8: e00a b.n 80024d0 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800251a: f7fe fbbb bl 8000c94 - 800251e: 4602 mov r2, r0 - 8002520: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002524: 1ad3 subs r3, r2, r3 - 8002526: 2b02 cmp r3, #2 - 8002528: d902 bls.n 8002530 + 80024ba: f7fe fba1 bl 8000c00 + 80024be: 4602 mov r2, r0 + 80024c0: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80024c4: 1ad3 subs r3, r2, r3 + 80024c6: 2b02 cmp r3, #2 + 80024c8: d902 bls.n 80024d0 { return HAL_TIMEOUT; - 800252a: 2303 movs r3, #3 - 800252c: f000 bd5a b.w 8002fe4 - 8002530: 2302 movs r3, #2 - 8002532: f8c7 3130 str.w r3, [r7, #304] @ 0x130 + 80024ca: 2303 movs r3, #3 + 80024cc: f000 bd5a b.w 8002f84 + 80024d0: 2302 movs r3, #2 + 80024d2: f8c7 3130 str.w r3, [r7, #304] @ 0x130 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002536: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130 - 800253a: fa93 f3a3 rbit r3, r3 - 800253e: f8c7 312c str.w r3, [r7, #300] @ 0x12c + 80024d6: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130 + 80024da: fa93 f3a3 rbit r3, r3 + 80024de: f8c7 312c str.w r3, [r7, #300] @ 0x12c return result; - 8002542: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c + 80024e2: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8002546: fab3 f383 clz r3, r3 - 800254a: b2db uxtb r3, r3 - 800254c: 095b lsrs r3, r3, #5 - 800254e: b2db uxtb r3, r3 - 8002550: f043 0301 orr.w r3, r3, #1 - 8002554: b2db uxtb r3, r3 - 8002556: 2b01 cmp r3, #1 - 8002558: d104 bne.n 8002564 - 800255a: 4b01 ldr r3, [pc, #4] @ (8002560 ) - 800255c: 681b ldr r3, [r3, #0] - 800255e: e015 b.n 800258c - 8002560: 40021000 .word 0x40021000 - 8002564: 2302 movs r3, #2 - 8002566: f8c7 3128 str.w r3, [r7, #296] @ 0x128 + 80024e6: fab3 f383 clz r3, r3 + 80024ea: b2db uxtb r3, r3 + 80024ec: 095b lsrs r3, r3, #5 + 80024ee: b2db uxtb r3, r3 + 80024f0: f043 0301 orr.w r3, r3, #1 + 80024f4: b2db uxtb r3, r3 + 80024f6: 2b01 cmp r3, #1 + 80024f8: d104 bne.n 8002504 + 80024fa: 4b01 ldr r3, [pc, #4] @ (8002500 ) + 80024fc: 681b ldr r3, [r3, #0] + 80024fe: e015 b.n 800252c + 8002500: 40021000 .word 0x40021000 + 8002504: 2302 movs r3, #2 + 8002506: f8c7 3128 str.w r3, [r7, #296] @ 0x128 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800256a: f8d7 3128 ldr.w r3, [r7, #296] @ 0x128 - 800256e: fa93 f3a3 rbit r3, r3 - 8002572: f8c7 3124 str.w r3, [r7, #292] @ 0x124 - 8002576: 2302 movs r3, #2 - 8002578: f8c7 3120 str.w r3, [r7, #288] @ 0x120 - 800257c: f8d7 3120 ldr.w r3, [r7, #288] @ 0x120 - 8002580: fa93 f3a3 rbit r3, r3 - 8002584: f8c7 311c str.w r3, [r7, #284] @ 0x11c - 8002588: 4bc8 ldr r3, [pc, #800] @ (80028ac ) - 800258a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800258c: 2202 movs r2, #2 - 800258e: f8c7 2118 str.w r2, [r7, #280] @ 0x118 - 8002592: f8d7 2118 ldr.w r2, [r7, #280] @ 0x118 - 8002596: fa92 f2a2 rbit r2, r2 - 800259a: f8c7 2114 str.w r2, [r7, #276] @ 0x114 + 800250a: f8d7 3128 ldr.w r3, [r7, #296] @ 0x128 + 800250e: fa93 f3a3 rbit r3, r3 + 8002512: f8c7 3124 str.w r3, [r7, #292] @ 0x124 + 8002516: 2302 movs r3, #2 + 8002518: f8c7 3120 str.w r3, [r7, #288] @ 0x120 + 800251c: f8d7 3120 ldr.w r3, [r7, #288] @ 0x120 + 8002520: fa93 f3a3 rbit r3, r3 + 8002524: f8c7 311c str.w r3, [r7, #284] @ 0x11c + 8002528: 4bc8 ldr r3, [pc, #800] @ (800284c ) + 800252a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800252c: 2202 movs r2, #2 + 800252e: f8c7 2118 str.w r2, [r7, #280] @ 0x118 + 8002532: f8d7 2118 ldr.w r2, [r7, #280] @ 0x118 + 8002536: fa92 f2a2 rbit r2, r2 + 800253a: f8c7 2114 str.w r2, [r7, #276] @ 0x114 return result; - 800259e: f8d7 2114 ldr.w r2, [r7, #276] @ 0x114 - 80025a2: fab2 f282 clz r2, r2 - 80025a6: b2d2 uxtb r2, r2 - 80025a8: f042 0220 orr.w r2, r2, #32 - 80025ac: b2d2 uxtb r2, r2 - 80025ae: f002 021f and.w r2, r2, #31 - 80025b2: 2101 movs r1, #1 - 80025b4: fa01 f202 lsl.w r2, r1, r2 - 80025b8: 4013 ands r3, r2 - 80025ba: 2b00 cmp r3, #0 - 80025bc: d1ad bne.n 800251a + 800253e: f8d7 2114 ldr.w r2, [r7, #276] @ 0x114 + 8002542: fab2 f282 clz r2, r2 + 8002546: b2d2 uxtb r2, r2 + 8002548: f042 0220 orr.w r2, r2, #32 + 800254c: b2d2 uxtb r2, r2 + 800254e: f002 021f and.w r2, r2, #31 + 8002552: 2101 movs r1, #1 + 8002554: fa01 f202 lsl.w r2, r1, r2 + 8002558: 4013 ands r3, r2 + 800255a: 2b00 cmp r3, #0 + 800255c: d1ad bne.n 80024ba } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80025be: f507 7300 add.w r3, r7, #512 @ 0x200 - 80025c2: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80025c6: 681b ldr r3, [r3, #0] - 80025c8: 681b ldr r3, [r3, #0] - 80025ca: f003 0308 and.w r3, r3, #8 - 80025ce: 2b00 cmp r3, #0 - 80025d0: f000 8110 beq.w 80027f4 + 800255e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002562: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002566: 681b ldr r3, [r3, #0] + 8002568: 681b ldr r3, [r3, #0] + 800256a: f003 0308 and.w r3, r3, #8 + 800256e: 2b00 cmp r3, #0 + 8002570: f000 8110 beq.w 8002794 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80025d4: f507 7300 add.w r3, r7, #512 @ 0x200 - 80025d8: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80025dc: 681b ldr r3, [r3, #0] - 80025de: 699b ldr r3, [r3, #24] - 80025e0: 2b00 cmp r3, #0 - 80025e2: d079 beq.n 80026d8 - 80025e4: 2301 movs r3, #1 - 80025e6: f8c7 3110 str.w r3, [r7, #272] @ 0x110 + 8002574: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002578: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800257c: 681b ldr r3, [r3, #0] + 800257e: 699b ldr r3, [r3, #24] + 8002580: 2b00 cmp r3, #0 + 8002582: d079 beq.n 8002678 + 8002584: 2301 movs r3, #1 + 8002586: f8c7 3110 str.w r3, [r7, #272] @ 0x110 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80025ea: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 - 80025ee: fa93 f3a3 rbit r3, r3 - 80025f2: f8c7 310c str.w r3, [r7, #268] @ 0x10c + 800258a: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110 + 800258e: fa93 f3a3 rbit r3, r3 + 8002592: f8c7 310c str.w r3, [r7, #268] @ 0x10c return result; - 80025f6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c + 8002596: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80025fa: fab3 f383 clz r3, r3 - 80025fe: b2db uxtb r3, r3 - 8002600: 461a mov r2, r3 - 8002602: 4bab ldr r3, [pc, #684] @ (80028b0 ) - 8002604: 4413 add r3, r2 - 8002606: 009b lsls r3, r3, #2 - 8002608: 461a mov r2, r3 - 800260a: 2301 movs r3, #1 - 800260c: 6013 str r3, [r2, #0] + 800259a: fab3 f383 clz r3, r3 + 800259e: b2db uxtb r3, r3 + 80025a0: 461a mov r2, r3 + 80025a2: 4bab ldr r3, [pc, #684] @ (8002850 ) + 80025a4: 4413 add r3, r2 + 80025a6: 009b lsls r3, r3, #2 + 80025a8: 461a mov r2, r3 + 80025aa: 2301 movs r3, #1 + 80025ac: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800260e: f7fe fb41 bl 8000c94 - 8002612: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80025ae: f7fe fb27 bl 8000c00 + 80025b2: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8002616: e00a b.n 800262e + 80025b6: e00a b.n 80025ce { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8002618: f7fe fb3c bl 8000c94 - 800261c: 4602 mov r2, r0 - 800261e: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002622: 1ad3 subs r3, r2, r3 - 8002624: 2b02 cmp r3, #2 - 8002626: d902 bls.n 800262e + 80025b8: f7fe fb22 bl 8000c00 + 80025bc: 4602 mov r2, r0 + 80025be: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80025c2: 1ad3 subs r3, r2, r3 + 80025c4: 2b02 cmp r3, #2 + 80025c6: d902 bls.n 80025ce { return HAL_TIMEOUT; - 8002628: 2303 movs r3, #3 - 800262a: f000 bcdb b.w 8002fe4 - 800262e: 2302 movs r3, #2 - 8002630: f8c7 3108 str.w r3, [r7, #264] @ 0x108 + 80025c8: 2303 movs r3, #3 + 80025ca: f000 bcdb b.w 8002f84 + 80025ce: 2302 movs r3, #2 + 80025d0: f8c7 3108 str.w r3, [r7, #264] @ 0x108 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002634: f8d7 3108 ldr.w r3, [r7, #264] @ 0x108 - 8002638: fa93 f3a3 rbit r3, r3 - 800263c: f8c7 3104 str.w r3, [r7, #260] @ 0x104 - 8002640: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002644: f5a3 7380 sub.w r3, r3, #256 @ 0x100 - 8002648: 2202 movs r2, #2 - 800264a: 601a str r2, [r3, #0] - 800264c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002650: f5a3 7380 sub.w r3, r3, #256 @ 0x100 - 8002654: 681b ldr r3, [r3, #0] - 8002656: fa93 f2a3 rbit r2, r3 - 800265a: f507 7300 add.w r3, r7, #512 @ 0x200 - 800265e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 - 8002662: 601a str r2, [r3, #0] - 8002664: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002668: f5a3 7384 sub.w r3, r3, #264 @ 0x108 - 800266c: 2202 movs r2, #2 - 800266e: 601a str r2, [r3, #0] - 8002670: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002674: f5a3 7384 sub.w r3, r3, #264 @ 0x108 - 8002678: 681b ldr r3, [r3, #0] - 800267a: fa93 f2a3 rbit r2, r3 - 800267e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002682: f5a3 7386 sub.w r3, r3, #268 @ 0x10c - 8002686: 601a str r2, [r3, #0] + 80025d4: f8d7 3108 ldr.w r3, [r7, #264] @ 0x108 + 80025d8: fa93 f3a3 rbit r3, r3 + 80025dc: f8c7 3104 str.w r3, [r7, #260] @ 0x104 + 80025e0: f507 7300 add.w r3, r7, #512 @ 0x200 + 80025e4: f5a3 7380 sub.w r3, r3, #256 @ 0x100 + 80025e8: 2202 movs r2, #2 + 80025ea: 601a str r2, [r3, #0] + 80025ec: f507 7300 add.w r3, r7, #512 @ 0x200 + 80025f0: f5a3 7380 sub.w r3, r3, #256 @ 0x100 + 80025f4: 681b ldr r3, [r3, #0] + 80025f6: fa93 f2a3 rbit r2, r3 + 80025fa: f507 7300 add.w r3, r7, #512 @ 0x200 + 80025fe: f5a3 7382 sub.w r3, r3, #260 @ 0x104 + 8002602: 601a str r2, [r3, #0] + 8002604: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002608: f5a3 7384 sub.w r3, r3, #264 @ 0x108 + 800260c: 2202 movs r2, #2 + 800260e: 601a str r2, [r3, #0] + 8002610: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002614: f5a3 7384 sub.w r3, r3, #264 @ 0x108 + 8002618: 681b ldr r3, [r3, #0] + 800261a: fa93 f2a3 rbit r2, r3 + 800261e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002622: f5a3 7386 sub.w r3, r3, #268 @ 0x10c + 8002626: 601a str r2, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8002688: 4b88 ldr r3, [pc, #544] @ (80028ac ) - 800268a: 6a5a ldr r2, [r3, #36] @ 0x24 - 800268c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002690: f5a3 7388 sub.w r3, r3, #272 @ 0x110 - 8002694: 2102 movs r1, #2 - 8002696: 6019 str r1, [r3, #0] - 8002698: f507 7300 add.w r3, r7, #512 @ 0x200 - 800269c: f5a3 7388 sub.w r3, r3, #272 @ 0x110 - 80026a0: 681b ldr r3, [r3, #0] - 80026a2: fa93 f1a3 rbit r1, r3 - 80026a6: f507 7300 add.w r3, r7, #512 @ 0x200 - 80026aa: f5a3 738a sub.w r3, r3, #276 @ 0x114 - 80026ae: 6019 str r1, [r3, #0] + 8002628: 4b88 ldr r3, [pc, #544] @ (800284c ) + 800262a: 6a5a ldr r2, [r3, #36] @ 0x24 + 800262c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002630: f5a3 7388 sub.w r3, r3, #272 @ 0x110 + 8002634: 2102 movs r1, #2 + 8002636: 6019 str r1, [r3, #0] + 8002638: f507 7300 add.w r3, r7, #512 @ 0x200 + 800263c: f5a3 7388 sub.w r3, r3, #272 @ 0x110 + 8002640: 681b ldr r3, [r3, #0] + 8002642: fa93 f1a3 rbit r1, r3 + 8002646: f507 7300 add.w r3, r7, #512 @ 0x200 + 800264a: f5a3 738a sub.w r3, r3, #276 @ 0x114 + 800264e: 6019 str r1, [r3, #0] return result; - 80026b0: f507 7300 add.w r3, r7, #512 @ 0x200 - 80026b4: f5a3 738a sub.w r3, r3, #276 @ 0x114 - 80026b8: 681b ldr r3, [r3, #0] - 80026ba: fab3 f383 clz r3, r3 - 80026be: b2db uxtb r3, r3 - 80026c0: f043 0360 orr.w r3, r3, #96 @ 0x60 - 80026c4: b2db uxtb r3, r3 - 80026c6: f003 031f and.w r3, r3, #31 - 80026ca: 2101 movs r1, #1 - 80026cc: fa01 f303 lsl.w r3, r1, r3 - 80026d0: 4013 ands r3, r2 - 80026d2: 2b00 cmp r3, #0 - 80026d4: d0a0 beq.n 8002618 - 80026d6: e08d b.n 80027f4 - 80026d8: f507 7300 add.w r3, r7, #512 @ 0x200 - 80026dc: f5a3 738c sub.w r3, r3, #280 @ 0x118 - 80026e0: 2201 movs r2, #1 - 80026e2: 601a str r2, [r3, #0] + 8002650: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002654: f5a3 738a sub.w r3, r3, #276 @ 0x114 + 8002658: 681b ldr r3, [r3, #0] + 800265a: fab3 f383 clz r3, r3 + 800265e: b2db uxtb r3, r3 + 8002660: f043 0360 orr.w r3, r3, #96 @ 0x60 + 8002664: b2db uxtb r3, r3 + 8002666: f003 031f and.w r3, r3, #31 + 800266a: 2101 movs r1, #1 + 800266c: fa01 f303 lsl.w r3, r1, r3 + 8002670: 4013 ands r3, r2 + 8002672: 2b00 cmp r3, #0 + 8002674: d0a0 beq.n 80025b8 + 8002676: e08d b.n 8002794 + 8002678: f507 7300 add.w r3, r7, #512 @ 0x200 + 800267c: f5a3 738c sub.w r3, r3, #280 @ 0x118 + 8002680: 2201 movs r2, #1 + 8002682: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80026e4: f507 7300 add.w r3, r7, #512 @ 0x200 - 80026e8: f5a3 738c sub.w r3, r3, #280 @ 0x118 - 80026ec: 681b ldr r3, [r3, #0] - 80026ee: fa93 f2a3 rbit r2, r3 - 80026f2: f507 7300 add.w r3, r7, #512 @ 0x200 - 80026f6: f5a3 738e sub.w r3, r3, #284 @ 0x11c - 80026fa: 601a str r2, [r3, #0] + 8002684: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002688: f5a3 738c sub.w r3, r3, #280 @ 0x118 + 800268c: 681b ldr r3, [r3, #0] + 800268e: fa93 f2a3 rbit r2, r3 + 8002692: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002696: f5a3 738e sub.w r3, r3, #284 @ 0x11c + 800269a: 601a str r2, [r3, #0] return result; - 80026fc: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002700: f5a3 738e sub.w r3, r3, #284 @ 0x11c - 8002704: 681b ldr r3, [r3, #0] + 800269c: f507 7300 add.w r3, r7, #512 @ 0x200 + 80026a0: f5a3 738e sub.w r3, r3, #284 @ 0x11c + 80026a4: 681b ldr r3, [r3, #0] } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8002706: fab3 f383 clz r3, r3 - 800270a: b2db uxtb r3, r3 - 800270c: 461a mov r2, r3 - 800270e: 4b68 ldr r3, [pc, #416] @ (80028b0 ) - 8002710: 4413 add r3, r2 - 8002712: 009b lsls r3, r3, #2 - 8002714: 461a mov r2, r3 - 8002716: 2300 movs r3, #0 - 8002718: 6013 str r3, [r2, #0] + 80026a6: fab3 f383 clz r3, r3 + 80026aa: b2db uxtb r3, r3 + 80026ac: 461a mov r2, r3 + 80026ae: 4b68 ldr r3, [pc, #416] @ (8002850 ) + 80026b0: 4413 add r3, r2 + 80026b2: 009b lsls r3, r3, #2 + 80026b4: 461a mov r2, r3 + 80026b6: 2300 movs r3, #0 + 80026b8: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800271a: f7fe fabb bl 8000c94 - 800271e: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80026ba: f7fe faa1 bl 8000c00 + 80026be: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8002722: e00a b.n 800273a + 80026c2: e00a b.n 80026da { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8002724: f7fe fab6 bl 8000c94 - 8002728: 4602 mov r2, r0 - 800272a: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 800272e: 1ad3 subs r3, r2, r3 - 8002730: 2b02 cmp r3, #2 - 8002732: d902 bls.n 800273a + 80026c4: f7fe fa9c bl 8000c00 + 80026c8: 4602 mov r2, r0 + 80026ca: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80026ce: 1ad3 subs r3, r2, r3 + 80026d0: 2b02 cmp r3, #2 + 80026d2: d902 bls.n 80026da { return HAL_TIMEOUT; - 8002734: 2303 movs r3, #3 - 8002736: f000 bc55 b.w 8002fe4 - 800273a: f507 7300 add.w r3, r7, #512 @ 0x200 - 800273e: f5a3 7390 sub.w r3, r3, #288 @ 0x120 - 8002742: 2202 movs r2, #2 - 8002744: 601a str r2, [r3, #0] + 80026d4: 2303 movs r3, #3 + 80026d6: f000 bc55 b.w 8002f84 + 80026da: f507 7300 add.w r3, r7, #512 @ 0x200 + 80026de: f5a3 7390 sub.w r3, r3, #288 @ 0x120 + 80026e2: 2202 movs r2, #2 + 80026e4: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002746: f507 7300 add.w r3, r7, #512 @ 0x200 - 800274a: f5a3 7390 sub.w r3, r3, #288 @ 0x120 - 800274e: 681b ldr r3, [r3, #0] - 8002750: fa93 f2a3 rbit r2, r3 - 8002754: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002758: f5a3 7392 sub.w r3, r3, #292 @ 0x124 - 800275c: 601a str r2, [r3, #0] - 800275e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002762: f5a3 7394 sub.w r3, r3, #296 @ 0x128 - 8002766: 2202 movs r2, #2 - 8002768: 601a str r2, [r3, #0] - 800276a: f507 7300 add.w r3, r7, #512 @ 0x200 - 800276e: f5a3 7394 sub.w r3, r3, #296 @ 0x128 - 8002772: 681b ldr r3, [r3, #0] - 8002774: fa93 f2a3 rbit r2, r3 - 8002778: f507 7300 add.w r3, r7, #512 @ 0x200 - 800277c: f5a3 7396 sub.w r3, r3, #300 @ 0x12c - 8002780: 601a str r2, [r3, #0] - 8002782: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002786: f5a3 7398 sub.w r3, r3, #304 @ 0x130 - 800278a: 2202 movs r2, #2 - 800278c: 601a str r2, [r3, #0] - 800278e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002792: f5a3 7398 sub.w r3, r3, #304 @ 0x130 - 8002796: 681b ldr r3, [r3, #0] - 8002798: fa93 f2a3 rbit r2, r3 - 800279c: f507 7300 add.w r3, r7, #512 @ 0x200 - 80027a0: f5a3 739a sub.w r3, r3, #308 @ 0x134 - 80027a4: 601a str r2, [r3, #0] + 80026e6: f507 7300 add.w r3, r7, #512 @ 0x200 + 80026ea: f5a3 7390 sub.w r3, r3, #288 @ 0x120 + 80026ee: 681b ldr r3, [r3, #0] + 80026f0: fa93 f2a3 rbit r2, r3 + 80026f4: f507 7300 add.w r3, r7, #512 @ 0x200 + 80026f8: f5a3 7392 sub.w r3, r3, #292 @ 0x124 + 80026fc: 601a str r2, [r3, #0] + 80026fe: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002702: f5a3 7394 sub.w r3, r3, #296 @ 0x128 + 8002706: 2202 movs r2, #2 + 8002708: 601a str r2, [r3, #0] + 800270a: f507 7300 add.w r3, r7, #512 @ 0x200 + 800270e: f5a3 7394 sub.w r3, r3, #296 @ 0x128 + 8002712: 681b ldr r3, [r3, #0] + 8002714: fa93 f2a3 rbit r2, r3 + 8002718: f507 7300 add.w r3, r7, #512 @ 0x200 + 800271c: f5a3 7396 sub.w r3, r3, #300 @ 0x12c + 8002720: 601a str r2, [r3, #0] + 8002722: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002726: f5a3 7398 sub.w r3, r3, #304 @ 0x130 + 800272a: 2202 movs r2, #2 + 800272c: 601a str r2, [r3, #0] + 800272e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002732: f5a3 7398 sub.w r3, r3, #304 @ 0x130 + 8002736: 681b ldr r3, [r3, #0] + 8002738: fa93 f2a3 rbit r2, r3 + 800273c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002740: f5a3 739a sub.w r3, r3, #308 @ 0x134 + 8002744: 601a str r2, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80027a6: 4b41 ldr r3, [pc, #260] @ (80028ac ) - 80027a8: 6a5a ldr r2, [r3, #36] @ 0x24 - 80027aa: f507 7300 add.w r3, r7, #512 @ 0x200 - 80027ae: f5a3 739c sub.w r3, r3, #312 @ 0x138 - 80027b2: 2102 movs r1, #2 - 80027b4: 6019 str r1, [r3, #0] - 80027b6: f507 7300 add.w r3, r7, #512 @ 0x200 - 80027ba: f5a3 739c sub.w r3, r3, #312 @ 0x138 - 80027be: 681b ldr r3, [r3, #0] - 80027c0: fa93 f1a3 rbit r1, r3 - 80027c4: f507 7300 add.w r3, r7, #512 @ 0x200 - 80027c8: f5a3 739e sub.w r3, r3, #316 @ 0x13c - 80027cc: 6019 str r1, [r3, #0] + 8002746: 4b41 ldr r3, [pc, #260] @ (800284c ) + 8002748: 6a5a ldr r2, [r3, #36] @ 0x24 + 800274a: f507 7300 add.w r3, r7, #512 @ 0x200 + 800274e: f5a3 739c sub.w r3, r3, #312 @ 0x138 + 8002752: 2102 movs r1, #2 + 8002754: 6019 str r1, [r3, #0] + 8002756: f507 7300 add.w r3, r7, #512 @ 0x200 + 800275a: f5a3 739c sub.w r3, r3, #312 @ 0x138 + 800275e: 681b ldr r3, [r3, #0] + 8002760: fa93 f1a3 rbit r1, r3 + 8002764: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002768: f5a3 739e sub.w r3, r3, #316 @ 0x13c + 800276c: 6019 str r1, [r3, #0] return result; - 80027ce: f507 7300 add.w r3, r7, #512 @ 0x200 - 80027d2: f5a3 739e sub.w r3, r3, #316 @ 0x13c - 80027d6: 681b ldr r3, [r3, #0] - 80027d8: fab3 f383 clz r3, r3 - 80027dc: b2db uxtb r3, r3 - 80027de: f043 0360 orr.w r3, r3, #96 @ 0x60 - 80027e2: b2db uxtb r3, r3 - 80027e4: f003 031f and.w r3, r3, #31 - 80027e8: 2101 movs r1, #1 - 80027ea: fa01 f303 lsl.w r3, r1, r3 - 80027ee: 4013 ands r3, r2 - 80027f0: 2b00 cmp r3, #0 - 80027f2: d197 bne.n 8002724 + 800276e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002772: f5a3 739e sub.w r3, r3, #316 @ 0x13c + 8002776: 681b ldr r3, [r3, #0] + 8002778: fab3 f383 clz r3, r3 + 800277c: b2db uxtb r3, r3 + 800277e: f043 0360 orr.w r3, r3, #96 @ 0x60 + 8002782: b2db uxtb r3, r3 + 8002784: f003 031f and.w r3, r3, #31 + 8002788: 2101 movs r1, #1 + 800278a: fa01 f303 lsl.w r3, r1, r3 + 800278e: 4013 ands r3, r2 + 8002790: 2b00 cmp r3, #0 + 8002792: d197 bne.n 80026c4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 80027f4: f507 7300 add.w r3, r7, #512 @ 0x200 - 80027f8: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80027fc: 681b ldr r3, [r3, #0] - 80027fe: 681b ldr r3, [r3, #0] - 8002800: f003 0304 and.w r3, r3, #4 - 8002804: 2b00 cmp r3, #0 - 8002806: f000 81a1 beq.w 8002b4c + 8002794: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002798: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800279c: 681b ldr r3, [r3, #0] + 800279e: 681b ldr r3, [r3, #0] + 80027a0: f003 0304 and.w r3, r3, #4 + 80027a4: 2b00 cmp r3, #0 + 80027a6: f000 81a1 beq.w 8002aec { FlagStatus pwrclkchanged = RESET; - 800280a: 2300 movs r3, #0 - 800280c: f887 31ff strb.w r3, [r7, #511] @ 0x1ff + 80027aa: 2300 movs r3, #0 + 80027ac: f887 31ff strb.w r3, [r7, #511] @ 0x1ff /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8002810: 4b26 ldr r3, [pc, #152] @ (80028ac ) - 8002812: 69db ldr r3, [r3, #28] - 8002814: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002818: 2b00 cmp r3, #0 - 800281a: d116 bne.n 800284a + 80027b0: 4b26 ldr r3, [pc, #152] @ (800284c ) + 80027b2: 69db ldr r3, [r3, #28] + 80027b4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80027b8: 2b00 cmp r3, #0 + 80027ba: d116 bne.n 80027ea { __HAL_RCC_PWR_CLK_ENABLE(); - 800281c: 4b23 ldr r3, [pc, #140] @ (80028ac ) - 800281e: 69db ldr r3, [r3, #28] - 8002820: 4a22 ldr r2, [pc, #136] @ (80028ac ) - 8002822: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8002826: 61d3 str r3, [r2, #28] - 8002828: 4b20 ldr r3, [pc, #128] @ (80028ac ) - 800282a: 69db ldr r3, [r3, #28] - 800282c: f003 5280 and.w r2, r3, #268435456 @ 0x10000000 - 8002830: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002834: f5a3 73fc sub.w r3, r3, #504 @ 0x1f8 - 8002838: 601a str r2, [r3, #0] - 800283a: f507 7300 add.w r3, r7, #512 @ 0x200 - 800283e: f5a3 73fc sub.w r3, r3, #504 @ 0x1f8 - 8002842: 681b ldr r3, [r3, #0] + 80027bc: 4b23 ldr r3, [pc, #140] @ (800284c ) + 80027be: 69db ldr r3, [r3, #28] + 80027c0: 4a22 ldr r2, [pc, #136] @ (800284c ) + 80027c2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80027c6: 61d3 str r3, [r2, #28] + 80027c8: 4b20 ldr r3, [pc, #128] @ (800284c ) + 80027ca: 69db ldr r3, [r3, #28] + 80027cc: f003 5280 and.w r2, r3, #268435456 @ 0x10000000 + 80027d0: f507 7300 add.w r3, r7, #512 @ 0x200 + 80027d4: f5a3 73fc sub.w r3, r3, #504 @ 0x1f8 + 80027d8: 601a str r2, [r3, #0] + 80027da: f507 7300 add.w r3, r7, #512 @ 0x200 + 80027de: f5a3 73fc sub.w r3, r3, #504 @ 0x1f8 + 80027e2: 681b ldr r3, [r3, #0] pwrclkchanged = SET; - 8002844: 2301 movs r3, #1 - 8002846: f887 31ff strb.w r3, [r7, #511] @ 0x1ff + 80027e4: 2301 movs r3, #1 + 80027e6: f887 31ff strb.w r3, [r7, #511] @ 0x1ff } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800284a: 4b1a ldr r3, [pc, #104] @ (80028b4 ) - 800284c: 681b ldr r3, [r3, #0] - 800284e: f403 7380 and.w r3, r3, #256 @ 0x100 - 8002852: 2b00 cmp r3, #0 - 8002854: d11a bne.n 800288c + 80027ea: 4b1a ldr r3, [pc, #104] @ (8002854 ) + 80027ec: 681b ldr r3, [r3, #0] + 80027ee: f403 7380 and.w r3, r3, #256 @ 0x100 + 80027f2: 2b00 cmp r3, #0 + 80027f4: d11a bne.n 800282c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8002856: 4b17 ldr r3, [pc, #92] @ (80028b4 ) - 8002858: 681b ldr r3, [r3, #0] - 800285a: 4a16 ldr r2, [pc, #88] @ (80028b4 ) - 800285c: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8002860: 6013 str r3, [r2, #0] + 80027f6: 4b17 ldr r3, [pc, #92] @ (8002854 ) + 80027f8: 681b ldr r3, [r3, #0] + 80027fa: 4a16 ldr r2, [pc, #88] @ (8002854 ) + 80027fc: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8002800: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8002862: f7fe fa17 bl 8000c94 - 8002866: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 8002802: f7fe f9fd bl 8000c00 + 8002806: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800286a: e009 b.n 8002880 + 800280a: e009 b.n 8002820 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 800286c: f7fe fa12 bl 8000c94 - 8002870: 4602 mov r2, r0 - 8002872: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002876: 1ad3 subs r3, r2, r3 - 8002878: 2b64 cmp r3, #100 @ 0x64 - 800287a: d901 bls.n 8002880 + 800280c: f7fe f9f8 bl 8000c00 + 8002810: 4602 mov r2, r0 + 8002812: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 8002816: 1ad3 subs r3, r2, r3 + 8002818: 2b64 cmp r3, #100 @ 0x64 + 800281a: d901 bls.n 8002820 { return HAL_TIMEOUT; - 800287c: 2303 movs r3, #3 - 800287e: e3b1 b.n 8002fe4 + 800281c: 2303 movs r3, #3 + 800281e: e3b1 b.n 8002f84 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002880: 4b0c ldr r3, [pc, #48] @ (80028b4 ) - 8002882: 681b ldr r3, [r3, #0] - 8002884: f403 7380 and.w r3, r3, #256 @ 0x100 - 8002888: 2b00 cmp r3, #0 - 800288a: d0ef beq.n 800286c + 8002820: 4b0c ldr r3, [pc, #48] @ (8002854 ) + 8002822: 681b ldr r3, [r3, #0] + 8002824: f403 7380 and.w r3, r3, #256 @ 0x100 + 8002828: 2b00 cmp r3, #0 + 800282a: d0ef beq.n 800280c } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 800288c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002890: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002894: 681b ldr r3, [r3, #0] - 8002896: 68db ldr r3, [r3, #12] - 8002898: 2b01 cmp r3, #1 - 800289a: d10d bne.n 80028b8 - 800289c: 4b03 ldr r3, [pc, #12] @ (80028ac ) - 800289e: 6a1b ldr r3, [r3, #32] - 80028a0: 4a02 ldr r2, [pc, #8] @ (80028ac ) - 80028a2: f043 0301 orr.w r3, r3, #1 - 80028a6: 6213 str r3, [r2, #32] - 80028a8: e03c b.n 8002924 - 80028aa: bf00 nop - 80028ac: 40021000 .word 0x40021000 - 80028b0: 10908120 .word 0x10908120 - 80028b4: 40007000 .word 0x40007000 - 80028b8: f507 7300 add.w r3, r7, #512 @ 0x200 - 80028bc: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80028c0: 681b ldr r3, [r3, #0] - 80028c2: 68db ldr r3, [r3, #12] - 80028c4: 2b00 cmp r3, #0 - 80028c6: d10c bne.n 80028e2 - 80028c8: 4bc1 ldr r3, [pc, #772] @ (8002bd0 ) - 80028ca: 6a1b ldr r3, [r3, #32] - 80028cc: 4ac0 ldr r2, [pc, #768] @ (8002bd0 ) - 80028ce: f023 0301 bic.w r3, r3, #1 - 80028d2: 6213 str r3, [r2, #32] - 80028d4: 4bbe ldr r3, [pc, #760] @ (8002bd0 ) - 80028d6: 6a1b ldr r3, [r3, #32] - 80028d8: 4abd ldr r2, [pc, #756] @ (8002bd0 ) - 80028da: f023 0304 bic.w r3, r3, #4 - 80028de: 6213 str r3, [r2, #32] - 80028e0: e020 b.n 8002924 - 80028e2: f507 7300 add.w r3, r7, #512 @ 0x200 - 80028e6: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 80028ea: 681b ldr r3, [r3, #0] - 80028ec: 68db ldr r3, [r3, #12] - 80028ee: 2b05 cmp r3, #5 - 80028f0: d10c bne.n 800290c - 80028f2: 4bb7 ldr r3, [pc, #732] @ (8002bd0 ) - 80028f4: 6a1b ldr r3, [r3, #32] - 80028f6: 4ab6 ldr r2, [pc, #728] @ (8002bd0 ) - 80028f8: f043 0304 orr.w r3, r3, #4 - 80028fc: 6213 str r3, [r2, #32] - 80028fe: 4bb4 ldr r3, [pc, #720] @ (8002bd0 ) - 8002900: 6a1b ldr r3, [r3, #32] - 8002902: 4ab3 ldr r2, [pc, #716] @ (8002bd0 ) - 8002904: f043 0301 orr.w r3, r3, #1 - 8002908: 6213 str r3, [r2, #32] - 800290a: e00b b.n 8002924 - 800290c: 4bb0 ldr r3, [pc, #704] @ (8002bd0 ) - 800290e: 6a1b ldr r3, [r3, #32] - 8002910: 4aaf ldr r2, [pc, #700] @ (8002bd0 ) - 8002912: f023 0301 bic.w r3, r3, #1 - 8002916: 6213 str r3, [r2, #32] - 8002918: 4bad ldr r3, [pc, #692] @ (8002bd0 ) - 800291a: 6a1b ldr r3, [r3, #32] - 800291c: 4aac ldr r2, [pc, #688] @ (8002bd0 ) - 800291e: f023 0304 bic.w r3, r3, #4 - 8002922: 6213 str r3, [r2, #32] + 800282c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002830: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002834: 681b ldr r3, [r3, #0] + 8002836: 68db ldr r3, [r3, #12] + 8002838: 2b01 cmp r3, #1 + 800283a: d10d bne.n 8002858 + 800283c: 4b03 ldr r3, [pc, #12] @ (800284c ) + 800283e: 6a1b ldr r3, [r3, #32] + 8002840: 4a02 ldr r2, [pc, #8] @ (800284c ) + 8002842: f043 0301 orr.w r3, r3, #1 + 8002846: 6213 str r3, [r2, #32] + 8002848: e03c b.n 80028c4 + 800284a: bf00 nop + 800284c: 40021000 .word 0x40021000 + 8002850: 10908120 .word 0x10908120 + 8002854: 40007000 .word 0x40007000 + 8002858: f507 7300 add.w r3, r7, #512 @ 0x200 + 800285c: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002860: 681b ldr r3, [r3, #0] + 8002862: 68db ldr r3, [r3, #12] + 8002864: 2b00 cmp r3, #0 + 8002866: d10c bne.n 8002882 + 8002868: 4bc1 ldr r3, [pc, #772] @ (8002b70 ) + 800286a: 6a1b ldr r3, [r3, #32] + 800286c: 4ac0 ldr r2, [pc, #768] @ (8002b70 ) + 800286e: f023 0301 bic.w r3, r3, #1 + 8002872: 6213 str r3, [r2, #32] + 8002874: 4bbe ldr r3, [pc, #760] @ (8002b70 ) + 8002876: 6a1b ldr r3, [r3, #32] + 8002878: 4abd ldr r2, [pc, #756] @ (8002b70 ) + 800287a: f023 0304 bic.w r3, r3, #4 + 800287e: 6213 str r3, [r2, #32] + 8002880: e020 b.n 80028c4 + 8002882: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002886: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 800288a: 681b ldr r3, [r3, #0] + 800288c: 68db ldr r3, [r3, #12] + 800288e: 2b05 cmp r3, #5 + 8002890: d10c bne.n 80028ac + 8002892: 4bb7 ldr r3, [pc, #732] @ (8002b70 ) + 8002894: 6a1b ldr r3, [r3, #32] + 8002896: 4ab6 ldr r2, [pc, #728] @ (8002b70 ) + 8002898: f043 0304 orr.w r3, r3, #4 + 800289c: 6213 str r3, [r2, #32] + 800289e: 4bb4 ldr r3, [pc, #720] @ (8002b70 ) + 80028a0: 6a1b ldr r3, [r3, #32] + 80028a2: 4ab3 ldr r2, [pc, #716] @ (8002b70 ) + 80028a4: f043 0301 orr.w r3, r3, #1 + 80028a8: 6213 str r3, [r2, #32] + 80028aa: e00b b.n 80028c4 + 80028ac: 4bb0 ldr r3, [pc, #704] @ (8002b70 ) + 80028ae: 6a1b ldr r3, [r3, #32] + 80028b0: 4aaf ldr r2, [pc, #700] @ (8002b70 ) + 80028b2: f023 0301 bic.w r3, r3, #1 + 80028b6: 6213 str r3, [r2, #32] + 80028b8: 4bad ldr r3, [pc, #692] @ (8002b70 ) + 80028ba: 6a1b ldr r3, [r3, #32] + 80028bc: 4aac ldr r2, [pc, #688] @ (8002b70 ) + 80028be: f023 0304 bic.w r3, r3, #4 + 80028c2: 6213 str r3, [r2, #32] /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8002924: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002928: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 800292c: 681b ldr r3, [r3, #0] - 800292e: 68db ldr r3, [r3, #12] - 8002930: 2b00 cmp r3, #0 - 8002932: f000 8081 beq.w 8002a38 + 80028c4: f507 7300 add.w r3, r7, #512 @ 0x200 + 80028c8: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 80028cc: 681b ldr r3, [r3, #0] + 80028ce: 68db ldr r3, [r3, #12] + 80028d0: 2b00 cmp r3, #0 + 80028d2: f000 8081 beq.w 80029d8 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002936: f7fe f9ad bl 8000c94 - 800293a: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80028d6: f7fe f993 bl 8000c00 + 80028da: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800293e: e00b b.n 8002958 + 80028de: e00b b.n 80028f8 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8002940: f7fe f9a8 bl 8000c94 - 8002944: 4602 mov r2, r0 - 8002946: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 800294a: 1ad3 subs r3, r2, r3 - 800294c: f241 3288 movw r2, #5000 @ 0x1388 - 8002950: 4293 cmp r3, r2 - 8002952: d901 bls.n 8002958 + 80028e0: f7fe f98e bl 8000c00 + 80028e4: 4602 mov r2, r0 + 80028e6: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80028ea: 1ad3 subs r3, r2, r3 + 80028ec: f241 3288 movw r2, #5000 @ 0x1388 + 80028f0: 4293 cmp r3, r2 + 80028f2: d901 bls.n 80028f8 { return HAL_TIMEOUT; - 8002954: 2303 movs r3, #3 - 8002956: e345 b.n 8002fe4 - 8002958: f507 7300 add.w r3, r7, #512 @ 0x200 - 800295c: f5a3 73a0 sub.w r3, r3, #320 @ 0x140 - 8002960: 2202 movs r2, #2 - 8002962: 601a str r2, [r3, #0] + 80028f4: 2303 movs r3, #3 + 80028f6: e345 b.n 8002f84 + 80028f8: f507 7300 add.w r3, r7, #512 @ 0x200 + 80028fc: f5a3 73a0 sub.w r3, r3, #320 @ 0x140 + 8002900: 2202 movs r2, #2 + 8002902: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002964: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002968: f5a3 73a0 sub.w r3, r3, #320 @ 0x140 - 800296c: 681b ldr r3, [r3, #0] - 800296e: fa93 f2a3 rbit r2, r3 - 8002972: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002976: f5a3 73a2 sub.w r3, r3, #324 @ 0x144 - 800297a: 601a str r2, [r3, #0] - 800297c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002980: f5a3 73a4 sub.w r3, r3, #328 @ 0x148 - 8002984: 2202 movs r2, #2 - 8002986: 601a str r2, [r3, #0] - 8002988: f507 7300 add.w r3, r7, #512 @ 0x200 - 800298c: f5a3 73a4 sub.w r3, r3, #328 @ 0x148 - 8002990: 681b ldr r3, [r3, #0] - 8002992: fa93 f2a3 rbit r2, r3 - 8002996: f507 7300 add.w r3, r7, #512 @ 0x200 - 800299a: f5a3 73a6 sub.w r3, r3, #332 @ 0x14c - 800299e: 601a str r2, [r3, #0] + 8002904: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002908: f5a3 73a0 sub.w r3, r3, #320 @ 0x140 + 800290c: 681b ldr r3, [r3, #0] + 800290e: fa93 f2a3 rbit r2, r3 + 8002912: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002916: f5a3 73a2 sub.w r3, r3, #324 @ 0x144 + 800291a: 601a str r2, [r3, #0] + 800291c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002920: f5a3 73a4 sub.w r3, r3, #328 @ 0x148 + 8002924: 2202 movs r2, #2 + 8002926: 601a str r2, [r3, #0] + 8002928: f507 7300 add.w r3, r7, #512 @ 0x200 + 800292c: f5a3 73a4 sub.w r3, r3, #328 @ 0x148 + 8002930: 681b ldr r3, [r3, #0] + 8002932: fa93 f2a3 rbit r2, r3 + 8002936: f507 7300 add.w r3, r7, #512 @ 0x200 + 800293a: f5a3 73a6 sub.w r3, r3, #332 @ 0x14c + 800293e: 601a str r2, [r3, #0] return result; - 80029a0: f507 7300 add.w r3, r7, #512 @ 0x200 - 80029a4: f5a3 73a6 sub.w r3, r3, #332 @ 0x14c - 80029a8: 681b ldr r3, [r3, #0] + 8002940: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002944: f5a3 73a6 sub.w r3, r3, #332 @ 0x14c + 8002948: 681b ldr r3, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80029aa: fab3 f383 clz r3, r3 - 80029ae: b2db uxtb r3, r3 - 80029b0: 095b lsrs r3, r3, #5 - 80029b2: b2db uxtb r3, r3 - 80029b4: f043 0302 orr.w r3, r3, #2 - 80029b8: b2db uxtb r3, r3 - 80029ba: 2b02 cmp r3, #2 - 80029bc: d102 bne.n 80029c4 - 80029be: 4b84 ldr r3, [pc, #528] @ (8002bd0 ) - 80029c0: 6a1b ldr r3, [r3, #32] - 80029c2: e013 b.n 80029ec - 80029c4: f507 7300 add.w r3, r7, #512 @ 0x200 - 80029c8: f5a3 73a8 sub.w r3, r3, #336 @ 0x150 - 80029cc: 2202 movs r2, #2 - 80029ce: 601a str r2, [r3, #0] + 800294a: fab3 f383 clz r3, r3 + 800294e: b2db uxtb r3, r3 + 8002950: 095b lsrs r3, r3, #5 + 8002952: b2db uxtb r3, r3 + 8002954: f043 0302 orr.w r3, r3, #2 + 8002958: b2db uxtb r3, r3 + 800295a: 2b02 cmp r3, #2 + 800295c: d102 bne.n 8002964 + 800295e: 4b84 ldr r3, [pc, #528] @ (8002b70 ) + 8002960: 6a1b ldr r3, [r3, #32] + 8002962: e013 b.n 800298c + 8002964: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002968: f5a3 73a8 sub.w r3, r3, #336 @ 0x150 + 800296c: 2202 movs r2, #2 + 800296e: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80029d0: f507 7300 add.w r3, r7, #512 @ 0x200 - 80029d4: f5a3 73a8 sub.w r3, r3, #336 @ 0x150 - 80029d8: 681b ldr r3, [r3, #0] - 80029da: fa93 f2a3 rbit r2, r3 - 80029de: f507 7300 add.w r3, r7, #512 @ 0x200 - 80029e2: f5a3 73aa sub.w r3, r3, #340 @ 0x154 - 80029e6: 601a str r2, [r3, #0] - 80029e8: 4b79 ldr r3, [pc, #484] @ (8002bd0 ) - 80029ea: 6a5b ldr r3, [r3, #36] @ 0x24 - 80029ec: f507 7200 add.w r2, r7, #512 @ 0x200 - 80029f0: f5a2 72ac sub.w r2, r2, #344 @ 0x158 - 80029f4: 2102 movs r1, #2 - 80029f6: 6011 str r1, [r2, #0] - 80029f8: f507 7200 add.w r2, r7, #512 @ 0x200 - 80029fc: f5a2 72ac sub.w r2, r2, #344 @ 0x158 - 8002a00: 6812 ldr r2, [r2, #0] - 8002a02: fa92 f1a2 rbit r1, r2 - 8002a06: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002a0a: f5a2 72ae sub.w r2, r2, #348 @ 0x15c - 8002a0e: 6011 str r1, [r2, #0] + 8002970: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002974: f5a3 73a8 sub.w r3, r3, #336 @ 0x150 + 8002978: 681b ldr r3, [r3, #0] + 800297a: fa93 f2a3 rbit r2, r3 + 800297e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002982: f5a3 73aa sub.w r3, r3, #340 @ 0x154 + 8002986: 601a str r2, [r3, #0] + 8002988: 4b79 ldr r3, [pc, #484] @ (8002b70 ) + 800298a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800298c: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002990: f5a2 72ac sub.w r2, r2, #344 @ 0x158 + 8002994: 2102 movs r1, #2 + 8002996: 6011 str r1, [r2, #0] + 8002998: f507 7200 add.w r2, r7, #512 @ 0x200 + 800299c: f5a2 72ac sub.w r2, r2, #344 @ 0x158 + 80029a0: 6812 ldr r2, [r2, #0] + 80029a2: fa92 f1a2 rbit r1, r2 + 80029a6: f507 7200 add.w r2, r7, #512 @ 0x200 + 80029aa: f5a2 72ae sub.w r2, r2, #348 @ 0x15c + 80029ae: 6011 str r1, [r2, #0] return result; - 8002a10: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002a14: f5a2 72ae sub.w r2, r2, #348 @ 0x15c - 8002a18: 6812 ldr r2, [r2, #0] - 8002a1a: fab2 f282 clz r2, r2 - 8002a1e: b2d2 uxtb r2, r2 - 8002a20: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8002a24: b2d2 uxtb r2, r2 - 8002a26: f002 021f and.w r2, r2, #31 - 8002a2a: 2101 movs r1, #1 - 8002a2c: fa01 f202 lsl.w r2, r1, r2 - 8002a30: 4013 ands r3, r2 - 8002a32: 2b00 cmp r3, #0 - 8002a34: d084 beq.n 8002940 - 8002a36: e07f b.n 8002b38 + 80029b0: f507 7200 add.w r2, r7, #512 @ 0x200 + 80029b4: f5a2 72ae sub.w r2, r2, #348 @ 0x15c + 80029b8: 6812 ldr r2, [r2, #0] + 80029ba: fab2 f282 clz r2, r2 + 80029be: b2d2 uxtb r2, r2 + 80029c0: f042 0240 orr.w r2, r2, #64 @ 0x40 + 80029c4: b2d2 uxtb r2, r2 + 80029c6: f002 021f and.w r2, r2, #31 + 80029ca: 2101 movs r1, #1 + 80029cc: fa01 f202 lsl.w r2, r1, r2 + 80029d0: 4013 ands r3, r2 + 80029d2: 2b00 cmp r3, #0 + 80029d4: d084 beq.n 80028e0 + 80029d6: e07f b.n 8002ad8 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002a38: f7fe f92c bl 8000c94 - 8002a3c: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 80029d8: f7fe f912 bl 8000c00 + 80029dc: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8002a40: e00b b.n 8002a5a + 80029e0: e00b b.n 80029fa { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8002a42: f7fe f927 bl 8000c94 - 8002a46: 4602 mov r2, r0 - 8002a48: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002a4c: 1ad3 subs r3, r2, r3 - 8002a4e: f241 3288 movw r2, #5000 @ 0x1388 - 8002a52: 4293 cmp r3, r2 - 8002a54: d901 bls.n 8002a5a + 80029e2: f7fe f90d bl 8000c00 + 80029e6: 4602 mov r2, r0 + 80029e8: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 80029ec: 1ad3 subs r3, r2, r3 + 80029ee: f241 3288 movw r2, #5000 @ 0x1388 + 80029f2: 4293 cmp r3, r2 + 80029f4: d901 bls.n 80029fa { return HAL_TIMEOUT; - 8002a56: 2303 movs r3, #3 - 8002a58: e2c4 b.n 8002fe4 - 8002a5a: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002a5e: f5a3 73b0 sub.w r3, r3, #352 @ 0x160 - 8002a62: 2202 movs r2, #2 - 8002a64: 601a str r2, [r3, #0] + 80029f6: 2303 movs r3, #3 + 80029f8: e2c4 b.n 8002f84 + 80029fa: f507 7300 add.w r3, r7, #512 @ 0x200 + 80029fe: f5a3 73b0 sub.w r3, r3, #352 @ 0x160 + 8002a02: 2202 movs r2, #2 + 8002a04: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002a66: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002a6a: f5a3 73b0 sub.w r3, r3, #352 @ 0x160 - 8002a6e: 681b ldr r3, [r3, #0] - 8002a70: fa93 f2a3 rbit r2, r3 - 8002a74: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002a78: f5a3 73b2 sub.w r3, r3, #356 @ 0x164 - 8002a7c: 601a str r2, [r3, #0] - 8002a7e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002a82: f5a3 73b4 sub.w r3, r3, #360 @ 0x168 - 8002a86: 2202 movs r2, #2 - 8002a88: 601a str r2, [r3, #0] - 8002a8a: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002a8e: f5a3 73b4 sub.w r3, r3, #360 @ 0x168 - 8002a92: 681b ldr r3, [r3, #0] - 8002a94: fa93 f2a3 rbit r2, r3 - 8002a98: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002a9c: f5a3 73b6 sub.w r3, r3, #364 @ 0x16c - 8002aa0: 601a str r2, [r3, #0] + 8002a06: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a0a: f5a3 73b0 sub.w r3, r3, #352 @ 0x160 + 8002a0e: 681b ldr r3, [r3, #0] + 8002a10: fa93 f2a3 rbit r2, r3 + 8002a14: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a18: f5a3 73b2 sub.w r3, r3, #356 @ 0x164 + 8002a1c: 601a str r2, [r3, #0] + 8002a1e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a22: f5a3 73b4 sub.w r3, r3, #360 @ 0x168 + 8002a26: 2202 movs r2, #2 + 8002a28: 601a str r2, [r3, #0] + 8002a2a: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a2e: f5a3 73b4 sub.w r3, r3, #360 @ 0x168 + 8002a32: 681b ldr r3, [r3, #0] + 8002a34: fa93 f2a3 rbit r2, r3 + 8002a38: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a3c: f5a3 73b6 sub.w r3, r3, #364 @ 0x16c + 8002a40: 601a str r2, [r3, #0] return result; - 8002aa2: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002aa6: f5a3 73b6 sub.w r3, r3, #364 @ 0x16c - 8002aaa: 681b ldr r3, [r3, #0] + 8002a42: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a46: f5a3 73b6 sub.w r3, r3, #364 @ 0x16c + 8002a4a: 681b ldr r3, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8002aac: fab3 f383 clz r3, r3 - 8002ab0: b2db uxtb r3, r3 - 8002ab2: 095b lsrs r3, r3, #5 - 8002ab4: b2db uxtb r3, r3 - 8002ab6: f043 0302 orr.w r3, r3, #2 - 8002aba: b2db uxtb r3, r3 - 8002abc: 2b02 cmp r3, #2 - 8002abe: d102 bne.n 8002ac6 - 8002ac0: 4b43 ldr r3, [pc, #268] @ (8002bd0 ) - 8002ac2: 6a1b ldr r3, [r3, #32] - 8002ac4: e013 b.n 8002aee - 8002ac6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002aca: f5a3 73b8 sub.w r3, r3, #368 @ 0x170 - 8002ace: 2202 movs r2, #2 - 8002ad0: 601a str r2, [r3, #0] + 8002a4c: fab3 f383 clz r3, r3 + 8002a50: b2db uxtb r3, r3 + 8002a52: 095b lsrs r3, r3, #5 + 8002a54: b2db uxtb r3, r3 + 8002a56: f043 0302 orr.w r3, r3, #2 + 8002a5a: b2db uxtb r3, r3 + 8002a5c: 2b02 cmp r3, #2 + 8002a5e: d102 bne.n 8002a66 + 8002a60: 4b43 ldr r3, [pc, #268] @ (8002b70 ) + 8002a62: 6a1b ldr r3, [r3, #32] + 8002a64: e013 b.n 8002a8e + 8002a66: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a6a: f5a3 73b8 sub.w r3, r3, #368 @ 0x170 + 8002a6e: 2202 movs r2, #2 + 8002a70: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002ad2: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ad6: f5a3 73b8 sub.w r3, r3, #368 @ 0x170 - 8002ada: 681b ldr r3, [r3, #0] - 8002adc: fa93 f2a3 rbit r2, r3 - 8002ae0: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ae4: f5a3 73ba sub.w r3, r3, #372 @ 0x174 - 8002ae8: 601a str r2, [r3, #0] - 8002aea: 4b39 ldr r3, [pc, #228] @ (8002bd0 ) - 8002aec: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002aee: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002af2: f5a2 72bc sub.w r2, r2, #376 @ 0x178 - 8002af6: 2102 movs r1, #2 - 8002af8: 6011 str r1, [r2, #0] - 8002afa: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002afe: f5a2 72bc sub.w r2, r2, #376 @ 0x178 - 8002b02: 6812 ldr r2, [r2, #0] - 8002b04: fa92 f1a2 rbit r1, r2 - 8002b08: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002b0c: f5a2 72be sub.w r2, r2, #380 @ 0x17c - 8002b10: 6011 str r1, [r2, #0] + 8002a72: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a76: f5a3 73b8 sub.w r3, r3, #368 @ 0x170 + 8002a7a: 681b ldr r3, [r3, #0] + 8002a7c: fa93 f2a3 rbit r2, r3 + 8002a80: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002a84: f5a3 73ba sub.w r3, r3, #372 @ 0x174 + 8002a88: 601a str r2, [r3, #0] + 8002a8a: 4b39 ldr r3, [pc, #228] @ (8002b70 ) + 8002a8c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002a8e: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002a92: f5a2 72bc sub.w r2, r2, #376 @ 0x178 + 8002a96: 2102 movs r1, #2 + 8002a98: 6011 str r1, [r2, #0] + 8002a9a: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002a9e: f5a2 72bc sub.w r2, r2, #376 @ 0x178 + 8002aa2: 6812 ldr r2, [r2, #0] + 8002aa4: fa92 f1a2 rbit r1, r2 + 8002aa8: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002aac: f5a2 72be sub.w r2, r2, #380 @ 0x17c + 8002ab0: 6011 str r1, [r2, #0] return result; - 8002b12: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002b16: f5a2 72be sub.w r2, r2, #380 @ 0x17c - 8002b1a: 6812 ldr r2, [r2, #0] - 8002b1c: fab2 f282 clz r2, r2 - 8002b20: b2d2 uxtb r2, r2 - 8002b22: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8002b26: b2d2 uxtb r2, r2 - 8002b28: f002 021f and.w r2, r2, #31 - 8002b2c: 2101 movs r1, #1 - 8002b2e: fa01 f202 lsl.w r2, r1, r2 - 8002b32: 4013 ands r3, r2 - 8002b34: 2b00 cmp r3, #0 - 8002b36: d184 bne.n 8002a42 + 8002ab2: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002ab6: f5a2 72be sub.w r2, r2, #380 @ 0x17c + 8002aba: 6812 ldr r2, [r2, #0] + 8002abc: fab2 f282 clz r2, r2 + 8002ac0: b2d2 uxtb r2, r2 + 8002ac2: f042 0240 orr.w r2, r2, #64 @ 0x40 + 8002ac6: b2d2 uxtb r2, r2 + 8002ac8: f002 021f and.w r2, r2, #31 + 8002acc: 2101 movs r1, #1 + 8002ace: fa01 f202 lsl.w r2, r1, r2 + 8002ad2: 4013 ands r3, r2 + 8002ad4: 2b00 cmp r3, #0 + 8002ad6: d184 bne.n 80029e2 } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 8002b38: f897 31ff ldrb.w r3, [r7, #511] @ 0x1ff - 8002b3c: 2b01 cmp r3, #1 - 8002b3e: d105 bne.n 8002b4c + 8002ad8: f897 31ff ldrb.w r3, [r7, #511] @ 0x1ff + 8002adc: 2b01 cmp r3, #1 + 8002ade: d105 bne.n 8002aec { __HAL_RCC_PWR_CLK_DISABLE(); - 8002b40: 4b23 ldr r3, [pc, #140] @ (8002bd0 ) - 8002b42: 69db ldr r3, [r3, #28] - 8002b44: 4a22 ldr r2, [pc, #136] @ (8002bd0 ) - 8002b46: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8002b4a: 61d3 str r3, [r2, #28] + 8002ae0: 4b23 ldr r3, [pc, #140] @ (8002b70 ) + 8002ae2: 69db ldr r3, [r3, #28] + 8002ae4: 4a22 ldr r2, [pc, #136] @ (8002b70 ) + 8002ae6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8002aea: 61d3 str r3, [r2, #28] } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8002b4c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002b50: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002b54: 681b ldr r3, [r3, #0] - 8002b56: 69db ldr r3, [r3, #28] - 8002b58: 2b00 cmp r3, #0 - 8002b5a: f000 8242 beq.w 8002fe2 + 8002aec: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002af0: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002af4: 681b ldr r3, [r3, #0] + 8002af6: 69db ldr r3, [r3, #28] + 8002af8: 2b00 cmp r3, #0 + 8002afa: f000 8242 beq.w 8002f82 { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8002b5e: 4b1c ldr r3, [pc, #112] @ (8002bd0 ) - 8002b60: 685b ldr r3, [r3, #4] - 8002b62: f003 030c and.w r3, r3, #12 - 8002b66: 2b08 cmp r3, #8 - 8002b68: f000 8213 beq.w 8002f92 + 8002afe: 4b1c ldr r3, [pc, #112] @ (8002b70 ) + 8002b00: 685b ldr r3, [r3, #4] + 8002b02: f003 030c and.w r3, r3, #12 + 8002b06: 2b08 cmp r3, #8 + 8002b08: f000 8213 beq.w 8002f32 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8002b6c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002b70: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002b74: 681b ldr r3, [r3, #0] - 8002b76: 69db ldr r3, [r3, #28] - 8002b78: 2b02 cmp r3, #2 - 8002b7a: f040 8162 bne.w 8002e42 - 8002b7e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002b82: f5a3 73c0 sub.w r3, r3, #384 @ 0x180 - 8002b86: f04f 7280 mov.w r2, #16777216 @ 0x1000000 - 8002b8a: 601a str r2, [r3, #0] + 8002b0c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b10: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002b14: 681b ldr r3, [r3, #0] + 8002b16: 69db ldr r3, [r3, #28] + 8002b18: 2b02 cmp r3, #2 + 8002b1a: f040 8162 bne.w 8002de2 + 8002b1e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b22: f5a3 73c0 sub.w r3, r3, #384 @ 0x180 + 8002b26: f04f 7280 mov.w r2, #16777216 @ 0x1000000 + 8002b2a: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002b8c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002b90: f5a3 73c0 sub.w r3, r3, #384 @ 0x180 - 8002b94: 681b ldr r3, [r3, #0] - 8002b96: fa93 f2a3 rbit r2, r3 - 8002b9a: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002b9e: f5a3 73c2 sub.w r3, r3, #388 @ 0x184 - 8002ba2: 601a str r2, [r3, #0] + 8002b2c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b30: f5a3 73c0 sub.w r3, r3, #384 @ 0x180 + 8002b34: 681b ldr r3, [r3, #0] + 8002b36: fa93 f2a3 rbit r2, r3 + 8002b3a: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b3e: f5a3 73c2 sub.w r3, r3, #388 @ 0x184 + 8002b42: 601a str r2, [r3, #0] return result; - 8002ba4: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ba8: f5a3 73c2 sub.w r3, r3, #388 @ 0x184 - 8002bac: 681b ldr r3, [r3, #0] + 8002b44: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b48: f5a3 73c2 sub.w r3, r3, #388 @ 0x184 + 8002b4c: 681b ldr r3, [r3, #0] #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); #endif /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8002bae: fab3 f383 clz r3, r3 - 8002bb2: b2db uxtb r3, r3 - 8002bb4: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 - 8002bb8: f503 1384 add.w r3, r3, #1081344 @ 0x108000 - 8002bbc: 009b lsls r3, r3, #2 - 8002bbe: 461a mov r2, r3 - 8002bc0: 2300 movs r3, #0 - 8002bc2: 6013 str r3, [r2, #0] + 8002b4e: fab3 f383 clz r3, r3 + 8002b52: b2db uxtb r3, r3 + 8002b54: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 + 8002b58: f503 1384 add.w r3, r3, #1081344 @ 0x108000 + 8002b5c: 009b lsls r3, r3, #2 + 8002b5e: 461a mov r2, r3 + 8002b60: 2300 movs r3, #0 + 8002b62: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002bc4: f7fe f866 bl 8000c94 - 8002bc8: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 8002b64: f7fe f84c bl 8000c00 + 8002b68: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002bcc: e00c b.n 8002be8 - 8002bce: bf00 nop - 8002bd0: 40021000 .word 0x40021000 + 8002b6c: e00c b.n 8002b88 + 8002b6e: bf00 nop + 8002b70: 40021000 .word 0x40021000 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002bd4: f7fe f85e bl 8000c94 - 8002bd8: 4602 mov r2, r0 - 8002bda: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002bde: 1ad3 subs r3, r2, r3 - 8002be0: 2b02 cmp r3, #2 - 8002be2: d901 bls.n 8002be8 + 8002b74: f7fe f844 bl 8000c00 + 8002b78: 4602 mov r2, r0 + 8002b7a: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 8002b7e: 1ad3 subs r3, r2, r3 + 8002b80: 2b02 cmp r3, #2 + 8002b82: d901 bls.n 8002b88 { return HAL_TIMEOUT; - 8002be4: 2303 movs r3, #3 - 8002be6: e1fd b.n 8002fe4 - 8002be8: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002bec: f5a3 73c4 sub.w r3, r3, #392 @ 0x188 - 8002bf0: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002bf4: 601a str r2, [r3, #0] + 8002b84: 2303 movs r3, #3 + 8002b86: e1fd b.n 8002f84 + 8002b88: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b8c: f5a3 73c4 sub.w r3, r3, #392 @ 0x188 + 8002b90: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002b94: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002bf6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002bfa: f5a3 73c4 sub.w r3, r3, #392 @ 0x188 - 8002bfe: 681b ldr r3, [r3, #0] - 8002c00: fa93 f2a3 rbit r2, r3 - 8002c04: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c08: f5a3 73c6 sub.w r3, r3, #396 @ 0x18c - 8002c0c: 601a str r2, [r3, #0] + 8002b96: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002b9a: f5a3 73c4 sub.w r3, r3, #392 @ 0x188 + 8002b9e: 681b ldr r3, [r3, #0] + 8002ba0: fa93 f2a3 rbit r2, r3 + 8002ba4: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002ba8: f5a3 73c6 sub.w r3, r3, #396 @ 0x18c + 8002bac: 601a str r2, [r3, #0] return result; - 8002c0e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c12: f5a3 73c6 sub.w r3, r3, #396 @ 0x18c - 8002c16: 681b ldr r3, [r3, #0] + 8002bae: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002bb2: f5a3 73c6 sub.w r3, r3, #396 @ 0x18c + 8002bb6: 681b ldr r3, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002c18: fab3 f383 clz r3, r3 - 8002c1c: b2db uxtb r3, r3 - 8002c1e: 095b lsrs r3, r3, #5 - 8002c20: b2db uxtb r3, r3 - 8002c22: f043 0301 orr.w r3, r3, #1 - 8002c26: b2db uxtb r3, r3 - 8002c28: 2b01 cmp r3, #1 - 8002c2a: d102 bne.n 8002c32 - 8002c2c: 4bb0 ldr r3, [pc, #704] @ (8002ef0 ) - 8002c2e: 681b ldr r3, [r3, #0] - 8002c30: e027 b.n 8002c82 - 8002c32: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c36: f5a3 73c8 sub.w r3, r3, #400 @ 0x190 - 8002c3a: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002c3e: 601a str r2, [r3, #0] + 8002bb8: fab3 f383 clz r3, r3 + 8002bbc: b2db uxtb r3, r3 + 8002bbe: 095b lsrs r3, r3, #5 + 8002bc0: b2db uxtb r3, r3 + 8002bc2: f043 0301 orr.w r3, r3, #1 + 8002bc6: b2db uxtb r3, r3 + 8002bc8: 2b01 cmp r3, #1 + 8002bca: d102 bne.n 8002bd2 + 8002bcc: 4bb0 ldr r3, [pc, #704] @ (8002e90 ) + 8002bce: 681b ldr r3, [r3, #0] + 8002bd0: e027 b.n 8002c22 + 8002bd2: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002bd6: f5a3 73c8 sub.w r3, r3, #400 @ 0x190 + 8002bda: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002bde: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002c40: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c44: f5a3 73c8 sub.w r3, r3, #400 @ 0x190 - 8002c48: 681b ldr r3, [r3, #0] - 8002c4a: fa93 f2a3 rbit r2, r3 - 8002c4e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c52: f5a3 73ca sub.w r3, r3, #404 @ 0x194 - 8002c56: 601a str r2, [r3, #0] - 8002c58: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c5c: f5a3 73cc sub.w r3, r3, #408 @ 0x198 - 8002c60: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002c64: 601a str r2, [r3, #0] - 8002c66: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c6a: f5a3 73cc sub.w r3, r3, #408 @ 0x198 - 8002c6e: 681b ldr r3, [r3, #0] - 8002c70: fa93 f2a3 rbit r2, r3 - 8002c74: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002c78: f5a3 73ce sub.w r3, r3, #412 @ 0x19c - 8002c7c: 601a str r2, [r3, #0] - 8002c7e: 4b9c ldr r3, [pc, #624] @ (8002ef0 ) - 8002c80: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002c82: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002c86: f5a2 72d0 sub.w r2, r2, #416 @ 0x1a0 - 8002c8a: f04f 7100 mov.w r1, #33554432 @ 0x2000000 - 8002c8e: 6011 str r1, [r2, #0] - 8002c90: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002c94: f5a2 72d0 sub.w r2, r2, #416 @ 0x1a0 - 8002c98: 6812 ldr r2, [r2, #0] - 8002c9a: fa92 f1a2 rbit r1, r2 - 8002c9e: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002ca2: f5a2 72d2 sub.w r2, r2, #420 @ 0x1a4 - 8002ca6: 6011 str r1, [r2, #0] + 8002be0: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002be4: f5a3 73c8 sub.w r3, r3, #400 @ 0x190 + 8002be8: 681b ldr r3, [r3, #0] + 8002bea: fa93 f2a3 rbit r2, r3 + 8002bee: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002bf2: f5a3 73ca sub.w r3, r3, #404 @ 0x194 + 8002bf6: 601a str r2, [r3, #0] + 8002bf8: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002bfc: f5a3 73cc sub.w r3, r3, #408 @ 0x198 + 8002c00: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002c04: 601a str r2, [r3, #0] + 8002c06: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002c0a: f5a3 73cc sub.w r3, r3, #408 @ 0x198 + 8002c0e: 681b ldr r3, [r3, #0] + 8002c10: fa93 f2a3 rbit r2, r3 + 8002c14: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002c18: f5a3 73ce sub.w r3, r3, #412 @ 0x19c + 8002c1c: 601a str r2, [r3, #0] + 8002c1e: 4b9c ldr r3, [pc, #624] @ (8002e90 ) + 8002c20: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002c22: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002c26: f5a2 72d0 sub.w r2, r2, #416 @ 0x1a0 + 8002c2a: f04f 7100 mov.w r1, #33554432 @ 0x2000000 + 8002c2e: 6011 str r1, [r2, #0] + 8002c30: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002c34: f5a2 72d0 sub.w r2, r2, #416 @ 0x1a0 + 8002c38: 6812 ldr r2, [r2, #0] + 8002c3a: fa92 f1a2 rbit r1, r2 + 8002c3e: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002c42: f5a2 72d2 sub.w r2, r2, #420 @ 0x1a4 + 8002c46: 6011 str r1, [r2, #0] return result; - 8002ca8: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002cac: f5a2 72d2 sub.w r2, r2, #420 @ 0x1a4 - 8002cb0: 6812 ldr r2, [r2, #0] - 8002cb2: fab2 f282 clz r2, r2 - 8002cb6: b2d2 uxtb r2, r2 - 8002cb8: f042 0220 orr.w r2, r2, #32 - 8002cbc: b2d2 uxtb r2, r2 - 8002cbe: f002 021f and.w r2, r2, #31 - 8002cc2: 2101 movs r1, #1 - 8002cc4: fa01 f202 lsl.w r2, r1, r2 - 8002cc8: 4013 ands r3, r2 - 8002cca: 2b00 cmp r3, #0 - 8002ccc: d182 bne.n 8002bd4 + 8002c48: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002c4c: f5a2 72d2 sub.w r2, r2, #420 @ 0x1a4 + 8002c50: 6812 ldr r2, [r2, #0] + 8002c52: fab2 f282 clz r2, r2 + 8002c56: b2d2 uxtb r2, r2 + 8002c58: f042 0220 orr.w r2, r2, #32 + 8002c5c: b2d2 uxtb r2, r2 + 8002c5e: f002 021f and.w r2, r2, #31 + 8002c62: 2101 movs r1, #1 + 8002c64: fa01 f202 lsl.w r2, r1, r2 + 8002c68: 4013 ands r3, r2 + 8002c6a: 2b00 cmp r3, #0 + 8002c6c: d182 bne.n 8002b74 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, RCC_OscInitStruct->PLL.PREDIV, RCC_OscInitStruct->PLL.PLLMUL); #else /* Configure the main PLL clock source and multiplication factor. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8002cce: 4b88 ldr r3, [pc, #544] @ (8002ef0 ) - 8002cd0: 685b ldr r3, [r3, #4] - 8002cd2: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 - 8002cd6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002cda: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002cde: 681b ldr r3, [r3, #0] - 8002ce0: 6a59 ldr r1, [r3, #36] @ 0x24 - 8002ce2: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ce6: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002cea: 681b ldr r3, [r3, #0] - 8002cec: 6a1b ldr r3, [r3, #32] - 8002cee: 430b orrs r3, r1 - 8002cf0: 497f ldr r1, [pc, #508] @ (8002ef0 ) - 8002cf2: 4313 orrs r3, r2 - 8002cf4: 604b str r3, [r1, #4] - 8002cf6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002cfa: f5a3 73d4 sub.w r3, r3, #424 @ 0x1a8 - 8002cfe: f04f 7280 mov.w r2, #16777216 @ 0x1000000 - 8002d02: 601a str r2, [r3, #0] + 8002c6e: 4b88 ldr r3, [pc, #544] @ (8002e90 ) + 8002c70: 685b ldr r3, [r3, #4] + 8002c72: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 + 8002c76: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002c7a: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002c7e: 681b ldr r3, [r3, #0] + 8002c80: 6a59 ldr r1, [r3, #36] @ 0x24 + 8002c82: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002c86: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002c8a: 681b ldr r3, [r3, #0] + 8002c8c: 6a1b ldr r3, [r3, #32] + 8002c8e: 430b orrs r3, r1 + 8002c90: 497f ldr r1, [pc, #508] @ (8002e90 ) + 8002c92: 4313 orrs r3, r2 + 8002c94: 604b str r3, [r1, #4] + 8002c96: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002c9a: f5a3 73d4 sub.w r3, r3, #424 @ 0x1a8 + 8002c9e: f04f 7280 mov.w r2, #16777216 @ 0x1000000 + 8002ca2: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002d04: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d08: f5a3 73d4 sub.w r3, r3, #424 @ 0x1a8 - 8002d0c: 681b ldr r3, [r3, #0] - 8002d0e: fa93 f2a3 rbit r2, r3 - 8002d12: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d16: f5a3 73d6 sub.w r3, r3, #428 @ 0x1ac - 8002d1a: 601a str r2, [r3, #0] + 8002ca4: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002ca8: f5a3 73d4 sub.w r3, r3, #424 @ 0x1a8 + 8002cac: 681b ldr r3, [r3, #0] + 8002cae: fa93 f2a3 rbit r2, r3 + 8002cb2: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002cb6: f5a3 73d6 sub.w r3, r3, #428 @ 0x1ac + 8002cba: 601a str r2, [r3, #0] return result; - 8002d1c: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d20: f5a3 73d6 sub.w r3, r3, #428 @ 0x1ac - 8002d24: 681b ldr r3, [r3, #0] + 8002cbc: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002cc0: f5a3 73d6 sub.w r3, r3, #428 @ 0x1ac + 8002cc4: 681b ldr r3, [r3, #0] RCC_OscInitStruct->PLL.PLLMUL); #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8002d26: fab3 f383 clz r3, r3 - 8002d2a: b2db uxtb r3, r3 - 8002d2c: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 - 8002d30: f503 1384 add.w r3, r3, #1081344 @ 0x108000 - 8002d34: 009b lsls r3, r3, #2 - 8002d36: 461a mov r2, r3 - 8002d38: 2301 movs r3, #1 - 8002d3a: 6013 str r3, [r2, #0] + 8002cc6: fab3 f383 clz r3, r3 + 8002cca: b2db uxtb r3, r3 + 8002ccc: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 + 8002cd0: f503 1384 add.w r3, r3, #1081344 @ 0x108000 + 8002cd4: 009b lsls r3, r3, #2 + 8002cd6: 461a mov r2, r3 + 8002cd8: 2301 movs r3, #1 + 8002cda: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002d3c: f7fd ffaa bl 8000c94 - 8002d40: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 8002cdc: f7fd ff90 bl 8000c00 + 8002ce0: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8002d44: e009 b.n 8002d5a + 8002ce4: e009 b.n 8002cfa { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002d46: f7fd ffa5 bl 8000c94 - 8002d4a: 4602 mov r2, r0 - 8002d4c: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002d50: 1ad3 subs r3, r2, r3 - 8002d52: 2b02 cmp r3, #2 - 8002d54: d901 bls.n 8002d5a + 8002ce6: f7fd ff8b bl 8000c00 + 8002cea: 4602 mov r2, r0 + 8002cec: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 8002cf0: 1ad3 subs r3, r2, r3 + 8002cf2: 2b02 cmp r3, #2 + 8002cf4: d901 bls.n 8002cfa { return HAL_TIMEOUT; - 8002d56: 2303 movs r3, #3 - 8002d58: e144 b.n 8002fe4 - 8002d5a: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d5e: f5a3 73d8 sub.w r3, r3, #432 @ 0x1b0 - 8002d62: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002d66: 601a str r2, [r3, #0] + 8002cf6: 2303 movs r3, #3 + 8002cf8: e144 b.n 8002f84 + 8002cfa: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002cfe: f5a3 73d8 sub.w r3, r3, #432 @ 0x1b0 + 8002d02: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002d06: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002d68: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d6c: f5a3 73d8 sub.w r3, r3, #432 @ 0x1b0 - 8002d70: 681b ldr r3, [r3, #0] - 8002d72: fa93 f2a3 rbit r2, r3 - 8002d76: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d7a: f5a3 73da sub.w r3, r3, #436 @ 0x1b4 - 8002d7e: 601a str r2, [r3, #0] + 8002d08: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d0c: f5a3 73d8 sub.w r3, r3, #432 @ 0x1b0 + 8002d10: 681b ldr r3, [r3, #0] + 8002d12: fa93 f2a3 rbit r2, r3 + 8002d16: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d1a: f5a3 73da sub.w r3, r3, #436 @ 0x1b4 + 8002d1e: 601a str r2, [r3, #0] return result; - 8002d80: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002d84: f5a3 73da sub.w r3, r3, #436 @ 0x1b4 - 8002d88: 681b ldr r3, [r3, #0] + 8002d20: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d24: f5a3 73da sub.w r3, r3, #436 @ 0x1b4 + 8002d28: 681b ldr r3, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8002d8a: fab3 f383 clz r3, r3 - 8002d8e: b2db uxtb r3, r3 - 8002d90: 095b lsrs r3, r3, #5 - 8002d92: b2db uxtb r3, r3 - 8002d94: f043 0301 orr.w r3, r3, #1 - 8002d98: b2db uxtb r3, r3 - 8002d9a: 2b01 cmp r3, #1 - 8002d9c: d102 bne.n 8002da4 - 8002d9e: 4b54 ldr r3, [pc, #336] @ (8002ef0 ) - 8002da0: 681b ldr r3, [r3, #0] - 8002da2: e027 b.n 8002df4 - 8002da4: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002da8: f5a3 73dc sub.w r3, r3, #440 @ 0x1b8 - 8002dac: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002db0: 601a str r2, [r3, #0] + 8002d2a: fab3 f383 clz r3, r3 + 8002d2e: b2db uxtb r3, r3 + 8002d30: 095b lsrs r3, r3, #5 + 8002d32: b2db uxtb r3, r3 + 8002d34: f043 0301 orr.w r3, r3, #1 + 8002d38: b2db uxtb r3, r3 + 8002d3a: 2b01 cmp r3, #1 + 8002d3c: d102 bne.n 8002d44 + 8002d3e: 4b54 ldr r3, [pc, #336] @ (8002e90 ) + 8002d40: 681b ldr r3, [r3, #0] + 8002d42: e027 b.n 8002d94 + 8002d44: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d48: f5a3 73dc sub.w r3, r3, #440 @ 0x1b8 + 8002d4c: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002d50: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002db2: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002db6: f5a3 73dc sub.w r3, r3, #440 @ 0x1b8 - 8002dba: 681b ldr r3, [r3, #0] - 8002dbc: fa93 f2a3 rbit r2, r3 - 8002dc0: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002dc4: f5a3 73de sub.w r3, r3, #444 @ 0x1bc - 8002dc8: 601a str r2, [r3, #0] - 8002dca: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002dce: f5a3 73e0 sub.w r3, r3, #448 @ 0x1c0 - 8002dd2: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002dd6: 601a str r2, [r3, #0] - 8002dd8: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ddc: f5a3 73e0 sub.w r3, r3, #448 @ 0x1c0 - 8002de0: 681b ldr r3, [r3, #0] - 8002de2: fa93 f2a3 rbit r2, r3 - 8002de6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002dea: f5a3 73e2 sub.w r3, r3, #452 @ 0x1c4 + 8002d52: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d56: f5a3 73dc sub.w r3, r3, #440 @ 0x1b8 + 8002d5a: 681b ldr r3, [r3, #0] + 8002d5c: fa93 f2a3 rbit r2, r3 + 8002d60: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d64: f5a3 73de sub.w r3, r3, #444 @ 0x1bc + 8002d68: 601a str r2, [r3, #0] + 8002d6a: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d6e: f5a3 73e0 sub.w r3, r3, #448 @ 0x1c0 + 8002d72: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002d76: 601a str r2, [r3, #0] + 8002d78: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d7c: f5a3 73e0 sub.w r3, r3, #448 @ 0x1c0 + 8002d80: 681b ldr r3, [r3, #0] + 8002d82: fa93 f2a3 rbit r2, r3 + 8002d86: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002d8a: f5a3 73e2 sub.w r3, r3, #452 @ 0x1c4 + 8002d8e: 601a str r2, [r3, #0] + 8002d90: 4b3f ldr r3, [pc, #252] @ (8002e90 ) + 8002d92: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002d94: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002d98: f5a2 72e4 sub.w r2, r2, #456 @ 0x1c8 + 8002d9c: f04f 7100 mov.w r1, #33554432 @ 0x2000000 + 8002da0: 6011 str r1, [r2, #0] + 8002da2: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002da6: f5a2 72e4 sub.w r2, r2, #456 @ 0x1c8 + 8002daa: 6812 ldr r2, [r2, #0] + 8002dac: fa92 f1a2 rbit r1, r2 + 8002db0: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002db4: f5a2 72e6 sub.w r2, r2, #460 @ 0x1cc + 8002db8: 6011 str r1, [r2, #0] + return result; + 8002dba: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002dbe: f5a2 72e6 sub.w r2, r2, #460 @ 0x1cc + 8002dc2: 6812 ldr r2, [r2, #0] + 8002dc4: fab2 f282 clz r2, r2 + 8002dc8: b2d2 uxtb r2, r2 + 8002dca: f042 0220 orr.w r2, r2, #32 + 8002dce: b2d2 uxtb r2, r2 + 8002dd0: f002 021f and.w r2, r2, #31 + 8002dd4: 2101 movs r1, #1 + 8002dd6: fa01 f202 lsl.w r2, r1, r2 + 8002dda: 4013 ands r3, r2 + 8002ddc: 2b00 cmp r3, #0 + 8002dde: d082 beq.n 8002ce6 + 8002de0: e0cf b.n 8002f82 + 8002de2: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002de6: f5a3 73e8 sub.w r3, r3, #464 @ 0x1d0 + 8002dea: f04f 7280 mov.w r2, #16777216 @ 0x1000000 8002dee: 601a str r2, [r3, #0] - 8002df0: 4b3f ldr r3, [pc, #252] @ (8002ef0 ) - 8002df2: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002df4: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002df8: f5a2 72e4 sub.w r2, r2, #456 @ 0x1c8 - 8002dfc: f04f 7100 mov.w r1, #33554432 @ 0x2000000 - 8002e00: 6011 str r1, [r2, #0] - 8002e02: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002e06: f5a2 72e4 sub.w r2, r2, #456 @ 0x1c8 - 8002e0a: 6812 ldr r2, [r2, #0] - 8002e0c: fa92 f1a2 rbit r1, r2 - 8002e10: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002e14: f5a2 72e6 sub.w r2, r2, #460 @ 0x1cc - 8002e18: 6011 str r1, [r2, #0] - return result; - 8002e1a: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002e1e: f5a2 72e6 sub.w r2, r2, #460 @ 0x1cc - 8002e22: 6812 ldr r2, [r2, #0] - 8002e24: fab2 f282 clz r2, r2 - 8002e28: b2d2 uxtb r2, r2 - 8002e2a: f042 0220 orr.w r2, r2, #32 - 8002e2e: b2d2 uxtb r2, r2 - 8002e30: f002 021f and.w r2, r2, #31 - 8002e34: 2101 movs r1, #1 - 8002e36: fa01 f202 lsl.w r2, r1, r2 - 8002e3a: 4013 ands r3, r2 - 8002e3c: 2b00 cmp r3, #0 - 8002e3e: d082 beq.n 8002d46 - 8002e40: e0cf b.n 8002fe2 - 8002e42: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002e46: f5a3 73e8 sub.w r3, r3, #464 @ 0x1d0 - 8002e4a: f04f 7280 mov.w r2, #16777216 @ 0x1000000 - 8002e4e: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002e50: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002e54: f5a3 73e8 sub.w r3, r3, #464 @ 0x1d0 - 8002e58: 681b ldr r3, [r3, #0] - 8002e5a: fa93 f2a3 rbit r2, r3 - 8002e5e: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002e62: f5a3 73ea sub.w r3, r3, #468 @ 0x1d4 - 8002e66: 601a str r2, [r3, #0] + 8002df0: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002df4: f5a3 73e8 sub.w r3, r3, #464 @ 0x1d0 + 8002df8: 681b ldr r3, [r3, #0] + 8002dfa: fa93 f2a3 rbit r2, r3 + 8002dfe: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e02: f5a3 73ea sub.w r3, r3, #468 @ 0x1d4 + 8002e06: 601a str r2, [r3, #0] return result; - 8002e68: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002e6c: f5a3 73ea sub.w r3, r3, #468 @ 0x1d4 - 8002e70: 681b ldr r3, [r3, #0] + 8002e08: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e0c: f5a3 73ea sub.w r3, r3, #468 @ 0x1d4 + 8002e10: 681b ldr r3, [r3, #0] } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8002e72: fab3 f383 clz r3, r3 - 8002e76: b2db uxtb r3, r3 - 8002e78: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 - 8002e7c: f503 1384 add.w r3, r3, #1081344 @ 0x108000 - 8002e80: 009b lsls r3, r3, #2 - 8002e82: 461a mov r2, r3 - 8002e84: 2300 movs r3, #0 - 8002e86: 6013 str r3, [r2, #0] + 8002e12: fab3 f383 clz r3, r3 + 8002e16: b2db uxtb r3, r3 + 8002e18: f103 5384 add.w r3, r3, #276824064 @ 0x10800000 + 8002e1c: f503 1384 add.w r3, r3, #1081344 @ 0x108000 + 8002e20: 009b lsls r3, r3, #2 + 8002e22: 461a mov r2, r3 + 8002e24: 2300 movs r3, #0 + 8002e26: 6013 str r3, [r2, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002e88: f7fd ff04 bl 8000c94 - 8002e8c: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 + 8002e28: f7fd feea bl 8000c00 + 8002e2c: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8 /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002e90: e009 b.n 8002ea6 + 8002e30: e009 b.n 8002e46 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002e92: f7fd feff bl 8000c94 - 8002e96: 4602 mov r2, r0 - 8002e98: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 - 8002e9c: 1ad3 subs r3, r2, r3 - 8002e9e: 2b02 cmp r3, #2 - 8002ea0: d901 bls.n 8002ea6 + 8002e32: f7fd fee5 bl 8000c00 + 8002e36: 4602 mov r2, r0 + 8002e38: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8 + 8002e3c: 1ad3 subs r3, r2, r3 + 8002e3e: 2b02 cmp r3, #2 + 8002e40: d901 bls.n 8002e46 { return HAL_TIMEOUT; - 8002ea2: 2303 movs r3, #3 - 8002ea4: e09e b.n 8002fe4 - 8002ea6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002eaa: f5a3 73ec sub.w r3, r3, #472 @ 0x1d8 - 8002eae: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002eb2: 601a str r2, [r3, #0] + 8002e42: 2303 movs r3, #3 + 8002e44: e09e b.n 8002f84 + 8002e46: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e4a: f5a3 73ec sub.w r3, r3, #472 @ 0x1d8 + 8002e4e: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002e52: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002eb4: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002eb8: f5a3 73ec sub.w r3, r3, #472 @ 0x1d8 - 8002ebc: 681b ldr r3, [r3, #0] - 8002ebe: fa93 f2a3 rbit r2, r3 - 8002ec2: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ec6: f5a3 73ee sub.w r3, r3, #476 @ 0x1dc - 8002eca: 601a str r2, [r3, #0] + 8002e54: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e58: f5a3 73ec sub.w r3, r3, #472 @ 0x1d8 + 8002e5c: 681b ldr r3, [r3, #0] + 8002e5e: fa93 f2a3 rbit r2, r3 + 8002e62: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e66: f5a3 73ee sub.w r3, r3, #476 @ 0x1dc + 8002e6a: 601a str r2, [r3, #0] return result; - 8002ecc: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ed0: f5a3 73ee sub.w r3, r3, #476 @ 0x1dc - 8002ed4: 681b ldr r3, [r3, #0] + 8002e6c: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e70: f5a3 73ee sub.w r3, r3, #476 @ 0x1dc + 8002e74: 681b ldr r3, [r3, #0] while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8002ed6: fab3 f383 clz r3, r3 - 8002eda: b2db uxtb r3, r3 - 8002edc: 095b lsrs r3, r3, #5 - 8002ede: b2db uxtb r3, r3 - 8002ee0: f043 0301 orr.w r3, r3, #1 - 8002ee4: b2db uxtb r3, r3 - 8002ee6: 2b01 cmp r3, #1 - 8002ee8: d104 bne.n 8002ef4 - 8002eea: 4b01 ldr r3, [pc, #4] @ (8002ef0 ) - 8002eec: 681b ldr r3, [r3, #0] - 8002eee: e029 b.n 8002f44 - 8002ef0: 40021000 .word 0x40021000 - 8002ef4: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002ef8: f5a3 73f0 sub.w r3, r3, #480 @ 0x1e0 - 8002efc: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002f00: 601a str r2, [r3, #0] + 8002e76: fab3 f383 clz r3, r3 + 8002e7a: b2db uxtb r3, r3 + 8002e7c: 095b lsrs r3, r3, #5 + 8002e7e: b2db uxtb r3, r3 + 8002e80: f043 0301 orr.w r3, r3, #1 + 8002e84: b2db uxtb r3, r3 + 8002e86: 2b01 cmp r3, #1 + 8002e88: d104 bne.n 8002e94 + 8002e8a: 4b01 ldr r3, [pc, #4] @ (8002e90 ) + 8002e8c: 681b ldr r3, [r3, #0] + 8002e8e: e029 b.n 8002ee4 + 8002e90: 40021000 .word 0x40021000 + 8002e94: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002e98: f5a3 73f0 sub.w r3, r3, #480 @ 0x1e0 + 8002e9c: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002ea0: 601a str r2, [r3, #0] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8002f02: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002f06: f5a3 73f0 sub.w r3, r3, #480 @ 0x1e0 - 8002f0a: 681b ldr r3, [r3, #0] - 8002f0c: fa93 f2a3 rbit r2, r3 - 8002f10: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002f14: f5a3 73f2 sub.w r3, r3, #484 @ 0x1e4 - 8002f18: 601a str r2, [r3, #0] - 8002f1a: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002f1e: f5a3 73f4 sub.w r3, r3, #488 @ 0x1e8 - 8002f22: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8002f26: 601a str r2, [r3, #0] - 8002f28: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002f2c: f5a3 73f4 sub.w r3, r3, #488 @ 0x1e8 - 8002f30: 681b ldr r3, [r3, #0] - 8002f32: fa93 f2a3 rbit r2, r3 - 8002f36: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002f3a: f5a3 73f6 sub.w r3, r3, #492 @ 0x1ec - 8002f3e: 601a str r2, [r3, #0] - 8002f40: 4b2b ldr r3, [pc, #172] @ (8002ff0 ) - 8002f42: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002f44: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002f48: f5a2 72f8 sub.w r2, r2, #496 @ 0x1f0 - 8002f4c: f04f 7100 mov.w r1, #33554432 @ 0x2000000 - 8002f50: 6011 str r1, [r2, #0] - 8002f52: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002f56: f5a2 72f8 sub.w r2, r2, #496 @ 0x1f0 - 8002f5a: 6812 ldr r2, [r2, #0] - 8002f5c: fa92 f1a2 rbit r1, r2 - 8002f60: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002f64: f5a2 72fa sub.w r2, r2, #500 @ 0x1f4 - 8002f68: 6011 str r1, [r2, #0] + 8002ea2: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002ea6: f5a3 73f0 sub.w r3, r3, #480 @ 0x1e0 + 8002eaa: 681b ldr r3, [r3, #0] + 8002eac: fa93 f2a3 rbit r2, r3 + 8002eb0: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002eb4: f5a3 73f2 sub.w r3, r3, #484 @ 0x1e4 + 8002eb8: 601a str r2, [r3, #0] + 8002eba: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002ebe: f5a3 73f4 sub.w r3, r3, #488 @ 0x1e8 + 8002ec2: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 8002ec6: 601a str r2, [r3, #0] + 8002ec8: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002ecc: f5a3 73f4 sub.w r3, r3, #488 @ 0x1e8 + 8002ed0: 681b ldr r3, [r3, #0] + 8002ed2: fa93 f2a3 rbit r2, r3 + 8002ed6: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002eda: f5a3 73f6 sub.w r3, r3, #492 @ 0x1ec + 8002ede: 601a str r2, [r3, #0] + 8002ee0: 4b2b ldr r3, [pc, #172] @ (8002f90 ) + 8002ee2: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002ee4: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002ee8: f5a2 72f8 sub.w r2, r2, #496 @ 0x1f0 + 8002eec: f04f 7100 mov.w r1, #33554432 @ 0x2000000 + 8002ef0: 6011 str r1, [r2, #0] + 8002ef2: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002ef6: f5a2 72f8 sub.w r2, r2, #496 @ 0x1f0 + 8002efa: 6812 ldr r2, [r2, #0] + 8002efc: fa92 f1a2 rbit r1, r2 + 8002f00: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002f04: f5a2 72fa sub.w r2, r2, #500 @ 0x1f4 + 8002f08: 6011 str r1, [r2, #0] return result; - 8002f6a: f507 7200 add.w r2, r7, #512 @ 0x200 - 8002f6e: f5a2 72fa sub.w r2, r2, #500 @ 0x1f4 - 8002f72: 6812 ldr r2, [r2, #0] - 8002f74: fab2 f282 clz r2, r2 - 8002f78: b2d2 uxtb r2, r2 - 8002f7a: f042 0220 orr.w r2, r2, #32 - 8002f7e: b2d2 uxtb r2, r2 - 8002f80: f002 021f and.w r2, r2, #31 - 8002f84: 2101 movs r1, #1 - 8002f86: fa01 f202 lsl.w r2, r1, r2 - 8002f8a: 4013 ands r3, r2 - 8002f8c: 2b00 cmp r3, #0 - 8002f8e: d180 bne.n 8002e92 - 8002f90: e027 b.n 8002fe2 + 8002f0a: f507 7200 add.w r2, r7, #512 @ 0x200 + 8002f0e: f5a2 72fa sub.w r2, r2, #500 @ 0x1f4 + 8002f12: 6812 ldr r2, [r2, #0] + 8002f14: fab2 f282 clz r2, r2 + 8002f18: b2d2 uxtb r2, r2 + 8002f1a: f042 0220 orr.w r2, r2, #32 + 8002f1e: b2d2 uxtb r2, r2 + 8002f20: f002 021f and.w r2, r2, #31 + 8002f24: 2101 movs r1, #1 + 8002f26: fa01 f202 lsl.w r2, r1, r2 + 8002f2a: 4013 ands r3, r2 + 8002f2c: 2b00 cmp r3, #0 + 8002f2e: d180 bne.n 8002e32 + 8002f30: e027 b.n 8002f82 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8002f92: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002f96: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002f9a: 681b ldr r3, [r3, #0] - 8002f9c: 69db ldr r3, [r3, #28] - 8002f9e: 2b01 cmp r3, #1 - 8002fa0: d101 bne.n 8002fa6 + 8002f32: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002f36: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002f3a: 681b ldr r3, [r3, #0] + 8002f3c: 69db ldr r3, [r3, #28] + 8002f3e: 2b01 cmp r3, #1 + 8002f40: d101 bne.n 8002f46 { return HAL_ERROR; - 8002fa2: 2301 movs r3, #1 - 8002fa4: e01e b.n 8002fe4 + 8002f42: 2301 movs r3, #1 + 8002f44: e01e b.n 8002f84 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 8002fa6: 4b12 ldr r3, [pc, #72] @ (8002ff0 ) - 8002fa8: 685b ldr r3, [r3, #4] - 8002faa: f8c7 31f4 str.w r3, [r7, #500] @ 0x1f4 + 8002f46: 4b12 ldr r3, [pc, #72] @ (8002f90 ) + 8002f48: 685b ldr r3, [r3, #4] + 8002f4a: f8c7 31f4 str.w r3, [r7, #500] @ 0x1f4 pll_config2 = RCC->CFGR2; if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)) #else if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8002fae: f8d7 31f4 ldr.w r3, [r7, #500] @ 0x1f4 - 8002fb2: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 8002fb6: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002fba: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002fbe: 681b ldr r3, [r3, #0] - 8002fc0: 6a1b ldr r3, [r3, #32] - 8002fc2: 429a cmp r2, r3 - 8002fc4: d10b bne.n 8002fde + 8002f4e: f8d7 31f4 ldr.w r3, [r7, #500] @ 0x1f4 + 8002f52: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 8002f56: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002f5a: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002f5e: 681b ldr r3, [r3, #0] + 8002f60: 6a1b ldr r3, [r3, #32] + 8002f62: 429a cmp r2, r3 + 8002f64: d10b bne.n 8002f7e (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) - 8002fc6: f8d7 31f4 ldr.w r3, [r7, #500] @ 0x1f4 - 8002fca: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 8002fce: f507 7300 add.w r3, r7, #512 @ 0x200 - 8002fd2: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc - 8002fd6: 681b ldr r3, [r3, #0] - 8002fd8: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002f66: f8d7 31f4 ldr.w r3, [r7, #500] @ 0x1f4 + 8002f6a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 8002f6e: f507 7300 add.w r3, r7, #512 @ 0x200 + 8002f72: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc + 8002f76: 681b ldr r3, [r3, #0] + 8002f78: 6a5b ldr r3, [r3, #36] @ 0x24 if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8002fda: 429a cmp r2, r3 - 8002fdc: d001 beq.n 8002fe2 + 8002f7a: 429a cmp r2, r3 + 8002f7c: d001 beq.n 8002f82 #endif { return HAL_ERROR; - 8002fde: 2301 movs r3, #1 - 8002fe0: e000 b.n 8002fe4 + 8002f7e: 2301 movs r3, #1 + 8002f80: e000 b.n 8002f84 } } } } return HAL_OK; - 8002fe2: 2300 movs r3, #0 + 8002f82: 2300 movs r3, #0 } - 8002fe4: 4618 mov r0, r3 - 8002fe6: f507 7700 add.w r7, r7, #512 @ 0x200 - 8002fea: 46bd mov sp, r7 - 8002fec: bd80 pop {r7, pc} - 8002fee: bf00 nop - 8002ff0: 40021000 .word 0x40021000 + 8002f84: 4618 mov r0, r3 + 8002f86: f507 7700 add.w r7, r7, #512 @ 0x200 + 8002f8a: 46bd mov sp, r7 + 8002f8c: bd80 pop {r7, pc} + 8002f8e: bf00 nop + 8002f90: 40021000 .word 0x40021000 -08002ff4 : +08002f94 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8002ff4: b580 push {r7, lr} - 8002ff6: b09e sub sp, #120 @ 0x78 - 8002ff8: af00 add r7, sp, #0 - 8002ffa: 6078 str r0, [r7, #4] - 8002ffc: 6039 str r1, [r7, #0] + 8002f94: b580 push {r7, lr} + 8002f96: b09e sub sp, #120 @ 0x78 + 8002f98: af00 add r7, sp, #0 + 8002f9a: 6078 str r0, [r7, #4] + 8002f9c: 6039 str r1, [r7, #0] uint32_t tickstart = 0U; - 8002ffe: 2300 movs r3, #0 - 8003000: 677b str r3, [r7, #116] @ 0x74 + 8002f9e: 2300 movs r3, #0 + 8002fa0: 677b str r3, [r7, #116] @ 0x74 /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 8003002: 687b ldr r3, [r7, #4] - 8003004: 2b00 cmp r3, #0 - 8003006: d101 bne.n 800300c + 8002fa2: 687b ldr r3, [r7, #4] + 8002fa4: 2b00 cmp r3, #0 + 8002fa6: d101 bne.n 8002fac { return HAL_ERROR; - 8003008: 2301 movs r3, #1 - 800300a: e162 b.n 80032d2 + 8002fa8: 2301 movs r3, #1 + 8002faa: e162 b.n 8003272 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 800300c: 4b90 ldr r3, [pc, #576] @ (8003250 ) - 800300e: 681b ldr r3, [r3, #0] - 8003010: f003 0307 and.w r3, r3, #7 - 8003014: 683a ldr r2, [r7, #0] - 8003016: 429a cmp r2, r3 - 8003018: d910 bls.n 800303c + 8002fac: 4b90 ldr r3, [pc, #576] @ (80031f0 ) + 8002fae: 681b ldr r3, [r3, #0] + 8002fb0: f003 0307 and.w r3, r3, #7 + 8002fb4: 683a ldr r2, [r7, #0] + 8002fb6: 429a cmp r2, r3 + 8002fb8: d910 bls.n 8002fdc { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800301a: 4b8d ldr r3, [pc, #564] @ (8003250 ) - 800301c: 681b ldr r3, [r3, #0] - 800301e: f023 0207 bic.w r2, r3, #7 - 8003022: 498b ldr r1, [pc, #556] @ (8003250 ) - 8003024: 683b ldr r3, [r7, #0] - 8003026: 4313 orrs r3, r2 - 8003028: 600b str r3, [r1, #0] + 8002fba: 4b8d ldr r3, [pc, #564] @ (80031f0 ) + 8002fbc: 681b ldr r3, [r3, #0] + 8002fbe: f023 0207 bic.w r2, r3, #7 + 8002fc2: 498b ldr r1, [pc, #556] @ (80031f0 ) + 8002fc4: 683b ldr r3, [r7, #0] + 8002fc6: 4313 orrs r3, r2 + 8002fc8: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 800302a: 4b89 ldr r3, [pc, #548] @ (8003250 ) - 800302c: 681b ldr r3, [r3, #0] - 800302e: f003 0307 and.w r3, r3, #7 - 8003032: 683a ldr r2, [r7, #0] - 8003034: 429a cmp r2, r3 - 8003036: d001 beq.n 800303c + 8002fca: 4b89 ldr r3, [pc, #548] @ (80031f0 ) + 8002fcc: 681b ldr r3, [r3, #0] + 8002fce: f003 0307 and.w r3, r3, #7 + 8002fd2: 683a ldr r2, [r7, #0] + 8002fd4: 429a cmp r2, r3 + 8002fd6: d001 beq.n 8002fdc { return HAL_ERROR; - 8003038: 2301 movs r3, #1 - 800303a: e14a b.n 80032d2 + 8002fd8: 2301 movs r3, #1 + 8002fda: e14a b.n 8003272 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 800303c: 687b ldr r3, [r7, #4] - 800303e: 681b ldr r3, [r3, #0] - 8003040: f003 0302 and.w r3, r3, #2 - 8003044: 2b00 cmp r3, #0 - 8003046: d008 beq.n 800305a + 8002fdc: 687b ldr r3, [r7, #4] + 8002fde: 681b ldr r3, [r3, #0] + 8002fe0: f003 0302 and.w r3, r3, #2 + 8002fe4: 2b00 cmp r3, #0 + 8002fe6: d008 beq.n 8002ffa { assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8003048: 4b82 ldr r3, [pc, #520] @ (8003254 ) - 800304a: 685b ldr r3, [r3, #4] - 800304c: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 8003050: 687b ldr r3, [r7, #4] - 8003052: 689b ldr r3, [r3, #8] - 8003054: 497f ldr r1, [pc, #508] @ (8003254 ) - 8003056: 4313 orrs r3, r2 - 8003058: 604b str r3, [r1, #4] + 8002fe8: 4b82 ldr r3, [pc, #520] @ (80031f4 ) + 8002fea: 685b ldr r3, [r3, #4] + 8002fec: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 8002ff0: 687b ldr r3, [r7, #4] + 8002ff2: 689b ldr r3, [r3, #8] + 8002ff4: 497f ldr r1, [pc, #508] @ (80031f4 ) + 8002ff6: 4313 orrs r3, r2 + 8002ff8: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 800305a: 687b ldr r3, [r7, #4] - 800305c: 681b ldr r3, [r3, #0] - 800305e: f003 0301 and.w r3, r3, #1 - 8003062: 2b00 cmp r3, #0 - 8003064: f000 80dc beq.w 8003220 + 8002ffa: 687b ldr r3, [r7, #4] + 8002ffc: 681b ldr r3, [r3, #0] + 8002ffe: f003 0301 and.w r3, r3, #1 + 8003002: 2b00 cmp r3, #0 + 8003004: f000 80dc beq.w 80031c0 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8003068: 687b ldr r3, [r7, #4] - 800306a: 685b ldr r3, [r3, #4] - 800306c: 2b01 cmp r3, #1 - 800306e: d13c bne.n 80030ea - 8003070: f44f 3300 mov.w r3, #131072 @ 0x20000 - 8003074: 673b str r3, [r7, #112] @ 0x70 + 8003008: 687b ldr r3, [r7, #4] + 800300a: 685b ldr r3, [r3, #4] + 800300c: 2b01 cmp r3, #1 + 800300e: d13c bne.n 800308a + 8003010: f44f 3300 mov.w r3, #131072 @ 0x20000 + 8003014: 673b str r3, [r7, #112] @ 0x70 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8003076: 6f3b ldr r3, [r7, #112] @ 0x70 - 8003078: fa93 f3a3 rbit r3, r3 - 800307c: 66fb str r3, [r7, #108] @ 0x6c + 8003016: 6f3b ldr r3, [r7, #112] @ 0x70 + 8003018: fa93 f3a3 rbit r3, r3 + 800301c: 66fb str r3, [r7, #108] @ 0x6c return result; - 800307e: 6efb ldr r3, [r7, #108] @ 0x6c + 800301e: 6efb ldr r3, [r7, #108] @ 0x6c { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8003080: fab3 f383 clz r3, r3 - 8003084: b2db uxtb r3, r3 - 8003086: 095b lsrs r3, r3, #5 - 8003088: b2db uxtb r3, r3 - 800308a: f043 0301 orr.w r3, r3, #1 - 800308e: b2db uxtb r3, r3 - 8003090: 2b01 cmp r3, #1 - 8003092: d102 bne.n 800309a - 8003094: 4b6f ldr r3, [pc, #444] @ (8003254 ) - 8003096: 681b ldr r3, [r3, #0] - 8003098: e00f b.n 80030ba - 800309a: f44f 3300 mov.w r3, #131072 @ 0x20000 - 800309e: 66bb str r3, [r7, #104] @ 0x68 + 8003020: fab3 f383 clz r3, r3 + 8003024: b2db uxtb r3, r3 + 8003026: 095b lsrs r3, r3, #5 + 8003028: b2db uxtb r3, r3 + 800302a: f043 0301 orr.w r3, r3, #1 + 800302e: b2db uxtb r3, r3 + 8003030: 2b01 cmp r3, #1 + 8003032: d102 bne.n 800303a + 8003034: 4b6f ldr r3, [pc, #444] @ (80031f4 ) + 8003036: 681b ldr r3, [r3, #0] + 8003038: e00f b.n 800305a + 800303a: f44f 3300 mov.w r3, #131072 @ 0x20000 + 800303e: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80030a0: 6ebb ldr r3, [r7, #104] @ 0x68 - 80030a2: fa93 f3a3 rbit r3, r3 - 80030a6: 667b str r3, [r7, #100] @ 0x64 - 80030a8: f44f 3300 mov.w r3, #131072 @ 0x20000 - 80030ac: 663b str r3, [r7, #96] @ 0x60 - 80030ae: 6e3b ldr r3, [r7, #96] @ 0x60 - 80030b0: fa93 f3a3 rbit r3, r3 - 80030b4: 65fb str r3, [r7, #92] @ 0x5c - 80030b6: 4b67 ldr r3, [pc, #412] @ (8003254 ) - 80030b8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80030ba: f44f 3200 mov.w r2, #131072 @ 0x20000 - 80030be: 65ba str r2, [r7, #88] @ 0x58 - 80030c0: 6dba ldr r2, [r7, #88] @ 0x58 - 80030c2: fa92 f2a2 rbit r2, r2 - 80030c6: 657a str r2, [r7, #84] @ 0x54 + 8003040: 6ebb ldr r3, [r7, #104] @ 0x68 + 8003042: fa93 f3a3 rbit r3, r3 + 8003046: 667b str r3, [r7, #100] @ 0x64 + 8003048: f44f 3300 mov.w r3, #131072 @ 0x20000 + 800304c: 663b str r3, [r7, #96] @ 0x60 + 800304e: 6e3b ldr r3, [r7, #96] @ 0x60 + 8003050: fa93 f3a3 rbit r3, r3 + 8003054: 65fb str r3, [r7, #92] @ 0x5c + 8003056: 4b67 ldr r3, [pc, #412] @ (80031f4 ) + 8003058: 6a5b ldr r3, [r3, #36] @ 0x24 + 800305a: f44f 3200 mov.w r2, #131072 @ 0x20000 + 800305e: 65ba str r2, [r7, #88] @ 0x58 + 8003060: 6dba ldr r2, [r7, #88] @ 0x58 + 8003062: fa92 f2a2 rbit r2, r2 + 8003066: 657a str r2, [r7, #84] @ 0x54 return result; - 80030c8: 6d7a ldr r2, [r7, #84] @ 0x54 - 80030ca: fab2 f282 clz r2, r2 - 80030ce: b2d2 uxtb r2, r2 - 80030d0: f042 0220 orr.w r2, r2, #32 - 80030d4: b2d2 uxtb r2, r2 - 80030d6: f002 021f and.w r2, r2, #31 - 80030da: 2101 movs r1, #1 - 80030dc: fa01 f202 lsl.w r2, r1, r2 - 80030e0: 4013 ands r3, r2 - 80030e2: 2b00 cmp r3, #0 - 80030e4: d17b bne.n 80031de + 8003068: 6d7a ldr r2, [r7, #84] @ 0x54 + 800306a: fab2 f282 clz r2, r2 + 800306e: b2d2 uxtb r2, r2 + 8003070: f042 0220 orr.w r2, r2, #32 + 8003074: b2d2 uxtb r2, r2 + 8003076: f002 021f and.w r2, r2, #31 + 800307a: 2101 movs r1, #1 + 800307c: fa01 f202 lsl.w r2, r1, r2 + 8003080: 4013 ands r3, r2 + 8003082: 2b00 cmp r3, #0 + 8003084: d17b bne.n 800317e { return HAL_ERROR; - 80030e6: 2301 movs r3, #1 - 80030e8: e0f3 b.n 80032d2 + 8003086: 2301 movs r3, #1 + 8003088: e0f3 b.n 8003272 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80030ea: 687b ldr r3, [r7, #4] - 80030ec: 685b ldr r3, [r3, #4] - 80030ee: 2b02 cmp r3, #2 - 80030f0: d13c bne.n 800316c - 80030f2: f04f 7300 mov.w r3, #33554432 @ 0x2000000 - 80030f6: 653b str r3, [r7, #80] @ 0x50 + 800308a: 687b ldr r3, [r7, #4] + 800308c: 685b ldr r3, [r3, #4] + 800308e: 2b02 cmp r3, #2 + 8003090: d13c bne.n 800310c + 8003092: f04f 7300 mov.w r3, #33554432 @ 0x2000000 + 8003096: 653b str r3, [r7, #80] @ 0x50 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80030f8: 6d3b ldr r3, [r7, #80] @ 0x50 - 80030fa: fa93 f3a3 rbit r3, r3 - 80030fe: 64fb str r3, [r7, #76] @ 0x4c + 8003098: 6d3b ldr r3, [r7, #80] @ 0x50 + 800309a: fa93 f3a3 rbit r3, r3 + 800309e: 64fb str r3, [r7, #76] @ 0x4c return result; - 8003100: 6cfb ldr r3, [r7, #76] @ 0x4c + 80030a0: 6cfb ldr r3, [r7, #76] @ 0x4c { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8003102: fab3 f383 clz r3, r3 - 8003106: b2db uxtb r3, r3 - 8003108: 095b lsrs r3, r3, #5 - 800310a: b2db uxtb r3, r3 - 800310c: f043 0301 orr.w r3, r3, #1 - 8003110: b2db uxtb r3, r3 - 8003112: 2b01 cmp r3, #1 - 8003114: d102 bne.n 800311c - 8003116: 4b4f ldr r3, [pc, #316] @ (8003254 ) - 8003118: 681b ldr r3, [r3, #0] - 800311a: e00f b.n 800313c - 800311c: f04f 7300 mov.w r3, #33554432 @ 0x2000000 - 8003120: 64bb str r3, [r7, #72] @ 0x48 + 80030a2: fab3 f383 clz r3, r3 + 80030a6: b2db uxtb r3, r3 + 80030a8: 095b lsrs r3, r3, #5 + 80030aa: b2db uxtb r3, r3 + 80030ac: f043 0301 orr.w r3, r3, #1 + 80030b0: b2db uxtb r3, r3 + 80030b2: 2b01 cmp r3, #1 + 80030b4: d102 bne.n 80030bc + 80030b6: 4b4f ldr r3, [pc, #316] @ (80031f4 ) + 80030b8: 681b ldr r3, [r3, #0] + 80030ba: e00f b.n 80030dc + 80030bc: f04f 7300 mov.w r3, #33554432 @ 0x2000000 + 80030c0: 64bb str r3, [r7, #72] @ 0x48 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8003122: 6cbb ldr r3, [r7, #72] @ 0x48 - 8003124: fa93 f3a3 rbit r3, r3 - 8003128: 647b str r3, [r7, #68] @ 0x44 - 800312a: f04f 7300 mov.w r3, #33554432 @ 0x2000000 - 800312e: 643b str r3, [r7, #64] @ 0x40 - 8003130: 6c3b ldr r3, [r7, #64] @ 0x40 - 8003132: fa93 f3a3 rbit r3, r3 - 8003136: 63fb str r3, [r7, #60] @ 0x3c - 8003138: 4b46 ldr r3, [pc, #280] @ (8003254 ) - 800313a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800313c: f04f 7200 mov.w r2, #33554432 @ 0x2000000 - 8003140: 63ba str r2, [r7, #56] @ 0x38 - 8003142: 6bba ldr r2, [r7, #56] @ 0x38 - 8003144: fa92 f2a2 rbit r2, r2 - 8003148: 637a str r2, [r7, #52] @ 0x34 + 80030c2: 6cbb ldr r3, [r7, #72] @ 0x48 + 80030c4: fa93 f3a3 rbit r3, r3 + 80030c8: 647b str r3, [r7, #68] @ 0x44 + 80030ca: f04f 7300 mov.w r3, #33554432 @ 0x2000000 + 80030ce: 643b str r3, [r7, #64] @ 0x40 + 80030d0: 6c3b ldr r3, [r7, #64] @ 0x40 + 80030d2: fa93 f3a3 rbit r3, r3 + 80030d6: 63fb str r3, [r7, #60] @ 0x3c + 80030d8: 4b46 ldr r3, [pc, #280] @ (80031f4 ) + 80030da: 6a5b ldr r3, [r3, #36] @ 0x24 + 80030dc: f04f 7200 mov.w r2, #33554432 @ 0x2000000 + 80030e0: 63ba str r2, [r7, #56] @ 0x38 + 80030e2: 6bba ldr r2, [r7, #56] @ 0x38 + 80030e4: fa92 f2a2 rbit r2, r2 + 80030e8: 637a str r2, [r7, #52] @ 0x34 return result; - 800314a: 6b7a ldr r2, [r7, #52] @ 0x34 - 800314c: fab2 f282 clz r2, r2 - 8003150: b2d2 uxtb r2, r2 - 8003152: f042 0220 orr.w r2, r2, #32 - 8003156: b2d2 uxtb r2, r2 - 8003158: f002 021f and.w r2, r2, #31 - 800315c: 2101 movs r1, #1 - 800315e: fa01 f202 lsl.w r2, r1, r2 - 8003162: 4013 ands r3, r2 - 8003164: 2b00 cmp r3, #0 - 8003166: d13a bne.n 80031de + 80030ea: 6b7a ldr r2, [r7, #52] @ 0x34 + 80030ec: fab2 f282 clz r2, r2 + 80030f0: b2d2 uxtb r2, r2 + 80030f2: f042 0220 orr.w r2, r2, #32 + 80030f6: b2d2 uxtb r2, r2 + 80030f8: f002 021f and.w r2, r2, #31 + 80030fc: 2101 movs r1, #1 + 80030fe: fa01 f202 lsl.w r2, r1, r2 + 8003102: 4013 ands r3, r2 + 8003104: 2b00 cmp r3, #0 + 8003106: d13a bne.n 800317e { return HAL_ERROR; - 8003168: 2301 movs r3, #1 - 800316a: e0b2 b.n 80032d2 - 800316c: 2302 movs r3, #2 - 800316e: 633b str r3, [r7, #48] @ 0x30 + 8003108: 2301 movs r3, #1 + 800310a: e0b2 b.n 8003272 + 800310c: 2302 movs r3, #2 + 800310e: 633b str r3, [r7, #48] @ 0x30 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8003170: 6b3b ldr r3, [r7, #48] @ 0x30 - 8003172: fa93 f3a3 rbit r3, r3 - 8003176: 62fb str r3, [r7, #44] @ 0x2c + 8003110: 6b3b ldr r3, [r7, #48] @ 0x30 + 8003112: fa93 f3a3 rbit r3, r3 + 8003116: 62fb str r3, [r7, #44] @ 0x2c return result; - 8003178: 6afb ldr r3, [r7, #44] @ 0x2c + 8003118: 6afb ldr r3, [r7, #44] @ 0x2c } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800317a: fab3 f383 clz r3, r3 - 800317e: b2db uxtb r3, r3 - 8003180: 095b lsrs r3, r3, #5 - 8003182: b2db uxtb r3, r3 - 8003184: f043 0301 orr.w r3, r3, #1 - 8003188: b2db uxtb r3, r3 - 800318a: 2b01 cmp r3, #1 - 800318c: d102 bne.n 8003194 - 800318e: 4b31 ldr r3, [pc, #196] @ (8003254 ) - 8003190: 681b ldr r3, [r3, #0] - 8003192: e00d b.n 80031b0 - 8003194: 2302 movs r3, #2 - 8003196: 62bb str r3, [r7, #40] @ 0x28 + 800311a: fab3 f383 clz r3, r3 + 800311e: b2db uxtb r3, r3 + 8003120: 095b lsrs r3, r3, #5 + 8003122: b2db uxtb r3, r3 + 8003124: f043 0301 orr.w r3, r3, #1 + 8003128: b2db uxtb r3, r3 + 800312a: 2b01 cmp r3, #1 + 800312c: d102 bne.n 8003134 + 800312e: 4b31 ldr r3, [pc, #196] @ (80031f4 ) + 8003130: 681b ldr r3, [r3, #0] + 8003132: e00d b.n 8003150 + 8003134: 2302 movs r3, #2 + 8003136: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8003198: 6abb ldr r3, [r7, #40] @ 0x28 - 800319a: fa93 f3a3 rbit r3, r3 - 800319e: 627b str r3, [r7, #36] @ 0x24 - 80031a0: 2302 movs r3, #2 - 80031a2: 623b str r3, [r7, #32] - 80031a4: 6a3b ldr r3, [r7, #32] - 80031a6: fa93 f3a3 rbit r3, r3 - 80031aa: 61fb str r3, [r7, #28] - 80031ac: 4b29 ldr r3, [pc, #164] @ (8003254 ) - 80031ae: 6a5b ldr r3, [r3, #36] @ 0x24 - 80031b0: 2202 movs r2, #2 - 80031b2: 61ba str r2, [r7, #24] - 80031b4: 69ba ldr r2, [r7, #24] - 80031b6: fa92 f2a2 rbit r2, r2 - 80031ba: 617a str r2, [r7, #20] + 8003138: 6abb ldr r3, [r7, #40] @ 0x28 + 800313a: fa93 f3a3 rbit r3, r3 + 800313e: 627b str r3, [r7, #36] @ 0x24 + 8003140: 2302 movs r3, #2 + 8003142: 623b str r3, [r7, #32] + 8003144: 6a3b ldr r3, [r7, #32] + 8003146: fa93 f3a3 rbit r3, r3 + 800314a: 61fb str r3, [r7, #28] + 800314c: 4b29 ldr r3, [pc, #164] @ (80031f4 ) + 800314e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003150: 2202 movs r2, #2 + 8003152: 61ba str r2, [r7, #24] + 8003154: 69ba ldr r2, [r7, #24] + 8003156: fa92 f2a2 rbit r2, r2 + 800315a: 617a str r2, [r7, #20] return result; - 80031bc: 697a ldr r2, [r7, #20] - 80031be: fab2 f282 clz r2, r2 - 80031c2: b2d2 uxtb r2, r2 - 80031c4: f042 0220 orr.w r2, r2, #32 - 80031c8: b2d2 uxtb r2, r2 - 80031ca: f002 021f and.w r2, r2, #31 - 80031ce: 2101 movs r1, #1 - 80031d0: fa01 f202 lsl.w r2, r1, r2 - 80031d4: 4013 ands r3, r2 - 80031d6: 2b00 cmp r3, #0 - 80031d8: d101 bne.n 80031de + 800315c: 697a ldr r2, [r7, #20] + 800315e: fab2 f282 clz r2, r2 + 8003162: b2d2 uxtb r2, r2 + 8003164: f042 0220 orr.w r2, r2, #32 + 8003168: b2d2 uxtb r2, r2 + 800316a: f002 021f and.w r2, r2, #31 + 800316e: 2101 movs r1, #1 + 8003170: fa01 f202 lsl.w r2, r1, r2 + 8003174: 4013 ands r3, r2 + 8003176: 2b00 cmp r3, #0 + 8003178: d101 bne.n 800317e { return HAL_ERROR; - 80031da: 2301 movs r3, #1 - 80031dc: e079 b.n 80032d2 + 800317a: 2301 movs r3, #1 + 800317c: e079 b.n 8003272 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80031de: 4b1d ldr r3, [pc, #116] @ (8003254 ) - 80031e0: 685b ldr r3, [r3, #4] - 80031e2: f023 0203 bic.w r2, r3, #3 - 80031e6: 687b ldr r3, [r7, #4] - 80031e8: 685b ldr r3, [r3, #4] - 80031ea: 491a ldr r1, [pc, #104] @ (8003254 ) - 80031ec: 4313 orrs r3, r2 - 80031ee: 604b str r3, [r1, #4] + 800317e: 4b1d ldr r3, [pc, #116] @ (80031f4 ) + 8003180: 685b ldr r3, [r3, #4] + 8003182: f023 0203 bic.w r2, r3, #3 + 8003186: 687b ldr r3, [r7, #4] + 8003188: 685b ldr r3, [r3, #4] + 800318a: 491a ldr r1, [pc, #104] @ (80031f4 ) + 800318c: 4313 orrs r3, r2 + 800318e: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80031f0: f7fd fd50 bl 8000c94 - 80031f4: 6778 str r0, [r7, #116] @ 0x74 + 8003190: f7fd fd36 bl 8000c00 + 8003194: 6778 str r0, [r7, #116] @ 0x74 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80031f6: e00a b.n 800320e + 8003196: e00a b.n 80031ae { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80031f8: f7fd fd4c bl 8000c94 - 80031fc: 4602 mov r2, r0 - 80031fe: 6f7b ldr r3, [r7, #116] @ 0x74 - 8003200: 1ad3 subs r3, r2, r3 - 8003202: f241 3288 movw r2, #5000 @ 0x1388 - 8003206: 4293 cmp r3, r2 - 8003208: d901 bls.n 800320e + 8003198: f7fd fd32 bl 8000c00 + 800319c: 4602 mov r2, r0 + 800319e: 6f7b ldr r3, [r7, #116] @ 0x74 + 80031a0: 1ad3 subs r3, r2, r3 + 80031a2: f241 3288 movw r2, #5000 @ 0x1388 + 80031a6: 4293 cmp r3, r2 + 80031a8: d901 bls.n 80031ae { return HAL_TIMEOUT; - 800320a: 2303 movs r3, #3 - 800320c: e061 b.n 80032d2 + 80031aa: 2303 movs r3, #3 + 80031ac: e061 b.n 8003272 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 800320e: 4b11 ldr r3, [pc, #68] @ (8003254 ) - 8003210: 685b ldr r3, [r3, #4] - 8003212: f003 020c and.w r2, r3, #12 - 8003216: 687b ldr r3, [r7, #4] - 8003218: 685b ldr r3, [r3, #4] - 800321a: 009b lsls r3, r3, #2 - 800321c: 429a cmp r2, r3 - 800321e: d1eb bne.n 80031f8 + 80031ae: 4b11 ldr r3, [pc, #68] @ (80031f4 ) + 80031b0: 685b ldr r3, [r3, #4] + 80031b2: f003 020c and.w r2, r3, #12 + 80031b6: 687b ldr r3, [r7, #4] + 80031b8: 685b ldr r3, [r3, #4] + 80031ba: 009b lsls r3, r3, #2 + 80031bc: 429a cmp r2, r3 + 80031be: d1eb bne.n 8003198 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 8003220: 4b0b ldr r3, [pc, #44] @ (8003250 ) - 8003222: 681b ldr r3, [r3, #0] - 8003224: f003 0307 and.w r3, r3, #7 - 8003228: 683a ldr r2, [r7, #0] - 800322a: 429a cmp r2, r3 - 800322c: d214 bcs.n 8003258 + 80031c0: 4b0b ldr r3, [pc, #44] @ (80031f0 ) + 80031c2: 681b ldr r3, [r3, #0] + 80031c4: f003 0307 and.w r3, r3, #7 + 80031c8: 683a ldr r2, [r7, #0] + 80031ca: 429a cmp r2, r3 + 80031cc: d214 bcs.n 80031f8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800322e: 4b08 ldr r3, [pc, #32] @ (8003250 ) - 8003230: 681b ldr r3, [r3, #0] - 8003232: f023 0207 bic.w r2, r3, #7 - 8003236: 4906 ldr r1, [pc, #24] @ (8003250 ) - 8003238: 683b ldr r3, [r7, #0] - 800323a: 4313 orrs r3, r2 - 800323c: 600b str r3, [r1, #0] + 80031ce: 4b08 ldr r3, [pc, #32] @ (80031f0 ) + 80031d0: 681b ldr r3, [r3, #0] + 80031d2: f023 0207 bic.w r2, r3, #7 + 80031d6: 4906 ldr r1, [pc, #24] @ (80031f0 ) + 80031d8: 683b ldr r3, [r7, #0] + 80031da: 4313 orrs r3, r2 + 80031dc: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 800323e: 4b04 ldr r3, [pc, #16] @ (8003250 ) - 8003240: 681b ldr r3, [r3, #0] - 8003242: f003 0307 and.w r3, r3, #7 - 8003246: 683a ldr r2, [r7, #0] - 8003248: 429a cmp r2, r3 - 800324a: d005 beq.n 8003258 + 80031de: 4b04 ldr r3, [pc, #16] @ (80031f0 ) + 80031e0: 681b ldr r3, [r3, #0] + 80031e2: f003 0307 and.w r3, r3, #7 + 80031e6: 683a ldr r2, [r7, #0] + 80031e8: 429a cmp r2, r3 + 80031ea: d005 beq.n 80031f8 { return HAL_ERROR; - 800324c: 2301 movs r3, #1 - 800324e: e040 b.n 80032d2 - 8003250: 40022000 .word 0x40022000 - 8003254: 40021000 .word 0x40021000 + 80031ec: 2301 movs r3, #1 + 80031ee: e040 b.n 8003272 + 80031f0: 40022000 .word 0x40022000 + 80031f4: 40021000 .word 0x40021000 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8003258: 687b ldr r3, [r7, #4] - 800325a: 681b ldr r3, [r3, #0] - 800325c: f003 0304 and.w r3, r3, #4 - 8003260: 2b00 cmp r3, #0 - 8003262: d008 beq.n 8003276 + 80031f8: 687b ldr r3, [r7, #4] + 80031fa: 681b ldr r3, [r3, #0] + 80031fc: f003 0304 and.w r3, r3, #4 + 8003200: 2b00 cmp r3, #0 + 8003202: d008 beq.n 8003216 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8003264: 4b1d ldr r3, [pc, #116] @ (80032dc ) - 8003266: 685b ldr r3, [r3, #4] - 8003268: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 800326c: 687b ldr r3, [r7, #4] - 800326e: 68db ldr r3, [r3, #12] - 8003270: 491a ldr r1, [pc, #104] @ (80032dc ) - 8003272: 4313 orrs r3, r2 - 8003274: 604b str r3, [r1, #4] + 8003204: 4b1d ldr r3, [pc, #116] @ (800327c ) + 8003206: 685b ldr r3, [r3, #4] + 8003208: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 800320c: 687b ldr r3, [r7, #4] + 800320e: 68db ldr r3, [r3, #12] + 8003210: 491a ldr r1, [pc, #104] @ (800327c ) + 8003212: 4313 orrs r3, r2 + 8003214: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8003276: 687b ldr r3, [r7, #4] - 8003278: 681b ldr r3, [r3, #0] - 800327a: f003 0308 and.w r3, r3, #8 - 800327e: 2b00 cmp r3, #0 - 8003280: d009 beq.n 8003296 + 8003216: 687b ldr r3, [r7, #4] + 8003218: 681b ldr r3, [r3, #0] + 800321a: f003 0308 and.w r3, r3, #8 + 800321e: 2b00 cmp r3, #0 + 8003220: d009 beq.n 8003236 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 8003282: 4b16 ldr r3, [pc, #88] @ (80032dc ) - 8003284: 685b ldr r3, [r3, #4] - 8003286: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 800328a: 687b ldr r3, [r7, #4] - 800328c: 691b ldr r3, [r3, #16] - 800328e: 00db lsls r3, r3, #3 - 8003290: 4912 ldr r1, [pc, #72] @ (80032dc ) - 8003292: 4313 orrs r3, r2 - 8003294: 604b str r3, [r1, #4] + 8003222: 4b16 ldr r3, [pc, #88] @ (800327c ) + 8003224: 685b ldr r3, [r3, #4] + 8003226: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 800322a: 687b ldr r3, [r7, #4] + 800322c: 691b ldr r3, [r3, #16] + 800322e: 00db lsls r3, r3, #3 + 8003230: 4912 ldr r1, [pc, #72] @ (800327c ) + 8003232: 4313 orrs r3, r2 + 8003234: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; - 8003296: f000 f829 bl 80032ec - 800329a: 4601 mov r1, r0 - 800329c: 4b0f ldr r3, [pc, #60] @ (80032dc ) - 800329e: 685b ldr r3, [r3, #4] - 80032a0: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 80032a4: 22f0 movs r2, #240 @ 0xf0 - 80032a6: 613a str r2, [r7, #16] + 8003236: f000 f829 bl 800328c + 800323a: 4601 mov r1, r0 + 800323c: 4b0f ldr r3, [pc, #60] @ (800327c ) + 800323e: 685b ldr r3, [r3, #4] + 8003240: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 8003244: 22f0 movs r2, #240 @ 0xf0 + 8003246: 613a str r2, [r7, #16] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80032a8: 693a ldr r2, [r7, #16] - 80032aa: fa92 f2a2 rbit r2, r2 - 80032ae: 60fa str r2, [r7, #12] + 8003248: 693a ldr r2, [r7, #16] + 800324a: fa92 f2a2 rbit r2, r2 + 800324e: 60fa str r2, [r7, #12] return result; - 80032b0: 68fa ldr r2, [r7, #12] - 80032b2: fab2 f282 clz r2, r2 - 80032b6: b2d2 uxtb r2, r2 - 80032b8: 40d3 lsrs r3, r2 - 80032ba: 4a09 ldr r2, [pc, #36] @ (80032e0 ) - 80032bc: 5cd3 ldrb r3, [r2, r3] - 80032be: fa21 f303 lsr.w r3, r1, r3 - 80032c2: 4a08 ldr r2, [pc, #32] @ (80032e4 ) - 80032c4: 6013 str r3, [r2, #0] + 8003250: 68fa ldr r2, [r7, #12] + 8003252: fab2 f282 clz r2, r2 + 8003256: b2d2 uxtb r2, r2 + 8003258: 40d3 lsrs r3, r2 + 800325a: 4a09 ldr r2, [pc, #36] @ (8003280 ) + 800325c: 5cd3 ldrb r3, [r2, r3] + 800325e: fa21 f303 lsr.w r3, r1, r3 + 8003262: 4a08 ldr r2, [pc, #32] @ (8003284 ) + 8003264: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick (uwTickPrio); - 80032c6: 4b08 ldr r3, [pc, #32] @ (80032e8 ) - 80032c8: 681b ldr r3, [r3, #0] - 80032ca: 4618 mov r0, r3 - 80032cc: f7fd fc9e bl 8000c0c + 8003266: 4b08 ldr r3, [pc, #32] @ (8003288 ) + 8003268: 681b ldr r3, [r3, #0] + 800326a: 4618 mov r0, r3 + 800326c: f7fd fc84 bl 8000b78 return HAL_OK; - 80032d0: 2300 movs r3, #0 + 8003270: 2300 movs r3, #0 } - 80032d2: 4618 mov r0, r3 - 80032d4: 3778 adds r7, #120 @ 0x78 - 80032d6: 46bd mov sp, r7 - 80032d8: bd80 pop {r7, pc} - 80032da: bf00 nop - 80032dc: 40021000 .word 0x40021000 - 80032e0: 08003408 .word 0x08003408 - 80032e4: 20000000 .word 0x20000000 - 80032e8: 20000004 .word 0x20000004 + 8003272: 4618 mov r0, r3 + 8003274: 3778 adds r7, #120 @ 0x78 + 8003276: 46bd mov sp, r7 + 8003278: bd80 pop {r7, pc} + 800327a: bf00 nop + 800327c: 40021000 .word 0x40021000 + 8003280: 080033a8 .word 0x080033a8 + 8003284: 20000000 .word 0x20000000 + 8003288: 20000004 .word 0x20000004 -080032ec : +0800328c : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 80032ec: b480 push {r7} - 80032ee: b087 sub sp, #28 - 80032f0: af00 add r7, sp, #0 + 800328c: b480 push {r7} + 800328e: b087 sub sp, #28 + 8003290: af00 add r7, sp, #0 uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 80032f2: 2300 movs r3, #0 - 80032f4: 60fb str r3, [r7, #12] - 80032f6: 2300 movs r3, #0 - 80032f8: 60bb str r3, [r7, #8] - 80032fa: 2300 movs r3, #0 - 80032fc: 617b str r3, [r7, #20] - 80032fe: 2300 movs r3, #0 - 8003300: 607b str r3, [r7, #4] + 8003292: 2300 movs r3, #0 + 8003294: 60fb str r3, [r7, #12] + 8003296: 2300 movs r3, #0 + 8003298: 60bb str r3, [r7, #8] + 800329a: 2300 movs r3, #0 + 800329c: 617b str r3, [r7, #20] + 800329e: 2300 movs r3, #0 + 80032a0: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; - 8003302: 2300 movs r3, #0 - 8003304: 613b str r3, [r7, #16] + 80032a2: 2300 movs r3, #0 + 80032a4: 613b str r3, [r7, #16] tmpreg = RCC->CFGR; - 8003306: 4b1e ldr r3, [pc, #120] @ (8003380 ) - 8003308: 685b ldr r3, [r3, #4] - 800330a: 60fb str r3, [r7, #12] + 80032a6: 4b1e ldr r3, [pc, #120] @ (8003320 ) + 80032a8: 685b ldr r3, [r3, #4] + 80032aa: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 800330c: 68fb ldr r3, [r7, #12] - 800330e: f003 030c and.w r3, r3, #12 - 8003312: 2b04 cmp r3, #4 - 8003314: d002 beq.n 800331c - 8003316: 2b08 cmp r3, #8 - 8003318: d003 beq.n 8003322 - 800331a: e026 b.n 800336a + 80032ac: 68fb ldr r3, [r7, #12] + 80032ae: f003 030c and.w r3, r3, #12 + 80032b2: 2b04 cmp r3, #4 + 80032b4: d002 beq.n 80032bc + 80032b6: 2b08 cmp r3, #8 + 80032b8: d003 beq.n 80032c2 + 80032ba: e026 b.n 800330a { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 800331c: 4b19 ldr r3, [pc, #100] @ (8003384 ) - 800331e: 613b str r3, [r7, #16] + 80032bc: 4b19 ldr r3, [pc, #100] @ (8003324 ) + 80032be: 613b str r3, [r7, #16] break; - 8003320: e026 b.n 8003370 + 80032c0: e026 b.n 8003310 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; - 8003322: 68fb ldr r3, [r7, #12] - 8003324: 0c9b lsrs r3, r3, #18 - 8003326: f003 030f and.w r3, r3, #15 - 800332a: 4a17 ldr r2, [pc, #92] @ (8003388 ) - 800332c: 5cd3 ldrb r3, [r2, r3] - 800332e: 607b str r3, [r7, #4] + 80032c2: 68fb ldr r3, [r7, #12] + 80032c4: 0c9b lsrs r3, r3, #18 + 80032c6: f003 030f and.w r3, r3, #15 + 80032ca: 4a17 ldr r2, [pc, #92] @ (8003328 ) + 80032cc: 5cd3 ldrb r3, [r2, r3] + 80032ce: 607b str r3, [r7, #4] prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos]; - 8003330: 4b13 ldr r3, [pc, #76] @ (8003380 ) - 8003332: 6adb ldr r3, [r3, #44] @ 0x2c - 8003334: f003 030f and.w r3, r3, #15 - 8003338: 4a14 ldr r2, [pc, #80] @ (800338c ) - 800333a: 5cd3 ldrb r3, [r2, r3] - 800333c: 60bb str r3, [r7, #8] + 80032d0: 4b13 ldr r3, [pc, #76] @ (8003320 ) + 80032d2: 6adb ldr r3, [r3, #44] @ 0x2c + 80032d4: f003 030f and.w r3, r3, #15 + 80032d8: 4a14 ldr r2, [pc, #80] @ (800332c ) + 80032da: 5cd3 ldrb r3, [r2, r3] + 80032dc: 60bb str r3, [r7, #8] #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) - 800333e: 68fb ldr r3, [r7, #12] - 8003340: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8003344: 2b00 cmp r3, #0 - 8003346: d008 beq.n 800335a + 80032de: 68fb ldr r3, [r7, #12] + 80032e0: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80032e4: 2b00 cmp r3, #0 + 80032e6: d008 beq.n 80032fa { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); - 8003348: 4a0e ldr r2, [pc, #56] @ (8003384 ) - 800334a: 68bb ldr r3, [r7, #8] - 800334c: fbb2 f2f3 udiv r2, r2, r3 - 8003350: 687b ldr r3, [r7, #4] - 8003352: fb02 f303 mul.w r3, r2, r3 - 8003356: 617b str r3, [r7, #20] - 8003358: e004 b.n 8003364 + 80032e8: 4a0e ldr r2, [pc, #56] @ (8003324 ) + 80032ea: 68bb ldr r3, [r7, #8] + 80032ec: fbb2 f2f3 udiv r2, r2, r3 + 80032f0: 687b ldr r3, [r7, #4] + 80032f2: fb02 f303 mul.w r3, r2, r3 + 80032f6: 617b str r3, [r7, #20] + 80032f8: e004 b.n 8003304 } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); - 800335a: 687b ldr r3, [r7, #4] - 800335c: 4a0c ldr r2, [pc, #48] @ (8003390 ) - 800335e: fb02 f303 mul.w r3, r2, r3 - 8003362: 617b str r3, [r7, #20] + 80032fa: 687b ldr r3, [r7, #4] + 80032fc: 4a0c ldr r2, [pc, #48] @ (8003330 ) + 80032fe: fb02 f303 mul.w r3, r2, r3 + 8003302: 617b str r3, [r7, #20] { /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); } #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ sysclockfreq = pllclk; - 8003364: 697b ldr r3, [r7, #20] - 8003366: 613b str r3, [r7, #16] + 8003304: 697b ldr r3, [r7, #20] + 8003306: 613b str r3, [r7, #16] break; - 8003368: e002 b.n 8003370 + 8003308: e002 b.n 8003310 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 800336a: 4b0a ldr r3, [pc, #40] @ (8003394 ) - 800336c: 613b str r3, [r7, #16] + 800330a: 4b0a ldr r3, [pc, #40] @ (8003334 ) + 800330c: 613b str r3, [r7, #16] break; - 800336e: bf00 nop + 800330e: bf00 nop } } return sysclockfreq; - 8003370: 693b ldr r3, [r7, #16] + 8003310: 693b ldr r3, [r7, #16] } - 8003372: 4618 mov r0, r3 - 8003374: 371c adds r7, #28 - 8003376: 46bd mov sp, r7 - 8003378: f85d 7b04 ldr.w r7, [sp], #4 - 800337c: 4770 bx lr - 800337e: bf00 nop - 8003380: 40021000 .word 0x40021000 - 8003384: 00f42400 .word 0x00f42400 - 8003388: 08003418 .word 0x08003418 - 800338c: 08003428 .word 0x08003428 - 8003390: 003d0900 .word 0x003d0900 - 8003394: 007a1200 .word 0x007a1200 + 8003312: 4618 mov r0, r3 + 8003314: 371c adds r7, #28 + 8003316: 46bd mov sp, r7 + 8003318: f85d 7b04 ldr.w r7, [sp], #4 + 800331c: 4770 bx lr + 800331e: bf00 nop + 8003320: 40021000 .word 0x40021000 + 8003324: 00f42400 .word 0x00f42400 + 8003328: 080033b8 .word 0x080033b8 + 800332c: 080033c8 .word 0x080033c8 + 8003330: 003d0900 .word 0x003d0900 + 8003334: 007a1200 .word 0x007a1200 -08003398 : - 8003398: 4402 add r2, r0 - 800339a: 4603 mov r3, r0 - 800339c: 4293 cmp r3, r2 - 800339e: d100 bne.n 80033a2 - 80033a0: 4770 bx lr - 80033a2: f803 1b01 strb.w r1, [r3], #1 - 80033a6: e7f9 b.n 800339c +08003338 : + 8003338: 4402 add r2, r0 + 800333a: 4603 mov r3, r0 + 800333c: 4293 cmp r3, r2 + 800333e: d100 bne.n 8003342 + 8003340: 4770 bx lr + 8003342: f803 1b01 strb.w r1, [r3], #1 + 8003346: e7f9 b.n 800333c -080033a8 <__libc_init_array>: - 80033a8: b570 push {r4, r5, r6, lr} - 80033aa: 4d0d ldr r5, [pc, #52] @ (80033e0 <__libc_init_array+0x38>) - 80033ac: 4c0d ldr r4, [pc, #52] @ (80033e4 <__libc_init_array+0x3c>) - 80033ae: 1b64 subs r4, r4, r5 - 80033b0: 10a4 asrs r4, r4, #2 - 80033b2: 2600 movs r6, #0 - 80033b4: 42a6 cmp r6, r4 - 80033b6: d109 bne.n 80033cc <__libc_init_array+0x24> - 80033b8: 4d0b ldr r5, [pc, #44] @ (80033e8 <__libc_init_array+0x40>) - 80033ba: 4c0c ldr r4, [pc, #48] @ (80033ec <__libc_init_array+0x44>) - 80033bc: f000 f818 bl 80033f0 <_init> - 80033c0: 1b64 subs r4, r4, r5 - 80033c2: 10a4 asrs r4, r4, #2 - 80033c4: 2600 movs r6, #0 - 80033c6: 42a6 cmp r6, r4 - 80033c8: d105 bne.n 80033d6 <__libc_init_array+0x2e> - 80033ca: bd70 pop {r4, r5, r6, pc} - 80033cc: f855 3b04 ldr.w r3, [r5], #4 - 80033d0: 4798 blx r3 - 80033d2: 3601 adds r6, #1 - 80033d4: e7ee b.n 80033b4 <__libc_init_array+0xc> - 80033d6: f855 3b04 ldr.w r3, [r5], #4 - 80033da: 4798 blx r3 - 80033dc: 3601 adds r6, #1 - 80033de: e7f2 b.n 80033c6 <__libc_init_array+0x1e> - 80033e0: 08003438 .word 0x08003438 - 80033e4: 08003438 .word 0x08003438 - 80033e8: 08003438 .word 0x08003438 - 80033ec: 0800343c .word 0x0800343c +08003348 <__libc_init_array>: + 8003348: b570 push {r4, r5, r6, lr} + 800334a: 4d0d ldr r5, [pc, #52] @ (8003380 <__libc_init_array+0x38>) + 800334c: 4c0d ldr r4, [pc, #52] @ (8003384 <__libc_init_array+0x3c>) + 800334e: 1b64 subs r4, r4, r5 + 8003350: 10a4 asrs r4, r4, #2 + 8003352: 2600 movs r6, #0 + 8003354: 42a6 cmp r6, r4 + 8003356: d109 bne.n 800336c <__libc_init_array+0x24> + 8003358: 4d0b ldr r5, [pc, #44] @ (8003388 <__libc_init_array+0x40>) + 800335a: 4c0c ldr r4, [pc, #48] @ (800338c <__libc_init_array+0x44>) + 800335c: f000 f818 bl 8003390 <_init> + 8003360: 1b64 subs r4, r4, r5 + 8003362: 10a4 asrs r4, r4, #2 + 8003364: 2600 movs r6, #0 + 8003366: 42a6 cmp r6, r4 + 8003368: d105 bne.n 8003376 <__libc_init_array+0x2e> + 800336a: bd70 pop {r4, r5, r6, pc} + 800336c: f855 3b04 ldr.w r3, [r5], #4 + 8003370: 4798 blx r3 + 8003372: 3601 adds r6, #1 + 8003374: e7ee b.n 8003354 <__libc_init_array+0xc> + 8003376: f855 3b04 ldr.w r3, [r5], #4 + 800337a: 4798 blx r3 + 800337c: 3601 adds r6, #1 + 800337e: e7f2 b.n 8003366 <__libc_init_array+0x1e> + 8003380: 080033d8 .word 0x080033d8 + 8003384: 080033d8 .word 0x080033d8 + 8003388: 080033d8 .word 0x080033d8 + 800338c: 080033dc .word 0x080033dc -080033f0 <_init>: - 80033f0: b5f8 push {r3, r4, r5, r6, r7, lr} - 80033f2: bf00 nop - 80033f4: bcf8 pop {r3, r4, r5, r6, r7} - 80033f6: bc08 pop {r3} - 80033f8: 469e mov lr, r3 - 80033fa: 4770 bx lr +08003390 <_init>: + 8003390: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003392: bf00 nop + 8003394: bcf8 pop {r3, r4, r5, r6, r7} + 8003396: bc08 pop {r3} + 8003398: 469e mov lr, r3 + 800339a: 4770 bx lr -080033fc <_fini>: - 80033fc: b5f8 push {r3, r4, r5, r6, r7, lr} - 80033fe: bf00 nop - 8003400: bcf8 pop {r3, r4, r5, r6, r7} - 8003402: bc08 pop {r3} - 8003404: 469e mov lr, r3 - 8003406: 4770 bx lr +0800339c <_fini>: + 800339c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800339e: bf00 nop + 80033a0: bcf8 pop {r3, r4, r5, r6, r7} + 80033a2: bc08 pop {r3} + 80033a4: 469e mov lr, r3 + 80033a6: 4770 bx lr diff --git a/Software/Debug/Dashboard.map b/Software/Debug/Dashboard.map index 91740ea..929a58d 100644 --- a/Software/Debug/Dashboard.map +++ b/Software/Debug/Dashboard.map @@ -1619,8 +1619,6 @@ Discarded input sections .bss 0x00000000 0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o .text.HAL_GPIO_DeInit 0x00000000 0x1b8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .text.HAL_GPIO_TogglePin - 0x00000000 0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o .text.HAL_GPIO_LockPin 0x00000000 0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o .text.HAL_GPIO_EXTI_IRQHandler @@ -2734,7 +2732,7 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x08000000 g_pfnVectors 0x08000188 . = ALIGN (0x4) -.text 0x08000188 0x3280 +.text 0x08000188 0x3220 0x08000188 . = ALIGN (0x4) *(.text) .text 0x08000188 0x40 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -2761,324 +2759,327 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .text.HAL_CAN_RxFifo0MsgPendingCallback 0x080003ac 0x58 ./Core/Src/can_halal.o 0x080003ac HAL_CAN_RxFifo0MsgPendingCallback - .text.main 0x08000404 0x424 ./Core/Src/main.o + .text.main 0x08000404 0x390 ./Core/Src/main.o 0x08000404 main .text.SystemClock_Config - 0x08000828 0x78 ./Core/Src/main.o - 0x08000828 SystemClock_Config + 0x08000794 0x78 ./Core/Src/main.o + 0x08000794 SystemClock_Config .text.MX_CAN_Init - 0x080008a0 0x6c ./Core/Src/main.o + 0x0800080c 0x6c ./Core/Src/main.o .text.MX_GPIO_Init - 0x0800090c 0xd8 ./Core/Src/main.o + 0x08000878 0xd8 ./Core/Src/main.o .text.Error_Handler - 0x080009e4 0xc ./Core/Src/main.o - 0x080009e4 Error_Handler + 0x08000950 0xc ./Core/Src/main.o + 0x08000950 Error_Handler .text.HAL_MspInit - 0x080009f0 0x48 ./Core/Src/stm32f3xx_hal_msp.o - 0x080009f0 HAL_MspInit + 0x0800095c 0x48 ./Core/Src/stm32f3xx_hal_msp.o + 0x0800095c HAL_MspInit .text.HAL_CAN_MspInit - 0x08000a38 0xa8 ./Core/Src/stm32f3xx_hal_msp.o - 0x08000a38 HAL_CAN_MspInit + 0x080009a4 0xa8 ./Core/Src/stm32f3xx_hal_msp.o + 0x080009a4 HAL_CAN_MspInit .text.NMI_Handler - 0x08000ae0 0x8 ./Core/Src/stm32f3xx_it.o - 0x08000ae0 NMI_Handler + 0x08000a4c 0x8 ./Core/Src/stm32f3xx_it.o + 0x08000a4c NMI_Handler .text.HardFault_Handler - 0x08000ae8 0x8 ./Core/Src/stm32f3xx_it.o - 0x08000ae8 HardFault_Handler + 0x08000a54 0x8 ./Core/Src/stm32f3xx_it.o + 0x08000a54 HardFault_Handler .text.MemManage_Handler - 0x08000af0 0x8 ./Core/Src/stm32f3xx_it.o - 0x08000af0 MemManage_Handler + 0x08000a5c 0x8 ./Core/Src/stm32f3xx_it.o + 0x08000a5c MemManage_Handler .text.BusFault_Handler - 0x08000af8 0x8 ./Core/Src/stm32f3xx_it.o - 0x08000af8 BusFault_Handler + 0x08000a64 0x8 ./Core/Src/stm32f3xx_it.o + 0x08000a64 BusFault_Handler .text.UsageFault_Handler - 0x08000b00 0x8 ./Core/Src/stm32f3xx_it.o - 0x08000b00 UsageFault_Handler + 0x08000a6c 0x8 ./Core/Src/stm32f3xx_it.o + 0x08000a6c UsageFault_Handler .text.SVC_Handler - 0x08000b08 0xe ./Core/Src/stm32f3xx_it.o - 0x08000b08 SVC_Handler + 0x08000a74 0xe ./Core/Src/stm32f3xx_it.o + 0x08000a74 SVC_Handler .text.DebugMon_Handler - 0x08000b16 0xe ./Core/Src/stm32f3xx_it.o - 0x08000b16 DebugMon_Handler + 0x08000a82 0xe ./Core/Src/stm32f3xx_it.o + 0x08000a82 DebugMon_Handler .text.PendSV_Handler - 0x08000b24 0xe ./Core/Src/stm32f3xx_it.o - 0x08000b24 PendSV_Handler + 0x08000a90 0xe ./Core/Src/stm32f3xx_it.o + 0x08000a90 PendSV_Handler .text.SysTick_Handler - 0x08000b32 0xc ./Core/Src/stm32f3xx_it.o - 0x08000b32 SysTick_Handler - *fill* 0x08000b3e 0x2 + 0x08000a9e 0xc ./Core/Src/stm32f3xx_it.o + 0x08000a9e SysTick_Handler + *fill* 0x08000aaa 0x2 .text.USB_LP_CAN_RX0_IRQHandler - 0x08000b40 0x14 ./Core/Src/stm32f3xx_it.o - 0x08000b40 USB_LP_CAN_RX0_IRQHandler + 0x08000aac 0x14 ./Core/Src/stm32f3xx_it.o + 0x08000aac USB_LP_CAN_RX0_IRQHandler .text.CAN_RX1_IRQHandler - 0x08000b54 0x14 ./Core/Src/stm32f3xx_it.o - 0x08000b54 CAN_RX1_IRQHandler + 0x08000ac0 0x14 ./Core/Src/stm32f3xx_it.o + 0x08000ac0 CAN_RX1_IRQHandler .text.SystemInit - 0x08000b68 0x24 ./Core/Src/system_stm32f3xx.o - 0x08000b68 SystemInit + 0x08000ad4 0x24 ./Core/Src/system_stm32f3xx.o + 0x08000ad4 SystemInit .text.Reset_Handler - 0x08000b8c 0x50 ./Core/Startup/startup_stm32f302cbtx.o - 0x08000b8c Reset_Handler + 0x08000af8 0x50 ./Core/Startup/startup_stm32f302cbtx.o + 0x08000af8 Reset_Handler .text.Default_Handler - 0x08000bdc 0x2 ./Core/Startup/startup_stm32f302cbtx.o - 0x08000bdc RTC_Alarm_IRQHandler - 0x08000bdc TIM1_CC_IRQHandler - 0x08000bdc USB_HP_IRQHandler - 0x08000bdc PVD_IRQHandler - 0x08000bdc TAMP_STAMP_IRQHandler - 0x08000bdc EXTI3_IRQHandler - 0x08000bdc USB_HP_CAN_TX_IRQHandler - 0x08000bdc EXTI0_IRQHandler - 0x08000bdc I2C2_EV_IRQHandler - 0x08000bdc FPU_IRQHandler - 0x08000bdc TIM1_UP_TIM16_IRQHandler - 0x08000bdc ADC1_2_IRQHandler - 0x08000bdc SPI1_IRQHandler - 0x08000bdc CAN_SCE_IRQHandler - 0x08000bdc TIM6_DAC_IRQHandler - 0x08000bdc DMA2_Channel2_IRQHandler - 0x08000bdc DMA1_Channel4_IRQHandler - 0x08000bdc USART3_IRQHandler - 0x08000bdc DMA1_Channel7_IRQHandler - 0x08000bdc UART5_IRQHandler - 0x08000bdc TIM4_IRQHandler - 0x08000bdc DMA2_Channel1_IRQHandler - 0x08000bdc I2C1_EV_IRQHandler - 0x08000bdc DMA1_Channel6_IRQHandler - 0x08000bdc UART4_IRQHandler - 0x08000bdc DMA2_Channel4_IRQHandler - 0x08000bdc TIM3_IRQHandler - 0x08000bdc RCC_IRQHandler - 0x08000bdc DMA1_Channel1_IRQHandler - 0x08000bdc Default_Handler - 0x08000bdc USBWakeUp_RMP_IRQHandler - 0x08000bdc EXTI15_10_IRQHandler - 0x08000bdc EXTI9_5_IRQHandler - 0x08000bdc RTC_WKUP_IRQHandler - 0x08000bdc SPI2_IRQHandler - 0x08000bdc DMA2_Channel5_IRQHandler - 0x08000bdc DMA1_Channel5_IRQHandler - 0x08000bdc USB_LP_IRQHandler - 0x08000bdc EXTI4_IRQHandler - 0x08000bdc COMP1_2_IRQHandler - 0x08000bdc TIM1_TRG_COM_TIM17_IRQHandler - 0x08000bdc DMA1_Channel3_IRQHandler - 0x08000bdc WWDG_IRQHandler - 0x08000bdc TIM2_IRQHandler - 0x08000bdc EXTI1_IRQHandler - 0x08000bdc COMP4_6_IRQHandler - 0x08000bdc USART2_IRQHandler - 0x08000bdc I2C2_ER_IRQHandler - 0x08000bdc DMA1_Channel2_IRQHandler - 0x08000bdc FLASH_IRQHandler - 0x08000bdc USART1_IRQHandler - 0x08000bdc SPI3_IRQHandler - 0x08000bdc I2C1_ER_IRQHandler - 0x08000bdc USBWakeUp_IRQHandler - 0x08000bdc DMA2_Channel3_IRQHandler - 0x08000bdc EXTI2_TSC_IRQHandler - 0x08000bdc TIM1_BRK_TIM15_IRQHandler - *fill* 0x08000bde 0x2 + 0x08000b48 0x2 ./Core/Startup/startup_stm32f302cbtx.o + 0x08000b48 RTC_Alarm_IRQHandler + 0x08000b48 TIM1_CC_IRQHandler + 0x08000b48 USB_HP_IRQHandler + 0x08000b48 PVD_IRQHandler + 0x08000b48 TAMP_STAMP_IRQHandler + 0x08000b48 EXTI3_IRQHandler + 0x08000b48 USB_HP_CAN_TX_IRQHandler + 0x08000b48 EXTI0_IRQHandler + 0x08000b48 I2C2_EV_IRQHandler + 0x08000b48 FPU_IRQHandler + 0x08000b48 TIM1_UP_TIM16_IRQHandler + 0x08000b48 ADC1_2_IRQHandler + 0x08000b48 SPI1_IRQHandler + 0x08000b48 CAN_SCE_IRQHandler + 0x08000b48 TIM6_DAC_IRQHandler + 0x08000b48 DMA2_Channel2_IRQHandler + 0x08000b48 DMA1_Channel4_IRQHandler + 0x08000b48 USART3_IRQHandler + 0x08000b48 DMA1_Channel7_IRQHandler + 0x08000b48 UART5_IRQHandler + 0x08000b48 TIM4_IRQHandler + 0x08000b48 DMA2_Channel1_IRQHandler + 0x08000b48 I2C1_EV_IRQHandler + 0x08000b48 DMA1_Channel6_IRQHandler + 0x08000b48 UART4_IRQHandler + 0x08000b48 DMA2_Channel4_IRQHandler + 0x08000b48 TIM3_IRQHandler + 0x08000b48 RCC_IRQHandler + 0x08000b48 DMA1_Channel1_IRQHandler + 0x08000b48 Default_Handler + 0x08000b48 USBWakeUp_RMP_IRQHandler + 0x08000b48 EXTI15_10_IRQHandler + 0x08000b48 EXTI9_5_IRQHandler + 0x08000b48 RTC_WKUP_IRQHandler + 0x08000b48 SPI2_IRQHandler + 0x08000b48 DMA2_Channel5_IRQHandler + 0x08000b48 DMA1_Channel5_IRQHandler + 0x08000b48 USB_LP_IRQHandler + 0x08000b48 EXTI4_IRQHandler + 0x08000b48 COMP1_2_IRQHandler + 0x08000b48 TIM1_TRG_COM_TIM17_IRQHandler + 0x08000b48 DMA1_Channel3_IRQHandler + 0x08000b48 WWDG_IRQHandler + 0x08000b48 TIM2_IRQHandler + 0x08000b48 EXTI1_IRQHandler + 0x08000b48 COMP4_6_IRQHandler + 0x08000b48 USART2_IRQHandler + 0x08000b48 I2C2_ER_IRQHandler + 0x08000b48 DMA1_Channel2_IRQHandler + 0x08000b48 FLASH_IRQHandler + 0x08000b48 USART1_IRQHandler + 0x08000b48 SPI3_IRQHandler + 0x08000b48 I2C1_ER_IRQHandler + 0x08000b48 USBWakeUp_IRQHandler + 0x08000b48 DMA2_Channel3_IRQHandler + 0x08000b48 EXTI2_TSC_IRQHandler + 0x08000b48 TIM1_BRK_TIM15_IRQHandler + *fill* 0x08000b4a 0x2 .text.HAL_Init - 0x08000be0 0x2c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x08000be0 HAL_Init + 0x08000b4c 0x2c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x08000b4c HAL_Init .text.HAL_InitTick - 0x08000c0c 0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x08000c0c HAL_InitTick + 0x08000b78 0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x08000b78 HAL_InitTick .text.HAL_IncTick - 0x08000c6c 0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x08000c6c HAL_IncTick + 0x08000bd8 0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x08000bd8 HAL_IncTick .text.HAL_GetTick - 0x08000c94 0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - 0x08000c94 HAL_GetTick + 0x08000c00 0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x08000c00 HAL_GetTick .text.HAL_CAN_Init - 0x08000cac 0x28c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08000cac HAL_CAN_Init + 0x08000c18 0x28c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08000c18 HAL_CAN_Init .text.HAL_CAN_ConfigFilter - 0x08000f38 0x194 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08000f38 HAL_CAN_ConfigFilter + 0x08000ea4 0x194 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08000ea4 HAL_CAN_ConfigFilter .text.HAL_CAN_Start - 0x080010cc 0x88 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x080010cc HAL_CAN_Start + 0x08001038 0x88 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08001038 HAL_CAN_Start .text.HAL_CAN_AddTxMessage - 0x08001154 0x1a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001154 HAL_CAN_AddTxMessage + 0x080010c0 0x1a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080010c0 HAL_CAN_AddTxMessage .text.HAL_CAN_GetRxMessage - 0x080012f4 0x244 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x080012f4 HAL_CAN_GetRxMessage + 0x08001260 0x244 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08001260 HAL_CAN_GetRxMessage .text.HAL_CAN_ActivateNotification - 0x08001538 0x4c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001538 HAL_CAN_ActivateNotification + 0x080014a4 0x4c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080014a4 HAL_CAN_ActivateNotification .text.HAL_CAN_IRQHandler - 0x08001584 0x38a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001584 HAL_CAN_IRQHandler + 0x080014f0 0x38a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080014f0 HAL_CAN_IRQHandler .text.HAL_CAN_TxMailbox0CompleteCallback - 0x0800190e 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x0800190e HAL_CAN_TxMailbox0CompleteCallback + 0x0800187a 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x0800187a HAL_CAN_TxMailbox0CompleteCallback .text.HAL_CAN_TxMailbox1CompleteCallback - 0x08001922 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001922 HAL_CAN_TxMailbox1CompleteCallback + 0x0800188e 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x0800188e HAL_CAN_TxMailbox1CompleteCallback .text.HAL_CAN_TxMailbox2CompleteCallback - 0x08001936 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001936 HAL_CAN_TxMailbox2CompleteCallback + 0x080018a2 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080018a2 HAL_CAN_TxMailbox2CompleteCallback .text.HAL_CAN_TxMailbox0AbortCallback - 0x0800194a 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x0800194a HAL_CAN_TxMailbox0AbortCallback + 0x080018b6 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080018b6 HAL_CAN_TxMailbox0AbortCallback .text.HAL_CAN_TxMailbox1AbortCallback - 0x0800195e 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x0800195e HAL_CAN_TxMailbox1AbortCallback + 0x080018ca 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080018ca HAL_CAN_TxMailbox1AbortCallback .text.HAL_CAN_TxMailbox2AbortCallback - 0x08001972 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001972 HAL_CAN_TxMailbox2AbortCallback + 0x080018de 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080018de HAL_CAN_TxMailbox2AbortCallback .text.HAL_CAN_RxFifo0FullCallback - 0x08001986 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x08001986 HAL_CAN_RxFifo0FullCallback + 0x080018f2 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x080018f2 HAL_CAN_RxFifo0FullCallback .text.HAL_CAN_RxFifo1MsgPendingCallback - 0x0800199a 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x0800199a HAL_CAN_RxFifo1MsgPendingCallback + 0x08001906 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08001906 HAL_CAN_RxFifo1MsgPendingCallback .text.HAL_CAN_RxFifo1FullCallback - 0x080019ae 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x080019ae HAL_CAN_RxFifo1FullCallback + 0x0800191a 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x0800191a HAL_CAN_RxFifo1FullCallback .text.HAL_CAN_SleepCallback - 0x080019c2 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x080019c2 HAL_CAN_SleepCallback + 0x0800192e 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x0800192e HAL_CAN_SleepCallback .text.HAL_CAN_WakeUpFromRxMsgCallback - 0x080019d6 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x080019d6 HAL_CAN_WakeUpFromRxMsgCallback + 0x08001942 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08001942 HAL_CAN_WakeUpFromRxMsgCallback .text.HAL_CAN_ErrorCallback - 0x080019ea 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - 0x080019ea HAL_CAN_ErrorCallback - *fill* 0x080019fe 0x2 + 0x08001956 0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + 0x08001956 HAL_CAN_ErrorCallback + *fill* 0x0800196a 0x2 .text.__NVIC_SetPriorityGrouping - 0x08001a00 0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x0800196c 0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x08001a48 0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x080019b4 0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x08001a64 0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x080019d0 0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08001aa0 0x54 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x08001a0c 0x54 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08001af4 0x66 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - *fill* 0x08001b5a 0x2 + 0x08001a60 0x66 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + *fill* 0x08001ac6 0x2 .text.SysTick_Config - 0x08001b5c 0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x08001ac8 0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08001ba0 0x16 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x08001ba0 HAL_NVIC_SetPriorityGrouping + 0x08001b0c 0x16 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x08001b0c HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08001bb6 0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x08001bb6 HAL_NVIC_SetPriority + 0x08001b22 0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x08001b22 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08001bee 0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x08001bee HAL_NVIC_EnableIRQ + 0x08001b5a 0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x08001b5a HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08001c0a 0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - 0x08001c0a HAL_SYSTICK_Config - *fill* 0x08001c22 0x2 + 0x08001b76 0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + 0x08001b76 HAL_SYSTICK_Config + *fill* 0x08001b8e 0x2 .text.HAL_GPIO_Init - 0x08001c24 0x2f4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - 0x08001c24 HAL_GPIO_Init + 0x08001b90 0x2f4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + 0x08001b90 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08001f18 0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - 0x08001f18 HAL_GPIO_ReadPin + 0x08001e84 0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + 0x08001e84 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08001f48 0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - 0x08001f48 HAL_GPIO_WritePin + 0x08001eb4 0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + 0x08001eb4 HAL_GPIO_WritePin + .text.HAL_GPIO_TogglePin + 0x08001ee4 0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + 0x08001ee4 HAL_GPIO_TogglePin .text.HAL_RCC_OscConfig - 0x08001f78 0x107c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x08001f78 HAL_RCC_OscConfig + 0x08001f18 0x107c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x08001f18 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x08002ff4 0x2f8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x08002ff4 HAL_RCC_ClockConfig + 0x08002f94 0x2f8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x08002f94 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x080032ec 0xac ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x080032ec HAL_RCC_GetSysClockFreq - .text.memset 0x08003398 0x10 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o) - 0x08003398 memset + 0x0800328c 0xac ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x0800328c HAL_RCC_GetSysClockFreq + .text.memset 0x08003338 0x10 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o) + 0x08003338 memset .text.__libc_init_array - 0x080033a8 0x48 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o) - 0x080033a8 __libc_init_array + 0x08003348 0x48 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o) + 0x08003348 __libc_init_array *(.glue_7) - .glue_7 0x080033f0 0x0 linker stubs + .glue_7 0x08003390 0x0 linker stubs *(.glue_7t) - .glue_7t 0x080033f0 0x0 linker stubs + .glue_7t 0x08003390 0x0 linker stubs *(.eh_frame) - .eh_frame 0x080033f0 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .eh_frame 0x08003390 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x080033f0 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o - 0x080033f0 _init - .init 0x080033f4 0x8 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x08003390 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o + 0x08003390 _init + .init 0x08003394 0x8 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x080033fc 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o - 0x080033fc _fini - .fini 0x08003400 0x8 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o - 0x08003408 . = ALIGN (0x4) - 0x08003408 _etext = . + .fini 0x0800339c 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o + 0x0800339c _fini + .fini 0x080033a0 0x8 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x080033a8 . = ALIGN (0x4) + 0x080033a8 _etext = . -.vfp11_veneer 0x08003408 0x0 - .vfp11_veneer 0x08003408 0x0 linker stubs +.vfp11_veneer 0x080033a8 0x0 + .vfp11_veneer 0x080033a8 0x0 linker stubs -.v4_bx 0x08003408 0x0 - .v4_bx 0x08003408 0x0 linker stubs +.v4_bx 0x080033a8 0x0 + .v4_bx 0x080033a8 0x0 linker stubs -.iplt 0x08003408 0x0 - .iplt 0x08003408 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x080033a8 0x0 + .iplt 0x080033a8 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x08003408 0x30 - 0x08003408 . = ALIGN (0x4) +.rodata 0x080033a8 0x30 + 0x080033a8 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.AHBPrescTable - 0x08003408 0x10 ./Core/Src/system_stm32f3xx.o - 0x08003408 AHBPrescTable + 0x080033a8 0x10 ./Core/Src/system_stm32f3xx.o + 0x080033a8 AHBPrescTable .rodata.aPLLMULFactorTable - 0x08003418 0x10 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x080033b8 0x10 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o .rodata.aPredivFactorTable - 0x08003428 0x10 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o - 0x08003438 . = ALIGN (0x4) + 0x080033c8 0x10 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x080033d8 . = ALIGN (0x4) -.ARM.extab 0x08003438 0x0 - 0x08003438 . = ALIGN (0x4) +.ARM.extab 0x080033d8 0x0 + 0x080033d8 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08003438 . = ALIGN (0x4) + 0x080033d8 . = ALIGN (0x4) -.ARM 0x08003438 0x0 - 0x08003438 . = ALIGN (0x4) - 0x08003438 __exidx_start = . +.ARM 0x080033d8 0x0 + 0x080033d8 . = ALIGN (0x4) + 0x080033d8 __exidx_start = . *(.ARM.exidx*) - 0x08003438 __exidx_end = . - 0x08003438 . = ALIGN (0x4) + 0x080033d8 __exidx_end = . + 0x080033d8 . = ALIGN (0x4) -.preinit_array 0x08003438 0x0 - 0x08003438 . = ALIGN (0x4) - 0x08003438 PROVIDE (__preinit_array_start = .) +.preinit_array 0x080033d8 0x0 + 0x080033d8 . = ALIGN (0x4) + 0x080033d8 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08003438 PROVIDE (__preinit_array_end = .) - 0x08003438 . = ALIGN (0x4) + 0x080033d8 PROVIDE (__preinit_array_end = .) + 0x080033d8 . = ALIGN (0x4) -.init_array 0x08003438 0x4 - 0x08003438 . = ALIGN (0x4) - 0x08003438 PROVIDE (__init_array_start = .) +.init_array 0x080033d8 0x4 + 0x080033d8 . = ALIGN (0x4) + 0x080033d8 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08003438 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x0800343c PROVIDE (__init_array_end = .) - 0x0800343c . = ALIGN (0x4) + .init_array 0x080033d8 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x080033dc PROVIDE (__init_array_end = .) + 0x080033dc . = ALIGN (0x4) -.fini_array 0x0800343c 0x4 - 0x0800343c . = ALIGN (0x4) +.fini_array 0x080033dc 0x4 + 0x080033dc . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0800343c 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .fini_array 0x080033dc 0x4 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08003440 . = ALIGN (0x4) - 0x08003440 _sidata = LOADADDR (.data) + 0x080033e0 . = ALIGN (0x4) + 0x080033e0 _sidata = LOADADDR (.data) -.rel.dyn 0x08003440 0x0 - .rel.iplt 0x08003440 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x080033e0 0x0 + .rel.iplt 0x080033e0 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.data 0x20000000 0xc load address 0x08003440 +.data 0x20000000 0xc load address 0x080033e0 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -3098,11 +3099,11 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext *fill* 0x20000009 0x3 0x2000000c _edata = . -.igot.plt 0x2000000c 0x0 load address 0x0800344c +.igot.plt 0x2000000c 0x0 load address 0x080033ec .igot.plt 0x2000000c 0x0 C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o 0x2000000c . = ALIGN (0x4) -.bss 0x2000000c 0xe8 load address 0x0800344c +.bss 0x2000000c 0xe8 load address 0x080033ec 0x2000000c _sbss = . 0x2000000c __bss_start__ = _sbss *(.bss) @@ -3125,13 +3126,10 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .bss.sdc_closed 0x200000dc 0x1 ./Core/Src/main.o 0x200000dc sdc_closed - .bss.blink_state - 0x200000dd 0x1 ./Core/Src/main.o - 0x200000dd blink_state .bss.r2d_progress - 0x200000de 0x1 ./Core/Src/main.o - 0x200000de r2d_progress - *fill* 0x200000df 0x1 + 0x200000dd 0x1 ./Core/Src/main.o + 0x200000dd r2d_progress + *fill* 0x200000de 0x2 .bss.blink_tick_tson 0x200000e0 0x4 ./Core/Src/main.o 0x200000e0 blink_tick_tson @@ -3152,7 +3150,7 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext 0x200000f4 __bss_end__ = _ebss ._user_heap_stack - 0x200000f4 0x604 load address 0x0800344c + 0x200000f4 0x604 load address 0x080033ec 0x200000f8 . = ALIGN (0x8) *fill* 0x200000f4 0x4 [!provide] PROVIDE (end = .) @@ -3211,19 +3209,19 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libm.a LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.1.0.202410251130/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard\libgcc.a -.debug_info 0x00000000 0x74ad +.debug_info 0x00000000 0x74b1 .debug_info 0x00000000 0x870 ./Core/Src/can.o .debug_info 0x00000870 0xb01 ./Core/Src/can_halal.o - .debug_info 0x00001371 0xd3e ./Core/Src/main.o - .debug_info 0x000020af 0x9f1 ./Core/Src/stm32f3xx_hal_msp.o - .debug_info 0x00002aa0 0x5ef ./Core/Src/stm32f3xx_it.o - .debug_info 0x0000308f 0x407 ./Core/Src/system_stm32f3xx.o - .debug_info 0x00003496 0x30 ./Core/Startup/startup_stm32f302cbtx.o - .debug_info 0x000034c6 0x7a4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_info 0x00003c6a 0x1107 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - .debug_info 0x00004d71 0xcb4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_info 0x00005a25 0x5fe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_info 0x00006023 0x148a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_info 0x00001371 0xd42 ./Core/Src/main.o + .debug_info 0x000020b3 0x9f1 ./Core/Src/stm32f3xx_hal_msp.o + .debug_info 0x00002aa4 0x5ef ./Core/Src/stm32f3xx_it.o + .debug_info 0x00003093 0x407 ./Core/Src/system_stm32f3xx.o + .debug_info 0x0000349a 0x30 ./Core/Startup/startup_stm32f302cbtx.o + .debug_info 0x000034ca 0x7a4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_info 0x00003c6e 0x1107 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + .debug_info 0x00004d75 0xcb4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_info 0x00005a29 0x5fe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_info 0x00006027 0x148a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o .debug_abbrev 0x00000000 0x1916 .debug_abbrev 0x00000000 0x258 ./Core/Src/can.o @@ -3365,44 +3363,44 @@ LOAD C:/ST/STM32CubeIDE_1.17.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.ext .debug_macro 0x0001b29d 0x1c0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o .debug_macro 0x0001b45d 0x1dd ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o -.debug_line 0x00000000 0x7cbd +.debug_line 0x00000000 0x7c2e .debug_line 0x00000000 0x776 ./Core/Src/can.o .debug_line 0x00000776 0xa46 ./Core/Src/can_halal.o - .debug_line 0x000011bc 0xa84 ./Core/Src/main.o - .debug_line 0x00001c40 0x777 ./Core/Src/stm32f3xx_hal_msp.o - .debug_line 0x000023b7 0x817 ./Core/Src/stm32f3xx_it.o - .debug_line 0x00002bce 0x79e ./Core/Src/system_stm32f3xx.o - .debug_line 0x0000336c 0x7a ./Core/Startup/startup_stm32f302cbtx.o - .debug_line 0x000033e6 0x9d6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o - .debug_line 0x00003dbc 0x1386 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o - .debug_line 0x00005142 0xcc3 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o - .debug_line 0x00005e05 0xb4d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o - .debug_line 0x00006952 0x136b ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_line 0x000011bc 0x9f5 ./Core/Src/main.o + .debug_line 0x00001bb1 0x777 ./Core/Src/stm32f3xx_hal_msp.o + .debug_line 0x00002328 0x817 ./Core/Src/stm32f3xx_it.o + .debug_line 0x00002b3f 0x79e ./Core/Src/system_stm32f3xx.o + .debug_line 0x000032dd 0x7a ./Core/Startup/startup_stm32f302cbtx.o + .debug_line 0x00003357 0x9d6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_line 0x00003d2d 0x1386 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + .debug_line 0x000050b3 0xcc3 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_line 0x00005d76 0xb4d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_line 0x000068c3 0x136b ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o -.debug_str 0x00000000 0xa14ed +.debug_str 0x00000000 0xa14e1 .debug_str 0x00000000 0x9c3f9 ./Core/Src/can.o 0x9cc19 (size before relaxing) .debug_str 0x0009c3f9 0x33ac ./Core/Src/can_halal.o 0x9febf (size before relaxing) - .debug_str 0x0009f7a5 0x6b6 ./Core/Src/main.o - 0x9d268 (size before relaxing) - .debug_str 0x0009fe5b 0x3a6 ./Core/Src/stm32f3xx_hal_msp.o + .debug_str 0x0009f7a5 0x6bd ./Core/Src/main.o + 0x9d26f (size before relaxing) + .debug_str 0x0009fe62 0x3a6 ./Core/Src/stm32f3xx_hal_msp.o 0x9d2ff (size before relaxing) - .debug_str 0x000a0201 0xef ./Core/Src/stm32f3xx_it.o + .debug_str 0x000a0208 0xef ./Core/Src/stm32f3xx_it.o 0x9cea3 (size before relaxing) - .debug_str 0x000a02f0 0xdf ./Core/Src/system_stm32f3xx.o + .debug_str 0x000a02f7 0xdf ./Core/Src/system_stm32f3xx.o 0x9c74a (size before relaxing) - .debug_str 0x000a03cf 0x44 ./Core/Startup/startup_stm32f302cbtx.o + .debug_str 0x000a03d6 0x44 ./Core/Startup/startup_stm32f302cbtx.o 0x91 (size before relaxing) - .debug_str 0x000a0413 0x395 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_str 0x000a041a 0x395 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o 0x9cf21 (size before relaxing) - .debug_str 0x000a07a8 0x605 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o + .debug_str 0x000a07af 0x605 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o 0x9d259 (size before relaxing) - .debug_str 0x000a0dad 0x369 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_str 0x000a0db4 0x369 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o 0x9cfa5 (size before relaxing) - .debug_str 0x000a1116 0x11f ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_str 0x000a111d 0x10c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o 0x9c8c0 (size before relaxing) - .debug_str 0x000a1235 0x2b8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_str 0x000a1229 0x2b8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o 0x9cbea (size before relaxing) .comment 0x00000000 0x43