add changes from PCB review

This commit is contained in:
2025-02-21 20:46:14 +01:00
parent 177f47426a
commit 9dd8e6b138
11 changed files with 21695 additions and 24281 deletions

View File

@ -63,16 +63,19 @@
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"creepage": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"hole_to_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
@ -83,9 +86,11 @@
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
@ -100,7 +105,9 @@
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
@ -113,6 +120,7 @@
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
@ -130,10 +138,11 @@
},
"teardrop_options": [
{
"td_onpadsmd": true,
"td_onpthpad": true,
"td_onroundshapesonly": false,
"td_onsmdpad": true,
"td_ontrackend": false,
"td_onviapad": true
"td_onvia": true
}
],
"teardrop_parameters": [
@ -208,6 +217,7 @@
"mfg": "",
"mpn": ""
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
@ -402,10 +412,15 @@
"duplicate_sheet_names": "error",
"endpoint_off_grid": "ignore",
"extra_units": "error",
"footprint_filter": "ignore",
"footprint_link_issues": "warning",
"four_way_junction": "ignore",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"label_multiple_wires": "warning",
"lib_symbol_issues": "warning",
"lib_symbol_mismatch": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
@ -418,9 +433,14 @@
"pin_not_driven": "error",
"pin_to_pin": "error",
"power_pin_not_driven": "error",
"same_local_global_label": "warning",
"similar_label_and_power": "warning",
"similar_labels": "warning",
"similar_power": "warning",
"simulation_model_issue": "ignore",
"single_global_label": "ignore",
"unannotated": "error",
"unconnected_wire_endpoint": "warning",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
@ -432,7 +452,7 @@
},
"meta": {
"filename": "FT25-Charger.kicad_pro",
"version": 1
"version": 3
},
"net_settings": {
"classes": [
@ -447,6 +467,7 @@
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
@ -464,6 +485,7 @@
"microvia_drill": 0.1,
"name": "LTDC",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
@ -481,6 +503,7 @@
"microvia_drill": 0.1,
"name": "LVDS",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 1,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
@ -498,6 +521,7 @@
"microvia_drill": 0.1,
"name": "MDI",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
@ -515,6 +539,7 @@
"microvia_drill": 0.1,
"name": "RMII",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 3,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
@ -532,6 +557,7 @@
"microvia_drill": 0.1,
"name": "SDRAM",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 4,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.3,
"via_diameter": 0.6,
@ -540,100 +566,280 @@
}
],
"meta": {
"version": 3
"version": 4
},
"net_colors": null,
"netclass_assignments": {
"/Display/B0": "LTDC",
"/Display/B1": "LTDC",
"/Display/B2": "LTDC",
"/Display/B3": "LTDC",
"/Display/B4": "LTDC",
"/Display/B5": "LTDC",
"/Display/B6": "LTDC",
"/Display/B7": "LTDC",
"/Display/CLK": "LTDC",
"/Display/DE": "LTDC",
"/Display/G0": "LTDC",
"/Display/G1": "LTDC",
"/Display/G2": "LTDC",
"/Display/G3": "LTDC",
"/Display/G4": "LTDC",
"/Display/G5": "LTDC",
"/Display/G6": "LTDC",
"/Display/G7": "LTDC",
"/Display/HSYNC": "LTDC",
"/Display/R0": "LTDC",
"/Display/R1": "LTDC",
"/Display/R2": "LTDC",
"/Display/R3": "LTDC",
"/Display/R4": "LTDC",
"/Display/R5": "LTDC",
"/Display/R6": "LTDC",
"/Display/R7": "LTDC",
"/Display/RXCLKIN+": "LVDS",
"/Display/RXCLKIN-": "LVDS",
"/Display/RXIN0+": "LVDS",
"/Display/RXIN0-": "LVDS",
"/Display/RXIN1+": "LVDS",
"/Display/RXIN1-": "LVDS",
"/Display/RXIN2+": "LVDS",
"/Display/RXIN2-": "LVDS",
"/Display/RXIN3+": "LVDS",
"/Display/RXIN3-": "LVDS",
"/Display/VSYNC": "LTDC",
"/Ethernet/RMII_CRS_DV": "RMII",
"/Ethernet/RMII_MDC": "RMII",
"/Ethernet/RMII_MDIO": "RMII",
"/Ethernet/RMII_REF_CLK": "RMII",
"/Ethernet/RMII_RXD0": "RMII",
"/Ethernet/RMII_RXD1": "RMII",
"/Ethernet/RMII_TXD0": "RMII",
"/Ethernet/RMII_TXD1": "RMII",
"/Ethernet/RMII_TX_EN": "RMII",
"/Ethernet/RXN": "MDI",
"/Ethernet/RXP": "MDI",
"/Ethernet/TXN": "MDI",
"/Ethernet/TXP": "MDI",
"/SDRAM/A0": "SDRAM",
"/SDRAM/A1": "SDRAM",
"/SDRAM/A10": "SDRAM",
"/SDRAM/A11": "SDRAM",
"/SDRAM/A12": "SDRAM",
"/SDRAM/A2": "SDRAM",
"/SDRAM/A3": "SDRAM",
"/SDRAM/A4": "SDRAM",
"/SDRAM/A5": "SDRAM",
"/SDRAM/A6": "SDRAM",
"/SDRAM/A7": "SDRAM",
"/SDRAM/A8": "SDRAM",
"/SDRAM/A9": "SDRAM",
"/SDRAM/BA0": "SDRAM",
"/SDRAM/BA1": "SDRAM",
"/SDRAM/D0": "SDRAM",
"/SDRAM/D1": "SDRAM",
"/SDRAM/D10": "SDRAM",
"/SDRAM/D11": "SDRAM",
"/SDRAM/D12": "SDRAM",
"/SDRAM/D13": "SDRAM",
"/SDRAM/D14": "SDRAM",
"/SDRAM/D15": "SDRAM",
"/SDRAM/D2": "SDRAM",
"/SDRAM/D3": "SDRAM",
"/SDRAM/D4": "SDRAM",
"/SDRAM/D5": "SDRAM",
"/SDRAM/D6": "SDRAM",
"/SDRAM/D7": "SDRAM",
"/SDRAM/D8": "SDRAM",
"/SDRAM/D9": "SDRAM",
"/SDRAM/NBL0": "SDRAM",
"/SDRAM/NBL1": "SDRAM",
"/SDRAM/SDCKE0": "SDRAM",
"/SDRAM/SDCLK": "SDRAM",
"/SDRAM/SDNCAS": "SDRAM",
"/SDRAM/SDNE0": "SDRAM",
"/SDRAM/SDNRAS": "SDRAM",
"/SDRAM/SDNWE": "SDRAM"
"/Display/B0": [
"LTDC"
],
"/Display/B1": [
"LTDC"
],
"/Display/B2": [
"LTDC"
],
"/Display/B3": [
"LTDC"
],
"/Display/B4": [
"LTDC"
],
"/Display/B5": [
"LTDC"
],
"/Display/B6": [
"LTDC"
],
"/Display/B7": [
"LTDC"
],
"/Display/CLK": [
"LTDC"
],
"/Display/DE": [
"LTDC"
],
"/Display/G0": [
"LTDC"
],
"/Display/G1": [
"LTDC"
],
"/Display/G2": [
"LTDC"
],
"/Display/G3": [
"LTDC"
],
"/Display/G4": [
"LTDC"
],
"/Display/G5": [
"LTDC"
],
"/Display/G6": [
"LTDC"
],
"/Display/G7": [
"LTDC"
],
"/Display/HSYNC": [
"LTDC"
],
"/Display/R0": [
"LTDC"
],
"/Display/R1": [
"LTDC"
],
"/Display/R2": [
"LTDC"
],
"/Display/R3": [
"LTDC"
],
"/Display/R4": [
"LTDC"
],
"/Display/R5": [
"LTDC"
],
"/Display/R6": [
"LTDC"
],
"/Display/R7": [
"LTDC"
],
"/Display/RXCLKIN+": [
"LVDS"
],
"/Display/RXCLKIN-": [
"LVDS"
],
"/Display/RXIN0+": [
"LVDS"
],
"/Display/RXIN0-": [
"LVDS"
],
"/Display/RXIN1+": [
"LVDS"
],
"/Display/RXIN1-": [
"LVDS"
],
"/Display/RXIN2+": [
"LVDS"
],
"/Display/RXIN2-": [
"LVDS"
],
"/Display/RXIN3+": [
"LVDS"
],
"/Display/RXIN3-": [
"LVDS"
],
"/Display/VSYNC": [
"LTDC"
],
"/Ethernet/RMII_CRS_DV": [
"RMII"
],
"/Ethernet/RMII_MDC": [
"RMII"
],
"/Ethernet/RMII_MDIO": [
"RMII"
],
"/Ethernet/RMII_REF_CLK": [
"RMII"
],
"/Ethernet/RMII_RXD0": [
"RMII"
],
"/Ethernet/RMII_RXD1": [
"RMII"
],
"/Ethernet/RMII_TXD0": [
"RMII"
],
"/Ethernet/RMII_TXD1": [
"RMII"
],
"/Ethernet/RMII_TX_EN": [
"RMII"
],
"/Ethernet/RXN": [
"MDI"
],
"/Ethernet/RXP": [
"MDI"
],
"/Ethernet/TXN": [
"MDI"
],
"/Ethernet/TXP": [
"MDI"
],
"/SDRAM/A0": [
"SDRAM"
],
"/SDRAM/A1": [
"SDRAM"
],
"/SDRAM/A10": [
"SDRAM"
],
"/SDRAM/A11": [
"SDRAM"
],
"/SDRAM/A12": [
"SDRAM"
],
"/SDRAM/A2": [
"SDRAM"
],
"/SDRAM/A3": [
"SDRAM"
],
"/SDRAM/A4": [
"SDRAM"
],
"/SDRAM/A5": [
"SDRAM"
],
"/SDRAM/A6": [
"SDRAM"
],
"/SDRAM/A7": [
"SDRAM"
],
"/SDRAM/A8": [
"SDRAM"
],
"/SDRAM/A9": [
"SDRAM"
],
"/SDRAM/BA0": [
"SDRAM"
],
"/SDRAM/BA1": [
"SDRAM"
],
"/SDRAM/D0": [
"SDRAM"
],
"/SDRAM/D1": [
"SDRAM"
],
"/SDRAM/D10": [
"SDRAM"
],
"/SDRAM/D11": [
"SDRAM"
],
"/SDRAM/D12": [
"SDRAM"
],
"/SDRAM/D13": [
"SDRAM"
],
"/SDRAM/D14": [
"SDRAM"
],
"/SDRAM/D15": [
"SDRAM"
],
"/SDRAM/D2": [
"SDRAM"
],
"/SDRAM/D3": [
"SDRAM"
],
"/SDRAM/D4": [
"SDRAM"
],
"/SDRAM/D5": [
"SDRAM"
],
"/SDRAM/D6": [
"SDRAM"
],
"/SDRAM/D7": [
"SDRAM"
],
"/SDRAM/D8": [
"SDRAM"
],
"/SDRAM/D9": [
"SDRAM"
],
"/SDRAM/NBL0": [
"SDRAM"
],
"/SDRAM/NBL1": [
"SDRAM"
],
"/SDRAM/SDCKE0": [
"SDRAM"
],
"/SDRAM/SDCLK": [
"SDRAM"
],
"/SDRAM/SDNCAS": [
"SDRAM"
],
"/SDRAM/SDNE0": [
"SDRAM"
],
"/SDRAM/SDNRAS": [
"SDRAM"
],
"/SDRAM/SDNWE": [
"SDRAM"
]
},
"netclass_patterns": []
},
@ -749,6 +955,7 @@
],
"filter_string": "",
"group_symbols": true,
"include_excluded_from_bom": false,
"name": "",
"sort_asc": true,
"sort_field": "Reference"
@ -783,6 +990,7 @@
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"space_save_all_events": true,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,